Index: rtos_arduino/trunk/README.txt
===================================================================
--- rtos_arduino/trunk/README.txt	(revision 136)
+++ rtos_arduino/trunk/README.txt	(revision 136)
@@ -0,0 +1,351 @@
+=====================================================================
+       TOPPERS RTE/RTOS compatible with Arduino libraries : RCA  
+                                   Last Modified:2015 Nov 24 23:46:50
+=====================================================================
+
+âToDo
+ã»SPI/I2Cã®å
+±æã®ããã®ã»ããã©ã®è¿½å 
+
+âæ¦è¦
+
+TOPPERS RTE/RTOS compatible with Arduino libraries(RCA)ã¯ï¼TOPPERSä¸ã§
+Arduino ã©ã¤ãã©ãªãä½¿ç¨ããããã®ç°å¢ã§ããï¼
+
+å¤ãã®ã³ã¼ããArduino IDEä»å±ã®ç©ããã¼ã¹ã¨ãã¦ããããï¼ã©ã¤ã»ã³ã¹ã¯
+GPLã§ããï¼åã³ã¼ãã®ã©ã¤ã»ã³ã¹ã¯ã³ã¼ãæ¯ã®ã©ã¤ã»ã³ã¹ã«å¾ãï¼
+
+âãµãã¼ã
+
+ãµãã¼ããã¦ãããã­ã»ããµã¯ï¼Arduino M0/M0 Pro ã§ããï¼
+
+âåä½ç¢ºèªæ¸ã¿ã®ãã¼ã¸ã§ã³
+
+åä½ç¢ºèªæ¸ã¿ã®ãã¼ã¸ã§ã³ã¯æ¬¡ã®éãã§ããï¼
+
+ã»Arduino IDE 1.7.8
+ã»TOPPERS/ASPã«ã¼ãã« 1.9.2
+ Atmel Studio 7.0 (build 594)
+
+âã¯ã¤ãã¯ã¹ã¿ã¼ã(ãããã¬ãªã)
+
+Windowsç°å¢ã§ã®ãããã¬ãªãã®å®è¡æ¹æ³ã«ã¤ãã¦èª¬æããï¼
+
+âã¤ã³ã¹ãã¼ã«
+
+Arduino IDE ã®ã¤ã³ã¹ãã¼ã«
+ ã»http://www.arduino.org/ ãããã¦ã³ã­ã¼ããã¦ã¤ã³ã¹ãã¼ã«ï¼
+ ã»ã¤ã³ã¹ãã¼ã©ã«å¾ã£ã¦ã¤ã³ã¹ãã¼ã«ãå®æ½ããï¼
+
+Arduino IDE ã®ã¤ã³ã¹ãã¼ã«ãã¹ã®è¨­å®
+ ã»C:\Program Files (x86)\Arduino ã«ã¤ã³ã¹ãã¼ã«ããå ´åã¯å¿
+è¦ãªã
+ ã»ã¤ã³ã¹ãã¼ã«ãã¦ãã©ã«ããä»¥ä¸ã®ãã¡ã¤ã«ã«è¨­å®ãã
+   ã»example/do_path.bat
+     SET ARDUINO_DIR=C:\Program Files (x86)\Arduino
+   ã»asp_1.9.1/target/arduino_m0_gcc/
+     ARDUINO_BASE_DIR_WIN = C:\Program Files (x86)\Arduino
+     
+âãã«ã
+ ã»ãã©ã«ã ./example/basic ãéã
+ ã»./do_make.bat ãå®è¡
+
+âå®è¡
+ ã»ãã¼ãã®PROGRAMãã¼ãã¨USBãæ¥ç¶ããï¼
+ ã»Arduino IDEãèµ·åãã
+   ã»ãã¼ã« -> ãã¼ã -> COMx(Arduino M0 Pro (Programmmming Port)) ãé¸æï¼
+   ã»ãã¼ã« -> ã·ãªã¢ã«ã¢ãã¿ ãé¸æãã¦ã·ãªã¢ã«ã¢ãã¿ãå®è¡ããï¼
+   ã»ã·ãªã¢ã«ã¢ãã¿ã®å³ä¸ã®éåº¦ã115200bpsã«å¤æ´
+ ã»ãã©ã«ã ./example/basic ãéã
+ ã»./do_run.bat ãå®è¡
+ 
+âãããã°
+ ã»ãã©ã«ã ./example/basic ãéã
+ ã»./do_debug.bat ãå®è¡ 
+ 
+âã¯ãªã¼ã³
+ ã»ãã©ã«ã ./example/basic ãéã
+ ã»./do_clean.bat ãå®è¡ 
+ 
+ 
+âã¯ã¤ãã¯ã¹ã¿ã¼ã(ãããã¬ãã)
+
+Windowsç°å¢ã§ã®ãããã¬ããã®å®è¡æ¹æ³ã«ã¤ãã¦èª¬æããï¼
+
+âã¤ã³ã¹ãã¼ã«
+
+Atmel Studio ã®ã¤ã³ã¹ãã¼ã«
+ ã» http://www.atmel.com/ja/jp/tools/ATMELSTUDIO.aspx ãããã¦ã³ã­ã¼ããã¦ã¤ã³ã¹ãã¼ã«ï¼
+ ã»ã¤ã³ã¹ãã¼ã©ã«å¾ã£ã¦ã¤ã³ã¹ãã¼ã«ãå®æ½ããï¼
+
+âãã­ã¸ã§ã¯ããéã
+
+åãµã³ãã«ã®ãã©ã«ãä»¥ä¸ã«ããï¼
+
+\example\basic\asp.atsln
+
+ãã¿ãã«ã¯ãªãã¯ããã¨Atmel Studioãèµ·åããï¼
+
+âãã«ã
+
+ã¡ãã¥ã¼ -> Build -> Build Solution ãå®è¡
+
+âå®è¡
+
+ã¡ãã¥ã¼ -> Debug -> Start Debugging and Brake ãå®è¡
+
+ã¡ã¢ãªã«æ¸ãè¾¼ã¾ããããï¼å®è¡ãéå§ããï¼
+ãã¡ã¤ã«ã¡ãã¥ã¼ããrca_app.cpp ãé¸æãã¦ãã¬ã¼ã¯ãã¤ã³ããç½®ããã¨ã
+å¯è½ï¼
+
+
+âåä½ã¢ãã«
+
+Arduinoã©ã¤ãã©ãªãå®è¡ããããã®ã¿ã¹ã¯ã¨ãã¦ï¼ã¡ã¤ã³ã¿ã¹ã¯ã¨ã¿ã¹ã¯1,
+ã¿ã¹ã¯2,...(RCAã¿ã¹ã¯)ãç¨æãã¦ããï¼ã¡ã¤ã³ã¿ã¹ã¯ã¯å¿
+ãçæããï¼RCA
+ã¿ã¹ã¯ã¯ï¼å¹¾ã¤çæãããã¯ãã¯ã­ã§å®ç¾©å¯è½ã§ããï¼ç¾ç¶æå¤§æ°ã¯4åã§ããï¼
+
+ããããã®ã¿ã¹ã¯åã¯æ¬¡ã®éãã§ããï¼
+
+ ã¡ã¤ã³ã¿ã¹ã¯ : RCA_MAINTASK
+ ã¿ã¹ã¯1      : RCA_TASK1
+ ã¿ã¹ã¯2      : RCA_TASK2
+ ã¿ã¹ã¯3      : RCA_TASK3
+ ã¿ã¹ã¯4      : RCA_TASK4
+
+
+åã¿ã¹ã¯ã¯ï¼æ¬¡ã®é¢æ°ãå®è¡ããï¼ãããã®é¢æ°ã®æ¬ä½ãè¨è¿°ããï¼
+
+ ã¡ã¤ã³ã¿ã¹ã¯ : setup/loop
+ ã¿ã¹ã¯1      : task1_setup/task2_loop
+ ã¿ã¹ã¯2      : task2_setup/task2_loop
+ ã¿ã¹ã¯3      : task3_setup/task3_loop
+ ã¿ã¹ã¯4      : task4_setup/task4_loop 
+ 
+åsetup/loopã®æ¯ãèãã¯Arduinoã¨åç­ã§ããï¼
+ 
+âã¹ã±ã¸ã¥ã¼ãªã³ã°
+
+åºæ¬çã«ã¯åªå
+åº¦ãã¼ã¹ã®ã¹ã±ã¸ã¥ã¼ã«ã§ããï¼
+
+åã¿ã¹ã¯ã®setupå®è¡æ(èµ·åæ)ã¨loopå®è¡æã®åªå
+åº¦ããããããã¯ã­ã§æ
+å®å¯è½ã§ããï¼
+
+ãªãã·ã§ã³ã§ã©ã¦ã³ãã­ãã³ã¹ã±ã¸ã¥ã¼ãªã³ã°ãé¸æå¯è½ã§ããï¼ã©ã¦ã³ãã­
+ãã³ã®å¨æã¨ã©ã¦ã³ãã­ãã³ã®å¯¾è±¡ã¨ããåªå
+åº¦ããã¯ã­ã§æå®å¯è½ã§ããï¼
+ 
+âã©ã¤ãã©ãª
+
+æ¬¡ã®ã©ã¤ãã©ãªã¯åä½ç¢ºèªæ¸ã¿ã§ãã
+
+ã³ã¢ã©ã¤ãã©ãª
+
+ã³ã¢ã©ã¤ãã©ãªã¯å¸¸ã«ã³ã³ãã¤ã«&ãªã³ã¯ãããï¼
+
+  ã»PWM
+  ã»digitalå
+¥åºå    
+  ã»delay
+  ã»analogå
+¥åºå
+  ã»attachInterrupt()
+     noInterrupt() : Primaskãä½¿ç¨ãã¦ããããåé¡ãªã
+   ã»USB Uart  
+   ã»Tone
+   
+ãã®ä»ã®ã©ã¤ãã©ãª
+
+æ¬¡ã®ã©ã¤ãã©ãªã¯ä½¿ç¨ããå ´åã¯Makefileã§åãã¯ã­ãtrueã«å®ç¾©ãããã¨ï¼
+
+  ã»SPI : USE_ARDUINO_SPI
+  ã»SD  : USE_ARDUINO_SD
+  ã»TFT : USE_ARDUINO_TFT
+  ã»RTC : USE_ARDUINO_RTC
+  ã»I2C : USE_ARDUINO_WIRE  
+  ã»ETHERNET2 : USE_ETHERNET2 
+  ã»NAXESMOTION : USE_NAXESMOTION
+  ã»NCESCAN : USE_NCESCAN
+    
+æ¬¡ã®ã©ã¤ãã©ãªã¯åä½æªç¢ºèªã§ããï¼
+
+âãã¡ã¤ã«
+./lib         
+  ã»RCAé¢é£ã®ã©ã¤ãã©ãª
+./example      
+  ã»RCAã®ãµã³ãã«
+./arduino_lib
+  ã»Arduino IDEä»å±ã®ã©ã¤ãã©ãª(ãããæ¸ã¿)
+  ã»ãã£ã¬ã¯ããªæ§æã¯ãªãªã¸ãã«ã¨åç­ã ãä»¥ä¸ã®ãã©ã«ãã¯å¿
+è¦ãªãã®ã§åé¤ãã¦ããï¼   
+  ./hardware/arduino/avr
+  ./hardware/arduino/sam
+  ./hardware/arduino/samd/bootloaders 
+  ./tools/avr
+  ./tools/gcc-arm-none-eabi-4.8.3-2014q1
+  ./tools/OpenOCD-0.9.0-arduino
+  ./tools/CMSIS/CMSIS_RTX
+  ./tools/CMSIS/CMSIS/Driver
+  ./tools/CMSIS/CMSIS/DSP_Lib
+  ./tools/CMSIS/CMSIS/Lib
+  ./tools/CMSIS/CMSIS/RTOS  
+  ./tools/CMSIS/CMSIS/SVD
+  ./tools/CMSIS/CMSIS/UserCodeTemplates  
+  ./tools/CMSIS/Device/ARM
+  ./tools/CMSIS/Device/ATMEL/samd21 ä»¥å¤
+./libraries
+    ä»¥ä¸ã®ãã©ã«ãã¯å¿
+è¦ç¡ãã®ã§åé¤ãã¦ãã
+    ./Ethernet
+    ./Scheduler
+    ./SpacebrewYun
+    ./WiFi
+    ä»¥ä¸ã®ãã¡ã¤ã«ãè¿½å ãã¦ãã
+    ./ESP8266 
+      ä¸è¨ã§å
+¬éããã¦ããã³ã¼ãããã¼ã¹ã«M0ã«å¯¾å¿   
+      https://github.com/itead/ITEADLIB_Arduino_WeeESP8266
+    ./NcesCan 
+     ã»Seeedã®2015/11/08çããã¼ã¹ã«APIãå¤æ´
+       https://github.com/Seeed-Studio/CAN_BUS_Shield       
+./asp_1.9.2
+  ã»ASPã«ã¼ãã«ã®ã½ã¼ã¹ã³ã¼ã
+      
+âãµã³ãã«ãã­ã°ã©ã 
+./basic
+ ã»Arduinoã®åºæ¬çãªãã­ã°ã©ã ã®è©°ãåããï¼
+ ã»ã½ã¼ã¹ã®å
+é ­ã®ifdefã§å®è¡ãããã­ã°ã©ã ãé¸æããï¼
+./multi_task
+ ã»ãã«ãã¿ã¹ã¯ã®ãµã³ãã«ï¼
+./NAxesMotion
+ ã»9è»¸ã¢ã¼ã·ã§ã³ã·ã¼ã«ãã®ãµã³ãã«ï¼
+./NCESCan
+ ã»NCES CAN ã·ã¼ã«ãã®ãµã³ãã«ï¼
+./rr_scheduling
+ ã»ã©ã¦ã³ãã­ãã³ã¹ã±ã¸ã¥ã¼ãªã³ã°ã®ãµã³ãã«ï¼
+./TFTBitmapLogo
+ ã»Arduino TFT LCD Screen ã¸ã®ããããããè¡¨ç¤ºãµã³ãã«ï¼
+./WebServerDHCP
+ ã»Arduino ã¤ã¼ãµãããã·ã¼ã«ã2ãç¨ãããµã³ãã«ï¼
+
+âã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³é 
+ç®
+
+ârca_app.h
+
+ä»¥ä¸ã®é 
+ç®ã rca_app.h ã«è¨­å®å¯è½ã§ããï¼
+
+ã¡ã¤ã³ã¿ã¹ã¯ä»¥å¤ã®RCAã¿ã¹ã¯æ°ã®æå® : ç¾ç¶5åã¾ã§ãµãã¼ã
+ RCA_NUM_TASK : 0ï½5
+
+åªå
+åº¦ : å®ç¾©ããªãã¨åæå¤ãä½¿ç¨
+ RCA_MAINTASK_SETUP_PRI
+ RCA_MAINTASK_LOOP_PRI
+ 
+ RCA_TASK1_SETUP_PRI
+ RCA_TASK1_LOOP_PRI 
+ ...
+ 
+ã¹ã¿ãã¯ : å®ç¾©ããªãã¨åæå¤ãä½¿ç¨
+ RCA_MAINTASK_STACK_SIZE
+ 
+ RCA_TASK1_STACK_SIZE
+ ... 
+
+ã¹ã±ã¸ã¥ã¼ãªã³ã° : 
+ RCA_RR_SCEDULE : 
+  ãããæå®ããåªå
+åº¦(0ã¯ç¡è¦)ãã©ã¦ã³ãã­ãã³ã¹ã±ã¸ã¥ã¼ãªã³ã°ãã
+ RCA_RR_SCEDULE_CYCLE : ã©ã¦ã³ãã­ãã³ã¹ã±ã¸ã¥ã¼ãªã³ã°ã®å¨æ
+ 
+âMakefile
+
+ä»¥ä¸ã®é 
+ç®ãæå®å¯è½ã§ããï¼
+
+ARDUINO_SERIAL
+ã·ãªã¢ã«(Serial)ã®æ±ããè¨­å®ä»¥ä¸ã®ããããã«å®ç¾©
+NOUSE_SERIAL : Serialã¯ä½¿ç¨ããªãï¼syslog/logtaskãä½¿ç¨ããåºåãå¯è½ï¼
+USE_SERIAL   : Serialãä½¿ç¨ããï¼logtaskã¯ä½¿ç¨ããªãï¼syslogã¯ä½ã¬ãã«
+               åºåã¨ãªãï¼
+      
+âArduinoã©ã¤ãã©ãªã¸ã®ããã : å¯¾è±¡ IDE 1.7.8
+
+âãã°
+./hardware/arduino/samd/cores/arduino/USB/samd21_device.c : 152è¡ç® ã¡ã¢ãªãªã¼ã¯
+
+ 	for (i = 0; i < sizeof(usb_endpoint_table)/4; i++) {
+ 		(*(uint32_t *)((uint32_t *)(&usb_endpoint_table[0])+i)) = 0;
+ 	}
+ 
+arduino/samd/variants/arduino_zero/variant.h : 68è¡ç®  å®ç¾©ãã¹
+#define portOutputRegister(port)   ( &(port->OUT.reg) )
+#define portInputRegister(port)    ( &(port->IN.reg) )
+
+libraries\TFT\src\utility\ããã¤ãã®ãã¡ã¤ã«
+ARDUINO_ARCH_SAM -> ARDUINO_ARCH_SAD
+glcdfont.c:1:#ifndef ARDUINO_ARCH_SAMD
+Adafruit_ST7735.cpp:334:#if defined(ARDUINO_ARCH_SAMD)
+Adafruit_ST7735.h:138: #if defined(ARDUINO_ARCH_SAMD)
+
+libraries\NAxesMotion\NAxisMotion.h : 139è¡ç®
+M0ã®æã¯ã¢ãã¬ã¹ãå¤æ´ããï¼ããã«ã·ã¼ã«ãã®ADRESSã®ã¸ã£ã³ããå¤ã
+ 
+#if defined(ARDUINO_ARCH_SAMD)
+	void initSensor(unsigned int address = 0x29);
+#else /* !defined(ARDUINO_ARCH_SAMD) */    
+	void initSensor(unsigned int address = 0x28);
+#endif /* defined(ARDUINO_ARCH_SAMD) */    
+
+âTOPPERSå¯¾å¿
+/hardware/tools/CMSIS/CMSIS/Include/core_cm0plus.h : 646è¡ç®
+å²è¾¼ã¿ç¦æ­¢ã»è¨±å¯ãAPIãå¼ã³åºãããã«å¤æ´
+
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+//  NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+    extern void rca_ena_int(uint32_t intno);
+    rca_ena_int(IRQn);
+}
+
+
+/** \brief  Disable External Interrupt
+
+    The function disables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+//  NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+    extern void rca_dis_int(uint32_t intno);
+    rca_dis_int(IRQn);
+}
+
+âæ©è½è¿½å 
+
+Serial3ã®è¿½å  
+SERCOM2ãä½¿ç¨
+ãã³
+ 5 : RX
+ 4 : TX 
+http://ehbtj.com/electronics/arduino-m0-hacks
+
+âæ¬ããã±ã¼ã¸ã®åç§°
+
+Aruduinoã®ã¬ã¤ãã©ã¤ã³(https://www.arduino.cc/en/Main/FAQ)ã§ã¯ï¼
+
+Arduino Xxxxxx      : NG
+Xxxxxx for Arduino  : OK
+
+ã¨ããï¼Arduinoã¨ã®é¢ä¿ãåããæ¸ãæ¹ãªãåé¡ãªãã¨ã®ãã¨ï¼
+
+TOPPERS RTE/RTOS Compatible with Arduino libraries  : RCA
+
+ä»¥ä¸ï¼
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/boards.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/boards.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/boards.txt	(revision 136)
@@ -0,0 +1,95 @@
+#ARDUINO M0 PRO (WITH) BOOTLOADER - PROGRAMMING PORT
+arduino_zero_pro_bl_dbg.name=Arduino M0 Pro (Programming Port)
+arduino_zero_pro_bl_dbg.vid.0=0x03eb
+arduino_zero_pro_bl_dbg.pid.0=0x2111
+arduino_zero_pro_bl_dbg.upload.tool=openocd
+arduino_zero_pro_bl_dbg.upload.protocol=sam-ba
+arduino_zero_pro_bl_dbg.upload.maximum_size=262144
+arduino_zero_pro_bl_dbg.upload.use_1200bps_touch=false
+arduino_zero_pro_bl_dbg.upload.wait_for_upload_port=false
+arduino_zero_pro_bl_dbg.upload.native_usb=false
+arduino_zero_pro_bl_dbg.build.mcu=cortex-m0plus
+arduino_zero_pro_bl_dbg.build.f_cpu=48000000L
+arduino_zero_pro_bl_dbg.build.usb_product="Arduino M0 Pro"
+arduino_zero_pro_bl_dbg.build.board=SAM_ZERO
+arduino_zero_pro_bl_dbg.build.core=arduino
+arduino_zero_pro_bl_dbg.build.extra_flags=-D__SAMD21G18A__ -mthumb {build.usb_flags}
+arduino_zero_pro_bl_dbg.build.ldscript=linker_scripts/gcc/flash_with_bootloader.ld
+arduino_zero_pro_bl_dbg.build.openocdscript=openocd_scripts/arduino_zero.cfg
+arduino_zero_pro_bl_dbg.build.variant=arduino_zero
+arduino_zero_pro_bl_dbg.build.variant_system_lib=
+arduino_zero_pro_bl_dbg.build.vid=0x2a03
+arduino_zero_pro_bl_dbg.build.pid=0x804f
+arduino_zero_pro_bl_dbg.build.section.start=0x4000
+
+arduino_zero_pro_bl_dbg.bootloader.tool=openocd
+arduino_zero_pro_bl_dbg.bootloader.cmd_unprotect=at91samd bootloader 0
+arduino_zero_pro_bl_dbg.bootloader.cmd_protect=at91samd bootloader 16384
+arduino_zero_pro_bl_dbg.bootloader.cmd_protect_verify=at91samd bootloader
+arduino_zero_pro_bl_dbg.bootloader.file=zero/Bootloader_D21_M0_Pro_150427.hex
+
+#ARDUINO M0 PRO (WITH) BOOTLOADER - NATIVE PORT
+arduino_zero_pro_bl.name=Arduino M0 Pro (Native USB Port)
+arduino_zero_pro_bl.vid.0=0x2a03
+arduino_zero_pro_bl.pid.0=0x004d
+arduino_zero_pro_bl.vid.1=0x2a03
+arduino_zero_pro_bl.pid.1=0x804d
+arduino_zero_pro_bl.vid.2=0x2a03
+arduino_zero_pro_bl.pid.2=0x004f
+arduino_zero_pro_bl.vid.3=0x2a03
+arduino_zero_pro_bl.pid.3=0x804f
+arduino_zero_pro_bl.upload.tool=avrdude
+arduino_zero_pro_bl.upload.protocol=stk500v2
+arduino_zero_pro_bl.upload.maximum_size=262144
+arduino_zero_pro_bl.upload.use_1200bps_touch=true
+arduino_zero_pro_bl.upload.wait_for_upload_port=true
+arduino_zero_pro_bl.upload.native_usb=true
+arduino_zero_pro_bl.upload.speed=57600
+arduino_zero_pro_bl.build.mcu=cortex-m0plus
+arduino_zero_pro_bl.build.f_cpu=48000000L
+arduino_zero_pro_bl.build.usb_product="Arduino M0 Pro"
+arduino_zero_pro_bl.build.board=SAM_ZERO
+arduino_zero_pro_bl.build.core=arduino
+arduino_zero_pro_bl.build.extra_flags=-D__SAMD21G18A__ -mthumb {build.usb_flags}
+arduino_zero_pro_bl.build.ldscript=linker_scripts/gcc/flash_with_bootloader.ld
+arduino_zero_pro_bl.build.variant=arduino_zero
+arduino_zero_pro_bl.build.variant_system_lib=
+arduino_zero_pro_bl.build.vid=0x2a03
+arduino_zero_pro_bl.build.pid=0x804f
+arduino_zero_pro_bl.build.section.start=0x4000
+arduino_zero_pro_bl.build.emu.mcu=atmega2560
+arduino_zero_pro_bl.bootloader.tool=avrdude
+arduino_zero_pro_bl.bootloader.low_fuses=0xff
+
+#ARDUINO M0 (WITH) BOOTLOADER
+arduino_zero_bl.name=Arduino M0
+arduino_zero_bl.vid.0=0x2a03
+arduino_zero_bl.pid.0=0x004d
+arduino_zero_bl.vid.1=0x2a03
+arduino_zero_bl.pid.1=0x804d
+arduino_zero_bl.vid.2=0x2a03
+arduino_zero_bl.pid.2=0x004e
+arduino_zero_bl.vid.3=0x2a03
+arduino_zero_bl.pid.3=0x804e
+arduino_zero_bl.upload.tool=avrdude
+arduino_zero_bl.upload.protocol=stk500v2
+arduino_zero_bl.upload.maximum_size=262144
+arduino_zero_bl.upload.use_1200bps_touch=true
+arduino_zero_bl.upload.wait_for_upload_port=true
+arduino_zero_bl.upload.native_usb=true
+arduino_zero_bl.upload.speed=57600
+arduino_zero_bl.build.mcu=cortex-m0plus
+arduino_zero_bl.build.f_cpu=48000000L
+arduino_zero_bl.build.usb_product="Arduino M0"
+arduino_zero_bl.build.board=SAM_ZERO
+arduino_zero_bl.build.core=arduino
+arduino_zero_bl.build.extra_flags=-D__SAMD21G18A__ -mthumb {build.usb_flags}
+arduino_zero_bl.build.ldscript=linker_scripts/gcc/flash_with_bootloader.ld
+arduino_zero_bl.build.variant=arduino_zero
+arduino_zero_bl.build.variant_system_lib=
+arduino_zero_bl.build.vid=0x2a03
+arduino_zero_bl.build.pid=0x804e
+arduino_zero_bl.build.section.start=0x4000
+arduino_zero_bl.build.emu.mcu=atmega2560
+arduino_zero_bl.bootloader.tool=avrdude
+arduino_zero_bl.bootloader.low_fuses=0xff
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Arduino.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Arduino.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Arduino.h	(revision 136)
@@ -0,0 +1,88 @@
+/*
+  Arduino.h - Main include file for the Arduino SDK
+  Copyright (c) 2005-2013 Arduino Team.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef Arduino_h
+#define Arduino_h
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <math.h>
+
+// some libraries and sketches depend on this AVR stuff,
+// assuming Arduino.h or WProgram.h automatically includes it...
+//
+#include "avr/pgmspace.h"
+#include "avr/interrupt.h"
+
+#include "binary.h"
+#include "itoa.h"
+
+#ifdef __cplusplus
+extern "C"{
+#endif // __cplusplus
+
+// Include Atmel headers
+#include "sam.h"
+
+#include "wiring_constants.h"
+
+#define clockCyclesPerMicrosecond() ( SystemCoreClock / 1000000L )
+#define clockCyclesToMicroseconds(a) ( ((a) * 1000L) / (SystemCoreClock / 1000L) )
+#define microsecondsToClockCycles(a) ( (a) * (SystemCoreClock / 1000000L) )
+
+void yield( void ) ;
+
+/* sketch */
+void setup( void ) ;
+void loop( void ) ;
+
+#include "WVariant.h"
+
+#ifdef __cplusplus
+} // extern "C"
+#endif // __cplusplus
+
+// The following headers are for C++ only compilation
+#ifdef __cplusplus
+  #include "WCharacter.h"
+  #include "WString.h"
+  #include "Tone.h"
+  #include "WMath.h"
+  #include "HardwareSerial.h"
+  #include "wiring_pulse.h"
+  #include "delay.h"
+  #include "Uart.h"
+#endif // __cplusplus
+
+// Include board variant
+#include "variant.h"
+
+#include "wiring.h"
+#include "wiring_digital.h"
+#include "wiring_analog.h"
+#include "wiring_shift.h"
+#include "WInterrupts.h"
+
+// USB Device
+#include "USB/USBDesc.h"
+#include "USB/USBCore.h"
+#include "USB/USBAPI.h"
+
+#endif // Arduino_h
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Client.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Client.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Client.h	(revision 136)
@@ -0,0 +1,45 @@
+/*
+  Client.h - Base class that provides Client
+  Copyright (c) 2011 Adrian McEwen.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef client_h
+#define client_h
+#include "Print.h"
+#include "Stream.h"
+#include "IPAddress.h"
+
+class Client : public Stream {
+
+public:
+  virtual int connect(IPAddress ip, uint16_t port) =0;
+  virtual int connect(const char *host, uint16_t port) =0;
+  virtual size_t write(uint8_t) =0;
+  virtual size_t write(const uint8_t *buf, size_t size) =0;
+  virtual int available() = 0;
+  virtual int read() = 0;
+  virtual int read(uint8_t *buf, size_t size) = 0;
+  virtual int peek() = 0;
+  virtual void flush() = 0;
+  virtual void stop() = 0;
+  virtual uint8_t connected() = 0;
+  virtual operator bool() = 0;
+protected:
+  uint8_t* rawIPAddress(IPAddress& addr) { return addr.raw_address(); };
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/HOWTO_compiling_a_project_with_GCC.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/HOWTO_compiling_a_project_with_GCC.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/HOWTO_compiling_a_project_with_GCC.txt	(revision 136)
@@ -0,0 +1,41 @@
+1- Prerequesites
+
+ARM GCC toolchain from https://launchpad.net/gcc-arm-embedded/+download
+
+*Windows only*
+
+GNU Make from http://gnuwin32.sourceforge.net/packages/make.htm
+  Binaries http://gnuwin32.sourceforge.net/downlinks/make-bin-zip.php
+	Dependencies http://gnuwin32.sourceforge.net/downlinks/make-dep-zip.php
+
+GNU rm from http://gnuwin32.sourceforge.net/packages/coreutils.htm
+  Binaries http://gnuwin32.sourceforge.net/downlinks/coreutils-bin-zip.php
+
+*MacOS*
+
+*Linux*
+
+
+2- Path to GCC ARM toolchain and Make
+
+Set into environment variables the ARM_GCC_TOOLCHAIN variable:
+ex:
+ARM_GCC_TOOLCHAIN=C:\GNU Tools ARM Embedded_4.8 2013q4\bin
+
+Add to PATH the path were Make has been installed
+
+3- Compile test application
+
+Go to hardware/arduino/samd/cores/arduino/validation/build_gcc
+
+run the command: 'make'
+
+This will compile the test application and deliver the binary into:
+
+hardware/arduino/samd/cores/arduino/validation/debug_arduino_zero/test_gcc_dbg.elf
+hardware/arduino/samd/cores/arduino/validation/debug_arduino_zero/test_gcc_dbg.bin
+hardware/arduino/samd/cores/arduino/validation/debug_arduino_zero/test_gcc_dbg.map (mapping matching linker script)
+hardware/arduino/samd/cores/arduino/validation/debug_arduino_zero/test_gcc_dbg.elf.txt (result of nm)
+
+
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/HardwareSerial.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/HardwareSerial.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/HardwareSerial.h	(revision 136)
@@ -0,0 +1,83 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef HardwareSerial_h
+#define HardwareSerial_h
+
+#include <inttypes.h>
+
+#include "Stream.h"
+
+#define HARDSER_PARITY_EVEN (0x1ul)
+#define HARDSER_PARITY_ODD	(0x2ul)
+#define HARDSER_PARITY_NONE (0x3ul)
+#define HARDSER_PARITY_MASK	(0xFul)
+
+#define HARDSER_STOP_BIT_1		(0x10ul)
+#define HARDSER_STOP_BIT_1_5	(0x20ul)
+#define HARDSER_STOP_BIT_2	 	(0x30ul)
+#define HARDSER_STOP_BIT_MASK	(0xF0ul)
+
+#define HARDSER_DATA_5	 	(0x100ul)
+#define HARDSER_DATA_6	 	(0x200ul)
+#define HARDSER_DATA_7	 	(0x300ul)
+#define HARDSER_DATA_8	 	(0x400ul)
+#define HARDSER_DATA_MASK	(0xF00ul)
+
+#define SERIAL_5N1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_NONE | HARDSER_DATA_5)
+#define SERIAL_6N1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_NONE | HARDSER_DATA_6)
+#define SERIAL_7N1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_NONE | HARDSER_DATA_7)
+#define SERIAL_8N1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_NONE | HARDSER_DATA_8) 
+#define SERIAL_5N2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_NONE | HARDSER_DATA_5) 
+#define SERIAL_6N2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_NONE | HARDSER_DATA_6) 
+#define SERIAL_7N2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_NONE | HARDSER_DATA_7)
+#define SERIAL_8N2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_NONE | HARDSER_DATA_8)
+#define SERIAL_5E1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_EVEN | HARDSER_DATA_5)
+#define SERIAL_6E1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_EVEN | HARDSER_DATA_6)
+#define SERIAL_7E1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_EVEN | HARDSER_DATA_7)
+#define SERIAL_8E1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_EVEN | HARDSER_DATA_8)
+#define SERIAL_5E2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_EVEN | HARDSER_DATA_5)
+#define SERIAL_6E2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_EVEN | HARDSER_DATA_6)
+#define SERIAL_7E2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_EVEN | HARDSER_DATA_7)
+#define SERIAL_8E2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_EVEN | HARDSER_DATA_8)
+#define SERIAL_5O1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_ODD  | HARDSER_DATA_5)
+#define SERIAL_6O1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_ODD  | HARDSER_DATA_6)
+#define SERIAL_7O1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_ODD  | HARDSER_DATA_7)
+#define SERIAL_8O1	(HARDSER_STOP_BIT_1 | HARDSER_PARITY_ODD  | HARDSER_DATA_8)
+#define SERIAL_5O2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_ODD  | HARDSER_DATA_5)
+#define SERIAL_6O2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_ODD  | HARDSER_DATA_6)
+#define SERIAL_7O2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_ODD  | HARDSER_DATA_7)
+#define SERIAL_8O2	(HARDSER_STOP_BIT_2 | HARDSER_PARITY_ODD  | HARDSER_DATA_8)
+
+class HardwareSerial : public Stream
+{
+  public:
+    virtual void begin(unsigned long);
+    virtual void end();
+    virtual int available(void) = 0;
+    virtual int peek(void) = 0;
+    virtual int read(void) = 0;
+    virtual void flush(void) = 0;
+    virtual size_t write(uint8_t) = 0;
+    using Print::write; // pull in write(str) and write(buf, size) from Print
+    virtual operator bool() = 0;
+};
+
+extern void serialEventRun(void) __attribute__((weak));
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/IPAddress.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/IPAddress.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/IPAddress.cpp	(revision 136)
@@ -0,0 +1,74 @@
+/*
+  IPAddress.cpp - Base class that provides IPAddress
+  Copyright (c) 2011 Adrian McEwen.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include <Arduino.h>
+#include <IPAddress.h>
+
+IPAddress::IPAddress()
+{
+    memset(_address, 0, sizeof(_address));
+}
+
+IPAddress::IPAddress(uint8_t first_octet, uint8_t second_octet, uint8_t third_octet, uint8_t fourth_octet)
+{
+    _address[0] = first_octet;
+    _address[1] = second_octet;
+    _address[2] = third_octet;
+    _address[3] = fourth_octet;
+}
+
+IPAddress::IPAddress(uint32_t address)
+{
+    memcpy(_address, &address, sizeof(_address));
+}
+
+IPAddress::IPAddress(const uint8_t *address)
+{
+    memcpy(_address, address, sizeof(_address));
+}
+
+IPAddress& IPAddress::operator=(const uint8_t *address)
+{
+    memcpy(_address, address, sizeof(_address));
+    return *this;
+}
+
+IPAddress& IPAddress::operator=(uint32_t address)
+{
+    memcpy(_address, (const uint8_t *)&address, sizeof(_address));
+    return *this;
+}
+
+bool IPAddress::operator==(const uint8_t* addr) const
+{
+    return memcmp(addr, _address, sizeof(_address)) == 0;
+}
+
+size_t IPAddress::printTo(Print& p) const
+{
+    size_t n = 0;
+    for (int i =0; i < 3; i++)
+    {
+        n += p.print(_address[i], DEC);
+        n += p.print('.');
+    }
+    n += p.print(_address[3], DEC);
+    return n;
+}
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/IPAddress.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/IPAddress.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/IPAddress.h	(revision 136)
@@ -0,0 +1,70 @@
+/*
+  IPAddress.h - Base class that provides IPAddress
+  Copyright (c) 2011 Adrian McEwen.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef IPAddress_h
+#define IPAddress_h
+
+#include <Printable.h>
+
+// A class to make it easier to handle and pass around IP addresses
+
+class IPAddress : public Printable {
+private:
+    uint8_t _address[4];  // IPv4 address
+    // Access the raw byte array containing the address.  Because this returns a pointer
+    // to the internal structure rather than a copy of the address this function should only
+    // be used when you know that the usage of the returned uint8_t* will be transient and not
+    // stored.
+    uint8_t* raw_address() { return _address; };
+
+public:
+    // Constructors
+    IPAddress();
+    IPAddress(uint8_t first_octet, uint8_t second_octet, uint8_t third_octet, uint8_t fourth_octet);
+    IPAddress(uint32_t address);
+    IPAddress(const uint8_t *address);
+
+    // Overloaded cast operator to allow IPAddress objects to be used where a pointer
+    // to a four-byte uint8_t array is expected
+    operator uint32_t() const { return *((uint32_t*)_address+0); };
+    bool operator==(const IPAddress& addr) const { return (*((uint32_t*)_address)) == (*((uint32_t*)addr._address)); };
+    bool operator==(const uint8_t* addr) const;
+
+    // Overloaded index operator to allow getting and setting individual octets of the address
+    uint8_t operator[](int index) const { return _address[index]; };
+    uint8_t& operator[](int index) { return _address[index]; };
+
+    // Overloaded copy operators to allow initialisation of IPAddress objects from other types
+    IPAddress& operator=(const uint8_t *address);
+    IPAddress& operator=(uint32_t address);
+
+    virtual size_t printTo(Print& p) const;
+
+    friend class EthernetClass;
+    friend class UDP;
+    friend class Client;
+    friend class Server;
+    friend class DhcpClass;
+    friend class DNSClient;
+};
+
+const IPAddress INADDR_NONE(0,0,0,0);
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Print.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Print.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Print.cpp	(revision 136)
@@ -0,0 +1,256 @@
+/*
+ Print.cpp - Base class that provides print() and println()
+ Copyright (c) 2008 David A. Mellis.  All right reserved.
+ 
+ This library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+ 
+ This library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ Lesser General Public License for more details.
+ 
+ You should have received a copy of the GNU Lesser General Public
+ License along with this library; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ 
+ Modified 23 November 2006 by David A. Mellis
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <math.h>
+#include "Arduino.h"
+#include "Print.h"
+
+// Public Methods //////////////////////////////////////////////////////////////
+
+/* default implementation: may be overridden */
+size_t Print::write(const uint8_t *buffer, size_t size)
+{
+  size_t n = 0;
+  while (size--) {
+    n += write(*buffer++);
+  }
+  return n;
+}
+
+size_t Print::print(const __FlashStringHelper *ifsh)
+{
+  return print(reinterpret_cast<const char *>(ifsh));
+}
+
+size_t Print::print(const String &s)
+{
+  return write(s.c_str(), s.length());
+}
+
+size_t Print::print(const char str[])
+{
+  return write(str);
+}
+
+size_t Print::print(char c)
+{
+  return write(c);
+}
+
+size_t Print::print(unsigned char b, int base)
+{
+  return print((unsigned long) b, base);
+}
+
+size_t Print::print(int n, int base)
+{
+  return print((long) n, base);
+}
+
+size_t Print::print(unsigned int n, int base)
+{
+  return print((unsigned long) n, base);
+}
+
+size_t Print::print(long n, int base)
+{
+  if (base == 0) {
+    return write(n);
+  } else if (base == 10) {
+    if (n < 0) {
+      int t = print('-');
+      n = -n;
+      return printNumber(n, 10) + t;
+    }
+    return printNumber(n, 10);
+  } else {
+    return printNumber(n, base);
+  }
+}
+
+size_t Print::print(unsigned long n, int base)
+{
+  if (base == 0) return write(n);
+  else return printNumber(n, base);
+}
+
+size_t Print::print(double n, int digits)
+{
+  return printFloat(n, digits);
+}
+
+size_t Print::println(const __FlashStringHelper *ifsh)
+{
+  size_t n = print(ifsh);
+  n += println();
+  return n;
+}
+
+size_t Print::print(const Printable& x)
+{
+  return x.printTo(*this);
+}
+
+size_t Print::println(void)
+{
+  size_t n = print('\r');
+  n += print('\n');
+  return n;
+}
+
+size_t Print::println(const String &s)
+{
+  size_t n = print(s);
+  n += println();
+  return n;
+}
+
+size_t Print::println(const char c[])
+{
+  size_t n = print(c);
+  n += println();
+  return n;
+}
+
+size_t Print::println(char c)
+{
+  size_t n = print(c);
+  n += println();
+  return n;
+}
+
+size_t Print::println(unsigned char b, int base)
+{
+  size_t n = print(b, base);
+  n += println();
+  return n;
+}
+
+size_t Print::println(int num, int base)
+{
+  size_t n = print(num, base);
+  n += println();
+  return n;
+}
+
+size_t Print::println(unsigned int num, int base)
+{
+  size_t n = print(num, base);
+  n += println();
+  return n;
+}
+
+size_t Print::println(long num, int base)
+{
+  size_t n = print(num, base);
+  n += println();
+  return n;
+}
+
+size_t Print::println(unsigned long num, int base)
+{
+  size_t n = print(num, base);
+  n += println();
+  return n;
+}
+
+size_t Print::println(double num, int digits)
+{
+  size_t n = print(num, digits);
+  n += println();
+  return n;
+}
+
+size_t Print::println(const Printable& x)
+{
+  size_t n = print(x);
+  n += println();
+  return n;
+}
+
+// Private Methods /////////////////////////////////////////////////////////////
+
+size_t Print::printNumber(unsigned long n, uint8_t base) {
+  char buf[8 * sizeof(long) + 1]; // Assumes 8-bit chars plus zero byte.
+  char *str = &buf[sizeof(buf) - 1];
+
+  *str = '\0';
+
+  // prevent crash if called with base == 1
+  if (base < 2) base = 10;
+
+  do {
+    unsigned long m = n;
+    n /= base;
+    char c = m - base * n;
+    *--str = c < 10 ? c + '0' : c + 'A' - 10;
+  } while(n);
+
+  return write(str);
+}
+
+size_t Print::printFloat(double number, uint8_t digits) 
+{ 
+  size_t n = 0;
+  
+  if (isnan(number)) return print("nan");
+  if (isinf(number)) return print("inf");
+  if (number > 4294967040.0) return print ("ovf");  // constant determined empirically
+  if (number <-4294967040.0) return print ("ovf");  // constant determined empirically
+  
+  // Handle negative numbers
+  if (number < 0.0)
+  {
+     n += print('-');
+     number = -number;
+  }
+
+  // Round correctly so that print(1.999, 2) prints as "2.00"
+  double rounding = 0.5;
+  for (uint8_t i=0; i<digits; ++i)
+    rounding /= 10.0;
+  
+  number += rounding;
+
+  // Extract the integer part of the number and print it
+  unsigned long int_part = (unsigned long)number;
+  double remainder = number - (double)int_part;
+  n += print(int_part);
+
+  // Print the decimal point, but only if there are digits beyond
+  if (digits > 0) {
+    n += print("."); 
+  }
+
+  // Extract digits from the remainder one at a time
+  while (digits-- > 0)
+  {
+    remainder *= 10.0;
+    int toPrint = int(remainder);
+    n += print(toPrint);
+    remainder -= toPrint; 
+  } 
+  
+  return n;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Print.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Print.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Print.h	(revision 136)
@@ -0,0 +1,84 @@
+/*
+  Print.h - Base class that provides print() and println()
+  Copyright (c) 2008 David A. Mellis.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef Print_h
+#define Print_h
+
+#include <inttypes.h>
+#include <stdio.h>
+
+#include "WString.h"
+#include "Printable.h"
+
+#define DEC 10
+#define HEX 16
+#define OCT 8
+#define BIN 2
+
+class Print
+{
+  private:
+    int write_error;
+    size_t printNumber(unsigned long, uint8_t);
+    size_t printFloat(double, uint8_t);
+  protected:
+    void setWriteError(int err = 1) { write_error = err; }
+  public:
+    Print() : write_error(0) {}
+  
+    int getWriteError() { return write_error; }
+    void clearWriteError() { setWriteError(0); }
+  
+    virtual size_t write(uint8_t) = 0;
+    size_t write(const char *str) {
+      if (str == NULL) return 0;
+      return write((const uint8_t *)str, strlen(str));
+    }
+    virtual size_t write(const uint8_t *buffer, size_t size);
+    size_t write(const char *buffer, size_t size) {
+      return write((const uint8_t *)buffer, size);
+    }
+    
+    size_t print(const __FlashStringHelper *);
+    size_t print(const String &);
+    size_t print(const char[]);
+    size_t print(char);
+    size_t print(unsigned char, int = DEC);
+    size_t print(int, int = DEC);
+    size_t print(unsigned int, int = DEC);
+    size_t print(long, int = DEC);
+    size_t print(unsigned long, int = DEC);
+    size_t print(double, int = 2);
+    size_t print(const Printable&);
+
+    size_t println(const __FlashStringHelper *);
+    size_t println(const String &s);
+    size_t println(const char[]);
+    size_t println(char);
+    size_t println(unsigned char, int = DEC);
+    size_t println(int, int = DEC);
+    size_t println(unsigned int, int = DEC);
+    size_t println(long, int = DEC);
+    size_t println(unsigned long, int = DEC);
+    size_t println(double, int = 2);
+    size_t println(const Printable&);
+    size_t println(void);
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Printable.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Printable.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Printable.h	(revision 136)
@@ -0,0 +1,40 @@
+/*
+  Printable.h - Interface class that allows printing of complex types
+  Copyright (c) 2011 Adrian McEwen.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef Printable_h
+#define Printable_h
+
+#include <stdlib.h>
+
+class Print;
+
+/** The Printable class provides a way for new classes to allow themselves to be printed.
+    By deriving from Printable and implementing the printTo method, it will then be possible
+    for users to print out instances of this class by passing them into the usual
+    Print::print and Print::println methods.
+*/
+
+class Printable
+{
+  public:
+    virtual size_t printTo(Print& p) const = 0;
+};
+
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Reset.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Reset.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Reset.cpp	(revision 136)
@@ -0,0 +1,61 @@
+/*
+  Copyright (c) 2012 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include <Arduino.h>
+#include "Reset.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+__attribute__ ((long_call, section (".ramfunc")))
+static void banzai() {
+    // Disable all interrupts
+    __disable_irq();
+
+  	WDT->CONFIG.bit.PER = 0x0; //8 clock cycles period for WDT
+	WDT->CTRL.reg |= WDT_CTRL_ENABLE; //enable watchdog
+	while(1)
+	{
+		//wait for WDT
+	}
+	while (true);
+}
+
+static int ticks = -1;
+
+void initiateReset(int _ticks) {
+	ticks = _ticks;
+	banzai();
+}
+
+void cancelReset() {
+	ticks = -1;
+}
+
+void tickReset() {
+	if (ticks == -1)
+		return;
+	ticks--;
+	if (ticks == 0)
+		banzai();
+}
+
+#ifdef __cplusplus
+}
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Reset.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Reset.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Reset.h	(revision 136)
@@ -0,0 +1,34 @@
+/*
+  Copyright (c) 2012 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef RESET_H
+#define RESET_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void initiateReset(int ms);
+void tickReset();
+void cancelReset();
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/RingBuffer.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/RingBuffer.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/RingBuffer.cpp	(revision 136)
@@ -0,0 +1,86 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "RingBuffer.h"
+#include <string.h>
+
+RingBuffer::RingBuffer( void )
+{
+    memset( _aucBuffer, 0, SERIAL_BUFFER_SIZE ) ;
+    clear();
+}
+
+void RingBuffer::store_char( uint8_t c )
+{
+  int i = nextIndex(_iHead);
+
+  // if we should be storing the received character into the location
+  // just before the tail (meaning that the head would advance to the
+  // current location of the tail), we're about to overflow the buffer
+  // and so we don't write the character or advance the head.
+  if ( i != _iTail )
+  {
+    _aucBuffer[_iHead] = c ;
+    _iHead = i ;
+  }
+}
+
+void RingBuffer::clear()
+{
+	_iHead = 0;
+	_iTail = 0;
+}
+
+int RingBuffer::read_char()
+{
+	if(_iTail == _iHead)
+		return -1;
+
+	uint8_t value = _aucBuffer[_iTail];
+	_iTail = nextIndex(_iTail);
+
+	return value;
+}
+
+int RingBuffer::available()
+{
+	int delta = _iHead - _iTail;
+
+	if(delta < 0)
+		return SERIAL_BUFFER_SIZE + delta;
+	else
+		return delta;
+}
+
+int RingBuffer::peek()
+{
+	if(_iTail == _iHead)
+		return -1;
+
+	return _aucBuffer[_iTail];
+}
+
+int RingBuffer::nextIndex(int index)
+{
+	return (uint32_t)(index + 1) % SERIAL_BUFFER_SIZE;
+}
+
+bool RingBuffer::isFull()
+{
+	return (nextIndex(_iHead) == _iTail);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/RingBuffer.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/RingBuffer.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/RingBuffer.h	(revision 136)
@@ -0,0 +1,50 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _RING_BUFFER_
+#define _RING_BUFFER_
+
+#include <stdint.h>
+
+// Define constants and variables for buffering incoming serial data.  We're
+// using a ring buffer (I think), in which head is the index of the location
+// to which to write the next incoming character and tail is the index of the
+// location from which to read.
+#define SERIAL_BUFFER_SIZE 64
+
+class RingBuffer
+{
+  public:
+    uint8_t _aucBuffer[SERIAL_BUFFER_SIZE] ;
+    int _iHead ;
+    int _iTail ;
+
+  public:
+    RingBuffer( void ) ;
+    void store_char( uint8_t c ) ;
+	void clear();
+	int read_char();
+	int available();
+	int peek();
+	bool isFull();
+	
+  private:
+	int nextIndex(int index);
+} ;
+
+#endif /* _RING_BUFFER_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/SERCOM.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/SERCOM.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/SERCOM.cpp	(revision 136)
@@ -0,0 +1,622 @@
+#include "SERCOM.h"
+#include "variant.h"
+
+SERCOM::SERCOM(Sercom* s)
+{
+	sercom = s;
+}
+
+/* 	=========================
+ *	===== Sercom UART
+ *	=========================
+*/
+void SERCOM::initUART(SercomUartMode mode, SercomUartSampleRate sampleRate, uint32_t baudrate)
+{
+  resetUART();
+  initClockNVIC();
+
+  //Setting the CTRLA register
+  sercom->USART.CTRLA.reg =	SERCOM_USART_CTRLA_MODE(mode) |
+                SERCOM_USART_CTRLA_SAMPR(sampleRate);
+
+  //Setting the Interrupt register
+  sercom->USART.INTENSET.reg =	SERCOM_USART_INTENSET_RXC |  //Received complete
+                                SERCOM_USART_INTENSET_ERROR; //All others errors
+
+  if ( mode == UART_INT_CLOCK )
+  {
+    uint16_t sampleRateValue ;
+
+    if ( sampleRate == SAMPLE_RATE_x16 )
+    {
+      sampleRateValue = 16 ;
+    }
+    else
+    {
+      if ( sampleRate == SAMPLE_RATE_x8 )
+      {
+        sampleRateValue = 8 ;
+      }
+      else
+      {
+        sampleRateValue = 3 ;
+      }
+    }
+
+    // Asynchronous arithmetic mode
+    // 65535 * ( 1 - sampleRateValue * baudrate / SystemCoreClock);
+    // 65535 - 65535 * (sampleRateValue * baudrate / SystemCoreClock));
+    sercom->USART.BAUD.reg = 65535.0f * ( 1.0f - (float)(sampleRateValue) * (float)(baudrate) / (float)(SystemCoreClock));
+  }
+}
+void SERCOM::initFrame(SercomUartCharSize charSize, SercomDataOrder dataOrder, SercomParityMode parityMode, SercomNumberStopBit nbStopBits)
+{
+	//Setting the CTRLA register
+	sercom->USART.CTRLA.reg |=	SERCOM_USART_CTRLA_FORM( (parityMode == SERCOM_NO_PARITY ? 0 : 1) ) |
+								dataOrder << SERCOM_USART_CTRLA_DORD_Pos;
+
+	//Setting the CTRLB register
+	sercom->USART.CTRLB.reg |=	SERCOM_USART_CTRLB_CHSIZE(charSize) |
+								nbStopBits << SERCOM_USART_CTRLB_SBMODE_Pos |
+								(parityMode == SERCOM_NO_PARITY ? 0 : parityMode) << SERCOM_USART_CTRLB_PMODE_Pos; //If no parity use default value
+}
+
+void SERCOM::initPads(SercomUartTXPad txPad, SercomRXPad rxPad)
+{
+	//Setting the CTRLA register
+	sercom->USART.CTRLA.reg |=	SERCOM_USART_CTRLA_TXPO(txPad) |
+								SERCOM_USART_CTRLA_RXPO(rxPad);
+
+  // Enable Transceiver and Receiver
+  sercom->USART.CTRLB.reg |= SERCOM_USART_CTRLB_TXEN | SERCOM_USART_CTRLB_RXEN ;
+}
+
+void SERCOM::resetUART()
+{
+  // Start the Software Reset
+  sercom->USART.CTRLA.bit.SWRST = 1 ;
+
+  while ( sercom->USART.CTRLA.bit.SWRST || sercom->USART.SYNCBUSY.bit.SWRST )
+  {
+    // Wait for both bits Software Reset from CTRLA and SYNCBUSY coming back to 0
+  }
+}
+
+void SERCOM::enableUART()
+{
+	//Setting  the enable bit to 1
+	sercom->USART.CTRLA.bit.ENABLE = 0x1u;
+
+	//Wait for then enable bit from SYNCBUSY is equal to 0;
+	while(sercom->USART.SYNCBUSY.bit.ENABLE);
+}
+
+void SERCOM::flushUART()
+{
+	// Wait for transmission to complete
+	while(sercom->USART.INTFLAG.bit.DRE != SERCOM_USART_INTFLAG_DRE);
+}
+
+void SERCOM::clearStatusUART()
+{
+	//Reset (with 0) the STATUS register
+	sercom->USART.STATUS.reg = SERCOM_USART_STATUS_RESETVALUE;
+}
+
+bool SERCOM::availableDataUART()
+{
+	//RXC : Receive Complete
+	return sercom->USART.INTFLAG.bit.RXC;
+}
+
+bool SERCOM::isBufferOverflowErrorUART()
+{
+	//BUFOVF : Buffer Overflow
+	return sercom->USART.STATUS.bit.BUFOVF;
+}
+
+bool SERCOM::isFrameErrorUART()
+{
+	//FERR : Frame Error
+	return sercom->USART.STATUS.bit.FERR;
+}
+
+bool SERCOM::isParityErrorUART()
+{
+	//PERR : Parity Error
+	return sercom->USART.STATUS.bit.PERR;
+}
+
+bool SERCOM::isDataRegisterEmptyUART()
+{
+	//DRE : Data Register Empty
+	return sercom->USART.INTFLAG.bit.DRE;
+}
+
+uint8_t SERCOM::readDataUART()
+{
+	return sercom->USART.DATA.bit.DATA;
+}
+
+int SERCOM::writeDataUART(uint8_t data)
+{
+	//Flush UART buffer
+	flushUART();
+
+	//Put data into DATA register
+	sercom->USART.DATA.reg = (uint16_t)data;
+	return 1;
+}
+
+/*	=========================
+ *	===== Sercom SPI
+ *	=========================
+*/
+void SERCOM::initSPI(SercomSpiTXPad mosi, SercomRXPad miso, SercomSpiCharSize charSize, SercomDataOrder dataOrder)
+{
+	resetSPI();
+	initClockNVIC();
+
+	//Setting the CTRLA register
+	sercom->SPI.CTRLA.reg =	SERCOM_SPI_CTRLA_MODE_SPI_MASTER |
+							            SERCOM_SPI_CTRLA_DOPO(mosi) |
+							            SERCOM_SPI_CTRLA_DIPO(miso) |
+							            dataOrder << SERCOM_SPI_CTRLA_DORD_Pos;
+
+	//Setting the CTRLB register
+	sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(charSize) |
+							            SERCOM_SPI_CTRLB_RXEN;	//Active the SPI receiver.
+
+
+}
+
+void SERCOM::initSPIClock(SercomSpiClockMode clockMode, uint32_t baudrate)
+{
+	//Extract data from clockMode
+	int cpha, cpol;
+
+	if((clockMode & (0x1ul)) == 0 )
+		cpha = 0;
+	else
+		cpha = 1;
+
+	if((clockMode & (0x2ul)) == 0)
+		cpol = 0;
+	else
+		cpol = 1;
+
+	//Setting the CTRLA register
+	sercom->SPI.CTRLA.reg |=	( cpha << SERCOM_SPI_CTRLA_CPHA_Pos ) |
+								            ( cpol << SERCOM_SPI_CTRLA_CPOL_Pos );
+
+	//Synchronous arithmetic
+	sercom->SPI.BAUD.reg = calculateBaudrateSynchronous(baudrate);
+}
+
+void SERCOM::resetSPI()
+{
+	//Setting the Software Reset bit to 1
+	sercom->SPI.CTRLA.bit.SWRST = 1;
+
+	//Wait both bits Software Reset from CTRLA and SYNCBUSY are equal to 0
+	while(sercom->SPI.CTRLA.bit.SWRST || sercom->SPI.SYNCBUSY.bit.SWRST);
+}
+
+void SERCOM::enableSPI()
+{
+	//Setting the enable bit to 1
+	sercom->SPI.CTRLA.bit.ENABLE = 1;
+
+	while(sercom->SPI.SYNCBUSY.bit.ENABLE)
+  {
+    //Waiting then enable bit from SYNCBUSY is equal to 0;
+  }
+}
+
+void SERCOM::disableSPI()
+{
+	//Setting the enable bit to 0
+	sercom->SPI.CTRLA.bit.ENABLE = 0;
+
+	while(sercom->SPI.SYNCBUSY.bit.ENABLE)
+  {
+    //Waiting then enable bit from SYNCBUSY is equal to 0;
+  }
+}
+
+void SERCOM::setDataOrderSPI(SercomDataOrder dataOrder)
+{
+	//Register enable-protected
+	disableSPI();
+
+	sercom->SPI.CTRLA.bit.DORD = dataOrder;
+
+	enableSPI();
+}
+
+void SERCOM::setBaudrateSPI(uint8_t divider)
+{
+	//Can't divide by 0
+	if(divider == 0)
+		return;
+
+	//Register enable-protected
+	disableSPI();
+
+	sercom->SPI.BAUD.reg = calculateBaudrateSynchronous( SERCOM_FREQ_REF / divider );
+
+	enableSPI();
+}
+
+void SERCOM::setClockModeSPI(SercomSpiClockMode clockMode)
+{
+	int cpha, cpol;
+	if((clockMode & (0x1ul)) == 0)
+		cpha = 0;
+	else
+		cpha = 1;
+
+	if((clockMode & (0x2ul)) == 0)
+		cpol = 0;
+	else
+		cpol = 1;
+
+	//Register enable-protected
+	disableSPI();
+
+	sercom->SPI.CTRLA.bit.CPOL = cpol;
+	sercom->SPI.CTRLA.bit.CPHA = cpha;
+
+	enableSPI();
+}
+void SERCOM::writeDataSPI(uint8_t data)
+{
+  while( sercom->SPI.INTFLAG.bit.DRE == 0 )
+  {
+    // Waiting Data Registry Empty
+  }
+
+	sercom->SPI.DATA.bit.DATA = data; // Writing data into Data register
+
+  while( sercom->SPI.INTFLAG.bit.TXC == 0 || sercom->SPI.INTFLAG.bit.DRE == 0 )
+  {
+    // Waiting Complete Transmission
+  }
+}
+
+uint16_t SERCOM::readDataSPI()
+{
+  while( sercom->SPI.INTFLAG.bit.DRE == 0 || sercom->SPI.INTFLAG.bit.RXC == 0 )
+  {
+    // Waiting Complete Reception
+  }
+
+	return sercom->SPI.DATA.bit.DATA;  // Reading data
+}
+
+bool SERCOM::isBufferOverflowErrorSPI()
+{
+	return sercom->SPI.STATUS.bit.BUFOVF;
+}
+
+bool SERCOM::isDataRegisterEmptySPI()
+{
+	//DRE : Data Register Empty
+	return sercom->SPI.INTFLAG.bit.DRE;
+}
+
+uint8_t SERCOM::calculateBaudrateSynchronous(uint32_t baudrate)
+{
+	return SERCOM_FREQ_REF / (2 * baudrate) - 1;
+}
+
+
+/*	=========================
+ *	===== Sercom WIRE
+ *	=========================
+*/
+
+void SERCOM::resetWIRE()
+{
+	//I2CM OR I2CS, no matter SWRST is the same bit.
+
+	//Setting the Software bit to 1
+	sercom->I2CM.CTRLA.bit.SWRST = 1;
+
+	//Wait both bits Software Reset from CTRLA and SYNCBUSY are equal to 0
+	while(sercom->I2CM.CTRLA.bit.SWRST || sercom->I2CM.SYNCBUSY.bit.SWRST);
+}
+
+void SERCOM::enableWIRE()
+{
+  // I2C Master and Slave modes share the ENABLE bit function.
+
+  // Enable the I²C master mode
+  sercom->I2CM.CTRLA.bit.ENABLE = 1 ;
+
+  while ( sercom->I2CM.SYNCBUSY.bit.ENABLE != 0 )
+  {
+    // Waiting the enable bit from SYNCBUSY is equal to 0;
+  }
+
+  // Setting bus idle mode
+  sercom->I2CM.STATUS.bit.BUSSTATE = 1 ;
+
+  while ( sercom->I2CM.SYNCBUSY.bit.SYSOP != 0 )
+  {
+    // Wait the SYSOP bit from SYNCBUSY coming back to 0
+  }
+}
+
+void SERCOM::disableWIRE()
+{
+  // I2C Master and Slave modes share the ENABLE bit function.
+
+  // Enable the I²C master mode
+  sercom->I2CM.CTRLA.bit.ENABLE = 0 ;
+
+  while ( sercom->I2CM.SYNCBUSY.bit.ENABLE != 0 )
+  {
+    // Waiting the enable bit from SYNCBUSY is equal to 0;
+  }
+}
+
+void SERCOM::initSlaveWIRE( uint8_t ucAddress )
+{
+  // Initialize the peripheral clock and interruption
+  initClockNVIC() ;
+  resetWIRE() ;
+
+  // Set slave mode
+  sercom->I2CS.CTRLA.bit.MODE = I2C_SLAVE_OPERATION ;
+
+  // Enable Quick Command
+  sercom->I2CM.CTRLB.bit.QCEN = 1 ;
+
+  sercom->I2CS.ADDR.reg = SERCOM_I2CS_ADDR_ADDR( ucAddress & 0x7Ful ) | // 0x7F, select only 7 bits
+                          SERCOM_I2CS_ADDR_ADDRMASK( 0x3FFul ) ;        // 0x3FF all bits set
+
+  // Set the interrupt register
+  sercom->I2CS.INTENSET.reg = SERCOM_I2CS_INTENSET_AMATCH |             // Address Match
+                              SERCOM_I2CS_INTENSET_DRDY ;               // Data Ready
+
+  while ( sercom->I2CM.SYNCBUSY.bit.SYSOP != 0 )
+  {
+    // Wait the SYSOP bit from SYNCBUSY to come back to 0
+  }
+}
+
+void SERCOM::initMasterWIRE( uint32_t baudrate )
+{
+  // Initialize the peripheral clock and interruption
+  initClockNVIC() ;
+
+  resetWIRE() ;
+
+  // Set master mode and enable SCL Clock Stretch mode (stretch after ACK bit)
+  sercom->I2CM.CTRLA.reg =  SERCOM_I2CM_CTRLA_MODE( I2C_MASTER_OPERATION );
+
+  // Enable Smart mode and Quick Command
+
+  // Enable all interrupts
+
+  // Synchronous arithmetic baudrate
+  sercom->I2CM.BAUD.bit.BAUD = SystemCoreClock / ( 2 * baudrate) - 1 ;
+}
+
+void SERCOM::prepareNackBitWIRE( void )
+{
+  // Send a NACK
+  sercom->I2CM.CTRLB.bit.ACKACT = 1;
+}
+
+void SERCOM::prepareAckBitWIRE( void )
+{
+  // Send an ACK
+  sercom->I2CM.CTRLB.bit.ACKACT = 0;
+}
+
+void SERCOM::prepareCommandBitsWire(SercomMasterCommandWire cmd)
+{
+  sercom->I2CM.CTRLB.bit.CMD = cmd;
+
+  while(sercom->I2CM.SYNCBUSY.bit.SYSOP)
+  {
+    // Waiting for synchronization
+  }
+}
+
+bool SERCOM::startTransmissionWIRE(uint8_t address, SercomWireReadWriteFlag flag)
+{
+  // 7-bits address + 1-bits R/W
+  address = (address << 0x1ul) | flag;
+
+  // Wait idle bus mode
+  while ( !isBusIdleWIRE() );
+
+  // Send start and address
+  sercom->I2CM.ADDR.bit.ADDR = address;
+
+  // Address Transmitted
+  if ( flag == WIRE_WRITE_FLAG ) // Write mode
+  {
+    while( !sercom->I2CM.INTFLAG.bit.MB )
+    {
+      // Wait transmission complete
+    }
+  }
+  else  // Read mode
+  {
+    while( !sercom->I2CM.INTFLAG.bit.SB )
+    {
+      // Wait transmission complete
+    }
+
+    // Clean the 'Slave on Bus' flag, for further usage.
+    //sercom->I2CM.INTFLAG.bit.SB = 0x1ul;
+  }
+
+
+  //ACK received (0: ACK, 1: NACK)
+  if(sercom->I2CM.STATUS.bit.RXNACK)
+  {
+    return false;
+  }
+  else
+  {
+    return true;
+  }
+}
+
+bool SERCOM::sendDataMasterWIRE(uint8_t data)
+{
+	//Send data
+	sercom->I2CM.DATA.bit.DATA = data;
+
+	//Wait transmission successful
+	while(!sercom->I2CM.INTFLAG.bit.MB);
+
+	//Problems on line? nack received?
+	if(sercom->I2CM.STATUS.bit.RXNACK)
+		return false;
+	else
+		return true;
+}
+
+bool SERCOM::sendDataSlaveWIRE(uint8_t data)
+{
+	//Send data
+	sercom->I2CS.DATA.bit.DATA = data;
+
+	//Wait data transmission successful
+	while(!sercom->I2CS.INTFLAG.bit.DRDY);
+
+	//Problems on line? nack received?
+	if(sercom->I2CS.STATUS.bit.RXNACK)
+		return false;
+	else
+		return true;
+}
+
+bool SERCOM::isMasterWIRE( void )
+{
+	return sercom->I2CS.CTRLA.bit.MODE == I2C_MASTER_OPERATION;
+}
+
+bool SERCOM::isSlaveWIRE( void )
+{
+	return sercom->I2CS.CTRLA.bit.MODE == I2C_SLAVE_OPERATION;
+}
+
+bool SERCOM::isBusIdleWIRE( void )
+{
+	return sercom->I2CM.STATUS.bit.BUSSTATE == WIRE_IDLE_STATE;
+}
+
+bool SERCOM::isDataReadyWIRE( void )
+{
+	return sercom->I2CS.INTFLAG.bit.DRDY;
+}
+
+bool SERCOM::isStopDetectedWIRE( void )
+{
+	return sercom->I2CS.INTFLAG.bit.PREC;
+}
+
+bool SERCOM::isRestartDetectedWIRE( void )
+{
+	return sercom->I2CS.STATUS.bit.SR;
+}
+
+bool SERCOM::isAddressMatch( void )
+{
+	return sercom->I2CS.INTFLAG.bit.AMATCH;
+}
+
+bool SERCOM::isMasterReadOperationWIRE( void )
+{
+  return sercom->I2CS.STATUS.bit.DIR;
+}
+
+bool SERCOM::isRXNackReceivedWIRE( void )
+{
+  return sercom->I2CM.STATUS.bit.RXNACK;
+}
+
+int SERCOM::availableWIRE( void )
+{
+	if(isMasterWIRE())
+		return sercom->I2CM.INTFLAG.bit.SB;
+	else
+		return sercom->I2CS.INTFLAG.bit.DRDY;
+}
+
+uint8_t SERCOM::readDataWIRE( void )
+{
+  if(isMasterWIRE())
+  {
+    while( sercom->I2CM.INTFLAG.bit.SB == 0 )
+    {
+      // Waiting complete receive
+    }
+
+    return sercom->I2CM.DATA.bit.DATA ;
+  }
+  else
+  {
+    return sercom->I2CS.DATA.reg ;
+  }
+}
+
+
+void SERCOM::initClockNVIC( void )
+{
+	uint8_t clockId = 0;
+	IRQn_Type IdNvic;
+
+	if(sercom == SERCOM0)
+	{
+		clockId = GCM_SERCOM0_CORE;
+		IdNvic = SERCOM0_IRQn;
+	}
+	else if(sercom == SERCOM1)
+	{
+		clockId = GCM_SERCOM1_CORE;
+		IdNvic = SERCOM1_IRQn;
+	}
+	else if(sercom == SERCOM2)
+	{
+		clockId = GCM_SERCOM2_CORE;
+		IdNvic = SERCOM2_IRQn;
+	}
+	else if(sercom == SERCOM3)
+	{
+		clockId = GCM_SERCOM3_CORE;
+		IdNvic = SERCOM3_IRQn;
+	}
+	else if(sercom == SERCOM4)
+	{
+		clockId = GCM_SERCOM4_CORE;
+		IdNvic = SERCOM4_IRQn;
+	}
+	else if(sercom == SERCOM5)
+	{
+		clockId = GCM_SERCOM5_CORE;
+		IdNvic = SERCOM5_IRQn;
+	}
+
+	// Setting NVIC
+	NVIC_EnableIRQ(IdNvic);
+	NVIC_SetPriority (IdNvic, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority */
+
+	//Setting clock
+	GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( clockId ) |       // Generic Clock 0 (SERCOMx)
+						          GCLK_CLKCTRL_GEN_GCLK0 | // Generic Clock Generator 0 is source
+						          GCLK_CLKCTRL_CLKEN ;
+
+	while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
+	{
+		/* Wait for synchronization */
+	}
+
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/SERCOM.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/SERCOM.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/SERCOM.h	(revision 136)
@@ -0,0 +1,196 @@
+#ifndef _SERCOM_CLASS_
+#define _SERCOM_CLASS_
+
+#include "sam.h"
+
+#define SERCOM_FREQ_REF 48000000
+
+typedef enum
+{
+	UART_EXT_CLOCK = 0,
+	UART_INT_CLOCK = 0x1u
+} SercomUartMode;
+
+typedef enum
+{
+	SPI_SLAVE_OPERATION = 0x2u,
+	SPI_MASTER_OPERATION = 0x3u
+} SercomSpiMode;
+
+typedef enum
+{
+	I2C_SLAVE_OPERATION = 0x4u,
+	I2C_MASTER_OPERATION = 0x5u
+} SercomI2CMode;
+
+typedef enum
+{
+	SERCOM_EVEN_PARITY = 0,
+	SERCOM_ODD_PARITY,
+	SERCOM_NO_PARITY
+} SercomParityMode;
+
+typedef enum
+{
+	SERCOM_STOP_BIT_1 = 0,
+	SERCOM_STOP_BITS_2
+} SercomNumberStopBit;
+
+typedef enum
+{
+	MSB_FIRST = 0,
+	LSB_FIRST
+} SercomDataOrder;
+
+typedef enum
+{
+	UART_CHAR_SIZE_8_BITS = 0,
+	UART_CHAR_SIZE_9_BITS,
+	UART_CHAR_SIZE_5_BITS = 0x5u,
+	UART_CHAR_SIZE_6_BITS,
+	UART_CHAR_SIZE_7_BITS
+} SercomUartCharSize;
+
+typedef enum
+{
+	SERCOM_RX_PAD_0 = 0,
+	SERCOM_RX_PAD_1,
+	SERCOM_RX_PAD_2,
+	SERCOM_RX_PAD_3
+} SercomRXPad;
+
+typedef enum
+{
+	UART_TX_PAD_0 = 0x0ul,	//Only for UART
+	UART_TX_PAD_2 = 0x1ul,  //Only for UART
+} SercomUartTXPad;
+
+typedef enum
+{
+	SAMPLE_RATE_x16 = 0,	//Arithmetic
+	SAMPLE_RATE_x8 = 0x2,	//Arithmetic
+	SAMPLE_RATE_x3 = 0x3	//Arithmetic
+} SercomUartSampleRate;
+
+typedef enum
+{
+	SERCOM_SPI_MODE_0 = 0,	// CPOL : 0  | CPHA : 0
+	SERCOM_SPI_MODE_1,		// CPOL : 0  | CPHA : 1
+	SERCOM_SPI_MODE_2,		// CPOL : 1  | CPHA : 0
+	SERCOM_SPI_MODE_3		// CPOL : 1  | CPHA : 1
+} SercomSpiClockMode;
+
+typedef enum
+{
+	SPI_PAD_0_SCK_1 = 0,
+	SPI_PAD_2_SCK_3,
+	SPI_PAD_3_SCK_1,
+	SPI_PAD_0_SCK_3
+} SercomSpiTXPad;
+
+typedef enum
+{
+	SPI_CHAR_SIZE_8_BITS = 0x0ul,
+	SPI_CHAR_SIZE_9_BITS
+} SercomSpiCharSize;
+
+typedef enum
+{
+	WIRE_UNKNOWN_STATE = 0x0ul,
+	WIRE_IDLE_STATE,
+	WIRE_OWNER_STATE,
+	WIRE_BUSY_STATE
+} SercomWireBusState;
+
+typedef enum
+{
+	WIRE_WRITE_FLAG = 0x0ul,
+	WIRE_READ_FLAG
+} SercomWireReadWriteFlag;
+
+typedef enum
+{
+	WIRE_MASTER_ACT_NO_ACTION = 0,
+	WIRE_MASTER_ACT_REPEAT_START,
+	WIRE_MASTER_ACT_READ,
+	WIRE_MASTER_ACT_STOP
+} SercomMasterCommandWire;
+
+typedef enum
+{
+	WIRE_MASTER_ACK_ACTION = 0,
+	WIRE_MASTER_NACK_ACTION
+} SercomMasterAckActionWire;
+
+class SERCOM
+{
+	public:
+		SERCOM(Sercom* s) ;
+
+		/* ========== UART ========== */
+		void initUART(SercomUartMode mode, SercomUartSampleRate sampleRate, uint32_t baudrate=0) ;
+		void initFrame(SercomUartCharSize charSize, SercomDataOrder dataOrder, SercomParityMode parityMode, SercomNumberStopBit nbStopBits) ;
+		void initPads(SercomUartTXPad txPad, SercomRXPad rxPad) ;
+
+		void resetUART( void ) ;
+		void enableUART( void ) ;
+		void flushUART( void ) ;
+		void clearStatusUART( void ) ;
+		bool availableDataUART( void ) ;
+		bool isBufferOverflowErrorUART( void ) ;
+		bool isFrameErrorUART( void ) ;
+		bool isParityErrorUART( void ) ;
+		bool isDataRegisterEmptyUART( void ) ;
+		uint8_t readDataUART( void ) ;
+		int writeDataUART(uint8_t data) ;
+
+		/* ========== SPI ========== */
+		void initSPI(SercomSpiTXPad mosi, SercomRXPad miso, SercomSpiCharSize charSize, SercomDataOrder dataOrder) ;
+		void initSPIClock(SercomSpiClockMode clockMode, uint32_t baudrate) ;
+
+		void resetSPI( void ) ;
+		void enableSPI( void ) ;
+		void disableSPI( void ) ;
+		void setDataOrderSPI(SercomDataOrder dataOrder) ;
+		void setBaudrateSPI(uint8_t divider) ;
+		void setClockModeSPI(SercomSpiClockMode clockMode) ;
+		void writeDataSPI(uint8_t data) ;
+		uint16_t readDataSPI( void ) ;
+		bool isBufferOverflowErrorSPI( void ) ;
+		bool isDataRegisterEmptySPI( void ) ;
+		bool isTransmitCompleteSPI( void ) ;
+		bool isReceiveCompleteSPI( void ) ;
+
+		/* ========== WIRE ========== */
+		void initSlaveWIRE(uint8_t address) ;
+		void initMasterWIRE(uint32_t baudrate) ;
+
+		void resetWIRE( void ) ;
+		void enableWIRE( void ) ;
+        void disableWIRE( void );
+        void prepareNackBitWIRE( void ) ;
+        void prepareAckBitWIRE( void ) ;
+        void prepareCommandBitsWire(SercomMasterCommandWire cmd);
+		bool startTransmissionWIRE(uint8_t address, SercomWireReadWriteFlag flag) ;
+		bool sendDataMasterWIRE(uint8_t data) ;
+		bool sendDataSlaveWIRE(uint8_t data) ;
+		bool isMasterWIRE( void ) ;
+		bool isSlaveWIRE( void ) ;
+		bool isBusIdleWIRE( void ) ;
+		bool isDataReadyWIRE( void ) ;
+		bool isStopDetectedWIRE( void ) ;
+		bool isRestartDetectedWIRE( void ) ;
+		bool isAddressMatch( void ) ;
+		bool isMasterReadOperationWIRE( void ) ;
+        bool isRXNackReceivedWIRE( void ) ;
+		int availableWIRE( void ) ;
+		uint8_t readDataWIRE( void ) ;
+
+	private:
+		Sercom* sercom;
+		uint8_t calculateBaudrateSynchronous(uint32_t baudrate) ;
+		uint32_t division(uint32_t dividend, uint32_t divisor) ;
+		void initClockNVIC( void ) ;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Server.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Server.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Server.h	(revision 136)
@@ -0,0 +1,28 @@
+/*
+  Server.h - Base class that provides Server
+  Copyright (c) 2011 Adrian McEwen.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef server_h
+#define server_h
+
+class Server : public Print {
+public:
+  virtual void begin() =0;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Stream.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Stream.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Stream.cpp	(revision 136)
@@ -0,0 +1,269 @@
+/*
+ Stream.cpp - adds parsing methods to Stream class
+ Copyright (c) 2008 David A. Mellis.  All right reserved.
+
+ This library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ This library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with this library; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+ Created July 2011
+ parsing functions based on TextFinder library by Michael Margolis
+ */
+
+#include "Arduino.h"
+#include "Stream.h"
+
+#define PARSE_TIMEOUT 1000  // default number of milli-seconds to wait
+#define NO_SKIP_CHAR  1  // a magic char not found in a valid ASCII numeric field
+
+// private method to read stream with timeout
+int Stream::timedRead()
+{
+  int c;
+  _startMillis = millis();
+  do {
+    c = read();
+    if (c >= 0) return c;
+  } while(millis() - _startMillis < _timeout);
+  return -1;     // -1 indicates timeout
+}
+
+// private method to peek stream with timeout
+int Stream::timedPeek()
+{
+  int c;
+  _startMillis = millis();
+  do {
+    c = peek();
+    if (c >= 0) return c;
+  } while(millis() - _startMillis < _timeout);
+  return -1;     // -1 indicates timeout
+}
+
+// returns peek of the next digit in the stream or -1 if timeout
+// discards non-numeric characters
+int Stream::peekNextDigit()
+{
+  int c;
+  while (1) {
+    c = timedPeek();
+    if (c < 0) return c;  // timeout
+    if (c == '-') return c;
+    if (c >= '0' && c <= '9') return c;
+    read();  // discard non-numeric
+  }
+}
+
+// Public Methods
+//////////////////////////////////////////////////////////////
+
+void Stream::setTimeout(unsigned long timeout)  // sets the maximum number of milliseconds to wait
+{
+  _timeout = timeout;
+}
+
+ // find returns true if the target string is found
+bool  Stream::find(char *target)
+{
+  return findUntil(target, "");
+}
+
+// reads data from the stream until the target string of given length is found
+// returns true if target string is found, false if timed out
+bool Stream::find(char *target, size_t length)
+{
+  return findUntil(target, length, NULL, 0);
+}
+
+// as find but search ends if the terminator string is found
+bool  Stream::findUntil(char *target, char *terminator)
+{
+  return findUntil(target, strlen(target), terminator, strlen(terminator));
+}
+
+// reads data from the stream until the target string of the given length is found
+// search terminated if the terminator string is found
+// returns true if target string is found, false if terminated or timed out
+bool Stream::findUntil(char *target, size_t targetLen, char *terminator, size_t termLen)
+{
+  size_t index = 0;  // maximum target string length is 64k bytes!
+  size_t termIndex = 0;
+  int c;
+  
+  if( *target == 0)
+    return true;   // return true if target is a null string
+  while( (c = timedRead()) > 0){
+    
+    if(c != target[index])
+      index = 0; // reset index if any char does not match
+    
+    if( c == target[index]){
+      if(++index >= targetLen){ // return true if all chars in the target match
+        return true;
+      }
+    }
+    
+    if(termLen > 0 && c == terminator[termIndex]){
+      if(++termIndex >= termLen)
+        return false;       // return false if terminate string found before target string
+    }
+    else
+      termIndex = 0;
+  }
+  return false;
+}
+
+
+// returns the first valid (long) integer value from the current position.
+// initial characters that are not digits (or the minus sign) are skipped
+// function is terminated by the first character that is not a digit.
+long Stream::parseInt()
+{
+  return parseInt(NO_SKIP_CHAR); // terminate on first non-digit character (or timeout)
+}
+
+// as above but a given skipChar is ignored
+// this allows format characters (typically commas) in values to be ignored
+long Stream::parseInt(char skipChar)
+{
+  boolean isNegative = false;
+  long value = 0;
+  int c;
+
+  c = peekNextDigit();
+  // ignore non numeric leading characters
+  if(c < 0)
+    return 0; // zero returned if timeout
+
+  do{
+    if(c == skipChar)
+      ; // ignore this charactor
+    else if(c == '-')
+      isNegative = true;
+    else if(c >= '0' && c <= '9')        // is c a digit?
+      value = value * 10 + c - '0';
+    read();  // consume the character we got with peek
+    c = timedPeek();
+  }
+  while( (c >= '0' && c <= '9') || c == skipChar );
+
+  if(isNegative)
+    value = -value;
+  return value;
+}
+
+
+// as parseInt but returns a floating point value
+float Stream::parseFloat()
+{
+  return parseFloat(NO_SKIP_CHAR);
+}
+
+// as above but the given skipChar is ignored
+// this allows format characters (typically commas) in values to be ignored
+float Stream::parseFloat(char skipChar){
+  boolean isNegative = false;
+  boolean isFraction = false;
+  long value = 0;
+  int c;
+  float fraction = 1.0;
+
+  c = peekNextDigit();
+    // ignore non numeric leading characters
+  if(c < 0)
+    return 0; // zero returned if timeout
+
+  do{
+    if(c == skipChar)
+      ; // ignore
+    else if(c == '-')
+      isNegative = true;
+    else if (c == '.')
+      isFraction = true;
+    else if(c >= '0' && c <= '9')  {      // is c a digit?
+      value = value * 10 + c - '0';
+      if(isFraction)
+         fraction *= 0.1;
+    }
+    read();  // consume the character we got with peek
+    c = timedPeek();
+  }
+  while( (c >= '0' && c <= '9')  || c == '.' || c == skipChar );
+
+  if(isNegative)
+    value = -value;
+  if(isFraction)
+    return value * fraction;
+  else
+    return value;
+}
+
+// read characters from stream into buffer
+// terminates if length characters have been read, or timeout (see setTimeout)
+// returns the number of characters placed in the buffer
+// the buffer is NOT null terminated.
+//
+size_t Stream::readBytes(char *buffer, size_t length)
+{
+  size_t count = 0;
+  while (count < length) {
+    int c = timedRead();
+    if (c < 0) break;
+    *buffer++ = (char)c;
+    count++;
+  }
+  return count;
+}
+
+
+// as readBytes with terminator character
+// terminates if length characters have been read, timeout, or if the terminator character  detected
+// returns the number of characters placed in the buffer (0 means no valid data found)
+
+size_t Stream::readBytesUntil(char terminator, char *buffer, size_t length)
+{
+  if (length < 1) return 0;
+  size_t index = 0;
+  while (index < length) {
+    int c = timedRead();
+    if (c < 0 || c == terminator) break;
+    *buffer++ = (char)c;
+    index++;
+  }
+  return index; // return number of characters, not including null terminator
+}
+
+String Stream::readString()
+{
+  String ret;
+  int c = timedRead();
+  while (c >= 0)
+  {
+    ret += (char)c;
+    c = timedRead();
+  }
+  return ret;
+}
+
+String Stream::readStringUntil(char terminator)
+{
+  String ret;
+  int c = timedRead();
+  while (c >= 0 && c != terminator)
+  {
+    ret += (char)c;
+    c = timedRead();
+  }
+  return ret;
+}
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Stream.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Stream.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Stream.h	(revision 136)
@@ -0,0 +1,93 @@
+/*
+  Stream.h - base class for character-based streams.
+  Copyright (c) 2010 David A. Mellis.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+  parsing functions based on TextFinder library by Michael Margolis
+*/
+
+#ifndef Stream_h
+#define Stream_h
+
+#include <inttypes.h>
+#include "Print.h"
+
+
+class Stream : public Print
+{
+  protected:
+    unsigned long _timeout;      // number of milliseconds to wait for the next char before aborting timed read
+    unsigned long _startMillis;  // used for timeout measurement
+    int timedRead();             // private method to read stream with timeout
+    int timedPeek();             // private method to peek stream with timeout
+    int peekNextDigit();         // returns the next numeric digit in the stream or -1 if timeout
+
+  public:
+    virtual int available() = 0;
+    virtual int read() = 0;
+    virtual int peek() = 0;
+    virtual void flush() = 0;
+
+    Stream() {_timeout=1000;}
+
+// parsing methods
+
+  void setTimeout(unsigned long timeout);  // sets maximum milliseconds to wait for stream data, default is 1 second
+
+  bool find(char *target);   // reads data from the stream until the target string is found
+  bool find(uint8_t *target) { return find ((char *)target); }
+  // returns true if target string is found, false if timed out (see setTimeout)
+
+  bool find(char *target, size_t length);   // reads data from the stream until the target string of given length is found
+  bool find(uint8_t *target, size_t length) { return find ((char *)target, length); }
+  // returns true if target string is found, false if timed out
+
+  bool findUntil(char *target, char *terminator);   // as find but search ends if the terminator string is found
+  bool findUntil(uint8_t *target, char *terminator) { return findUntil((char *)target, terminator); }
+
+  bool findUntil(char *target, size_t targetLen, char *terminate, size_t termLen);   // as above but search ends if the terminate string is found
+  bool findUntil(uint8_t *target, size_t targetLen, char *terminate, size_t termLen) {return findUntil((char *)target, targetLen, terminate, termLen); }
+
+
+  long parseInt(); // returns the first valid (long) integer value from the current position.
+  // initial characters that are not digits (or the minus sign) are skipped
+  // integer is terminated by the first character that is not a digit.
+
+  float parseFloat();               // float version of parseInt
+
+  size_t readBytes( char *buffer, size_t length); // read chars from stream into buffer
+  size_t readBytes( uint8_t *buffer, size_t length) { return readBytes((char *)buffer, length); }
+  // terminates if length characters have been read or timeout (see setTimeout)
+  // returns the number of characters placed in the buffer (0 means no valid data found)
+
+  size_t readBytesUntil( char terminator, char *buffer, size_t length); // as readBytes with terminator character
+  size_t readBytesUntil( char terminator, uint8_t *buffer, size_t length) { return readBytesUntil(terminator, (char *)buffer, length); }
+  // terminates if length characters have been read, timeout, or if the terminator character  detected
+  // returns the number of characters placed in the buffer (0 means no valid data found)
+
+  // Arduino String functions to be added here
+  String readString();
+  String readStringUntil(char terminator);
+
+  protected:
+  long parseInt(char skipChar); // as above but the given skipChar is ignored
+  // as above but the given skipChar is ignored
+  // this allows format characters (typically commas) in values to be ignored
+
+  float parseFloat(char skipChar);  // as above but the given skipChar is ignored
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Tone.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Tone.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Tone.cpp	(revision 136)
@@ -0,0 +1,286 @@
+/* Tone.cpp
+
+  A Tone Generator Library
+
+  Written by Brett Hagman
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+Version Modified By Date     Comments
+------- ----------- -------- --------
+0001    B Hagman    09/08/02 Initial coding
+0002    B Hagman    09/08/18 Multiple pins
+0003    B Hagman    09/08/18 Moved initialization from constructor to begin()
+0004    B Hagman    09/09/26 Fixed problems with ATmega8
+0005    B Hagman    09/11/23 Scanned prescalars for best fit on 8 bit timers
+                    09/11/25 Changed pin toggle method to XOR
+                    09/11/25 Fixed timer0 from being excluded
+0006    D Mellis    09/12/29 Replaced objects with functions
+0007    M Sproul    10/08/29 Changed #ifdefs from cpu to register
+0008    S Kanemoto  12/06/22 Fixed for Leonardo by @maris_HY
+0009    Arduino.org 15/06/30 Add M0/M0 Pro support
+*************************************************/
+
+
+#include "Tone.h"
+
+
+unsigned long int count_duration=0;
+uint8_t pin_sound=0;
+
+
+void tone(uint8_t pin, unsigned int frequency, unsigned long duration)
+{
+	
+  unsigned int tim_per=0, duty=0,presc_tc=0, presc_tcc=0;
+  double freq=0.0,div=0.0;
+  uint8_t isTC = 0 ;
+  uint8_t Channelx ;
+  Tc* TCx ;
+  Tcc* TCCx ;
+  
+  
+  if((frequency < 20) | (frequency > 25000)) return;
+  freq=frequency * 1.0;
+  
+  if(duration !=0)
+  {
+	  count_duration= 188 * duration;
+	  set_timer5();
+	  pin_sound=pin;
+  }
+  
+  switch ( g_APinDescription[pin].ulPWMChannel )  //TC or TCC selection
+    {
+      case PWM3_CH0 :
+            TCx = TC3 ;     // not work
+            Channelx = 0 ;
+            isTC = 1 ;
+      break;
+
+      case PWM3_CH1:        // not work
+            TCx = TC3 ;
+            Channelx = 1;
+            isTC = 1;
+      break;
+
+      case PWM0_CH0 :
+            TCCx = TCC0;
+            Channelx = 0;
+      break;
+
+      case PWM0_CH1 :
+            TCCx = TCC0;
+            Channelx = 1;
+      break;
+
+      case PWM0_CH4 :
+            TCCx = TCC0;
+            Channelx = 0;
+      break;
+
+      case PWM0_CH5 :
+            TCCx = TCC0;
+            Channelx = 1;
+      break;
+
+      case PWM0_CH6 :
+            TCCx = TCC0;
+            Channelx = 2;
+      break;
+
+      case PWM0_CH7 :
+            TCCx = TCC0;
+            Channelx = 3;
+      break;
+
+      case PWM1_CH0 :
+            TCCx = TCC1;
+            Channelx = 0;
+      break;
+
+      case PWM1_CH1 :
+            TCCx = TCC1;
+            Channelx = 1;
+      break;
+
+      case PWM2_CH0 :
+            TCCx = TCC2;
+            Channelx = 0;
+      break;
+
+      case PWM2_CH1 :
+            TCCx = TCC2;
+            Channelx = 1;
+      break;
+    }
+  
+  
+  switch ( GetTCNumber( g_APinDescription[pin].ulPWMChannel ) )  //clock selection using GCLK3
+    {
+      case 0: // TCC0
+        //Enable GCLK for TCC0 (timer counter input clock)
+        GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID( GCM_TCC0_TCC1 )) ;
+      break ;
+
+      case 1: // TCC1
+        //Enable GCLK for TCC1 (timer counter input clock)
+        GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID( GCM_TCC0_TCC1 )) ;
+      break ;
+
+      case 2: // TCC2
+        //Enable GCLK for TCC2 (timer counter input clock)
+        GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID( GCM_TCC2_TC3 )) ;
+      break ;
+
+      case 3: // TC3
+        //Enable GCLK for TC3 (timer counter input clock)
+        GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID( GCM_TCC2_TC3 ));
+      break ;
+
+      case 4: // TC4
+        //Enable GCLK for TC4 (timer counter input clock)
+        GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 ));
+      break ;
+
+      case 5: // TC5
+        //Enable GCLK for TC5 (timer counter input clock)
+        GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 )) ;
+      break ;
+    }
+    
+    
+    
+    
+    if((frequency >=20) & (frequency <= 100))
+  {
+    div=1024.0;
+    presc_tcc=TCC_CTRLA_PRESCALER_DIV1024;
+    presc_tc=TC_CTRLA_PRESCALER_DIV1024;
+  }  
+  else if((frequency > 100) & (frequency <= 350))
+  {
+    div=256.0;
+    presc_tcc=TCC_CTRLA_PRESCALER_DIV256;
+    presc_tc=TC_CTRLA_PRESCALER_DIV1024;
+  }
+  else if((frequency > 350) & (frequency <= 1900))
+  {
+    div=64.0;
+    presc_tcc=TCC_CTRLA_PRESCALER_DIV64;
+    presc_tc=TC_CTRLA_PRESCALER_DIV1024;
+  }
+  else if((frequency > 1900) & (frequency <= 5500))
+  {
+    div=16.0;
+    presc_tcc=TCC_CTRLA_PRESCALER_DIV16;
+    presc_tc=TC_CTRLA_PRESCALER_DIV1024;
+  }
+  else if((frequency > 5500) & (frequency <= 30000))
+  {
+    div=8.0;
+    presc_tcc=TCC_CTRLA_PRESCALER_DIV8;
+    presc_tc=TC_CTRLA_PRESCALER_DIV1024;
+  }
+  else;
+  
+  tim_per=(uint8_t)(floor((8.0e6/(2.0 * div * freq)) - 1.0));
+  duty= (uint8_t)(tim_per / 2); 
+  pinPeripheral( pin, g_APinDescription[pin].ulPinType ) ;  
+    
+    if ( isTC )
+    {
+      // -- Configure TC
+      //DISABLE TCx
+      TCx->COUNT8.CTRLA.reg &=~(TC_CTRLA_ENABLE);
+      //Set Timer counter Mode to 8 bits
+      TCx->COUNT8.CTRLA.reg |= TC_CTRLA_MODE_COUNT8;
+      TCx->COUNT8.CTRLA.reg |= presc_tc;
+      //Set TCx as normal FRQ
+      TCx->COUNT8.CTRLA.reg |= TC_CTRLA_WAVEGEN_NFRQ;
+      //Set TCx in waveform mode Normal PWM
+      TCx->COUNT8.CC[Channelx].reg = duty;
+      //Set PER to maximum counter value (resolution : 0xFF)
+      TCx->COUNT8.PER.reg = tim_per;
+      // Enable TCx
+      TCx->COUNT8.CTRLA.reg |= TC_CTRLA_ENABLE;
+    }
+    else
+    {
+      // -- Configure TCC
+
+      //DISABLE TCCx
+      TCCx->CTRLA.reg &=~(TCC_CTRLA_ENABLE);
+      TCCx->CTRLA.reg |=presc_tcc;
+      //Set TCx as normal FRQ
+      TCCx->WAVE.reg |= TCC_WAVE_WAVEGEN_NFRQ;
+      //Set TCx in waveform mode Normal PWM
+      TCCx->CC[Channelx].reg = duty;  
+      //Set PER to maximum counter value (resolution : 0xFF)
+      TCCx->PER.reg = tim_per;   
+      //ENABLE TCCx
+      TCCx->CTRLA.reg |= TCC_CTRLA_ENABLE ;
+	
+	}
+	  
+	  return;
+}
+
+
+void noTone(uint8_t pin)
+{
+	if((pin >= 2) & (pin <= 7)) TCC0->CTRLA.reg &=~(TCC_CTRLA_ENABLE);              // disable TCC0
+	else if((pin == 8) | (pin == 9)) TCC1->CTRLA.reg &=~(TCC_CTRLA_ENABLE);         // disable TCC1
+	else if ((pin == 10) | (pin ==12)) TC3->COUNT8.CTRLA.reg &=~(TC_CTRLA_ENABLE);  // disable TC3
+	else if ((pin == 11) | (pin == 13)) TCC2->CTRLA.reg &=~(TCC_CTRLA_ENABLE);      // disable TCC2
+	else;
+
+return;	
+}
+
+void set_timer5(void)
+{
+    NVIC_DisableIRQ( TC5_IRQn ) ;
+    NVIC_ClearPendingIRQ( TC5_IRQn ) ;
+    NVIC_SetPriority( TC5_IRQn, 0 ) ;
+
+	//GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 ));
+	GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 ));
+	
+	TC5->COUNT8.CTRLA.reg &=~(TC_CTRLA_ENABLE);
+    TC5->COUNT8.CTRLA.reg |= TC_CTRLA_MODE_COUNT8 | TC_CTRLA_PRESCALER_DIV1;
+    TC5->COUNT8.INTENSET.reg |= TC_INTENSET_OVF;
+    TC5->COUNT8.CTRLA.reg |= TC_CTRLA_ENABLE;
+    NVIC_EnableIRQ( TC5_IRQn ) ;
+}
+
+void TC5_Handler( void )
+{
+  if((TC5->COUNT16.INTFLAG.reg & TC_INTFLAG_OVF)) 
+  {
+    
+    count_duration--;
+    if(count_duration == 0)
+    {
+      noTone(pin_sound);
+      TC5->COUNT8.CTRLA.reg &=~(TC_CTRLA_ENABLE);  // disable TC5
+	  
+    }
+  }	
+    TC5->COUNT8.INTFLAG.reg |= ~(TC_INTFLAG_OVF);   // reset flag
+   
+}  
+
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Tone.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Tone.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Tone.h	(revision 136)
@@ -0,0 +1,37 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _WIRING_TONE_
+#define _WIRING_TONE_
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <math.h>
+#include "wiring_digital.h"
+
+void TC5_Handler( void );
+
+void tone(uint8_t pin, unsigned int frequency, unsigned long duration = 0);
+void noTone(uint8_t pin);
+void set_timer5(void);
+
+
+
+
+
+#endif /* _WIRING_TONE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/CDC.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/CDC.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/CDC.cpp	(revision 136)
@@ -0,0 +1,281 @@
+/* Copyright (c) 2011, Peter Barrett
+**
+** Permission to use, copy, modify, and/or distribute this software for
+** any purpose with or without fee is hereby granted, provided that the
+** above copyright notice and this permission notice appear in all copies.
+**
+** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR
+** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES
+** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
+** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
+** SOFTWARE.
+*/
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdint.h>
+
+// Include Atmel headers
+#include "Arduino.h"
+#include "sam.h"
+#include "wiring_constants.h"
+#include "USBCore.h"
+#include "USB/USB_device.h"
+#include "USBDesc.h"
+#include "USBAPI.h"
+
+#include "Reset.h"
+
+
+#ifdef CDC_ENABLED
+
+#define CDC_SERIAL_BUFFER_SIZE	64
+
+/* For information purpose only since RTS is not always handled by the terminal application */
+#define CDC_LINESTATE_DTR		0x01 // Data Terminal Ready
+#define CDC_LINESTATE_RTS		0x02 // Ready to Send
+
+#define CDC_LINESTATE_READY		(CDC_LINESTATE_RTS | CDC_LINESTATE_DTR)
+
+struct ring_buffer
+{
+	uint8_t buffer[CDC_SERIAL_BUFFER_SIZE];
+	volatile uint32_t head;
+	volatile uint32_t tail;
+};
+
+ring_buffer cdc_rx_buffer = { { 0 }, 0, 0};
+
+typedef struct
+{
+	uint32_t	dwDTERate;
+	uint8_t		bCharFormat;
+	uint8_t 	bParityType;
+	uint8_t 	bDataBits;
+	uint8_t		lineState;
+} LineInfo;
+
+_Pragma("pack(1)")
+static volatile LineInfo _usbLineInfo = { 
+   115200, // dWDTERate
+    0x00,  // bCharFormat
+    0x00,  // bParityType
+    0x08,  // bDataBits
+    0x00   // lineState
+};
+
+static const CDCDescriptor _cdcInterface =
+{
+#if (defined CDC_ENABLED) && defined(HID_ENABLED)
+	D_IAD(0, 2, CDC_COMMUNICATION_INTERFACE_CLASS, CDC_ABSTRACT_CONTROL_MODEL, 0),
+#endif
+	//	CDC communication interface
+	D_INTERFACE(CDC_ACM_INTERFACE,1,CDC_COMMUNICATION_INTERFACE_CLASS,CDC_ABSTRACT_CONTROL_MODEL,0),
+	D_CDCCS( CDC_HEADER, CDC_V1_10 & 0xFF, (CDC_V1_10>>8) & 0x0FF ),	// Header (1.10 bcd)
+	
+	D_CDCCS4(CDC_ABSTRACT_CONTROL_MANAGEMENT,6),				// SET_LINE_CODING, GET_LINE_CODING, SET_CONTROL_LINE_STATE supported
+	D_CDCCS(CDC_UNION,CDC_ACM_INTERFACE,CDC_DATA_INTERFACE),	// Communication interface is master, data interface is slave 0
+	D_CDCCS(CDC_CALL_MANAGEMENT,1,1),							// Device handles call management (not)
+	D_ENDPOINT(USB_ENDPOINT_IN (CDC_ENDPOINT_ACM),USB_ENDPOINT_TYPE_INTERRUPT,0x10, 0x10),
+
+	//	CDC data interface
+	D_INTERFACE(CDC_DATA_INTERFACE,2,CDC_DATA_INTERFACE_CLASS,0,0),
+	D_ENDPOINT(USB_ENDPOINT_OUT(CDC_ENDPOINT_OUT),USB_ENDPOINT_TYPE_BULK,EPX_SIZE,0),
+	D_ENDPOINT(USB_ENDPOINT_IN (CDC_ENDPOINT_IN ),USB_ENDPOINT_TYPE_BULK,EPX_SIZE,0)
+};
+_Pragma("pack()")
+
+const void* WEAK CDC_GetInterface(void)
+{
+	return  &_cdcInterface;
+}
+
+uint32_t WEAK CDC_GetInterfaceLength(void)
+{
+    return sizeof( _cdcInterface );
+}
+
+bool WEAK CDC_Setup(Setup& setup)
+{
+	uint8_t r = setup.bRequest;
+	uint8_t requestType = setup.bmRequestType;
+
+	if (REQUEST_DEVICETOHOST_CLASS_INTERFACE == requestType)
+	{
+		if (CDC_GET_LINE_CODING == r)
+		{
+			USBD_SendControl(0,(void*)&_usbLineInfo,7);
+			return true;
+		}
+	}
+
+	if (REQUEST_HOSTTODEVICE_CLASS_INTERFACE == requestType)
+	{
+		if (CDC_SET_LINE_CODING == r)
+		{
+			while( UDD_FifoByteCount(EP0) <15);
+			//USBD_RecvControl((void*)&_usbLineInfo,7);
+			uint8_t* line = (uint8_t*)&_usbLineInfo;
+			for(uint8_t i = 0; i<7; i++)
+				line[i] = setup.data[i];
+			return false;
+		}
+
+		if (CDC_SET_CONTROL_LINE_STATE == r)
+		{
+			_usbLineInfo.lineState = setup.wValueL;
+			// auto-reset into the bootloader is triggered when the port, already
+			// open at 1200 bps, is closed.
+			if (1200 == _usbLineInfo.dwDTERate)
+			{
+				// We check DTR state to determine if host port is open (bit 0 of lineState).
+				if ((_usbLineInfo.lineState & 0x01) == 0)
+					initiateReset(250);
+				else
+					cancelReset();
+			}
+			return false;
+		}
+	}
+	return false;
+}
+
+uint32_t _serialPeek = -1;
+void Serial_::begin(uint32_t baud_count)
+{
+}
+
+void Serial_::begin(uint32_t baud_count, uint8_t config)
+{
+}
+
+void Serial_::end(void)
+{
+}
+
+void Serial_::accept(void)
+{
+	ring_buffer *buffer = &cdc_rx_buffer;
+	uint32_t i = (uint32_t)(buffer->head+1) % CDC_SERIAL_BUFFER_SIZE;
+
+	// if we should be storing the received character into the location
+	// just before the tail (meaning that the head would advance to the
+	// current location of the tail), we're about to overflow the buffer
+	// and so we don't write the character or advance the head.
+	while (i != buffer->tail) {
+		uint32_t c;
+		if (!USBD_Available(CDC_ENDPOINT_OUT)) {
+            UDD_ReleaseRX(CDC_ENDPOINT_OUT);
+			break;
+		}
+		c = USBD_Recv(CDC_ENDPOINT_OUT);
+		buffer->buffer[buffer->head] = c;
+		buffer->head = i;
+
+		i = (i + 1) % CDC_SERIAL_BUFFER_SIZE;
+	}
+}
+
+int Serial_::available(void)
+{
+	ring_buffer *buffer = &cdc_rx_buffer;
+	return (uint32_t)(CDC_SERIAL_BUFFER_SIZE + buffer->head - buffer->tail) % CDC_SERIAL_BUFFER_SIZE;
+}
+
+int Serial_::peek(void)
+{
+	ring_buffer *buffer = &cdc_rx_buffer;
+
+	if (buffer->head == buffer->tail)
+	{
+		return -1;
+	}
+	else
+	{
+		return buffer->buffer[buffer->tail];
+	}
+}
+
+int Serial_::read(void)
+{
+	ring_buffer *buffer = &cdc_rx_buffer;
+
+	// if the head isn't ahead of the tail, we don't have any characters
+	if (buffer->head == buffer->tail)
+	{
+		return -1;
+	}
+	else
+	{
+		unsigned char c = buffer->buffer[buffer->tail];
+		buffer->tail = (uint32_t)(buffer->tail + 1) % CDC_SERIAL_BUFFER_SIZE;
+		if (USBD_Available(CDC_ENDPOINT_OUT))
+			accept();
+		return c;
+	}
+}
+
+void Serial_::flush(void)
+{
+	USBD_Flush(CDC_ENDPOINT_IN);
+}
+
+size_t Serial_::write(const uint8_t *buffer, size_t size)
+{
+	/* only try to send bytes if the high-level CDC connection itself
+	 is open (not just the pipe) - the OS should set lineState when the port
+	 is opened and clear lineState when the port is closed.
+	 bytes sent before the user opens the connection or after
+	 the connection is closed are lost - just like with a UART. */
+
+	{
+		uint32_t r = USBD_Send(CDC_ENDPOINT_IN, buffer, size);
+
+		if (r > 0)
+		{
+			return r;
+		} else
+		{
+			setWriteError();
+			return 0;
+		}
+	}
+	setWriteError();
+	return 0;
+}
+
+size_t Serial_::write(uint8_t c) {
+	return write(&c, 1);
+}
+
+// This operator is a convenient way for a sketch to check whether the
+// port has actually been configured and opened by the host (as opposed
+// to just being connected to the host).  It can be used, for example, in
+// setup() before printing to ensure that an application on the host is
+// actually ready to receive and display the data.
+// We add a short delay before returning to fix a bug observed by Federico
+// where the port is configured (lineState != 0) but not quite opened.
+
+Serial_::operator bool()
+{
+	// this is here to avoid spurious opening after upload
+	if (millis() < 500)
+		return false;
+
+	bool result = false;
+
+	if (_usbLineInfo.lineState > 0)
+	{
+		result = true;
+	}
+
+	delay(10);
+	return result;
+}
+
+Serial_ SerialUSB;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/HID.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/HID.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/HID.cpp	(revision 136)
@@ -0,0 +1,539 @@
+/* Copyright (c) 2011, Peter Barrett
+**
+** Permission to use, copy, modify, and/or distribute this software for
+** any purpose with or without fee is hereby granted, provided that the
+** above copyright notice and this permission notice appear in all copies.
+**
+** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR
+** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES
+** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
+** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
+** SOFTWARE.
+*/
+
+
+#include "USBAPI.h"
+#include "Reset.h"
+#include "USBCore.h"
+#include "USBDesc.h"
+#include "sam.h"
+#include "USB/USB_device.h"
+
+
+#ifdef HID_ENABLED
+
+//#define RAWHID_ENABLED
+
+// Singletons for mouse and keyboard
+Mouse_ Mouse;
+Keyboard_ Keyboard;
+
+//================================================================================
+//================================================================================
+
+#define LSB(_x) ((_x) & 0xFF)
+#define MSB(_x) ((_x) >> 8)
+
+#define RAWHID_USAGE_PAGE	0xFFC0
+#define RAWHID_USAGE		0x0C00
+#define RAWHID_TX_SIZE 64
+#define RAWHID_RX_SIZE 64
+
+//	HID report descriptor
+_Pragma("pack(1)")
+extern const uint8_t _hidReportDescriptor[] = {
+	//	Mouse
+    0x05, 0x01,                    //   USAGE_PAGE (Generic Desktop)	// 54
+    0x09, 0x02,                    //   USAGE (Mouse)
+    0xa1, 0x01,                    //   COLLECTION (Application)
+    0x09, 0x01,                    //   USAGE (Pointer)
+    0xa1, 0x00,                    //   COLLECTION (Physical)
+    0x85, 0x01,                    //   REPORT_ID (1)
+    0x05, 0x09,                    //   USAGE_PAGE (Button)
+    0x19, 0x01,                    //   USAGE_MINIMUM (Button 1)
+    0x29, 0x03,                    //   USAGE_MAXIMUM (Button 3)
+    0x15, 0x00,                    //   LOGICAL_MINIMUM (0)
+    0x25, 0x01,                    //   LOGICAL_MAXIMUM (1)
+    0x95, 0x03,                    //   REPORT_COUNT (3)
+    0x75, 0x01,                    //   REPORT_SIZE (1)
+    0x81, 0x02,                    //   INPUT (Data,Var,Abs)
+    0x95, 0x01,                    //   REPORT_COUNT (1)
+    0x75, 0x05,                    //   REPORT_SIZE (5)
+    0x81, 0x03,                    //   INPUT (Cnst,Var,Abs)
+    0x05, 0x01,                    //   USAGE_PAGE (Generic Desktop)
+    0x09, 0x30,                    //   USAGE (X)
+    0x09, 0x31,                    //   USAGE (Y)
+    0x09, 0x38,                    //   USAGE (Wheel)
+    0x15, 0x81,                    //   LOGICAL_MINIMUM (-127)
+    0x25, 0x7f,                    //   LOGICAL_MAXIMUM (127)
+    0x75, 0x08,                    //   REPORT_SIZE (8)
+    0x95, 0x03,                    //   REPORT_COUNT (3)
+    0x81, 0x06,                    //   INPUT (Data,Var,Rel)
+    0xc0,                          //   END_COLLECTION
+    0xc0,                          //   END_COLLECTION
+
+	//	Keyboard
+    0x05, 0x01,                    //   USAGE_PAGE (Generic Desktop)	// 47
+    0x09, 0x06,                    //   USAGE (Keyboard)
+    0xa1, 0x01,                    //   COLLECTION (Application)
+    0x85, 0x02,                    //   REPORT_ID (2)
+    0x05, 0x07,                    //   USAGE_PAGE (Keyboard)
+
+	0x19, 0xe0,                    //   USAGE_MINIMUM (Keyboard LeftControl)
+    0x29, 0xe7,                    //   USAGE_MAXIMUM (Keyboard Right GUI)
+    0x15, 0x00,                    //   LOGICAL_MINIMUM (0)
+    0x25, 0x01,                    //   LOGICAL_MAXIMUM (1)
+    0x75, 0x01,                    //   REPORT_SIZE (1)
+
+	0x95, 0x08,                    //   REPORT_COUNT (8)
+    0x81, 0x02,                    //   INPUT (Data,Var,Abs)
+    0x95, 0x01,                    //   REPORT_COUNT (1)
+    0x75, 0x08,                    //   REPORT_SIZE (8)
+    0x81, 0x03,                    //   INPUT (Cnst,Var,Abs)
+
+	0x95, 0x06,                    //   REPORT_COUNT (6)
+    0x75, 0x08,                    //   REPORT_SIZE (8)
+    0x15, 0x00,                    //   LOGICAL_MINIMUM (0)
+    0x25, 0x65,                    //   LOGICAL_MAXIMUM (101)
+    0x05, 0x07,                    //   USAGE_PAGE (Keyboard)
+
+	0x19, 0x00,                    //   USAGE_MINIMUM (Reserved (no event indicated))
+    0x29, 0x65,                    //   USAGE_MAXIMUM (Keyboard Application)
+    0x81, 0x00,                    //   INPUT (Data,Ary,Abs)
+    0xc0,                          //   END_COLLECTION
+
+#ifdef RAWHID_ENABLED
+	//	RAW HID
+	0x06, LSB(RAWHID_USAGE_PAGE), MSB(RAWHID_USAGE_PAGE),	// 30
+	0x0A, LSB(RAWHID_USAGE), MSB(RAWHID_USAGE),
+
+	0xA1, 0x01,                    // Collection 0x01
+    0x85, 0x03,                    // REPORT_ID (3)
+	0x75, 0x08,                    // report size = 8 bits
+	0x15, 0x00,                    // logical minimum = 0
+	0x26, 0xFF, 0x00,              // logical maximum = 255
+
+	0x95, 64,                      // report count TX
+	0x09, 0x01,                    // usage
+	0x81, 0x02,                    // Input (array)
+
+	0x95, 64,                      // report count RX
+	0x09, 0x02,                    // usage
+	0x91, 0x02,                    // Output (array)
+	0xC0                           // end collection
+#endif
+};
+
+extern const HIDDescriptor _hidInterface =
+{
+	D_INTERFACE(HID_INTERFACE,1,3,0,0),
+	D_HIDREPORT(sizeof(_hidReportDescriptor)),
+	D_ENDPOINT(USB_ENDPOINT_IN(HID_ENDPOINT_INT),USB_ENDPOINT_TYPE_INTERRUPT,0x40,0x01)
+};
+_Pragma("pack()")
+
+//================================================================================
+//================================================================================
+//	Driver
+
+uint8_t _hid_protocol = 1;
+uint8_t _hid_idle = 1;
+
+#define WEAK __attribute__ ((weak))
+
+const void* WEAK HID_GetInterface(void)
+{
+	return  &_hidInterface;
+}
+
+uint32_t WEAK HID_GetInterfaceLength(void)
+{
+    return sizeof( _hidInterface );
+}
+
+uint32_t HID_SizeReportDescriptor(void)
+{
+	return sizeof(_hidReportDescriptor);
+}
+
+uint32_t WEAK HID_GetDescriptor(void)
+{
+	return USBD_SendControl(0,_hidReportDescriptor,sizeof(_hidReportDescriptor));
+}
+
+void WEAK HID_SendReport(uint8_t id, const void* data, uint32_t len)
+{
+	uint8_t p[8];
+	const uint8_t *d = reinterpret_cast<const uint8_t *>(data);
+
+	p[0] = id;
+	for (uint32_t i=0; i<len; i++)
+	{
+		p[i+1] = d[i];
+	}
+	USBD_Send(HID_ENDPOINT_INT, p, len+1);
+}
+
+bool WEAK HID_Setup(Setup& setup)
+{
+	uint8_t r = setup.bRequest;
+	uint8_t requestType = setup.bmRequestType;
+
+	if (REQUEST_DEVICETOHOST_CLASS_INTERFACE == requestType)
+	{
+		if (HID_GET_REPORT == r)
+		{
+			//HID_GetReport();
+			return true;
+		}
+		if (HID_GET_PROTOCOL == r)
+		{
+			//Send8(_hid_protocol);
+			return true;
+		}
+		if (HID_GET_IDLE == r)
+		{
+			UDD_Send(0, &_hid_idle, 1);
+			UDD_ClearIN();
+			return true;
+		}
+	}
+
+	if (REQUEST_HOSTTODEVICE_CLASS_INTERFACE == requestType)
+	{
+		if (HID_SET_PROTOCOL == r)
+		{
+			_hid_protocol = setup.wValueL;
+			return true;
+		}
+
+		if (HID_SET_IDLE == r)
+		{
+			_hid_idle = setup.wValueH;
+			return true;
+		}
+	}
+	return false;
+}
+
+//================================================================================
+//================================================================================
+//	Mouse
+
+Mouse_::Mouse_(void) : _buttons(0)
+{
+}
+
+void Mouse_::begin(void)
+{
+}
+
+void Mouse_::end(void)
+{
+}
+
+void Mouse_::click(uint8_t b)
+{
+	_buttons = b;
+	move(0,0,0);
+	_buttons = 0;
+	move(0,0,0);
+}
+
+void Mouse_::move(signed char x, signed char y, signed char wheel)
+{
+	uint8_t m[4];
+	m[0] = _buttons;
+	m[1] = x;
+	m[2] = y;
+	m[3] = wheel;
+	HID_SendReport(1,m,4);
+}
+
+void Mouse_::buttons(uint8_t b)
+{
+	if (b != _buttons)
+	{
+		_buttons = b;
+		move(0,0,0);
+	}
+}
+
+void Mouse_::press(uint8_t b)
+{
+	buttons(_buttons | b);
+}
+
+void Mouse_::release(uint8_t b)
+{
+	buttons(_buttons & ~b);
+}
+
+bool Mouse_::isPressed(uint8_t b)
+{
+	if ((b & _buttons) > 0)
+		return true;
+	return false;
+}
+
+//================================================================================
+//================================================================================
+//	Keyboard
+
+Keyboard_::Keyboard_(void)
+{
+}
+
+void Keyboard_::begin(void)
+{
+}
+
+void Keyboard_::end(void)
+{
+}
+
+void Keyboard_::sendReport(KeyReport* keys)
+{
+	HID_SendReport(2,keys,sizeof(KeyReport));
+}
+
+#define SHIFT 0x80
+extern const uint8_t _asciimap[128] =
+{
+	0x00,             // NUL
+	0x00,             // SOH
+	0x00,             // STX
+	0x00,             // ETX
+	0x00,             // EOT
+	0x00,             // ENQ
+	0x00,             // ACK
+	0x00,             // BEL
+	0x2a,             // BS	Backspace
+	0x2b,             // TAB	Tab
+	0x28,             // LF	Enter
+	0x00,             // VT
+	0x00,             // FF
+	0x00,             // CR
+	0x00,             // SO
+	0x00,             // SI
+	0x00,             // DEL
+	0x00,             // DC1
+	0x00,             // DC2
+	0x00,             // DC3
+	0x00,             // DC4
+	0x00,             // NAK
+	0x00,             // SYN
+	0x00,             // ETB
+	0x00,             // CAN
+	0x00,             // EM
+	0x00,             // SUB
+	0x00,             // ESC
+	0x00,             // FS
+	0x00,             // GS
+	0x00,             // RS
+	0x00,             // US
+
+	0x2c,             //  ' '
+	0x1e|SHIFT,       // !
+	0x34|SHIFT,       // "
+	0x20|SHIFT,       // #
+	0x21|SHIFT,       // $
+	0x22|SHIFT,       // %
+	0x24|SHIFT,       // &
+	0x34,             // '
+	0x26|SHIFT,       // (
+	0x27|SHIFT,       // )
+	0x25|SHIFT,       // *
+	0x2e|SHIFT,       // +
+	0x36,             // ,
+	0x2d,             // -
+	0x37,             // .
+	0x38,             // /
+	0x27,             // 0
+	0x1e,             // 1
+	0x1f,             // 2
+	0x20,             // 3
+	0x21,             // 4
+	0x22,             // 5
+	0x23,             // 6
+	0x24,             // 7
+	0x25,             // 8
+	0x26,             // 9
+	0x33|SHIFT,       // :
+	0x33,             // ;
+	0x36|SHIFT,       // <
+	0x2e,             // =
+	0x37|SHIFT,       // >
+	0x38|SHIFT,       // ?
+	0x1f|SHIFT,       // @
+	0x04|SHIFT,       // A
+	0x05|SHIFT,       // B
+	0x06|SHIFT,       // C
+	0x07|SHIFT,       // D
+	0x08|SHIFT,       // E
+	0x09|SHIFT,       // F
+	0x0a|SHIFT,       // G
+	0x0b|SHIFT,       // H
+	0x0c|SHIFT,       // I
+	0x0d|SHIFT,       // J
+	0x0e|SHIFT,       // K
+	0x0f|SHIFT,       // L
+	0x10|SHIFT,       // M
+	0x11|SHIFT,       // N
+	0x12|SHIFT,       // O
+	0x13|SHIFT,       // P
+	0x14|SHIFT,       // Q
+	0x15|SHIFT,       // R
+	0x16|SHIFT,       // S
+	0x17|SHIFT,       // T
+	0x18|SHIFT,       // U
+	0x19|SHIFT,       // V
+	0x1a|SHIFT,       // W
+	0x1b|SHIFT,       // X
+	0x1c|SHIFT,       // Y
+	0x1d|SHIFT,       // Z
+	0x2f,             // [
+	0x31,             // bslash
+	0x30,             // ]
+	0x23|SHIFT,       // ^
+	0x2d|SHIFT,       // _
+	0x35,             // `
+	0x04,             // a
+	0x05,             // b
+	0x06,             // c
+	0x07,             // d
+	0x08,             // e
+	0x09,             // f
+	0x0a,             // g
+	0x0b,             // h
+	0x0c,             // i
+	0x0d,             // j
+	0x0e,             // k
+	0x0f,             // l
+	0x10,             // m
+	0x11,             // n
+	0x12,             // o
+	0x13,             // p
+	0x14,             // q
+	0x15,             // r
+	0x16,             // s
+	0x17,             // t
+	0x18,             // u
+	0x19,             // v
+	0x1a,             // w
+	0x1b,             // x
+	0x1c,             // y
+	0x1d,             // z
+	0x2f|SHIFT,       //
+	0x31|SHIFT,       // |
+	0x30|SHIFT,       // }
+	0x35|SHIFT,       // ~
+	0			      // DEL
+} ;
+
+// press() adds the specified key (printing, non-printing, or modifier)
+// to the persistent key report and sends the report.  Because of the way
+// USB HID works, the host acts like the key remains pressed until we
+// call release(), releaseAll(), or otherwise clear the report and resend.
+size_t Keyboard_::press(uint8_t k)
+{
+	uint8_t i;
+	if (k >= 136) {			// it's a non-printing key (not a modifier)
+		k = k - 136;
+	} else if (k >= 128) {	// it's a modifier key
+		_keyReport.modifiers |= (1<<(k-128));
+		k = 0;
+	} else {				// it's a printing key
+		k = _asciimap[k];
+		if (!k) {
+			setWriteError();
+			return 0;
+		}
+		if (k & 0x80) {						// it's a capital letter or other character reached with shift
+			_keyReport.modifiers |= 0x02;	// the left shift modifier
+			k &= 0x7F;
+		}
+	}
+
+	// Add k to the key report only if it's not already present
+	// and if there is an empty slot.
+	if (_keyReport.keys[0] != k && _keyReport.keys[1] != k &&
+		_keyReport.keys[2] != k && _keyReport.keys[3] != k &&
+		_keyReport.keys[4] != k && _keyReport.keys[5] != k) {
+
+		for (i=0; i<6; i++) {
+			if (_keyReport.keys[i] == 0x00) {
+				_keyReport.keys[i] = k;
+				break;
+			}
+		}
+		if (i == 6) {
+			setWriteError();
+			return 0;
+		}
+	}
+	sendReport(&_keyReport);
+	return 1;
+}
+
+// release() takes the specified key out of the persistent key report and
+// sends the report.  This tells the OS the key is no longer pressed and that
+// it shouldn't be repeated any more.
+
+size_t Keyboard_::release(uint8_t k)
+{
+	uint8_t i;
+	if (k >= 136) {			// it's a non-printing key (not a modifier)
+		k = k - 136;
+	} else if (k >= 128) {	// it's a modifier key
+		_keyReport.modifiers &= ~(1<<(k-128));
+		k = 0;
+	} else {				// it's a printing key
+		k = _asciimap[k];
+		if (!k) {
+			return 0;
+		}
+		if (k & 0x80) {							// it's a capital letter or other character reached with shift
+			_keyReport.modifiers &= ~(0x02);	// the left shift modifier
+			k &= 0x7F;
+		}
+	}
+
+	// Test the key report to see if k is present.  Clear it if it exists.
+	// Check all positions in case the key is present more than once (which it shouldn't be)
+	for (i=0; i<6; i++) {
+		if (0 != k && _keyReport.keys[i] == k) {
+			_keyReport.keys[i] = 0x00;
+		}
+	}
+
+	sendReport(&_keyReport);
+	return 1;
+}
+
+void Keyboard_::releaseAll(void)
+{
+	_keyReport.keys[0] = 0;
+	_keyReport.keys[1] = 0;
+	_keyReport.keys[2] = 0;
+	_keyReport.keys[3] = 0;
+	_keyReport.keys[4] = 0;
+	_keyReport.keys[5] = 0;
+	_keyReport.modifiers = 0;
+	sendReport(&_keyReport);
+}
+
+size_t Keyboard_::write(uint8_t c)
+{
+	uint8_t p = 0;
+
+	p = press(c);	// Keydown
+	release(c);		// Keyup
+
+	return (p);		// Just return the result of press() since release() almost always returns 1
+}
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBAPI.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBAPI.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBAPI.h	(revision 136)
@@ -0,0 +1,234 @@
+/*
+  Copyright (c) 2012 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef __USBAPI__
+#define __USBAPI__
+
+
+/* Define attribute */
+#if defined   ( __CC_ARM   ) /* Keil uVision 4 */
+    #define WEAK (__attribute__ ((weak)))
+#elif defined ( __ICCARM__ ) /* IAR Ewarm 5.41+ */
+    #define WEAK __weak
+#elif defined (  __GNUC__  ) /* GCC CS */
+    #define WEAK __attribute__ ((weak))
+#endif
+
+
+#if defined __cplusplus
+
+#include "Stream.h"
+#include "RingBuffer.h"
+
+//================================================================================
+//================================================================================
+//	USB
+
+class USBDevice_
+{
+public:
+	USBDevice_();
+	bool configured();
+
+	bool attach();
+	bool detach();	// Serial port goes down too...
+	void poll();
+	void init();
+};
+extern USBDevice_ USBDevice;
+
+//================================================================================
+//================================================================================
+//	Serial over CDC (Serial1 is the physical port)
+
+class Serial_ : public Stream
+{
+private:
+	RingBuffer *_cdc_rx_buffer;
+public:
+	void begin(uint32_t baud_count);
+	void begin(unsigned long, uint8_t);
+	void end(void);
+
+	virtual int available(void);
+	virtual void accept(void);
+	virtual int peek(void);
+	virtual int read(void);
+	virtual void flush(void);
+	virtual size_t write(uint8_t);
+	virtual size_t write(const uint8_t *buffer, size_t size);
+	using Print::write; // pull in write(str) from Print
+	operator bool();
+};
+extern Serial_ SerialUSB;
+
+//================================================================================
+//================================================================================
+//	Mouse
+
+#define MOUSE_LEFT 1
+#define MOUSE_RIGHT 2
+#define MOUSE_MIDDLE 4
+#define MOUSE_ALL (MOUSE_LEFT | MOUSE_RIGHT | MOUSE_MIDDLE)
+
+class Mouse_
+{
+private:
+	uint8_t _buttons;
+	void buttons(uint8_t b);
+public:
+	Mouse_(void);
+	void begin(void);
+	void end(void);
+	void click(uint8_t b = MOUSE_LEFT);
+	void move(signed char x, signed char y, signed char wheel = 0);
+	void press(uint8_t b = MOUSE_LEFT);		// press LEFT by default
+	void release(uint8_t b = MOUSE_LEFT);	// release LEFT by default
+	bool isPressed(uint8_t b = MOUSE_ALL);	// check all buttons by default
+};
+extern Mouse_ Mouse;
+
+//================================================================================
+//================================================================================
+//	Keyboard
+
+#define KEY_LEFT_CTRL		0x80
+#define KEY_LEFT_SHIFT		0x81
+#define KEY_LEFT_ALT		0x82
+#define KEY_LEFT_GUI		0x83
+#define KEY_RIGHT_CTRL		0x84
+#define KEY_RIGHT_SHIFT		0x85
+#define KEY_RIGHT_ALT		0x86
+#define KEY_RIGHT_GUI		0x87
+
+#define KEY_UP_ARROW		0xDA
+#define KEY_DOWN_ARROW		0xD9
+#define KEY_LEFT_ARROW		0xD8
+#define KEY_RIGHT_ARROW		0xD7
+#define KEY_BACKSPACE		0xB2
+#define KEY_TAB				0xB3
+#define KEY_RETURN			0xB0
+#define KEY_ESC				0xB1
+#define KEY_INSERT			0xD1
+#define KEY_DELETE			0xD4
+#define KEY_PAGE_UP			0xD3
+#define KEY_PAGE_DOWN		0xD6
+#define KEY_HOME			0xD2
+#define KEY_END				0xD5
+#define KEY_CAPS_LOCK		0xC1
+#define KEY_F1				0xC2
+#define KEY_F2				0xC3
+#define KEY_F3				0xC4
+#define KEY_F4				0xC5
+#define KEY_F5				0xC6
+#define KEY_F6				0xC7
+#define KEY_F7				0xC8
+#define KEY_F8				0xC9
+#define KEY_F9				0xCA
+#define KEY_F10				0xCB
+#define KEY_F11				0xCC
+#define KEY_F12				0xCD
+
+//	Low level key report: up to 6 keys and shift, ctrl etc at once
+typedef struct
+{
+	uint8_t modifiers;
+	uint8_t reserved;
+	uint8_t keys[6];
+} KeyReport;
+
+class Keyboard_ : public Print
+{
+private:
+	KeyReport _keyReport;
+	void sendReport(KeyReport* keys);
+public:
+	Keyboard_(void);
+	void begin(void);
+	void end(void);
+	virtual size_t write(uint8_t k);
+	virtual size_t press(uint8_t k);
+	virtual size_t release(uint8_t k);
+	virtual void releaseAll(void);
+};
+extern Keyboard_ Keyboard;
+
+//================================================================================
+//================================================================================
+//	Low level API
+
+typedef struct
+{
+	uint8_t bmRequestType;
+	uint8_t bRequest;
+	uint8_t wValueL;
+	uint8_t wValueH;
+	uint16_t wIndex;
+	uint16_t wLength;
+	uint8_t data[8];
+} Setup;
+
+//================================================================================
+//================================================================================
+//	HID 'Driver'
+
+const void* WEAK HID_GetInterface(void);
+uint32_t WEAK HID_GetInterfaceLength(void);
+uint32_t HID_SizeReportDescriptor(void);
+
+uint32_t		HID_GetDescriptor(void);
+bool	HID_Setup(Setup& setup);
+void	HID_SendReport(uint8_t id, const void* data, uint32_t len);
+
+//================================================================================
+//================================================================================
+//	MSC 'Driver'
+
+uint32_t		MSC_GetInterface(uint8_t* interfaceNum);
+uint32_t		MSC_GetDescriptor(uint32_t i);
+bool	MSC_Setup(Setup& setup);
+bool	MSC_Data(uint8_t rx,uint8_t tx);
+
+//================================================================================
+//================================================================================
+//	CDC 'Driver'
+
+const void* CDC_GetInterface(/*uint8_t* interfaceNum*/);
+uint32_t WEAK CDC_GetInterfaceLength(void);
+uint32_t		CDC_GetOtherInterface(uint8_t* interfaceNum);
+uint32_t		CDC_GetDescriptor(uint32_t i);
+bool	CDC_Setup(Setup& setup);
+
+//================================================================================
+//================================================================================
+
+uint32_t USBD_SendControl(uint8_t flags, const void* d, uint32_t len);
+uint32_t USBD_RecvControl(void* d, uint32_t len);
+uint32_t USBD_SendInterfaces(void);
+bool USBD_ClassInterfaceRequest(Setup& setup);
+
+uint32_t USBD_Available(uint32_t ep);
+uint32_t USBD_SendSpace(uint32_t ep);
+uint32_t USBD_Send(uint32_t ep, const void* d, uint32_t len);
+uint32_t USBD_Recv(uint32_t ep, void* data, uint32_t len);		// non-blocking
+uint32_t USBD_Recv(uint32_t ep);							// non-blocking
+void USBD_Flush(uint32_t ep);
+uint32_t USBD_Connected(void);
+
+#endif  // __cplusplus
+#endif  // __USBAPI__
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBCore.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBCore.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBCore.cpp	(revision 136)
@@ -0,0 +1,773 @@
+// Copyright (c) 2010, Peter Barrett
+/*
+** Permission to use, copy, modify, and/or distribute this software for
+** any purpose with or without fee is hereby granted, provided that the
+** above copyright notice and this permission notice appear in all copies.
+**
+** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR
+** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES
+** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
+** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
+** SOFTWARE.
+*/
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdint.h>
+//#include "../Arduino.h"
+
+#include "sam.h"
+#include "wiring_constants.h"
+#include "USBCore.h"
+#include "USB/USB_device.h"   // needed for USB PID define
+#include "USBDesc.h"
+#include "USBAPI.h"
+
+#define TRACE_CORE(x)
+
+//==================================================================
+
+
+
+/*
+#if (defined CDC_ENABLED) && defined(HID_ENABLED)
+//#define USB_PID_ZERO       0x004B  // CDC and HID
+#define USB_PID_ZERO       0x804d  // CDC only
+#else
+#if (defined CDC_ENABLED)
+#define USB_PID_ZERO       0x804d  // CDC only  usbserial.name
+#else
+#define USB_PID_ZERO       0x804d  // HID only
+#endif
+#endif
+*/
+
+#define USB_PID_ZERO_PRO	0x804d
+
+// USB Device
+//#define USB_VID 			0x2a03 // arduino srl vid
+//#undef USB_PID
+//#define USB_PID            USB_PID_ZERO
+
+//==================================================================
+
+static char isRemoteWakeUpEnabled = 0;
+static char isEndpointHalt = 0;
+
+
+const uint16_t STRING_LANGUAGE[2] = {
+	(3<<8) | (2+2),
+	0x0409	// English
+};
+
+#ifndef USB_PRODUCT
+// Use a hardcoded product name if none is provided
+#if USB_PID == USB_PID_ZERO_PRO
+	#define USB_PRODUCT "Arduino Zero Pro"
+#else
+	#define USB_PRODUCT "USB IO Board"
+#endif
+#endif
+
+const uint8_t STRING_PRODUCT[] = USB_PRODUCT;
+
+#if USB_VID == 0x2a03
+#  if defined(USB_MANUFACTURER)
+#    undef USB_MANUFACTURER
+#  endif
+#  define USB_MANUFACTURER "Arduino Srl"
+#elif !defined(USB_MANUFACTURER)
+// Fall through to unknown if no manufacturer name was provided in a macro
+#  define USB_MANUFACTURER "Unknown"
+#endif
+
+const uint8_t STRING_MANUFACTURER[12] = USB_MANUFACTURER;
+
+
+
+//	DEVICE DESCRIPTOR
+#if (defined CDC_ENABLED) && defined(HID_ENABLED)
+const DeviceDescriptor USB_DeviceDescriptor =
+	D_DEVICE(0xEF,0x02,0x01,64,USB_VID,USB_PID,0x100,IMANUFACTURER,IPRODUCT,0,1);
+#elif defined(CDC_ENABLED)  // CDC only
+const DeviceDescriptor USB_DeviceDescriptor =
+	D_DEVICE(0x02,0x00,0x00,64,USB_VID,USB_PID,0x100,IMANUFACTURER,IPRODUCT,0,1);
+#else // HID only
+const DeviceDescriptor USB_DeviceDescriptor =
+	D_DEVICE(0,0x00,0x00,64,USB_VID,USB_PID,0x100,IMANUFACTURER,IPRODUCT,0,1);
+#endif
+
+//==================================================================
+
+volatile uint32_t _usbConfiguration = 0;
+volatile uint32_t _usbInitialized = 0;
+volatile uint32_t _usbSetInterface = 0;
+
+//==================================================================
+
+
+//	Number of bytes, assumes a rx endpoint
+uint32_t USBD_Available(uint32_t ep)
+{
+	return UDD_FifoByteCount(ep);
+}
+
+//	Non Blocking receive
+//	Return number of bytes read
+uint32_t USBD_Recv(uint32_t ep, void* d, uint32_t len)
+{
+	if (!_usbConfiguration || len < 0)
+		return -1;
+
+	uint32_t n = UDD_FifoByteCount(ep);
+	len = min(n,len);
+	n = len;
+	uint8_t* dst = (uint8_t*)d;
+	while (n--)
+		*dst++ = UDD_Recv8(ep);
+	
+	
+	
+	
+	if (len && !UDD_FifoByteCount(ep)) // release empty buffer
+		UDD_ReleaseRX(ep);
+		
+  //----- Tx & Rx led blinking during transmission ----- begin ----	
+	PORT->Group[1].OUTTGL.reg =0x00000008 ;  //RxLED
+	for(int i=0; i < 100000; i++)
+	{
+		asm("NOP");
+	}
+	PORT->Group[1].OUTTGL.reg =0x00000008 ;	
+  //----- Tx & Rx led blinking during transmission ----- end ----
+	return len;
+}
+
+//	Recv 1 byte if ready
+uint32_t USBD_Recv(uint32_t ep)
+{
+	uint8_t c;
+	if (USBD_Recv(ep, &c, 1) != 1)
+		return -1;
+	else
+		return c;
+}
+
+//	Blocking Send of data to an endpoint
+uint32_t USBD_Send(uint32_t ep, const void* d, uint32_t len)
+{
+	int r = len;
+	const uint8_t* data = (const uint8_t*)d;
+
+    if (!_usbConfiguration)
+    {
+    	TRACE_CORE(printf("pb conf\n\r");)
+		return -1;
+    }
+	UDD_Send(ep, data, len);
+
+	/* Clear the transfer complete flag  */
+	udd_clear_transf_cplt(ep);
+	/* Set the bank as ready */
+	udd_bk_rdy(ep);
+
+	/* Wait for transfer to complete */
+	while (! udd_is_transf_cplt(ep));  // need fire exit.
+	
+  //----- Tx & Rx led blinking during transmission ----- begin ----
+	PORT->Group[0].OUTTGL.reg =0x08000000 ; //TxLED
+	for(int i=0; i < 100000; i++)
+	{
+		asm("NOP");
+	}
+	PORT->Group[0].OUTTGL.reg =0x08000000 ;
+	/*for(int i=0; i < 100000; i++)
+	{
+		asm("NOP");
+	}*/
+  //----- Tx & Rx led blinking during transmission ----- end ----	
+	return r;
+}
+
+uint32_t USBD_SendControl(uint8_t flags, const void* d, uint32_t len)
+{
+	const uint8_t* data = (const uint8_t*)d;
+	uint32_t length = len;
+	uint32_t sent = 0;
+	uint32_t pos = 0;
+
+	TRACE_CORE(printf("=> USBD_SendControl TOTAL len=%lu\r\n", len);)
+
+ 		while (len > 0)
+ 		{
+			sent = UDD_Send(EP0, data + pos, len);
+			TRACE_CORE(printf("=> USBD_SendControl sent=%lu\r\n", sent);)
+			pos += sent;
+			len -= sent;
+ 		}
+
+	return length;
+}
+
+// Send a USB descriptor string. The string is stored as a
+// plain ASCII string but is sent out as UTF-16 with the
+// correct 2-byte prefix
+static bool USB_SendStringDescriptor(const uint8_t *string, int wLength)
+{
+	uint16_t buff[64];
+	int l = 1;
+
+	wLength -= 2;
+	while (*string && wLength>0)
+	{
+		buff[l++] = (uint8_t)(*string++);
+		wLength -= 2;
+	}
+	buff[0] = (3<<8) | (l*2);
+
+	return USBD_SendControl(0, (uint8_t*)buff, l*2);
+}
+
+uint32_t USBD_RecvControl(void* d, uint32_t len)
+{
+	udd_ack_out_received(0);
+
+	return len;
+}
+
+//	Handle CLASS_INTERFACE requests
+bool USBD_ClassInterfaceRequest(Setup& setup)
+{
+	uint8_t i = setup.wIndex;
+
+	TRACE_CORE(printf("=> USBD_ClassInterfaceRequest\r\n");)
+
+#ifdef CDC_ENABLED
+	if (CDC_ACM_INTERFACE == i)
+	{
+		if( CDC_Setup(setup) == false )
+		{
+			send_zlp();
+		}
+		return true;
+	}
+#endif
+
+#ifdef HID_ENABLED
+	if (HID_INTERFACE == i)
+	{
+		if( HID_Setup(setup) == true )
+		{
+			send_zlp();
+		}
+		return true;
+	}
+#endif
+
+	return false;
+}
+
+//	Construct a dynamic configuration descriptor
+//	This really needs dynamic endpoint allocation etc
+//	TODO
+static bool USBD_SendConfiguration(uint32_t maxlen)
+{
+	uint8_t cache_buffer[128];
+	uint8_t i;
+
+	const uint8_t* interfaces;
+	uint32_t interfaces_length = 0;
+	uint8_t num_interfaces[1];
+	
+	num_interfaces[0] = 0;
+
+#if (defined CDC_ENABLED) && defined(HID_ENABLED)
+    num_interfaces[0] += 3;
+    interfaces = (const uint8_t*) CDC_GetInterface();
+    interfaces_length = CDC_GetInterfaceLength() + HID_GetInterfaceLength();
+    if( maxlen > CDC_GetInterfaceLength() + HID_GetInterfaceLength() + sizeof(ConfigDescriptor) )
+    {
+	    maxlen = CDC_GetInterfaceLength() + HID_GetInterfaceLength() + sizeof(ConfigDescriptor);
+    }
+
+#else
+#ifdef CDC_ENABLED
+    num_interfaces[0] += 2;
+	interfaces = (const uint8_t*) CDC_GetInterface();
+	interfaces_length += CDC_GetInterfaceLength();
+	if( maxlen > CDC_GetInterfaceLength()+ sizeof(ConfigDescriptor) )
+	{
+		maxlen = CDC_GetInterfaceLength()+ sizeof(ConfigDescriptor);
+	}
+#endif
+
+#ifdef HID_ENABLED
+    num_interfaces[0] += 1;
+	interfaces = (const uint8_t*) HID_GetInterface();
+	interfaces_length += HID_GetInterfaceLength();
+	if( maxlen > HID_GetInterfaceLength()+ sizeof(ConfigDescriptor) )
+	{
+		maxlen = HID_GetInterfaceLength()+ sizeof(ConfigDescriptor);
+	}
+#endif
+#endif
+
+_Pragma("pack(1)")
+	ConfigDescriptor config = D_CONFIG((uint16_t)(interfaces_length + sizeof(ConfigDescriptor)),num_interfaces[0]);
+_Pragma("pack()")
+
+	memcpy( cache_buffer, &config, sizeof(ConfigDescriptor) );
+
+#if (defined CDC_ENABLED) && defined(HID_ENABLED)
+	for ( i=0; i<CDC_GetInterfaceLength(); i++)
+	{
+		cache_buffer[i+sizeof(ConfigDescriptor)] = interfaces[i];
+	}
+	interfaces = (const uint8_t*) HID_GetInterface();
+	for ( i=0; i<HID_GetInterfaceLength(); i++)
+	{
+		cache_buffer[i+sizeof(ConfigDescriptor)+CDC_GetInterfaceLength()] = interfaces[i];
+	}
+#else
+#ifdef HID_ENABLED
+	for ( i=0; i<interfaces_length; i++)
+	{
+		cache_buffer[i+sizeof(ConfigDescriptor)] = interfaces[i];
+	}
+#endif
+
+#ifdef CDC_ENABLED
+	for ( i=0; i<interfaces_length; i++)
+	{
+		cache_buffer[i+sizeof(ConfigDescriptor)] = interfaces[i];
+	}
+#endif	
+#endif
+
+	if (maxlen > sizeof(cache_buffer))
+	{
+		 maxlen = sizeof(cache_buffer);
+	}
+	USBD_SendControl(0,cache_buffer, maxlen );
+	return true;
+}
+
+static bool USBD_SendDescriptor(Setup* pSetup)
+{
+	uint8_t t = pSetup->wValueH;
+	uint8_t desc_length = 0;
+	const uint8_t* desc_addr = 0;
+
+	if (USB_CONFIGURATION_DESCRIPTOR_TYPE == t)
+	{
+		TRACE_CORE(printf("=> USBD_SendDescriptor : USB_CONFIGURATION_DESCRIPTOR_TYPE length=%d\r\n", setup.wLength);)
+		return USBD_SendConfiguration(pSetup->wLength);
+	}
+
+#ifdef HID_ENABLED
+	if (HID_REPORT_DESCRIPTOR_TYPE == t)
+	{
+		TRACE_CORE(puts("=> USBD_SendDescriptor : HID_REPORT_DESCRIPTOR_TYPE\r\n");)
+		return HID_GetDescriptor();
+	}
+	if (HID_HID_DESCRIPTOR_TYPE == t)
+	{
+		uint8_t tab[9] = D_HIDREPORT((uint8_t)HID_SizeReportDescriptor());
+
+		TRACE_CORE(puts("=> USBD_SendDescriptor : HID_HID_DESCRIPTOR_TYPE\r\n");)
+
+		return USBD_SendControl(0, tab, sizeof(tab));
+	}
+#endif
+
+	if (USB_DEVICE_DESCRIPTOR_TYPE == t)
+	{
+		TRACE_CORE(puts("=> USBD_SendDescriptor : USB_DEVICE_DESCRIPTOR_TYPE\r\n");)
+		desc_addr = (const uint8_t*)&USB_DeviceDescriptor;
+        if( *desc_addr > pSetup->wLength ) {
+            desc_length = pSetup->wLength;
+        }
+	}
+	else if (USB_STRING_DESCRIPTOR_TYPE == t)
+	{
+		TRACE_CORE(puts("=> USBD_SendDescriptor : USB_STRING_DESCRIPTOR_TYPE\r\n");)
+		if (pSetup->wValueL == 0) {
+			desc_addr = (const uint8_t*)&STRING_LANGUAGE;
+		}
+		else if (pSetup->wValueL == IPRODUCT) {
+			return USB_SendStringDescriptor(STRING_PRODUCT, pSetup->wLength);
+		}
+		else if (pSetup->wValueL == IMANUFACTURER) {
+			return USB_SendStringDescriptor(STRING_MANUFACTURER, pSetup->wLength);
+		}
+		else {
+			return false;
+		}
+		if( *desc_addr > pSetup->wLength ) {
+			desc_length = pSetup->wLength;
+		}
+	}
+    else
+    {
+        TRACE_CORE(printf("Device ERROR");)
+    }
+
+	if (desc_addr == 0)
+	{
+		return false;
+	}
+
+	if (desc_length == 0)
+	{
+		desc_length = *desc_addr;
+	}
+
+	TRACE_CORE(printf("=> USBD_SendDescriptor : desc_addr=%p desc_length=%d\r\n", desc_addr, desc_length);)
+	USBD_SendControl(0, desc_addr, desc_length);
+
+	return true;
+}
+
+
+void EndpointHandler(uint8_t bEndpoint)
+{
+#ifdef CDC_ENABLED
+	if( bEndpoint == CDC_ENDPOINT_OUT )
+	{
+		udd_ack_out_received(CDC_ENDPOINT_OUT);
+
+		// Handle received bytes		
+		if (USBD_Available(CDC_ENDPOINT_OUT))
+		{
+			SerialUSB.accept();
+		}
+	}
+	if( bEndpoint == CDC_ENDPOINT_IN )
+	{
+		udd_ack_in_received(CDC_ENDPOINT_IN);
+		/* Clear the transfer complete flag  */
+		udd_clear_transf_cplt(CDC_ENDPOINT_IN);
+		
+	}
+	if( bEndpoint == CDC_ENDPOINT_ACM )
+	{
+		udd_ack_in_received(CDC_ENDPOINT_ACM);
+		/* Clear the transfer complete flag  */
+		udd_clear_transf_cplt(CDC_ENDPOINT_ACM);
+	}
+#endif
+
+#ifdef HID_ENABLED
+	/* Nothing to do in our example */
+#endif
+}
+
+
+void USB_Handler(void)
+{
+	uint16_t flags;
+	uint8_t i;
+	uint8_t ept_int;
+
+	ept_int = udd_endpoint_interrupt();
+	
+	/* Not endpoint interrupt */
+	if (0 == ept_int)
+	{
+		udd_clear_wakeup_interrupt();
+		udd_clear_eorsm_interrupt();
+		udd_clear_suspend_interrupt();
+
+		// End of bus reset
+		if (Is_udd_reset())
+		{
+			TRACE_CORE(printf(">>> End of Reset\r\n");)
+			// Reset USB address to 0
+			udd_configure_address(0);
+
+			// Configure EP 0
+			UDD_InitEP(0, USB_ENDPOINT_TYPE_CONTROL);
+			udd_enable_setup_received_interrupt(0);
+			_usbConfiguration = 0;
+			udd_ack_reset();
+		}
+
+		if (Is_udd_sof())
+		{
+			udd_ack_sof();
+		}
+
+	}
+	else 
+	{
+		// Endpoint interrupt
+		flags = udd_read_endpoint_flag(0);
+
+		// endpoint received setup interrupt
+		if (flags & USB_DEVICE_EPINTFLAG_RXSTP)
+		{
+			Setup *pSetupData;
+
+			/* Clear the Received Setup flag */
+			udd_read_endpoint_flag(0) = USB_DEVICE_EPINTFLAG_RXSTP;
+
+			UDD_Recv(EP0, (uint8_t**)&pSetupData);
+
+			/* Clear the Bank 0 ready flag on Control OUT */
+			udd_ack_out_received(0);
+
+			bool ok = true;
+			if (REQUEST_STANDARD == (pSetupData->bmRequestType & REQUEST_TYPE))
+			{
+				unsigned char data_to_be_send[2];
+
+				// Standard Requests
+				uint8_t r = pSetupData->bRequest;
+				if (GET_STATUS == r)
+				{
+					if( pSetupData->bmRequestType == 0 )  // device
+					{
+						// Send the device status
+     					TRACE_CORE(puts(">>> EP0 Int: GET_STATUS\r\n");)
+						// Check current configuration for power mode (if device is configured)
+						
+						// Check if remote wake-up is enabled
+						
+						data_to_be_send[0]=0;
+						data_to_be_send[1]=0;
+						UDD_Send(0, data_to_be_send, 2);
+					}
+					// if( pSetupData->bmRequestType == 2 ) // Endpoint:
+					else
+					{
+						// Send the endpoint status
+						// Check if the endpoint if currently halted
+ 						if( isEndpointHalt == 1 )
+							data_to_be_send[0]=1;
+ 						else
+							data_to_be_send[0]=0;
+						data_to_be_send[1]=0;
+						UDD_Send(0, data_to_be_send, 2);
+					}
+				}
+				else if (CLEAR_FEATURE == r)
+				{
+				   // Check which is the selected feature
+					if( pSetupData->wValueL == 1) // DEVICEREMOTEWAKEUP
+					{
+						// Enable remote wake-up and send a ZLP
+						if( isRemoteWakeUpEnabled == 1 )
+							data_to_be_send[0]=1;
+						else
+							data_to_be_send[0]=0;
+						data_to_be_send[1]=0;
+						UDD_Send(0, data_to_be_send, 2);
+					}
+					else // if( pSetupData->wValueL == 0) // ENDPOINTHALT
+					{
+						isEndpointHalt = 0;
+						send_zlp();
+					}
+ 				}
+				else if (SET_FEATURE == r)
+				{
+					// Check which is the selected feature
+					if( pSetupData->wValueL == 1) // DEVICEREMOTEWAKEUP
+					{
+						// Enable remote wake-up and send a ZLP
+						isRemoteWakeUpEnabled = 1;
+	    				data_to_be_send[0] = 0;
+						UDD_Send(0, data_to_be_send, 1);
+					}
+					if( pSetupData->wValueL == 0) // ENDPOINTHALT
+					{
+						// Halt endpoint
+						isEndpointHalt = 1;
+						send_zlp();
+					}
+				}
+				else if (SET_ADDRESS == r)
+				{
+					TRACE_CORE(puts(">>> EP0 Int: SET_ADDRESS\r\n");)
+					UDD_SetAddress(pSetupData->wValueL);
+				}
+				else if (GET_DESCRIPTOR == r)
+				{
+					TRACE_CORE(puts(">>> EP0 Int: GET_DESCRIPTOR\r\n");)
+					ok = USBD_SendDescriptor(pSetupData);
+				}
+				else if (SET_DESCRIPTOR == r)
+				{
+					TRACE_CORE(puts(">>> EP0 Int: SET_DESCRIPTOR\r\n");)
+					ok = false;
+				}
+				else if (GET_CONFIGURATION == r)
+				{
+					TRACE_CORE(puts(">>> EP0 Int: GET_CONFIGURATION\r\n");)
+					UDD_Send(0, (void*)&_usbConfiguration, 1);
+				}
+				else if (SET_CONFIGURATION == r)
+				{
+					if (REQUEST_DEVICE == (pSetupData->bmRequestType & REQUEST_RECIPIENT))
+					{
+						TRACE_CORE(printf(">>> EP0 Int: SET_CONFIGURATION REQUEST_DEVICE %d\r\n", pSetupData->wValueL);)
+#ifdef HID_ENABLED
+						UDD_InitEP( HID_ENDPOINT_INT, USB_ENDPOINT_TYPE_INTERRUPT | USB_ENDPOINT_IN(0));
+#endif
+
+#ifdef CDC_ENABLED
+						UDD_InitEP( CDC_ENDPOINT_ACM, USB_ENDPOINT_TYPE_BULK | USB_ENDPOINT_IN(0));
+						UDD_InitEP( CDC_ENDPOINT_OUT, USB_ENDPOINT_TYPE_BULK | USB_ENDPOINT_OUT(0));
+						UDD_InitEP( CDC_ENDPOINT_IN, USB_ENDPOINT_TYPE_INTERRUPT | USB_ENDPOINT_IN(0));
+#endif
+						_usbConfiguration = pSetupData->wValueL;
+
+#ifdef CDC_ENABLED
+						// Enable interrupt for CDC reception from host (OUT packet)
+						udd_ept_enable_it_transf_cplt_in(CDC_ENDPOINT_ACM);
+						udd_ept_enable_it_transf_cplt_out(CDC_ENDPOINT_OUT);
+#endif
+						send_zlp();
+					}
+					else
+					{
+						TRACE_CORE(puts(">>> EP0 Int: SET_CONFIGURATION failed!\r\n");)
+						ok = false;
+					}
+				}
+				else if (GET_INTERFACE == r)
+				{
+					TRACE_CORE(puts(">>> EP0 Int: GET_INTERFACE\r\n");)
+					UDD_Send(0, (void*)&_usbSetInterface, 1);
+				}
+				else if (SET_INTERFACE == r)
+				{
+					_usbSetInterface = pSetupData->wValueL;
+					TRACE_CORE(puts(">>> EP0 Int: SET_INTERFACE\r\n");)
+					send_zlp();
+				}
+			}
+			else
+			{
+				TRACE_CORE(puts(">>> EP0 Int: ClassInterfaceRequest\r\n");)
+				ok =  USBD_ClassInterfaceRequest(*pSetupData);
+			}
+
+			if (ok)
+			{
+				TRACE_CORE(puts(">>> EP0 Int: Send packet\r\n");)
+				UDD_ClearIN();
+			}
+			else
+			{
+				TRACE_CORE(puts(">>> EP0 Int: Stall\r\n");)
+				UDD_Stall(0);
+			}
+
+			if( flags & USB_DEVICE_EPINTFLAG_STALL1 )
+			{
+				/* Clear the stall flag */
+				udd_clear_stall_request(0);
+
+				// Remove stall request
+				udd_remove_stall_request(0);
+			}
+		}  // end if USB_DEVICE_EPINTFLAG_RXSTP
+
+		i=0;
+		ept_int &= 0xFE;  // Remove endpoint number 0 (setup)
+		while (ept_int != 0)
+		{
+            // Check if endpoint has a pending interrupt
+            if ((ept_int & (1 << i)) != 0)
+			{
+				if( (udd_read_endpoint_flag(i) & USB_DEVICE_EPINTFLAG_TRCPT_Msk ) != 0 )
+				
+				{
+					EndpointHandler(i);
+				}
+                ept_int &= ~(1 << i);
+                
+                if (ept_int != 0)
+				{
+                
+                    TRACE_CORE("\n\r  - ");
+                }
+            }
+            i++;
+			if( i> USB_EPT_NUM) break;  // exit
+        }
+	}
+}
+
+
+
+void USBD_Flush(uint32_t ep)
+{
+	if (UDD_FifoByteCount(ep))
+	{
+		UDD_ReleaseTX(ep);
+	}
+}
+
+//	Counting frames
+uint32_t USBD_Connected(void)
+{
+	uint8_t f = UDD_GetFrameNumber();
+	return f != UDD_GetFrameNumber();
+}
+
+
+//=======================================================================
+//=======================================================================
+
+USBDevice_ USBDevice;
+
+USBDevice_::USBDevice_()
+{
+}
+
+bool USBDevice_::attach()
+{
+  if (_usbInitialized != 0UL)
+  {
+    UDD_Attach();
+	_usbConfiguration = 0;
+	return true;
+  }
+  else
+  {
+    return false;
+  }
+}
+
+bool USBDevice_::detach()
+{
+	if (_usbInitialized != 0UL)
+	{
+		UDD_Detach();
+		return true;
+	}
+	else
+	{
+		return false;
+	}
+}
+
+bool USBDevice_::configured()
+{
+	return _usbConfiguration;
+}
+
+void USBDevice_::poll()
+{
+}
+
+void USBDevice_::init()
+{
+	UDD_Init();
+	_usbInitialized=1UL;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBCore.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBCore.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBCore.h	(revision 136)
@@ -0,0 +1,312 @@
+// Copyright (c) 2010, Peter Barrett
+/*
+** Permission to use, copy, modify, and/or distribute this software for
+** any purpose with or without fee is hereby granted, provided that the
+** above copyright notice and this permission notice appear in all copies.
+**
+** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR
+** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES
+** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
+** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
+** SOFTWARE.
+*/
+
+#ifndef __USBCORE_H__
+#define __USBCORE_H__
+
+//	Standard requests
+#define GET_STATUS					0
+#define CLEAR_FEATURE				1
+#define SET_FEATURE					3
+#define SET_ADDRESS					5
+#define GET_DESCRIPTOR				6
+#define SET_DESCRIPTOR				7
+#define GET_CONFIGURATION			8
+#define SET_CONFIGURATION			9
+#define GET_INTERFACE				10
+#define SET_INTERFACE				11
+
+
+// bmRequestType
+#define REQUEST_HOSTTODEVICE		0x00
+#define REQUEST_DEVICETOHOST		0x80
+#define REQUEST_DIRECTION			0x80
+
+#define REQUEST_STANDARD			0x00
+#define REQUEST_CLASS				0x20
+#define REQUEST_VENDOR				0x40
+#define REQUEST_TYPE				0x60
+
+#define REQUEST_DEVICE				0x00
+#define REQUEST_INTERFACE			0x01
+#define REQUEST_ENDPOINT			0x02
+#define REQUEST_OTHER				0x03
+#define REQUEST_RECIPIENT			0x1F
+
+#define REQUEST_DEVICETOHOST_CLASS_INTERFACE  (REQUEST_DEVICETOHOST + REQUEST_CLASS + REQUEST_INTERFACE)
+#define REQUEST_HOSTTODEVICE_CLASS_INTERFACE  (REQUEST_HOSTTODEVICE + REQUEST_CLASS + REQUEST_INTERFACE)
+
+//	Class requests
+
+#define CDC_SET_LINE_CODING			0x20
+#define CDC_GET_LINE_CODING			0x21
+#define CDC_SET_CONTROL_LINE_STATE	0x22
+
+#define MSC_RESET					0xFF
+#define MSC_GET_MAX_LUN				0xFE
+
+#define HID_GET_REPORT				0x01
+#define HID_GET_IDLE				0x02
+#define HID_GET_PROTOCOL			0x03
+#define HID_SET_REPORT				0x09
+#define HID_SET_IDLE				0x0A
+#define HID_SET_PROTOCOL			0x0B
+
+//	Descriptors
+
+// #define USB_DEVICE_DESC_SIZE			18
+// #define USB_CONFIGUARTION_DESC_SIZE		9
+// #define USB_INTERFACE_DESC_SIZE			9
+// #define USB_ENDPOINT_DESC_SIZE			7
+
+#define USB_DEVICE_DESCRIPTOR_TYPE             1
+#define USB_CONFIGURATION_DESCRIPTOR_TYPE      2
+#define USB_STRING_DESCRIPTOR_TYPE             3
+#define USB_INTERFACE_DESCRIPTOR_TYPE          4
+#define USB_ENDPOINT_DESCRIPTOR_TYPE           5
+#define USB_DEVICE_QUALIFIER                   6
+#define USB_OTHER_SPEED_CONFIGURATION          7
+
+#define USB_DEVICE_CLASS_COMMUNICATIONS        0x02
+#define USB_DEVICE_CLASS_HUMAN_INTERFACE       0x03
+#define USB_DEVICE_CLASS_STORAGE               0x08
+#define USB_DEVICE_CLASS_VENDOR_SPECIFIC       0xFF
+
+#define USB_CONFIG_POWERED_MASK                0x40
+#define USB_CONFIG_BUS_POWERED                 0x80
+#define USB_CONFIG_SELF_POWERED                0xC0
+#define USB_CONFIG_REMOTE_WAKEUP               0x20
+
+// bMaxPower in Configuration Descriptor
+#define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
+
+#define CDC_V1_10                               0x0110
+#define CDC_COMMUNICATION_INTERFACE_CLASS       0x02
+
+#define CDC_CALL_MANAGEMENT                     0x01
+#define CDC_ABSTRACT_CONTROL_MODEL              0x02
+#define CDC_HEADER                              0x00
+#define CDC_ABSTRACT_CONTROL_MANAGEMENT         0x02
+#define CDC_UNION                               0x06
+#define CDC_CS_INTERFACE                        0x24
+#define CDC_CS_ENDPOINT                         0x25
+#define CDC_DATA_INTERFACE_CLASS                0x0A
+
+#define MSC_SUBCLASS_SCSI						0x06
+#define MSC_PROTOCOL_BULK_ONLY					0x50
+
+#define HID_HID_DESCRIPTOR_TYPE					0x21
+#define HID_REPORT_DESCRIPTOR_TYPE				0x22
+#define HID_PHYSICAL_DESCRIPTOR_TYPE			0x23
+
+#define TX_RX_LED_PULSE_MS 100     //----- Tx & Rx led blinking during transmission (declaration)
+
+_Pragma("pack(1)")
+
+//	Device
+typedef struct {
+	uint8_t len;				// 18
+	uint8_t dtype;				// 1 USB_DEVICE_DESCRIPTOR_TYPE
+	uint16_t usbVersion;		// 0x200
+	uint8_t	deviceClass;
+	uint8_t	deviceSubClass;
+	uint8_t	deviceProtocol;
+	uint8_t	packetSize0;		// Packet 0
+	uint16_t	idVendor;
+	uint16_t	idProduct;
+	uint16_t	deviceVersion;	// 0x100
+	uint8_t	iManufacturer;
+	uint8_t	iProduct;
+	uint8_t	iSerialNumber;
+	uint8_t	bNumConfigurations;
+} DeviceDescriptor;
+
+//	Config
+typedef struct {
+	uint8_t	len;			// 9
+	uint8_t	dtype;			// 2
+	uint16_t clen;			// total length
+	uint8_t	numInterfaces;
+	uint8_t	config;
+	uint8_t	iconfig;
+	uint8_t	attributes;
+	uint8_t	maxPower;
+} ConfigDescriptor;
+
+//	String
+
+//	Interface
+typedef struct
+{
+	uint8_t len;		// 9
+	uint8_t dtype;		// 4
+	uint8_t number;
+	uint8_t alternate;
+	uint8_t numEndpoints;
+	uint8_t interfaceClass;
+	uint8_t interfaceSubClass;
+	uint8_t protocol;
+	uint8_t iInterface;
+} InterfaceDescriptor;
+
+//	Endpoint
+typedef struct
+{
+	uint8_t len;		// 7
+	uint8_t dtype;		// 5
+	uint8_t addr;
+	uint8_t attr;
+	uint16_t packetSize;
+	uint8_t interval;
+} EndpointDescriptor;
+
+// Interface Association Descriptor
+// Used to bind 2 interfaces together in CDC compostite device
+typedef struct
+{
+	uint8_t len;				// 8
+	uint8_t dtype;				// 11
+	uint8_t firstInterface;
+	uint8_t interfaceCount;
+	uint8_t functionClass;
+	uint8_t funtionSubClass;
+	uint8_t functionProtocol;
+	uint8_t iInterface;
+} IADDescriptor;
+
+//	CDC CS interface descriptor
+typedef struct
+{
+	uint8_t len;		// 5
+	uint8_t dtype;		// 0x24
+	uint8_t subtype;
+	uint8_t d0;
+	uint8_t d1;
+} CDCCSInterfaceDescriptor;
+
+typedef struct
+{
+	uint8_t len;		// 4
+	uint8_t dtype;		// 0x24
+	uint8_t subtype;
+	uint8_t d0;
+} CDCCSInterfaceDescriptor4;
+
+typedef struct
+{
+    uint8_t	len;
+    uint8_t 	dtype;		// 0x24
+    uint8_t 	subtype;	// 1
+    uint8_t 	bmCapabilities;
+    uint8_t 	bDataInterface;
+} CMFunctionalDescriptor;
+
+typedef struct
+{
+    uint8_t	len;
+    uint8_t 	dtype;		// 0x24
+    uint8_t 	subtype;	// 1
+    uint8_t 	bmCapabilities;
+} ACMFunctionalDescriptor;
+
+typedef struct
+{
+#if (defined CDC_ENABLED) && defined(HID_ENABLED)
+	//	IAD
+	IADDescriptor				iad;	// Only needed on compound device
+#endif
+	//	Control
+	InterfaceDescriptor			cif;
+	CDCCSInterfaceDescriptor	header;
+	ACMFunctionalDescriptor		controlManagement;		// ACM
+	CDCCSInterfaceDescriptor	functionalDescriptor;	// CDC_UNION
+	CMFunctionalDescriptor		callManagement;			// Call Management
+	EndpointDescriptor			cifin;
+
+	//	Data
+	InterfaceDescriptor			dif;
+	EndpointDescriptor			in;
+	EndpointDescriptor			out;
+} CDCDescriptor;
+
+typedef struct
+{
+	InterfaceDescriptor			msc;
+	EndpointDescriptor			in;
+	EndpointDescriptor			out;
+} MSCDescriptor;
+
+typedef struct
+{
+	uint8_t len;			// 9
+	uint8_t dtype;			// 0x21
+	uint8_t addr;
+	uint8_t	versionL;		// 0x101
+	uint8_t	versionH;		// 0x101
+	uint8_t	country;
+	uint8_t	desctype;		// 0x22 report
+	uint8_t	descLenL;
+	uint8_t	descLenH;
+} HIDDescDescriptor;
+
+typedef struct
+{
+	InterfaceDescriptor		hid;
+	HIDDescDescriptor		desc;
+	EndpointDescriptor		in;
+} HIDDescriptor;
+
+_Pragma("pack()")
+
+#define D_DEVICE(_class,_subClass,_proto,_packetSize0,_vid,_pid,_version,_im,_ip,_is,_configs) \
+	{ 18, 1, 0x110, _class,_subClass,_proto,_packetSize0,_vid,_pid,_version,_im,_ip,_is,_configs }
+/* Table 9-8. Standard Device Descriptor
+ * bLength, bDescriptorType, bcdUSB, bDeviceClass, bDeviceSubClass, bDeviceProtocol, bMaxPacketSize0,
+ *    idVendor, idProduct, bcdDevice, iManufacturer, iProduct, iSerialNumber, bNumConfigurations */
+
+#define D_CONFIG(_totalLength,_interfaces) \
+	{ 9, 2, _totalLength,_interfaces, 1, 0, USB_CONFIG_SELF_POWERED, USB_CONFIG_POWER_MA(500) }
+/* Table 9-10. Standard Configuration Descriptor
+ * bLength, bDescriptorType, wTotalLength, bNumInterfaces, bConfigurationValue, iConfiguration
+ * bmAttributes, bMaxPower */
+ 
+#define D_INTERFACE(_n,_numEndpoints,_class,_subClass,_protocol) \
+	{ 9, 4, _n, 0, _numEndpoints, _class,_subClass, _protocol, 0 }
+/* Table 9-12. Standard Interface Descriptor
+ * bLength, bDescriptorType, bInterfaceNumber, bAlternateSetting, bNumEndpoints, bInterfaceClass,
+ * bInterfaceSubClass, bInterfaceProtocol, iInterface */
+ 
+#define D_ENDPOINT(_addr,_attr,_packetSize, _interval) \
+	{ 7, 5, _addr,_attr,_packetSize, _interval }
+/* Table 9-13. Standard Endpoint Descriptor
+ * bLength, bDescriptorType, bEndpointAddress, bmAttributes, wMaxPacketSize, bInterval */
+
+#define D_IAD(_firstInterface, _count, _class, _subClass, _protocol) \
+	{ 8, 11, _firstInterface, _count, _class, _subClass, _protocol, 0 }
+/* iadclasscode_r10.pdf, Table 9Z. Standard Interface Association Descriptor
+ * bLength, bDescriptorType, bFirstInterface, bInterfaceCount, bFunctionClass, bFunctionSubClass, bFunctionProtocol, iFunction */
+#define D_HIDREPORT(_descriptorLength) \
+	{ 9, 0x21, 0x1, 0x1, 0, 1, 0x22, _descriptorLength, 0 }
+/* HID1_11.pdf  E.8 HID Descriptor (Mouse)
+ * bLength, bDescriptorType, bcdHID, bCountryCode, bNumDescriptors, bDescriptorType, wItemLength */
+
+// Functional Descriptor General Format
+#define D_CDCCS(_subtype,_d0,_d1)	{ 5, 0x24, _subtype, _d0, _d1 }
+#define D_CDCCS4(_subtype,_d0)		{ 4, 0x24, _subtype, _d0 }
+/* bFunctionLength, bDescriptorType, bDescriptorSubtype, function specific data0, functional specific data N-1
+ * CS_INTERFACE 24h */
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBDesc.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBDesc.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USBDesc.h	(revision 136)
@@ -0,0 +1,39 @@
+// Copyright (c) 2010, Peter Barrett
+/*
+** Permission to use, copy, modify, and/or distribute this software for
+** any purpose with or without fee is hereby granted, provided that the
+** above copyright notice and this permission notice appear in all copies.
+**
+** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR
+** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES
+** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
+** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
+** SOFTWARE.
+*/
+
+#ifndef __USBDESC_H__
+#define __USBDESC_H__
+
+// CDC or HID can be enabled together.
+#define CDC_ENABLED
+#define HID_ENABLED
+
+// CDC
+#define CDC_ACM_INTERFACE	0	// CDC ACM
+#define CDC_DATA_INTERFACE	1	// CDC Data
+#define CDC_ENDPOINT_ACM	1
+#define CDC_ENDPOINT_OUT	2
+#define CDC_ENDPOINT_IN		3
+
+// HID
+#define HID_INTERFACE		2   // HID
+#define HID_ENDPOINT_INT	4  
+
+// Defined string description
+#define IMANUFACTURER	1
+#define IPRODUCT		2
+
+#endif /* __USBDESC_H__ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USB_device.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USB_device.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USB_device.h	(revision 136)
@@ -0,0 +1,73 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2011-2012, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+#ifndef USB_DEVICE_H_INCLUDED
+#define USB_DEVICE_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include "USB/samd21_device.h"
+
+
+// bEndpointAddress in Endpoint Descriptor
+#define USB_ENDPOINT_DIRECTION_MASK            0x80
+#define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
+#define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
+
+#define USB_ENDPOINT_TYPE_MASK                 0x03
+#define USB_ENDPOINT_TYPE_CONTROL              0x00
+#define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
+#define USB_ENDPOINT_TYPE_BULK                 0x02
+#define USB_ENDPOINT_TYPE_INTERRUPT            0x03
+
+
+extern void UDD_ClearIN(void);
+extern uint32_t UDD_FifoByteCount(uint32_t ep);
+extern void UDD_ReleaseRX(uint32_t ep);
+extern void UDD_ReleaseTX(uint32_t ep);
+extern uint32_t UDD_Send(uint32_t ep, const void* data, uint32_t len);
+extern uint8_t UDD_Recv8(uint32_t ep);
+extern void UDD_Recv(uint32_t ep, uint8_t** data);
+extern void UDD_Init(void);
+extern void UDD_InitEP( uint32_t ul_ep, uint32_t ul_ep_cfg );
+extern void send_zlp (void);
+extern void UDD_Attach(void);
+extern void UDD_Detach(void);
+extern void UDD_SetAddress(uint32_t addr);
+extern void UDD_Stall(uint32_t ep);
+extern uint32_t UDD_GetFrameNumber(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* USB_DEVICE_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USB_host.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USB_host.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/USB_host.h	(revision 136)
@@ -0,0 +1,78 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2011-2012, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+#ifndef USB_HOST_H_INCLUDED
+#define USB_HOST_H_INCLUDED
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define tokSETUP		UOTGHS_HSTPIPCFG_PTOKEN_SETUP
+#define tokIN			UOTGHS_HSTPIPCFG_PTOKEN_IN
+#define tokOUT			UOTGHS_HSTPIPCFG_PTOKEN_OUT
+#define tokINHS			UOTGHS_HSTPIPCFG_PTOKEN_IN
+#define tokOUTHS		UOTGHS_HSTPIPCFG_PTOKEN_OUT
+
+//! \brief Device speed
+/*typedef enum {
+	UHD_SPEED_LOW  = 0,
+	UHD_SPEED_FULL = 1,
+	UHD_SPEED_HIGH = 2,
+} uhd_speed_t;*/
+
+//! States of USBB interface
+typedef enum {
+	UHD_STATE_NO_VBUS = 0,
+	UHD_STATE_DISCONNECTED = 1,
+	UHD_STATE_CONNECTED = 2,
+	UHD_STATE_ERROR = 3,
+} uhd_vbus_state_t;
+
+//extern uhd_speed_t uhd_get_speed(void);
+
+extern void UHD_SetStack(void (*pf_isr)(void));
+extern void UHD_Init(void);
+extern void UHD_BusReset(void);
+extern uhd_vbus_state_t UHD_GetVBUSState(void);
+extern uint32_t UHD_Pipe0_Alloc(uint32_t ul_add, uint32_t ul_ep_size);
+extern uint32_t UHD_Pipe_Alloc(uint32_t ul_dev_addr, uint32_t ul_dev_ep, uint32_t ul_type, uint32_t ul_dir, uint32_t ul_maxsize, uint32_t ul_interval, uint32_t ul_nb_bank);
+extern void UHD_Pipe_Free(uint32_t ul_pipe);
+extern uint32_t UHD_Pipe_Read(uint32_t ul_pipe, uint32_t ul_size, uint8_t* data);
+extern void UHD_Pipe_Write(uint32_t ul_pipe, uint32_t ul_size, uint8_t* data);
+extern void UHD_Pipe_Send(uint32_t ul_pipe, uint32_t ul_token_type);
+extern uint32_t UHD_Pipe_Is_Transfer_Complete(uint32_t ul_pipe, uint32_t ul_token_type);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* USB_HOST_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_device.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_device.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_device.c	(revision 136)
@@ -0,0 +1,348 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2011-2012, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "variant.h"
+#include "USB/USB_device.h"
+#include "USB/samd21_device.h"
+#include "sam.h"
+
+#ifdef __cplusplus
+extern "C"{
+#endif // __cplusplus
+
+#ifdef SAMD_SERIES
+
+//#define TRACE_DEVICE(x)	x
+#define TRACE_DEVICE(x)
+
+__attribute__((__aligned__(4)))   __attribute__((__section__(".bss_hram0"))) uint8_t udd_ep_out_cache_buffer[4][64];
+__attribute__((__aligned__(4)))   __attribute__((__section__(".bss_hram0"))) uint8_t udd_ep_in_cache_buffer[4][128];
+
+/**
+ * USB SRAM data containing pipe descriptor table
+ * The content of the USB SRAM can be :
+ * - modified by USB hardware interface to update pipe status.
+ *   Thereby, it is read by software.
+ * - modified by USB software to control pipe.
+ *   Thereby, it is read by hardware.
+ * This data section is volatile.
+ */
+ __attribute__((__aligned__(4))) UsbDeviceDescriptor usb_endpoint_table[USB_EPT_NUM];
+
+// NVM Software Calibration Area Mapping
+// USB TRANSN calibration value. Should be written to the USB PADCAL register.
+#define NVM_USB_PAD_TRANSN_POS  45
+#define NVM_USB_PAD_TRANSN_SIZE 5
+// USB TRANSP calibration value. Should be written to the USB PADCAL register.
+#define NVM_USB_PAD_TRANSP_POS  50
+#define NVM_USB_PAD_TRANSP_SIZE 5
+// USB TRIM calibration value. Should be written to the USB PADCAL register.
+#define NVM_USB_PAD_TRIM_POS  55
+#define NVM_USB_PAD_TRIM_SIZE 3
+
+void UDD_Init(void)
+{
+	uint32_t pad_transn;
+    uint32_t pad_transp;
+    uint32_t pad_trim;
+	uint32_t i;
+
+	/* Enable USB clock */
+	PM->APBBMASK.reg |= PM_APBBMASK_USB;
+
+	/* Set up the USB DP/DN pins */
+	PORT->Group[0].PINCFG[PIN_PA24G_USB_DM].bit.PMUXEN = 1;
+	PORT->Group[0].PMUX[PIN_PA24G_USB_DM/2].reg &= ~(0xF << (4 * (PIN_PA24G_USB_DM & 0x01u)));
+	PORT->Group[0].PMUX[PIN_PA24G_USB_DM/2].reg |= MUX_PA24G_USB_DM << (4 * (PIN_PA24G_USB_DM & 0x01u));
+	PORT->Group[0].PINCFG[PIN_PA25G_USB_DP].bit.PMUXEN = 1;
+	PORT->Group[0].PMUX[PIN_PA25G_USB_DP/2].reg &= ~(0xF << (4 * (PIN_PA25G_USB_DP & 0x01u)));
+	PORT->Group[0].PMUX[PIN_PA25G_USB_DP/2].reg |= MUX_PA25G_USB_DP << (4 * (PIN_PA25G_USB_DP & 0x01u));
+
+	/* ----------------------------------------------------------------------------------------------
+	 * Put Generic Clock Generator 0 as source for Generic Clock Multiplexer 6 (USB reference)
+	 */
+	GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( 6 ) | // Generic Clock Multiplexer 6
+					GCLK_CLKCTRL_GEN_GCLK0 | // Generic Clock Generator 0 is source
+					GCLK_CLKCTRL_CLKEN ;
+
+	while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
+	{
+	/* Wait for synchronization */
+	}
+
+	/* Reset */
+	USB->DEVICE.CTRLA.bit.SWRST = 1;
+	while (USB->DEVICE.SYNCBUSY.bit.SWRST) {
+		/* Sync wait */
+	}
+
+	udd_enable();
+
+	/* Load Pad Calibration */
+	pad_transn =( *((uint32_t *)(NVMCTRL_OTP4)  // Non-Volatile Memory Controller
+	+ (NVM_USB_PAD_TRANSN_POS / 32))
+	>> (NVM_USB_PAD_TRANSN_POS % 32))
+	& ((1 << NVM_USB_PAD_TRANSN_SIZE) - 1);
+
+	if (pad_transn == 0x1F) {  // maximum value (31)
+		pad_transn = 5;
+	}
+
+	USB->DEVICE.PADCAL.bit.TRANSN = pad_transn;
+
+	pad_transp =( *((uint32_t *)(NVMCTRL_OTP4)
+	+ (NVM_USB_PAD_TRANSP_POS / 32))
+	>> (NVM_USB_PAD_TRANSP_POS % 32))
+	& ((1 << NVM_USB_PAD_TRANSP_SIZE) - 1);
+
+	if (pad_transp == 0x1F) {  // maximum value (31)
+		pad_transp = 29;
+	}
+
+	USB->DEVICE.PADCAL.bit.TRANSP = pad_transp;
+
+	pad_trim =( *((uint32_t *)(NVMCTRL_OTP4)
+	+ (NVM_USB_PAD_TRIM_POS / 32))
+	>> (NVM_USB_PAD_TRIM_POS % 32))
+	& ((1 << NVM_USB_PAD_TRIM_SIZE) - 1);
+
+	if (pad_trim == 0x7) {  // maximum value (7)
+		pad_trim = 3;
+	}
+
+	USB->DEVICE.PADCAL.bit.TRIM = pad_trim;
+
+	/* Set the configuration */
+	udd_force_device_mode();
+	udd_device_run_in_standby();
+    // Set address of USB SRAM
+	USB->DEVICE.DESCADD.reg = (uint32_t)(&usb_endpoint_table[0]);
+	// For USB_SPEED_FULL 
+	udd_force_full_speed();
+ 	for (i = 0; i < sizeof(usb_endpoint_table)/4; i++) {
+		(*(uint32_t *)((uint32_t *)(&usb_endpoint_table[0])+i)) = 0;
+ 	}
+
+	// Configure interrupts
+	NVIC_SetPriority((IRQn_Type) USB_IRQn, 0UL);
+	NVIC_EnableIRQ((IRQn_Type) USB_IRQn);
+}
+
+void UDD_Attach(void)
+{
+	TRACE_DEVICE(printf("=> UDD_Attach\r\n");)
+
+    // Authorize attach if Vbus is present
+	udd_attach_device();
+
+	// Enable USB line events
+	udd_enable_reset_interrupt();
+
+    // usefull for debug
+    udd_enable_sof_interrupt();
+}
+
+void UDD_Detach(void)
+{
+	TRACE_DEVICE(printf("=> UDD_Detach\r\n");)
+    udd_detach_device();
+}
+
+void send_zlp(void)
+{
+	/* Set the byte count as zero */
+	usb_endpoint_table[0].DeviceDescBank[1].PCKSIZE.bit.BYTE_COUNT = 0;
+}
+
+
+void UDD_InitEP( uint32_t ul_ep_nb, uint32_t ul_ep_cfg )
+{
+	TRACE_DEVICE(printf("=> UDD_InitEP : init EP %lu\r\n", (unsigned long)ul_ep_nb);)
+
+	if( ul_ep_cfg == (USB_ENDPOINT_TYPE_INTERRUPT | USB_ENDPOINT_IN(0)) )
+	{
+		USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPCFG.reg = USB_DEVICE_EPCFG_EPTYPE1(4);
+		/* Set maximum packet size as 8 bytes */
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[1].PCKSIZE.bit.SIZE = 0;  // 8 bytes
+		/* Configure the data buffer */
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[1].ADDR.reg = (uint32_t)&udd_ep_in_cache_buffer[ul_ep_nb];
+	}
+	else if( ul_ep_cfg == (USB_ENDPOINT_TYPE_BULK | USB_ENDPOINT_OUT(0)) )
+	{
+		/* Configure BULK OUT endpoint for CDC Data interface*/
+		USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPCFG.reg = USB_DEVICE_EPCFG_EPTYPE0(3);
+		/* Set maximum packet size as 64 bytes */
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[0].PCKSIZE.bit.SIZE = 0x3;  // for 64 bytes
+		/* Configure the data buffer */
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[0].ADDR.reg = (uint32_t)&udd_ep_out_cache_buffer[ul_ep_nb];
+
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = 64;
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[0].PCKSIZE.bit.BYTE_COUNT = 0;
+		// NACK if not ready
+	    USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_BK0RDY;
+	}
+	else if( ul_ep_cfg == (USB_ENDPOINT_TYPE_BULK | USB_ENDPOINT_IN(0)) )
+	{
+		/* Configure BULK IN endpoint for CDC Data interface */
+		USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPCFG.reg = USB_DEVICE_EPCFG_EPTYPE1(3);
+		/* Set maximum packet size as 64 bytes */
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[1].PCKSIZE.bit.SIZE = 0x3;  // for 64 bytes
+		/* Configure the data buffer */
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[1].ADDR.reg = (uint32_t)&udd_ep_in_cache_buffer[ul_ep_nb];
+		// NACK if not ready
+		USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_BK1RDY;
+	}
+	else if( ul_ep_cfg == USB_ENDPOINT_TYPE_CONTROL )
+	{
+		/* Configure CONTROL endpoint */
+		USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPCFG.reg = USB_DEVICE_EPCFG_EPTYPE0(1) | USB_DEVICE_EPCFG_EPTYPE1(1);
+		USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_BK0RDY;
+		USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_BK1RDY;
+
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[0].PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP;
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[1].PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP;
+
+		/* Set maximum packet size as 64 bytes */
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[0].PCKSIZE.bit.SIZE = 0x3;  // for 64 bytes
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[1].PCKSIZE.bit.SIZE = 0x3;  // for 64 bytes
+
+		/* get endpoint configuration from setting register */
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[0].ADDR.reg = (uint32_t)&udd_ep_out_cache_buffer[0];
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = 16;
+		usb_endpoint_table[ul_ep_nb].DeviceDescBank[0].PCKSIZE.bit.BYTE_COUNT = 0;
+
+		// NACK if not ready
+		USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_BK0RDY;
+		USB->DEVICE.DeviceEndpoint[ul_ep_nb].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_BK1RDY;
+	}
+}
+
+
+// Send packet.
+void UDD_ClearIN(void)
+{
+	USB->DEVICE.DeviceEndpoint[EP0].EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_BK1RDY;
+}
+
+
+
+uint32_t UDD_Send(uint32_t ep, const void* data, uint32_t len)
+{
+	memcpy(&udd_ep_in_cache_buffer[ep], data, len);
+
+	/* Get endpoint configuration from setting register */
+	usb_endpoint_table[ep].DeviceDescBank[1].ADDR.reg = (uint32_t)&udd_ep_in_cache_buffer[ep];
+	usb_endpoint_table[ep].DeviceDescBank[1].PCKSIZE.bit.MULTI_PACKET_SIZE = 0;
+	usb_endpoint_table[ep].DeviceDescBank[1].PCKSIZE.bit.BYTE_COUNT = len;
+
+	return len;
+}
+
+uint8_t UDD_Recv8(uint32_t ep)
+{
+	TRACE_DEVICE(printf("=> UDD_Recv8 : ep=%d\r\n", (char)ep);)
+
+    usb_endpoint_table[ep].DeviceDescBank[0].ADDR.reg = (uint32_t)&udd_ep_out_cache_buffer[ep];
+	usb_endpoint_table[ep].DeviceDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = 8;
+	usb_endpoint_table[ep].DeviceDescBank[0].PCKSIZE.bit.BYTE_COUNT = 0;
+	USB->DEVICE.DeviceEndpoint[ep].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_BK0RDY;
+	TRACE_DEVICE(printf("=> UDD_Recv8 : data=%lu\r\n", (unsigned long)data);)
+
+	/* Wait for transfer to complete */
+	while (!( USB->DEVICE.DeviceEndpoint[ep].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT0 ));
+	/* Clear Transfer complete 0 flag */
+	USB->DEVICE.DeviceEndpoint[ep].EPINTFLAG.bit.TRCPT0 = 1;
+
+	return udd_ep_out_cache_buffer[ep][0];
+}
+
+void UDD_Recv(uint32_t ep, uint8_t** ppData)
+{
+	*ppData = udd_ep_out_cache_buffer[ep];
+}
+
+void UDD_Stall(uint32_t ep)
+{
+	uint8_t ep_num = ep;
+
+	// Stall endpoint
+	USB->DEVICE.DeviceEndpoint[ep_num].EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1;
+}
+
+uint32_t UDD_FifoByteCount(uint32_t ep)
+{
+	return ((uint16_t)(usb_endpoint_table[ep].DeviceDescBank[0].PCKSIZE.bit.BYTE_COUNT));
+}
+
+void UDD_ReleaseRX(uint32_t ep)
+{
+	TRACE_DEVICE(puts("=> UDD_ReleaseRX\r\n");)
+	USB->DEVICE.DeviceEndpoint[ep].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_BK0RDY;
+    USB->DEVICE.DeviceEndpoint[ep].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0;
+}
+
+void UDD_ReleaseTX(uint32_t ep)
+{
+	TRACE_DEVICE(printf("=> UDD_ReleaseTX ep=%lu\r\n", (unsigned long)ep);)
+    USB->DEVICE.DeviceEndpoint[ep].EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_BK1RDY;
+    USB->DEVICE.DeviceEndpoint[ep].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1;
+}
+
+void UDD_SetAddress(uint32_t addr)
+{
+	TRACE_DEVICE(printf("=> UDD_SetAddress : setting address to %lu\r\n", (unsigned long)addr);)
+
+	/* Set the byte count as zero */
+	usb_endpoint_table[0].DeviceDescBank[1].PCKSIZE.bit.BYTE_COUNT = 0;
+ 	/* Clear the transfer complete flag  */
+ 	USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.bit.TRCPT1 = 1;
+	/* Set the bank as ready */
+	USB->DEVICE.DeviceEndpoint[0].EPSTATUSSET.bit.BK1RDY = 1;
+
+	/* Wait for transfer to complete */
+	while (!( USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1 )) {}
+
+	udd_configure_address(addr);
+}
+
+uint32_t UDD_GetFrameNumber(void)
+{
+	return udd_frame_number();
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SAMD_SERIES */
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_device.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_device.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_device.h	(revision 136)
@@ -0,0 +1,112 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2011-2012, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+#ifndef SAMD21_DEVICE_H_INCLUDED
+#define SAMD21_DEVICE_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define EP0				0
+#define EPX_SIZE		64// 64 for Full Speed, EPT size max is 1024
+
+// Force device low speed mode
+#define udd_force_low_speed()               USB->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_SPDCONF_Msk; USB->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_SPDCONF_1_Val
+// Force full speed mode
+#define udd_force_full_speed()              USB->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_SPDCONF_Msk
+
+// Attaches to USB bus
+#define udd_attach_device()                  USB->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_DETACH
+#define udd_detach_device()                  USB->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_DETACH
+
+// Manage reset event
+// Set when a USB "End of Reset" has been detected
+#define udd_enable_reset_interrupt()              USB->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_EORST
+#define udd_ack_reset()                           USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORST
+#define Is_udd_reset()                            (USB->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_EORST)
+
+// Manage start of frame (SOF) event
+#define udd_enable_sof_interrupt()                USB->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SOF
+#define udd_ack_sof()                             USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SOF
+#define Is_udd_sof()                              (USB->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_SOF)
+#define udd_frame_number()                        ((USB->DEVICE.FNUM.reg & USB_DEVICE_FNUM_FNUM_Msk) >> USB_DEVICE_FNUM_FNUM_Pos)
+
+// configures the USB device address and enable it.
+#define udd_configure_address(address)            USB->DEVICE.DADD.reg = USB_DEVICE_DADD_ADDEN | address
+
+// Enables SETUP received interrupt
+#define udd_enable_setup_received_interrupt(ep)   USB->DEVICE.DeviceEndpoint[ep].EPINTENSET.reg = USB_DEVICE_EPINTFLAG_RXSTP
+// ACKs OUT received
+#define udd_ack_out_received(ep)                  USB->DEVICE.DeviceEndpoint[ep].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_BK0RDY
+// ACKs OUT received
+#define udd_ack_in_received(ep)                   USB->DEVICE.DeviceEndpoint[ep].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_BK1RDY
+// Is transfert completed ?
+#define udd_is_transf_cplt(ep)                   (USB->DEVICE.DeviceEndpoint[ep].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1)
+// Clear the transfer complete flag
+#define udd_clear_transf_cplt(ep)                 USB->DEVICE.DeviceEndpoint[ep].EPINTFLAG.bit.TRCPT1 = 1
+// Set the bank as ready
+#define udd_bk_rdy(ep)                            USB->DEVICE.DeviceEndpoint[ep].EPSTATUSSET.bit.BK1RDY = 1
+#define udd_read_endpoint_flag(ep)                USB->DEVICE.DeviceEndpoint[ep].EPINTFLAG.reg
+// Enable interrupt transfer complete
+#define udd_ept_enable_it_transf_cplt_in(ep)      USB->DEVICE.DeviceEndpoint[ep].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1
+#define udd_ept_enable_it_transf_cplt_out(ep)     USB->DEVICE.DeviceEndpoint[ep].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0
+// Clear the stall flag
+#define udd_clear_stall_request(ep)			      USB->DEVICE.DeviceEndpoint[ep].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL1
+// Remove stall 
+#define udd_remove_stall_request(ep)		      USB->DEVICE.DeviceEndpoint[ep].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ1
+
+// Endpoint Interrupt Summary
+#define udd_endpoint_interrupt()            USB->DEVICE.EPINTSMRY.reg
+
+#define udd_clear_wakeup_interrupt()        USB->DEVICE.INTENCLR.reg = USB_DEVICE_INTENCLR_WAKEUP
+#define udd_clear_eorsm_interrupt()         USB->DEVICE.INTENCLR.reg = USB_DEVICE_INTENCLR_EORSM
+#define udd_clear_suspend_interrupt()       USB->DEVICE.INTENCLR.reg = USB_DEVICE_INTENCLR_SUSPEND
+
+
+
+// Force device mode
+#define udd_force_device_mode()             USB->DEVICE.CTRLA.reg &= ~USB_CTRLA_MODE
+// Run in Standby
+#define udd_device_run_in_standby()         USB->DEVICE.CTRLA.reg |= USB_CTRLA_RUNSTDBY 
+// Force host mode
+#define udd_force_host_mode()               USB->DEVICE.CTRLA.reg |= USB_CTRLA_MODE
+
+
+// Enable USB macro
+#define udd_enable()                        USB->DEVICE.CTRLA.reg |= USB_CTRLA_ENABLE
+// Disable USB macro
+#define udd_disable()                       USB->DEVICE.CTRLA.reg &= ~USB_CTRLA_ENABLE
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SAMD21_DEVICE_H_INCLUDED */
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_host.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_host.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_host.c	(revision 136)
@@ -0,0 +1,486 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2011-2012, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+#include <stdio.h>
+
+#ifdef HOST_DEFINED
+
+//#define TRACE_UOTGHS_HOST(x)	x
+#define TRACE_UOTGHS_HOST(x)
+
+//extern void (*gpf_isr)(void);
+
+// Handle UOTGHS Host driver state
+static uhd_vbus_state_t uhd_state = UHD_STATE_NO_VBUS;
+
+ __attribute__((__aligned__(4))) UsbHostDescriptor usb_pipe_table[USB_EPT_NUM];
+
+
+// NVM Software Calibration Area Mapping
+// USB TRANSN calibration value. Should be written to the USB PADCAL register.
+#define NVM_USB_PAD_TRANSN_POS  45
+#define NVM_USB_PAD_TRANSN_SIZE 5
+// USB TRANSP calibration value. Should be written to the USB PADCAL register.
+#define NVM_USB_PAD_TRANSP_POS  50
+#define NVM_USB_PAD_TRANSP_SIZE 5
+// USB TRIM calibration value. Should be written to the USB PADCAL register.
+#define NVM_USB_PAD_TRIM_POS  55
+#define NVM_USB_PAD_TRIM_SIZE 3
+
+/**
+ * \brief Initialize the SAMD21 host driver.
+ */
+void UHD_Init(void)
+{
+	uint32_t pad_transn;
+    uint32_t pad_transp;
+    uint32_t pad_trim;
+
+	/* Enable USB clock */
+	PM->APBBMASK.reg |= PM_APBBMASK_USB;
+
+	/* Set up the USB DP/DN pins */
+	PORT->Group[0].PINCFG[PIN_PA24G_USB_DM].bit.PMUXEN = 1;
+	PORT->Group[0].PMUX[PIN_PA24G_USB_DM/2].reg &= ~(0xF << (4 * (PIN_PA24G_USB_DM & 0x01u)));
+	PORT->Group[0].PMUX[PIN_PA24G_USB_DM/2].reg |= MUX_PA24G_USB_DM << (4 * (PIN_PA24G_USB_DM & 0x01u));
+	PORT->Group[0].PINCFG[PIN_PA25G_USB_DP].bit.PMUXEN = 1;
+	PORT->Group[0].PMUX[PIN_PA25G_USB_DP/2].reg &= ~(0xF << (4 * (PIN_PA25G_USB_DP & 0x01u)));
+	PORT->Group[0].PMUX[PIN_PA25G_USB_DP/2].reg |= MUX_PA25G_USB_DP << (4 * (PIN_PA25G_USB_DP & 0x01u));
+
+	/* ----------------------------------------------------------------------------------------------
+	 * Put Generic Clock Generator 0 as source for Generic Clock Multiplexer 6 (USB reference)
+	 */
+	GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( 6 ) | // Generic Clock Multiplexer 6
+					GCLK_CLKCTRL_GEN_GCLK0 | // Generic Clock Generator 0 is source
+					GCLK_CLKCTRL_CLKEN ;
+
+	while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
+	{
+	/* Wait for synchronization */
+	}
+
+	/* Reset */
+	USB->HOST.CTRLA.bit.SWRST = 1;
+	while (USB->HOST.SYNCBUSY.bit.SWRST) {
+		/* Sync wait */
+	}
+
+	udd_enable();
+
+	/* Load Pad Calibration */
+	pad_transn =( *((uint32_t *)(NVMCTRL_OTP4)  // Non-Volatile Memory Controller
+	+ (NVM_USB_PAD_TRANSN_POS / 32))
+	>> (NVM_USB_PAD_TRANSN_POS % 32))
+	& ((1 << NVM_USB_PAD_TRANSN_SIZE) - 1);
+
+	if (pad_transn == 0x1F) {  // maximum value (31)
+		pad_transn = 5;
+	}
+
+	USB->HOST.PADCAL.bit.TRANSN = pad_transn;
+
+	pad_transp =( *((uint32_t *)(NVMCTRL_OTP4)
+	+ (NVM_USB_PAD_TRANSP_POS / 32))
+	>> (NVM_USB_PAD_TRANSP_POS % 32))
+	& ((1 << NVM_USB_PAD_TRANSP_SIZE) - 1);
+
+	if (pad_transp == 0x1F) {  // maximum value (31)
+		pad_transp = 29;
+	}
+
+	USB->HOST.PADCAL.bit.TRANSP = pad_transp;
+
+	pad_trim =( *((uint32_t *)(NVMCTRL_OTP4)
+	+ (NVM_USB_PAD_TRIM_POS / 32))
+	>> (NVM_USB_PAD_TRIM_POS % 32))
+	& ((1 << NVM_USB_PAD_TRIM_SIZE) - 1);
+
+	if (pad_trim == 0x7) {  // maximum value (7)
+		pad_trim = 3;
+	}
+
+	USB->HOST.PADCAL.bit.TRIM = pad_trim;
+
+	/* Set the configuration */
+	udd_force_host_mode();
+	udd_device_run_in_standby();
+    // Set address of USB SRAM
+	USB->HOST.DESCADD.reg = (uint32_t)(&usb_endpoint_table[0]);
+	// For USB_SPEED_FULL 
+	udd_force_full_speed();
+ 	for (uint32_t i = 0; i < sizeof(usb_endpoint_table); i++) {
+ 		(*(uint32_t *)(&usb_endpoint_table[0]+i)) = 0;
+ 	}
+
+	uhd_state = UHD_STATE_NO_VBUS;
+
+	USB->HOST.CTRLB.bit.VBUSOK = 1;
+
+	// Configure interrupts
+	NVIC_SetPriority((IRQn_Type) USB_IRQn, 0UL);
+	NVIC_EnableIRQ((IRQn_Type) USB_IRQn);
+}
+
+//static void UHD_ISR(void)
+void USB_Handler(void)
+{
+	uint16_t flags;
+	uint8_t i;
+	uint8_t ept_int;
+
+	ept_int = udd_endpoint_interrupt();
+	
+	/* Not endpoint interrupt */
+	if (0 == ept_int)
+	{
+
+
+	}
+	else
+	{
+		/* host interrupts */
+
+		/* get interrupt flags */
+		flags = USB->HOST.INTFLAG.reg;
+
+		/* host SOF interrupt */
+		if (flags & USB_HOST_INTFLAG_HSOF) {
+			/* clear the flag */
+			USB->HOST.INTFLAG.reg = USB_HOST_INTFLAG_HSOF;
+			uhd_state = UHD_STATE_CONNECTED;
+			return;
+		}
+
+		/* host reset interrupt */
+		if (flags & USB_HOST_INTFLAG_RST) {
+			/* clear the flag */
+			USB->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RST;
+			uhd_state = UHD_STATE_DISCONNECTED; //UHD_STATE_ERROR;
+			return;
+		}
+
+		/* host upstream resume interrupts */
+		if (flags & USB_HOST_INTFLAG_UPRSM) {
+			/* clear the flags */
+			USB->HOST.INTFLAG.reg = USB_HOST_INTFLAG_UPRSM;
+			uhd_state = UHD_STATE_DISCONNECTED; //UHD_STATE_ERROR;
+			return;
+		}
+
+		/* host downstream resume interrupts */
+		if (flags & USB_HOST_INTFLAG_DNRSM) {
+			/* clear the flags */
+			USB->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DNRSM;
+			uhd_state = UHD_STATE_DISCONNECTED; //UHD_STATE_ERROR;
+			return;
+		}
+
+		/* host wakeup interrupts */
+		if (flags & USB_HOST_INTFLAG_WAKEUP) {
+			/* clear the flags */
+			USB->HOST.INTFLAG.reg = USB_HOST_INTFLAG_WAKEUP;
+			uhd_state = UHD_STATE_CONNECTED; //UHD_STATE_ERROR;
+			return;
+		}
+
+		/* host ram access interrupt  */
+		if (flags & USB_HOST_INTFLAG_RAMACER) {
+			/* clear the flag */
+			USB->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RAMACER;
+			uhd_state = UHD_STATE_DISCONNECTED; //UHD_STATE_ERROR;
+			return;
+		}
+
+		/* host connect interrupt */
+		if (flags & USB_HOST_INTFLAG_DCONN) {
+			TRACE_UOTGHS_HOST(printf(">>> UHD_ISR : Connection INT\r\n");)
+			/* clear the flag */
+			uhd_ack_connection();
+			uhd_disable_connection_int();
+			uhd_ack_disconnection();
+			uhd_enable_disconnection_int();
+			//uhd_enable_sof();
+			uhd_state = UHD_STATE_CONNECTED;
+			return;
+		}
+
+		/* host disconnect interrupt 	*/
+		if (flags & USB_HOST_INTFLAG_DDISC) {
+			TRACE_UOTGHS_HOST(printf(">>> UHD_ISR : Disconnection INT\r\n");)
+			/* clear the flag */
+			uhd_ack_disconnection();
+			uhd_disable_disconnection_int();
+			// Stop reset signal, in case of disconnection during reset
+			uhd_stop_reset();
+			// Disable wakeup/resumes interrupts,
+			// in case of disconnection during suspend mode
+			uhd_ack_connection();
+			uhd_enable_connection_int();
+			uhd_state = UHD_STATE_DISCONNECTED;
+			return;
+		}
+
+	}
+
+}
+
+
+
+
+/**
+ * \brief Trigger a USB bus reset.
+ */
+void UHD_BusReset(void)
+{
+	USB->HOST.CTRLB.bit.BUSRESET = 1;;
+}
+
+/**
+ * \brief Get VBUS state.
+ *
+ * \return VBUS status.
+ */
+uhd_vbus_state_t UHD_GetVBUSState(void)
+{
+	return uhd_state;
+}
+
+
+
+/**
+ * \brief Allocate FIFO for pipe 0.
+ *
+ * \param ul_add Address of remote device for pipe 0.
+ * \param ul_ep_size Actual size of the FIFO in bytes.
+ *
+ * \retval 0 success.
+ * \retval 1 error.
+ */
+uint32_t UHD_Pipe0_Alloc(uint32_t ul_add, uint32_t ul_ep_size)
+{
+	struct usb_host_pipe_config cfg;
+
+	if (ep_size < 8)
+	{
+		return 0;
+	}
+
+	/* set pipe config */
+	USB->HOST.HostPipe[0].PCFG.bit.BK = 0;
+	USB->HOST.HostPipe[0].PCFG.bit.PTYPE = USB_HOST_PIPE_TYPE_CONTROL;
+	USB->HOST.HostPipe[0].BINTERVAL.reg = 0;
+	USB->HOST.HostPipe[0].PCFG.bit.PTOKEN = USB_HOST_PIPE_TOKEN_SETUP;
+
+	memset((uint8_t *)&usb_pipe_table[pipe_num], 0, sizeof(usb_pipe_table[0]));
+	usb_pipe_table[pipe_num].HostDescBank[0].CTRL_PIPE.bit.PDADDR = 0;
+	usb_pipe_table[pipe_num].HostDescBank[0].CTRL_PIPE.bit.PEPNUM = 0;
+	usb_pipe_table[pipe_num].HostDescBank[0].PCKSIZE.bit.SIZE = 0x03;  // 64 bytes
+
+	USB->HOST.HostPipe[pipe_num].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT_Msk;
+	USB->HOST.HostPipe[pipe_num].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL | USB_HOST_PINTENSET_PERR;
+	USB->HOST.HostPipe[pipe_num].PINTENSET.reg = USB_HOST_PINTENSET_TXSTP;
+	USB->HOST.HostPipe[pipe_num].PINTENSET.reg = USB_HOST_PINTENSET_STALL;
+
+	return 1;
+}
+
+/**
+ * \brief Allocate a new pipe.
+ *
+ * \note UOTGHS maximum pipe number is limited to 10, meaning that only a limited
+ * amount of devices can be connected. Unfortunately, using only one pipe shared accross
+ * various endpoints and devices is not possible because the UOTGHS IP does not allow to
+ * change the data toggle value through register interface.
+ *
+ * \param ul_dev_addr Address of remote device.
+ * \param ul_dev_ep Targeted endpoint of remote device.
+ * \param ul_type Pipe type.
+ * \param ul_dir Pipe direction.
+ * \param ul_maxsize Pipe size.
+ * \param ul_interval Polling interval (if applicable to pipe type).
+ * \param ul_nb_bank Number of banks associated with this pipe.
+ *
+ * \return the newly allocated pipe number on success, 0 otherwise.
+ */
+
+//		pipe = UHD_Pipe_Alloc(bAddress, epInfo[index].deviceEpNum, UOTGHS_HSTPIPCFG_PTYPE_BLK, UOTGHS_HSTPIPCFG_PTOKEN_IN, epInfo[index].maxPktSize, 0, UOTGHS_HSTPIPCFG_PBK_1_BANK);
+
+uint32_t UHD_Pipe_Alloc(uint32_t ul_dev_addr, uint32_t ul_dev_ep, uint32_t ul_type, uint32_t ul_dir, uint32_t ul_maxsize, uint32_t ul_interval, uint32_t ul_nb_bank)
+//bool uhd_ep_alloc(usb_add_t add, usb_ep_desc_t *ep_desc)
+{
+	/* set pipe config */
+	USB->HOST.HostPipe[ul_dev_ep].PCFG.bit.BK = ul_nb_bank;
+	USB->HOST.HostPipe[ul_dev_ep].PCFG.bit.PTYPE = ul_type;
+	USB->HOST.HostPipe[ul_dev_ep].BINTERVAL.reg = ul_interval;
+
+	if (ul_dir & USB_EP_DIR_IN)
+	{
+		USB->HOST.HostPipe[ul_dev_ep].PCFG.bit.PTOKEN = USB_HOST_PIPE_TOKEN_IN;
+		USB->HOST.HostPipe[ul_dev_ep].PSTATUSSET.reg = USB_HOST_PSTATUSSET_BK0RDY;
+	}
+	else
+	{
+		USB->HOST.HostPipe[ul_dev_ep].PCFG.bit.PTOKEN = USB_HOST_PIPE_TOKEN_OUT;
+		USB->HOST.HostPipe[ul_dev_ep].PSTATUSCLR.reg =  USB_HOST_PSTATUSCLR_BK0RDY;
+	}
+
+	memset((uint8_t *)&usb_descriptor_table.usb_pipe_table[ul_dev_ep], 0, sizeof(usb_pipe_table[ul_dev_ep]));
+
+	usb_descriptor_table.usb_pipe_table[ul_dev_ep].HostDescBank[0].CTRL_PIPE.bit.PDADDR = ul_dev_addr;
+	usb_descriptor_table.usb_pipe_table[ul_dev_ep].HostDescBank[0].CTRL_PIPE.bit.PEPNUM = ul_dev_ep;
+	usb_descriptor_table.usb_pipe_table[ul_dev_ep].HostDescBank[0].PCKSIZE.bit.SIZE = 0x03;  // 64 bytes
+
+	USB->HOST.HostPipe[pipe_num].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT_Msk;
+	USB->HOST.HostPipe[pipe_num].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL | USB_HOST_PINTENSET_PERR;
+	USB->HOST.HostPipe[pipe_num].PINTENSET.reg = USB_HOST_PINTENSET_STALL;
+
+	return 1;
+}
+
+
+/**
+ * \brief Free a pipe.
+ *
+ * \param ul_pipe Pipe number to free.
+ */
+void UHD_Pipe_Free(uint32_t ul_pipe)
+{
+	// Unalloc pipe
+	uhd_disable_pipe(ul_pipe);
+	uhd_unallocate_memory(ul_pipe);
+	uhd_reset_pipe(ul_pipe);
+
+	// The Pipe is frozen and no additional requests will be sent to the device on this pipe address.
+	USB->HOST.HostPipe[pipe_num].PSTATUSSET.reg = USB_HOST_PSTATUSSET_PFREEZE;
+}
+
+/**
+ * \brief Read from a pipe.
+ *
+ * \param ul_pipe Pipe number.
+ * \param ul_size Maximum number of data to read.
+ * \param data Buffer to store the data.
+ *
+ * \return number of data read.
+ */
+uint32_t UHD_Pipe_Read(uint32_t pipe_num, uint32_t buf_size, uint8_t* buf)
+{
+	if (USB->HOST.HostPipe[pipe_num].PCFG.bit.PTYPE == USB_HOST_PIPE_TYPE_DISABLE)
+	{
+		return 0;
+	}
+
+	/* get pipe config from setting register */
+	usb_descriptor_table.usb_pipe_table[pipe_num].HostDescBank[0].ADDR.reg = (uint32_t)buf;
+	usb_descriptor_table.usb_pipe_table[pipe_num].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT = 0;
+	usb_descriptor_table.usb_pipe_table[pipe_num].HostDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = buf_size;
+	USB->HOST.HostPipe[pipe_num].PCFG.bit.PTOKEN = USB_HOST_PIPE_TOKEN_IN;
+
+	/* Start transfer */
+	USB->HOST.HostPipe[pipe_num].PSTATUSCLR.reg = USB_HOST_PSTATUSCLR_BK0RDY;
+
+	// Unfreeze pipe
+	USB->HOST.HostPipe[pipe_num].PSTATUSCLR.reg = USB_HOST_PSTATUSCLR_PFREEZE;
+
+	return buf_size;
+}
+
+/**
+ * \brief Write into a pipe.
+ *
+ * \param ul_pipe Pipe number.
+ * \param ul_size Maximum number of data to read.
+ * \param data Buffer containing data to write.
+ */
+void UHD_Pipe_Write(uint32_t ul_pipe, uint32_t ul_size, uint8_t* data)
+{
+
+	if (USB->HOST.HostPipe[pipe_num].PCFG.bit.PTYPE == USB_HOST_PIPE_TYPE_DISABLE) 
+	{
+		return 0;
+	}
+
+	/* get pipe config from setting register */
+	usb_descriptor_table.usb_pipe_table[pipe_num].HostDescBank[0].ADDR.reg = (uint32_t)buf;
+	usb_descriptor_table.usb_pipe_table[pipe_num].HostDescBank[0].PCKSIZE.bit.BYTE_COUNT = buf_size;
+	usb_descriptor_table.usb_pipe_table[pipe_num].HostDescBank[0].PCKSIZE.bit.MULTI_PACKET_SIZE = 0;
+	USB->HOST.HostPipe[pipe_num].PCFG.bit.PTOKEN = USB_HOST_PIPE_TOKEN_OUT;
+
+
+	return 1;
+}
+
+/**
+ * \brief Send a pipe content.
+ *
+ * \param ul_pipe Pipe number.
+ * \param ul_token_type Token type.
+ */
+void UHD_Pipe_Send(uint32_t ul_pipe, uint32_t ul_token_type)
+{
+	/* Start transfer */
+	USB->HOST.HostPipe[pipe_num].PSTATUSSET.reg = USB_HOST_PSTATUSSET_BK0RDY;
+
+	// Unfreeze pipe
+	USB->HOST.HostPipe[pipe_num].PSTATUSCLR.reg = USB_HOST_PSTATUSCLR_PFREEZE;
+}
+
+/**
+ * \brief Check for pipe transfer completion.
+ *
+ * \param ul_pipe Pipe number.
+ * \param ul_token_type Token type.
+ *
+ * \retval 0 transfer is not complete.
+ * \retval 1 transfer is complete.
+ */
+uint32_t UHD_Pipe_Is_Transfer_Complete(uint32_t ul_pipe, uint32_t ul_token_type)
+{
+
+	// Freeze pipe
+	USB->HOST.HostPipe[pipe_num].PSTATUSSET.reg = USB_HOST_PSTATUSSET_PFREEZE;
+	switch(uhd_ctrl_request_phase) {
+		case UHD_CTRL_REQ_PHASE_DATA_IN:
+		_uhd_ctrl_phase_data_in(p_callback_para->transfered_size);
+		break;
+		case UHD_CTRL_REQ_PHASE_ZLP_IN:
+		_uhd_ctrl_request_end(UHD_TRANS_NOERROR);
+		break;
+		case UHD_CTRL_REQ_PHASE_DATA_OUT:
+		_uhd_ctrl_phase_data_out();
+		break;
+		case UHD_CTRL_REQ_PHASE_ZLP_OUT:
+		_uhd_ctrl_request_end(UHD_TRANS_NOERROR);
+		break;
+	}
+	return 0;
+}
+
+#endif 
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_host.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_host.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/USB/samd21_host.h	(revision 136)
@@ -0,0 +1,399 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2011-2012, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+#ifndef UOTGHS_HOST_H_INCLUDED
+#define UOTGHS_HOST_H_INCLUDED
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//! \ingroup usb_host_group
+//! \defgroup uhd_group USB Host Driver (UHD)
+//! UOTGHS low-level driver for USB host mode
+//!
+//! @{
+
+//! @name UOTGHS Host IP properties
+//!
+//! @{
+//! Get maximal number of endpoints
+#define uhd_get_pipe_max_nbr()                (9)
+#define UOTGHS_EPT_NUM                        (uhd_get_pipe_max_nbr()+1)
+//! @}
+
+//! @name Host Vbus line control
+//!
+//! VBOF is an optional output pin which allows to enable or disable
+//! the external VBus generator.
+//!
+//! @{
+//! Enables hardware control of USB_VBOF output pin when a Vbus error occur
+#define uhd_enable_vbus_error_hw_control()    (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSHWC))
+//! Disables hardware control of USB_VBOF output pin when a Vbus error occur
+#define uhd_disable_vbus_error_hw_control()   (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSHWC))
+
+//! Pin and function for USB_VBOF according to configuration from USB_VBOF
+#define USB_VBOF_PIN            USB_VBOF_GPIO
+#define USB_VBOF_FUNCTION       USB_VBOF_FLAGS
+//! Output USB_VBOF onto its pin
+#define uhd_output_vbof_pin() do {\
+	pio_configure_pin(USB_VBOF_PIN, USB_VBOF_FUNCTION); \
+} while (0)
+
+//! Set USB_VBOF output pin polarity
+#define uhd_set_vbof_active_high()            (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSPO))
+#define uhd_set_vbof_active_low()             (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSPO))
+//! Requests VBus activation
+#define uhd_enable_vbus()                     (Set_bits(UOTGHS->UOTGHS_SFR, UOTGHS_SR_VBUSRQ))
+//! Requests VBus deactivation
+#define uhd_disable_vbus()                    (Set_bits(UOTGHS->UOTGHS_SCR, UOTGHS_SR_VBUSRQ))
+//! Tests if VBus activation has been requested
+#define Is_uhd_vbus_enabled()                 (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBUSRQ))
+//! @}
+
+//! @name Host Vbus line monitoring
+//!
+//! The VBus level is always checked by USBC hardware.
+//!
+//! @{
+#define uhd_enable_vbus_error_interrupt()     (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBERRE))
+#define uhd_disable_vbus_error_interrupt()    (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBERRE))
+#define Is_uhd_vbus_error_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBERRE))
+#define uhd_ack_vbus_error_interrupt()        (Set_bits(UOTGHS->UOTGHS_SCR, UOTGHS_SCR_VBERRIC))
+#define Is_uhd_vbus_error_interrupt()         (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBERRI))
+//! @}
+
+#define uhd_ack_errors_interrupt()            (UOTGHS->UOTGHS_SCR = (UOTGHS_SCR_VBERRIC|UOTGHS_SCR_BCERRIC|UOTGHS_SCR_HNPERRIC|UOTGHS_SCR_STOIC))
+#define Is_uhd_errors_interrupt()             (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBERRE|UOTGHS_CTRL_BCERRE|UOTGHS_CTRL_HNPERRE|UOTGHS_CTRL_STOE))
+#define uhd_enable_suspend_error_interrupt()
+#define uhd_enable_hnp_error_interrupt()
+#define uhd_enable_bconn_error_interrupt()
+
+//! @name USB device connection/disconnection monitoring
+//! @{
+#define uhd_enable_connection_int()           (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_DCONNIES)
+#define uhd_disable_connection_int()          (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_DCONNIEC)
+#define Is_uhd_connection_int_enabled()       (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_DCONNIE))
+#define uhd_ack_connection()                  (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_DCONNIC)
+#define Is_uhd_connection()                   (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_DCONNI))
+
+#define uhd_enable_disconnection_int()        (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_DDISCIES)
+#define uhd_disable_disconnection_int()       (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_DDISCIEC)
+#define Is_uhd_disconnection_int_enabled()    (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_DDISCIE))
+#define uhd_ack_disconnection()               (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_DDISCIC)
+#define Is_uhd_disconnection()                (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_DDISCI))
+//! @}
+
+//! @name USB device speed control
+//! @{
+#define uhd_get_speed_mode()                  (Rd_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_SPEED_Msk))
+#define Is_uhd_low_speed_mode()                 (uhd_get_speed_mode() == UOTGHS_SR_SPEED_LOW_SPEED)
+#define Is_uhd_full_speed_mode()                (uhd_get_speed_mode() == UOTGHS_SR_SPEED_FULL_SPEED)
+#define Is_uhd_high_speed_mode()                (uhd_get_speed_mode() == UOTGHS_SR_SPEED_HIGH_SPEED)
+//! Enable high speed mode
+# define uhd_enable_high_speed_mode()        (Wr_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SPDCONF_Msk, UOTGHS_HSTCTRL_SPDCONF_HIGH_SPEED))
+//! Disable high speed mode
+# define uhd_disable_high_speed_mode()       (Wr_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SPDCONF_Msk, UOTGHS_HSTCTRL_SPDCONF_FORCED_FS))
+//! @}
+
+//! @name Bus events control
+//! These macros manage the bus events: reset, SOF, resume, wakeup.
+//! @{
+
+//! Initiates a reset event
+//! @{
+#define uhd_start_reset()                            (Set_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESET))
+#define Is_uhd_starting_reset()                      (Tst_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESET))
+#define uhd_stop_reset()                             (Clr_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESET))
+
+#define uhd_enable_reset_sent_interrupt()            (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_RSTIES)
+#define uhd_disable_reset_sent_interrupt()           (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_RSTIEC)
+#define Is_uhd_reset_sent_interrupt_enabled()        (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_RSTIE))
+#define uhd_ack_reset_sent()                         (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_RSTIC)
+#define Is_uhd_reset_sent()                          (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_RSTI))
+//! @}
+
+//! Initiates a SOF events
+//! @{
+#define uhd_enable_sof()                             (Set_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SOFE))
+#define uhd_disable_sof()                            (Clr_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SOFE))
+#define Is_uhd_sof_enabled()                         (Tst_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SOFE))
+#define uhd_get_sof_number()                         ((UOTGHS->UOTGHS_HSTFNUM&UOTGHS_HSTFNUM_FNUM_Msk)>>UOTGHS_HSTFNUM_FNUM_Pos)
+#define uhd_get_microsof_number()                    ((UOTGHS->UOTGHS_HSTFNUM&UOTGHS_HSTFNUM_MFNUM_Msk)>>UOTGHS_HSTFNUM_MFNUM_Pos)
+#define uhd_get_frame_position()                     (Rd_bits(UOTGHS->UOTGHS_HSTFNUM, UOTGHS_HSTFNUM_FLENHIGH_Msk))
+#define uhd_enable_sof_interrupt()                   (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_HSOFIES)
+#define uhd_disable_sof_interrupt()                  (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_HSOFIEC)
+#define Is_uhd_sof_interrupt_enabled()               (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_HSOFIE))
+#define uhd_ack_sof()                                (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_HSOFIC)
+#define Is_uhd_sof()                                 (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_HSOFI))
+//! @}
+
+//! Initiates a resume event
+//! It is called downstream resume event.
+//! @{
+#define uhd_send_resume()                            (Set_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESUME))
+#define Is_uhd_sending_resume()                      (Tst_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESUME))
+
+#define uhd_enable_downstream_resume_interrupt()     (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_RSMEDIES)
+#define uhd_disable_downstream_resume_interrupt()    (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_RSMEDIEC)
+#define Is_uhd_downstream_resume_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_RSMEDIE))
+#define uhd_ack_downstream_resume()                  (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_RSMEDIC)
+#define Is_uhd_downstream_resume()                   (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_RSMEDI))
+//! @}
+
+//! Detection of a wake-up event
+//! A wake-up event is received when the host controller is in the suspend mode:
+//! - and an upstream resume from the peripheral is detected.
+//! - and a peripheral disconnection is detected.
+//! @{
+#define uhd_enable_wakeup_interrupt()                (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_HWUPIES)
+#define uhd_disable_wakeup_interrupt()               (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_HWUPIEC)
+#define Is_uhd_wakeup_interrupt_enabled()            (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_HWUPIE))
+#define uhd_ack_wakeup()                             (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_HWUPIC)
+#define Is_uhd_wakeup()                              (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_HWUPI))
+
+#define uhd_enable_upstream_resume_interrupt()       (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_RXRSMIES)
+#define uhd_disable_upstream_resume_interrupt()      (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_RXRSMIEC)
+#define Is_uhd_upstream_resume_interrupt_enabled()   (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_RXRSMIE))
+#define uhd_ack_upstream_resume()                    (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_RXRSMIC)
+#define Is_uhd_upstream_resume()                     (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_RXRSMI))
+//! @}
+//! @}
+
+
+//! @name Pipes management
+//! @{
+
+//! USB address of pipes
+//! @{
+#define uhd_configure_address(p, addr) \
+		(Wr_bitfield((&UOTGHS->UOTGHS_HSTADDR1)[(p)>>2], \
+		UOTGHS_HSTADDR1_HSTADDRP0_Msk << (((p)&0x03)<<3), addr))
+#define uhd_get_configured_address(p) \
+		(Rd_bitfield((&UOTGHS->UOTGHS_HSTADDR1)[(p)>>2], \
+		UOTGHS_HSTADDR1_HSTADDRP0_Msk << (((p)&0x03)<<3)))
+//! @}
+
+//! Pipe enable
+//! Enable, disable, reset, freeze
+//! @{
+#define uhd_enable_pipe(p) \
+		(Set_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
+#define uhd_disable_pipe(p) \
+		(Clr_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
+#define Is_uhd_pipe_enabled(p) \
+		(Tst_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
+#define uhd_reset_pipe(p) \
+		(Set_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p))); \
+		(Clr_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
+#define Is_uhd_resetting_pipe(p) \
+		(Tst_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
+#define uhd_freeze_pipe(p)                       (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_PFREEZES)
+#define uhd_unfreeze_pipe(p)                     (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_PFREEZEC)
+#define Is_uhd_pipe_frozen(p)                    (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_PFREEZE))
+#define uhd_reset_data_toggle(p)                 (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_RSTDTS)
+#define Is_uhd_data_toggle_reset(p)              (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_RSTDT))
+//! @}
+
+//! Pipe configuration
+//! @{
+#define uhd_configure_pipe_int_req_freq(p,freq)  (Wr_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_INTFRQ_Msk, (freq)))
+#define uhd_get_pipe_int_req_freq(p)             (Rd_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_INTFRQ_Msk))
+#define uhd_configure_pipe_endpoint_number(p,ep) (Wr_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PEPNUM_Msk, (ep)))
+#define uhd_get_pipe_endpoint_address(p) \
+		(uhd_is_pipe_in(p) ?\
+			(uhd_get_pipe_endpoint_number(p) | USB_EP_DIR_IN) :\
+			(uhd_get_pipe_endpoint_number(p) | USB_EP_DIR_OUT))
+#define uhd_get_pipe_endpoint_number(p)          (Rd_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], (UOTGHS_HSTPIPCFG_PEPNUM_Msk)))
+#define uhd_configure_pipe_type(p, type)         (Wr_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PTYPE_Msk, type))
+#define uhd_get_pipe_type(p)                     (Rd_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PTYPE_Msk))
+#define uhd_enable_pipe_bank_autoswitch(p)       (Set_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_AUTOSW))
+#define uhd_disable_pipe_bank_autoswitch(p)      (Clr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_AUTOSW))
+#define Is_uhd_pipe_bank_autoswitch_enabled(p)   (Tst_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_AUTOSW))
+#define uhd_configure_pipe_token(p, token)       (Wr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PTOKEN_Msk, token))
+#define uhd_get_pipe_token(p)                    (Rd_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PTOKEN_Msk))
+#define uhd_is_pipe_in(p)                        (UOTGHS_HSTPIPCFG_PTOKEN_IN==uhd_get_pipe_token(p))
+#define uhd_is_pipe_out(p)                       (UOTGHS_HSTPIPCFG_PTOKEN_OUT==uhd_get_pipe_token(p))
+//! Bounds given integer size to allowed range and rounds it up to the nearest
+//! available greater size, then applies register format of UOTGHS controller
+//! for pipe size bit-field.
+#define uhd_format_pipe_size(size) \
+		(32 - clz(((uint32_t)min(max(size, 8), 1024) << 1) - 1) - 1 - 3)
+#define uhd_configure_pipe_size(p,size) \
+		(Wr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PSIZE_Msk, uhd_format_pipe_size(size)))
+#define uhd_get_pipe_size(p)                     (8<<((Rd_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], (UOTGHS_HSTPIPCFG_PSIZE_Msk)))>> UOTGHS_HSTPIPCFG_PSIZE_Pos))
+#define uhd_configure_pipe_bank(p,bank)          (Wr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PBK_Msk, (bank)))
+#define uhd_get_pipe_bank(p)                     (Rd_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PBK_Msk))
+#define uhd_allocate_memory(p)                   (Set_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_ALLOC))
+#define uhd_unallocate_memory(p)                 (Clr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_ALLOC))
+#define Is_uhd_memory_allocated(p)               (Tst_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_ALLOC))
+
+//! Enable PING management only available in HS mode
+#  define uhd_enable_ping(p)                     (Set_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PINGEN))
+//#endif
+#define uhd_configure_pipe(p, freq, ep_num, type, token, size, bank, bank_switch) \
+	(UOTGHS->UOTGHS_HSTPIPCFG[p] = \
+		(bank)|\
+		((uhd_format_pipe_size(size)<<UOTGHS_HSTPIPCFG_PSIZE_Pos)&UOTGHS_HSTPIPCFG_PSIZE_Msk)|\
+		((token)&UOTGHS_HSTPIPCFG_PTOKEN_Msk)|\
+		((type)&UOTGHS_HSTPIPCFG_PTYPE_Msk)|\
+		(((ep_num)<<UOTGHS_HSTPIPCFG_PEPNUM_Pos)&UOTGHS_HSTPIPCFG_PEPNUM_Msk)|\
+		bank_switch |\
+		(((freq)<<UOTGHS_HSTPIPCFG_INTFRQ_Pos)&UOTGHS_HSTPIPCFG_INTFRQ_Msk))
+
+#define Is_uhd_pipe_configured(p)                (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_CFGOK))
+//! @}
+
+//! Pipe main interrupts management
+//! @{
+#define uhd_enable_pipe_interrupt(p) 		(UOTGHS->UOTGHS_HSTIER = (UOTGHS_HSTIER_PEP_0 << (p)))
+#define uhd_disable_pipe_interrupt(p) 		(UOTGHS->UOTGHS_HSTIDR = (UOTGHS_HSTIDR_PEP_0 << (p)))
+#define Is_uhd_pipe_interrupt_enabled(p) 	(Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_PEP_0 << (p)))
+#define Is_uhd_pipe_interrupt(p) 		(Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_PEP_0 << (p)))
+//! returns the lowest pipe number generating a pipe interrupt or UOTGHS_EPT_NUM if none
+#define uhd_get_interrupt_pipe_number() \
+	(ctz(((UOTGHS->UOTGHS_HSTISR >> 8) & (UOTGHS->UOTGHS_HSTIMR >> 8)) | (1 << UOTGHS_EPT_NUM)))
+//! @}
+
+//! Pipe overflow and underflow for isochronous and interrupt endpoints
+//! @{
+#define uhd_enable_overflow_interrupt(p)         (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_OVERFIES)
+#define uhd_disable_overflow_interrupt(p)        (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_OVERFIEC)
+#define Is_uhd_overflow_interrupt_enabled(p)     (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_OVERFIE))
+#define uhd_ack_overflow_interrupt(p)            (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_OVERFIC)
+#define Is_uhd_overflow(p)                       (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_OVERFI))
+
+#define uhd_enable_underflow_interrupt(p)        (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_UNDERFIES)
+#define uhd_disable_underflow_interrupt(p)       (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_UNDERFIEC)
+#define Is_uhd_underflow_interrupt_enabled(p)    (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_UNDERFIE))
+#define uhd_ack_underflow_interrupt(p)           (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_UNDERFIC)
+#define Is_uhd_underflow(p)                      (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_UNDERFI))
+//! @}
+
+//! USB packet errors management
+//! @{
+#define uhd_enable_stall_interrupt(p)            (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_RXSTALLDES)
+#define uhd_disable_stall_interrupt(p)           (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_RXSTALLDEC)
+#define Is_uhd_stall_interrupt_enabled(p)        (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_RXSTALLDE))
+#define uhd_ack_stall(p)                         (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_RXSTALLDIC)
+#define Is_uhd_stall(p)                          (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_RXSTALLDI))
+
+#define uhd_enable_pipe_error_interrupt(p)       (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_PERRES)
+#define uhd_disable_pipe_error_interrupt(p)      (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_PERREC)
+#define Is_uhd_pipe_error_interrupt_enabled(p)   (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_PERRE))
+#define uhd_ack_all_errors(p)                    (UOTGHS->UOTGHS_HSTPIPERR[p] = 0UL)
+#define Is_uhd_pipe_error(p)                     (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_PERRI))
+#define uhd_error_status(p)                      (UOTGHS->UOTGHS_HSTPIPERR[p])
+#define Is_uhd_bad_data_toggle(p)                (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_DATATGL))
+#define Is_uhd_data_pid_error(p)                 (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_DATAPID))
+#define Is_uhd_pid_error(p)                      (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_PID))
+#define Is_uhd_timeout_error(p)                  (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_TIMEOUT))
+#define Is_uhd_crc16_error(p)                    (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_CRC16))
+#define uhd_get_error_counter(p)                 (Rd_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_COUNTER))
+//! @}
+
+//! Pipe data management
+//! @{
+#define uhd_data_toggle(p)                       (Rd_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_DTSEQ))
+
+#define uhd_enable_bank_interrupt(p)             (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_NBUSYBKES)
+#define uhd_disable_bank_interrupt(p)            (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_NBUSYBKEC)
+#define Is_uhd_bank_interrupt_enabled(p)         (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_NBUSYBKE))
+#define uhd_nb_busy_bank(p)                      (Rd_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_NBUSYBK_Msk))
+#define uhd_current_bank(p)                      (Rd_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_CURRBK_Msk ))
+
+#define uhd_enable_short_packet_interrupt(p)     (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_SHORTPACKETES)
+#define uhd_disable_short_packet_interrupt(p)    (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_SHORTPACKETIEC)
+#define Is_uhd_short_packet_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_SHORTPACKETIE))  )
+#define uhd_ack_short_packet(p)                  (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_SHORTPACKETIC)
+#define Is_uhd_short_packet(p)                   (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_SHORTPACKETI))
+#define uhd_byte_count(p)                        (Rd_bitfield(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_PBYCT_Msk))
+
+#define Is_uhd_fifocon(p)                        (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_FIFOCON))
+#define uhd_ack_fifocon(p)                       (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_FIFOCONC)
+
+#define uhd_enable_setup_ready_interrupt(p)      (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_TXSTPES)
+#define uhd_disable_setup_ready_interrupt(p)     (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_TXSTPEC)
+#define Is_uhd_setup_ready_interrupt_enabled(p)  (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_TXSTPE))
+#define uhd_ack_setup_ready(p)                   (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_TXSTPIC)
+#define Is_uhd_setup_ready(p)                    (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_TXSTPI))
+
+#define uhd_enable_in_received_interrupt(p)      (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_RXINES)
+#define uhd_disable_in_received_interrupt(p)     (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_RXINEC)
+#define Is_uhd_in_received_interrupt_enabled(p)  (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_RXINE))
+#define uhd_ack_in_received(p)                   (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_RXINIC)
+#define Is_uhd_in_received(p)                    (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_RXINI))
+
+#define uhd_enable_out_ready_interrupt(p)        (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_TXOUTES)
+#define uhd_disable_out_ready_interrupt(p)       (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_TXOUTEC)
+#define Is_uhd_out_ready_interrupt_enabled(p)    (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_TXOUTE))
+#define uhd_ack_out_ready(p)                     (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_TXOUTIC)
+#define Is_uhd_out_ready(p)                      (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_TXOUTI))
+#define uhd_raise_out_ready(p)                   (UOTGHS->UOTGHS_HSTPIPIFR[p] = UOTGHS_HSTPIPIFR_TXOUTIS)
+
+#define uhd_enable_nak_received_interrupt(p)     (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_NAKEDES)
+#define uhd_disable_nak_received_interrupt(p)    (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_NAKEDEC)
+#define Is_uhd_nak_received_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_NAKEDE))
+#define uhd_ack_nak_received(p)                  (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_NAKEDIC)
+#define Is_uhd_nak_received(p)                   (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_NAKEDI))
+
+#define Is_uhd_read_enabled(p)                   (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_RWALL))
+#define Is_uhd_write_enabled(p)                  (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_RWALL ))
+
+#define uhd_enable_continuous_in_mode(p)         (Set_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], UOTGHS_HSTPIPINRQ_INMODE))
+#define uhd_disable_continuous_in_mode(p)        (Clr_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], UOTGHS_HSTPIPINRQ_INMODE))
+#define Is_uhd_continuous_in_mode_enabled(p)     (Tst_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], UOTGHS_HSTPIPINRQ_INMODE))
+
+#define uhd_in_request_number(p, in_num)         (Set_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], (in_num)-1))
+#define uhd_get_in_request_number(p)             (((Rd_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], UOTGHS_HSTPIPINRQ_INRQ_Msk))>>UOTGHS_HSTPIPINRQ_INRQ_Pos)+1)
+//! @}
+
+//! Maximum transfer size on USB DMA
+#define UHD_PIPE_MAX_TRANS 0x8000
+
+//! Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected pipe.
+//! @param p      Target Pipe number
+//! @param scale  Data scale in bits: 64, 32, 16 or 8
+//! @return       Volatile 64-, 32-, 16- or 8-bit data pointer to FIFO data register
+//! @warning It is up to the user of this macro to make sure that all accesses
+//! are aligned with their natural boundaries except 64-bit accesses which
+//! require only 32-bit alignment.
+//! @warning It is up to the user of this macro to make sure that used HSB
+//! addresses are identical to the DPRAM internal pointer modulo 32 bits.
+#define uhd_get_pipe_fifo_access(p, scale) \
+	(((volatile TPASTE2(U, scale) (*)[UHD_PIPE_MAX_TRANS / ((scale) / 8)])UOTGHS_RAM_ADDR)[(p)])
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* UOTGHS_HOST_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Uart.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Uart.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Uart.cpp	(revision 136)
@@ -0,0 +1,146 @@
+#include "Uart.h"
+#include "WVariant.h"
+#include "wiring_digital.h"
+
+Uart::Uart(SERCOM *_s, uint8_t _pinRX, uint8_t _pinTX)
+{
+	sercom = _s;
+	uc_pinRX = _pinRX;
+	uc_pinTX = _pinTX;
+}
+
+void Uart::begin(unsigned long baudrate)
+{
+	begin(baudrate, (uint8_t)SERIAL_8N1);
+}
+
+void Uart::begin(unsigned long baudrate, uint8_t config)
+{
+  pinPeripheral(uc_pinRX, g_APinDescription[uc_pinRX].ulPinType);
+  pinPeripheral(uc_pinTX, g_APinDescription[uc_pinTX].ulPinType);
+
+	sercom->initUART(UART_INT_CLOCK, SAMPLE_RATE_x16, baudrate);
+	sercom->initFrame(extractCharSize(config), LSB_FIRST, extractParity(config), extractNbStopBit(config));
+	sercom->initPads(UART_TX_PAD_2, SERCOM_RX_PAD_3);
+	
+	
+	sercom->enableUART();
+}
+
+void Uart::end()
+{
+	sercom->resetUART();
+	rxBuffer.clear();
+}
+
+void Uart::flush()
+{
+	sercom->flushUART();
+}
+
+void Uart::IrqHandler()
+{
+	if(sercom->availableDataUART())
+	{
+		rxBuffer.store_char(sercom->readDataUART());
+	}
+	
+	if(	sercom->isBufferOverflowErrorUART() ||
+		sercom->isFrameErrorUART() ||
+		sercom->isParityErrorUART())
+	{
+		sercom->clearStatusUART();
+	}
+}
+
+int Uart::available()
+{
+	return rxBuffer.available();
+}
+
+int Uart::peek()
+{
+	return rxBuffer.peek();
+}
+
+int Uart::read()
+{
+	return rxBuffer.read_char();
+}
+
+size_t Uart::write(const uint8_t data)
+{
+	sercom->writeDataUART(data);
+	return 1;
+}
+
+size_t Uart::write(const char * data)
+{
+	size_t writed = 0;
+	
+	while(*data != '\0')
+	{
+		writed += write(*data);
+		++data;
+	}
+	
+	return writed;
+}
+
+SercomNumberStopBit Uart::extractNbStopBit(uint8_t config)
+{
+	switch(config & HARDSER_STOP_BIT_MASK)
+	{
+		case HARDSER_STOP_BIT_1:	
+		default:
+			return SERCOM_STOP_BIT_1;
+
+		case HARDSER_STOP_BIT_2:	
+			return SERCOM_STOP_BITS_2;
+	}
+}
+
+SercomUartCharSize Uart::extractCharSize(uint8_t config)
+{
+	switch(config & HARDSER_DATA_MASK)
+	{
+		case HARDSER_DATA_5:
+			return UART_CHAR_SIZE_5_BITS;
+
+		case HARDSER_DATA_6:
+			return UART_CHAR_SIZE_6_BITS;
+
+		case HARDSER_DATA_7:
+			return UART_CHAR_SIZE_7_BITS;
+
+		case HARDSER_DATA_8:
+		default:
+			return UART_CHAR_SIZE_8_BITS;
+
+	}
+}
+
+SercomParityMode Uart::extractParity(uint8_t config)
+{
+	switch(config & HARDSER_PARITY_MASK)
+	{
+		case HARDSER_PARITY_NONE:
+		default:
+			return SERCOM_NO_PARITY;
+
+		case HARDSER_PARITY_EVEN:
+			return SERCOM_EVEN_PARITY;
+
+		case HARDSER_PARITY_ODD:
+			return SERCOM_ODD_PARITY;
+	}
+}
+
+void SERCOM0_Handler()
+{
+	Serial5.IrqHandler();
+}
+void SERCOM5_Handler()
+{
+	Serial.IrqHandler();
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Uart.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Uart.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Uart.h	(revision 136)
@@ -0,0 +1,45 @@
+#ifndef _SERCOM_UART_CLASS
+#define _SERCOM_UART_CLASS
+
+#include "HardwareSerial.h"
+#include "SERCOM.h"
+#include "RingBuffer.h"
+
+#include <cstddef>
+
+
+class Uart : public HardwareSerial
+{
+	public:
+		Uart(SERCOM *_s, uint8_t _pinRX, uint8_t _pinTX);
+		void begin(unsigned long baudRate);
+		void begin(unsigned long baudrate, uint8_t config);
+		void end();
+		int available();
+		int peek();
+		int read();
+		void flush();
+		size_t write(const uint8_t data);
+		size_t write(const char * data);
+
+		void IrqHandler();
+
+		operator bool() { return true; }
+
+	private:
+		SERCOM *sercom;
+		RingBuffer rxBuffer;
+    
+    uint8_t uc_pinRX;
+    uint8_t uc_pinTX;
+
+		SercomNumberStopBit extractNbStopBit(uint8_t config);
+		SercomUartCharSize extractCharSize(uint8_t config);
+		SercomParityMode extractParity(uint8_t config);
+};
+
+extern Uart Serial;
+extern Uart Serial5;
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Udp.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Udp.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/Udp.h	(revision 136)
@@ -0,0 +1,88 @@
+/*
+ *  Udp.cpp: Library to send/receive UDP packets.
+ *
+ * NOTE: UDP is fast, but has some important limitations (thanks to Warren Gray for mentioning these)
+ * 1) UDP does not guarantee the order in which assembled UDP packets are received. This
+ * might not happen often in practice, but in larger network topologies, a UDP
+ * packet can be received out of sequence. 
+ * 2) UDP does not guard against lost packets - so packets *can* disappear without the sender being
+ * aware of it. Again, this may not be a concern in practice on small local networks.
+ * For more information, see http://www.cafeaulait.org/course/week12/35.html
+ *
+ * MIT License:
+ * Copyright (c) 2008 Bjoern Hartmann
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ * 
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * bjoern@cs.stanford.edu 12/30/2008
+ */
+
+#ifndef udp_h
+#define udp_h
+
+#include <Stream.h>
+#include <IPAddress.h>
+
+class UDP : public Stream {
+
+public:
+  virtual uint8_t begin(uint16_t) =0;	// initialize, start listening on specified port. Returns 1 if successful, 0 if there are no sockets available to use
+  virtual void stop() =0;  // Finish with the UDP socket
+
+  // Sending UDP packets
+  
+  // Start building up a packet to send to the remote host specific in ip and port
+  // Returns 1 if successful, 0 if there was a problem with the supplied IP address or port
+  virtual int beginPacket(IPAddress ip, uint16_t port) =0;
+  // Start building up a packet to send to the remote host specific in host and port
+  // Returns 1 if successful, 0 if there was a problem resolving the hostname or port
+  virtual int beginPacket(const char *host, uint16_t port) =0;
+  // Finish off this packet and send it
+  // Returns 1 if the packet was sent successfully, 0 if there was an error
+  virtual int endPacket() =0;
+  // Write a single byte into the packet
+  virtual size_t write(uint8_t) =0;
+  // Write size bytes from buffer into the packet
+  virtual size_t write(const uint8_t *buffer, size_t size) =0;
+
+  // Start processing the next available incoming packet
+  // Returns the size of the packet in bytes, or 0 if no packets are available
+  virtual int parsePacket() =0;
+  // Number of bytes remaining in the current packet
+  virtual int available() =0;
+  // Read a single byte from the current packet
+  virtual int read() =0;
+  // Read up to len bytes from the current packet and place them into buffer
+  // Returns the number of bytes read, or 0 if none are available
+  virtual int read(unsigned char* buffer, size_t len) =0;
+  // Read up to len characters from the current packet and place them into buffer
+  // Returns the number of characters read, or 0 if none are available
+  virtual int read(char* buffer, size_t len) =0;
+  // Return the next byte from the current packet without moving on to the next byte
+  virtual int peek() =0;
+  virtual void flush() =0;	// Finish reading the current packet
+
+  // Return the IP address of the host who sent the current incoming packet
+  virtual IPAddress remoteIP() =0;
+  // Return the port of the host who sent the current incoming packet
+  virtual uint16_t remotePort() =0;
+protected:
+  uint8_t* rawIPAddress(IPAddress& addr) { return addr.raw_address(); };
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WCharacter.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WCharacter.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WCharacter.h	(revision 136)
@@ -0,0 +1,180 @@
+/*
+ WCharacter.h - Character utility functions for Wiring & Arduino
+ Copyright (c) 2010 Hernando Barragan.  All right reserved.
+
+ This library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ This library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with this library; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#ifndef Character_h
+#define Character_h
+
+#include <ctype.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// WCharacter.h prototypes
+#if defined (  __GNUC__  )
+inline boolean isAlphaNumeric(int c) __attribute__((always_inline));
+inline boolean isAlpha(int c) __attribute__((always_inline));
+inline boolean isAscii(int c) __attribute__((always_inline));
+inline boolean isWhitespace(int c) __attribute__((always_inline));
+inline boolean isControl(int c) __attribute__((always_inline));
+inline boolean isDigit(int c) __attribute__((always_inline));
+inline boolean isGraph(int c) __attribute__((always_inline));
+inline boolean isLowerCase(int c) __attribute__((always_inline));
+inline boolean isPrintable(int c) __attribute__((always_inline));
+inline boolean isPunct(int c) __attribute__((always_inline));
+inline boolean isSpace(int c) __attribute__((always_inline));
+inline boolean isUpperCase(int c) __attribute__((always_inline));
+inline boolean isHexadecimalDigit(int c) __attribute__((always_inline));
+inline int toAscii(int c) __attribute__((always_inline));
+inline int toLowerCase(int c) __attribute__((always_inline));
+inline int toUpperCase(int c)__attribute__((always_inline));
+#elif defined ( __ICCARM__ )
+#endif
+
+// Checks for an alphanumeric character.
+// It is equivalent to (isalpha(c) || isdigit(c)).
+inline boolean isAlphaNumeric(int c)
+{
+  return ( isalnum(c) == 0 ? false : true);
+}
+
+
+// Checks for an alphabetic character.
+// It is equivalent to (isupper(c) || islower(c)).
+inline boolean isAlpha(int c)
+{
+  return ( isalpha(c) == 0 ? false : true);
+}
+
+
+// Checks whether c is a 7-bit unsigned char value
+// that fits into the ASCII character set.
+inline boolean isAscii(int c)
+{
+/*  return ( isascii(c) == 0 ? false : true); */
+  return ( (c & ~0x7f) != 0 ? false : true);
+}
+
+
+// Checks for a blank character, that is, a space or a tab.
+inline boolean isWhitespace(int c)
+{
+  return ( isblank (c) == 0 ? false : true);
+}
+
+
+// Checks for a control character.
+inline boolean isControl(int c)
+{
+  return ( iscntrl (c) == 0 ? false : true);
+}
+
+
+// Checks for a digit (0 through 9).
+inline boolean isDigit(int c)
+{
+  return ( isdigit (c) == 0 ? false : true);
+}
+
+
+// Checks for any printable character except space.
+inline boolean isGraph(int c)
+{
+  return ( isgraph (c) == 0 ? false : true);
+}
+
+
+// Checks for a lower-case character.
+inline boolean isLowerCase(int c)
+{
+  return (islower (c) == 0 ? false : true);
+}
+
+
+// Checks for any printable character including space.
+inline boolean isPrintable(int c)
+{
+  return ( isprint (c) == 0 ? false : true);
+}
+
+
+// Checks for any printable character which is not a space
+// or an alphanumeric character.
+inline boolean isPunct(int c)
+{
+  return ( ispunct (c) == 0 ? false : true);
+}
+
+
+// Checks for white-space characters. For the avr-libc library,
+// these are: space, formfeed ('\f'), newline ('\n'), carriage
+// return ('\r'), horizontal tab ('\t'), and vertical tab ('\v').
+inline boolean isSpace(int c)
+{
+  return ( isspace (c) == 0 ? false : true);
+}
+
+
+// Checks for an uppercase letter.
+inline boolean isUpperCase(int c)
+{
+  return ( isupper (c) == 0 ? false : true);
+}
+
+
+// Checks for a hexadecimal digits, i.e. one of 0 1 2 3 4 5 6 7
+// 8 9 a b c d e f A B C D E F.
+inline boolean isHexadecimalDigit(int c)
+{
+  return ( isxdigit (c) == 0 ? false : true);
+}
+
+
+// Converts c to a 7-bit unsigned char value that fits into the
+// ASCII character set, by clearing the high-order bits.
+inline int toAscii(int c)
+{
+/*  return toascii (c); */
+  return (c & 0x7f);
+}
+
+
+// Warning:
+// Many people will be unhappy if you use this function.
+// This function will convert accented letters into random
+// characters.
+
+// Converts the letter c to lower case, if possible.
+inline int toLowerCase(int c)
+{
+  return tolower (c);
+}
+
+
+// Converts the letter c to upper case, if possible.
+inline int toUpperCase(int c)
+{
+  return toupper (c);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WInterrupts.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WInterrupts.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WInterrupts.c	(revision 136)
@@ -0,0 +1,230 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "WInterrupts.h"
+#include "variant.h"
+#include "wiring_digital.h"
+
+#include <string.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static struct
+{
+  uint32_t _ulPin ;
+  voidFuncPtr _callback ;
+} callbacksInt[EXTERNAL_NUM_INTERRUPTS] ;
+
+/* Configure I/O interrupt sources */
+static void __initialize()
+{
+#if 0
+  int i ;
+
+  for ( i = 0 ; i < EXTERNAL_NUM_INTERRUPTS ; i++ )
+  {
+    callbacksInt[i]._callback = NULL ;
+  }
+#else
+  memset( callbacksInt, 0, sizeof( callbacksInt ) ) ;
+#endif
+
+  NVIC_DisableIRQ( EIC_IRQn ) ;
+  NVIC_ClearPendingIRQ( EIC_IRQn ) ;
+  NVIC_SetPriority( EIC_IRQn, 0 ) ;
+  NVIC_EnableIRQ( EIC_IRQn ) ;
+
+
+
+  // Enable GCLK for IEC (External Interrupt Controller)
+  GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_EIC )) ;
+
+  // Enable EIC
+  EIC->CTRL.bit.ENABLE = 1 ;
+
+  while ( EIC->STATUS.bit.SYNCBUSY == 1 )
+  {
+    // Waiting for synchronisation
+  }
+
+}
+
+/*
+ * \brief Specifies a named Interrupt Service Routine (ISR) to call when an interrupt occurs.
+ *        Replaces any previous function that was attached to the interrupt.
+ */
+
+void attachInterrupt( uint32_t ulPin, voidFuncPtr callback, uint32_t ulMode )
+{
+  static int enabled = 0 ;
+  uint32_t ulConfig ;
+  uint32_t ulPos ;
+
+  if ( digitalPinToInterrupt( ulPin ) == NOT_AN_INTERRUPT )
+  {
+    return ;
+  }
+
+  if ( !enabled )
+  {
+    __initialize() ;
+    enabled = 1 ;
+  }
+
+  // Assign pin to EIC
+  pinPeripheral( ulPin, PIO_EXTINT ) ;
+
+  // Assign callback to interrupt
+  callbacksInt[digitalPinToInterrupt( ulPin )]._ulPin = ulPin ;
+  callbacksInt[digitalPinToInterrupt( ulPin )]._callback = callback ;
+
+  // Check if normal interrupt or NMI
+  if ( ulPin != 2 )
+  {
+    // Look for right CONFIG register to be addressed
+    if ( digitalPinToInterrupt( ulPin ) > EXTERNAL_INT_7 )
+    {
+      ulConfig = 1 ;
+    }
+    else
+    {
+      ulConfig = 0 ;
+    }
+
+    // Configure the interrupt mode
+    ulPos = ((digitalPinToInterrupt( ulPin ) - (8*ulConfig) ) << 2) ;
+    switch ( ulMode )
+    {
+      case LOW:
+        EIC->CONFIG[ulConfig].reg |= EIC_CONFIG_SENSE0_LOW_Val << ulPos ;
+      break ;
+
+      case HIGH:
+        EIC->CONFIG[ulConfig].reg |= EIC_CONFIG_SENSE0_HIGH_Val << ulPos ;
+      break ;
+
+      case CHANGE:
+        EIC->CONFIG[ulConfig].reg |= EIC_CONFIG_SENSE0_BOTH_Val << ulPos ;
+      break ;
+
+      case FALLING:
+        EIC->CONFIG[ulConfig].reg |= EIC_CONFIG_SENSE0_FALL_Val << ulPos ;
+      break ;
+
+      case RISING:
+        EIC->CONFIG[ulConfig].reg |= EIC_CONFIG_SENSE0_RISE_Val << ulPos ;
+      break ;
+    }
+
+    // Enable the interrupt
+    EIC->INTENSET.reg = EIC_INTENSET_EXTINT( 1 << digitalPinToInterrupt( ulPin ) ) ;
+  }
+  else // Handles NMI on pin 2
+  {
+    // Configure the interrupt mode
+    switch ( ulMode )
+    {
+      case LOW:
+        EIC->NMICTRL.reg = EIC_NMICTRL_NMISENSE_LOW ;
+      break ;
+
+      case HIGH:
+        EIC->NMICTRL.reg = EIC_NMICTRL_NMISENSE_HIGH ;
+      break ;
+
+      case CHANGE:
+        EIC->NMICTRL.reg = EIC_NMICTRL_NMISENSE_BOTH ;
+      break ;
+
+      case FALLING:
+        EIC->NMICTRL.reg = EIC_NMICTRL_NMISENSE_FALL ;
+      break ;
+
+      case RISING:
+        EIC->NMICTRL.reg= EIC_NMICTRL_NMISENSE_RISE ;
+      break ;
+    }
+
+    // Enable the interrupt
+    EIC->INTENSET.reg = EIC_INTENSET_EXTINT( 1 << digitalPinToInterrupt( ulPin ) ) ;
+  }
+}
+
+/*
+ * \brief Turns off the given interrupt.
+ */
+void detachInterrupt( uint32_t ulPin )
+{
+/*
+  // Retrieve pin information
+  Pio *pio = g_APinDescription[pin].pPort;
+  uint32_t mask = g_APinDescription[pin].ulPin;
+
+  // Disable interrupt
+  pio->PIO_IDR = mask;
+*/
+  if ( digitalPinToInterrupt( ulPin ) == NOT_AN_INTERRUPT )
+  {
+    return ;
+  }
+
+  EIC->INTENCLR.reg = EIC_INTENCLR_EXTINT( 1 << digitalPinToInterrupt( ulPin ) ) ;
+}
+
+/*
+ * External Interrupt Controller NVIC Interrupt Handler
+ */
+void EIC_Handler( void )
+{
+  uint32_t ul ;
+
+  // Test NMI first
+  if ( (EIC->NMIFLAG.reg & EIC_NMIFLAG_NMI) == EIC_NMIFLAG_NMI )
+  {
+    // Call the callback function if assigned
+    if ( callbacksInt[EXTERNAL_INT_NMI]._callback != NULL )
+    {
+      callbacksInt[EXTERNAL_INT_NMI]._callback() ;
+    }
+
+    // Clear the interrupt
+    EIC->NMIFLAG.reg = EIC_NMIFLAG_NMI ;
+  }
+
+  // Test the 16 normal interrupts
+  for ( ul = EXTERNAL_INT_0 ; ul < EXTERNAL_INT_NMI ; ul++ )
+  {
+    if ( (EIC->INTFLAG.reg & ( 1 << ul ) ) != 0 )
+    {
+      // Call the callback function if assigned
+      if ( callbacksInt[ul]._callback != NULL )
+      {
+        callbacksInt[ul]._callback() ;
+      }
+
+      // Clear the interrupt
+      EIC->INTFLAG.reg = 1 << ul ;
+    }
+  }
+}
+
+#ifdef __cplusplus
+}
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WInterrupts.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WInterrupts.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WInterrupts.h	(revision 136)
@@ -0,0 +1,52 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _WIRING_INTERRUPTS_
+#define _WIRING_INTERRUPTS_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CHANGE 2
+#define FALLING 3
+#define RISING 4
+#define DEFAULT 1
+#define EXTERNAL 0
+
+typedef void (*voidFuncPtr)( void ) ;
+
+/*
+ * \brief Specifies a named Interrupt Service Routine (ISR) to call when an interrupt occurs.
+ *        Replaces any previous function that was attached to the interrupt.
+ */
+
+void attachInterrupt( uint32_t ulPin, voidFuncPtr callback, uint32_t mode ) ;
+
+/*
+ * \brief Turns off the given interrupt.
+ */
+void detachInterrupt( uint32_t ulPin ) ;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _WIRING_INTERRUPTS_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WMath.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WMath.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WMath.cpp	(revision 136)
@@ -0,0 +1,68 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+extern "C" {
+  #include "stdlib.h"
+  #include "stdint.h"
+}
+#include "WMath.h"
+
+extern void randomSeed( uint32_t dwSeed )
+{
+  if ( dwSeed != 0 )
+  {
+    srand( dwSeed ) ;
+  }
+}
+
+extern long random( long howbig )
+{
+  if ( howbig == 0 )
+  {
+    return 0 ;
+  }
+
+  return rand() % howbig;
+}
+
+extern long random( long howsmall, long howbig )
+{
+  if (howsmall >= howbig)
+  {
+    return howsmall;
+  }
+
+  long diff = howbig - howsmall;
+
+  return random(diff) + howsmall;
+}
+
+extern long map(long x, long in_min, long in_max, long out_min, long out_max)
+{
+  return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min;
+}
+
+extern uint16_t makeWord( uint16_t w )
+{
+  return w ;
+}
+
+extern uint16_t makeWord( uint8_t h, uint8_t l )
+{
+  return (h << 8) | l ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WMath.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WMath.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WMath.h	(revision 136)
@@ -0,0 +1,33 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _WIRING_MATH_
+#define _WIRING_MATH_
+
+extern long random( long ) ;
+extern long random( long, long ) ;
+extern void randomSeed( uint32_t dwSeed ) ;
+extern long map( long, long, long, long, long ) ;
+
+extern uint16_t makeWord( uint16_t w ) ;
+extern uint16_t makeWord( uint8_t h, uint8_t l ) ;
+
+#define word(...) makeWord(__VA_ARGS__)
+
+
+#endif /* _WIRING_MATH_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WString.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WString.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WString.cpp	(revision 136)
@@ -0,0 +1,746 @@
+/*
+  WString.cpp - String library for Wiring & Arduino
+  ...mostly rewritten by Paul Stoffregen...
+  Copyright (c) 2009-10 Hernando Barragan.  All rights reserved.
+  Copyright 2011, Paul Stoffregen, paul@pjrc.com
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "WString.h"
+#include "itoa.h"
+#include "avr/dtostrf.h"
+
+/*********************************************/
+/*  Constructors                             */
+/*********************************************/
+
+String::String(const char *cstr)
+{
+	init();
+	if (cstr) copy(cstr, strlen(cstr));
+}
+
+String::String(const String &value)
+{
+	init();
+	*this = value;
+}
+
+String::String(const __FlashStringHelper *pstr)
+{
+	init();
+	*this = pstr;
+}
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+String::String(String &&rval)
+{
+	init();
+	move(rval);
+}
+String::String(StringSumHelper &&rval)
+{
+	init();
+	move(rval);
+}
+#endif
+
+String::String(char c)
+{
+	init();
+	char buf[2];
+	buf[0] = c;
+	buf[1] = 0;
+	*this = buf;
+}
+
+String::String(unsigned char value, unsigned char base)
+{
+	init();
+	char buf[1 + 8 * sizeof(unsigned char)];
+	utoa(value, buf, base);
+	*this = buf;
+}
+
+String::String(int value, unsigned char base)
+{
+	init();
+	char buf[2 + 8 * sizeof(int)];
+	itoa(value, buf, base);
+	*this = buf;
+}
+
+String::String(unsigned int value, unsigned char base)
+{
+	init();
+	char buf[1 + 8 * sizeof(unsigned int)];
+	utoa(value, buf, base);
+	*this = buf;
+}
+
+String::String(long value, unsigned char base)
+{
+	init();
+	char buf[2 + 8 * sizeof(long)];
+	ltoa(value, buf, base);
+	*this = buf;
+}
+
+String::String(unsigned long value, unsigned char base)
+{
+	init();
+	char buf[1 + 8 * sizeof(unsigned long)];
+	ultoa(value, buf, base);
+	*this = buf;
+}
+
+String::String(float value, unsigned char decimalPlaces)
+{
+	init();
+	char buf[33];
+	*this = dtostrf(value, (decimalPlaces + 2), decimalPlaces, buf);
+}
+
+String::String(double value, unsigned char decimalPlaces)
+{
+	init();
+	char buf[33];
+	*this = dtostrf(value, (decimalPlaces + 2), decimalPlaces, buf);
+}
+
+String::~String()
+{
+	free(buffer);
+}
+
+/*********************************************/
+/*  Memory Management                        */
+/*********************************************/
+
+inline void String::init(void)
+{
+	buffer = NULL;
+	capacity = 0;
+	len = 0;
+}
+
+void String::invalidate(void)
+{
+	if (buffer) free(buffer);
+	buffer = NULL;
+	capacity = len = 0;
+}
+
+unsigned char String::reserve(unsigned int size)
+{
+	if (buffer && capacity >= size) return 1;
+	if (changeBuffer(size)) {
+		if (len == 0) buffer[0] = 0;
+		return 1;
+	}
+	return 0;
+}
+
+unsigned char String::changeBuffer(unsigned int maxStrLen)
+{
+	char *newbuffer = (char *)realloc(buffer, maxStrLen + 1);
+	if (newbuffer) {
+		buffer = newbuffer;
+		capacity = maxStrLen;
+		return 1;
+	}
+	return 0;
+}
+
+/*********************************************/
+/*  Copy and Move                            */
+/*********************************************/
+
+String & String::copy(const char *cstr, unsigned int length)
+{
+	if (!reserve(length)) {
+		invalidate();
+		return *this;
+	}
+	len = length;
+	strcpy(buffer, cstr);
+	return *this;
+}
+
+String & String::copy(const __FlashStringHelper *pstr, unsigned int length)
+{
+	if (!reserve(length)) {
+		invalidate();
+		return *this;
+	}
+	len = length;
+	strcpy_P(buffer, (PGM_P)pstr);
+	return *this;
+}
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+void String::move(String &rhs)
+{
+	if (buffer) {
+		if (capacity >= rhs.len) {
+			strcpy(buffer, rhs.buffer);
+			len = rhs.len;
+			rhs.len = 0;
+			return;
+		} else {
+			free(buffer);
+		}
+	}
+	buffer = rhs.buffer;
+	capacity = rhs.capacity;
+	len = rhs.len;
+	rhs.buffer = NULL;
+	rhs.capacity = 0;
+	rhs.len = 0;
+}
+#endif
+
+String & String::operator = (const String &rhs)
+{
+	if (this == &rhs) return *this;
+	
+	if (rhs.buffer) copy(rhs.buffer, rhs.len);
+	else invalidate();
+	
+	return *this;
+}
+
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+String & String::operator = (String &&rval)
+{
+	if (this != &rval) move(rval);
+	return *this;
+}
+
+String & String::operator = (StringSumHelper &&rval)
+{
+	if (this != &rval) move(rval);
+	return *this;
+}
+#endif
+
+String & String::operator = (const char *cstr)
+{
+	if (cstr) copy(cstr, strlen(cstr));
+	else invalidate();
+	
+	return *this;
+}
+
+String & String::operator = (const __FlashStringHelper *pstr)
+{
+	if (pstr) copy(pstr, strlen_P((PGM_P)pstr));
+	else invalidate();
+
+	return *this;
+}
+
+/*********************************************/
+/*  concat                                   */
+/*********************************************/
+
+unsigned char String::concat(const String &s)
+{
+	return concat(s.buffer, s.len);
+}
+
+unsigned char String::concat(const char *cstr, unsigned int length)
+{
+	unsigned int newlen = len + length;
+	if (!cstr) return 0;
+	if (length == 0) return 1;
+	if (!reserve(newlen)) return 0;
+	strcpy(buffer + len, cstr);
+	len = newlen;
+	return 1;
+}
+
+unsigned char String::concat(const char *cstr)
+{
+	if (!cstr) return 0;
+	return concat(cstr, strlen(cstr));
+}
+
+unsigned char String::concat(char c)
+{
+	char buf[2];
+	buf[0] = c;
+	buf[1] = 0;
+	return concat(buf, 1);
+}
+
+unsigned char String::concat(unsigned char num)
+{
+	char buf[1 + 3 * sizeof(unsigned char)];
+	itoa(num, buf, 10);
+	return concat(buf, strlen(buf));
+}
+
+unsigned char String::concat(int num)
+{
+	char buf[2 + 3 * sizeof(int)];
+	itoa(num, buf, 10);
+	return concat(buf, strlen(buf));
+}
+
+unsigned char String::concat(unsigned int num)
+{
+	char buf[1 + 3 * sizeof(unsigned int)];
+	utoa(num, buf, 10);
+	return concat(buf, strlen(buf));
+}
+
+unsigned char String::concat(long num)
+{
+	char buf[2 + 3 * sizeof(long)];
+	ltoa(num, buf, 10);
+	return concat(buf, strlen(buf));
+}
+
+unsigned char String::concat(unsigned long num)
+{
+	char buf[1 + 3 * sizeof(unsigned long)];
+	ultoa(num, buf, 10);
+	return concat(buf, strlen(buf));
+}
+
+unsigned char String::concat(float num)
+{
+	char buf[20];
+	char* string = dtostrf(num, 4, 2, buf);
+	return concat(string, strlen(string));
+}
+
+unsigned char String::concat(double num)
+{
+	char buf[20];
+	char* string = dtostrf(num, 4, 2, buf);
+	return concat(string, strlen(string));
+}
+
+unsigned char String::concat(const __FlashStringHelper * str)
+{
+	if (!str) return 0;
+	int length = strlen_P((const char *) str);
+	if (length == 0) return 1;
+	unsigned int newlen = len + length;
+	if (!reserve(newlen)) return 0;
+	strcpy_P(buffer + len, (const char *) str);
+	len = newlen;
+	return 1;
+}
+
+/*********************************************/
+/*  Concatenate                              */
+/*********************************************/
+
+StringSumHelper & operator + (const StringSumHelper &lhs, const String &rhs)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(rhs.buffer, rhs.len)) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, const char *cstr)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!cstr || !a.concat(cstr, strlen(cstr))) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, char c)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(c)) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, unsigned char num)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(num)) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, int num)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(num)) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, unsigned int num)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(num)) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, long num)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(num)) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, unsigned long num)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(num)) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, float num)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(num)) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, double num)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(num)) a.invalidate();
+	return a;
+}
+
+StringSumHelper & operator + (const StringSumHelper &lhs, const __FlashStringHelper *rhs)
+{
+	StringSumHelper &a = const_cast<StringSumHelper&>(lhs);
+	if (!a.concat(rhs))	a.invalidate();
+	return a;
+}
+
+/*********************************************/
+/*  Comparison                               */
+/*********************************************/
+
+int String::compareTo(const String &s) const
+{
+	if (!buffer || !s.buffer) {
+		if (s.buffer && s.len > 0) return 0 - *(unsigned char *)s.buffer;
+		if (buffer && len > 0) return *(unsigned char *)buffer;
+		return 0;
+	}
+	return strcmp(buffer, s.buffer);
+}
+
+unsigned char String::equals(const String &s2) const
+{
+	return (len == s2.len && compareTo(s2) == 0);
+}
+
+unsigned char String::equals(const char *cstr) const
+{
+	if (len == 0) return (cstr == NULL || *cstr == 0);
+	if (cstr == NULL) return buffer[0] == 0;
+	return strcmp(buffer, cstr) == 0;
+}
+
+unsigned char String::operator<(const String &rhs) const
+{
+	return compareTo(rhs) < 0;
+}
+
+unsigned char String::operator>(const String &rhs) const
+{
+	return compareTo(rhs) > 0;
+}
+
+unsigned char String::operator<=(const String &rhs) const
+{
+	return compareTo(rhs) <= 0;
+}
+
+unsigned char String::operator>=(const String &rhs) const
+{
+	return compareTo(rhs) >= 0;
+}
+
+unsigned char String::equalsIgnoreCase( const String &s2 ) const
+{
+	if (this == &s2) return 1;
+	if (len != s2.len) return 0;
+	if (len == 0) return 1;
+	const char *p1 = buffer;
+	const char *p2 = s2.buffer;
+	while (*p1) {
+		if (tolower(*p1++) != tolower(*p2++)) return 0;
+	} 
+	return 1;
+}
+
+unsigned char String::startsWith( const String &s2 ) const
+{
+	if (len < s2.len) return 0;
+	return startsWith(s2, 0);
+}
+
+unsigned char String::startsWith( const String &s2, unsigned int offset ) const
+{
+	if (offset > len - s2.len || !buffer || !s2.buffer) return 0;
+	return strncmp( &buffer[offset], s2.buffer, s2.len ) == 0;
+}
+
+unsigned char String::endsWith( const String &s2 ) const
+{
+	if ( len < s2.len || !buffer || !s2.buffer) return 0;
+	return strcmp(&buffer[len - s2.len], s2.buffer) == 0;
+}
+
+/*********************************************/
+/*  Character Access                         */
+/*********************************************/
+
+char String::charAt(unsigned int loc) const
+{
+	return operator[](loc);
+}
+
+void String::setCharAt(unsigned int loc, char c) 
+{
+	if (loc < len) buffer[loc] = c;
+}
+
+char & String::operator[](unsigned int index)
+{
+	static char dummy_writable_char;
+	if (index >= len || !buffer) {
+		dummy_writable_char = 0;
+		return dummy_writable_char;
+	}
+	return buffer[index];
+}
+
+char String::operator[]( unsigned int index ) const
+{
+	if (index >= len || !buffer) return 0;
+	return buffer[index];
+}
+
+void String::getBytes(unsigned char *buf, unsigned int bufsize, unsigned int index) const
+{
+	if (!bufsize || !buf) return;
+	if (index >= len) {
+		buf[0] = 0;
+		return;
+	}
+	unsigned int n = bufsize - 1;
+	if (n > len - index) n = len - index;
+	strncpy((char *)buf, buffer + index, n);
+	buf[n] = 0;
+}
+
+/*********************************************/
+/*  Search                                   */
+/*********************************************/
+
+int String::indexOf(char c) const
+{
+	return indexOf(c, 0);
+}
+
+int String::indexOf( char ch, unsigned int fromIndex ) const
+{
+	if (fromIndex >= len) return -1;
+	const char* temp = strchr(buffer + fromIndex, ch);
+	if (temp == NULL) return -1;
+	return temp - buffer;
+}
+
+int String::indexOf(const String &s2) const
+{
+	return indexOf(s2, 0);
+}
+
+int String::indexOf(const String &s2, unsigned int fromIndex) const
+{
+	if (fromIndex >= len) return -1;
+	const char *found = strstr(buffer + fromIndex, s2.buffer);
+	if (found == NULL) return -1;
+	return found - buffer;
+}
+
+int String::lastIndexOf( char theChar ) const
+{
+	return lastIndexOf(theChar, len - 1);
+}
+
+int String::lastIndexOf(char ch, unsigned int fromIndex) const
+{
+	if (fromIndex >= len) return -1;
+	char tempchar = buffer[fromIndex + 1];
+	buffer[fromIndex + 1] = '\0';
+	char* temp = strrchr( buffer, ch );
+	buffer[fromIndex + 1] = tempchar;
+	if (temp == NULL) return -1;
+	return temp - buffer;
+}
+
+int String::lastIndexOf(const String &s2) const
+{
+	return lastIndexOf(s2, len - s2.len);
+}
+
+int String::lastIndexOf(const String &s2, unsigned int fromIndex) const
+{
+  	if (s2.len == 0 || len == 0 || s2.len > len) return -1;
+	if (fromIndex >= len) fromIndex = len - 1;
+	int found = -1;
+	for (char *p = buffer; p <= buffer + fromIndex; p++) {
+		p = strstr(p, s2.buffer);
+		if (!p) break;
+		if ((unsigned int)(p - buffer) <= fromIndex) found = p - buffer;
+	}
+	return found;
+}
+
+String String::substring(unsigned int left, unsigned int right) const
+{
+	if (left > right) {
+		unsigned int temp = right;
+		right = left;
+		left = temp;
+	}
+	String out;
+	if (left > len) return out;
+	if (right > len) right = len;
+	char temp = buffer[right];  // save the replaced character
+	buffer[right] = '\0';	
+	out = buffer + left;  // pointer arithmetic
+	buffer[right] = temp;  //restore character
+	return out;
+}
+
+/*********************************************/
+/*  Modification                             */
+/*********************************************/
+
+void String::replace(char find, char replace)
+{
+	if (!buffer) return;
+	for (char *p = buffer; *p; p++) {
+		if (*p == find) *p = replace;
+	}
+}
+
+void String::replace(const String& find, const String& replace)
+{
+	if (len == 0 || find.len == 0) return;
+	int diff = replace.len - find.len;
+	char *readFrom = buffer;
+	char *foundAt;
+	if (diff == 0) {
+		while ((foundAt = strstr(readFrom, find.buffer)) != NULL) {
+			memcpy(foundAt, replace.buffer, replace.len);
+			readFrom = foundAt + replace.len;
+		}
+	} else if (diff < 0) {
+		char *writeTo = buffer;
+		while ((foundAt = strstr(readFrom, find.buffer)) != NULL) {
+			unsigned int n = foundAt - readFrom;
+			memcpy(writeTo, readFrom, n);
+			writeTo += n;
+			memcpy(writeTo, replace.buffer, replace.len);
+			writeTo += replace.len;
+			readFrom = foundAt + find.len;
+			len += diff;
+		}
+		strcpy(writeTo, readFrom);
+	} else {
+		unsigned int size = len; // compute size needed for result
+		while ((foundAt = strstr(readFrom, find.buffer)) != NULL) {
+			readFrom = foundAt + find.len;
+			size += diff;
+		}
+		if (size == len) return;
+		if (size > capacity && !changeBuffer(size)) return; // XXX: tell user!
+		int index = len - 1;
+		while (index >= 0 && (index = lastIndexOf(find, index)) >= 0) {
+			readFrom = buffer + index + find.len;
+			memmove(readFrom + diff, readFrom, len - (readFrom - buffer));
+			len += diff;
+			buffer[len] = 0;
+			memcpy(buffer + index, replace.buffer, replace.len);
+			index--;
+		}
+	}
+}
+
+void String::remove(unsigned int index){
+	if (index >= len) { return; }
+	int count = len - index;
+	remove(index, count);
+}
+
+void String::remove(unsigned int index, unsigned int count){
+	if (index >= len) { return; }
+	if (count <= 0) { return; }
+	if (index + count > len) { count = len - index; }
+	char *writeTo = buffer + index;
+	len = len - count;
+	strncpy(writeTo, buffer + index + count,len - index);
+	buffer[len] = 0;
+}
+
+void String::toLowerCase(void)
+{
+	if (!buffer) return;
+	for (char *p = buffer; *p; p++) {
+		*p = tolower(*p);
+	}
+}
+
+void String::toUpperCase(void)
+{
+	if (!buffer) return;
+	for (char *p = buffer; *p; p++) {
+		*p = toupper(*p);
+	}
+}
+
+void String::trim(void)
+{
+	if (!buffer || len == 0) return;
+	char *begin = buffer;
+	while (isspace(*begin)) begin++;
+	char *end = buffer + len - 1;
+	while (isspace(*end) && end >= begin) end--;
+	len = end + 1 - begin;
+	if (begin > buffer) memcpy(buffer, begin, len);
+	buffer[len] = 0;
+}
+
+/*********************************************/
+/*  Parsing / Conversion                     */
+/*********************************************/
+
+long String::toInt(void) const
+{
+	if (buffer) return atol(buffer);
+	return 0;
+}
+
+float String::toFloat(void) const
+{
+	if (buffer) return float(atof(buffer));
+	return 0;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WString.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WString.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WString.h	(revision 136)
@@ -0,0 +1,224 @@
+/*
+  WString.h - String library for Wiring & Arduino
+  ...mostly rewritten by Paul Stoffregen...
+  Copyright (c) 2009-10 Hernando Barragan.  All right reserved.
+  Copyright 2011, Paul Stoffregen, paul@pjrc.com
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef String_class_h
+#define String_class_h
+#ifdef __cplusplus
+
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+#include <avr/pgmspace.h>
+
+// When compiling programs with this class, the following gcc parameters
+// dramatically increase performance and memory (RAM) efficiency, typically
+// with little or no increase in code size.
+//     -felide-constructors
+//     -std=c++0x
+
+class __FlashStringHelper;
+#define F(string_literal) (reinterpret_cast<const __FlashStringHelper *>(PSTR(string_literal)))
+
+// An inherited class for holding the result of a concatenation.  These
+// result objects are assumed to be writable by subsequent concatenations.
+class StringSumHelper;
+
+// The string class
+class String
+{
+	// use a function pointer to allow for "if (s)" without the
+	// complications of an operator bool(). for more information, see:
+	// http://www.artima.com/cppsource/safebool.html
+	typedef void (String::*StringIfHelperType)() const;
+	void StringIfHelper() const {}
+
+public:
+	// constructors
+	// creates a copy of the initial value.
+	// if the initial value is null or invalid, or if memory allocation
+	// fails, the string will be marked as invalid (i.e. "if (s)" will
+	// be false).
+	String(const char *cstr = "");
+	String(const String &str);
+	String(const __FlashStringHelper *str);
+	#ifdef __GXX_EXPERIMENTAL_CXX0X__
+	String(String &&rval);
+	String(StringSumHelper &&rval);
+	#endif
+	explicit String(char c);
+	explicit String(unsigned char, unsigned char base=10);
+	explicit String(int, unsigned char base=10);
+	explicit String(unsigned int, unsigned char base=10);
+	explicit String(long, unsigned char base=10);
+	explicit String(unsigned long, unsigned char base=10);
+	explicit String(float, unsigned char decimalPlaces=2);
+	explicit String(double, unsigned char decimalPlaces=2);
+	~String(void);
+
+	// memory management
+	// return true on success, false on failure (in which case, the string
+	// is left unchanged).  reserve(0), if successful, will validate an
+	// invalid string (i.e., "if (s)" will be true afterwards)
+	unsigned char reserve(unsigned int size);
+	inline unsigned int length(void) const {return len;}
+
+	// creates a copy of the assigned value.  if the value is null or
+	// invalid, or if the memory allocation fails, the string will be 
+	// marked as invalid ("if (s)" will be false).
+	String & operator = (const String &rhs);
+	String & operator = (const char *cstr);
+	String & operator = (const __FlashStringHelper *str);
+	#ifdef __GXX_EXPERIMENTAL_CXX0X__
+	String & operator = (String &&rval);
+	String & operator = (StringSumHelper &&rval);
+	#endif
+
+	// concatenate (works w/ built-in types)
+	
+	// returns true on success, false on failure (in which case, the string
+	// is left unchanged).  if the argument is null or invalid, the 
+	// concatenation is considered unsucessful.  
+	unsigned char concat(const String &str);
+	unsigned char concat(const char *cstr);
+	unsigned char concat(char c);
+	unsigned char concat(unsigned char c);
+	unsigned char concat(int num);
+	unsigned char concat(unsigned int num);
+	unsigned char concat(long num);
+	unsigned char concat(unsigned long num);
+	unsigned char concat(float num);
+	unsigned char concat(double num);
+	unsigned char concat(const __FlashStringHelper * str);
+	
+	// if there's not enough memory for the concatenated value, the string
+	// will be left unchanged (but this isn't signalled in any way)
+	String & operator += (const String &rhs)	{concat(rhs); return (*this);}
+	String & operator += (const char *cstr)		{concat(cstr); return (*this);}
+	String & operator += (char c)			{concat(c); return (*this);}
+	String & operator += (unsigned char num)		{concat(num); return (*this);}
+	String & operator += (int num)			{concat(num); return (*this);}
+	String & operator += (unsigned int num)		{concat(num); return (*this);}
+	String & operator += (long num)			{concat(num); return (*this);}
+	String & operator += (unsigned long num)	{concat(num); return (*this);}
+	String & operator += (float num)		{concat(num); return (*this);}
+	String & operator += (double num)		{concat(num); return (*this);}
+	String & operator += (const __FlashStringHelper *str){concat(str); return (*this);}
+
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, const String &rhs);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, const char *cstr);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, char c);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, unsigned char num);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, int num);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, unsigned int num);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, long num);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, unsigned long num);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, float num);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, double num);
+	friend StringSumHelper & operator + (const StringSumHelper &lhs, const __FlashStringHelper *rhs);
+
+	// comparison (only works w/ Strings and "strings")
+	operator StringIfHelperType() const { return buffer ? &String::StringIfHelper : 0; }
+	int compareTo(const String &s) const;
+	unsigned char equals(const String &s) const;
+	unsigned char equals(const char *cstr) const;
+	unsigned char operator == (const String &rhs) const {return equals(rhs);}
+	unsigned char operator == (const char *cstr) const {return equals(cstr);}
+	unsigned char operator != (const String &rhs) const {return !equals(rhs);}
+	unsigned char operator != (const char *cstr) const {return !equals(cstr);}
+	unsigned char operator <  (const String &rhs) const;
+	unsigned char operator >  (const String &rhs) const;
+	unsigned char operator <= (const String &rhs) const;
+	unsigned char operator >= (const String &rhs) const;
+	unsigned char equalsIgnoreCase(const String &s) const;
+	unsigned char startsWith( const String &prefix) const;
+	unsigned char startsWith(const String &prefix, unsigned int offset) const;
+	unsigned char endsWith(const String &suffix) const;
+
+	// character acccess
+	char charAt(unsigned int index) const;
+	void setCharAt(unsigned int index, char c);
+	char operator [] (unsigned int index) const;
+	char& operator [] (unsigned int index);
+	void getBytes(unsigned char *buf, unsigned int bufsize, unsigned int index=0) const;
+	void toCharArray(char *buf, unsigned int bufsize, unsigned int index=0) const
+		{getBytes((unsigned char *)buf, bufsize, index);}
+	const char * c_str() const { return buffer; }
+
+	// search
+	int indexOf( char ch ) const;
+	int indexOf( char ch, unsigned int fromIndex ) const;
+	int indexOf( const String &str ) const;
+	int indexOf( const String &str, unsigned int fromIndex ) const;
+	int lastIndexOf( char ch ) const;
+	int lastIndexOf( char ch, unsigned int fromIndex ) const;
+	int lastIndexOf( const String &str ) const;
+	int lastIndexOf( const String &str, unsigned int fromIndex ) const;
+	String substring( unsigned int beginIndex ) const { return substring(beginIndex, len); };
+	String substring( unsigned int beginIndex, unsigned int endIndex ) const;
+
+	// modification
+	void replace(char find, char replace);
+	void replace(const String& find, const String& replace);
+	void remove(unsigned int index);
+	void remove(unsigned int index, unsigned int count);
+	void toLowerCase(void);
+	void toUpperCase(void);
+	void trim(void);
+
+	// parsing/conversion
+	long toInt(void) const;
+	float toFloat(void) const;
+
+protected:
+	char *buffer;	        // the actual char array
+	unsigned int capacity;  // the array length minus one (for the '\0')
+	unsigned int len;       // the String length (not counting the '\0')
+protected:
+	void init(void);
+	void invalidate(void);
+	unsigned char changeBuffer(unsigned int maxStrLen);
+	unsigned char concat(const char *cstr, unsigned int length);
+
+	// copy and move
+	String & copy(const char *cstr, unsigned int length);
+	String & copy(const __FlashStringHelper *pstr, unsigned int length);
+	#ifdef __GXX_EXPERIMENTAL_CXX0X__
+	void move(String &rhs);
+	#endif
+};
+
+class StringSumHelper : public String
+{
+public:
+	StringSumHelper(const String &s) : String(s) {}
+	StringSumHelper(const char *p) : String(p) {}
+	StringSumHelper(char c) : String(c) {}
+	StringSumHelper(unsigned char num) : String(num) {}
+	StringSumHelper(int num) : String(num) {}
+	StringSumHelper(unsigned int num) : String(num) {}
+	StringSumHelper(long num) : String(num) {}
+	StringSumHelper(unsigned long num) : String(num) {}
+	StringSumHelper(float num) : String(num) {}
+	StringSumHelper(double num) : String(num) {}
+};
+
+#endif  // __cplusplus
+#endif  // String_class_h
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WVariant.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WVariant.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/WVariant.h	(revision 136)
@@ -0,0 +1,198 @@
+#ifndef _VARIANTS_
+#define _VARIANTS_
+
+#include <stdint.h>
+#include "sam.h"
+
+#ifdef __cplusplus
+extern "C"{
+#endif // __cplusplus
+
+/* Definitions and types for pins */
+typedef enum _EAnalogChannel
+{
+  No_ADC_Channel=-1,
+  ADC_Channel0=0,
+  ADC_Channel1=1,
+  ADC_Channel2=2,
+  ADC_Channel3=3,
+  ADC_Channel4=4,
+  ADC_Channel5=5,
+  ADC_Channel6=6,
+  ADC_Channel7=7,
+  ADC_Channel10=10,
+  ADC_Channel16=16,
+  ADC_Channel17=17,
+  ADC_Channel18=18,
+  ADC_Channel19=19,
+  DAC_Channel0,
+} EAnalogChannel ;
+
+// Definitions for TC channels
+typedef enum _ETCChannel
+{
+  NOT_ON_TIMER=-1,
+	TC3_CH0 = (3<<8)|(0),
+	TC3_CH1 = (3<<8)|(1),
+	TCC0_CH0 = (0<<8)|(0),
+	TCC0_CH1 = (0<<8)|(1),
+	TCC0_CH4 = (0<<8)|(4),
+	TCC0_CH5 = (0<<8)|(5),
+	TCC0_CH6 = (0<<8)|(6),
+	TCC0_CH7 = (0<<8)|(7),
+	TCC1_CH0 = (1<<8)|(0),
+	TCC1_CH1 = (1<<8)|(1),
+	TCC2_CH0 = (2<<8)|(0),
+	TCC2_CH1 = (2<<8)|(1)
+} ETCChannel ;
+
+extern const void* g_apTCInstances[TCC_INST_NUM+TC_INST_NUM] ;
+
+#define GetTCNumber( x ) ( (x) >> 8 )
+#define GetTCChannelNumber( x ) ( (x) && 0xff )
+#define GetTC( x ) ( g_apTCInstances[(x) >> 8] )
+
+// Definitions for PWM channels
+typedef enum _EPWMChannel
+{
+  NOT_ON_PWM=-1,
+	PWM3_CH0=TC3_CH0,
+	PWM3_CH1=TC3_CH1,
+	PWM0_CH0=TCC0_CH0,
+	PWM0_CH1=TCC0_CH1,
+	PWM0_CH4=TCC0_CH4,
+	PWM0_CH5=TCC0_CH5,
+	PWM0_CH6=TCC0_CH6,
+	PWM0_CH7=TCC0_CH7,
+	PWM1_CH0=TCC1_CH0,
+	PWM1_CH1=TCC1_CH1,
+	PWM2_CH0=TCC2_CH0,
+	PWM2_CH1=TCC2_CH1
+} EPWMChannel ;
+
+typedef enum _EPortType
+{
+	NOT_A_PORT=-1,
+	PORTA=0,
+	PORTB=1,
+	PORTC=2,
+} EPortType ;
+
+typedef enum _EExt_Interrupts
+{
+  EXTERNAL_INT_0 = 0,   // Available on pin 11
+  EXTERNAL_INT_1,       // Available on pin 13
+  EXTERNAL_INT_2,       // Available on pins 10, A0, A5
+  EXTERNAL_INT_3,       // Available on pin 12
+  EXTERNAL_INT_4,       // Available on pin 6, 8, A3
+  EXTERNAL_INT_5,       // Available on pin 7, 9, A4
+  EXTERNAL_INT_6,       // Available on pin 16
+  EXTERNAL_INT_7,       // Available on pin 17
+  EXTERNAL_INT_8,       // Available on pin A1
+  EXTERNAL_INT_9,       // Available on pin 3, A2
+  EXTERNAL_INT_10,      // Available on pin 0, 21
+  EXTERNAL_INT_11,      // Available on pin 1, 20
+  EXTERNAL_INT_12,      // Available on pin 18
+  EXTERNAL_INT_13,      // Available on pin EDBG_GPIO0 (43)
+  EXTERNAL_INT_14,      // Available on pin 4
+  EXTERNAL_INT_15,      // Available on pin 5
+  EXTERNAL_INT_NMI,     // Available on pin 2
+  EXTERNAL_NUM_INTERRUPTS,
+  NOT_AN_INTERRUPT = -1,
+  EXTERNAL_INT_NONE = NOT_AN_INTERRUPT,
+} EExt_Interrupts ;
+
+//A    B                 C       D          E      F   G   H
+//EIC REF ADC AC PTC DAC SERCOM SERCOM_ALT TC/TCC TCC COM AC/GCLK
+
+typedef enum _EPioType
+{
+  PIO_NOT_A_PIN=-1,  /* Not under control of a peripheral. */
+  PIO_EXTINT,        /* The pin is controlled by the associated signal of peripheral A. */
+  PIO_ANALOG,        /* The pin is controlled by the associated signal of peripheral B. */
+  PIO_SERCOM,        /* The pin is controlled by the associated signal of peripheral C. */
+  PIO_SERCOM_ALT,    /* The pin is controlled by the associated signal of peripheral D. */
+  PIO_TIMER,         /* The pin is controlled by the associated signal of peripheral E. */
+  PIO_TIMER_ALT,     /* The pin is controlled by the associated signal of peripheral F. */
+  PIO_COM,           /* The pin is controlled by the associated signal of peripheral G. */
+  PIO_AC_CLK,        /* The pin is controlled by the associated signal of peripheral H. */
+  PIO_DIGITAL,       /* The pin is controlled by PORT. */
+  PIO_INPUT,         /* The pin is controlled by PORT and is an input. */
+  PIO_INPUT_PULLUP,  /* The pin is controlled by PORT and is an input with internal pull-up resistor enabled. */
+  PIO_OUTPUT,        /* The pin is controlled by PORT and is an output. */
+
+  PIO_PWM=PIO_TIMER,
+  PIO_PWM_ALT=PIO_TIMER_ALT,
+} EPioType ;
+
+/**
+ * Pin Attributes to be OR-ed
+ */
+#define PIN_ATTR_NONE          (0UL<<0)
+#define PIN_ATTR_COMBO         (1UL<<0)
+#define PIN_ATTR_ANALOG        (1UL<<1)
+#define PIN_ATTR_DIGITAL       (1UL<<2)
+#define PIN_ATTR_PWM           (1UL<<3)
+#define PIN_ATTR_TIMER         (1UL<<4)
+#define PIN_ATTR_EXTINT        (1UL<<5)
+
+/* Types used for the table below */
+typedef struct _PinDescription
+{
+  EPortType ulPort ;
+  uint32_t ulPin ;
+  EPioType ulPinType ;
+  uint32_t ulPinAttribute ;
+  EAnalogChannel ulADCChannelNumber ; /* ADC Channel number in the SAM device */
+  EPWMChannel ulPWMChannel ;
+  ETCChannel ulTCChannel ;
+  EExt_Interrupts ulExtInt ;
+} PinDescription ;
+
+/* Pins table to be instantiated into variant.cpp */
+extern const PinDescription g_APinDescription[] ;
+
+/* Generic Clock Multiplexer IDs */
+#define GCM_DFLL48M_REF           (0x00U)
+#define GCM_FDPLL96M_INPUT        (0x01U)
+#define GCM_FDPLL96M_32K          (0x02U)
+#define GCM_WDT                   (0x03U)
+#define GCM_RTC                   (0x04U)
+#define GCM_EIC                   (0x05U)
+#define GCM_USB                   (0x06U)
+#define GCM_EVSYS_CHANNEL_0       (0x07U)
+#define GCM_EVSYS_CHANNEL_1       (0x08U)
+#define GCM_EVSYS_CHANNEL_2       (0x09U)
+#define GCM_EVSYS_CHANNEL_3       (0x0AU)
+#define GCM_EVSYS_CHANNEL_4       (0x0BU)
+#define GCM_EVSYS_CHANNEL_5       (0x0CU)
+#define GCM_EVSYS_CHANNEL_6       (0x0DU)
+#define GCM_EVSYS_CHANNEL_7       (0x0EU)
+#define GCM_EVSYS_CHANNEL_8       (0x0FU)
+#define GCM_EVSYS_CHANNEL_9       (0x10U)
+#define GCM_EVSYS_CHANNEL_10      (0x11U)
+#define GCM_EVSYS_CHANNEL_11      (0x12U)
+#define GCM_SERCOMx_SLOW          (0x13U)
+#define GCM_SERCOM0_CORE          (0x14U)
+#define GCM_SERCOM1_CORE          (0x15U)
+#define GCM_SERCOM2_CORE          (0x16U)
+#define GCM_SERCOM3_CORE          (0x17U)
+#define GCM_SERCOM4_CORE          (0x18U)
+#define GCM_SERCOM5_CORE          (0x19U)
+#define GCM_TCC0_TCC1             (0x1AU)
+#define GCM_TCC2_TC3              (0x1BU)
+#define GCM_TC4_TC5               (0x1CU)
+#define GCM_TC6_TC7               (0x1DU)
+#define GCM_ADC                   (0x1EU)
+#define GCM_AC_DIG                (0x1FU)
+#define GCM_AC_ANA                (0x20U)
+#define GCM_DAC                   (0x21U)
+#define GCM_PTC                   (0x22U)
+#define GCM_I2S_0                 (0x23U)
+#define GCM_I2S_1                 (0x24U)
+
+#ifdef __cplusplus
+} // extern "C"
+#endif // __cplusplus
+
+#endif // _VARIANTS_
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/avr/dtostrf.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/avr/dtostrf.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/avr/dtostrf.c	(revision 136)
@@ -0,0 +1,27 @@
+/*
+  dtostrf - Emulation for dtostrf function from avr-libc
+  Copyright (c) 2013 Arduino.  All rights reserved.
+  Written by Cristian Maglie <c.maglie@bug.st>
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+char *dtostrf (double val, signed char width, unsigned char prec, char *sout) {
+  char fmt[20];
+  sprintf(fmt, "%%%d.%df", width, prec);
+  sprintf(sout, fmt, val);
+  return sout;
+}
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/avr/dtostrf.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/avr/dtostrf.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/avr/dtostrf.h	(revision 136)
@@ -0,0 +1,29 @@
+/*
+  dtostrf - Emulation for dtostrf function from avr-libc
+  Copyright (c) 2013 Arduino.  All rights reserved.
+  Written by Cristian Maglie <c.maglie@bug.st>
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+char *dtostrf (double val, signed char width, unsigned char prec, char *sout);
+
+#ifdef __cplusplus
+}
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/avr/pgmspace.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/avr/pgmspace.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/avr/pgmspace.h	(revision 136)
@@ -0,0 +1,44 @@
+#ifndef __PGMSPACE_H_
+#define __PGMSPACE_H_ 1
+
+#include <inttypes.h>
+
+#define PROGMEM
+#define PGM_P  const char *
+#define PSTR(str) (str)
+
+#define _SFR_BYTE(n) (n)
+
+typedef void prog_void;
+typedef char prog_char;
+typedef unsigned char prog_uchar;
+typedef int8_t prog_int8_t;
+typedef uint8_t prog_uint8_t;
+typedef int16_t prog_int16_t;
+typedef uint16_t prog_uint16_t;
+typedef int32_t prog_int32_t;
+typedef uint32_t prog_uint32_t;
+
+#define memcpy_P(dest, src, num) memcpy((dest), (src), (num))
+#define strcpy_P(dest, src) strcpy((dest), (src))
+#define strcat_P(dest, src) strcat((dest), (src))
+#define strcmp_P(a, b) strcmp((a), (b))
+#define strstr_P(a, b) strstr((a), (b))
+#define strlen_P(a) strlen((a))
+#define sprintf_P(s, f, ...) sprintf((s), (f), __VA_ARGS__)
+
+#define pgm_read_byte(addr) (*(const unsigned char *)(addr))
+#define pgm_read_word(addr) (*(const unsigned short *)(addr))
+#define pgm_read_dword(addr) (*(const unsigned long *)(addr))
+#define pgm_read_float(addr) (*(const float *)(addr))
+
+#define pgm_read_byte_near(addr) pgm_read_byte(addr)
+#define pgm_read_word_near(addr) pgm_read_word(addr)
+#define pgm_read_dword_near(addr) pgm_read_dword(addr)
+#define pgm_read_float_near(addr) pgm_read_float(addr)
+#define pgm_read_byte_far(addr) pgm_read_byte(addr)
+#define pgm_read_word_far(addr) pgm_read_word(addr)
+#define pgm_read_dword_far(addr) pgm_read_dword(addr)
+#define pgm_read_float_far(addr) pgm_read_float(addr)
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/binary.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/binary.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/binary.h	(revision 136)
@@ -0,0 +1,534 @@
+/*
+  binary.h - Definitions for binary constants
+  Copyright (c) 2006 David A. Mellis.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef Binary_h
+#define Binary_h
+
+#define B0 0
+#define B00 0
+#define B000 0
+#define B0000 0
+#define B00000 0
+#define B000000 0
+#define B0000000 0
+#define B00000000 0
+#define B1 1
+#define B01 1
+#define B001 1
+#define B0001 1
+#define B00001 1
+#define B000001 1
+#define B0000001 1
+#define B00000001 1
+#define B10 2
+#define B010 2
+#define B0010 2
+#define B00010 2
+#define B000010 2
+#define B0000010 2
+#define B00000010 2
+#define B11 3
+#define B011 3
+#define B0011 3
+#define B00011 3
+#define B000011 3
+#define B0000011 3
+#define B00000011 3
+#define B100 4
+#define B0100 4
+#define B00100 4
+#define B000100 4
+#define B0000100 4
+#define B00000100 4
+#define B101 5
+#define B0101 5
+#define B00101 5
+#define B000101 5
+#define B0000101 5
+#define B00000101 5
+#define B110 6
+#define B0110 6
+#define B00110 6
+#define B000110 6
+#define B0000110 6
+#define B00000110 6
+#define B111 7
+#define B0111 7
+#define B00111 7
+#define B000111 7
+#define B0000111 7
+#define B00000111 7
+#define B1000 8
+#define B01000 8
+#define B001000 8
+#define B0001000 8
+#define B00001000 8
+#define B1001 9
+#define B01001 9
+#define B001001 9
+#define B0001001 9
+#define B00001001 9
+#define B1010 10
+#define B01010 10
+#define B001010 10
+#define B0001010 10
+#define B00001010 10
+#define B1011 11
+#define B01011 11
+#define B001011 11
+#define B0001011 11
+#define B00001011 11
+#define B1100 12
+#define B01100 12
+#define B001100 12
+#define B0001100 12
+#define B00001100 12
+#define B1101 13
+#define B01101 13
+#define B001101 13
+#define B0001101 13
+#define B00001101 13
+#define B1110 14
+#define B01110 14
+#define B001110 14
+#define B0001110 14
+#define B00001110 14
+#define B1111 15
+#define B01111 15
+#define B001111 15
+#define B0001111 15
+#define B00001111 15
+#define B10000 16
+#define B010000 16
+#define B0010000 16
+#define B00010000 16
+#define B10001 17
+#define B010001 17
+#define B0010001 17
+#define B00010001 17
+#define B10010 18
+#define B010010 18
+#define B0010010 18
+#define B00010010 18
+#define B10011 19
+#define B010011 19
+#define B0010011 19
+#define B00010011 19
+#define B10100 20
+#define B010100 20
+#define B0010100 20
+#define B00010100 20
+#define B10101 21
+#define B010101 21
+#define B0010101 21
+#define B00010101 21
+#define B10110 22
+#define B010110 22
+#define B0010110 22
+#define B00010110 22
+#define B10111 23
+#define B010111 23
+#define B0010111 23
+#define B00010111 23
+#define B11000 24
+#define B011000 24
+#define B0011000 24
+#define B00011000 24
+#define B11001 25
+#define B011001 25
+#define B0011001 25
+#define B00011001 25
+#define B11010 26
+#define B011010 26
+#define B0011010 26
+#define B00011010 26
+#define B11011 27
+#define B011011 27
+#define B0011011 27
+#define B00011011 27
+#define B11100 28
+#define B011100 28
+#define B0011100 28
+#define B00011100 28
+#define B11101 29
+#define B011101 29
+#define B0011101 29
+#define B00011101 29
+#define B11110 30
+#define B011110 30
+#define B0011110 30
+#define B00011110 30
+#define B11111 31
+#define B011111 31
+#define B0011111 31
+#define B00011111 31
+#define B100000 32
+#define B0100000 32
+#define B00100000 32
+#define B100001 33
+#define B0100001 33
+#define B00100001 33
+#define B100010 34
+#define B0100010 34
+#define B00100010 34
+#define B100011 35
+#define B0100011 35
+#define B00100011 35
+#define B100100 36
+#define B0100100 36
+#define B00100100 36
+#define B100101 37
+#define B0100101 37
+#define B00100101 37
+#define B100110 38
+#define B0100110 38
+#define B00100110 38
+#define B100111 39
+#define B0100111 39
+#define B00100111 39
+#define B101000 40
+#define B0101000 40
+#define B00101000 40
+#define B101001 41
+#define B0101001 41
+#define B00101001 41
+#define B101010 42
+#define B0101010 42
+#define B00101010 42
+#define B101011 43
+#define B0101011 43
+#define B00101011 43
+#define B101100 44
+#define B0101100 44
+#define B00101100 44
+#define B101101 45
+#define B0101101 45
+#define B00101101 45
+#define B101110 46
+#define B0101110 46
+#define B00101110 46
+#define B101111 47
+#define B0101111 47
+#define B00101111 47
+#define B110000 48
+#define B0110000 48
+#define B00110000 48
+#define B110001 49
+#define B0110001 49
+#define B00110001 49
+#define B110010 50
+#define B0110010 50
+#define B00110010 50
+#define B110011 51
+#define B0110011 51
+#define B00110011 51
+#define B110100 52
+#define B0110100 52
+#define B00110100 52
+#define B110101 53
+#define B0110101 53
+#define B00110101 53
+#define B110110 54
+#define B0110110 54
+#define B00110110 54
+#define B110111 55
+#define B0110111 55
+#define B00110111 55
+#define B111000 56
+#define B0111000 56
+#define B00111000 56
+#define B111001 57
+#define B0111001 57
+#define B00111001 57
+#define B111010 58
+#define B0111010 58
+#define B00111010 58
+#define B111011 59
+#define B0111011 59
+#define B00111011 59
+#define B111100 60
+#define B0111100 60
+#define B00111100 60
+#define B111101 61
+#define B0111101 61
+#define B00111101 61
+#define B111110 62
+#define B0111110 62
+#define B00111110 62
+#define B111111 63
+#define B0111111 63
+#define B00111111 63
+#define B1000000 64
+#define B01000000 64
+#define B1000001 65
+#define B01000001 65
+#define B1000010 66
+#define B01000010 66
+#define B1000011 67
+#define B01000011 67
+#define B1000100 68
+#define B01000100 68
+#define B1000101 69
+#define B01000101 69
+#define B1000110 70
+#define B01000110 70
+#define B1000111 71
+#define B01000111 71
+#define B1001000 72
+#define B01001000 72
+#define B1001001 73
+#define B01001001 73
+#define B1001010 74
+#define B01001010 74
+#define B1001011 75
+#define B01001011 75
+#define B1001100 76
+#define B01001100 76
+#define B1001101 77
+#define B01001101 77
+#define B1001110 78
+#define B01001110 78
+#define B1001111 79
+#define B01001111 79
+#define B1010000 80
+#define B01010000 80
+#define B1010001 81
+#define B01010001 81
+#define B1010010 82
+#define B01010010 82
+#define B1010011 83
+#define B01010011 83
+#define B1010100 84
+#define B01010100 84
+#define B1010101 85
+#define B01010101 85
+#define B1010110 86
+#define B01010110 86
+#define B1010111 87
+#define B01010111 87
+#define B1011000 88
+#define B01011000 88
+#define B1011001 89
+#define B01011001 89
+#define B1011010 90
+#define B01011010 90
+#define B1011011 91
+#define B01011011 91
+#define B1011100 92
+#define B01011100 92
+#define B1011101 93
+#define B01011101 93
+#define B1011110 94
+#define B01011110 94
+#define B1011111 95
+#define B01011111 95
+#define B1100000 96
+#define B01100000 96
+#define B1100001 97
+#define B01100001 97
+#define B1100010 98
+#define B01100010 98
+#define B1100011 99
+#define B01100011 99
+#define B1100100 100
+#define B01100100 100
+#define B1100101 101
+#define B01100101 101
+#define B1100110 102
+#define B01100110 102
+#define B1100111 103
+#define B01100111 103
+#define B1101000 104
+#define B01101000 104
+#define B1101001 105
+#define B01101001 105
+#define B1101010 106
+#define B01101010 106
+#define B1101011 107
+#define B01101011 107
+#define B1101100 108
+#define B01101100 108
+#define B1101101 109
+#define B01101101 109
+#define B1101110 110
+#define B01101110 110
+#define B1101111 111
+#define B01101111 111
+#define B1110000 112
+#define B01110000 112
+#define B1110001 113
+#define B01110001 113
+#define B1110010 114
+#define B01110010 114
+#define B1110011 115
+#define B01110011 115
+#define B1110100 116
+#define B01110100 116
+#define B1110101 117
+#define B01110101 117
+#define B1110110 118
+#define B01110110 118
+#define B1110111 119
+#define B01110111 119
+#define B1111000 120
+#define B01111000 120
+#define B1111001 121
+#define B01111001 121
+#define B1111010 122
+#define B01111010 122
+#define B1111011 123
+#define B01111011 123
+#define B1111100 124
+#define B01111100 124
+#define B1111101 125
+#define B01111101 125
+#define B1111110 126
+#define B01111110 126
+#define B1111111 127
+#define B01111111 127
+#define B10000000 128
+#define B10000001 129
+#define B10000010 130
+#define B10000011 131
+#define B10000100 132
+#define B10000101 133
+#define B10000110 134
+#define B10000111 135
+#define B10001000 136
+#define B10001001 137
+#define B10001010 138
+#define B10001011 139
+#define B10001100 140
+#define B10001101 141
+#define B10001110 142
+#define B10001111 143
+#define B10010000 144
+#define B10010001 145
+#define B10010010 146
+#define B10010011 147
+#define B10010100 148
+#define B10010101 149
+#define B10010110 150
+#define B10010111 151
+#define B10011000 152
+#define B10011001 153
+#define B10011010 154
+#define B10011011 155
+#define B10011100 156
+#define B10011101 157
+#define B10011110 158
+#define B10011111 159
+#define B10100000 160
+#define B10100001 161
+#define B10100010 162
+#define B10100011 163
+#define B10100100 164
+#define B10100101 165
+#define B10100110 166
+#define B10100111 167
+#define B10101000 168
+#define B10101001 169
+#define B10101010 170
+#define B10101011 171
+#define B10101100 172
+#define B10101101 173
+#define B10101110 174
+#define B10101111 175
+#define B10110000 176
+#define B10110001 177
+#define B10110010 178
+#define B10110011 179
+#define B10110100 180
+#define B10110101 181
+#define B10110110 182
+#define B10110111 183
+#define B10111000 184
+#define B10111001 185
+#define B10111010 186
+#define B10111011 187
+#define B10111100 188
+#define B10111101 189
+#define B10111110 190
+#define B10111111 191
+#define B11000000 192
+#define B11000001 193
+#define B11000010 194
+#define B11000011 195
+#define B11000100 196
+#define B11000101 197
+#define B11000110 198
+#define B11000111 199
+#define B11001000 200
+#define B11001001 201
+#define B11001010 202
+#define B11001011 203
+#define B11001100 204
+#define B11001101 205
+#define B11001110 206
+#define B11001111 207
+#define B11010000 208
+#define B11010001 209
+#define B11010010 210
+#define B11010011 211
+#define B11010100 212
+#define B11010101 213
+#define B11010110 214
+#define B11010111 215
+#define B11011000 216
+#define B11011001 217
+#define B11011010 218
+#define B11011011 219
+#define B11011100 220
+#define B11011101 221
+#define B11011110 222
+#define B11011111 223
+#define B11100000 224
+#define B11100001 225
+#define B11100010 226
+#define B11100011 227
+#define B11100100 228
+#define B11100101 229
+#define B11100110 230
+#define B11100111 231
+#define B11101000 232
+#define B11101001 233
+#define B11101010 234
+#define B11101011 235
+#define B11101100 236
+#define B11101101 237
+#define B11101110 238
+#define B11101111 239
+#define B11110000 240
+#define B11110001 241
+#define B11110010 242
+#define B11110011 243
+#define B11110100 244
+#define B11110101 245
+#define B11110110 246
+#define B11110111 247
+#define B11111000 248
+#define B11111001 249
+#define B11111010 250
+#define B11111011 251
+#define B11111100 252
+#define B11111101 253
+#define B11111110 254
+#define B11111111 255
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/delay.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/delay.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/delay.c	(revision 136)
@@ -0,0 +1,145 @@
+#include "delay.h"
+#include "Arduino.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Tick Counter united by ms */
+static volatile uint32_t _ulTickCount=0 ;
+
+uint32_t millis( void )
+{
+// todo: ensure no interrupts
+  return _ulTickCount ;
+}
+
+// Interrupt-compatible version of micros
+// Theory: repeatedly take readings of SysTick counter, millis counter and SysTick interrupt pending flag.
+// When it appears that millis counter and pending is stable and SysTick hasn't rolled over, use these
+// values to calculate micros. If there is a pending SysTick, add one to the millis counter in the calculation.
+uint32_t micros( void )
+{
+  uint32_t ticks, ticks2;
+  uint32_t pend, pend2;
+  uint32_t count, count2;
+
+  ticks2  = SysTick->VAL;
+  pend2   = !!(SCB->ICSR & SCB_ICSR_PENDSTSET_Msk)  ;
+  count2  = _ulTickCount ;
+
+  do
+  {
+    ticks=ticks2;
+    pend=pend2;
+    count=count2;
+    ticks2  = SysTick->VAL;
+    pend2   = !!(SCB->ICSR & SCB_ICSR_PENDSTSET_Msk)  ;
+    count2  = _ulTickCount ;
+  } while ((pend != pend2) || (count != count2) || (ticks < ticks2));
+
+  return ((count+pend) * 1000) + (((SysTick->LOAD  - ticks)*(1048576/(VARIANT_MCK/1000000)))>>20) ;
+  // this is an optimization to turn a runtime division into two compile-time divisions and
+  // a runtime multiplication and shift, saving a few cycles
+}
+
+void delay( uint32_t ms )
+{
+  if ( ms == 0 )
+  {
+    return ;
+  }
+
+  uint32_t start = _ulTickCount ;
+
+  do
+  {
+    yield() ;
+  } while ( _ulTickCount - start <= (ms-1) ) ;
+}
+
+void SysTick_Handler( void )
+{
+  // Increment tick count each ms
+  _ulTickCount++ ;
+}
+
+void delayMicroseconds(uint32_t usec)
+{
+	unsigned int presc=0, ref=0, sot=1;
+	double ref_val=0.0, div_val=0.0, usec_val=0.0;
+        unsigned long int i=0,limit=0;
+	
+        if (usec <=0) return;
+	usec_val=usec * 1.0;
+	
+	if(usec <= 20)
+       {
+            
+			  
+			if(usec == 1) limit = usec * 2;
+			else if(usec == 2) limit = usec * 6;
+			else if(usec == 3) limit = usec * 8;
+			else if(usec == 4) limit = usec * 9;
+			else if(usec == 5) limit = usec * 9;
+			else limit = usec * 11;
+           
+			for(i=0; i <= limit; i++);
+                {
+                  asm("NOP");
+                }  
+                return;
+         }  
+    else if(usec <=1363)
+	{
+		presc=TC_CTRLA_PRESCALER_DIV1;
+		div_val=1.0;
+	        ref = (uint16_t)(usec_val * 48.0 / div_val);
+                if((usec > 20) & (usec <=60)) ref= ref - 905;
+			if(usec > 60) ref= ref - 921;
+	}	
+
+        else if((usec > 1363)  & (usec <= 5461))
+	{
+		presc=TC_CTRLA_PRESCALER_DIV4;
+		div_val=4.0;
+		ref = (uint16_t)(usec_val * 48.0 / div_val);
+                
+	}	
+	else if((usec > 5461) & (usec <= 10922))
+	{	
+		presc=TC_CTRLA_PRESCALER_DIV8;
+		div_val=8.0;
+		ref = (uint16_t)(usec_val * 48.0 / div_val);
+	}	
+	else if((usec > 10922) & (usec <= 21845))
+	{
+		presc=TC_CTRLA_PRESCALER_DIV16;
+		div_val=16.0;
+		ref = (uint16_t)(usec_val * 48.0 / div_val);
+	}	
+	else if(usec > 21845)
+	{
+		presc=TC_CTRLA_PRESCALER_DIV64;
+		div_val=64.0;
+		ref = (uint16_t)(usec_val * 48.0 / div_val);
+	}
+    else;
+    
+    
+	GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 ));
+	
+	 TC4->COUNT16.CTRLA.reg &=~(TC_CTRLA_ENABLE);
+      TC4->COUNT16.CTRLA.reg |= TC_CTRLA_MODE_COUNT16 | presc;
+      TC4->COUNT16.READREQ.reg = 0x4002;
+      TC4->COUNT16.CTRLA.reg |= TC_CTRLA_ENABLE;
+      
+	  
+	  while(TC4->COUNT16.COUNT.reg < ref);
+	  	
+return;
+}
+
+#ifdef __cplusplus
+}
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/delay.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/delay.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/delay.h	(revision 136)
@@ -0,0 +1,70 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _DELAY_
+#define _DELAY_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include "variant.h"
+
+/**
+ * \brief Returns the number of milliseconds since the Arduino board began running the current program.
+ *
+ * This number will overflow (go back to zero), after approximately 50 days.
+ *
+ * \return Number of milliseconds since the program started (uint32_t)
+ */
+extern uint32_t millis( void ) ;
+
+/**
+ * \brief Returns the number of microseconds since the Arduino board began running the current program.
+ *
+ * This number will overflow (go back to zero), after approximately 70 minutes. On 16 MHz Arduino boards
+ * (e.g. Duemilanove and Nano), this function has a resolution of four microseconds (i.e. the value returned is
+ * always a multiple of four). On 8 MHz Arduino boards (e.g. the LilyPad), this function has a resolution
+ * of eight microseconds.
+ *
+ * \note There are 1,000 microseconds in a millisecond and 1,000,000 microseconds in a second.
+ */
+extern uint32_t micros( void ) ;
+
+/**
+ * \brief Pauses the program for the amount of time (in miliseconds) specified as parameter.
+ * (There are 1000 milliseconds in a second.)
+ *
+ * \param dwMs the number of milliseconds to pause (uint32_t)
+ */
+extern void delay( uint32_t dwMs ) ;
+
+/**
+ * \brief Pauses the program for the amount of time (in microseconds) specified as parameter.
+ *
+ * \param dwUs the number of microseconds to pause (uint32_t)
+ */
+
+extern void delayMicroseconds(uint32_t usec);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DELAY_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/hooks.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/hooks.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/hooks.c	(revision 136)
@@ -0,0 +1,58 @@
+/*
+  Copyright (c) 2012 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+/**
+ * Empty yield() hook.
+ *
+ * This function is intended to be used by library writers to build
+ * libraries or sketches that supports cooperative threads.
+ *
+ * Its defined as a weak symbol and it can be redefined to implement a
+ * real cooperative scheduler.
+ */
+static void __empty() {
+	// Empty
+}
+void yield(void) __attribute__ ((weak, alias("__empty")));
+
+/**
+ * SysTick hook
+ *
+ * This function is called from SysTick handler, before the default
+ * handler provided by Arduino.
+ */
+static int __false() {
+	// Return false
+	return 0;
+}
+int sysTickHook(void) __attribute__ ((weak, alias("__false")));
+
+/**
+ * SVC hook
+ * PendSV hook
+ *
+ * These functions are called from SVC handler, and PensSV handler.
+ * Default action is halting.
+ */
+static void __halt() {
+	// Halts
+	while (1)
+		;
+}
+void svcHook(void)    __attribute__ ((weak, alias("__halt")));
+void pendSVHook(void) __attribute__ ((weak, alias("__halt")));
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/itoa.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/itoa.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/itoa.c	(revision 136)
@@ -0,0 +1,170 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "itoa.h"
+#include <string.h>
+
+#ifdef __cplusplus
+extern "C"{
+#endif // __cplusplus
+
+#if 0
+/* reverse:  reverse string s in place */
+static void reverse( char s[] )
+{
+  int i, j ;
+  char c ;
+
+  for ( i = 0, j = strlen(s)-1 ; i < j ; i++, j-- )
+  {
+    c = s[i] ;
+    s[i] = s[j] ;
+    s[j] = c ;
+  }
+}
+
+/* itoa:  convert n to characters in s */
+extern void itoa( int n, char s[] )
+{
+  int i, sign ;
+
+  if ( (sign = n) < 0 )  /* record sign */
+  {
+    n = -n;          /* make n positive */
+  }
+
+  i = 0;
+  do
+  {       /* generate digits in reverse order */
+    s[i++] = n % 10 + '0';   /* get next digit */
+  } while ((n /= 10) > 0) ;     /* delete it */
+
+  if (sign < 0 )
+  {
+    s[i++] = '-';
+  }
+
+  s[i] = '\0';
+
+  reverse( s ) ;
+}
+
+#else
+
+extern char* itoa( int value, char *string, int radix )
+{
+  return ltoa( value, string, radix ) ;
+}
+
+extern char* ltoa( long value, char *string, int radix )
+{
+  char tmp[33];
+  char *tp = tmp;
+  long i;
+  unsigned long v;
+  int sign;
+  char *sp;
+
+  if ( string == NULL )
+  {
+    return 0 ;
+  }
+
+  if (radix > 36 || radix <= 1)
+  {
+    return 0 ;
+  }
+
+  sign = (radix == 10 && value < 0);
+  if (sign)
+  {
+    v = -value;
+  }
+  else
+  {
+    v = (unsigned long)value;
+  }
+
+  while (v || tp == tmp)
+  {
+    i = v % radix;
+    v = v / radix;
+    if (i < 10)
+      *tp++ = i+'0';
+    else
+      *tp++ = i + 'a' - 10;
+  }
+
+  sp = string;
+
+  if (sign)
+    *sp++ = '-';
+  while (tp > tmp)
+    *sp++ = *--tp;
+  *sp = 0;
+
+  return string;
+}
+
+extern char* utoa( unsigned long value, char *string, int radix )
+{
+  return ultoa( value, string, radix ) ;
+}
+
+extern char* ultoa( unsigned long value, char *string, int radix )
+{
+  char tmp[33];
+  char *tp = tmp;
+  long i;
+  unsigned long v = value;
+  char *sp;
+
+  if ( string == NULL )
+  {
+    return 0;
+  }
+
+  if (radix > 36 || radix <= 1)
+  {
+    return 0;
+  }
+ 
+  while (v || tp == tmp)
+  {
+    i = v % radix;
+    v = v / radix;
+    if (i < 10)
+      *tp++ = i+'0';
+    else
+      *tp++ = i + 'a' - 10;
+  }
+
+  sp = string;
+
+ 
+  while (tp > tmp)
+    *sp++ = *--tp;
+  *sp = 0;
+
+  return string;
+}
+#endif /* 0 */
+
+#ifdef __cplusplus
+} // extern "C"
+#endif // __cplusplus
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/itoa.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/itoa.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/itoa.h	(revision 136)
@@ -0,0 +1,42 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _ITOA_
+#define _ITOA_
+
+#ifdef __cplusplus
+extern "C"{
+#endif // __cplusplus
+
+#if 0
+
+extern void itoa( int n, char s[] ) ;
+
+#else
+
+extern char* itoa( int value, char *string, int radix ) ;
+extern char* ltoa( long value, char *string, int radix ) ;
+extern char* utoa( unsigned long value, char *string, int radix ) ;
+extern char* ultoa( unsigned long value, char *string, int radix ) ;
+#endif /* 0 */
+
+#ifdef __cplusplus
+} // extern "C"
+#endif // __cplusplus
+
+#endif // _ITOA_
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/main.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/main.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/main.cpp	(revision 136)
@@ -0,0 +1,45 @@
+/*
+  main.cpp - Main loop for Arduino sketches
+  Copyright (c) 2005-2013 Arduino Team.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#define ARDUINO_MAIN
+#include "Arduino.h"
+
+/*
+ * \brief Main entry point of Arduino application
+ */
+int main( void )
+{
+  init();
+
+  delay(1);
+#if defined(USBCON)
+	USBDevice.init();
+	USBDevice.attach();
+#endif
+
+  setup();
+
+  for (;;)
+  {
+    loop();
+    if (serialEventRun) serialEventRun();
+  }
+
+  return 0;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/startup.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/startup.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/startup.c	(revision 136)
@@ -0,0 +1,409 @@
+/*
+  Arduino.h - Main include file for the Arduino SDK
+  Copyright (c) 2014 Arduino Team.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "sam.h"
+#include "variant.h"
+
+/* Initialize segments */
+extern uint32_t __etext ;
+extern uint32_t __data_start__ ;
+extern uint32_t __data_end__ ;
+extern uint32_t __bss_start__ ;
+extern uint32_t __bss_end__ ;
+extern uint32_t __StackTop;
+
+extern int main( void ) ;
+extern void __libc_init_array(void);
+
+/* Default empty handler */
+void Dummy_Handler(void);
+
+/* Cortex-M0+ core handlers */
+#if defined DEBUG
+void NMI_Handler( void )
+{
+  while ( 1 )
+  {
+  }
+}
+
+void HardFault_Handler( void )
+{
+  while ( 1 )
+  {
+  }
+}
+
+void SVC_Handler( void )
+{
+  while ( 1 )
+  {
+  }
+}
+
+void PendSV_Handler( void )
+{
+  while ( 1 )
+  {
+  }
+}
+
+void SysTick_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+#else
+void NMI_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void HardFault_Handler       ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SVC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void PendSV_Handler          ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SysTick_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+#endif //DEBUG
+
+/* Peripherals handlers */
+void PM_Handler              ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SYSCTRL_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void WDT_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void RTC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void EIC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void NVMCTRL_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void DMAC_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void USB_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void EVSYS_Handler           ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM0_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM1_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM2_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM3_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM4_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM5_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC0_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC1_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC2_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC3_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC4_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC5_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC6_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC7_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void ADC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void AC_Handler              ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void DAC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void PTC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void I2S_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+
+/* Exception Table */
+__attribute__ ((section(".isr_vector")))
+const DeviceVectors exception_table=
+{
+  /* Configure Initial Stack Pointer, using linker-generated symbols */
+  (void*) (&__StackTop),
+
+  (void*) Reset_Handler,
+  (void*) NMI_Handler,
+  (void*) HardFault_Handler,
+  (void*) (0UL), /* Reserved */
+  (void*) (0UL), /* Reserved */
+  (void*) (0UL), /* Reserved */
+  (void*) (0UL), /* Reserved */
+  (void*) (0UL), /* Reserved */
+  (void*) (0UL), /* Reserved */
+  (void*) (0UL), /* Reserved */
+  (void*) SVC_Handler,
+  (void*) (0UL), /* Reserved */
+  (void*) (0UL), /* Reserved */
+  (void*) PendSV_Handler,
+  (void*) SysTick_Handler,
+
+  /* Configurable interrupts */
+  (void*) PM_Handler,             /*  0 Power Manager */
+  (void*) SYSCTRL_Handler,        /*  1 System Control */
+  (void*) WDT_Handler,            /*  2 Watchdog Timer */
+  (void*) RTC_Handler,            /*  3 Real-Time Counter */
+  (void*) EIC_Handler,            /*  4 External Interrupt Controller */
+  (void*) NVMCTRL_Handler,        /*  5 Non-Volatile Memory Controller */
+  (void*) DMAC_Handler,           /*  6 Direct Memory Access Controller */
+  (void*) USB_Handler,            /*  7 Universal Serial Bus */
+  (void*) EVSYS_Handler,          /*  8 Event System Interface */
+  (void*) SERCOM0_Handler,        /*  9 Serial Communication Interface 0 */
+  (void*) SERCOM1_Handler,        /* 10 Serial Communication Interface 1 */
+  (void*) SERCOM2_Handler,        /* 11 Serial Communication Interface 2 */
+  (void*) SERCOM3_Handler,        /* 12 Serial Communication Interface 3 */
+  (void*) SERCOM4_Handler,        /* 13 Serial Communication Interface 4 */
+  (void*) SERCOM5_Handler,        /* 14 Serial Communication Interface 5 */
+  (void*) TCC0_Handler,           /* 15 Timer Counter Control 0 */
+  (void*) TCC1_Handler,           /* 16 Timer Counter Control 1 */
+  (void*) TCC2_Handler,           /* 17 Timer Counter Control 2 */
+  (void*) TC3_Handler,            /* 18 Basic Timer Counter 0 */
+  (void*) TC4_Handler,            /* 19 Basic Timer Counter 1 */
+  (void*) TC5_Handler,            /* 20 Basic Timer Counter 2 */
+  (void*) TC6_Handler,            /* 21 Basic Timer Counter 3 */
+  (void*) TC7_Handler,            /* 22 Basic Timer Counter 4 */
+  (void*) ADC_Handler,            /* 23 Analog Digital Converter */
+  (void*) AC_Handler,             /* 24 Analog Comparators */
+  (void*) DAC_Handler,            /* 25 Digital Analog Converter */
+  (void*) PTC_Handler,            /* 26 Peripheral Touch Controller */
+  (void*) I2S_Handler             /* 27 Inter-IC Sound Interface */
+} ;
+
+/**
+ * \brief This is the code that gets called on processor reset.
+ * It configures the needed clocks and according Flash Read Wait States.
+ * At reset:
+ * - OSC8M clock source is enabled with a divider by 8 (1MHz).
+ * - Generic Clock Generator 0 (GCLKMAIN) is using OSC8M as source.
+ * We need to:
+ * 1) Enable XOSC32K clock (External on-board 32.768Hz oscillator), will be used as DFLL48M reference.
+ * 2) Put XOSC32K as source of Generic Clock Generator 1
+ * 3) Put Generic Clock Generator 1 as source for Generic Clock Multiplexer 0 (DFLL48M reference)
+ * 4) Enable DFLL48M clock
+ * 5) Switch Generic Clock Generator 0 to DFLL48M. CPU will run at 48MHz.
+ * 6) Modify PRESCaler value of OSCM to have 8MHz
+ * 7) Put OSC8M as source for Generic Clock Generator 3
+ */
+// Constants for Clock generators
+#define GENERIC_CLOCK_GENERATOR_MAIN      (0u)
+#define GENERIC_CLOCK_GENERATOR_XOSC32K   (1u)
+#define GENERIC_CLOCK_GENERATOR_OSCULP32K (2u) /* Initialized at reset for WDT */
+#define GENERIC_CLOCK_GENERATOR_OSC8M     (3u)
+// Constants for Clock multiplexers
+#define GENERIC_CLOCK_MULTIPLEXER_DFLL48M (0u)
+
+void SystemInit( void )
+{
+  //----- Tx & Rx led blinking during transmission (pin declaration) ----- begin ----
+  PORT->Group[1].DIRSET.reg=0x00000008;  //PB03 as output (RX_LED)
+  PORT->Group[1].OUTSET.reg=0x00000008;  //PB03 as output (RX_LED)
+  
+  PORT->Group[0].DIRSET.reg=0x08000000;  //PB03 as output (TX_LED)
+  PORT->Group[0].OUTSET.reg=0x08000000;  //PB03 as output (TX_LED)
+  //----- Tx & Rx led blinking during transmission (pin declaration) ----- end ----
+  
+  /* Set 1 Flash Wait State for 48MHz, cf tables 20.9 and 35.27 in SAMD21 Datasheet */
+  NVMCTRL->CTRLB.bit.RWS = NVMCTRL_CTRLB_RWS_HALF_Val ;
+
+  /* Turn on the digital interface clock */
+  PM->APBAMASK.reg |= PM_APBAMASK_GCLK ;
+
+  /* ----------------------------------------------------------------------------------------------
+   * 1) Enable XOSC32K clock (External on-board 32.768Hz oscillator)
+   */
+  SYSCTRL->XOSC32K.reg = SYSCTRL_XOSC32K_STARTUP( 0x6u ) | /* cf table 15.10 of product datasheet in chapter 15.8.6 */
+                         SYSCTRL_XOSC32K_XTALEN | SYSCTRL_XOSC32K_EN32K ;
+  SYSCTRL->XOSC32K.bit.ENABLE = 1 ; /* separate call, as described in chapter 15.6.3 */
+
+  while ( (SYSCTRL->PCLKSR.reg & SYSCTRL_PCLKSR_XOSC32KRDY) == 0 )
+  {
+    /* Wait for oscillator stabilization */
+  }
+
+  /* Software reset the module to ensure it is re-initialized correctly */
+  /* Note: Due to synchronization, there is a delay from writing CTRL.SWRST until the reset is complete.
+   * CTRL.SWRST and STATUS.SYNCBUSY will both be cleared when the reset is complete, as described in chapter 13.8.1
+   */
+  GCLK->CTRL.reg = GCLK_CTRL_SWRST ;
+
+  while ( (GCLK->CTRL.reg & GCLK_CTRL_SWRST) && (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) )
+  {
+    /* Wait for reset to complete */
+  }
+
+  /* ----------------------------------------------------------------------------------------------
+   * 2) Put XOSC32K as source of Generic Clock Generator 1
+   */
+  GCLK->GENDIV.reg = GCLK_GENDIV_ID( GENERIC_CLOCK_GENERATOR_XOSC32K ) ; // Generic Clock Generator 1
+
+  while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
+  {
+    /* Wait for synchronization */
+  }
+
+  /* Write Generic Clock Generator 1 configuration */
+  GCLK->GENCTRL.reg = GCLK_GENCTRL_ID( GENERIC_CLOCK_GENERATOR_XOSC32K ) | // Generic Clock Generator 1
+                      GCLK_GENCTRL_SRC_XOSC32K | // Selected source is External 32KHz Oscillator
+//                      GCLK_GENCTRL_OE | // Output clock to a pin for tests
+                      GCLK_GENCTRL_GENEN ;
+
+  while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
+  {
+    /* Wait for synchronization */
+  }
+
+  /* ----------------------------------------------------------------------------------------------
+   * 3) Put Generic Clock Generator 1 as source for Generic Clock Multiplexer 0 (DFLL48M reference)
+   */
+  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( GENERIC_CLOCK_MULTIPLEXER_DFLL48M ) | // Generic Clock Multiplexer 0
+                      GCLK_CLKCTRL_GEN_GCLK1 | // Generic Clock Generator 1 is source
+                      GCLK_CLKCTRL_CLKEN ;
+
+  while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
+  {
+    /* Wait for synchronization */
+  }
+
+  /* ----------------------------------------------------------------------------------------------
+   * 4) Enable DFLL48M clock
+   */
+
+  /* DFLL Configuration in Closed Loop mode, cf product datasheet chapter 15.6.7.1 - Closed-Loop Operation */
+
+  /* Remove the OnDemand mode, Bug http://avr32.icgroup.norway.atmel.com/bugzilla/show_bug.cgi?id=9905 */
+  SYSCTRL->DFLLCTRL.bit.ONDEMAND = 0 ;
+
+  while ( (SYSCTRL->PCLKSR.reg & SYSCTRL_PCLKSR_DFLLRDY) == 0 )
+  {
+    /* Wait for synchronization */
+  }
+
+  SYSCTRL->DFLLMUL.reg = SYSCTRL_DFLLMUL_CSTEP( 31 ) | // Coarse step is 31, half of the max value
+                         SYSCTRL_DFLLMUL_FSTEP( 511 ) | // Fine step is 511, half of the max value
+                         SYSCTRL_DFLLMUL_MUL( (VARIANT_MCK/VARIANT_MAINOSC) ) ; // External 32KHz is the reference
+
+  while ( (SYSCTRL->PCLKSR.reg & SYSCTRL_PCLKSR_DFLLRDY) == 0 )
+  {
+    /* Wait for synchronization */
+  }
+
+  /* Write full configuration to DFLL control register */
+  SYSCTRL->DFLLCTRL.reg |= SYSCTRL_DFLLCTRL_MODE | /* Enable the closed loop mode */
+                           SYSCTRL_DFLLCTRL_WAITLOCK |
+                           SYSCTRL_DFLLCTRL_QLDIS ; /* Disable Quick lock */
+
+  while ( (SYSCTRL->PCLKSR.reg & SYSCTRL_PCLKSR_DFLLRDY) == 0 )
+  {
+    /* Wait for synchronization */
+  }
+
+  /* Enable the DFLL */
+  SYSCTRL->DFLLCTRL.reg |= SYSCTRL_DFLLCTRL_ENABLE ;
+
+  while ( (SYSCTRL->PCLKSR.reg & SYSCTRL_PCLKSR_DFLLLCKC) == 0 ||
+          (SYSCTRL->PCLKSR.reg & SYSCTRL_PCLKSR_DFLLLCKF) == 0 )
+  {
+    /* Wait for locks flags */
+  }
+
+  while ( (SYSCTRL->PCLKSR.reg & SYSCTRL_PCLKSR_DFLLRDY) == 0 )
+  {
+    /* Wait for synchronization */
+  }
+
+  /* ----------------------------------------------------------------------------------------------
+   * 5) Switch Generic Clock Generator 0 to DFLL48M. CPU will run at 48MHz.
+   */
+  GCLK->GENDIV.reg = GCLK_GENDIV_ID( GENERIC_CLOCK_GENERATOR_MAIN ) ; // Generic Clock Generator 0
+
+  while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
+  {
+    /* Wait for synchronization */
+  }
+
+  /* Write Generic Clock Generator 0 configuration */
+  GCLK->GENCTRL.reg = GCLK_GENCTRL_ID( GENERIC_CLOCK_GENERATOR_MAIN ) | // Generic Clock Generator 0
+                      GCLK_GENCTRL_SRC_DFLL48M | // Selected source is DFLL 48MHz
+//                      GCLK_GENCTRL_OE | // Output clock to a pin for tests
+                      GCLK_GENCTRL_IDC | // Set 50/50 duty cycle
+                      GCLK_GENCTRL_GENEN ;
+
+  while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
+  {
+    /* Wait for synchronization */
+  }
+
+  /* ----------------------------------------------------------------------------------------------
+   * 6) Modify PRESCaler value of OSC8M to have 8MHz
+   */
+  SYSCTRL->OSC8M.bit.PRESC = SYSCTRL_OSC8M_PRESC_0_Val ;
+  SYSCTRL->OSC8M.bit.ONDEMAND = 0 ;
+
+  /* ----------------------------------------------------------------------------------------------
+   * 7) Put OSC8M as source for Generic Clock Generator 3
+   */
+  GCLK->GENDIV.reg = GCLK_GENDIV_ID( GENERIC_CLOCK_GENERATOR_OSC8M ) ; // Generic Clock Generator 3
+
+  /* Write Generic Clock Generator 3 configuration */
+  GCLK->GENCTRL.reg = GCLK_GENCTRL_ID( GENERIC_CLOCK_GENERATOR_OSC8M ) | // Generic Clock Generator 3
+                      GCLK_GENCTRL_SRC_OSC8M | // Selected source is RC OSC 8MHz (already enabled at reset)
+//                      GCLK_GENCTRL_OE | // Output clock to a pin for tests
+                      GCLK_GENCTRL_GENEN ;
+
+  while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
+  {
+    /* Wait for synchronization */
+  }
+
+  /*
+   * Now that all system clocks are configured, we can set CPU and APBx BUS clocks.
+   * There values are normally the one present after Reset.
+   */
+  PM->CPUSEL.reg  = PM_CPUSEL_CPUDIV_DIV1 ;
+  PM->APBASEL.reg = PM_APBASEL_APBADIV_DIV1_Val ;
+  PM->APBBSEL.reg = PM_APBBSEL_APBBDIV_DIV1_Val ;
+  PM->APBCSEL.reg = PM_APBCSEL_APBCDIV_DIV1_Val ;
+
+  SystemCoreClock=VARIANT_MCK ;
+}
+
+/**
+ * \brief This is the code that gets called on processor reset.
+ * To initialize the device, and call the main() routine.
+ */
+void Reset_Handler( void )
+{
+  uint32_t *pSrc, *pDest;
+
+  /* Initialize the initialized data section */
+  pSrc = &__etext;
+  pDest = &__data_start__;
+
+  if ( (&__data_start__ != &__data_end__) && (pSrc != pDest) )
+  {
+    for (; pDest < &__data_end__ ; pDest++, pSrc++ )
+    {
+      *pDest = *pSrc ;
+    }
+  }
+
+  /* Clear the zero section */
+  if ( (&__data_start__ != &__data_end__) && (pSrc != pDest) )
+  {
+    for ( pDest = &__bss_start__ ; pDest < &__bss_end__ ; pDest++ )
+    {
+      *pDest = 0 ;
+    }
+  }
+
+  /* Initialize the C library */
+  __libc_init_array();
+
+  SystemInit() ;
+
+  /* Branch to main function */
+  main() ;
+
+  /* Infinite loop */
+  while ( 1 )
+  {
+  }
+}
+
+/**
+ * \brief Default interrupt handler for unused IRQs.
+ */
+void Dummy_Handler( void )
+{
+  while ( 1 )
+  {
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/syscalls.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/syscalls.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/syscalls.c	(revision 136)
@@ -0,0 +1,139 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+/**
+  * Implementation of newlib syscall.
+  *
+  */
+
+#include <errno.h>
+
+#include "syscalls.h"
+#include "sam.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#undef errno
+extern int errno ;
+extern int __end__ ;
+extern int __ram_end__ ;
+
+extern caddr_t _sbrk( int incr )
+{
+  static unsigned char *heap = NULL ;
+  unsigned char *prev_heap ;
+  int ramend = (int)&__ram_end__ ;
+
+  if ( heap == NULL )
+  {
+    heap = (unsigned char *)&__end__ ;
+  }
+  prev_heap = heap ;
+
+  if ( ((int)prev_heap + incr) > ramend )
+  {
+    return (caddr_t) -1 ;
+  }
+
+  heap += incr ;
+
+  return (caddr_t) prev_heap ;
+}
+
+extern int link( char *cOld, char *cNew )
+{
+    return -1 ;
+}
+
+extern int _close( int file )
+{
+    return -1 ;
+}
+
+extern int _fstat( int file, struct stat *st )
+{
+    st->st_mode = S_IFCHR ;
+
+    return 0 ;
+}
+
+extern int _isatty( int file )
+{
+    return 1 ;
+}
+
+extern int _lseek( int file, int ptr, int dir )
+{
+    return 0 ;
+}
+
+extern int _read(int file, char *ptr, int len)
+{
+    return 0 ;
+}
+
+extern int _write( int file, char *ptr, int len )
+{
+  int iIndex=0 ;
+
+  switch ( file )
+  {
+    case 1 /*STDOUT_FILENO*/:
+      for ( ; len >= 0 ; len--, ptr++, iIndex++ )
+      {
+        // Check if the transmitter is ready
+        // while ((UART->UART_SR & UART_SR_TXRDY) != UART_SR_TXRDY)
+        {
+        }
+
+        // Send character
+        // UART->UART_THR = *ptr;
+      }
+    break;
+
+    default:
+      errno = EBADF ;
+      iIndex = -1 ;
+    break;
+  }
+
+  return iIndex ;
+}
+
+extern void _exit( int status )
+{
+    printf( "Exiting with status %d.\n", status ) ;
+
+    for ( ; ; ) ;
+}
+
+extern void _kill( int pid, int sig )
+{
+    return ;
+}
+
+extern int _getpid ( void )
+{
+    return -1 ;
+}
+
+#ifdef __cplusplus
+}
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/syscalls.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/syscalls.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/syscalls.h	(revision 136)
@@ -0,0 +1,66 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+/**
+  * \file syscalls.h
+  *
+  * Implementation of newlib syscall.
+  *
+  */
+
+/*----------------------------------------------------------------------------
+ *        Headers
+ *----------------------------------------------------------------------------*/
+#include <stdio.h>
+#include <stdarg.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+
+/*----------------------------------------------------------------------------
+ *        Exported functions
+ *----------------------------------------------------------------------------*/
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void _exit( int status ) ;
+
+extern int link( char *cOld, char *cNew ) ;
+
+extern caddr_t _sbrk( int incr ) ;
+
+extern int _close( int file ) ;
+
+extern int _fstat( int file, struct stat *st ) ;
+
+extern int _isatty( int file ) ;
+
+extern int _lseek( int file, int ptr, int dir ) ;
+
+extern int _read(int file, char *ptr, int len) ;
+
+extern int _write( int file, char *ptr, int len ) ;
+
+extern void _kill( int pid, int sig ) ;
+
+extern int _getpid ( void ) ;
+
+#ifdef __cplusplus
+}
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring.c	(revision 136)
@@ -0,0 +1,110 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "variant.h"
+#include "wiring_digital.h"
+#include "wiring.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * System Core Clock is at 1MHz at Reset.
+ * It is switched to 48MHz in the Reset Handler (startup.c)
+ */
+uint32_t SystemCoreClock=1000000ul ;
+
+/*
+ * Arduino Zero board initialization
+ *
+ * Good to know:
+ *   - At reset, ResetHandler did the system clock configuration. Core is running at 48MHz.
+ *   - Watchdog is disabled by default, unless someone plays with NVM User page
+ *   - During reset, all PORT lines are configured as inputs with input buffers, output buffers and pull disabled.
+ */
+void init( void )
+{
+  uint32_t ul ;
+
+  // Set Systick to 1ms interval, common to all Cortex-M variants
+  if ( SysTick_Config( SystemCoreClock / 1000 ) )
+  {
+    // Capture error
+    while ( 1 ) ;
+  }
+
+//  Clock PORT for Digital I/O
+//	PM->APBBMASK.reg |= PM_APBBMASK_PORT ;
+//
+//  Clock EIC for I/O interrupts
+//	PM->APBAMASK.reg |= PM_APBAMASK_EIC ;
+
+  // Clock SERCOM for Serial
+  PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0 | PM_APBCMASK_SERCOM1 | PM_APBCMASK_SERCOM2 | PM_APBCMASK_SERCOM3 | PM_APBCMASK_SERCOM4 | PM_APBCMASK_SERCOM5 ;
+
+  // Clock TC/TCC for Pulse and Analog
+  PM->APBCMASK.reg |= PM_APBCMASK_TCC0 | PM_APBCMASK_TCC1 | PM_APBCMASK_TCC2 | PM_APBCMASK_TC3 | PM_APBCMASK_TC4 | PM_APBCMASK_TC5 | PM_APBCMASK_TC6 | PM_APBCMASK_TC7 ;
+
+  // Clock ADC/DAC for Analog
+  PM->APBCMASK.reg |= PM_APBCMASK_ADC | PM_APBCMASK_DAC ;
+
+  // Setup all pins (digital and analog) in INPUT mode (default is nothing)
+	for ( ul = 0 ; ul < NUM_DIGITAL_PINS ; ul++ )
+  {
+	  pinMode( ul, INPUT ) ;
+  }
+
+  // Initialize Analog Controller
+  // Setting clock
+  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( GCM_ADC ) |  // Generic Clock ADC
+                      GCLK_CLKCTRL_GEN_GCLK0 |      // Generic Clock Generator 0 is source
+                      GCLK_CLKCTRL_CLKEN ;
+  // Setting CTRLB
+  ADC->CTRLB.reg = ADC_CTRLB_PRESCALER_DIV128 |     // Divide Clock by 128.
+                   ADC_CTRLB_RESSEL_10BIT;          // Result on 10 bits
+    ADC->INPUTCTRL.reg = ADC_INPUTCTRL_MUXNEG_GND | // No Negative input (Internal Ground)
+                         ADC_INPUTCTRL_GAIN_1X;     // Gain setted to 1
+  // Averaging (see table 31-2 p.816 datasheet)
+  ADC->AVGCTRL.reg = ADC_AVGCTRL_SAMPLENUM_2 |      // 2 samples
+                     ADC_AVGCTRL_ADJRES(0x01ul);    // Adjusting result by 1
+  
+  ADC->SAMPCTRL.reg = 0x3f;	
+  ADC->REFCTRL.reg = ADC_REFCTRL_REFSEL_INTVCC1;    // Reference intvcc1 [default]
+ 
+  ADC->CTRLA.bit.ENABLE = 1; // Enable ADC
+  while( ADC->STATUS.bit.SYNCBUSY == 1 )
+  {
+    // Waiting for synchroinization
+  }
+
+  // Initialize DAC
+  // Setting clock
+  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( GCM_DAC ) |  // Generic Clock ADC
+                      GCLK_CLKCTRL_GEN_GCLK0 |      // Generic Clock Generator 0 is source
+                      GCLK_CLKCTRL_CLKEN ;
+
+
+  DAC->CTRLB.reg = DAC_CTRLB_REFSEL_AVCC |          // Using the 3.3V reference
+                   DAC_CTRLB_EOEN;                  // External Output Enable (Vout)
+  DAC->DATA.reg = 0x3FFul;
+}
+
+#ifdef __cplusplus
+}
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring.h	(revision 136)
@@ -0,0 +1,38 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _WIRING_
+#define _WIRING_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Exported in CMSIS header file in hardware/tools/CMSIS/Device/ATMEL/samd21/include/system_samd21.h
+//extern uint32_t SystemCoreClock ;
+
+/**
+ *
+ */
+extern void init( void ) ;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _WIRING_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_analog.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_analog.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_analog.c	(revision 136)
@@ -0,0 +1,317 @@
+/*
+ Copyright (c) 2014 Arduino.  All right reserved.
+
+ This library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ This library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ See the GNU Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with this library; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+ //
+
+#include "wiring_analog.h"
+#include "wiring_digital.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static int _readResolution = 10;
+static int _writeResolution = 10;
+static int ADC_RESOLUTION = 12;
+static int DAC_RESOLUTION = 10;
+
+void analogReadResolution(int res) {
+	_readResolution = res;
+	while( ADC->STATUS.bit.SYNCBUSY == 1 )
+  {
+    // Waiting for synchroinization
+  }
+	if(res == 8) ADC->CTRLB.bit.RESSEL= ADC_CTRLB_RESSEL_8BIT_Val; 
+	else if(res == 10) ADC->CTRLB.bit.RESSEL= ADC_CTRLB_RESSEL_10BIT_Val;   
+	else ADC->CTRLB.bit.RESSEL= ADC_CTRLB_RESSEL_12BIT_Val; 
+}
+
+void analogWriteResolution(int res) {
+	_writeResolution = res;
+}
+
+static inline uint32_t mapResolution(uint32_t value, uint32_t from, uint32_t to) {
+	if (from == to)
+		return value;
+	if (from > to)
+		return value >> (from-to);
+	else
+		return value << (to-from);
+}
+
+void analogReference( eAnalogReference ulMode )
+{
+
+  // ATTENTION : On this board the default is not 5volts or 3.3volts BUT 1.65 volt
+
+   
+   
+   ADC->CTRLA.bit.ENABLE = 0; // Enable ADC
+  while( ADC->STATUS.bit.SYNCBUSY == 1 )
+  {
+    // Waiting for synchroinization
+  }
+  switch(ulMode)
+  {
+    case AR_DEFAULT:
+      //default:
+      
+	  ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_DIV2_Val;
+	  ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val;
+	  break;
+    case AR_INTERNAL:
+	  ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val; 
+      ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INT1V_Val;
+      break;
+
+    case AR_EXTERNAL:
+	  ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val; 
+      ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_AREFA_Val;
+      break;
+  }ADC->CTRLA.bit.ENABLE = 1; // Enable ADC
+  while( ADC->STATUS.bit.SYNCBUSY == 1 )
+  {
+    // Waiting for synchroinization
+  }
+}
+
+uint32_t analogRead( uint32_t ulPin )
+{
+  uint32_t valueRead = 0;
+  pinPeripheral(ulPin, g_APinDescription[ulPin].ulPinType);
+  if ( ulPin == 24 )  // Only 1 DAC on A0 (PA02)
+  {
+    DAC->CTRLA.bit.ENABLE = 0; //disable DAC on A0
+  }
+  
+  ADC->INPUTCTRL.bit.MUXPOS = g_APinDescription[ulPin].ulADCChannelNumber;
+
+  // Start conversion
+  ADC->SWTRIG.bit.START = 1;
+
+  while( ADC->INTFLAG.bit.RESRDY == 0 || ADC->STATUS.bit.SYNCBUSY == 1 )
+  {
+    // Waiting for a complete conversion and complete synchronization
+  }
+
+  // Store the value
+  valueRead = ADC->RESULT.reg;
+
+  // Clear the Data Ready flag
+  ADC->INTFLAG.bit.RESRDY = 1;
+
+  // Flush the ADC for further conversions
+  // ADC->SWTRIG.bit.FLUSH = 1;
+
+  while( ADC->STATUS.bit.SYNCBUSY == 1 || ADC->SWTRIG.bit.FLUSH == 1 )
+  {
+    // Waiting for synchronization
+  }
+  
+  //valueRead = mapResolution(valueRead, ADC_RESOLUTION, _readResolution);
+  return valueRead;
+  
+}
+
+
+// Right now, PWM output only works on the pins with
+// hardware support.  These are defined in the appropriate
+// pins_*.c file.  For the rest of the pins, we default
+// to digital output.
+void analogWrite( uint32_t ulPin, uint32_t ulValue )
+{
+  uint32_t attr = g_APinDescription[ulPin].ulPinAttribute ;
+//   uint32_t pwm_name = g_APinDescription[ulPin].ulTCChannel ;
+  uint8_t isTC = 0 ;
+  uint8_t Channelx ;
+  Tc* TCx ;
+  Tcc* TCCx ;
+
+  if ( (attr & PIN_ATTR_ANALOG) == PIN_ATTR_ANALOG )
+  {
+    if ( ulPin == 24 )  // Only 1 DAC on A0 (PA02)
+    {
+      	ulValue = mapResolution(ulValue, _writeResolution, DAC_RESOLUTION);
+    	DAC->DATA.reg = ulValue & 0x3FF;  // Dac on 10 bits.
+		DAC->CTRLA.bit.ENABLE = 1; // DAC Enabled
+		syncDAC();
+      	return;
+    }
+	
+
+  }
+
+  if ( (attr & PIN_ATTR_PWM) == PIN_ATTR_PWM )
+  {
+    if ( (g_APinDescription[ulPin].ulPinType == PIO_TIMER) || g_APinDescription[ulPin].ulPinType == PIO_TIMER_ALT )
+    {
+      pinPeripheral( ulPin, g_APinDescription[ulPin].ulPinType ) ;
+    }
+
+    switch ( g_APinDescription[ulPin].ulPWMChannel )
+    {
+      case PWM3_CH0 :
+                TCx = TC3 ;
+                Channelx = 0 ;
+                isTC = 1 ;
+            break;
+
+      case  PWM3_CH1:
+                TCx = TC3 ;
+                Channelx = 1;
+                isTC = 1;
+            break;
+
+      case  PWM0_CH0 :
+                TCCx = TCC0;
+                Channelx = 0;
+            break;
+
+      case  PWM0_CH1 :
+                TCCx = TCC0;
+                Channelx = 1;
+            break;
+
+      case  PWM0_CH4 :
+                TCCx = TCC0;
+                Channelx = 0;
+            break;
+
+      case  PWM0_CH5 :
+                TCCx = TCC0;
+                Channelx = 1;
+            break;
+
+      case  PWM0_CH6 :
+                TCCx = TCC0;
+                Channelx = 2;
+            break;
+
+      case  PWM0_CH7 :
+                TCCx = TCC0;
+                Channelx = 3;
+            break;
+
+      case  PWM1_CH0 :
+                TCCx = TCC1;
+                Channelx = 0;
+            break;
+
+      case  PWM1_CH1 :
+                TCCx = TCC1;
+                Channelx = 1;
+            break;
+
+      case  PWM2_CH0 :
+                TCCx = TCC2;
+                Channelx = 0;
+            break;
+
+      case  PWM2_CH1 :
+                TCCx = TCC2;
+                Channelx = 1;
+            break;
+    }
+
+
+    // Enable clocks according to TCCx instance to use
+    switch ( GetTCNumber( g_APinDescription[ulPin].ulPWMChannel ) )
+    {
+      case 0: // TCC0
+                //Enable GCLK for TCC0 (timer counter input clock)
+                GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC0_TCC1 )) ;
+            break;
+
+      case 1: // TCC1
+                //Enable GCLK for TCC1 (timer counter input clock)
+                GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC0_TCC1 )) ;
+            break;
+
+      case 2: // TCC2
+                //Enable GCLK for TCC2 (timer counter input clock)
+                GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC2_TC3 )) ;
+            break;
+
+      case 3: // TC3
+                //Enable GCLK for TC3 (timer counter input clock)
+                GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC2_TC3 ));
+            break;
+
+      case 4: // TC4
+                //Enable GCLK for TC4 (timer counter input clock)
+                GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 ));
+            break;
+
+      case 5: // TC5
+                //Enable GCLK for TC5 (timer counter input clock)
+                GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 )) ;
+            break;
+    }
+
+    // Set PORT
+    if ( isTC )
+    {
+      // -- Configure TC
+      //DISABLE TCx
+      TCx->COUNT8.CTRLA.reg &=~(TC_CTRLA_ENABLE);
+      //Set Timer counter Mode to 8 bits
+      TCx->COUNT8.CTRLA.reg |= TC_CTRLA_MODE_COUNT8;
+      //Set TCx as normal PWM
+      TCx->COUNT8.CTRLA.reg |= TC_CTRLA_WAVEGEN_NPWM;
+      //Set TCx in waveform mode Normal PWM
+      TCx->COUNT8.CC[Channelx].reg = (uint8_t) ulValue;
+      //Set PER to maximum counter value (resolution : 0xFF)
+      TCx->COUNT8.PER.reg = 0xFF;
+      // Enable TCx
+      TCx->COUNT8.CTRLA.reg |= TC_CTRLA_ENABLE;
+    }
+    else
+    {
+      // -- Configure TCC
+
+      //DISABLE TCCx
+      TCCx->CTRLA.reg &=~(TCC_CTRLA_ENABLE);
+      //Set TCx as normal PWM
+      TCCx->WAVE.reg |= TCC_WAVE_WAVEGEN_NPWM;
+      //Set TCx in waveform mode Normal PWM
+      TCCx->CC[Channelx].reg = (uint32_t)ulValue;
+      //Set PER to maximum counter value (resolution : 0xFF)
+      TCCx->PER.reg = 0xFF;
+      //ENABLE TCCx
+      TCCx->CTRLA.reg |= TCC_CTRLA_ENABLE ;
+    }
+
+    return ;
+  }
+
+  // -- Defaults to digital write
+  pinMode( ulPin, OUTPUT ) ;
+
+  if ( ulValue < 128 )
+  {
+    digitalWrite( ulPin, LOW ) ;
+  }
+  else
+  {
+    digitalWrite( ulPin, HIGH ) ;
+  }
+}
+
+#ifdef __cplusplus
+}
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_analog.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_analog.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_analog.h	(revision 136)
@@ -0,0 +1,84 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _WIRING_ANALOG_
+#define _WIRING_ANALOG_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * \brief SAM3 products have only one reference for ADC
+ */
+typedef enum _eAnalogReference
+{
+  AR_DEFAULT,
+  AR_INTERNAL,
+  AR_EXTERNAL
+} eAnalogReference ;
+
+
+/*
+ * \brief Configures the reference voltage used for analog input (i.e. the value used as the top of the input range).
+ * This function is kept only for compatibility with existing AVR based API.
+ *
+ * \param ulMmode Should be set to AR_DEFAULT.
+ */
+extern void analogReference( eAnalogReference ulMode ) ;
+
+/*
+ * \brief Writes an analog value (PWM wave) to a pin.
+ *
+ * \param ulPin
+ * \param ulValue
+ */
+extern void analogWrite( uint32_t ulPin, uint32_t ulValue ) ;
+
+/*
+ * \brief Reads the value from the specified analog pin.
+ *
+ * \param ulPin
+ *
+ * \return Read value from selected pin, if no error.
+ */
+extern uint32_t analogRead( uint32_t ulPin ) ;
+
+/*
+ * \brief Set the resolution of analogRead return values. Default is 10 bits (range from 0 to 1023).
+ *
+ * \param res
+ */
+extern void analogReadResolution(int res);
+
+/*
+ * \brief Set the resolution of analogWrite parameters. Default is 8 bits (range from 0 to 255).
+ *
+ * \param res
+ */
+extern void analogWriteResolution(int res);
+
+extern void analogOutputInit( void ) ;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _WIRING_ANALOG_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_constants.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_constants.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_constants.h	(revision 136)
@@ -0,0 +1,82 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _WIRING_CONSTANTS_
+#define _WIRING_CONSTANTS_
+
+#ifdef __cplusplus
+extern "C"{
+#endif // __cplusplus
+
+#define true            (0x1)
+#define false           (0x0)
+
+#define PI 3.1415926535897932384626433832795
+#define HALF_PI 1.5707963267948966192313216916398
+#define TWO_PI 6.283185307179586476925286766559
+#define DEG_TO_RAD 0.017453292519943295769236907684886
+#define RAD_TO_DEG 57.295779513082320876798154814105
+#define EULER 2.718281828459045235360287471352
+
+#define SERIAL  0x0
+#define DISPLAY 0x1
+
+enum BitOrder {
+	LSBFIRST = 0,
+	MSBFIRST = 1
+};
+
+#ifndef min
+#define min(a,b) ((a)<(b)?(a):(b))
+#endif // min
+
+#ifndef max
+#define max(a,b) ((a)>(b)?(a):(b))
+#endif // max
+
+//#define abs(x) ((x)>0?(x):-(x))
+#define constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt)))
+#define round(x)     ((x)>=0?(long)((x)+0.5):(long)((x)-0.5))
+#define radians(deg) ((deg)*DEG_TO_RAD)
+#define degrees(rad) ((rad)*RAD_TO_DEG)
+#define sq(x) ((x)*(x))
+
+#define interrupts() __enable_irq()
+#define noInterrupts() __disable_irq()
+
+#define lowByte(w) ((uint8_t) ((w) & 0xff))
+#define highByte(w) ((uint8_t) ((w) >> 8))
+
+#define bitRead(value, bit) (((value) >> (bit)) & 0x01)
+#define bitSet(value, bit) ((value) |= (1UL << (bit)))
+#define bitClear(value, bit) ((value) &= ~(1UL << (bit)))
+#define bitWrite(value, bit, bitvalue) (bitvalue ? bitSet(value, bit) : bitClear(value, bit))
+
+typedef unsigned int word;
+
+#define bit(b) (1UL << (b))
+
+// TODO: to be checked
+typedef uint8_t boolean ;
+typedef uint8_t byte ;
+
+#ifdef __cplusplus
+} // extern "C"
+#endif // __cplusplus
+
+#endif /* _WIRING_CONSTANTS_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_digital.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_digital.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_digital.c	(revision 136)
@@ -0,0 +1,205 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+
+#include "wiring_digital.h"
+#include "WVariant.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+int pinPeripheral( uint32_t ulPin, EPioType ulPeripheral )
+{
+  if ( g_APinDescription[ulPin].ulPinType == PIO_NOT_A_PIN )
+  {
+    return -1 ;
+  }
+
+  switch ( ulPeripheral )
+  {
+    case PIO_DIGITAL:
+    case PIO_INPUT:
+    case PIO_INPUT_PULLUP:
+    case PIO_OUTPUT:
+      // Disable peripheral muxing, done in pinMode
+      // Configure pin mode, if requested
+      if ( ulPeripheral == PIO_INPUT )
+      {
+        pinMode( ulPin, INPUT ) ;
+      }
+      else
+      {
+        if ( ulPeripheral == PIO_INPUT_PULLUP )
+        {
+          pinMode( ulPin, INPUT_PULLUP ) ;
+        }
+        else
+        {
+          if ( ulPeripheral == PIO_OUTPUT )
+          {
+            pinMode( ulPin, OUTPUT ) ;
+          }
+          else
+          {
+              // do notting
+          }
+        }
+      }
+    break ;
+
+    case PIO_ANALOG:
+    case PIO_SERCOM:
+    case PIO_SERCOM_ALT:
+    case PIO_TIMER:
+    case PIO_TIMER_ALT:
+    case PIO_EXTINT:
+    case PIO_COM:
+    case PIO_AC_CLK:
+#if 0
+      // Is the pio pin in the lower 16 ones?
+      // The WRCONFIG register allows update of only 16 pin max out of 32
+      if ( g_APinDescription[ulPin].ulPin < 16 )
+      {
+        PORT->Group[g_APinDescription[ulPin].ulPort].WRCONFIG.reg = PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_PMUXEN | PORT_WRCONFIG_PMUX( ulPeripheral ) |
+                                                                    PORT_WRCONFIG_WRPINCFG |
+                                                                    PORT_WRCONFIG_PINMASK( g_APinDescription[ulPin].ulPin ) ;
+      }
+      else
+      {
+        PORT->Group[g_APinDescription[ulPin].ulPort].WRCONFIG.reg = PORT_WRCONFIG_HWSEL |
+                                                                    PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_PMUXEN | PORT_WRCONFIG_PMUX( ulPeripheral ) |
+                                                                    PORT_WRCONFIG_WRPINCFG |
+                                                                    PORT_WRCONFIG_PINMASK( g_APinDescription[ulPin].ulPin - 16 ) ;
+      }
+#else
+      if ( g_APinDescription[ulPin].ulPin & 1 )
+      {
+        uint32_t temp ;
+
+        // Get whole current setup for both odd and even pins and remove odd one
+        temp = (PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg) & PORT_PMUX_PMUXE( 0xF ) ;
+        // Set new muxing
+        PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg = temp|PORT_PMUX_PMUXO( ulPeripheral ) ;
+        // Enable port mux
+        PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN ;
+      }
+      else
+      {
+        uint32_t temp ;
+
+        temp = (PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg) & PORT_PMUX_PMUXO( 0xF ) ;
+        PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg = temp|PORT_PMUX_PMUXE( ulPeripheral ) ;
+        PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN ; // Enable port mux
+      }
+#endif
+    break ;
+
+    case PIO_NOT_A_PIN:
+      return -1l ;
+    break ;
+  }
+
+  return 0l ;
+}
+
+void pinMode( uint32_t ulPin, uint32_t ulMode )
+{
+  if ( g_APinDescription[ulPin].ulPinType == PIO_NOT_A_PIN )
+  {
+    return ;
+  }
+
+  switch ( ulMode )
+  {
+    case INPUT:
+      // Set pin to input mode
+      PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
+      PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
+    break ;
+
+    case INPUT_PULLUP:
+      // Set pin to input mode with pull-up resistor enabled
+      PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
+      PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
+	  
+	  //pull-upconfig
+	  PORT->Group[g_APinDescription[ulPin].ulPort].OUTSET.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;	
+    break ;
+
+    case OUTPUT:
+      // Set pin to output mode
+		  PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg&=~(uint8_t)(PORT_PINCFG_INEN) ;
+		  PORT->Group[g_APinDescription[ulPin].ulPort].DIRSET.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
+	  
+	  break ;
+
+    default:
+      // do nothing
+    break ;
+  }
+}
+
+void digitalWrite( uint32_t ulPin, uint32_t ulVal )
+{
+  /* Handle the case the pin isn't usable as PIO */
+  if ( g_APinDescription[ulPin].ulPinType == PIO_NOT_A_PIN )
+  {
+    return ;
+  }
+
+  // Enable pull-up resistor
+  PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_PULLEN) ;
+
+  switch ( ulVal )
+  {
+    case LOW:
+      PORT->Group[g_APinDescription[ulPin].ulPort].OUTCLR.reg = (1ul << g_APinDescription[ulPin].ulPin) ;
+    break ;
+
+    case HIGH:
+      PORT->Group[g_APinDescription[ulPin].ulPort].OUTSET.reg = (1ul << g_APinDescription[ulPin].ulPin) ;
+    break ;
+
+    default:
+    break ;
+  }
+
+  return ;
+}
+
+int digitalRead( uint32_t ulPin )
+{
+  /* Handle the case the pin isn't usable as PIO */
+  if ( g_APinDescription[ulPin].ulPinType == PIO_NOT_A_PIN )
+  {
+    return LOW ;
+  }
+
+  if ( (PORT->Group[g_APinDescription[ulPin].ulPort].IN.reg & (1ul << g_APinDescription[ulPin].ulPin)) != 0 )
+  {
+    return HIGH ;
+  }
+
+  return LOW ;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_digital.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_digital.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_digital.h	(revision 136)
@@ -0,0 +1,86 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _WIRING_DIGITAL_
+#define _WIRING_DIGITAL_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define INPUT           (0x0ul)
+#define OUTPUT          (0x1ul)
+#define INPUT_PULLUP    (0x2ul)
+
+#define LOW             (0x0ul)
+#define HIGH            (0x1ul)
+
+#include "WVariant.h"
+
+/**
+ * \brief Configures the specified pin to belong to a device peripheral or to behave either as a an input or an output. See the description of board for details.
+ *
+ * \param ulPin The number of the pin whose mode you wish to set
+ * \param ulPeripheral See WVariant.h for type decription
+ */
+extern int pinPeripheral( uint32_t ulPin, EPioType ulPeripheral ) ;
+
+/**
+ * \brief Configures the specified pin to behave either as an input or an output. See the description of digital pins for details.
+ *
+ * \param ulPin The number of the pin whose mode you wish to set
+ * \param ulMode Either INPUT or OUTPUT
+ */
+extern void pinMode( uint32_t dwPin, uint32_t dwMode ) ;
+
+/**
+ * \brief Write a HIGH or a LOW value to a digital pin.
+ *
+ * If the pin has been configured as an OUTPUT with pinMode(), its voltage will be set to the
+ * corresponding value: 5V (or 3.3V on 3.3V boards) for HIGH, 0V (ground) for LOW.
+ *
+ * If the pin is configured as an INPUT, writing a HIGH value with digitalWrite() will enable an internal
+ * 20K pullup resistor (see the tutorial on digital pins). Writing LOW will disable the pullup. The pullup
+ * resistor is enough to light an LED dimly, so if LEDs appear to work, but very dimly, this is a likely
+ * cause. The remedy is to set the pin to an output with the pinMode() function.
+ *
+ * \note Digital pin PIN_LED is harder to use as a digital input than the other digital pins because it has an LED
+ * and resistor attached to it that's soldered to the board on most boards. If you enable its internal 20k pull-up
+ * resistor, it will hang at around 1.7 V instead of the expected 5V because the onboard LED and series resistor
+ * pull the voltage level down, meaning it always returns LOW. If you must use pin PIN_LED as a digital input, use an
+ * external pull down resistor.
+ *
+ * \param dwPin the pin number
+ * \param dwVal HIGH or LOW
+ */
+extern void digitalWrite( uint32_t dwPin, uint32_t dwVal ) ;
+
+/**
+ * \brief Reads the value from a specified digital pin, either HIGH or LOW.
+ *
+ * \param ulPin The number of the digital pin you want to read (int)
+ *
+ * \return HIGH or LOW
+ */
+extern int digitalRead( uint32_t ulPin ) ;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _WIRING_DIGITAL_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_private.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_private.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_private.h	(revision 136)
@@ -0,0 +1,42 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef WiringPrivate_h
+#define WiringPrivate_h
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdarg.h>
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+// Includes Atmel CMSIS
+#include "sam.h"
+
+#include "wiring_constants.h"
+
+#ifdef __cplusplus
+} // extern "C"
+
+#include "HardwareSerial.h"
+
+#endif
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_pulse.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_pulse.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_pulse.cpp	(revision 136)
@@ -0,0 +1,61 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "Arduino.h"
+#include "wiring_private.h"
+#include "wiring_pulse.h"
+/* Measures the length (in microseconds) of a pulse on the pin; state is HIGH
+ * or LOW, the type of pulse to measure.  Works on pulses from 2-3 microseconds
+ * to 3 minutes in length, but must be called at least a few dozen microseconds
+ * before the start of the pulse. */
+extern uint32_t pulseIn( uint32_t pin, uint32_t state, uint32_t timeout )
+{
+	// cache the port and bit of the pin in order to speed up the
+	// pulse width measuring loop and achieve finer resolution.  calling
+	// digitalRead() instead yields much coarser resolution.
+	PinDescription p = g_APinDescription[pin];
+	uint32_t width = 0; // keep initialization out of time critical area
+	
+	// convert the timeout from microseconds to a number of times through
+	// the initial loop; it takes 22 clock cycles per iteration.
+	uint32_t numloops = 0;
+	uint32_t maxloops = microsecondsToClockCycles(timeout) / 22;
+	// wait for any previous pulse to end
+	while (digitalRead(pin) == state)
+		if (numloops++ == maxloops)
+			return 0;
+	
+	
+	// wait for the pulse to start
+	while (digitalRead(pin) != state)
+		if (numloops++ == maxloops)
+			return 0;
+	
+	// wait for the pulse to stop
+	while (digitalRead(pin) == state) {
+		if (numloops++ == maxloops)
+			return 0;
+		width++;
+	}
+
+	// convert the reading to microseconds. The loop has been determined
+	// to be 52 clock cycles long and have about 16 clocks between the edge
+	// and the start of the loop. There will be some error introduced by
+	// the interrupt handlers.
+	return clockCyclesToMicroseconds(width * 52 + 16);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_pulse.cpp.disabled
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_pulse.cpp.disabled	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_pulse.cpp.disabled	(revision 136)
@@ -0,0 +1,61 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "Arduino.h"
+#include "wiring_private.h"
+
+/* Measures the length (in microseconds) of a pulse on the pin; state is HIGH
+ * or LOW, the type of pulse to measure.  Works on pulses from 2-3 microseconds
+ * to 3 minutes in length, but must be called at least a few dozen microseconds
+ * before the start of the pulse. */
+extern uint32_t pulseIn( uint32_t pin, uint32_t state, uint32_t timeout )
+{
+	// cache the port and bit of the pin in order to speed up the
+	// pulse width measuring loop and achieve finer resolution.  calling
+	// digitalRead() instead yields much coarser resolution.
+	PinDescription p = g_APinDescription[pin];
+	uint32_t width = 0; // keep initialization out of time critical area
+	
+	// convert the timeout from microseconds to a number of times through
+	// the initial loop; it takes 22 clock cycles per iteration.
+	uint32_t numloops = 0;
+	uint32_t maxloops = microsecondsToClockCycles(timeout) / 22;
+	
+	// wait for any previous pulse to end
+	while (PIO_Get(p.pPort, PIO_INPUT, p.ulPin) == state)
+		if (numloops++ == maxloops)
+			return 0;
+	
+	// wait for the pulse to start
+	while (PIO_Get(p.pPort, PIO_INPUT, p.ulPin) != state)
+		if (numloops++ == maxloops)
+			return 0;
+	
+	// wait for the pulse to stop
+	while (PIO_Get(p.pPort, PIO_INPUT, p.ulPin) == state) {
+		if (numloops++ == maxloops)
+			return 0;
+		width++;
+	}
+
+	// convert the reading to microseconds. The loop has been determined
+	// to be 52 clock cycles long and have about 16 clocks between the edge
+	// and the start of the loop. There will be some error introduced by
+	// the interrupt handlers.
+	return clockCyclesToMicroseconds(width * 52 + 16);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_pulse.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_pulse.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_pulse.h	(revision 136)
@@ -0,0 +1,39 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _WIRING_PULSE_
+#define _WIRING_PULSE_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/*
+ * \brief Measures the length (in microseconds) of a pulse on the pin; state is HIGH
+ * or LOW, the type of pulse to measure.  Works on pulses from 2-3 microseconds
+ * to 3 minutes in length, but must be called at least a few dozen microseconds
+ * before the start of the pulse.
+ */
+extern uint32_t pulseIn( uint32_t ulPin, uint32_t ulState, uint32_t ulTimeout = 1000000L ) ;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _WIRING_PULSE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_shift.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_shift.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_shift.c	(revision 136)
@@ -0,0 +1,74 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include <stdint.h>
+#include "wiring_shift.h"
+#include "wiring_digital.h"
+#include "wiring_private.h"
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+uint32_t shiftIn( uint32_t ulDataPin, uint32_t ulClockPin, uint32_t ulBitOrder )
+{
+  uint8_t value = 0 ;
+  uint8_t i ;
+
+  for ( i=0 ; i < 8 ; ++i )
+  {
+    digitalWrite( ulClockPin, HIGH ) ;
+
+    if ( ulBitOrder == LSBFIRST )
+    {
+      value |= digitalRead( ulDataPin ) << i ;
+    }
+    else
+    {
+      value |= digitalRead( ulDataPin ) << (7 - i) ;
+    }
+
+    digitalWrite( ulClockPin, LOW ) ;
+  }
+
+  return value ;
+}
+
+void shiftOut( uint32_t ulDataPin, uint32_t ulClockPin, uint32_t ulBitOrder, uint32_t ulVal )
+{
+  uint8_t i ;
+
+  for ( i=0 ; i < 8 ; i++ )
+  {
+    if ( ulBitOrder == LSBFIRST )
+    {
+      digitalWrite( ulDataPin, !!(ulVal & (1 << i)) ) ;
+    }
+    else
+    {
+      digitalWrite( ulDataPin, !!(ulVal & (1 << (7 - i))) ) ;
+    }
+
+    digitalWrite( ulClockPin, HIGH ) ;
+    digitalWrite( ulClockPin, LOW ) ;
+  }
+}
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_shift.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_shift.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/arduino/wiring_shift.h	(revision 136)
@@ -0,0 +1,42 @@
+/*
+  Copyright (c) 2011 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _WIRING_SHIFT_
+#define _WIRING_SHIFT_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/*
+ * \brief
+ */
+extern uint32_t shiftIn( uint32_t ulDataPin, uint32_t ulClockPin, uint32_t ulBitOrder ) ;
+
+
+/*
+ * \brief
+ */
+extern void shiftOut( uint32_t ulDataPin, uint32_t ulClockPin, uint32_t ulBitOrder, uint32_t ulVal ) ;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _WIRING_SHIFT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_I01/build_as6/test.atsln
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_I01/build_as6/test.atsln	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_I01/build_as6/test.atsln	(revision 136)
@@ -0,0 +1,20 @@
+﻿
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Atmel Studio Solution File, Format Version 11.00
+Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_I01/build_as6/test.cppproj
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_I01/build_as6/test.cppproj	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_I01/build_as6/test.cppproj	(revision 136)
@@ -0,0 +1,477 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
+    <ProjectVersion>6.2</ProjectVersion>
+    <ToolchainName>com.Atmel.ARMGCC.CPP</ToolchainName>
+    <ProjectGuid>{b3f859ad-e162-4c2f-9684-eac6932fec80}</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>CPP</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>test</AssemblyName>
+    <Name>test</Name>
+    <RootNamespace>test</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>false</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>1</eraseonlaunchrule>
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
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+    </AsfFrameworkConfig>
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+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.samice</ToolType>
+      <ToolNumber>28010306</ToolNumber>
+      <ToolName>SAM-ICE</ToolName>
+    </com_atmel_avrdbg_tool_samice>
+    <UseGdb>True</UseGdb>
+    <com_atmel_avrdbg_tool_edbg>
+      <ToolOptions>
+        <InterfaceProperties>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.edbg</ToolType>
+      <ToolNumber>ATML2320021800000012</ToolNumber>
+      <ToolName>EDBG</ToolName>
+    </com_atmel_avrdbg_tool_edbg>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
+    <ToolchainSettings>
+      <ArmGccCpp>
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+    </ToolchainSettings>
+  </PropertyGroup>
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+      <ArmGccCpp>
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+  <ItemGroup>
+    <Folder Include="core" />
+    <Folder Include="Wire" />
+    <Folder Include="SPI" />
+    <Folder Include="variant" />
+  </ItemGroup>
+  <ItemGroup>
+    <Compile Include="..\..\..\..\..\..\..\libraries\LiquidCrystal_I2C\LiquidCrystal_I2C.cpp">
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+    </Compile>
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+    </Compile>
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+    </Compile>
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+    </Compile>
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+    </Compile>
+    <Compile Include="..\..\..\arduino\Client.h">
+      <SubType>compile</SubType>
+      <Link>core\Client.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.c">
+      <SubType>compile</SubType>
+      <Link>core\delay.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.h">
+      <SubType>compile</SubType>
+      <Link>core\delay.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\HardwareSerial.h">
+      <SubType>compile</SubType>
+      <Link>core\HardwareSerial.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\hooks.c">
+      <SubType>compile</SubType>
+      <Link>core\hooks.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.cpp">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.h">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.c">
+      <SubType>compile</SubType>
+      <Link>core\itoa.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.h">
+      <SubType>compile</SubType>
+      <Link>core\itoa.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\main.cpp">
+      <SubType>compile</SubType>
+      <Link>core\main.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Print.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.h">
+      <SubType>compile</SubType>
+      <Link>core\Print.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Printable.h">
+      <SubType>compile</SubType>
+      <Link>core\Printable.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Reset.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.h">
+      <SubType>compile</SubType>
+      <Link>core\Reset.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.cpp">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.h">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.cpp">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.h">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Server.h">
+      <SubType>compile</SubType>
+      <Link>core\Server.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\startup.c">
+      <SubType>compile</SubType>
+      <Link>core\startup.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Stream.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.h">
+      <SubType>compile</SubType>
+      <Link>core\Stream.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.c">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.h">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Tone.h">
+      <SubType>compile</SubType>
+      <Link>core\Tone.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Uart.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.h">
+      <SubType>compile</SubType>
+      <Link>core\Uart.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Udp.h">
+      <SubType>compile</SubType>
+      <Link>core\Udp.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WCharacter.h">
+      <SubType>compile</SubType>
+      <Link>core\WCharacter.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.c">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.h">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_constants.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_constants.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_private.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_private.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_pulse.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_pulse.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WMath.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.h">
+      <SubType>compile</SubType>
+      <Link>core\WMath.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WString.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.h">
+      <SubType>compile</SubType>
+      <Link>core\WString.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WVariant.h">
+      <SubType>compile</SubType>
+      <Link>core\WVariant.h</Link>
+    </Compile>
+    <Compile Include="..\test.cpp">
+      <SubType>compile</SubType>
+      <Link>test.cpp</Link>
+    </Compile>
+    <Compile Include="LiquidCrystal_I2C.h">
+      <SubType>compile</SubType>
+    </Compile>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_I01/test.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_I01/test.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_I01/test.cpp	(revision 136)
@@ -0,0 +1,33 @@
+#include "Arduino.h"
+#include <Wire.h>
+const uint8_t addressTemp = 0x4Ful;
+uint16_t temp = 0;
+uint8_t a, b;
+void setup()
+{
+  Serial5.begin( 115200 );
+  Serial5.println("Wire init");
+  Wire.begin();
+}
+
+void loop()
+{
+  Wire.beginTransmission(addressTemp);
+    Wire.write((uint8_t) 0x00);
+  Wire.endTransmission();
+
+  delay(100);
+
+  Wire.requestFrom(addressTemp, 2);
+  Serial5.print((char)13);
+  Serial5.print("Temperature : ");
+
+  a = Wire.read();
+  b = Wire.read();
+
+  temp = b << 7;
+  temp |= a;
+  temp >>= 7;
+  
+  Serial5.print(temp);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_LCD/build_as6/test.atsln
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_LCD/build_as6/test.atsln	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_LCD/build_as6/test.atsln	(revision 136)
@@ -0,0 +1,20 @@
+﻿
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Atmel Studio Solution File, Format Version 11.00
+Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_LCD/build_as6/test.cppproj
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_LCD/build_as6/test.cppproj	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_LCD/build_as6/test.cppproj	(revision 136)
@@ -0,0 +1,477 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
+    <ProjectVersion>6.2</ProjectVersion>
+    <ToolchainName>com.Atmel.ARMGCC.CPP</ToolchainName>
+    <ProjectGuid>{b3f859ad-e162-4c2f-9684-eac6932fec80}</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>CPP</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>test</AssemblyName>
+    <Name>test</Name>
+    <RootNamespace>test</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>false</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>1</eraseonlaunchrule>
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
+        <dependencies>
+          <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.17.0" />
+        </dependencies>
+      </framework-data>
+    </AsfFrameworkConfig>
+    <avrtool>com.atmel.avrdbg.tool.samice</avrtool>
+    <avrtoolinterface>SWD</avrtoolinterface>
+    <com_atmel_avrdbg_tool_samice>
+      <ToolOptions>
+        <InterfaceProperties>
+          <SwdClock>4000000</SwdClock>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.samice</ToolType>
+      <ToolNumber>28010306</ToolNumber>
+      <ToolName>SAM-ICE</ToolName>
+    </com_atmel_avrdbg_tool_samice>
+    <UseGdb>False</UseGdb>
+    <com_atmel_avrdbg_tool_edbg>
+      <ToolOptions>
+        <InterfaceProperties>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.edbg</ToolType>
+      <ToolNumber>ATML2320021800000003</ToolNumber>
+      <ToolName>EDBG</ToolName>
+    </com_atmel_avrdbg_tool_edbg>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
+    <ToolchainSettings>
+      <ArmGccCpp>
+        <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
+        <armgcc.common.outputfiles.lss>True</armgcc.common.outputfiles.lss>
+        <armgcc.common.outputfiles.eep>True</armgcc.common.outputfiles.eep>
+        <armgcc.common.outputfiles.bin>True</armgcc.common.outputfiles.bin>
+        <armgcc.common.outputfiles.srec>True</armgcc.common.outputfiles.srec>
+        <armgcc.compiler.symbols.DefSymbols>
+          <ListValues>
+            <Value>NDEBUG</Value>
+          </ListValues>
+        </armgcc.compiler.symbols.DefSymbols>
+        <armgcc.compiler.directories.IncludePaths>
+          <ListValues>
+            <Value>../../../../../../../tools/CMSIS/Device/ATMEL</Value>
+            <Value>../../../../../../../tools/CMSIS/CMSIS/Include</Value>
+            <Value>../../../../arduino</Value>
+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
+            <Value>../../../../../libraries/SPI</Value>
+            <Value>../../../../../libraries/Wire</Value>
+          </ListValues>
+        </armgcc.compiler.directories.IncludePaths>
+        <armgcc.compiler.optimization.level>Optimize for size (-Os)</armgcc.compiler.optimization.level>
+        <armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
+        <armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
+        <armgcccpp.compiler.symbols.DefSymbols>
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+            <Value>NDEBUG</Value>
+          </ListValues>
+        </armgcccpp.compiler.symbols.DefSymbols>
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+            <Value>../../../../../../../tools/CMSIS/Device/ATMEL</Value>
+            <Value>../../../../../../../tools/CMSIS/CMSIS/Include</Value>
+            <Value>../../../../arduino</Value>
+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
+            <Value>../../../../../libraries/SPI</Value>
+            <Value>../../../../../libraries/Wire</Value>
+          </ListValues>
+        </armgcccpp.compiler.directories.IncludePaths>
+        <armgcccpp.compiler.optimization.level>Optimize for size (-Os)</armgcccpp.compiler.optimization.level>
+        <armgcccpp.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcccpp.compiler.optimization.PrepareFunctionsForGarbageCollection>
+        <armgcccpp.compiler.warnings.AllWarnings>True</armgcccpp.compiler.warnings.AllWarnings>
+        <armgcccpp.linker.libraries.Libraries>
+          <ListValues>
+            <Value>libm</Value>
+          </ListValues>
+        </armgcccpp.linker.libraries.Libraries>
+        <armgcccpp.linker.libraries.LibrarySearchPaths>
+          <ListValues>
+            <Value>../cmsis/linkerScripts</Value>
+          </ListValues>
+        </armgcccpp.linker.libraries.LibrarySearchPaths>
+        <armgcccpp.linker.optimization.GarbageCollectUnusedSections>True</armgcccpp.linker.optimization.GarbageCollectUnusedSections>
+        <armgcccpp.linker.miscellaneous.LinkerFlags>-Tsamd21g18a_flash.ld</armgcccpp.linker.miscellaneous.LinkerFlags>
+        <armgcccpp.preprocessingassembler.general.IncludePaths>
+          <ListValues>
+            <Value>../../../../../../../tools/CMSIS/Device/ATMEL</Value>
+            <Value>../../../../../../../tools/CMSIS/CMSIS/Include</Value>
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+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
+            <Value>../../../../../libraries/SPI</Value>
+            <Value>../../../../../libraries/Wire</Value>
+          </ListValues>
+        </armgcccpp.preprocessingassembler.general.IncludePaths>
+      </ArmGccCpp>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
+    <ToolchainSettings>
+      <ArmGccCpp>
+  <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
+  <armgcc.common.outputfiles.lss>True</armgcc.common.outputfiles.lss>
+  <armgcc.common.outputfiles.eep>True</armgcc.common.outputfiles.eep>
+  <armgcc.common.outputfiles.bin>True</armgcc.common.outputfiles.bin>
+  <armgcc.common.outputfiles.srec>True</armgcc.common.outputfiles.srec>
+  <armgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</armgcc.compiler.general.ChangeDefaultCharTypeUnsigned>
+  <armgcc.compiler.symbols.DefSymbols>
+    <ListValues>
+      <Value>DEBUG</Value>
+      <Value>ARDUINO=156</Value>
+    </ListValues>
+  </armgcc.compiler.symbols.DefSymbols>
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+  <armgcc.compiler.directories.IncludePaths>
+    <ListValues>
+      <Value>../../../../../../../tools/CMSIS/Device/ATMEL</Value>
+      <Value>../../../../../../../tools/CMSIS/CMSIS/Include</Value>
+      <Value>../../../../arduino</Value>
+      <Value>../../../../arduino/USB</Value>
+      <Value>../../../../../variants/arduino_zero</Value>
+      <Value>../../../../../libraries/SPI</Value>
+      <Value>../../../../../libraries/Wire</Value>
+    </ListValues>
+  </armgcc.compiler.directories.IncludePaths>
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+  <armgcc.compiler.optimization.PrepareDataForGarbageCollection>True</armgcc.compiler.optimization.PrepareDataForGarbageCollection>
+  <armgcc.compiler.optimization.DebugLevel>Maximum (-g3)</armgcc.compiler.optimization.DebugLevel>
+  <armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
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+    </ListValues>
+  </armgcccpp.compiler.symbols.DefSymbols>
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+      <Value>../../../../../../../tools/CMSIS/Device/ATMEL</Value>
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+      <Value>../../../../arduino/USB</Value>
+      <Value>../../../../../variants/arduino_zero</Value>
+      <Value>../../../../../libraries/SPI</Value>
+      <Value>../../../../../libraries/Wire</Value>
+    </ListValues>
+  </armgcccpp.compiler.directories.IncludePaths>
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+  <armgcccpp.compiler.optimization.PrepareDataForGarbageCollection>True</armgcccpp.compiler.optimization.PrepareDataForGarbageCollection>
+  <armgcccpp.compiler.optimization.DebugLevel>Maximum (-g3)</armgcccpp.compiler.optimization.DebugLevel>
+  <armgcccpp.compiler.warnings.AllWarnings>True</armgcccpp.compiler.warnings.AllWarnings>
+  <armgcccpp.compiler.miscellaneous.OtherFlags>-std=c++98</armgcccpp.compiler.miscellaneous.OtherFlags>
+  <armgcccpp.linker.general.UseNewlibNano>True</armgcccpp.linker.general.UseNewlibNano>
+  <armgcccpp.linker.libraries.Libraries>
+    <ListValues>
+      <Value>libm</Value>
+    </ListValues>
+  </armgcccpp.linker.libraries.Libraries>
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+      <Value>../../../../../variants/arduino_zero/linker_scripts/gcc</Value>
+    </ListValues>
+  </armgcccpp.linker.libraries.LibrarySearchPaths>
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+  <armgcccpp.linker.memorysettings.ExternalRAM />
+  <armgcccpp.linker.miscellaneous.LinkerFlags>-Tflash.ld</armgcccpp.linker.miscellaneous.LinkerFlags>
+  <armgcccpp.assembler.general.IncludePaths>
+    <ListValues>
+      <Value>../../../arduino</Value>
+    </ListValues>
+  </armgcccpp.assembler.general.IncludePaths>
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+</ArmGccCpp>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <ItemGroup>
+    <Folder Include="core" />
+    <Folder Include="LiquidCrystal_I2C" />
+    <Folder Include="Wire" />
+    <Folder Include="SPI" />
+    <Folder Include="variant" />
+  </ItemGroup>
+  <ItemGroup>
+    <Compile Include="..\..\..\..\..\..\..\libraries\LiquidCrystal_I2C\LiquidCrystal_I2C.cpp">
+      <SubType>compile</SubType>
+      <Link>LiquidCrystal_I2C\LiquidCrystal_I2C.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\LiquidCrystal_I2C\LiquidCrystal_I2C.h">
+      <SubType>compile</SubType>
+      <Link>LiquidCrystal_I2C\LiquidCrystal_I2C.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.cpp">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.h">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.cpp">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.h">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\pins_arduino.h">
+      <SubType>compile</SubType>
+      <Link>variant\pins_arduino.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\variant.cpp">
+      <SubType>compile</SubType>
+      <Link>variant\variant.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\variant.h">
+      <SubType>compile</SubType>
+      <Link>variant\variant.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Arduino.h">
+      <SubType>compile</SubType>
+      <Link>core\Arduino.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\binary.h">
+      <SubType>compile</SubType>
+      <Link>core\binary.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Client.h">
+      <SubType>compile</SubType>
+      <Link>core\Client.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.c">
+      <SubType>compile</SubType>
+      <Link>core\delay.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.h">
+      <SubType>compile</SubType>
+      <Link>core\delay.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\HardwareSerial.h">
+      <SubType>compile</SubType>
+      <Link>core\HardwareSerial.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\hooks.c">
+      <SubType>compile</SubType>
+      <Link>core\hooks.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.cpp">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.h">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.c">
+      <SubType>compile</SubType>
+      <Link>core\itoa.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.h">
+      <SubType>compile</SubType>
+      <Link>core\itoa.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\main.cpp">
+      <SubType>compile</SubType>
+      <Link>core\main.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Print.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.h">
+      <SubType>compile</SubType>
+      <Link>core\Print.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Printable.h">
+      <SubType>compile</SubType>
+      <Link>core\Printable.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Reset.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.h">
+      <SubType>compile</SubType>
+      <Link>core\Reset.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.cpp">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.h">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.cpp">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.h">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Server.h">
+      <SubType>compile</SubType>
+      <Link>core\Server.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\startup.c">
+      <SubType>compile</SubType>
+      <Link>core\startup.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Stream.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.h">
+      <SubType>compile</SubType>
+      <Link>core\Stream.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.c">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.h">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Tone.h">
+      <SubType>compile</SubType>
+      <Link>core\Tone.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Uart.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.h">
+      <SubType>compile</SubType>
+      <Link>core\Uart.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Udp.h">
+      <SubType>compile</SubType>
+      <Link>core\Udp.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WCharacter.h">
+      <SubType>compile</SubType>
+      <Link>core\WCharacter.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.c">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.h">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_constants.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_constants.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_private.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_private.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_pulse.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_pulse.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WMath.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.h">
+      <SubType>compile</SubType>
+      <Link>core\WMath.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WString.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.h">
+      <SubType>compile</SubType>
+      <Link>core\WString.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WVariant.h">
+      <SubType>compile</SubType>
+      <Link>core\WVariant.h</Link>
+    </Compile>
+    <Compile Include="..\test.cpp">
+      <SubType>compile</SubType>
+      <Link>test.cpp</Link>
+    </Compile>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_LCD/test.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_LCD/test.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_LCD/test.cpp	(revision 136)
@@ -0,0 +1,20 @@
+#include <Wire.h>
+#include "LiquidCrystal_I2C.h"
+
+LiquidCrystal_I2C lcd(0x27, 16, 2);
+
+void setup()
+{
+  Serial5.begin( 9600 ) ;
+  
+  lcd.init();
+
+  lcd.backlight();
+  lcd.print("Hello world :)")
+}
+
+void loop()
+{
+  
+  delay(1000);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_RTC/build_as6/test.atsln
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_RTC/build_as6/test.atsln	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_RTC/build_as6/test.atsln	(revision 136)
@@ -0,0 +1,20 @@
+﻿
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Atmel Studio Solution File, Format Version 11.00
+Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_RTC/build_as6/test.cppproj
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_RTC/build_as6/test.cppproj	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_RTC/build_as6/test.cppproj	(revision 136)
@@ -0,0 +1,466 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
+    <ProjectVersion>6.2</ProjectVersion>
+    <ToolchainName>com.Atmel.ARMGCC.CPP</ToolchainName>
+    <ProjectGuid>{b3f859ad-e162-4c2f-9684-eac6932fec80}</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>CPP</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>test</AssemblyName>
+    <Name>test</Name>
+    <RootNamespace>test</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>false</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>1</eraseonlaunchrule>
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
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+    </AsfFrameworkConfig>
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+    <avrtoolinterface>SWD</avrtoolinterface>
+    <com_atmel_avrdbg_tool_samice>
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+        <InterfaceProperties>
+          <SwdClock>4000000</SwdClock>
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+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.samice</ToolType>
+      <ToolNumber>28010306</ToolNumber>
+      <ToolName>SAM-ICE</ToolName>
+    </com_atmel_avrdbg_tool_samice>
+    <UseGdb>True</UseGdb>
+    <com_atmel_avrdbg_tool_edbg>
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+        <InterfaceProperties>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.edbg</ToolType>
+      <ToolNumber>ATML2320021800000012</ToolNumber>
+      <ToolName>EDBG</ToolName>
+    </com_atmel_avrdbg_tool_edbg>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
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+          </ListValues>
+        </armgcccpp.linker.libraries.Libraries>
+        <armgcccpp.linker.libraries.LibrarySearchPaths>
+          <ListValues>
+            <Value>../../../../../variants/arduino_zero/linker_scripts/gcc</Value>
+          </ListValues>
+        </armgcccpp.linker.libraries.LibrarySearchPaths>
+        <armgcccpp.linker.optimization.GarbageCollectUnusedSections>True</armgcccpp.linker.optimization.GarbageCollectUnusedSections>
+        <armgcccpp.linker.memorysettings.ExternalRAM />
+        <armgcccpp.linker.miscellaneous.LinkerFlags>-Tflash.ld</armgcccpp.linker.miscellaneous.LinkerFlags>
+        <armgcccpp.assembler.general.IncludePaths>
+          <ListValues>
+            <Value>../../../arduino</Value>
+          </ListValues>
+        </armgcccpp.assembler.general.IncludePaths>
+        <armgcccpp.assembler.debugging.DebugLevel>Default (-g)</armgcccpp.assembler.debugging.DebugLevel>
+        <armgcccpp.preprocessingassembler.general.DefaultIncludePath>False</armgcccpp.preprocessingassembler.general.DefaultIncludePath>
+        <armgcccpp.preprocessingassembler.general.IncludePaths>
+          <ListValues>
+            <Value>../../../arduino</Value>
+          </ListValues>
+        </armgcccpp.preprocessingassembler.general.IncludePaths>
+        <armgcccpp.preprocessingassembler.debugging.DebugLevel>Default (-Wa,-g)</armgcccpp.preprocessingassembler.debugging.DebugLevel>
+      </ArmGccCpp>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <ItemGroup>
+    <Folder Include="core" />
+    <Folder Include="Wire" />
+    <Folder Include="SPI" />
+    <Folder Include="variant" />
+  </ItemGroup>
+  <ItemGroup>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.cpp">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.h">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.cpp">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.h">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\pins_arduino.h">
+      <SubType>compile</SubType>
+      <Link>variant\pins_arduino.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\variant.cpp">
+      <SubType>compile</SubType>
+      <Link>variant\variant.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\variant.h">
+      <SubType>compile</SubType>
+      <Link>variant\variant.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Arduino.h">
+      <SubType>compile</SubType>
+      <Link>core\Arduino.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\binary.h">
+      <SubType>compile</SubType>
+      <Link>core\binary.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Client.h">
+      <SubType>compile</SubType>
+      <Link>core\Client.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.c">
+      <SubType>compile</SubType>
+      <Link>core\delay.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.h">
+      <SubType>compile</SubType>
+      <Link>core\delay.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\HardwareSerial.h">
+      <SubType>compile</SubType>
+      <Link>core\HardwareSerial.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\hooks.c">
+      <SubType>compile</SubType>
+      <Link>core\hooks.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.cpp">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.h">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.c">
+      <SubType>compile</SubType>
+      <Link>core\itoa.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.h">
+      <SubType>compile</SubType>
+      <Link>core\itoa.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\main.cpp">
+      <SubType>compile</SubType>
+      <Link>core\main.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Print.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.h">
+      <SubType>compile</SubType>
+      <Link>core\Print.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Printable.h">
+      <SubType>compile</SubType>
+      <Link>core\Printable.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Reset.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.h">
+      <SubType>compile</SubType>
+      <Link>core\Reset.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.cpp">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.h">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.cpp">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.h">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Server.h">
+      <SubType>compile</SubType>
+      <Link>core\Server.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\startup.c">
+      <SubType>compile</SubType>
+      <Link>core\startup.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Stream.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.h">
+      <SubType>compile</SubType>
+      <Link>core\Stream.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.c">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.h">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Tone.h">
+      <SubType>compile</SubType>
+      <Link>core\Tone.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Uart.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.h">
+      <SubType>compile</SubType>
+      <Link>core\Uart.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Udp.h">
+      <SubType>compile</SubType>
+      <Link>core\Udp.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WCharacter.h">
+      <SubType>compile</SubType>
+      <Link>core\WCharacter.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.c">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.h">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_constants.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_constants.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_private.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_private.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_pulse.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_pulse.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WMath.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.h">
+      <SubType>compile</SubType>
+      <Link>core\WMath.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WString.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.h">
+      <SubType>compile</SubType>
+      <Link>core\WString.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WVariant.h">
+      <SubType>compile</SubType>
+      <Link>core\WVariant.h</Link>
+    </Compile>
+    <Compile Include="..\test.cpp">
+      <SubType>compile</SubType>
+      <Link>test.cpp</Link>
+    </Compile>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_RTC/test.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_RTC/test.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_RTC/test.cpp	(revision 136)
@@ -0,0 +1,82 @@
+#include "Arduino.h"
+#include <Wire.h>
+
+const uint8_t address = 0x68;
+
+uint8_t decToBcd(byte val)
+{
+  return ( (val/10*16) + (val%10) );
+}
+
+// Convert binary coded decimal to normal decimal numbers
+uint8_t bcdToDec(byte val)
+{
+  return ( (val/16*10) + (val%16) );
+}
+
+void setup()
+{
+  Serial5.begin(9600);
+  Serial5.println("Wire init");
+  Wire.begin();
+
+  // Setting the date
+  /*
+  Wire.beginTransmission(address);
+    Wire.write((uint8_t)0x00);  // Init register
+    
+    Wire.write(decToBcd(0));  // Second
+    Wire.write(decToBcd(39));  // Minute
+    Wire.write(decToBcd(11));  // Hours
+    
+    Wire.write(decToBcd(4));  // Day of week
+
+    Wire.write(decToBcd(21));  // Day of Month
+    Wire.write(decToBcd(5));  // Month
+    Wire.write(decToBcd(14));  // Year
+  Wire.endTransmission();
+  */
+}
+
+void loop()
+{
+
+  Wire.beginTransmission(address);
+    Wire.write((uint8_t)0x3F);
+  Wire.endTransmission();
+
+  delay(10);
+
+  Wire.requestFrom(address, 7);
+/*  while(Wire.available())
+  {
+    Serial5.print(bcdToDec(Wire.read()));
+    Serial5.print(" ");
+  }
+  Serial5.println();*/
+
+  
+   int second     = bcdToDec(Wire.read() & 0x7f);
+   int minute     = bcdToDec(Wire.read());
+   int hour       = bcdToDec(Wire.read() & 0x3f);  // Need to change this if 12 hour am/pm
+   int dayOfWeek  = bcdToDec(Wire.read());
+   int dayOfMonth = bcdToDec(Wire.read());
+   int month      = bcdToDec(Wire.read());
+   int year       = bcdToDec(Wire.read());
+   
+   Serial5.print(hour, DEC);
+   Serial5.print(":");
+   Serial5.print(minute, DEC);
+   Serial5.print(":");
+   Serial5.print(second, DEC);
+   Serial5.print("  ");
+   Serial5.print(month, DEC);
+   Serial5.print("/");
+   Serial5.print(dayOfMonth, DEC);
+   Serial5.print("/");
+   Serial5.print(year,DEC);
+   Serial5.print("  ");
+   Serial5.println();
+
+  delay(990);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/build_as6/LiquidCrystal_I2C.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/build_as6/LiquidCrystal_I2C.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/build_as6/LiquidCrystal_I2C.h	(revision 136)
@@ -0,0 +1,126 @@
+﻿//DFRobot.com
+#ifndef LiquidCrystal_I2C_h
+#define LiquidCrystal_I2C_h
+
+//#include <inttypes.h>
+#include "Print.h"
+//#include <Wire.h>
+
+// commands
+#define LCD_CLEARDISPLAY 0x01
+#define LCD_RETURNHOME 0x02
+#define LCD_ENTRYMODESET 0x04
+#define LCD_DISPLAYCONTROL 0x08
+#define LCD_CURSORSHIFT 0x10
+#define LCD_FUNCTIONSET 0x20
+#define LCD_SETCGRAMADDR 0x40
+#define LCD_SETDDRAMADDR 0x80
+
+// flags for display entry mode
+#define LCD_ENTRYRIGHT 0x00
+#define LCD_ENTRYLEFT 0x02
+#define LCD_ENTRYSHIFTINCREMENT 0x01
+#define LCD_ENTRYSHIFTDECREMENT 0x00
+
+// flags for display on/off control
+#define LCD_DISPLAYON 0x04
+#define LCD_DISPLAYOFF 0x00
+#define LCD_CURSORON 0x02
+#define LCD_CURSOROFF 0x00
+#define LCD_BLINKON 0x01
+#define LCD_BLINKOFF 0x00
+
+// flags for display/cursor shift
+#define LCD_DISPLAYMOVE 0x08
+#define LCD_CURSORMOVE 0x00
+#define LCD_MOVERIGHT 0x04
+#define LCD_MOVELEFT 0x00
+
+// flags for function set
+#define LCD_8BITMODE 0x10
+#define LCD_4BITMODE 0x00
+#define LCD_2LINE 0x08
+#define LCD_1LINE 0x00
+#define LCD_5x10DOTS 0x04
+#define LCD_5x8DOTS 0x00
+
+// flags for backlight control
+#define LCD_BACKLIGHT 0x08
+#define LCD_NOBACKLIGHT 0x00
+
+#define En B00000100  // Enable bit
+#define Rw B00000010  // Read/Write bit
+#define Rs B00000001  // Register select bit
+
+class LiquidCrystal_I2C : public Print {
+public:
+  LiquidCrystal_I2C(uint8_t lcd_Addr,uint8_t lcd_cols,uint8_t lcd_rows);
+  void begin(uint8_t cols, uint8_t rows, uint8_t charsize = LCD_5x8DOTS );
+  void clear();
+  void home();
+  void noDisplay();
+  void display();
+  void noBlink();
+  void blink();
+  void noCursor();
+  void cursor();
+  void scrollDisplayLeft();
+  void scrollDisplayRight();
+  void printLeft();
+  void printRight();
+  void leftToRight();
+  void rightToLeft();
+  void shiftIncrement();
+  void shiftDecrement();
+  void noBacklight();
+  void backlight();
+  void autoscroll();
+  void noAutoscroll();
+  void createChar(uint8_t, uint8_t[]);
+  void setCursor(uint8_t, uint8_t);
+#if defined(ARDUINO) && ARDUINO >= 100
+  virtual size_t write(uint8_t);
+#else
+  virtual void write(uint8_t);
+#endif
+  void command(uint8_t);
+  void init();
+
+////compatibility API function aliases
+void blink_on();						// alias for blink()
+void blink_off();       					// alias for noBlink()
+void cursor_on();      	 					// alias for cursor()
+void cursor_off();      					// alias for noCursor()
+void setBacklight(uint8_t new_val);				// alias for backlight() and nobacklight()
+void load_custom_character(uint8_t char_num, uint8_t *rows);	// alias for createChar()
+void printstr(const char[]);
+
+////Unsupported API functions (not implemented in this library)
+uint8_t status();
+void setContrast(uint8_t new_val);
+uint8_t keypad();
+void setDelay(int,int);
+void on();
+void off();
+uint8_t init_bargraph(uint8_t graphtype);
+void draw_horizontal_graph(uint8_t row, uint8_t column, uint8_t len,  uint8_t pixel_col_end);
+void draw_vertical_graph(uint8_t row, uint8_t column, uint8_t len,  uint8_t pixel_col_end);
+
+
+private:
+  void init_priv();
+  void send(uint8_t, uint8_t);
+  void write4bits(uint8_t);
+  void expanderWrite(uint8_t);
+  void pulseEnable(uint8_t);
+  uint8_t _Addr;
+  uint8_t _displayfunction;
+  uint8_t _displaycontrol;
+  uint8_t _displaymode;
+  uint8_t _numlines;
+  uint8_t _cols;
+  uint8_t _rows;
+  uint8_t _backlightval;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/build_as6/test.atsln
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/build_as6/test.atsln	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/build_as6/test.atsln	(revision 136)
@@ -0,0 +1,20 @@
+﻿
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Atmel Studio Solution File, Format Version 11.00
+Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/build_as6/test.cppproj
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/build_as6/test.cppproj	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/build_as6/test.cppproj	(revision 136)
@@ -0,0 +1,477 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
+    <ProjectVersion>6.2</ProjectVersion>
+    <ToolchainName>com.Atmel.ARMGCC.CPP</ToolchainName>
+    <ProjectGuid>{b3f859ad-e162-4c2f-9684-eac6932fec80}</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>CPP</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>test</AssemblyName>
+    <Name>test</Name>
+    <RootNamespace>test</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>false</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>1</eraseonlaunchrule>
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
+        <dependencies>
+          <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.17.0" />
+        </dependencies>
+      </framework-data>
+    </AsfFrameworkConfig>
+    <avrtool>com.atmel.avrdbg.tool.samice</avrtool>
+    <avrtoolinterface>SWD</avrtoolinterface>
+    <com_atmel_avrdbg_tool_samice>
+      <ToolOptions>
+        <InterfaceProperties>
+          <SwdClock>4000000</SwdClock>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.samice</ToolType>
+      <ToolNumber>28010306</ToolNumber>
+      <ToolName>SAM-ICE</ToolName>
+    </com_atmel_avrdbg_tool_samice>
+    <UseGdb>True</UseGdb>
+    <com_atmel_avrdbg_tool_edbg>
+      <ToolOptions>
+        <InterfaceProperties>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.edbg</ToolType>
+      <ToolNumber>ATML2320021800000012</ToolNumber>
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+  <ItemGroup>
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+    <Folder Include="Wire" />
+    <Folder Include="SPI" />
+    <Folder Include="variant" />
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+      <SubType>compile</SubType>
+      <Link>LiquidCrystal_I2C.cpp</Link>
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+      <SubType>compile</SubType>
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+    </Compile>
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+      <SubType>compile</SubType>
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+      <SubType>compile</SubType>
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+    <Compile Include="..\..\..\arduino\delay.h">
+      <SubType>compile</SubType>
+      <Link>core\delay.h</Link>
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+    <Compile Include="..\..\..\arduino\HardwareSerial.h">
+      <SubType>compile</SubType>
+      <Link>core\HardwareSerial.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\hooks.c">
+      <SubType>compile</SubType>
+      <Link>core\hooks.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.cpp">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.h">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.c">
+      <SubType>compile</SubType>
+      <Link>core\itoa.c</Link>
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+      <SubType>compile</SubType>
+      <Link>core\itoa.h</Link>
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+      <SubType>compile</SubType>
+      <Link>core\main.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Print.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.h">
+      <SubType>compile</SubType>
+      <Link>core\Print.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Printable.h">
+      <SubType>compile</SubType>
+      <Link>core\Printable.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Reset.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.h">
+      <SubType>compile</SubType>
+      <Link>core\Reset.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.cpp">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.h">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.cpp">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.h">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Server.h">
+      <SubType>compile</SubType>
+      <Link>core\Server.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\startup.c">
+      <SubType>compile</SubType>
+      <Link>core\startup.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Stream.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.h">
+      <SubType>compile</SubType>
+      <Link>core\Stream.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.c">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.h">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Tone.h">
+      <SubType>compile</SubType>
+      <Link>core\Tone.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Uart.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.h">
+      <SubType>compile</SubType>
+      <Link>core\Uart.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Udp.h">
+      <SubType>compile</SubType>
+      <Link>core\Udp.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WCharacter.h">
+      <SubType>compile</SubType>
+      <Link>core\WCharacter.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.c">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.h">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_constants.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_constants.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.h</Link>
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+    <Compile Include="..\..\..\arduino\wiring_private.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_private.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_pulse.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_pulse.h</Link>
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+    <Compile Include="..\..\..\arduino\wiring_shift.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WMath.cpp</Link>
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+    <Compile Include="..\..\..\arduino\WMath.h">
+      <SubType>compile</SubType>
+      <Link>core\WMath.h</Link>
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+    <Compile Include="..\..\..\arduino\WString.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WString.cpp</Link>
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+    <Compile Include="..\..\..\arduino\WString.h">
+      <SubType>compile</SubType>
+      <Link>core\WString.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WVariant.h">
+      <SubType>compile</SubType>
+      <Link>core\WVariant.h</Link>
+    </Compile>
+    <Compile Include="..\test.cpp">
+      <SubType>compile</SubType>
+      <Link>test.cpp</Link>
+    </Compile>
+    <Compile Include="LiquidCrystal_I2C.h">
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+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/test.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/test.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_I2C_multi/test.cpp	(revision 136)
@@ -0,0 +1,126 @@
+#include "Arduino.h"
+#include <Wire.h>
+#include <LiquidCrystal_I2C.h>
+
+
+const uint8_t addressTemp = 0x4Ful;
+const uint8_t addressLCD = 0x20ul;
+const uint8_t addressRTC = 0x68ul;
+uint16_t valueTemp = 0;
+uint8_t a, b;
+
+LiquidCrystal_I2C lcd(addressLCD,16,2);  // set the LCD address to 0x20(Cooperate with 3 short circuit caps) for a 16 chars and 2 line display
+
+struct timeRTC
+{
+  uint8_t hour;
+  uint8_t minute;
+  uint8_t second;
+  
+  uint8_t dayMonth;
+  uint8_t dayWeek;
+  uint8_t month;
+  uint8_t year;
+} timeRtc;
+
+// Convert normal decimal to numbers binary coded decimal
+uint8_t decToBcd(byte val)
+{
+  return ( (val/10*16) + (val%10) );
+}
+
+// Convert binary coded decimal to normal decimal numbers
+uint8_t bcdToDec(byte val)
+{
+  return ( (val/16*10) + (val%16) );
+}
+
+void updateTime()
+{
+    Wire.beginTransmission(addressRTC);
+    //Wire.write((uint8_t)0x3F);
+    Wire.write((uint8_t)0x00);
+    Wire.endTransmission();
+
+    delay(10);
+
+    Wire.requestFrom(addressRTC, 7);
+    
+    timeRtc.second = bcdToDec(Wire.read());
+    timeRtc.minute = bcdToDec(Wire.read());
+    timeRtc.hour = bcdToDec(Wire.read());
+    
+    timeRtc.dayWeek = bcdToDec(Wire.read());
+    timeRtc.dayMonth = bcdToDec(Wire.read());
+    timeRtc.month = bcdToDec(Wire.read());
+    timeRtc.year = bcdToDec(Wire.read());
+}
+
+void setup()
+{
+  Serial5.begin( 115200 );
+  Serial5.println("Wire init");
+  Wire.begin();
+
+  lcd.init();
+  lcd.backlight();
+  lcd.home();
+
+  pinMode(2, INPUT_PULLUP);
+}
+
+void LCDSpecialPrint(uint8_t value)
+{
+  if(value < 10)
+  {
+    lcd.print('0');
+  }
+
+  lcd.print(value);
+}
+
+void loop()
+{
+  Wire.beginTransmission(addressTemp);
+    Wire.write((uint8_t) 0x00);
+  Wire.endTransmission();
+
+  delay(10);
+
+  Wire.requestFrom(addressTemp, 2);
+  Serial5.print((char)13);  // Erase current line
+  Serial5.print("Temperature : ");
+
+  a = Wire.read();
+  b = Wire.read();
+
+  valueTemp = a << 7;
+  valueTemp |= b;
+  valueTemp >>= 7;
+  
+  Serial5.print(a);
+  Serial5.print(" | ");
+  Serial5.print(b);
+  
+  updateTime();
+  lcd.setCursor(0, 0);
+  lcd.print(" ");
+  LCDSpecialPrint(valueTemp);
+  lcd.print((char)0xDF);
+  lcd.print("C  ");
+
+  LCDSpecialPrint(timeRtc.month);
+  lcd.print("/");
+  LCDSpecialPrint(timeRtc.dayMonth);
+  lcd.print("/");
+  LCDSpecialPrint(timeRtc.year);
+  lcd.print(" ");
+
+  lcd.setCursor(0, 1);
+  lcd.print("    ");
+  LCDSpecialPrint(timeRtc.hour);
+  lcd.print(":");
+  LCDSpecialPrint(timeRtc.minute);
+  lcd.print(":");
+  LCDSpecialPrint(timeRtc.second);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_chuck/build_as6/test.atsln
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_chuck/build_as6/test.atsln	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_chuck/build_as6/test.atsln	(revision 136)
@@ -0,0 +1,20 @@
+﻿
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Atmel Studio Solution File, Format Version 11.00
+Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_chuck/build_as6/test.cppproj
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_chuck/build_as6/test.cppproj	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_chuck/build_as6/test.cppproj	(revision 136)
@@ -0,0 +1,466 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
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+    <ToolchainName>com.Atmel.ARMGCC.CPP</ToolchainName>
+    <ProjectGuid>{b3f859ad-e162-4c2f-9684-eac6932fec80}</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>CPP</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>test</AssemblyName>
+    <Name>test</Name>
+    <RootNamespace>test</RootNamespace>
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+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
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+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
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+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
+        <dependencies>
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+          <SwdClock>4000000</SwdClock>
+        </InterfaceProperties>
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+      </ToolOptions>
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+      <ToolNumber>28010306</ToolNumber>
+      <ToolName>SAM-ICE</ToolName>
+    </com_atmel_avrdbg_tool_samice>
+    <UseGdb>True</UseGdb>
+    <com_atmel_avrdbg_tool_edbg>
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+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.edbg</ToolType>
+      <ToolNumber>ATML2320021800000003</ToolNumber>
+      <ToolName>EDBG</ToolName>
+    </com_atmel_avrdbg_tool_edbg>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
+    <ToolchainSettings>
+      <ArmGccCpp>
+        <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
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+            <Value>../../../../../../../tools/CMSIS/CMSIS/Include</Value>
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+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
+            <Value>../../../../../libraries/SPI</Value>
+            <Value>../../../../../libraries/Wire</Value>
+          </ListValues>
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+            <Value>../../../../../../../tools/CMSIS/CMSIS/Include</Value>
+            <Value>../../../../arduino</Value>
+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
+            <Value>../../../../../libraries/SPI</Value>
+            <Value>../../../../../libraries/Wire</Value>
+          </ListValues>
+        </armgcccpp.compiler.directories.IncludePaths>
+        <armgcccpp.compiler.optimization.level>Optimize for size (-Os)</armgcccpp.compiler.optimization.level>
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+            <Value>../cmsis/linkerScripts</Value>
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+        <armgcccpp.linker.miscellaneous.LinkerFlags>-Tsamd21g18a_flash.ld</armgcccpp.linker.miscellaneous.LinkerFlags>
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+        </armgcccpp.preprocessingassembler.general.IncludePaths>
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+    </ToolchainSettings>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
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+        <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
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+            <Value>../../../../../libraries/Wire</Value>
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+        <armgcccpp.compiler.optimization.PrepareDataForGarbageCollection>True</armgcccpp.compiler.optimization.PrepareDataForGarbageCollection>
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+        <armgcccpp.linker.libraries.LibrarySearchPaths>
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+        <armgcccpp.assembler.general.IncludePaths>
+          <ListValues>
+            <Value>../../../arduino</Value>
+          </ListValues>
+        </armgcccpp.assembler.general.IncludePaths>
+        <armgcccpp.assembler.debugging.DebugLevel>Default (-g)</armgcccpp.assembler.debugging.DebugLevel>
+        <armgcccpp.preprocessingassembler.general.DefaultIncludePath>False</armgcccpp.preprocessingassembler.general.DefaultIncludePath>
+        <armgcccpp.preprocessingassembler.general.IncludePaths>
+          <ListValues>
+            <Value>../../../arduino</Value>
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+        </armgcccpp.preprocessingassembler.general.IncludePaths>
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+      </ArmGccCpp>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <ItemGroup>
+    <Folder Include="core" />
+    <Folder Include="Wire" />
+    <Folder Include="SPI" />
+    <Folder Include="variant" />
+  </ItemGroup>
+  <ItemGroup>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.cpp">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.h">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.cpp">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.h">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\pins_arduino.h">
+      <SubType>compile</SubType>
+      <Link>variant\pins_arduino.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\variant.cpp">
+      <SubType>compile</SubType>
+      <Link>variant\variant.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\variant.h">
+      <SubType>compile</SubType>
+      <Link>variant\variant.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Arduino.h">
+      <SubType>compile</SubType>
+      <Link>core\Arduino.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\binary.h">
+      <SubType>compile</SubType>
+      <Link>core\binary.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Client.h">
+      <SubType>compile</SubType>
+      <Link>core\Client.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.c">
+      <SubType>compile</SubType>
+      <Link>core\delay.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.h">
+      <SubType>compile</SubType>
+      <Link>core\delay.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\HardwareSerial.h">
+      <SubType>compile</SubType>
+      <Link>core\HardwareSerial.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\hooks.c">
+      <SubType>compile</SubType>
+      <Link>core\hooks.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.cpp">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.h">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.c">
+      <SubType>compile</SubType>
+      <Link>core\itoa.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.h">
+      <SubType>compile</SubType>
+      <Link>core\itoa.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\main.cpp">
+      <SubType>compile</SubType>
+      <Link>core\main.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Print.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.h">
+      <SubType>compile</SubType>
+      <Link>core\Print.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Printable.h">
+      <SubType>compile</SubType>
+      <Link>core\Printable.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Reset.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.h">
+      <SubType>compile</SubType>
+      <Link>core\Reset.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.cpp">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.h">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.cpp">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.h">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Server.h">
+      <SubType>compile</SubType>
+      <Link>core\Server.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\startup.c">
+      <SubType>compile</SubType>
+      <Link>core\startup.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Stream.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.h">
+      <SubType>compile</SubType>
+      <Link>core\Stream.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.c">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.h">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Tone.h">
+      <SubType>compile</SubType>
+      <Link>core\Tone.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Uart.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.h">
+      <SubType>compile</SubType>
+      <Link>core\Uart.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Udp.h">
+      <SubType>compile</SubType>
+      <Link>core\Udp.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WCharacter.h">
+      <SubType>compile</SubType>
+      <Link>core\WCharacter.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.c">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.h">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_constants.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_constants.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_private.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_private.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_pulse.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_pulse.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WMath.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.h">
+      <SubType>compile</SubType>
+      <Link>core\WMath.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.cpp">
+      <SubType>compile</SubType>
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+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.h">
+      <SubType>compile</SubType>
+      <Link>core\WString.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WVariant.h">
+      <SubType>compile</SubType>
+      <Link>core\WVariant.h</Link>
+    </Compile>
+    <Compile Include="..\test.cpp">
+      <SubType>compile</SubType>
+      <Link>test.cpp</Link>
+    </Compile>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_chuck/test.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_chuck/test.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_chuck/test.cpp	(revision 136)
@@ -0,0 +1,79 @@
+#include <Arduino.h>
+#include <Wire.h>
+
+uint8_t accx,accy,zbut,cbut ;
+
+void setup()
+{
+  Serial5.begin( 115200 ) ;
+  Serial5.println("nunchuk init");
+  
+  Wire.begin(); // join i2c bus as master
+  Wire.beginTransmission(0x52);// transmit to device 0x52
+    Wire.write((uint8_t)0xF0);// sends sent a zero.
+    Wire.write((uint8_t)0x55);// sends sent a zero.
+    Wire.write((uint8_t)0xFB);// sends sent a zero.
+    Wire.write((uint8_t)0x00);// sends sent a zero.
+  Wire.endTransmission();// stop transmitting
+
+  Serial5.println( "WiiChukDemo ready" ) ;
+  delay(100);
+}
+
+void loop()
+{
+  Wire.requestFrom(0x52, 6);
+  
+  uint8_t jX =   Wire.read();
+  uint8_t jY =   Wire.read();
+  uint8_t accX = Wire.read();
+  uint8_t accY = Wire.read();
+  uint8_t accZ = Wire.read();
+  uint8_t misc = Wire.read();
+  
+  Serial5.print("Joy : ");
+  Serial5.print(jX);
+  Serial5.print(", ");
+  Serial5.print(jY);
+  
+  Serial5.print("\tAcc : ");
+  Serial5.print(accX);
+  Serial5.print(", ");
+  Serial5.print(accY);
+  Serial5.print(", ");
+  Serial5.print(accZ);
+  
+  Serial5.print("\tBtn : ");
+  Serial5.print(" [");
+  Serial5.print(misc);
+  Serial5.print("] ");
+
+  switch(misc & 0x3ul)
+  {
+    case 0x0ul:
+      Serial5.println("Z");
+      break;
+
+    case 0x1ul:
+      Serial5.println("C");
+      break;
+
+    case 0x2ul:
+      Serial5.println("C + Z");
+      break;
+
+    case 0x3ul:
+      Serial5.println("No key");
+      break;
+    
+    default:
+      break;
+  }
+  
+  Wire.beginTransmission(0x52);// transmit to device 0x52
+  Wire.write((uint8_t)0x00);// sends sent a zero.
+  Wire.endTransmission();// stop transmitting
+
+  delay(100);
+
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_as6/test.atsln
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_as6/test.atsln	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_as6/test.atsln	(revision 136)
@@ -0,0 +1,20 @@
+﻿
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Atmel Studio Solution File, Format Version 11.00
+Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_as6/test.cppproj
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_as6/test.cppproj	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_as6/test.cppproj	(revision 136)
@@ -0,0 +1,466 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
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+    <ToolchainName>com.Atmel.ARMGCC.CPP</ToolchainName>
+    <ProjectGuid>{b3f859ad-e162-4c2f-9684-eac6932fec80}</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>CPP</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>test</AssemblyName>
+    <Name>test</Name>
+    <RootNamespace>test</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>false</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>1</eraseonlaunchrule>
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
+        <dependencies>
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+      </framework-data>
+    </AsfFrameworkConfig>
+    <avrtool>com.atmel.avrdbg.tool.samice</avrtool>
+    <avrtoolinterface>SWD</avrtoolinterface>
+    <com_atmel_avrdbg_tool_samice>
+      <ToolOptions>
+        <InterfaceProperties>
+          <SwdClock>4000000</SwdClock>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.samice</ToolType>
+      <ToolNumber>28010306</ToolNumber>
+      <ToolName>SAM-ICE</ToolName>
+    </com_atmel_avrdbg_tool_samice>
+    <UseGdb>True</UseGdb>
+    <com_atmel_avrdbg_tool_edbg>
+      <ToolOptions>
+        <InterfaceProperties>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.edbg</ToolType>
+      <ToolNumber>ATML2320021800000012</ToolNumber>
+      <ToolName>EDBG</ToolName>
+    </com_atmel_avrdbg_tool_edbg>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
+    <ToolchainSettings>
+      <ArmGccCpp>
+        <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
+        <armgcc.common.outputfiles.lss>True</armgcc.common.outputfiles.lss>
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+        <armgcc.compiler.symbols.DefSymbols>
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+            <Value>NDEBUG</Value>
+          </ListValues>
+        </armgcc.compiler.symbols.DefSymbols>
+        <armgcc.compiler.directories.IncludePaths>
+          <ListValues>
+            <Value>../../../../../../../tools/CMSIS/Device/ATMEL</Value>
+            <Value>../../../../../../../tools/CMSIS/CMSIS/Include</Value>
+            <Value>../../../../arduino</Value>
+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
+            <Value>../../../../../libraries/SPI</Value>
+            <Value>../../../../../libraries/Wire</Value>
+          </ListValues>
+        </armgcc.compiler.directories.IncludePaths>
+        <armgcc.compiler.optimization.level>Optimize for size (-Os)</armgcc.compiler.optimization.level>
+        <armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
+        <armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
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+            <Value>../../../../../../../tools/CMSIS/CMSIS/Include</Value>
+            <Value>../../../../arduino</Value>
+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
+            <Value>../../../../../libraries/SPI</Value>
+            <Value>../../../../../libraries/Wire</Value>
+          </ListValues>
+        </armgcccpp.compiler.directories.IncludePaths>
+        <armgcccpp.compiler.optimization.level>Optimize for size (-Os)</armgcccpp.compiler.optimization.level>
+        <armgcccpp.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcccpp.compiler.optimization.PrepareFunctionsForGarbageCollection>
+        <armgcccpp.compiler.warnings.AllWarnings>True</armgcccpp.compiler.warnings.AllWarnings>
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+          <ListValues>
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+        </armgcccpp.linker.libraries.Libraries>
+        <armgcccpp.linker.libraries.LibrarySearchPaths>
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+            <Value>../cmsis/linkerScripts</Value>
+          </ListValues>
+        </armgcccpp.linker.libraries.LibrarySearchPaths>
+        <armgcccpp.linker.optimization.GarbageCollectUnusedSections>True</armgcccpp.linker.optimization.GarbageCollectUnusedSections>
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+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
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+        </armgcccpp.preprocessingassembler.general.IncludePaths>
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+    </ToolchainSettings>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
+    <ToolchainSettings>
+      <ArmGccCpp>
+        <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
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+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
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+            <Value>../../../../arduino/USB</Value>
+            <Value>../../../../../variants/arduino_zero</Value>
+            <Value>../../../../../libraries/SPI</Value>
+            <Value>../../../../../libraries/Wire</Value>
+          </ListValues>
+        </armgcccpp.compiler.directories.IncludePaths>
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+        <armgcccpp.compiler.optimization.PrepareDataForGarbageCollection>True</armgcccpp.compiler.optimization.PrepareDataForGarbageCollection>
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+        <armgcccpp.compiler.miscellaneous.OtherFlags>-std=c++98</armgcccpp.compiler.miscellaneous.OtherFlags>
+        <armgcccpp.linker.general.UseNewlibNano>True</armgcccpp.linker.general.UseNewlibNano>
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+            <Value>libm</Value>
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+        </armgcccpp.linker.libraries.Libraries>
+        <armgcccpp.linker.libraries.LibrarySearchPaths>
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+            <Value>../../../../../variants/arduino_zero/linker_scripts/gcc</Value>
+          </ListValues>
+        </armgcccpp.linker.libraries.LibrarySearchPaths>
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+        <armgcccpp.linker.memorysettings.ExternalRAM />
+        <armgcccpp.linker.miscellaneous.LinkerFlags>-Tflash.ld</armgcccpp.linker.miscellaneous.LinkerFlags>
+        <armgcccpp.assembler.general.IncludePaths>
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+            <Value>../../../arduino</Value>
+          </ListValues>
+        </armgcccpp.assembler.general.IncludePaths>
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+      </ArmGccCpp>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <ItemGroup>
+    <Folder Include="core" />
+    <Folder Include="Wire" />
+    <Folder Include="SPI" />
+    <Folder Include="variant" />
+  </ItemGroup>
+  <ItemGroup>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.cpp">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.h">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.cpp">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.h">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\pins_arduino.h">
+      <SubType>compile</SubType>
+      <Link>variant\pins_arduino.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\variant.cpp">
+      <SubType>compile</SubType>
+      <Link>variant\variant.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\variants\arduino_zero\variant.h">
+      <SubType>compile</SubType>
+      <Link>variant\variant.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Arduino.h">
+      <SubType>compile</SubType>
+      <Link>core\Arduino.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\binary.h">
+      <SubType>compile</SubType>
+      <Link>core\binary.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Client.h">
+      <SubType>compile</SubType>
+      <Link>core\Client.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.c">
+      <SubType>compile</SubType>
+      <Link>core\delay.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\delay.h">
+      <SubType>compile</SubType>
+      <Link>core\delay.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\HardwareSerial.h">
+      <SubType>compile</SubType>
+      <Link>core\HardwareSerial.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\hooks.c">
+      <SubType>compile</SubType>
+      <Link>core\hooks.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.cpp">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\IPAddress.h">
+      <SubType>compile</SubType>
+      <Link>core\IPAddress.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.c">
+      <SubType>compile</SubType>
+      <Link>core\itoa.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\itoa.h">
+      <SubType>compile</SubType>
+      <Link>core\itoa.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\main.cpp">
+      <SubType>compile</SubType>
+      <Link>core\main.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Print.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Print.h">
+      <SubType>compile</SubType>
+      <Link>core\Print.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Printable.h">
+      <SubType>compile</SubType>
+      <Link>core\Printable.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Reset.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Reset.h">
+      <SubType>compile</SubType>
+      <Link>core\Reset.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.cpp">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.h">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.cpp">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.h">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Server.h">
+      <SubType>compile</SubType>
+      <Link>core\Server.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\startup.c">
+      <SubType>compile</SubType>
+      <Link>core\startup.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Stream.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.h">
+      <SubType>compile</SubType>
+      <Link>core\Stream.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.c">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.h">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Tone.h">
+      <SubType>compile</SubType>
+      <Link>core\Tone.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Uart.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.h">
+      <SubType>compile</SubType>
+      <Link>core\Uart.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Udp.h">
+      <SubType>compile</SubType>
+      <Link>core\Udp.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WCharacter.h">
+      <SubType>compile</SubType>
+      <Link>core\WCharacter.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.c">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.h">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_constants.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_constants.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_private.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_private.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_pulse.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_pulse.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WMath.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.h">
+      <SubType>compile</SubType>
+      <Link>core\WMath.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WString.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.h">
+      <SubType>compile</SubType>
+      <Link>core\WString.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WVariant.h">
+      <SubType>compile</SubType>
+      <Link>core\WVariant.h</Link>
+    </Compile>
+    <Compile Include="..\test.cpp">
+      <SubType>compile</SubType>
+      <Link>test.cpp</Link>
+    </Compile>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/Makefile
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/Makefile	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/Makefile	(revision 136)
@@ -0,0 +1,50 @@
+#
+#  Copyright (c) 2014 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+SUBMAKE_OPTIONS=--no-builtin-rules --no-builtin-variables --no-print-directory
+
+#-------------------------------------------------------------------------------
+# Rules
+#-------------------------------------------------------------------------------
+
+all: clean test
+
+test: test_arduino_zero
+
+clean: clean_arduino_zero
+
+.PHONY: test_arduino_zero
+test_arduino_zero:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Making test_arduino_zero
+	@$(MAKE) DEBUG=1 VARIANT=arduino_zero $(SUBMAKE_OPTIONS) -f test.mk test
+	@echo ------------------------------------------------------------------------------------
+
+.PHONY: clean_arduino_zero
+clean_arduino_zero:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Cleaning test arduino_zero
+	@$(MAKE) DEBUG=1 VARIANT=arduino_zero $(SUBMAKE_OPTIONS) -f test.mk clean
+	@echo ------------------------------------------------------------------------------------
+
+.PHONY: debug_arduino_zero
+debug_arduino_zero:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Debugging test arduino_zero
+	@$(MAKE) DEBUG=1 VARIANT=arduino_zero $(SUBMAKE_OPTIONS) -f test.mk debug
+	@echo ------------------------------------------------------------------------------------
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/debug.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/debug.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/debug.mk	(revision 136)
@@ -0,0 +1,25 @@
+#
+#  Copyright (c) 2014 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Optimization level
+# -O1 Optimize
+# -O2 Optimize even more
+# -O3 Optimize yet more
+# -O0 Reduce compilation time and make debugging produce the expected results
+# -Os Optimize for size
+OPTIMIZATION = -g -O0 -DDEBUG
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/gcc.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/gcc.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/gcc.mk	(revision 136)
@@ -0,0 +1,92 @@
+#
+#  Copyright (c) 2014 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Compilation tools
+AR = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-ar
+CC = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-gcc
+#CXX = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-g++
+CXX = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-gcc
+AS = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-as
+GDB = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-gdb
+SIZE = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-size
+NM = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-nm
+OBJCOPY = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-objcopy
+
+RM=rm -Rf
+
+SEP=\\
+
+# ---------------------------------------------------------------------------------------
+# C Flags
+
+CFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int
+CFLAGS += -Werror-implicit-function-declaration -Wmain -Wparentheses
+CFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
+CFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
+CFLAGS += -Wshadow -Wpointer-arith -Wbad-function-cast -Wwrite-strings
+CFLAGS += -Wsign-compare -Waggregate-return -Wstrict-prototypes
+CFLAGS += -Wmissing-prototypes -Wmissing-declarations
+CFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
+CFLAGS += -Wpacked -Wredundant-decls -Wnested-externs -Winline -Wlong-long
+CFLAGS += -Wunreachable-code
+CFLAGS += -Wcast-align
+
+# -flto
+CFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m0plus -mthumb -mlong-calls -ffunction-sections -nostdlib -std=c99
+CFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(DEVICE) -D$(VARIANT)
+
+# To reduce application size use only integer printf function.
+CFLAGS += -Dprintf=iprintf
+# -u _scanf_float -u _printf_float
+
+
+
+# ---------------------------------------------------------------------------------------
+# CPP Flags
+
+CPPFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2
+CPPFLAGS += -Wmain -Wparentheses -Wcast-align -Wunreachable-code
+CPPFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
+CPPFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
+CPPFLAGS += -Wshadow -Wpointer-arith -Wwrite-strings
+CPPFLAGS += -Wsign-compare -Waggregate-return -Wmissing-declarations
+CPPFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
+CPPFLAGS += -Wpacked -Wredundant-decls -Winline -Wlong-long
+
+#-fno-rtti -fno-exceptions -flto
+CPPFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m0plus -mthumb -mlong-calls -ffunction-sections -fdata-sections -std=c++98
+CPPFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(DEVICE)
+
+# To reduce application size use only integer printf function.
+CPPFLAGS += -Dprintf=iprintf
+
+
+
+# ---------------------------------------------------------------------------------------
+# ASM Flags
+
+ASFLAGS = -mcpu=cortex-m0plus -mthumb -Wall -g $(OPTIMIZATION) $(INCLUDES)
+
+
+
+# ---------------------------------------------------------------------------------------
+# LD Flags
+
+#--nostartfiles  -flto
+LDFLAGS= -mcpu=cortex-m0plus -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/release.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/release.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/release.mk	(revision 136)
@@ -0,0 +1,25 @@
+#
+#  Copyright (c) 2011 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Optimization level
+# -O1 Optimize
+# -O2 Optimize even more
+# -O3 Optimize yet more
+# -O0 Reduce compilation time and make debugging produce the expected results
+# -Os Optimize for size
+OPTIMIZATION = -Os
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/test.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/test.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/build_gcc/test.mk	(revision 136)
@@ -0,0 +1,225 @@
+#
+#  Copyright (c) 2014 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Makefile for compiling validation application
+.SUFFIXES: .o .a .c .cpp .s
+
+# putting default variant
+ifeq ("$(VARIANT)", "")
+VARIANT=arduino_zero
+endif
+
+ifeq ("$(VARIANT)", "arduino_zero")
+DEVICE=__SAMD21G18A__
+endif
+
+ifeq ($(DEVICE), __SAMD21G18A__)
+DEVICE_NAME=samd21g18
+DEVICE_SERIE=samd21
+else ifeq ($(DEVICE), __SAMD21J18A__)
+DEVICE_NAME=samd21j18
+DEVICE_SERIE=samd21
+endif
+
+#-------------------------------------------------------------------------------
+# Path
+#-------------------------------------------------------------------------------
+HARDWARE_PATH=../../../../../..
+ARCH_PATH=$(HARDWARE_PATH)/arduino/samd
+ARDUINO_CORE_PATH=$(ARCH_PATH)/cores/arduino
+ARDUINO_USB_PATH=$(ARDUINO_CORE_PATH)/USB
+LIBRARIES_PATH = $(ARCH_PATH)/libraries
+SPI_PATH = $(LIBRARIES_PATH)/SPI
+WIRE_PATH = $(LIBRARIES_PATH)/Wire
+VARIANT_PATH = $(ARCH_PATH)/variants/$(VARIANT)
+TOOLS_PATH = $(HARDWARE_PATH)/tools
+CMSIS_ROOT_PATH=$(TOOLS_PATH)/CMSIS
+CMSIS_ARM_PATH=$(CMSIS_ROOT_PATH)/CMSIS/Include
+CMSIS_ATMEL_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL
+#CMSIS_DEVICE_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL/$(DEVICE_SERIE)
+
+PROJECT_BASE_PATH = ..
+
+TOOLCHAIN=gcc
+
+
+# Output directories
+OUTPUT_PATH = debug_$(VARIANT)
+
+#-------------------------------------------------------------------------------
+# Files
+#-------------------------------------------------------------------------------
+
+vpath %.cpp $(PROJECT_BASE_PATH) $(ARDUINO_CORE_PATH) $(VARIANT_PATH) $(SPI_PATH) $(WIRE_PATH)
+vpath %.c $(ARDUINO_CORE_PATH) $(VARIANT_PATH)
+
+#VPATH+=$(PROJECT_BASE_PATH)
+
+INCLUDES = -I$(ARDUINO_CORE_PATH)
+INCLUDES += -I$(ARDUINO_USB_PATH)
+INCLUDES += -I$(VARIANT_PATH)
+INCLUDES += -I$(CMSIS_ARM_PATH)
+INCLUDES += -I$(CMSIS_ATMEL_PATH)
+INCLUDES += -I$(SPI_PATH)
+INCLUDES += -I$(WIRE_PATH)
+
+#-------------------------------------------------------------------------------
+ifdef DEBUG
+include debug.mk
+else
+include release.mk
+endif
+
+#-------------------------------------------------------------------------------
+# Tools
+#-------------------------------------------------------------------------------
+
+include $(TOOLCHAIN).mk
+
+CFLAGS += -DUSB_VID=0x2341 -DUSB_PID=0x004d
+CPPFLAGS += -DUSB_VID=0x2341 -DUSB_PID=0x004d
+
+#-------------------------------------------------------------------------------
+ifdef DEBUG
+OUTPUT_OBJ=debug
+LIBS_POSTFIX=dbg
+else
+OUTPUT_OBJ=release
+LIBS_POSTFIX=rel
+endif
+
+OUTPUT_BIN=test_$(TOOLCHAIN)_$(LIBS_POSTFIX)
+LIBS=-Wl,--start-group -lgcc -lc -lstdc++ -Wl,--end-group
+#LIBS=--specs=nano.specs -Wl,--start-group -lc lnosys -Wl,--end-group
+
+LIB_PATH =-L$(PROJECT_BASE_PATH)/..
+LIB_PATH+=-L=/lib/thumb2
+#LIB_PATH+=-L=/../lib/gcc/arm-none-eabi/4.5.2/thumb2
+
+#-------------------------------------------------------------------------------
+# C source files and objects
+#-------------------------------------------------------------------------------
+C_SRC=
+C_SRC+=$(wildcard $(PROJECT_BASE_PATH)/*.c)
+C_SRC+=$(wildcard $(ARDUINO_CORE_PATH)/*.c)
+C_SRC+=$(wildcard $(VARIANT_PATH)/*.c)
+
+C_OBJ_TEMP = $(patsubst %.c, %.o, $(notdir $(C_SRC)))
+
+# during development, remove some files
+C_OBJ_FILTER=
+
+C_OBJ=$(filter-out $(C_OBJ_FILTER), $(C_OBJ_TEMP))
+
+#-------------------------------------------------------------------------------
+# CPP source files and objects
+#-------------------------------------------------------------------------------
+CPP_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.cpp)
+CPP_SRC+=$(wildcard $(ARDUINO_CORE_PATH)/*.cpp)
+CPP_SRC+=$(wildcard $(VARIANT_PATH)/*.cpp)
+
+CPP_OBJ_TEMP = $(patsubst %.cpp, %.o, $(notdir $(CPP_SRC)))
+
+# during development, remove some files
+CPP_OBJ_FILTER=
+
+CPP_OBJ=$(filter-out $(CPP_OBJ_FILTER), $(CPP_OBJ_TEMP))
+
+#-------------------------------------------------------------------------------
+# Rules
+#-------------------------------------------------------------------------------
+all: test
+
+test: create_output $(OUTPUT_BIN)
+
+
+.PHONY: create_output
+create_output:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Preparing $(VARIANT) files in $(OUTPUT_PATH) $(OUTPUT_BIN)
+	@echo -
+	@echo -
+	@echo INCLUDES -------------------------
+	@echo $(INCLUDES)
+	@echo -
+	@echo -
+	@echo C_SRC -------------------------
+	@echo $(C_SRC)
+	@echo -
+	@echo -
+	@echo C_OBJ -------------------------
+	@echo $(C_OBJ)
+	@echo -
+	@echo -
+	@echo C_OBJ prefix -------------------------
+	@echo $(addprefix $(OUTPUT_PATH)/, $(C_OBJ))
+	@echo -
+	@echo -
+	@echo CPP_SRC -------------------------
+	@echo $(CPP_SRC)
+	@echo -
+	@echo -
+	@echo CPP_OBJ -------------------------
+	@echo $(CPP_OBJ)
+	@echo -
+	@echo -
+	@echo CPP_OBJ prefix -------------------------
+	@echo $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ))
+#	@echo A_SRC -------------------------
+#	@echo $(A_SRC)
+	@echo -------------------------
+
+	-@mkdir $(OUTPUT_PATH) 1>NUL 2>&1
+	@echo ------------------------------------------------------------------------------------
+
+$(addprefix $(OUTPUT_PATH)/,$(C_OBJ)): $(OUTPUT_PATH)/%.o: %.c
+	@echo Current folder is $(shell cd) - $@ $^
+	@"$(CC)" -c $(CFLAGS) $< -o $@
+#	"$(CC)" -v -c $(CFLAGS) $< -o $@
+#	"$(CC)" -c $(CFLAGS) $< -o $@
+
+$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp
+	@echo Current folder is $(shell cd) - $@ $^
+	@"$(CXX)" -c $(CPPFLAGS) $< -o $@
+#	"$(CXX)" -v -c $(CPPFLAGS) $< -o $@
+#	"$(CXX)" -c $(CPPFLAGS) $< -o $@
+
+$(OUTPUT_BIN): $(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(A_OBJ))
+	@"$(CC)" $(LIB_PATH) $(LDFLAGS) -T"$(VARIANT_PATH)/linker_scripts/gcc/flash.ld" -Wl,-Map,$(OUTPUT_PATH)/$@.map -o $(OUTPUT_PATH)/$@.elf $^ $(LIBS)
+	@"$(NM)" $(OUTPUT_PATH)/$@.elf >$(OUTPUT_PATH)/$@.elf.txt
+	@"$(OBJCOPY)" -O binary $(OUTPUT_PATH)/$@.elf $(OUTPUT_PATH)/$@.bin
+	$(SIZE) $^ $(OUTPUT_PATH)/$@.elf
+
+.PHONY: clean
+clean:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Cleaning test files for $(VARIANT)
+	@$(RM) --version
+	-@$(RM) $(OUTPUT_PATH) 1>NUL 2>&1
+#	-@$(RM) $(OUTPUT_PATH)
+	@echo ------------------------------------------------------------------------------------
+
+#	-$(RM) $(OUTPUT_PATH)/test.o
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).elf
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).elf.txt
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).bin
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).map
+
+debug: test
+	@"$(GDB)" -x "$(VARIANT_PATH)/debug_scripts/gcc/$(VARIANT)_flash.gdb" -ex "reset" -readnow -se $(OUTPUT_PATH)/$(OUTPUT_BIN).elf
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/test.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/test.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_core/test.cpp	(revision 136)
@@ -0,0 +1,195 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "Arduino.h"
+
+static void Interrupt_Pin3( void ) ; // Ext Int Callback in LOW mode
+static void Interrupt_Pin4( void ) ; // Ext Int Callback in HIGH mode
+static void Interrupt_Pin5( void ) ; // Ext Int Callback in FALLING mode
+static void Interrupt_Pin6( void ) ; // Ext Int Callback in RISING mode
+static void Interrupt_Pin7( void ) ; // Ext Int Callback in CHANGE mode
+
+static uint32_t ul_Interrupt_Pin3 = 0 ;
+static uint32_t ul_Interrupt_Pin4 = 0 ;
+static uint32_t ul_Interrupt_Pin5 = 0 ;
+static uint32_t ul_Interrupt_Pin6 = 0 ;
+static uint32_t ul_Interrupt_Pin7 = 0 ;
+
+int temps = 0;
+int valX = 0;
+int valY = 0;
+
+
+void setup( void )
+{
+  // Initialize the digital pin as an output.
+  // Pin PIN_LED has an LED connected on most Arduino boards:
+  //pinMode( PIN_LED, OUTPUT ) ;
+  //digitalWrite( PIN_LED, LOW ) ;
+
+  // Initialize the PIN_LED2 digital pin as an output.
+  pinMode( PIN_LED2, OUTPUT ) ;
+  digitalWrite( PIN_LED2, HIGH ) ;
+
+  // Initialize the PIN_LED3 digital pin as an output.
+  pinMode( PIN_LED3, OUTPUT ) ;
+  digitalWrite( PIN_LED3, LOW ) ;
+
+  // Initialize the PIN 2 digital pin as an input.
+  pinMode( 2, INPUT ) ;
+
+//**********************************************
+// Clock output on pin 4 for measure
+
+ /* pinPeripheral( 4, PIO_AC_CLK ) ; // Clock Gen 0
+  pinPeripheral( 5, PIO_AC_CLK ) ; // Clock Gen 1
+  pinPeripheral( 13, PIO_AC_CLK ) ; // Clock Gen 3*/
+
+//**********************************************
+  Serial5.begin( 115200 ) ; // Output to EDBG Virtual COM Port
+
+  // Test External Interrupt
+  attachInterrupt( 3, Interrupt_Pin3, LOW ) ;
+  attachInterrupt( 4, Interrupt_Pin4, HIGH ) ;
+  attachInterrupt( 5, Interrupt_Pin5, FALLING ) ;
+  attachInterrupt( 6, Interrupt_Pin6, RISING ) ;
+  attachInterrupt( 7, Interrupt_Pin7, CHANGE) ;
+}
+
+static void led_step1( void )
+{
+//  digitalWrite( PIN_LED, LOW ) ;  // set the LED on
+  digitalWrite( PIN_LED2, LOW ) ;   // set the red LED off
+  digitalWrite( PIN_LED3, HIGH ) ;   // set the red LED off
+}
+
+static void led_step2( void )
+{
+//  digitalWrite( PIN_LED, HIGH ) ;   // set the LED off
+  digitalWrite( PIN_LED2, HIGH ) ;  // set the red LED on
+  digitalWrite( PIN_LED3, LOW ) ;  // set the red LED on
+}
+
+void loop( void )
+{
+  volatile int pin_value=0 ;
+  static volatile uint8_t duty_cycle=0 ;
+  static volatile uint16_t dac_value=0 ;
+
+  // Test digitalWrite
+  led_step1() ;
+  delay( 500 ) ;              // wait for a second
+  led_step2() ;
+  delay( 500 ) ;              // wait for a second
+
+  // Test Serial output
+  Serial5.write( '-' ) ;   // send a char
+  Serial5.write( "test1\n" ) ;   // send a string
+  Serial5.write( "test2" ) ;   // send another string
+
+  // Test digitalRead: connect pin 2 to either GND or 3.3V. !!!! NOT on 5V pin !!!!
+  pin_value=digitalRead( 2 ) ;
+  Serial5.write( "pin 2 value is " ) ;
+  Serial5.write( (pin_value == LOW)?"LOW\n":"HIGH\n" ) ;
+
+  duty_cycle+=8 ;//=(uint8_t)(millis() & 0xff) ;
+  analogWrite( 13, duty_cycle ) ;
+  analogWrite( 12, duty_cycle ) ;
+  analogWrite( 11, duty_cycle ) ;
+  analogWrite( 10 ,duty_cycle ) ;
+  analogWrite(  9, duty_cycle ) ;
+  analogWrite(  8, duty_cycle ) ;
+
+  dac_value += 64;
+  analogWrite(A0, dac_value);
+
+
+
+  Serial5.print("\r\nAnalog pins: ");
+
+  for ( uint32_t i = A0 ; i <= A0+NUM_ANALOG_INPUTS ; i++ )
+  {
+
+    int a = analogRead(i);
+    Serial5.print(a, DEC);
+    Serial5.print(" ");
+
+  }
+  Serial5.println();
+
+  Serial5.println("External interrupt pins:");
+  if ( ul_Interrupt_Pin3 == 1 )
+  {
+    Serial5.println( "Pin 3 triggered (LOW)" ) ;
+    ul_Interrupt_Pin3 = 0 ;
+  }
+
+  if ( ul_Interrupt_Pin4 == 1 )
+  {
+    Serial5.println( "Pin 4 triggered (HIGH)" ) ;
+    ul_Interrupt_Pin4 = 0 ;
+  }
+
+  if ( ul_Interrupt_Pin5 == 1 )
+  {
+    Serial5.println( "Pin 5 triggered (FALLING)" ) ;
+    ul_Interrupt_Pin5 = 0 ;
+  }
+
+  if ( ul_Interrupt_Pin6 == 1 )
+  {
+    Serial5.println( "Pin 6 triggered (RISING)" ) ;
+    ul_Interrupt_Pin6 = 0 ;
+  }
+
+  if ( ul_Interrupt_Pin7 == 1 )
+  {
+    Serial5.println( "Pin 7 triggered (CHANGE)" ) ;
+    ul_Interrupt_Pin7 = 0 ;
+  }
+}
+
+// Ext Int Callback in LOW mode
+static void Interrupt_Pin3( void )
+{
+  ul_Interrupt_Pin3 = 1 ;
+}
+
+// Ext Int Callback in HIGH mode
+static void Interrupt_Pin4( void )
+{
+  ul_Interrupt_Pin4 = 1 ;
+}
+
+// Ext Int Callback in CHANGE mode
+static void Interrupt_Pin5( void )
+{
+  ul_Interrupt_Pin5 = 1 ;
+}
+
+// Ext Int Callback in FALLING mode
+static void Interrupt_Pin6( void )
+{
+  ul_Interrupt_Pin6 = 1 ;
+}
+
+// Ext Int Callback in RISING mode
+static void Interrupt_Pin7( void )
+{
+  ul_Interrupt_Pin7 = 1 ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_shield_wifi/build_as6/test.atsln
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_shield_wifi/build_as6/test.atsln	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_shield_wifi/build_as6/test.atsln	(revision 136)
@@ -0,0 +1,20 @@
+﻿
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Atmel Studio Solution File, Format Version 11.00
+Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_shield_wifi/build_as6/test.cppproj
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_shield_wifi/build_as6/test.cppproj	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_shield_wifi/build_as6/test.cppproj	(revision 136)
@@ -0,0 +1,547 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
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+    <ToolchainName>com.Atmel.ARMGCC.CPP</ToolchainName>
+    <ProjectGuid>{b3f859ad-e162-4c2f-9684-eac6932fec80}</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>CPP</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>test</AssemblyName>
+    <Name>test</Name>
+    <RootNamespace>test</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
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+    <UncachedRange />
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+        <options />
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+    </com_atmel_avrdbg_tool_samice>
+    <UseGdb>True</UseGdb>
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+            <Value>../../../../../variants/arduino_zero</Value>
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+          </ListValues>
+        </armgcc.compiler.directories.IncludePaths>
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+    <Folder Include="Wire" />
+    <Folder Include="SPI" />
+    <Folder Include="variant" />
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+      <SubType>compile</SubType>
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+      <Link>core\main.cpp</Link>
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+      <SubType>compile</SubType>
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+    </Compile>
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+      <SubType>compile</SubType>
+      <Link>core\Reset.h</Link>
+    </Compile>
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+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\RingBuffer.h">
+      <SubType>compile</SubType>
+      <Link>core\RingBuffer.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.cpp">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\SERCOM.h">
+      <SubType>compile</SubType>
+      <Link>core\SERCOM.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Server.h">
+      <SubType>compile</SubType>
+      <Link>core\Server.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\startup.c">
+      <SubType>compile</SubType>
+      <Link>core\startup.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Stream.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Stream.h">
+      <SubType>compile</SubType>
+      <Link>core\Stream.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.c">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\syscalls.h">
+      <SubType>compile</SubType>
+      <Link>core\syscalls.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Tone.h">
+      <SubType>compile</SubType>
+      <Link>core\Tone.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.cpp">
+      <SubType>compile</SubType>
+      <Link>core\Uart.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Uart.h">
+      <SubType>compile</SubType>
+      <Link>core\Uart.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\Udp.h">
+      <SubType>compile</SubType>
+      <Link>core\Udp.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WCharacter.h">
+      <SubType>compile</SubType>
+      <Link>core\WCharacter.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.c">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WInterrupts.h">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_analog.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_analog.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_constants.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_constants.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_digital.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_digital.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_private.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_private.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_pulse.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_pulse.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.c">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.c</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\wiring_shift.h">
+      <SubType>compile</SubType>
+      <Link>core\wiring_shift.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WMath.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WMath.h">
+      <SubType>compile</SubType>
+      <Link>core\WMath.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.cpp">
+      <SubType>compile</SubType>
+      <Link>core\WString.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WString.h">
+      <SubType>compile</SubType>
+      <Link>core\WString.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\arduino\WVariant.h">
+      <SubType>compile</SubType>
+      <Link>core\WVariant.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.cpp">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\SPI\SPI.h">
+      <SubType>compile</SubType>
+      <Link>SPI\SPI.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.cpp">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\libraries\Wire\Wire.h">
+      <SubType>compile</SubType>
+      <Link>Wire\Wire.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\debug.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\debug.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\server_drv.cpp">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\server_drv.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\server_drv.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\server_drv.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\spi_drv.cpp">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\spi_drv.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\spi_drv.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\spi_drv.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\wifi_drv.cpp">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\wifi_drv.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\wifi_drv.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\wifi_drv.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\wifi_spi.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\wifi_spi.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\wl_definitions.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\wl_definitions.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\utility\wl_types.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\utility\wl_types.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\WiFi.cpp">
+      <SubType>compile</SubType>
+      <Link>WiFi\WiFi.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\WiFi.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\WiFi.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\WiFiClient.cpp">
+      <SubType>compile</SubType>
+      <Link>WiFi\WiFiClient.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\WiFiClient.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\WiFiClient.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\WiFiServer.cpp">
+      <SubType>compile</SubType>
+      <Link>WiFi\WiFiServer.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\WiFiServer.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\WiFiServer.h</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\WiFiUdp.cpp">
+      <SubType>compile</SubType>
+      <Link>WiFi\WiFiUdp.cpp</Link>
+    </Compile>
+    <Compile Include="..\..\..\..\..\..\..\libraries\WiFi\src\WiFiUdp.h">
+      <SubType>compile</SubType>
+      <Link>WiFi\WiFiUdp.h</Link>
+    </Compile>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_shield_wifi/test.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_shield_wifi/test.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_shield_wifi/test.cpp	(revision 136)
@@ -0,0 +1,178 @@
+/*
+ 
+ This example connects to an unencrypted Wifi network. 
+ Then it prints the  MAC address of the Wifi shield,
+ the IP address obtained, and other network details.
+
+ Circuit:
+ * WiFi shield attached
+ 
+ created 13 July 2010
+ by dlf (Metodo2 srl)
+ modified 31 May 2012
+ by Tom Igoe
+ */
+ #include "Arduino.h"
+ #include <SPI.h>
+ #include <WiFi.h>
+
+void printCurrentNet();
+void printWifiData();
+void httpRequest();
+
+char ssid[] = "AVRGUEST";     //  your network SSID (name) 
+char pass[] = "MicroController";  // your network password
+int status = WL_IDLE_STATUS;     // the Wifi radio's status
+
+WiFiClient client;
+
+void setup() {
+  WiFi = WiFiClass();
+  client = WiFiClient();
+
+  delay(500); // Waiting for initialization
+
+//  SPI.begin();
+  //Initialize Serial5 and wait for port to open:
+  Serial5.begin(9600); 
+  while (!Serial5) {
+    ; // wait for Serial5 port to connect. Needed for Leonardo only
+  }
+  
+  // check for the presence of the shield:
+  if (WiFi.status() == WL_NO_SHIELD) {
+    Serial5.println("WiFi shield not present"); 
+    // don't continue:
+    while(true);
+  } 
+  
+ // attempt to connect to Wifi network:
+  while ( status != WL_CONNECTED) { 
+    Serial5.print("Attempting to connect to WPA SSID: ");
+    Serial5.println(ssid);
+    // Connect to WPA/WPA2 network:    
+    status = WiFi.begin(ssid, pass);
+
+    // wait 10 seconds for connection:
+    delay(10000);
+  }
+   
+  // you're connected now, so print out the data:
+  Serial5.print("You're connected to the network");
+  printCurrentNet();
+  printWifiData();
+
+}
+
+void loop() {
+  // check the network connection once every 10 seconds:
+  delay(10000);
+  printCurrentNet();
+
+  // Trying to connect to http://hasthelargehadroncolliderdestroyedtheworldyet.com/
+  Serial5.println("Trying to connect to : www.hasthelargehadroncolliderdestroyedtheworldyet.com :");
+  httpRequest();
+  while( client.available() )
+  {
+    Serial5.print((char)(client.read()));
+  }
+  Serial5.println("END");
+}
+
+void printWifiData() {
+  // print your WiFi shield's IP address:
+  IPAddress ip = WiFi.localIP();
+    Serial5.print("IP Address: ");
+  Serial5.println(ip);
+  Serial5.println(ip);
+  
+  // print your MAC address:
+  byte mac[6];  
+  WiFi.macAddress(mac);
+  Serial5.print("MAC address: ");
+  Serial5.print(mac[5],HEX);
+  Serial5.print(":");
+  Serial5.print(mac[4],HEX);
+  Serial5.print(":");
+  Serial5.print(mac[3],HEX);
+  Serial5.print(":");
+  Serial5.print(mac[2],HEX);
+  Serial5.print(":");
+  Serial5.print(mac[1],HEX);
+  Serial5.print(":");
+  Serial5.println(mac[0],HEX);
+ 
+}
+
+void printCurrentNet() {
+  // print the SSID of the network you're attached to:
+  Serial5.print("SSID: ");
+  Serial5.println(WiFi.SSID());
+
+  // print the MAC address of the router you're attached to:
+  byte bssid[6];
+  WiFi.BSSID(bssid);    
+  Serial5.print("BSSID: ");
+  Serial5.print(bssid[5],HEX);
+  Serial5.print(":");
+  Serial5.print(bssid[4],HEX);
+  Serial5.print(":");
+  Serial5.print(bssid[3],HEX);
+  Serial5.print(":");
+  Serial5.print(bssid[2],HEX);
+  Serial5.print(":");
+  Serial5.print(bssid[1],HEX);
+  Serial5.print(":");
+  Serial5.println(bssid[0],HEX);
+
+  // print the received signal strength:
+  long rssi = WiFi.RSSI();
+  Serial5.print("signal strength (RSSI):");
+  Serial5.println(rssi);
+
+  // print the encryption type:
+  byte encryption = WiFi.encryptionType();
+  Serial5.print("Encryption Type:");
+  Serial5.println(encryption,HEX);
+  Serial5.println();
+}
+
+void httpRequest() {
+  // close any connection before send a new request.
+  // This will free the socket on the WiFi shield
+  client.stop();
+
+  // if there's a successful connection:
+  if (client.connect("www.hasthelargehadroncolliderdestroyedtheworldyet.com", 80)) {
+    Serial5.println("connecting...");
+    // send the HTTP PUT request:
+    client.println("GET / HTTP/1.1");
+    client.println("Host: www.hasthelargehadroncolliderdestroyedtheworldyet.com");
+    //client.println("User-Agent: ArduinoWiFi/1.1");
+    client.println("Connection: close");
+    client.println();
+
+    if( client.connected() )
+    {
+      Serial5.println("\tClient connected");
+      while( client.available() == 0 )
+      {
+        //Waiting for data
+        if( !client.connected() )
+        {
+          Serial5.println("\tClient disconnected !");
+          break;
+        }
+      }
+    }
+    else
+    {
+      Serial5.println("\tClient not connected");
+    }
+
+  }
+  else {
+    // if you couldn't make a connection:
+    Serial5.println("\tconnection failed");
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/Chapter 9 Tests - Passed - 2014-06-19 12-03-26.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/Chapter 9 Tests - Passed - 2014-06-19 12-03-26.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/Chapter 9 Tests - Passed - 2014-06-19 12-03-26.html	(revision 136)
@@ -0,0 +1,567 @@
+<HTML><HEAD>
+	<META http-equiv="X-UA-Compatible" content="IE=edge" />
+	<STYLE type='text/css'>
+		BODY { background-color: #DFDFDF; }
+		.dm_display
+		{
+		    color: Navy;
+		    font-family: monospace;
+		    background-color: White;
+		    border-width: 3px;
+		    border-style: outset;
+		}
+
+		#suite-output
+		{
+		    background-color: #FFFFDD;
+		    border: ridge 3px #FFFFDD;
+		    border-collapse: collapse;
+		    padding: 0;
+		    margin: 0;
+		    empty-cells: hide
+		}
+
+		#test-header
+		{
+		    font-weight: bold;
+		    font-size: large;
+		    border-top: ridge 2px #FFFFDD;
+		    border-bottom: ridge 2px #FFFFDD;
+		    padding: 0;
+		    margin: 0;
+		}
+
+		.test-pass, .test-fail
+		{
+		    float: right;
+		    border-left: ridge 2px #FFFDD;
+		    width: 6em;
+		}
+
+		.test-pass { background-color: #00FF00; }
+		.test-fail { background-color: #FF8888; }
+
+		.test-details
+		{
+		    clear: both;
+		    font-family: Monospace;
+		    padding: 0;
+		    margin: 0;
+		    empty-cells: hide;
+		}
+
+		.label
+		{
+		    float: left;
+		    width: 6em;
+		}
+
+		.content
+		{
+		    white-space: pre-wrap;
+		    margin-left: 6em;
+		}
+
+		.err_log, .warn_log
+		{
+		    color: Red;
+		}
+
+		.err_log { font-weight: bold; }
+	</STYLE>
+	<TITLE>Chapter 9 Tests - 2014-06-19 12-03-26</TITLE>
+	<META name="Suite-Name" content="Chapter 9 Tests.cvtests" />
+	<META name="Suite-Revision" content="4726" />
+	<META name="Suite-Revision-Date" content="2011-05-17 13:27:42 -0700 (Tue, 17 May 2011)" />
+	<META name="Test-Version" content="CVExe.exe ver 1.4.7.0" />
+	<META name="Test-Version" content="CommandVerifierLog.dll ver 1.4.8.0" />
+	<META name="Test-Version" content="TSMFCGuiDialogHelperDLL.dll ver 1.4.7.0" />
+	<META name="Test-Version" content="TestUtilities.dll ver 1.4.7.0" />
+	<META name="Test-Version" content="TestSuiteEngine.dll ver 1.4.7.0" />
+	<META name="Test-Version" content="EhciDevIOCTL.dll ver 1.4.9.7" />
+	<META name="Test-Version" content="EhciTestServices.dll ver 1.4.9.7" />
+	<META name="Test-Version" content="USBUtilities.dll ver 1.4.5.0" />
+	<META name="Test-Version" content="StackSwitcher.dll ver 1.4.5.1" />
+	<META name="Test-Version" content="USBCommandVerifier.dll ver 1.4.9.7" />
+	<META name="Device-Under-Test" content="VID=2341,PID=003B" />
+	<META name="Test-Pass" content="Device Descriptor Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (2)]" />
+	<META name="Test-Pass" content="Device Descriptor Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (2)]" />
+	<META name="Test-Pass" content="TD 9.3 Interface Association Descriptor Test (Config 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="TD 9.7 BOS Descriptor Test [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Configuration Descriptor Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Configuration Descriptor Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Interface Descriptor Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Endpoint Descriptor Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Endpoint Descriptor Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Halt Endpoint Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="SetConfiguration Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Suspend/Resume Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Remote Wakeup Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Remote Wakeup Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="Enumeration Test (repeat 150 times) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Suite-Result" content="PASS [Fails (0); Aborts (0); Warnings (4)]" />
+	<META name="Log-Name" content="Chapter 9 Tests - 2014-06-19 12-03-26.html" />
+	<META name="Test-Count" content="15" />
+</HEAD>
+<BODY><DIV id='suite-summary'>
+	<strong>TEST SUITE: </strong> Chapter 9 Tests.cvtests<BR>
+	<strong>REVISION: </strong> 4726<BR>
+	<strong>REVISION DATE: </strong> 2011-05-17 13:27:42 -0700 (Tue, 17 May 2011)<BR>
+	<strong>WORKSTATION: </strong> RFOLT0694<BR>
+	<strong>DATE: </strong> Thursday, June 19, 2014<BR>
+	<strong>TIME: </strong> 12:04:20 PM<BR>
+	<strong>OPERATOR: </strong> jcbuda<BR>
+	<strong>NUMBER OF TESTS: </strong> 15<BR>
+	<strong>LOG NAME: </strong> Chapter 9 Tests - 2014-06-19 12-03-26<BR>
+	<strong>RESULT: </strong> passed<BR>
+<HR>
+</DIV>
+<BR><BR>
+<DIV id='suite-output'>
+	<DIV id='test-header'>InitializeTestSuite</DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Test log initialized.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>User Input module initialized</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Microsoft Windows XP (Build 2600)</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Service Pack 3.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>CVExe.exe ver 1.4.7.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>CommandVerifierLog.dll ver 1.4.8.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>TSMFCGuiDialogHelperDLL.dll ver 1.4.7.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>TestUtilities.dll ver 1.4.7.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>TestSuiteEngine.dll ver 1.4.7.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>EhciDevIOCTL.dll ver 1.4.9.7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>EhciTestServices.dll ver 1.4.9.7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>USBUtilities.dll ver 1.4.5.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>StackSwitcher.dll ver 1.4.5.1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>USBCommandVerifier.dll ver 1.4.9.7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Host selected: PCI bus 0, device 29, function 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>DUT selected: FS  Device (HID) addr=2:   VID=2341, PID=003b</DIV>
+
+	</DIV>
+	<DIV id='test-header'>GetNumberOfConfigurations</DIV>
+	<DIV id='test-header'>GetNumberOfConfigurations_Other</DIV>
+	<DIV id='test-header'><A name="anchor_4">Device Descriptor Test - Configured State</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:31 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device descriptor length : 12</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device descriptor type : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Major version : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Minor version : 10</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device supports different class spec. on different interfaces : ef</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device class code indicates [Miscellaneous-Device] Device</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device sub class : 2 (Common class)</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device protocol : 1 (Interface Association Descriptor)</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device sub class : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device protocol : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device MaxPacketSize0 : 40</DIV>
+		<DIV class='warn_log'><DIV class='label'>WARNING</DIV><DIV class='content'>Read file failed</DIV></DIV>
+		<DIV class='warn_log'><DIV class='label'>WARNING</DIV><DIV class='content'>Failed to get vendor information for VendorID : 2341</DIV></DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device ProductID : 3b</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device BCD : 100</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>    ENGLISH_US           language string descriptor is : Arduino LLC</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>    ENGLISH_US           language string descriptor is : USB IO Board</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device Serial Number String : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Number of configurations device supports : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:32 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Device Descriptor Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (2) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_5">Device Descriptor Test - Addressed State</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:32 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device descriptor length : 12</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device descriptor type : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Major version : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Minor version : 10</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device supports different class spec. on different interfaces : ef</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device class code indicates [Miscellaneous-Device] Device</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device sub class : 2 (Common class)</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device protocol : 1 (Interface Association Descriptor)</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device sub class : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device protocol : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device MaxPacketSize0 : 40</DIV>
+		<DIV class='warn_log'><DIV class='label'>WARNING</DIV><DIV class='content'>Read file failed</DIV></DIV>
+		<DIV class='warn_log'><DIV class='label'>WARNING</DIV><DIV class='content'>Failed to get vendor information for VendorID : 2341</DIV></DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device ProductID : 3b</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device BCD : 100</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>    ENGLISH_US           language string descriptor is : Arduino LLC</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>    ENGLISH_US           language string descriptor is : USB IO Board</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device Serial Number String : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Number of configurations device supports : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:33 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Device Descriptor Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (2) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_6">Interface Association Descriptor Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:33 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Interface Association Descriptor :</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  bLength = 0x08</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  bDescriptorType = 0x0b</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  bFirstInterface = 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  bInterfaceCount = 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  bFunctionClass = 0x02</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  bFunctionSubClass = 0x02</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  bFunctionProtocol = 0x00</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  iFunction = 0x00</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  Running TD 9.8 : String Descriptor Test for iFunction : 0x00</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'> Found Interface Descriptor with number : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'> Found Interface Descriptor with number : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'> Found Interface Descriptor with number : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration contains 2 functions, with 3 interfaces.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  1 Interface Association Descriptor (containing 2 interfaces).</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>  1 interface not contained in an Interface Association Descriptor.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:34 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ TD 9.3 Interface Association Descriptor Test (Config 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_7">BOS Descriptor Test - Addressed state</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:34 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>USB Version number of device:  1.10</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>BOS Descriptors not supported in USB 2.0 and before.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:35 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ TD 9.7 BOS Descriptor Test:
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_8">Config Descriptor Test - Configured State</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:35 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : b</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : 24</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : 24</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : 24</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : 24</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Number of interface descriptors found 3</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Number of alternate interface descriptors found : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Number of endpoint descriptors found : 4</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor length : 9</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor type : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor TotalLength : 64</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor NumInterfaces : 3</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor ConfigurationValue: 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor string descriptor index : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor bmAttributes : c0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device does not support remote wake up</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Maximum power device requires : 500mA</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device is BUS/SELF-POWERED</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device is currently BUS POWERED</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Currently remote wakeup is DISABLED</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:36 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Configuration Descriptor Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_9">Config Descriptor Test - Addressed State</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:36 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : b</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : 24</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : 24</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : 24</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor contains descriptor of type : 24</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Number of interface descriptors found 3</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Number of alternate interface descriptors found : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Number of endpoint descriptors found : 4</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor length : 9</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor type : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor TotalLength : 64</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor NumInterfaces : 3</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor ConfigurationValue: 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor string descriptor index : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Configuration descriptor bmAttributes : c0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device does not support remote wake up</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Maximum power device requires : 500mA</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device is BUS/SELF-POWERED</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device is currently BUS POWERED</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Currently remote wakeup is DISABLED</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:37 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Configuration Descriptor Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_10">Interface Descriptor Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:37 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Bandwidth check passed</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 0 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor length : 9</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bDescriptorType : 4</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bAlternateSetting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bNumEndPoints: 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bInterfaceClass reserved for assignment by the USB-IF : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface class code indicates [CDC-Control] Interface</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface sub class : 2 <not defined></DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface protocol : 0 <not defined></DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bInterfaceSubClass : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device does not use a class-specific protocol on this interface</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor iInterface : 0x0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Calling SetInterface(), InterfaceNumber=0, AlternateSetting=0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Calling GetInterface(), InterfaceNumber=0, AlternateSetting=0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 1 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor length : 9</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bDescriptorType : 4</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bAlternateSetting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bNumEndPoints: 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bInterfaceClass reserved for assignment by the USB-IF : a</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface class code indicates [CDC-Data] Interface</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface sub class : 0 <not defined></DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface protocol : 0 <not defined></DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bInterfaceSubClass : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device does not use a class-specific protocol on this interface</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor iInterface : 0x0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Calling SetInterface(), InterfaceNumber=1, AlternateSetting=0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Calling GetInterface(), InterfaceNumber=1, AlternateSetting=0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 2 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor length : 9</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bDescriptorType : 4</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bAlternateSetting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bNumEndPoints: 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bInterfaceClass reserved for assignment by the USB-IF : 3</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface class code indicates [HID] Interface</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface sub class : 0 <not defined></DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface protocol : 0 <not defined></DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor bInterfaceSubClass : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device does not use a class-specific protocol on this interface</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface descriptor iInterface : 0x0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Calling SetInterface(), InterfaceNumber=2, AlternateSetting=0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Calling GetInterface(), InterfaceNumber=2, AlternateSetting=0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:38 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Interface Descriptor Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_11">Endpoint Descriptor Test - Configured State</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:38 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 0 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor length : 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor type : 5</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint Type : Interrupt, Number : 1, Direction : IN</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor bmAttributes : 3</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor raw MaxPacketSize : 10</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor interval : 10</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 1 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor length : 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor type : 5</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint Type : Bulk, Number : 2, Direction : OUT</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor bmAttributes : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor raw MaxPacketSize : 40</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor interval : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor length : 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor type : 5</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint Type : Bulk, Number : 3, Direction : IN</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor bmAttributes : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor raw MaxPacketSize : 40</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor interval : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 2 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor length : 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor type : 5</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint Type : Interrupt, Number : 4, Direction : IN</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor bmAttributes : 3</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor raw MaxPacketSize : 40</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor interval : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:39 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Endpoint Descriptor Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_12">Endpoint Descriptor Test - Addressed State</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:39 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 0 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor length : 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor type : 5</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint Type : Interrupt, Number : 1, Direction : IN</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor bmAttributes : 3</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor raw MaxPacketSize : 10</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor interval : 10</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 1 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor length : 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor type : 5</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint Type : Bulk, Number : 2, Direction : OUT</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor bmAttributes : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor raw MaxPacketSize : 40</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor interval : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor length : 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor type : 5</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint Type : Bulk, Number : 3, Direction : IN</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor bmAttributes : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor raw MaxPacketSize : 40</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor interval : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 2 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor length : 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor type : 5</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint Type : Interrupt, Number : 4, Direction : IN</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor bmAttributes : 3</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor raw MaxPacketSize : 40</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint descriptor interval : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:40 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Endpoint Descriptor Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_13">Halt Endpoint Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:40 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 0 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing EndPoint type : Interrupt, Address : 81</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint is currently not halted</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint is halted</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Cleared endpoint halt</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 1 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing EndPoint type : Bulk, Address : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint is currently not halted</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint is halted</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Cleared endpoint halt</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing EndPoint type : Bulk, Address : 83</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint is currently not halted</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint is halted</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Cleared endpoint halt</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing Interface number : 2 Alternate setting : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing EndPoint type : Interrupt, Address : 84</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint is currently not halted</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Endpoint is halted</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Cleared endpoint halt</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:41 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Halt Endpoint Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_14">Set Configuration Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:41 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>SetConfiguration with configuration value : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Unconfigured the device</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>SetConfiguration with configuration value : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:42 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ SetConfiguration Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_15">Suspend/Resume Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:42 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Suspended the parent port of the device</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:44 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  2 seconds.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Suspend/Resume Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_16">Remote Wakeup Test - Enabled</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:44 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>The device does not support remote wakeup</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:45 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Remote Wakeup Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_17">Remote Wakeup Test - Disabled</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:45 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>The device does not support remote wakeup</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:03:46 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Remote Wakeup Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_18">Enumeration Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:03:46 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Device speed is Full</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Beginning enumeration test with 150 enumerations.  This may take several minutes to complete.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Enumerated 150 iterations.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:04:15 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  29 seconds.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ Enumeration Test (repeat 150 times):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'>Display Other Tests To Run</DIV>
+	<DIV id='test-header'>Summary</DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Summary Log Counts [ Fails (0); Aborts (0); Warnings (4) ]</DIV>
+
+	</DIV>
+</DIV>
+</BODY></HTML>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/HID Tests - Passed - 2014-06-19 12-04-30.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/HID Tests - Passed - 2014-06-19 12-04-30.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/HID Tests - Passed - 2014-06-19 12-04-30.html	(revision 136)
@@ -0,0 +1,228 @@
+<HTML><HEAD>
+	<META http-equiv="X-UA-Compatible" content="IE=edge" />
+	<STYLE type='text/css'>
+		BODY { background-color: #DFDFDF; }
+		.dm_display
+		{
+		    color: Navy;
+		    font-family: monospace;
+		    background-color: White;
+		    border-width: 3px;
+		    border-style: outset;
+		}
+
+		#suite-output
+		{
+		    background-color: #FFFFDD;
+		    border: ridge 3px #FFFFDD;
+		    border-collapse: collapse;
+		    padding: 0;
+		    margin: 0;
+		    empty-cells: hide
+		}
+
+		#test-header
+		{
+		    font-weight: bold;
+		    font-size: large;
+		    border-top: ridge 2px #FFFFDD;
+		    border-bottom: ridge 2px #FFFFDD;
+		    padding: 0;
+		    margin: 0;
+		}
+
+		.test-pass, .test-fail
+		{
+		    float: right;
+		    border-left: ridge 2px #FFFDD;
+		    width: 6em;
+		}
+
+		.test-pass { background-color: #00FF00; }
+		.test-fail { background-color: #FF8888; }
+
+		.test-details
+		{
+		    clear: both;
+		    font-family: Monospace;
+		    padding: 0;
+		    margin: 0;
+		    empty-cells: hide;
+		}
+
+		.label
+		{
+		    float: left;
+		    width: 6em;
+		}
+
+		.content
+		{
+		    white-space: pre-wrap;
+		    margin-left: 6em;
+		}
+
+		.err_log, .warn_log
+		{
+		    color: Red;
+		}
+
+		.err_log { font-weight: bold; }
+	</STYLE>
+	<TITLE>HID Tests - 2014-06-19 12-04-30</TITLE>
+	<META name="Suite-Name" content="HID Tests.cvtests" />
+	<META name="Suite-Revision" content="4593" />
+	<META name="Suite-Revision-Date" content="2011-04-07 17:54:33 -0700 (Thu, 07 Apr 2011)" />
+	<META name="Test-Version" content="CVExe.exe ver 1.4.7.0" />
+	<META name="Test-Version" content="CommandVerifierLog.dll ver 1.4.8.0" />
+	<META name="Test-Version" content="TSMFCGuiDialogHelperDLL.dll ver 1.4.7.0" />
+	<META name="Test-Version" content="TestUtilities.dll ver 1.4.7.0" />
+	<META name="Test-Version" content="TestSuiteEngine.dll ver 1.4.7.0" />
+	<META name="Test-Version" content="EhciDevIOCTL.dll ver 1.4.9.7" />
+	<META name="Test-Version" content="EhciTestServices.dll ver 1.4.9.7" />
+	<META name="Test-Version" content="USBUtilities.dll ver 1.4.5.0" />
+	<META name="Test-Version" content="StackSwitcher.dll ver 1.4.5.1" />
+	<META name="Test-Version" content="USBCommandVerifier.dll ver 1.4.9.7" />
+	<META name="Test-Version" content="TParse.dll ver 1.4.5.0" />
+	<META name="Test-Version" content="HIDTests.dll ver 1.4.9.7" />
+	<META name="Device-Under-Test" content="VID=2341,PID=003B" />
+	<META name="Test-Pass" content="HID Class WhichSpecCompliant Test [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="HID Class Descriptor Test (Configuration Index 0) - configured State [Fails (0); Aborts (0); Warnings (3)]" />
+	<META name="Test-Pass" content="HID Class Protocol Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="HID Class GET/SET Idle Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Test-Pass" content="HID Class Report Descriptor Test (Configuration Index 0) [Fails (0); Aborts (0); Warnings (0)]" />
+	<META name="Suite-Result" content="PASS [Fails (0); Aborts (0); Warnings (3)]" />
+	<META name="Log-Name" content="HID Tests - 2014-06-19 12-04-30.html" />
+	<META name="Test-Count" content="5" />
+</HEAD>
+<BODY><DIV id='suite-summary'>
+	<strong>TEST SUITE: </strong> HID Tests.cvtests<BR>
+	<strong>REVISION: </strong> 4593<BR>
+	<strong>REVISION DATE: </strong> 2011-04-07 17:54:33 -0700 (Thu, 07 Apr 2011)<BR>
+	<strong>WORKSTATION: </strong> RFOLT0694<BR>
+	<strong>DATE: </strong> Thursday, June 19, 2014<BR>
+	<strong>TIME: </strong> 12:04:41 PM<BR>
+	<strong>OPERATOR: </strong> jcbuda<BR>
+	<strong>NUMBER OF TESTS: </strong> 5<BR>
+	<strong>LOG NAME: </strong> HID Tests - 2014-06-19 12-04-30<BR>
+	<strong>RESULT: </strong> passed<BR>
+<HR>
+</DIV>
+<BR><BR>
+<DIV id='suite-output'>
+	<DIV id='test-header'>InitializeTestSuite</DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Test log initialized.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>User Input module initialized</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Microsoft Windows XP (Build 2600)</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Service Pack 3.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>CVExe.exe ver 1.4.7.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>CommandVerifierLog.dll ver 1.4.8.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>TSMFCGuiDialogHelperDLL.dll ver 1.4.7.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>TestUtilities.dll ver 1.4.7.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>TestSuiteEngine.dll ver 1.4.7.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>EhciDevIOCTL.dll ver 1.4.9.7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>EhciTestServices.dll ver 1.4.9.7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>USBUtilities.dll ver 1.4.5.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>StackSwitcher.dll ver 1.4.5.1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>USBCommandVerifier.dll ver 1.4.9.7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>TParse.dll ver 1.4.5.0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>HIDTests.dll ver 1.4.9.7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Host selected: PCI bus 0, device 29, function 7</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>DUT selected: FS  Device (HID) addr=2:   VID=2341, PID=003b</DIV>
+
+	</DIV>
+	<DIV id='test-header'>Get Number Of Configurations</DIV>
+	<DIV id='test-header'>Get Number Of Other Speed Configurations</DIV>
+	<DIV id='test-header'><A name="anchor_4">Which Spec Compliant</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:04:36 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Interface 2 Alternate Setting 0 is draft 4 Compliant</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:04:37 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ HID Class WhichSpecCompliant Test:
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_5">HID Class Descriptor Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:04:37 2014
+</DIV>
+		<DIV class='warn_log'><DIV class='label'>WARNING</DIV><DIV class='content'>DeviceClass is NON ZERO</DIV></DIV>
+		<DIV class='warn_log'><DIV class='label'>WARNING</DIV><DIV class='content'>DeviceSubClass is NON ZERO</DIV></DIV>
+		<DIV class='warn_log'><DIV class='label'>WARNING</DIV><DIV class='content'>DeviceProtocol is NON ZERO</DIV></DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Testing HID descritpor for Interface 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>HID descriptor total length : 9</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>HID descriptor type : 21</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>HID specification version : 101</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>CountryCode : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Number of other descriptors present : 1</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>HID report descriptor length : 65</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:04:38 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ HID Class Descriptor Test (Configuration Index 0) - configured State:
+     Number of: Fails (0); Aborts (0); Warnings (3) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_6">Protocol Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:04:38 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Starting GET/SET protocol tests for interface : 2</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>GET/SET protocol request is optional. Skipping tests</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:04:39 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ HID Class Protocol Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_7">Idle Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:04:39 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>GET/SETIdle test for report ID 1. Setting idle rate to : 7f</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>GET/SETIdle test for report ID 1. Setting idle rate to : ff</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>GET/SETIdle test for report ID 1. Setting idle rate to : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>GET/SETIdle test for report ID 2. Setting idle rate to : 7f</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>GET/SETIdle test for report ID 2. Setting idle rate to : ff</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>GET/SETIdle test for report ID 2. Setting idle rate to : 0</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:04:40 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ HID Class GET/SET Idle Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'><A name="anchor_8">Report Descriptor Test</A><DIV class='test-pass'>Passed</DIV></DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Start time: Thu Jun 19 12:04:40 2014
+</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Report descriptor test passed. Proceeding to next descriptor</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>
+Stop time: Thu Jun 19 12:04:41 2014</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Duration:  1 second.</DIV>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Stopping Test [ HID Class Report Descriptor Test (Configuration Index 0):
+     Number of: Fails (0); Aborts (0); Warnings (0) ]
+
+</DIV>
+
+	</DIV>
+	<DIV id='test-header'>Summary</DIV>
+	<DIV class='test-details'>
+		<DIV class='label'>INFO</DIV><DIV class='content'>Summary Log Counts [ Fails (0); Aborts (0); Warnings (3) ]</DIV>
+
+	</DIV>
+</DIV>
+</BODY></HTML>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/test.atsln
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/test.atsln	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/test.atsln	(revision 136)
@@ -0,0 +1,20 @@
+﻿
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Atmel Studio Solution File, Format Version 11.00
+Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
+		{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/test.cppproj
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/test.cppproj	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_as6/test.cppproj	(revision 136)
@@ -0,0 +1,482 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
+    <ProjectVersion>6.2</ProjectVersion>
+    <ToolchainName>com.Atmel.ARMGCC.CPP</ToolchainName>
+    <ProjectGuid>{b3f859ad-e162-4c2f-9684-eac6932fec80}</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>CPP</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>test</AssemblyName>
+    <Name>test</Name>
+    <RootNamespace>test</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>false</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>1</eraseonlaunchrule>
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
+        <dependencies>
+          <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.17.0" />
+        </dependencies>
+      </framework-data>
+    </AsfFrameworkConfig>
+    <avrtool>com.atmel.avrdbg.tool.edbg</avrtool>
+    <avrtoolinterface>SWD</avrtoolinterface>
+    <com_atmel_avrdbg_tool_samice>
+      <ToolOptions>
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+      <SubType>compile</SubType>
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+      <SubType>compile</SubType>
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+      <SubType>compile</SubType>
+      <Link>core\USB\samd21_device.c</Link>
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+      <SubType>compile</SubType>
+      <Link>core\USB\samd21_device.h</Link>
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+    <Compile Include="..\..\..\arduino\WInterrupts.h">
+      <SubType>compile</SubType>
+      <Link>core\WInterrupts.h</Link>
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+      <Link>core\wiring.c</Link>
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+      <Link>core\wiring.h</Link>
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+      <Link>core\wiring_shift.h</Link>
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+      <Link>core\WVariant.h</Link>
+    </Compile>
+    <Compile Include="C:\jcb\support\arduino\ArduinoZero\hardware\arduino\samd\cores\validation\validation_usb_device\test_usb_device.cpp">
+      <SubType>compile</SubType>
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+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/Makefile
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/Makefile	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/Makefile	(revision 136)
@@ -0,0 +1,52 @@
+#
+#  Copyright (c) 2014 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+SUBMAKE_OPTIONS=--no-builtin-rules --no-builtin-variables --no-print-directory
+
+#-------------------------------------------------------------------------------
+# Rules
+#-------------------------------------------------------------------------------
+
+all: clean test
+
+test: test_usb_device
+
+debug: debug_test_usb_device
+
+clean: clean_test_usb_device
+
+.PHONY: test_usb_device
+test_usb_device:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Making test_usb_device
+	@$(MAKE) DEBUG=1 VARIANT=arduino_zero $(SUBMAKE_OPTIONS) -f test_usb_device.mk test
+	@echo ------------------------------------------------------------------------------------
+
+.PHONY: clean
+clean_test_usb_device:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Cleaning test_usb_device
+	@$(MAKE) DEBUG=1 VARIANT=arduino_zero $(SUBMAKE_OPTIONS) -f test_usb_device.mk clean
+	@echo ------------------------------------------------------------------------------------
+
+.PHONY: debug
+debug_test_usb_device:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Debugging test_usb_device
+	@$(MAKE) DEBUG=1 VARIANT=arduino_zero $(SUBMAKE_OPTIONS) -f test_usb_device.mk debug
+	@echo ------------------------------------------------------------------------------------
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/debug.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/debug.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/debug.mk	(revision 136)
@@ -0,0 +1,25 @@
+#
+#  Copyright (c) 2014 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Optimization level
+# -O1 Optimize
+# -O2 Optimize even more
+# -O3 Optimize yet more
+# -O0 Reduce compilation time and make debugging produce the expected results
+# -Os Optimize for size
+OPTIMIZATION = -g -O0 -DDEBUG
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/gcc.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/gcc.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/gcc.mk	(revision 136)
@@ -0,0 +1,89 @@
+#
+#  Copyright (c) 2014 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Compilation tools
+AR = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-ar
+CC = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-gcc
+#CXX = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-g++
+CXX = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-gcc
+AS = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-as
+GDB = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-gdb
+SIZE = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-size
+NM = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-nm
+OBJCOPY = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-objcopy
+
+RM=rm -Rf
+
+SEP=\\
+
+# ---------------------------------------------------------------------------------------
+# C Flags
+
+CFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int
+CFLAGS += -Werror-implicit-function-declaration -Wmain -Wparentheses
+CFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
+CFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
+CFLAGS += -Wshadow -Wpointer-arith -Wbad-function-cast -Wwrite-strings
+CFLAGS += -Wsign-compare -Waggregate-return -Wstrict-prototypes
+CFLAGS += -Wmissing-prototypes -Wmissing-declarations
+CFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
+CFLAGS += -Wpacked -Wredundant-decls -Wnested-externs -Winline -Wlong-long
+CFLAGS += -Wunreachable-code
+CFLAGS += -Wcast-align
+
+CFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m0plus -mthumb -mlong-calls -ffunction-sections -nostdlib -std=c99
+CFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(DEVICE) -D$(VARIANT)
+
+# To reduce application size use only integer printf function.
+CFLAGS += -Dprintf=iprintf
+
+
+
+# ---------------------------------------------------------------------------------------
+# CPP Flags
+
+CPPFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2
+CPPFLAGS += -Wmain -Wparentheses -Wcast-align -Wunreachable-code
+CPPFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
+CPPFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
+CPPFLAGS += -Wshadow -Wpointer-arith -Wwrite-strings
+CPPFLAGS += -Wsign-compare -Waggregate-return -Wmissing-declarations
+CPPFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
+CPPFLAGS += -Wpacked -Wredundant-decls -Winline -Wlong-long
+
+#-fno-rtti -fno-exceptions
+CPPFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m0plus -mthumb -mlong-calls -ffunction-sections -fdata-sections -std=c++98
+CPPFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(DEVICE) -D$(VARIANT)
+
+# To reduce application size use only integer printf function.
+CPPFLAGS += -Dprintf=iprintf
+
+
+
+# ---------------------------------------------------------------------------------------
+# ASM Flags
+
+ASFLAGS = -mcpu=cortex-m0plus -mthumb -Wall -g $(OPTIMIZATION) $(INCLUDES)
+
+
+
+# ---------------------------------------------------------------------------------------
+# LD Flags
+
+LDFLAGS= -mcpu=cortex-m0plus -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/release.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/release.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/release.mk	(revision 136)
@@ -0,0 +1,25 @@
+#
+#  Copyright (c) 2011 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Optimization level
+# -O1 Optimize
+# -O2 Optimize even more
+# -O3 Optimize yet more
+# -O0 Reduce compilation time and make debugging produce the expected results
+# -Os Optimize for size
+OPTIMIZATION = -Os
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/test_usb_device.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/test_usb_device.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/build_gcc/test_usb_device.mk	(revision 136)
@@ -0,0 +1,228 @@
+#
+#  Copyright (c) 2014 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Makefile for compiling usb device
+.SUFFIXES: .o .a .c .cpp .s
+
+# putting default variant
+ifeq ("$(VARIANT)", "")
+VARIANT=arduino_zero
+endif
+
+ifeq ("$(VARIANT)", "arduino_zero")
+DEVICE=__SAMD21G18A__
+endif
+
+ifeq ($(DEVICE), __SAMD21G18A__)
+DEVICE_NAME=samd21g18
+DEVICE_SERIE=samd21
+else ifeq ($(DEVICE), __SAMD21J18A__)
+DEVICE_NAME=samd21j18
+DEVICE_SERIE=samd21
+endif
+
+#-------------------------------------------------------------------------------
+# Path
+#-------------------------------------------------------------------------------
+HARDWARE_PATH=../../../../../..
+ARCH_PATH=$(HARDWARE_PATH)/arduino/samd
+ARDUINO_CORE_PATH=$(ARCH_PATH)/cores/arduino
+ARDUINO_USB_PATH=$(ARDUINO_CORE_PATH)/USB
+VARIANT_PATH = $(ARCH_PATH)/variants/$(VARIANT)
+TOOLS_PATH = $(HARDWARE_PATH)/tools
+CMSIS_ROOT_PATH=$(TOOLS_PATH)/CMSIS
+CMSIS_ARM_PATH=$(CMSIS_ROOT_PATH)/CMSIS/Include
+CMSIS_ATMEL_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL
+#CMSIS_DEVICE_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL/$(DEVICE_SERIE)
+
+PROJECT_BASE_PATH = ..
+
+TOOLCHAIN=gcc
+
+
+# Output directories
+OUTPUT_PATH = debug_$(VARIANT)
+
+#-------------------------------------------------------------------------------
+# Files
+#-------------------------------------------------------------------------------
+
+vpath %.cpp $(PROJECT_BASE_PATH) $(ARDUINO_CORE_PATH) $(VARIANT_PATH) $(ARDUINO_USB_PATH)
+vpath %.c $(PROJECT_BASE_PATH) $(ARDUINO_CORE_PATH) $(VARIANT_PATH) $(ARDUINO_USB_PATH)
+
+#VPATH+=$(PROJECT_BASE_PATH)
+
+INCLUDES = -I$(ARDUINO_CORE_PATH)
+INCLUDES += -I$(ARDUINO_USB_PATH)
+INCLUDES += -I$(VARIANT_PATH)
+INCLUDES += -I$(CMSIS_ARM_PATH)
+INCLUDES += -I$(CMSIS_ATMEL_PATH)
+#INCLUDES += -I$(CMSIS_DEVICE_PATH)
+
+#-------------------------------------------------------------------------------
+ifdef DEBUG
+include debug.mk
+else
+include release.mk
+endif
+
+#-------------------------------------------------------------------------------
+# Tools
+#-------------------------------------------------------------------------------
+
+include $(TOOLCHAIN).mk
+
+CFLAGS += -DUSB_VID=0x2341 -DUSB_PID=0x004d
+CPPFLAGS += -DUSB_VID=0x2341 -DUSB_PID=0x004d
+
+#-------------------------------------------------------------------------------
+ifdef DEBUG
+OUTPUT_OBJ=debug
+LIBS_POSTFIX=dbg
+else
+OUTPUT_OBJ=release
+LIBS_POSTFIX=rel
+endif
+
+OUTPUT_BIN=test_usb_device_$(TOOLCHAIN)_$(LIBS_POSTFIX)
+LIBS=-Wl,--start-group -lgcc -lc -lstdc++ -Wl,--end-group
+
+LIB_PATH =-L$(PROJECT_BASE_PATH)/..
+LIB_PATH+=-L=/lib/thumb2
+#LIB_PATH+=-L=/../lib/gcc/arm-none-eabi/4.5.2/thumb2
+
+#-------------------------------------------------------------------------------
+# C source files and objects
+#-------------------------------------------------------------------------------
+#C_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.c)
+#C_SRC+=$(wildcard $(ARDUINO_CORE_PATH)/*.c)
+#C_SRC+=$(wildcard $(VARIANT_PATH)/*.c)
+#C_SRC=$(wildcard $(ARDUINO_USB_PATH)/*.c)
+
+C_SRC=$(ARDUINO_USB_PATH)/samd21_device.c
+C_SRC+=$(ARDUINO_CORE_PATH)/startup.c
+C_SRC+=$(ARDUINO_CORE_PATH)/syscalls.c
+
+C_OBJ_TEMP = $(patsubst %.c, %.o, $(notdir $(C_SRC)))
+
+# during development, remove some files
+C_OBJ_FILTER=
+
+C_OBJ=$(filter-out $(C_OBJ_FILTER), $(C_OBJ_TEMP))
+
+#-------------------------------------------------------------------------------
+# CPP source files and objects
+#-------------------------------------------------------------------------------
+CPP_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.cpp)
+#CPP_SRC+=$(wildcard $(ARDUINO_CORE_PATH)/*.cpp)
+#CPP_SRC+=$(wildcard $(VARIANT_PATH)/*.cpp)
+#CPP_SRC+=$(wildcard $(ARDUINO_USB_PATH)/*.cpp)
+
+CPP_SRC+=$(ARDUINO_USB_PATH)/USBCore.cpp
+CPP_SRC+=$(ARDUINO_USB_PATH)/CDC.cpp
+CPP_SRC+=$(ARDUINO_USB_PATH)/HID.cpp
+#CPP_SRC+=$(VARIANT_PATH)/variant.cpp   ##//JCB needed, but not compile
+
+CPP_OBJ_TEMP = $(patsubst %.cpp, %.o, $(notdir $(CPP_SRC)))
+
+# during development, remove some files
+CPP_OBJ_FILTER=
+
+CPP_OBJ=$(filter-out $(CPP_OBJ_FILTER), $(CPP_OBJ_TEMP))
+
+#-------------------------------------------------------------------------------
+# Rules
+#-------------------------------------------------------------------------------
+all: test
+
+test: create_output $(OUTPUT_BIN)
+
+
+.PHONY: create_output
+create_output:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Preparing $(VARIANT) files in $(OUTPUT_PATH) $(OUTPUT_BIN)
+	@echo -
+	@echo -
+	@echo INCLUDES -------------------------
+	@echo $(INCLUDES)
+	@echo -
+	@echo -
+	@echo C_SRC -------------------------
+	@echo $(C_SRC)
+	@echo -
+	@echo -
+	@echo C_OBJ -------------------------
+	@echo $(C_OBJ)
+	@echo -
+	@echo -
+	@echo C_OBJ prefix -------------------------
+	@echo $(addprefix $(OUTPUT_PATH)/, $(C_OBJ))
+	@echo -
+	@echo -
+	@echo CPP_SRC -------------------------
+	@echo $(CPP_SRC)
+	@echo -
+	@echo -
+	@echo CPP_OBJ -------------------------
+	@echo $(CPP_OBJ)
+	@echo -
+	@echo -
+	@echo CPP_OBJ prefix -------------------------
+	@echo $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ))
+#	@echo A_SRC -------------------------
+#	@echo $(A_SRC)
+	@echo -------------------------
+
+	-@mkdir $(OUTPUT_PATH) 1>NUL 2>&1
+	@echo ------------------------------------------------------------------------------------
+
+$(addprefix $(OUTPUT_PATH)/,$(C_OBJ)): $(OUTPUT_PATH)/%.o: %.c
+	@echo Current folder is $(shell cd) - $@ $^
+#	@"$(CC)" -c $(CFLAGS) $< -o $@
+#	"$(CC)" -v -c $(CFLAGS) $< -o $@
+	"$(CC)" -c $(CFLAGS) $< -o $@ 
+
+$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp
+	@echo Current folder is $(shell cd) - $@ $^
+#	@"$(CXX)" -c $(CPPFLAGS) $< -o $@
+#	"$(CXX)" -v -c $(CPPFLAGS) $< -o $@
+	"$(CXX)" -c $(CPPFLAGS) $< -o $@
+
+$(OUTPUT_BIN): $(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(A_OBJ))
+	@"$(CC)" $(LIB_PATH) $(LDFLAGS) -T"$(VARIANT_PATH)/linker_scripts/gcc/flash.ld" -Wl,-Map,$(OUTPUT_PATH)/$@.map -o $(OUTPUT_PATH)/$@.elf $^ $(LIBS)
+	@"$(NM)" $(OUTPUT_PATH)/$@.elf >$(OUTPUT_PATH)/$@.elf.txt
+	@"$(OBJCOPY)" -O binary $(OUTPUT_PATH)/$@.elf $(OUTPUT_PATH)/$@.bin
+	$(SIZE) $^ $(OUTPUT_PATH)/$@.elf
+
+.PHONY: clean
+clean:
+	@echo ------------------------------------------------------------------------------------
+	@echo --- Cleaning test files for $(VARIANT)
+	-@$(RM) $(OUTPUT_PATH) 1>NUL 2>&1
+	@echo ------------------------------------------------------------------------------------
+
+#	-$(RM) $(OUTPUT_PATH)/test.o
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).elf
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).elf.txt
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).bin
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).map
+
+debug: test
+	@"$(GDB)" -x "$(VARIANT_PATH)/debug_scripts/gcc/$(VARIANT)_flash.gdb" -ex "reset" -readnow -se $(OUTPUT_PATH)/$(OUTPUT_BIN).elf
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/test_usb_device.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/test_usb_device.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_device/test_usb_device.cpp	(revision 136)
@@ -0,0 +1,77 @@
+/*
+  Copyright (c) 2012 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#define ARDUINO_MAIN
+#include "Arduino.h" 
+
+#ifdef HID_ENABLED
+	const int buttonPin = 4;          // input pin for pushbutton
+	int previousButtonState = HIGH;   // for checking the state of a pushButton
+	int counter = 0;                  // button push counter
+#endif
+
+void setup(void)
+{	
+#ifdef HID_ENABLED
+	Mouse.begin();
+
+	// make the pushButton pin an input:
+	pinMode(buttonPin, INPUT);
+	// initialize control over the keyboard:
+	Keyboard.begin();
+#endif
+
+#ifdef CDC_ENABLED
+	SerialUSB.begin(115200);
+#endif
+}
+
+
+void loop(void)
+{
+#ifdef HID_ENABLED
+	Mouse.move(1, 0, 0);
+
+	// read the pushbutton:
+	int buttonState = digitalRead(buttonPin);
+	// if the button state has changed, and it's currently pressed:
+	if ((buttonState != previousButtonState) && (buttonState == HIGH))
+	{
+		// increment the button counter
+		counter++;
+		// type out a message
+		Keyboard.print("You pressed the button ");
+		Keyboard.print(counter);
+		Keyboard.println(" times.");
+	}
+	// save the current button state for comparison next time:
+	previousButtonState = buttonState;
+#endif
+
+#ifdef CDC_ENABLED
+	if (SerialUSB.available() > 0)
+	{
+		char inChar;
+		while( -1 == (inChar = SerialUSB.read()));
+		SerialUSB.print(inChar);
+	}
+
+	delay(10);
+#endif
+}
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/Makefile
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/Makefile	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/Makefile	(revision 136)
@@ -0,0 +1,41 @@
+#
+#  Copyright (c) 2011 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+SUBMAKE_OPTIONS=--no-builtin-rules --no-builtin-variables
+
+#-------------------------------------------------------------------------------
+# Rules
+#-------------------------------------------------------------------------------
+
+all: test_usb_host
+
+.PHONY: test_usb_host
+test:
+	@echo --- Making test_usb_host
+	@$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f test_usb_host.mk
+
+.PHONY: clean
+clean:
+	@echo --- Cleaning test_usb_host
+	@$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f test_usb_host.mk $@
+
+.PHONY: debug
+debug:
+	@echo --- Debugging test_usb_host
+	@$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f test_usb_host.mk $@
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/debug.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/debug.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/debug.mk	(revision 136)
@@ -0,0 +1,25 @@
+#
+#  Copyright (c) 2011 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Optimization level
+# -O1 Optimize
+# -O2 Optimize even more
+# -O3 Optimize yet more
+# -O0 Reduce compilation time and make debugging produce the expected results
+# -Os Optimize for size
+OPTIMIZATION = -g -O0 -DDEBUG
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/gcc.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/gcc.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/gcc.mk	(revision 136)
@@ -0,0 +1,85 @@
+#
+#  Copyright (c) 2011 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Tool suffix when cross-compiling
+#CROSS_COMPILE = ../../../../tools/CodeSourcery_arm/bin/arm-none-eabi-
+#CROSS_COMPILE = C:/CodeSourcery_2011.03-42/bin/arm-none-eabi-
+CROSS_COMPILE = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-
+
+# Compilation tools
+AR = $(CROSS_COMPILE)ar
+CC = $(CROSS_COMPILE)gcc
+CXX = $(CROSS_COMPILE)g++
+AS = $(CROSS_COMPILE)as
+GDB = $(CROSS_COMPILE)gdb
+SIZE = $(CROSS_COMPILE)size
+NM = $(CROSS_COMPILE)nm
+OBJCOPY = $(CROSS_COMPILE)objcopy
+
+ifeq ($(OS),Windows_NT)
+RM=cs-rm -Rf
+else
+RM=rm -Rf
+endif
+
+SEP=\\
+
+# ---------------------------------------------------------------------------------------
+# C Flags
+
+CFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int
+CFLAGS += -Werror-implicit-function-declaration -Wmain -Wparentheses
+CFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
+CFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
+CFLAGS += -Wshadow -Wpointer-arith -Wbad-function-cast -Wwrite-strings
+CFLAGS += -Wsign-compare -Waggregate-return -Wstrict-prototypes
+CFLAGS += -Wmissing-prototypes -Wmissing-declarations
+CFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
+CFLAGS += -Wpacked -Wredundant-decls -Wnested-externs -Winline -Wlong-long
+CFLAGS += -Wunreachable-code
+CFLAGS += -Wcast-align
+
+CFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -nostdlib -std=c99
+CFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP) -D$(VARIANT)
+
+# To reduce application size use only integer printf function.
+CFLAGS += -Dprintf=iprintf
+
+# ---------------------------------------------------------------------------------------
+# CPP Flags
+
+CPPFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2
+CPPFLAGS += -Wmain -Wparentheses -Wcast-align -Wunreachable-code
+CPPFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
+CPPFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
+CPPFLAGS += -Wshadow -Wpointer-arith -Wwrite-strings
+CPPFLAGS += -Wsign-compare -Waggregate-return -Wmissing-declarations
+CPPFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
+CPPFLAGS += -Wpacked -Wredundant-decls -Winline -Wlong-long
+
+#-fno-rtti -fno-exceptions
+CPPFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -std=c++98
+CPPFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP)
+
+# To reduce application size use only integer printf function.
+CPPFLAGS += -Dprintf=iprintf
+
+# ---------------------------------------------------------------------------------------
+# ASM Flags
+
+ASFLAGS = -mcpu=cortex-m3 -mthumb -Wall -g $(OPTIMIZATION) $(INCLUDES)
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/release.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/release.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/release.mk	(revision 136)
@@ -0,0 +1,25 @@
+#
+#  Copyright (c) 2011 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Optimization level
+# -O1 Optimize
+# -O2 Optimize even more
+# -O3 Optimize yet more
+# -O0 Reduce compilation time and make debugging produce the expected results
+# -Os Optimize for size
+OPTIMIZATION = -Os
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/test_usb_host.mk
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/test_usb_host.mk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/build_gcc/test_usb_host.mk	(revision 136)
@@ -0,0 +1,218 @@
+#
+#  Copyright (c) 2011 Arduino.  All right reserved.
+#
+#  This library is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU Lesser General Public
+#  License as published by the Free Software Foundation; either
+#  version 2.1 of the License, or (at your option) any later version.
+#
+#  This library is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+#  See the GNU Lesser General Public License for more details.
+#
+#  You should have received a copy of the GNU Lesser General Public
+#  License along with this library; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+
+# Makefile for compiling libArduino
+.SUFFIXES: .o .a .c .s
+
+# putting default variant
+ifeq ("$(VARIANT)", "")
+#VARIANT=sam3s_ek
+#VARIANT=sam3u_ek
+VARIANT=arduino_due_x
+endif
+
+ifeq ("$(VARIANT)", "sam3s_ek")
+CHIP=__SAM3S4C__
+VARIANT_PATH = ../../../../atmel/sam/variants/$(VARIANT)
+else ifeq ("$(VARIANT)", "sam3u_ek")
+CHIP=__SAM3U4E__
+VARIANT_PATH = ../../../../atmel/sam/variants/$(VARIANT)
+else ifeq ("$(VARIANT)", "sam3x_ek")
+CHIP=__SAM3X8H__
+VARIANT_PATH = ../../../../atmel/sam/variants/$(VARIANT)
+else ifeq ("$(VARIANT)", "arduino_due_u")
+CHIP=__SAM3U4E__
+VARIANT_PATH = ../../../../variants/$(VARIANT)
+else ifeq ("$(VARIANT)", "arduino_due_x")
+CHIP=__SAM3X8E__
+VARIANT_PATH = ../../../../variants/$(VARIANT)
+endif
+
+TOOLCHAIN=gcc
+
+#-------------------------------------------------------------------------------
+# Path
+#-------------------------------------------------------------------------------
+
+# Libraries
+PROJECT_BASE_PATH = ./..
+SYSTEM_PATH = ../../../../system
+
+ifeq ($(CHIP), __SAM3S4C__)
+CHIP_NAME=sam3s4c
+CHIP_SERIE=sam3s
+else ifeq ($(CHIP), __SAM3U4E__)
+CHIP_NAME=sam3u4e
+CHIP_SERIE=sam3u
+else ifeq ($(CHIP), __SAM3N4C__)
+CHIP_NAME=sam3n4c
+CHIP_SERIE=sam3n
+else ifeq ($(CHIP), __SAM3X8H__)
+CHIP_NAME=sam3x8h
+CHIP_SERIE=sam3xa
+else ifeq ($(CHIP), __SAM3X8E__)
+CHIP_NAME=sam3x8e
+CHIP_SERIE=sam3xa
+else
+endif
+
+CMSIS_ROOT_PATH = $(SYSTEM_PATH)/CMSIS
+CMSIS_ARM_PATH=$(CMSIS_ROOT_PATH)/CMSIS/Include
+CMSIS_ATMEL_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL
+CMSIS_CHIP_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL/$(CHIP_SERIE)
+
+ARDUINO_CORE_PATH=$(PROJECT_BASE_PATH)/..
+ARDUINO_USB_PATH=$(PROJECT_BASE_PATH)/../USB
+ARDUINO_USB_HOST_PATH=$(PROJECT_BASE_PATH)/../../../system/USBHost
+
+# Output directories
+OUTPUT_PATH = debug_$(VARIANT)
+
+#-------------------------------------------------------------------------------
+# Files
+#-------------------------------------------------------------------------------
+
+vpath %.h $(PROJECT_BASE_PATH)/.. $(VARIANT_PATH) $(SYSTEM_PATH) $(CMSIS_ARM_PATH)
+vpath %.cpp $(PROJECT_BASE_PATH)
+
+VPATH+=$(PROJECT_BASE_PATH)
+
+INCLUDES = -I$(PROJECT_BASE_PATH)/..
+INCLUDES += -I$(VARIANT_PATH)
+#INCLUDES += -I$(VARIANT_PATH)/..
+#INCLUDES += -I$(SYSTEM_PATH)
+INCLUDES += -I$(SYSTEM_PATH)/libsam
+INCLUDES += -I$(CMSIS_ARM_PATH)
+INCLUDES += -I$(CMSIS_ATMEL_PATH)
+INCLUDES += -I$(CMSIS_CHIP_PATH)
+INCLUDES += -I$(ARDUINO_USB_PATH)
+INCLUDES += -I$(ARDUINO_USB_HOST_PATH)
+
+#-------------------------------------------------------------------------------
+ifdef DEBUG
+include debug.mk
+else
+include release.mk
+endif
+
+#-------------------------------------------------------------------------------
+# Tools
+#-------------------------------------------------------------------------------
+
+include $(TOOLCHAIN).mk
+
+#-------------------------------------------------------------------------------
+ifdef DEBUG
+OUTPUT_OBJ=debug
+LIBS_POSTFIX=dbg
+else
+OUTPUT_OBJ=release
+LIBS_POSTFIX=rel
+endif
+
+OUTPUT_BIN=test_$(TOOLCHAIN)_$(LIBS_POSTFIX)
+LIBS=-Wl,--start-group -lgcc -lc -lstdc++ -lsam_$(CHIP_NAME)_$(TOOLCHAIN)_$(LIBS_POSTFIX) -larduino_$(VARIANT)_$(TOOLCHAIN)_$(LIBS_POSTFIX) -lvariant_$(VARIANT)_$(TOOLCHAIN)_$(LIBS_POSTFIX) -Wl,--end-group
+
+LIB_PATH =-L$(PROJECT_BASE_PATH)/..
+LIB_PATH+=-L=/lib/thumb2
+#LIB_PATH+=-L=/../lib/gcc/arm-none-eabi/4.5.2/thumb2
+
+LDFLAGS= -mcpu=cortex-m3 -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols
+
+#-------------------------------------------------------------------------------
+# CPP source files and objects
+#-------------------------------------------------------------------------------
+CPP_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.cpp)
+
+CPP_OBJ_TEMP = $(patsubst %.cpp, %.o, $(notdir $(CPP_SRC)))
+
+# during development, remove some files
+CPP_OBJ_FILTER=
+
+CPP_OBJ=$(filter-out $(CPP_OBJ_FILTER), $(CPP_OBJ_TEMP))
+
+#-------------------------------------------------------------------------------
+# Rules
+#-------------------------------------------------------------------------------
+all: test
+
+test: create_output libsam_$(CHIP_NAME)_$(TOOLCHAIN)_$(LIBS_POSTFIX).a libarduino_$(VARIANT)_$(TOOLCHAIN)_$(LIBS_POSTFIX).a libvariant_$(VARIANT)_$(TOOLCHAIN)_$(LIBS_POSTFIX).a $(OUTPUT_BIN)
+
+
+.PHONY: create_output
+create_output:
+	@echo --- Preparing $(VARIANT) files in $(OUTPUT_PATH) $(OUTPUT_BIN)
+#	@echo -------------------------
+#	@echo *$(INCLUDES)
+#	@echo -------------------------
+#	@echo *$(C_SRC)
+#	@echo -------------------------
+#	@echo *$(C_OBJ)
+#	@echo -------------------------
+#	@echo *$(addprefix $(OUTPUT_PATH)/, $(C_OBJ))
+#	@echo -------------------------
+#	@echo *$(CPP_SRC)
+#	@echo -------------------------
+#	@echo *$(CPP_OBJ)
+#	@echo -------------------------
+#	@echo *$(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ))
+#	@echo -------------------------
+#	@echo *$(A_SRC)
+#	@echo -------------------------
+
+	-@mkdir $(OUTPUT_PATH) 1>NUL 2>&1
+
+$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp
+#	@"$(CC)" -c $(CPPFLAGS) $< -o $@
+	@"$(CXX)" -c $(CPPFLAGS) $< -o $@
+#	@"$(CXX)" -v -c $(CPPFLAGS) $< -o $@
+
+$(OUTPUT_BIN): $(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(A_OBJ))
+	@"$(CC)" $(LIB_PATH) $(LDFLAGS) -T"$(VARIANT_PATH)/linker_scripts/gcc/flash.ld" -Wl,-Map,$(OUTPUT_PATH)/$@.map -o $(OUTPUT_PATH)/$@.elf $^ $(LIBS)
+#	@"$(CC)" $(LIB_PATH) $(LDFLAGS) -T"$(VARIANT_PATH)/linker_scripts/gcc/sram.ld" -Wl,-Map,$(OUTPUT_PATH)/$@.map -o $(OUTPUT_PATH)/$@.elf $^ $(LIBS)
+	@"$(NM)" $(OUTPUT_PATH)/$@.elf >$(OUTPUT_PATH)/$@.elf.txt
+	@"$(OBJCOPY)" -O binary $(OUTPUT_PATH)/$@.elf $(OUTPUT_PATH)/$@.bin
+	$(SIZE) $^ $(OUTPUT_PATH)/$@.elf
+
+.PHONY: clean
+clean:
+	@echo --- Cleaning test files
+	-@$(RM) $(OUTPUT_PATH) 1>NUL 2>&1
+
+#	-$(RM) $(OUTPUT_PATH)/test.o
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).elf
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).elf.txt
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).bin
+#	-$(RM) $(OUTPUT_PATH)/$(OUTPUT_BIN).map
+
+debug: test
+	@"$(GDB)" -x "$(VARIANT_PATH)/debug_scripts/gcc/$(VARIANT)_flash.gdb" -ex "reset" -readnow -se $(OUTPUT_PATH)/$(OUTPUT_BIN).elf
+#	@"$(GDB)" -w -x "$(VARIANT_PATH)/debug_scripts/gcc/$(VARIANT)_sram.gdb" -ex "reset" -readnow -se $(OUTPUT_PATH)/$(OUTPUT_BIN).elf
+
+libsam_$(CHIP_NAME)_$(TOOLCHAIN)_$(LIBS_POSTFIX).a:
+	@echo Building $@
+	@$(MAKE) -C $(SYSTEM_PATH)/libsam/build_gcc -f Makefile $@
+
+libarduino_$(VARIANT)_$(TOOLCHAIN)_$(LIBS_POSTFIX).a:
+	@echo Building $@
+	$(MAKE) -C $(ARDUINO_CORE_PATH)/build_gcc -f Makefile $(VARIANT)
+
+libvariant_$(VARIANT)_$(TOOLCHAIN)_$(LIBS_POSTFIX).a:
+	@echo Building $@
+	$(MAKE) -C $(VARIANT_PATH)/build_gcc -f Makefile $(VARIANT)
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/test_usb_host.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/test_usb_host.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/cores/validation/validation_usb_host/test_usb_host.cpp	(revision 136)
@@ -0,0 +1,54 @@
+#include "variant.h"
+#include <stdio.h>
+#include <adk.h>
+
+// Accessory descriptor. It's how Arduino identifies itself to Android.
+char applicationName[] = "Arduino_Terminal"; // the app on your phone
+char accessoryName[] = "Arduino Due X"; // your Arduino board
+char companyName[] = "Arduino SA";
+
+// Make up anything you want for these
+char versionNumber[] = "1.0";
+char serialNumber[] = "1";
+char url[] = "http://labs.arduino.cc/uploads/ADK/ArduinoTerminal/ThibaultTerminal_ICS_0001.apk";
+
+USBHost Usb;
+ADK adk(&Usb, companyName, applicationName, accessoryName,versionNumber,url,serialNumber);
+
+void setup()
+{
+	cpu_irq_enable();
+	printf("\r\nADK demo start\r\n");
+	delay(200);
+}
+
+#define RCVSIZE 128
+
+void loop()
+{
+	uint8_t buf[RCVSIZE];
+	uint32_t nbread = 0;
+	char helloworld[] = "Hello World!\r\n";
+
+	Usb.Task();
+
+	if (adk.isReady())
+	{
+		/* Write hello string to ADK */
+		adk.write(strlen(helloworld), (uint8_t *)helloworld);
+
+		delay(1000);
+
+		/* Read data from ADK and print to UART */
+		adk.read(&nbread, RCVSIZE, buf);
+		if (nbread > 0)
+		{
+			printf("RCV: ");
+			for (uint32_t i = 0; i < nbread; ++i)
+			{
+				printf("%c", (char)buf[i]);
+			}
+			printf("\r\n");
+		}
+	}
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/SPI.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/SPI.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/SPI.cpp	(revision 136)
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2010 by Cristian Maglie <c.maglie@bug.st>
+ * SPI Master library for arduino.
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of either the GNU General Public License version 2
+ * or the GNU Lesser General Public License version 2.1, both as
+ * published by the Free Software Foundation.
+ */
+
+#include "SPI.h"
+#include "wiring_digital.h"
+#include "assert.h"
+#include "variant.h"
+
+SPIClass::SPIClass(SERCOM *p_sercom, uint8_t uc_pinMISO, uint8_t uc_pinSCK, uint8_t uc_pinMOSI)
+{
+	assert(p_sercom != NULL );
+	_p_sercom = p_sercom;
+
+  _uc_pinMiso = uc_pinMISO;
+  _uc_pinSCK = uc_pinSCK;
+  _uc_pinMosi = uc_pinMOSI;
+}
+
+void SPIClass::begin()
+{
+  // PIO init
+  pinPeripheral(_uc_pinMiso, g_APinDescription[_uc_pinMiso].ulPinType);
+  pinPeripheral(_uc_pinSCK, g_APinDescription[_uc_pinSCK].ulPinType);
+  pinPeripheral(_uc_pinMosi, g_APinDescription[_uc_pinMosi].ulPinType);
+
+	// Default speed set to 4Mhz, SPI mode set to MODE 0 and Bit order set to MSB first.
+	_p_sercom->initSPI(SPI_PAD_2_SCK_3, SERCOM_RX_PAD_0, SPI_CHAR_SIZE_8_BITS, MSB_FIRST);
+	_p_sercom->initSPIClock(SERCOM_SPI_MODE_0, 4000000);
+	
+	_p_sercom->enableSPI();
+}
+
+void SPIClass::end()
+{
+	_p_sercom->resetSPI();
+}
+
+void SPIClass::setBitOrder(BitOrder order)
+{
+	if(order == LSBFIRST)
+		_p_sercom->setDataOrderSPI(LSB_FIRST);
+	else
+		_p_sercom->setDataOrderSPI(MSB_FIRST);
+}
+
+void SPIClass::setDataMode(uint8_t mode)
+{
+	switch(mode)
+	{
+		case SPI_MODE0:
+			_p_sercom->setClockModeSPI(SERCOM_SPI_MODE_0);
+			break;
+			
+		case SPI_MODE1:
+			_p_sercom->setClockModeSPI(SERCOM_SPI_MODE_1);
+			break;
+			
+		case SPI_MODE2:
+			_p_sercom->setClockModeSPI(SERCOM_SPI_MODE_2);
+			break;
+			
+		case SPI_MODE3:
+			_p_sercom->setClockModeSPI(SERCOM_SPI_MODE_3);
+			break;
+		
+		default:
+			break;
+	}
+}
+
+void SPIClass::setClockDivider(uint8_t div)
+{
+	_p_sercom->setBaudrateSPI(div);
+}
+
+byte SPIClass::transfer(uint8_t data)
+{
+	//Writing the data
+	_p_sercom->writeDataSPI(data);
+	
+	//Read data
+	return _p_sercom->readDataSPI();
+}
+
+void SPIClass::attachInterrupt() {
+	// Should be enableInterrupt()
+}
+
+void SPIClass::detachInterrupt() {
+	// Should be disableInterrupt()
+}
+
+SPIClass SPI(&sercom4, 18, 20, 21);
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/SPI.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/SPI.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/SPI.h	(revision 136)
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2010 by Cristian Maglie <c.maglie@bug.st>
+ * SPI Master library for arduino.
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of either the GNU General Public License version 2
+ * or the GNU Lesser General Public License version 2.1, both as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _SPI_H_INCLUDED
+#define _SPI_H_INCLUDED
+
+#include "variant.h"
+#include "wiring_constants.h"
+
+#define SPI_MODE0 0x02
+#define SPI_MODE1 0x00
+#define SPI_MODE2 0x03
+#define SPI_MODE3 0x01
+
+class SPIClass {
+  public:
+	SPIClass(SERCOM *p_sercom, uint8_t uc_pinMISO, uint8_t uc_pinSCK, uint8_t uc_pinMOSI);
+
+	byte transfer(uint8_t data);
+
+	// SPI Configuration methods
+	void attachInterrupt();
+	void detachInterrupt();
+
+	void begin();
+	void end();
+	
+	void setBitOrder(BitOrder order);
+	void setDataMode(uint8_t uc_mode);
+	void setClockDivider(uint8_t uc_div);
+
+  private:
+	SERCOM *_p_sercom;
+	uint8_t _uc_pinMiso;
+	uint8_t _uc_pinMosi;
+	uint8_t _uc_pinSCK;
+};
+
+#if SPI_INTERFACES_COUNT > 0
+  extern SPIClass SPI;
+#endif
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/examples/BarometricPressureSensor/BarometricPressureSensor.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/examples/BarometricPressureSensor/BarometricPressureSensor.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/examples/BarometricPressureSensor/BarometricPressureSensor.ino	(revision 136)
@@ -0,0 +1,143 @@
+/*
+ SCP1000 Barometric Pressure Sensor Display
+
+ Shows the output of a Barometric Pressure Sensor on a
+ Uses the SPI library. For details on the sensor, see:
+ http://www.sparkfun.com/commerce/product_info.php?products_id=8161
+ http://www.vti.fi/en/support/obsolete_products/pressure_sensors/
+
+ This sketch adapted from Nathan Seidle's SCP1000 example for PIC:
+ http://www.sparkfun.com/datasheets/Sensors/SCP1000-Testing.zip
+
+ Circuit:
+ SCP1000 sensor attached to pins 6, 7, 10 - 13:
+ DRDY: pin 6
+ CSB: pin 7
+ MOSI: pin 11
+ MISO: pin 12
+ SCK: pin 13
+
+ created 31 July 2010
+ modified 14 August 2010
+ by Tom Igoe
+ */
+
+// the sensor communicates using SPI, so include the library:
+#include <SPI.h>
+
+//Sensor's memory register addresses:
+const int PRESSURE = 0x1F;      //3 most significant bits of pressure
+const int PRESSURE_LSB = 0x20;  //16 least significant bits of pressure
+const int TEMPERATURE = 0x21;   //16 bit temperature reading
+const byte READ = 0b11111100;     // SCP1000's read command
+const byte WRITE = 0b00000010;   // SCP1000's write command
+
+// pins used for the connection with the sensor
+// the other you need are controlled by the SPI library):
+const int dataReadyPin = 6;
+const int chipSelectPin = 7;
+
+void setup() {
+  Serial.begin(9600);
+
+  // start the SPI library:
+  SPI.begin();
+
+  // initalize the  data ready and chip select pins:
+  pinMode(dataReadyPin, INPUT);
+  pinMode(chipSelectPin, OUTPUT);
+
+  //Configure SCP1000 for low noise configuration:
+  writeRegister(0x02, 0x2D);
+  writeRegister(0x01, 0x03);
+  writeRegister(0x03, 0x02);
+  // give the sensor time to set up:
+  delay(100);
+}
+
+void loop() {
+  //Select High Resolution Mode
+  writeRegister(0x03, 0x0A);
+
+  // don't do anything until the data ready pin is high:
+  if (digitalRead(dataReadyPin) == HIGH) {
+    //Read the temperature data
+    int tempData = readRegister(0x21, 2);
+
+    // convert the temperature to celsius and display it:
+    float realTemp = (float)tempData / 20.0;
+    Serial.print("Temp[C]=");
+    Serial.print(realTemp);
+
+
+    //Read the pressure data highest 3 bits:
+    byte  pressure_data_high = readRegister(0x1F, 1);
+    pressure_data_high &= 0b00000111; //you only needs bits 2 to 0
+
+    //Read the pressure data lower 16 bits:
+    unsigned int pressure_data_low = readRegister(0x20, 2);
+    //combine the two parts into one 19-bit number:
+    long pressure = ((pressure_data_high << 16) | pressure_data_low) / 4;
+
+    // display the temperature:
+    Serial.println("\tPressure [Pa]=" + String(pressure));
+  }
+}
+
+//Read from or write to register from the SCP1000:
+unsigned int readRegister(byte thisRegister, int bytesToRead ) {
+  byte inByte = 0;           // incoming byte from the SPI
+  unsigned int result = 0;   // result to return
+  Serial.print(thisRegister, BIN);
+  Serial.print("\t");
+  // SCP1000 expects the register name in the upper 6 bits
+  // of the byte. So shift the bits left by two bits:
+  thisRegister = thisRegister << 2;
+  // now combine the address and the command into one byte
+  byte dataToSend = thisRegister & READ;
+  Serial.println(thisRegister, BIN);
+  // take the chip select low to select the device:
+  digitalWrite(chipSelectPin, LOW);
+  // send the device the register you want to read:
+  SPI.transfer(dataToSend);
+  // send a value of 0 to read the first byte returned:
+  result = SPI.transfer(0x00);
+  // decrement the number of bytes left to read:
+  bytesToRead--;
+  // if you still have another byte to read:
+  if (bytesToRead > 0) {
+    // shift the first byte left, then get the second byte:
+    result = result << 8;
+    inByte = SPI.transfer(0x00);
+    // combine the byte you just got with the previous one:
+    result = result | inByte;
+    // decrement the number of bytes left to read:
+    bytesToRead--;
+  }
+  // take the chip select high to de-select:
+  digitalWrite(chipSelectPin, HIGH);
+  // return the result:
+  return(result);
+}
+
+
+//Sends a write command to SCP1000
+
+void writeRegister(byte thisRegister, byte thisValue) {
+
+  // SCP1000 expects the register address in the upper 6 bits
+  // of the byte. So shift the bits left by two bits:
+  thisRegister = thisRegister << 2;
+  // now combine the register address and the command into one byte:
+  byte dataToSend = thisRegister | WRITE;
+
+  // take the chip select low to select the device:
+  digitalWrite(chipSelectPin, LOW);
+
+  SPI.transfer(dataToSend); //Send register location
+  SPI.transfer(thisValue);  //Send value to record into register
+
+  // take the chip select high to de-select:
+  digitalWrite(chipSelectPin, HIGH);
+}
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/examples/DigitalPotControl/DigitalPotControl.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/examples/DigitalPotControl/DigitalPotControl.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/examples/DigitalPotControl/DigitalPotControl.ino	(revision 136)
@@ -0,0 +1,71 @@
+/*
+  Digital Pot Control
+
+  This example controls an Analog Devices AD5206 digital potentiometer.
+  The AD5206 has 6 potentiometer channels. Each channel's pins are labeled
+  A - connect this to voltage
+  W - this is the pot's wiper, which changes when you set it
+  B - connect this to ground.
+
+ The AD5206 is SPI-compatible,and to command it, you send two bytes,
+ one with the channel number (0 - 5) and one with the resistance value for the
+ channel (0 - 255).
+
+ The circuit:
+  * All A pins  of AD5206 connected to +5V
+  * All B pins of AD5206 connected to ground
+  * An LED and a 220-ohm resisor in series connected from each W pin to ground
+  * CS - to digital pin 10  (SS pin)
+  * SDI - to digital pin 11 (MOSI pin)
+  * CLK - to digital pin 13 (SCK pin)
+
+ created 10 Aug 2010
+ by Tom Igoe
+
+ Thanks to Heather Dewey-Hagborg for the original tutorial, 2005
+
+*/
+
+
+// inslude the SPI library:
+#include <SPI.h>
+
+
+// set pin 10 as the slave select for the digital pot:
+const int slaveSelectPin = 10;
+
+void setup() {
+  // set the slaveSelectPin as an output:
+  pinMode (slaveSelectPin, OUTPUT);
+  // initialize SPI:
+  SPI.begin();
+}
+
+void loop() {
+  // go through the six channels of the digital pot:
+  for (int channel = 0; channel < 6; channel++) {
+    // change the resistance on this channel from min to max:
+    for (int level = 0; level < 255; level++) {
+      digitalPotWrite(channel, level);
+      delay(10);
+    }
+    // wait a second at the top:
+    delay(100);
+    // change the resistance on this channel from max to min:
+    for (int level = 0; level < 255; level++) {
+      digitalPotWrite(channel, 255 - level);
+      delay(10);
+    }
+  }
+
+}
+
+void digitalPotWrite(int address, int value) {
+  // take the SS pin low to select the chip:
+  digitalWrite(slaveSelectPin, LOW);
+  //  send in the address and value via SPI:
+  SPI.transfer(address);
+  SPI.transfer(value);
+  // take the SS pin high to de-select the chip:
+  digitalWrite(slaveSelectPin, HIGH);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/SPI/keywords.txt	(revision 136)
@@ -0,0 +1,31 @@
+#######################################
+# Syntax Coloring Map SPI
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+SPI	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+begin			KEYWORD2
+end				KEYWORD2
+transfer		KEYWORD2
+#setBitOrder	KEYWORD2
+setDataMode		KEYWORD2
+setClockDivider	KEYWORD2
+
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+SPI_MODE0		LITERAL1
+SPI_MODE1		LITERAL1
+SPI_MODE2		LITERAL1
+SPI_MODE3		LITERAL1
+
+SPI_CONTINUE	LITERAL1
+SPI_LAST		LITERAL1
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/Wire.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/Wire.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/Wire.cpp	(revision 136)
@@ -0,0 +1,357 @@
+/*
+ * TwoWire.h - TWI/I2C library for Arduino Zero
+ * based on Copyright (c) 2011 Cristian Maglie <c.maglie@bug.st>.
+ * Copyright (c) 2014 Arduino.
+ * All rights reserved.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+extern "C" {
+#include <string.h>
+}
+
+#include "Wire.h"
+#include "variant.h"
+#include "wiring_digital.h"
+
+TwoWire::TwoWire(SERCOM * s)
+{
+	this->sercom = s;
+	transmissionBegun = false;
+}
+
+void TwoWire::begin(void) {
+	//Master Mode
+	sercom->initMasterWIRE(TWI_CLOCK);
+	sercom->enableWIRE();
+
+  pinPeripheral(PIN_WIRE_SDA, g_APinDescription[PIN_WIRE_SDA].ulPinType);
+  pinPeripheral(PIN_WIRE_SCL, g_APinDescription[PIN_WIRE_SCL].ulPinType);
+}
+
+void TwoWire::begin(uint8_t address) {
+	//Slave mode
+	sercom->initSlaveWIRE(address);
+	sercom->enableWIRE();
+}
+
+uint8_t TwoWire::requestFrom(uint8_t address, size_t quantity, bool stopBit)
+{ 
+  if(quantity == 0)
+  {
+    return 0;
+  }
+
+
+  size_t byteRead = 0;
+
+  if(sercom->startTransmissionWIRE(address, WIRE_READ_FLAG))
+  {
+  
+    // Read first data
+    rxBuffer.store_char(sercom->readDataWIRE());
+
+    // Connected to slave
+    //while(toRead--)
+    for(byteRead = 0; byteRead < quantity; ++byteRead)
+    {
+      if( byteRead == quantity - 1)  // Stop transmission
+      {
+        sercom->prepareNackBitWIRE(); // Prepare NACK to stop slave transmission
+        //sercom->readDataWIRE(); // Clear data register to send NACK
+        sercom->prepareCommandBitsWire(WIRE_MASTER_ACT_STOP); // Send Stop 
+      }
+      else // Continue transmission
+      {
+        sercom->prepareAckBitWIRE();  // Prepare Acknowledge
+        sercom->prepareCommandBitsWire(WIRE_MASTER_ACT_READ); // Prepare the ACK command for the slave
+        rxBuffer.store_char( sercom->readDataWIRE() );  // Read data and send the ACK
+      }
+    }
+  }
+
+  return byteRead;
+}
+
+uint8_t TwoWire::requestFrom(uint8_t address, size_t quantity)
+{
+	return requestFrom(address, quantity, true);
+}
+
+void TwoWire::beginTransmission(uint8_t address) {
+	// save address of target and clear buffer
+	txAddress = address;
+	txBuffer.clear();
+
+	transmissionBegun = true;
+}
+
+// Errors:
+//	0 : Success
+//	1 : Data too long
+//	2 : NACK on transmit of address
+//	3 : NACK on transmit of data
+//	4 : Other error
+uint8_t TwoWire::endTransmission(bool stopBit)
+{
+	transmissionBegun = false ;
+
+	// Check if there are data to send
+	if ( txBuffer.available() == 0)
+  {
+		return 4 ;
+  }
+
+	// Start I2C transmission
+	if ( !sercom->startTransmissionWIRE( txAddress, WIRE_WRITE_FLAG ) )
+  {
+    sercom->prepareCommandBitsWire(WIRE_MASTER_ACT_STOP);
+		return 2 ;	// Address error
+  }
+
+	// Send all buffer
+	while( txBuffer.available() )
+	{
+
+		// Trying to send data
+		if ( !sercom->sendDataMasterWIRE( txBuffer.read_char() ) )
+    {
+      sercom->prepareCommandBitsWire(WIRE_MASTER_ACT_STOP);
+			return 3 ;	// Nack or error
+    }
+
+    
+    if(txBuffer.available() == 0)
+    {
+      sercom->prepareCommandBitsWire(WIRE_MASTER_ACT_STOP);
+    }
+	}
+
+	return 0;
+}
+
+uint8_t TwoWire::endTransmission()
+{
+	return endTransmission(true);
+}
+
+size_t TwoWire::write(uint8_t ucData)
+{
+	if(sercom->isMasterWIRE())
+	{
+		// No writing, without begun transmission or a full buffer
+		if ( !transmissionBegun || txBuffer.isFull() )
+    {
+      return 0 ;
+    }
+
+		txBuffer.store_char( ucData ) ;
+
+		return 1 ;
+	}
+	else
+	{
+		if(sercom->sendDataSlaveWIRE( ucData ))
+    {
+			return 1;
+    }
+	}
+
+	return 0;
+}
+
+size_t TwoWire::write(const uint8_t *data, size_t quantity)
+{
+	//Try to store all data
+	for(size_t i = 0; i < quantity; ++i)
+	{
+		//Return the number of data stored, when the buffer is full (if write return 0)
+		if(!write(data[i]))
+			return i;
+	}
+
+	//All data stored
+	return quantity;
+}
+
+int TwoWire::available(void)
+{
+	return rxBuffer.available();
+}
+
+int TwoWire::read(void)
+{
+	return rxBuffer.read_char();
+}
+
+int TwoWire::peek(void)
+{
+	return rxBuffer.peek();
+}
+
+void TwoWire::flush(void)
+{
+	// Do nothing, use endTransmission(..) to force
+	// data transfer.
+}
+
+void TwoWire::onReceive(void(*function)(int))
+{
+	onReceiveCallback = function;
+}
+
+void TwoWire::onRequest(void(*function)(void))
+{
+	onRequestCallback = function;
+}
+
+
+void TwoWire::onService(void)
+{
+	if ( sercom->isSlaveWIRE() )
+	{
+		//Received data
+		if(sercom->isDataReadyWIRE())
+		{
+			//Store data
+			rxBuffer.store_char(sercom->readDataWIRE());
+
+			//Stop or Restart detected
+			if(sercom->isStopDetectedWIRE() || sercom->isRestartDetectedWIRE())
+			{
+				//Calling onReceiveCallback, if exists
+				if(onReceiveCallback)
+				{
+					onReceiveCallback(available());
+				}
+			}
+		}
+
+		//Address Match
+		if(sercom->isAddressMatch())
+		{
+			//Is a request ?
+			if(sercom->isMasterReadOperationWIRE())
+			{
+				//Calling onRequestCallback, if exists
+				if(onRequestCallback)
+				{
+					onRequestCallback();
+				}
+			}
+		}
+	}
+}
+
+/*
+void TwoWire::onService(void)
+{
+	// Retrieve interrupt status
+	uint32_t sr = TWI_GetStatus(twi);
+
+	if (status == SLAVE_IDLE && TWI_STATUS_SVACC(sr)) {
+		TWI_DisableIt(twi, TWI_IDR_SVACC);
+		TWI_EnableIt(twi, TWI_IER_RXRDY | TWI_IER_GACC | TWI_IER_NACK
+				| TWI_IER_EOSACC | TWI_IER_SCL_WS | TWI_IER_TXCOMP);
+
+		srvBufferLength = 0;
+		srvBufferIndex = 0;
+
+		// Detect if we should go into RECV or SEND status
+		// SVREAD==1 means *master* reading -> SLAVE_SEND
+		if (!TWI_STATUS_SVREAD(sr)) {
+			status = SLAVE_RECV;
+		} else {
+			status = SLAVE_SEND;
+
+			// Alert calling program to generate a response ASAP
+			if (onRequestCallback)
+				onRequestCallback();
+			else
+				// create a default 1-byte response
+				write((uint8_t) 0);
+		}
+	}
+
+	if (status != SLAVE_IDLE) {
+		if (TWI_STATUS_TXCOMP(sr) && TWI_STATUS_EOSACC(sr)) {
+			if (status == SLAVE_RECV && onReceiveCallback) {
+				// Copy data into rxBuffer
+				// (allows to receive another packet while the
+				// user program reads actual data)
+				for (uint8_t i = 0; i < srvBufferLength; ++i)
+					rxBuffer[i] = srvBuffer[i];
+				rxBufferIndex = 0;
+				rxBufferLength = srvBufferLength;
+
+				// Alert calling program
+				onReceiveCallback( rxBufferLength);
+			}
+
+			// Transfer completed
+			TWI_EnableIt(twi, TWI_SR_SVACC);
+			TWI_DisableIt(twi, TWI_IDR_RXRDY | TWI_IDR_GACC | TWI_IDR_NACK
+					| TWI_IDR_EOSACC | TWI_IDR_SCL_WS | TWI_IER_TXCOMP);
+			status = SLAVE_IDLE;
+		}
+	}
+
+	if (status == SLAVE_RECV) {
+		if (TWI_STATUS_RXRDY(sr)) {
+			if (srvBufferLength < BUFFER_LENGTH)
+				srvBuffer[srvBufferLength++] = TWI_ReadByte(twi);
+		}
+	}
+
+	if (status == SLAVE_SEND) {
+		if (TWI_STATUS_TXRDY(sr) && !TWI_STATUS_NACK(sr)) {
+			uint8_t c = 'x';
+			if (srvBufferIndex < srvBufferLength)
+				c = srvBuffer[srvBufferIndex++];
+			TWI_WriteByte(twi, c);
+		}
+	}
+}
+*/
+
+#if WIRE_INTERFACES_COUNT > 0
+/*static void Wire_Init(void) {
+	pmc_enable_periph_clk(WIRE_INTERFACE_ID);
+	PIO_Configure(
+			g_APinDescription[PIN_WIRE_SDA].pPort,
+			g_APinDescription[PIN_WIRE_SDA].ulPinType,
+			g_APinDescription[PIN_WIRE_SDA].ulPin,
+			g_APinDescription[PIN_WIRE_SDA].ulPinConfiguration);
+	PIO_Configure(
+			g_APinDescription[PIN_WIRE_SCL].pPort,
+			g_APinDescription[PIN_WIRE_SCL].ulPinType,
+			g_APinDescription[PIN_WIRE_SCL].ulPin,
+			g_APinDescription[PIN_WIRE_SCL].ulPinConfiguration);
+
+	NVIC_DisableIRQ(WIRE_ISR_ID);
+	NVIC_ClearPendingIRQ(WIRE_ISR_ID);
+	NVIC_SetPriority(WIRE_ISR_ID, 0);
+	NVIC_EnableIRQ(WIRE_ISR_ID);
+}*/
+
+
+TwoWire Wire(&sercom3);
+
+void SERCOM3_Handler(void) {
+	Wire.onService();
+}
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/Wire.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/Wire.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/Wire.h	(revision 136)
@@ -0,0 +1,107 @@
+/*
+ * TwoWire.h - TWI/I2C library for Arduino Due
+ * Copyright (c) 2011 Cristian Maglie <c.maglie@bug.st>.
+ * All rights reserved.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#ifndef TwoWire_h
+#define TwoWire_h
+
+//#include <include/twi.h>
+
+#include "Stream.h"
+#include "variant.h"
+
+#include "SERCOM.h"
+#include "RingBuffer.h"
+
+#define BUFFER_LENGTH 32
+
+
+class TwoWire : public Stream
+{
+	public:
+		TwoWire(SERCOM *s);
+		void begin();
+		void begin(uint8_t);
+
+		void beginTransmission(uint8_t);
+		uint8_t endTransmission(bool stopBit);
+		uint8_t endTransmission(void);
+
+		uint8_t requestFrom(uint8_t address, size_t quantity, bool stopBit);
+		uint8_t requestFrom(uint8_t address, size_t quantity);
+
+		size_t write(uint8_t data);
+		size_t write(const uint8_t * data, size_t quantity);
+
+		virtual int available(void);
+		virtual int read(void);
+		virtual int peek(void);
+		virtual void flush(void);
+		void onReceive(void(*)(int));
+		void onRequest(void(*)(void));
+
+		using Print::write;
+
+		void onService(void);
+
+	private:
+		SERCOM * sercom;
+		bool transmissionBegun;
+
+		// RX Buffer
+		RingBuffer rxBuffer;
+
+		//TX buffer
+		RingBuffer txBuffer;
+		uint8_t txAddress;
+
+
+		// Service buffer
+		//uint8_t srvBuffer[BUFFER_LENGTH];
+		//uint8_t srvBufferIndex;
+		//uint8_t srvBufferLength;
+
+		// Callback user functions
+		void (*onRequestCallback)(void);
+		void (*onReceiveCallback)(int);
+
+		// TWI state
+		//enum TwoWireStatus
+    //{
+		//	UNINITIALIZED,
+		//	MASTER_IDLE,
+		//	MASTER_SEND,
+		//	MASTER_RECV,
+		//	SLAVE_IDLE,
+		//	SLAVE_RECV,
+		//	SLAVE_SEND
+		//};
+		//TwoWireStatus status;
+
+		// TWI clock frequency
+		static const uint32_t TWI_CLOCK = 100000;
+
+		// Timeouts
+		//static const uint32_t RECV_TIMEOUT = 100000;
+		//static const uint32_t XMIT_TIMEOUT = 100000;
+};
+
+extern TwoWire Wire;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/SFRRanger_reader/SFRRanger_reader.pde
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/SFRRanger_reader/SFRRanger_reader.pde	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/SFRRanger_reader/SFRRanger_reader.pde	(revision 136)
@@ -0,0 +1,87 @@
+// I2C SRF10 or SRF08 Devantech Ultrasonic Ranger Finder 
+// by Nicholas Zambetti <http://www.zambetti.com>
+// and James Tichenor <http://www.jamestichenor.net> 
+
+// Demonstrates use of the Wire library reading data from the 
+// Devantech Utrasonic Rangers SFR08 and SFR10
+
+// Created 29 April 2006
+
+// This example code is in the public domain.
+
+
+#include <Wire.h>
+
+void setup()
+{
+  Wire.begin();                // join i2c bus (address optional for master)
+  Serial.begin(9600);          // start serial communication at 9600bps
+}
+
+int reading = 0;
+
+void loop()
+{
+  // step 1: instruct sensor to read echoes
+  Wire.beginTransmission(112); // transmit to device #112 (0x70)
+                               // the address specified in the datasheet is 224 (0xE0)
+                               // but i2c adressing uses the high 7 bits so it's 112
+  Wire.write(byte(0x00));      // sets register pointer to the command register (0x00)  
+  Wire.write(byte(0x50));      // command sensor to measure in "inches" (0x50) 
+                               // use 0x51 for centimeters
+                               // use 0x52 for ping microseconds
+  Wire.endTransmission();      // stop transmitting
+
+  // step 2: wait for readings to happen
+  delay(70);                   // datasheet suggests at least 65 milliseconds
+
+  // step 3: instruct sensor to return a particular echo reading
+  Wire.beginTransmission(112); // transmit to device #112
+  Wire.write(byte(0x02));      // sets register pointer to echo #1 register (0x02)
+  Wire.endTransmission();      // stop transmitting
+
+  // step 4: request reading from sensor
+  Wire.requestFrom(112, 2);    // request 2 bytes from slave device #112
+
+  // step 5: receive reading from sensor
+  if(2 <= Wire.available())    // if two bytes were received
+  {
+    reading = Wire.read();  // receive high byte (overwrites previous reading)
+    reading = reading << 8;    // shift high byte to be high 8 bits
+    reading |= Wire.read(); // receive low byte as lower 8 bits
+    Serial.println(reading);   // print the reading
+  }
+
+  delay(250);                  // wait a bit since people have to read the output :)
+}
+
+
+/*
+
+// The following code changes the address of a Devantech Ultrasonic Range Finder (SRF10 or SRF08)
+// usage: changeAddress(0x70, 0xE6);
+
+void changeAddress(byte oldAddress, byte newAddress)
+{
+  Wire.beginTransmission(oldAddress);
+  Wire.write(byte(0x00));
+  Wire.write(byte(0xA0));
+  Wire.endTransmission();
+
+  Wire.beginTransmission(oldAddress);
+  Wire.write(byte(0x00));
+  Wire.write(byte(0xAA));
+  Wire.endTransmission();
+
+  Wire.beginTransmission(oldAddress);
+  Wire.write(byte(0x00));
+  Wire.write(byte(0xA5));
+  Wire.endTransmission();
+
+  Wire.beginTransmission(oldAddress);
+  Wire.write(byte(0x00));
+  Wire.write(newAddress);
+  Wire.endTransmission();
+}
+
+*/
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/digital_potentiometer/digital_potentiometer.pde
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/digital_potentiometer/digital_potentiometer.pde	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/digital_potentiometer/digital_potentiometer.pde	(revision 136)
@@ -0,0 +1,39 @@
+// I2C Digital Potentiometer
+// by Nicholas Zambetti <http://www.zambetti.com>
+// and Shawn Bonkowski <http://people.interaction-ivrea.it/s.bonkowski/>
+
+// Demonstrates use of the Wire library
+// Controls AD5171 digital potentiometer via I2C/TWI
+
+// Created 31 March 2006
+
+// This example code is in the public domain.
+
+// This example code is in the public domain.
+
+
+#include <Wire.h>
+
+void setup()
+{
+  Wire.begin(); // join i2c bus (address optional for master)
+}
+
+byte val = 0;
+
+void loop()
+{
+  Wire.beginTransmission(44); // transmit to device #44 (0x2c)
+                              // device address is specified in datasheet
+  Wire.write(byte(0x00));            // sends instruction byte  
+  Wire.write(val);             // sends potentiometer value byte  
+  Wire.endTransmission();     // stop transmitting
+
+  val++;        // increment value
+  if(val == 64) // if reached 64th position (max)
+  {
+    val = 0;    // start over from lowest value
+  }
+  delay(500);
+}
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/master_reader/master_reader.pde
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/master_reader/master_reader.pde	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/master_reader/master_reader.pde	(revision 136)
@@ -0,0 +1,32 @@
+// Wire Master Reader
+// by Nicholas Zambetti <http://www.zambetti.com>
+
+// Demonstrates use of the Wire library
+// Reads data from an I2C/TWI slave device
+// Refer to the "Wire Slave Sender" example for use with this
+
+// Created 29 March 2006
+
+// This example code is in the public domain.
+
+
+#include <Wire.h>
+
+void setup()
+{
+  Wire.begin();        // join i2c bus (address optional for master)
+  Serial.begin(9600);  // start serial for output
+}
+
+void loop()
+{
+  Wire.requestFrom(2, 6);    // request 6 bytes from slave device #2
+
+  while(Wire.available())    // slave may send less than requested
+  { 
+    char c = Wire.read(); // receive a byte as character
+    Serial.print(c);         // print the character
+  }
+
+  delay(500);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/master_writer/master_writer.pde
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/master_writer/master_writer.pde	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/master_writer/master_writer.pde	(revision 136)
@@ -0,0 +1,31 @@
+// Wire Master Writer
+// by Nicholas Zambetti <http://www.zambetti.com>
+
+// Demonstrates use of the Wire library
+// Writes data to an I2C/TWI slave device
+// Refer to the "Wire Slave Receiver" example for use with this
+
+// Created 29 March 2006
+
+// This example code is in the public domain.
+
+
+#include <Wire.h>
+
+void setup()
+{
+  Wire.begin(); // join i2c bus (address optional for master)
+}
+
+byte x = 0;
+
+void loop()
+{
+  Wire.beginTransmission(4); // transmit to device #4
+  Wire.write("x is ");        // sends five bytes
+  Wire.write(x);              // sends one byte  
+  Wire.endTransmission();    // stop transmitting
+
+  x++;
+  delay(500);
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/slave_receiver/slave_receiver.pde
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/slave_receiver/slave_receiver.pde	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/slave_receiver/slave_receiver.pde	(revision 136)
@@ -0,0 +1,38 @@
+// Wire Slave Receiver
+// by Nicholas Zambetti <http://www.zambetti.com>
+
+// Demonstrates use of the Wire library
+// Receives data as an I2C/TWI slave device
+// Refer to the "Wire Master Writer" example for use with this
+
+// Created 29 March 2006
+
+// This example code is in the public domain.
+
+
+#include <Wire.h>
+
+void setup()
+{
+  Wire.begin(4);                // join i2c bus with address #4
+  Wire.onReceive(receiveEvent); // register event
+  Serial.begin(9600);           // start serial for output
+}
+
+void loop()
+{
+  delay(100);
+}
+
+// function that executes whenever data is received from master
+// this function is registered as an event, see setup()
+void receiveEvent(int howMany)
+{
+  while(1 < Wire.available()) // loop through all but the last
+  {
+    char c = Wire.read(); // receive byte as a character
+    Serial.print(c);         // print the character
+  }
+  int x = Wire.read();    // receive byte as an integer
+  Serial.println(x);         // print the integer
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/slave_sender/slave_sender.pde
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/slave_sender/slave_sender.pde	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/examples/slave_sender/slave_sender.pde	(revision 136)
@@ -0,0 +1,32 @@
+// Wire Slave Sender
+// by Nicholas Zambetti <http://www.zambetti.com>
+
+// Demonstrates use of the Wire library
+// Sends data as an I2C/TWI slave device
+// Refer to the "Wire Master Reader" example for use with this
+
+// Created 29 March 2006
+
+// This example code is in the public domain.
+
+
+#include <Wire.h>
+
+void setup()
+{
+  Wire.begin(2);                // join i2c bus with address #2
+  Wire.onRequest(requestEvent); // register event
+}
+
+void loop()
+{
+  delay(100);
+}
+
+// function that executes whenever data is requested by master
+// this function is registered as an event, see setup()
+void requestEvent()
+{
+  Wire.write("hello "); // respond with message of 6 bytes
+                       // as expected by master
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/libraries/Wire/keywords.txt	(revision 136)
@@ -0,0 +1,32 @@
+#######################################
+# Syntax Coloring Map For Wire
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+begin	KEYWORD2
+beginTransmission	KEYWORD2
+endTransmission	KEYWORD2
+requestFrom	KEYWORD2
+send	KEYWORD2
+receive	KEYWORD2
+onReceive	KEYWORD2
+onRequest	KEYWORD2
+
+#######################################
+# Instances (KEYWORD2)
+#######################################
+
+Wire	KEYWORD2
+Wire1	KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/platform.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/platform.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/platform.txt	(revision 136)
@@ -0,0 +1,125 @@
+
+# Arduino SAM Core and platform.
+#
+# For more info:
+# https://github.com/arduino/Arduino/wiki/Arduino-IDE-1.5---3rd-party-Hardware-specification
+
+name=Arduino ARM (32-bits) Boards
+version=1.7.0
+
+# SAMD compile variables
+# ----------------------
+
+compiler.path={runtime.ide.path}/hardware/tools/gcc-arm-none-eabi-4.8.3-2014q1/bin/
+compiler.c.cmd=arm-none-eabi-gcc
+compiler.c.flags=-c -g -Os -w -ffunction-sections -fdata-sections -nostdlib --param max-inline-insns-single=500 -Dprintf=iprintf 
+#-std=gnu99
+compiler.c.elf.cmd=arm-none-eabi-g++
+compiler.c.elf.flags=-Os -Wl,--gc-sections
+compiler.S.flags=-c -g -x assembler-with-cpp
+compiler.cpp.cmd=arm-none-eabi-g++
+compiler.cpp.flags=-c -g -Os -w -ffunction-sections -fdata-sections -nostdlib --param max-inline-insns-single=500 -fno-rtti -fno-exceptions -Dprintf=iprintf 
+#-std=gnu++11
+compiler.ar.cmd=arm-none-eabi-ar
+compiler.ar.flags=rcs
+compiler.objcopy.cmd=arm-none-eabi-objcopy
+compiler.objcopy.eep.flags=-O ihex -j .eeprom --set-section-flags=.eeprom=alloc,load --no-change-warnings --change-section-lma .eeprom=0
+compiler.elf2hex.bin.flags=-O binary
+compiler.elf2hex.flags=-O ihex -R .eeprom
+compiler.elf2hex.cmd=arm-none-eabi-objcopy
+
+compiler.ldflags=
+compiler.size.cmd=arm-none-eabi-size
+compiler.define=-DARDUINO=
+# this can be overriden in boards.txt
+build.extra_flags=
+
+
+compiler.arm.cmsis.path="-I{runtime.ide.path}/hardware/tools/CMSIS/CMSIS/Include/" "-I{runtime.ide.path}/hardware/tools/CMSIS/Device/ATMEL/"
+
+# USB Flags
+# ---------
+build.usb_flags=-DUSB_VID={build.vid} -DUSB_PID={build.pid} -DUSBCON '-DUSB_MANUFACTURER={build.usb_manufacturer}' '-DUSB_PRODUCT={build.usb_product}'
+
+# Default usb manufacturer will be replaced at compile time using
+# numeric vendor ID if available or by board's specific value.
+build.usb_manufacturer=
+
+
+# SAMD compile patterns
+# ---------------------
+
+## Compile c files
+recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.c.flags} -mcpu={build.mcu} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {build.extra_flags} {compiler.arm.cmsis.path} {includes} "{source_file}" -o "{object_file}"
+
+## Compile c++ files
+recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} -mcpu={build.mcu} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {build.extra_flags} {compiler.arm.cmsis.path} {includes} "{source_file}" -o "{object_file}"
+
+## Create archives
+recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} "{build.path}/{archive_file}" "{object_file}"
+
+## Combine gc-sections, archives, and objects
+#recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" -o "{build.path}/{build.project_name}.elf" --specs=nano.specs "-L{build.path}" -Wl,--start-group -lm -lgcc -Wl,--end-group -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group {object_files} "{build.path}/{archive_file}" -Wl,--end-group
+#recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -Wa,-a,-ad -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" -o "{build.path}/{build.project_name}.elf" --specs=nano.specs "-L{build.path}" -Wl,--start-group -lm -lgcc -Wl,--end-group -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group {object_files} "{build.path}/{archive_file}" -Wl,--end-group
+#recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -save-temps -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" -o "{build.path}/{build.project_name}.elf" --specs=nano.specs "-L{build.path}" -Wl,--start-group -lm -lgcc -Wl,--end-group -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group {object_files} "{build.path}/{archive_file}" -Wl,--end-group
+#recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -save-temps -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" -o "{build.path}/{build.project_name}.elf" --specs=nano.specs "-L{build.path}" -Wl,--start-group -lm -lgcc -Wl,--end-group -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group {object_files} "{build.path}/{archive_file}" -Wl,--end-group -Wl,--section-start=.text={build.section.start}
+
+# alfran - fix GITHUB Issue: Arduino Zero Pro alignment problem #3 
+recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -save-temps -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" -o "{build.path}/{build.project_name}.elf" --specs=nano.specs "-L{build.path}" -Wl,--start-group -lm -lgcc -Wl,--end-group -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group "{build.path}/syscalls.c.o" {object_files} "{build.path}/{archive_file}" -Wl,--end-group -Wl,--section-start=.text={build.section.start}
+
+## Create eeprom
+recipe.objcopy.eep.pattern=
+
+## Create hex
+recipe.objcopy.hex.pattern="{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf2hex.flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.hex"
+
+## Create bin
+recipe.objcopy.bin.pattern="{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf2hex.bin.flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.bin"
+
+## Compute size
+recipe.size.pattern="{compiler.path}{compiler.size.cmd}" -A "{build.path}/{build.project_name}.elf"
+recipe.size.regex=\.text\s+([0-9]+).*
+
+
+# SAMD Uploader tools
+# -------------------
+
+tools.openocd.cmd=bin/openocd
+tools.openocd.cmd.windows=bin/openocd.exe
+tools.openocd.path={runtime.ide.path}/hardware/tools/OpenOCD-0.9.0-arduino
+tools.openocd.cmd.macosx=bin/openocd
+
+tools.openocd.upload.params.verbose=
+tools.openocd.upload.params.quiet=
+tools.openocd.upload.pattern="{path}/{cmd}" -s "{path}/share/openocd/scripts/" -f ../../../../../arduino/samd/variants/{build.variant}/{build.openocdscript} -c "program {{{build.path}/{build.project_name}.bin}} verify {build.section.start} reset exit"
+
+tools.openocd.erase.params.verbose=
+tools.openocd.erase.params.quiet=
+#tools.openocd.erase.pattern="{path}/{cmd}" -s "{path}/share/openocd/scripts/" -f ../../../../../arduino/samd/variants/{build.variant}/{build.openocdscript} -c "init" -c "halt" -c "{bootloader.cmd_unprotect}" -c "reset"  -c "exit"
+tools.openocd.erase.pattern=
+tools.openocd.bootloader.params.verbose=
+tools.openocd.bootloader.params.quiet=
+#tools.openocd.bootloader.pattern="{path}/{cmd}" -s "{path}/share/openocd/scripts/" -f ../../../../../arduino/samd/variants/{build.variant}/{build.openocdscript} -c "init" -c "halt" -c "program {bootloader.file} verify" -c "{bootloader.cmd_protect}" -c "{bootloader.cmd_protect_verify}" -c "reset"  -c "exit"
+tools.openocd.bootloader.pattern="{path}/{cmd}" -s "{path}/share/openocd/scripts/" -f ../../../../../arduino/samd/variants/{build.variant}/{build.openocdscript} -c "init" -c "halt"  -c "{bootloader.cmd_unprotect}" -c "program ../../../../../arduino/samd/bootloaders/{bootloader.file} verify" -c "{bootloader.cmd_protect}" -c "{bootloader.cmd_protect_verify}" -c "reset"  -c "exit"
+# AVR Uploader/Programmers tools
+# ------------------------------
+
+tools.avrdude.cmd.path={runtime.ide.path}/hardware/tools/avr/bin/avrdude
+tools.avrdude.config.path={runtime.ide.path}/hardware/tools/avr/etc/avrdude.conf
+
+tools.avrdude.upload.params.verbose=-v -v
+tools.avrdude.upload.params.quiet=-q -q
+#tools.avrdude.upload.pattern="{cmd.path}" "-C{config.path}" {upload.verbose} -p{build.emu.mcu} -c{upload.protocol} -P{serial.port} -b{upload.speed} -D "-Uflash:w:{build.path}/{build.project_name}.hex:i"
+tools.avrdude.upload.pattern="{cmd.path}" "-C{config.path}" {upload.verbose} -p{build.emu.mcu} -c{upload.protocol} -P{serial.port} -b{upload.speed} "-Uflash:w:{build.path}/{build.project_name}.hex:i"
+
+#tools.avrdude.program.params.verbose=-v -v
+#tools.avrdude.program.params.quiet=-q -q
+#tools.avrdude.program.pattern="{cmd.path}" "-C{config.path}" {program.verbose} -p{build.emu.mcu} -c{protocol} {program.extra_params} "-Uflash:w:{build.path}/{build.project_name}.hex:i"
+
+#tools.avrdude.erase.params.verbose=-v -v -v -v
+#tools.avrdude.erase.params.quiet=-q -q
+#tools.avrdude.erase.pattern="{cmd.path}" "-C{config.path}" {erase.verbose} -p{build.emu.mcu} -c{protocol} {program.extra_params} -e -Ulock:w:{bootloader.unlock_bits}:m -Uefuse:w:{bootloader.extended_fuses}:m -Uhfuse:w:{bootloader.high_fuses}:m -Ulfuse:w:{bootloader.low_fuses}:m
+
+#tools.avrdude.bootloader.params.verbose=-v -v -v -v
+#tools.avrdude.bootloader.params.quiet=-q -q
+#tools.avrdude.bootloader.pattern="{cmd.path}" "-C{config.path}" {bootloader.verbose} -p{build.emu.mcu} -c{protocol} {program.extra_params} "-Uflash:w:{runtime.platform.path}/bootloaders/{bootloader.file}:i" -Ulock:w:{bootloader.lock_bits}:m
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/programmers.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/programmers.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/programmers.txt	(revision 136)
@@ -0,0 +1,2 @@
+zeroedbg.name=M0 Pro Programming Port
+zeroedbg.program.tool=openocd
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/linker_scripts/gcc/flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/linker_scripts/gcc/flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/linker_scripts/gcc/flash.ld	(revision 136)
@@ -0,0 +1,193 @@
+/* Linker script to configure memory regions.
+ * Need modifying for a specific board.
+ *   FLASH.ORIGIN: starting address of flash
+ *   FLASH.LENGTH: length of flash
+ *   RAM.ORIGIN: starting address of RAM bank 0
+ *   RAM.LENGTH: length of RAM bank 0
+ */
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
+  RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.isr_vector))
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__end__ = .;
+		PROVIDE(end = .);
+		*(.heap*)
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		*(.stack*)
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM) ;
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	__ram_end__ = ORIGIN(RAM) + LENGTH(RAM) -1 ;
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/linker_scripts/gcc/flash_with_bootloader.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/linker_scripts/gcc/flash_with_bootloader.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/linker_scripts/gcc/flash_with_bootloader.ld	(revision 136)
@@ -0,0 +1,193 @@
+/* Linker script to configure memory regions.
+ * Need modifying for a specific board.
+ *   FLASH.ORIGIN: starting address of flash
+ *   FLASH.LENGTH: length of flash
+ *   RAM.ORIGIN: starting address of RAM bank 0
+ *   RAM.LENGTH: length of RAM bank 0
+ */
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000+0x4000, LENGTH = 0x00040000-0x4000
+  RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.isr_vector))
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__end__ = .;
+		PROVIDE(end = .);
+		*(.heap*)
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		*(.stack*)
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	__ram_end__ = ORIGIN(RAM) + LENGTH(RAM) -1 ;
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/openocd_scripts/arduino_zero.cfg
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/openocd_scripts/arduino_zero.cfg	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/openocd_scripts/arduino_zero.cfg	(revision 136)
@@ -0,0 +1,11 @@
+#
+# Arduino Zero.
+#
+
+source [find interface/cmsis-dap.cfg]
+
+# chip name
+set CHIPNAME at91samd21g18
+set ENDIAN little
+
+source [find target/at91samdXX.cfg]
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/pins_arduino.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/pins_arduino.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/pins_arduino.h	(revision 136)
@@ -0,0 +1,21 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+// API compatibility
+#include "variant.h"
+
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/variant.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/variant.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/variant.cpp	(revision 136)
@@ -0,0 +1,212 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+/*
+ *
+ * + Pin number +  ZERO Board pin  |  PIN   | Label/Name      | Comments (* is for default peripheral in use)
+ * +------------+------------------+--------+-----------------+------------------------------
+ * |            | Digital Low      |        |                 |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 0          | 0 -> RX          |  PA11  |                 | EIC/EXTINT[11] ADC/AIN[19] PTC/X[3] *SERCOM0/PAD[3] SERCOM2/PAD[3] TCC1/WO[1] TCC0/WO[3]
+ * | 1          | 1 <- TX          |  PA10  |                 | EIC/EXTINT[10] ADC/AIN[18] PTC/X[2] *SERCOM0/PAD[2] TCC1/WO[0] TCC0/WO[2]  
+ * | 2          | ~2               |  PA08  |                 | EIC/NMI ADC/AIN[16] PTC/X[0] SERCOM0/PAD[0] SERCOM2/PAD[0] *TCC0/WO[0] TCC1/WO[2]
+ * | 3          | ~3               |  PA09  |                 | EIC/EXTINT[9] ADC/AIN[17] PTC/X[1] SERCOM0/PAD[1] SERCOM2/PAD[1] *TCC0/WO[1] TCC1/WO[3]
+ * | 4          | ~4               |  PA14  |                 | EIC/EXTINT[14] SERCOM2/PAD[2] SERCOM4/PAD[2] TC3/WO[0] *TCC0/WO[4]
+ * | 5          | ~5               |  PA15  |                 | EIC/EXTINT[15] SERCOM2/PAD[3] SERCOM4/PAD[3] TC3/WO[1] *TCC0/WO[5]
+ * | 6          | ~6               |  PA20  |                 | EIC/EXTINT[4] PTC/X[8] SERCOM5/PAD[2] SERCOM3/PAD[2] TC7/WO[0] *TCC0/WO[6]
+ * | 7          | ~7               |  PA21  |                 | EIC/EXTINT[5] PTC/X[9] SERCOM5/PAD[3] SERCOM3/PAD[3] TC7/WO[1] *TCC0/WO[7]
+ * +------------+------------------+--------+-----------------+------------------------------
+ * |            | Digital High     |        |                 |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 8          | ~8               |  PA06  |                 | EIC/EXTINT[6] PTC/Y[4] ADC/AIN[6] AC/AIN[2] SERCOM0/PAD[2] *TCC1/WO[0]
+ * | 9          | ~9               |  PA07  |                 | EIC/EXTINT[7] PTC/Y[5] DC/AIN[7] AC/AIN[3] SERCOM0/PAD[3] *TCC1/WO[1]
+ * | 10         | ~10              |  PA18  |                 | EIC/EXTINT[2] PTC/X[6] SERCOM1/PAD[2] SERCOM3/PAD[2] *TC3/WO[0] TCC0/WO[2]
+ * | 11         | ~11              |  PA16  |                 | EIC/EXTINT[0] PTC/X[4] SERCOM1/PAD[0] SERCOM3/PAD[0] *TCC2/WO[0] TCC0/WO[6]
+ * | 12         | ~12              |  PA19  |                 | EIC/EXTINT[3] PTC/X[7] SERCOM1/PAD[3] SERCOM3/PAD[3] *TC3/WO[1] TCC0/WO[3]
+ * | 13         | ~13              |  PA17  | LED             | EIC/EXTINT[1] PTC/X[5] SERCOM1/PAD[1] SERCOM3/PAD[1] *TCC2/WO[1] TCC0/WO[7]
+ * | 14         | GND              |        |                 |
+ * | 15         | AREF             |  PA03  |                 | *DAC/VREFP PTC/Y[1]
+ * | 16         | SDA              |  PA22  |                 | EIC/EXTINT[6] PTC/X[10] *SERCOM3/PAD[0] SERCOM5/PAD[0] TC4/WO[0] TCC0/WO[4]
+ * | 17         | SCL              |  PA23  |                 | EIC/EXTINT[7] PTC/X[11] *SERCOM3/PAD[1] SERCOM5/PAD[1] TC4/WO[1] TCC0/WO[5]
+ * +------------+------------------+--------+-----------------+------------------------------
+ * |            |SPI (Legacy ICSP) |        |                 |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 18         | 1                |  PA12  | MISO            | EIC/EXTINT[12] SERCOM2/PAD[0] *SERCOM4/PAD[0] TCC2/WO[0] TCC0/WO[6]
+ * | 19         | 2                |        | 5V0             |
+ * | 20         | 3                |  PB11  | SCK             | EIC/EXTINT[11]                *SERCOM4/PAD[3] TC5/WO[1] TCC0/WO[5]
+ * | 21         | 4                |  PB10  | MOSI            | EIC/EXTINT[10]                *SERCOM4/PAD[2] TC5/WO[0] TCC0/WO[4]
+ * | 22         | 5                |        | RESET           |
+ * | 23         | 6                |        | GND             |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * |            | Analog Connector |        |                 |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 24         | A0               |  PA02  |                 | EIC/EXTINT[2] *ADC/AIN[0] PTC/Y[0] DAC/VOUT
+ * | 25         | A1               |  PB08  |                 | EIC/EXTINT[8] *ADC/AIN[2] PTC/Y[14] SERCOM4/PAD[0] TC4/WO[0]
+ * | 26         | A2               |  PB09  |                 | EIC/EXTINT[9] *ADC/AIN[3] PTC/Y[15] SERCOM4/PAD[1] TC4/WO[1]
+ * | 27         | A3               |  PA04  |                 | EIC/EXTINT[4] *ADC/AIN[4] AC/AIN[0] PTC/Y[2] SERCOM0/PAD[0] TCC0/WO[0]
+ * | 28         | A4               |  PA05  |                 | EIC/EXTINT[5] *ADC/AIN[5] AC/AIN[1] PTC/Y[5] SERCOM0/PAD[1] TCC0/WO[1]
+ * | 29         | A5               |  PB02  |                 | EIC/EXTINT[2] *ADC/AIN[10] PTC/Y[8] SERCOM5/PAD[0] TC6/WO[0]
+ * +------------+------------------+--------+-----------------+------------------------------
+ * |            | LEDs             |        |                 |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 30         |                  |  PB03  | RX              |
+ * | 31         |                  |  PA27  | TX              |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * |            | USB              |        |                 |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 32         |                  |  PA28  | USB HOST ENABLE |
+ * | 33         |                  |  PA24  | USB_NEGATIVE    | USB/DM
+ * | 34         |                  |  PA25  | USB_POSITIVE    | USB/DP
+ * +------------+------------------+--------+-----------------+------------------------------
+ * |            | EDBG             |        |                 |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 35         |                  |  PB22  | EDBG_UART TX    | SERCOM5/PAD[2]
+ * | 36         |                  |  PB23  | EDBG_UART RX    | SERCOM5/PAD[3]
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 37         |                  |  PA22  | EDBG_SDA        | SERCOM3/PAD[0]
+ * | 38         |                  |  PA23  | EDBG_SCL        | SERCOM3/PAD[1]
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 39         |                  |  PA19  | EDBG_MISO       | SERCOM1/PAD[3]
+ * | 40         |                  |  PA16  | EDBG_MOSI       | SERCOM1/PAD[0]
+ * | 41         |                  |  PA18  | EDBG_SS         | SERCOM1/PAD[2]
+ * | 42         |                  |  PA17  | EDBG_SCK        | SERCOM1/PAD[1]
+ * +------------+------------------+--------+-----------------+------------------------------
+ * | 43         |                  |  PA13  | EDBG_GPIO0      | EIC/EXTINT[13] *TCC2/WO[1] TCC0/WO[7]
+ * | 44         |                  |  PA21  | EDBG_GPIO1      | Pin 7
+ * | 45         |                  |  PA06  | EDBG_GPIO2      | Pin 8
+ * | 46         |                  |  PA07  | EDBG_GPIO3      | Pin 9
+ * +------------+------------------+--------+-----------------+------------------------------
+ * |            |32.768KHz Crystal |        |                 |
+ * +------------+------------------+--------+-----------------+------------------------------
+ * |            |                  |  PA00  | XIN32           | EXTINT[0] SERCOM1/PAD[0] TCC2/WO[0]
+ * |            |                  |  PA01  | XOUT32          | EXTINT[1] SERCOM1/PAD[1] TCC2/WO[1]
+ * +------------+------------------+--------+-----------------+------------------------------
+ */
+
+#include "variant.h"
+
+/*
+ * Pins descriptions
+ */
+const PinDescription g_APinDescription[]=
+{
+  // 0 .. 19 - Digital pins
+  // ----------------------
+  // 0/1 - SERCOM/UART (Serial1)
+  { PORTA, 11, PIO_SERCOM, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_11 }, // RX: SERCOM0/PAD[3]
+  { PORTA, 10, PIO_SERCOM, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_10 }, // TX: SERCOM0/PAD[2]
+
+  // 2..12
+  { PORTA,  8, PIO_TIMER, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM0_CH0, TCC0_CH0, EXTERNAL_INT_NONE }, // EXTERNAL_INT_NMI }, // TCC0/WO[0]
+  { PORTA,  9, PIO_TIMER, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM0_CH1, TCC0_CH1, EXTERNAL_INT_9 }, // TCC0/WO[1]
+  { PORTA, 14, PIO_TIMER, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM3_CH0, TC3_CH0, EXTERNAL_INT_14 }, // TC3/WO[0]
+  { PORTA, 15, PIO_TIMER, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM3_CH1, TC3_CH1, EXTERNAL_INT_15 }, // TC3/WO[1]
+  { PORTA, 20, PIO_TIMER_ALT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM0_CH6, TCC0_CH6, EXTERNAL_INT_4 }, // TCC0/WO[6]
+  { PORTA, 21, PIO_TIMER_ALT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM0_CH7, TCC0_CH7, EXTERNAL_INT_5 }, // TCC0/WO[7]
+  { PORTA,  6, PIO_TIMER, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM1_CH0, TCC1_CH0, EXTERNAL_INT_6 }, // TCC1/WO[0]
+  { PORTA,  7, PIO_TIMER, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM1_CH1, TCC1_CH1, EXTERNAL_INT_7 }, // TCC1/WO[1]
+  { PORTA, 18, PIO_TIMER, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM3_CH0, TC3_CH0, EXTERNAL_INT_2 }, // TC3/WO[0]
+  { PORTA, 16, PIO_TIMER, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM2_CH0, TCC2_CH0, EXTERNAL_INT_0 }, // TCC2/WO[0]
+  { PORTA, 19, PIO_TIMER, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM|PIN_ATTR_TIMER), No_ADC_Channel, PWM3_CH1, TC3_CH1, EXTERNAL_INT_3 }, // TC3/WO[1]
+
+  // 13 (LED)
+  { PORTA, 17, PIO_PWM, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), No_ADC_Channel, PWM2_CH1, NOT_ON_TIMER, EXTERNAL_INT_1 }, // TCC2/WO[1]
+
+  // 14 (GND)
+  { NOT_A_PORT, 0, PIO_NOT_A_PIN, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE },
+
+  // 15 (AREF)
+  { PORTA, 3, PIO_ANALOG, PIN_ATTR_ANALOG, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // DAC/VREFP
+
+  // 16..17 I2C pins (SDA/SCL and also EDBG:SDA/SCL)
+  // ----------------------
+  { PORTA, 22, PIO_SERCOM, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_6 }, // SDA: SERCOM3/PAD[0]
+  { PORTA, 23, PIO_SERCOM, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_7 }, // SCL: SERCOM3/PAD[1]
+
+  // 18..23 - SPI pins (ICSP:MISO,SCK,MOSI)
+  // ----------------------
+  { PORTA, 12, PIO_SERCOM_ALT, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_12 }, // MISO: SERCOM4/PAD[0]
+  { NOT_A_PORT, 0, PIO_NOT_A_PIN, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // 5V0
+  { PORTB, 11, PIO_SERCOM_ALT, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_11 }, // SCK: SERCOM4/PAD[3]
+  { PORTB, 10, PIO_SERCOM_ALT, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_10 }, // MOSI: SERCOM4/PAD[2]
+  { NOT_A_PORT, 0, PIO_NOT_A_PIN, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // RESET
+  { NOT_A_PORT, 0, PIO_NOT_A_PIN, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // GND
+
+  // 24..29 - Analog pins
+  // --------------------
+  { PORTA,  2, PIO_ANALOG, PIN_ATTR_ANALOG, ADC_Channel0, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_2 }, // ADC/AIN[0]
+  { PORTB,  8, PIO_ANALOG, PIN_ATTR_ANALOG, ADC_Channel2, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_8 }, // ADC/AIN[2]
+  { PORTB,  9, PIO_ANALOG, PIN_ATTR_ANALOG, ADC_Channel3, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_9 }, // ADC/AIN[3]
+  { PORTA,  4, PIO_ANALOG, PIN_ATTR_ANALOG, ADC_Channel4, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_4 }, // ADC/AIN[4]
+  { PORTA,  5, PIO_ANALOG, PIN_ATTR_ANALOG, ADC_Channel5, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_5 }, // ADC/AIN[5]
+  { PORTB,  2, PIO_ANALOG, PIN_ATTR_ANALOG, ADC_Channel10, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_2 }, // ADC/AIN[10]
+
+  // 30..31 - RX/TX LEDS (PB03/PA27)
+  // --------------------
+  { PORTB,  3, PIO_OUTPUT, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // used as output only
+  { PORTA, 27, PIO_OUTPUT, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // used as pure only
+
+  // 32..33 - USB
+  // --------------------
+  { PORTA, 28, PIO_COM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // USB/SOF
+  { PORTA, 24, PIO_COM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // USB/DM
+  { PORTA, 25, PIO_COM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // USB/DP
+
+  // 35 .. 46 - EDBG
+  // ----------------------
+  // 35/36 - EDBG/UART
+  { PORTB, 22, PIO_SERCOM_ALT, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // TX: SERCOM5/PAD[2]
+  { PORTB, 23, PIO_SERCOM_ALT, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // RX: SERCOM5/PAD[3]
+
+  // 37/38 I2C (SDA/SCL and also EDBG:SDA/SCL)
+  { PORTA, 22, PIO_SERCOM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // SDA: SERCOM3/PAD[0]
+  { PORTA, 23, PIO_SERCOM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // SCL: SERCOM3/PAD[1]
+
+  // 39 .. 42 - EDBG/SPI
+  { PORTA, 19, PIO_SERCOM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // MISO: SERCOM1/PAD[3]
+  { PORTA, 16, PIO_SERCOM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // MOSI: SERCOM1/PAD[0]
+  { PORTA, 18, PIO_SERCOM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // SS: SERCOM1/PAD[2]
+  { PORTA, 17, PIO_SERCOM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // SCK: SERCOM1/PAD[1]
+
+  // 43 .. 46 - EDBG/Digital
+  { PORTA, 13, PIO_PWM, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), No_ADC_Channel, PWM0_CH5, NOT_ON_TIMER, EXTERNAL_INT_13 }, // EIC/EXTINT[13] *TCC2/WO[1] TCC0/WO[7]
+  { PORTA, 21, PIO_PWM_ALT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), No_ADC_Channel, PWM0_CH7, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // Pin 7
+  { PORTA,  6, PIO_PWM, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), No_ADC_Channel, PWM1_CH0, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // Pin 8
+  { PORTA,  7, PIO_PWM, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM), No_ADC_Channel, PWM1_CH1, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // Pin 9
+
+ // ----------------------
+ // 47 - Alternate use of A0 (DAC output)
+  { PORTA,  2, PIO_ANALOG, PIN_ATTR_ANALOG, DAC_Channel0, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_2 }, // DAC/VOUT
+
+ // 48..49 - SERCOM2
+ { PORTA, 14, PIO_SERCOM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // SERCOM2/PAD[2]
+ { PORTA, 15, PIO_SERCOM, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM, NOT_ON_TIMER, EXTERNAL_INT_NONE }, // SERCOM2/PAD[3]
+} ;
+
+const void* g_apTCInstances[TCC_INST_NUM+TC_INST_NUM]={ TCC0, TCC1, TCC2, TC3, TC4, TC5 } ;
+
+// Multi-serial objects instantiation
+SERCOM sercom0( SERCOM5 ) ;
+SERCOM sercom1( SERCOM1 ) ;
+SERCOM sercom2( SERCOM2 ) ;
+SERCOM sercom3( SERCOM3 ) ;
+SERCOM sercom4( SERCOM4 ) ;
+SERCOM sercom5( SERCOM0 ) ;
+
+Uart Serial( &sercom0, 36, 35 ) ;
+Uart Serial5( &sercom5, 0, 1 ) ;
Index: rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/variant.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/variant.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/arduino/samd/variants/arduino_zero/variant.h	(revision 136)
@@ -0,0 +1,251 @@
+/*
+  Copyright (c) 2014 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _VARIANT_ARDUINO_ZERO_
+#define _VARIANT_ARDUINO_ZERO_
+
+/*----------------------------------------------------------------------------
+ *        Definitions
+ *----------------------------------------------------------------------------*/
+
+/** Frequency of the board main oscillator */
+#define VARIANT_MAINOSC		(32768ul)
+
+/** Master clock frequency */
+#define VARIANT_MCK			  (48000000ul)
+
+/*----------------------------------------------------------------------------
+ *        Headers
+ *----------------------------------------------------------------------------*/
+
+#include "WVariant.h"
+
+#ifdef __cplusplus
+#include "SERCOM.h"
+#include "Uart.h"
+#endif // __cplusplus
+
+#ifdef __cplusplus
+extern "C"{
+#endif // __cplusplus
+
+/**
+ * Libc porting layers
+ */
+#if defined (  __GNUC__  )
+#    include <syscalls.h> /** RedHat Newlib minimal stub */
+#endif
+
+/*----------------------------------------------------------------------------
+ *        Pins
+ *----------------------------------------------------------------------------*/
+
+// Number of pins defined in PinDescription array
+#define PINS_COUNT           (34u)
+#define NUM_DIGITAL_PINS     (19u)
+#define NUM_ANALOG_INPUTS    (5u)
+#define NUM_ANALOG_OUTPUTS   (1u)
+
+#define digitalPinToPort(P)        ( &(PORT->Group[g_APinDescription[P].ulPort]) )
+#define digitalPinToBitMask(P)     ( 1 << g_APinDescription[P].ulPin )
+#define digitalPinToTimer(P)       ( )
+//#define analogInPinToBit(P)        ( )
+#define portOutputRegister(port)   ( &(port->OUT.reg) )
+#define portInputRegister(port)    ( &(port->IN.reg) )
+//#define portModeRegister(P)        (  )
+#define digitalPinHasPWM(P)        ( g_APinDescription[P].ulPWMChannel != NOT_ON_PWM || g_APinDescription[P].ulTCChannel != NOT_ON_TIMER )
+
+// Interrupts
+#define digitalPinToInterrupt(P)   ( g_APinDescription[P].ulExtInt )
+
+// LEDs
+#define PIN_LED_13           (13u)
+#define PIN_LED_RXL          (30u)
+#define PIN_LED_TXL          (31u)
+#define PIN_LED              PIN_LED_13
+#define PIN_LED2             PIN_LED_RXL
+#define PIN_LED3             PIN_LED_TXL
+#define LED_BUILTIN          PIN_LED_13
+
+/*
+ * SPI Interfaces
+ */
+#define SPI_INTERFACES_COUNT 1
+/*
+#define SPI_INTERFACE        SPI0
+#define SPI_INTERFACE_ID     ID_SPI0
+#define SPI_CHANNELS_NUM 4
+#define PIN_SPI_SS0          (77u)
+#define PIN_SPI_SS1          (87u)
+#define PIN_SPI_SS2          (86u)
+#define PIN_SPI_SS3          (78u)
+*/
+#define PIN_SPI_MOSI         (21u)
+#define PIN_SPI_MISO         (18u)
+#define PIN_SPI_SCK          (20u)
+
+/*
+#define BOARD_SPI_SS0        (10u)
+#define BOARD_SPI_SS1        (4u)
+#define BOARD_SPI_SS2        (52u)
+#define BOARD_SPI_SS3        PIN_SPI_SS3
+
+#define BOARD_SPI_DEFAULT_SS BOARD_SPI_SS3
+
+#define BOARD_PIN_TO_SPI_PIN(x) \
+	(x==BOARD_SPI_SS0 ? PIN_SPI_SS0 : \
+	(x==BOARD_SPI_SS1 ? PIN_SPI_SS1 : \
+	(x==BOARD_SPI_SS2 ? PIN_SPI_SS2 : PIN_SPI_SS3 )))
+#define BOARD_PIN_TO_SPI_CHANNEL(x) \
+	(x==BOARD_SPI_SS0 ? 0 : \
+	(x==BOARD_SPI_SS1 ? 1 : \
+	(x==BOARD_SPI_SS2 ? 2 : 3)))
+
+static const uint8_t SS1  = BOARD_SPI_SS1;
+static const uint8_t SS2  = BOARD_SPI_SS2;
+static const uint8_t SS3  = BOARD_SPI_SS3;*/
+static const uint8_t SS	  = 14;	//GND
+static const uint8_t MOSI = PIN_SPI_MOSI;
+static const uint8_t MISO = PIN_SPI_MISO;
+static const uint8_t SCK  = PIN_SPI_SCK;
+
+
+/*
+ * Wire Interfaces
+ */
+#define WIRE_INTERFACES_COUNT 1
+
+#define PIN_WIRE_SDA         (16u)
+#define PIN_WIRE_SCL         (17u)
+/*
+#define WIRE_INTERFACE       TWI1
+#define WIRE_INTERFACE_ID    ID_TWI1
+#define WIRE_ISR_HANDLER     TWI1_Handler
+#define WIRE_ISR_ID          TWI1_IRQn
+*/
+
+/*
+ * UART/USART Interfaces
+ */
+// Serial
+//#define PINS_UART            (81u)
+
+/*
+ * USB Interfaces
+ */
+//#define PINS_USB             (85u)
+
+/*
+ * Analog pins
+ */
+static const uint8_t A0  = 24 ;
+static const uint8_t A1  = 25 ;
+static const uint8_t A2  = 26 ;
+static const uint8_t A3  = 27 ;
+static const uint8_t A4  = 28 ;
+static const uint8_t A5  = 29 ;
+#define ADC_RESOLUTION		12
+
+/*
+ * DAC
+ */
+/*
+#define DACC_INTERFACE		   DACC
+#define DACC_INTERFACE_ID	   ID_DACC
+#define DACC_RESOLUTION		   12
+#define DACC_ISR_HANDLER     DACC_Handler
+#define DACC_ISR_ID          DACC_IRQn
+*/
+
+/*
+ * PWM
+ */
+/*
+#define PWM_INTERFACE		PWM
+#define PWM_INTERFACE_ID	ID_PWM
+#define PWM_FREQUENCY		1000
+#define PWM_MAX_DUTY_CYCLE	255
+#define PWM_MIN_DUTY_CYCLE	0
+#define PWM_RESOLUTION		8
+*/
+
+/*
+ * TC
+ */
+/*
+#define TC_INTERFACE        TC0
+#define TC_INTERFACE_ID     ID_TC0
+#define TC_FREQUENCY        1000
+#define TC_MAX_DUTY_CYCLE   255
+#define TC_MIN_DUTY_CYCLE   0
+#define TC_RESOLUTION		8
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+
+/*	=========================
+ *	===== SERCOM DEFINITION
+ *	=========================
+*/
+extern SERCOM sercom0;
+extern SERCOM sercom1;
+extern SERCOM sercom2;
+extern SERCOM sercom3;
+extern SERCOM sercom4;
+extern SERCOM sercom5;
+
+extern Uart Serial;
+extern Uart Serial5;
+
+#endif
+
+// These serial port names are intended to allow libraries and architecture-neutral
+// sketches to automatically default to the correct port name for a particular type
+// of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+// the first hardware serial port whose RX/TX pins are not dedicated to another use.
+//
+// SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+//
+// SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+//
+// SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+//
+// SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+//
+// SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+//                            pins are NOT connected to anything by default.
+#define SERIAL_PORT_MONITOR         Serial
+#define SERIAL_PORT_USBVIRTUAL      SerialUSB
+#define SERIAL_PORT_HARDWARE_OPEN   Serial1
+#define SERIAL_PORT_HARDWARE_OPEN1  Serial2
+#define SERIAL_PORT_HARDWARE_OPEN2  Serial3
+#define SERIAL_PORT_HARDWARE        Serial
+#define SERIAL_PORT_HARDWARE1       Serial1
+#define SERIAL_PORT_HARDWARE2       Serial2
+#define SERIAL_PORT_HARDWARE3       Serial3
+
+#endif /* _VARIANT_ARDUINO_ZERO_ */
+
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/ARM.CMSIS.pdsc
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/ARM.CMSIS.pdsc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/ARM.CMSIS.pdsc	(revision 136)
@@ -0,0 +1,670 @@
+<?xml version="1.0" encoding="utf-8"?>
+
+<package schemaVersion="1.0" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
+  <name>CMSIS</name>
+  <description>Cortex Microcontroller Software Interface Standard (CMSIS) CORE, DSP, RTOS, Driver</description>
+  <vendor>ARM</vendor>
+  <!-- <license>CMSIS\CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
+  <url>http://www.keil.com/pack/</url>
+
+  <taxonomy>
+    <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
+    <description Cclass="CMSIS" doc="CMSIS\Documentation\General\html\index.html">Cortex Microcontroller Software Interface Components</description>
+    <description Cclass="Device" doc="CMSIS\Documentation\Core\html\index.html">Startup, System Setup</description>
+    <description Cclass="Drivers" doc="CMSIS\Documentation\Driver\html\index.html">Unified Device Drivers</description>
+    <description Cclass="File System">File Drive Support and File System</description>
+    <description Cclass="Network">Network Stack using IP descriptions</description>
+    <description Cclass="USB">Universal Serial Bus Stack</description>
+  </taxonomy>
+
+  <releases>
+    <release version="4.0.0">
+      - CMSIS-Driver   2.00  Preliminary (incompatible update)
+      - CMSIS-Pack     1.10  Preliminary
+      - CMSIS-DSP      1.4.2 (see revision history for details)
+      - CMSIS-Core     3.30  (see revision history for details)
+      - CMSIS-RTOS RTX 4.74  (see revision history for details)
+      - CMSIS-RTOS API 1.02  (unchanged)
+      - CMSIS-SVD      1.10  (unchanged)
+    </release>
+    <release version="3.20.4">
+      - CMSIS-RTOS 4.74 (see revision history for details)
+      - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
+    </release>
+    <release version="3.20.3">
+      - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
+      - CMSIS-RTOS 4.73 (see revision history for details)
+    </release>
+    <release version="3.20.2">
+      - CMSIS-Pack documentation has been added
+      - CMSIS-Drivers header and documentation have been added to PACK
+      - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
+    </release>
+    <release version="3.20.1">
+      - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
+      - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
+    </release>
+    <release version="3.20.0">
+      The software portions that are deployed in the application program are now under a BSD license which allows usage
+      of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
+      The individual components have been update as listed below:
+      - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
+      - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
+      - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
+      - CMSIS-SVD is unchanged.
+    </release>
+  </releases>
+
+  <devices>
+    <!-- ******************************  Cortex-M0  ****************************** -->
+    <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
+      <device Dname="ARMCM0">
+        <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
+        <compile   header="Device\ARM\ARMCM0\Include\ARMCM0.h"/>
+        <debug     svd="Device\ARM\SVD\ARMCM0.svd"/>
+        <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm"               start="0x00000000"  size="0x00040000" default="1"/>
+        <book      name="Device\ARM\Documents\cortex_m0_dgug.pdf"       title="Cortex-M4 Device Generic Users Guide"/>
+
+        <description>
+          The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed
+          for a broad range of embedded applications. It offers significant benefits to developers,
+          including:
+          â¢ simple, easy-to-use programmers model
+          â¢ highly efficient ultra-low power operation
+          â¢ excellent code density
+          â¢ deterministic, high-performance interrupt handling
+          â¢ upward compatibility with the rest of the Cortex-M processor family.
+        </description>
+      </device>
+    </family>
+
+    <!-- ******************************  Cortex-M0P  ****************************** -->
+    <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
+      <device Dname="ARMCM0P">
+        <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
+        <compile   header="Device\ARM\ARMCM0plus\Include\ARMCM0plus.h"/>
+        <debug     svd="Device\ARM\SVD\ARMCM0P.svd"/>
+        <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm"               start="0x00000000"  size="0x00040000" default="1"/>
+        <book      name="Device\ARM\Documents\cortex_m0p_dgug.pdf"       title="Cortex-M4 Device Generic Users Guide"/>
+        <description>
+          The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed
+          for a broad range of embedded applications. It offers significant benefits to developers,
+          including:
+          â¢ simple, easy-to-use programmers model
+          â¢ highly efficient ultra-low power operation
+          â¢ excellent code density
+          â¢ deterministic, high-performance interrupt handling
+          â¢ upward compatibility with the rest of the Cortex-M processor family.
+        </description>
+      </device>
+    </family>
+
+    <!-- ******************************  Cortex-M3  ****************************** -->
+    <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
+      <device Dname="ARMCM3">
+        <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
+        <compile   header="Device\ARM\ARMCM3\Include\ARMCM3.h"/>
+        <debug     svd="Device\ARM\SVD\ARMCM3.svd"/>
+        <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm"               start="0x00000000"  size="0x00040000" default="1"/>
+        <book      name="Device\ARM\Documents\cortex_m3_dgug.pdf"       title="Cortex-M3 Device Generic Users Guide"/>
+        <description>
+          The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed
+          for a broad range of embedded applications. It offers significant benefits to developers,
+          including:
+          â¢ simple, easy-to-use programmers model
+          â¢ highly efficient ultra-low power operation
+          â¢ excellent code density
+          â¢ deterministic, high-performance interrupt handling
+          â¢ upward compatibility with the rest of the Cortex-M processor family.
+        </description>
+      </device>
+    </family>
+
+    <!-- ******************************  Cortex-M4  ****************************** -->
+    <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
+      <device Dname="ARMCM4">
+        <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
+        <compile   header="Device\ARM\ARMCM4\Include\ARMCM4.h"/>
+        <debug     svd="Device\ARM\SVD\ARMCM4.svd"/>
+        <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm"               start="0x00000000"  size="0x00040000" default="1"/>
+        <book      name="Device\ARM\Documents\cortex_m4_dgug.pdf"       title="Cortex-M4 Device Generic Users Guide"/>
+        <description>
+          The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed
+          for a broad range of embedded applications. It offers significant benefits to developers,
+          including:
+          â¢ simple, easy-to-use programmers model
+          â¢ highly efficient ultra-low power operation
+          â¢ excellent code density
+          â¢ deterministic, high-performance interrupt handling
+          â¢ upward compatibility with the rest of the Cortex-M processor family.
+        </description>
+      </device>
+    </family>
+
+
+    <!-- ******************************  ARMSC000  ****************************** -->
+    <family Dfamily="ARM SC000" Dvendor="ARM:82">
+      <device Dname="ARMSC000">
+        <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
+        <compile   header="Device\ARM\ARMSC000\Include\ARMSC000.h"/>
+        <debug     svd="Device\ARM\SVD\ARMSC000.svd"/>
+        <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm"               start="0x00000000"  size="0x00040000" default="1"/>
+        <description>
+          The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed
+          for a broad range of secure embedded applications. It offers significant benefits to developers,
+          including:
+          â¢ simple, easy-to-use programmers model
+          â¢ highly efficient ultra-low power operation
+          â¢ excellent code density
+          â¢ deterministic, high-performance interrupt handling
+        </description>
+      </device>
+    </family>
+
+
+    <!-- ******************************  ARMSC300  ****************************** -->
+    <family Dfamily="ARM SC300" Dvendor="ARM:82">
+      <device Dname="ARMSC300">
+        <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
+        <compile   header="Device\ARM\ARMSC300\Include\ARMSC300.h"/>
+        <debug     svd="Device\ARM\SVD\ARMSC300.svd"/>
+        <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm"               start="0x00000000"  size="0x00040000" default="1"/>
+
+        <description>
+          The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed
+          for a broad range of secure embedded applications. It offers significant benefits to developers,
+          including:
+          â¢ simple, easy-to-use programmers model
+          â¢ highly efficient ultra-low power operation
+          â¢ excellent code density
+          â¢ deterministic, high-performance interrupt handling
+        </description>
+      </device>
+    </family>
+
+  </devices>
+
+
+  <apis>
+    <!-- CMSIS-RTOS API -->
+    <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="0">
+      <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
+      <files>
+        <file category="doc" name="CMSIS\Documentation\RTOS\html\index.html"/>
+      </files>
+    </api>
+    <api Cclass="Drivers" Cgroup="UART" Capiversion="2.00" exclusive="0">
+        <description>UART Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__usart__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_USART.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="SPI" Capiversion="2.00" exclusive="0">
+        <description>SPI Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__spi__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_SPI.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="I2C" Capiversion="2.00" exclusive="0">
+        <description>I2C Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__i2c__interface__gr.html"/>
+          <file category="header" name="CMSIS\Driver\Include\Driver_I2C.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="MCI" Capiversion="2.00" exclusive="0">
+        <description>MCI Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__mci__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_MCI.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="NAND" Capiversion="2.00" exclusive="0">
+        <description>NAND Flash Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__mci__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_NAND.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="NOR" Capiversion="2.00" exclusive="0">
+        <description>NOR Flash Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__nor__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_NOR.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="Ethernet" Capiversion="2.00" exclusive="0">
+        <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__eth__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_ETH_MAC.h" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_ETH_PHY.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="Ethernet MAC" Capiversion="2.00" exclusive="0">
+        <description>Ethernet MAC Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__eth__mac__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_ETH_MAC.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
+        <description>Ethernet PHY Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__eth__phy__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_ETH_PHY.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="USB Device" Capiversion="2.00" exclusive="0">
+        <description>USB Device Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__usbd__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_USBD.h" />
+        </files>
+      </api>
+    <api Cclass="Drivers" Cgroup="USB Host" Capiversion="2.00" exclusive="0">
+        <description>USB Host Driver API for Cortex-M</description>
+        <files>
+          <file category="doc" name="CMSIS\Documentation\Driver\html\group__usbh__interface__gr.html" />
+          <file category="header" name="CMSIS\Driver\Include\Driver_USBH.h" />
+        </files>
+      </api>
+  </apis>
+
+  <!-- conditions are dependency rules that can apply to a component or an individual file -->
+  <conditions>
+    <condition id="Is ARM Compiler">
+      <require Tcompiler="ARMCC"/>
+    </condition>
+               
+    <condition id="Cortex-M Device">
+      <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, SC000, SC3000</description>
+      <accept Dcore="Cortex-M0"/>
+      <accept Dcore="Cortex-M0+"/>
+      <accept Dcore="Cortex-M3"/>
+      <accept Dcore="Cortex-M4"/>
+      <accept Dcore="SC000"/>
+      <accept Dcore="SC300"/>
+    </condition>
+
+    <condition id="Cortex-M CMSIS Device">
+      <description>ARM Cortex-M device</description>
+      <accept Dname="ARMCM0"/>
+      <accept Dname="ARMCM0+"/>
+      <accept Dname="ARMCM3"/>
+      <accept Dname="ARMCM4"/>
+      <accept Dname="ARMSC000"/>
+      <accept Dname="ARMSC300"/>
+    </condition>
+
+    <condition id="CMSIS Core">
+      <description>CMSIS CORE processor and device specific Startup files</description>
+      <require condition="Cortex-M Device"/>
+      <require Cclass="Device" Cgroup="Startup"/>
+    </condition>
+
+    <condition id="ARMCM0">
+      <!-- conditions selecting Devices -->
+      <description>Generic ARM Cortex-M0 device</description>
+      <require Dvendor="ARM:82" Dname="ARMCM0"/>
+    </condition>
+
+    <condition id="ARMCM0+">
+      <description>Generic ARM Cortex-M0+ device</description>
+      <require Dvendor="ARM:82" Dname="ARMCM0P"/>
+    </condition>
+
+    <condition id="ARMCM3">
+      <description>Generic ARM Cortex-M3 device</description>
+      <require Dvendor="ARM:82" Dname="ARMCM3"/>
+    </condition>
+
+    <condition id="ARMCM4">
+      <description>Generic ARM Cortex-M4 device</description>
+      <require Dvendor="ARM:82" Dname="ARMCM4"/>
+    </condition>
+
+    <condition id="ARMSC000">
+      <description>Generic ARM SC000 device</description>
+      <require Dvendor="ARM:82" Dname="ARMSC000"/>
+    </condition>
+
+    <condition id="ARMSC300">
+      <description>Generic ARM SC300 device</description>
+      <require Dvendor="ARM:82" Dname="ARMSC300"/>
+    </condition>
+
+    <condition id="CMSIS DSP">
+      <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC, G++ or IAR</description>
+      <require condition="Cortex-M Device"/>
+      <accept Tcompiler="GCC"/>
+      <accept Tcompiler="G++"/>
+      <accept Tcompiler="ARMCC"/>
+      <accept Tcompiler="IAR"/>
+    </condition>
+
+    <condition id="CM0_LE_ARMCC">
+      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
+      <accept Dcore="Cortex-M0"/>
+      <accept Dcore="Cortex-M0+"/>
+      <accept Dcore="SC000"/>
+      <require Dendian="Little-endian"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+
+    <condition id="CM0_BE_ARMCC">
+      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
+      <accept Dcore="Cortex-M0"/>
+      <accept Dcore="Cortex-M0+"/>
+      <accept Dcore="SC000"/>
+      <require Dendian="Big-endian"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+
+    <condition id="CM3_LE_ARMCC">
+      <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
+      <accept Dcore="Cortex-M3"/>
+      <accept Dcore="SC300"/>
+      <require Dendian="Little-endian"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+
+    <condition id="CM3_BE_ARMCC">
+      <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
+      <accept Dcore="Cortex-M3"/>
+      <accept Dcore="SC300"/>
+      <require Dendian="Big-endian"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+
+    <condition id="CM4_LE_ARMCC">
+      <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+
+    <condition id="CM4_BE_ARMCC">
+      <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+
+    <condition id="CM4F_LE_ARMCC">
+      <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
+      <deny Dvendor="Infineon:7" Dname="XMC4*"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+    
+    <!-- XMC 4000 Series devices from Infineon require a special library -->
+    <condition id="CM4F_LE_ARMCC_IFX">
+      <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
+      <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+
+    <condition id="CM4F_BE_ARMCC">
+      <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+
+    <condition id="CM0_LE_GCC">
+      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
+      <accept Dcore="Cortex-M0"/>
+      <accept Dcore="Cortex-M0+"/>
+      <accept Dcore="SC000"/>
+      <require Dendian="Little-endian"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+
+    <condition id="CM3_LE_GCC">
+      <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
+      <accept Dcore="Cortex-M3"/>
+      <accept Dcore="SC300"/>
+      <require Dendian="Little-endian"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+
+    <condition id="CM4_LE_GCC">
+      <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+
+    <condition id="CM4F_LE_GCC">
+      <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
+      <deny Dvendor="Infineon:7" Dname="XMC4*"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+
+    <!-- XMC 4000 Series devices from Infineon require a special library -->
+    <condition id="CM4F_LE_GCC_IFX">
+      <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler and Infineon devices</description>
+      <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+
+    <!-- G++ compiler -->
+    <condition id="CM0_LE_G++">
+      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the G++ Compiler</description>
+      <accept Dcore="Cortex-M0"/>
+      <accept Dcore="Cortex-M0+"/>
+      <accept Dcore="SC000"/>
+      <require Dendian="Little-endian"/>
+      <require Tcompiler="G++"/>
+    </condition>
+
+    <condition id="CM3_LE_G++">
+      <description>Cortex-M3 or SC300 processor based device in little endian mode for the G++ Compiler</description>
+      <accept Dcore="Cortex-M3"/>
+      <accept Dcore="SC300"/>
+      <require Dendian="Little-endian"/>
+      <require Tcompiler="G++"/>
+    </condition>
+
+    <condition id="CM4_LE_G++">
+      <description>Cortex-M4 processor based device in little endian mode for the G++ Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
+      <require Tcompiler="G++"/>
+    </condition>
+
+    <condition id="CM4F_LE_G++">
+      <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the G++ Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
+      <require Tcompiler="G++"/>      
+    </condition>
+
+    <condition id="CM0_LE_IAR">
+      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
+      <accept Dcore="Cortex-M0"/>
+      <accept Dcore="Cortex-M0+"/>
+      <accept Dcore="SC000"/>
+      <require Dendian="Little-endian"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+
+    <condition id="CM0_BE_IAR">
+      <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
+      <accept Dcore="Cortex-M0"/>
+      <accept Dcore="Cortex-M0+"/>
+      <accept Dcore="SC000"/>
+      <require Dendian="Big-endian"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+
+    <condition id="CM3_LE_IAR">
+      <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
+      <accept Dcore="Cortex-M3"/>
+      <accept Dcore="SC300"/>
+      <require Dendian="Little-endian"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+
+    <condition id="CM3_BE_IAR">
+      <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
+      <accept Dcore="Cortex-M3"/>
+      <accept Dcore="SC300"/>
+      <require Dendian="Big-endian"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+
+    <condition id="CM4_LE_IAR">
+      <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+
+    <condition id="CM4_BE_IAR">
+      <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+
+    <condition id="CM4F_LE_IAR">
+      <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+
+    <condition id="CM4F_BE_IAR">
+      <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
+      <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+  </conditions>
+  
+  <components>
+    <!-- CMSIS-Core component -->
+    <component Cclass="CMSIS" Cgroup="CORE" Cversion="3.30.0" condition="CMSIS Core">
+      <description>CMSIS-CORE for Cortex-M, SC000, and SC300</description>
+      <files>
+        <!-- RTX templates -->
+        <file category="source" attr="template" name="CMSIS\UserCodeTemplates\ITM_Retarget.c" select="CMSIS-CORE 'ITM Printf Debug'" condition="Is ARM Compiler"/>
+        <!-- CPU independent -->
+        <file category="doc"     name="CMSIS\Documentation\Core\html\index.html"/>
+        <file category="include" name="CMSIS\Include\"/>
+      </files>
+    </component>
+
+    <!-- CMSIS-Startup component -->
+    <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="Cortex-M CMSIS Device">
+      <!-- Cversion is necessary -->
+      <description>System and Startup for Generic ARM Cortex-Mx devices</description>
+      <files>
+        <!--  include folder -->
+        <file category="header" name="Device\ARM\ARMCM0\Include\ARMCM0.h"                                   condition="ARMCM0"/>
+        <file category="header" name="Device\ARM\ARMCM0plus\Include\ARMCM0plus.h"                           condition="ARMCM0+"/>
+        <file category="header" name="Device\ARM\ARMCM3\Include\ARMCM3.h"                                   condition="ARMCM3"/>
+        <file category="header" name="Device\ARM\ARMCM4\Include\ARMCM4.h"                                   condition="ARMCM4"/>
+        <file category="header" name="Device\ARM\ARMSC000\Include\ARMSC000.h"                               condition="ARMSC000"/>
+        <file category="header" name="Device\ARM\ARMSC300\Include\ARMSC300.h"                               condition="ARMSC300"/>
+
+        <!-- include path for system header not required, as the device header is specified for device -->
+        <!-- startup files -->
+        <file category="source" name="Device\ARM\ARMCM0\Source\ARM\startup_ARMCM0.s"          version="1.0.0" attr="config" condition="ARMCM0"/>
+        <file category="source" name="Device\ARM\ARMCM0plus\Source\ARM\startup_ARMCM0plus.s"  version="1.0.0" attr="config" condition="ARMCM0+"/>
+        <file category="source" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s"          version="1.0.0" attr="config" condition="ARMCM3"/>
+        <file category="source" name="Device\ARM\ARMCM4\Source\ARM\startup_ARMCM4.s"          version="1.0.0" attr="config" condition="ARMCM4"/>
+        <file category="source" name="Device\ARM\ARMSC000\Source\ARM\startup_ARMSC000.s"      version="1.0.0" attr="config" condition="ARMSC000"/>
+        <file category="source" name="Device\ARM\ARMSC300\Source\ARM\startup_ARMSC300.s"      version="1.0.0" attr="config" condition="ARMSC300"/>
+
+        <!-- system file -->
+        <file category="source" name="Device\ARM\ARMCM0\Source\system_ARMCM0.c"               version="1.0.0" attr="config" condition="ARMCM0"/>
+        <file category="source" name="Device\ARM\ARMCM0plus\Source\system_ARMCM0plus.c"       version="1.0.0" attr="config" condition="ARMCM0+"/>
+        <file category="source" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c"               version="1.0.0" attr="config" condition="ARMCM3"/>
+        <file category="source" name="Device\ARM\ARMCM4\Source\system_ARMCM4.c"               version="1.0.0" attr="config" condition="ARMCM4"/>
+        <file category="source" name="Device\ARM\ARMSC000\Source\system_ARMSC000.c"           version="1.0.0" attr="config" condition="ARMSC000"/>
+        <file category="source" name="Device\ARM\ARMSC300\Source\system_ARMSC300.c"           version="1.0.0" attr="config" condition="ARMSC300"/>
+      </files>
+    </component>
+
+
+    <!-- CMSIS-DSP component -->
+    <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.2" condition="CMSIS DSP">
+      <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
+      <files>
+        <!-- CPU independent -->
+        <file category="doc" name="CMSIS\Documentation\DSP\html\index.html"/>
+        <!-- <file category="header" name="CMSIS\Include\arm_common_tables.h"/> -->
+        <file category="header" name="CMSIS\Include\arm_math.h"/>
+        <!-- CPU and Compiler dependent -->
+        <!-- ARMCC -->
+        <file category="library" condition="CM0_LE_ARMCC"  name="CMSIS\Lib\ARM\arm_cortexM0l_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
+        <file category="library" condition="CM0_BE_ARMCC"  name="CMSIS\Lib\ARM\arm_cortexM0b_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
+        <file category="library" condition="CM3_LE_ARMCC"  name="CMSIS\Lib\ARM\arm_cortexM3l_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
+        <file category="library" condition="CM3_BE_ARMCC"  name="CMSIS\Lib\ARM\arm_cortexM3b_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
+        <file category="library" condition="CM4_LE_ARMCC"  name="CMSIS\Lib\ARM\arm_cortexM4l_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
+        <file category="library" condition="CM4_BE_ARMCC"  name="CMSIS\Lib\ARM\arm_cortexM4b_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
+        <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM4lf_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
+        <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM4bf_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
+
+        <!-- GCC -->
+        <file category="library" condition="CM0_LE_GCC"    name="CMSIS\Lib\GCC\libarm_cortexM0l_math.a" src="CMSIS\DSP_Lib\Source\GCC"/>
+        <file category="library" condition="CM3_LE_GCC"    name="CMSIS\Lib\GCC\libarm_cortexM3l_math.a" src="CMSIS\DSP_Lib\Source\GCC"/>
+        <file category="library" condition="CM4_LE_GCC"    name="CMSIS\Lib\GCC\libarm_cortexM4l_math.a" src="CMSIS\DSP_Lib\Source\GCC"/>
+        <file category="library" condition="CM4F_LE_GCC"   name="CMSIS\Lib\GCC\libarm_cortexM4lf_math.a" src="CMSIS\DSP_Lib\Source\GCC"/>
+        <!-- G++ -->
+        <file category="library" condition="CM0_LE_G++"    name="CMSIS\Lib\G++\libarm_cortexM0l_math.a" src="CMSIS\DSP_Lib\Source\G++"/>
+        <file category="library" condition="CM3_LE_G++"    name="CMSIS\Lib\G++\libarm_cortexM3l_math.a" src="CMSIS\DSP_Lib\Source\G++"/>
+        <file category="library" condition="CM4_LE_G++"    name="CMSIS\Lib\G++\libarm_cortexM4l_math.a" src="CMSIS\DSP_Lib\Source\G++"/>
+        <file category="library" condition="CM4F_LE_G++"   name="CMSIS\Lib\G++\libarm_cortexM4lf_math.a" src="CMSIS\DSP_Lib\Source\G++"/>
+      </files>
+    </component>
+
+    <!-- CMSIS-RTOS Keil RTX component -->
+    <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.74.0" condition="CMSIS Core">
+      <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
+      <RTE_Components_h>
+        <!-- the following content goes into file 'RTE_Components.h' -->
+        #define RTE_RTOS_RTX                    /* CMSIS-RTOS Keil RTX */
+      </RTE_Components_h>
+      <files>
+        <!-- CPU independent -->
+        <file category="doc" name="CMSIS_RTX\Doc\index.html"/>
+        <file category="header" name="CMSIS_RTX\INC\cmsis_os.h"/>
+        <file category="source" attr="config"   name="CMSIS_RTX\Templates\RTX_Conf_CM.c" version="4.70"/>
+        
+        <!-- RTX templates -->
+        <file category="header" attr="template" name="CMSIS_RTX\UserCodeTemplates\osObjects.h" select="CMSIS-RTOS 'main' function"/>
+        <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\main.c"      select="CMSIS-RTOS 'main' function"/>
+        <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
+        <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
+        <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
+        <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\Mutex.c"     select="CMSIS-RTOS Mutex"/>
+        <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\Semaphore.c" select="CMSIS-RTOS Semaphore"/>
+        <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\Thread.c"    select="CMSIS-RTOS Thread"/>
+        
+        <!-- CPU and Compiler dependent -->
+        <!-- ARMCC -->
+        <file category="library" condition="CM0_LE_ARMCC"  name="CMSIS_RTX\Lib\ARM\RTX_CM0.lib"   src="CMSIS_RTX\SRC\ARM"/>
+        <file category="library" condition="CM0_BE_ARMCC"  name="CMSIS_RTX\Lib\ARM\RTX_CM0_B.lib" src="CMSIS_RTX\SRC\ARM"/>
+        <file category="library" condition="CM3_LE_ARMCC"  name="CMSIS_RTX\Lib\ARM\RTX_CM3.lib"   src="CMSIS_RTX\SRC\ARM"/>
+        <file category="library" condition="CM3_BE_ARMCC"  name="CMSIS_RTX\Lib\ARM\RTX_CM3_B.lib" src="CMSIS_RTX\SRC\ARM"/>
+        <file category="library" condition="CM4_LE_ARMCC"  name="CMSIS_RTX\Lib\ARM\RTX_CM3.lib"   src="CMSIS_RTX\SRC\ARM"/>
+        <file category="library" condition="CM4_BE_ARMCC"  name="CMSIS_RTX\Lib\ARM\RTX_CM3_B.lib" src="CMSIS_RTX\SRC\ARM"/>
+        <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM4.lib"   src="CMSIS_RTX\SRC\ARM"/>
+        <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM4_B.lib" src="CMSIS_RTX\SRC\ARM"/>
+        <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS_RTX\Lib\ARM\RTX_CM4_IFX.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
+        <!-- GCC -->
+        <file category="library" condition="CM0_LE_GCC"  name="CMSIS_RTX\Lib\GCC\libRTX_CM0.a" src="CMSIS_RTX\SRC\GCC"/>
+        <file category="library" condition="CM3_LE_GCC"  name="CMSIS_RTX\Lib\GCC\libRTX_CM3.a" src="CMSIS_RTX\SRC\GCC"/>
+        <file category="library" condition="CM4_LE_GCC"  name="CMSIS_RTX\Lib\GCC\libRTX_CM3.a" src="CMSIS_RTX\SRC\GCC"/>
+        <file category="library" condition="CM4F_LE_GCC" name="CMSIS_RTX\Lib\GCC\libRTX_CM4.a" src="CMSIS_RTX\SRC\GCC"/>
+        <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS_RTX\Lib\GCC\libRTX_CM4_IFX.a" src="CMSIS\DSP_Lib\Source\GCC"/>
+        <!-- IAR -->
+        <file category="library" condition="CM0_LE_IAR"  name="CMSIS_RTX\Lib\IAR\RTX_CM0.a"   src="CMSIS_RTX\SRC\IAR"/>
+        <file category="library" condition="CM0_BE_IAR"  name="CMSIS_RTX\Lib\IAR\RTX_CM0_B.a" src="CMSIS_RTX\SRC\IAR"/>
+        <file category="library" condition="CM3_LE_IAR"  name="CMSIS_RTX\Lib\IAR\RTX_CM3.a"   src="CMSIS_RTX\SRC\IAR"/>
+        <file category="library" condition="CM3_BE_IAR"  name="CMSIS_RTX\Lib\IAR\RTX_CM3_B.a" src="CMSIS_RTX\SRC\IAR"/>
+        <file category="library" condition="CM4_LE_IAR"  name="CMSIS_RTX\Lib\IAR\RTX_CM3.a"   src="CMSIS_RTX\SRC\IAR"/>
+        <file category="library" condition="CM4_BE_IAR"  name="CMSIS_RTX\Lib\IAR\RTX_CM3_B.a" src="CMSIS_RTX\SRC\IAR"/>
+        <file category="library" condition="CM4F_LE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM4.a"   src="CMSIS_RTX\SRC\IAR"/>
+        <file category="library" condition="CM4F_BE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM4_B.a" src="CMSIS_RTX\SRC\IAR"/>
+      </files>
+    </component>
+  </components>
+</package>
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/arm_common_tables.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/arm_common_tables.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/arm_common_tables.h	(revision 136)
@@ -0,0 +1,98 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+*
+* $Date:        16. October 2013
+* $Revision: 	V1.4.2
+*
+* Project: 	    CMSIS DSP Library
+* Title:	    arm_common_tables.h
+*
+* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_COMMON_TABLES_H
+#define _ARM_COMMON_TABLES_H
+
+#include "arm_math.h"
+
+extern const uint16_t armBitRevTable[1024];
+extern const q15_t armRecipTableQ15[64];
+extern const q31_t armRecipTableQ31[64];
+extern const q31_t realCoefAQ31[1024];
+extern const q31_t realCoefBQ31[1024];
+extern const float32_t twiddleCoef_16[32];
+extern const float32_t twiddleCoef_32[64];
+extern const float32_t twiddleCoef_64[128];
+extern const float32_t twiddleCoef_128[256];
+extern const float32_t twiddleCoef_256[512];
+extern const float32_t twiddleCoef_512[1024];
+extern const float32_t twiddleCoef_1024[2048];
+extern const float32_t twiddleCoef_2048[4096];
+extern const float32_t twiddleCoef_4096[8192];
+#define twiddleCoef twiddleCoef_4096
+extern const q31_t twiddleCoefQ31[6144];
+extern const q15_t twiddleCoefQ15[6144];
+extern const float32_t twiddleCoef_rfft_32[32];
+extern const float32_t twiddleCoef_rfft_64[64];
+extern const float32_t twiddleCoef_rfft_128[128];
+extern const float32_t twiddleCoef_rfft_256[256];
+extern const float32_t twiddleCoef_rfft_512[512];
+extern const float32_t twiddleCoef_rfft_1024[1024];
+extern const float32_t twiddleCoef_rfft_2048[2048];
+extern const float32_t twiddleCoef_rfft_4096[4096];
+
+
+#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
+#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
+#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
+#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
+#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
+#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
+
+/* Tables for Fast Math Sine and Cosine */
+extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
+extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
+extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
+
+#endif /*  ARM_COMMON_TABLES_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/arm_const_structs.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/arm_const_structs.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/arm_const_structs.h	(revision 136)
@@ -0,0 +1,59 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+*
+* $Date:        16. October 2013
+* $Revision: 	V1.4.2
+*
+* Project: 	    CMSIS DSP Library
+* Title:	    arm_const_structs.h
+*
+* Description:	This file has constant structs that are initialized for
+*              user convenience.  For example, some can be given as
+*              arguments to the arm_cfft_f32() function.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/arm_math.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/arm_math.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/arm_math.h	(revision 136)
@@ -0,0 +1,7366 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
+*
+* $Date:        20. February 2014
+* $Revision: 	V1.4.2
+*
+* Project: 	    CMSIS DSP Library
+* Title:	    arm_math.h
+*
+* Description:	Public header file for CMSIS DSP Library
+*
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+ * -------------------------------------------------------------------- */
+
+/**
+   \mainpage CMSIS DSP Software Library
+   *
+   * <b>Introduction</b>
+   *
+   * This user manual describes the CMSIS DSP software library,
+   * a suite of common signal processing functions for use on Cortex-M processor based devices.
+   *
+   * The library is divided into a number of functions each covering a specific category:
+   * - Basic math functions
+   * - Fast math functions
+   * - Complex math functions
+   * - Filters
+   * - Matrix functions
+   * - Transforms
+   * - Motor control functions
+   * - Statistical functions
+   * - Support functions
+   * - Interpolation functions
+   *
+   * The library has separate functions for operating on 8-bit integers, 16-bit integers,
+   * 32-bit integer and 32-bit floating-point values.
+   *
+   * <b>Using the Library</b>
+   *
+   * The library installer contains prebuilt versions of the libraries in the <code>Lib</code> folder.
+   * - arm_cortexM4lf_math.lib (Little endian and Floating Point Unit on Cortex-M4)
+   * - arm_cortexM4bf_math.lib (Big endian and Floating Point Unit on Cortex-M4)
+   * - arm_cortexM4l_math.lib (Little endian on Cortex-M4)
+   * - arm_cortexM4b_math.lib (Big endian on Cortex-M4)
+   * - arm_cortexM3l_math.lib (Little endian on Cortex-M3)
+   * - arm_cortexM3b_math.lib (Big endian on Cortex-M3)
+   * - arm_cortexM0l_math.lib (Little endian on Cortex-M0)
+   * - arm_cortexM0b_math.lib (Big endian on Cortex-M3)
+   *
+   * The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder.
+   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
+   * public header file <code> arm_math.h</code> for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
+   * Define the appropriate pre processor MACRO ARM_MATH_CM4 or  ARM_MATH_CM3 or
+   * ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application.
+   *
+   * <b>Examples</b>
+   *
+   * The library ships with a number of examples which demonstrate how to use the library functions.
+   *
+   * <b>Toolchain Support</b>
+   *
+   * The library has been developed and tested with MDK-ARM version 4.60.
+   * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
+   *
+   * <b>Building the Library</b>
+   *
+   * The library installer contains a project file to re build libraries on MDK-ARM Tool chain in the <code>CMSIS\\DSP_Lib\\Source\\ARM</code> folder.
+   * - arm_cortexM_math.uvproj
+   *
+   *
+   * The libraries can be built by opening the arm_cortexM_math.uvproj project in MDK-ARM, selecting a specific target, and defining the optional pre processor MACROs detailed above.
+   *
+   * <b>Pre-processor Macros</b>
+   *
+   * Each library project have differant pre-processor macros.
+   *
+   * - UNALIGNED_SUPPORT_DISABLE:
+   *
+   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
+   *
+   * - ARM_MATH_BIG_ENDIAN:
+   *
+   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
+   *
+   * - ARM_MATH_MATRIX_CHECK:
+   *
+   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
+   *
+   * - ARM_MATH_ROUNDING:
+   *
+   * Define macro ARM_MATH_ROUNDING for rounding on support functions
+   *
+   * - ARM_MATH_CMx:
+   *
+   * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
+   * and ARM_MATH_CM0 for building library on cortex-M0 target, ARM_MATH_CM0PLUS for building library on cortex-M0+ target.
+   *
+   * - __FPU_PRESENT:
+   *
+   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries
+   *
+   * <b>Copyright Notice</b>
+   *
+   * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+   */
+
+
+/**
+ * @defgroup groupMath Basic Math Functions
+ */
+
+/**
+ * @defgroup groupFastMath Fast Math Functions
+ * This set of functions provides a fast approximation to sine, cosine, and square root.
+ * As compared to most of the other functions in the CMSIS math library, the fast math functions
+ * operate on individual values and not arrays.
+ * There are separate functions for Q15, Q31, and floating-point data.
+ *
+ */
+
+/**
+ * @defgroup groupCmplxMath Complex Math Functions
+ * This set of functions operates on complex data vectors.
+ * The data in the complex arrays is stored in an interleaved fashion
+ * (real, imag, real, imag, ...).
+ * In the API functions, the number of samples in a complex array refers
+ * to the number of complex values; the array contains twice this number of
+ * real values.
+ */
+
+/**
+ * @defgroup groupFilters Filtering Functions
+ */
+
+/**
+ * @defgroup groupMatrix Matrix Functions
+ *
+ * This set of functions provides basic matrix math operations.
+ * The functions operate on matrix data structures.  For example,
+ * the type
+ * definition for the floating-point matrix structure is shown
+ * below:
+ * <pre>
+ *     typedef struct
+ *     {
+ *       uint16_t numRows;     // number of rows of the matrix.
+ *       uint16_t numCols;     // number of columns of the matrix.
+ *       float32_t *pData;     // points to the data of the matrix.
+ *     } arm_matrix_instance_f32;
+ * </pre>
+ * There are similar definitions for Q15 and Q31 data types.
+ *
+ * The structure specifies the size of the matrix and then points to
+ * an array of data.  The array is of size <code>numRows X numCols</code>
+ * and the values are arranged in row order.  That is, the
+ * matrix element (i, j) is stored at:
+ * <pre>
+ *     pData[i*numCols + j]
+ * </pre>
+ *
+ * \par Init Functions
+ * There is an associated initialization function for each type of matrix
+ * data structure.
+ * The initialization function sets the values of the internal structure fields.
+ * Refer to the function <code>arm_mat_init_f32()</code>, <code>arm_mat_init_q31()</code>
+ * and <code>arm_mat_init_q15()</code> for floating-point, Q31 and Q15 types,  respectively.
+ *
+ * \par
+ * Use of the initialization function is optional. However, if initialization function is used
+ * then the instance structure cannot be placed into a const data section.
+ * To place the instance structure in a const data
+ * section, manually initialize the data structure.  For example:
+ * <pre>
+ * <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
+ * <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
+ * <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
+ * </pre>
+ * where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
+ * specifies the number of columns, and <code>pData</code> points to the
+ * data array.
+ *
+ * \par Size Checking
+ * By default all of the matrix functions perform size checking on the input and
+ * output matrices.  For example, the matrix addition function verifies that the
+ * two input matrices and the output matrix all have the same number of rows and
+ * columns.  If the size check fails the functions return:
+ * <pre>
+ *     ARM_MATH_SIZE_MISMATCH
+ * </pre>
+ * Otherwise the functions return
+ * <pre>
+ *     ARM_MATH_SUCCESS
+ * </pre>
+ * There is some overhead associated with this matrix size checking.
+ * The matrix size checking is enabled via the \#define
+ * <pre>
+ *     ARM_MATH_MATRIX_CHECK
+ * </pre>
+ * within the library project settings.  By default this macro is defined
+ * and size checking is enabled.  By changing the project settings and
+ * undefining this macro size checking is eliminated and the functions
+ * run a bit faster.  With size checking disabled the functions always
+ * return <code>ARM_MATH_SUCCESS</code>.
+ */
+
+/**
+ * @defgroup groupTransforms Transform Functions
+ */
+
+/**
+ * @defgroup groupController Controller Functions
+ */
+
+/**
+ * @defgroup groupStats Statistics Functions
+ */
+/**
+ * @defgroup groupSupport Support Functions
+ */
+
+/**
+ * @defgroup groupInterpolation Interpolation Functions
+ * These functions perform 1- and 2-dimensional interpolation of data.
+ * Linear interpolation is used for 1-dimensional data and
+ * bilinear interpolation is used for 2-dimensional data.
+ */
+
+/**
+ * @defgroup groupExamples Examples
+ */
+#ifndef _ARM_MATH_H
+#define _ARM_MATH_H
+
+#define __CMSIS_GENERIC         /* disable NVIC and Systick functions */
+
+#if defined (ARM_MATH_CM4)
+#include "core_cm4.h"
+#elif defined (ARM_MATH_CM3)
+#include "core_cm3.h"
+#elif defined (ARM_MATH_CM0)
+#include "core_cm0.h"
+#define ARM_MATH_CM0_FAMILY
+#elif defined (ARM_MATH_CM0PLUS)
+#include "core_cm0plus.h"
+#define ARM_MATH_CM0_FAMILY
+#else
+#include "ARMCM4.h"
+#warning "Define either ARM_MATH_CM4 OR ARM_MATH_CM3...By Default building on ARM_MATH_CM4....."
+#endif
+
+#undef  __CMSIS_GENERIC         /* enable NVIC and Systick functions */
+#include "string.h"
+#include "math.h"
+#ifdef	__cplusplus
+extern "C"
+{
+#endif
+
+
+  /**
+   * @brief Macros required for reciprocal calculation in Normalized LMS
+   */
+
+#define DELTA_Q31 			(0x100)
+#define DELTA_Q15 			0x5
+#define INDEX_MASK 			0x0000003F
+#ifndef PI
+#define PI					3.14159265358979f
+#endif
+
+  /**
+   * @brief Macros required for SINE and COSINE Fast math approximations
+   */
+
+#define FAST_MATH_TABLE_SIZE  512
+#define FAST_MATH_Q31_SHIFT   (32 - 10)
+#define FAST_MATH_Q15_SHIFT   (16 - 10)
+#define CONTROLLER_Q31_SHIFT  (32 - 9)
+#define TABLE_SIZE  256
+#define TABLE_SPACING_Q31	   0x400000
+#define TABLE_SPACING_Q15	   0x80
+
+  /**
+   * @brief Macros required for SINE and COSINE Controller functions
+   */
+  /* 1.31(q31) Fixed value of 2/360 */
+  /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
+#define INPUT_SPACING			0xB60B61
+
+  /**
+   * @brief Macro for Unaligned Support
+   */
+#ifndef UNALIGNED_SUPPORT_DISABLE
+    #define ALIGN4
+#else
+  #if defined  (__GNUC__)
+    #define ALIGN4 __attribute__((aligned(4)))
+  #else
+    #define ALIGN4 __align(4)
+  #endif
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
+
+  /**
+   * @brief Error status returned by some functions in the library.
+   */
+
+  typedef enum
+  {
+    ARM_MATH_SUCCESS = 0,                /**< No error */
+    ARM_MATH_ARGUMENT_ERROR = -1,        /**< One or more arguments are incorrect */
+    ARM_MATH_LENGTH_ERROR = -2,          /**< Length of data buffer is incorrect */
+    ARM_MATH_SIZE_MISMATCH = -3,         /**< Size of matrices is not compatible with the operation. */
+    ARM_MATH_NANINF = -4,                /**< Not-a-number (NaN) or infinity is generated */
+    ARM_MATH_SINGULAR = -5,              /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
+    ARM_MATH_TEST_FAILURE = -6           /**< Test Failed  */
+  } arm_status;
+
+  /**
+   * @brief 8-bit fractional data type in 1.7 format.
+   */
+  typedef int8_t q7_t;
+
+  /**
+   * @brief 16-bit fractional data type in 1.15 format.
+   */
+  typedef int16_t q15_t;
+
+  /**
+   * @brief 32-bit fractional data type in 1.31 format.
+   */
+  typedef int32_t q31_t;
+
+  /**
+   * @brief 64-bit fractional data type in 1.63 format.
+   */
+  typedef int64_t q63_t;
+
+  /**
+   * @brief 32-bit floating-point type definition.
+   */
+  typedef float float32_t;
+
+  /**
+   * @brief 64-bit floating-point type definition.
+   */
+  typedef double float64_t;
+
+  /**
+   * @brief definition to read/write two 16 bit values.
+   */
+#if defined __CC_ARM
+#define __SIMD32_TYPE int32_t __packed
+#define CMSIS_UNUSED __attribute__((unused))
+#elif defined __ICCARM__
+#define CMSIS_UNUSED
+#define __SIMD32_TYPE int32_t __packed
+#elif defined __GNUC__
+#define __SIMD32_TYPE int32_t
+#define CMSIS_UNUSED __attribute__((unused))
+#elif defined __CSMC__			/* Cosmic */
+#define CMSIS_UNUSED
+#define __SIMD32_TYPE int32_t
+#else
+#error Unknown compiler
+#endif
+
+#define __SIMD32(addr)  (*(__SIMD32_TYPE **) & (addr))
+#define __SIMD32_CONST(addr)  ((__SIMD32_TYPE *)(addr))
+
+#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE *)  (addr))
+
+#define __SIMD64(addr)  (*(int64_t **) & (addr))
+
+#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
+  /**
+   * @brief definition to pack two 16 bit values.
+   */
+#define __PKHBT(ARG1, ARG2, ARG3)      ( (((int32_t)(ARG1) <<  0) & (int32_t)0x0000FFFF) | \
+                                         (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
+#define __PKHTB(ARG1, ARG2, ARG3)      ( (((int32_t)(ARG1) <<  0) & (int32_t)0xFFFF0000) | \
+                                         (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )
+
+#endif
+
+
+   /**
+   * @brief definition to pack four 8 bit values.
+   */
+#ifndef ARM_MATH_BIG_ENDIAN
+
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) |	\
+                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) |	\
+							    (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) |	\
+							    (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
+#else
+
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) |	\
+                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) |	\
+							    (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) |	\
+							    (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
+
+#endif
+
+
+  /**
+   * @brief Clips Q63 to Q31 values.
+   */
+  static __INLINE q31_t clip_q63_to_q31(
+  q63_t x)
+  {
+    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+      ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
+  }
+
+  /**
+   * @brief Clips Q63 to Q15 values.
+   */
+  static __INLINE q15_t clip_q63_to_q15(
+  q63_t x)
+  {
+    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+      ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
+  }
+
+  /**
+   * @brief Clips Q31 to Q7 values.
+   */
+  static __INLINE q7_t clip_q31_to_q7(
+  q31_t x)
+  {
+    return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
+      ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
+  }
+
+  /**
+   * @brief Clips Q31 to Q15 values.
+   */
+  static __INLINE q15_t clip_q31_to_q15(
+  q31_t x)
+  {
+    return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
+      ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
+  }
+
+  /**
+   * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
+   */
+
+  static __INLINE q63_t mult32x64(
+  q63_t x,
+  q31_t y)
+  {
+    return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
+            (((q63_t) (x >> 32) * y)));
+  }
+
+
+#if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM   )
+#define __CLZ __clz
+#endif
+
+#if defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__)) ||(defined (__GNUC__)) || defined (__TASKING__) )
+
+  static __INLINE uint32_t __CLZ(
+  q31_t data);
+
+
+  static __INLINE uint32_t __CLZ(
+  q31_t data)
+  {
+    uint32_t count = 0;
+    uint32_t mask = 0x80000000;
+
+    while((data & mask) == 0)
+    {
+      count += 1u;
+      mask = mask >> 1u;
+    }
+
+    return (count);
+
+  }
+
+#endif
+
+  /**
+   * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
+   */
+
+  static __INLINE uint32_t arm_recip_q31(
+  q31_t in,
+  q31_t * dst,
+  q31_t * pRecipTable)
+  {
+
+    uint32_t out, tempVal;
+    uint32_t index, i;
+    uint32_t signBits;
+
+    if(in > 0)
+    {
+      signBits = __CLZ(in) - 1;
+    }
+    else
+    {
+      signBits = __CLZ(-in) - 1;
+    }
+
+    /* Convert input sample to 1.31 format */
+    in = in << signBits;
+
+    /* calculation of index for initial approximated Val */
+    index = (uint32_t) (in >> 24u);
+    index = (index & INDEX_MASK);
+
+    /* 1.31 with exp 1 */
+    out = pRecipTable[index];
+
+    /* calculation of reciprocal value */
+    /* running approximation for two iterations */
+    for (i = 0u; i < 2u; i++)
+    {
+      tempVal = (q31_t) (((q63_t) in * out) >> 31u);
+      tempVal = 0x7FFFFFFF - tempVal;
+      /*      1.31 with exp 1 */
+      //out = (q31_t) (((q63_t) out * tempVal) >> 30u);
+      out = (q31_t) clip_q63_to_q31(((q63_t) out * tempVal) >> 30u);
+    }
+
+    /* write output */
+    *dst = out;
+
+    /* return num of signbits of out = 1/in value */
+    return (signBits + 1u);
+
+  }
+
+  /**
+   * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
+   */
+  static __INLINE uint32_t arm_recip_q15(
+  q15_t in,
+  q15_t * dst,
+  q15_t * pRecipTable)
+  {
+
+    uint32_t out = 0, tempVal = 0;
+    uint32_t index = 0, i = 0;
+    uint32_t signBits = 0;
+
+    if(in > 0)
+    {
+      signBits = __CLZ(in) - 17;
+    }
+    else
+    {
+      signBits = __CLZ(-in) - 17;
+    }
+
+    /* Convert input sample to 1.15 format */
+    in = in << signBits;
+
+    /* calculation of index for initial approximated Val */
+    index = in >> 8;
+    index = (index & INDEX_MASK);
+
+    /*      1.15 with exp 1  */
+    out = pRecipTable[index];
+
+    /* calculation of reciprocal value */
+    /* running approximation for two iterations */
+    for (i = 0; i < 2; i++)
+    {
+      tempVal = (q15_t) (((q31_t) in * out) >> 15);
+      tempVal = 0x7FFF - tempVal;
+      /*      1.15 with exp 1 */
+      out = (q15_t) (((q31_t) out * tempVal) >> 14);
+    }
+
+    /* write output */
+    *dst = out;
+
+    /* return num of signbits of out = 1/in value */
+    return (signBits + 1);
+
+  }
+
+
+  /*
+   * @brief C custom defined intrinisic function for only M0 processors
+   */
+#if defined(ARM_MATH_CM0_FAMILY)
+
+  static __INLINE q31_t __SSAT(
+  q31_t x,
+  uint32_t y)
+  {
+    int32_t posMax, negMin;
+    uint32_t i;
+
+    posMax = 1;
+    for (i = 0; i < (y - 1); i++)
+    {
+      posMax = posMax * 2;
+    }
+
+    if(x > 0)
+    {
+      posMax = (posMax - 1);
+
+      if(x > posMax)
+      {
+        x = posMax;
+      }
+    }
+    else
+    {
+      negMin = -posMax;
+
+      if(x < negMin)
+      {
+        x = negMin;
+      }
+    }
+    return (x);
+
+
+  }
+
+#endif /* end of ARM_MATH_CM0_FAMILY */
+
+
+
+  /*
+   * @brief C custom defined intrinsic function for M3 and M0 processors
+   */
+#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
+
+  /*
+   * @brief C custom defined QADD8 for M3 and M0 processors
+   */
+  static __INLINE q31_t __QADD8(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t sum;
+    q7_t r, s, t, u;
+
+    r = (q7_t) x;
+    s = (q7_t) y;
+
+    r = __SSAT((q31_t) (r + s), 8);
+    s = __SSAT(((q31_t) (((x << 16) >> 24) + ((y << 16) >> 24))), 8);
+    t = __SSAT(((q31_t) (((x << 8) >> 24) + ((y << 8) >> 24))), 8);
+    u = __SSAT(((q31_t) ((x >> 24) + (y >> 24))), 8);
+
+    sum =
+      (((q31_t) u << 24) & 0xFF000000) | (((q31_t) t << 16) & 0x00FF0000) |
+      (((q31_t) s << 8) & 0x0000FF00) | (r & 0x000000FF);
+
+    return sum;
+
+  }
+
+  /*
+   * @brief C custom defined QSUB8 for M3 and M0 processors
+   */
+  static __INLINE q31_t __QSUB8(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t sum;
+    q31_t r, s, t, u;
+
+    r = (q7_t) x;
+    s = (q7_t) y;
+
+    r = __SSAT((r - s), 8);
+    s = __SSAT(((q31_t) (((x << 16) >> 24) - ((y << 16) >> 24))), 8) << 8;
+    t = __SSAT(((q31_t) (((x << 8) >> 24) - ((y << 8) >> 24))), 8) << 16;
+    u = __SSAT(((q31_t) ((x >> 24) - (y >> 24))), 8) << 24;
+
+    sum =
+      (u & 0xFF000000) | (t & 0x00FF0000) | (s & 0x0000FF00) | (r &
+                                                                0x000000FF);
+
+    return sum;
+  }
+
+  /*
+   * @brief C custom defined QADD16 for M3 and M0 processors
+   */
+
+  /*
+   * @brief C custom defined QADD16 for M3 and M0 processors
+   */
+  static __INLINE q31_t __QADD16(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t sum;
+    q31_t r, s;
+
+    r = (q15_t) x;
+    s = (q15_t) y;
+
+    r = __SSAT(r + s, 16);
+    s = __SSAT(((q31_t) ((x >> 16) + (y >> 16))), 16) << 16;
+
+    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
+
+    return sum;
+
+  }
+
+  /*
+   * @brief C custom defined SHADD16 for M3 and M0 processors
+   */
+  static __INLINE q31_t __SHADD16(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t sum;
+    q31_t r, s;
+
+    r = (q15_t) x;
+    s = (q15_t) y;
+
+    r = ((r >> 1) + (s >> 1));
+    s = ((q31_t) ((x >> 17) + (y >> 17))) << 16;
+
+    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
+
+    return sum;
+
+  }
+
+  /*
+   * @brief C custom defined QSUB16 for M3 and M0 processors
+   */
+  static __INLINE q31_t __QSUB16(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t sum;
+    q31_t r, s;
+
+    r = (q15_t) x;
+    s = (q15_t) y;
+
+    r = __SSAT(r - s, 16);
+    s = __SSAT(((q31_t) ((x >> 16) - (y >> 16))), 16) << 16;
+
+    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
+
+    return sum;
+  }
+
+  /*
+   * @brief C custom defined SHSUB16 for M3 and M0 processors
+   */
+  static __INLINE q31_t __SHSUB16(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t diff;
+    q31_t r, s;
+
+    r = (q15_t) x;
+    s = (q15_t) y;
+
+    r = ((r >> 1) - (s >> 1));
+    s = (((x >> 17) - (y >> 17)) << 16);
+
+    diff = (s & 0xFFFF0000) | (r & 0x0000FFFF);
+
+    return diff;
+  }
+
+  /*
+   * @brief C custom defined QASX for M3 and M0 processors
+   */
+  static __INLINE q31_t __QASX(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t sum = 0;
+
+    sum =
+      ((sum +
+        clip_q31_to_q15((q31_t) ((q15_t) (x >> 16) + (q15_t) y))) << 16) +
+      clip_q31_to_q15((q31_t) ((q15_t) x - (q15_t) (y >> 16)));
+
+    return sum;
+  }
+
+  /*
+   * @brief C custom defined SHASX for M3 and M0 processors
+   */
+  static __INLINE q31_t __SHASX(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t sum;
+    q31_t r, s;
+
+    r = (q15_t) x;
+    s = (q15_t) y;
+
+    r = ((r >> 1) - (y >> 17));
+    s = (((x >> 17) + (s >> 1)) << 16);
+
+    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
+
+    return sum;
+  }
+
+
+  /*
+   * @brief C custom defined QSAX for M3 and M0 processors
+   */
+  static __INLINE q31_t __QSAX(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t sum = 0;
+
+    sum =
+      ((sum +
+        clip_q31_to_q15((q31_t) ((q15_t) (x >> 16) - (q15_t) y))) << 16) +
+      clip_q31_to_q15((q31_t) ((q15_t) x + (q15_t) (y >> 16)));
+
+    return sum;
+  }
+
+  /*
+   * @brief C custom defined SHSAX for M3 and M0 processors
+   */
+  static __INLINE q31_t __SHSAX(
+  q31_t x,
+  q31_t y)
+  {
+
+    q31_t sum;
+    q31_t r, s;
+
+    r = (q15_t) x;
+    s = (q15_t) y;
+
+    r = ((r >> 1) + (y >> 17));
+    s = (((x >> 17) - (s >> 1)) << 16);
+
+    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
+
+    return sum;
+  }
+
+  /*
+   * @brief C custom defined SMUSDX for M3 and M0 processors
+   */
+  static __INLINE q31_t __SMUSDX(
+  q31_t x,
+  q31_t y)
+  {
+
+    return ((q31_t) (((q15_t) x * (q15_t) (y >> 16)) -
+                     ((q15_t) (x >> 16) * (q15_t) y)));
+  }
+
+  /*
+   * @brief C custom defined SMUADX for M3 and M0 processors
+   */
+  static __INLINE q31_t __SMUADX(
+  q31_t x,
+  q31_t y)
+  {
+
+    return ((q31_t) (((q15_t) x * (q15_t) (y >> 16)) +
+                     ((q15_t) (x >> 16) * (q15_t) y)));
+  }
+
+  /*
+   * @brief C custom defined QADD for M3 and M0 processors
+   */
+  static __INLINE q31_t __QADD(
+  q31_t x,
+  q31_t y)
+  {
+    return clip_q63_to_q31((q63_t) x + y);
+  }
+
+  /*
+   * @brief C custom defined QSUB for M3 and M0 processors
+   */
+  static __INLINE q31_t __QSUB(
+  q31_t x,
+  q31_t y)
+  {
+    return clip_q63_to_q31((q63_t) x - y);
+  }
+
+  /*
+   * @brief C custom defined SMLAD for M3 and M0 processors
+   */
+  static __INLINE q31_t __SMLAD(
+  q31_t x,
+  q31_t y,
+  q31_t sum)
+  {
+
+    return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) +
+            ((q15_t) x * (q15_t) y));
+  }
+
+  /*
+   * @brief C custom defined SMLADX for M3 and M0 processors
+   */
+  static __INLINE q31_t __SMLADX(
+  q31_t x,
+  q31_t y,
+  q31_t sum)
+  {
+
+    return (sum + ((q15_t) (x >> 16) * (q15_t) (y)) +
+            ((q15_t) x * (q15_t) (y >> 16)));
+  }
+
+  /*
+   * @brief C custom defined SMLSDX for M3 and M0 processors
+   */
+  static __INLINE q31_t __SMLSDX(
+  q31_t x,
+  q31_t y,
+  q31_t sum)
+  {
+
+    return (sum - ((q15_t) (x >> 16) * (q15_t) (y)) +
+            ((q15_t) x * (q15_t) (y >> 16)));
+  }
+
+  /*
+   * @brief C custom defined SMLALD for M3 and M0 processors
+   */
+  static __INLINE q63_t __SMLALD(
+  q31_t x,
+  q31_t y,
+  q63_t sum)
+  {
+
+    return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) +
+            ((q15_t) x * (q15_t) y));
+  }
+
+  /*
+   * @brief C custom defined SMLALDX for M3 and M0 processors
+   */
+  static __INLINE q63_t __SMLALDX(
+  q31_t x,
+  q31_t y,
+  q63_t sum)
+  {
+
+    return (sum + ((q15_t) (x >> 16) * (q15_t) y)) +
+      ((q15_t) x * (q15_t) (y >> 16));
+  }
+
+  /*
+   * @brief C custom defined SMUAD for M3 and M0 processors
+   */
+  static __INLINE q31_t __SMUAD(
+  q31_t x,
+  q31_t y)
+  {
+
+    return (((x >> 16) * (y >> 16)) +
+            (((x << 16) >> 16) * ((y << 16) >> 16)));
+  }
+
+  /*
+   * @brief C custom defined SMUSD for M3 and M0 processors
+   */
+  static __INLINE q31_t __SMUSD(
+  q31_t x,
+  q31_t y)
+  {
+
+    return (-((x >> 16) * (y >> 16)) +
+            (((x << 16) >> 16) * ((y << 16) >> 16)));
+  }
+
+
+  /*
+   * @brief C custom defined SXTB16 for M3 and M0 processors
+   */
+  static __INLINE q31_t __SXTB16(
+  q31_t x)
+  {
+
+    return ((((x << 24) >> 24) & 0x0000FFFF) |
+            (((x << 8) >> 8) & 0xFFFF0000));
+  }
+
+
+#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
+
+
+  /**
+   * @brief Instance structure for the Q7 FIR filter.
+   */
+  typedef struct
+  {
+    uint16_t numTaps;        /**< number of filter coefficients in the filter. */
+    q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+  } arm_fir_instance_q7;
+
+  /**
+   * @brief Instance structure for the Q15 FIR filter.
+   */
+  typedef struct
+  {
+    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
+    q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+  } arm_fir_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR filter.
+   */
+  typedef struct
+  {
+    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
+    q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */
+  } arm_fir_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR filter.
+   */
+  typedef struct
+  {
+    uint16_t numTaps;     /**< number of filter coefficients in the filter. */
+    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+  } arm_fir_instance_f32;
+
+
+  /**
+   * @brief Processing function for the Q7 FIR filter.
+   * @param[in] *S points to an instance of the Q7 FIR filter structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+  void arm_fir_q7(
+  const arm_fir_instance_q7 * S,
+  q7_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q7 FIR filter.
+   * @param[in,out] *S points to an instance of the Q7 FIR structure.
+   * @param[in] numTaps  Number of filter coefficients in the filter.
+   * @param[in] *pCoeffs points to the filter coefficients.
+   * @param[in] *pState points to the state buffer.
+   * @param[in] blockSize number of samples that are processed.
+   * @return none
+   */
+  void arm_fir_init_q7(
+  arm_fir_instance_q7 * S,
+  uint16_t numTaps,
+  q7_t * pCoeffs,
+  q7_t * pState,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 FIR filter.
+   * @param[in] *S points to an instance of the Q15 FIR structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+  void arm_fir_q15(
+  const arm_fir_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
+   * @param[in] *S points to an instance of the Q15 FIR filter structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+  void arm_fir_fast_q15(
+  const arm_fir_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q15 FIR filter.
+   * @param[in,out] *S points to an instance of the Q15 FIR filter structure.
+   * @param[in] numTaps  Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
+   * @param[in] *pCoeffs points to the filter coefficients.
+   * @param[in] *pState points to the state buffer.
+   * @param[in] blockSize number of samples that are processed at a time.
+   * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
+   * <code>numTaps</code> is not a supported value.
+   */
+
+  arm_status arm_fir_init_q15(
+  arm_fir_instance_q15 * S,
+  uint16_t numTaps,
+  q15_t * pCoeffs,
+  q15_t * pState,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 FIR filter.
+   * @param[in] *S points to an instance of the Q31 FIR filter structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+  void arm_fir_q31(
+  const arm_fir_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
+   * @param[in] *S points to an instance of the Q31 FIR structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+  void arm_fir_fast_q31(
+  const arm_fir_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q31 FIR filter.
+   * @param[in,out] *S points to an instance of the Q31 FIR structure.
+   * @param[in] 	numTaps  Number of filter coefficients in the filter.
+   * @param[in] 	*pCoeffs points to the filter coefficients.
+   * @param[in] 	*pState points to the state buffer.
+   * @param[in] 	blockSize number of samples that are processed at a time.
+   * @return 		none.
+   */
+  void arm_fir_init_q31(
+  arm_fir_instance_q31 * S,
+  uint16_t numTaps,
+  q31_t * pCoeffs,
+  q31_t * pState,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the floating-point FIR filter.
+   * @param[in] *S points to an instance of the floating-point FIR structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+  void arm_fir_f32(
+  const arm_fir_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point FIR filter.
+   * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
+   * @param[in] 	numTaps  Number of filter coefficients in the filter.
+   * @param[in] 	*pCoeffs points to the filter coefficients.
+   * @param[in] 	*pState points to the state buffer.
+   * @param[in] 	blockSize number of samples that are processed at a time.
+   * @return    	none.
+   */
+  void arm_fir_init_f32(
+  arm_fir_instance_f32 * S,
+  uint16_t numTaps,
+  float32_t * pCoeffs,
+  float32_t * pState,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q15 Biquad cascade filter.
+   */
+  typedef struct
+  {
+    int8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+    q15_t *pState;            /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    q15_t *pCoeffs;           /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+    int8_t postShift;         /**< Additional shift, in bits, applied to each output sample. */
+
+  } arm_biquad_casd_df1_inst_q15;
+
+
+  /**
+   * @brief Instance structure for the Q31 Biquad cascade filter.
+   */
+  typedef struct
+  {
+    uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+    q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+    uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */
+
+  } arm_biquad_casd_df1_inst_q31;
+
+  /**
+   * @brief Instance structure for the floating-point Biquad cascade filter.
+   */
+  typedef struct
+  {
+    uint32_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+    float32_t *pState;          /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    float32_t *pCoeffs;         /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+
+
+  } arm_biquad_casd_df1_inst_f32;
+
+
+
+  /**
+   * @brief Processing function for the Q15 Biquad cascade filter.
+   * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.
+   * @param[in]  *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in]  blockSize number of samples to process.
+   * @return     none.
+   */
+
+  void arm_biquad_cascade_df1_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q15 Biquad cascade filter.
+   * @param[in,out] *S           points to an instance of the Q15 Biquad cascade structure.
+   * @param[in]     numStages    number of 2nd order stages in the filter.
+   * @param[in]     *pCoeffs     points to the filter coefficients.
+   * @param[in]     *pState      points to the state buffer.
+   * @param[in]     postShift    Shift to be applied to the output. Varies according to the coefficients format
+   * @return        none
+   */
+
+  void arm_biquad_cascade_df1_init_q15(
+  arm_biquad_casd_df1_inst_q15 * S,
+  uint8_t numStages,
+  q15_t * pCoeffs,
+  q15_t * pState,
+  int8_t postShift);
+
+
+  /**
+   * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+   * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.
+   * @param[in]  *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in]  blockSize number of samples to process.
+   * @return     none.
+   */
+
+  void arm_biquad_cascade_df1_fast_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 Biquad cascade filter
+   * @param[in]  *S         points to an instance of the Q31 Biquad cascade structure.
+   * @param[in]  *pSrc      points to the block of input data.
+   * @param[out] *pDst      points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   * @return     none.
+   */
+
+  void arm_biquad_cascade_df1_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+   * @param[in]  *S         points to an instance of the Q31 Biquad cascade structure.
+   * @param[in]  *pSrc      points to the block of input data.
+   * @param[out] *pDst      points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   * @return     none.
+   */
+
+  void arm_biquad_cascade_df1_fast_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q31 Biquad cascade filter.
+   * @param[in,out] *S           points to an instance of the Q31 Biquad cascade structure.
+   * @param[in]     numStages      number of 2nd order stages in the filter.
+   * @param[in]     *pCoeffs     points to the filter coefficients.
+   * @param[in]     *pState      points to the state buffer.
+   * @param[in]     postShift    Shift to be applied to the output. Varies according to the coefficients format
+   * @return        none
+   */
+
+  void arm_biquad_cascade_df1_init_q31(
+  arm_biquad_casd_df1_inst_q31 * S,
+  uint8_t numStages,
+  q31_t * pCoeffs,
+  q31_t * pState,
+  int8_t postShift);
+
+  /**
+   * @brief Processing function for the floating-point Biquad cascade filter.
+   * @param[in]  *S         points to an instance of the floating-point Biquad cascade structure.
+   * @param[in]  *pSrc      points to the block of input data.
+   * @param[out] *pDst      points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   * @return     none.
+   */
+
+  void arm_biquad_cascade_df1_f32(
+  const arm_biquad_casd_df1_inst_f32 * S,
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point Biquad cascade filter.
+   * @param[in,out] *S           points to an instance of the floating-point Biquad cascade structure.
+   * @param[in]     numStages    number of 2nd order stages in the filter.
+   * @param[in]     *pCoeffs     points to the filter coefficients.
+   * @param[in]     *pState      points to the state buffer.
+   * @return        none
+   */
+
+  void arm_biquad_cascade_df1_init_f32(
+  arm_biquad_casd_df1_inst_f32 * S,
+  uint8_t numStages,
+  float32_t * pCoeffs,
+  float32_t * pState);
+
+
+  /**
+   * @brief Instance structure for the floating-point matrix structure.
+   */
+
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    float32_t *pData;     /**< points to the data of the matrix. */
+  } arm_matrix_instance_f32;
+
+  /**
+   * @brief Instance structure for the Q15 matrix structure.
+   */
+
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    q15_t *pData;         /**< points to the data of the matrix. */
+
+  } arm_matrix_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 matrix structure.
+   */
+
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    q31_t *pData;         /**< points to the data of the matrix. */
+
+  } arm_matrix_instance_q31;
+
+
+
+  /**
+   * @brief Floating-point matrix addition.
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_add_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix addition.
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_add_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+  arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix addition.
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_add_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+  arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point, complex, matrix multiplication.
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_cmplx_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15, complex,  matrix multiplication.
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_cmplx_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+  arm_matrix_instance_q15 * pDst,
+  q15_t * pScratch);
+
+  /**
+   * @brief Q31, complex, matrix multiplication.
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_cmplx_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+  arm_matrix_instance_q31 * pDst);
+
+
+  /**
+   * @brief Floating-point matrix transpose.
+   * @param[in]  *pSrc points to the input matrix
+   * @param[out] *pDst points to the output matrix
+   * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pDst);
+
+
+  /**
+   * @brief Q15 matrix transpose.
+   * @param[in]  *pSrc points to the input matrix
+   * @param[out] *pDst points to the output matrix
+   * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_trans_q15(
+  const arm_matrix_instance_q15 * pSrc,
+  arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix transpose.
+   * @param[in]  *pSrc points to the input matrix
+   * @param[out] *pDst points to the output matrix
+   * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_trans_q31(
+  const arm_matrix_instance_q31 * pSrc,
+  arm_matrix_instance_q31 * pDst);
+
+
+  /**
+   * @brief Floating-point matrix multiplication
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix multiplication
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @param[in]		 *pState points to the array for storing intermediate results
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+  arm_matrix_instance_q15 * pDst,
+  q15_t * pState);
+
+  /**
+   * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+   * @param[in]       *pSrcA  points to the first input matrix structure
+   * @param[in]       *pSrcB  points to the second input matrix structure
+   * @param[out]      *pDst   points to output matrix structure
+   * @param[in]		  *pState points to the array for storing intermediate results
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_mult_fast_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+  arm_matrix_instance_q15 * pDst,
+  q15_t * pState);
+
+  /**
+   * @brief Q31 matrix multiplication
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+  arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_mult_fast_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+  arm_matrix_instance_q31 * pDst);
+
+
+  /**
+   * @brief Floating-point matrix subtraction
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_sub_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix subtraction
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_sub_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+  arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix subtraction
+   * @param[in]       *pSrcA points to the first input matrix structure
+   * @param[in]       *pSrcB points to the second input matrix structure
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_sub_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+  arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point matrix scaling.
+   * @param[in]  *pSrc points to the input matrix
+   * @param[in]  scale scale factor
+   * @param[out] *pDst points to the output matrix
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_scale_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  float32_t scale,
+  arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix scaling.
+   * @param[in]       *pSrc points to input matrix
+   * @param[in]       scaleFract fractional portion of the scale factor
+   * @param[in]       shift number of bits to shift the result by
+   * @param[out]      *pDst points to output matrix
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_scale_q15(
+  const arm_matrix_instance_q15 * pSrc,
+  q15_t scaleFract,
+  int32_t shift,
+  arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix scaling.
+   * @param[in]       *pSrc points to input matrix
+   * @param[in]       scaleFract fractional portion of the scale factor
+   * @param[in]       shift number of bits to shift the result by
+   * @param[out]      *pDst points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+
+  arm_status arm_mat_scale_q31(
+  const arm_matrix_instance_q31 * pSrc,
+  q31_t scaleFract,
+  int32_t shift,
+  arm_matrix_instance_q31 * pDst);
+
+
+  /**
+   * @brief  Q31 matrix initialization.
+   * @param[in,out] *S             points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows          number of rows in the matrix.
+   * @param[in]     nColumns       number of columns in the matrix.
+   * @param[in]     *pData	       points to the matrix data array.
+   * @return        none
+   */
+
+  void arm_mat_init_q31(
+  arm_matrix_instance_q31 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  q31_t * pData);
+
+  /**
+   * @brief  Q15 matrix initialization.
+   * @param[in,out] *S             points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows          number of rows in the matrix.
+   * @param[in]     nColumns       number of columns in the matrix.
+   * @param[in]     *pData	       points to the matrix data array.
+   * @return        none
+   */
+
+  void arm_mat_init_q15(
+  arm_matrix_instance_q15 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  q15_t * pData);
+
+  /**
+   * @brief  Floating-point matrix initialization.
+   * @param[in,out] *S             points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows          number of rows in the matrix.
+   * @param[in]     nColumns       number of columns in the matrix.
+   * @param[in]     *pData	       points to the matrix data array.
+   * @return        none
+   */
+
+  void arm_mat_init_f32(
+  arm_matrix_instance_f32 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  float32_t * pData);
+
+
+
+  /**
+   * @brief Instance structure for the Q15 PID Control.
+   */
+  typedef struct
+  {
+    q15_t A0;    /**< The derived gain, A0 = Kp + Ki + Kd . */
+#ifdef ARM_MATH_CM0_FAMILY
+    q15_t A1;
+    q15_t A2;
+#else
+    q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
+#endif
+    q15_t state[3];       /**< The state array of length 3. */
+    q15_t Kp;           /**< The proportional gain. */
+    q15_t Ki;           /**< The integral gain. */
+    q15_t Kd;           /**< The derivative gain. */
+  } arm_pid_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 PID Control.
+   */
+  typedef struct
+  {
+    q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */
+    q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */
+    q31_t A2;            /**< The derived gain, A2 = Kd . */
+    q31_t state[3];      /**< The state array of length 3. */
+    q31_t Kp;            /**< The proportional gain. */
+    q31_t Ki;            /**< The integral gain. */
+    q31_t Kd;            /**< The derivative gain. */
+
+  } arm_pid_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point PID Control.
+   */
+  typedef struct
+  {
+    float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */
+    float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */
+    float32_t A2;          /**< The derived gain, A2 = Kd . */
+    float32_t state[3];    /**< The state array of length 3. */
+    float32_t Kp;               /**< The proportional gain. */
+    float32_t Ki;               /**< The integral gain. */
+    float32_t Kd;               /**< The derivative gain. */
+  } arm_pid_instance_f32;
+
+
+
+  /**
+   * @brief  Initialization function for the floating-point PID Control.
+   * @param[in,out] *S      points to an instance of the PID structure.
+   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+   * @return none.
+   */
+  void arm_pid_init_f32(
+  arm_pid_instance_f32 * S,
+  int32_t resetStateFlag);
+
+  /**
+   * @brief  Reset function for the floating-point PID Control.
+   * @param[in,out] *S is an instance of the floating-point PID Control structure
+   * @return none
+   */
+  void arm_pid_reset_f32(
+  arm_pid_instance_f32 * S);
+
+
+  /**
+   * @brief  Initialization function for the Q31 PID Control.
+   * @param[in,out] *S points to an instance of the Q15 PID structure.
+   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+   * @return none.
+   */
+  void arm_pid_init_q31(
+  arm_pid_instance_q31 * S,
+  int32_t resetStateFlag);
+
+
+  /**
+   * @brief  Reset function for the Q31 PID Control.
+   * @param[in,out] *S points to an instance of the Q31 PID Control structure
+   * @return none
+   */
+
+  void arm_pid_reset_q31(
+  arm_pid_instance_q31 * S);
+
+  /**
+   * @brief  Initialization function for the Q15 PID Control.
+   * @param[in,out] *S points to an instance of the Q15 PID structure.
+   * @param[in] resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+   * @return none.
+   */
+  void arm_pid_init_q15(
+  arm_pid_instance_q15 * S,
+  int32_t resetStateFlag);
+
+  /**
+   * @brief  Reset function for the Q15 PID Control.
+   * @param[in,out] *S points to an instance of the q15 PID Control structure
+   * @return none
+   */
+  void arm_pid_reset_q15(
+  arm_pid_instance_q15 * S);
+
+
+  /**
+   * @brief Instance structure for the floating-point Linear Interpolate function.
+   */
+  typedef struct
+  {
+    uint32_t nValues;           /**< nValues */
+    float32_t x1;               /**< x1 */
+    float32_t xSpacing;         /**< xSpacing */
+    float32_t *pYData;          /**< pointer to the table of Y values */
+  } arm_linear_interp_instance_f32;
+
+  /**
+   * @brief Instance structure for the floating-point bilinear interpolation function.
+   */
+
+  typedef struct
+  {
+    uint16_t numRows;   /**< number of rows in the data table. */
+    uint16_t numCols;   /**< number of columns in the data table. */
+    float32_t *pData;   /**< points to the data table. */
+  } arm_bilinear_interp_instance_f32;
+
+   /**
+   * @brief Instance structure for the Q31 bilinear interpolation function.
+   */
+
+  typedef struct
+  {
+    uint16_t numRows;   /**< number of rows in the data table. */
+    uint16_t numCols;   /**< number of columns in the data table. */
+    q31_t *pData;       /**< points to the data table. */
+  } arm_bilinear_interp_instance_q31;
+
+   /**
+   * @brief Instance structure for the Q15 bilinear interpolation function.
+   */
+
+  typedef struct
+  {
+    uint16_t numRows;   /**< number of rows in the data table. */
+    uint16_t numCols;   /**< number of columns in the data table. */
+    q15_t *pData;       /**< points to the data table. */
+  } arm_bilinear_interp_instance_q15;
+
+   /**
+   * @brief Instance structure for the Q15 bilinear interpolation function.
+   */
+
+  typedef struct
+  {
+    uint16_t numRows;   /**< number of rows in the data table. */
+    uint16_t numCols;   /**< number of columns in the data table. */
+    q7_t *pData;                /**< points to the data table. */
+  } arm_bilinear_interp_instance_q7;
+
+
+  /**
+   * @brief Q7 vector multiplication.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst  points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_mult_q7(
+  q7_t * pSrcA,
+  q7_t * pSrcB,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q15 vector multiplication.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst  points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_mult_q15(
+  q15_t * pSrcA,
+  q15_t * pSrcB,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q31 vector multiplication.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_mult_q31(
+  q31_t * pSrcA,
+  q31_t * pSrcB,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Floating-point vector multiplication.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_mult_f32(
+  float32_t * pSrcA,
+  float32_t * pSrcB,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+
+
+
+
+
+  /**
+   * @brief Instance structure for the Q15 CFFT/CIFFT function.
+   */
+
+  typedef struct
+  {
+    uint16_t fftLen;                 /**< length of the FFT. */
+    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    q15_t *pTwiddle;                     /**< points to the Sin twiddle factor table. */
+    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix2_instance_q15;
+
+  arm_status arm_cfft_radix2_init_q15(
+  arm_cfft_radix2_instance_q15 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+  void arm_cfft_radix2_q15(
+  const arm_cfft_radix2_instance_q15 * S,
+  q15_t * pSrc);
+
+
+
+  /**
+   * @brief Instance structure for the Q15 CFFT/CIFFT function.
+   */
+
+  typedef struct
+  {
+    uint16_t fftLen;                 /**< length of the FFT. */
+    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix4_instance_q15;
+
+  arm_status arm_cfft_radix4_init_q15(
+  arm_cfft_radix4_instance_q15 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+  void arm_cfft_radix4_q15(
+  const arm_cfft_radix4_instance_q15 * S,
+  q15_t * pSrc);
+
+  /**
+   * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
+   */
+
+  typedef struct
+  {
+    uint16_t fftLen;                 /**< length of the FFT. */
+    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    q31_t *pTwiddle;                     /**< points to the Twiddle factor table. */
+    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix2_instance_q31;
+
+  arm_status arm_cfft_radix2_init_q31(
+  arm_cfft_radix2_instance_q31 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+  void arm_cfft_radix2_q31(
+  const arm_cfft_radix2_instance_q31 * S,
+  q31_t * pSrc);
+
+  /**
+   * @brief Instance structure for the Q31 CFFT/CIFFT function.
+   */
+
+  typedef struct
+  {
+    uint16_t fftLen;                 /**< length of the FFT. */
+    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix4_instance_q31;
+
+  void arm_cfft_radix4_q31(
+  const arm_cfft_radix4_instance_q31 * S,
+  q31_t * pSrc);
+
+  arm_status arm_cfft_radix4_init_q31(
+  arm_cfft_radix4_instance_q31 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+
+  typedef struct
+  {
+    uint16_t fftLen;                   /**< length of the FFT. */
+    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+    float32_t onebyfftLen;                 /**< value of 1/fftLen. */
+  } arm_cfft_radix2_instance_f32;
+
+/* Deprecated */
+  arm_status arm_cfft_radix2_init_f32(
+  arm_cfft_radix2_instance_f32 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix2_f32(
+  const arm_cfft_radix2_instance_f32 * S,
+  float32_t * pSrc);
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+
+  typedef struct
+  {
+    uint16_t fftLen;                   /**< length of the FFT. */
+    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+    float32_t onebyfftLen;                 /**< value of 1/fftLen. */
+  } arm_cfft_radix4_instance_f32;
+
+/* Deprecated */
+  arm_status arm_cfft_radix4_init_f32(
+  arm_cfft_radix4_instance_f32 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix4_f32(
+  const arm_cfft_radix4_instance_f32 * S,
+  float32_t * pSrc);
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+
+  typedef struct
+  {
+    uint16_t fftLen;                   /**< length of the FFT. */
+    const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+    uint16_t bitRevLength;             /**< bit reversal table length. */
+  } arm_cfft_instance_f32;
+
+  void arm_cfft_f32(
+  const arm_cfft_instance_f32 * S,
+  float32_t * p1,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the Q15 RFFT/RIFFT function.
+   */
+
+  typedef struct
+  {
+    uint32_t fftLenReal;                      /**< length of the real FFT. */
+    uint32_t fftLenBy2;                       /**< length of the complex FFT. */
+    uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+    uint8_t bitReverseFlagR;                      /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+    uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */
+    q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */
+    arm_cfft_radix4_instance_q15 *pCfft;          /**< points to the complex FFT instance. */
+  } arm_rfft_instance_q15;
+
+  arm_status arm_rfft_init_q15(
+  arm_rfft_instance_q15 * S,
+  arm_cfft_radix4_instance_q15 * S_CFFT,
+  uint32_t fftLenReal,
+  uint32_t ifftFlagR,
+  uint32_t bitReverseFlag);
+
+  void arm_rfft_q15(
+  const arm_rfft_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst);
+
+  /**
+   * @brief Instance structure for the Q31 RFFT/RIFFT function.
+   */
+
+  typedef struct
+  {
+    uint32_t fftLenReal;                        /**< length of the real FFT. */
+    uint32_t fftLenBy2;                         /**< length of the complex FFT. */
+    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+    uint8_t bitReverseFlagR;                        /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+    uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */
+    q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */
+    arm_cfft_radix4_instance_q31 *pCfft;        /**< points to the complex FFT instance. */
+  } arm_rfft_instance_q31;
+
+  arm_status arm_rfft_init_q31(
+  arm_rfft_instance_q31 * S,
+  arm_cfft_radix4_instance_q31 * S_CFFT,
+  uint32_t fftLenReal,
+  uint32_t ifftFlagR,
+  uint32_t bitReverseFlag);
+
+  void arm_rfft_q31(
+  const arm_rfft_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst);
+
+  /**
+   * @brief Instance structure for the floating-point RFFT/RIFFT function.
+   */
+
+  typedef struct
+  {
+    uint32_t fftLenReal;                        /**< length of the real FFT. */
+    uint16_t fftLenBy2;                         /**< length of the complex FFT. */
+    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+    uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+    uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */
+    float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */
+    arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
+  } arm_rfft_instance_f32;
+
+  arm_status arm_rfft_init_f32(
+  arm_rfft_instance_f32 * S,
+  arm_cfft_radix4_instance_f32 * S_CFFT,
+  uint32_t fftLenReal,
+  uint32_t ifftFlagR,
+  uint32_t bitReverseFlag);
+
+  void arm_rfft_f32(
+  const arm_rfft_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pDst);
+
+  /**
+   * @brief Instance structure for the floating-point RFFT/RIFFT function.
+   */
+
+typedef struct
+  {
+    arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
+    uint16_t fftLenRFFT;                        /**< length of the real sequence */
+	float32_t * pTwiddleRFFT;					/**< Twiddle factors real stage  */
+  } arm_rfft_fast_instance_f32 ;
+
+arm_status arm_rfft_fast_init_f32 (
+	arm_rfft_fast_instance_f32 * S,
+	uint16_t fftLen);
+
+void arm_rfft_fast_f32(
+  arm_rfft_fast_instance_f32 * S,
+  float32_t * p, float32_t * pOut,
+  uint8_t ifftFlag);
+
+  /**
+   * @brief Instance structure for the floating-point DCT4/IDCT4 function.
+   */
+
+  typedef struct
+  {
+    uint16_t N;                         /**< length of the DCT4. */
+    uint16_t Nby2;                      /**< half of the length of the DCT4. */
+    float32_t normalize;                /**< normalizing factor. */
+    float32_t *pTwiddle;                /**< points to the twiddle factor table. */
+    float32_t *pCosFactor;              /**< points to the cosFactor table. */
+    arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
+    arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+  } arm_dct4_instance_f32;
+
+  /**
+   * @brief  Initialization function for the floating-point DCT4/IDCT4.
+   * @param[in,out] *S         points to an instance of floating-point DCT4/IDCT4 structure.
+   * @param[in]     *S_RFFT    points to an instance of floating-point RFFT/RIFFT structure.
+   * @param[in]     *S_CFFT    points to an instance of floating-point CFFT/CIFFT structure.
+   * @param[in]     N          length of the DCT4.
+   * @param[in]     Nby2       half of the length of the DCT4.
+   * @param[in]     normalize  normalizing factor.
+   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
+   */
+
+  arm_status arm_dct4_init_f32(
+  arm_dct4_instance_f32 * S,
+  arm_rfft_instance_f32 * S_RFFT,
+  arm_cfft_radix4_instance_f32 * S_CFFT,
+  uint16_t N,
+  uint16_t Nby2,
+  float32_t normalize);
+
+  /**
+   * @brief Processing function for the floating-point DCT4/IDCT4.
+   * @param[in]       *S             points to an instance of the floating-point DCT4/IDCT4 structure.
+   * @param[in]       *pState        points to state buffer.
+   * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.
+   * @return none.
+   */
+
+  void arm_dct4_f32(
+  const arm_dct4_instance_f32 * S,
+  float32_t * pState,
+  float32_t * pInlineBuffer);
+
+  /**
+   * @brief Instance structure for the Q31 DCT4/IDCT4 function.
+   */
+
+  typedef struct
+  {
+    uint16_t N;                         /**< length of the DCT4. */
+    uint16_t Nby2;                      /**< half of the length of the DCT4. */
+    q31_t normalize;                    /**< normalizing factor. */
+    q31_t *pTwiddle;                    /**< points to the twiddle factor table. */
+    q31_t *pCosFactor;                  /**< points to the cosFactor table. */
+    arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
+    arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
+  } arm_dct4_instance_q31;
+
+  /**
+   * @brief  Initialization function for the Q31 DCT4/IDCT4.
+   * @param[in,out] *S         points to an instance of Q31 DCT4/IDCT4 structure.
+   * @param[in]     *S_RFFT    points to an instance of Q31 RFFT/RIFFT structure
+   * @param[in]     *S_CFFT    points to an instance of Q31 CFFT/CIFFT structure
+   * @param[in]     N          length of the DCT4.
+   * @param[in]     Nby2       half of the length of the DCT4.
+   * @param[in]     normalize  normalizing factor.
+   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+   */
+
+  arm_status arm_dct4_init_q31(
+  arm_dct4_instance_q31 * S,
+  arm_rfft_instance_q31 * S_RFFT,
+  arm_cfft_radix4_instance_q31 * S_CFFT,
+  uint16_t N,
+  uint16_t Nby2,
+  q31_t normalize);
+
+  /**
+   * @brief Processing function for the Q31 DCT4/IDCT4.
+   * @param[in]       *S             points to an instance of the Q31 DCT4 structure.
+   * @param[in]       *pState        points to state buffer.
+   * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.
+   * @return none.
+   */
+
+  void arm_dct4_q31(
+  const arm_dct4_instance_q31 * S,
+  q31_t * pState,
+  q31_t * pInlineBuffer);
+
+  /**
+   * @brief Instance structure for the Q15 DCT4/IDCT4 function.
+   */
+
+  typedef struct
+  {
+    uint16_t N;                         /**< length of the DCT4. */
+    uint16_t Nby2;                      /**< half of the length of the DCT4. */
+    q15_t normalize;                    /**< normalizing factor. */
+    q15_t *pTwiddle;                    /**< points to the twiddle factor table. */
+    q15_t *pCosFactor;                  /**< points to the cosFactor table. */
+    arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
+    arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
+  } arm_dct4_instance_q15;
+
+  /**
+   * @brief  Initialization function for the Q15 DCT4/IDCT4.
+   * @param[in,out] *S         points to an instance of Q15 DCT4/IDCT4 structure.
+   * @param[in]     *S_RFFT    points to an instance of Q15 RFFT/RIFFT structure.
+   * @param[in]     *S_CFFT    points to an instance of Q15 CFFT/CIFFT structure.
+   * @param[in]     N          length of the DCT4.
+   * @param[in]     Nby2       half of the length of the DCT4.
+   * @param[in]     normalize  normalizing factor.
+   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+   */
+
+  arm_status arm_dct4_init_q15(
+  arm_dct4_instance_q15 * S,
+  arm_rfft_instance_q15 * S_RFFT,
+  arm_cfft_radix4_instance_q15 * S_CFFT,
+  uint16_t N,
+  uint16_t Nby2,
+  q15_t normalize);
+
+  /**
+   * @brief Processing function for the Q15 DCT4/IDCT4.
+   * @param[in]       *S             points to an instance of the Q15 DCT4 structure.
+   * @param[in]       *pState        points to state buffer.
+   * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.
+   * @return none.
+   */
+
+  void arm_dct4_q15(
+  const arm_dct4_instance_q15 * S,
+  q15_t * pState,
+  q15_t * pInlineBuffer);
+
+  /**
+   * @brief Floating-point vector addition.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_add_f32(
+  float32_t * pSrcA,
+  float32_t * pSrcB,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q7 vector addition.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_add_q7(
+  q7_t * pSrcA,
+  q7_t * pSrcB,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q15 vector addition.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_add_q15(
+  q15_t * pSrcA,
+  q15_t * pSrcB,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q31 vector addition.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_add_q31(
+  q31_t * pSrcA,
+  q31_t * pSrcB,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Floating-point vector subtraction.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_sub_f32(
+  float32_t * pSrcA,
+  float32_t * pSrcB,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q7 vector subtraction.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_sub_q7(
+  q7_t * pSrcA,
+  q7_t * pSrcB,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q15 vector subtraction.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_sub_q15(
+  q15_t * pSrcA,
+  q15_t * pSrcB,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q31 vector subtraction.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_sub_q31(
+  q31_t * pSrcA,
+  q31_t * pSrcB,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Multiplies a floating-point vector by a scalar.
+   * @param[in]       *pSrc points to the input vector
+   * @param[in]       scale scale factor to be applied
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_scale_f32(
+  float32_t * pSrc,
+  float32_t scale,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Multiplies a Q7 vector by a scalar.
+   * @param[in]       *pSrc points to the input vector
+   * @param[in]       scaleFract fractional portion of the scale value
+   * @param[in]       shift number of bits to shift the result by
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_scale_q7(
+  q7_t * pSrc,
+  q7_t scaleFract,
+  int8_t shift,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Multiplies a Q15 vector by a scalar.
+   * @param[in]       *pSrc points to the input vector
+   * @param[in]       scaleFract fractional portion of the scale value
+   * @param[in]       shift number of bits to shift the result by
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_scale_q15(
+  q15_t * pSrc,
+  q15_t scaleFract,
+  int8_t shift,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Multiplies a Q31 vector by a scalar.
+   * @param[in]       *pSrc points to the input vector
+   * @param[in]       scaleFract fractional portion of the scale value
+   * @param[in]       shift number of bits to shift the result by
+   * @param[out]      *pDst points to the output vector
+   * @param[in]       blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_scale_q31(
+  q31_t * pSrc,
+  q31_t scaleFract,
+  int8_t shift,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q7 vector absolute value.
+   * @param[in]       *pSrc points to the input buffer
+   * @param[out]      *pDst points to the output buffer
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_abs_q7(
+  q7_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Floating-point vector absolute value.
+   * @param[in]       *pSrc points to the input buffer
+   * @param[out]      *pDst points to the output buffer
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_abs_f32(
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q15 vector absolute value.
+   * @param[in]       *pSrc points to the input buffer
+   * @param[out]      *pDst points to the output buffer
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_abs_q15(
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Q31 vector absolute value.
+   * @param[in]       *pSrc points to the input buffer
+   * @param[out]      *pDst points to the output buffer
+   * @param[in]       blockSize number of samples in each vector
+   * @return none.
+   */
+
+  void arm_abs_q31(
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Dot product of floating-point vectors.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[in]       blockSize number of samples in each vector
+   * @param[out]      *result output result returned here
+   * @return none.
+   */
+
+  void arm_dot_prod_f32(
+  float32_t * pSrcA,
+  float32_t * pSrcB,
+  uint32_t blockSize,
+  float32_t * result);
+
+  /**
+   * @brief Dot product of Q7 vectors.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[in]       blockSize number of samples in each vector
+   * @param[out]      *result output result returned here
+   * @return none.
+   */
+
+  void arm_dot_prod_q7(
+  q7_t * pSrcA,
+  q7_t * pSrcB,
+  uint32_t blockSize,
+  q31_t * result);
+
+  /**
+   * @brief Dot product of Q15 vectors.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[in]       blockSize number of samples in each vector
+   * @param[out]      *result output result returned here
+   * @return none.
+   */
+
+  void arm_dot_prod_q15(
+  q15_t * pSrcA,
+  q15_t * pSrcB,
+  uint32_t blockSize,
+  q63_t * result);
+
+  /**
+   * @brief Dot product of Q31 vectors.
+   * @param[in]       *pSrcA points to the first input vector
+   * @param[in]       *pSrcB points to the second input vector
+   * @param[in]       blockSize number of samples in each vector
+   * @param[out]      *result output result returned here
+   * @return none.
+   */
+
+  void arm_dot_prod_q31(
+  q31_t * pSrcA,
+  q31_t * pSrcB,
+  uint32_t blockSize,
+  q63_t * result);
+
+  /**
+   * @brief  Shifts the elements of a Q7 vector a specified number of bits.
+   * @param[in]  *pSrc points to the input vector
+   * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_shift_q7(
+  q7_t * pSrc,
+  int8_t shiftBits,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Shifts the elements of a Q15 vector a specified number of bits.
+   * @param[in]  *pSrc points to the input vector
+   * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_shift_q15(
+  q15_t * pSrc,
+  int8_t shiftBits,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Shifts the elements of a Q31 vector a specified number of bits.
+   * @param[in]  *pSrc points to the input vector
+   * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_shift_q31(
+  q31_t * pSrc,
+  int8_t shiftBits,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Adds a constant offset to a floating-point vector.
+   * @param[in]  *pSrc points to the input vector
+   * @param[in]  offset is the offset to be added
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_offset_f32(
+  float32_t * pSrc,
+  float32_t offset,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Adds a constant offset to a Q7 vector.
+   * @param[in]  *pSrc points to the input vector
+   * @param[in]  offset is the offset to be added
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_offset_q7(
+  q7_t * pSrc,
+  q7_t offset,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Adds a constant offset to a Q15 vector.
+   * @param[in]  *pSrc points to the input vector
+   * @param[in]  offset is the offset to be added
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_offset_q15(
+  q15_t * pSrc,
+  q15_t offset,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Adds a constant offset to a Q31 vector.
+   * @param[in]  *pSrc points to the input vector
+   * @param[in]  offset is the offset to be added
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_offset_q31(
+  q31_t * pSrc,
+  q31_t offset,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Negates the elements of a floating-point vector.
+   * @param[in]  *pSrc points to the input vector
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_negate_f32(
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Negates the elements of a Q7 vector.
+   * @param[in]  *pSrc points to the input vector
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_negate_q7(
+  q7_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Negates the elements of a Q15 vector.
+   * @param[in]  *pSrc points to the input vector
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_negate_q15(
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Negates the elements of a Q31 vector.
+   * @param[in]  *pSrc points to the input vector
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  blockSize number of samples in the vector
+   * @return none.
+   */
+
+  void arm_negate_q31(
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+  /**
+   * @brief  Copies the elements of a floating-point vector.
+   * @param[in]  *pSrc input pointer
+   * @param[out]  *pDst output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_copy_f32(
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Copies the elements of a Q7 vector.
+   * @param[in]  *pSrc input pointer
+   * @param[out]  *pDst output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_copy_q7(
+  q7_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Copies the elements of a Q15 vector.
+   * @param[in]  *pSrc input pointer
+   * @param[out]  *pDst output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_copy_q15(
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Copies the elements of a Q31 vector.
+   * @param[in]  *pSrc input pointer
+   * @param[out]  *pDst output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_copy_q31(
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+  /**
+   * @brief  Fills a constant value into a floating-point vector.
+   * @param[in]  value input value to be filled
+   * @param[out]  *pDst output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_fill_f32(
+  float32_t value,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Fills a constant value into a Q7 vector.
+   * @param[in]  value input value to be filled
+   * @param[out]  *pDst output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_fill_q7(
+  q7_t value,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Fills a constant value into a Q15 vector.
+   * @param[in]  value input value to be filled
+   * @param[out]  *pDst output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_fill_q15(
+  q15_t value,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Fills a constant value into a Q31 vector.
+   * @param[in]  value input value to be filled
+   * @param[out]  *pDst output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_fill_q31(
+  q31_t value,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+/**
+ * @brief Convolution of floating-point sequences.
+ * @param[in] *pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] *pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ * @return none.
+ */
+
+  void arm_conv_f32(
+  float32_t * pSrcA,
+  uint32_t srcALen,
+  float32_t * pSrcB,
+  uint32_t srcBLen,
+  float32_t * pDst);
+
+
+  /**
+   * @brief Convolution of Q15 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return none.
+   */
+
+
+  void arm_conv_opt_q15(
+  q15_t * pSrcA,
+  uint32_t srcALen,
+  q15_t * pSrcB,
+  uint32_t srcBLen,
+  q15_t * pDst,
+  q15_t * pScratch1,
+  q15_t * pScratch2);
+
+
+/**
+ * @brief Convolution of Q15 sequences.
+ * @param[in] *pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] *pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ * @return none.
+ */
+
+  void arm_conv_q15(
+  q15_t * pSrcA,
+  uint32_t srcALen,
+  q15_t * pSrcB,
+  uint32_t srcBLen,
+  q15_t * pDst);
+
+  /**
+   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @return none.
+   */
+
+  void arm_conv_fast_q15(
+			  q15_t * pSrcA,
+			 uint32_t srcALen,
+			  q15_t * pSrcB,
+			 uint32_t srcBLen,
+			 q15_t * pDst);
+
+  /**
+   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return none.
+   */
+
+  void arm_conv_fast_opt_q15(
+  q15_t * pSrcA,
+  uint32_t srcALen,
+  q15_t * pSrcB,
+  uint32_t srcBLen,
+  q15_t * pDst,
+  q15_t * pScratch1,
+  q15_t * pScratch2);
+
+
+
+  /**
+   * @brief Convolution of Q31 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @return none.
+   */
+
+  void arm_conv_q31(
+  q31_t * pSrcA,
+  uint32_t srcALen,
+  q31_t * pSrcB,
+  uint32_t srcBLen,
+  q31_t * pDst);
+
+  /**
+   * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @return none.
+   */
+
+  void arm_conv_fast_q31(
+  q31_t * pSrcA,
+  uint32_t srcALen,
+  q31_t * pSrcB,
+  uint32_t srcBLen,
+  q31_t * pDst);
+
+
+    /**
+   * @brief Convolution of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return none.
+   */
+
+  void arm_conv_opt_q7(
+  q7_t * pSrcA,
+  uint32_t srcALen,
+  q7_t * pSrcB,
+  uint32_t srcBLen,
+  q7_t * pDst,
+  q15_t * pScratch1,
+  q15_t * pScratch2);
+
+
+
+  /**
+   * @brief Convolution of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @return none.
+   */
+
+  void arm_conv_q7(
+  q7_t * pSrcA,
+  uint32_t srcALen,
+  q7_t * pSrcB,
+  uint32_t srcBLen,
+  q7_t * pDst);
+
+
+  /**
+   * @brief Partial convolution of floating-point sequences.
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+
+  arm_status arm_conv_partial_f32(
+  float32_t * pSrcA,
+  uint32_t srcALen,
+  float32_t * pSrcB,
+  uint32_t srcBLen,
+  float32_t * pDst,
+  uint32_t firstIndex,
+  uint32_t numPoints);
+
+    /**
+   * @brief Partial convolution of Q15 sequences.
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+
+  arm_status arm_conv_partial_opt_q15(
+  q15_t * pSrcA,
+  uint32_t srcALen,
+  q15_t * pSrcB,
+  uint32_t srcBLen,
+  q15_t * pDst,
+  uint32_t firstIndex,
+  uint32_t numPoints,
+  q15_t * pScratch1,
+  q15_t * pScratch2);
+
+
+/**
+   * @brief Partial convolution of Q15 sequences.
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+
+  arm_status arm_conv_partial_q15(
+  q15_t * pSrcA,
+  uint32_t srcALen,
+  q15_t * pSrcB,
+  uint32_t srcBLen,
+  q15_t * pDst,
+  uint32_t firstIndex,
+  uint32_t numPoints);
+
+  /**
+   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+
+  arm_status arm_conv_partial_fast_q15(
+				        q15_t * pSrcA,
+				       uint32_t srcALen,
+				        q15_t * pSrcB,
+				       uint32_t srcBLen,
+				       q15_t * pDst,
+				       uint32_t firstIndex,
+				       uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+
+  arm_status arm_conv_partial_fast_opt_q15(
+  q15_t * pSrcA,
+  uint32_t srcALen,
+  q15_t * pSrcB,
+  uint32_t srcBLen,
+  q15_t * pDst,
+  uint32_t firstIndex,
+  uint32_t numPoints,
+  q15_t * pScratch1,
+  q15_t * pScratch2);
+
+
+  /**
+   * @brief Partial convolution of Q31 sequences.
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+
+  arm_status arm_conv_partial_q31(
+  q31_t * pSrcA,
+  uint32_t srcALen,
+  q31_t * pSrcB,
+  uint32_t srcBLen,
+  q31_t * pDst,
+  uint32_t firstIndex,
+  uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+
+  arm_status arm_conv_partial_fast_q31(
+  q31_t * pSrcA,
+  uint32_t srcALen,
+  q31_t * pSrcB,
+  uint32_t srcBLen,
+  q31_t * pDst,
+  uint32_t firstIndex,
+  uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q7 sequences
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+
+  arm_status arm_conv_partial_opt_q7(
+  q7_t * pSrcA,
+  uint32_t srcALen,
+  q7_t * pSrcB,
+  uint32_t srcBLen,
+  q7_t * pDst,
+  uint32_t firstIndex,
+  uint32_t numPoints,
+  q15_t * pScratch1,
+  q15_t * pScratch2);
+
+
+/**
+   * @brief Partial convolution of Q7 sequences.
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+
+  arm_status arm_conv_partial_q7(
+  q7_t * pSrcA,
+  uint32_t srcALen,
+  q7_t * pSrcB,
+  uint32_t srcBLen,
+  q7_t * pDst,
+  uint32_t firstIndex,
+  uint32_t numPoints);
+
+
+
+  /**
+   * @brief Instance structure for the Q15 FIR decimator.
+   */
+
+  typedef struct
+  {
+    uint8_t M;                      /**< decimation factor. */
+    uint16_t numTaps;               /**< number of coefficients in the filter. */
+    q15_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numTaps.*/
+    q15_t *pState;                   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+  } arm_fir_decimate_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR decimator.
+   */
+
+  typedef struct
+  {
+    uint8_t M;                  /**< decimation factor. */
+    uint16_t numTaps;           /**< number of coefficients in the filter. */
+    q31_t *pCoeffs;              /**< points to the coefficient array. The array is of length numTaps.*/
+    q31_t *pState;               /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+
+  } arm_fir_decimate_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR decimator.
+   */
+
+  typedef struct
+  {
+    uint8_t M;                          /**< decimation factor. */
+    uint16_t numTaps;                   /**< number of coefficients in the filter. */
+    float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numTaps.*/
+    float32_t *pState;                   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+
+  } arm_fir_decimate_instance_f32;
+
+
+
+  /**
+   * @brief Processing function for the floating-point FIR decimator.
+   * @param[in] *S points to an instance of the floating-point FIR decimator structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data
+   * @param[in] blockSize number of input samples to process per call.
+   * @return none
+   */
+
+  void arm_fir_decimate_f32(
+  const arm_fir_decimate_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the floating-point FIR decimator.
+   * @param[in,out] *S points to an instance of the floating-point FIR decimator structure.
+   * @param[in] numTaps  number of coefficients in the filter.
+   * @param[in] M  decimation factor.
+   * @param[in] *pCoeffs points to the filter coefficients.
+   * @param[in] *pState points to the state buffer.
+   * @param[in] blockSize number of input samples to process per call.
+   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * <code>blockSize</code> is not a multiple of <code>M</code>.
+   */
+
+  arm_status arm_fir_decimate_init_f32(
+  arm_fir_decimate_instance_f32 * S,
+  uint16_t numTaps,
+  uint8_t M,
+  float32_t * pCoeffs,
+  float32_t * pState,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q15 FIR decimator.
+   * @param[in] *S points to an instance of the Q15 FIR decimator structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data
+   * @param[in] blockSize number of input samples to process per call.
+   * @return none
+   */
+
+  void arm_fir_decimate_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+   * @param[in] *S points to an instance of the Q15 FIR decimator structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data
+   * @param[in] blockSize number of input samples to process per call.
+   * @return none
+   */
+
+  void arm_fir_decimate_fast_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+
+
+  /**
+   * @brief  Initialization function for the Q15 FIR decimator.
+   * @param[in,out] *S points to an instance of the Q15 FIR decimator structure.
+   * @param[in] numTaps  number of coefficients in the filter.
+   * @param[in] M  decimation factor.
+   * @param[in] *pCoeffs points to the filter coefficients.
+   * @param[in] *pState points to the state buffer.
+   * @param[in] blockSize number of input samples to process per call.
+   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * <code>blockSize</code> is not a multiple of <code>M</code>.
+   */
+
+  arm_status arm_fir_decimate_init_q15(
+  arm_fir_decimate_instance_q15 * S,
+  uint16_t numTaps,
+  uint8_t M,
+  q15_t * pCoeffs,
+  q15_t * pState,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 FIR decimator.
+   * @param[in] *S points to an instance of the Q31 FIR decimator structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data
+   * @param[in] blockSize number of input samples to process per call.
+   * @return none
+   */
+
+  void arm_fir_decimate_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+   * @param[in] *S points to an instance of the Q31 FIR decimator structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data
+   * @param[in] blockSize number of input samples to process per call.
+   * @return none
+   */
+
+  void arm_fir_decimate_fast_q31(
+  arm_fir_decimate_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q31 FIR decimator.
+   * @param[in,out] *S points to an instance of the Q31 FIR decimator structure.
+   * @param[in] numTaps  number of coefficients in the filter.
+   * @param[in] M  decimation factor.
+   * @param[in] *pCoeffs points to the filter coefficients.
+   * @param[in] *pState points to the state buffer.
+   * @param[in] blockSize number of input samples to process per call.
+   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * <code>blockSize</code> is not a multiple of <code>M</code>.
+   */
+
+  arm_status arm_fir_decimate_init_q31(
+  arm_fir_decimate_instance_q31 * S,
+  uint16_t numTaps,
+  uint8_t M,
+  q31_t * pCoeffs,
+  q31_t * pState,
+  uint32_t blockSize);
+
+
+
+  /**
+   * @brief Instance structure for the Q15 FIR interpolator.
+   */
+
+  typedef struct
+  {
+    uint8_t L;                      /**< upsample factor. */
+    uint16_t phaseLength;           /**< length of each polyphase filter component. */
+    q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
+    q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+  } arm_fir_interpolate_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR interpolator.
+   */
+
+  typedef struct
+  {
+    uint8_t L;                      /**< upsample factor. */
+    uint16_t phaseLength;           /**< length of each polyphase filter component. */
+    q31_t *pCoeffs;                  /**< points to the coefficient array. The array is of length L*phaseLength. */
+    q31_t *pState;                   /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+  } arm_fir_interpolate_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR interpolator.
+   */
+
+  typedef struct
+  {
+    uint8_t L;                     /**< upsample factor. */
+    uint16_t phaseLength;          /**< length of each polyphase filter component. */
+    float32_t *pCoeffs;             /**< points to the coefficient array. The array is of length L*phaseLength. */
+    float32_t *pState;              /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
+  } arm_fir_interpolate_instance_f32;
+
+
+  /**
+   * @brief Processing function for the Q15 FIR interpolator.
+   * @param[in] *S        points to an instance of the Q15 FIR interpolator structure.
+   * @param[in] *pSrc     points to the block of input data.
+   * @param[out] *pDst    points to the block of output data.
+   * @param[in] blockSize number of input samples to process per call.
+   * @return none.
+   */
+
+  void arm_fir_interpolate_q15(
+  const arm_fir_interpolate_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q15 FIR interpolator.
+   * @param[in,out] *S        points to an instance of the Q15 FIR interpolator structure.
+   * @param[in]     L         upsample factor.
+   * @param[in]     numTaps   number of filter coefficients in the filter.
+   * @param[in]     *pCoeffs  points to the filter coefficient buffer.
+   * @param[in]     *pState   points to the state buffer.
+   * @param[in]     blockSize number of input samples to process per call.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+   */
+
+  arm_status arm_fir_interpolate_init_q15(
+  arm_fir_interpolate_instance_q15 * S,
+  uint8_t L,
+  uint16_t numTaps,
+  q15_t * pCoeffs,
+  q15_t * pState,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 FIR interpolator.
+   * @param[in] *S        points to an instance of the Q15 FIR interpolator structure.
+   * @param[in] *pSrc     points to the block of input data.
+   * @param[out] *pDst    points to the block of output data.
+   * @param[in] blockSize number of input samples to process per call.
+   * @return none.
+   */
+
+  void arm_fir_interpolate_q31(
+  const arm_fir_interpolate_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q31 FIR interpolator.
+   * @param[in,out] *S        points to an instance of the Q31 FIR interpolator structure.
+   * @param[in]     L         upsample factor.
+   * @param[in]     numTaps   number of filter coefficients in the filter.
+   * @param[in]     *pCoeffs  points to the filter coefficient buffer.
+   * @param[in]     *pState   points to the state buffer.
+   * @param[in]     blockSize number of input samples to process per call.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+   */
+
+  arm_status arm_fir_interpolate_init_q31(
+  arm_fir_interpolate_instance_q31 * S,
+  uint8_t L,
+  uint16_t numTaps,
+  q31_t * pCoeffs,
+  q31_t * pState,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the floating-point FIR interpolator.
+   * @param[in] *S        points to an instance of the floating-point FIR interpolator structure.
+   * @param[in] *pSrc     points to the block of input data.
+   * @param[out] *pDst    points to the block of output data.
+   * @param[in] blockSize number of input samples to process per call.
+   * @return none.
+   */
+
+  void arm_fir_interpolate_f32(
+  const arm_fir_interpolate_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point FIR interpolator.
+   * @param[in,out] *S        points to an instance of the floating-point FIR interpolator structure.
+   * @param[in]     L         upsample factor.
+   * @param[in]     numTaps   number of filter coefficients in the filter.
+   * @param[in]     *pCoeffs  points to the filter coefficient buffer.
+   * @param[in]     *pState   points to the state buffer.
+   * @param[in]     blockSize number of input samples to process per call.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+   */
+
+  arm_status arm_fir_interpolate_init_f32(
+  arm_fir_interpolate_instance_f32 * S,
+  uint8_t L,
+  uint16_t numTaps,
+  float32_t * pCoeffs,
+  float32_t * pState,
+  uint32_t blockSize);
+
+  /**
+   * @brief Instance structure for the high precision Q31 Biquad cascade filter.
+   */
+
+  typedef struct
+  {
+    uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+    q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+    q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */
+    uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */
+
+  } arm_biquad_cas_df1_32x64_ins_q31;
+
+
+  /**
+   * @param[in]  *S        points to an instance of the high precision Q31 Biquad cascade filter structure.
+   * @param[in]  *pSrc     points to the block of input data.
+   * @param[out] *pDst     points to the block of output data
+   * @param[in]  blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_biquad_cas_df1_32x64_q31(
+  const arm_biquad_cas_df1_32x64_ins_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @param[in,out] *S           points to an instance of the high precision Q31 Biquad cascade filter structure.
+   * @param[in]     numStages    number of 2nd order stages in the filter.
+   * @param[in]     *pCoeffs     points to the filter coefficients.
+   * @param[in]     *pState      points to the state buffer.
+   * @param[in]     postShift    shift to be applied to the output. Varies according to the coefficients format
+   * @return        none
+   */
+
+  void arm_biquad_cas_df1_32x64_init_q31(
+  arm_biquad_cas_df1_32x64_ins_q31 * S,
+  uint8_t numStages,
+  q31_t * pCoeffs,
+  q63_t * pState,
+  uint8_t postShift);
+
+
+
+  /**
+   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+   */
+
+  typedef struct
+  {
+    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+    float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+    float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_cascade_df2T_instance_f32;
+
+
+  /**
+   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in]  *S        points to an instance of the filter data structure.
+   * @param[in]  *pSrc     points to the block of input data.
+   * @param[out] *pDst     points to the block of output data
+   * @param[in]  blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_biquad_cascade_df2T_f32(
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in,out] *S           points to an instance of the filter data structure.
+   * @param[in]     numStages    number of 2nd order stages in the filter.
+   * @param[in]     *pCoeffs     points to the filter coefficients.
+   * @param[in]     *pState      points to the state buffer.
+   * @return        none
+   */
+
+  void arm_biquad_cascade_df2T_init_f32(
+  arm_biquad_cascade_df2T_instance_f32 * S,
+  uint8_t numStages,
+  float32_t * pCoeffs,
+  float32_t * pState);
+
+
+
+  /**
+   * @brief Instance structure for the Q15 FIR lattice filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numStages;                          /**< number of filter stages. */
+    q15_t *pState;                               /**< points to the state variable array. The array is of length numStages. */
+    q15_t *pCoeffs;                              /**< points to the coefficient array. The array is of length numStages. */
+  } arm_fir_lattice_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR lattice filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numStages;                          /**< number of filter stages. */
+    q31_t *pState;                               /**< points to the state variable array. The array is of length numStages. */
+    q31_t *pCoeffs;                              /**< points to the coefficient array. The array is of length numStages. */
+  } arm_fir_lattice_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR lattice filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numStages;                  /**< number of filter stages. */
+    float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */
+    float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */
+  } arm_fir_lattice_instance_f32;
+
+  /**
+   * @brief Initialization function for the Q15 FIR lattice filter.
+   * @param[in] *S points to an instance of the Q15 FIR lattice structure.
+   * @param[in] numStages  number of filter stages.
+   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
+   * @param[in] *pState points to the state buffer.  The array is of length numStages.
+   * @return none.
+   */
+
+  void arm_fir_lattice_init_q15(
+  arm_fir_lattice_instance_q15 * S,
+  uint16_t numStages,
+  q15_t * pCoeffs,
+  q15_t * pState);
+
+
+  /**
+   * @brief Processing function for the Q15 FIR lattice filter.
+   * @param[in] *S points to an instance of the Q15 FIR lattice structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+  void arm_fir_lattice_q15(
+  const arm_fir_lattice_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Initialization function for the Q31 FIR lattice filter.
+   * @param[in] *S points to an instance of the Q31 FIR lattice structure.
+   * @param[in] numStages  number of filter stages.
+   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
+   * @param[in] *pState points to the state buffer.   The array is of length numStages.
+   * @return none.
+   */
+
+  void arm_fir_lattice_init_q31(
+  arm_fir_lattice_instance_q31 * S,
+  uint16_t numStages,
+  q31_t * pCoeffs,
+  q31_t * pState);
+
+
+  /**
+   * @brief Processing function for the Q31 FIR lattice filter.
+   * @param[in]  *S        points to an instance of the Q31 FIR lattice structure.
+   * @param[in]  *pSrc     points to the block of input data.
+   * @param[out] *pDst     points to the block of output data
+   * @param[in]  blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_fir_lattice_q31(
+  const arm_fir_lattice_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+/**
+ * @brief Initialization function for the floating-point FIR lattice filter.
+ * @param[in] *S points to an instance of the floating-point FIR lattice structure.
+ * @param[in] numStages  number of filter stages.
+ * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
+ * @param[in] *pState points to the state buffer.  The array is of length numStages.
+ * @return none.
+ */
+
+  void arm_fir_lattice_init_f32(
+  arm_fir_lattice_instance_f32 * S,
+  uint16_t numStages,
+  float32_t * pCoeffs,
+  float32_t * pState);
+
+  /**
+   * @brief Processing function for the floating-point FIR lattice filter.
+   * @param[in]  *S        points to an instance of the floating-point FIR lattice structure.
+   * @param[in]  *pSrc     points to the block of input data.
+   * @param[out] *pDst     points to the block of output data
+   * @param[in]  blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_fir_lattice_f32(
+  const arm_fir_lattice_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Instance structure for the Q15 IIR lattice filter.
+   */
+  typedef struct
+  {
+    uint16_t numStages;                         /**< number of stages in the filter. */
+    q15_t *pState;                              /**< points to the state variable array. The array is of length numStages+blockSize. */
+    q15_t *pkCoeffs;                            /**< points to the reflection coefficient array. The array is of length numStages. */
+    q15_t *pvCoeffs;                            /**< points to the ladder coefficient array. The array is of length numStages+1. */
+  } arm_iir_lattice_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 IIR lattice filter.
+   */
+  typedef struct
+  {
+    uint16_t numStages;                         /**< number of stages in the filter. */
+    q31_t *pState;                              /**< points to the state variable array. The array is of length numStages+blockSize. */
+    q31_t *pkCoeffs;                            /**< points to the reflection coefficient array. The array is of length numStages. */
+    q31_t *pvCoeffs;                            /**< points to the ladder coefficient array. The array is of length numStages+1. */
+  } arm_iir_lattice_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point IIR lattice filter.
+   */
+  typedef struct
+  {
+    uint16_t numStages;                         /**< number of stages in the filter. */
+    float32_t *pState;                          /**< points to the state variable array. The array is of length numStages+blockSize. */
+    float32_t *pkCoeffs;                        /**< points to the reflection coefficient array. The array is of length numStages. */
+    float32_t *pvCoeffs;                        /**< points to the ladder coefficient array. The array is of length numStages+1. */
+  } arm_iir_lattice_instance_f32;
+
+  /**
+   * @brief Processing function for the floating-point IIR lattice filter.
+   * @param[in] *S points to an instance of the floating-point IIR lattice structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_iir_lattice_f32(
+  const arm_iir_lattice_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Initialization function for the floating-point IIR lattice filter.
+   * @param[in] *S points to an instance of the floating-point IIR lattice structure.
+   * @param[in] numStages number of stages in the filter.
+   * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.
+   * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.
+   * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize-1.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_iir_lattice_init_f32(
+  arm_iir_lattice_instance_f32 * S,
+  uint16_t numStages,
+  float32_t * pkCoeffs,
+  float32_t * pvCoeffs,
+  float32_t * pState,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 IIR lattice filter.
+   * @param[in] *S points to an instance of the Q31 IIR lattice structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_iir_lattice_q31(
+  const arm_iir_lattice_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for the Q31 IIR lattice filter.
+   * @param[in] *S points to an instance of the Q31 IIR lattice structure.
+   * @param[in] numStages number of stages in the filter.
+   * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.
+   * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.
+   * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_iir_lattice_init_q31(
+  arm_iir_lattice_instance_q31 * S,
+  uint16_t numStages,
+  q31_t * pkCoeffs,
+  q31_t * pvCoeffs,
+  q31_t * pState,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 IIR lattice filter.
+   * @param[in] *S points to an instance of the Q15 IIR lattice structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[out] *pDst points to the block of output data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_iir_lattice_q15(
+  const arm_iir_lattice_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+
+/**
+ * @brief Initialization function for the Q15 IIR lattice filter.
+ * @param[in] *S points to an instance of the fixed-point Q15 IIR lattice structure.
+ * @param[in] numStages  number of stages in the filter.
+ * @param[in] *pkCoeffs points to reflection coefficient buffer.  The array is of length numStages.
+ * @param[in] *pvCoeffs points to ladder coefficient buffer.  The array is of length numStages+1.
+ * @param[in] *pState points to state buffer.  The array is of length numStages+blockSize.
+ * @param[in] blockSize number of samples to process per call.
+ * @return none.
+ */
+
+  void arm_iir_lattice_init_q15(
+  arm_iir_lattice_instance_q15 * S,
+  uint16_t numStages,
+  q15_t * pkCoeffs,
+  q15_t * pvCoeffs,
+  q15_t * pState,
+  uint32_t blockSize);
+
+  /**
+   * @brief Instance structure for the floating-point LMS filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numTaps;    /**< number of coefficients in the filter. */
+    float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */
+    float32_t mu;        /**< step size that controls filter coefficient updates. */
+  } arm_lms_instance_f32;
+
+  /**
+   * @brief Processing function for floating-point LMS filter.
+   * @param[in]  *S points to an instance of the floating-point LMS filter structure.
+   * @param[in]  *pSrc points to the block of input data.
+   * @param[in]  *pRef points to the block of reference data.
+   * @param[out] *pOut points to the block of output data.
+   * @param[out] *pErr points to the block of error data.
+   * @param[in]  blockSize number of samples to process.
+   * @return     none.
+   */
+
+  void arm_lms_f32(
+  const arm_lms_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pRef,
+  float32_t * pOut,
+  float32_t * pErr,
+  uint32_t blockSize);
+
+  /**
+   * @brief Initialization function for floating-point LMS filter.
+   * @param[in] *S points to an instance of the floating-point LMS filter structure.
+   * @param[in] numTaps  number of filter coefficients.
+   * @param[in] *pCoeffs points to the coefficient buffer.
+   * @param[in] *pState points to state buffer.
+   * @param[in] mu step size that controls filter coefficient updates.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_lms_init_f32(
+  arm_lms_instance_f32 * S,
+  uint16_t numTaps,
+  float32_t * pCoeffs,
+  float32_t * pState,
+  float32_t mu,
+  uint32_t blockSize);
+
+  /**
+   * @brief Instance structure for the Q15 LMS filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numTaps;    /**< number of coefficients in the filter. */
+    q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
+    q15_t mu;            /**< step size that controls filter coefficient updates. */
+    uint32_t postShift;  /**< bit shift applied to coefficients. */
+  } arm_lms_instance_q15;
+
+
+  /**
+   * @brief Initialization function for the Q15 LMS filter.
+   * @param[in] *S points to an instance of the Q15 LMS filter structure.
+   * @param[in] numTaps  number of filter coefficients.
+   * @param[in] *pCoeffs points to the coefficient buffer.
+   * @param[in] *pState points to the state buffer.
+   * @param[in] mu step size that controls filter coefficient updates.
+   * @param[in] blockSize number of samples to process.
+   * @param[in] postShift bit shift applied to coefficients.
+   * @return    none.
+   */
+
+  void arm_lms_init_q15(
+  arm_lms_instance_q15 * S,
+  uint16_t numTaps,
+  q15_t * pCoeffs,
+  q15_t * pState,
+  q15_t mu,
+  uint32_t blockSize,
+  uint32_t postShift);
+
+  /**
+   * @brief Processing function for Q15 LMS filter.
+   * @param[in] *S points to an instance of the Q15 LMS filter structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[in] *pRef points to the block of reference data.
+   * @param[out] *pOut points to the block of output data.
+   * @param[out] *pErr points to the block of error data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_lms_q15(
+  const arm_lms_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pRef,
+  q15_t * pOut,
+  q15_t * pErr,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q31 LMS filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numTaps;    /**< number of coefficients in the filter. */
+    q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
+    q31_t mu;            /**< step size that controls filter coefficient updates. */
+    uint32_t postShift;  /**< bit shift applied to coefficients. */
+
+  } arm_lms_instance_q31;
+
+  /**
+   * @brief Processing function for Q31 LMS filter.
+   * @param[in]  *S points to an instance of the Q15 LMS filter structure.
+   * @param[in]  *pSrc points to the block of input data.
+   * @param[in]  *pRef points to the block of reference data.
+   * @param[out] *pOut points to the block of output data.
+   * @param[out] *pErr points to the block of error data.
+   * @param[in]  blockSize number of samples to process.
+   * @return     none.
+   */
+
+  void arm_lms_q31(
+  const arm_lms_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pRef,
+  q31_t * pOut,
+  q31_t * pErr,
+  uint32_t blockSize);
+
+  /**
+   * @brief Initialization function for Q31 LMS filter.
+   * @param[in] *S points to an instance of the Q31 LMS filter structure.
+   * @param[in] numTaps  number of filter coefficients.
+   * @param[in] *pCoeffs points to coefficient buffer.
+   * @param[in] *pState points to state buffer.
+   * @param[in] mu step size that controls filter coefficient updates.
+   * @param[in] blockSize number of samples to process.
+   * @param[in] postShift bit shift applied to coefficients.
+   * @return none.
+   */
+
+  void arm_lms_init_q31(
+  arm_lms_instance_q31 * S,
+  uint16_t numTaps,
+  q31_t * pCoeffs,
+  q31_t * pState,
+  q31_t mu,
+  uint32_t blockSize,
+  uint32_t postShift);
+
+  /**
+   * @brief Instance structure for the floating-point normalized LMS filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numTaps;     /**< number of coefficients in the filter. */
+    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+    float32_t mu;        /**< step size that control filter coefficient updates. */
+    float32_t energy;    /**< saves previous frame energy. */
+    float32_t x0;        /**< saves previous input sample. */
+  } arm_lms_norm_instance_f32;
+
+  /**
+   * @brief Processing function for floating-point normalized LMS filter.
+   * @param[in] *S points to an instance of the floating-point normalized LMS filter structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[in] *pRef points to the block of reference data.
+   * @param[out] *pOut points to the block of output data.
+   * @param[out] *pErr points to the block of error data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_lms_norm_f32(
+  arm_lms_norm_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pRef,
+  float32_t * pOut,
+  float32_t * pErr,
+  uint32_t blockSize);
+
+  /**
+   * @brief Initialization function for floating-point normalized LMS filter.
+   * @param[in] *S points to an instance of the floating-point LMS filter structure.
+   * @param[in] numTaps  number of filter coefficients.
+   * @param[in] *pCoeffs points to coefficient buffer.
+   * @param[in] *pState points to state buffer.
+   * @param[in] mu step size that controls filter coefficient updates.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_lms_norm_init_f32(
+  arm_lms_norm_instance_f32 * S,
+  uint16_t numTaps,
+  float32_t * pCoeffs,
+  float32_t * pState,
+  float32_t mu,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q31 normalized LMS filter.
+   */
+  typedef struct
+  {
+    uint16_t numTaps;     /**< number of coefficients in the filter. */
+    q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
+    q31_t mu;             /**< step size that controls filter coefficient updates. */
+    uint8_t postShift;    /**< bit shift applied to coefficients. */
+    q31_t *recipTable;    /**< points to the reciprocal initial value table. */
+    q31_t energy;         /**< saves previous frame energy. */
+    q31_t x0;             /**< saves previous input sample. */
+  } arm_lms_norm_instance_q31;
+
+  /**
+   * @brief Processing function for Q31 normalized LMS filter.
+   * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[in] *pRef points to the block of reference data.
+   * @param[out] *pOut points to the block of output data.
+   * @param[out] *pErr points to the block of error data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_lms_norm_q31(
+  arm_lms_norm_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pRef,
+  q31_t * pOut,
+  q31_t * pErr,
+  uint32_t blockSize);
+
+  /**
+   * @brief Initialization function for Q31 normalized LMS filter.
+   * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
+   * @param[in] numTaps  number of filter coefficients.
+   * @param[in] *pCoeffs points to coefficient buffer.
+   * @param[in] *pState points to state buffer.
+   * @param[in] mu step size that controls filter coefficient updates.
+   * @param[in] blockSize number of samples to process.
+   * @param[in] postShift bit shift applied to coefficients.
+   * @return none.
+   */
+
+  void arm_lms_norm_init_q31(
+  arm_lms_norm_instance_q31 * S,
+  uint16_t numTaps,
+  q31_t * pCoeffs,
+  q31_t * pState,
+  q31_t mu,
+  uint32_t blockSize,
+  uint8_t postShift);
+
+  /**
+   * @brief Instance structure for the Q15 normalized LMS filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numTaps;    /**< Number of coefficients in the filter. */
+    q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
+    q15_t mu;            /**< step size that controls filter coefficient updates. */
+    uint8_t postShift;   /**< bit shift applied to coefficients. */
+    q15_t *recipTable;   /**< Points to the reciprocal initial value table. */
+    q15_t energy;        /**< saves previous frame energy. */
+    q15_t x0;            /**< saves previous input sample. */
+  } arm_lms_norm_instance_q15;
+
+  /**
+   * @brief Processing function for Q15 normalized LMS filter.
+   * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
+   * @param[in] *pSrc points to the block of input data.
+   * @param[in] *pRef points to the block of reference data.
+   * @param[out] *pOut points to the block of output data.
+   * @param[out] *pErr points to the block of error data.
+   * @param[in] blockSize number of samples to process.
+   * @return none.
+   */
+
+  void arm_lms_norm_q15(
+  arm_lms_norm_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pRef,
+  q15_t * pOut,
+  q15_t * pErr,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for Q15 normalized LMS filter.
+   * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
+   * @param[in] numTaps  number of filter coefficients.
+   * @param[in] *pCoeffs points to coefficient buffer.
+   * @param[in] *pState points to state buffer.
+   * @param[in] mu step size that controls filter coefficient updates.
+   * @param[in] blockSize number of samples to process.
+   * @param[in] postShift bit shift applied to coefficients.
+   * @return none.
+   */
+
+  void arm_lms_norm_init_q15(
+  arm_lms_norm_instance_q15 * S,
+  uint16_t numTaps,
+  q15_t * pCoeffs,
+  q15_t * pState,
+  q15_t mu,
+  uint32_t blockSize,
+  uint8_t postShift);
+
+  /**
+   * @brief Correlation of floating-point sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @return none.
+   */
+
+  void arm_correlate_f32(
+  float32_t * pSrcA,
+  uint32_t srcALen,
+  float32_t * pSrcB,
+  uint32_t srcBLen,
+  float32_t * pDst);
+
+
+   /**
+   * @brief Correlation of Q15 sequences
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @return none.
+   */
+  void arm_correlate_opt_q15(
+  q15_t * pSrcA,
+  uint32_t srcALen,
+  q15_t * pSrcB,
+  uint32_t srcBLen,
+  q15_t * pDst,
+  q15_t * pScratch);
+
+
+  /**
+   * @brief Correlation of Q15 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @return none.
+   */
+
+  void arm_correlate_q15(
+  q15_t * pSrcA,
+  uint32_t srcALen,
+  q15_t * pSrcB,
+  uint32_t srcBLen,
+  q15_t * pDst);
+
+  /**
+   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @return none.
+   */
+
+  void arm_correlate_fast_q15(
+			       q15_t * pSrcA,
+			      uint32_t srcALen,
+			       q15_t * pSrcB,
+			      uint32_t srcBLen,
+			      q15_t * pDst);
+
+
+
+  /**
+   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @return none.
+   */
+
+  void arm_correlate_fast_opt_q15(
+  q15_t * pSrcA,
+  uint32_t srcALen,
+  q15_t * pSrcB,
+  uint32_t srcBLen,
+  q15_t * pDst,
+  q15_t * pScratch);
+
+  /**
+   * @brief Correlation of Q31 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @return none.
+   */
+
+  void arm_correlate_q31(
+  q31_t * pSrcA,
+  uint32_t srcALen,
+  q31_t * pSrcB,
+  uint32_t srcBLen,
+  q31_t * pDst);
+
+  /**
+   * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @return none.
+   */
+
+  void arm_correlate_fast_q31(
+  q31_t * pSrcA,
+  uint32_t srcALen,
+  q31_t * pSrcB,
+  uint32_t srcBLen,
+  q31_t * pDst);
+
+
+
+ /**
+   * @brief Correlation of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return none.
+   */
+
+  void arm_correlate_opt_q7(
+  q7_t * pSrcA,
+  uint32_t srcALen,
+  q7_t * pSrcB,
+  uint32_t srcBLen,
+  q7_t * pDst,
+  q15_t * pScratch1,
+  q15_t * pScratch2);
+
+
+  /**
+   * @brief Correlation of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @return none.
+   */
+
+  void arm_correlate_q7(
+  q7_t * pSrcA,
+  uint32_t srcALen,
+  q7_t * pSrcB,
+  uint32_t srcBLen,
+  q7_t * pDst);
+
+
+  /**
+   * @brief Instance structure for the floating-point sparse FIR filter.
+   */
+  typedef struct
+  {
+    uint16_t numTaps;             /**< number of coefficients in the filter. */
+    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+    float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_f32;
+
+  /**
+   * @brief Instance structure for the Q31 sparse FIR filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numTaps;             /**< number of coefficients in the filter. */
+    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+    q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
+    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_q31;
+
+  /**
+   * @brief Instance structure for the Q15 sparse FIR filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numTaps;             /**< number of coefficients in the filter. */
+    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+    q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
+    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q7 sparse FIR filter.
+   */
+
+  typedef struct
+  {
+    uint16_t numTaps;             /**< number of coefficients in the filter. */
+    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+    q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/
+    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_q7;
+
+  /**
+   * @brief Processing function for the floating-point sparse FIR filter.
+   * @param[in]  *S          points to an instance of the floating-point sparse FIR structure.
+   * @param[in]  *pSrc       points to the block of input data.
+   * @param[out] *pDst       points to the block of output data
+   * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize   number of input samples to process per call.
+   * @return none.
+   */
+
+  void arm_fir_sparse_f32(
+  arm_fir_sparse_instance_f32 * S,
+  float32_t * pSrc,
+  float32_t * pDst,
+  float32_t * pScratchIn,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point sparse FIR filter.
+   * @param[in,out] *S         points to an instance of the floating-point sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     *pCoeffs   points to the array of filter coefficients.
+   * @param[in]     *pState    points to the state buffer.
+   * @param[in]     *pTapDelay points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   * @return none
+   */
+
+  void arm_fir_sparse_init_f32(
+  arm_fir_sparse_instance_f32 * S,
+  uint16_t numTaps,
+  float32_t * pCoeffs,
+  float32_t * pState,
+  int32_t * pTapDelay,
+  uint16_t maxDelay,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 sparse FIR filter.
+   * @param[in]  *S          points to an instance of the Q31 sparse FIR structure.
+   * @param[in]  *pSrc       points to the block of input data.
+   * @param[out] *pDst       points to the block of output data
+   * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize   number of input samples to process per call.
+   * @return none.
+   */
+
+  void arm_fir_sparse_q31(
+  arm_fir_sparse_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst,
+  q31_t * pScratchIn,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q31 sparse FIR filter.
+   * @param[in,out] *S         points to an instance of the Q31 sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     *pCoeffs   points to the array of filter coefficients.
+   * @param[in]     *pState    points to the state buffer.
+   * @param[in]     *pTapDelay points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   * @return none
+   */
+
+  void arm_fir_sparse_init_q31(
+  arm_fir_sparse_instance_q31 * S,
+  uint16_t numTaps,
+  q31_t * pCoeffs,
+  q31_t * pState,
+  int32_t * pTapDelay,
+  uint16_t maxDelay,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q15 sparse FIR filter.
+   * @param[in]  *S           points to an instance of the Q15 sparse FIR structure.
+   * @param[in]  *pSrc        points to the block of input data.
+   * @param[out] *pDst        points to the block of output data
+   * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.
+   * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize    number of input samples to process per call.
+   * @return none.
+   */
+
+  void arm_fir_sparse_q15(
+  arm_fir_sparse_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst,
+  q15_t * pScratchIn,
+  q31_t * pScratchOut,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q15 sparse FIR filter.
+   * @param[in,out] *S         points to an instance of the Q15 sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     *pCoeffs   points to the array of filter coefficients.
+   * @param[in]     *pState    points to the state buffer.
+   * @param[in]     *pTapDelay points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   * @return none
+   */
+
+  void arm_fir_sparse_init_q15(
+  arm_fir_sparse_instance_q15 * S,
+  uint16_t numTaps,
+  q15_t * pCoeffs,
+  q15_t * pState,
+  int32_t * pTapDelay,
+  uint16_t maxDelay,
+  uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q7 sparse FIR filter.
+   * @param[in]  *S           points to an instance of the Q7 sparse FIR structure.
+   * @param[in]  *pSrc        points to the block of input data.
+   * @param[out] *pDst        points to the block of output data
+   * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.
+   * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize    number of input samples to process per call.
+   * @return none.
+   */
+
+  void arm_fir_sparse_q7(
+  arm_fir_sparse_instance_q7 * S,
+  q7_t * pSrc,
+  q7_t * pDst,
+  q7_t * pScratchIn,
+  q31_t * pScratchOut,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q7 sparse FIR filter.
+   * @param[in,out] *S         points to an instance of the Q7 sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     *pCoeffs   points to the array of filter coefficients.
+   * @param[in]     *pState    points to the state buffer.
+   * @param[in]     *pTapDelay points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   * @return none
+   */
+
+  void arm_fir_sparse_init_q7(
+  arm_fir_sparse_instance_q7 * S,
+  uint16_t numTaps,
+  q7_t * pCoeffs,
+  q7_t * pState,
+  int32_t * pTapDelay,
+  uint16_t maxDelay,
+  uint32_t blockSize);
+
+
+  /*
+   * @brief  Floating-point sin_cos function.
+   * @param[in]  theta    input value in degrees
+   * @param[out] *pSinVal points to the processed sine output.
+   * @param[out] *pCosVal points to the processed cos output.
+   * @return none.
+   */
+
+  void arm_sin_cos_f32(
+  float32_t theta,
+  float32_t * pSinVal,
+  float32_t * pCcosVal);
+
+  /*
+   * @brief  Q31 sin_cos function.
+   * @param[in]  theta    scaled input value in degrees
+   * @param[out] *pSinVal points to the processed sine output.
+   * @param[out] *pCosVal points to the processed cosine output.
+   * @return none.
+   */
+
+  void arm_sin_cos_q31(
+  q31_t theta,
+  q31_t * pSinVal,
+  q31_t * pCosVal);
+
+
+  /**
+   * @brief  Floating-point complex conjugate.
+   * @param[in]  *pSrc points to the input vector
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  numSamples number of complex samples in each vector
+   * @return none.
+   */
+
+  void arm_cmplx_conj_f32(
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Q31 complex conjugate.
+   * @param[in]  *pSrc points to the input vector
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  numSamples number of complex samples in each vector
+   * @return none.
+   */
+
+  void arm_cmplx_conj_q31(
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Q15 complex conjugate.
+   * @param[in]  *pSrc points to the input vector
+   * @param[out]  *pDst points to the output vector
+   * @param[in]  numSamples number of complex samples in each vector
+   * @return none.
+   */
+
+  void arm_cmplx_conj_q15(
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t numSamples);
+
+
+
+  /**
+   * @brief  Floating-point complex magnitude squared
+   * @param[in]  *pSrc points to the complex input vector
+   * @param[out]  *pDst points to the real output vector
+   * @param[in]  numSamples number of complex samples in the input vector
+   * @return none.
+   */
+
+  void arm_cmplx_mag_squared_f32(
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Q31 complex magnitude squared
+   * @param[in]  *pSrc points to the complex input vector
+   * @param[out]  *pDst points to the real output vector
+   * @param[in]  numSamples number of complex samples in the input vector
+   * @return none.
+   */
+
+  void arm_cmplx_mag_squared_q31(
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Q15 complex magnitude squared
+   * @param[in]  *pSrc points to the complex input vector
+   * @param[out]  *pDst points to the real output vector
+   * @param[in]  numSamples number of complex samples in the input vector
+   * @return none.
+   */
+
+  void arm_cmplx_mag_squared_q15(
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t numSamples);
+
+
+ /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup PID PID Motor Control
+   *
+   * A Proportional Integral Derivative (PID) controller is a generic feedback control
+   * loop mechanism widely used in industrial control systems.
+   * A PID controller is the most commonly used type of feedback controller.
+   *
+   * This set of functions implements (PID) controllers
+   * for Q15, Q31, and floating-point data types.  The functions operate on a single sample
+   * of data and each call to the function returns a single processed value.
+   * <code>S</code> points to an instance of the PID control data structure.  <code>in</code>
+   * is the input sample value. The functions return the output value.
+   *
+   * \par Algorithm:
+   * <pre>
+   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
+   *    A0 = Kp + Ki + Kd
+   *    A1 = (-Kp ) - (2 * Kd )
+   *    A2 = Kd  </pre>
+   *
+   * \par
+   * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
+   *
+   * \par
+   * \image html PID.gif "Proportional Integral Derivative Controller"
+   *
+   * \par
+   * The PID controller calculates an "error" value as the difference between
+   * the measured output and the reference input.
+   * The controller attempts to minimize the error by adjusting the process control inputs.
+   * The proportional value determines the reaction to the current error,
+   * the integral value determines the reaction based on the sum of recent errors,
+   * and the derivative value determines the reaction based on the rate at which the error has been changing.
+   *
+   * \par Instance Structure
+   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
+   * A separate instance structure must be defined for each PID Controller.
+   * There are separate instance structure declarations for each of the 3 supported data types.
+   *
+   * \par Reset Functions
+   * There is also an associated reset function for each data type which clears the state array.
+   *
+   * \par Initialization Functions
+   * There is also an associated initialization function for each data type.
+   * The initialization function performs the following operations:
+   * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
+   * - Zeros out the values in the state buffer.
+   *
+   * \par
+   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+   *
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the fixed-point versions of the PID Controller functions.
+   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup PID
+   * @{
+   */
+
+  /**
+   * @brief  Process function for the floating-point PID Control.
+   * @param[in,out] *S is an instance of the floating-point PID Control structure
+   * @param[in] in input sample to process
+   * @return out processed output sample.
+   */
+
+
+  static __INLINE float32_t arm_pid_f32(
+  arm_pid_instance_f32 * S,
+  float32_t in)
+  {
+    float32_t out;
+
+    /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
+    out = (S->A0 * in) +
+      (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
+
+    /* Update state */
+    S->state[1] = S->state[0];
+    S->state[0] = in;
+    S->state[2] = out;
+
+    /* return to application */
+    return (out);
+
+  }
+
+  /**
+   * @brief  Process function for the Q31 PID Control.
+   * @param[in,out] *S points to an instance of the Q31 PID Control structure
+   * @param[in] in input sample to process
+   * @return out processed output sample.
+   *
+   * <b>Scaling and Overflow Behavior:</b>
+   * \par
+   * The function is implemented using an internal 64-bit accumulator.
+   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+   * Thus, if the accumulator result overflows it wraps around rather than clip.
+   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+   */
+
+  static __INLINE q31_t arm_pid_q31(
+  arm_pid_instance_q31 * S,
+  q31_t in)
+  {
+    q63_t acc;
+    q31_t out;
+
+    /* acc = A0 * x[n]  */
+    acc = (q63_t) S->A0 * in;
+
+    /* acc += A1 * x[n-1] */
+    acc += (q63_t) S->A1 * S->state[0];
+
+    /* acc += A2 * x[n-2]  */
+    acc += (q63_t) S->A2 * S->state[1];
+
+    /* convert output to 1.31 format to add y[n-1] */
+    out = (q31_t) (acc >> 31u);
+
+    /* out += y[n-1] */
+    out += S->state[2];
+
+    /* Update state */
+    S->state[1] = S->state[0];
+    S->state[0] = in;
+    S->state[2] = out;
+
+    /* return to application */
+    return (out);
+
+  }
+
+  /**
+   * @brief  Process function for the Q15 PID Control.
+   * @param[in,out] *S points to an instance of the Q15 PID Control structure
+   * @param[in] in input sample to process
+   * @return out processed output sample.
+   *
+   * <b>Scaling and Overflow Behavior:</b>
+   * \par
+   * The function is implemented using a 64-bit internal accumulator.
+   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+   * Lastly, the accumulator is saturated to yield a result in 1.15 format.
+   */
+
+  static __INLINE q15_t arm_pid_q15(
+  arm_pid_instance_q15 * S,
+  q15_t in)
+  {
+    q63_t acc;
+    q15_t out;
+
+#ifndef ARM_MATH_CM0_FAMILY
+    __SIMD32_TYPE *vstate;
+
+    /* Implementation of PID controller */
+
+    /* acc = A0 * x[n]  */
+    acc = (q31_t) __SMUAD(S->A0, in);
+
+    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
+    vstate = __SIMD32_CONST(S->state);
+    acc = __SMLALD(S->A1, (q31_t) *vstate, acc);
+
+#else
+    /* acc = A0 * x[n]  */
+    acc = ((q31_t) S->A0) * in;
+
+    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
+    acc += (q31_t) S->A1 * S->state[0];
+    acc += (q31_t) S->A2 * S->state[1];
+
+#endif
+
+    /* acc += y[n-1] */
+    acc += (q31_t) S->state[2] << 15;
+
+    /* saturate the output */
+    out = (q15_t) (__SSAT((acc >> 15), 16));
+
+    /* Update state */
+    S->state[1] = S->state[0];
+    S->state[0] = in;
+    S->state[2] = out;
+
+    /* return to application */
+    return (out);
+
+  }
+
+  /**
+   * @} end of PID group
+   */
+
+
+  /**
+   * @brief Floating-point matrix inverse.
+   * @param[in]  *src points to the instance of the input floating-point matrix structure.
+   * @param[out] *dst points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
+   */
+
+  arm_status arm_mat_inverse_f32(
+  const arm_matrix_instance_f32 * src,
+  arm_matrix_instance_f32 * dst);
+
+
+
+  /**
+   * @ingroup groupController
+   */
+
+
+  /**
+   * @defgroup clarke Vector Clarke Transform
+   * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
+   * Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
+   * in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
+   * When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
+   * \image html clarke.gif Stator current space vector and its components in (a,b).
+   * and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
+   * can be calculated using only <code>Ia</code> and <code>Ib</code>.
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html clarkeFormula.gif
+   * where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
+   * <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Clarke transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup clarke
+   * @{
+   */
+
+  /**
+   *
+   * @brief  Floating-point Clarke transform
+   * @param[in]       Ia       input three-phase coordinate <code>a</code>
+   * @param[in]       Ib       input three-phase coordinate <code>b</code>
+   * @param[out]      *pIalpha points to output two-phase orthogonal vector axis alpha
+   * @param[out]      *pIbeta  points to output two-phase orthogonal vector axis beta
+   * @return none.
+   */
+
+  static __INLINE void arm_clarke_f32(
+  float32_t Ia,
+  float32_t Ib,
+  float32_t * pIalpha,
+  float32_t * pIbeta)
+  {
+    /* Calculate pIalpha using the equation, pIalpha = Ia */
+    *pIalpha = Ia;
+
+    /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
+    *pIbeta =
+      ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
+
+  }
+
+  /**
+   * @brief  Clarke transform for Q31 version
+   * @param[in]       Ia       input three-phase coordinate <code>a</code>
+   * @param[in]       Ib       input three-phase coordinate <code>b</code>
+   * @param[out]      *pIalpha points to output two-phase orthogonal vector axis alpha
+   * @param[out]      *pIbeta  points to output two-phase orthogonal vector axis beta
+   * @return none.
+   *
+   * <b>Scaling and Overflow Behavior:</b>
+   * \par
+   * The function is implemented using an internal 32-bit accumulator.
+   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+   * There is saturation on the addition, hence there is no risk of overflow.
+   */
+
+  static __INLINE void arm_clarke_q31(
+  q31_t Ia,
+  q31_t Ib,
+  q31_t * pIalpha,
+  q31_t * pIbeta)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+
+    /* Calculating pIalpha from Ia by equation pIalpha = Ia */
+    *pIalpha = Ia;
+
+    /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
+    product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
+
+    /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
+    product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
+
+    /* pIbeta is calculated by adding the intermediate products */
+    *pIbeta = __QADD(product1, product2);
+  }
+
+  /**
+   * @} end of clarke group
+   */
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to Q31 vector.
+   * @param[in]  *pSrc     input pointer
+   * @param[out]  *pDst    output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_q7_to_q31(
+  q7_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+
+
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup inv_clarke Vector Inverse Clarke Transform
+   * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html clarkeInvFormula.gif
+   * where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
+   * <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Clarke transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup inv_clarke
+   * @{
+   */
+
+   /**
+   * @brief  Floating-point Inverse Clarke transform
+   * @param[in]       Ialpha  input two-phase orthogonal vector axis alpha
+   * @param[in]       Ibeta   input two-phase orthogonal vector axis beta
+   * @param[out]      *pIa    points to output three-phase coordinate <code>a</code>
+   * @param[out]      *pIb    points to output three-phase coordinate <code>b</code>
+   * @return none.
+   */
+
+
+  static __INLINE void arm_inv_clarke_f32(
+  float32_t Ialpha,
+  float32_t Ibeta,
+  float32_t * pIa,
+  float32_t * pIb)
+  {
+    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+    *pIa = Ialpha;
+
+    /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
+    *pIb = -0.5 * Ialpha + (float32_t) 0.8660254039 *Ibeta;
+
+  }
+
+  /**
+   * @brief  Inverse Clarke transform for Q31 version
+   * @param[in]       Ialpha  input two-phase orthogonal vector axis alpha
+   * @param[in]       Ibeta   input two-phase orthogonal vector axis beta
+   * @param[out]      *pIa    points to output three-phase coordinate <code>a</code>
+   * @param[out]      *pIb    points to output three-phase coordinate <code>b</code>
+   * @return none.
+   *
+   * <b>Scaling and Overflow Behavior:</b>
+   * \par
+   * The function is implemented using an internal 32-bit accumulator.
+   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+   * There is saturation on the subtraction, hence there is no risk of overflow.
+   */
+
+  static __INLINE void arm_inv_clarke_q31(
+  q31_t Ialpha,
+  q31_t Ibeta,
+  q31_t * pIa,
+  q31_t * pIb)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+
+    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+    *pIa = Ialpha;
+
+    /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
+    product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
+
+    /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
+    product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
+
+    /* pIb is calculated by subtracting the products */
+    *pIb = __QSUB(product2, product1);
+
+  }
+
+  /**
+   * @} end of inv_clarke group
+   */
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to Q15 vector.
+   * @param[in]  *pSrc     input pointer
+   * @param[out] *pDst     output pointer
+   * @param[in]  blockSize number of samples to process
+   * @return none.
+   */
+  void arm_q7_to_q15(
+  q7_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup park Vector Park Transform
+   *
+   * Forward Park transform converts the input two-coordinate vector to flux and torque components.
+   * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
+   * from the stationary to the moving reference frame and control the spatial relationship between
+   * the stator vector current and rotor flux vector.
+   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
+   * current vector and the relationship from the two reference frames:
+   * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html parkFormula.gif
+   * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
+   * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
+   * cosine and sine values of theta (rotor flux position).
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Park transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup park
+   * @{
+   */
+
+  /**
+   * @brief Floating-point Park transform
+   * @param[in]       Ialpha input two-phase vector coordinate alpha
+   * @param[in]       Ibeta  input two-phase vector coordinate beta
+   * @param[out]      *pId   points to output	rotor reference frame d
+   * @param[out]      *pIq   points to output	rotor reference frame q
+   * @param[in]       sinVal sine value of rotation angle theta
+   * @param[in]       cosVal cosine value of rotation angle theta
+   * @return none.
+   *
+   * The function implements the forward Park transform.
+   *
+   */
+
+  static __INLINE void arm_park_f32(
+  float32_t Ialpha,
+  float32_t Ibeta,
+  float32_t * pId,
+  float32_t * pIq,
+  float32_t sinVal,
+  float32_t cosVal)
+  {
+    /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
+    *pId = Ialpha * cosVal + Ibeta * sinVal;
+
+    /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
+    *pIq = -Ialpha * sinVal + Ibeta * cosVal;
+
+  }
+
+  /**
+   * @brief  Park transform for Q31 version
+   * @param[in]       Ialpha input two-phase vector coordinate alpha
+   * @param[in]       Ibeta  input two-phase vector coordinate beta
+   * @param[out]      *pId   points to output rotor reference frame d
+   * @param[out]      *pIq   points to output rotor reference frame q
+   * @param[in]       sinVal sine value of rotation angle theta
+   * @param[in]       cosVal cosine value of rotation angle theta
+   * @return none.
+   *
+   * <b>Scaling and Overflow Behavior:</b>
+   * \par
+   * The function is implemented using an internal 32-bit accumulator.
+   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+   * There is saturation on the addition and subtraction, hence there is no risk of overflow.
+   */
+
+
+  static __INLINE void arm_park_q31(
+  q31_t Ialpha,
+  q31_t Ibeta,
+  q31_t * pId,
+  q31_t * pIq,
+  q31_t sinVal,
+  q31_t cosVal)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
+
+    /* Intermediate product is calculated by (Ialpha * cosVal) */
+    product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
+
+    /* Intermediate product is calculated by (Ibeta * sinVal) */
+    product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
+
+
+    /* Intermediate product is calculated by (Ialpha * sinVal) */
+    product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
+
+    /* Intermediate product is calculated by (Ibeta * cosVal) */
+    product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
+
+    /* Calculate pId by adding the two intermediate products 1 and 2 */
+    *pId = __QADD(product1, product2);
+
+    /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
+    *pIq = __QSUB(product4, product3);
+  }
+
+  /**
+   * @} end of park group
+   */
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to floating-point vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[out]  *pDst is output pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @return none.
+   */
+  void arm_q7_to_float(
+  q7_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup inv_park Vector Inverse Park transform
+   * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html parkInvFormula.gif
+   * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
+   * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
+   * cosine and sine values of theta (rotor flux position).
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Park transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup inv_park
+   * @{
+   */
+
+   /**
+   * @brief  Floating-point Inverse Park transform
+   * @param[in]       Id        input coordinate of rotor reference frame d
+   * @param[in]       Iq        input coordinate of rotor reference frame q
+   * @param[out]      *pIalpha  points to output two-phase orthogonal vector axis alpha
+   * @param[out]      *pIbeta   points to output two-phase orthogonal vector axis beta
+   * @param[in]       sinVal    sine value of rotation angle theta
+   * @param[in]       cosVal    cosine value of rotation angle theta
+   * @return none.
+   */
+
+  static __INLINE void arm_inv_park_f32(
+  float32_t Id,
+  float32_t Iq,
+  float32_t * pIalpha,
+  float32_t * pIbeta,
+  float32_t sinVal,
+  float32_t cosVal)
+  {
+    /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
+    *pIalpha = Id * cosVal - Iq * sinVal;
+
+    /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
+    *pIbeta = Id * sinVal + Iq * cosVal;
+
+  }
+
+
+  /**
+   * @brief  Inverse Park transform for	Q31 version
+   * @param[in]       Id        input coordinate of rotor reference frame d
+   * @param[in]       Iq        input coordinate of rotor reference frame q
+   * @param[out]      *pIalpha  points to output two-phase orthogonal vector axis alpha
+   * @param[out]      *pIbeta   points to output two-phase orthogonal vector axis beta
+   * @param[in]       sinVal    sine value of rotation angle theta
+   * @param[in]       cosVal    cosine value of rotation angle theta
+   * @return none.
+   *
+   * <b>Scaling and Overflow Behavior:</b>
+   * \par
+   * The function is implemented using an internal 32-bit accumulator.
+   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+   * There is saturation on the addition, hence there is no risk of overflow.
+   */
+
+
+  static __INLINE void arm_inv_park_q31(
+  q31_t Id,
+  q31_t Iq,
+  q31_t * pIalpha,
+  q31_t * pIbeta,
+  q31_t sinVal,
+  q31_t cosVal)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
+
+    /* Intermediate product is calculated by (Id * cosVal) */
+    product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
+
+    /* Intermediate product is calculated by (Iq * sinVal) */
+    product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
+
+
+    /* Intermediate product is calculated by (Id * sinVal) */
+    product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
+
+    /* Intermediate product is calculated by (Iq * cosVal) */
+    product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
+
+    /* Calculate pIalpha by using the two intermediate products 1 and 2 */
+    *pIalpha = __QSUB(product1, product2);
+
+    /* Calculate pIbeta by using the two intermediate products 3 and 4 */
+    *pIbeta = __QADD(product4, product3);
+
+  }
+
+  /**
+   * @} end of Inverse park group
+   */
+
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to floating-point vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[out]  *pDst is output pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @return none.
+   */
+  void arm_q31_to_float(
+  q31_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @ingroup groupInterpolation
+   */
+
+  /**
+   * @defgroup LinearInterpolate Linear Interpolation
+   *
+   * Linear interpolation is a method of curve fitting using linear polynomials.
+   * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
+   *
+   * \par
+   * \image html LinearInterp.gif "Linear interpolation"
+   *
+   * \par
+   * A  Linear Interpolate function calculates an output value(y), for the input(x)
+   * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
+   *
+   * \par Algorithm:
+   * <pre>
+   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
+   *       where x0, x1 are nearest values of input x
+   *             y0, y1 are nearest values to output y
+   * </pre>
+   *
+   * \par
+   * This set of functions implements Linear interpolation process
+   * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single
+   * sample of data and each call to the function returns a single processed value.
+   * <code>S</code> points to an instance of the Linear Interpolate function data structure.
+   * <code>x</code> is the input sample value. The functions returns the output value.
+   *
+   * \par
+   * if x is outside of the table boundary, Linear interpolation returns first value of the table
+   * if x is below input range and returns last value of table if x is above range.
+   */
+
+  /**
+   * @addtogroup LinearInterpolate
+   * @{
+   */
+
+  /**
+   * @brief  Process function for the floating-point Linear Interpolation Function.
+   * @param[in,out] *S is an instance of the floating-point Linear Interpolation structure
+   * @param[in] x input sample to process
+   * @return y processed output sample.
+   *
+   */
+
+  static __INLINE float32_t arm_linear_interp_f32(
+  arm_linear_interp_instance_f32 * S,
+  float32_t x)
+  {
+
+    float32_t y;
+    float32_t x0, x1;                            /* Nearest input values */
+    float32_t y0, y1;                            /* Nearest output values */
+    float32_t xSpacing = S->xSpacing;            /* spacing between input values */
+    int32_t i;                                   /* Index variable */
+    float32_t *pYData = S->pYData;               /* pointer to output table */
+
+    /* Calculation of index */
+    i = (int32_t) ((x - S->x1) / xSpacing);
+
+    if(i < 0)
+    {
+      /* Iniatilize output for below specified range as least output value of table */
+      y = pYData[0];
+    }
+    else if((uint32_t)i >= S->nValues)
+    {
+      /* Iniatilize output for above specified range as last output value of table */
+      y = pYData[S->nValues - 1];
+    }
+    else
+    {
+      /* Calculation of nearest input values */
+      x0 = S->x1 + i * xSpacing;
+      x1 = S->x1 + (i + 1) * xSpacing;
+
+      /* Read of nearest output values */
+      y0 = pYData[i];
+      y1 = pYData[i + 1];
+
+      /* Calculation of output */
+      y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
+
+    }
+
+    /* returns output value */
+    return (y);
+  }
+
+   /**
+   *
+   * @brief  Process function for the Q31 Linear Interpolation Function.
+   * @param[in] *pYData  pointer to Q31 Linear Interpolation table
+   * @param[in] x input sample to process
+   * @param[in] nValues number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   *
+   */
+
+
+  static __INLINE q31_t arm_linear_interp_q31(
+  q31_t * pYData,
+  q31_t x,
+  uint32_t nValues)
+  {
+    q31_t y;                                     /* output */
+    q31_t y0, y1;                                /* Nearest output values */
+    q31_t fract;                                 /* fractional part */
+    int32_t index;                               /* Index to read nearest output values */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    index = ((x & 0xFFF00000) >> 20);
+
+    if(index >= (int32_t)(nValues - 1))
+    {
+      return (pYData[nValues - 1]);
+    }
+    else if(index < 0)
+    {
+      return (pYData[0]);
+    }
+    else
+    {
+
+      /* 20 bits for the fractional part */
+      /* shift left by 11 to keep fract in 1.31 format */
+      fract = (x & 0x000FFFFF) << 11;
+
+      /* Read two nearest output values from the index in 1.31(q31) format */
+      y0 = pYData[index];
+      y1 = pYData[index + 1u];
+
+      /* Calculation of y0 * (1-fract) and y is in 2.30 format */
+      y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
+
+      /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
+      y += ((q31_t) (((q63_t) y1 * fract) >> 32));
+
+      /* Convert y to 1.31 format */
+      return (y << 1u);
+
+    }
+
+  }
+
+  /**
+   *
+   * @brief  Process function for the Q15 Linear Interpolation Function.
+   * @param[in] *pYData  pointer to Q15 Linear Interpolation table
+   * @param[in] x input sample to process
+   * @param[in] nValues number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   *
+   */
+
+
+  static __INLINE q15_t arm_linear_interp_q15(
+  q15_t * pYData,
+  q31_t x,
+  uint32_t nValues)
+  {
+    q63_t y;                                     /* output */
+    q15_t y0, y1;                                /* Nearest output values */
+    q31_t fract;                                 /* fractional part */
+    int32_t index;                               /* Index to read nearest output values */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    index = ((x & 0xFFF00000) >> 20u);
+
+    if(index >= (int32_t)(nValues - 1))
+    {
+      return (pYData[nValues - 1]);
+    }
+    else if(index < 0)
+    {
+      return (pYData[0]);
+    }
+    else
+    {
+      /* 20 bits for the fractional part */
+      /* fract is in 12.20 format */
+      fract = (x & 0x000FFFFF);
+
+      /* Read two nearest output values from the index */
+      y0 = pYData[index];
+      y1 = pYData[index + 1u];
+
+      /* Calculation of y0 * (1-fract) and y is in 13.35 format */
+      y = ((q63_t) y0 * (0xFFFFF - fract));
+
+      /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
+      y += ((q63_t) y1 * (fract));
+
+      /* convert y to 1.15 format */
+      return (y >> 20);
+    }
+
+
+  }
+
+  /**
+   *
+   * @brief  Process function for the Q7 Linear Interpolation Function.
+   * @param[in] *pYData  pointer to Q7 Linear Interpolation table
+   * @param[in] x input sample to process
+   * @param[in] nValues number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   */
+
+
+  static __INLINE q7_t arm_linear_interp_q7(
+  q7_t * pYData,
+  q31_t x,
+  uint32_t nValues)
+  {
+    q31_t y;                                     /* output */
+    q7_t y0, y1;                                 /* Nearest output values */
+    q31_t fract;                                 /* fractional part */
+    uint32_t index;                              /* Index to read nearest output values */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    if (x < 0)
+    {
+      return (pYData[0]);
+    }
+    index = (x >> 20) & 0xfff;
+
+
+    if(index >= (nValues - 1))
+    {
+      return (pYData[nValues - 1]);
+    }
+    else
+    {
+
+      /* 20 bits for the fractional part */
+      /* fract is in 12.20 format */
+      fract = (x & 0x000FFFFF);
+
+      /* Read two nearest output values from the index and are in 1.7(q7) format */
+      y0 = pYData[index];
+      y1 = pYData[index + 1u];
+
+      /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
+      y = ((y0 * (0xFFFFF - fract)));
+
+      /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
+      y += (y1 * fract);
+
+      /* convert y to 1.7(q7) format */
+      return (y >> 20u);
+
+    }
+
+  }
+  /**
+   * @} end of LinearInterpolate group
+   */
+
+  /**
+   * @brief  Fast approximation to the trigonometric sine function for floating-point data.
+   * @param[in] x input value in radians.
+   * @return  sin(x).
+   */
+
+  float32_t arm_sin_f32(
+  float32_t x);
+
+  /**
+   * @brief  Fast approximation to the trigonometric sine function for Q31 data.
+   * @param[in] x Scaled input value in radians.
+   * @return  sin(x).
+   */
+
+  q31_t arm_sin_q31(
+  q31_t x);
+
+  /**
+   * @brief  Fast approximation to the trigonometric sine function for Q15 data.
+   * @param[in] x Scaled input value in radians.
+   * @return  sin(x).
+   */
+
+  q15_t arm_sin_q15(
+  q15_t x);
+
+  /**
+   * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
+   * @param[in] x input value in radians.
+   * @return  cos(x).
+   */
+
+  float32_t arm_cos_f32(
+  float32_t x);
+
+  /**
+   * @brief Fast approximation to the trigonometric cosine function for Q31 data.
+   * @param[in] x Scaled input value in radians.
+   * @return  cos(x).
+   */
+
+  q31_t arm_cos_q31(
+  q31_t x);
+
+  /**
+   * @brief  Fast approximation to the trigonometric cosine function for Q15 data.
+   * @param[in] x Scaled input value in radians.
+   * @return  cos(x).
+   */
+
+  q15_t arm_cos_q15(
+  q15_t x);
+
+
+  /**
+   * @ingroup groupFastMath
+   */
+
+
+  /**
+   * @defgroup SQRT Square Root
+   *
+   * Computes the square root of a number.
+   * There are separate functions for Q15, Q31, and floating-point data types.
+   * The square root function is computed using the Newton-Raphson algorithm.
+   * This is an iterative algorithm of the form:
+   * <pre>
+   *      x1 = x0 - f(x0)/f'(x0)
+   * </pre>
+   * where <code>x1</code> is the current estimate,
+   * <code>x0</code> is the previous estimate, and
+   * <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
+   * For the square root function, the algorithm reduces to:
+   * <pre>
+   *     x0 = in/2                         [initial guess]
+   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
+   * </pre>
+   */
+
+
+  /**
+   * @addtogroup SQRT
+   * @{
+   */
+
+  /**
+   * @brief  Floating-point square root function.
+   * @param[in]  in     input value.
+   * @param[out] *pOut  square root of input value.
+   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+   * <code>in</code> is negative value and returns zero output for negative values.
+   */
+
+  static __INLINE arm_status arm_sqrt_f32(
+  float32_t in,
+  float32_t * pOut)
+  {
+    if(in > 0)
+    {
+
+//      #if __FPU_USED
+#if (__FPU_USED == 1) && defined ( __CC_ARM   )
+      *pOut = __sqrtf(in);
+#else
+      *pOut = sqrtf(in);
+#endif
+
+      return (ARM_MATH_SUCCESS);
+    }
+    else
+    {
+      *pOut = 0.0f;
+      return (ARM_MATH_ARGUMENT_ERROR);
+    }
+
+  }
+
+
+  /**
+   * @brief Q31 square root function.
+   * @param[in]   in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
+   * @param[out]  *pOut square root of input value.
+   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+   * <code>in</code> is negative value and returns zero output for negative values.
+   */
+  arm_status arm_sqrt_q31(
+  q31_t in,
+  q31_t * pOut);
+
+  /**
+   * @brief  Q15 square root function.
+   * @param[in]   in     input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
+   * @param[out]  *pOut  square root of input value.
+   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+   * <code>in</code> is negative value and returns zero output for negative values.
+   */
+  arm_status arm_sqrt_q15(
+  q15_t in,
+  q15_t * pOut);
+
+  /**
+   * @} end of SQRT group
+   */
+
+
+
+
+
+
+  /**
+   * @brief floating-point Circular write function.
+   */
+
+  static __INLINE void arm_circularWrite_f32(
+  int32_t * circBuffer,
+  int32_t L,
+  uint16_t * writeOffset,
+  int32_t bufferInc,
+  const int32_t * src,
+  int32_t srcInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0u;
+    int32_t wOffset;
+
+    /* Copy the value of Index pointer that points
+     * to the current location where the input samples to be copied */
+    wOffset = *writeOffset;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while(i > 0u)
+    {
+      /* copy the input sample to the circular buffer */
+      circBuffer[wOffset] = *src;
+
+      /* Update the input pointer */
+      src += srcInc;
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      wOffset += bufferInc;
+      if(wOffset >= L)
+        wOffset -= L;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *writeOffset = wOffset;
+  }
+
+
+
+  /**
+   * @brief floating-point Circular Read function.
+   */
+  static __INLINE void arm_circularRead_f32(
+  int32_t * circBuffer,
+  int32_t L,
+  int32_t * readOffset,
+  int32_t bufferInc,
+  int32_t * dst,
+  int32_t * dst_base,
+  int32_t dst_length,
+  int32_t dstInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0u;
+    int32_t rOffset, dst_end;
+
+    /* Copy the value of Index pointer that points
+     * to the current location from where the input samples to be read */
+    rOffset = *readOffset;
+    dst_end = (int32_t) (dst_base + dst_length);
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while(i > 0u)
+    {
+      /* copy the sample from the circular buffer to the destination buffer */
+      *dst = circBuffer[rOffset];
+
+      /* Update the input pointer */
+      dst += dstInc;
+
+      if(dst == (int32_t *) dst_end)
+      {
+        dst = dst_base;
+      }
+
+      /* Circularly update rOffset.  Watch out for positive and negative value  */
+      rOffset += bufferInc;
+
+      if(rOffset >= L)
+      {
+        rOffset -= L;
+      }
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *readOffset = rOffset;
+  }
+
+  /**
+   * @brief Q15 Circular write function.
+   */
+
+  static __INLINE void arm_circularWrite_q15(
+  q15_t * circBuffer,
+  int32_t L,
+  uint16_t * writeOffset,
+  int32_t bufferInc,
+  const q15_t * src,
+  int32_t srcInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0u;
+    int32_t wOffset;
+
+    /* Copy the value of Index pointer that points
+     * to the current location where the input samples to be copied */
+    wOffset = *writeOffset;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while(i > 0u)
+    {
+      /* copy the input sample to the circular buffer */
+      circBuffer[wOffset] = *src;
+
+      /* Update the input pointer */
+      src += srcInc;
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      wOffset += bufferInc;
+      if(wOffset >= L)
+        wOffset -= L;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *writeOffset = wOffset;
+  }
+
+
+
+  /**
+   * @brief Q15 Circular Read function.
+   */
+  static __INLINE void arm_circularRead_q15(
+  q15_t * circBuffer,
+  int32_t L,
+  int32_t * readOffset,
+  int32_t bufferInc,
+  q15_t * dst,
+  q15_t * dst_base,
+  int32_t dst_length,
+  int32_t dstInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0;
+    int32_t rOffset, dst_end;
+
+    /* Copy the value of Index pointer that points
+     * to the current location from where the input samples to be read */
+    rOffset = *readOffset;
+
+    dst_end = (int32_t) (dst_base + dst_length);
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while(i > 0u)
+    {
+      /* copy the sample from the circular buffer to the destination buffer */
+      *dst = circBuffer[rOffset];
+
+      /* Update the input pointer */
+      dst += dstInc;
+
+      if(dst == (q15_t *) dst_end)
+      {
+        dst = dst_base;
+      }
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      rOffset += bufferInc;
+
+      if(rOffset >= L)
+      {
+        rOffset -= L;
+      }
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *readOffset = rOffset;
+  }
+
+
+  /**
+   * @brief Q7 Circular write function.
+   */
+
+  static __INLINE void arm_circularWrite_q7(
+  q7_t * circBuffer,
+  int32_t L,
+  uint16_t * writeOffset,
+  int32_t bufferInc,
+  const q7_t * src,
+  int32_t srcInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0u;
+    int32_t wOffset;
+
+    /* Copy the value of Index pointer that points
+     * to the current location where the input samples to be copied */
+    wOffset = *writeOffset;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while(i > 0u)
+    {
+      /* copy the input sample to the circular buffer */
+      circBuffer[wOffset] = *src;
+
+      /* Update the input pointer */
+      src += srcInc;
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      wOffset += bufferInc;
+      if(wOffset >= L)
+        wOffset -= L;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *writeOffset = wOffset;
+  }
+
+
+
+  /**
+   * @brief Q7 Circular Read function.
+   */
+  static __INLINE void arm_circularRead_q7(
+  q7_t * circBuffer,
+  int32_t L,
+  int32_t * readOffset,
+  int32_t bufferInc,
+  q7_t * dst,
+  q7_t * dst_base,
+  int32_t dst_length,
+  int32_t dstInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0;
+    int32_t rOffset, dst_end;
+
+    /* Copy the value of Index pointer that points
+     * to the current location from where the input samples to be read */
+    rOffset = *readOffset;
+
+    dst_end = (int32_t) (dst_base + dst_length);
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while(i > 0u)
+    {
+      /* copy the sample from the circular buffer to the destination buffer */
+      *dst = circBuffer[rOffset];
+
+      /* Update the input pointer */
+      dst += dstInc;
+
+      if(dst == (q7_t *) dst_end)
+      {
+        dst = dst_base;
+      }
+
+      /* Circularly update rOffset.  Watch out for positive and negative value */
+      rOffset += bufferInc;
+
+      if(rOffset >= L)
+      {
+        rOffset -= L;
+      }
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *readOffset = rOffset;
+  }
+
+
+  /**
+   * @brief  Sum of the squares of the elements of a Q31 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_power_q31(
+  q31_t * pSrc,
+  uint32_t blockSize,
+  q63_t * pResult);
+
+  /**
+   * @brief  Sum of the squares of the elements of a floating-point vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_power_f32(
+  float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult);
+
+  /**
+   * @brief  Sum of the squares of the elements of a Q15 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_power_q15(
+  q15_t * pSrc,
+  uint32_t blockSize,
+  q63_t * pResult);
+
+  /**
+   * @brief  Sum of the squares of the elements of a Q7 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_power_q7(
+  q7_t * pSrc,
+  uint32_t blockSize,
+  q31_t * pResult);
+
+  /**
+   * @brief  Mean value of a Q7 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_mean_q7(
+  q7_t * pSrc,
+  uint32_t blockSize,
+  q7_t * pResult);
+
+  /**
+   * @brief  Mean value of a Q15 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+  void arm_mean_q15(
+  q15_t * pSrc,
+  uint32_t blockSize,
+  q15_t * pResult);
+
+  /**
+   * @brief  Mean value of a Q31 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+  void arm_mean_q31(
+  q31_t * pSrc,
+  uint32_t blockSize,
+  q31_t * pResult);
+
+  /**
+   * @brief  Mean value of a floating-point vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+  void arm_mean_f32(
+  float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult);
+
+  /**
+   * @brief  Variance of the elements of a floating-point vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_var_f32(
+  float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult);
+
+  /**
+   * @brief  Variance of the elements of a Q31 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_var_q31(
+  q31_t * pSrc,
+  uint32_t blockSize,
+  q31_t * pResult);
+
+  /**
+   * @brief  Variance of the elements of a Q15 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_var_q15(
+  q15_t * pSrc,
+  uint32_t blockSize,
+  q15_t * pResult);
+
+  /**
+   * @brief  Root Mean Square of the elements of a floating-point vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_rms_f32(
+  float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult);
+
+  /**
+   * @brief  Root Mean Square of the elements of a Q31 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_rms_q31(
+  q31_t * pSrc,
+  uint32_t blockSize,
+  q31_t * pResult);
+
+  /**
+   * @brief  Root Mean Square of the elements of a Q15 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_rms_q15(
+  q15_t * pSrc,
+  uint32_t blockSize,
+  q15_t * pResult);
+
+  /**
+   * @brief  Standard deviation of the elements of a floating-point vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_std_f32(
+  float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult);
+
+  /**
+   * @brief  Standard deviation of the elements of a Q31 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_std_q31(
+  q31_t * pSrc,
+  uint32_t blockSize,
+  q31_t * pResult);
+
+  /**
+   * @brief  Standard deviation of the elements of a Q15 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output value.
+   * @return none.
+   */
+
+  void arm_std_q15(
+  q15_t * pSrc,
+  uint32_t blockSize,
+  q15_t * pResult);
+
+  /**
+   * @brief  Floating-point complex magnitude
+   * @param[in]  *pSrc points to the complex input vector
+   * @param[out]  *pDst points to the real output vector
+   * @param[in]  numSamples number of complex samples in the input vector
+   * @return none.
+   */
+
+  void arm_cmplx_mag_f32(
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Q31 complex magnitude
+   * @param[in]  *pSrc points to the complex input vector
+   * @param[out]  *pDst points to the real output vector
+   * @param[in]  numSamples number of complex samples in the input vector
+   * @return none.
+   */
+
+  void arm_cmplx_mag_q31(
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Q15 complex magnitude
+   * @param[in]  *pSrc points to the complex input vector
+   * @param[out]  *pDst points to the real output vector
+   * @param[in]  numSamples number of complex samples in the input vector
+   * @return none.
+   */
+
+  void arm_cmplx_mag_q15(
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Q15 complex dot product
+   * @param[in]  *pSrcA points to the first input vector
+   * @param[in]  *pSrcB points to the second input vector
+   * @param[in]  numSamples number of complex samples in each vector
+   * @param[out]  *realResult real part of the result returned here
+   * @param[out]  *imagResult imaginary part of the result returned here
+   * @return none.
+   */
+
+  void arm_cmplx_dot_prod_q15(
+  q15_t * pSrcA,
+  q15_t * pSrcB,
+  uint32_t numSamples,
+  q31_t * realResult,
+  q31_t * imagResult);
+
+  /**
+   * @brief  Q31 complex dot product
+   * @param[in]  *pSrcA points to the first input vector
+   * @param[in]  *pSrcB points to the second input vector
+   * @param[in]  numSamples number of complex samples in each vector
+   * @param[out]  *realResult real part of the result returned here
+   * @param[out]  *imagResult imaginary part of the result returned here
+   * @return none.
+   */
+
+  void arm_cmplx_dot_prod_q31(
+  q31_t * pSrcA,
+  q31_t * pSrcB,
+  uint32_t numSamples,
+  q63_t * realResult,
+  q63_t * imagResult);
+
+  /**
+   * @brief  Floating-point complex dot product
+   * @param[in]  *pSrcA points to the first input vector
+   * @param[in]  *pSrcB points to the second input vector
+   * @param[in]  numSamples number of complex samples in each vector
+   * @param[out]  *realResult real part of the result returned here
+   * @param[out]  *imagResult imaginary part of the result returned here
+   * @return none.
+   */
+
+  void arm_cmplx_dot_prod_f32(
+  float32_t * pSrcA,
+  float32_t * pSrcB,
+  uint32_t numSamples,
+  float32_t * realResult,
+  float32_t * imagResult);
+
+  /**
+   * @brief  Q15 complex-by-real multiplication
+   * @param[in]  *pSrcCmplx points to the complex input vector
+   * @param[in]  *pSrcReal points to the real input vector
+   * @param[out]  *pCmplxDst points to the complex output vector
+   * @param[in]  numSamples number of samples in each vector
+   * @return none.
+   */
+
+  void arm_cmplx_mult_real_q15(
+  q15_t * pSrcCmplx,
+  q15_t * pSrcReal,
+  q15_t * pCmplxDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Q31 complex-by-real multiplication
+   * @param[in]  *pSrcCmplx points to the complex input vector
+   * @param[in]  *pSrcReal points to the real input vector
+   * @param[out]  *pCmplxDst points to the complex output vector
+   * @param[in]  numSamples number of samples in each vector
+   * @return none.
+   */
+
+  void arm_cmplx_mult_real_q31(
+  q31_t * pSrcCmplx,
+  q31_t * pSrcReal,
+  q31_t * pCmplxDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Floating-point complex-by-real multiplication
+   * @param[in]  *pSrcCmplx points to the complex input vector
+   * @param[in]  *pSrcReal points to the real input vector
+   * @param[out]  *pCmplxDst points to the complex output vector
+   * @param[in]  numSamples number of samples in each vector
+   * @return none.
+   */
+
+  void arm_cmplx_mult_real_f32(
+  float32_t * pSrcCmplx,
+  float32_t * pSrcReal,
+  float32_t * pCmplxDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Minimum value of a Q7 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *result is output pointer
+   * @param[in]  index is the array index of the minimum value in the input buffer.
+   * @return none.
+   */
+
+  void arm_min_q7(
+  q7_t * pSrc,
+  uint32_t blockSize,
+  q7_t * result,
+  uint32_t * index);
+
+  /**
+   * @brief  Minimum value of a Q15 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output pointer
+   * @param[in]  *pIndex is the array index of the minimum value in the input buffer.
+   * @return none.
+   */
+
+  void arm_min_q15(
+  q15_t * pSrc,
+  uint32_t blockSize,
+  q15_t * pResult,
+  uint32_t * pIndex);
+
+  /**
+   * @brief  Minimum value of a Q31 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output pointer
+   * @param[out]  *pIndex is the array index of the minimum value in the input buffer.
+   * @return none.
+   */
+  void arm_min_q31(
+  q31_t * pSrc,
+  uint32_t blockSize,
+  q31_t * pResult,
+  uint32_t * pIndex);
+
+  /**
+   * @brief  Minimum value of a floating-point vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @param[out]  *pResult is output pointer
+   * @param[out]  *pIndex is the array index of the minimum value in the input buffer.
+   * @return none.
+   */
+
+  void arm_min_f32(
+  float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult,
+  uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of a Q7 vector.
+ * @param[in]       *pSrc points to the input buffer
+ * @param[in]       blockSize length of the input vector
+ * @param[out]      *pResult maximum value returned here
+ * @param[out]      *pIndex index of maximum value returned here
+ * @return none.
+ */
+
+  void arm_max_q7(
+  q7_t * pSrc,
+  uint32_t blockSize,
+  q7_t * pResult,
+  uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of a Q15 vector.
+ * @param[in]       *pSrc points to the input buffer
+ * @param[in]       blockSize length of the input vector
+ * @param[out]      *pResult maximum value returned here
+ * @param[out]      *pIndex index of maximum value returned here
+ * @return none.
+ */
+
+  void arm_max_q15(
+  q15_t * pSrc,
+  uint32_t blockSize,
+  q15_t * pResult,
+  uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of a Q31 vector.
+ * @param[in]       *pSrc points to the input buffer
+ * @param[in]       blockSize length of the input vector
+ * @param[out]      *pResult maximum value returned here
+ * @param[out]      *pIndex index of maximum value returned here
+ * @return none.
+ */
+
+  void arm_max_q31(
+  q31_t * pSrc,
+  uint32_t blockSize,
+  q31_t * pResult,
+  uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of a floating-point vector.
+ * @param[in]       *pSrc points to the input buffer
+ * @param[in]       blockSize length of the input vector
+ * @param[out]      *pResult maximum value returned here
+ * @param[out]      *pIndex index of maximum value returned here
+ * @return none.
+ */
+
+  void arm_max_f32(
+  float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult,
+  uint32_t * pIndex);
+
+  /**
+   * @brief  Q15 complex-by-complex multiplication
+   * @param[in]  *pSrcA points to the first input vector
+   * @param[in]  *pSrcB points to the second input vector
+   * @param[out]  *pDst  points to the output vector
+   * @param[in]  numSamples number of complex samples in each vector
+   * @return none.
+   */
+
+  void arm_cmplx_mult_cmplx_q15(
+  q15_t * pSrcA,
+  q15_t * pSrcB,
+  q15_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Q31 complex-by-complex multiplication
+   * @param[in]  *pSrcA points to the first input vector
+   * @param[in]  *pSrcB points to the second input vector
+   * @param[out]  *pDst  points to the output vector
+   * @param[in]  numSamples number of complex samples in each vector
+   * @return none.
+   */
+
+  void arm_cmplx_mult_cmplx_q31(
+  q31_t * pSrcA,
+  q31_t * pSrcB,
+  q31_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief  Floating-point complex-by-complex multiplication
+   * @param[in]  *pSrcA points to the first input vector
+   * @param[in]  *pSrcB points to the second input vector
+   * @param[out]  *pDst  points to the output vector
+   * @param[in]  numSamples number of complex samples in each vector
+   * @return none.
+   */
+
+  void arm_cmplx_mult_cmplx_f32(
+  float32_t * pSrcA,
+  float32_t * pSrcB,
+  float32_t * pDst,
+  uint32_t numSamples);
+
+  /**
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
+   * @param[out]      *pDst points to the Q31 output vector
+   * @param[in]       blockSize length of the input vector
+   * @return none.
+   */
+  void arm_float_to_q31(
+  float32_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Converts the elements of the floating-point vector to Q15 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
+   * @param[out]      *pDst points to the Q15 output vector
+   * @param[in]       blockSize length of the input vector
+   * @return          none
+   */
+  void arm_float_to_q15(
+  float32_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief Converts the elements of the floating-point vector to Q7 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
+   * @param[out]      *pDst points to the Q7 output vector
+   * @param[in]       blockSize length of the input vector
+   * @return          none
+   */
+  void arm_float_to_q7(
+  float32_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to Q15 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[out]  *pDst is output pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @return none.
+   */
+  void arm_q31_to_q15(
+  q31_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to Q7 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[out]  *pDst is output pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @return none.
+   */
+  void arm_q31_to_q7(
+  q31_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+  /**
+   * @brief  Converts the elements of the Q15 vector to floating-point vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[out]  *pDst is output pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @return none.
+   */
+  void arm_q15_to_float(
+  q15_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q15 vector to Q31 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[out]  *pDst is output pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @return none.
+   */
+  void arm_q15_to_q31(
+  q15_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q15 vector to Q7 vector.
+   * @param[in]  *pSrc is input pointer
+   * @param[out]  *pDst is output pointer
+   * @param[in]  blockSize is the number of samples to process
+   * @return none.
+   */
+  void arm_q15_to_q7(
+  q15_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize);
+
+
+  /**
+   * @ingroup groupInterpolation
+   */
+
+  /**
+   * @defgroup BilinearInterpolate Bilinear Interpolation
+   *
+   * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
+   * The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
+   * determines values between the grid points.
+   * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
+   * Bilinear interpolation is often used in image processing to rescale images.
+   * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
+   *
+   * <b>Algorithm</b>
+   * \par
+   * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
+   * For floating-point, the instance structure is defined as:
+   * <pre>
+   *   typedef struct
+   *   {
+   *     uint16_t numRows;
+   *     uint16_t numCols;
+   *     float32_t *pData;
+   * } arm_bilinear_interp_instance_f32;
+   * </pre>
+   *
+   * \par
+   * where <code>numRows</code> specifies the number of rows in the table;
+   * <code>numCols</code> specifies the number of columns in the table;
+   * and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
+   * The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer indexes.
+   * That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are integers.
+   *
+   * \par
+   * Let <code>(x, y)</code> specify the desired interpolation point.  Then define:
+   * <pre>
+   *     XF = floor(x)
+   *     YF = floor(y)
+   * </pre>
+   * \par
+   * The interpolated output point is computed as:
+   * <pre>
+   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
+   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
+   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
+   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
+   * </pre>
+   * Note that the coordinates (x, y) contain integer and fractional components.
+   * The integer components specify which portion of the table to use while the
+   * fractional components control the interpolation processor.
+   *
+   * \par
+   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
+   */
+
+  /**
+   * @addtogroup BilinearInterpolate
+   * @{
+   */
+
+  /**
+  *
+  * @brief  Floating-point bilinear interpolation.
+  * @param[in,out] *S points to an instance of the interpolation structure.
+  * @param[in] X interpolation coordinate.
+  * @param[in] Y interpolation coordinate.
+  * @return out interpolated value.
+  */
+
+
+  static __INLINE float32_t arm_bilinear_interp_f32(
+  const arm_bilinear_interp_instance_f32 * S,
+  float32_t X,
+  float32_t Y)
+  {
+    float32_t out;
+    float32_t f00, f01, f10, f11;
+    float32_t *pData = S->pData;
+    int32_t xIndex, yIndex, index;
+    float32_t xdiff, ydiff;
+    float32_t b1, b2, b3, b4;
+
+    xIndex = (int32_t) X;
+    yIndex = (int32_t) Y;
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if(xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0
+       || yIndex > (S->numCols - 1))
+    {
+      return (0);
+    }
+
+    /* Calculation of index for two nearest points in X-direction */
+    index = (xIndex - 1) + (yIndex - 1) * S->numCols;
+
+
+    /* Read two nearest points in X-direction */
+    f00 = pData[index];
+    f01 = pData[index + 1];
+
+    /* Calculation of index for two nearest points in Y-direction */
+    index = (xIndex - 1) + (yIndex) * S->numCols;
+
+
+    /* Read two nearest points in Y-direction */
+    f10 = pData[index];
+    f11 = pData[index + 1];
+
+    /* Calculation of intermediate values */
+    b1 = f00;
+    b2 = f01 - f00;
+    b3 = f10 - f00;
+    b4 = f00 - f01 - f10 + f11;
+
+    /* Calculation of fractional part in X */
+    xdiff = X - xIndex;
+
+    /* Calculation of fractional part in Y */
+    ydiff = Y - yIndex;
+
+    /* Calculation of bi-linear interpolated output */
+    out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
+
+    /* return to application */
+    return (out);
+
+  }
+
+  /**
+  *
+  * @brief  Q31 bilinear interpolation.
+  * @param[in,out] *S points to an instance of the interpolation structure.
+  * @param[in] X interpolation coordinate in 12.20 format.
+  * @param[in] Y interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+
+  static __INLINE q31_t arm_bilinear_interp_q31(
+  arm_bilinear_interp_instance_q31 * S,
+  q31_t X,
+  q31_t Y)
+  {
+    q31_t out;                                   /* Temporary output */
+    q31_t acc = 0;                               /* output */
+    q31_t xfract, yfract;                        /* X, Y fractional parts */
+    q31_t x1, x2, y1, y2;                        /* Nearest output values */
+    int32_t rI, cI;                              /* Row and column indices */
+    q31_t *pYData = S->pData;                    /* pointer to output table values */
+    uint32_t nCols = S->numCols;                 /* num of rows */
+
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    rI = ((X & 0xFFF00000) >> 20u);
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    cI = ((Y & 0xFFF00000) >> 20u);
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+    {
+      return (0);
+    }
+
+    /* 20 bits for the fractional part */
+    /* shift left xfract by 11 to keep 1.31 format */
+    xfract = (X & 0x000FFFFF) << 11u;
+
+    /* Read two nearest output values from the index */
+    x1 = pYData[(rI) + nCols * (cI)];
+    x2 = pYData[(rI) + nCols * (cI) + 1u];
+
+    /* 20 bits for the fractional part */
+    /* shift left yfract by 11 to keep 1.31 format */
+    yfract = (Y & 0x000FFFFF) << 11u;
+
+    /* Read two nearest output values from the index */
+    y1 = pYData[(rI) + nCols * (cI + 1)];
+    y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
+
+    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
+    out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32));
+    acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
+
+    /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
+    out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
+    acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
+
+    /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
+    out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
+    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
+
+    /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
+    out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
+    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
+
+    /* Convert acc to 1.31(q31) format */
+    return (acc << 2u);
+
+  }
+
+  /**
+  * @brief  Q15 bilinear interpolation.
+  * @param[in,out] *S points to an instance of the interpolation structure.
+  * @param[in] X interpolation coordinate in 12.20 format.
+  * @param[in] Y interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+
+  static __INLINE q15_t arm_bilinear_interp_q15(
+  arm_bilinear_interp_instance_q15 * S,
+  q31_t X,
+  q31_t Y)
+  {
+    q63_t acc = 0;                               /* output */
+    q31_t out;                                   /* Temporary output */
+    q15_t x1, x2, y1, y2;                        /* Nearest output values */
+    q31_t xfract, yfract;                        /* X, Y fractional parts */
+    int32_t rI, cI;                              /* Row and column indices */
+    q15_t *pYData = S->pData;                    /* pointer to output table values */
+    uint32_t nCols = S->numCols;                 /* num of rows */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    rI = ((X & 0xFFF00000) >> 20);
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    cI = ((Y & 0xFFF00000) >> 20);
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+    {
+      return (0);
+    }
+
+    /* 20 bits for the fractional part */
+    /* xfract should be in 12.20 format */
+    xfract = (X & 0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    x1 = pYData[(rI) + nCols * (cI)];
+    x2 = pYData[(rI) + nCols * (cI) + 1u];
+
+
+    /* 20 bits for the fractional part */
+    /* yfract should be in 12.20 format */
+    yfract = (Y & 0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    y1 = pYData[(rI) + nCols * (cI + 1)];
+    y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
+
+    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
+
+    /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
+    /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
+    out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u);
+    acc = ((q63_t) out * (0xFFFFF - yfract));
+
+    /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
+    out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u);
+    acc += ((q63_t) out * (xfract));
+
+    /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
+    out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u);
+    acc += ((q63_t) out * (yfract));
+
+    /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
+    out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u);
+    acc += ((q63_t) out * (yfract));
+
+    /* acc is in 13.51 format and down shift acc by 36 times */
+    /* Convert out to 1.15 format */
+    return (acc >> 36);
+
+  }
+
+  /**
+  * @brief  Q7 bilinear interpolation.
+  * @param[in,out] *S points to an instance of the interpolation structure.
+  * @param[in] X interpolation coordinate in 12.20 format.
+  * @param[in] Y interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+
+  static __INLINE q7_t arm_bilinear_interp_q7(
+  arm_bilinear_interp_instance_q7 * S,
+  q31_t X,
+  q31_t Y)
+  {
+    q63_t acc = 0;                               /* output */
+    q31_t out;                                   /* Temporary output */
+    q31_t xfract, yfract;                        /* X, Y fractional parts */
+    q7_t x1, x2, y1, y2;                         /* Nearest output values */
+    int32_t rI, cI;                              /* Row and column indices */
+    q7_t *pYData = S->pData;                     /* pointer to output table values */
+    uint32_t nCols = S->numCols;                 /* num of rows */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    rI = ((X & 0xFFF00000) >> 20);
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    cI = ((Y & 0xFFF00000) >> 20);
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+    {
+      return (0);
+    }
+
+    /* 20 bits for the fractional part */
+    /* xfract should be in 12.20 format */
+    xfract = (X & 0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    x1 = pYData[(rI) + nCols * (cI)];
+    x2 = pYData[(rI) + nCols * (cI) + 1u];
+
+
+    /* 20 bits for the fractional part */
+    /* yfract should be in 12.20 format */
+    yfract = (Y & 0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    y1 = pYData[(rI) + nCols * (cI + 1)];
+    y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
+
+    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
+    out = ((x1 * (0xFFFFF - xfract)));
+    acc = (((q63_t) out * (0xFFFFF - yfract)));
+
+    /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
+    out = ((x2 * (0xFFFFF - yfract)));
+    acc += (((q63_t) out * (xfract)));
+
+    /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
+    out = ((y1 * (0xFFFFF - xfract)));
+    acc += (((q63_t) out * (yfract)));
+
+    /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
+    out = ((y2 * (yfract)));
+    acc += (((q63_t) out * (xfract)));
+
+    /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
+    return (acc >> 40);
+
+  }
+
+  /**
+   * @} end of BilinearInterpolate group
+   */
+
+
+#if   defined ( __CC_ARM ) //Keil
+//SMMLAR
+  #define multAcc_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+//SMMLSR
+  #define multSub_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+//SMMULR
+  #define mult_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
+
+//Enter low optimization region - place directly above function definition
+  #define LOW_OPTIMIZATION_ENTER \
+     _Pragma ("push")         \
+     _Pragma ("O1")
+
+//Exit low optimization region - place directly after end of function definition
+  #define LOW_OPTIMIZATION_EXIT \
+     _Pragma ("pop")
+
+//Enter low optimization region - place directly above function definition
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+
+//Exit low optimization region - place directly after end of function definition
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__ICCARM__) //IAR
+ //SMMLA
+  #define multAcc_32x32_keep32_R(a, x, y) \
+  a += (q31_t) (((q63_t) x * y) >> 32)
+
+ //SMMLS
+  #define multSub_32x32_keep32_R(a, x, y) \
+  a -= (q31_t) (((q63_t) x * y) >> 32)
+
+//SMMUL
+  #define mult_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((q63_t) x * y ) >> 32)
+
+//Enter low optimization region - place directly above function definition
+  #define LOW_OPTIMIZATION_ENTER \
+     _Pragma ("optimize=low")
+
+//Exit low optimization region - place directly after end of function definition
+  #define LOW_OPTIMIZATION_EXIT
+
+//Enter low optimization region - place directly above function definition
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
+     _Pragma ("optimize=low")
+
+//Exit low optimization region - place directly after end of function definition
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__GNUC__)
+ //SMMLA
+  #define multAcc_32x32_keep32_R(a, x, y) \
+  a += (q31_t) (((q63_t) x * y) >> 32)
+
+ //SMMLS
+  #define multSub_32x32_keep32_R(a, x, y) \
+  a -= (q31_t) (((q63_t) x * y) >> 32)
+
+//SMMUL
+  #define mult_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((q63_t) x * y ) >> 32)
+
+  #define LOW_OPTIMIZATION_ENTER __attribute__(( optimize("-O1") ))
+
+  #define LOW_OPTIMIZATION_EXIT
+
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__CSMC__)		// Cosmic
+ //SMMLA
+  #define multAcc_32x32_keep32_R(a, x, y) \
+  a += (q31_t) (((q63_t) x * y) >> 32)
+
+ //SMMLS
+  #define multSub_32x32_keep32_R(a, x, y) \
+  a -= (q31_t) (((q63_t) x * y) >> 32)
+
+//SMMUL
+  #define mult_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((q63_t) x * y ) >> 32)
+
+#define LOW_OPTIMIZATION_ENTER
+#define LOW_OPTIMIZATION_EXIT
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#endif
+
+
+
+
+
+#ifdef	__cplusplus
+}
+#endif
+
+
+#endif /* _ARM_MATH_H */
+
+
+/**
+ *
+ * End of file.
+ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm0.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm0.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm0.h	(revision 136)
@@ -0,0 +1,702 @@
+/**************************************************************************//**
+ * @file     core_cm0.h
+ * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
+ * @version  V3.30
+ * @date     24. February 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include  /* treat file as system include file for MISRA check */
+#endif
+
+#ifndef __CORE_CM0_H_GENERIC
+#define __CORE_CM0_H_GENERIC
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/** \ingroup Cortex_M0
+  @{
+ */
+
+/*  CMSIS CM0 definitions */
+#define __CM0_CMSIS_VERSION_MAIN  (0x03)                                   /*!< [31:16] CMSIS HAL main version   */
+#define __CM0_CMSIS_VERSION_SUB   (0x20)                                   /*!< [15:0]  CMSIS HAL sub version    */
+#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16) | \
+                                    __CM0_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */
+
+#define __CORTEX_M                (0x00)                                   /*!< Cortex-M Core                    */
+
+
+#if   defined ( __CC_ARM )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined ( __GNUC__ )
+  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __ICCARM__ )
+  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TMS470__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TASKING__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
+  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #define __packed
+  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
+  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
+*/
+#define __FPU_USED       0
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TMS470__ )
+  #if defined __TI__VFP_SUPPORT____
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #if ( __CSMC__ & 0x400)		// FPU present for parser
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+#endif
+
+#include <stdint.h>                      /* standard types definitions                      */
+#include <core_cmInstr.h>                /* Core Instruction Access                         */
+#include <core_cmFunc.h>                 /* Core Function Access                            */
+
+#endif /* __CORE_CM0_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM0_H_DEPENDANT
+#define __CORE_CM0_H_DEPENDANT
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM0_REV
+    #define __CM0_REV               0x0000
+    #warning "__CM0_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions                */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+
+/*@} end of group Cortex_M0 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+ ******************************************************************************/
+/** \defgroup CMSIS_core_register Defines and Type Definitions
+    \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_CORE  Status and Control Registers
+    \brief  Core Register type definitions.
+  @{
+ */
+
+/** \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
+#else
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
+#endif
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} APSR_Type;
+
+
+/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} IPSR_Type;
+
+
+/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
+#else
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
+#endif
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} xPSR_Type;
+
+
+/** \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} CONTROL_Type;
+
+/*@} end of group CMSIS_CORE */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+    \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IO uint32_t ISER[1];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
+       uint32_t RESERVED0[31];
+  __IO uint32_t ICER[1];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register          */
+       uint32_t RSERVED1[31];
+  __IO uint32_t ISPR[1];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register           */
+       uint32_t RESERVED2[31];
+  __IO uint32_t ICPR[1];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register         */
+       uint32_t RESERVED3[31];
+       uint32_t RESERVED4[64];
+  __IO uint32_t IP[8];                   /*!< Offset: 0x300 (R/W)  Interrupt Priority Register              */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCB     System Control Block (SCB)
+    \brief      Type definitions for the System Control Block Registers
+  @{
+ */
+
+/** \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
+  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
+       uint32_t RESERVED0;
+  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
+  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
+  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
+       uint32_t RESERVED1;
+  __IO uint32_t SHP[2];                  /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED   */
+  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)              /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)           /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+    \brief      Type definitions for the System Timer Registers.
+  @{
+ */
+
+/** \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+    \brief      Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR)
+                are only accessible over DAP and not via processor. Therefore
+                they are not covered by the Cortex-M0 header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_core_base     Core Definitions
+    \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Cortex-M0 Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address              */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                 */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+    \brief      Functions that manage interrupts and exceptions via the NVIC.
+    @{
+ */
+
+/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  (((uint32_t)(IRQn)       )    &  0x03) * 8 )
+#define _SHP_IDX(IRQn)           ( ((((uint32_t)(IRQn) & 0x0F)-8) >>    2)     )
+#define _IP_IDX(IRQn)            (   ((uint32_t)(IRQn)            >>    2)     )
+
+
+/** \brief  Enable External Interrupt
+
+    The function enables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Disable External Interrupt
+
+    The function disables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Get Pending Interrupt
+
+    The function reads the pending register in the NVIC and returns the pending bit
+    for the specified interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not pending.
+    \return             1  Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
+}
+
+
+/** \brief  Set Pending Interrupt
+
+    The function sets the pending bit of an external interrupt.
+
+    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Clear Pending Interrupt
+
+    The function clears the pending bit of an external interrupt.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
+}
+
+
+/** \brief  Set Interrupt Priority
+
+    The function sets the priority of an interrupt.
+
+    \note The priority cannot be set for every core interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+    \param [in]  priority  Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if(IRQn < 0) {
+    SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+  else {
+    NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+}
+
+
+/** \brief  Get Interrupt Priority
+
+    The function reads the priority of an interrupt. The interrupt
+    number can be positive to specify an external (device specific)
+    interrupt, or negative to specify an internal (core) interrupt.
+
+
+    \param [in]   IRQn  Interrupt number.
+    \return             Interrupt Priority. Value is aligned automatically to the implemented
+                        priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if(IRQn < 0) {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M0 system interrupts */
+  else {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
+}
+
+
+/** \brief  System Reset
+
+    The function initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+  __DSB();                                                     /* Ensure all outstanding memory accesses included
+                                                                  buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                     /* Ensure completion of memory access */
+  while(1);                                                    /* wait until reset */
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+    \brief      Functions that configure the System.
+  @{
+ */
+
+#if (__Vendor_SysTickConfig == 0)
+
+/** \brief  System Tick Configuration
+
+    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
+    Counter is in free running mode to generate periodic interrupts.
+
+    \param [in]  ticks  Number of ticks between two interrupts.
+
+    \return          0  Function succeeded.
+    \return          1  Function failed.
+
+    \note     When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+    function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+    must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk)  return (1);      /* Reload value impossible */
+
+  SysTick->LOAD  = ticks - 1;                                  /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
+  return (0);                                                  /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#endif /* __CORE_CM0_H_DEPENDANT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CMSIS_GENERIC */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm0plus.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm0plus.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm0plus.h	(revision 136)
@@ -0,0 +1,817 @@
+/**************************************************************************//**
+ * @file     core_cm0plus.h
+ * @brief    CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
+ * @version  V3.30
+ * @date     24. February 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include  /* treat file as system include file for MISRA check */
+#endif
+
+#ifndef __CORE_CM0PLUS_H_GENERIC
+#define __CORE_CM0PLUS_H_GENERIC
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/** \ingroup Cortex-M0+
+  @{
+ */
+
+/*  CMSIS CM0P definitions */
+#define __CM0PLUS_CMSIS_VERSION_MAIN (0x03)                                /*!< [31:16] CMSIS HAL main version   */
+#define __CM0PLUS_CMSIS_VERSION_SUB  (0x20)                                /*!< [15:0]  CMSIS HAL sub version    */
+#define __CM0PLUS_CMSIS_VERSION      ((__CM0PLUS_CMSIS_VERSION_MAIN << 16) | \
+                                       __CM0PLUS_CMSIS_VERSION_SUB)        /*!< CMSIS HAL version number         */
+
+#define __CORTEX_M                (0x00)                                   /*!< Cortex-M Core                    */
+
+
+#if   defined ( __CC_ARM )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined ( __GNUC__ )
+  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __ICCARM__ )
+  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TMS470__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TASKING__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
+  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #define __packed
+  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
+  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
+*/
+#define __FPU_USED       0
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TMS470__ )
+  #if defined __TI__VFP_SUPPORT____
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #if ( __CSMC__ & 0x400)		// FPU present for parser
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+#endif
+
+#include <stdint.h>                      /* standard types definitions                      */
+#include <core_cmInstr.h>                /* Core Instruction Access                         */
+#include <core_cmFunc.h>                 /* Core Function Access                            */
+
+#endif /* __CORE_CM0PLUS_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM0PLUS_H_DEPENDANT
+#define __CORE_CM0PLUS_H_DEPENDANT
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM0PLUS_REV
+    #define __CM0PLUS_REV             0x0000
+    #warning "__CM0PLUS_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT            0
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions                */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+
+/*@} end of group Cortex-M0+ */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core MPU Register
+ ******************************************************************************/
+/** \defgroup CMSIS_core_register Defines and Type Definitions
+    \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_CORE  Status and Control Registers
+    \brief  Core Register type definitions.
+  @{
+ */
+
+/** \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
+#else
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
+#endif
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} APSR_Type;
+
+
+/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} IPSR_Type;
+
+
+/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
+#else
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
+#endif
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} xPSR_Type;
+
+
+/** \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} CONTROL_Type;
+
+/*@} end of group CMSIS_CORE */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+    \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IO uint32_t ISER[1];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
+       uint32_t RESERVED0[31];
+  __IO uint32_t ICER[1];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register          */
+       uint32_t RSERVED1[31];
+  __IO uint32_t ISPR[1];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register           */
+       uint32_t RESERVED2[31];
+  __IO uint32_t ICPR[1];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register         */
+       uint32_t RESERVED3[31];
+       uint32_t RESERVED4[64];
+  __IO uint32_t IP[8];                   /*!< Offset: 0x300 (R/W)  Interrupt Priority Register              */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCB     System Control Block (SCB)
+    \brief      Type definitions for the System Control Block Registers
+  @{
+ */
+
+/** \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
+  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
+#if (__VTOR_PRESENT == 1)
+  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
+#else
+       uint32_t RESERVED0;
+#endif
+  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
+  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
+  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
+       uint32_t RESERVED1;
+  __IO uint32_t SHP[2];                  /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED   */
+  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)              /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)           /*!< SCB ICSR: VECTACTIVE Mask */
+
+#if (__VTOR_PRESENT == 1)
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 8                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
+#endif
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+    \brief      Type definitions for the System Timer Registers.
+  @{
+ */
+
+/** \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+#if (__MPU_PRESENT == 1)
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+    \brief      Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/** \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
+  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
+  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
+  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
+  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
+} MPU_Type;
+
+/* MPU Type Register */
+#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL << MPU_TYPE_SEPARATE_Pos)                 /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register */
+#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL << MPU_CTRL_ENABLE_Pos)                   /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register */
+#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL << MPU_RNR_REGION_Pos)                 /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register */
+#define MPU_RBAR_ADDR_Pos                   8                                             /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL << MPU_RBAR_REGION_Pos)                 /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register */
+#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL << MPU_RASR_ENABLE_Pos)                   /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+    \brief      Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR)
+                are only accessible over DAP and not via processor. Therefore
+                they are not covered by the Cortex-M0 header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_core_base     Core Definitions
+    \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Cortex-M0+ Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address              */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                 */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+
+#if (__MPU_PRESENT == 1)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+    \brief      Functions that manage interrupts and exceptions via the NVIC.
+    @{
+ */
+
+/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  (((uint32_t)(IRQn)       )    &  0x03) * 8 )
+#define _SHP_IDX(IRQn)           ( ((((uint32_t)(IRQn) & 0x0F)-8) >>    2)     )
+#define _IP_IDX(IRQn)            (   ((uint32_t)(IRQn)            >>    2)     )
+
+
+/** \brief  Enable External Interrupt
+
+    The function enables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+//  NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+    extern void rca_ena_int(uint32_t intno);
+    rca_ena_int(IRQn);
+}
+
+
+/** \brief  Disable External Interrupt
+
+    The function disables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+//  NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+    extern void rca_dis_int(uint32_t intno);
+    rca_dis_int(IRQn);
+}
+
+
+/** \brief  Get Pending Interrupt
+
+    The function reads the pending register in the NVIC and returns the pending bit
+    for the specified interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not pending.
+    \return             1  Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
+}
+
+
+/** \brief  Set Pending Interrupt
+
+    The function sets the pending bit of an external interrupt.
+
+    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Clear Pending Interrupt
+
+    The function clears the pending bit of an external interrupt.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
+}
+
+
+/** \brief  Set Interrupt Priority
+
+    The function sets the priority of an interrupt.
+
+    \note The priority cannot be set for every core interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+    \param [in]  priority  Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if(IRQn < 0) {
+    SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+  else {
+    NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+}
+
+
+/** \brief  Get Interrupt Priority
+
+    The function reads the priority of an interrupt. The interrupt
+    number can be positive to specify an external (device specific)
+    interrupt, or negative to specify an internal (core) interrupt.
+
+
+    \param [in]   IRQn  Interrupt number.
+    \return             Interrupt Priority. Value is aligned automatically to the implemented
+                        priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if(IRQn < 0) {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M0 system interrupts */
+  else {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
+}
+
+
+/** \brief  System Reset
+
+    The function initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+  __DSB();                                                     /* Ensure all outstanding memory accesses included
+                                                                  buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                     /* Ensure completion of memory access */
+  while(1);                                                    /* wait until reset */
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+    \brief      Functions that configure the System.
+  @{
+ */
+
+#if (__Vendor_SysTickConfig == 0)
+
+/** \brief  System Tick Configuration
+
+    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
+    Counter is in free running mode to generate periodic interrupts.
+
+    \param [in]  ticks  Number of ticks between two interrupts.
+
+    \return          0  Function succeeded.
+    \return          1  Function failed.
+
+    \note     When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+    function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+    must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk)  return (1);      /* Reload value impossible */
+
+  SysTick->LOAD  = ticks - 1;                                  /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
+  return (0);                                                  /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#endif /* __CORE_CM0PLUS_H_DEPENDANT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CMSIS_GENERIC */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm3.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm3.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm3.h	(revision 136)
@@ -0,0 +1,1638 @@
+/**************************************************************************//**
+ * @file     core_cm3.h
+ * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
+ * @version  V3.30
+ * @date     24. February 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include  /* treat file as system include file for MISRA check */
+#endif
+
+#ifndef __CORE_CM3_H_GENERIC
+#define __CORE_CM3_H_GENERIC
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/** \ingroup Cortex_M3
+  @{
+ */
+
+/*  CMSIS CM3 definitions */
+#define __CM3_CMSIS_VERSION_MAIN  (0x03)                                   /*!< [31:16] CMSIS HAL main version   */
+#define __CM3_CMSIS_VERSION_SUB   (0x20)                                   /*!< [15:0]  CMSIS HAL sub version    */
+#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | \
+                                    __CM3_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */
+
+#define __CORTEX_M                (0x03)                                   /*!< Cortex-M Core                    */
+
+
+#if   defined ( __CC_ARM )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined ( __GNUC__ )
+  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __ICCARM__ )
+  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TMS470__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TASKING__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
+  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __CSMC__ )	/* Cosmic */
+  #define __packed
+  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
+  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
+*/
+#define __FPU_USED       0
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TMS470__ )
+  #if defined __TI__VFP_SUPPORT____
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #if ( __CSMC__ & 0x400)		// FPU present for parser
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+#endif
+
+#include <stdint.h>                      /* standard types definitions                      */
+#include <core_cmInstr.h>                /* Core Instruction Access                         */
+#include <core_cmFunc.h>                 /* Core Function Access                            */
+
+#endif /* __CORE_CM3_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM3_H_DEPENDANT
+#define __CORE_CM3_H_DEPENDANT
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM3_REV
+    #define __CM3_REV               0x0200
+    #warning "__CM3_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          4
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions                */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+
+/*@} end of group Cortex_M3 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+ ******************************************************************************/
+/** \defgroup CMSIS_core_register Defines and Type Definitions
+    \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_CORE  Status and Control Registers
+    \brief  Core Register type definitions.
+  @{
+ */
+
+/** \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
+#else
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
+#endif
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} APSR_Type;
+
+
+/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} IPSR_Type;
+
+
+/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
+#else
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
+#endif
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} xPSR_Type;
+
+
+/** \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} CONTROL_Type;
+
+/*@} end of group CMSIS_CORE */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+    \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IO uint32_t ISER[8];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
+       uint32_t RESERVED0[24];
+  __IO uint32_t ICER[8];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register         */
+       uint32_t RSERVED1[24];
+  __IO uint32_t ISPR[8];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register          */
+       uint32_t RESERVED2[24];
+  __IO uint32_t ICPR[8];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register        */
+       uint32_t RESERVED3[24];
+  __IO uint32_t IABR[8];                 /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register           */
+       uint32_t RESERVED4[56];
+  __IO uint8_t  IP[240];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+       uint32_t RESERVED5[644];
+  __O  uint32_t STIR;                    /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register     */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0                                          /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL << NVIC_STIR_INTID_Pos)            /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCB     System Control Block (SCB)
+    \brief      Type definitions for the System Control Block Registers
+  @{
+ */
+
+/** \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
+  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
+  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
+  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
+  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
+  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
+  __IO uint8_t  SHP[12];                 /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+  __IO uint32_t CFSR;                    /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register                    */
+  __IO uint32_t HFSR;                    /*!< Offset: 0x02C (R/W)  HardFault Status Register                             */
+  __IO uint32_t DFSR;                    /*!< Offset: 0x030 (R/W)  Debug Fault Status Register                           */
+  __IO uint32_t MMFAR;                   /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register                      */
+  __IO uint32_t BFAR;                    /*!< Offset: 0x038 (R/W)  BusFault Address Register                             */
+  __IO uint32_t AFSR;                    /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register                       */
+  __I  uint32_t PFR[2];                  /*!< Offset: 0x040 (R/ )  Processor Feature Register                            */
+  __I  uint32_t DFR;                     /*!< Offset: 0x048 (R/ )  Debug Feature Register                                */
+  __I  uint32_t ADR;                     /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register                            */
+  __I  uint32_t MMFR[4];                 /*!< Offset: 0x050 (R/ )  Memory Model Feature Register                         */
+  __I  uint32_t ISAR[5];                 /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register                   */
+       uint32_t RESERVED0[5];
+  __IO uint32_t CPACR;                   /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register                   */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)              /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11                                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)           /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#if (__CM3_REV < 0x0201)                   /* core r2p1 */
+#define SCB_VTOR_TBLBASE_Pos               29                                             /*!< SCB VTOR: TBLBASE Position */
+#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
+
+#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
+#else
+#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+#endif
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8                                             /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos             0                                             /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk            (1UL << SCB_AIRCR_VECTRESET_Pos)               /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8                                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4                                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1                                             /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos          0                                             /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk         (1UL << SCB_CCR_NONBASETHRDENA_Pos)            /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos          18                                             /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17                                             /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16                                             /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14                                             /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13                                             /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12                                             /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11                                             /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10                                             /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8                                             /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7                                             /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3                                             /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1                                             /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0                                             /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL << SCB_SHCSR_MEMFAULTACT_Pos)             /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Registers Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16                                             /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8                                             /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0                                             /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)            /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* SCB Hard Fault Status Registers Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31                                             /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30                                             /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1                                             /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4                                             /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3                                             /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2                                             /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1                                             /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0                                             /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL << SCB_DFSR_HALTED_Pos)                   /*!< SCB DFSR: HALTED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+    \brief      Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/** \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+       uint32_t RESERVED0[1];
+  __I  uint32_t ICTR;                    /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register      */
+#if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
+  __IO uint32_t ACTLR;                   /*!< Offset: 0x008 (R/W)  Auxiliary Control Register      */
+#else
+       uint32_t RESERVED1[1];
+#endif
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0                                          /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)      /*!< ICTR: INTLINESNUM Mask */
+
+/* Auxiliary Control Register Definitions */
+
+#define SCnSCB_ACTLR_DISFOLD_Pos            2                                          /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1                                          /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0                                          /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)        /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+    \brief      Type definitions for the System Timer Registers.
+  @{
+ */
+
+/** \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+    \brief      Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/** \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __O  union
+  {
+    __O  uint8_t    u8;                  /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit                   */
+    __O  uint16_t   u16;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit                  */
+    __O  uint32_t   u32;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit                  */
+  }  PORT [32];                          /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers               */
+       uint32_t RESERVED0[864];
+  __IO uint32_t TER;                     /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register                 */
+       uint32_t RESERVED1[15];
+  __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
+       uint32_t RESERVED2[15];
+  __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
+       uint32_t RESERVED3[29];
+  __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
+  __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
+  __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
+       uint32_t RESERVED4[43];
+  __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
+  __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
+       uint32_t RESERVED5[6];
+  __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __I  uint32_t PID7;                    /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __I  uint32_t PID0;                    /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __I  uint32_t PID1;                    /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __I  uint32_t PID2;                    /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __I  uint32_t PID3;                    /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __I  uint32_t CID0;                    /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __I  uint32_t CID1;                    /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __I  uint32_t CID2;                    /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __I  uint32_t CID3;                    /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0                                             /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL << ITM_TPR_PRIVMASK_Pos)                /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23                                             /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos             16                                             /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10                                             /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos              8                                             /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4                                             /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3                                             /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2                                             /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1                                             /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0                                             /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL << ITM_TCR_ITMENA_Pos)                    /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Integration Write Register Definitions */
+#define ITM_IWR_ATVALIDM_Pos                0                                             /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk               (1UL << ITM_IWR_ATVALIDM_Pos)                  /*!< ITM IWR: ATVALIDM Mask */
+
+/* ITM Integration Read Register Definitions */
+#define ITM_IRR_ATREADYM_Pos                0                                             /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk               (1UL << ITM_IRR_ATREADYM_Pos)                  /*!< ITM IRR: ATREADYM Mask */
+
+/* ITM Integration Mode Control Register Definitions */
+#define ITM_IMCR_INTEGRATION_Pos            0                                             /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk           (1UL << ITM_IMCR_INTEGRATION_Pos)              /*!< ITM IMCR: INTEGRATION Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2                                             /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1                                             /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0                                             /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL << ITM_LSR_Present_Pos)                   /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+    \brief      Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/** \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  Control Register                          */
+  __IO uint32_t CYCCNT;                  /*!< Offset: 0x004 (R/W)  Cycle Count Register                      */
+  __IO uint32_t CPICNT;                  /*!< Offset: 0x008 (R/W)  CPI Count Register                        */
+  __IO uint32_t EXCCNT;                  /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register         */
+  __IO uint32_t SLEEPCNT;                /*!< Offset: 0x010 (R/W)  Sleep Count Register                      */
+  __IO uint32_t LSUCNT;                  /*!< Offset: 0x014 (R/W)  LSU Count Register                        */
+  __IO uint32_t FOLDCNT;                 /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register         */
+  __I  uint32_t PCSR;                    /*!< Offset: 0x01C (R/ )  Program Counter Sample Register           */
+  __IO uint32_t COMP0;                   /*!< Offset: 0x020 (R/W)  Comparator Register 0                     */
+  __IO uint32_t MASK0;                   /*!< Offset: 0x024 (R/W)  Mask Register 0                           */
+  __IO uint32_t FUNCTION0;               /*!< Offset: 0x028 (R/W)  Function Register 0                       */
+       uint32_t RESERVED0[1];
+  __IO uint32_t COMP1;                   /*!< Offset: 0x030 (R/W)  Comparator Register 1                     */
+  __IO uint32_t MASK1;                   /*!< Offset: 0x034 (R/W)  Mask Register 1                           */
+  __IO uint32_t FUNCTION1;               /*!< Offset: 0x038 (R/W)  Function Register 1                       */
+       uint32_t RESERVED1[1];
+  __IO uint32_t COMP2;                   /*!< Offset: 0x040 (R/W)  Comparator Register 2                     */
+  __IO uint32_t MASK2;                   /*!< Offset: 0x044 (R/W)  Mask Register 2                           */
+  __IO uint32_t FUNCTION2;               /*!< Offset: 0x048 (R/W)  Function Register 2                       */
+       uint32_t RESERVED2[1];
+  __IO uint32_t COMP3;                   /*!< Offset: 0x050 (R/W)  Comparator Register 3                     */
+  __IO uint32_t MASK3;                   /*!< Offset: 0x054 (R/W)  Mask Register 3                           */
+  __IO uint32_t FUNCTION3;               /*!< Offset: 0x058 (R/W)  Function Register 3                       */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28                                          /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27                                          /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26                                          /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25                                          /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24                                          /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22                                          /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21                                          /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20                                          /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19                                          /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18                                          /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17                                          /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16                                          /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12                                          /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10                                          /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9                                          /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5                                          /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1                                          /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0                                          /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL << DWT_CTRL_CYCCNTENA_Pos)           /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0                                          /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL << DWT_CPICNT_CPICNT_Pos)           /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0                                          /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL << DWT_EXCCNT_EXCCNT_Pos)           /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0                                          /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL << DWT_SLEEPCNT_SLEEPCNT_Pos)       /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0                                          /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL << DWT_LSUCNT_LSUCNT_Pos)           /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0                                          /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL << DWT_FOLDCNT_FOLDCNT_Pos)         /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos                   0                                          /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk                  (0x1FUL << DWT_MASK_MASK_Pos)               /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos           24                                          /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos        16                                          /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos        12                                          /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10                                          /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos            9                                          /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos         8                                          /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos           7                                          /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos          5                                          /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos           0                                          /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL << DWT_FUNCTION_FUNCTION_Pos)        /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+    \brief      Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/** \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IO uint32_t SSPSR;                   /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register     */
+  __IO uint32_t CSPSR;                   /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+       uint32_t RESERVED0[2];
+  __IO uint32_t ACPR;                    /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+       uint32_t RESERVED1[55];
+  __IO uint32_t SPPR;                    /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+       uint32_t RESERVED2[131];
+  __I  uint32_t FFSR;                    /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IO uint32_t FFCR;                    /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __I  uint32_t FSCR;                    /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+       uint32_t RESERVED3[759];
+  __I  uint32_t TRIGGER;                 /*!< Offset: 0xEE8 (R/ )  TRIGGER */
+  __I  uint32_t FIFO0;                   /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __I  uint32_t ITATBCTR2;               /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+       uint32_t RESERVED4[1];
+  __I  uint32_t ITATBCTR0;               /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __I  uint32_t FIFO1;                   /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IO uint32_t ITCTRL;                  /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+       uint32_t RESERVED5[39];
+  __IO uint32_t CLAIMSET;                /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IO uint32_t CLAIMCLR;                /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+       uint32_t RESERVED7[8];
+  __I  uint32_t DEVID;                   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __I  uint32_t DEVTYPE;                 /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0                                          /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL << TPI_ACPR_PRESCALER_Pos)        /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0                                          /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL << TPI_SPPR_TXMODE_Pos)              /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3                                          /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2                                          /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1                                          /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0                                          /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL << TPI_FFSR_FlInProg_Pos)            /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8                                          /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1                                          /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0                                          /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL << TPI_TRIGGER_TRIGGER_Pos)          /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27                                          /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24                                          /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16                                          /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8                                          /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0                                          /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL << TPI_FIFO0_ETM0_Pos)              /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY_Pos           0                                          /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL << TPI_ITATBCTR2_ATREADY_Pos)        /*!< TPI ITATBCTR2: ATREADY Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27                                          /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24                                          /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16                                          /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8                                          /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0                                          /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL << TPI_FIFO1_ITM0_Pos)              /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY_Pos           0                                          /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL << TPI_ITATBCTR0_ATREADY_Pos)        /*!< TPI ITATBCTR0: ATREADY Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0                                          /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x1UL << TPI_ITCTRL_Mode_Pos)              /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11                                          /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10                                          /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9                                          /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6                                          /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5                                          /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0                                          /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL << TPI_DEVID_NrTraceInput_Pos)      /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             0                                          /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL << TPI_DEVTYPE_SubType_Pos)          /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           4                                          /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if (__MPU_PRESENT == 1)
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+    \brief      Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/** \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
+  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
+  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
+  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
+  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
+  __IO uint32_t RBAR_A1;                 /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register       */
+  __IO uint32_t RASR_A1;                 /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IO uint32_t RBAR_A2;                 /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register       */
+  __IO uint32_t RASR_A2;                 /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IO uint32_t RBAR_A3;                 /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register       */
+  __IO uint32_t RASR_A3;                 /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+/* MPU Type Register */
+#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL << MPU_TYPE_SEPARATE_Pos)                 /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register */
+#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL << MPU_CTRL_ENABLE_Pos)                   /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register */
+#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL << MPU_RNR_REGION_Pos)                 /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register */
+#define MPU_RBAR_ADDR_Pos                   5                                             /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL << MPU_RBAR_REGION_Pos)                 /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register */
+#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL << MPU_RASR_ENABLE_Pos)                   /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+    \brief      Type definitions for the Core Debug Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IO uint32_t DHCSR;                   /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register    */
+  __O  uint32_t DCRSR;                   /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register        */
+  __IO uint32_t DCRDR;                   /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register            */
+  __IO uint32_t DEMCR;                   /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16                                             /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25                                             /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24                                             /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19                                             /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18                                             /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17                                             /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16                                             /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5                                             /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3                                             /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2                                             /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1                                             /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0                                             /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)         /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register */
+#define CoreDebug_DCRSR_REGWnR_Pos         16                                             /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0                                             /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)         /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register */
+#define CoreDebug_DEMCR_TRCENA_Pos         24                                             /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19                                             /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18                                             /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17                                             /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16                                             /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10                                             /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9                                             /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8                                             /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7                                             /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6                                             /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5                                             /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4                                             /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0                                             /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)      /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_core_base     Core Definitions
+    \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Cortex-M3 Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address  */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address                   */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address                   */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address                   */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address            */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address               */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                  */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address  */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct           */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct           */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct           */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct    */
+
+#if (__MPU_PRESENT == 1)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+    \brief      Functions that manage interrupts and exceptions via the NVIC.
+    @{
+ */
+
+/** \brief  Set Priority Grouping
+
+  The function sets the priority grouping field using the required unlock sequence.
+  The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+  Only values from 0..7 are used.
+  In case of a conflict between priority grouping and available
+  priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+
+    \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07);               /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk);             /* clear bits to change               */
+  reg_value  =  (reg_value                                 |
+                ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << 8));                                     /* Insert write key and priorty group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/** \brief  Get Priority Grouping
+
+  The function reads the priority grouping field from the NVIC Interrupt Controller.
+
+    \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+{
+  return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos);   /* read priority grouping field */
+}
+
+
+/** \brief  Enable External Interrupt
+
+    The function enables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
+}
+
+
+/** \brief  Disable External Interrupt
+
+    The function disables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
+}
+
+
+/** \brief  Get Pending Interrupt
+
+    The function reads the pending register in the NVIC and returns the pending bit
+    for the specified interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not pending.
+    \return             1  Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
+}
+
+
+/** \brief  Set Pending Interrupt
+
+    The function sets the pending bit of an external interrupt.
+
+    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
+}
+
+
+/** \brief  Clear Pending Interrupt
+
+    The function clears the pending bit of an external interrupt.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
+}
+
+
+/** \brief  Get Active Interrupt
+
+    The function reads the active register in NVIC and returns the active bit.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not active.
+    \return             1  Interrupt status is active.
+ */
+__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+{
+  return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
+}
+
+
+/** \brief  Set Interrupt Priority
+
+    The function sets the priority of an interrupt.
+
+    \note The priority cannot be set for every core interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+    \param [in]  priority  Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if(IRQn < 0) {
+    SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M  System Interrupts */
+  else {
+    NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }        /* set Priority for device specific Interrupts  */
+}
+
+
+/** \brief  Get Interrupt Priority
+
+    The function reads the priority of an interrupt. The interrupt
+    number can be positive to specify an external (device specific)
+    interrupt, or negative to specify an internal (core) interrupt.
+
+
+    \param [in]   IRQn  Interrupt number.
+    \return             Interrupt Priority. Value is aligned automatically to the implemented
+                        priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if(IRQn < 0) {
+    return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M  system interrupts */
+  else {
+    return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)]           >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
+}
+
+
+/** \brief  Encode Priority
+
+    The function encodes the priority for an interrupt with the given priority group,
+    preemptive priority value, and subpriority value.
+    In case of a conflict between priority grouping and available
+    priority bits (__NVIC_PRIO_BITS), the samllest possible priority group is set.
+
+    \param [in]     PriorityGroup  Used priority group.
+    \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+    \param [in]       SubPriority  Subpriority value (starting from 0).
+    \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
+  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
+
+  return (
+           ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
+           ((SubPriority     & ((1 << (SubPriorityBits    )) - 1)))
+         );
+}
+
+
+/** \brief  Decode Priority
+
+    The function decodes an interrupt priority value with a given priority group to
+    preemptive priority value and subpriority value.
+    In case of a conflict between priority grouping and available
+    priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
+
+    \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+    \param [in]     PriorityGroup  Used priority group.
+    \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+    \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
+  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
+  *pSubPriority     = (Priority                   ) & ((1 << (SubPriorityBits    )) - 1);
+}
+
+
+/** \brief  System Reset
+
+    The function initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+  __DSB();                                                     /* Ensure all outstanding memory accesses included
+                                                                  buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
+                 (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);                   /* Keep priority group unchanged */
+  __DSB();                                                     /* Ensure completion of memory access */
+  while(1);                                                    /* wait until reset */
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+    \brief      Functions that configure the System.
+  @{
+ */
+
+#if (__Vendor_SysTickConfig == 0)
+
+/** \brief  System Tick Configuration
+
+    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
+    Counter is in free running mode to generate periodic interrupts.
+
+    \param [in]  ticks  Number of ticks between two interrupts.
+
+    \return          0  Function succeeded.
+    \return          1  Function failed.
+
+    \note     When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+    function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+    must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk)  return (1);      /* Reload value impossible */
+
+  SysTick->LOAD  = ticks - 1;                                  /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
+  return (0);                                                  /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_core_DebugFunctions ITM Functions
+    \brief   Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters.                         */
+#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/** \brief  ITM Send Character
+
+    The function transmits a character via the ITM channel 0, and
+    \li Just returns when no debugger is connected that has booked the output.
+    \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+
+    \param [in]     ch  Character to transmit.
+
+    \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if ((ITM->TCR & ITM_TCR_ITMENA_Msk)                  &&      /* ITM enabled */
+      (ITM->TER & (1UL << 0)        )                    )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0].u32 == 0);
+    ITM->PORT[0].u8 = (uint8_t) ch;
+  }
+  return (ch);
+}
+
+
+/** \brief  ITM Receive Character
+
+    The function inputs a character via the external variable \ref ITM_RxBuffer.
+
+    \return             Received character.
+    \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/** \brief  ITM Check Character
+
+    The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+
+    \return          0  No character available.
+    \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void) {
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
+    return (0);                                 /* no character available */
+  } else {
+    return (1);                                 /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+#endif /* __CORE_CM3_H_DEPENDANT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CMSIS_GENERIC */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm4.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm4.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm4.h	(revision 136)
@@ -0,0 +1,1790 @@
+/**************************************************************************//**
+ * @file     core_cm4.h
+ * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File
+ * @version  V3.30
+ * @date     24. February 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include  /* treat file as system include file for MISRA check */
+#endif
+
+#ifndef __CORE_CM4_H_GENERIC
+#define __CORE_CM4_H_GENERIC
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/** \ingroup Cortex_M4
+  @{
+ */
+
+/*  CMSIS CM4 definitions */
+#define __CM4_CMSIS_VERSION_MAIN  (0x03)                                   /*!< [31:16] CMSIS HAL main version   */
+#define __CM4_CMSIS_VERSION_SUB   (0x20)                                   /*!< [15:0]  CMSIS HAL sub version    */
+#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16) | \
+                                    __CM4_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */
+
+#define __CORTEX_M                (0x04)                                   /*!< Cortex-M Core                    */
+
+
+#if   defined ( __CC_ARM )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined ( __GNUC__ )
+  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __ICCARM__ )
+  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TMS470__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TASKING__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
+  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #define __packed
+  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
+  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #if (__FPU_PRESENT == 1)
+      #define __FPU_USED       1
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0
+    #endif
+  #else
+    #define __FPU_USED         0
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if (__FPU_PRESENT == 1)
+      #define __FPU_USED       1
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0
+    #endif
+  #else
+    #define __FPU_USED         0
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if (__FPU_PRESENT == 1)
+      #define __FPU_USED       1
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0
+    #endif
+  #else
+    #define __FPU_USED         0
+  #endif
+
+#elif defined ( __TMS470__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if (__FPU_PRESENT == 1)
+      #define __FPU_USED       1
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0
+    #endif
+  #else
+    #define __FPU_USED         0
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if (__FPU_PRESENT == 1)
+      #define __FPU_USED       1
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0
+    #endif
+  #else
+    #define __FPU_USED         0
+  #endif
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #if ( __CSMC__ & 0x400)		// FPU present for parser
+    #if (__FPU_PRESENT == 1)
+      #define __FPU_USED       1
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0
+    #endif
+  #else
+    #define __FPU_USED         0
+  #endif
+#endif
+
+#include <stdint.h>                      /* standard types definitions                      */
+#include <core_cmInstr.h>                /* Core Instruction Access                         */
+#include <core_cmFunc.h>                 /* Core Function Access                            */
+#include <core_cm4_simd.h>               /* Compiler specific SIMD Intrinsics               */
+
+#endif /* __CORE_CM4_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM4_H_DEPENDANT
+#define __CORE_CM4_H_DEPENDANT
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM4_REV
+    #define __CM4_REV               0x0000
+    #warning "__CM4_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          4
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions                */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+
+/*@} end of group Cortex_M4 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core FPU Register
+ ******************************************************************************/
+/** \defgroup CMSIS_core_register Defines and Type Definitions
+    \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_CORE  Status and Control Registers
+    \brief  Core Register type definitions.
+  @{
+ */
+
+/** \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
+#else
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
+#endif
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} APSR_Type;
+
+
+/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} IPSR_Type;
+
+
+/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
+#else
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
+#endif
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} xPSR_Type;
+
+
+/** \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} CONTROL_Type;
+
+/*@} end of group CMSIS_CORE */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+    \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IO uint32_t ISER[8];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
+       uint32_t RESERVED0[24];
+  __IO uint32_t ICER[8];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register         */
+       uint32_t RSERVED1[24];
+  __IO uint32_t ISPR[8];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register          */
+       uint32_t RESERVED2[24];
+  __IO uint32_t ICPR[8];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register        */
+       uint32_t RESERVED3[24];
+  __IO uint32_t IABR[8];                 /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register           */
+       uint32_t RESERVED4[56];
+  __IO uint8_t  IP[240];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+       uint32_t RESERVED5[644];
+  __O  uint32_t STIR;                    /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register     */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0                                          /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL << NVIC_STIR_INTID_Pos)            /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCB     System Control Block (SCB)
+    \brief      Type definitions for the System Control Block Registers
+  @{
+ */
+
+/** \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
+  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
+  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
+  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
+  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
+  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
+  __IO uint8_t  SHP[12];                 /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+  __IO uint32_t CFSR;                    /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register                    */
+  __IO uint32_t HFSR;                    /*!< Offset: 0x02C (R/W)  HardFault Status Register                             */
+  __IO uint32_t DFSR;                    /*!< Offset: 0x030 (R/W)  Debug Fault Status Register                           */
+  __IO uint32_t MMFAR;                   /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register                      */
+  __IO uint32_t BFAR;                    /*!< Offset: 0x038 (R/W)  BusFault Address Register                             */
+  __IO uint32_t AFSR;                    /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register                       */
+  __I  uint32_t PFR[2];                  /*!< Offset: 0x040 (R/ )  Processor Feature Register                            */
+  __I  uint32_t DFR;                     /*!< Offset: 0x048 (R/ )  Debug Feature Register                                */
+  __I  uint32_t ADR;                     /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register                            */
+  __I  uint32_t MMFR[4];                 /*!< Offset: 0x050 (R/ )  Memory Model Feature Register                         */
+  __I  uint32_t ISAR[5];                 /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register                   */
+       uint32_t RESERVED0[5];
+  __IO uint32_t CPACR;                   /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register                   */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)              /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11                                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)           /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8                                             /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos             0                                             /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk            (1UL << SCB_AIRCR_VECTRESET_Pos)               /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8                                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4                                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1                                             /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos          0                                             /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk         (1UL << SCB_CCR_NONBASETHRDENA_Pos)            /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos          18                                             /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17                                             /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16                                             /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14                                             /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13                                             /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12                                             /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11                                             /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10                                             /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8                                             /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7                                             /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3                                             /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1                                             /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0                                             /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL << SCB_SHCSR_MEMFAULTACT_Pos)             /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Registers Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16                                             /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8                                             /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0                                             /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)            /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* SCB Hard Fault Status Registers Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31                                             /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30                                             /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1                                             /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4                                             /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3                                             /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2                                             /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1                                             /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0                                             /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL << SCB_DFSR_HALTED_Pos)                   /*!< SCB DFSR: HALTED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+    \brief      Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/** \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+       uint32_t RESERVED0[1];
+  __I  uint32_t ICTR;                    /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register      */
+  __IO uint32_t ACTLR;                   /*!< Offset: 0x008 (R/W)  Auxiliary Control Register              */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0                                          /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)      /*!< ICTR: INTLINESNUM Mask */
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISOOFP_Pos            9                                          /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
+
+#define SCnSCB_ACTLR_DISFPCA_Pos            8                                          /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
+
+#define SCnSCB_ACTLR_DISFOLD_Pos            2                                          /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1                                          /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0                                          /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)        /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+    \brief      Type definitions for the System Timer Registers.
+  @{
+ */
+
+/** \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+    \brief      Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/** \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __O  union
+  {
+    __O  uint8_t    u8;                  /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit                   */
+    __O  uint16_t   u16;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit                  */
+    __O  uint32_t   u32;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit                  */
+  }  PORT [32];                          /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers               */
+       uint32_t RESERVED0[864];
+  __IO uint32_t TER;                     /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register                 */
+       uint32_t RESERVED1[15];
+  __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
+       uint32_t RESERVED2[15];
+  __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
+       uint32_t RESERVED3[29];
+  __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
+  __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
+  __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
+       uint32_t RESERVED4[43];
+  __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
+  __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
+       uint32_t RESERVED5[6];
+  __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __I  uint32_t PID7;                    /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __I  uint32_t PID0;                    /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __I  uint32_t PID1;                    /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __I  uint32_t PID2;                    /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __I  uint32_t PID3;                    /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __I  uint32_t CID0;                    /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __I  uint32_t CID1;                    /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __I  uint32_t CID2;                    /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __I  uint32_t CID3;                    /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0                                             /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL << ITM_TPR_PRIVMASK_Pos)                /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23                                             /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos             16                                             /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10                                             /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos              8                                             /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4                                             /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3                                             /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2                                             /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1                                             /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0                                             /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL << ITM_TCR_ITMENA_Pos)                    /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Integration Write Register Definitions */
+#define ITM_IWR_ATVALIDM_Pos                0                                             /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk               (1UL << ITM_IWR_ATVALIDM_Pos)                  /*!< ITM IWR: ATVALIDM Mask */
+
+/* ITM Integration Read Register Definitions */
+#define ITM_IRR_ATREADYM_Pos                0                                             /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk               (1UL << ITM_IRR_ATREADYM_Pos)                  /*!< ITM IRR: ATREADYM Mask */
+
+/* ITM Integration Mode Control Register Definitions */
+#define ITM_IMCR_INTEGRATION_Pos            0                                             /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk           (1UL << ITM_IMCR_INTEGRATION_Pos)              /*!< ITM IMCR: INTEGRATION Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2                                             /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1                                             /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0                                             /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL << ITM_LSR_Present_Pos)                   /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+    \brief      Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/** \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  Control Register                          */
+  __IO uint32_t CYCCNT;                  /*!< Offset: 0x004 (R/W)  Cycle Count Register                      */
+  __IO uint32_t CPICNT;                  /*!< Offset: 0x008 (R/W)  CPI Count Register                        */
+  __IO uint32_t EXCCNT;                  /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register         */
+  __IO uint32_t SLEEPCNT;                /*!< Offset: 0x010 (R/W)  Sleep Count Register                      */
+  __IO uint32_t LSUCNT;                  /*!< Offset: 0x014 (R/W)  LSU Count Register                        */
+  __IO uint32_t FOLDCNT;                 /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register         */
+  __I  uint32_t PCSR;                    /*!< Offset: 0x01C (R/ )  Program Counter Sample Register           */
+  __IO uint32_t COMP0;                   /*!< Offset: 0x020 (R/W)  Comparator Register 0                     */
+  __IO uint32_t MASK0;                   /*!< Offset: 0x024 (R/W)  Mask Register 0                           */
+  __IO uint32_t FUNCTION0;               /*!< Offset: 0x028 (R/W)  Function Register 0                       */
+       uint32_t RESERVED0[1];
+  __IO uint32_t COMP1;                   /*!< Offset: 0x030 (R/W)  Comparator Register 1                     */
+  __IO uint32_t MASK1;                   /*!< Offset: 0x034 (R/W)  Mask Register 1                           */
+  __IO uint32_t FUNCTION1;               /*!< Offset: 0x038 (R/W)  Function Register 1                       */
+       uint32_t RESERVED1[1];
+  __IO uint32_t COMP2;                   /*!< Offset: 0x040 (R/W)  Comparator Register 2                     */
+  __IO uint32_t MASK2;                   /*!< Offset: 0x044 (R/W)  Mask Register 2                           */
+  __IO uint32_t FUNCTION2;               /*!< Offset: 0x048 (R/W)  Function Register 2                       */
+       uint32_t RESERVED2[1];
+  __IO uint32_t COMP3;                   /*!< Offset: 0x050 (R/W)  Comparator Register 3                     */
+  __IO uint32_t MASK3;                   /*!< Offset: 0x054 (R/W)  Mask Register 3                           */
+  __IO uint32_t FUNCTION3;               /*!< Offset: 0x058 (R/W)  Function Register 3                       */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28                                          /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27                                          /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26                                          /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25                                          /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24                                          /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22                                          /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21                                          /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20                                          /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19                                          /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18                                          /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17                                          /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16                                          /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12                                          /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10                                          /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9                                          /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5                                          /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1                                          /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0                                          /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL << DWT_CTRL_CYCCNTENA_Pos)           /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0                                          /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL << DWT_CPICNT_CPICNT_Pos)           /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0                                          /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL << DWT_EXCCNT_EXCCNT_Pos)           /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0                                          /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL << DWT_SLEEPCNT_SLEEPCNT_Pos)       /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0                                          /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL << DWT_LSUCNT_LSUCNT_Pos)           /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0                                          /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL << DWT_FOLDCNT_FOLDCNT_Pos)         /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos                   0                                          /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk                  (0x1FUL << DWT_MASK_MASK_Pos)               /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos           24                                          /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos        16                                          /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos        12                                          /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10                                          /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos            9                                          /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos         8                                          /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos           7                                          /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos          5                                          /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos           0                                          /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL << DWT_FUNCTION_FUNCTION_Pos)        /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+    \brief      Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/** \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IO uint32_t SSPSR;                   /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register     */
+  __IO uint32_t CSPSR;                   /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+       uint32_t RESERVED0[2];
+  __IO uint32_t ACPR;                    /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+       uint32_t RESERVED1[55];
+  __IO uint32_t SPPR;                    /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+       uint32_t RESERVED2[131];
+  __I  uint32_t FFSR;                    /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IO uint32_t FFCR;                    /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __I  uint32_t FSCR;                    /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+       uint32_t RESERVED3[759];
+  __I  uint32_t TRIGGER;                 /*!< Offset: 0xEE8 (R/ )  TRIGGER */
+  __I  uint32_t FIFO0;                   /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __I  uint32_t ITATBCTR2;               /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+       uint32_t RESERVED4[1];
+  __I  uint32_t ITATBCTR0;               /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __I  uint32_t FIFO1;                   /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IO uint32_t ITCTRL;                  /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+       uint32_t RESERVED5[39];
+  __IO uint32_t CLAIMSET;                /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IO uint32_t CLAIMCLR;                /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+       uint32_t RESERVED7[8];
+  __I  uint32_t DEVID;                   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __I  uint32_t DEVTYPE;                 /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0                                          /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL << TPI_ACPR_PRESCALER_Pos)        /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0                                          /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL << TPI_SPPR_TXMODE_Pos)              /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3                                          /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2                                          /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1                                          /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0                                          /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL << TPI_FFSR_FlInProg_Pos)            /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8                                          /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1                                          /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0                                          /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL << TPI_TRIGGER_TRIGGER_Pos)          /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27                                          /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24                                          /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16                                          /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8                                          /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0                                          /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL << TPI_FIFO0_ETM0_Pos)              /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY_Pos           0                                          /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL << TPI_ITATBCTR2_ATREADY_Pos)        /*!< TPI ITATBCTR2: ATREADY Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27                                          /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24                                          /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16                                          /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8                                          /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0                                          /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL << TPI_FIFO1_ITM0_Pos)              /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY_Pos           0                                          /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL << TPI_ITATBCTR0_ATREADY_Pos)        /*!< TPI ITATBCTR0: ATREADY Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0                                          /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x1UL << TPI_ITCTRL_Mode_Pos)              /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11                                          /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10                                          /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9                                          /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6                                          /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5                                          /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0                                          /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL << TPI_DEVID_NrTraceInput_Pos)      /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             0                                          /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL << TPI_DEVTYPE_SubType_Pos)          /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           4                                          /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if (__MPU_PRESENT == 1)
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+    \brief      Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/** \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
+  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
+  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
+  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
+  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
+  __IO uint32_t RBAR_A1;                 /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register       */
+  __IO uint32_t RASR_A1;                 /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IO uint32_t RBAR_A2;                 /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register       */
+  __IO uint32_t RASR_A2;                 /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IO uint32_t RBAR_A3;                 /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register       */
+  __IO uint32_t RASR_A3;                 /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+/* MPU Type Register */
+#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL << MPU_TYPE_SEPARATE_Pos)                 /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register */
+#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL << MPU_CTRL_ENABLE_Pos)                   /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register */
+#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL << MPU_RNR_REGION_Pos)                 /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register */
+#define MPU_RBAR_ADDR_Pos                   5                                             /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL << MPU_RBAR_REGION_Pos)                 /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register */
+#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL << MPU_RASR_ENABLE_Pos)                   /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if (__FPU_PRESENT == 1)
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+    \brief      Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/** \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+       uint32_t RESERVED0[1];
+  __IO uint32_t FPCCR;                   /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register               */
+  __IO uint32_t FPCAR;                   /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register               */
+  __IO uint32_t FPDSCR;                  /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register        */
+  __I  uint32_t MVFR0;                   /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0                       */
+  __I  uint32_t MVFR1;                   /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1                       */
+} FPU_Type;
+
+/* Floating-Point Context Control Register */
+#define FPU_FPCCR_ASPEN_Pos                31                                             /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30                                             /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8                                             /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6                                             /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5                                             /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4                                             /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3                                             /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1                                             /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0                                             /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL << FPU_FPCCR_LSPACT_Pos)                  /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register */
+#define FPU_FPCAR_ADDRESS_Pos               3                                             /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register */
+#define FPU_FPDSCR_AHP_Pos                 26                                             /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25                                             /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24                                             /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22                                             /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28                                             /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24                                             /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20                                             /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16                                             /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12                                             /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8                                             /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4                                             /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0                                             /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL << FPU_MVFR0_A_SIMD_registers_Pos)      /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28                                             /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24                                             /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4                                             /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0                                             /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL << FPU_MVFR1_FtZ_mode_Pos)              /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+#endif
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+    \brief      Type definitions for the Core Debug Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IO uint32_t DHCSR;                   /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register    */
+  __O  uint32_t DCRSR;                   /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register        */
+  __IO uint32_t DCRDR;                   /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register            */
+  __IO uint32_t DEMCR;                   /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16                                             /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25                                             /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24                                             /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19                                             /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18                                             /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17                                             /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16                                             /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5                                             /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3                                             /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2                                             /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1                                             /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0                                             /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)         /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register */
+#define CoreDebug_DCRSR_REGWnR_Pos         16                                             /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0                                             /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)         /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register */
+#define CoreDebug_DEMCR_TRCENA_Pos         24                                             /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19                                             /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18                                             /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17                                             /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16                                             /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10                                             /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9                                             /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8                                             /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7                                             /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6                                             /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5                                             /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4                                             /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0                                             /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)      /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_core_base     Core Definitions
+    \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Cortex-M4 Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address  */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address                   */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address                   */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address                   */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address            */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address               */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                  */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address  */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct           */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct           */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct           */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct    */
+
+#if (__MPU_PRESENT == 1)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#endif
+
+#if (__FPU_PRESENT == 1)
+  #define FPU_BASE          (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit                */
+  #define FPU               ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit                */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+    \brief      Functions that manage interrupts and exceptions via the NVIC.
+    @{
+ */
+
+/** \brief  Set Priority Grouping
+
+  The function sets the priority grouping field using the required unlock sequence.
+  The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+  Only values from 0..7 are used.
+  In case of a conflict between priority grouping and available
+  priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+
+    \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07);               /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk);             /* clear bits to change               */
+  reg_value  =  (reg_value                                 |
+                ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << 8));                                     /* Insert write key and priorty group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/** \brief  Get Priority Grouping
+
+  The function reads the priority grouping field from the NVIC Interrupt Controller.
+
+    \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+{
+  return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos);   /* read priority grouping field */
+}
+
+
+/** \brief  Enable External Interrupt
+
+    The function enables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+/*  NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));  enable interrupt */
+  NVIC->ISER[(uint32_t)((int32_t)IRQn) >> 5] = (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); /* enable interrupt */
+}
+
+
+/** \brief  Disable External Interrupt
+
+    The function disables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
+}
+
+
+/** \brief  Get Pending Interrupt
+
+    The function reads the pending register in the NVIC and returns the pending bit
+    for the specified interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not pending.
+    \return             1  Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
+}
+
+
+/** \brief  Set Pending Interrupt
+
+    The function sets the pending bit of an external interrupt.
+
+    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
+}
+
+
+/** \brief  Clear Pending Interrupt
+
+    The function clears the pending bit of an external interrupt.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
+}
+
+
+/** \brief  Get Active Interrupt
+
+    The function reads the active register in NVIC and returns the active bit.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not active.
+    \return             1  Interrupt status is active.
+ */
+__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+{
+  return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
+}
+
+
+/** \brief  Set Interrupt Priority
+
+    The function sets the priority of an interrupt.
+
+    \note The priority cannot be set for every core interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+    \param [in]  priority  Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if(IRQn < 0) {
+    SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M  System Interrupts */
+  else {
+    NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }        /* set Priority for device specific Interrupts  */
+}
+
+
+/** \brief  Get Interrupt Priority
+
+    The function reads the priority of an interrupt. The interrupt
+    number can be positive to specify an external (device specific)
+    interrupt, or negative to specify an internal (core) interrupt.
+
+
+    \param [in]   IRQn  Interrupt number.
+    \return             Interrupt Priority. Value is aligned automatically to the implemented
+                        priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if(IRQn < 0) {
+    return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M  system interrupts */
+  else {
+    return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)]           >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
+}
+
+
+/** \brief  Encode Priority
+
+    The function encodes the priority for an interrupt with the given priority group,
+    preemptive priority value, and subpriority value.
+    In case of a conflict between priority grouping and available
+    priority bits (__NVIC_PRIO_BITS), the samllest possible priority group is set.
+
+    \param [in]     PriorityGroup  Used priority group.
+    \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+    \param [in]       SubPriority  Subpriority value (starting from 0).
+    \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
+  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
+
+  return (
+           ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
+           ((SubPriority     & ((1 << (SubPriorityBits    )) - 1)))
+         );
+}
+
+
+/** \brief  Decode Priority
+
+    The function decodes an interrupt priority value with a given priority group to
+    preemptive priority value and subpriority value.
+    In case of a conflict between priority grouping and available
+    priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
+
+    \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+    \param [in]     PriorityGroup  Used priority group.
+    \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+    \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
+  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
+  *pSubPriority     = (Priority                   ) & ((1 << (SubPriorityBits    )) - 1);
+}
+
+
+/** \brief  System Reset
+
+    The function initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+  __DSB();                                                     /* Ensure all outstanding memory accesses included
+                                                                  buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
+                 (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);                   /* Keep priority group unchanged */
+  __DSB();                                                     /* Ensure completion of memory access */
+  while(1);                                                    /* wait until reset */
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+    \brief      Functions that configure the System.
+  @{
+ */
+
+#if (__Vendor_SysTickConfig == 0)
+
+/** \brief  System Tick Configuration
+
+    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
+    Counter is in free running mode to generate periodic interrupts.
+
+    \param [in]  ticks  Number of ticks between two interrupts.
+
+    \return          0  Function succeeded.
+    \return          1  Function failed.
+
+    \note     When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+    function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+    must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk)  return (1);      /* Reload value impossible */
+
+  SysTick->LOAD  = ticks - 1;                                  /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
+  return (0);                                                  /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_core_DebugFunctions ITM Functions
+    \brief   Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters.                         */
+#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/** \brief  ITM Send Character
+
+    The function transmits a character via the ITM channel 0, and
+    \li Just returns when no debugger is connected that has booked the output.
+    \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+
+    \param [in]     ch  Character to transmit.
+
+    \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if ((ITM->TCR & ITM_TCR_ITMENA_Msk)                  &&      /* ITM enabled */
+      (ITM->TER & (1UL << 0)        )                    )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0].u32 == 0);
+    ITM->PORT[0].u8 = (uint8_t) ch;
+  }
+  return (ch);
+}
+
+
+/** \brief  ITM Receive Character
+
+    The function inputs a character via the external variable \ref ITM_RxBuffer.
+
+    \return             Received character.
+    \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/** \brief  ITM Check Character
+
+    The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+
+    \return          0  No character available.
+    \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void) {
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
+    return (0);                                 /* no character available */
+  } else {
+    return (1);                                 /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+#endif /* __CORE_CM4_H_DEPENDANT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CMSIS_GENERIC */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm4_simd.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm4_simd.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cm4_simd.h	(revision 136)
@@ -0,0 +1,697 @@
+/**************************************************************************//**
+ * @file     core_cm4_simd.h
+ * @brief    CMSIS Cortex-M4 SIMD Header File
+ * @version  V3.30
+ * @date     17. February 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include  /* treat file as system include file for MISRA check */
+#endif
+
+#ifndef __CORE_CM4_SIMD_H
+#define __CORE_CM4_SIMD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+ ******************************************************************************/
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+#define __SADD8                           __sadd8
+#define __QADD8                           __qadd8
+#define __SHADD8                          __shadd8
+#define __UADD8                           __uadd8
+#define __UQADD8                          __uqadd8
+#define __UHADD8                          __uhadd8
+#define __SSUB8                           __ssub8
+#define __QSUB8                           __qsub8
+#define __SHSUB8                          __shsub8
+#define __USUB8                           __usub8
+#define __UQSUB8                          __uqsub8
+#define __UHSUB8                          __uhsub8
+#define __SADD16                          __sadd16
+#define __QADD16                          __qadd16
+#define __SHADD16                         __shadd16
+#define __UADD16                          __uadd16
+#define __UQADD16                         __uqadd16
+#define __UHADD16                         __uhadd16
+#define __SSUB16                          __ssub16
+#define __QSUB16                          __qsub16
+#define __SHSUB16                         __shsub16
+#define __USUB16                          __usub16
+#define __UQSUB16                         __uqsub16
+#define __UHSUB16                         __uhsub16
+#define __SASX                            __sasx
+#define __QASX                            __qasx
+#define __SHASX                           __shasx
+#define __UASX                            __uasx
+#define __UQASX                           __uqasx
+#define __UHASX                           __uhasx
+#define __SSAX                            __ssax
+#define __QSAX                            __qsax
+#define __SHSAX                           __shsax
+#define __USAX                            __usax
+#define __UQSAX                           __uqsax
+#define __UHSAX                           __uhsax
+#define __USAD8                           __usad8
+#define __USADA8                          __usada8
+#define __SSAT16                          __ssat16
+#define __USAT16                          __usat16
+#define __UXTB16                          __uxtb16
+#define __UXTAB16                         __uxtab16
+#define __SXTB16                          __sxtb16
+#define __SXTAB16                         __sxtab16
+#define __SMUAD                           __smuad
+#define __SMUADX                          __smuadx
+#define __SMLAD                           __smlad
+#define __SMLADX                          __smladx
+#define __SMLALD                          __smlald
+#define __SMLALDX                         __smlaldx
+#define __SMUSD                           __smusd
+#define __SMUSDX                          __smusdx
+#define __SMLSD                           __smlsd
+#define __SMLSDX                          __smlsdx
+#define __SMLSLD                          __smlsld
+#define __SMLSLDX                         __smlsldx
+#define __SEL                             __sel
+#define __QADD                            __qadd
+#define __QSUB                            __qsub
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
+                                                      ((int64_t)(ARG3) << 32)      ) >> 32))
+
+
+#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#define __SSAT16(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+#define __USAT16(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   // Little endian
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               // Big endian
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   // Little endian
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               // Big endian
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   // Little endian
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               // Big endian
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   // Little endian
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               // Big endian
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+#define __PKHBT(ARG1,ARG2,ARG3) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
+  __RES; \
+ })
+
+#define __PKHTB(ARG1,ARG2,ARG3) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+  if (ARG3 == 0) \
+    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
+  else \
+    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
+  __RES; \
+ })
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+ int32_t result;
+
+ __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+
+#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+#include <cmsis_iar.h>
+
+
+#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
+/* TI CCS specific functions */
+#include <cmsis_ccs.h>
+
+
+#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
+/* TASKING carm specific functions */
+/* not yet supported */
+
+
+#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
+/* Cosmic specific functions */
+#include <cmsis_csm.h>
+
+#endif
+
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM4_SIMD_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cmFunc.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cmFunc.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cmFunc.h	(revision 136)
@@ -0,0 +1,637 @@
+/**************************************************************************//**
+ * @file     core_cmFunc.h
+ * @brief    CMSIS Cortex-M Core Function Access Header File
+ * @version  V3.30
+ * @date     17. February 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#ifndef __CORE_CMFUNC_H
+#define __CORE_CMFUNC_H
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+#if (__ARMCC_VERSION < 400677)
+  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
+#endif
+
+/* intrinsic void __enable_irq();     */
+/* intrinsic void __disable_irq();    */
+
+/** \brief  Get Control Register
+
+    This function returns the content of the Control Register.
+
+    \return               Control Register value
+ */
+__STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+  register uint32_t __regControl         __ASM("control");
+  return(__regControl);
+}
+
+
+/** \brief  Set Control Register
+
+    This function writes the given value to the Control Register.
+
+    \param [in]    control  Control Register value to set
+ */
+__STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+  register uint32_t __regControl         __ASM("control");
+  __regControl = control;
+}
+
+
+/** \brief  Get IPSR Register
+
+    This function returns the content of the IPSR Register.
+
+    \return               IPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_IPSR(void)
+{
+  register uint32_t __regIPSR          __ASM("ipsr");
+  return(__regIPSR);
+}
+
+
+/** \brief  Get APSR Register
+
+    This function returns the content of the APSR Register.
+
+    \return               APSR Register value
+ */
+__STATIC_INLINE uint32_t __get_APSR(void)
+{
+  register uint32_t __regAPSR          __ASM("apsr");
+  return(__regAPSR);
+}
+
+
+/** \brief  Get xPSR Register
+
+    This function returns the content of the xPSR Register.
+
+    \return               xPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_xPSR(void)
+{
+  register uint32_t __regXPSR          __ASM("xpsr");
+  return(__regXPSR);
+}
+
+
+/** \brief  Get Process Stack Pointer
+
+    This function returns the current value of the Process Stack Pointer (PSP).
+
+    \return               PSP Register value
+ */
+__STATIC_INLINE uint32_t __get_PSP(void)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  return(__regProcessStackPointer);
+}
+
+
+/** \brief  Set Process Stack Pointer
+
+    This function assigns the given value to the Process Stack Pointer (PSP).
+
+    \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  __regProcessStackPointer = topOfProcStack;
+}
+
+
+/** \brief  Get Main Stack Pointer
+
+    This function returns the current value of the Main Stack Pointer (MSP).
+
+    \return               MSP Register value
+ */
+__STATIC_INLINE uint32_t __get_MSP(void)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  return(__regMainStackPointer);
+}
+
+
+/** \brief  Set Main Stack Pointer
+
+    This function assigns the given value to the Main Stack Pointer (MSP).
+
+    \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  __regMainStackPointer = topOfMainStack;
+}
+
+
+/** \brief  Get Priority Mask
+
+    This function returns the current state of the priority mask bit from the Priority Mask Register.
+
+    \return               Priority Mask value
+ */
+__STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  return(__regPriMask);
+}
+
+
+/** \brief  Set Priority Mask
+
+    This function assigns the given value to the Priority Mask Register.
+
+    \param [in]    priMask  Priority Mask
+ */
+__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  __regPriMask = (priMask);
+}
+
+
+#if       (__CORTEX_M >= 0x03)
+
+/** \brief  Enable FIQ
+
+    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq                __enable_fiq
+
+
+/** \brief  Disable FIQ
+
+    This function disables FIQ interrupts by setting the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq               __disable_fiq
+
+
+/** \brief  Get Base Priority
+
+    This function returns the current value of the Base Priority register.
+
+    \return               Base Priority register value
+ */
+__STATIC_INLINE uint32_t  __get_BASEPRI(void)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  return(__regBasePri);
+}
+
+
+/** \brief  Set Base Priority
+
+    This function assigns the given value to the Base Priority register.
+
+    \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  __regBasePri = (basePri & 0xff);
+}
+
+
+/** \brief  Get Fault Mask
+
+    This function returns the current value of the Fault Mask register.
+
+    \return               Fault Mask register value
+ */
+__STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  return(__regFaultMask);
+}
+
+
+/** \brief  Set Fault Mask
+
+    This function assigns the given value to the Fault Mask register.
+
+    \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  __regFaultMask = (faultMask & (uint32_t)1);
+}
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+
+#if       (__CORTEX_M == 0x04)
+
+/** \brief  Get FPSCR
+
+    This function returns the current value of the Floating Point Status/Control register.
+
+    \return               Floating Point Status/Control register value
+ */
+__STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  register uint32_t __regfpscr         __ASM("fpscr");
+  return(__regfpscr);
+#else
+   return(0);
+#endif
+}
+
+
+/** \brief  Set FPSCR
+
+    This function assigns the given value to the Floating Point Status/Control register.
+
+    \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  register uint32_t __regfpscr         __ASM("fpscr");
+  __regfpscr = (fpscr);
+#endif
+}
+
+#endif /* (__CORTEX_M == 0x04) */
+
+
+#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+
+/** \brief  Enable IRQ Interrupts
+
+  This function enables IRQ interrupts by clearing the I-bit in the CPSR.
+  Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
+{
+  __ASM volatile ("cpsie i" : : : "memory");
+}
+
+
+/** \brief  Disable IRQ Interrupts
+
+  This function disables IRQ interrupts by setting the I-bit in the CPSR.
+  Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+}
+
+
+/** \brief  Get Control Register
+
+    This function returns the content of the Control Register.
+
+    \return               Control Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Control Register
+
+    This function writes the given value to the Control Register.
+
+    \param [in]    control  Control Register value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+/** \brief  Get IPSR Register
+
+    This function returns the content of the IPSR Register.
+
+    \return               IPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Get APSR Register
+
+    This function returns the content of the APSR Register.
+
+    \return               APSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Get xPSR Register
+
+    This function returns the content of the xPSR Register.
+
+    \return               xPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Get Process Stack Pointer
+
+    This function returns the current value of the Process Stack Pointer (PSP).
+
+    \return               PSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
+{
+  register uint32_t result;
+
+  __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Process Stack Pointer
+
+    This function assigns the given value to the Process Stack Pointer (PSP).
+
+    \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
+}
+
+
+/** \brief  Get Main Stack Pointer
+
+    This function returns the current value of the Main Stack Pointer (MSP).
+
+    \return               MSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
+{
+  register uint32_t result;
+
+  __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Main Stack Pointer
+
+    This function assigns the given value to the Main Stack Pointer (MSP).
+
+    \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
+}
+
+
+/** \brief  Get Priority Mask
+
+    This function returns the current state of the priority mask bit from the Priority Mask Register.
+
+    \return               Priority Mask value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Priority Mask
+
+    This function assigns the given value to the Priority Mask Register.
+
+    \param [in]    priMask  Priority Mask
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if       (__CORTEX_M >= 0x03)
+
+/** \brief  Enable FIQ
+
+    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
+{
+  __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/** \brief  Disable FIQ
+
+    This function disables FIQ interrupts by setting the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
+{
+  __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/** \brief  Get Base Priority
+
+    This function returns the current value of the Base Priority register.
+
+    \return               Base Priority register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Base Priority
+
+    This function assigns the given value to the Base Priority register.
+
+    \param [in]    basePri  Base Priority value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
+}
+
+
+/** \brief  Get Fault Mask
+
+    This function returns the current value of the Fault Mask register.
+
+    \return               Fault Mask register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Fault Mask
+
+    This function assigns the given value to the Fault Mask register.
+
+    \param [in]    faultMask  Fault Mask value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+
+#if       (__CORTEX_M == 0x04)
+
+/** \brief  Get FPSCR
+
+    This function returns the current value of the Floating Point Status/Control register.
+
+    \return               Floating Point Status/Control register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  uint32_t result;
+
+  /* Empty asm statement works as a scheduling barrier */
+  __ASM volatile ("");
+  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
+  __ASM volatile ("");
+  return(result);
+#else
+   return(0);
+#endif
+}
+
+
+/** \brief  Set FPSCR
+
+    This function assigns the given value to the Floating Point Status/Control register.
+
+    \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  /* Empty asm statement works as a scheduling barrier */
+  __ASM volatile ("");
+  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
+  __ASM volatile ("");
+#endif
+}
+
+#endif /* (__CORTEX_M == 0x04) */
+
+
+#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+#include <cmsis_iar.h>
+
+
+#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
+/* TI CCS specific functions */
+#include <cmsis_ccs.h>
+
+
+#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
+/* TASKING carm specific functions */
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+
+#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
+/* Cosmic specific functions */
+#include <cmsis_csm.h>
+
+#endif
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+#endif /* __CORE_CMFUNC_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cmInstr.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cmInstr.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_cmInstr.h	(revision 136)
@@ -0,0 +1,687 @@
+/**************************************************************************//**
+ * @file     core_cmInstr.h
+ * @brief    CMSIS Cortex-M Core Instruction Access Header File
+ * @version  V3.30
+ * @date     17. February 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#ifndef __CORE_CMINSTR_H
+#define __CORE_CMINSTR_H
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+#if (__ARMCC_VERSION < 400677)
+  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
+#endif
+
+
+/** \brief  No Operation
+
+    No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP                             __nop
+
+
+/** \brief  Wait For Interrupt
+
+    Wait For Interrupt is a hint instruction that suspends execution
+    until one of a number of events occurs.
+ */
+#define __WFI                             __wfi
+
+
+/** \brief  Wait For Event
+
+    Wait For Event is a hint instruction that permits the processor to enter
+    a low-power state until one of a number of events occurs.
+ */
+#define __WFE                             __wfe
+
+
+/** \brief  Send Event
+
+    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV                             __sev
+
+
+/** \brief  Instruction Synchronization Barrier
+
+    Instruction Synchronization Barrier flushes the pipeline in the processor,
+    so that all instructions following the ISB are fetched from cache or
+    memory, after the instruction has been completed.
+ */
+#define __ISB()                           __isb(0xF)
+
+
+/** \brief  Data Synchronization Barrier
+
+    This function acts as a special kind of Data Memory Barrier.
+    It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()                           __dsb(0xF)
+
+
+/** \brief  Data Memory Barrier
+
+    This function ensures the apparent order of the explicit memory operations before
+    and after the instruction, without ensuring their completion.
+ */
+#define __DMB()                           __dmb(0xF)
+
+
+/** \brief  Reverse byte order (32 bit)
+
+    This function reverses the byte order in integer value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#define __REV                             __rev
+
+
+/** \brief  Reverse byte order (16 bit)
+
+    This function reverses the byte order in two unsigned short values.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
+{
+  rev16 r0, r0
+  bx lr
+}
+#endif
+
+/** \brief  Reverse byte order in signed short value
+
+    This function reverses the byte order in a signed short value with sign extension to integer.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
+{
+  revsh r0, r0
+  bx lr
+}
+#endif
+
+
+/** \brief  Rotate Right in unsigned value (32 bit)
+
+    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+
+    \param [in]    value  Value to rotate
+    \param [in]    value  Number of Bits to rotate
+    \return               Rotated value
+ */
+#define __ROR                             __ror
+
+
+/** \brief  Breakpoint
+
+    This function causes the processor to enter Debug state.
+    Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+
+    \param [in]    value  is ignored by the processor.
+                   If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __breakpoint(value)
+
+
+#if       (__CORTEX_M >= 0x03)
+
+/** \brief  Reverse bit order of value
+
+    This function reverses the bit order of the given value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#define __RBIT                            __rbit
+
+
+/** \brief  LDR Exclusive (8 bit)
+
+    This function performs a exclusive LDR command for 8 bit value.
+
+    \param [in]    ptr  Pointer to data
+    \return             value of type uint8_t at (*ptr)
+ */
+#define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))
+
+
+/** \brief  LDR Exclusive (16 bit)
+
+    This function performs a exclusive LDR command for 16 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint16_t at (*ptr)
+ */
+#define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))
+
+
+/** \brief  LDR Exclusive (32 bit)
+
+    This function performs a exclusive LDR command for 32 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint32_t at (*ptr)
+ */
+#define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))
+
+
+/** \brief  STR Exclusive (8 bit)
+
+    This function performs a exclusive STR command for 8 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+#define __STREXB(value, ptr)              __strex(value, ptr)
+
+
+/** \brief  STR Exclusive (16 bit)
+
+    This function performs a exclusive STR command for 16 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+#define __STREXH(value, ptr)              __strex(value, ptr)
+
+
+/** \brief  STR Exclusive (32 bit)
+
+    This function performs a exclusive STR command for 32 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+#define __STREXW(value, ptr)              __strex(value, ptr)
+
+
+/** \brief  Remove the exclusive lock
+
+    This function removes the exclusive lock which is created by LDREX.
+
+ */
+#define __CLREX                           __clrex
+
+
+/** \brief  Signed Saturate
+
+    This function saturates a signed value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (1..32)
+    \return             Saturated value
+ */
+#define __SSAT                            __ssat
+
+
+/** \brief  Unsigned Saturate
+
+    This function saturates an unsigned value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (0..31)
+    \return             Saturated value
+ */
+#define __USAT                            __usat
+
+
+/** \brief  Count leading zeros
+
+    This function counts the number of leading zeros of a data value.
+
+    \param [in]  value  Value to count the leading zeros
+    \return             number of leading zeros in value
+ */
+#define __CLZ                             __clz
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+
+#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constrant "l"
+ * Otherwise, use general registers, specified by constrant "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/** \brief  No Operation
+
+    No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
+{
+  __ASM volatile ("nop");
+}
+
+
+/** \brief  Wait For Interrupt
+
+    Wait For Interrupt is a hint instruction that suspends execution
+    until one of a number of events occurs.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
+{
+  __ASM volatile ("wfi");
+}
+
+
+/** \brief  Wait For Event
+
+    Wait For Event is a hint instruction that permits the processor to enter
+    a low-power state until one of a number of events occurs.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
+{
+  __ASM volatile ("wfe");
+}
+
+
+/** \brief  Send Event
+
+    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
+{
+  __ASM volatile ("sev");
+}
+
+
+/** \brief  Instruction Synchronization Barrier
+
+    Instruction Synchronization Barrier flushes the pipeline in the processor,
+    so that all instructions following the ISB are fetched from cache or
+    memory, after the instruction has been completed.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
+{
+  __ASM volatile ("isb");
+}
+
+
+/** \brief  Data Synchronization Barrier
+
+    This function acts as a special kind of Data Memory Barrier.
+    It completes when all explicit memory accesses before this instruction complete.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
+{
+  __ASM volatile ("dsb");
+}
+
+
+/** \brief  Data Memory Barrier
+
+    This function ensures the apparent order of the explicit memory operations before
+    and after the instruction, without ensuring their completion.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
+{
+  __ASM volatile ("dmb");
+}
+
+
+/** \brief  Reverse byte order (32 bit)
+
+    This function reverses the byte order in integer value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
+  return __builtin_bswap32(value);
+#else
+  uint32_t result;
+
+  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+#endif
+}
+
+
+/** \brief  Reverse byte order (16 bit)
+
+    This function reverses the byte order in two unsigned short values.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/** \brief  Reverse byte order in signed short value
+
+    This function reverses the byte order in a signed short value with sign extension to integer.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+  return (short)__builtin_bswap16(value);
+#else
+  uint32_t result;
+
+  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+#endif
+}
+
+
+/** \brief  Rotate Right in unsigned value (32 bit)
+
+    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+
+    \param [in]    value  Value to rotate
+    \param [in]    value  Number of Bits to rotate
+    \return               Rotated value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  return (op1 >> op2) | (op1 << (32 - op2)); 
+}
+
+
+/** \brief  Breakpoint
+
+    This function causes the processor to enter Debug state.
+    Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+
+    \param [in]    value  is ignored by the processor.
+                   If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
+
+
+#if       (__CORTEX_M >= 0x03)
+
+/** \brief  Reverse bit order of value
+
+    This function reverses the bit order of the given value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+{
+  uint32_t result;
+
+   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+   return(result);
+}
+
+
+/** \brief  LDR Exclusive (8 bit)
+
+    This function performs a exclusive LDR command for 8 bit value.
+
+    \param [in]    ptr  Pointer to data
+    \return             value of type uint8_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/** \brief  LDR Exclusive (16 bit)
+
+    This function performs a exclusive LDR command for 16 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint16_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/** \brief  LDR Exclusive (32 bit)
+
+    This function performs a exclusive LDR command for 32 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint32_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
+   return(result);
+}
+
+
+/** \brief  STR Exclusive (8 bit)
+
+    This function performs a exclusive STR command for 8 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/** \brief  STR Exclusive (16 bit)
+
+    This function performs a exclusive STR command for 16 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/** \brief  STR Exclusive (32 bit)
+
+    This function performs a exclusive STR command for 32 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
+   return(result);
+}
+
+
+/** \brief  Remove the exclusive lock
+
+    This function removes the exclusive lock which is created by LDREX.
+
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
+{
+  __ASM volatile ("clrex" ::: "memory");
+}
+
+
+/** \brief  Signed Saturate
+
+    This function saturates a signed value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (1..32)
+    \return             Saturated value
+ */
+#define __SSAT(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+
+/** \brief  Unsigned Saturate
+
+    This function saturates an unsigned value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (0..31)
+    \return             Saturated value
+ */
+#define __USAT(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+
+/** \brief  Count leading zeros
+
+    This function counts the number of leading zeros of a data value.
+
+    \param [in]  value  Value to count the leading zeros
+    \return             number of leading zeros in value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
+   return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+
+#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+#include <cmsis_iar.h>
+
+
+#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
+/* TI CCS specific functions */
+#include <cmsis_ccs.h>
+
+
+#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
+/* TASKING carm specific functions */
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+
+#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
+/* Cosmic specific functions */
+#include <cmsis_csm.h>
+
+#endif
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+#endif /* __CORE_CMINSTR_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_sc000.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_sc000.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_sc000.h	(revision 136)
@@ -0,0 +1,833 @@
+/**************************************************************************//**
+ * @file     core_sc000.h
+ * @brief    CMSIS SC000 Core Peripheral Access Layer Header File
+ * @version  V3.30
+ * @date     24. February 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include  /* treat file as system include file for MISRA check */
+#endif
+
+#ifndef __CORE_SC000_H_GENERIC
+#define __CORE_SC000_H_GENERIC
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/** \ingroup SC000
+  @{
+ */
+
+/*  CMSIS SC000 definitions */
+#define __SC000_CMSIS_VERSION_MAIN  (0x03)                                   /*!< [31:16] CMSIS HAL main version */
+#define __SC000_CMSIS_VERSION_SUB   (0x20)                                   /*!< [15:0]  CMSIS HAL sub version  */
+#define __SC000_CMSIS_VERSION       ((__SC000_CMSIS_VERSION_MAIN << 16) | \
+                                      __SC000_CMSIS_VERSION_SUB          )   /*!< CMSIS HAL version number       */
+
+#define __CORTEX_SC                 (000)                                       /*!< Cortex secure core             */
+
+
+#if   defined ( __CC_ARM )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined ( __GNUC__ )
+  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __ICCARM__ )
+  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TMS470__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TASKING__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
+  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #define __packed
+  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
+  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
+*/
+#define __FPU_USED       0
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TMS470__ )
+  #if defined __TI__VFP_SUPPORT____
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #if ( __CSMC__ & 0x400)		// FPU present for parser
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+#endif
+
+#include <stdint.h>                      /* standard types definitions                      */
+#include <core_cmInstr.h>                /* Core Instruction Access                         */
+#include <core_cmFunc.h>                 /* Core Function Access                            */
+
+#endif /* __CORE_SC000_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_SC000_H_DEPENDANT
+#define __CORE_SC000_H_DEPENDANT
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __SC000_REV
+    #define __SC000_REV             0x0000
+    #warning "__SC000_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions                */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+
+/*@} end of group SC000 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core MPU Register
+ ******************************************************************************/
+/** \defgroup CMSIS_core_register Defines and Type Definitions
+    \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_CORE  Status and Control Registers
+    \brief  Core Register type definitions.
+  @{
+ */
+
+/** \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
+#else
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
+#endif
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} APSR_Type;
+
+
+/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} IPSR_Type;
+
+
+/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
+#else
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
+#endif
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} xPSR_Type;
+
+
+/** \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} CONTROL_Type;
+
+/*@} end of group CMSIS_CORE */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+    \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IO uint32_t ISER[1];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
+       uint32_t RESERVED0[31];
+  __IO uint32_t ICER[1];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register          */
+       uint32_t RSERVED1[31];
+  __IO uint32_t ISPR[1];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register           */
+       uint32_t RESERVED2[31];
+  __IO uint32_t ICPR[1];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register         */
+       uint32_t RESERVED3[31];
+       uint32_t RESERVED4[64];
+  __IO uint32_t IP[8];                   /*!< Offset: 0x300 (R/W)  Interrupt Priority Register              */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCB     System Control Block (SCB)
+    \brief      Type definitions for the System Control Block Registers
+  @{
+ */
+
+/** \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
+  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
+  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
+  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
+  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
+  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
+       uint32_t RESERVED0[1];
+  __IO uint32_t SHP[2];                  /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED   */
+  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+       uint32_t RESERVED1[154];
+  __IO uint32_t SFCR;                    /*!< Offset: 0x290 (R/W)  Security Features Register                            */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)              /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)           /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/* SCB Security Features Register Definitions */
+#define SCB_SFCR_UNIBRTIMING_Pos            0                                             /*!< SCB SFCR: UNIBRTIMING Position */
+#define SCB_SFCR_UNIBRTIMING_Msk           (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SFCR: UNIBRTIMING Mask */
+
+#define SCB_SFCR_SECKEY_Pos                16                                             /*!< SCB SFCR: SECKEY Position */
+#define SCB_SFCR_SECKEY_Msk               (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos)        /*!< SCB SFCR: SECKEY Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+    \brief      Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/** \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+       uint32_t RESERVED0[2];
+  __IO uint32_t ACTLR;                   /*!< Offset: 0x008 (R/W)  Auxiliary Control Register      */
+} SCnSCB_Type;
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0                                          /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)        /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+    \brief      Type definitions for the System Timer Registers.
+  @{
+ */
+
+/** \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+#if (__MPU_PRESENT == 1)
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+    \brief      Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/** \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
+  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
+  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
+  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
+  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
+} MPU_Type;
+
+/* MPU Type Register */
+#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL << MPU_TYPE_SEPARATE_Pos)                 /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register */
+#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL << MPU_CTRL_ENABLE_Pos)                   /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register */
+#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL << MPU_RNR_REGION_Pos)                 /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register */
+#define MPU_RBAR_ADDR_Pos                   8                                             /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL << MPU_RBAR_REGION_Pos)                 /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register */
+#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL << MPU_RASR_ENABLE_Pos)                   /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+    \brief      SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR)
+                are only accessible over DAP and not via processor. Therefore
+                they are not covered by the Cortex-M0 header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_core_base     Core Definitions
+    \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of SC000 Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address              */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                 */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+
+#if (__MPU_PRESENT == 1)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+    \brief      Functions that manage interrupts and exceptions via the NVIC.
+    @{
+ */
+
+/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  (((uint32_t)(IRQn)       )    &  0x03) * 8 )
+#define _SHP_IDX(IRQn)           ( ((((uint32_t)(IRQn) & 0x0F)-8) >>    2)     )
+#define _IP_IDX(IRQn)            (   ((uint32_t)(IRQn)            >>    2)     )
+
+
+/** \brief  Enable External Interrupt
+
+    The function enables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Disable External Interrupt
+
+    The function disables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Get Pending Interrupt
+
+    The function reads the pending register in the NVIC and returns the pending bit
+    for the specified interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not pending.
+    \return             1  Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
+}
+
+
+/** \brief  Set Pending Interrupt
+
+    The function sets the pending bit of an external interrupt.
+
+    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Clear Pending Interrupt
+
+    The function clears the pending bit of an external interrupt.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
+}
+
+
+/** \brief  Set Interrupt Priority
+
+    The function sets the priority of an interrupt.
+
+    \note The priority cannot be set for every core interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+    \param [in]  priority  Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if(IRQn < 0) {
+    SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+  else {
+    NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+}
+
+
+/** \brief  Get Interrupt Priority
+
+    The function reads the priority of an interrupt. The interrupt
+    number can be positive to specify an external (device specific)
+    interrupt, or negative to specify an internal (core) interrupt.
+
+
+    \param [in]   IRQn  Interrupt number.
+    \return             Interrupt Priority. Value is aligned automatically to the implemented
+                        priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if(IRQn < 0) {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M0 system interrupts */
+  else {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
+}
+
+
+/** \brief  System Reset
+
+    The function initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+  __DSB();                                                     /* Ensure all outstanding memory accesses included
+                                                                  buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                     /* Ensure completion of memory access */
+  while(1);                                                    /* wait until reset */
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+    \brief      Functions that configure the System.
+  @{
+ */
+
+#if (__Vendor_SysTickConfig == 0)
+
+/** \brief  System Tick Configuration
+
+    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
+    Counter is in free running mode to generate periodic interrupts.
+
+    \param [in]  ticks  Number of ticks between two interrupts.
+
+    \return          0  Function succeeded.
+    \return          1  Function failed.
+
+    \note     When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+    function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+    must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk)  return (1);      /* Reload value impossible */
+
+  SysTick->LOAD  = ticks - 1;                                  /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
+  return (0);                                                  /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#endif /* __CORE_SC000_H_DEPENDANT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CMSIS_GENERIC */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_sc300.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_sc300.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/Include/core_sc300.h	(revision 136)
@@ -0,0 +1,1618 @@
+/**************************************************************************//**
+ * @file     core_sc300.h
+ * @brief    CMSIS SC300 Core Peripheral Access Layer Header File
+ * @version  V3.30
+ * @date     24. February 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include  /* treat file as system include file for MISRA check */
+#endif
+
+#ifndef __CORE_SC300_H_GENERIC
+#define __CORE_SC300_H_GENERIC
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/** \ingroup SC3000
+  @{
+ */
+
+/*  CMSIS SC300 definitions */
+#define __SC300_CMSIS_VERSION_MAIN  (0x03)                                   /*!< [31:16] CMSIS HAL main version */
+#define __SC300_CMSIS_VERSION_SUB   (0x20)                                   /*!< [15:0]  CMSIS HAL sub version  */
+#define __SC300_CMSIS_VERSION       ((__SC300_CMSIS_VERSION_MAIN << 16) | \
+                                      __SC300_CMSIS_VERSION_SUB          )   /*!< CMSIS HAL version number       */
+
+#define __CORTEX_SC                 (300)                                     /*!< Cortex secure core             */
+
+
+#if   defined ( __CC_ARM )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined ( __GNUC__ )
+  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __ICCARM__ )
+  #define __ASM           __asm                                       /*!< asm keyword for IAR Compiler          */
+  #define __INLINE        inline                                      /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TMS470__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TASKING__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
+  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __CSMC__ )	/* Cosmic */
+  #define __packed
+  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
+  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
+*/
+#define __FPU_USED       0
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TMS470__ )
+  #if defined __TI__VFP_SUPPORT____
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #if ( __CSMC__ & 0x400)		// FPU present for parser
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+#endif
+
+#include <stdint.h>                      /* standard types definitions                      */
+#include <core_cmInstr.h>                /* Core Instruction Access                         */
+#include <core_cmFunc.h>                 /* Core Function Access                            */
+
+#endif /* __CORE_SC300_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_SC300_H_DEPENDANT
+#define __CORE_SC300_H_DEPENDANT
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __SC300_REV
+    #define __SC300_REV               0x0000
+    #warning "__SC300_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          4
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions                */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+
+/*@} end of group SC300 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+ ******************************************************************************/
+/** \defgroup CMSIS_core_register Defines and Type Definitions
+    \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_CORE  Status and Control Registers
+    \brief  Core Register type definitions.
+  @{
+ */
+
+/** \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
+#else
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
+#endif
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} APSR_Type;
+
+
+/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} IPSR_Type;
+
+
+/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
+#else
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
+#endif
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} xPSR_Type;
+
+
+/** \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} CONTROL_Type;
+
+/*@} end of group CMSIS_CORE */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+    \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IO uint32_t ISER[8];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
+       uint32_t RESERVED0[24];
+  __IO uint32_t ICER[8];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register         */
+       uint32_t RSERVED1[24];
+  __IO uint32_t ISPR[8];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register          */
+       uint32_t RESERVED2[24];
+  __IO uint32_t ICPR[8];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register        */
+       uint32_t RESERVED3[24];
+  __IO uint32_t IABR[8];                 /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register           */
+       uint32_t RESERVED4[56];
+  __IO uint8_t  IP[240];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+       uint32_t RESERVED5[644];
+  __O  uint32_t STIR;                    /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register     */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0                                          /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL << NVIC_STIR_INTID_Pos)            /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCB     System Control Block (SCB)
+    \brief      Type definitions for the System Control Block Registers
+  @{
+ */
+
+/** \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
+  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
+  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
+  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
+  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
+  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
+  __IO uint8_t  SHP[12];                 /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+  __IO uint32_t CFSR;                    /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register                    */
+  __IO uint32_t HFSR;                    /*!< Offset: 0x02C (R/W)  HardFault Status Register                             */
+  __IO uint32_t DFSR;                    /*!< Offset: 0x030 (R/W)  Debug Fault Status Register                           */
+  __IO uint32_t MMFAR;                   /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register                      */
+  __IO uint32_t BFAR;                    /*!< Offset: 0x038 (R/W)  BusFault Address Register                             */
+  __IO uint32_t AFSR;                    /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register                       */
+  __I  uint32_t PFR[2];                  /*!< Offset: 0x040 (R/ )  Processor Feature Register                            */
+  __I  uint32_t DFR;                     /*!< Offset: 0x048 (R/ )  Debug Feature Register                                */
+  __I  uint32_t ADR;                     /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register                            */
+  __I  uint32_t MMFR[4];                 /*!< Offset: 0x050 (R/ )  Memory Model Feature Register                         */
+  __I  uint32_t ISAR[5];                 /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register                   */
+       uint32_t RESERVED0[5];
+  __IO uint32_t CPACR;                   /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register                   */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)              /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11                                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)           /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLBASE_Pos               29                                             /*!< SCB VTOR: TBLBASE Position */
+#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
+
+#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8                                             /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos             0                                             /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk            (1UL << SCB_AIRCR_VECTRESET_Pos)               /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8                                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4                                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1                                             /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos          0                                             /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk         (1UL << SCB_CCR_NONBASETHRDENA_Pos)            /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos          18                                             /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17                                             /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16                                             /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14                                             /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13                                             /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12                                             /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11                                             /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10                                             /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8                                             /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7                                             /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3                                             /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1                                             /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0                                             /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL << SCB_SHCSR_MEMFAULTACT_Pos)             /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Registers Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16                                             /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8                                             /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0                                             /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)            /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* SCB Hard Fault Status Registers Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31                                             /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30                                             /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1                                             /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4                                             /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3                                             /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2                                             /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1                                             /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0                                             /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL << SCB_DFSR_HALTED_Pos)                   /*!< SCB DFSR: HALTED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+    \brief      Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/** \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+       uint32_t RESERVED0[1];
+  __I  uint32_t ICTR;                    /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register      */
+       uint32_t RESERVED1[1];
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0                                          /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)      /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+    \brief      Type definitions for the System Timer Registers.
+  @{
+ */
+
+/** \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+    \brief      Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/** \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __O  union
+  {
+    __O  uint8_t    u8;                  /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit                   */
+    __O  uint16_t   u16;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit                  */
+    __O  uint32_t   u32;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit                  */
+  }  PORT [32];                          /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers               */
+       uint32_t RESERVED0[864];
+  __IO uint32_t TER;                     /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register                 */
+       uint32_t RESERVED1[15];
+  __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
+       uint32_t RESERVED2[15];
+  __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
+       uint32_t RESERVED3[29];
+  __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
+  __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
+  __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
+       uint32_t RESERVED4[43];
+  __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
+  __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
+       uint32_t RESERVED5[6];
+  __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __I  uint32_t PID7;                    /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __I  uint32_t PID0;                    /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __I  uint32_t PID1;                    /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __I  uint32_t PID2;                    /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __I  uint32_t PID3;                    /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __I  uint32_t CID0;                    /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __I  uint32_t CID1;                    /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __I  uint32_t CID2;                    /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __I  uint32_t CID3;                    /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0                                             /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL << ITM_TPR_PRIVMASK_Pos)                /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23                                             /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos             16                                             /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10                                             /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos              8                                             /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4                                             /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3                                             /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2                                             /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1                                             /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0                                             /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL << ITM_TCR_ITMENA_Pos)                    /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Integration Write Register Definitions */
+#define ITM_IWR_ATVALIDM_Pos                0                                             /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk               (1UL << ITM_IWR_ATVALIDM_Pos)                  /*!< ITM IWR: ATVALIDM Mask */
+
+/* ITM Integration Read Register Definitions */
+#define ITM_IRR_ATREADYM_Pos                0                                             /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk               (1UL << ITM_IRR_ATREADYM_Pos)                  /*!< ITM IRR: ATREADYM Mask */
+
+/* ITM Integration Mode Control Register Definitions */
+#define ITM_IMCR_INTEGRATION_Pos            0                                             /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk           (1UL << ITM_IMCR_INTEGRATION_Pos)              /*!< ITM IMCR: INTEGRATION Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2                                             /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1                                             /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0                                             /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL << ITM_LSR_Present_Pos)                   /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+    \brief      Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/** \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  Control Register                          */
+  __IO uint32_t CYCCNT;                  /*!< Offset: 0x004 (R/W)  Cycle Count Register                      */
+  __IO uint32_t CPICNT;                  /*!< Offset: 0x008 (R/W)  CPI Count Register                        */
+  __IO uint32_t EXCCNT;                  /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register         */
+  __IO uint32_t SLEEPCNT;                /*!< Offset: 0x010 (R/W)  Sleep Count Register                      */
+  __IO uint32_t LSUCNT;                  /*!< Offset: 0x014 (R/W)  LSU Count Register                        */
+  __IO uint32_t FOLDCNT;                 /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register         */
+  __I  uint32_t PCSR;                    /*!< Offset: 0x01C (R/ )  Program Counter Sample Register           */
+  __IO uint32_t COMP0;                   /*!< Offset: 0x020 (R/W)  Comparator Register 0                     */
+  __IO uint32_t MASK0;                   /*!< Offset: 0x024 (R/W)  Mask Register 0                           */
+  __IO uint32_t FUNCTION0;               /*!< Offset: 0x028 (R/W)  Function Register 0                       */
+       uint32_t RESERVED0[1];
+  __IO uint32_t COMP1;                   /*!< Offset: 0x030 (R/W)  Comparator Register 1                     */
+  __IO uint32_t MASK1;                   /*!< Offset: 0x034 (R/W)  Mask Register 1                           */
+  __IO uint32_t FUNCTION1;               /*!< Offset: 0x038 (R/W)  Function Register 1                       */
+       uint32_t RESERVED1[1];
+  __IO uint32_t COMP2;                   /*!< Offset: 0x040 (R/W)  Comparator Register 2                     */
+  __IO uint32_t MASK2;                   /*!< Offset: 0x044 (R/W)  Mask Register 2                           */
+  __IO uint32_t FUNCTION2;               /*!< Offset: 0x048 (R/W)  Function Register 2                       */
+       uint32_t RESERVED2[1];
+  __IO uint32_t COMP3;                   /*!< Offset: 0x050 (R/W)  Comparator Register 3                     */
+  __IO uint32_t MASK3;                   /*!< Offset: 0x054 (R/W)  Mask Register 3                           */
+  __IO uint32_t FUNCTION3;               /*!< Offset: 0x058 (R/W)  Function Register 3                       */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28                                          /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27                                          /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26                                          /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25                                          /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24                                          /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22                                          /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21                                          /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20                                          /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19                                          /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18                                          /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17                                          /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16                                          /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12                                          /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10                                          /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9                                          /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5                                          /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1                                          /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0                                          /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL << DWT_CTRL_CYCCNTENA_Pos)           /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0                                          /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL << DWT_CPICNT_CPICNT_Pos)           /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0                                          /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL << DWT_EXCCNT_EXCCNT_Pos)           /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0                                          /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL << DWT_SLEEPCNT_SLEEPCNT_Pos)       /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0                                          /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL << DWT_LSUCNT_LSUCNT_Pos)           /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0                                          /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL << DWT_FOLDCNT_FOLDCNT_Pos)         /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos                   0                                          /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk                  (0x1FUL << DWT_MASK_MASK_Pos)               /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos           24                                          /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos        16                                          /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos        12                                          /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10                                          /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos            9                                          /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos         8                                          /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos           7                                          /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos          5                                          /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos           0                                          /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL << DWT_FUNCTION_FUNCTION_Pos)        /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+    \brief      Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/** \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IO uint32_t SSPSR;                   /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register     */
+  __IO uint32_t CSPSR;                   /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+       uint32_t RESERVED0[2];
+  __IO uint32_t ACPR;                    /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+       uint32_t RESERVED1[55];
+  __IO uint32_t SPPR;                    /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+       uint32_t RESERVED2[131];
+  __I  uint32_t FFSR;                    /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IO uint32_t FFCR;                    /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __I  uint32_t FSCR;                    /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+       uint32_t RESERVED3[759];
+  __I  uint32_t TRIGGER;                 /*!< Offset: 0xEE8 (R/ )  TRIGGER */
+  __I  uint32_t FIFO0;                   /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __I  uint32_t ITATBCTR2;               /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+       uint32_t RESERVED4[1];
+  __I  uint32_t ITATBCTR0;               /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __I  uint32_t FIFO1;                   /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IO uint32_t ITCTRL;                  /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+       uint32_t RESERVED5[39];
+  __IO uint32_t CLAIMSET;                /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IO uint32_t CLAIMCLR;                /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+       uint32_t RESERVED7[8];
+  __I  uint32_t DEVID;                   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __I  uint32_t DEVTYPE;                 /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0                                          /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL << TPI_ACPR_PRESCALER_Pos)        /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0                                          /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL << TPI_SPPR_TXMODE_Pos)              /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3                                          /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2                                          /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1                                          /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0                                          /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL << TPI_FFSR_FlInProg_Pos)            /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8                                          /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1                                          /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0                                          /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL << TPI_TRIGGER_TRIGGER_Pos)          /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27                                          /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24                                          /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16                                          /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8                                          /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0                                          /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL << TPI_FIFO0_ETM0_Pos)              /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY_Pos           0                                          /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL << TPI_ITATBCTR2_ATREADY_Pos)        /*!< TPI ITATBCTR2: ATREADY Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27                                          /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24                                          /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16                                          /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8                                          /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0                                          /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL << TPI_FIFO1_ITM0_Pos)              /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY_Pos           0                                          /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL << TPI_ITATBCTR0_ATREADY_Pos)        /*!< TPI ITATBCTR0: ATREADY Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0                                          /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x1UL << TPI_ITCTRL_Mode_Pos)              /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11                                          /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10                                          /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9                                          /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6                                          /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5                                          /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0                                          /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL << TPI_DEVID_NrTraceInput_Pos)      /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             0                                          /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL << TPI_DEVTYPE_SubType_Pos)          /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           4                                          /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if (__MPU_PRESENT == 1)
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+    \brief      Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/** \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
+  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
+  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
+  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
+  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
+  __IO uint32_t RBAR_A1;                 /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register       */
+  __IO uint32_t RASR_A1;                 /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IO uint32_t RBAR_A2;                 /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register       */
+  __IO uint32_t RASR_A2;                 /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IO uint32_t RBAR_A3;                 /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register       */
+  __IO uint32_t RASR_A3;                 /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+/* MPU Type Register */
+#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL << MPU_TYPE_SEPARATE_Pos)                 /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register */
+#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL << MPU_CTRL_ENABLE_Pos)                   /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register */
+#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL << MPU_RNR_REGION_Pos)                 /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register */
+#define MPU_RBAR_ADDR_Pos                   5                                             /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL << MPU_RBAR_REGION_Pos)                 /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register */
+#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL << MPU_RASR_ENABLE_Pos)                   /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+    \brief      Type definitions for the Core Debug Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IO uint32_t DHCSR;                   /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register    */
+  __O  uint32_t DCRSR;                   /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register        */
+  __IO uint32_t DCRDR;                   /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register            */
+  __IO uint32_t DEMCR;                   /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16                                             /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25                                             /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24                                             /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19                                             /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18                                             /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17                                             /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16                                             /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5                                             /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3                                             /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2                                             /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1                                             /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0                                             /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)         /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register */
+#define CoreDebug_DCRSR_REGWnR_Pos         16                                             /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0                                             /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)         /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register */
+#define CoreDebug_DEMCR_TRCENA_Pos         24                                             /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19                                             /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18                                             /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17                                             /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16                                             /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10                                             /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9                                             /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8                                             /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7                                             /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6                                             /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5                                             /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4                                             /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0                                             /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)      /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_core_base     Core Definitions
+    \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Cortex-M3 Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address  */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address                   */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address                   */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address                   */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address            */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address               */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                  */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address  */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct           */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct           */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct           */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct    */
+
+#if (__MPU_PRESENT == 1)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+    \brief      Functions that manage interrupts and exceptions via the NVIC.
+    @{
+ */
+
+/** \brief  Set Priority Grouping
+
+  The function sets the priority grouping field using the required unlock sequence.
+  The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+  Only values from 0..7 are used.
+  In case of a conflict between priority grouping and available
+  priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+
+    \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07);               /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk);             /* clear bits to change               */
+  reg_value  =  (reg_value                                 |
+                ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << 8));                                     /* Insert write key and priorty group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/** \brief  Get Priority Grouping
+
+  The function reads the priority grouping field from the NVIC Interrupt Controller.
+
+    \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+{
+  return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos);   /* read priority grouping field */
+}
+
+
+/** \brief  Enable External Interrupt
+
+    The function enables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
+}
+
+
+/** \brief  Disable External Interrupt
+
+    The function disables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
+}
+
+
+/** \brief  Get Pending Interrupt
+
+    The function reads the pending register in the NVIC and returns the pending bit
+    for the specified interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not pending.
+    \return             1  Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
+}
+
+
+/** \brief  Set Pending Interrupt
+
+    The function sets the pending bit of an external interrupt.
+
+    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
+}
+
+
+/** \brief  Clear Pending Interrupt
+
+    The function clears the pending bit of an external interrupt.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
+}
+
+
+/** \brief  Get Active Interrupt
+
+    The function reads the active register in NVIC and returns the active bit.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not active.
+    \return             1  Interrupt status is active.
+ */
+__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+{
+  return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
+}
+
+
+/** \brief  Set Interrupt Priority
+
+    The function sets the priority of an interrupt.
+
+    \note The priority cannot be set for every core interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+    \param [in]  priority  Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if(IRQn < 0) {
+    SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M  System Interrupts */
+  else {
+    NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }        /* set Priority for device specific Interrupts  */
+}
+
+
+/** \brief  Get Interrupt Priority
+
+    The function reads the priority of an interrupt. The interrupt
+    number can be positive to specify an external (device specific)
+    interrupt, or negative to specify an internal (core) interrupt.
+
+
+    \param [in]   IRQn  Interrupt number.
+    \return             Interrupt Priority. Value is aligned automatically to the implemented
+                        priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if(IRQn < 0) {
+    return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M  system interrupts */
+  else {
+    return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)]           >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
+}
+
+
+/** \brief  Encode Priority
+
+    The function encodes the priority for an interrupt with the given priority group,
+    preemptive priority value, and subpriority value.
+    In case of a conflict between priority grouping and available
+    priority bits (__NVIC_PRIO_BITS), the samllest possible priority group is set.
+
+    \param [in]     PriorityGroup  Used priority group.
+    \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+    \param [in]       SubPriority  Subpriority value (starting from 0).
+    \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
+  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
+
+  return (
+           ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
+           ((SubPriority     & ((1 << (SubPriorityBits    )) - 1)))
+         );
+}
+
+
+/** \brief  Decode Priority
+
+    The function decodes an interrupt priority value with a given priority group to
+    preemptive priority value and subpriority value.
+    In case of a conflict between priority grouping and available
+    priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
+
+    \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+    \param [in]     PriorityGroup  Used priority group.
+    \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+    \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
+  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
+  *pSubPriority     = (Priority                   ) & ((1 << (SubPriorityBits    )) - 1);
+}
+
+
+/** \brief  System Reset
+
+    The function initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+  __DSB();                                                     /* Ensure all outstanding memory accesses included
+                                                                  buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
+                 (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);                   /* Keep priority group unchanged */
+  __DSB();                                                     /* Ensure completion of memory access */
+  while(1);                                                    /* wait until reset */
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+    \brief      Functions that configure the System.
+  @{
+ */
+
+#if (__Vendor_SysTickConfig == 0)
+
+/** \brief  System Tick Configuration
+
+    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
+    Counter is in free running mode to generate periodic interrupts.
+
+    \param [in]  ticks  Number of ticks between two interrupts.
+
+    \return          0  Function succeeded.
+    \return          1  Function failed.
+
+    \note     When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+    function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+    must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk)  return (1);      /* Reload value impossible */
+
+  SysTick->LOAD  = ticks - 1;                                  /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
+  return (0);                                                  /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_core_DebugFunctions ITM Functions
+    \brief   Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters.                         */
+#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/** \brief  ITM Send Character
+
+    The function transmits a character via the ITM channel 0, and
+    \li Just returns when no debugger is connected that has booked the output.
+    \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+
+    \param [in]     ch  Character to transmit.
+
+    \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if ((ITM->TCR & ITM_TCR_ITMENA_Msk)                  &&      /* ITM enabled */
+      (ITM->TER & (1UL << 0)        )                    )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0].u32 == 0);
+    ITM->PORT[0].u8 = (uint8_t) ch;
+  }
+  return (ch);
+}
+
+
+/** \brief  ITM Receive Character
+
+    The function inputs a character via the external variable \ref ITM_RxBuffer.
+
+    \return             Received character.
+    \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/** \brief  ITM Check Character
+
+    The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+
+    \return          0  No character available.
+    \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void) {
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
+    return (0);                                 /* no character available */
+  } else {
+    return (1);                                 /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+#endif /* __CORE_SC300_H_DEPENDANT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CMSIS_GENERIC */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/README.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/README.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/CMSIS/README.txt	(revision 136)
@@ -0,0 +1,42 @@
+* -------------------------------------------------------------------
+* Copyright (C) 2011-2014 ARM Limited. All rights reserved.  
+* 
+* Date:        17 February 2014  
+* Revision:    V4.00 
+*  
+* Project:     Cortex Microcontroller Software Interface Standard (CMSIS)
+* Title:       Release Note for CMSIS
+*
+* -------------------------------------------------------------------
+
+
+NOTE - Open the index.html file to access CMSIS documentation
+
+
+The Cortex Microcontroller Software Interface Standard (CMSIS) provides a single standard across all 
+Cortex-Mx processor series vendors. It enables code re-use and code sharing across software projects 
+and reduces time-to-market for new embedded applications.
+
+CMSIS is released under the terms of the end user license agreement ("CMSIS_END_USER_LICENCE_AGREEMENT.pdf").
+Any user of the software package is bound to the terms and conditions of the end user license agreement.
+
+
+You will find the following sub-directories:
+
+Documentation           - Contains CMSIS documentation.
+ 
+DSP_Lib                 - MDK project files, Examples and source files etc.. to build the 
+                          CMSIS DSP Software Library for Cortex-M0, Cortex-M3, Cortex-M4 processors.
+
+Include                 - CMSIS Core Support and CMSIS DSP Include Files.
+
+Lib                     - CMSIS DSP Libraries.
+
+RTOS                    - CMSIS RTOS API template header file.
+
+Driver                  - CMSIS Peripheral Driver Interface.
+
+Pack                    - CMSIS Software Packs.
+                          Mechanism to install software, device support, APIs, and example projects.
+
+SVD                     - CMSIS SVD Schema files and Conversion Utility.
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam-headers-version.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam-headers-version.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam-headers-version.txt	(revision 136)
@@ -0,0 +1,1 @@
+6.2.0.397 20140328
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam.h	(revision 136)
@@ -0,0 +1,618 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2014, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+#ifndef _SAM_INCLUDED_
+#define _SAM_INCLUDED_
+
+#define part_is_defined(part) (defined(__ ## part ## __))
+
+/*
+ * ----------------------------------------------------------------------------
+ * WISC family
+ * ----------------------------------------------------------------------------
+ */
+
+/* WISC35 series */
+#define WISC35D3N ( \
+    part_is_defined( WISC35D3NA ) )
+
+/* Entire WISC35 series */
+#define WISC35_SERIES (WISC35D3N)
+
+/* Entire WISC family */
+#define WISC_SERIES (WISC35_SERIES)
+
+/*
+ * ----------------------------------------------------------------------------
+ * SAML family
+ * ----------------------------------------------------------------------------
+ */
+
+/* SAML21 series */
+#define SAML21G18 ( \
+    part_is_defined( SAML21G18A ) )
+
+#define SAML21G16 ( \
+    part_is_defined( SAML21G16A ) )
+
+#define SAML21G17 ( \
+    part_is_defined( SAML21G17A ) )
+
+#define SAML21J18 ( \
+    part_is_defined( SAML21J18A ) )
+
+#define SAML21J17 ( \
+    part_is_defined( SAML21J17A ) )
+
+#define SAML21J16 ( \
+    part_is_defined( SAML21J16A ) )
+
+#define SAML21E15 ( \
+    part_is_defined( SAML21E15A ) )
+
+#define SAML21E16 ( \
+    part_is_defined( SAML21E16A ) )
+
+#define SAML21E17 ( \
+    part_is_defined( SAML21E17A ) )
+
+/* Entire SAML21 series */
+#define SAML21_SERIES (SAML21G18 || SAML21G16 || SAML21G17 || SAML21J18 || SAML21J17 || SAML21J16 || SAML21E15 || SAML21E16 || SAML21E17)
+
+/* Entire SAML family */
+#define SAML_SERIES (SAML21_SERIES)
+
+/*
+ * ----------------------------------------------------------------------------
+ * SAMG family
+ * ----------------------------------------------------------------------------
+ */
+
+/* SAMG51 series */
+#define SAMG51N1 ( \
+    part_is_defined( SAMG51N18 ) )
+
+#define SAMG51G1 ( \
+    part_is_defined( SAMG51G18 ) )
+
+/* Entire SAMG51 series */
+#define SAMG51_SERIES (SAMG51N1 || SAMG51G1)
+
+/* SAMG53 series */
+#define SAMG53N1 ( \
+    part_is_defined( SAMG53N19 ) )
+
+#define SAMG53G1 ( \
+    part_is_defined( SAMG53G19 ) )
+
+/* Entire SAMG53 series */
+#define SAMG53_SERIES (SAMG53N1 || SAMG53G1)
+
+/* SAMG54 series */
+#define SAMG54N1 ( \
+    part_is_defined( SAMG54N19 ) )
+
+#define SAMG54J1 ( \
+    part_is_defined( SAMG54J19 ) )
+
+#define SAMG54G1 ( \
+    part_is_defined( SAMG54G19 ) )
+
+/* Entire SAMG54 series */
+#define SAMG54_SERIES (SAMG54N1 || SAMG54J1 || SAMG54G1)
+
+/* Entire SAMG family */
+#define SAMG_SERIES (SAMG53_SERIES || SAMG54_SERIES || SAMG51_SERIES)
+
+/*
+ * ----------------------------------------------------------------------------
+ * SAMD family
+ * ----------------------------------------------------------------------------
+ */
+
+/* SAMD11 series */
+#define SAMD11D14 ( \
+    part_is_defined( SAMD11D14A ) )
+
+#define SAMD11D12 ( \
+    part_is_defined( SAMD11D12A ) )
+
+#define SAMD11D13 ( \
+    part_is_defined( SAMD11D13A ) )
+
+#define SAMD11C13 ( \
+    part_is_defined( SAMD11C13A ) )
+
+#define SAMD11C12 ( \
+    part_is_defined( SAMD11C12A ) )
+
+#define SAMD11C14 ( \
+    part_is_defined( SAMD11C14A ) )
+
+#define SAMD11E13 ( \
+    part_is_defined( SAMD11E13A ) )
+
+#define SAMD11E12 ( \
+    part_is_defined( SAMD11E12A ) )
+
+#define SAMD11E14 ( \
+    part_is_defined( SAMD11E14A ) )
+
+/* Entire SAMD11 series */
+#define SAMD11_SERIES (SAMD11D14 || SAMD11D12 || SAMD11D13 || SAMD11C13 || SAMD11C12 || SAMD11C14 || SAMD11E13 || SAMD11E12 || SAMD11E14)
+
+/* SAMD10 series */
+#define SAMD10D13 ( \
+    part_is_defined( SAMD10D13A ) )
+
+#define SAMD10D12 ( \
+    part_is_defined( SAMD10D12A ) )
+
+#define SAMD10D14 ( \
+    part_is_defined( SAMD10D14A ) )
+
+#define SAMD10E14 ( \
+    part_is_defined( SAMD10E14A ) )
+
+#define SAMD10E12 ( \
+    part_is_defined( SAMD10E12A ) )
+
+#define SAMD10E13 ( \
+    part_is_defined( SAMD10E13A ) )
+
+#define SAMD10C14 ( \
+    part_is_defined( SAMD10C14A ) )
+
+#define SAMD10C12 ( \
+    part_is_defined( SAMD10C12A ) )
+
+#define SAMD10C13 ( \
+    part_is_defined( SAMD10C13A ) )
+
+/* Entire SAMD10 series */
+#define SAMD10_SERIES (SAMD10D13 || SAMD10D12 || SAMD10D14 || SAMD10E14 || SAMD10E12 || SAMD10E13 || SAMD10C14 || SAMD10C12 || SAMD10C13)
+
+/* SAMD21 series */
+#define SAMD21J17 ( \
+    part_is_defined( SAMD21J17A ) )
+
+#define SAMD21E15 ( \
+    part_is_defined( SAMD21E15A ) )
+
+#define SAMD21E16 ( \
+    part_is_defined( SAMD21E16A ) )
+
+#define SAMD21E17 ( \
+    part_is_defined( SAMD21E17A ) )
+
+#define SAMD21E18 ( \
+    part_is_defined( SAMD21E18A ) )
+
+#define SAMD21J16 ( \
+    part_is_defined( SAMD21J16A ) )
+
+#define SAMD21G16 ( \
+    part_is_defined( SAMD21G16A ) )
+
+#define SAMD21G17 ( \
+    part_is_defined( SAMD21G17A ) )
+
+#define SAMD21J15 ( \
+    part_is_defined( SAMD21J15A ) )
+
+#define SAMD21G15 ( \
+    part_is_defined( SAMD21G15A ) )
+
+#define SAMD21G18 ( \
+    part_is_defined( SAMD21G18A ) )
+
+#define SAMD21J18 ( \
+    part_is_defined( SAMD21J18A ) )
+
+/* Entire SAMD21 series */
+#define SAMD21_SERIES (SAMD21J17 || SAMD21E15 || SAMD21E16 || SAMD21E17 || SAMD21E18 || SAMD21J16 || SAMD21G16 || SAMD21G17 || SAMD21J15 || SAMD21G15 || SAMD21G18 || SAMD21J18)
+
+/* SAMD20 series */
+#define SAMD20J1 ( \
+    part_is_defined( SAMD20J14 ) || \
+    part_is_defined( SAMD20J15 ) || \
+    part_is_defined( SAMD20J16 ) || \
+    part_is_defined( SAMD20J17 ) || \
+    part_is_defined( SAMD20J18 ) )
+
+#define SAMD20G1 ( \
+    part_is_defined( SAMD20G14 ) || \
+    part_is_defined( SAMD20G15 ) || \
+    part_is_defined( SAMD20G16 ) || \
+    part_is_defined( SAMD20G17 ) || \
+    part_is_defined( SAMD20G18 ) )
+
+#define SAMD20E1 ( \
+    part_is_defined( SAMD20E14 ) || \
+    part_is_defined( SAMD20E15 ) || \
+    part_is_defined( SAMD20E16 ) || \
+    part_is_defined( SAMD20E17 ) || \
+    part_is_defined( SAMD20E18 ) || \
+    part_is_defined( SAMD20E1F ) )
+
+/* Entire SAMD20 series */
+#define SAMD20_SERIES (SAMD20J1 || SAMD20G1 || SAMD20E1)
+
+/* Entire SAMD family */
+#define SAMD_SERIES (SAMD11_SERIES || SAMD21_SERIES || SAMD20_SERIES || SAMD10_SERIES)
+
+/*
+ * ----------------------------------------------------------------------------
+ * SAM3 family
+ * ----------------------------------------------------------------------------
+ */
+
+/* SAM3U series */
+#define SAM3U1 ( \
+    part_is_defined( SAM3U1E ) || \
+    part_is_defined( SAM3U1C ) )
+
+#define SAM3U2 ( \
+    part_is_defined( SAM3U2E ) || \
+    part_is_defined( SAM3U2C ) )
+
+#define SAM3U4 ( \
+    part_is_defined( SAM3U4E ) || \
+    part_is_defined( SAM3U4C ) )
+
+/* Entire SAM3U series */
+#define SAM3U_SERIES (SAM3U1 || SAM3U2 || SAM3U4)
+
+/* SAM3S series */
+#define SAM3S2 ( \
+    part_is_defined( SAM3S2C ) || \
+    part_is_defined( SAM3S2B ) || \
+    part_is_defined( SAM3S2A ) )
+
+#define SAM3S1 ( \
+    part_is_defined( SAM3S1C ) || \
+    part_is_defined( SAM3S1B ) || \
+    part_is_defined( SAM3S1A ) )
+
+#define SAM3S4 ( \
+    part_is_defined( SAM3S4C ) || \
+    part_is_defined( SAM3S4B ) || \
+    part_is_defined( SAM3S4A ) )
+
+/* Entire SAM3S series */
+#define SAM3S_SERIES (SAM3S2 || SAM3S1 || SAM3S4)
+
+/* SAM3XA series */
+#define SAM3A4 ( \
+    part_is_defined( SAM3A4C ) )
+
+#define SAM3X4 ( \
+    part_is_defined( SAM3X4C ) || \
+    part_is_defined( SAM3X4E ) )
+
+#define SAM3A8 ( \
+    part_is_defined( SAM3A8C ) )
+
+#define SAM3X8 ( \
+    part_is_defined( SAM3X8C ) || \
+    part_is_defined( SAM3X8E ) || \
+    part_is_defined( SAM3X8H ) )
+
+/* Entire SAM3XA series */
+#define SAM3XA_SERIES (SAM3A4 || SAM3X4 || SAM3A8 || SAM3X8)
+
+/* SAM3SD8 series */
+#define SAM3S8 ( \
+    part_is_defined( SAM3S8C ) || \
+    part_is_defined( SAM3S8B ) )
+
+#define SAM3SD8 ( \
+    part_is_defined( SAM3SD8C ) || \
+    part_is_defined( SAM3SD8B ) )
+
+/* Entire SAM3SD8 series */
+#define SAM3SD8_SERIES (SAM3S8 || SAM3SD8)
+
+/* SAM3N series */
+#define SAM3N1 ( \
+    part_is_defined( SAM3N1C ) || \
+    part_is_defined( SAM3N1B ) || \
+    part_is_defined( SAM3N1A ) )
+
+#define SAM3N0 ( \
+    part_is_defined( SAM3N0C ) || \
+    part_is_defined( SAM3N0B ) || \
+    part_is_defined( SAM3N0A ) )
+
+#define SAM3N00 ( \
+    part_is_defined( SAM3N00B ) || \
+    part_is_defined( SAM3N00A ) )
+
+#define SAM3N2 ( \
+    part_is_defined( SAM3N2C ) || \
+    part_is_defined( SAM3N2B ) || \
+    part_is_defined( SAM3N2A ) )
+
+#define SAM3N4 ( \
+    part_is_defined( SAM3N4C ) || \
+    part_is_defined( SAM3N4B ) || \
+    part_is_defined( SAM3N4A ) )
+
+/* Entire SAM3N series */
+#define SAM3N_SERIES (SAM3N1 || SAM3N0 || SAM3N00 || SAM3N2 || SAM3N4)
+
+/* Entire SAM3 family */
+#define SAM3_SERIES (SAM3S_SERIES || SAM3N_SERIES || SAM3U_SERIES || SAM3XA_SERIES || SAM3SD8_SERIES)
+
+/*
+ * ----------------------------------------------------------------------------
+ * SAMR family
+ * ----------------------------------------------------------------------------
+ */
+
+/* SAMR21 series */
+#define SAMR21E16 ( \
+    part_is_defined( SAMR21E16A ) )
+
+#define SAMR21E18 ( \
+    part_is_defined( SAMR21E18A ) )
+
+#define SAMR21G16 ( \
+    part_is_defined( SAMR21G16A ) )
+
+#define SAMR21G17 ( \
+    part_is_defined( SAMR21G17A ) )
+
+#define SAMR21G18 ( \
+    part_is_defined( SAMR21G18A ) )
+
+#define SAMR21E17 ( \
+    part_is_defined( SAMR21E17A ) )
+
+/* Entire SAMR21 series */
+#define SAMR21_SERIES (SAMR21E16 || SAMR21E18 || SAMR21G16 || SAMR21G17 || SAMR21G18 || SAMR21E17)
+
+/* Entire SAMR family */
+#define SAMR_SERIES (SAMR21_SERIES)
+
+/*
+ * ----------------------------------------------------------------------------
+ * SAM4 family
+ * ----------------------------------------------------------------------------
+ */
+
+/* SAM4CP series */
+#define SAM4CP16B_ ( \
+    part_is_defined( SAM4CP16B_0 ) || \
+    part_is_defined( SAM4CP16B_1 ) )
+
+/* Entire SAM4CP series */
+#define SAM4CP_SERIES (SAM4CP16B_)
+
+/* SAM4N series */
+#define SAM4N8 ( \
+    part_is_defined( SAM4N8A ) || \
+    part_is_defined( SAM4N8B ) || \
+    part_is_defined( SAM4N8C ) )
+
+#define SAM4N16 ( \
+    part_is_defined( SAM4N16B ) || \
+    part_is_defined( SAM4N16C ) )
+
+/* Entire SAM4N series */
+#define SAM4N_SERIES (SAM4N8 || SAM4N16)
+
+/* SAM4S series */
+#define SAM4S8 ( \
+    part_is_defined( SAM4S8C ) || \
+    part_is_defined( SAM4S8B ) )
+
+#define SAM4S2 ( \
+    part_is_defined( SAM4S2A ) || \
+    part_is_defined( SAM4S2B ) || \
+    part_is_defined( SAM4S2C ) )
+
+#define SAM4S4 ( \
+    part_is_defined( SAM4S4A ) || \
+    part_is_defined( SAM4S4B ) || \
+    part_is_defined( SAM4S4C ) )
+
+#define SAM4SD16 ( \
+    part_is_defined( SAM4SD16B ) || \
+    part_is_defined( SAM4SD16C ) )
+
+#define SAM4S16 ( \
+    part_is_defined( SAM4S16C ) || \
+    part_is_defined( SAM4S16B ) )
+
+#define SAM4SD32 ( \
+    part_is_defined( SAM4SD32B ) || \
+    part_is_defined( SAM4SD32C ) )
+
+#define SAM4SA16 ( \
+    part_is_defined( SAM4SA16B ) || \
+    part_is_defined( SAM4SA16C ) )
+
+/* Entire SAM4S series */
+#define SAM4S_SERIES (SAM4S8 || SAM4S2 || SAM4S4 || SAM4SD16 || SAM4S16 || SAM4SD32 || SAM4SA16)
+
+/* SAM4SP series */
+#define SAM4SP32 ( \
+    part_is_defined( SAM4SP32A ) )
+
+/* Entire SAM4SP series */
+#define SAM4SP_SERIES (SAM4SP32)
+
+/* SAM4E series */
+#define SAM4E16 ( \
+    part_is_defined( SAM4E16E ) || \
+    part_is_defined( SAM4E16C ) )
+
+#define SAM4E8 ( \
+    part_is_defined( SAM4E8E ) || \
+    part_is_defined( SAM4E8C ) )
+
+/* Entire SAM4E series */
+#define SAM4E_SERIES (SAM4E16 || SAM4E8)
+
+/* SAM4C series */
+#define SAM4C8C_ ( \
+    part_is_defined( SAM4C8C_0 ) || \
+    part_is_defined( SAM4C8C_1 ) )
+
+#define SAM4C16C_ ( \
+    part_is_defined( SAM4C16C_0 ) || \
+    part_is_defined( SAM4C16C_1 ) )
+
+/* Entire SAM4C series */
+#define SAM4C_SERIES (SAM4C8C_ || SAM4C16C_)
+
+/* SAM4L series */
+#define SAM4LS4 ( \
+    part_is_defined( ATSAM4LS4A ) ||     part_is_defined( SAM4LS4A ) || \
+    part_is_defined( ATSAM4LS4B ) ||     part_is_defined( SAM4LS4B ) || \
+    part_is_defined( ATSAM4LS4C ) ||     part_is_defined( SAM4LS4C ) )
+
+#define SAM4LS2 ( \
+    part_is_defined( ATSAM4LS2A ) ||     part_is_defined( SAM4LS2A ) || \
+    part_is_defined( ATSAM4LS2B ) ||     part_is_defined( SAM4LS2B ) || \
+    part_is_defined( ATSAM4LS2C ) ||     part_is_defined( SAM4LS2C ) )
+
+#define SAM4LS8 ( \
+    part_is_defined( ATSAM4LS8A ) ||     part_is_defined( SAM4LS8A ) || \
+    part_is_defined( ATSAM4LS8B ) ||     part_is_defined( SAM4LS8B ) || \
+    part_is_defined( ATSAM4LS8C ) ||     part_is_defined( SAM4LS8C ) )
+
+#define SAM4LC4 ( \
+    part_is_defined( ATSAM4LC4A ) ||     part_is_defined( SAM4LC4A ) || \
+    part_is_defined( ATSAM4LC4B ) ||     part_is_defined( SAM4LC4B ) || \
+    part_is_defined( ATSAM4LC4C ) ||     part_is_defined( SAM4LC4C ) )
+
+#define SAM4LC2 ( \
+    part_is_defined( ATSAM4LC2A ) ||     part_is_defined( SAM4LC2A ) || \
+    part_is_defined( ATSAM4LC2B ) ||     part_is_defined( SAM4LC2B ) || \
+    part_is_defined( ATSAM4LC2C ) ||     part_is_defined( SAM4LC2C ) )
+
+#define SAM4LC8 ( \
+    part_is_defined( ATSAM4LC8A ) ||     part_is_defined( SAM4LC8A ) || \
+    part_is_defined( ATSAM4LC8B ) ||     part_is_defined( SAM4LC8B ) || \
+    part_is_defined( ATSAM4LC8C ) ||     part_is_defined( SAM4LC8C ) )
+
+/* Entire SAM4L series */
+#define SAM4L_SERIES (SAM4LS4 || SAM4LS2 || SAM4LS8 || SAM4LC4 || SAM4LC2 || SAM4LC8)
+
+/* SAM4C32 series */
+#define SAM4C32C_ ( \
+    part_is_defined( SAM4C32C_0 ) || \
+    part_is_defined( SAM4C32C_1 ) )
+
+#define SAM4C32E_ ( \
+    part_is_defined( SAM4C32E_0 ) || \
+    part_is_defined( SAM4C32E_1 ) )
+
+/* Entire SAM4C32 series */
+#define SAM4C32_SERIES (SAM4C32C_ || SAM4C32E_)
+
+/* SAM4CM32 series */
+#define SAM4CMP32C_ ( \
+    part_is_defined( SAM4CMP32C_0 ) || \
+    part_is_defined( SAM4CMP32C_1 ) )
+
+#define SAM4CMS32C_ ( \
+    part_is_defined( SAM4CMS32C_0 ) || \
+    part_is_defined( SAM4CMS32C_1 ) )
+
+/* Entire SAM4CM32 series */
+#define SAM4CM32_SERIES (SAM4CMP32C_ || SAM4CMS32C_)
+
+/* SAM4CM series */
+#define SAM4CMP16C_ ( \
+    part_is_defined( SAM4CMP16C_0 ) || \
+    part_is_defined( SAM4CMP16C_1 ) )
+
+#define SAM4CMS16C_ ( \
+    part_is_defined( SAM4CMS16C_0 ) || \
+    part_is_defined( SAM4CMS16C_1 ) )
+
+#define SAM4CMP8C_ ( \
+    part_is_defined( SAM4CMP8C_0 ) || \
+    part_is_defined( SAM4CMP8C_1 ) )
+
+#define SAM4CMS8C_ ( \
+    part_is_defined( SAM4CMS8C_0 ) || \
+    part_is_defined( SAM4CMS8C_1 ) )
+
+/* Entire SAM4CM series */
+#define SAM4CM_SERIES (SAM4CMP16C_ || SAM4CMS16C_ || SAM4CMP8C_ || SAM4CMS8C_)
+
+/* Entire SAM4 family */
+#define SAM4_SERIES (SAM4E_SERIES || SAM4CM32_SERIES || SAM4SP_SERIES || SAM4C32_SERIES || SAM4S_SERIES || SAM4L_SERIES || SAM4CM_SERIES || SAM4N_SERIES || SAM4CP_SERIES || SAM4C_SERIES)
+
+/*
+ * ----------------------------------------------------------------------------
+ * Whole SAM product line
+ * ----------------------------------------------------------------------------
+ */
+
+#define SAM (SAM4_SERIES || SAMR_SERIES || SAM3_SERIES || WISC_SERIES || SAML_SERIES || SAMD_SERIES || SAMG_SERIES)
+
+/*
+ * ----------------------------------------------------------------------------
+ * Header inclusion
+ * ----------------------------------------------------------------------------
+ */
+
+#if WISC_SERIES
+#include "wisc.h"
+#endif /* WISC_SERIES */
+
+#if SAML_SERIES
+#include "saml.h"
+#endif /* SAML_SERIES */
+
+#if SAMG_SERIES
+#include "samg.h"
+#endif /* SAMG_SERIES */
+
+#if SAMD_SERIES
+#include "samd.h"
+#endif /* SAMD_SERIES */
+
+#if SAM3_SERIES
+#include "sam3.h"
+#endif /* SAM3_SERIES */
+
+#if SAMR_SERIES
+#include "samr.h"
+#endif /* SAMR_SERIES */
+
+#if SAM4_SERIES
+#include "sam4.h"
+#endif /* SAM4_SERIES */
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam3.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam3.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam3.h	(revision 136)
@@ -0,0 +1,114 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2014, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+#ifndef _SAM3_INCLUDED_
+#define _SAM3_INCLUDED_
+
+#if defined (__SAM3SD8C__)
+#include "sam3sd8/include/sam3sd8.h"
+#elif defined (__SAM3SD8B__)
+#include "sam3sd8/include/sam3sd8.h"
+#elif defined (__SAM3S8C__)
+#include "sam3sd8/include/sam3sd8.h"
+#elif defined (__SAM3S8B__)
+#include "sam3sd8/include/sam3sd8.h"
+#elif defined (__SAM3S4C__)
+#include "sam3s/include/sam3s.h"
+#elif defined (__SAM3S4B__)
+#include "sam3s/include/sam3s.h"
+#elif defined (__SAM3S4A__)
+#include "sam3s/include/sam3s.h"
+#elif defined (__SAM3S2C__)
+#include "sam3s/include/sam3s.h"
+#elif defined (__SAM3S2B__)
+#include "sam3s/include/sam3s.h"
+#elif defined (__SAM3S2A__)
+#include "sam3s/include/sam3s.h"
+#elif defined (__SAM3S1C__)
+#include "sam3s/include/sam3s.h"
+#elif defined (__SAM3S1B__)
+#include "sam3s/include/sam3s.h"
+#elif defined (__SAM3S1A__)
+#include "sam3s/include/sam3s.h"
+#elif defined (__SAM3U4E__)
+#include "sam3u/include/sam3u.h"
+#elif defined (__SAM3U4C__)
+#include "sam3u/include/sam3u.h"
+#elif defined (__SAM3U2E__)
+#include "sam3u/include/sam3u.h"
+#elif defined (__SAM3U2C__)
+#include "sam3u/include/sam3u.h"
+#elif defined (__SAM3U1E__)
+#include "sam3u/include/sam3u.h"
+#elif defined (__SAM3U1C__)
+#include "sam3u/include/sam3u.h"
+#elif defined (__SAM3N4C__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N4B__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N4A__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N2C__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N2B__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N2A__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N1C__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N1B__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N1A__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N0C__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N0B__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N0A__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N00B__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3N00A__)
+#include "sam3n/include/sam3n.h"
+#elif defined (__SAM3A4C__)
+#include "sam3xa/include/sam3xa.h"
+#elif defined (__SAM3A8C__)
+#include "sam3xa/include/sam3xa.h"
+#elif defined (__SAM3X4C__)
+#include "sam3xa/include/sam3xa.h"
+#elif defined (__SAM3X4E__)
+#include "sam3xa/include/sam3xa.h"
+#elif defined (__SAM3X8C__)
+#include "sam3xa/include/sam3xa.h"
+#elif defined (__SAM3X8E__)
+#include "sam3xa/include/sam3xa.h"
+#elif defined (__SAM3X8H__)
+#include "sam3xa/include/sam3xa.h"
+#endif
+
+#endif /* _SAM3_INCLUDED_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam4.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam4.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/sam4.h	(revision 136)
@@ -0,0 +1,166 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2014, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+#ifndef _SAM4_INCLUDED_
+#define _SAM4_INCLUDED_
+
+#if defined (__SAM4C8C_0__)
+#include "sam4c/include/sam4c.h"
+#elif defined (__SAM4C8C_1__)
+#include "sam4c/include/sam4c.h"
+#elif defined (__SAM4C16C_0__)
+#include "sam4c/include/sam4c.h"
+#elif defined (__SAM4C16C_1__)
+#include "sam4c/include/sam4c.h"
+#elif defined (__SAM4CMP8C_0__)
+#include "sam4cm/include/sam4cm.h"
+#elif defined (__SAM4CMP8C_1__)
+#include "sam4cm/include/sam4cm.h"
+#elif defined (__SAM4CMP16C_0__)
+#include "sam4cm/include/sam4cm.h"
+#elif defined (__SAM4CMP16C_1__)
+#include "sam4cm/include/sam4cm.h"
+#elif defined (__SAM4CMS8C_0__)
+#include "sam4cm/include/sam4cm.h"
+#elif defined (__SAM4CMS8C_1__)
+#include "sam4cm/include/sam4cm.h"
+#elif defined (__SAM4CMS16C_0__)
+#include "sam4cm/include/sam4cm.h"
+#elif defined (__SAM4CMS16C_1__)
+#include "sam4cm/include/sam4cm.h"
+#elif defined (__SAM4CP16B_0__)
+#include "sam4cp/include/sam4cp.h"
+#elif defined (__SAM4CP16B_1__)
+#include "sam4cp/include/sam4cp.h"
+#elif defined (__SAM4C32C_0__)
+#include "sam4c32/include/sam4c32.h"
+#elif defined (__SAM4C32C_1__)
+#include "sam4c32/include/sam4c32.h"
+#elif defined (__SAM4C32E_0__)
+#include "sam4c32/include/sam4c32.h"
+#elif defined (__SAM4C32E_1__)
+#include "sam4c32/include/sam4c32.h"
+#elif defined (__SAM4CMP32C_0__)
+#include "sam4cm32/include/sam4cm32.h"
+#elif defined (__SAM4CMP32C_1__)
+#include "sam4cm32/include/sam4cm32.h"
+#elif defined (__SAM4CMS32C_0__)
+#include "sam4cm32/include/sam4cm32.h"
+#elif defined (__SAM4CMS32C_1__)
+#include "sam4cm32/include/sam4cm32.h"
+#elif defined (__ATSAM4LC2A__) || defined (__SAM4LC2A__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LC2B__) || defined (__SAM4LC2B__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LC2C__) || defined (__SAM4LC2C__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LC4A__) || defined (__SAM4LC4A__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LC4B__) || defined (__SAM4LC4B__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LC4C__) || defined (__SAM4LC4C__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LC8A__) || defined (__SAM4LC8A__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LC8B__) || defined (__SAM4LC8B__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LC8C__) || defined (__SAM4LC8C__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LS2A__) || defined (__SAM4LS2A__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LS2B__) || defined (__SAM4LS2B__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LS2C__) || defined (__SAM4LS2C__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LS4A__) || defined (__SAM4LS4A__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LS4B__) || defined (__SAM4LS4B__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LS4C__) || defined (__SAM4LS4C__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LS8A__) || defined (__SAM4LS8A__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LS8B__) || defined (__SAM4LS8B__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__ATSAM4LS8C__) || defined (__SAM4LS8C__)
+#include "sam4l/include/sam4l.h"
+#elif defined (__SAM4S16C__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4S16B__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4S2A__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4S2B__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4S2C__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4S4A__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4S4B__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4S4C__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4S8C__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4S8B__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4SA16B__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4SA16C__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4SD16B__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4SD16C__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4SD32B__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4SD32C__)
+#include "sam4s/include/sam4s.h"
+#elif defined (__SAM4N8A__)
+#include "sam4n/include/sam4n.h"
+#elif defined (__SAM4N8B__)
+#include "sam4n/include/sam4n.h"
+#elif defined (__SAM4N8C__)
+#include "sam4n/include/sam4n.h"
+#elif defined (__SAM4N16B__)
+#include "sam4n/include/sam4n.h"
+#elif defined (__SAM4N16C__)
+#include "sam4n/include/sam4n.h"
+#elif defined (__SAM4E8E__)
+#include "sam4e/include/sam4e.h"
+#elif defined (__SAM4E16E__)
+#include "sam4e/include/sam4e.h"
+#elif defined (__SAM4E8C__)
+#include "sam4e/include/sam4e.h"
+#elif defined (__SAM4E16C__)
+#include "sam4e/include/sam4e.h"
+#elif defined (__SAM4SP32A__)
+#include "sam4sp/include/sam4sp.h"
+#endif
+
+#endif /* _SAM4_INCLUDED_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd.h	(revision 136)
@@ -0,0 +1,126 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2014, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+#ifndef _SAMD_INCLUDED_
+#define _SAMD_INCLUDED_
+
+#if defined (__SAMD20E14__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20E15__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20E16__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20E17__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20E18__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20E1F__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20G14__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20G15__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20G16__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20G17__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20G18__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20J14__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20J15__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20J16__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20J17__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD20J18__)
+#include "samd20/include/samd20.h"
+#elif defined (__SAMD21E15A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21E16A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21E17A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21E18A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21G15A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21G16A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21G17A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21G18A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21J15A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21J16A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21J17A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD21J18A__)
+#include "samd21/include/samd21.h"
+#elif defined (__SAMD10C12A__)
+#include "samd10/include/samd10.h"
+#elif defined (__SAMD10C13A__)
+#include "samd10/include/samd10.h"
+#elif defined (__SAMD10C14A__)
+#include "samd10/include/samd10.h"
+#elif defined (__SAMD10D12A__)
+#include "samd10/include/samd10.h"
+#elif defined (__SAMD10D13A__)
+#include "samd10/include/samd10.h"
+#elif defined (__SAMD10D14A__)
+#include "samd10/include/samd10.h"
+#elif defined (__SAMD10E12A__)
+#include "samd10/include/samd10.h"
+#elif defined (__SAMD10E13A__)
+#include "samd10/include/samd10.h"
+#elif defined (__SAMD10E14A__)
+#include "samd10/include/samd10.h"
+#elif defined (__SAMD11C12A__)
+#include "samd11/include/samd11.h"
+#elif defined (__SAMD11C13A__)
+#include "samd11/include/samd11.h"
+#elif defined (__SAMD11C14A__)
+#include "samd11/include/samd11.h"
+#elif defined (__SAMD11D12A__)
+#include "samd11/include/samd11.h"
+#elif defined (__SAMD11D13A__)
+#include "samd11/include/samd11.h"
+#elif defined (__SAMD11D14A__)
+#include "samd11/include/samd11.h"
+#elif defined (__SAMD11E12A__)
+#include "samd11/include/samd11.h"
+#elif defined (__SAMD11E13A__)
+#include "samd11/include/samd11.h"
+#elif defined (__SAMD11E14A__)
+#include "samd11/include/samd11.h"
+#endif
+
+#endif /* _SAMD_INCLUDED_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/ac.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/ac.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/ac.h	(revision 136)
@@ -0,0 +1,559 @@
+/**
+ * \file
+ *
+ * \brief Component description for AC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_AC_COMPONENT_
+#define _SAMD21_AC_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR AC */
+/* ========================================================================== */
+/** \addtogroup SAMD21_AC Analog Comparators */
+/*@{*/
+
+#define AC_U2205
+#define REV_AC                      0x111
+
+/* -------- AC_CTRLA : (AC Offset: 0x00) (R/W  8) Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint8_t  RUNSTDBY:1;       /*!< bit:      2  Run in Standby                     */
+    uint8_t  :4;               /*!< bit:  3.. 6  Reserved                           */
+    uint8_t  LPMUX:1;          /*!< bit:      7  Low-Power Mux                      */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_CTRLA_OFFSET             0x00         /**< \brief (AC_CTRLA offset) Control A */
+#define AC_CTRLA_RESETVALUE         0x00         /**< \brief (AC_CTRLA reset_value) Control A */
+
+#define AC_CTRLA_SWRST_Pos          0            /**< \brief (AC_CTRLA) Software Reset */
+#define AC_CTRLA_SWRST              (0x1u << AC_CTRLA_SWRST_Pos)
+#define AC_CTRLA_ENABLE_Pos         1            /**< \brief (AC_CTRLA) Enable */
+#define AC_CTRLA_ENABLE             (0x1u << AC_CTRLA_ENABLE_Pos)
+#define AC_CTRLA_RUNSTDBY_Pos       2            /**< \brief (AC_CTRLA) Run in Standby */
+#define AC_CTRLA_RUNSTDBY_Msk       (0x1u << AC_CTRLA_RUNSTDBY_Pos)
+#define AC_CTRLA_RUNSTDBY(value)    ((AC_CTRLA_RUNSTDBY_Msk & ((value) << AC_CTRLA_RUNSTDBY_Pos)))
+#define AC_CTRLA_LPMUX_Pos          7            /**< \brief (AC_CTRLA) Low-Power Mux */
+#define AC_CTRLA_LPMUX              (0x1u << AC_CTRLA_LPMUX_Pos)
+#define AC_CTRLA_MASK               0x87u        /**< \brief (AC_CTRLA) MASK Register */
+
+/* -------- AC_CTRLB : (AC Offset: 0x01) ( /W  8) Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  START0:1;         /*!< bit:      0  Comparator 0 Start Comparison      */
+    uint8_t  START1:1;         /*!< bit:      1  Comparator 1 Start Comparison      */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  START:2;          /*!< bit:  0.. 1  Comparator x Start Comparison      */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_CTRLB_OFFSET             0x01         /**< \brief (AC_CTRLB offset) Control B */
+#define AC_CTRLB_RESETVALUE         0x00         /**< \brief (AC_CTRLB reset_value) Control B */
+
+#define AC_CTRLB_START0_Pos         0            /**< \brief (AC_CTRLB) Comparator 0 Start Comparison */
+#define AC_CTRLB_START0             (1 << AC_CTRLB_START0_Pos)
+#define AC_CTRLB_START1_Pos         1            /**< \brief (AC_CTRLB) Comparator 1 Start Comparison */
+#define AC_CTRLB_START1             (1 << AC_CTRLB_START1_Pos)
+#define AC_CTRLB_START_Pos          0            /**< \brief (AC_CTRLB) Comparator x Start Comparison */
+#define AC_CTRLB_START_Msk          (0x3u << AC_CTRLB_START_Pos)
+#define AC_CTRLB_START(value)       ((AC_CTRLB_START_Msk & ((value) << AC_CTRLB_START_Pos)))
+#define AC_CTRLB_MASK               0x03u        /**< \brief (AC_CTRLB) MASK Register */
+
+/* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t COMPEO0:1;        /*!< bit:      0  Comparator 0 Event Output Enable   */
+    uint16_t COMPEO1:1;        /*!< bit:      1  Comparator 1 Event Output Enable   */
+    uint16_t :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint16_t WINEO0:1;         /*!< bit:      4  Window 0 Event Output Enable       */
+    uint16_t :3;               /*!< bit:  5.. 7  Reserved                           */
+    uint16_t COMPEI0:1;        /*!< bit:      8  Comparator 0 Event Input           */
+    uint16_t COMPEI1:1;        /*!< bit:      9  Comparator 1 Event Input           */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t COMPEO:2;         /*!< bit:  0.. 1  Comparator x Event Output Enable   */
+    uint16_t :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint16_t WINEO:1;          /*!< bit:      4  Window x Event Output Enable       */
+    uint16_t :3;               /*!< bit:  5.. 7  Reserved                           */
+    uint16_t COMPEI:2;         /*!< bit:  8.. 9  Comparator x Event Input           */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} AC_EVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_EVCTRL_OFFSET            0x02         /**< \brief (AC_EVCTRL offset) Event Control */
+#define AC_EVCTRL_RESETVALUE        0x0000       /**< \brief (AC_EVCTRL reset_value) Event Control */
+
+#define AC_EVCTRL_COMPEO0_Pos       0            /**< \brief (AC_EVCTRL) Comparator 0 Event Output Enable */
+#define AC_EVCTRL_COMPEO0           (1 << AC_EVCTRL_COMPEO0_Pos)
+#define AC_EVCTRL_COMPEO1_Pos       1            /**< \brief (AC_EVCTRL) Comparator 1 Event Output Enable */
+#define AC_EVCTRL_COMPEO1           (1 << AC_EVCTRL_COMPEO1_Pos)
+#define AC_EVCTRL_COMPEO_Pos        0            /**< \brief (AC_EVCTRL) Comparator x Event Output Enable */
+#define AC_EVCTRL_COMPEO_Msk        (0x3u << AC_EVCTRL_COMPEO_Pos)
+#define AC_EVCTRL_COMPEO(value)     ((AC_EVCTRL_COMPEO_Msk & ((value) << AC_EVCTRL_COMPEO_Pos)))
+#define AC_EVCTRL_WINEO0_Pos        4            /**< \brief (AC_EVCTRL) Window 0 Event Output Enable */
+#define AC_EVCTRL_WINEO0            (1 << AC_EVCTRL_WINEO0_Pos)
+#define AC_EVCTRL_WINEO_Pos         4            /**< \brief (AC_EVCTRL) Window x Event Output Enable */
+#define AC_EVCTRL_WINEO_Msk         (0x1u << AC_EVCTRL_WINEO_Pos)
+#define AC_EVCTRL_WINEO(value)      ((AC_EVCTRL_WINEO_Msk & ((value) << AC_EVCTRL_WINEO_Pos)))
+#define AC_EVCTRL_COMPEI0_Pos       8            /**< \brief (AC_EVCTRL) Comparator 0 Event Input */
+#define AC_EVCTRL_COMPEI0           (1 << AC_EVCTRL_COMPEI0_Pos)
+#define AC_EVCTRL_COMPEI1_Pos       9            /**< \brief (AC_EVCTRL) Comparator 1 Event Input */
+#define AC_EVCTRL_COMPEI1           (1 << AC_EVCTRL_COMPEI1_Pos)
+#define AC_EVCTRL_COMPEI_Pos        8            /**< \brief (AC_EVCTRL) Comparator x Event Input */
+#define AC_EVCTRL_COMPEI_Msk        (0x3u << AC_EVCTRL_COMPEI_Pos)
+#define AC_EVCTRL_COMPEI(value)     ((AC_EVCTRL_COMPEI_Msk & ((value) << AC_EVCTRL_COMPEI_Pos)))
+#define AC_EVCTRL_MASK              0x0313u      /**< \brief (AC_EVCTRL) MASK Register */
+
+/* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W  8) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  COMP0:1;          /*!< bit:      0  Comparator 0 Interrupt Enable      */
+    uint8_t  COMP1:1;          /*!< bit:      1  Comparator 1 Interrupt Enable      */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  WIN0:1;           /*!< bit:      4  Window 0 Interrupt Enable          */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  COMP:2;           /*!< bit:  0.. 1  Comparator x Interrupt Enable      */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  WIN:1;            /*!< bit:      4  Window x Interrupt Enable          */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_INTENCLR_OFFSET          0x04         /**< \brief (AC_INTENCLR offset) Interrupt Enable Clear */
+#define AC_INTENCLR_RESETVALUE      0x00         /**< \brief (AC_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define AC_INTENCLR_COMP0_Pos       0            /**< \brief (AC_INTENCLR) Comparator 0 Interrupt Enable */
+#define AC_INTENCLR_COMP0           (1 << AC_INTENCLR_COMP0_Pos)
+#define AC_INTENCLR_COMP1_Pos       1            /**< \brief (AC_INTENCLR) Comparator 1 Interrupt Enable */
+#define AC_INTENCLR_COMP1           (1 << AC_INTENCLR_COMP1_Pos)
+#define AC_INTENCLR_COMP_Pos        0            /**< \brief (AC_INTENCLR) Comparator x Interrupt Enable */
+#define AC_INTENCLR_COMP_Msk        (0x3u << AC_INTENCLR_COMP_Pos)
+#define AC_INTENCLR_COMP(value)     ((AC_INTENCLR_COMP_Msk & ((value) << AC_INTENCLR_COMP_Pos)))
+#define AC_INTENCLR_WIN0_Pos        4            /**< \brief (AC_INTENCLR) Window 0 Interrupt Enable */
+#define AC_INTENCLR_WIN0            (1 << AC_INTENCLR_WIN0_Pos)
+#define AC_INTENCLR_WIN_Pos         4            /**< \brief (AC_INTENCLR) Window x Interrupt Enable */
+#define AC_INTENCLR_WIN_Msk         (0x1u << AC_INTENCLR_WIN_Pos)
+#define AC_INTENCLR_WIN(value)      ((AC_INTENCLR_WIN_Msk & ((value) << AC_INTENCLR_WIN_Pos)))
+#define AC_INTENCLR_MASK            0x13u        /**< \brief (AC_INTENCLR) MASK Register */
+
+/* -------- AC_INTENSET : (AC Offset: 0x05) (R/W  8) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  COMP0:1;          /*!< bit:      0  Comparator 0 Interrupt Enable      */
+    uint8_t  COMP1:1;          /*!< bit:      1  Comparator 1 Interrupt Enable      */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  WIN0:1;           /*!< bit:      4  Window 0 Interrupt Enable          */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  COMP:2;           /*!< bit:  0.. 1  Comparator x Interrupt Enable      */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  WIN:1;            /*!< bit:      4  Window x Interrupt Enable          */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_INTENSET_OFFSET          0x05         /**< \brief (AC_INTENSET offset) Interrupt Enable Set */
+#define AC_INTENSET_RESETVALUE      0x00         /**< \brief (AC_INTENSET reset_value) Interrupt Enable Set */
+
+#define AC_INTENSET_COMP0_Pos       0            /**< \brief (AC_INTENSET) Comparator 0 Interrupt Enable */
+#define AC_INTENSET_COMP0           (1 << AC_INTENSET_COMP0_Pos)
+#define AC_INTENSET_COMP1_Pos       1            /**< \brief (AC_INTENSET) Comparator 1 Interrupt Enable */
+#define AC_INTENSET_COMP1           (1 << AC_INTENSET_COMP1_Pos)
+#define AC_INTENSET_COMP_Pos        0            /**< \brief (AC_INTENSET) Comparator x Interrupt Enable */
+#define AC_INTENSET_COMP_Msk        (0x3u << AC_INTENSET_COMP_Pos)
+#define AC_INTENSET_COMP(value)     ((AC_INTENSET_COMP_Msk & ((value) << AC_INTENSET_COMP_Pos)))
+#define AC_INTENSET_WIN0_Pos        4            /**< \brief (AC_INTENSET) Window 0 Interrupt Enable */
+#define AC_INTENSET_WIN0            (1 << AC_INTENSET_WIN0_Pos)
+#define AC_INTENSET_WIN_Pos         4            /**< \brief (AC_INTENSET) Window x Interrupt Enable */
+#define AC_INTENSET_WIN_Msk         (0x1u << AC_INTENSET_WIN_Pos)
+#define AC_INTENSET_WIN(value)      ((AC_INTENSET_WIN_Msk & ((value) << AC_INTENSET_WIN_Pos)))
+#define AC_INTENSET_MASK            0x13u        /**< \brief (AC_INTENSET) MASK Register */
+
+/* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W  8) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  COMP0:1;          /*!< bit:      0  Comparator 0                       */
+    uint8_t  COMP1:1;          /*!< bit:      1  Comparator 1                       */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  WIN0:1;           /*!< bit:      4  Window 0                           */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  COMP:2;           /*!< bit:  0.. 1  Comparator x                       */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  WIN:1;            /*!< bit:      4  Window x                           */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_INTFLAG_OFFSET           0x06         /**< \brief (AC_INTFLAG offset) Interrupt Flag Status and Clear */
+#define AC_INTFLAG_RESETVALUE       0x00         /**< \brief (AC_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define AC_INTFLAG_COMP0_Pos        0            /**< \brief (AC_INTFLAG) Comparator 0 */
+#define AC_INTFLAG_COMP0            (1 << AC_INTFLAG_COMP0_Pos)
+#define AC_INTFLAG_COMP1_Pos        1            /**< \brief (AC_INTFLAG) Comparator 1 */
+#define AC_INTFLAG_COMP1            (1 << AC_INTFLAG_COMP1_Pos)
+#define AC_INTFLAG_COMP_Pos         0            /**< \brief (AC_INTFLAG) Comparator x */
+#define AC_INTFLAG_COMP_Msk         (0x3u << AC_INTFLAG_COMP_Pos)
+#define AC_INTFLAG_COMP(value)      ((AC_INTFLAG_COMP_Msk & ((value) << AC_INTFLAG_COMP_Pos)))
+#define AC_INTFLAG_WIN0_Pos         4            /**< \brief (AC_INTFLAG) Window 0 */
+#define AC_INTFLAG_WIN0             (1 << AC_INTFLAG_WIN0_Pos)
+#define AC_INTFLAG_WIN_Pos          4            /**< \brief (AC_INTFLAG) Window x */
+#define AC_INTFLAG_WIN_Msk          (0x1u << AC_INTFLAG_WIN_Pos)
+#define AC_INTFLAG_WIN(value)       ((AC_INTFLAG_WIN_Msk & ((value) << AC_INTFLAG_WIN_Pos)))
+#define AC_INTFLAG_MASK             0x13u        /**< \brief (AC_INTFLAG) MASK Register */
+
+/* -------- AC_STATUSA : (AC Offset: 0x08) (R/   8) Status A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  STATE0:1;         /*!< bit:      0  Comparator 0 Current State         */
+    uint8_t  STATE1:1;         /*!< bit:      1  Comparator 1 Current State         */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  WSTATE0:2;        /*!< bit:  4.. 5  Window 0 Current State             */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  STATE:2;          /*!< bit:  0.. 1  Comparator x Current State         */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_STATUSA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_STATUSA_OFFSET           0x08         /**< \brief (AC_STATUSA offset) Status A */
+#define AC_STATUSA_RESETVALUE       0x00         /**< \brief (AC_STATUSA reset_value) Status A */
+
+#define AC_STATUSA_STATE0_Pos       0            /**< \brief (AC_STATUSA) Comparator 0 Current State */
+#define AC_STATUSA_STATE0           (1 << AC_STATUSA_STATE0_Pos)
+#define AC_STATUSA_STATE1_Pos       1            /**< \brief (AC_STATUSA) Comparator 1 Current State */
+#define AC_STATUSA_STATE1           (1 << AC_STATUSA_STATE1_Pos)
+#define AC_STATUSA_STATE_Pos        0            /**< \brief (AC_STATUSA) Comparator x Current State */
+#define AC_STATUSA_STATE_Msk        (0x3u << AC_STATUSA_STATE_Pos)
+#define AC_STATUSA_STATE(value)     ((AC_STATUSA_STATE_Msk & ((value) << AC_STATUSA_STATE_Pos)))
+#define AC_STATUSA_WSTATE0_Pos      4            /**< \brief (AC_STATUSA) Window 0 Current State */
+#define AC_STATUSA_WSTATE0_Msk      (0x3u << AC_STATUSA_WSTATE0_Pos)
+#define AC_STATUSA_WSTATE0(value)   ((AC_STATUSA_WSTATE0_Msk & ((value) << AC_STATUSA_WSTATE0_Pos)))
+#define   AC_STATUSA_WSTATE0_ABOVE_Val    0x0u   /**< \brief (AC_STATUSA) Signal is above window */
+#define   AC_STATUSA_WSTATE0_INSIDE_Val   0x1u   /**< \brief (AC_STATUSA) Signal is inside window */
+#define   AC_STATUSA_WSTATE0_BELOW_Val    0x2u   /**< \brief (AC_STATUSA) Signal is below window */
+#define AC_STATUSA_WSTATE0_ABOVE    (AC_STATUSA_WSTATE0_ABOVE_Val  << AC_STATUSA_WSTATE0_Pos)
+#define AC_STATUSA_WSTATE0_INSIDE   (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos)
+#define AC_STATUSA_WSTATE0_BELOW    (AC_STATUSA_WSTATE0_BELOW_Val  << AC_STATUSA_WSTATE0_Pos)
+#define AC_STATUSA_MASK             0x33u        /**< \brief (AC_STATUSA) MASK Register */
+
+/* -------- AC_STATUSB : (AC Offset: 0x09) (R/   8) Status B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  READY0:1;         /*!< bit:      0  Comparator 0 Ready                 */
+    uint8_t  READY1:1;         /*!< bit:      1  Comparator 1 Ready                 */
+    uint8_t  :5;               /*!< bit:  2.. 6  Reserved                           */
+    uint8_t  SYNCBUSY:1;       /*!< bit:      7  Synchronization Busy               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  READY:2;          /*!< bit:  0.. 1  Comparator x Ready                 */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_STATUSB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_STATUSB_OFFSET           0x09         /**< \brief (AC_STATUSB offset) Status B */
+#define AC_STATUSB_RESETVALUE       0x00         /**< \brief (AC_STATUSB reset_value) Status B */
+
+#define AC_STATUSB_READY0_Pos       0            /**< \brief (AC_STATUSB) Comparator 0 Ready */
+#define AC_STATUSB_READY0           (1 << AC_STATUSB_READY0_Pos)
+#define AC_STATUSB_READY1_Pos       1            /**< \brief (AC_STATUSB) Comparator 1 Ready */
+#define AC_STATUSB_READY1           (1 << AC_STATUSB_READY1_Pos)
+#define AC_STATUSB_READY_Pos        0            /**< \brief (AC_STATUSB) Comparator x Ready */
+#define AC_STATUSB_READY_Msk        (0x3u << AC_STATUSB_READY_Pos)
+#define AC_STATUSB_READY(value)     ((AC_STATUSB_READY_Msk & ((value) << AC_STATUSB_READY_Pos)))
+#define AC_STATUSB_SYNCBUSY_Pos     7            /**< \brief (AC_STATUSB) Synchronization Busy */
+#define AC_STATUSB_SYNCBUSY         (0x1u << AC_STATUSB_SYNCBUSY_Pos)
+#define AC_STATUSB_MASK             0x83u        /**< \brief (AC_STATUSB) MASK Register */
+
+/* -------- AC_STATUSC : (AC Offset: 0x0A) (R/   8) Status C -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  STATE0:1;         /*!< bit:      0  Comparator 0 Current State         */
+    uint8_t  STATE1:1;         /*!< bit:      1  Comparator 1 Current State         */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  WSTATE0:2;        /*!< bit:  4.. 5  Window 0 Current State             */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  STATE:2;          /*!< bit:  0.. 1  Comparator x Current State         */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_STATUSC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_STATUSC_OFFSET           0x0A         /**< \brief (AC_STATUSC offset) Status C */
+#define AC_STATUSC_RESETVALUE       0x00         /**< \brief (AC_STATUSC reset_value) Status C */
+
+#define AC_STATUSC_STATE0_Pos       0            /**< \brief (AC_STATUSC) Comparator 0 Current State */
+#define AC_STATUSC_STATE0           (1 << AC_STATUSC_STATE0_Pos)
+#define AC_STATUSC_STATE1_Pos       1            /**< \brief (AC_STATUSC) Comparator 1 Current State */
+#define AC_STATUSC_STATE1           (1 << AC_STATUSC_STATE1_Pos)
+#define AC_STATUSC_STATE_Pos        0            /**< \brief (AC_STATUSC) Comparator x Current State */
+#define AC_STATUSC_STATE_Msk        (0x3u << AC_STATUSC_STATE_Pos)
+#define AC_STATUSC_STATE(value)     ((AC_STATUSC_STATE_Msk & ((value) << AC_STATUSC_STATE_Pos)))
+#define AC_STATUSC_WSTATE0_Pos      4            /**< \brief (AC_STATUSC) Window 0 Current State */
+#define AC_STATUSC_WSTATE0_Msk      (0x3u << AC_STATUSC_WSTATE0_Pos)
+#define AC_STATUSC_WSTATE0(value)   ((AC_STATUSC_WSTATE0_Msk & ((value) << AC_STATUSC_WSTATE0_Pos)))
+#define   AC_STATUSC_WSTATE0_ABOVE_Val    0x0u   /**< \brief (AC_STATUSC) Signal is above window */
+#define   AC_STATUSC_WSTATE0_INSIDE_Val   0x1u   /**< \brief (AC_STATUSC) Signal is inside window */
+#define   AC_STATUSC_WSTATE0_BELOW_Val    0x2u   /**< \brief (AC_STATUSC) Signal is below window */
+#define AC_STATUSC_WSTATE0_ABOVE    (AC_STATUSC_WSTATE0_ABOVE_Val  << AC_STATUSC_WSTATE0_Pos)
+#define AC_STATUSC_WSTATE0_INSIDE   (AC_STATUSC_WSTATE0_INSIDE_Val << AC_STATUSC_WSTATE0_Pos)
+#define AC_STATUSC_WSTATE0_BELOW    (AC_STATUSC_WSTATE0_BELOW_Val  << AC_STATUSC_WSTATE0_Pos)
+#define AC_STATUSC_MASK             0x33u        /**< \brief (AC_STATUSC) MASK Register */
+
+/* -------- AC_WINCTRL : (AC Offset: 0x0C) (R/W  8) Window Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  WEN0:1;           /*!< bit:      0  Window 0 Mode Enable               */
+    uint8_t  WINTSEL0:2;       /*!< bit:  1.. 2  Window 0 Interrupt Selection       */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_WINCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_WINCTRL_OFFSET           0x0C         /**< \brief (AC_WINCTRL offset) Window Control */
+#define AC_WINCTRL_RESETVALUE       0x00         /**< \brief (AC_WINCTRL reset_value) Window Control */
+
+#define AC_WINCTRL_WEN0_Pos         0            /**< \brief (AC_WINCTRL) Window 0 Mode Enable */
+#define AC_WINCTRL_WEN0             (0x1u << AC_WINCTRL_WEN0_Pos)
+#define AC_WINCTRL_WINTSEL0_Pos     1            /**< \brief (AC_WINCTRL) Window 0 Interrupt Selection */
+#define AC_WINCTRL_WINTSEL0_Msk     (0x3u << AC_WINCTRL_WINTSEL0_Pos)
+#define AC_WINCTRL_WINTSEL0(value)  ((AC_WINCTRL_WINTSEL0_Msk & ((value) << AC_WINCTRL_WINTSEL0_Pos)))
+#define   AC_WINCTRL_WINTSEL0_ABOVE_Val   0x0u   /**< \brief (AC_WINCTRL) Interrupt on signal above window */
+#define   AC_WINCTRL_WINTSEL0_INSIDE_Val  0x1u   /**< \brief (AC_WINCTRL) Interrupt on signal inside window */
+#define   AC_WINCTRL_WINTSEL0_BELOW_Val   0x2u   /**< \brief (AC_WINCTRL) Interrupt on signal below window */
+#define   AC_WINCTRL_WINTSEL0_OUTSIDE_Val 0x3u   /**< \brief (AC_WINCTRL) Interrupt on signal outside window */
+#define AC_WINCTRL_WINTSEL0_ABOVE   (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos)
+#define AC_WINCTRL_WINTSEL0_INSIDE  (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos)
+#define AC_WINCTRL_WINTSEL0_BELOW   (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos)
+#define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos)
+#define AC_WINCTRL_MASK             0x07u        /**< \brief (AC_WINCTRL) MASK Register */
+
+/* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t ENABLE:1;         /*!< bit:      0  Enable                             */
+    uint32_t SINGLE:1;         /*!< bit:      1  Single-Shot Mode                   */
+    uint32_t SPEED:2;          /*!< bit:  2.. 3  Speed Selection                    */
+    uint32_t :1;               /*!< bit:      4  Reserved                           */
+    uint32_t INTSEL:2;         /*!< bit:  5.. 6  Interrupt Selection                */
+    uint32_t :1;               /*!< bit:      7  Reserved                           */
+    uint32_t MUXNEG:3;         /*!< bit:  8..10  Negative Input Mux Selection       */
+    uint32_t :1;               /*!< bit:     11  Reserved                           */
+    uint32_t MUXPOS:2;         /*!< bit: 12..13  Positive Input Mux Selection       */
+    uint32_t :1;               /*!< bit:     14  Reserved                           */
+    uint32_t SWAP:1;           /*!< bit:     15  Swap Inputs and Invert             */
+    uint32_t OUT:2;            /*!< bit: 16..17  Output                             */
+    uint32_t :1;               /*!< bit:     18  Reserved                           */
+    uint32_t HYST:1;           /*!< bit:     19  Hysteresis Enable                  */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t FLEN:3;           /*!< bit: 24..26  Filter Length                      */
+    uint32_t :5;               /*!< bit: 27..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} AC_COMPCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_COMPCTRL_OFFSET          0x10         /**< \brief (AC_COMPCTRL offset) Comparator Control n */
+#define AC_COMPCTRL_RESETVALUE      0x00000000   /**< \brief (AC_COMPCTRL reset_value) Comparator Control n */
+
+#define AC_COMPCTRL_ENABLE_Pos      0            /**< \brief (AC_COMPCTRL) Enable */
+#define AC_COMPCTRL_ENABLE          (0x1u << AC_COMPCTRL_ENABLE_Pos)
+#define AC_COMPCTRL_SINGLE_Pos      1            /**< \brief (AC_COMPCTRL) Single-Shot Mode */
+#define AC_COMPCTRL_SINGLE          (0x1u << AC_COMPCTRL_SINGLE_Pos)
+#define AC_COMPCTRL_SPEED_Pos       2            /**< \brief (AC_COMPCTRL) Speed Selection */
+#define AC_COMPCTRL_SPEED_Msk       (0x3u << AC_COMPCTRL_SPEED_Pos)
+#define AC_COMPCTRL_SPEED(value)    ((AC_COMPCTRL_SPEED_Msk & ((value) << AC_COMPCTRL_SPEED_Pos)))
+#define   AC_COMPCTRL_SPEED_LOW_Val       0x0u   /**< \brief (AC_COMPCTRL) Low speed */
+#define   AC_COMPCTRL_SPEED_HIGH_Val      0x1u   /**< \brief (AC_COMPCTRL) High speed */
+#define AC_COMPCTRL_SPEED_LOW       (AC_COMPCTRL_SPEED_LOW_Val     << AC_COMPCTRL_SPEED_Pos)
+#define AC_COMPCTRL_SPEED_HIGH      (AC_COMPCTRL_SPEED_HIGH_Val    << AC_COMPCTRL_SPEED_Pos)
+#define AC_COMPCTRL_INTSEL_Pos      5            /**< \brief (AC_COMPCTRL) Interrupt Selection */
+#define AC_COMPCTRL_INTSEL_Msk      (0x3u << AC_COMPCTRL_INTSEL_Pos)
+#define AC_COMPCTRL_INTSEL(value)   ((AC_COMPCTRL_INTSEL_Msk & ((value) << AC_COMPCTRL_INTSEL_Pos)))
+#define   AC_COMPCTRL_INTSEL_TOGGLE_Val   0x0u   /**< \brief (AC_COMPCTRL) Interrupt on comparator output toggle */
+#define   AC_COMPCTRL_INTSEL_RISING_Val   0x1u   /**< \brief (AC_COMPCTRL) Interrupt on comparator output rising */
+#define   AC_COMPCTRL_INTSEL_FALLING_Val  0x2u   /**< \brief (AC_COMPCTRL) Interrupt on comparator output falling */
+#define   AC_COMPCTRL_INTSEL_EOC_Val      0x3u   /**< \brief (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */
+#define AC_COMPCTRL_INTSEL_TOGGLE   (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos)
+#define AC_COMPCTRL_INTSEL_RISING   (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos)
+#define AC_COMPCTRL_INTSEL_FALLING  (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos)
+#define AC_COMPCTRL_INTSEL_EOC      (AC_COMPCTRL_INTSEL_EOC_Val    << AC_COMPCTRL_INTSEL_Pos)
+#define AC_COMPCTRL_MUXNEG_Pos      8            /**< \brief (AC_COMPCTRL) Negative Input Mux Selection */
+#define AC_COMPCTRL_MUXNEG_Msk      (0x7u << AC_COMPCTRL_MUXNEG_Pos)
+#define AC_COMPCTRL_MUXNEG(value)   ((AC_COMPCTRL_MUXNEG_Msk & ((value) << AC_COMPCTRL_MUXNEG_Pos)))
+#define   AC_COMPCTRL_MUXNEG_PIN0_Val     0x0u   /**< \brief (AC_COMPCTRL) I/O pin 0 */
+#define   AC_COMPCTRL_MUXNEG_PIN1_Val     0x1u   /**< \brief (AC_COMPCTRL) I/O pin 1 */
+#define   AC_COMPCTRL_MUXNEG_PIN2_Val     0x2u   /**< \brief (AC_COMPCTRL) I/O pin 2 */
+#define   AC_COMPCTRL_MUXNEG_PIN3_Val     0x3u   /**< \brief (AC_COMPCTRL) I/O pin 3 */
+#define   AC_COMPCTRL_MUXNEG_GND_Val      0x4u   /**< \brief (AC_COMPCTRL) Ground */
+#define   AC_COMPCTRL_MUXNEG_VSCALE_Val   0x5u   /**< \brief (AC_COMPCTRL) VDD scaler */
+#define   AC_COMPCTRL_MUXNEG_BANDGAP_Val  0x6u   /**< \brief (AC_COMPCTRL) Internal bandgap voltage */
+#define   AC_COMPCTRL_MUXNEG_DAC_Val      0x7u   /**< \brief (AC_COMPCTRL) DAC output */
+#define AC_COMPCTRL_MUXNEG_PIN0     (AC_COMPCTRL_MUXNEG_PIN0_Val   << AC_COMPCTRL_MUXNEG_Pos)
+#define AC_COMPCTRL_MUXNEG_PIN1     (AC_COMPCTRL_MUXNEG_PIN1_Val   << AC_COMPCTRL_MUXNEG_Pos)
+#define AC_COMPCTRL_MUXNEG_PIN2     (AC_COMPCTRL_MUXNEG_PIN2_Val   << AC_COMPCTRL_MUXNEG_Pos)
+#define AC_COMPCTRL_MUXNEG_PIN3     (AC_COMPCTRL_MUXNEG_PIN3_Val   << AC_COMPCTRL_MUXNEG_Pos)
+#define AC_COMPCTRL_MUXNEG_GND      (AC_COMPCTRL_MUXNEG_GND_Val    << AC_COMPCTRL_MUXNEG_Pos)
+#define AC_COMPCTRL_MUXNEG_VSCALE   (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos)
+#define AC_COMPCTRL_MUXNEG_BANDGAP  (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos)
+#define AC_COMPCTRL_MUXNEG_DAC      (AC_COMPCTRL_MUXNEG_DAC_Val    << AC_COMPCTRL_MUXNEG_Pos)
+#define AC_COMPCTRL_MUXPOS_Pos      12           /**< \brief (AC_COMPCTRL) Positive Input Mux Selection */
+#define AC_COMPCTRL_MUXPOS_Msk      (0x3u << AC_COMPCTRL_MUXPOS_Pos)
+#define AC_COMPCTRL_MUXPOS(value)   ((AC_COMPCTRL_MUXPOS_Msk & ((value) << AC_COMPCTRL_MUXPOS_Pos)))
+#define   AC_COMPCTRL_MUXPOS_PIN0_Val     0x0u   /**< \brief (AC_COMPCTRL) I/O pin 0 */
+#define   AC_COMPCTRL_MUXPOS_PIN1_Val     0x1u   /**< \brief (AC_COMPCTRL) I/O pin 1 */
+#define   AC_COMPCTRL_MUXPOS_PIN2_Val     0x2u   /**< \brief (AC_COMPCTRL) I/O pin 2 */
+#define   AC_COMPCTRL_MUXPOS_PIN3_Val     0x3u   /**< \brief (AC_COMPCTRL) I/O pin 3 */
+#define AC_COMPCTRL_MUXPOS_PIN0     (AC_COMPCTRL_MUXPOS_PIN0_Val   << AC_COMPCTRL_MUXPOS_Pos)
+#define AC_COMPCTRL_MUXPOS_PIN1     (AC_COMPCTRL_MUXPOS_PIN1_Val   << AC_COMPCTRL_MUXPOS_Pos)
+#define AC_COMPCTRL_MUXPOS_PIN2     (AC_COMPCTRL_MUXPOS_PIN2_Val   << AC_COMPCTRL_MUXPOS_Pos)
+#define AC_COMPCTRL_MUXPOS_PIN3     (AC_COMPCTRL_MUXPOS_PIN3_Val   << AC_COMPCTRL_MUXPOS_Pos)
+#define AC_COMPCTRL_SWAP_Pos        15           /**< \brief (AC_COMPCTRL) Swap Inputs and Invert */
+#define AC_COMPCTRL_SWAP            (0x1u << AC_COMPCTRL_SWAP_Pos)
+#define AC_COMPCTRL_OUT_Pos         16           /**< \brief (AC_COMPCTRL) Output */
+#define AC_COMPCTRL_OUT_Msk         (0x3u << AC_COMPCTRL_OUT_Pos)
+#define AC_COMPCTRL_OUT(value)      ((AC_COMPCTRL_OUT_Msk & ((value) << AC_COMPCTRL_OUT_Pos)))
+#define   AC_COMPCTRL_OUT_OFF_Val         0x0u   /**< \brief (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */
+#define   AC_COMPCTRL_OUT_ASYNC_Val       0x1u   /**< \brief (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */
+#define   AC_COMPCTRL_OUT_SYNC_Val        0x2u   /**< \brief (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */
+#define AC_COMPCTRL_OUT_OFF         (AC_COMPCTRL_OUT_OFF_Val       << AC_COMPCTRL_OUT_Pos)
+#define AC_COMPCTRL_OUT_ASYNC       (AC_COMPCTRL_OUT_ASYNC_Val     << AC_COMPCTRL_OUT_Pos)
+#define AC_COMPCTRL_OUT_SYNC        (AC_COMPCTRL_OUT_SYNC_Val      << AC_COMPCTRL_OUT_Pos)
+#define AC_COMPCTRL_HYST_Pos        19           /**< \brief (AC_COMPCTRL) Hysteresis Enable */
+#define AC_COMPCTRL_HYST            (0x1u << AC_COMPCTRL_HYST_Pos)
+#define AC_COMPCTRL_FLEN_Pos        24           /**< \brief (AC_COMPCTRL) Filter Length */
+#define AC_COMPCTRL_FLEN_Msk        (0x7u << AC_COMPCTRL_FLEN_Pos)
+#define AC_COMPCTRL_FLEN(value)     ((AC_COMPCTRL_FLEN_Msk & ((value) << AC_COMPCTRL_FLEN_Pos)))
+#define   AC_COMPCTRL_FLEN_OFF_Val        0x0u   /**< \brief (AC_COMPCTRL) No filtering */
+#define   AC_COMPCTRL_FLEN_MAJ3_Val       0x1u   /**< \brief (AC_COMPCTRL) 3-bit majority function (2 of 3) */
+#define   AC_COMPCTRL_FLEN_MAJ5_Val       0x2u   /**< \brief (AC_COMPCTRL) 5-bit majority function (3 of 5) */
+#define AC_COMPCTRL_FLEN_OFF        (AC_COMPCTRL_FLEN_OFF_Val      << AC_COMPCTRL_FLEN_Pos)
+#define AC_COMPCTRL_FLEN_MAJ3       (AC_COMPCTRL_FLEN_MAJ3_Val     << AC_COMPCTRL_FLEN_Pos)
+#define AC_COMPCTRL_FLEN_MAJ5       (AC_COMPCTRL_FLEN_MAJ5_Val     << AC_COMPCTRL_FLEN_Pos)
+#define AC_COMPCTRL_MASK            0x070BB76Fu  /**< \brief (AC_COMPCTRL) MASK Register */
+
+/* -------- AC_SCALER : (AC Offset: 0x20) (R/W  8) Scaler n -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  VALUE:6;          /*!< bit:  0.. 5  Scaler Value                       */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} AC_SCALER_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define AC_SCALER_OFFSET            0x20         /**< \brief (AC_SCALER offset) Scaler n */
+#define AC_SCALER_RESETVALUE        0x00         /**< \brief (AC_SCALER reset_value) Scaler n */
+
+#define AC_SCALER_VALUE_Pos         0            /**< \brief (AC_SCALER) Scaler Value */
+#define AC_SCALER_VALUE_Msk         (0x3Fu << AC_SCALER_VALUE_Pos)
+#define AC_SCALER_VALUE(value)      ((AC_SCALER_VALUE_Msk & ((value) << AC_SCALER_VALUE_Pos)))
+#define AC_SCALER_MASK              0x3Fu        /**< \brief (AC_SCALER) MASK Register */
+
+/** \brief AC hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO AC_CTRLA_Type             CTRLA;       /**< \brief Offset: 0x00 (R/W  8) Control A */
+  __O  AC_CTRLB_Type             CTRLB;       /**< \brief Offset: 0x01 ( /W  8) Control B */
+  __IO AC_EVCTRL_Type            EVCTRL;      /**< \brief Offset: 0x02 (R/W 16) Event Control */
+  __IO AC_INTENCLR_Type          INTENCLR;    /**< \brief Offset: 0x04 (R/W  8) Interrupt Enable Clear */
+  __IO AC_INTENSET_Type          INTENSET;    /**< \brief Offset: 0x05 (R/W  8) Interrupt Enable Set */
+  __IO AC_INTFLAG_Type           INTFLAG;     /**< \brief Offset: 0x06 (R/W  8) Interrupt Flag Status and Clear */
+       RoReg8                    Reserved1[0x1];
+  __I  AC_STATUSA_Type           STATUSA;     /**< \brief Offset: 0x08 (R/   8) Status A */
+  __I  AC_STATUSB_Type           STATUSB;     /**< \brief Offset: 0x09 (R/   8) Status B */
+  __I  AC_STATUSC_Type           STATUSC;     /**< \brief Offset: 0x0A (R/   8) Status C */
+       RoReg8                    Reserved2[0x1];
+  __IO AC_WINCTRL_Type           WINCTRL;     /**< \brief Offset: 0x0C (R/W  8) Window Control */
+       RoReg8                    Reserved3[0x3];
+  __IO AC_COMPCTRL_Type          COMPCTRL[2]; /**< \brief Offset: 0x10 (R/W 32) Comparator Control n */
+       RoReg8                    Reserved4[0x8];
+  __IO AC_SCALER_Type            SCALER[2];   /**< \brief Offset: 0x20 (R/W  8) Scaler n */
+} Ac;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_AC_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/adc.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/adc.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/adc.h	(revision 136)
@@ -0,0 +1,699 @@
+/**
+ * \file
+ *
+ * \brief Component description for ADC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_ADC_COMPONENT_
+#define _SAMD21_ADC_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR ADC */
+/* ========================================================================== */
+/** \addtogroup SAMD21_ADC Analog Digital Converter */
+/*@{*/
+
+#define ADC_U2204
+#define REV_ADC                     0x120
+
+/* -------- ADC_CTRLA : (ADC Offset: 0x00) (R/W  8) Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint8_t  RUNSTDBY:1;       /*!< bit:      2  Run in Standby                     */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_CTRLA_OFFSET            0x00         /**< \brief (ADC_CTRLA offset) Control A */
+#define ADC_CTRLA_RESETVALUE        0x00         /**< \brief (ADC_CTRLA reset_value) Control A */
+
+#define ADC_CTRLA_SWRST_Pos         0            /**< \brief (ADC_CTRLA) Software Reset */
+#define ADC_CTRLA_SWRST             (0x1u << ADC_CTRLA_SWRST_Pos)
+#define ADC_CTRLA_ENABLE_Pos        1            /**< \brief (ADC_CTRLA) Enable */
+#define ADC_CTRLA_ENABLE            (0x1u << ADC_CTRLA_ENABLE_Pos)
+#define ADC_CTRLA_RUNSTDBY_Pos      2            /**< \brief (ADC_CTRLA) Run in Standby */
+#define ADC_CTRLA_RUNSTDBY          (0x1u << ADC_CTRLA_RUNSTDBY_Pos)
+#define ADC_CTRLA_MASK              0x07u        /**< \brief (ADC_CTRLA) MASK Register */
+
+/* -------- ADC_REFCTRL : (ADC Offset: 0x01) (R/W  8) Reference Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  REFSEL:4;         /*!< bit:  0.. 3  Reference Selection                */
+    uint8_t  :3;               /*!< bit:  4.. 6  Reserved                           */
+    uint8_t  REFCOMP:1;        /*!< bit:      7  Reference Buffer Offset Compensation Enable */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_REFCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_REFCTRL_OFFSET          0x01         /**< \brief (ADC_REFCTRL offset) Reference Control */
+#define ADC_REFCTRL_RESETVALUE      0x00         /**< \brief (ADC_REFCTRL reset_value) Reference Control */
+
+#define ADC_REFCTRL_REFSEL_Pos      0            /**< \brief (ADC_REFCTRL) Reference Selection */
+#define ADC_REFCTRL_REFSEL_Msk      (0xFu << ADC_REFCTRL_REFSEL_Pos)
+#define ADC_REFCTRL_REFSEL(value)   ((ADC_REFCTRL_REFSEL_Msk & ((value) << ADC_REFCTRL_REFSEL_Pos)))
+#define   ADC_REFCTRL_REFSEL_INT1V_Val    0x0u   /**< \brief (ADC_REFCTRL) 1.0V voltage reference */
+#define   ADC_REFCTRL_REFSEL_INTVCC0_Val  0x1u   /**< \brief (ADC_REFCTRL) 1/1.48 VDDANA */
+#define   ADC_REFCTRL_REFSEL_INTVCC1_Val  0x2u   /**< \brief (ADC_REFCTRL) 1/2 VDDANA (only for VDDANA > 2.0V) */
+#define   ADC_REFCTRL_REFSEL_AREFA_Val    0x3u   /**< \brief (ADC_REFCTRL) External reference */
+#define   ADC_REFCTRL_REFSEL_AREFB_Val    0x4u   /**< \brief (ADC_REFCTRL) External reference */
+#define ADC_REFCTRL_REFSEL_INT1V    (ADC_REFCTRL_REFSEL_INT1V_Val  << ADC_REFCTRL_REFSEL_Pos)
+#define ADC_REFCTRL_REFSEL_INTVCC0  (ADC_REFCTRL_REFSEL_INTVCC0_Val << ADC_REFCTRL_REFSEL_Pos)
+#define ADC_REFCTRL_REFSEL_INTVCC1  (ADC_REFCTRL_REFSEL_INTVCC1_Val << ADC_REFCTRL_REFSEL_Pos)
+#define ADC_REFCTRL_REFSEL_AREFA    (ADC_REFCTRL_REFSEL_AREFA_Val  << ADC_REFCTRL_REFSEL_Pos)
+#define ADC_REFCTRL_REFSEL_AREFB    (ADC_REFCTRL_REFSEL_AREFB_Val  << ADC_REFCTRL_REFSEL_Pos)
+#define ADC_REFCTRL_REFCOMP_Pos     7            /**< \brief (ADC_REFCTRL) Reference Buffer Offset Compensation Enable */
+#define ADC_REFCTRL_REFCOMP         (0x1u << ADC_REFCTRL_REFCOMP_Pos)
+#define ADC_REFCTRL_MASK            0x8Fu        /**< \brief (ADC_REFCTRL) MASK Register */
+
+/* -------- ADC_AVGCTRL : (ADC Offset: 0x02) (R/W  8) Average Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SAMPLENUM:4;      /*!< bit:  0.. 3  Number of Samples to be Collected  */
+    uint8_t  ADJRES:3;         /*!< bit:  4.. 6  Adjusting Result / Division Coefficient */
+    uint8_t  :1;               /*!< bit:      7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_AVGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_AVGCTRL_OFFSET          0x02         /**< \brief (ADC_AVGCTRL offset) Average Control */
+#define ADC_AVGCTRL_RESETVALUE      0x00         /**< \brief (ADC_AVGCTRL reset_value) Average Control */
+
+#define ADC_AVGCTRL_SAMPLENUM_Pos   0            /**< \brief (ADC_AVGCTRL) Number of Samples to be Collected */
+#define ADC_AVGCTRL_SAMPLENUM_Msk   (0xFu << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM(value) ((ADC_AVGCTRL_SAMPLENUM_Msk & ((value) << ADC_AVGCTRL_SAMPLENUM_Pos)))
+#define   ADC_AVGCTRL_SAMPLENUM_1_Val     0x0u   /**< \brief (ADC_AVGCTRL) 1 sample */
+#define   ADC_AVGCTRL_SAMPLENUM_2_Val     0x1u   /**< \brief (ADC_AVGCTRL) 2 samples */
+#define   ADC_AVGCTRL_SAMPLENUM_4_Val     0x2u   /**< \brief (ADC_AVGCTRL) 4 samples */
+#define   ADC_AVGCTRL_SAMPLENUM_8_Val     0x3u   /**< \brief (ADC_AVGCTRL) 8 samples */
+#define   ADC_AVGCTRL_SAMPLENUM_16_Val    0x4u   /**< \brief (ADC_AVGCTRL) 16 samples */
+#define   ADC_AVGCTRL_SAMPLENUM_32_Val    0x5u   /**< \brief (ADC_AVGCTRL) 32 samples */
+#define   ADC_AVGCTRL_SAMPLENUM_64_Val    0x6u   /**< \brief (ADC_AVGCTRL) 64 samples */
+#define   ADC_AVGCTRL_SAMPLENUM_128_Val   0x7u   /**< \brief (ADC_AVGCTRL) 128 samples */
+#define   ADC_AVGCTRL_SAMPLENUM_256_Val   0x8u   /**< \brief (ADC_AVGCTRL) 256 samples */
+#define   ADC_AVGCTRL_SAMPLENUM_512_Val   0x9u   /**< \brief (ADC_AVGCTRL) 512 samples */
+#define   ADC_AVGCTRL_SAMPLENUM_1024_Val  0xAu   /**< \brief (ADC_AVGCTRL) 1024 samples */
+#define ADC_AVGCTRL_SAMPLENUM_1     (ADC_AVGCTRL_SAMPLENUM_1_Val   << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_2     (ADC_AVGCTRL_SAMPLENUM_2_Val   << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_4     (ADC_AVGCTRL_SAMPLENUM_4_Val   << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_8     (ADC_AVGCTRL_SAMPLENUM_8_Val   << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_16    (ADC_AVGCTRL_SAMPLENUM_16_Val  << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_32    (ADC_AVGCTRL_SAMPLENUM_32_Val  << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_64    (ADC_AVGCTRL_SAMPLENUM_64_Val  << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_128   (ADC_AVGCTRL_SAMPLENUM_128_Val << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_256   (ADC_AVGCTRL_SAMPLENUM_256_Val << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_512   (ADC_AVGCTRL_SAMPLENUM_512_Val << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_SAMPLENUM_1024  (ADC_AVGCTRL_SAMPLENUM_1024_Val << ADC_AVGCTRL_SAMPLENUM_Pos)
+#define ADC_AVGCTRL_ADJRES_Pos      4            /**< \brief (ADC_AVGCTRL) Adjusting Result / Division Coefficient */
+#define ADC_AVGCTRL_ADJRES_Msk      (0x7u << ADC_AVGCTRL_ADJRES_Pos)
+#define ADC_AVGCTRL_ADJRES(value)   ((ADC_AVGCTRL_ADJRES_Msk & ((value) << ADC_AVGCTRL_ADJRES_Pos)))
+#define ADC_AVGCTRL_MASK            0x7Fu        /**< \brief (ADC_AVGCTRL) MASK Register */
+
+/* -------- ADC_SAMPCTRL : (ADC Offset: 0x03) (R/W  8) Sampling Time Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SAMPLEN:6;        /*!< bit:  0.. 5  Sampling Time Length               */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_SAMPCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_SAMPCTRL_OFFSET         0x03         /**< \brief (ADC_SAMPCTRL offset) Sampling Time Control */
+#define ADC_SAMPCTRL_RESETVALUE     0x00         /**< \brief (ADC_SAMPCTRL reset_value) Sampling Time Control */
+
+#define ADC_SAMPCTRL_SAMPLEN_Pos    0            /**< \brief (ADC_SAMPCTRL) Sampling Time Length */
+#define ADC_SAMPCTRL_SAMPLEN_Msk    (0x3Fu << ADC_SAMPCTRL_SAMPLEN_Pos)
+#define ADC_SAMPCTRL_SAMPLEN(value) ((ADC_SAMPCTRL_SAMPLEN_Msk & ((value) << ADC_SAMPCTRL_SAMPLEN_Pos)))
+#define ADC_SAMPCTRL_MASK           0x3Fu        /**< \brief (ADC_SAMPCTRL) MASK Register */
+
+/* -------- ADC_CTRLB : (ADC Offset: 0x04) (R/W 16) Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t DIFFMODE:1;       /*!< bit:      0  Differential Mode                  */
+    uint16_t LEFTADJ:1;        /*!< bit:      1  Left-Adjusted Result               */
+    uint16_t FREERUN:1;        /*!< bit:      2  Free Running Mode                  */
+    uint16_t CORREN:1;         /*!< bit:      3  Digital Correction Logic Enabled   */
+    uint16_t RESSEL:2;         /*!< bit:  4.. 5  Conversion Result Resolution       */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t PRESCALER:3;      /*!< bit:  8..10  Prescaler Configuration            */
+    uint16_t :5;               /*!< bit: 11..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} ADC_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_CTRLB_OFFSET            0x04         /**< \brief (ADC_CTRLB offset) Control B */
+#define ADC_CTRLB_RESETVALUE        0x0000       /**< \brief (ADC_CTRLB reset_value) Control B */
+
+#define ADC_CTRLB_DIFFMODE_Pos      0            /**< \brief (ADC_CTRLB) Differential Mode */
+#define ADC_CTRLB_DIFFMODE          (0x1u << ADC_CTRLB_DIFFMODE_Pos)
+#define ADC_CTRLB_LEFTADJ_Pos       1            /**< \brief (ADC_CTRLB) Left-Adjusted Result */
+#define ADC_CTRLB_LEFTADJ           (0x1u << ADC_CTRLB_LEFTADJ_Pos)
+#define ADC_CTRLB_FREERUN_Pos       2            /**< \brief (ADC_CTRLB) Free Running Mode */
+#define ADC_CTRLB_FREERUN           (0x1u << ADC_CTRLB_FREERUN_Pos)
+#define ADC_CTRLB_CORREN_Pos        3            /**< \brief (ADC_CTRLB) Digital Correction Logic Enabled */
+#define ADC_CTRLB_CORREN            (0x1u << ADC_CTRLB_CORREN_Pos)
+#define ADC_CTRLB_RESSEL_Pos        4            /**< \brief (ADC_CTRLB) Conversion Result Resolution */
+#define ADC_CTRLB_RESSEL_Msk        (0x3u << ADC_CTRLB_RESSEL_Pos)
+#define ADC_CTRLB_RESSEL(value)     ((ADC_CTRLB_RESSEL_Msk & ((value) << ADC_CTRLB_RESSEL_Pos)))
+#define   ADC_CTRLB_RESSEL_12BIT_Val      0x0u   /**< \brief (ADC_CTRLB) 12-bit result */
+#define   ADC_CTRLB_RESSEL_16BIT_Val      0x1u   /**< \brief (ADC_CTRLB) For averaging mode output */
+#define   ADC_CTRLB_RESSEL_10BIT_Val      0x2u   /**< \brief (ADC_CTRLB) 10-bit result */
+#define   ADC_CTRLB_RESSEL_8BIT_Val       0x3u   /**< \brief (ADC_CTRLB) 8-bit result */
+#define ADC_CTRLB_RESSEL_12BIT      (ADC_CTRLB_RESSEL_12BIT_Val    << ADC_CTRLB_RESSEL_Pos)
+#define ADC_CTRLB_RESSEL_16BIT      (ADC_CTRLB_RESSEL_16BIT_Val    << ADC_CTRLB_RESSEL_Pos)
+#define ADC_CTRLB_RESSEL_10BIT      (ADC_CTRLB_RESSEL_10BIT_Val    << ADC_CTRLB_RESSEL_Pos)
+#define ADC_CTRLB_RESSEL_8BIT       (ADC_CTRLB_RESSEL_8BIT_Val     << ADC_CTRLB_RESSEL_Pos)
+#define ADC_CTRLB_PRESCALER_Pos     8            /**< \brief (ADC_CTRLB) Prescaler Configuration */
+#define ADC_CTRLB_PRESCALER_Msk     (0x7u << ADC_CTRLB_PRESCALER_Pos)
+#define ADC_CTRLB_PRESCALER(value)  ((ADC_CTRLB_PRESCALER_Msk & ((value) << ADC_CTRLB_PRESCALER_Pos)))
+#define   ADC_CTRLB_PRESCALER_DIV4_Val    0x0u   /**< \brief (ADC_CTRLB) Peripheral clock divided by 4 */
+#define   ADC_CTRLB_PRESCALER_DIV8_Val    0x1u   /**< \brief (ADC_CTRLB) Peripheral clock divided by 8 */
+#define   ADC_CTRLB_PRESCALER_DIV16_Val   0x2u   /**< \brief (ADC_CTRLB) Peripheral clock divided by 16 */
+#define   ADC_CTRLB_PRESCALER_DIV32_Val   0x3u   /**< \brief (ADC_CTRLB) Peripheral clock divided by 32 */
+#define   ADC_CTRLB_PRESCALER_DIV64_Val   0x4u   /**< \brief (ADC_CTRLB) Peripheral clock divided by 64 */
+#define   ADC_CTRLB_PRESCALER_DIV128_Val  0x5u   /**< \brief (ADC_CTRLB) Peripheral clock divided by 128 */
+#define   ADC_CTRLB_PRESCALER_DIV256_Val  0x6u   /**< \brief (ADC_CTRLB) Peripheral clock divided by 256 */
+#define   ADC_CTRLB_PRESCALER_DIV512_Val  0x7u   /**< \brief (ADC_CTRLB) Peripheral clock divided by 512 */
+#define ADC_CTRLB_PRESCALER_DIV4    (ADC_CTRLB_PRESCALER_DIV4_Val  << ADC_CTRLB_PRESCALER_Pos)
+#define ADC_CTRLB_PRESCALER_DIV8    (ADC_CTRLB_PRESCALER_DIV8_Val  << ADC_CTRLB_PRESCALER_Pos)
+#define ADC_CTRLB_PRESCALER_DIV16   (ADC_CTRLB_PRESCALER_DIV16_Val << ADC_CTRLB_PRESCALER_Pos)
+#define ADC_CTRLB_PRESCALER_DIV32   (ADC_CTRLB_PRESCALER_DIV32_Val << ADC_CTRLB_PRESCALER_Pos)
+#define ADC_CTRLB_PRESCALER_DIV64   (ADC_CTRLB_PRESCALER_DIV64_Val << ADC_CTRLB_PRESCALER_Pos)
+#define ADC_CTRLB_PRESCALER_DIV128  (ADC_CTRLB_PRESCALER_DIV128_Val << ADC_CTRLB_PRESCALER_Pos)
+#define ADC_CTRLB_PRESCALER_DIV256  (ADC_CTRLB_PRESCALER_DIV256_Val << ADC_CTRLB_PRESCALER_Pos)
+#define ADC_CTRLB_PRESCALER_DIV512  (ADC_CTRLB_PRESCALER_DIV512_Val << ADC_CTRLB_PRESCALER_Pos)
+#define ADC_CTRLB_MASK              0x073Fu      /**< \brief (ADC_CTRLB) MASK Register */
+
+/* -------- ADC_WINCTRL : (ADC Offset: 0x08) (R/W  8) Window Monitor Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  WINMODE:3;        /*!< bit:  0.. 2  Window Monitor Mode                */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_WINCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_WINCTRL_OFFSET          0x08         /**< \brief (ADC_WINCTRL offset) Window Monitor Control */
+#define ADC_WINCTRL_RESETVALUE      0x00         /**< \brief (ADC_WINCTRL reset_value) Window Monitor Control */
+
+#define ADC_WINCTRL_WINMODE_Pos     0            /**< \brief (ADC_WINCTRL) Window Monitor Mode */
+#define ADC_WINCTRL_WINMODE_Msk     (0x7u << ADC_WINCTRL_WINMODE_Pos)
+#define ADC_WINCTRL_WINMODE(value)  ((ADC_WINCTRL_WINMODE_Msk & ((value) << ADC_WINCTRL_WINMODE_Pos)))
+#define   ADC_WINCTRL_WINMODE_DISABLE_Val 0x0u   /**< \brief (ADC_WINCTRL) No window mode (default) */
+#define   ADC_WINCTRL_WINMODE_MODE1_Val   0x1u   /**< \brief (ADC_WINCTRL) Mode 1: RESULT > WINLT */
+#define   ADC_WINCTRL_WINMODE_MODE2_Val   0x2u   /**< \brief (ADC_WINCTRL) Mode 2: RESULT < WINUT */
+#define   ADC_WINCTRL_WINMODE_MODE3_Val   0x3u   /**< \brief (ADC_WINCTRL) Mode 3: WINLT < RESULT < WINUT */
+#define   ADC_WINCTRL_WINMODE_MODE4_Val   0x4u   /**< \brief (ADC_WINCTRL) Mode 4: !(WINLT < RESULT < WINUT) */
+#define ADC_WINCTRL_WINMODE_DISABLE (ADC_WINCTRL_WINMODE_DISABLE_Val << ADC_WINCTRL_WINMODE_Pos)
+#define ADC_WINCTRL_WINMODE_MODE1   (ADC_WINCTRL_WINMODE_MODE1_Val << ADC_WINCTRL_WINMODE_Pos)
+#define ADC_WINCTRL_WINMODE_MODE2   (ADC_WINCTRL_WINMODE_MODE2_Val << ADC_WINCTRL_WINMODE_Pos)
+#define ADC_WINCTRL_WINMODE_MODE3   (ADC_WINCTRL_WINMODE_MODE3_Val << ADC_WINCTRL_WINMODE_Pos)
+#define ADC_WINCTRL_WINMODE_MODE4   (ADC_WINCTRL_WINMODE_MODE4_Val << ADC_WINCTRL_WINMODE_Pos)
+#define ADC_WINCTRL_MASK            0x07u        /**< \brief (ADC_WINCTRL) MASK Register */
+
+/* -------- ADC_SWTRIG : (ADC Offset: 0x0C) (R/W  8) Software Trigger -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  FLUSH:1;          /*!< bit:      0  ADC Conversion Flush               */
+    uint8_t  START:1;          /*!< bit:      1  ADC Start Conversion               */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_SWTRIG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_SWTRIG_OFFSET           0x0C         /**< \brief (ADC_SWTRIG offset) Software Trigger */
+#define ADC_SWTRIG_RESETVALUE       0x00         /**< \brief (ADC_SWTRIG reset_value) Software Trigger */
+
+#define ADC_SWTRIG_FLUSH_Pos        0            /**< \brief (ADC_SWTRIG) ADC Conversion Flush */
+#define ADC_SWTRIG_FLUSH            (0x1u << ADC_SWTRIG_FLUSH_Pos)
+#define ADC_SWTRIG_START_Pos        1            /**< \brief (ADC_SWTRIG) ADC Start Conversion */
+#define ADC_SWTRIG_START            (0x1u << ADC_SWTRIG_START_Pos)
+#define ADC_SWTRIG_MASK             0x03u        /**< \brief (ADC_SWTRIG) MASK Register */
+
+/* -------- ADC_INPUTCTRL : (ADC Offset: 0x10) (R/W 32) Input Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t MUXPOS:5;         /*!< bit:  0.. 4  Positive Mux Input Selection       */
+    uint32_t :3;               /*!< bit:  5.. 7  Reserved                           */
+    uint32_t MUXNEG:5;         /*!< bit:  8..12  Negative Mux Input Selection       */
+    uint32_t :3;               /*!< bit: 13..15  Reserved                           */
+    uint32_t INPUTSCAN:4;      /*!< bit: 16..19  Number of Input Channels Included in Scan */
+    uint32_t INPUTOFFSET:4;    /*!< bit: 20..23  Positive Mux Setting Offset        */
+    uint32_t GAIN:4;           /*!< bit: 24..27  Gain Factor Selection              */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} ADC_INPUTCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_INPUTCTRL_OFFSET        0x10         /**< \brief (ADC_INPUTCTRL offset) Input Control */
+#define ADC_INPUTCTRL_RESETVALUE    0x00000000   /**< \brief (ADC_INPUTCTRL reset_value) Input Control */
+
+#define ADC_INPUTCTRL_MUXPOS_Pos    0            /**< \brief (ADC_INPUTCTRL) Positive Mux Input Selection */
+#define ADC_INPUTCTRL_MUXPOS_Msk    (0x1Fu << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS(value) ((ADC_INPUTCTRL_MUXPOS_Msk & ((value) << ADC_INPUTCTRL_MUXPOS_Pos)))
+#define   ADC_INPUTCTRL_MUXPOS_PIN0_Val   0x0u   /**< \brief (ADC_INPUTCTRL) ADC AIN0 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN1_Val   0x1u   /**< \brief (ADC_INPUTCTRL) ADC AIN1 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN2_Val   0x2u   /**< \brief (ADC_INPUTCTRL) ADC AIN2 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN3_Val   0x3u   /**< \brief (ADC_INPUTCTRL) ADC AIN3 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN4_Val   0x4u   /**< \brief (ADC_INPUTCTRL) ADC AIN4 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN5_Val   0x5u   /**< \brief (ADC_INPUTCTRL) ADC AIN5 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN6_Val   0x6u   /**< \brief (ADC_INPUTCTRL) ADC AIN6 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN7_Val   0x7u   /**< \brief (ADC_INPUTCTRL) ADC AIN7 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN8_Val   0x8u   /**< \brief (ADC_INPUTCTRL) ADC AIN8 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN9_Val   0x9u   /**< \brief (ADC_INPUTCTRL) ADC AIN9 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN10_Val  0xAu   /**< \brief (ADC_INPUTCTRL) ADC AIN10 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN11_Val  0xBu   /**< \brief (ADC_INPUTCTRL) ADC AIN11 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN12_Val  0xCu   /**< \brief (ADC_INPUTCTRL) ADC AIN12 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN13_Val  0xDu   /**< \brief (ADC_INPUTCTRL) ADC AIN13 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN14_Val  0xEu   /**< \brief (ADC_INPUTCTRL) ADC AIN14 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN15_Val  0xFu   /**< \brief (ADC_INPUTCTRL) ADC AIN15 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN16_Val  0x10u   /**< \brief (ADC_INPUTCTRL) ADC AIN16 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN17_Val  0x11u   /**< \brief (ADC_INPUTCTRL) ADC AIN17 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN18_Val  0x12u   /**< \brief (ADC_INPUTCTRL) ADC AIN18 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_PIN19_Val  0x13u   /**< \brief (ADC_INPUTCTRL) ADC AIN19 Pin */
+#define   ADC_INPUTCTRL_MUXPOS_TEMP_Val   0x18u   /**< \brief (ADC_INPUTCTRL) Temperature Reference */
+#define   ADC_INPUTCTRL_MUXPOS_BANDGAP_Val 0x19u   /**< \brief (ADC_INPUTCTRL) Bandgap Voltage */
+#define   ADC_INPUTCTRL_MUXPOS_SCALEDCOREVCC_Val 0x1Au   /**< \brief (ADC_INPUTCTRL) 1/4  Scaled Core Supply */
+#define   ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC_Val 0x1Bu   /**< \brief (ADC_INPUTCTRL) 1/4  Scaled I/O Supply */
+#define   ADC_INPUTCTRL_MUXPOS_DAC_Val    0x1Cu   /**< \brief (ADC_INPUTCTRL) DAC Output */
+#define ADC_INPUTCTRL_MUXPOS_PIN0   (ADC_INPUTCTRL_MUXPOS_PIN0_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN1   (ADC_INPUTCTRL_MUXPOS_PIN1_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN2   (ADC_INPUTCTRL_MUXPOS_PIN2_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN3   (ADC_INPUTCTRL_MUXPOS_PIN3_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN4   (ADC_INPUTCTRL_MUXPOS_PIN4_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN5   (ADC_INPUTCTRL_MUXPOS_PIN5_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN6   (ADC_INPUTCTRL_MUXPOS_PIN6_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN7   (ADC_INPUTCTRL_MUXPOS_PIN7_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN8   (ADC_INPUTCTRL_MUXPOS_PIN8_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN9   (ADC_INPUTCTRL_MUXPOS_PIN9_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN10  (ADC_INPUTCTRL_MUXPOS_PIN10_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN11  (ADC_INPUTCTRL_MUXPOS_PIN11_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN12  (ADC_INPUTCTRL_MUXPOS_PIN12_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN13  (ADC_INPUTCTRL_MUXPOS_PIN13_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN14  (ADC_INPUTCTRL_MUXPOS_PIN14_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN15  (ADC_INPUTCTRL_MUXPOS_PIN15_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN16  (ADC_INPUTCTRL_MUXPOS_PIN16_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN17  (ADC_INPUTCTRL_MUXPOS_PIN17_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN18  (ADC_INPUTCTRL_MUXPOS_PIN18_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_PIN19  (ADC_INPUTCTRL_MUXPOS_PIN19_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_TEMP   (ADC_INPUTCTRL_MUXPOS_TEMP_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_BANDGAP (ADC_INPUTCTRL_MUXPOS_BANDGAP_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_SCALEDCOREVCC (ADC_INPUTCTRL_MUXPOS_SCALEDCOREVCC_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC (ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC_Val << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXPOS_DAC    (ADC_INPUTCTRL_MUXPOS_DAC_Val  << ADC_INPUTCTRL_MUXPOS_Pos)
+#define ADC_INPUTCTRL_MUXNEG_Pos    8            /**< \brief (ADC_INPUTCTRL) Negative Mux Input Selection */
+#define ADC_INPUTCTRL_MUXNEG_Msk    (0x1Fu << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG(value) ((ADC_INPUTCTRL_MUXNEG_Msk & ((value) << ADC_INPUTCTRL_MUXNEG_Pos)))
+#define   ADC_INPUTCTRL_MUXNEG_PIN0_Val   0x0u   /**< \brief (ADC_INPUTCTRL) ADC AIN0 Pin */
+#define   ADC_INPUTCTRL_MUXNEG_PIN1_Val   0x1u   /**< \brief (ADC_INPUTCTRL) ADC AIN1 Pin */
+#define   ADC_INPUTCTRL_MUXNEG_PIN2_Val   0x2u   /**< \brief (ADC_INPUTCTRL) ADC AIN2 Pin */
+#define   ADC_INPUTCTRL_MUXNEG_PIN3_Val   0x3u   /**< \brief (ADC_INPUTCTRL) ADC AIN3 Pin */
+#define   ADC_INPUTCTRL_MUXNEG_PIN4_Val   0x4u   /**< \brief (ADC_INPUTCTRL) ADC AIN4 Pin */
+#define   ADC_INPUTCTRL_MUXNEG_PIN5_Val   0x5u   /**< \brief (ADC_INPUTCTRL) ADC AIN5 Pin */
+#define   ADC_INPUTCTRL_MUXNEG_PIN6_Val   0x6u   /**< \brief (ADC_INPUTCTRL) ADC AIN6 Pin */
+#define   ADC_INPUTCTRL_MUXNEG_PIN7_Val   0x7u   /**< \brief (ADC_INPUTCTRL) ADC AIN7 Pin */
+#define   ADC_INPUTCTRL_MUXNEG_GND_Val    0x18u   /**< \brief (ADC_INPUTCTRL) Internal Ground */
+#define   ADC_INPUTCTRL_MUXNEG_IOGND_Val  0x19u   /**< \brief (ADC_INPUTCTRL) I/O Ground */
+#define ADC_INPUTCTRL_MUXNEG_PIN0   (ADC_INPUTCTRL_MUXNEG_PIN0_Val << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG_PIN1   (ADC_INPUTCTRL_MUXNEG_PIN1_Val << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG_PIN2   (ADC_INPUTCTRL_MUXNEG_PIN2_Val << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG_PIN3   (ADC_INPUTCTRL_MUXNEG_PIN3_Val << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG_PIN4   (ADC_INPUTCTRL_MUXNEG_PIN4_Val << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG_PIN5   (ADC_INPUTCTRL_MUXNEG_PIN5_Val << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG_PIN6   (ADC_INPUTCTRL_MUXNEG_PIN6_Val << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG_PIN7   (ADC_INPUTCTRL_MUXNEG_PIN7_Val << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG_GND    (ADC_INPUTCTRL_MUXNEG_GND_Val  << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_MUXNEG_IOGND  (ADC_INPUTCTRL_MUXNEG_IOGND_Val << ADC_INPUTCTRL_MUXNEG_Pos)
+#define ADC_INPUTCTRL_INPUTSCAN_Pos 16           /**< \brief (ADC_INPUTCTRL) Number of Input Channels Included in Scan */
+#define ADC_INPUTCTRL_INPUTSCAN_Msk (0xFu << ADC_INPUTCTRL_INPUTSCAN_Pos)
+#define ADC_INPUTCTRL_INPUTSCAN(value) ((ADC_INPUTCTRL_INPUTSCAN_Msk & ((value) << ADC_INPUTCTRL_INPUTSCAN_Pos)))
+#define ADC_INPUTCTRL_INPUTOFFSET_Pos 20           /**< \brief (ADC_INPUTCTRL) Positive Mux Setting Offset */
+#define ADC_INPUTCTRL_INPUTOFFSET_Msk (0xFu << ADC_INPUTCTRL_INPUTOFFSET_Pos)
+#define ADC_INPUTCTRL_INPUTOFFSET(value) ((ADC_INPUTCTRL_INPUTOFFSET_Msk & ((value) << ADC_INPUTCTRL_INPUTOFFSET_Pos)))
+#define ADC_INPUTCTRL_GAIN_Pos      24           /**< \brief (ADC_INPUTCTRL) Gain Factor Selection */
+#define ADC_INPUTCTRL_GAIN_Msk      (0xFu << ADC_INPUTCTRL_GAIN_Pos)
+#define ADC_INPUTCTRL_GAIN(value)   ((ADC_INPUTCTRL_GAIN_Msk & ((value) << ADC_INPUTCTRL_GAIN_Pos)))
+#define   ADC_INPUTCTRL_GAIN_1X_Val       0x0u   /**< \brief (ADC_INPUTCTRL) 1x */
+#define   ADC_INPUTCTRL_GAIN_2X_Val       0x1u   /**< \brief (ADC_INPUTCTRL) 2x */
+#define   ADC_INPUTCTRL_GAIN_4X_Val       0x2u   /**< \brief (ADC_INPUTCTRL) 4x */
+#define   ADC_INPUTCTRL_GAIN_8X_Val       0x3u   /**< \brief (ADC_INPUTCTRL) 8x */
+#define   ADC_INPUTCTRL_GAIN_16X_Val      0x4u   /**< \brief (ADC_INPUTCTRL) 16x */
+#define   ADC_INPUTCTRL_GAIN_DIV2_Val     0xFu   /**< \brief (ADC_INPUTCTRL) 1/2x */
+#define ADC_INPUTCTRL_GAIN_1X       (ADC_INPUTCTRL_GAIN_1X_Val     << ADC_INPUTCTRL_GAIN_Pos)
+#define ADC_INPUTCTRL_GAIN_2X       (ADC_INPUTCTRL_GAIN_2X_Val     << ADC_INPUTCTRL_GAIN_Pos)
+#define ADC_INPUTCTRL_GAIN_4X       (ADC_INPUTCTRL_GAIN_4X_Val     << ADC_INPUTCTRL_GAIN_Pos)
+#define ADC_INPUTCTRL_GAIN_8X       (ADC_INPUTCTRL_GAIN_8X_Val     << ADC_INPUTCTRL_GAIN_Pos)
+#define ADC_INPUTCTRL_GAIN_16X      (ADC_INPUTCTRL_GAIN_16X_Val    << ADC_INPUTCTRL_GAIN_Pos)
+#define ADC_INPUTCTRL_GAIN_DIV2     (ADC_INPUTCTRL_GAIN_DIV2_Val   << ADC_INPUTCTRL_GAIN_Pos)
+#define ADC_INPUTCTRL_MASK          0x0FFF1F1Fu  /**< \brief (ADC_INPUTCTRL) MASK Register */
+
+/* -------- ADC_EVCTRL : (ADC Offset: 0x14) (R/W  8) Event Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  STARTEI:1;        /*!< bit:      0  Start Conversion Event In          */
+    uint8_t  SYNCEI:1;         /*!< bit:      1  Synchronization Event In           */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  RESRDYEO:1;       /*!< bit:      4  Result Ready Event Out             */
+    uint8_t  WINMONEO:1;       /*!< bit:      5  Window Monitor Event Out           */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_EVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_EVCTRL_OFFSET           0x14         /**< \brief (ADC_EVCTRL offset) Event Control */
+#define ADC_EVCTRL_RESETVALUE       0x00         /**< \brief (ADC_EVCTRL reset_value) Event Control */
+
+#define ADC_EVCTRL_STARTEI_Pos      0            /**< \brief (ADC_EVCTRL) Start Conversion Event In */
+#define ADC_EVCTRL_STARTEI          (0x1u << ADC_EVCTRL_STARTEI_Pos)
+#define ADC_EVCTRL_SYNCEI_Pos       1            /**< \brief (ADC_EVCTRL) Synchronization Event In */
+#define ADC_EVCTRL_SYNCEI           (0x1u << ADC_EVCTRL_SYNCEI_Pos)
+#define ADC_EVCTRL_RESRDYEO_Pos     4            /**< \brief (ADC_EVCTRL) Result Ready Event Out */
+#define ADC_EVCTRL_RESRDYEO         (0x1u << ADC_EVCTRL_RESRDYEO_Pos)
+#define ADC_EVCTRL_WINMONEO_Pos     5            /**< \brief (ADC_EVCTRL) Window Monitor Event Out */
+#define ADC_EVCTRL_WINMONEO         (0x1u << ADC_EVCTRL_WINMONEO_Pos)
+#define ADC_EVCTRL_MASK             0x33u        /**< \brief (ADC_EVCTRL) MASK Register */
+
+/* -------- ADC_INTENCLR : (ADC Offset: 0x16) (R/W  8) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  RESRDY:1;         /*!< bit:      0  Result Ready Interrupt Enable      */
+    uint8_t  OVERRUN:1;        /*!< bit:      1  Overrun Interrupt Enable           */
+    uint8_t  WINMON:1;         /*!< bit:      2  Window Monitor Interrupt Enable    */
+    uint8_t  SYNCRDY:1;        /*!< bit:      3  Synchronization Ready Interrupt Enable */
+    uint8_t  :4;               /*!< bit:  4.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_INTENCLR_OFFSET         0x16         /**< \brief (ADC_INTENCLR offset) Interrupt Enable Clear */
+#define ADC_INTENCLR_RESETVALUE     0x00         /**< \brief (ADC_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define ADC_INTENCLR_RESRDY_Pos     0            /**< \brief (ADC_INTENCLR) Result Ready Interrupt Enable */
+#define ADC_INTENCLR_RESRDY         (0x1u << ADC_INTENCLR_RESRDY_Pos)
+#define ADC_INTENCLR_OVERRUN_Pos    1            /**< \brief (ADC_INTENCLR) Overrun Interrupt Enable */
+#define ADC_INTENCLR_OVERRUN        (0x1u << ADC_INTENCLR_OVERRUN_Pos)
+#define ADC_INTENCLR_WINMON_Pos     2            /**< \brief (ADC_INTENCLR) Window Monitor Interrupt Enable */
+#define ADC_INTENCLR_WINMON         (0x1u << ADC_INTENCLR_WINMON_Pos)
+#define ADC_INTENCLR_SYNCRDY_Pos    3            /**< \brief (ADC_INTENCLR) Synchronization Ready Interrupt Enable */
+#define ADC_INTENCLR_SYNCRDY        (0x1u << ADC_INTENCLR_SYNCRDY_Pos)
+#define ADC_INTENCLR_MASK           0x0Fu        /**< \brief (ADC_INTENCLR) MASK Register */
+
+/* -------- ADC_INTENSET : (ADC Offset: 0x17) (R/W  8) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  RESRDY:1;         /*!< bit:      0  Result Ready Interrupt Enable      */
+    uint8_t  OVERRUN:1;        /*!< bit:      1  Overrun Interrupt Enable           */
+    uint8_t  WINMON:1;         /*!< bit:      2  Window Monitor Interrupt Enable    */
+    uint8_t  SYNCRDY:1;        /*!< bit:      3  Synchronization Ready Interrupt Enable */
+    uint8_t  :4;               /*!< bit:  4.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_INTENSET_OFFSET         0x17         /**< \brief (ADC_INTENSET offset) Interrupt Enable Set */
+#define ADC_INTENSET_RESETVALUE     0x00         /**< \brief (ADC_INTENSET reset_value) Interrupt Enable Set */
+
+#define ADC_INTENSET_RESRDY_Pos     0            /**< \brief (ADC_INTENSET) Result Ready Interrupt Enable */
+#define ADC_INTENSET_RESRDY         (0x1u << ADC_INTENSET_RESRDY_Pos)
+#define ADC_INTENSET_OVERRUN_Pos    1            /**< \brief (ADC_INTENSET) Overrun Interrupt Enable */
+#define ADC_INTENSET_OVERRUN        (0x1u << ADC_INTENSET_OVERRUN_Pos)
+#define ADC_INTENSET_WINMON_Pos     2            /**< \brief (ADC_INTENSET) Window Monitor Interrupt Enable */
+#define ADC_INTENSET_WINMON         (0x1u << ADC_INTENSET_WINMON_Pos)
+#define ADC_INTENSET_SYNCRDY_Pos    3            /**< \brief (ADC_INTENSET) Synchronization Ready Interrupt Enable */
+#define ADC_INTENSET_SYNCRDY        (0x1u << ADC_INTENSET_SYNCRDY_Pos)
+#define ADC_INTENSET_MASK           0x0Fu        /**< \brief (ADC_INTENSET) MASK Register */
+
+/* -------- ADC_INTFLAG : (ADC Offset: 0x18) (R/W  8) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  RESRDY:1;         /*!< bit:      0  Result Ready                       */
+    uint8_t  OVERRUN:1;        /*!< bit:      1  Overrun                            */
+    uint8_t  WINMON:1;         /*!< bit:      2  Window Monitor                     */
+    uint8_t  SYNCRDY:1;        /*!< bit:      3  Synchronization Ready              */
+    uint8_t  :4;               /*!< bit:  4.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_INTFLAG_OFFSET          0x18         /**< \brief (ADC_INTFLAG offset) Interrupt Flag Status and Clear */
+#define ADC_INTFLAG_RESETVALUE      0x00         /**< \brief (ADC_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define ADC_INTFLAG_RESRDY_Pos      0            /**< \brief (ADC_INTFLAG) Result Ready */
+#define ADC_INTFLAG_RESRDY          (0x1u << ADC_INTFLAG_RESRDY_Pos)
+#define ADC_INTFLAG_OVERRUN_Pos     1            /**< \brief (ADC_INTFLAG) Overrun */
+#define ADC_INTFLAG_OVERRUN         (0x1u << ADC_INTFLAG_OVERRUN_Pos)
+#define ADC_INTFLAG_WINMON_Pos      2            /**< \brief (ADC_INTFLAG) Window Monitor */
+#define ADC_INTFLAG_WINMON          (0x1u << ADC_INTFLAG_WINMON_Pos)
+#define ADC_INTFLAG_SYNCRDY_Pos     3            /**< \brief (ADC_INTFLAG) Synchronization Ready */
+#define ADC_INTFLAG_SYNCRDY         (0x1u << ADC_INTFLAG_SYNCRDY_Pos)
+#define ADC_INTFLAG_MASK            0x0Fu        /**< \brief (ADC_INTFLAG) MASK Register */
+
+/* -------- ADC_STATUS : (ADC Offset: 0x19) (R/   8) Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :7;               /*!< bit:  0.. 6  Reserved                           */
+    uint8_t  SYNCBUSY:1;       /*!< bit:      7  Synchronization Busy               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_STATUS_OFFSET           0x19         /**< \brief (ADC_STATUS offset) Status */
+#define ADC_STATUS_RESETVALUE       0x00         /**< \brief (ADC_STATUS reset_value) Status */
+
+#define ADC_STATUS_SYNCBUSY_Pos     7            /**< \brief (ADC_STATUS) Synchronization Busy */
+#define ADC_STATUS_SYNCBUSY         (0x1u << ADC_STATUS_SYNCBUSY_Pos)
+#define ADC_STATUS_MASK             0x80u        /**< \brief (ADC_STATUS) MASK Register */
+
+/* -------- ADC_RESULT : (ADC Offset: 0x1A) (R/  16) Result -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t RESULT:16;        /*!< bit:  0..15  Result Conversion Value            */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} ADC_RESULT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_RESULT_OFFSET           0x1A         /**< \brief (ADC_RESULT offset) Result */
+#define ADC_RESULT_RESETVALUE       0x0000       /**< \brief (ADC_RESULT reset_value) Result */
+
+#define ADC_RESULT_RESULT_Pos       0            /**< \brief (ADC_RESULT) Result Conversion Value */
+#define ADC_RESULT_RESULT_Msk       (0xFFFFu << ADC_RESULT_RESULT_Pos)
+#define ADC_RESULT_RESULT(value)    ((ADC_RESULT_RESULT_Msk & ((value) << ADC_RESULT_RESULT_Pos)))
+#define ADC_RESULT_MASK             0xFFFFu      /**< \brief (ADC_RESULT) MASK Register */
+
+/* -------- ADC_WINLT : (ADC Offset: 0x1C) (R/W 16) Window Monitor Lower Threshold -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t WINLT:16;         /*!< bit:  0..15  Window Lower Threshold             */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} ADC_WINLT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_WINLT_OFFSET            0x1C         /**< \brief (ADC_WINLT offset) Window Monitor Lower Threshold */
+#define ADC_WINLT_RESETVALUE        0x0000       /**< \brief (ADC_WINLT reset_value) Window Monitor Lower Threshold */
+
+#define ADC_WINLT_WINLT_Pos         0            /**< \brief (ADC_WINLT) Window Lower Threshold */
+#define ADC_WINLT_WINLT_Msk         (0xFFFFu << ADC_WINLT_WINLT_Pos)
+#define ADC_WINLT_WINLT(value)      ((ADC_WINLT_WINLT_Msk & ((value) << ADC_WINLT_WINLT_Pos)))
+#define ADC_WINLT_MASK              0xFFFFu      /**< \brief (ADC_WINLT) MASK Register */
+
+/* -------- ADC_WINUT : (ADC Offset: 0x20) (R/W 16) Window Monitor Upper Threshold -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t WINUT:16;         /*!< bit:  0..15  Window Upper Threshold             */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} ADC_WINUT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_WINUT_OFFSET            0x20         /**< \brief (ADC_WINUT offset) Window Monitor Upper Threshold */
+#define ADC_WINUT_RESETVALUE        0x0000       /**< \brief (ADC_WINUT reset_value) Window Monitor Upper Threshold */
+
+#define ADC_WINUT_WINUT_Pos         0            /**< \brief (ADC_WINUT) Window Upper Threshold */
+#define ADC_WINUT_WINUT_Msk         (0xFFFFu << ADC_WINUT_WINUT_Pos)
+#define ADC_WINUT_WINUT(value)      ((ADC_WINUT_WINUT_Msk & ((value) << ADC_WINUT_WINUT_Pos)))
+#define ADC_WINUT_MASK              0xFFFFu      /**< \brief (ADC_WINUT) MASK Register */
+
+/* -------- ADC_GAINCORR : (ADC Offset: 0x24) (R/W 16) Gain Correction -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t GAINCORR:12;      /*!< bit:  0..11  Gain Correction Value              */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} ADC_GAINCORR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_GAINCORR_OFFSET         0x24         /**< \brief (ADC_GAINCORR offset) Gain Correction */
+#define ADC_GAINCORR_RESETVALUE     0x0000       /**< \brief (ADC_GAINCORR reset_value) Gain Correction */
+
+#define ADC_GAINCORR_GAINCORR_Pos   0            /**< \brief (ADC_GAINCORR) Gain Correction Value */
+#define ADC_GAINCORR_GAINCORR_Msk   (0xFFFu << ADC_GAINCORR_GAINCORR_Pos)
+#define ADC_GAINCORR_GAINCORR(value) ((ADC_GAINCORR_GAINCORR_Msk & ((value) << ADC_GAINCORR_GAINCORR_Pos)))
+#define ADC_GAINCORR_MASK           0x0FFFu      /**< \brief (ADC_GAINCORR) MASK Register */
+
+/* -------- ADC_OFFSETCORR : (ADC Offset: 0x26) (R/W 16) Offset Correction -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t OFFSETCORR:12;    /*!< bit:  0..11  Offset Correction Value            */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} ADC_OFFSETCORR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_OFFSETCORR_OFFSET       0x26         /**< \brief (ADC_OFFSETCORR offset) Offset Correction */
+#define ADC_OFFSETCORR_RESETVALUE   0x0000       /**< \brief (ADC_OFFSETCORR reset_value) Offset Correction */
+
+#define ADC_OFFSETCORR_OFFSETCORR_Pos 0            /**< \brief (ADC_OFFSETCORR) Offset Correction Value */
+#define ADC_OFFSETCORR_OFFSETCORR_Msk (0xFFFu << ADC_OFFSETCORR_OFFSETCORR_Pos)
+#define ADC_OFFSETCORR_OFFSETCORR(value) ((ADC_OFFSETCORR_OFFSETCORR_Msk & ((value) << ADC_OFFSETCORR_OFFSETCORR_Pos)))
+#define ADC_OFFSETCORR_MASK         0x0FFFu      /**< \brief (ADC_OFFSETCORR) MASK Register */
+
+/* -------- ADC_CALIB : (ADC Offset: 0x28) (R/W 16) Calibration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t LINEARITY_CAL:8;  /*!< bit:  0.. 7  Linearity Calibration Value        */
+    uint16_t BIAS_CAL:3;       /*!< bit:  8..10  Bias Calibration Value             */
+    uint16_t :5;               /*!< bit: 11..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} ADC_CALIB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_CALIB_OFFSET            0x28         /**< \brief (ADC_CALIB offset) Calibration */
+#define ADC_CALIB_RESETVALUE        0x0000       /**< \brief (ADC_CALIB reset_value) Calibration */
+
+#define ADC_CALIB_LINEARITY_CAL_Pos 0            /**< \brief (ADC_CALIB) Linearity Calibration Value */
+#define ADC_CALIB_LINEARITY_CAL_Msk (0xFFu << ADC_CALIB_LINEARITY_CAL_Pos)
+#define ADC_CALIB_LINEARITY_CAL(value) ((ADC_CALIB_LINEARITY_CAL_Msk & ((value) << ADC_CALIB_LINEARITY_CAL_Pos)))
+#define ADC_CALIB_BIAS_CAL_Pos      8            /**< \brief (ADC_CALIB) Bias Calibration Value */
+#define ADC_CALIB_BIAS_CAL_Msk      (0x7u << ADC_CALIB_BIAS_CAL_Pos)
+#define ADC_CALIB_BIAS_CAL(value)   ((ADC_CALIB_BIAS_CAL_Msk & ((value) << ADC_CALIB_BIAS_CAL_Pos)))
+#define ADC_CALIB_MASK              0x07FFu      /**< \brief (ADC_CALIB) MASK Register */
+
+/* -------- ADC_DBGCTRL : (ADC Offset: 0x2A) (R/W  8) Debug Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DBGRUN:1;         /*!< bit:      0  Debug Run                          */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} ADC_DBGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define ADC_DBGCTRL_OFFSET          0x2A         /**< \brief (ADC_DBGCTRL offset) Debug Control */
+#define ADC_DBGCTRL_RESETVALUE      0x00         /**< \brief (ADC_DBGCTRL reset_value) Debug Control */
+
+#define ADC_DBGCTRL_DBGRUN_Pos      0            /**< \brief (ADC_DBGCTRL) Debug Run */
+#define ADC_DBGCTRL_DBGRUN          (0x1u << ADC_DBGCTRL_DBGRUN_Pos)
+#define ADC_DBGCTRL_MASK            0x01u        /**< \brief (ADC_DBGCTRL) MASK Register */
+
+/** \brief ADC hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO ADC_CTRLA_Type            CTRLA;       /**< \brief Offset: 0x00 (R/W  8) Control A */
+  __IO ADC_REFCTRL_Type          REFCTRL;     /**< \brief Offset: 0x01 (R/W  8) Reference Control */
+  __IO ADC_AVGCTRL_Type          AVGCTRL;     /**< \brief Offset: 0x02 (R/W  8) Average Control */
+  __IO ADC_SAMPCTRL_Type         SAMPCTRL;    /**< \brief Offset: 0x03 (R/W  8) Sampling Time Control */
+  __IO ADC_CTRLB_Type            CTRLB;       /**< \brief Offset: 0x04 (R/W 16) Control B */
+       RoReg8                    Reserved1[0x2];
+  __IO ADC_WINCTRL_Type          WINCTRL;     /**< \brief Offset: 0x08 (R/W  8) Window Monitor Control */
+       RoReg8                    Reserved2[0x3];
+  __IO ADC_SWTRIG_Type           SWTRIG;      /**< \brief Offset: 0x0C (R/W  8) Software Trigger */
+       RoReg8                    Reserved3[0x3];
+  __IO ADC_INPUTCTRL_Type        INPUTCTRL;   /**< \brief Offset: 0x10 (R/W 32) Input Control */
+  __IO ADC_EVCTRL_Type           EVCTRL;      /**< \brief Offset: 0x14 (R/W  8) Event Control */
+       RoReg8                    Reserved4[0x1];
+  __IO ADC_INTENCLR_Type         INTENCLR;    /**< \brief Offset: 0x16 (R/W  8) Interrupt Enable Clear */
+  __IO ADC_INTENSET_Type         INTENSET;    /**< \brief Offset: 0x17 (R/W  8) Interrupt Enable Set */
+  __IO ADC_INTFLAG_Type          INTFLAG;     /**< \brief Offset: 0x18 (R/W  8) Interrupt Flag Status and Clear */
+  __I  ADC_STATUS_Type           STATUS;      /**< \brief Offset: 0x19 (R/   8) Status */
+  __I  ADC_RESULT_Type           RESULT;      /**< \brief Offset: 0x1A (R/  16) Result */
+  __IO ADC_WINLT_Type            WINLT;       /**< \brief Offset: 0x1C (R/W 16) Window Monitor Lower Threshold */
+       RoReg8                    Reserved5[0x2];
+  __IO ADC_WINUT_Type            WINUT;       /**< \brief Offset: 0x20 (R/W 16) Window Monitor Upper Threshold */
+       RoReg8                    Reserved6[0x2];
+  __IO ADC_GAINCORR_Type         GAINCORR;    /**< \brief Offset: 0x24 (R/W 16) Gain Correction */
+  __IO ADC_OFFSETCORR_Type       OFFSETCORR;  /**< \brief Offset: 0x26 (R/W 16) Offset Correction */
+  __IO ADC_CALIB_Type            CALIB;       /**< \brief Offset: 0x28 (R/W 16) Calibration */
+  __IO ADC_DBGCTRL_Type          DBGCTRL;     /**< \brief Offset: 0x2A (R/W  8) Debug Control */
+} Adc;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_ADC_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/dac.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/dac.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/dac.h	(revision 136)
@@ -0,0 +1,286 @@
+/**
+ * \file
+ *
+ * \brief Component description for DAC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_DAC_COMPONENT_
+#define _SAMD21_DAC_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR DAC */
+/* ========================================================================== */
+/** \addtogroup SAMD21_DAC Digital Analog Converter */
+/*@{*/
+
+#define DAC_U2214
+#define REV_DAC                     0x110
+
+/* -------- DAC_CTRLA : (DAC Offset: 0x0) (R/W  8) Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint8_t  RUNSTDBY:1;       /*!< bit:      2  Run in Standby                     */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DAC_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DAC_CTRLA_OFFSET            0x0          /**< \brief (DAC_CTRLA offset) Control A */
+#define DAC_CTRLA_RESETVALUE        0x00         /**< \brief (DAC_CTRLA reset_value) Control A */
+
+#define DAC_CTRLA_SWRST_Pos         0            /**< \brief (DAC_CTRLA) Software Reset */
+#define DAC_CTRLA_SWRST             (0x1u << DAC_CTRLA_SWRST_Pos)
+#define DAC_CTRLA_ENABLE_Pos        1            /**< \brief (DAC_CTRLA) Enable */
+#define DAC_CTRLA_ENABLE            (0x1u << DAC_CTRLA_ENABLE_Pos)
+#define DAC_CTRLA_RUNSTDBY_Pos      2            /**< \brief (DAC_CTRLA) Run in Standby */
+#define DAC_CTRLA_RUNSTDBY          (0x1u << DAC_CTRLA_RUNSTDBY_Pos)
+#define DAC_CTRLA_MASK              0x07u        /**< \brief (DAC_CTRLA) MASK Register */
+
+/* -------- DAC_CTRLB : (DAC Offset: 0x1) (R/W  8) Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  EOEN:1;           /*!< bit:      0  External Output Enable             */
+    uint8_t  IOEN:1;           /*!< bit:      1  Internal Output Enable             */
+    uint8_t  LEFTADJ:1;        /*!< bit:      2  Left Adjusted Data                 */
+    uint8_t  VPD:1;            /*!< bit:      3  Voltage Pump Disable               */
+    uint8_t  BDWP:1;           /*!< bit:      4  Bypass DATABUF Write Protection    */
+    uint8_t  :1;               /*!< bit:      5  Reserved                           */
+    uint8_t  REFSEL:2;         /*!< bit:  6.. 7  Reference Selection                */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DAC_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DAC_CTRLB_OFFSET            0x1          /**< \brief (DAC_CTRLB offset) Control B */
+#define DAC_CTRLB_RESETVALUE        0x00         /**< \brief (DAC_CTRLB reset_value) Control B */
+
+#define DAC_CTRLB_EOEN_Pos          0            /**< \brief (DAC_CTRLB) External Output Enable */
+#define DAC_CTRLB_EOEN              (0x1u << DAC_CTRLB_EOEN_Pos)
+#define DAC_CTRLB_IOEN_Pos          1            /**< \brief (DAC_CTRLB) Internal Output Enable */
+#define DAC_CTRLB_IOEN              (0x1u << DAC_CTRLB_IOEN_Pos)
+#define DAC_CTRLB_LEFTADJ_Pos       2            /**< \brief (DAC_CTRLB) Left Adjusted Data */
+#define DAC_CTRLB_LEFTADJ           (0x1u << DAC_CTRLB_LEFTADJ_Pos)
+#define DAC_CTRLB_VPD_Pos           3            /**< \brief (DAC_CTRLB) Voltage Pump Disable */
+#define DAC_CTRLB_VPD               (0x1u << DAC_CTRLB_VPD_Pos)
+#define DAC_CTRLB_BDWP_Pos          4            /**< \brief (DAC_CTRLB) Bypass DATABUF Write Protection */
+#define DAC_CTRLB_BDWP              (0x1u << DAC_CTRLB_BDWP_Pos)
+#define DAC_CTRLB_REFSEL_Pos        6            /**< \brief (DAC_CTRLB) Reference Selection */
+#define DAC_CTRLB_REFSEL_Msk        (0x3u << DAC_CTRLB_REFSEL_Pos)
+#define DAC_CTRLB_REFSEL(value)     ((DAC_CTRLB_REFSEL_Msk & ((value) << DAC_CTRLB_REFSEL_Pos)))
+#define   DAC_CTRLB_REFSEL_INT1V_Val      0x0u   /**< \brief (DAC_CTRLB) Internal 1.0V reference */
+#define   DAC_CTRLB_REFSEL_AVCC_Val       0x1u   /**< \brief (DAC_CTRLB) AVCC */
+#define   DAC_CTRLB_REFSEL_VREFP_Val      0x2u   /**< \brief (DAC_CTRLB) External reference */
+#define DAC_CTRLB_REFSEL_INT1V      (DAC_CTRLB_REFSEL_INT1V_Val    << DAC_CTRLB_REFSEL_Pos)
+#define DAC_CTRLB_REFSEL_AVCC       (DAC_CTRLB_REFSEL_AVCC_Val     << DAC_CTRLB_REFSEL_Pos)
+#define DAC_CTRLB_REFSEL_VREFP      (DAC_CTRLB_REFSEL_VREFP_Val    << DAC_CTRLB_REFSEL_Pos)
+#define DAC_CTRLB_MASK              0xDFu        /**< \brief (DAC_CTRLB) MASK Register */
+
+/* -------- DAC_EVCTRL : (DAC Offset: 0x2) (R/W  8) Event Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  STARTEI:1;        /*!< bit:      0  Start Conversion Event Input       */
+    uint8_t  EMPTYEO:1;        /*!< bit:      1  Data Buffer Empty Event Output     */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DAC_EVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DAC_EVCTRL_OFFSET           0x2          /**< \brief (DAC_EVCTRL offset) Event Control */
+#define DAC_EVCTRL_RESETVALUE       0x00         /**< \brief (DAC_EVCTRL reset_value) Event Control */
+
+#define DAC_EVCTRL_STARTEI_Pos      0            /**< \brief (DAC_EVCTRL) Start Conversion Event Input */
+#define DAC_EVCTRL_STARTEI          (0x1u << DAC_EVCTRL_STARTEI_Pos)
+#define DAC_EVCTRL_EMPTYEO_Pos      1            /**< \brief (DAC_EVCTRL) Data Buffer Empty Event Output */
+#define DAC_EVCTRL_EMPTYEO          (0x1u << DAC_EVCTRL_EMPTYEO_Pos)
+#define DAC_EVCTRL_MASK             0x03u        /**< \brief (DAC_EVCTRL) MASK Register */
+
+/* -------- DAC_INTENCLR : (DAC Offset: 0x4) (R/W  8) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  UNDERRUN:1;       /*!< bit:      0  Underrun Interrupt Enable          */
+    uint8_t  EMPTY:1;          /*!< bit:      1  Data Buffer Empty Interrupt Enable */
+    uint8_t  SYNCRDY:1;        /*!< bit:      2  Synchronization Ready Interrupt Enable */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DAC_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DAC_INTENCLR_OFFSET         0x4          /**< \brief (DAC_INTENCLR offset) Interrupt Enable Clear */
+#define DAC_INTENCLR_RESETVALUE     0x00         /**< \brief (DAC_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define DAC_INTENCLR_UNDERRUN_Pos   0            /**< \brief (DAC_INTENCLR) Underrun Interrupt Enable */
+#define DAC_INTENCLR_UNDERRUN       (0x1u << DAC_INTENCLR_UNDERRUN_Pos)
+#define DAC_INTENCLR_EMPTY_Pos      1            /**< \brief (DAC_INTENCLR) Data Buffer Empty Interrupt Enable */
+#define DAC_INTENCLR_EMPTY          (0x1u << DAC_INTENCLR_EMPTY_Pos)
+#define DAC_INTENCLR_SYNCRDY_Pos    2            /**< \brief (DAC_INTENCLR) Synchronization Ready Interrupt Enable */
+#define DAC_INTENCLR_SYNCRDY        (0x1u << DAC_INTENCLR_SYNCRDY_Pos)
+#define DAC_INTENCLR_MASK           0x07u        /**< \brief (DAC_INTENCLR) MASK Register */
+
+/* -------- DAC_INTENSET : (DAC Offset: 0x5) (R/W  8) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  UNDERRUN:1;       /*!< bit:      0  Underrun Interrupt Enable          */
+    uint8_t  EMPTY:1;          /*!< bit:      1  Data Buffer Empty Interrupt Enable */
+    uint8_t  SYNCRDY:1;        /*!< bit:      2  Synchronization Ready Interrupt Enable */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DAC_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DAC_INTENSET_OFFSET         0x5          /**< \brief (DAC_INTENSET offset) Interrupt Enable Set */
+#define DAC_INTENSET_RESETVALUE     0x00         /**< \brief (DAC_INTENSET reset_value) Interrupt Enable Set */
+
+#define DAC_INTENSET_UNDERRUN_Pos   0            /**< \brief (DAC_INTENSET) Underrun Interrupt Enable */
+#define DAC_INTENSET_UNDERRUN       (0x1u << DAC_INTENSET_UNDERRUN_Pos)
+#define DAC_INTENSET_EMPTY_Pos      1            /**< \brief (DAC_INTENSET) Data Buffer Empty Interrupt Enable */
+#define DAC_INTENSET_EMPTY          (0x1u << DAC_INTENSET_EMPTY_Pos)
+#define DAC_INTENSET_SYNCRDY_Pos    2            /**< \brief (DAC_INTENSET) Synchronization Ready Interrupt Enable */
+#define DAC_INTENSET_SYNCRDY        (0x1u << DAC_INTENSET_SYNCRDY_Pos)
+#define DAC_INTENSET_MASK           0x07u        /**< \brief (DAC_INTENSET) MASK Register */
+
+/* -------- DAC_INTFLAG : (DAC Offset: 0x6) (R/W  8) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  UNDERRUN:1;       /*!< bit:      0  Underrun                           */
+    uint8_t  EMPTY:1;          /*!< bit:      1  Data Buffer Empty                  */
+    uint8_t  SYNCRDY:1;        /*!< bit:      2  Synchronization Ready              */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DAC_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DAC_INTFLAG_OFFSET          0x6          /**< \brief (DAC_INTFLAG offset) Interrupt Flag Status and Clear */
+#define DAC_INTFLAG_RESETVALUE      0x00         /**< \brief (DAC_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define DAC_INTFLAG_UNDERRUN_Pos    0            /**< \brief (DAC_INTFLAG) Underrun */
+#define DAC_INTFLAG_UNDERRUN        (0x1u << DAC_INTFLAG_UNDERRUN_Pos)
+#define DAC_INTFLAG_EMPTY_Pos       1            /**< \brief (DAC_INTFLAG) Data Buffer Empty */
+#define DAC_INTFLAG_EMPTY           (0x1u << DAC_INTFLAG_EMPTY_Pos)
+#define DAC_INTFLAG_SYNCRDY_Pos     2            /**< \brief (DAC_INTFLAG) Synchronization Ready */
+#define DAC_INTFLAG_SYNCRDY         (0x1u << DAC_INTFLAG_SYNCRDY_Pos)
+#define DAC_INTFLAG_MASK            0x07u        /**< \brief (DAC_INTFLAG) MASK Register */
+
+/* -------- DAC_STATUS : (DAC Offset: 0x7) (R/   8) Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :7;               /*!< bit:  0.. 6  Reserved                           */
+    uint8_t  SYNCBUSY:1;       /*!< bit:      7  Synchronization Busy Status        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DAC_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DAC_STATUS_OFFSET           0x7          /**< \brief (DAC_STATUS offset) Status */
+#define DAC_STATUS_RESETVALUE       0x00         /**< \brief (DAC_STATUS reset_value) Status */
+
+#define DAC_STATUS_SYNCBUSY_Pos     7            /**< \brief (DAC_STATUS) Synchronization Busy Status */
+#define DAC_STATUS_SYNCBUSY         (0x1u << DAC_STATUS_SYNCBUSY_Pos)
+#define DAC_STATUS_MASK             0x80u        /**< \brief (DAC_STATUS) MASK Register */
+
+/* -------- DAC_DATA : (DAC Offset: 0x8) (R/W 16) Data -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t DATA:16;          /*!< bit:  0..15  Data value to be converted         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} DAC_DATA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DAC_DATA_OFFSET             0x8          /**< \brief (DAC_DATA offset) Data */
+#define DAC_DATA_RESETVALUE         0x0000       /**< \brief (DAC_DATA reset_value) Data */
+
+#define DAC_DATA_DATA_Pos           0            /**< \brief (DAC_DATA) Data value to be converted */
+#define DAC_DATA_DATA_Msk           (0xFFFFu << DAC_DATA_DATA_Pos)
+#define DAC_DATA_DATA(value)        ((DAC_DATA_DATA_Msk & ((value) << DAC_DATA_DATA_Pos)))
+#define DAC_DATA_MASK               0xFFFFu      /**< \brief (DAC_DATA) MASK Register */
+
+/* -------- DAC_DATABUF : (DAC Offset: 0xC) (R/W 16) Data Buffer -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t DATABUF:16;       /*!< bit:  0..15  Data Buffer                        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} DAC_DATABUF_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DAC_DATABUF_OFFSET          0xC          /**< \brief (DAC_DATABUF offset) Data Buffer */
+#define DAC_DATABUF_RESETVALUE      0x0000       /**< \brief (DAC_DATABUF reset_value) Data Buffer */
+
+#define DAC_DATABUF_DATABUF_Pos     0            /**< \brief (DAC_DATABUF) Data Buffer */
+#define DAC_DATABUF_DATABUF_Msk     (0xFFFFu << DAC_DATABUF_DATABUF_Pos)
+#define DAC_DATABUF_DATABUF(value)  ((DAC_DATABUF_DATABUF_Msk & ((value) << DAC_DATABUF_DATABUF_Pos)))
+#define DAC_DATABUF_MASK            0xFFFFu      /**< \brief (DAC_DATABUF) MASK Register */
+
+/** \brief DAC hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO DAC_CTRLA_Type            CTRLA;       /**< \brief Offset: 0x0 (R/W  8) Control A */
+  __IO DAC_CTRLB_Type            CTRLB;       /**< \brief Offset: 0x1 (R/W  8) Control B */
+  __IO DAC_EVCTRL_Type           EVCTRL;      /**< \brief Offset: 0x2 (R/W  8) Event Control */
+       RoReg8                    Reserved1[0x1];
+  __IO DAC_INTENCLR_Type         INTENCLR;    /**< \brief Offset: 0x4 (R/W  8) Interrupt Enable Clear */
+  __IO DAC_INTENSET_Type         INTENSET;    /**< \brief Offset: 0x5 (R/W  8) Interrupt Enable Set */
+  __IO DAC_INTFLAG_Type          INTFLAG;     /**< \brief Offset: 0x6 (R/W  8) Interrupt Flag Status and Clear */
+  __I  DAC_STATUS_Type           STATUS;      /**< \brief Offset: 0x7 (R/   8) Status */
+  __IO DAC_DATA_Type             DATA;        /**< \brief Offset: 0x8 (R/W 16) Data */
+       RoReg8                    Reserved2[0x2];
+  __IO DAC_DATABUF_Type          DATABUF;     /**< \brief Offset: 0xC (R/W 16) Data Buffer */
+} Dac;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_DAC_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/dmac.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/dmac.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/dmac.h	(revision 136)
@@ -0,0 +1,1033 @@
+/**
+ * \file
+ *
+ * \brief Component description for DMAC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_DMAC_COMPONENT_
+#define _SAMD21_DMAC_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR DMAC */
+/* ========================================================================== */
+/** \addtogroup SAMD21_DMAC Direct Memory Access Controller */
+/*@{*/
+
+#define DMAC_U2223
+#define REV_DMAC                    0x100
+
+/* -------- DMAC_CTRL : (DMAC Offset: 0x00) (R/W 16) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint16_t DMAENABLE:1;      /*!< bit:      1  DMA Enable                         */
+    uint16_t CRCENABLE:1;      /*!< bit:      2  CRC Enable                         */
+    uint16_t :5;               /*!< bit:  3.. 7  Reserved                           */
+    uint16_t LVLEN0:1;         /*!< bit:      8  Priority Level 0 Enable            */
+    uint16_t LVLEN1:1;         /*!< bit:      9  Priority Level 1 Enable            */
+    uint16_t LVLEN2:1;         /*!< bit:     10  Priority Level 2 Enable            */
+    uint16_t LVLEN3:1;         /*!< bit:     11  Priority Level 3 Enable            */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t :8;               /*!< bit:  0.. 7  Reserved                           */
+    uint16_t LVLEN:4;          /*!< bit:  8..11  Priority Level x Enable            */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} DMAC_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CTRL_OFFSET            0x00         /**< \brief (DMAC_CTRL offset) Control */
+#define DMAC_CTRL_RESETVALUE        0x0000       /**< \brief (DMAC_CTRL reset_value) Control */
+
+#define DMAC_CTRL_SWRST_Pos         0            /**< \brief (DMAC_CTRL) Software Reset */
+#define DMAC_CTRL_SWRST             (0x1u << DMAC_CTRL_SWRST_Pos)
+#define DMAC_CTRL_DMAENABLE_Pos     1            /**< \brief (DMAC_CTRL) DMA Enable */
+#define DMAC_CTRL_DMAENABLE         (0x1u << DMAC_CTRL_DMAENABLE_Pos)
+#define DMAC_CTRL_CRCENABLE_Pos     2            /**< \brief (DMAC_CTRL) CRC Enable */
+#define DMAC_CTRL_CRCENABLE         (0x1u << DMAC_CTRL_CRCENABLE_Pos)
+#define DMAC_CTRL_LVLEN0_Pos        8            /**< \brief (DMAC_CTRL) Priority Level 0 Enable */
+#define DMAC_CTRL_LVLEN0            (1 << DMAC_CTRL_LVLEN0_Pos)
+#define DMAC_CTRL_LVLEN1_Pos        9            /**< \brief (DMAC_CTRL) Priority Level 1 Enable */
+#define DMAC_CTRL_LVLEN1            (1 << DMAC_CTRL_LVLEN1_Pos)
+#define DMAC_CTRL_LVLEN2_Pos        10           /**< \brief (DMAC_CTRL) Priority Level 2 Enable */
+#define DMAC_CTRL_LVLEN2            (1 << DMAC_CTRL_LVLEN2_Pos)
+#define DMAC_CTRL_LVLEN3_Pos        11           /**< \brief (DMAC_CTRL) Priority Level 3 Enable */
+#define DMAC_CTRL_LVLEN3            (1 << DMAC_CTRL_LVLEN3_Pos)
+#define DMAC_CTRL_LVLEN_Pos         8            /**< \brief (DMAC_CTRL) Priority Level x Enable */
+#define DMAC_CTRL_LVLEN_Msk         (0xFu << DMAC_CTRL_LVLEN_Pos)
+#define DMAC_CTRL_LVLEN(value)      ((DMAC_CTRL_LVLEN_Msk & ((value) << DMAC_CTRL_LVLEN_Pos)))
+#define DMAC_CTRL_MASK              0x0F07u      /**< \brief (DMAC_CTRL) MASK Register */
+
+/* -------- DMAC_CRCCTRL : (DMAC Offset: 0x02) (R/W 16) CRC Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t CRCBEATSIZE:2;    /*!< bit:  0.. 1  CRC Beat Size                      */
+    uint16_t CRCPOLY:2;        /*!< bit:  2.. 3  CRC Polynomial Type                */
+    uint16_t :4;               /*!< bit:  4.. 7  Reserved                           */
+    uint16_t CRCSRC:6;         /*!< bit:  8..13  CRC Input Source                   */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} DMAC_CRCCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CRCCTRL_OFFSET         0x02         /**< \brief (DMAC_CRCCTRL offset) CRC Control */
+#define DMAC_CRCCTRL_RESETVALUE     0x0000       /**< \brief (DMAC_CRCCTRL reset_value) CRC Control */
+
+#define DMAC_CRCCTRL_CRCBEATSIZE_Pos 0            /**< \brief (DMAC_CRCCTRL) CRC Beat Size */
+#define DMAC_CRCCTRL_CRCBEATSIZE_Msk (0x3u << DMAC_CRCCTRL_CRCBEATSIZE_Pos)
+#define DMAC_CRCCTRL_CRCBEATSIZE(value) ((DMAC_CRCCTRL_CRCBEATSIZE_Msk & ((value) << DMAC_CRCCTRL_CRCBEATSIZE_Pos)))
+#define   DMAC_CRCCTRL_CRCBEATSIZE_BYTE_Val 0x0u   /**< \brief (DMAC_CRCCTRL) Byte bus access */
+#define   DMAC_CRCCTRL_CRCBEATSIZE_HWORD_Val 0x1u   /**< \brief (DMAC_CRCCTRL) Half-word bus access */
+#define   DMAC_CRCCTRL_CRCBEATSIZE_WORD_Val 0x2u   /**< \brief (DMAC_CRCCTRL) Word bus access */
+#define DMAC_CRCCTRL_CRCBEATSIZE_BYTE (DMAC_CRCCTRL_CRCBEATSIZE_BYTE_Val << DMAC_CRCCTRL_CRCBEATSIZE_Pos)
+#define DMAC_CRCCTRL_CRCBEATSIZE_HWORD (DMAC_CRCCTRL_CRCBEATSIZE_HWORD_Val << DMAC_CRCCTRL_CRCBEATSIZE_Pos)
+#define DMAC_CRCCTRL_CRCBEATSIZE_WORD (DMAC_CRCCTRL_CRCBEATSIZE_WORD_Val << DMAC_CRCCTRL_CRCBEATSIZE_Pos)
+#define DMAC_CRCCTRL_CRCPOLY_Pos    2            /**< \brief (DMAC_CRCCTRL) CRC Polynomial Type */
+#define DMAC_CRCCTRL_CRCPOLY_Msk    (0x3u << DMAC_CRCCTRL_CRCPOLY_Pos)
+#define DMAC_CRCCTRL_CRCPOLY(value) ((DMAC_CRCCTRL_CRCPOLY_Msk & ((value) << DMAC_CRCCTRL_CRCPOLY_Pos)))
+#define   DMAC_CRCCTRL_CRCPOLY_CRC16_Val  0x0u   /**< \brief (DMAC_CRCCTRL) CRC-16 (CRC-CCITT) */
+#define   DMAC_CRCCTRL_CRCPOLY_CRC32_Val  0x1u   /**< \brief (DMAC_CRCCTRL) CRC32 (IEEE 802.3) */
+#define DMAC_CRCCTRL_CRCPOLY_CRC16  (DMAC_CRCCTRL_CRCPOLY_CRC16_Val << DMAC_CRCCTRL_CRCPOLY_Pos)
+#define DMAC_CRCCTRL_CRCPOLY_CRC32  (DMAC_CRCCTRL_CRCPOLY_CRC32_Val << DMAC_CRCCTRL_CRCPOLY_Pos)
+#define DMAC_CRCCTRL_CRCSRC_Pos     8            /**< \brief (DMAC_CRCCTRL) CRC Input Source */
+#define DMAC_CRCCTRL_CRCSRC_Msk     (0x3Fu << DMAC_CRCCTRL_CRCSRC_Pos)
+#define DMAC_CRCCTRL_CRCSRC(value)  ((DMAC_CRCCTRL_CRCSRC_Msk & ((value) << DMAC_CRCCTRL_CRCSRC_Pos)))
+#define   DMAC_CRCCTRL_CRCSRC_NOACT_Val   0x0u   /**< \brief (DMAC_CRCCTRL) No action */
+#define   DMAC_CRCCTRL_CRCSRC_IO_Val      0x1u   /**< \brief (DMAC_CRCCTRL) I/O interface */
+#define DMAC_CRCCTRL_CRCSRC_NOACT   (DMAC_CRCCTRL_CRCSRC_NOACT_Val << DMAC_CRCCTRL_CRCSRC_Pos)
+#define DMAC_CRCCTRL_CRCSRC_IO      (DMAC_CRCCTRL_CRCSRC_IO_Val    << DMAC_CRCCTRL_CRCSRC_Pos)
+#define DMAC_CRCCTRL_MASK           0x3F0Fu      /**< \brief (DMAC_CRCCTRL) MASK Register */
+
+/* -------- DMAC_CRCDATAIN : (DMAC Offset: 0x04) (R/W 32) CRC Data Input -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CRCDATAIN:32;     /*!< bit:  0..31  CRC Data Input                     */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_CRCDATAIN_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CRCDATAIN_OFFSET       0x04         /**< \brief (DMAC_CRCDATAIN offset) CRC Data Input */
+#define DMAC_CRCDATAIN_RESETVALUE   0x00000000   /**< \brief (DMAC_CRCDATAIN reset_value) CRC Data Input */
+
+#define DMAC_CRCDATAIN_CRCDATAIN_Pos 0            /**< \brief (DMAC_CRCDATAIN) CRC Data Input */
+#define DMAC_CRCDATAIN_CRCDATAIN_Msk (0xFFFFFFFFu << DMAC_CRCDATAIN_CRCDATAIN_Pos)
+#define DMAC_CRCDATAIN_CRCDATAIN(value) ((DMAC_CRCDATAIN_CRCDATAIN_Msk & ((value) << DMAC_CRCDATAIN_CRCDATAIN_Pos)))
+#define DMAC_CRCDATAIN_MASK         0xFFFFFFFFu  /**< \brief (DMAC_CRCDATAIN) MASK Register */
+
+/* -------- DMAC_CRCCHKSUM : (DMAC Offset: 0x08) (R/W 32) CRC Checksum -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CRCCHKSUM:32;     /*!< bit:  0..31  CRC Checksum                       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_CRCCHKSUM_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CRCCHKSUM_OFFSET       0x08         /**< \brief (DMAC_CRCCHKSUM offset) CRC Checksum */
+#define DMAC_CRCCHKSUM_RESETVALUE   0x00000000   /**< \brief (DMAC_CRCCHKSUM reset_value) CRC Checksum */
+
+#define DMAC_CRCCHKSUM_CRCCHKSUM_Pos 0            /**< \brief (DMAC_CRCCHKSUM) CRC Checksum */
+#define DMAC_CRCCHKSUM_CRCCHKSUM_Msk (0xFFFFFFFFu << DMAC_CRCCHKSUM_CRCCHKSUM_Pos)
+#define DMAC_CRCCHKSUM_CRCCHKSUM(value) ((DMAC_CRCCHKSUM_CRCCHKSUM_Msk & ((value) << DMAC_CRCCHKSUM_CRCCHKSUM_Pos)))
+#define DMAC_CRCCHKSUM_MASK         0xFFFFFFFFu  /**< \brief (DMAC_CRCCHKSUM) MASK Register */
+
+/* -------- DMAC_CRCSTATUS : (DMAC Offset: 0x0C) (R/W  8) CRC Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CRCBUSY:1;        /*!< bit:      0  CRC Module Busy                    */
+    uint8_t  CRCZERO:1;        /*!< bit:      1  CRC Zero                           */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DMAC_CRCSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CRCSTATUS_OFFSET       0x0C         /**< \brief (DMAC_CRCSTATUS offset) CRC Status */
+#define DMAC_CRCSTATUS_RESETVALUE   0x00         /**< \brief (DMAC_CRCSTATUS reset_value) CRC Status */
+
+#define DMAC_CRCSTATUS_CRCBUSY_Pos  0            /**< \brief (DMAC_CRCSTATUS) CRC Module Busy */
+#define DMAC_CRCSTATUS_CRCBUSY      (0x1u << DMAC_CRCSTATUS_CRCBUSY_Pos)
+#define DMAC_CRCSTATUS_CRCZERO_Pos  1            /**< \brief (DMAC_CRCSTATUS) CRC Zero */
+#define DMAC_CRCSTATUS_CRCZERO      (0x1u << DMAC_CRCSTATUS_CRCZERO_Pos)
+#define DMAC_CRCSTATUS_MASK         0x03u        /**< \brief (DMAC_CRCSTATUS) MASK Register */
+
+/* -------- DMAC_DBGCTRL : (DMAC Offset: 0x0D) (R/W  8) Debug Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DBGRUN:1;         /*!< bit:      0  Debug Run                          */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DMAC_DBGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_DBGCTRL_OFFSET         0x0D         /**< \brief (DMAC_DBGCTRL offset) Debug Control */
+#define DMAC_DBGCTRL_RESETVALUE     0x00         /**< \brief (DMAC_DBGCTRL reset_value) Debug Control */
+
+#define DMAC_DBGCTRL_DBGRUN_Pos     0            /**< \brief (DMAC_DBGCTRL) Debug Run */
+#define DMAC_DBGCTRL_DBGRUN         (0x1u << DMAC_DBGCTRL_DBGRUN_Pos)
+#define DMAC_DBGCTRL_MASK           0x01u        /**< \brief (DMAC_DBGCTRL) MASK Register */
+
+/* -------- DMAC_SWTRIGCTRL : (DMAC Offset: 0x10) (R/W 32) Software Trigger Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWTRIG0:1;        /*!< bit:      0  Channel 0 Software Trigger         */
+    uint32_t SWTRIG1:1;        /*!< bit:      1  Channel 1 Software Trigger         */
+    uint32_t SWTRIG2:1;        /*!< bit:      2  Channel 2 Software Trigger         */
+    uint32_t SWTRIG3:1;        /*!< bit:      3  Channel 3 Software Trigger         */
+    uint32_t SWTRIG4:1;        /*!< bit:      4  Channel 4 Software Trigger         */
+    uint32_t SWTRIG5:1;        /*!< bit:      5  Channel 5 Software Trigger         */
+    uint32_t SWTRIG6:1;        /*!< bit:      6  Channel 6 Software Trigger         */
+    uint32_t SWTRIG7:1;        /*!< bit:      7  Channel 7 Software Trigger         */
+    uint32_t SWTRIG8:1;        /*!< bit:      8  Channel 8 Software Trigger         */
+    uint32_t SWTRIG9:1;        /*!< bit:      9  Channel 9 Software Trigger         */
+    uint32_t SWTRIG10:1;       /*!< bit:     10  Channel 10 Software Trigger        */
+    uint32_t SWTRIG11:1;       /*!< bit:     11  Channel 11 Software Trigger        */
+    uint32_t :20;              /*!< bit: 12..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t SWTRIG:12;        /*!< bit:  0..11  Channel x Software Trigger         */
+    uint32_t :20;              /*!< bit: 12..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_SWTRIGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_SWTRIGCTRL_OFFSET      0x10         /**< \brief (DMAC_SWTRIGCTRL offset) Software Trigger Control */
+#define DMAC_SWTRIGCTRL_RESETVALUE  0x00000000   /**< \brief (DMAC_SWTRIGCTRL reset_value) Software Trigger Control */
+
+#define DMAC_SWTRIGCTRL_SWTRIG0_Pos 0            /**< \brief (DMAC_SWTRIGCTRL) Channel 0 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG0     (1 << DMAC_SWTRIGCTRL_SWTRIG0_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG1_Pos 1            /**< \brief (DMAC_SWTRIGCTRL) Channel 1 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG1     (1 << DMAC_SWTRIGCTRL_SWTRIG1_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG2_Pos 2            /**< \brief (DMAC_SWTRIGCTRL) Channel 2 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG2     (1 << DMAC_SWTRIGCTRL_SWTRIG2_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG3_Pos 3            /**< \brief (DMAC_SWTRIGCTRL) Channel 3 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG3     (1 << DMAC_SWTRIGCTRL_SWTRIG3_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG4_Pos 4            /**< \brief (DMAC_SWTRIGCTRL) Channel 4 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG4     (1 << DMAC_SWTRIGCTRL_SWTRIG4_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG5_Pos 5            /**< \brief (DMAC_SWTRIGCTRL) Channel 5 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG5     (1 << DMAC_SWTRIGCTRL_SWTRIG5_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG6_Pos 6            /**< \brief (DMAC_SWTRIGCTRL) Channel 6 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG6     (1 << DMAC_SWTRIGCTRL_SWTRIG6_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG7_Pos 7            /**< \brief (DMAC_SWTRIGCTRL) Channel 7 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG7     (1 << DMAC_SWTRIGCTRL_SWTRIG7_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG8_Pos 8            /**< \brief (DMAC_SWTRIGCTRL) Channel 8 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG8     (1 << DMAC_SWTRIGCTRL_SWTRIG8_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG9_Pos 9            /**< \brief (DMAC_SWTRIGCTRL) Channel 9 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG9     (1 << DMAC_SWTRIGCTRL_SWTRIG9_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG10_Pos 10           /**< \brief (DMAC_SWTRIGCTRL) Channel 10 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG10    (1 << DMAC_SWTRIGCTRL_SWTRIG10_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG11_Pos 11           /**< \brief (DMAC_SWTRIGCTRL) Channel 11 Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG11    (1 << DMAC_SWTRIGCTRL_SWTRIG11_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG_Pos  0            /**< \brief (DMAC_SWTRIGCTRL) Channel x Software Trigger */
+#define DMAC_SWTRIGCTRL_SWTRIG_Msk  (0xFFFu << DMAC_SWTRIGCTRL_SWTRIG_Pos)
+#define DMAC_SWTRIGCTRL_SWTRIG(value) ((DMAC_SWTRIGCTRL_SWTRIG_Msk & ((value) << DMAC_SWTRIGCTRL_SWTRIG_Pos)))
+#define DMAC_SWTRIGCTRL_MASK        0x00000FFFu  /**< \brief (DMAC_SWTRIGCTRL) MASK Register */
+
+/* -------- DMAC_PRICTRL0 : (DMAC Offset: 0x14) (R/W 32) Priority Control 0 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t LVLPRI0:4;        /*!< bit:  0.. 3  Level 0 Channel Priority Number    */
+    uint32_t :3;               /*!< bit:  4.. 6  Reserved                           */
+    uint32_t RRLVLEN0:1;       /*!< bit:      7  Level 0 Round-Robin Scheduling Enable */
+    uint32_t LVLPRI1:4;        /*!< bit:  8..11  Level 1 Channel Priority Number    */
+    uint32_t :3;               /*!< bit: 12..14  Reserved                           */
+    uint32_t RRLVLEN1:1;       /*!< bit:     15  Level 1 Round-Robin Scheduling Enable */
+    uint32_t LVLPRI2:4;        /*!< bit: 16..19  Level 2 Channel Priority Number    */
+    uint32_t :3;               /*!< bit: 20..22  Reserved                           */
+    uint32_t RRLVLEN2:1;       /*!< bit:     23  Level 2 Round-Robin Scheduling Enable */
+    uint32_t LVLPRI3:4;        /*!< bit: 24..27  Level 3 Channel Priority Number    */
+    uint32_t :3;               /*!< bit: 28..30  Reserved                           */
+    uint32_t RRLVLEN3:1;       /*!< bit:     31  Level 3 Round-Robin Scheduling Enable */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_PRICTRL0_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_PRICTRL0_OFFSET        0x14         /**< \brief (DMAC_PRICTRL0 offset) Priority Control 0 */
+#define DMAC_PRICTRL0_RESETVALUE    0x00000000   /**< \brief (DMAC_PRICTRL0 reset_value) Priority Control 0 */
+
+#define DMAC_PRICTRL0_LVLPRI0_Pos   0            /**< \brief (DMAC_PRICTRL0) Level 0 Channel Priority Number */
+#define DMAC_PRICTRL0_LVLPRI0_Msk   (0xFu << DMAC_PRICTRL0_LVLPRI0_Pos)
+#define DMAC_PRICTRL0_LVLPRI0(value) ((DMAC_PRICTRL0_LVLPRI0_Msk & ((value) << DMAC_PRICTRL0_LVLPRI0_Pos)))
+#define DMAC_PRICTRL0_RRLVLEN0_Pos  7            /**< \brief (DMAC_PRICTRL0) Level 0 Round-Robin Scheduling Enable */
+#define DMAC_PRICTRL0_RRLVLEN0      (0x1u << DMAC_PRICTRL0_RRLVLEN0_Pos)
+#define DMAC_PRICTRL0_LVLPRI1_Pos   8            /**< \brief (DMAC_PRICTRL0) Level 1 Channel Priority Number */
+#define DMAC_PRICTRL0_LVLPRI1_Msk   (0xFu << DMAC_PRICTRL0_LVLPRI1_Pos)
+#define DMAC_PRICTRL0_LVLPRI1(value) ((DMAC_PRICTRL0_LVLPRI1_Msk & ((value) << DMAC_PRICTRL0_LVLPRI1_Pos)))
+#define DMAC_PRICTRL0_RRLVLEN1_Pos  15           /**< \brief (DMAC_PRICTRL0) Level 1 Round-Robin Scheduling Enable */
+#define DMAC_PRICTRL0_RRLVLEN1      (0x1u << DMAC_PRICTRL0_RRLVLEN1_Pos)
+#define DMAC_PRICTRL0_LVLPRI2_Pos   16           /**< \brief (DMAC_PRICTRL0) Level 2 Channel Priority Number */
+#define DMAC_PRICTRL0_LVLPRI2_Msk   (0xFu << DMAC_PRICTRL0_LVLPRI2_Pos)
+#define DMAC_PRICTRL0_LVLPRI2(value) ((DMAC_PRICTRL0_LVLPRI2_Msk & ((value) << DMAC_PRICTRL0_LVLPRI2_Pos)))
+#define DMAC_PRICTRL0_RRLVLEN2_Pos  23           /**< \brief (DMAC_PRICTRL0) Level 2 Round-Robin Scheduling Enable */
+#define DMAC_PRICTRL0_RRLVLEN2      (0x1u << DMAC_PRICTRL0_RRLVLEN2_Pos)
+#define DMAC_PRICTRL0_LVLPRI3_Pos   24           /**< \brief (DMAC_PRICTRL0) Level 3 Channel Priority Number */
+#define DMAC_PRICTRL0_LVLPRI3_Msk   (0xFu << DMAC_PRICTRL0_LVLPRI3_Pos)
+#define DMAC_PRICTRL0_LVLPRI3(value) ((DMAC_PRICTRL0_LVLPRI3_Msk & ((value) << DMAC_PRICTRL0_LVLPRI3_Pos)))
+#define DMAC_PRICTRL0_RRLVLEN3_Pos  31           /**< \brief (DMAC_PRICTRL0) Level 3 Round-Robin Scheduling Enable */
+#define DMAC_PRICTRL0_RRLVLEN3      (0x1u << DMAC_PRICTRL0_RRLVLEN3_Pos)
+#define DMAC_PRICTRL0_MASK          0x8F8F8F8Fu  /**< \brief (DMAC_PRICTRL0) MASK Register */
+
+/* -------- DMAC_INTPEND : (DMAC Offset: 0x20) (R/W 16) Interrupt Pending -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t ID:4;             /*!< bit:  0.. 3  Channel ID                         */
+    uint16_t :4;               /*!< bit:  4.. 7  Reserved                           */
+    uint16_t TERR:1;           /*!< bit:      8  Transfer Error                     */
+    uint16_t TCMPL:1;          /*!< bit:      9  Transfer Complete                  */
+    uint16_t SUSP:1;           /*!< bit:     10  Channel Suspend                    */
+    uint16_t :2;               /*!< bit: 11..12  Reserved                           */
+    uint16_t FERR:1;           /*!< bit:     13  Fetch Error                        */
+    uint16_t BUSY:1;           /*!< bit:     14  Busy                               */
+    uint16_t PEND:1;           /*!< bit:     15  Pending                            */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} DMAC_INTPEND_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_INTPEND_OFFSET         0x20         /**< \brief (DMAC_INTPEND offset) Interrupt Pending */
+#define DMAC_INTPEND_RESETVALUE     0x0000       /**< \brief (DMAC_INTPEND reset_value) Interrupt Pending */
+
+#define DMAC_INTPEND_ID_Pos         0            /**< \brief (DMAC_INTPEND) Channel ID */
+#define DMAC_INTPEND_ID_Msk         (0xFu << DMAC_INTPEND_ID_Pos)
+#define DMAC_INTPEND_ID(value)      ((DMAC_INTPEND_ID_Msk & ((value) << DMAC_INTPEND_ID_Pos)))
+#define DMAC_INTPEND_TERR_Pos       8            /**< \brief (DMAC_INTPEND) Transfer Error */
+#define DMAC_INTPEND_TERR           (0x1u << DMAC_INTPEND_TERR_Pos)
+#define DMAC_INTPEND_TCMPL_Pos      9            /**< \brief (DMAC_INTPEND) Transfer Complete */
+#define DMAC_INTPEND_TCMPL          (0x1u << DMAC_INTPEND_TCMPL_Pos)
+#define DMAC_INTPEND_SUSP_Pos       10           /**< \brief (DMAC_INTPEND) Channel Suspend */
+#define DMAC_INTPEND_SUSP           (0x1u << DMAC_INTPEND_SUSP_Pos)
+#define DMAC_INTPEND_FERR_Pos       13           /**< \brief (DMAC_INTPEND) Fetch Error */
+#define DMAC_INTPEND_FERR           (0x1u << DMAC_INTPEND_FERR_Pos)
+#define DMAC_INTPEND_BUSY_Pos       14           /**< \brief (DMAC_INTPEND) Busy */
+#define DMAC_INTPEND_BUSY           (0x1u << DMAC_INTPEND_BUSY_Pos)
+#define DMAC_INTPEND_PEND_Pos       15           /**< \brief (DMAC_INTPEND) Pending */
+#define DMAC_INTPEND_PEND           (0x1u << DMAC_INTPEND_PEND_Pos)
+#define DMAC_INTPEND_MASK           0xE70Fu      /**< \brief (DMAC_INTPEND) MASK Register */
+
+/* -------- DMAC_INTSTATUS : (DMAC Offset: 0x24) (R/  32) Interrupt Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CHINT0:1;         /*!< bit:      0  Channel 0 Pending Interrupt        */
+    uint32_t CHINT1:1;         /*!< bit:      1  Channel 1 Pending Interrupt        */
+    uint32_t CHINT2:1;         /*!< bit:      2  Channel 2 Pending Interrupt        */
+    uint32_t CHINT3:1;         /*!< bit:      3  Channel 3 Pending Interrupt        */
+    uint32_t CHINT4:1;         /*!< bit:      4  Channel 4 Pending Interrupt        */
+    uint32_t CHINT5:1;         /*!< bit:      5  Channel 5 Pending Interrupt        */
+    uint32_t CHINT6:1;         /*!< bit:      6  Channel 6 Pending Interrupt        */
+    uint32_t CHINT7:1;         /*!< bit:      7  Channel 7 Pending Interrupt        */
+    uint32_t CHINT8:1;         /*!< bit:      8  Channel 8 Pending Interrupt        */
+    uint32_t CHINT9:1;         /*!< bit:      9  Channel 9 Pending Interrupt        */
+    uint32_t CHINT10:1;        /*!< bit:     10  Channel 10 Pending Interrupt       */
+    uint32_t CHINT11:1;        /*!< bit:     11  Channel 11 Pending Interrupt       */
+    uint32_t :20;              /*!< bit: 12..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t CHINT:12;         /*!< bit:  0..11  Channel x Pending Interrupt        */
+    uint32_t :20;              /*!< bit: 12..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_INTSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_INTSTATUS_OFFSET       0x24         /**< \brief (DMAC_INTSTATUS offset) Interrupt Status */
+#define DMAC_INTSTATUS_RESETVALUE   0x00000000   /**< \brief (DMAC_INTSTATUS reset_value) Interrupt Status */
+
+#define DMAC_INTSTATUS_CHINT0_Pos   0            /**< \brief (DMAC_INTSTATUS) Channel 0 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT0       (1 << DMAC_INTSTATUS_CHINT0_Pos)
+#define DMAC_INTSTATUS_CHINT1_Pos   1            /**< \brief (DMAC_INTSTATUS) Channel 1 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT1       (1 << DMAC_INTSTATUS_CHINT1_Pos)
+#define DMAC_INTSTATUS_CHINT2_Pos   2            /**< \brief (DMAC_INTSTATUS) Channel 2 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT2       (1 << DMAC_INTSTATUS_CHINT2_Pos)
+#define DMAC_INTSTATUS_CHINT3_Pos   3            /**< \brief (DMAC_INTSTATUS) Channel 3 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT3       (1 << DMAC_INTSTATUS_CHINT3_Pos)
+#define DMAC_INTSTATUS_CHINT4_Pos   4            /**< \brief (DMAC_INTSTATUS) Channel 4 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT4       (1 << DMAC_INTSTATUS_CHINT4_Pos)
+#define DMAC_INTSTATUS_CHINT5_Pos   5            /**< \brief (DMAC_INTSTATUS) Channel 5 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT5       (1 << DMAC_INTSTATUS_CHINT5_Pos)
+#define DMAC_INTSTATUS_CHINT6_Pos   6            /**< \brief (DMAC_INTSTATUS) Channel 6 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT6       (1 << DMAC_INTSTATUS_CHINT6_Pos)
+#define DMAC_INTSTATUS_CHINT7_Pos   7            /**< \brief (DMAC_INTSTATUS) Channel 7 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT7       (1 << DMAC_INTSTATUS_CHINT7_Pos)
+#define DMAC_INTSTATUS_CHINT8_Pos   8            /**< \brief (DMAC_INTSTATUS) Channel 8 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT8       (1 << DMAC_INTSTATUS_CHINT8_Pos)
+#define DMAC_INTSTATUS_CHINT9_Pos   9            /**< \brief (DMAC_INTSTATUS) Channel 9 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT9       (1 << DMAC_INTSTATUS_CHINT9_Pos)
+#define DMAC_INTSTATUS_CHINT10_Pos  10           /**< \brief (DMAC_INTSTATUS) Channel 10 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT10      (1 << DMAC_INTSTATUS_CHINT10_Pos)
+#define DMAC_INTSTATUS_CHINT11_Pos  11           /**< \brief (DMAC_INTSTATUS) Channel 11 Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT11      (1 << DMAC_INTSTATUS_CHINT11_Pos)
+#define DMAC_INTSTATUS_CHINT_Pos    0            /**< \brief (DMAC_INTSTATUS) Channel x Pending Interrupt */
+#define DMAC_INTSTATUS_CHINT_Msk    (0xFFFu << DMAC_INTSTATUS_CHINT_Pos)
+#define DMAC_INTSTATUS_CHINT(value) ((DMAC_INTSTATUS_CHINT_Msk & ((value) << DMAC_INTSTATUS_CHINT_Pos)))
+#define DMAC_INTSTATUS_MASK         0x00000FFFu  /**< \brief (DMAC_INTSTATUS) MASK Register */
+
+/* -------- DMAC_BUSYCH : (DMAC Offset: 0x28) (R/  32) Busy Channels -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t BUSYCH0:1;        /*!< bit:      0  Busy Channel 0                     */
+    uint32_t BUSYCH1:1;        /*!< bit:      1  Busy Channel 1                     */
+    uint32_t BUSYCH2:1;        /*!< bit:      2  Busy Channel 2                     */
+    uint32_t BUSYCH3:1;        /*!< bit:      3  Busy Channel 3                     */
+    uint32_t BUSYCH4:1;        /*!< bit:      4  Busy Channel 4                     */
+    uint32_t BUSYCH5:1;        /*!< bit:      5  Busy Channel 5                     */
+    uint32_t BUSYCH6:1;        /*!< bit:      6  Busy Channel 6                     */
+    uint32_t BUSYCH7:1;        /*!< bit:      7  Busy Channel 7                     */
+    uint32_t BUSYCH8:1;        /*!< bit:      8  Busy Channel 8                     */
+    uint32_t BUSYCH9:1;        /*!< bit:      9  Busy Channel 9                     */
+    uint32_t BUSYCH10:1;       /*!< bit:     10  Busy Channel 10                    */
+    uint32_t BUSYCH11:1;       /*!< bit:     11  Busy Channel 11                    */
+    uint32_t :20;              /*!< bit: 12..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t BUSYCH:12;        /*!< bit:  0..11  Busy Channel x                     */
+    uint32_t :20;              /*!< bit: 12..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_BUSYCH_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_BUSYCH_OFFSET          0x28         /**< \brief (DMAC_BUSYCH offset) Busy Channels */
+#define DMAC_BUSYCH_RESETVALUE      0x00000000   /**< \brief (DMAC_BUSYCH reset_value) Busy Channels */
+
+#define DMAC_BUSYCH_BUSYCH0_Pos     0            /**< \brief (DMAC_BUSYCH) Busy Channel 0 */
+#define DMAC_BUSYCH_BUSYCH0         (1 << DMAC_BUSYCH_BUSYCH0_Pos)
+#define DMAC_BUSYCH_BUSYCH1_Pos     1            /**< \brief (DMAC_BUSYCH) Busy Channel 1 */
+#define DMAC_BUSYCH_BUSYCH1         (1 << DMAC_BUSYCH_BUSYCH1_Pos)
+#define DMAC_BUSYCH_BUSYCH2_Pos     2            /**< \brief (DMAC_BUSYCH) Busy Channel 2 */
+#define DMAC_BUSYCH_BUSYCH2         (1 << DMAC_BUSYCH_BUSYCH2_Pos)
+#define DMAC_BUSYCH_BUSYCH3_Pos     3            /**< \brief (DMAC_BUSYCH) Busy Channel 3 */
+#define DMAC_BUSYCH_BUSYCH3         (1 << DMAC_BUSYCH_BUSYCH3_Pos)
+#define DMAC_BUSYCH_BUSYCH4_Pos     4            /**< \brief (DMAC_BUSYCH) Busy Channel 4 */
+#define DMAC_BUSYCH_BUSYCH4         (1 << DMAC_BUSYCH_BUSYCH4_Pos)
+#define DMAC_BUSYCH_BUSYCH5_Pos     5            /**< \brief (DMAC_BUSYCH) Busy Channel 5 */
+#define DMAC_BUSYCH_BUSYCH5         (1 << DMAC_BUSYCH_BUSYCH5_Pos)
+#define DMAC_BUSYCH_BUSYCH6_Pos     6            /**< \brief (DMAC_BUSYCH) Busy Channel 6 */
+#define DMAC_BUSYCH_BUSYCH6         (1 << DMAC_BUSYCH_BUSYCH6_Pos)
+#define DMAC_BUSYCH_BUSYCH7_Pos     7            /**< \brief (DMAC_BUSYCH) Busy Channel 7 */
+#define DMAC_BUSYCH_BUSYCH7         (1 << DMAC_BUSYCH_BUSYCH7_Pos)
+#define DMAC_BUSYCH_BUSYCH8_Pos     8            /**< \brief (DMAC_BUSYCH) Busy Channel 8 */
+#define DMAC_BUSYCH_BUSYCH8         (1 << DMAC_BUSYCH_BUSYCH8_Pos)
+#define DMAC_BUSYCH_BUSYCH9_Pos     9            /**< \brief (DMAC_BUSYCH) Busy Channel 9 */
+#define DMAC_BUSYCH_BUSYCH9         (1 << DMAC_BUSYCH_BUSYCH9_Pos)
+#define DMAC_BUSYCH_BUSYCH10_Pos    10           /**< \brief (DMAC_BUSYCH) Busy Channel 10 */
+#define DMAC_BUSYCH_BUSYCH10        (1 << DMAC_BUSYCH_BUSYCH10_Pos)
+#define DMAC_BUSYCH_BUSYCH11_Pos    11           /**< \brief (DMAC_BUSYCH) Busy Channel 11 */
+#define DMAC_BUSYCH_BUSYCH11        (1 << DMAC_BUSYCH_BUSYCH11_Pos)
+#define DMAC_BUSYCH_BUSYCH_Pos      0            /**< \brief (DMAC_BUSYCH) Busy Channel x */
+#define DMAC_BUSYCH_BUSYCH_Msk      (0xFFFu << DMAC_BUSYCH_BUSYCH_Pos)
+#define DMAC_BUSYCH_BUSYCH(value)   ((DMAC_BUSYCH_BUSYCH_Msk & ((value) << DMAC_BUSYCH_BUSYCH_Pos)))
+#define DMAC_BUSYCH_MASK            0x00000FFFu  /**< \brief (DMAC_BUSYCH) MASK Register */
+
+/* -------- DMAC_PENDCH : (DMAC Offset: 0x2C) (R/  32) Pending Channels -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PENDCH0:1;        /*!< bit:      0  Pending Channel 0                  */
+    uint32_t PENDCH1:1;        /*!< bit:      1  Pending Channel 1                  */
+    uint32_t PENDCH2:1;        /*!< bit:      2  Pending Channel 2                  */
+    uint32_t PENDCH3:1;        /*!< bit:      3  Pending Channel 3                  */
+    uint32_t PENDCH4:1;        /*!< bit:      4  Pending Channel 4                  */
+    uint32_t PENDCH5:1;        /*!< bit:      5  Pending Channel 5                  */
+    uint32_t PENDCH6:1;        /*!< bit:      6  Pending Channel 6                  */
+    uint32_t PENDCH7:1;        /*!< bit:      7  Pending Channel 7                  */
+    uint32_t PENDCH8:1;        /*!< bit:      8  Pending Channel 8                  */
+    uint32_t PENDCH9:1;        /*!< bit:      9  Pending Channel 9                  */
+    uint32_t PENDCH10:1;       /*!< bit:     10  Pending Channel 10                 */
+    uint32_t PENDCH11:1;       /*!< bit:     11  Pending Channel 11                 */
+    uint32_t :20;              /*!< bit: 12..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t PENDCH:12;        /*!< bit:  0..11  Pending Channel x                  */
+    uint32_t :20;              /*!< bit: 12..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_PENDCH_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_PENDCH_OFFSET          0x2C         /**< \brief (DMAC_PENDCH offset) Pending Channels */
+#define DMAC_PENDCH_RESETVALUE      0x00000000   /**< \brief (DMAC_PENDCH reset_value) Pending Channels */
+
+#define DMAC_PENDCH_PENDCH0_Pos     0            /**< \brief (DMAC_PENDCH) Pending Channel 0 */
+#define DMAC_PENDCH_PENDCH0         (1 << DMAC_PENDCH_PENDCH0_Pos)
+#define DMAC_PENDCH_PENDCH1_Pos     1            /**< \brief (DMAC_PENDCH) Pending Channel 1 */
+#define DMAC_PENDCH_PENDCH1         (1 << DMAC_PENDCH_PENDCH1_Pos)
+#define DMAC_PENDCH_PENDCH2_Pos     2            /**< \brief (DMAC_PENDCH) Pending Channel 2 */
+#define DMAC_PENDCH_PENDCH2         (1 << DMAC_PENDCH_PENDCH2_Pos)
+#define DMAC_PENDCH_PENDCH3_Pos     3            /**< \brief (DMAC_PENDCH) Pending Channel 3 */
+#define DMAC_PENDCH_PENDCH3         (1 << DMAC_PENDCH_PENDCH3_Pos)
+#define DMAC_PENDCH_PENDCH4_Pos     4            /**< \brief (DMAC_PENDCH) Pending Channel 4 */
+#define DMAC_PENDCH_PENDCH4         (1 << DMAC_PENDCH_PENDCH4_Pos)
+#define DMAC_PENDCH_PENDCH5_Pos     5            /**< \brief (DMAC_PENDCH) Pending Channel 5 */
+#define DMAC_PENDCH_PENDCH5         (1 << DMAC_PENDCH_PENDCH5_Pos)
+#define DMAC_PENDCH_PENDCH6_Pos     6            /**< \brief (DMAC_PENDCH) Pending Channel 6 */
+#define DMAC_PENDCH_PENDCH6         (1 << DMAC_PENDCH_PENDCH6_Pos)
+#define DMAC_PENDCH_PENDCH7_Pos     7            /**< \brief (DMAC_PENDCH) Pending Channel 7 */
+#define DMAC_PENDCH_PENDCH7         (1 << DMAC_PENDCH_PENDCH7_Pos)
+#define DMAC_PENDCH_PENDCH8_Pos     8            /**< \brief (DMAC_PENDCH) Pending Channel 8 */
+#define DMAC_PENDCH_PENDCH8         (1 << DMAC_PENDCH_PENDCH8_Pos)
+#define DMAC_PENDCH_PENDCH9_Pos     9            /**< \brief (DMAC_PENDCH) Pending Channel 9 */
+#define DMAC_PENDCH_PENDCH9         (1 << DMAC_PENDCH_PENDCH9_Pos)
+#define DMAC_PENDCH_PENDCH10_Pos    10           /**< \brief (DMAC_PENDCH) Pending Channel 10 */
+#define DMAC_PENDCH_PENDCH10        (1 << DMAC_PENDCH_PENDCH10_Pos)
+#define DMAC_PENDCH_PENDCH11_Pos    11           /**< \brief (DMAC_PENDCH) Pending Channel 11 */
+#define DMAC_PENDCH_PENDCH11        (1 << DMAC_PENDCH_PENDCH11_Pos)
+#define DMAC_PENDCH_PENDCH_Pos      0            /**< \brief (DMAC_PENDCH) Pending Channel x */
+#define DMAC_PENDCH_PENDCH_Msk      (0xFFFu << DMAC_PENDCH_PENDCH_Pos)
+#define DMAC_PENDCH_PENDCH(value)   ((DMAC_PENDCH_PENDCH_Msk & ((value) << DMAC_PENDCH_PENDCH_Pos)))
+#define DMAC_PENDCH_MASK            0x00000FFFu  /**< \brief (DMAC_PENDCH) MASK Register */
+
+/* -------- DMAC_ACTIVE : (DMAC Offset: 0x30) (R/  32) Active Channel and Levels -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t LVLEX0:1;         /*!< bit:      0  Level 0 Channel Trigger Request Executing */
+    uint32_t LVLEX1:1;         /*!< bit:      1  Level 1 Channel Trigger Request Executing */
+    uint32_t LVLEX2:1;         /*!< bit:      2  Level 2 Channel Trigger Request Executing */
+    uint32_t LVLEX3:1;         /*!< bit:      3  Level 3 Channel Trigger Request Executing */
+    uint32_t :4;               /*!< bit:  4.. 7  Reserved                           */
+    uint32_t ID:5;             /*!< bit:  8..12  Active Channel ID                  */
+    uint32_t :2;               /*!< bit: 13..14  Reserved                           */
+    uint32_t ABUSY:1;          /*!< bit:     15  Active Channel Busy                */
+    uint32_t BTCNT:16;         /*!< bit: 16..31  Active Channel Block Transfer Count */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t LVLEX:4;          /*!< bit:  0.. 3  Level x Channel Trigger Request Executing */
+    uint32_t :28;              /*!< bit:  4..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_ACTIVE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_ACTIVE_OFFSET          0x30         /**< \brief (DMAC_ACTIVE offset) Active Channel and Levels */
+#define DMAC_ACTIVE_RESETVALUE      0x00000000   /**< \brief (DMAC_ACTIVE reset_value) Active Channel and Levels */
+
+#define DMAC_ACTIVE_LVLEX0_Pos      0            /**< \brief (DMAC_ACTIVE) Level 0 Channel Trigger Request Executing */
+#define DMAC_ACTIVE_LVLEX0          (1 << DMAC_ACTIVE_LVLEX0_Pos)
+#define DMAC_ACTIVE_LVLEX1_Pos      1            /**< \brief (DMAC_ACTIVE) Level 1 Channel Trigger Request Executing */
+#define DMAC_ACTIVE_LVLEX1          (1 << DMAC_ACTIVE_LVLEX1_Pos)
+#define DMAC_ACTIVE_LVLEX2_Pos      2            /**< \brief (DMAC_ACTIVE) Level 2 Channel Trigger Request Executing */
+#define DMAC_ACTIVE_LVLEX2          (1 << DMAC_ACTIVE_LVLEX2_Pos)
+#define DMAC_ACTIVE_LVLEX3_Pos      3            /**< \brief (DMAC_ACTIVE) Level 3 Channel Trigger Request Executing */
+#define DMAC_ACTIVE_LVLEX3          (1 << DMAC_ACTIVE_LVLEX3_Pos)
+#define DMAC_ACTIVE_LVLEX_Pos       0            /**< \brief (DMAC_ACTIVE) Level x Channel Trigger Request Executing */
+#define DMAC_ACTIVE_LVLEX_Msk       (0xFu << DMAC_ACTIVE_LVLEX_Pos)
+#define DMAC_ACTIVE_LVLEX(value)    ((DMAC_ACTIVE_LVLEX_Msk & ((value) << DMAC_ACTIVE_LVLEX_Pos)))
+#define DMAC_ACTIVE_ID_Pos          8            /**< \brief (DMAC_ACTIVE) Active Channel ID */
+#define DMAC_ACTIVE_ID_Msk          (0x1Fu << DMAC_ACTIVE_ID_Pos)
+#define DMAC_ACTIVE_ID(value)       ((DMAC_ACTIVE_ID_Msk & ((value) << DMAC_ACTIVE_ID_Pos)))
+#define DMAC_ACTIVE_ABUSY_Pos       15           /**< \brief (DMAC_ACTIVE) Active Channel Busy */
+#define DMAC_ACTIVE_ABUSY           (0x1u << DMAC_ACTIVE_ABUSY_Pos)
+#define DMAC_ACTIVE_BTCNT_Pos       16           /**< \brief (DMAC_ACTIVE) Active Channel Block Transfer Count */
+#define DMAC_ACTIVE_BTCNT_Msk       (0xFFFFu << DMAC_ACTIVE_BTCNT_Pos)
+#define DMAC_ACTIVE_BTCNT(value)    ((DMAC_ACTIVE_BTCNT_Msk & ((value) << DMAC_ACTIVE_BTCNT_Pos)))
+#define DMAC_ACTIVE_MASK            0xFFFF9F0Fu  /**< \brief (DMAC_ACTIVE) MASK Register */
+
+/* -------- DMAC_BASEADDR : (DMAC Offset: 0x34) (R/W 32) Descriptor Memory Section Base Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t BASEADDR:32;      /*!< bit:  0..31  Descriptor Memory Base Address     */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_BASEADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_BASEADDR_OFFSET        0x34         /**< \brief (DMAC_BASEADDR offset) Descriptor Memory Section Base Address */
+#define DMAC_BASEADDR_RESETVALUE    0x00000000   /**< \brief (DMAC_BASEADDR reset_value) Descriptor Memory Section Base Address */
+
+#define DMAC_BASEADDR_BASEADDR_Pos  0            /**< \brief (DMAC_BASEADDR) Descriptor Memory Base Address */
+#define DMAC_BASEADDR_BASEADDR_Msk  (0xFFFFFFFFu << DMAC_BASEADDR_BASEADDR_Pos)
+#define DMAC_BASEADDR_BASEADDR(value) ((DMAC_BASEADDR_BASEADDR_Msk & ((value) << DMAC_BASEADDR_BASEADDR_Pos)))
+#define DMAC_BASEADDR_MASK          0xFFFFFFFFu  /**< \brief (DMAC_BASEADDR) MASK Register */
+
+/* -------- DMAC_WRBADDR : (DMAC Offset: 0x38) (R/W 32) Write-Back Memory Section Base Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t WRBADDR:32;       /*!< bit:  0..31  Write-Back Memory Base Address     */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_WRBADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_WRBADDR_OFFSET         0x38         /**< \brief (DMAC_WRBADDR offset) Write-Back Memory Section Base Address */
+#define DMAC_WRBADDR_RESETVALUE     0x00000000   /**< \brief (DMAC_WRBADDR reset_value) Write-Back Memory Section Base Address */
+
+#define DMAC_WRBADDR_WRBADDR_Pos    0            /**< \brief (DMAC_WRBADDR) Write-Back Memory Base Address */
+#define DMAC_WRBADDR_WRBADDR_Msk    (0xFFFFFFFFu << DMAC_WRBADDR_WRBADDR_Pos)
+#define DMAC_WRBADDR_WRBADDR(value) ((DMAC_WRBADDR_WRBADDR_Msk & ((value) << DMAC_WRBADDR_WRBADDR_Pos)))
+#define DMAC_WRBADDR_MASK           0xFFFFFFFFu  /**< \brief (DMAC_WRBADDR) MASK Register */
+
+/* -------- DMAC_CHID : (DMAC Offset: 0x3F) (R/W  8) Channel ID -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  ID:4;             /*!< bit:  0.. 3  Channel ID                         */
+    uint8_t  :4;               /*!< bit:  4.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DMAC_CHID_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CHID_OFFSET            0x3F         /**< \brief (DMAC_CHID offset) Channel ID */
+#define DMAC_CHID_RESETVALUE        0x00         /**< \brief (DMAC_CHID reset_value) Channel ID */
+
+#define DMAC_CHID_ID_Pos            0            /**< \brief (DMAC_CHID) Channel ID */
+#define DMAC_CHID_ID_Msk            (0xFu << DMAC_CHID_ID_Pos)
+#define DMAC_CHID_ID(value)         ((DMAC_CHID_ID_Msk & ((value) << DMAC_CHID_ID_Pos)))
+#define DMAC_CHID_MASK              0x0Fu        /**< \brief (DMAC_CHID) MASK Register */
+
+/* -------- DMAC_CHCTRLA : (DMAC Offset: 0x40) (R/W  8) Channel Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Channel Software Reset             */
+    uint8_t  ENABLE:1;         /*!< bit:      1  Channel Enable                     */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DMAC_CHCTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CHCTRLA_OFFSET         0x40         /**< \brief (DMAC_CHCTRLA offset) Channel Control A */
+#define DMAC_CHCTRLA_RESETVALUE     0x00         /**< \brief (DMAC_CHCTRLA reset_value) Channel Control A */
+
+#define DMAC_CHCTRLA_SWRST_Pos      0            /**< \brief (DMAC_CHCTRLA) Channel Software Reset */
+#define DMAC_CHCTRLA_SWRST          (0x1u << DMAC_CHCTRLA_SWRST_Pos)
+#define DMAC_CHCTRLA_ENABLE_Pos     1            /**< \brief (DMAC_CHCTRLA) Channel Enable */
+#define DMAC_CHCTRLA_ENABLE         (0x1u << DMAC_CHCTRLA_ENABLE_Pos)
+#define DMAC_CHCTRLA_MASK           0x03u        /**< \brief (DMAC_CHCTRLA) MASK Register */
+
+/* -------- DMAC_CHCTRLB : (DMAC Offset: 0x44) (R/W 32) Channel Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t EVACT:3;          /*!< bit:  0.. 2  Event Input Action                 */
+    uint32_t EVIE:1;           /*!< bit:      3  Channel Event Input Enable         */
+    uint32_t EVOE:1;           /*!< bit:      4  Channel Event Output Enable        */
+    uint32_t LVL:2;            /*!< bit:  5.. 6  Channel Arbitration Level          */
+    uint32_t :1;               /*!< bit:      7  Reserved                           */
+    uint32_t TRIGSRC:6;        /*!< bit:  8..13  Peripheral Trigger Source          */
+    uint32_t :8;               /*!< bit: 14..21  Reserved                           */
+    uint32_t TRIGACT:2;        /*!< bit: 22..23  Trigger Action                     */
+    uint32_t CMD:2;            /*!< bit: 24..25  Software Command                   */
+    uint32_t :6;               /*!< bit: 26..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_CHCTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CHCTRLB_OFFSET         0x44         /**< \brief (DMAC_CHCTRLB offset) Channel Control B */
+#define DMAC_CHCTRLB_RESETVALUE     0x00000000   /**< \brief (DMAC_CHCTRLB reset_value) Channel Control B */
+
+#define DMAC_CHCTRLB_EVACT_Pos      0            /**< \brief (DMAC_CHCTRLB) Event Input Action */
+#define DMAC_CHCTRLB_EVACT_Msk      (0x7u << DMAC_CHCTRLB_EVACT_Pos)
+#define DMAC_CHCTRLB_EVACT(value)   ((DMAC_CHCTRLB_EVACT_Msk & ((value) << DMAC_CHCTRLB_EVACT_Pos)))
+#define   DMAC_CHCTRLB_EVACT_NOACT_Val    0x0u   /**< \brief (DMAC_CHCTRLB) No action */
+#define   DMAC_CHCTRLB_EVACT_TRIG_Val     0x1u   /**< \brief (DMAC_CHCTRLB) Transfer and periodic transfer trigger */
+#define   DMAC_CHCTRLB_EVACT_CTRIG_Val    0x2u   /**< \brief (DMAC_CHCTRLB) Conditional transfer trigger */
+#define   DMAC_CHCTRLB_EVACT_CBLOCK_Val   0x3u   /**< \brief (DMAC_CHCTRLB) Conditional block transfer */
+#define   DMAC_CHCTRLB_EVACT_SUSPEND_Val  0x4u   /**< \brief (DMAC_CHCTRLB) Channel suspend operation */
+#define   DMAC_CHCTRLB_EVACT_RESUME_Val   0x5u   /**< \brief (DMAC_CHCTRLB) Channel resume operation */
+#define   DMAC_CHCTRLB_EVACT_SSKIP_Val    0x6u   /**< \brief (DMAC_CHCTRLB) Skip next block suspend action */
+#define DMAC_CHCTRLB_EVACT_NOACT    (DMAC_CHCTRLB_EVACT_NOACT_Val  << DMAC_CHCTRLB_EVACT_Pos)
+#define DMAC_CHCTRLB_EVACT_TRIG     (DMAC_CHCTRLB_EVACT_TRIG_Val   << DMAC_CHCTRLB_EVACT_Pos)
+#define DMAC_CHCTRLB_EVACT_CTRIG    (DMAC_CHCTRLB_EVACT_CTRIG_Val  << DMAC_CHCTRLB_EVACT_Pos)
+#define DMAC_CHCTRLB_EVACT_CBLOCK   (DMAC_CHCTRLB_EVACT_CBLOCK_Val << DMAC_CHCTRLB_EVACT_Pos)
+#define DMAC_CHCTRLB_EVACT_SUSPEND  (DMAC_CHCTRLB_EVACT_SUSPEND_Val << DMAC_CHCTRLB_EVACT_Pos)
+#define DMAC_CHCTRLB_EVACT_RESUME   (DMAC_CHCTRLB_EVACT_RESUME_Val << DMAC_CHCTRLB_EVACT_Pos)
+#define DMAC_CHCTRLB_EVACT_SSKIP    (DMAC_CHCTRLB_EVACT_SSKIP_Val  << DMAC_CHCTRLB_EVACT_Pos)
+#define DMAC_CHCTRLB_EVIE_Pos       3            /**< \brief (DMAC_CHCTRLB) Channel Event Input Enable */
+#define DMAC_CHCTRLB_EVIE           (0x1u << DMAC_CHCTRLB_EVIE_Pos)
+#define DMAC_CHCTRLB_EVOE_Pos       4            /**< \brief (DMAC_CHCTRLB) Channel Event Output Enable */
+#define DMAC_CHCTRLB_EVOE           (0x1u << DMAC_CHCTRLB_EVOE_Pos)
+#define DMAC_CHCTRLB_LVL_Pos        5            /**< \brief (DMAC_CHCTRLB) Channel Arbitration Level */
+#define DMAC_CHCTRLB_LVL_Msk        (0x3u << DMAC_CHCTRLB_LVL_Pos)
+#define DMAC_CHCTRLB_LVL(value)     ((DMAC_CHCTRLB_LVL_Msk & ((value) << DMAC_CHCTRLB_LVL_Pos)))
+#define   DMAC_CHCTRLB_LVL_LVL0_Val       0x0u   /**< \brief (DMAC_CHCTRLB) Channel Priority Level 0 */
+#define   DMAC_CHCTRLB_LVL_LVL1_Val       0x1u   /**< \brief (DMAC_CHCTRLB) Channel Priority Level 1 */
+#define   DMAC_CHCTRLB_LVL_LVL2_Val       0x2u   /**< \brief (DMAC_CHCTRLB) Channel Priority Level 2 */
+#define   DMAC_CHCTRLB_LVL_LVL3_Val       0x3u   /**< \brief (DMAC_CHCTRLB) Channel Priority Level 3 */
+#define DMAC_CHCTRLB_LVL_LVL0       (DMAC_CHCTRLB_LVL_LVL0_Val     << DMAC_CHCTRLB_LVL_Pos)
+#define DMAC_CHCTRLB_LVL_LVL1       (DMAC_CHCTRLB_LVL_LVL1_Val     << DMAC_CHCTRLB_LVL_Pos)
+#define DMAC_CHCTRLB_LVL_LVL2       (DMAC_CHCTRLB_LVL_LVL2_Val     << DMAC_CHCTRLB_LVL_Pos)
+#define DMAC_CHCTRLB_LVL_LVL3       (DMAC_CHCTRLB_LVL_LVL3_Val     << DMAC_CHCTRLB_LVL_Pos)
+#define DMAC_CHCTRLB_TRIGSRC_Pos    8            /**< \brief (DMAC_CHCTRLB) Peripheral Trigger Source */
+#define DMAC_CHCTRLB_TRIGSRC_Msk    (0x3Fu << DMAC_CHCTRLB_TRIGSRC_Pos)
+#define DMAC_CHCTRLB_TRIGSRC(value) ((DMAC_CHCTRLB_TRIGSRC_Msk & ((value) << DMAC_CHCTRLB_TRIGSRC_Pos)))
+#define   DMAC_CHCTRLB_TRIGSRC_DISABLE_Val 0x0u   /**< \brief (DMAC_CHCTRLB) Only software/event triggers */
+#define DMAC_CHCTRLB_TRIGSRC_DISABLE (DMAC_CHCTRLB_TRIGSRC_DISABLE_Val << DMAC_CHCTRLB_TRIGSRC_Pos)
+#define DMAC_CHCTRLB_TRIGACT_Pos    22           /**< \brief (DMAC_CHCTRLB) Trigger Action */
+#define DMAC_CHCTRLB_TRIGACT_Msk    (0x3u << DMAC_CHCTRLB_TRIGACT_Pos)
+#define DMAC_CHCTRLB_TRIGACT(value) ((DMAC_CHCTRLB_TRIGACT_Msk & ((value) << DMAC_CHCTRLB_TRIGACT_Pos)))
+#define   DMAC_CHCTRLB_TRIGACT_BLOCK_Val  0x0u   /**< \brief (DMAC_CHCTRLB) One trigger required for each block transfer */
+#define   DMAC_CHCTRLB_TRIGACT_BEAT_Val   0x2u   /**< \brief (DMAC_CHCTRLB) One trigger required for each beat transfer */
+#define   DMAC_CHCTRLB_TRIGACT_TRANSACTION_Val 0x3u   /**< \brief (DMAC_CHCTRLB) One trigger required for each transaction */
+#define DMAC_CHCTRLB_TRIGACT_BLOCK  (DMAC_CHCTRLB_TRIGACT_BLOCK_Val << DMAC_CHCTRLB_TRIGACT_Pos)
+#define DMAC_CHCTRLB_TRIGACT_BEAT   (DMAC_CHCTRLB_TRIGACT_BEAT_Val << DMAC_CHCTRLB_TRIGACT_Pos)
+#define DMAC_CHCTRLB_TRIGACT_TRANSACTION (DMAC_CHCTRLB_TRIGACT_TRANSACTION_Val << DMAC_CHCTRLB_TRIGACT_Pos)
+#define DMAC_CHCTRLB_CMD_Pos        24           /**< \brief (DMAC_CHCTRLB) Software Command */
+#define DMAC_CHCTRLB_CMD_Msk        (0x3u << DMAC_CHCTRLB_CMD_Pos)
+#define DMAC_CHCTRLB_CMD(value)     ((DMAC_CHCTRLB_CMD_Msk & ((value) << DMAC_CHCTRLB_CMD_Pos)))
+#define   DMAC_CHCTRLB_CMD_NOACT_Val      0x0u   /**< \brief (DMAC_CHCTRLB) No action */
+#define   DMAC_CHCTRLB_CMD_SUSPEND_Val    0x1u   /**< \brief (DMAC_CHCTRLB) Channel suspend operation */
+#define   DMAC_CHCTRLB_CMD_RESUME_Val     0x2u   /**< \brief (DMAC_CHCTRLB) Channel resume operation */
+#define DMAC_CHCTRLB_CMD_NOACT      (DMAC_CHCTRLB_CMD_NOACT_Val    << DMAC_CHCTRLB_CMD_Pos)
+#define DMAC_CHCTRLB_CMD_SUSPEND    (DMAC_CHCTRLB_CMD_SUSPEND_Val  << DMAC_CHCTRLB_CMD_Pos)
+#define DMAC_CHCTRLB_CMD_RESUME     (DMAC_CHCTRLB_CMD_RESUME_Val   << DMAC_CHCTRLB_CMD_Pos)
+#define DMAC_CHCTRLB_MASK           0x03C03F7Fu  /**< \brief (DMAC_CHCTRLB) MASK Register */
+
+/* -------- DMAC_CHINTENCLR : (DMAC Offset: 0x4C) (R/W  8) Channel Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  TERR:1;           /*!< bit:      0  Transfer Error Interrupt Enable    */
+    uint8_t  TCMPL:1;          /*!< bit:      1  Transfer Complete Interrupt Enable */
+    uint8_t  SUSP:1;           /*!< bit:      2  Channel Suspend Interrupt Enable   */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DMAC_CHINTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CHINTENCLR_OFFSET      0x4C         /**< \brief (DMAC_CHINTENCLR offset) Channel Interrupt Enable Clear */
+#define DMAC_CHINTENCLR_RESETVALUE  0x00         /**< \brief (DMAC_CHINTENCLR reset_value) Channel Interrupt Enable Clear */
+
+#define DMAC_CHINTENCLR_TERR_Pos    0            /**< \brief (DMAC_CHINTENCLR) Transfer Error Interrupt Enable */
+#define DMAC_CHINTENCLR_TERR        (0x1u << DMAC_CHINTENCLR_TERR_Pos)
+#define DMAC_CHINTENCLR_TCMPL_Pos   1            /**< \brief (DMAC_CHINTENCLR) Transfer Complete Interrupt Enable */
+#define DMAC_CHINTENCLR_TCMPL       (0x1u << DMAC_CHINTENCLR_TCMPL_Pos)
+#define DMAC_CHINTENCLR_SUSP_Pos    2            /**< \brief (DMAC_CHINTENCLR) Channel Suspend Interrupt Enable */
+#define DMAC_CHINTENCLR_SUSP        (0x1u << DMAC_CHINTENCLR_SUSP_Pos)
+#define DMAC_CHINTENCLR_MASK        0x07u        /**< \brief (DMAC_CHINTENCLR) MASK Register */
+
+/* -------- DMAC_CHINTENSET : (DMAC Offset: 0x4D) (R/W  8) Channel Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  TERR:1;           /*!< bit:      0  Transfer Error Interrupt Enable    */
+    uint8_t  TCMPL:1;          /*!< bit:      1  Transfer Complete Interrupt Enable */
+    uint8_t  SUSP:1;           /*!< bit:      2  Channel Suspend Interrupt Enable   */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DMAC_CHINTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CHINTENSET_OFFSET      0x4D         /**< \brief (DMAC_CHINTENSET offset) Channel Interrupt Enable Set */
+#define DMAC_CHINTENSET_RESETVALUE  0x00         /**< \brief (DMAC_CHINTENSET reset_value) Channel Interrupt Enable Set */
+
+#define DMAC_CHINTENSET_TERR_Pos    0            /**< \brief (DMAC_CHINTENSET) Transfer Error Interrupt Enable */
+#define DMAC_CHINTENSET_TERR        (0x1u << DMAC_CHINTENSET_TERR_Pos)
+#define DMAC_CHINTENSET_TCMPL_Pos   1            /**< \brief (DMAC_CHINTENSET) Transfer Complete Interrupt Enable */
+#define DMAC_CHINTENSET_TCMPL       (0x1u << DMAC_CHINTENSET_TCMPL_Pos)
+#define DMAC_CHINTENSET_SUSP_Pos    2            /**< \brief (DMAC_CHINTENSET) Channel Suspend Interrupt Enable */
+#define DMAC_CHINTENSET_SUSP        (0x1u << DMAC_CHINTENSET_SUSP_Pos)
+#define DMAC_CHINTENSET_MASK        0x07u        /**< \brief (DMAC_CHINTENSET) MASK Register */
+
+/* -------- DMAC_CHINTFLAG : (DMAC Offset: 0x4E) (R/W  8) Channel Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  TERR:1;           /*!< bit:      0  Transfer Error                     */
+    uint8_t  TCMPL:1;          /*!< bit:      1  Transfer Complete                  */
+    uint8_t  SUSP:1;           /*!< bit:      2  Channel Suspend                    */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DMAC_CHINTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CHINTFLAG_OFFSET       0x4E         /**< \brief (DMAC_CHINTFLAG offset) Channel Interrupt Flag Status and Clear */
+#define DMAC_CHINTFLAG_RESETVALUE   0x00         /**< \brief (DMAC_CHINTFLAG reset_value) Channel Interrupt Flag Status and Clear */
+
+#define DMAC_CHINTFLAG_TERR_Pos     0            /**< \brief (DMAC_CHINTFLAG) Transfer Error */
+#define DMAC_CHINTFLAG_TERR         (0x1u << DMAC_CHINTFLAG_TERR_Pos)
+#define DMAC_CHINTFLAG_TCMPL_Pos    1            /**< \brief (DMAC_CHINTFLAG) Transfer Complete */
+#define DMAC_CHINTFLAG_TCMPL        (0x1u << DMAC_CHINTFLAG_TCMPL_Pos)
+#define DMAC_CHINTFLAG_SUSP_Pos     2            /**< \brief (DMAC_CHINTFLAG) Channel Suspend */
+#define DMAC_CHINTFLAG_SUSP         (0x1u << DMAC_CHINTFLAG_SUSP_Pos)
+#define DMAC_CHINTFLAG_MASK         0x07u        /**< \brief (DMAC_CHINTFLAG) MASK Register */
+
+/* -------- DMAC_CHSTATUS : (DMAC Offset: 0x4F) (R/   8) Channel Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PEND:1;           /*!< bit:      0  Channel Pending                    */
+    uint8_t  BUSY:1;           /*!< bit:      1  Channel Busy                       */
+    uint8_t  FERR:1;           /*!< bit:      2  Fetch Error                        */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DMAC_CHSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_CHSTATUS_OFFSET        0x4F         /**< \brief (DMAC_CHSTATUS offset) Channel Status */
+#define DMAC_CHSTATUS_RESETVALUE    0x00         /**< \brief (DMAC_CHSTATUS reset_value) Channel Status */
+
+#define DMAC_CHSTATUS_PEND_Pos      0            /**< \brief (DMAC_CHSTATUS) Channel Pending */
+#define DMAC_CHSTATUS_PEND          (0x1u << DMAC_CHSTATUS_PEND_Pos)
+#define DMAC_CHSTATUS_BUSY_Pos      1            /**< \brief (DMAC_CHSTATUS) Channel Busy */
+#define DMAC_CHSTATUS_BUSY          (0x1u << DMAC_CHSTATUS_BUSY_Pos)
+#define DMAC_CHSTATUS_FERR_Pos      2            /**< \brief (DMAC_CHSTATUS) Fetch Error */
+#define DMAC_CHSTATUS_FERR          (0x1u << DMAC_CHSTATUS_FERR_Pos)
+#define DMAC_CHSTATUS_MASK          0x07u        /**< \brief (DMAC_CHSTATUS) MASK Register */
+
+/* -------- DMAC_BTCTRL : (DMAC Offset: 0x00) (R/W 16) Block Transfer Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t VALID:1;          /*!< bit:      0  Descriptor Valid                   */
+    uint16_t EVOSEL:2;         /*!< bit:  1.. 2  Event Output Selection             */
+    uint16_t BLOCKACT:2;       /*!< bit:  3.. 4  Block Action                       */
+    uint16_t :3;               /*!< bit:  5.. 7  Reserved                           */
+    uint16_t BEATSIZE:2;       /*!< bit:  8.. 9  Beat Size                          */
+    uint16_t SRCINC:1;         /*!< bit:     10  Source Address Increment Enable    */
+    uint16_t DSTINC:1;         /*!< bit:     11  Destination Address Increment Enable */
+    uint16_t STEPSEL:1;        /*!< bit:     12  Step Selection                     */
+    uint16_t STEPSIZE:3;       /*!< bit: 13..15  Address Increment Step Size        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} DMAC_BTCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_BTCTRL_OFFSET          0x00         /**< \brief (DMAC_BTCTRL offset) Block Transfer Control */
+
+#define DMAC_BTCTRL_VALID_Pos       0            /**< \brief (DMAC_BTCTRL) Descriptor Valid */
+#define DMAC_BTCTRL_VALID           (0x1u << DMAC_BTCTRL_VALID_Pos)
+#define DMAC_BTCTRL_EVOSEL_Pos      1            /**< \brief (DMAC_BTCTRL) Event Output Selection */
+#define DMAC_BTCTRL_EVOSEL_Msk      (0x3u << DMAC_BTCTRL_EVOSEL_Pos)
+#define DMAC_BTCTRL_EVOSEL(value)   ((DMAC_BTCTRL_EVOSEL_Msk & ((value) << DMAC_BTCTRL_EVOSEL_Pos)))
+#define   DMAC_BTCTRL_EVOSEL_DISABLE_Val  0x0u   /**< \brief (DMAC_BTCTRL) Event generation disabled */
+#define   DMAC_BTCTRL_EVOSEL_BLOCK_Val    0x1u   /**< \brief (DMAC_BTCTRL) Event strobe when block transfer complete */
+#define   DMAC_BTCTRL_EVOSEL_BEAT_Val     0x3u   /**< \brief (DMAC_BTCTRL) Event strobe when beat transfer complete */
+#define DMAC_BTCTRL_EVOSEL_DISABLE  (DMAC_BTCTRL_EVOSEL_DISABLE_Val << DMAC_BTCTRL_EVOSEL_Pos)
+#define DMAC_BTCTRL_EVOSEL_BLOCK    (DMAC_BTCTRL_EVOSEL_BLOCK_Val  << DMAC_BTCTRL_EVOSEL_Pos)
+#define DMAC_BTCTRL_EVOSEL_BEAT     (DMAC_BTCTRL_EVOSEL_BEAT_Val   << DMAC_BTCTRL_EVOSEL_Pos)
+#define DMAC_BTCTRL_BLOCKACT_Pos    3            /**< \brief (DMAC_BTCTRL) Block Action */
+#define DMAC_BTCTRL_BLOCKACT_Msk    (0x3u << DMAC_BTCTRL_BLOCKACT_Pos)
+#define DMAC_BTCTRL_BLOCKACT(value) ((DMAC_BTCTRL_BLOCKACT_Msk & ((value) << DMAC_BTCTRL_BLOCKACT_Pos)))
+#define   DMAC_BTCTRL_BLOCKACT_NOACT_Val  0x0u   /**< \brief (DMAC_BTCTRL) No action */
+#define   DMAC_BTCTRL_BLOCKACT_INT_Val    0x1u   /**< \brief (DMAC_BTCTRL) Channel in normal operation and block interrupt */
+#define   DMAC_BTCTRL_BLOCKACT_SUSPEND_Val 0x2u   /**< \brief (DMAC_BTCTRL) Channel suspend operation is completed */
+#define   DMAC_BTCTRL_BLOCKACT_BOTH_Val   0x3u   /**< \brief (DMAC_BTCTRL) Both channel suspend operation and block interrupt */
+#define DMAC_BTCTRL_BLOCKACT_NOACT  (DMAC_BTCTRL_BLOCKACT_NOACT_Val << DMAC_BTCTRL_BLOCKACT_Pos)
+#define DMAC_BTCTRL_BLOCKACT_INT    (DMAC_BTCTRL_BLOCKACT_INT_Val  << DMAC_BTCTRL_BLOCKACT_Pos)
+#define DMAC_BTCTRL_BLOCKACT_SUSPEND (DMAC_BTCTRL_BLOCKACT_SUSPEND_Val << DMAC_BTCTRL_BLOCKACT_Pos)
+#define DMAC_BTCTRL_BLOCKACT_BOTH   (DMAC_BTCTRL_BLOCKACT_BOTH_Val << DMAC_BTCTRL_BLOCKACT_Pos)
+#define DMAC_BTCTRL_BEATSIZE_Pos    8            /**< \brief (DMAC_BTCTRL) Beat Size */
+#define DMAC_BTCTRL_BEATSIZE_Msk    (0x3u << DMAC_BTCTRL_BEATSIZE_Pos)
+#define DMAC_BTCTRL_BEATSIZE(value) ((DMAC_BTCTRL_BEATSIZE_Msk & ((value) << DMAC_BTCTRL_BEATSIZE_Pos)))
+#define   DMAC_BTCTRL_BEATSIZE_BYTE_Val   0x0u   /**< \brief (DMAC_BTCTRL) 8-bit access */
+#define   DMAC_BTCTRL_BEATSIZE_HWORD_Val  0x1u   /**< \brief (DMAC_BTCTRL) 16-bit access */
+#define   DMAC_BTCTRL_BEATSIZE_WORD_Val   0x2u   /**< \brief (DMAC_BTCTRL) 32-bit access */
+#define DMAC_BTCTRL_BEATSIZE_BYTE   (DMAC_BTCTRL_BEATSIZE_BYTE_Val << DMAC_BTCTRL_BEATSIZE_Pos)
+#define DMAC_BTCTRL_BEATSIZE_HWORD  (DMAC_BTCTRL_BEATSIZE_HWORD_Val << DMAC_BTCTRL_BEATSIZE_Pos)
+#define DMAC_BTCTRL_BEATSIZE_WORD   (DMAC_BTCTRL_BEATSIZE_WORD_Val << DMAC_BTCTRL_BEATSIZE_Pos)
+#define DMAC_BTCTRL_SRCINC_Pos      10           /**< \brief (DMAC_BTCTRL) Source Address Increment Enable */
+#define DMAC_BTCTRL_SRCINC          (0x1u << DMAC_BTCTRL_SRCINC_Pos)
+#define DMAC_BTCTRL_DSTINC_Pos      11           /**< \brief (DMAC_BTCTRL) Destination Address Increment Enable */
+#define DMAC_BTCTRL_DSTINC          (0x1u << DMAC_BTCTRL_DSTINC_Pos)
+#define DMAC_BTCTRL_STEPSEL_Pos     12           /**< \brief (DMAC_BTCTRL) Step Selection */
+#define DMAC_BTCTRL_STEPSEL         (0x1u << DMAC_BTCTRL_STEPSEL_Pos)
+#define   DMAC_BTCTRL_STEPSEL_DST_Val     0x0u   /**< \brief (DMAC_BTCTRL) Step size settings apply to the destination address */
+#define   DMAC_BTCTRL_STEPSEL_SRC_Val     0x1u   /**< \brief (DMAC_BTCTRL) Step size settings apply to the source address */
+#define DMAC_BTCTRL_STEPSEL_DST     (DMAC_BTCTRL_STEPSEL_DST_Val   << DMAC_BTCTRL_STEPSEL_Pos)
+#define DMAC_BTCTRL_STEPSEL_SRC     (DMAC_BTCTRL_STEPSEL_SRC_Val   << DMAC_BTCTRL_STEPSEL_Pos)
+#define DMAC_BTCTRL_STEPSIZE_Pos    13           /**< \brief (DMAC_BTCTRL) Address Increment Step Size */
+#define DMAC_BTCTRL_STEPSIZE_Msk    (0x7u << DMAC_BTCTRL_STEPSIZE_Pos)
+#define DMAC_BTCTRL_STEPSIZE(value) ((DMAC_BTCTRL_STEPSIZE_Msk & ((value) << DMAC_BTCTRL_STEPSIZE_Pos)))
+#define   DMAC_BTCTRL_STEPSIZE_X1_Val     0x0u   /**< \brief (DMAC_BTCTRL) Next ADDR <- ADDR + BEATSIZE * 1 */
+#define   DMAC_BTCTRL_STEPSIZE_X2_Val     0x1u   /**< \brief (DMAC_BTCTRL) Next ADDR <- ADDR + BEATSIZE * 2 */
+#define   DMAC_BTCTRL_STEPSIZE_X4_Val     0x2u   /**< \brief (DMAC_BTCTRL) Next ADDR <- ADDR + BEATSIZE * 4 */
+#define   DMAC_BTCTRL_STEPSIZE_X8_Val     0x3u   /**< \brief (DMAC_BTCTRL) Next ADDR <- ADDR + BEATSIZE * 8 */
+#define   DMAC_BTCTRL_STEPSIZE_X16_Val    0x4u   /**< \brief (DMAC_BTCTRL) Next ADDR <- ADDR + BEATSIZE * 16 */
+#define   DMAC_BTCTRL_STEPSIZE_X32_Val    0x5u   /**< \brief (DMAC_BTCTRL) Next ADDR <- ADDR + BEATSIZE * 32 */
+#define   DMAC_BTCTRL_STEPSIZE_X64_Val    0x6u   /**< \brief (DMAC_BTCTRL) Next ADDR <- ADDR + BEATSIZE * 64 */
+#define   DMAC_BTCTRL_STEPSIZE_X128_Val   0x7u   /**< \brief (DMAC_BTCTRL) Next ADDR <- ADDR + BEATSIZE * 128 */
+#define DMAC_BTCTRL_STEPSIZE_X1     (DMAC_BTCTRL_STEPSIZE_X1_Val   << DMAC_BTCTRL_STEPSIZE_Pos)
+#define DMAC_BTCTRL_STEPSIZE_X2     (DMAC_BTCTRL_STEPSIZE_X2_Val   << DMAC_BTCTRL_STEPSIZE_Pos)
+#define DMAC_BTCTRL_STEPSIZE_X4     (DMAC_BTCTRL_STEPSIZE_X4_Val   << DMAC_BTCTRL_STEPSIZE_Pos)
+#define DMAC_BTCTRL_STEPSIZE_X8     (DMAC_BTCTRL_STEPSIZE_X8_Val   << DMAC_BTCTRL_STEPSIZE_Pos)
+#define DMAC_BTCTRL_STEPSIZE_X16    (DMAC_BTCTRL_STEPSIZE_X16_Val  << DMAC_BTCTRL_STEPSIZE_Pos)
+#define DMAC_BTCTRL_STEPSIZE_X32    (DMAC_BTCTRL_STEPSIZE_X32_Val  << DMAC_BTCTRL_STEPSIZE_Pos)
+#define DMAC_BTCTRL_STEPSIZE_X64    (DMAC_BTCTRL_STEPSIZE_X64_Val  << DMAC_BTCTRL_STEPSIZE_Pos)
+#define DMAC_BTCTRL_STEPSIZE_X128   (DMAC_BTCTRL_STEPSIZE_X128_Val << DMAC_BTCTRL_STEPSIZE_Pos)
+#define DMAC_BTCTRL_MASK            0xFF1Fu      /**< \brief (DMAC_BTCTRL) MASK Register */
+
+/* -------- DMAC_BTCNT : (DMAC Offset: 0x02) (R/W 16) Block Transfer Count -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t BTCNT:16;         /*!< bit:  0..15  Block Transfer Count               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} DMAC_BTCNT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_BTCNT_OFFSET           0x02         /**< \brief (DMAC_BTCNT offset) Block Transfer Count */
+
+#define DMAC_BTCNT_BTCNT_Pos        0            /**< \brief (DMAC_BTCNT) Block Transfer Count */
+#define DMAC_BTCNT_BTCNT_Msk        (0xFFFFu << DMAC_BTCNT_BTCNT_Pos)
+#define DMAC_BTCNT_BTCNT(value)     ((DMAC_BTCNT_BTCNT_Msk & ((value) << DMAC_BTCNT_BTCNT_Pos)))
+#define DMAC_BTCNT_MASK             0xFFFFu      /**< \brief (DMAC_BTCNT) MASK Register */
+
+/* -------- DMAC_SRCADDR : (DMAC Offset: 0x04) (R/W 32) Transfer Source Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SRCADDR:32;       /*!< bit:  0..31  Transfer Source Address            */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_SRCADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_SRCADDR_OFFSET         0x04         /**< \brief (DMAC_SRCADDR offset) Transfer Source Address */
+
+#define DMAC_SRCADDR_SRCADDR_Pos    0            /**< \brief (DMAC_SRCADDR) Transfer Source Address */
+#define DMAC_SRCADDR_SRCADDR_Msk    (0xFFFFFFFFu << DMAC_SRCADDR_SRCADDR_Pos)
+#define DMAC_SRCADDR_SRCADDR(value) ((DMAC_SRCADDR_SRCADDR_Msk & ((value) << DMAC_SRCADDR_SRCADDR_Pos)))
+#define DMAC_SRCADDR_MASK           0xFFFFFFFFu  /**< \brief (DMAC_SRCADDR) MASK Register */
+
+/* -------- DMAC_DSTADDR : (DMAC Offset: 0x08) (R/W 32) Transfer Destination Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DSTADDR:32;       /*!< bit:  0..31  Transfer Destination Address       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_DSTADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_DSTADDR_OFFSET         0x08         /**< \brief (DMAC_DSTADDR offset) Transfer Destination Address */
+
+#define DMAC_DSTADDR_DSTADDR_Pos    0            /**< \brief (DMAC_DSTADDR) Transfer Destination Address */
+#define DMAC_DSTADDR_DSTADDR_Msk    (0xFFFFFFFFu << DMAC_DSTADDR_DSTADDR_Pos)
+#define DMAC_DSTADDR_DSTADDR(value) ((DMAC_DSTADDR_DSTADDR_Msk & ((value) << DMAC_DSTADDR_DSTADDR_Pos)))
+#define DMAC_DSTADDR_MASK           0xFFFFFFFFu  /**< \brief (DMAC_DSTADDR) MASK Register */
+
+/* -------- DMAC_DESCADDR : (DMAC Offset: 0x0C) (R/W 32) Next Descriptor Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DESCADDR:32;      /*!< bit:  0..31  Next Descriptor Address            */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DMAC_DESCADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DMAC_DESCADDR_OFFSET        0x0C         /**< \brief (DMAC_DESCADDR offset) Next Descriptor Address */
+
+#define DMAC_DESCADDR_DESCADDR_Pos  0            /**< \brief (DMAC_DESCADDR) Next Descriptor Address */
+#define DMAC_DESCADDR_DESCADDR_Msk  (0xFFFFFFFFu << DMAC_DESCADDR_DESCADDR_Pos)
+#define DMAC_DESCADDR_DESCADDR(value) ((DMAC_DESCADDR_DESCADDR_Msk & ((value) << DMAC_DESCADDR_DESCADDR_Pos)))
+#define DMAC_DESCADDR_MASK          0xFFFFFFFFu  /**< \brief (DMAC_DESCADDR) MASK Register */
+
+/** \brief DMAC APB hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO DMAC_CTRL_Type            CTRL;        /**< \brief Offset: 0x00 (R/W 16) Control */
+  __IO DMAC_CRCCTRL_Type         CRCCTRL;     /**< \brief Offset: 0x02 (R/W 16) CRC Control */
+  __IO DMAC_CRCDATAIN_Type       CRCDATAIN;   /**< \brief Offset: 0x04 (R/W 32) CRC Data Input */
+  __IO DMAC_CRCCHKSUM_Type       CRCCHKSUM;   /**< \brief Offset: 0x08 (R/W 32) CRC Checksum */
+  __IO DMAC_CRCSTATUS_Type       CRCSTATUS;   /**< \brief Offset: 0x0C (R/W  8) CRC Status */
+  __IO DMAC_DBGCTRL_Type         DBGCTRL;     /**< \brief Offset: 0x0D (R/W  8) Debug Control */
+       RoReg8                    Reserved1[0x2];
+  __IO DMAC_SWTRIGCTRL_Type      SWTRIGCTRL;  /**< \brief Offset: 0x10 (R/W 32) Software Trigger Control */
+  __IO DMAC_PRICTRL0_Type        PRICTRL0;    /**< \brief Offset: 0x14 (R/W 32) Priority Control 0 */
+       RoReg8                    Reserved2[0x8];
+  __IO DMAC_INTPEND_Type         INTPEND;     /**< \brief Offset: 0x20 (R/W 16) Interrupt Pending */
+       RoReg8                    Reserved3[0x2];
+  __I  DMAC_INTSTATUS_Type       INTSTATUS;   /**< \brief Offset: 0x24 (R/  32) Interrupt Status */
+  __I  DMAC_BUSYCH_Type          BUSYCH;      /**< \brief Offset: 0x28 (R/  32) Busy Channels */
+  __I  DMAC_PENDCH_Type          PENDCH;      /**< \brief Offset: 0x2C (R/  32) Pending Channels */
+  __I  DMAC_ACTIVE_Type          ACTIVE;      /**< \brief Offset: 0x30 (R/  32) Active Channel and Levels */
+  __IO DMAC_BASEADDR_Type        BASEADDR;    /**< \brief Offset: 0x34 (R/W 32) Descriptor Memory Section Base Address */
+  __IO DMAC_WRBADDR_Type         WRBADDR;     /**< \brief Offset: 0x38 (R/W 32) Write-Back Memory Section Base Address */
+       RoReg8                    Reserved4[0x3];
+  __IO DMAC_CHID_Type            CHID;        /**< \brief Offset: 0x3F (R/W  8) Channel ID */
+  __IO DMAC_CHCTRLA_Type         CHCTRLA;     /**< \brief Offset: 0x40 (R/W  8) Channel Control A */
+       RoReg8                    Reserved5[0x3];
+  __IO DMAC_CHCTRLB_Type         CHCTRLB;     /**< \brief Offset: 0x44 (R/W 32) Channel Control B */
+       RoReg8                    Reserved6[0x4];
+  __IO DMAC_CHINTENCLR_Type      CHINTENCLR;  /**< \brief Offset: 0x4C (R/W  8) Channel Interrupt Enable Clear */
+  __IO DMAC_CHINTENSET_Type      CHINTENSET;  /**< \brief Offset: 0x4D (R/W  8) Channel Interrupt Enable Set */
+  __IO DMAC_CHINTFLAG_Type       CHINTFLAG;   /**< \brief Offset: 0x4E (R/W  8) Channel Interrupt Flag Status and Clear */
+  __I  DMAC_CHSTATUS_Type        CHSTATUS;    /**< \brief Offset: 0x4F (R/   8) Channel Status */
+} Dmac;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief DMAC Descriptor SRAM registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO DMAC_BTCTRL_Type          BTCTRL;      /**< \brief Offset: 0x00 (R/W 16) Block Transfer Control */
+  __IO DMAC_BTCNT_Type           BTCNT;       /**< \brief Offset: 0x02 (R/W 16) Block Transfer Count */
+  __IO DMAC_SRCADDR_Type         SRCADDR;     /**< \brief Offset: 0x04 (R/W 32) Transfer Source Address */
+  __IO DMAC_DSTADDR_Type         DSTADDR;     /**< \brief Offset: 0x08 (R/W 32) Transfer Destination Address */
+  __IO DMAC_DESCADDR_Type        DESCADDR;    /**< \brief Offset: 0x0C (R/W 32) Next Descriptor Address */
+} DmacDescriptor
+#ifdef __GNUC__
+  __attribute__ ((aligned (8)))
+#endif
+;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#define SECTION_DMAC_DESCRIPTOR
+
+/*@}*/
+
+#endif /* _SAMD21_DMAC_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/dsu.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/dsu.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/dsu.h	(revision 136)
@@ -0,0 +1,551 @@
+/**
+ * \file
+ *
+ * \brief Component description for DSU
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_DSU_COMPONENT_
+#define _SAMD21_DSU_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR DSU */
+/* ========================================================================== */
+/** \addtogroup SAMD21_DSU Device Service Unit */
+/*@{*/
+
+#define DSU_U2209
+#define REV_DSU                     0x200
+
+/* -------- DSU_CTRL : (DSU Offset: 0x0000) ( /W  8) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint8_t  :1;               /*!< bit:      1  Reserved                           */
+    uint8_t  CRC:1;            /*!< bit:      2  32-bit Cyclic Redundancy Check     */
+    uint8_t  MBIST:1;          /*!< bit:      3  Memory Built-In Self-Test          */
+    uint8_t  CE:1;             /*!< bit:      4  Chip Erase                         */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DSU_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_CTRL_OFFSET             0x0000       /**< \brief (DSU_CTRL offset) Control */
+#define DSU_CTRL_RESETVALUE         0x00         /**< \brief (DSU_CTRL reset_value) Control */
+
+#define DSU_CTRL_SWRST_Pos          0            /**< \brief (DSU_CTRL) Software Reset */
+#define DSU_CTRL_SWRST              (0x1u << DSU_CTRL_SWRST_Pos)
+#define DSU_CTRL_CRC_Pos            2            /**< \brief (DSU_CTRL) 32-bit Cyclic Redundancy Check */
+#define DSU_CTRL_CRC                (0x1u << DSU_CTRL_CRC_Pos)
+#define DSU_CTRL_MBIST_Pos          3            /**< \brief (DSU_CTRL) Memory Built-In Self-Test */
+#define DSU_CTRL_MBIST              (0x1u << DSU_CTRL_MBIST_Pos)
+#define DSU_CTRL_CE_Pos             4            /**< \brief (DSU_CTRL) Chip Erase */
+#define DSU_CTRL_CE                 (0x1u << DSU_CTRL_CE_Pos)
+#define DSU_CTRL_MASK               0x1Du        /**< \brief (DSU_CTRL) MASK Register */
+
+/* -------- DSU_STATUSA : (DSU Offset: 0x0001) (R/W  8) Status A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DONE:1;           /*!< bit:      0  Done                               */
+    uint8_t  CRSTEXT:1;        /*!< bit:      1  CPU Reset Phase Extension          */
+    uint8_t  BERR:1;           /*!< bit:      2  Bus Error                          */
+    uint8_t  FAIL:1;           /*!< bit:      3  Failure                            */
+    uint8_t  PERR:1;           /*!< bit:      4  Protection Error                   */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DSU_STATUSA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_STATUSA_OFFSET          0x0001       /**< \brief (DSU_STATUSA offset) Status A */
+#define DSU_STATUSA_RESETVALUE      0x00         /**< \brief (DSU_STATUSA reset_value) Status A */
+
+#define DSU_STATUSA_DONE_Pos        0            /**< \brief (DSU_STATUSA) Done */
+#define DSU_STATUSA_DONE            (0x1u << DSU_STATUSA_DONE_Pos)
+#define DSU_STATUSA_CRSTEXT_Pos     1            /**< \brief (DSU_STATUSA) CPU Reset Phase Extension */
+#define DSU_STATUSA_CRSTEXT         (0x1u << DSU_STATUSA_CRSTEXT_Pos)
+#define DSU_STATUSA_BERR_Pos        2            /**< \brief (DSU_STATUSA) Bus Error */
+#define DSU_STATUSA_BERR            (0x1u << DSU_STATUSA_BERR_Pos)
+#define DSU_STATUSA_FAIL_Pos        3            /**< \brief (DSU_STATUSA) Failure */
+#define DSU_STATUSA_FAIL            (0x1u << DSU_STATUSA_FAIL_Pos)
+#define DSU_STATUSA_PERR_Pos        4            /**< \brief (DSU_STATUSA) Protection Error */
+#define DSU_STATUSA_PERR            (0x1u << DSU_STATUSA_PERR_Pos)
+#define DSU_STATUSA_MASK            0x1Fu        /**< \brief (DSU_STATUSA) MASK Register */
+
+/* -------- DSU_STATUSB : (DSU Offset: 0x0002) (R/   8) Status B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PROT:1;           /*!< bit:      0  Protected                          */
+    uint8_t  DBGPRES:1;        /*!< bit:      1  Debugger Present                   */
+    uint8_t  DCCD0:1;          /*!< bit:      2  Debug Communication Channel 0 Dirty */
+    uint8_t  DCCD1:1;          /*!< bit:      3  Debug Communication Channel 1 Dirty */
+    uint8_t  HPE:1;            /*!< bit:      4  Hot-Plugging Enable                */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint8_t  DCCD:2;           /*!< bit:  2.. 3  Debug Communication Channel x Dirty */
+    uint8_t  :4;               /*!< bit:  4.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} DSU_STATUSB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_STATUSB_OFFSET          0x0002       /**< \brief (DSU_STATUSB offset) Status B */
+#define DSU_STATUSB_RESETVALUE      0x10         /**< \brief (DSU_STATUSB reset_value) Status B */
+
+#define DSU_STATUSB_PROT_Pos        0            /**< \brief (DSU_STATUSB) Protected */
+#define DSU_STATUSB_PROT            (0x1u << DSU_STATUSB_PROT_Pos)
+#define DSU_STATUSB_DBGPRES_Pos     1            /**< \brief (DSU_STATUSB) Debugger Present */
+#define DSU_STATUSB_DBGPRES         (0x1u << DSU_STATUSB_DBGPRES_Pos)
+#define DSU_STATUSB_DCCD0_Pos       2            /**< \brief (DSU_STATUSB) Debug Communication Channel 0 Dirty */
+#define DSU_STATUSB_DCCD0           (1 << DSU_STATUSB_DCCD0_Pos)
+#define DSU_STATUSB_DCCD1_Pos       3            /**< \brief (DSU_STATUSB) Debug Communication Channel 1 Dirty */
+#define DSU_STATUSB_DCCD1           (1 << DSU_STATUSB_DCCD1_Pos)
+#define DSU_STATUSB_DCCD_Pos        2            /**< \brief (DSU_STATUSB) Debug Communication Channel x Dirty */
+#define DSU_STATUSB_DCCD_Msk        (0x3u << DSU_STATUSB_DCCD_Pos)
+#define DSU_STATUSB_DCCD(value)     ((DSU_STATUSB_DCCD_Msk & ((value) << DSU_STATUSB_DCCD_Pos)))
+#define DSU_STATUSB_HPE_Pos         4            /**< \brief (DSU_STATUSB) Hot-Plugging Enable */
+#define DSU_STATUSB_HPE             (0x1u << DSU_STATUSB_HPE_Pos)
+#define DSU_STATUSB_MASK            0x1Fu        /**< \brief (DSU_STATUSB) MASK Register */
+
+/* -------- DSU_ADDR : (DSU Offset: 0x0004) (R/W 32) Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint32_t ADDR:30;          /*!< bit:  2..31  Address                            */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_ADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_ADDR_OFFSET             0x0004       /**< \brief (DSU_ADDR offset) Address */
+#define DSU_ADDR_RESETVALUE         0x00000000   /**< \brief (DSU_ADDR reset_value) Address */
+
+#define DSU_ADDR_ADDR_Pos           2            /**< \brief (DSU_ADDR) Address */
+#define DSU_ADDR_ADDR_Msk           (0x3FFFFFFFu << DSU_ADDR_ADDR_Pos)
+#define DSU_ADDR_ADDR(value)        ((DSU_ADDR_ADDR_Msk & ((value) << DSU_ADDR_ADDR_Pos)))
+#define DSU_ADDR_MASK               0xFFFFFFFCu  /**< \brief (DSU_ADDR) MASK Register */
+
+/* -------- DSU_LENGTH : (DSU Offset: 0x0008) (R/W 32) Length -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint32_t LENGTH:30;        /*!< bit:  2..31  Length                             */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_LENGTH_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_LENGTH_OFFSET           0x0008       /**< \brief (DSU_LENGTH offset) Length */
+#define DSU_LENGTH_RESETVALUE       0x00000000   /**< \brief (DSU_LENGTH reset_value) Length */
+
+#define DSU_LENGTH_LENGTH_Pos       2            /**< \brief (DSU_LENGTH) Length */
+#define DSU_LENGTH_LENGTH_Msk       (0x3FFFFFFFu << DSU_LENGTH_LENGTH_Pos)
+#define DSU_LENGTH_LENGTH(value)    ((DSU_LENGTH_LENGTH_Msk & ((value) << DSU_LENGTH_LENGTH_Pos)))
+#define DSU_LENGTH_MASK             0xFFFFFFFCu  /**< \brief (DSU_LENGTH) MASK Register */
+
+/* -------- DSU_DATA : (DSU Offset: 0x000C) (R/W 32) Data -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DATA:32;          /*!< bit:  0..31  Data                               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_DATA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_DATA_OFFSET             0x000C       /**< \brief (DSU_DATA offset) Data */
+#define DSU_DATA_RESETVALUE         0x00000000   /**< \brief (DSU_DATA reset_value) Data */
+
+#define DSU_DATA_DATA_Pos           0            /**< \brief (DSU_DATA) Data */
+#define DSU_DATA_DATA_Msk           (0xFFFFFFFFu << DSU_DATA_DATA_Pos)
+#define DSU_DATA_DATA(value)        ((DSU_DATA_DATA_Msk & ((value) << DSU_DATA_DATA_Pos)))
+#define DSU_DATA_MASK               0xFFFFFFFFu  /**< \brief (DSU_DATA) MASK Register */
+
+/* -------- DSU_DCC : (DSU Offset: 0x0010) (R/W 32) Debug Communication Channel n -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DATA:32;          /*!< bit:  0..31  Data                               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_DCC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_DCC_OFFSET              0x0010       /**< \brief (DSU_DCC offset) Debug Communication Channel n */
+#define DSU_DCC_RESETVALUE          0x00000000   /**< \brief (DSU_DCC reset_value) Debug Communication Channel n */
+
+#define DSU_DCC_DATA_Pos            0            /**< \brief (DSU_DCC) Data */
+#define DSU_DCC_DATA_Msk            (0xFFFFFFFFu << DSU_DCC_DATA_Pos)
+#define DSU_DCC_DATA(value)         ((DSU_DCC_DATA_Msk & ((value) << DSU_DCC_DATA_Pos)))
+#define DSU_DCC_MASK                0xFFFFFFFFu  /**< \brief (DSU_DCC) MASK Register */
+
+/* -------- DSU_DID : (DSU Offset: 0x0018) (R/  32) Device Identification -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DEVSEL:8;         /*!< bit:  0.. 7  Device Select                      */
+    uint32_t REVISION:4;       /*!< bit:  8..11  Revision                           */
+    uint32_t DIE:4;            /*!< bit: 12..15  Die Identification                 */
+    uint32_t SERIES:6;         /*!< bit: 16..21  Product Series                     */
+    uint32_t :1;               /*!< bit:     22  Reserved                           */
+    uint32_t FAMILY:5;         /*!< bit: 23..27  Product Family                     */
+    uint32_t PROCESSOR:4;      /*!< bit: 28..31  Processor                          */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_DID_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_DID_OFFSET              0x0018       /**< \brief (DSU_DID offset) Device Identification */
+
+#define DSU_DID_DEVSEL_Pos          0            /**< \brief (DSU_DID) Device Select */
+#define DSU_DID_DEVSEL_Msk          (0xFFu << DSU_DID_DEVSEL_Pos)
+#define DSU_DID_DEVSEL(value)       ((DSU_DID_DEVSEL_Msk & ((value) << DSU_DID_DEVSEL_Pos)))
+#define DSU_DID_REVISION_Pos        8            /**< \brief (DSU_DID) Revision */
+#define DSU_DID_REVISION_Msk        (0xFu << DSU_DID_REVISION_Pos)
+#define DSU_DID_REVISION(value)     ((DSU_DID_REVISION_Msk & ((value) << DSU_DID_REVISION_Pos)))
+#define DSU_DID_DIE_Pos             12           /**< \brief (DSU_DID) Die Identification */
+#define DSU_DID_DIE_Msk             (0xFu << DSU_DID_DIE_Pos)
+#define DSU_DID_DIE(value)          ((DSU_DID_DIE_Msk & ((value) << DSU_DID_DIE_Pos)))
+#define DSU_DID_SERIES_Pos          16           /**< \brief (DSU_DID) Product Series */
+#define DSU_DID_SERIES_Msk          (0x3Fu << DSU_DID_SERIES_Pos)
+#define DSU_DID_SERIES(value)       ((DSU_DID_SERIES_Msk & ((value) << DSU_DID_SERIES_Pos)))
+#define DSU_DID_FAMILY_Pos          23           /**< \brief (DSU_DID) Product Family */
+#define DSU_DID_FAMILY_Msk          (0x1Fu << DSU_DID_FAMILY_Pos)
+#define DSU_DID_FAMILY(value)       ((DSU_DID_FAMILY_Msk & ((value) << DSU_DID_FAMILY_Pos)))
+#define DSU_DID_PROCESSOR_Pos       28           /**< \brief (DSU_DID) Processor */
+#define DSU_DID_PROCESSOR_Msk       (0xFu << DSU_DID_PROCESSOR_Pos)
+#define DSU_DID_PROCESSOR(value)    ((DSU_DID_PROCESSOR_Msk & ((value) << DSU_DID_PROCESSOR_Pos)))
+#define DSU_DID_MASK                0xFFBFFFFFu  /**< \brief (DSU_DID) MASK Register */
+
+/* -------- DSU_ENTRY : (DSU Offset: 0x1000) (R/  32) Coresight ROM Table Entry n -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t EPRES:1;          /*!< bit:      0  Entry Present                      */
+    uint32_t FMT:1;            /*!< bit:      1  Format                             */
+    uint32_t :10;              /*!< bit:  2..11  Reserved                           */
+    uint32_t ADDOFF:20;        /*!< bit: 12..31  Address Offset                     */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_ENTRY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_ENTRY_OFFSET            0x1000       /**< \brief (DSU_ENTRY offset) Coresight ROM Table Entry n */
+#define DSU_ENTRY_RESETVALUE        0x00000002   /**< \brief (DSU_ENTRY reset_value) Coresight ROM Table Entry n */
+
+#define DSU_ENTRY_EPRES_Pos         0            /**< \brief (DSU_ENTRY) Entry Present */
+#define DSU_ENTRY_EPRES             (0x1u << DSU_ENTRY_EPRES_Pos)
+#define DSU_ENTRY_FMT_Pos           1            /**< \brief (DSU_ENTRY) Format */
+#define DSU_ENTRY_FMT               (0x1u << DSU_ENTRY_FMT_Pos)
+#define DSU_ENTRY_ADDOFF_Pos        12           /**< \brief (DSU_ENTRY) Address Offset */
+#define DSU_ENTRY_ADDOFF_Msk        (0xFFFFFu << DSU_ENTRY_ADDOFF_Pos)
+#define DSU_ENTRY_ADDOFF(value)     ((DSU_ENTRY_ADDOFF_Msk & ((value) << DSU_ENTRY_ADDOFF_Pos)))
+#define DSU_ENTRY_MASK              0xFFFFF003u  /**< \brief (DSU_ENTRY) MASK Register */
+
+/* -------- DSU_END : (DSU Offset: 0x1008) (R/  32) Coresight ROM Table End -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t END:32;           /*!< bit:  0..31  End Marker                         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_END_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_END_OFFSET              0x1008       /**< \brief (DSU_END offset) Coresight ROM Table End */
+#define DSU_END_RESETVALUE          0x00000000   /**< \brief (DSU_END reset_value) Coresight ROM Table End */
+
+#define DSU_END_END_Pos             0            /**< \brief (DSU_END) End Marker */
+#define DSU_END_END_Msk             (0xFFFFFFFFu << DSU_END_END_Pos)
+#define DSU_END_END(value)          ((DSU_END_END_Msk & ((value) << DSU_END_END_Pos)))
+#define DSU_END_MASK                0xFFFFFFFFu  /**< \brief (DSU_END) MASK Register */
+
+/* -------- DSU_MEMTYPE : (DSU Offset: 0x1FCC) (R/  32) Coresight ROM Table Memory Type -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SMEMP:1;          /*!< bit:      0  System Memory Present              */
+    uint32_t :31;              /*!< bit:  1..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_MEMTYPE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_MEMTYPE_OFFSET          0x1FCC       /**< \brief (DSU_MEMTYPE offset) Coresight ROM Table Memory Type */
+#define DSU_MEMTYPE_RESETVALUE      0x00000000   /**< \brief (DSU_MEMTYPE reset_value) Coresight ROM Table Memory Type */
+
+#define DSU_MEMTYPE_SMEMP_Pos       0            /**< \brief (DSU_MEMTYPE) System Memory Present */
+#define DSU_MEMTYPE_SMEMP           (0x1u << DSU_MEMTYPE_SMEMP_Pos)
+#define DSU_MEMTYPE_MASK            0x00000001u  /**< \brief (DSU_MEMTYPE) MASK Register */
+
+/* -------- DSU_PID4 : (DSU Offset: 0x1FD0) (R/  32) Peripheral Identification 4 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t JEPCC:4;          /*!< bit:  0.. 3  JEP-106 Continuation Code          */
+    uint32_t FKBC:4;           /*!< bit:  4.. 7  4KB Count                          */
+    uint32_t :24;              /*!< bit:  8..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_PID4_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_PID4_OFFSET             0x1FD0       /**< \brief (DSU_PID4 offset) Peripheral Identification 4 */
+#define DSU_PID4_RESETVALUE         0x00000000   /**< \brief (DSU_PID4 reset_value) Peripheral Identification 4 */
+
+#define DSU_PID4_JEPCC_Pos          0            /**< \brief (DSU_PID4) JEP-106 Continuation Code */
+#define DSU_PID4_JEPCC_Msk          (0xFu << DSU_PID4_JEPCC_Pos)
+#define DSU_PID4_JEPCC(value)       ((DSU_PID4_JEPCC_Msk & ((value) << DSU_PID4_JEPCC_Pos)))
+#define DSU_PID4_FKBC_Pos           4            /**< \brief (DSU_PID4) 4KB Count */
+#define DSU_PID4_FKBC_Msk           (0xFu << DSU_PID4_FKBC_Pos)
+#define DSU_PID4_FKBC(value)        ((DSU_PID4_FKBC_Msk & ((value) << DSU_PID4_FKBC_Pos)))
+#define DSU_PID4_MASK               0x000000FFu  /**< \brief (DSU_PID4) MASK Register */
+
+/* -------- DSU_PID0 : (DSU Offset: 0x1FE0) (R/  32) Peripheral Identification 0 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PARTNBL:8;        /*!< bit:  0.. 7  Part Number Low                    */
+    uint32_t :24;              /*!< bit:  8..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_PID0_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_PID0_OFFSET             0x1FE0       /**< \brief (DSU_PID0 offset) Peripheral Identification 0 */
+#define DSU_PID0_RESETVALUE         0x000000D0   /**< \brief (DSU_PID0 reset_value) Peripheral Identification 0 */
+
+#define DSU_PID0_PARTNBL_Pos        0            /**< \brief (DSU_PID0) Part Number Low */
+#define DSU_PID0_PARTNBL_Msk        (0xFFu << DSU_PID0_PARTNBL_Pos)
+#define DSU_PID0_PARTNBL(value)     ((DSU_PID0_PARTNBL_Msk & ((value) << DSU_PID0_PARTNBL_Pos)))
+#define DSU_PID0_MASK               0x000000FFu  /**< \brief (DSU_PID0) MASK Register */
+
+/* -------- DSU_PID1 : (DSU Offset: 0x1FE4) (R/  32) Peripheral Identification 1 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PARTNBH:4;        /*!< bit:  0.. 3  Part Number High                   */
+    uint32_t JEPIDCL:4;        /*!< bit:  4.. 7  Low part of the JEP-106 Identity Code */
+    uint32_t :24;              /*!< bit:  8..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_PID1_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_PID1_OFFSET             0x1FE4       /**< \brief (DSU_PID1 offset) Peripheral Identification 1 */
+#define DSU_PID1_RESETVALUE         0x000000FC   /**< \brief (DSU_PID1 reset_value) Peripheral Identification 1 */
+
+#define DSU_PID1_PARTNBH_Pos        0            /**< \brief (DSU_PID1) Part Number High */
+#define DSU_PID1_PARTNBH_Msk        (0xFu << DSU_PID1_PARTNBH_Pos)
+#define DSU_PID1_PARTNBH(value)     ((DSU_PID1_PARTNBH_Msk & ((value) << DSU_PID1_PARTNBH_Pos)))
+#define DSU_PID1_JEPIDCL_Pos        4            /**< \brief (DSU_PID1) Low part of the JEP-106 Identity Code */
+#define DSU_PID1_JEPIDCL_Msk        (0xFu << DSU_PID1_JEPIDCL_Pos)
+#define DSU_PID1_JEPIDCL(value)     ((DSU_PID1_JEPIDCL_Msk & ((value) << DSU_PID1_JEPIDCL_Pos)))
+#define DSU_PID1_MASK               0x000000FFu  /**< \brief (DSU_PID1) MASK Register */
+
+/* -------- DSU_PID2 : (DSU Offset: 0x1FE8) (R/  32) Peripheral Identification 2 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t JEPIDCH:3;        /*!< bit:  0.. 2  JEP-106 Identity Code High         */
+    uint32_t JEPU:1;           /*!< bit:      3  JEP-106 Identity Code is used      */
+    uint32_t REVISION:4;       /*!< bit:  4.. 7  Revision Number                    */
+    uint32_t :24;              /*!< bit:  8..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_PID2_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_PID2_OFFSET             0x1FE8       /**< \brief (DSU_PID2 offset) Peripheral Identification 2 */
+#define DSU_PID2_RESETVALUE         0x00000009   /**< \brief (DSU_PID2 reset_value) Peripheral Identification 2 */
+
+#define DSU_PID2_JEPIDCH_Pos        0            /**< \brief (DSU_PID2) JEP-106 Identity Code High */
+#define DSU_PID2_JEPIDCH_Msk        (0x7u << DSU_PID2_JEPIDCH_Pos)
+#define DSU_PID2_JEPIDCH(value)     ((DSU_PID2_JEPIDCH_Msk & ((value) << DSU_PID2_JEPIDCH_Pos)))
+#define DSU_PID2_JEPU_Pos           3            /**< \brief (DSU_PID2) JEP-106 Identity Code is used */
+#define DSU_PID2_JEPU               (0x1u << DSU_PID2_JEPU_Pos)
+#define DSU_PID2_REVISION_Pos       4            /**< \brief (DSU_PID2) Revision Number */
+#define DSU_PID2_REVISION_Msk       (0xFu << DSU_PID2_REVISION_Pos)
+#define DSU_PID2_REVISION(value)    ((DSU_PID2_REVISION_Msk & ((value) << DSU_PID2_REVISION_Pos)))
+#define DSU_PID2_MASK               0x000000FFu  /**< \brief (DSU_PID2) MASK Register */
+
+/* -------- DSU_PID3 : (DSU Offset: 0x1FEC) (R/  32) Peripheral Identification 3 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CUSMOD:4;         /*!< bit:  0.. 3  ARM CUSMOD                         */
+    uint32_t REVAND:4;         /*!< bit:  4.. 7  Revision Number                    */
+    uint32_t :24;              /*!< bit:  8..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_PID3_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_PID3_OFFSET             0x1FEC       /**< \brief (DSU_PID3 offset) Peripheral Identification 3 */
+#define DSU_PID3_RESETVALUE         0x00000000   /**< \brief (DSU_PID3 reset_value) Peripheral Identification 3 */
+
+#define DSU_PID3_CUSMOD_Pos         0            /**< \brief (DSU_PID3) ARM CUSMOD */
+#define DSU_PID3_CUSMOD_Msk         (0xFu << DSU_PID3_CUSMOD_Pos)
+#define DSU_PID3_CUSMOD(value)      ((DSU_PID3_CUSMOD_Msk & ((value) << DSU_PID3_CUSMOD_Pos)))
+#define DSU_PID3_REVAND_Pos         4            /**< \brief (DSU_PID3) Revision Number */
+#define DSU_PID3_REVAND_Msk         (0xFu << DSU_PID3_REVAND_Pos)
+#define DSU_PID3_REVAND(value)      ((DSU_PID3_REVAND_Msk & ((value) << DSU_PID3_REVAND_Pos)))
+#define DSU_PID3_MASK               0x000000FFu  /**< \brief (DSU_PID3) MASK Register */
+
+/* -------- DSU_CID0 : (DSU Offset: 0x1FF0) (R/  32) Component Identification 0 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PREAMBLEB0:8;     /*!< bit:  0.. 7  Preamble Byte 0                    */
+    uint32_t :24;              /*!< bit:  8..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_CID0_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_CID0_OFFSET             0x1FF0       /**< \brief (DSU_CID0 offset) Component Identification 0 */
+#define DSU_CID0_RESETVALUE         0x0000000D   /**< \brief (DSU_CID0 reset_value) Component Identification 0 */
+
+#define DSU_CID0_PREAMBLEB0_Pos     0            /**< \brief (DSU_CID0) Preamble Byte 0 */
+#define DSU_CID0_PREAMBLEB0_Msk     (0xFFu << DSU_CID0_PREAMBLEB0_Pos)
+#define DSU_CID0_PREAMBLEB0(value)  ((DSU_CID0_PREAMBLEB0_Msk & ((value) << DSU_CID0_PREAMBLEB0_Pos)))
+#define DSU_CID0_MASK               0x000000FFu  /**< \brief (DSU_CID0) MASK Register */
+
+/* -------- DSU_CID1 : (DSU Offset: 0x1FF4) (R/  32) Component Identification 1 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PREAMBLE:4;       /*!< bit:  0.. 3  Preamble                           */
+    uint32_t CCLASS:4;         /*!< bit:  4.. 7  Component Class                    */
+    uint32_t :24;              /*!< bit:  8..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_CID1_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_CID1_OFFSET             0x1FF4       /**< \brief (DSU_CID1 offset) Component Identification 1 */
+#define DSU_CID1_RESETVALUE         0x00000010   /**< \brief (DSU_CID1 reset_value) Component Identification 1 */
+
+#define DSU_CID1_PREAMBLE_Pos       0            /**< \brief (DSU_CID1) Preamble */
+#define DSU_CID1_PREAMBLE_Msk       (0xFu << DSU_CID1_PREAMBLE_Pos)
+#define DSU_CID1_PREAMBLE(value)    ((DSU_CID1_PREAMBLE_Msk & ((value) << DSU_CID1_PREAMBLE_Pos)))
+#define DSU_CID1_CCLASS_Pos         4            /**< \brief (DSU_CID1) Component Class */
+#define DSU_CID1_CCLASS_Msk         (0xFu << DSU_CID1_CCLASS_Pos)
+#define DSU_CID1_CCLASS(value)      ((DSU_CID1_CCLASS_Msk & ((value) << DSU_CID1_CCLASS_Pos)))
+#define DSU_CID1_MASK               0x000000FFu  /**< \brief (DSU_CID1) MASK Register */
+
+/* -------- DSU_CID2 : (DSU Offset: 0x1FF8) (R/  32) Component Identification 2 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PREAMBLEB2:8;     /*!< bit:  0.. 7  Preamble Byte 2                    */
+    uint32_t :24;              /*!< bit:  8..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_CID2_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_CID2_OFFSET             0x1FF8       /**< \brief (DSU_CID2 offset) Component Identification 2 */
+#define DSU_CID2_RESETVALUE         0x00000005   /**< \brief (DSU_CID2 reset_value) Component Identification 2 */
+
+#define DSU_CID2_PREAMBLEB2_Pos     0            /**< \brief (DSU_CID2) Preamble Byte 2 */
+#define DSU_CID2_PREAMBLEB2_Msk     (0xFFu << DSU_CID2_PREAMBLEB2_Pos)
+#define DSU_CID2_PREAMBLEB2(value)  ((DSU_CID2_PREAMBLEB2_Msk & ((value) << DSU_CID2_PREAMBLEB2_Pos)))
+#define DSU_CID2_MASK               0x000000FFu  /**< \brief (DSU_CID2) MASK Register */
+
+/* -------- DSU_CID3 : (DSU Offset: 0x1FFC) (R/  32) Component Identification 3 -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PREAMBLEB3:8;     /*!< bit:  0.. 7  Preamble Byte 3                    */
+    uint32_t :24;              /*!< bit:  8..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} DSU_CID3_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define DSU_CID3_OFFSET             0x1FFC       /**< \brief (DSU_CID3 offset) Component Identification 3 */
+#define DSU_CID3_RESETVALUE         0x000000B1   /**< \brief (DSU_CID3 reset_value) Component Identification 3 */
+
+#define DSU_CID3_PREAMBLEB3_Pos     0            /**< \brief (DSU_CID3) Preamble Byte 3 */
+#define DSU_CID3_PREAMBLEB3_Msk     (0xFFu << DSU_CID3_PREAMBLEB3_Pos)
+#define DSU_CID3_PREAMBLEB3(value)  ((DSU_CID3_PREAMBLEB3_Msk & ((value) << DSU_CID3_PREAMBLEB3_Pos)))
+#define DSU_CID3_MASK               0x000000FFu  /**< \brief (DSU_CID3) MASK Register */
+
+/** \brief DSU hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __O  DSU_CTRL_Type             CTRL;        /**< \brief Offset: 0x0000 ( /W  8) Control */
+  __IO DSU_STATUSA_Type          STATUSA;     /**< \brief Offset: 0x0001 (R/W  8) Status A */
+  __I  DSU_STATUSB_Type          STATUSB;     /**< \brief Offset: 0x0002 (R/   8) Status B */
+       RoReg8                    Reserved1[0x1];
+  __IO DSU_ADDR_Type             ADDR;        /**< \brief Offset: 0x0004 (R/W 32) Address */
+  __IO DSU_LENGTH_Type           LENGTH;      /**< \brief Offset: 0x0008 (R/W 32) Length */
+  __IO DSU_DATA_Type             DATA;        /**< \brief Offset: 0x000C (R/W 32) Data */
+  __IO DSU_DCC_Type              DCC[2];      /**< \brief Offset: 0x0010 (R/W 32) Debug Communication Channel n */
+  __I  DSU_DID_Type              DID;         /**< \brief Offset: 0x0018 (R/  32) Device Identification */
+       RoReg8                    Reserved2[0xFE4];
+  __I  DSU_ENTRY_Type            ENTRY[2];    /**< \brief Offset: 0x1000 (R/  32) Coresight ROM Table Entry n */
+  __I  DSU_END_Type              END;         /**< \brief Offset: 0x1008 (R/  32) Coresight ROM Table End */
+       RoReg8                    Reserved3[0xFC0];
+  __I  DSU_MEMTYPE_Type          MEMTYPE;     /**< \brief Offset: 0x1FCC (R/  32) Coresight ROM Table Memory Type */
+  __I  DSU_PID4_Type             PID4;        /**< \brief Offset: 0x1FD0 (R/  32) Peripheral Identification 4 */
+       RoReg8                    Reserved4[0xC];
+  __I  DSU_PID0_Type             PID0;        /**< \brief Offset: 0x1FE0 (R/  32) Peripheral Identification 0 */
+  __I  DSU_PID1_Type             PID1;        /**< \brief Offset: 0x1FE4 (R/  32) Peripheral Identification 1 */
+  __I  DSU_PID2_Type             PID2;        /**< \brief Offset: 0x1FE8 (R/  32) Peripheral Identification 2 */
+  __I  DSU_PID3_Type             PID3;        /**< \brief Offset: 0x1FEC (R/  32) Peripheral Identification 3 */
+  __I  DSU_CID0_Type             CID0;        /**< \brief Offset: 0x1FF0 (R/  32) Component Identification 0 */
+  __I  DSU_CID1_Type             CID1;        /**< \brief Offset: 0x1FF4 (R/  32) Component Identification 1 */
+  __I  DSU_CID2_Type             CID2;        /**< \brief Offset: 0x1FF8 (R/  32) Component Identification 2 */
+  __I  DSU_CID3_Type             CID3;        /**< \brief Offset: 0x1FFC (R/  32) Component Identification 3 */
+} Dsu;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_DSU_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/eic.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/eic.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/eic.h	(revision 136)
@@ -0,0 +1,681 @@
+/**
+ * \file
+ *
+ * \brief Component description for EIC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_EIC_COMPONENT_
+#define _SAMD21_EIC_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR EIC */
+/* ========================================================================== */
+/** \addtogroup SAMD21_EIC External Interrupt Controller */
+/*@{*/
+
+#define EIC_U2217
+#define REV_EIC                     0x101
+
+/* -------- EIC_CTRL : (EIC Offset: 0x00) (R/W  8) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} EIC_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_CTRL_OFFSET             0x00         /**< \brief (EIC_CTRL offset) Control */
+#define EIC_CTRL_RESETVALUE         0x00         /**< \brief (EIC_CTRL reset_value) Control */
+
+#define EIC_CTRL_SWRST_Pos          0            /**< \brief (EIC_CTRL) Software Reset */
+#define EIC_CTRL_SWRST              (0x1u << EIC_CTRL_SWRST_Pos)
+#define EIC_CTRL_ENABLE_Pos         1            /**< \brief (EIC_CTRL) Enable */
+#define EIC_CTRL_ENABLE             (0x1u << EIC_CTRL_ENABLE_Pos)
+#define EIC_CTRL_MASK               0x03u        /**< \brief (EIC_CTRL) MASK Register */
+
+/* -------- EIC_STATUS : (EIC Offset: 0x01) (R/   8) Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :7;               /*!< bit:  0.. 6  Reserved                           */
+    uint8_t  SYNCBUSY:1;       /*!< bit:      7  Synchronization Busy               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} EIC_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_STATUS_OFFSET           0x01         /**< \brief (EIC_STATUS offset) Status */
+#define EIC_STATUS_RESETVALUE       0x00         /**< \brief (EIC_STATUS reset_value) Status */
+
+#define EIC_STATUS_SYNCBUSY_Pos     7            /**< \brief (EIC_STATUS) Synchronization Busy */
+#define EIC_STATUS_SYNCBUSY         (0x1u << EIC_STATUS_SYNCBUSY_Pos)
+#define EIC_STATUS_MASK             0x80u        /**< \brief (EIC_STATUS) MASK Register */
+
+/* -------- EIC_NMICTRL : (EIC Offset: 0x02) (R/W  8) Non-Maskable Interrupt Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  NMISENSE:3;       /*!< bit:  0.. 2  Non-Maskable Interrupt Sense       */
+    uint8_t  NMIFILTEN:1;      /*!< bit:      3  Non-Maskable Interrupt Filter Enable */
+    uint8_t  :4;               /*!< bit:  4.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} EIC_NMICTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_NMICTRL_OFFSET          0x02         /**< \brief (EIC_NMICTRL offset) Non-Maskable Interrupt Control */
+#define EIC_NMICTRL_RESETVALUE      0x00         /**< \brief (EIC_NMICTRL reset_value) Non-Maskable Interrupt Control */
+
+#define EIC_NMICTRL_NMISENSE_Pos    0            /**< \brief (EIC_NMICTRL) Non-Maskable Interrupt Sense */
+#define EIC_NMICTRL_NMISENSE_Msk    (0x7u << EIC_NMICTRL_NMISENSE_Pos)
+#define EIC_NMICTRL_NMISENSE(value) ((EIC_NMICTRL_NMISENSE_Msk & ((value) << EIC_NMICTRL_NMISENSE_Pos)))
+#define   EIC_NMICTRL_NMISENSE_NONE_Val   0x0u   /**< \brief (EIC_NMICTRL) No detection */
+#define   EIC_NMICTRL_NMISENSE_RISE_Val   0x1u   /**< \brief (EIC_NMICTRL) Rising-edge detection */
+#define   EIC_NMICTRL_NMISENSE_FALL_Val   0x2u   /**< \brief (EIC_NMICTRL) Falling-edge detection */
+#define   EIC_NMICTRL_NMISENSE_BOTH_Val   0x3u   /**< \brief (EIC_NMICTRL) Both-edges detection */
+#define   EIC_NMICTRL_NMISENSE_HIGH_Val   0x4u   /**< \brief (EIC_NMICTRL) High-level detection */
+#define   EIC_NMICTRL_NMISENSE_LOW_Val    0x5u   /**< \brief (EIC_NMICTRL) Low-level detection */
+#define EIC_NMICTRL_NMISENSE_NONE   (EIC_NMICTRL_NMISENSE_NONE_Val << EIC_NMICTRL_NMISENSE_Pos)
+#define EIC_NMICTRL_NMISENSE_RISE   (EIC_NMICTRL_NMISENSE_RISE_Val << EIC_NMICTRL_NMISENSE_Pos)
+#define EIC_NMICTRL_NMISENSE_FALL   (EIC_NMICTRL_NMISENSE_FALL_Val << EIC_NMICTRL_NMISENSE_Pos)
+#define EIC_NMICTRL_NMISENSE_BOTH   (EIC_NMICTRL_NMISENSE_BOTH_Val << EIC_NMICTRL_NMISENSE_Pos)
+#define EIC_NMICTRL_NMISENSE_HIGH   (EIC_NMICTRL_NMISENSE_HIGH_Val << EIC_NMICTRL_NMISENSE_Pos)
+#define EIC_NMICTRL_NMISENSE_LOW    (EIC_NMICTRL_NMISENSE_LOW_Val  << EIC_NMICTRL_NMISENSE_Pos)
+#define EIC_NMICTRL_NMIFILTEN_Pos   3            /**< \brief (EIC_NMICTRL) Non-Maskable Interrupt Filter Enable */
+#define EIC_NMICTRL_NMIFILTEN       (0x1u << EIC_NMICTRL_NMIFILTEN_Pos)
+#define EIC_NMICTRL_MASK            0x0Fu        /**< \brief (EIC_NMICTRL) MASK Register */
+
+/* -------- EIC_NMIFLAG : (EIC Offset: 0x03) (R/W  8) Non-Maskable Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  NMI:1;            /*!< bit:      0  Non-Maskable Interrupt             */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} EIC_NMIFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_NMIFLAG_OFFSET          0x03         /**< \brief (EIC_NMIFLAG offset) Non-Maskable Interrupt Flag Status and Clear */
+#define EIC_NMIFLAG_RESETVALUE      0x00         /**< \brief (EIC_NMIFLAG reset_value) Non-Maskable Interrupt Flag Status and Clear */
+
+#define EIC_NMIFLAG_NMI_Pos         0            /**< \brief (EIC_NMIFLAG) Non-Maskable Interrupt */
+#define EIC_NMIFLAG_NMI             (0x1u << EIC_NMIFLAG_NMI_Pos)
+#define EIC_NMIFLAG_MASK            0x01u        /**< \brief (EIC_NMIFLAG) MASK Register */
+
+/* -------- EIC_EVCTRL : (EIC Offset: 0x04) (R/W 32) Event Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t EXTINTEO0:1;      /*!< bit:      0  External Interrupt 0 Event Output Enable */
+    uint32_t EXTINTEO1:1;      /*!< bit:      1  External Interrupt 1 Event Output Enable */
+    uint32_t EXTINTEO2:1;      /*!< bit:      2  External Interrupt 2 Event Output Enable */
+    uint32_t EXTINTEO3:1;      /*!< bit:      3  External Interrupt 3 Event Output Enable */
+    uint32_t EXTINTEO4:1;      /*!< bit:      4  External Interrupt 4 Event Output Enable */
+    uint32_t EXTINTEO5:1;      /*!< bit:      5  External Interrupt 5 Event Output Enable */
+    uint32_t EXTINTEO6:1;      /*!< bit:      6  External Interrupt 6 Event Output Enable */
+    uint32_t EXTINTEO7:1;      /*!< bit:      7  External Interrupt 7 Event Output Enable */
+    uint32_t EXTINTEO8:1;      /*!< bit:      8  External Interrupt 8 Event Output Enable */
+    uint32_t EXTINTEO9:1;      /*!< bit:      9  External Interrupt 9 Event Output Enable */
+    uint32_t EXTINTEO10:1;     /*!< bit:     10  External Interrupt 10 Event Output Enable */
+    uint32_t EXTINTEO11:1;     /*!< bit:     11  External Interrupt 11 Event Output Enable */
+    uint32_t EXTINTEO12:1;     /*!< bit:     12  External Interrupt 12 Event Output Enable */
+    uint32_t EXTINTEO13:1;     /*!< bit:     13  External Interrupt 13 Event Output Enable */
+    uint32_t EXTINTEO14:1;     /*!< bit:     14  External Interrupt 14 Event Output Enable */
+    uint32_t EXTINTEO15:1;     /*!< bit:     15  External Interrupt 15 Event Output Enable */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t EXTINTEO:16;      /*!< bit:  0..15  External Interrupt x Event Output Enable */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EIC_EVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_EVCTRL_OFFSET           0x04         /**< \brief (EIC_EVCTRL offset) Event Control */
+#define EIC_EVCTRL_RESETVALUE       0x00000000   /**< \brief (EIC_EVCTRL reset_value) Event Control */
+
+#define EIC_EVCTRL_EXTINTEO0_Pos    0            /**< \brief (EIC_EVCTRL) External Interrupt 0 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO0        (1 << EIC_EVCTRL_EXTINTEO0_Pos)
+#define EIC_EVCTRL_EXTINTEO1_Pos    1            /**< \brief (EIC_EVCTRL) External Interrupt 1 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO1        (1 << EIC_EVCTRL_EXTINTEO1_Pos)
+#define EIC_EVCTRL_EXTINTEO2_Pos    2            /**< \brief (EIC_EVCTRL) External Interrupt 2 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO2        (1 << EIC_EVCTRL_EXTINTEO2_Pos)
+#define EIC_EVCTRL_EXTINTEO3_Pos    3            /**< \brief (EIC_EVCTRL) External Interrupt 3 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO3        (1 << EIC_EVCTRL_EXTINTEO3_Pos)
+#define EIC_EVCTRL_EXTINTEO4_Pos    4            /**< \brief (EIC_EVCTRL) External Interrupt 4 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO4        (1 << EIC_EVCTRL_EXTINTEO4_Pos)
+#define EIC_EVCTRL_EXTINTEO5_Pos    5            /**< \brief (EIC_EVCTRL) External Interrupt 5 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO5        (1 << EIC_EVCTRL_EXTINTEO5_Pos)
+#define EIC_EVCTRL_EXTINTEO6_Pos    6            /**< \brief (EIC_EVCTRL) External Interrupt 6 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO6        (1 << EIC_EVCTRL_EXTINTEO6_Pos)
+#define EIC_EVCTRL_EXTINTEO7_Pos    7            /**< \brief (EIC_EVCTRL) External Interrupt 7 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO7        (1 << EIC_EVCTRL_EXTINTEO7_Pos)
+#define EIC_EVCTRL_EXTINTEO8_Pos    8            /**< \brief (EIC_EVCTRL) External Interrupt 8 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO8        (1 << EIC_EVCTRL_EXTINTEO8_Pos)
+#define EIC_EVCTRL_EXTINTEO9_Pos    9            /**< \brief (EIC_EVCTRL) External Interrupt 9 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO9        (1 << EIC_EVCTRL_EXTINTEO9_Pos)
+#define EIC_EVCTRL_EXTINTEO10_Pos   10           /**< \brief (EIC_EVCTRL) External Interrupt 10 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO10       (1 << EIC_EVCTRL_EXTINTEO10_Pos)
+#define EIC_EVCTRL_EXTINTEO11_Pos   11           /**< \brief (EIC_EVCTRL) External Interrupt 11 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO11       (1 << EIC_EVCTRL_EXTINTEO11_Pos)
+#define EIC_EVCTRL_EXTINTEO12_Pos   12           /**< \brief (EIC_EVCTRL) External Interrupt 12 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO12       (1 << EIC_EVCTRL_EXTINTEO12_Pos)
+#define EIC_EVCTRL_EXTINTEO13_Pos   13           /**< \brief (EIC_EVCTRL) External Interrupt 13 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO13       (1 << EIC_EVCTRL_EXTINTEO13_Pos)
+#define EIC_EVCTRL_EXTINTEO14_Pos   14           /**< \brief (EIC_EVCTRL) External Interrupt 14 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO14       (1 << EIC_EVCTRL_EXTINTEO14_Pos)
+#define EIC_EVCTRL_EXTINTEO15_Pos   15           /**< \brief (EIC_EVCTRL) External Interrupt 15 Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO15       (1 << EIC_EVCTRL_EXTINTEO15_Pos)
+#define EIC_EVCTRL_EXTINTEO_Pos     0            /**< \brief (EIC_EVCTRL) External Interrupt x Event Output Enable */
+#define EIC_EVCTRL_EXTINTEO_Msk     (0xFFFFu << EIC_EVCTRL_EXTINTEO_Pos)
+#define EIC_EVCTRL_EXTINTEO(value)  ((EIC_EVCTRL_EXTINTEO_Msk & ((value) << EIC_EVCTRL_EXTINTEO_Pos)))
+#define EIC_EVCTRL_MASK             0x0000FFFFu  /**< \brief (EIC_EVCTRL) MASK Register */
+
+/* -------- EIC_INTENCLR : (EIC Offset: 0x08) (R/W 32) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t EXTINT0:1;        /*!< bit:      0  External Interrupt 0 Enable        */
+    uint32_t EXTINT1:1;        /*!< bit:      1  External Interrupt 1 Enable        */
+    uint32_t EXTINT2:1;        /*!< bit:      2  External Interrupt 2 Enable        */
+    uint32_t EXTINT3:1;        /*!< bit:      3  External Interrupt 3 Enable        */
+    uint32_t EXTINT4:1;        /*!< bit:      4  External Interrupt 4 Enable        */
+    uint32_t EXTINT5:1;        /*!< bit:      5  External Interrupt 5 Enable        */
+    uint32_t EXTINT6:1;        /*!< bit:      6  External Interrupt 6 Enable        */
+    uint32_t EXTINT7:1;        /*!< bit:      7  External Interrupt 7 Enable        */
+    uint32_t EXTINT8:1;        /*!< bit:      8  External Interrupt 8 Enable        */
+    uint32_t EXTINT9:1;        /*!< bit:      9  External Interrupt 9 Enable        */
+    uint32_t EXTINT10:1;       /*!< bit:     10  External Interrupt 10 Enable       */
+    uint32_t EXTINT11:1;       /*!< bit:     11  External Interrupt 11 Enable       */
+    uint32_t EXTINT12:1;       /*!< bit:     12  External Interrupt 12 Enable       */
+    uint32_t EXTINT13:1;       /*!< bit:     13  External Interrupt 13 Enable       */
+    uint32_t EXTINT14:1;       /*!< bit:     14  External Interrupt 14 Enable       */
+    uint32_t EXTINT15:1;       /*!< bit:     15  External Interrupt 15 Enable       */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t EXTINT:16;        /*!< bit:  0..15  External Interrupt x Enable        */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EIC_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_INTENCLR_OFFSET         0x08         /**< \brief (EIC_INTENCLR offset) Interrupt Enable Clear */
+#define EIC_INTENCLR_RESETVALUE     0x00000000   /**< \brief (EIC_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define EIC_INTENCLR_EXTINT0_Pos    0            /**< \brief (EIC_INTENCLR) External Interrupt 0 Enable */
+#define EIC_INTENCLR_EXTINT0        (1 << EIC_INTENCLR_EXTINT0_Pos)
+#define EIC_INTENCLR_EXTINT1_Pos    1            /**< \brief (EIC_INTENCLR) External Interrupt 1 Enable */
+#define EIC_INTENCLR_EXTINT1        (1 << EIC_INTENCLR_EXTINT1_Pos)
+#define EIC_INTENCLR_EXTINT2_Pos    2            /**< \brief (EIC_INTENCLR) External Interrupt 2 Enable */
+#define EIC_INTENCLR_EXTINT2        (1 << EIC_INTENCLR_EXTINT2_Pos)
+#define EIC_INTENCLR_EXTINT3_Pos    3            /**< \brief (EIC_INTENCLR) External Interrupt 3 Enable */
+#define EIC_INTENCLR_EXTINT3        (1 << EIC_INTENCLR_EXTINT3_Pos)
+#define EIC_INTENCLR_EXTINT4_Pos    4            /**< \brief (EIC_INTENCLR) External Interrupt 4 Enable */
+#define EIC_INTENCLR_EXTINT4        (1 << EIC_INTENCLR_EXTINT4_Pos)
+#define EIC_INTENCLR_EXTINT5_Pos    5            /**< \brief (EIC_INTENCLR) External Interrupt 5 Enable */
+#define EIC_INTENCLR_EXTINT5        (1 << EIC_INTENCLR_EXTINT5_Pos)
+#define EIC_INTENCLR_EXTINT6_Pos    6            /**< \brief (EIC_INTENCLR) External Interrupt 6 Enable */
+#define EIC_INTENCLR_EXTINT6        (1 << EIC_INTENCLR_EXTINT6_Pos)
+#define EIC_INTENCLR_EXTINT7_Pos    7            /**< \brief (EIC_INTENCLR) External Interrupt 7 Enable */
+#define EIC_INTENCLR_EXTINT7        (1 << EIC_INTENCLR_EXTINT7_Pos)
+#define EIC_INTENCLR_EXTINT8_Pos    8            /**< \brief (EIC_INTENCLR) External Interrupt 8 Enable */
+#define EIC_INTENCLR_EXTINT8        (1 << EIC_INTENCLR_EXTINT8_Pos)
+#define EIC_INTENCLR_EXTINT9_Pos    9            /**< \brief (EIC_INTENCLR) External Interrupt 9 Enable */
+#define EIC_INTENCLR_EXTINT9        (1 << EIC_INTENCLR_EXTINT9_Pos)
+#define EIC_INTENCLR_EXTINT10_Pos   10           /**< \brief (EIC_INTENCLR) External Interrupt 10 Enable */
+#define EIC_INTENCLR_EXTINT10       (1 << EIC_INTENCLR_EXTINT10_Pos)
+#define EIC_INTENCLR_EXTINT11_Pos   11           /**< \brief (EIC_INTENCLR) External Interrupt 11 Enable */
+#define EIC_INTENCLR_EXTINT11       (1 << EIC_INTENCLR_EXTINT11_Pos)
+#define EIC_INTENCLR_EXTINT12_Pos   12           /**< \brief (EIC_INTENCLR) External Interrupt 12 Enable */
+#define EIC_INTENCLR_EXTINT12       (1 << EIC_INTENCLR_EXTINT12_Pos)
+#define EIC_INTENCLR_EXTINT13_Pos   13           /**< \brief (EIC_INTENCLR) External Interrupt 13 Enable */
+#define EIC_INTENCLR_EXTINT13       (1 << EIC_INTENCLR_EXTINT13_Pos)
+#define EIC_INTENCLR_EXTINT14_Pos   14           /**< \brief (EIC_INTENCLR) External Interrupt 14 Enable */
+#define EIC_INTENCLR_EXTINT14       (1 << EIC_INTENCLR_EXTINT14_Pos)
+#define EIC_INTENCLR_EXTINT15_Pos   15           /**< \brief (EIC_INTENCLR) External Interrupt 15 Enable */
+#define EIC_INTENCLR_EXTINT15       (1 << EIC_INTENCLR_EXTINT15_Pos)
+#define EIC_INTENCLR_EXTINT_Pos     0            /**< \brief (EIC_INTENCLR) External Interrupt x Enable */
+#define EIC_INTENCLR_EXTINT_Msk     (0xFFFFu << EIC_INTENCLR_EXTINT_Pos)
+#define EIC_INTENCLR_EXTINT(value)  ((EIC_INTENCLR_EXTINT_Msk & ((value) << EIC_INTENCLR_EXTINT_Pos)))
+#define EIC_INTENCLR_MASK           0x0000FFFFu  /**< \brief (EIC_INTENCLR) MASK Register */
+
+/* -------- EIC_INTENSET : (EIC Offset: 0x0C) (R/W 32) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t EXTINT0:1;        /*!< bit:      0  External Interrupt 0 Enable        */
+    uint32_t EXTINT1:1;        /*!< bit:      1  External Interrupt 1 Enable        */
+    uint32_t EXTINT2:1;        /*!< bit:      2  External Interrupt 2 Enable        */
+    uint32_t EXTINT3:1;        /*!< bit:      3  External Interrupt 3 Enable        */
+    uint32_t EXTINT4:1;        /*!< bit:      4  External Interrupt 4 Enable        */
+    uint32_t EXTINT5:1;        /*!< bit:      5  External Interrupt 5 Enable        */
+    uint32_t EXTINT6:1;        /*!< bit:      6  External Interrupt 6 Enable        */
+    uint32_t EXTINT7:1;        /*!< bit:      7  External Interrupt 7 Enable        */
+    uint32_t EXTINT8:1;        /*!< bit:      8  External Interrupt 8 Enable        */
+    uint32_t EXTINT9:1;        /*!< bit:      9  External Interrupt 9 Enable        */
+    uint32_t EXTINT10:1;       /*!< bit:     10  External Interrupt 10 Enable       */
+    uint32_t EXTINT11:1;       /*!< bit:     11  External Interrupt 11 Enable       */
+    uint32_t EXTINT12:1;       /*!< bit:     12  External Interrupt 12 Enable       */
+    uint32_t EXTINT13:1;       /*!< bit:     13  External Interrupt 13 Enable       */
+    uint32_t EXTINT14:1;       /*!< bit:     14  External Interrupt 14 Enable       */
+    uint32_t EXTINT15:1;       /*!< bit:     15  External Interrupt 15 Enable       */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t EXTINT:16;        /*!< bit:  0..15  External Interrupt x Enable        */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EIC_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_INTENSET_OFFSET         0x0C         /**< \brief (EIC_INTENSET offset) Interrupt Enable Set */
+#define EIC_INTENSET_RESETVALUE     0x00000000   /**< \brief (EIC_INTENSET reset_value) Interrupt Enable Set */
+
+#define EIC_INTENSET_EXTINT0_Pos    0            /**< \brief (EIC_INTENSET) External Interrupt 0 Enable */
+#define EIC_INTENSET_EXTINT0        (1 << EIC_INTENSET_EXTINT0_Pos)
+#define EIC_INTENSET_EXTINT1_Pos    1            /**< \brief (EIC_INTENSET) External Interrupt 1 Enable */
+#define EIC_INTENSET_EXTINT1        (1 << EIC_INTENSET_EXTINT1_Pos)
+#define EIC_INTENSET_EXTINT2_Pos    2            /**< \brief (EIC_INTENSET) External Interrupt 2 Enable */
+#define EIC_INTENSET_EXTINT2        (1 << EIC_INTENSET_EXTINT2_Pos)
+#define EIC_INTENSET_EXTINT3_Pos    3            /**< \brief (EIC_INTENSET) External Interrupt 3 Enable */
+#define EIC_INTENSET_EXTINT3        (1 << EIC_INTENSET_EXTINT3_Pos)
+#define EIC_INTENSET_EXTINT4_Pos    4            /**< \brief (EIC_INTENSET) External Interrupt 4 Enable */
+#define EIC_INTENSET_EXTINT4        (1 << EIC_INTENSET_EXTINT4_Pos)
+#define EIC_INTENSET_EXTINT5_Pos    5            /**< \brief (EIC_INTENSET) External Interrupt 5 Enable */
+#define EIC_INTENSET_EXTINT5        (1 << EIC_INTENSET_EXTINT5_Pos)
+#define EIC_INTENSET_EXTINT6_Pos    6            /**< \brief (EIC_INTENSET) External Interrupt 6 Enable */
+#define EIC_INTENSET_EXTINT6        (1 << EIC_INTENSET_EXTINT6_Pos)
+#define EIC_INTENSET_EXTINT7_Pos    7            /**< \brief (EIC_INTENSET) External Interrupt 7 Enable */
+#define EIC_INTENSET_EXTINT7        (1 << EIC_INTENSET_EXTINT7_Pos)
+#define EIC_INTENSET_EXTINT8_Pos    8            /**< \brief (EIC_INTENSET) External Interrupt 8 Enable */
+#define EIC_INTENSET_EXTINT8        (1 << EIC_INTENSET_EXTINT8_Pos)
+#define EIC_INTENSET_EXTINT9_Pos    9            /**< \brief (EIC_INTENSET) External Interrupt 9 Enable */
+#define EIC_INTENSET_EXTINT9        (1 << EIC_INTENSET_EXTINT9_Pos)
+#define EIC_INTENSET_EXTINT10_Pos   10           /**< \brief (EIC_INTENSET) External Interrupt 10 Enable */
+#define EIC_INTENSET_EXTINT10       (1 << EIC_INTENSET_EXTINT10_Pos)
+#define EIC_INTENSET_EXTINT11_Pos   11           /**< \brief (EIC_INTENSET) External Interrupt 11 Enable */
+#define EIC_INTENSET_EXTINT11       (1 << EIC_INTENSET_EXTINT11_Pos)
+#define EIC_INTENSET_EXTINT12_Pos   12           /**< \brief (EIC_INTENSET) External Interrupt 12 Enable */
+#define EIC_INTENSET_EXTINT12       (1 << EIC_INTENSET_EXTINT12_Pos)
+#define EIC_INTENSET_EXTINT13_Pos   13           /**< \brief (EIC_INTENSET) External Interrupt 13 Enable */
+#define EIC_INTENSET_EXTINT13       (1 << EIC_INTENSET_EXTINT13_Pos)
+#define EIC_INTENSET_EXTINT14_Pos   14           /**< \brief (EIC_INTENSET) External Interrupt 14 Enable */
+#define EIC_INTENSET_EXTINT14       (1 << EIC_INTENSET_EXTINT14_Pos)
+#define EIC_INTENSET_EXTINT15_Pos   15           /**< \brief (EIC_INTENSET) External Interrupt 15 Enable */
+#define EIC_INTENSET_EXTINT15       (1 << EIC_INTENSET_EXTINT15_Pos)
+#define EIC_INTENSET_EXTINT_Pos     0            /**< \brief (EIC_INTENSET) External Interrupt x Enable */
+#define EIC_INTENSET_EXTINT_Msk     (0xFFFFu << EIC_INTENSET_EXTINT_Pos)
+#define EIC_INTENSET_EXTINT(value)  ((EIC_INTENSET_EXTINT_Msk & ((value) << EIC_INTENSET_EXTINT_Pos)))
+#define EIC_INTENSET_MASK           0x0000FFFFu  /**< \brief (EIC_INTENSET) MASK Register */
+
+/* -------- EIC_INTFLAG : (EIC Offset: 0x10) (R/W 32) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t EXTINT0:1;        /*!< bit:      0  External Interrupt 0               */
+    uint32_t EXTINT1:1;        /*!< bit:      1  External Interrupt 1               */
+    uint32_t EXTINT2:1;        /*!< bit:      2  External Interrupt 2               */
+    uint32_t EXTINT3:1;        /*!< bit:      3  External Interrupt 3               */
+    uint32_t EXTINT4:1;        /*!< bit:      4  External Interrupt 4               */
+    uint32_t EXTINT5:1;        /*!< bit:      5  External Interrupt 5               */
+    uint32_t EXTINT6:1;        /*!< bit:      6  External Interrupt 6               */
+    uint32_t EXTINT7:1;        /*!< bit:      7  External Interrupt 7               */
+    uint32_t EXTINT8:1;        /*!< bit:      8  External Interrupt 8               */
+    uint32_t EXTINT9:1;        /*!< bit:      9  External Interrupt 9               */
+    uint32_t EXTINT10:1;       /*!< bit:     10  External Interrupt 10              */
+    uint32_t EXTINT11:1;       /*!< bit:     11  External Interrupt 11              */
+    uint32_t EXTINT12:1;       /*!< bit:     12  External Interrupt 12              */
+    uint32_t EXTINT13:1;       /*!< bit:     13  External Interrupt 13              */
+    uint32_t EXTINT14:1;       /*!< bit:     14  External Interrupt 14              */
+    uint32_t EXTINT15:1;       /*!< bit:     15  External Interrupt 15              */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t EXTINT:16;        /*!< bit:  0..15  External Interrupt x               */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EIC_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_INTFLAG_OFFSET          0x10         /**< \brief (EIC_INTFLAG offset) Interrupt Flag Status and Clear */
+#define EIC_INTFLAG_RESETVALUE      0x00000000   /**< \brief (EIC_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define EIC_INTFLAG_EXTINT0_Pos     0            /**< \brief (EIC_INTFLAG) External Interrupt 0 */
+#define EIC_INTFLAG_EXTINT0         (1 << EIC_INTFLAG_EXTINT0_Pos)
+#define EIC_INTFLAG_EXTINT1_Pos     1            /**< \brief (EIC_INTFLAG) External Interrupt 1 */
+#define EIC_INTFLAG_EXTINT1         (1 << EIC_INTFLAG_EXTINT1_Pos)
+#define EIC_INTFLAG_EXTINT2_Pos     2            /**< \brief (EIC_INTFLAG) External Interrupt 2 */
+#define EIC_INTFLAG_EXTINT2         (1 << EIC_INTFLAG_EXTINT2_Pos)
+#define EIC_INTFLAG_EXTINT3_Pos     3            /**< \brief (EIC_INTFLAG) External Interrupt 3 */
+#define EIC_INTFLAG_EXTINT3         (1 << EIC_INTFLAG_EXTINT3_Pos)
+#define EIC_INTFLAG_EXTINT4_Pos     4            /**< \brief (EIC_INTFLAG) External Interrupt 4 */
+#define EIC_INTFLAG_EXTINT4         (1 << EIC_INTFLAG_EXTINT4_Pos)
+#define EIC_INTFLAG_EXTINT5_Pos     5            /**< \brief (EIC_INTFLAG) External Interrupt 5 */
+#define EIC_INTFLAG_EXTINT5         (1 << EIC_INTFLAG_EXTINT5_Pos)
+#define EIC_INTFLAG_EXTINT6_Pos     6            /**< \brief (EIC_INTFLAG) External Interrupt 6 */
+#define EIC_INTFLAG_EXTINT6         (1 << EIC_INTFLAG_EXTINT6_Pos)
+#define EIC_INTFLAG_EXTINT7_Pos     7            /**< \brief (EIC_INTFLAG) External Interrupt 7 */
+#define EIC_INTFLAG_EXTINT7         (1 << EIC_INTFLAG_EXTINT7_Pos)
+#define EIC_INTFLAG_EXTINT8_Pos     8            /**< \brief (EIC_INTFLAG) External Interrupt 8 */
+#define EIC_INTFLAG_EXTINT8         (1 << EIC_INTFLAG_EXTINT8_Pos)
+#define EIC_INTFLAG_EXTINT9_Pos     9            /**< \brief (EIC_INTFLAG) External Interrupt 9 */
+#define EIC_INTFLAG_EXTINT9         (1 << EIC_INTFLAG_EXTINT9_Pos)
+#define EIC_INTFLAG_EXTINT10_Pos    10           /**< \brief (EIC_INTFLAG) External Interrupt 10 */
+#define EIC_INTFLAG_EXTINT10        (1 << EIC_INTFLAG_EXTINT10_Pos)
+#define EIC_INTFLAG_EXTINT11_Pos    11           /**< \brief (EIC_INTFLAG) External Interrupt 11 */
+#define EIC_INTFLAG_EXTINT11        (1 << EIC_INTFLAG_EXTINT11_Pos)
+#define EIC_INTFLAG_EXTINT12_Pos    12           /**< \brief (EIC_INTFLAG) External Interrupt 12 */
+#define EIC_INTFLAG_EXTINT12        (1 << EIC_INTFLAG_EXTINT12_Pos)
+#define EIC_INTFLAG_EXTINT13_Pos    13           /**< \brief (EIC_INTFLAG) External Interrupt 13 */
+#define EIC_INTFLAG_EXTINT13        (1 << EIC_INTFLAG_EXTINT13_Pos)
+#define EIC_INTFLAG_EXTINT14_Pos    14           /**< \brief (EIC_INTFLAG) External Interrupt 14 */
+#define EIC_INTFLAG_EXTINT14        (1 << EIC_INTFLAG_EXTINT14_Pos)
+#define EIC_INTFLAG_EXTINT15_Pos    15           /**< \brief (EIC_INTFLAG) External Interrupt 15 */
+#define EIC_INTFLAG_EXTINT15        (1 << EIC_INTFLAG_EXTINT15_Pos)
+#define EIC_INTFLAG_EXTINT_Pos      0            /**< \brief (EIC_INTFLAG) External Interrupt x */
+#define EIC_INTFLAG_EXTINT_Msk      (0xFFFFu << EIC_INTFLAG_EXTINT_Pos)
+#define EIC_INTFLAG_EXTINT(value)   ((EIC_INTFLAG_EXTINT_Msk & ((value) << EIC_INTFLAG_EXTINT_Pos)))
+#define EIC_INTFLAG_MASK            0x0000FFFFu  /**< \brief (EIC_INTFLAG) MASK Register */
+
+/* -------- EIC_WAKEUP : (EIC Offset: 0x14) (R/W 32) Wake-Up Enable -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t WAKEUPEN0:1;      /*!< bit:      0  External Interrupt 0 Wake-up Enable */
+    uint32_t WAKEUPEN1:1;      /*!< bit:      1  External Interrupt 1 Wake-up Enable */
+    uint32_t WAKEUPEN2:1;      /*!< bit:      2  External Interrupt 2 Wake-up Enable */
+    uint32_t WAKEUPEN3:1;      /*!< bit:      3  External Interrupt 3 Wake-up Enable */
+    uint32_t WAKEUPEN4:1;      /*!< bit:      4  External Interrupt 4 Wake-up Enable */
+    uint32_t WAKEUPEN5:1;      /*!< bit:      5  External Interrupt 5 Wake-up Enable */
+    uint32_t WAKEUPEN6:1;      /*!< bit:      6  External Interrupt 6 Wake-up Enable */
+    uint32_t WAKEUPEN7:1;      /*!< bit:      7  External Interrupt 7 Wake-up Enable */
+    uint32_t WAKEUPEN8:1;      /*!< bit:      8  External Interrupt 8 Wake-up Enable */
+    uint32_t WAKEUPEN9:1;      /*!< bit:      9  External Interrupt 9 Wake-up Enable */
+    uint32_t WAKEUPEN10:1;     /*!< bit:     10  External Interrupt 10 Wake-up Enable */
+    uint32_t WAKEUPEN11:1;     /*!< bit:     11  External Interrupt 11 Wake-up Enable */
+    uint32_t WAKEUPEN12:1;     /*!< bit:     12  External Interrupt 12 Wake-up Enable */
+    uint32_t WAKEUPEN13:1;     /*!< bit:     13  External Interrupt 13 Wake-up Enable */
+    uint32_t WAKEUPEN14:1;     /*!< bit:     14  External Interrupt 14 Wake-up Enable */
+    uint32_t WAKEUPEN15:1;     /*!< bit:     15  External Interrupt 15 Wake-up Enable */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t WAKEUPEN:16;      /*!< bit:  0..15  External Interrupt x Wake-up Enable */
+    uint32_t :16;              /*!< bit: 16..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EIC_WAKEUP_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_WAKEUP_OFFSET           0x14         /**< \brief (EIC_WAKEUP offset) Wake-Up Enable */
+#define EIC_WAKEUP_RESETVALUE       0x00000000   /**< \brief (EIC_WAKEUP reset_value) Wake-Up Enable */
+
+#define EIC_WAKEUP_WAKEUPEN0_Pos    0            /**< \brief (EIC_WAKEUP) External Interrupt 0 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN0        (1 << EIC_WAKEUP_WAKEUPEN0_Pos)
+#define EIC_WAKEUP_WAKEUPEN1_Pos    1            /**< \brief (EIC_WAKEUP) External Interrupt 1 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN1        (1 << EIC_WAKEUP_WAKEUPEN1_Pos)
+#define EIC_WAKEUP_WAKEUPEN2_Pos    2            /**< \brief (EIC_WAKEUP) External Interrupt 2 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN2        (1 << EIC_WAKEUP_WAKEUPEN2_Pos)
+#define EIC_WAKEUP_WAKEUPEN3_Pos    3            /**< \brief (EIC_WAKEUP) External Interrupt 3 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN3        (1 << EIC_WAKEUP_WAKEUPEN3_Pos)
+#define EIC_WAKEUP_WAKEUPEN4_Pos    4            /**< \brief (EIC_WAKEUP) External Interrupt 4 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN4        (1 << EIC_WAKEUP_WAKEUPEN4_Pos)
+#define EIC_WAKEUP_WAKEUPEN5_Pos    5            /**< \brief (EIC_WAKEUP) External Interrupt 5 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN5        (1 << EIC_WAKEUP_WAKEUPEN5_Pos)
+#define EIC_WAKEUP_WAKEUPEN6_Pos    6            /**< \brief (EIC_WAKEUP) External Interrupt 6 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN6        (1 << EIC_WAKEUP_WAKEUPEN6_Pos)
+#define EIC_WAKEUP_WAKEUPEN7_Pos    7            /**< \brief (EIC_WAKEUP) External Interrupt 7 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN7        (1 << EIC_WAKEUP_WAKEUPEN7_Pos)
+#define EIC_WAKEUP_WAKEUPEN8_Pos    8            /**< \brief (EIC_WAKEUP) External Interrupt 8 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN8        (1 << EIC_WAKEUP_WAKEUPEN8_Pos)
+#define EIC_WAKEUP_WAKEUPEN9_Pos    9            /**< \brief (EIC_WAKEUP) External Interrupt 9 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN9        (1 << EIC_WAKEUP_WAKEUPEN9_Pos)
+#define EIC_WAKEUP_WAKEUPEN10_Pos   10           /**< \brief (EIC_WAKEUP) External Interrupt 10 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN10       (1 << EIC_WAKEUP_WAKEUPEN10_Pos)
+#define EIC_WAKEUP_WAKEUPEN11_Pos   11           /**< \brief (EIC_WAKEUP) External Interrupt 11 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN11       (1 << EIC_WAKEUP_WAKEUPEN11_Pos)
+#define EIC_WAKEUP_WAKEUPEN12_Pos   12           /**< \brief (EIC_WAKEUP) External Interrupt 12 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN12       (1 << EIC_WAKEUP_WAKEUPEN12_Pos)
+#define EIC_WAKEUP_WAKEUPEN13_Pos   13           /**< \brief (EIC_WAKEUP) External Interrupt 13 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN13       (1 << EIC_WAKEUP_WAKEUPEN13_Pos)
+#define EIC_WAKEUP_WAKEUPEN14_Pos   14           /**< \brief (EIC_WAKEUP) External Interrupt 14 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN14       (1 << EIC_WAKEUP_WAKEUPEN14_Pos)
+#define EIC_WAKEUP_WAKEUPEN15_Pos   15           /**< \brief (EIC_WAKEUP) External Interrupt 15 Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN15       (1 << EIC_WAKEUP_WAKEUPEN15_Pos)
+#define EIC_WAKEUP_WAKEUPEN_Pos     0            /**< \brief (EIC_WAKEUP) External Interrupt x Wake-up Enable */
+#define EIC_WAKEUP_WAKEUPEN_Msk     (0xFFFFu << EIC_WAKEUP_WAKEUPEN_Pos)
+#define EIC_WAKEUP_WAKEUPEN(value)  ((EIC_WAKEUP_WAKEUPEN_Msk & ((value) << EIC_WAKEUP_WAKEUPEN_Pos)))
+#define EIC_WAKEUP_MASK             0x0000FFFFu  /**< \brief (EIC_WAKEUP) MASK Register */
+
+/* -------- EIC_CONFIG : (EIC Offset: 0x18) (R/W 32) Configuration n -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SENSE0:3;         /*!< bit:  0.. 2  Input Sense 0 Configuration        */
+    uint32_t FILTEN0:1;        /*!< bit:      3  Filter 0 Enable                    */
+    uint32_t SENSE1:3;         /*!< bit:  4.. 6  Input Sense 1 Configuration        */
+    uint32_t FILTEN1:1;        /*!< bit:      7  Filter 1 Enable                    */
+    uint32_t SENSE2:3;         /*!< bit:  8..10  Input Sense 2 Configuration        */
+    uint32_t FILTEN2:1;        /*!< bit:     11  Filter 2 Enable                    */
+    uint32_t SENSE3:3;         /*!< bit: 12..14  Input Sense 3 Configuration        */
+    uint32_t FILTEN3:1;        /*!< bit:     15  Filter 3 Enable                    */
+    uint32_t SENSE4:3;         /*!< bit: 16..18  Input Sense 4 Configuration        */
+    uint32_t FILTEN4:1;        /*!< bit:     19  Filter 4 Enable                    */
+    uint32_t SENSE5:3;         /*!< bit: 20..22  Input Sense 5 Configuration        */
+    uint32_t FILTEN5:1;        /*!< bit:     23  Filter 5 Enable                    */
+    uint32_t SENSE6:3;         /*!< bit: 24..26  Input Sense 6 Configuration        */
+    uint32_t FILTEN6:1;        /*!< bit:     27  Filter 6 Enable                    */
+    uint32_t SENSE7:3;         /*!< bit: 28..30  Input Sense 7 Configuration        */
+    uint32_t FILTEN7:1;        /*!< bit:     31  Filter 7 Enable                    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EIC_CONFIG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EIC_CONFIG_OFFSET           0x18         /**< \brief (EIC_CONFIG offset) Configuration n */
+#define EIC_CONFIG_RESETVALUE       0x00000000   /**< \brief (EIC_CONFIG reset_value) Configuration n */
+
+#define EIC_CONFIG_SENSE0_Pos       0            /**< \brief (EIC_CONFIG) Input Sense 0 Configuration */
+#define EIC_CONFIG_SENSE0_Msk       (0x7u << EIC_CONFIG_SENSE0_Pos)
+#define EIC_CONFIG_SENSE0(value)    ((EIC_CONFIG_SENSE0_Msk & ((value) << EIC_CONFIG_SENSE0_Pos)))
+#define   EIC_CONFIG_SENSE0_NONE_Val      0x0u   /**< \brief (EIC_CONFIG) No detection */
+#define   EIC_CONFIG_SENSE0_RISE_Val      0x1u   /**< \brief (EIC_CONFIG) Rising-edge detection */
+#define   EIC_CONFIG_SENSE0_FALL_Val      0x2u   /**< \brief (EIC_CONFIG) Falling-edge detection */
+#define   EIC_CONFIG_SENSE0_BOTH_Val      0x3u   /**< \brief (EIC_CONFIG) Both-edges detection */
+#define   EIC_CONFIG_SENSE0_HIGH_Val      0x4u   /**< \brief (EIC_CONFIG) High-level detection */
+#define   EIC_CONFIG_SENSE0_LOW_Val       0x5u   /**< \brief (EIC_CONFIG) Low-level detection */
+#define EIC_CONFIG_SENSE0_NONE      (EIC_CONFIG_SENSE0_NONE_Val    << EIC_CONFIG_SENSE0_Pos)
+#define EIC_CONFIG_SENSE0_RISE      (EIC_CONFIG_SENSE0_RISE_Val    << EIC_CONFIG_SENSE0_Pos)
+#define EIC_CONFIG_SENSE0_FALL      (EIC_CONFIG_SENSE0_FALL_Val    << EIC_CONFIG_SENSE0_Pos)
+#define EIC_CONFIG_SENSE0_BOTH      (EIC_CONFIG_SENSE0_BOTH_Val    << EIC_CONFIG_SENSE0_Pos)
+#define EIC_CONFIG_SENSE0_HIGH      (EIC_CONFIG_SENSE0_HIGH_Val    << EIC_CONFIG_SENSE0_Pos)
+#define EIC_CONFIG_SENSE0_LOW       (EIC_CONFIG_SENSE0_LOW_Val     << EIC_CONFIG_SENSE0_Pos)
+#define EIC_CONFIG_FILTEN0_Pos      3            /**< \brief (EIC_CONFIG) Filter 0 Enable */
+#define EIC_CONFIG_FILTEN0          (0x1u << EIC_CONFIG_FILTEN0_Pos)
+#define EIC_CONFIG_SENSE1_Pos       4            /**< \brief (EIC_CONFIG) Input Sense 1 Configuration */
+#define EIC_CONFIG_SENSE1_Msk       (0x7u << EIC_CONFIG_SENSE1_Pos)
+#define EIC_CONFIG_SENSE1(value)    ((EIC_CONFIG_SENSE1_Msk & ((value) << EIC_CONFIG_SENSE1_Pos)))
+#define   EIC_CONFIG_SENSE1_NONE_Val      0x0u   /**< \brief (EIC_CONFIG) No detection */
+#define   EIC_CONFIG_SENSE1_RISE_Val      0x1u   /**< \brief (EIC_CONFIG) Rising edge detection */
+#define   EIC_CONFIG_SENSE1_FALL_Val      0x2u   /**< \brief (EIC_CONFIG) Falling edge detection */
+#define   EIC_CONFIG_SENSE1_BOTH_Val      0x3u   /**< \brief (EIC_CONFIG) Both edges detection */
+#define   EIC_CONFIG_SENSE1_HIGH_Val      0x4u   /**< \brief (EIC_CONFIG) High level detection */
+#define   EIC_CONFIG_SENSE1_LOW_Val       0x5u   /**< \brief (EIC_CONFIG) Low level detection */
+#define EIC_CONFIG_SENSE1_NONE      (EIC_CONFIG_SENSE1_NONE_Val    << EIC_CONFIG_SENSE1_Pos)
+#define EIC_CONFIG_SENSE1_RISE      (EIC_CONFIG_SENSE1_RISE_Val    << EIC_CONFIG_SENSE1_Pos)
+#define EIC_CONFIG_SENSE1_FALL      (EIC_CONFIG_SENSE1_FALL_Val    << EIC_CONFIG_SENSE1_Pos)
+#define EIC_CONFIG_SENSE1_BOTH      (EIC_CONFIG_SENSE1_BOTH_Val    << EIC_CONFIG_SENSE1_Pos)
+#define EIC_CONFIG_SENSE1_HIGH      (EIC_CONFIG_SENSE1_HIGH_Val    << EIC_CONFIG_SENSE1_Pos)
+#define EIC_CONFIG_SENSE1_LOW       (EIC_CONFIG_SENSE1_LOW_Val     << EIC_CONFIG_SENSE1_Pos)
+#define EIC_CONFIG_FILTEN1_Pos      7            /**< \brief (EIC_CONFIG) Filter 1 Enable */
+#define EIC_CONFIG_FILTEN1          (0x1u << EIC_CONFIG_FILTEN1_Pos)
+#define EIC_CONFIG_SENSE2_Pos       8            /**< \brief (EIC_CONFIG) Input Sense 2 Configuration */
+#define EIC_CONFIG_SENSE2_Msk       (0x7u << EIC_CONFIG_SENSE2_Pos)
+#define EIC_CONFIG_SENSE2(value)    ((EIC_CONFIG_SENSE2_Msk & ((value) << EIC_CONFIG_SENSE2_Pos)))
+#define   EIC_CONFIG_SENSE2_NONE_Val      0x0u   /**< \brief (EIC_CONFIG) No detection */
+#define   EIC_CONFIG_SENSE2_RISE_Val      0x1u   /**< \brief (EIC_CONFIG) Rising edge detection */
+#define   EIC_CONFIG_SENSE2_FALL_Val      0x2u   /**< \brief (EIC_CONFIG) Falling edge detection */
+#define   EIC_CONFIG_SENSE2_BOTH_Val      0x3u   /**< \brief (EIC_CONFIG) Both edges detection */
+#define   EIC_CONFIG_SENSE2_HIGH_Val      0x4u   /**< \brief (EIC_CONFIG) High level detection */
+#define   EIC_CONFIG_SENSE2_LOW_Val       0x5u   /**< \brief (EIC_CONFIG) Low level detection */
+#define EIC_CONFIG_SENSE2_NONE      (EIC_CONFIG_SENSE2_NONE_Val    << EIC_CONFIG_SENSE2_Pos)
+#define EIC_CONFIG_SENSE2_RISE      (EIC_CONFIG_SENSE2_RISE_Val    << EIC_CONFIG_SENSE2_Pos)
+#define EIC_CONFIG_SENSE2_FALL      (EIC_CONFIG_SENSE2_FALL_Val    << EIC_CONFIG_SENSE2_Pos)
+#define EIC_CONFIG_SENSE2_BOTH      (EIC_CONFIG_SENSE2_BOTH_Val    << EIC_CONFIG_SENSE2_Pos)
+#define EIC_CONFIG_SENSE2_HIGH      (EIC_CONFIG_SENSE2_HIGH_Val    << EIC_CONFIG_SENSE2_Pos)
+#define EIC_CONFIG_SENSE2_LOW       (EIC_CONFIG_SENSE2_LOW_Val     << EIC_CONFIG_SENSE2_Pos)
+#define EIC_CONFIG_FILTEN2_Pos      11           /**< \brief (EIC_CONFIG) Filter 2 Enable */
+#define EIC_CONFIG_FILTEN2          (0x1u << EIC_CONFIG_FILTEN2_Pos)
+#define EIC_CONFIG_SENSE3_Pos       12           /**< \brief (EIC_CONFIG) Input Sense 3 Configuration */
+#define EIC_CONFIG_SENSE3_Msk       (0x7u << EIC_CONFIG_SENSE3_Pos)
+#define EIC_CONFIG_SENSE3(value)    ((EIC_CONFIG_SENSE3_Msk & ((value) << EIC_CONFIG_SENSE3_Pos)))
+#define   EIC_CONFIG_SENSE3_NONE_Val      0x0u   /**< \brief (EIC_CONFIG) No detection */
+#define   EIC_CONFIG_SENSE3_RISE_Val      0x1u   /**< \brief (EIC_CONFIG) Rising edge detection */
+#define   EIC_CONFIG_SENSE3_FALL_Val      0x2u   /**< \brief (EIC_CONFIG) Falling edge detection */
+#define   EIC_CONFIG_SENSE3_BOTH_Val      0x3u   /**< \brief (EIC_CONFIG) Both edges detection */
+#define   EIC_CONFIG_SENSE3_HIGH_Val      0x4u   /**< \brief (EIC_CONFIG) High level detection */
+#define   EIC_CONFIG_SENSE3_LOW_Val       0x5u   /**< \brief (EIC_CONFIG) Low level detection */
+#define EIC_CONFIG_SENSE3_NONE      (EIC_CONFIG_SENSE3_NONE_Val    << EIC_CONFIG_SENSE3_Pos)
+#define EIC_CONFIG_SENSE3_RISE      (EIC_CONFIG_SENSE3_RISE_Val    << EIC_CONFIG_SENSE3_Pos)
+#define EIC_CONFIG_SENSE3_FALL      (EIC_CONFIG_SENSE3_FALL_Val    << EIC_CONFIG_SENSE3_Pos)
+#define EIC_CONFIG_SENSE3_BOTH      (EIC_CONFIG_SENSE3_BOTH_Val    << EIC_CONFIG_SENSE3_Pos)
+#define EIC_CONFIG_SENSE3_HIGH      (EIC_CONFIG_SENSE3_HIGH_Val    << EIC_CONFIG_SENSE3_Pos)
+#define EIC_CONFIG_SENSE3_LOW       (EIC_CONFIG_SENSE3_LOW_Val     << EIC_CONFIG_SENSE3_Pos)
+#define EIC_CONFIG_FILTEN3_Pos      15           /**< \brief (EIC_CONFIG) Filter 3 Enable */
+#define EIC_CONFIG_FILTEN3          (0x1u << EIC_CONFIG_FILTEN3_Pos)
+#define EIC_CONFIG_SENSE4_Pos       16           /**< \brief (EIC_CONFIG) Input Sense 4 Configuration */
+#define EIC_CONFIG_SENSE4_Msk       (0x7u << EIC_CONFIG_SENSE4_Pos)
+#define EIC_CONFIG_SENSE4(value)    ((EIC_CONFIG_SENSE4_Msk & ((value) << EIC_CONFIG_SENSE4_Pos)))
+#define   EIC_CONFIG_SENSE4_NONE_Val      0x0u   /**< \brief (EIC_CONFIG) No detection */
+#define   EIC_CONFIG_SENSE4_RISE_Val      0x1u   /**< \brief (EIC_CONFIG) Rising edge detection */
+#define   EIC_CONFIG_SENSE4_FALL_Val      0x2u   /**< \brief (EIC_CONFIG) Falling edge detection */
+#define   EIC_CONFIG_SENSE4_BOTH_Val      0x3u   /**< \brief (EIC_CONFIG) Both edges detection */
+#define   EIC_CONFIG_SENSE4_HIGH_Val      0x4u   /**< \brief (EIC_CONFIG) High level detection */
+#define   EIC_CONFIG_SENSE4_LOW_Val       0x5u   /**< \brief (EIC_CONFIG) Low level detection */
+#define EIC_CONFIG_SENSE4_NONE      (EIC_CONFIG_SENSE4_NONE_Val    << EIC_CONFIG_SENSE4_Pos)
+#define EIC_CONFIG_SENSE4_RISE      (EIC_CONFIG_SENSE4_RISE_Val    << EIC_CONFIG_SENSE4_Pos)
+#define EIC_CONFIG_SENSE4_FALL      (EIC_CONFIG_SENSE4_FALL_Val    << EIC_CONFIG_SENSE4_Pos)
+#define EIC_CONFIG_SENSE4_BOTH      (EIC_CONFIG_SENSE4_BOTH_Val    << EIC_CONFIG_SENSE4_Pos)
+#define EIC_CONFIG_SENSE4_HIGH      (EIC_CONFIG_SENSE4_HIGH_Val    << EIC_CONFIG_SENSE4_Pos)
+#define EIC_CONFIG_SENSE4_LOW       (EIC_CONFIG_SENSE4_LOW_Val     << EIC_CONFIG_SENSE4_Pos)
+#define EIC_CONFIG_FILTEN4_Pos      19           /**< \brief (EIC_CONFIG) Filter 4 Enable */
+#define EIC_CONFIG_FILTEN4          (0x1u << EIC_CONFIG_FILTEN4_Pos)
+#define EIC_CONFIG_SENSE5_Pos       20           /**< \brief (EIC_CONFIG) Input Sense 5 Configuration */
+#define EIC_CONFIG_SENSE5_Msk       (0x7u << EIC_CONFIG_SENSE5_Pos)
+#define EIC_CONFIG_SENSE5(value)    ((EIC_CONFIG_SENSE5_Msk & ((value) << EIC_CONFIG_SENSE5_Pos)))
+#define   EIC_CONFIG_SENSE5_NONE_Val      0x0u   /**< \brief (EIC_CONFIG) No detection */
+#define   EIC_CONFIG_SENSE5_RISE_Val      0x1u   /**< \brief (EIC_CONFIG) Rising edge detection */
+#define   EIC_CONFIG_SENSE5_FALL_Val      0x2u   /**< \brief (EIC_CONFIG) Falling edge detection */
+#define   EIC_CONFIG_SENSE5_BOTH_Val      0x3u   /**< \brief (EIC_CONFIG) Both edges detection */
+#define   EIC_CONFIG_SENSE5_HIGH_Val      0x4u   /**< \brief (EIC_CONFIG) High level detection */
+#define   EIC_CONFIG_SENSE5_LOW_Val       0x5u   /**< \brief (EIC_CONFIG) Low level detection */
+#define EIC_CONFIG_SENSE5_NONE      (EIC_CONFIG_SENSE5_NONE_Val    << EIC_CONFIG_SENSE5_Pos)
+#define EIC_CONFIG_SENSE5_RISE      (EIC_CONFIG_SENSE5_RISE_Val    << EIC_CONFIG_SENSE5_Pos)
+#define EIC_CONFIG_SENSE5_FALL      (EIC_CONFIG_SENSE5_FALL_Val    << EIC_CONFIG_SENSE5_Pos)
+#define EIC_CONFIG_SENSE5_BOTH      (EIC_CONFIG_SENSE5_BOTH_Val    << EIC_CONFIG_SENSE5_Pos)
+#define EIC_CONFIG_SENSE5_HIGH      (EIC_CONFIG_SENSE5_HIGH_Val    << EIC_CONFIG_SENSE5_Pos)
+#define EIC_CONFIG_SENSE5_LOW       (EIC_CONFIG_SENSE5_LOW_Val     << EIC_CONFIG_SENSE5_Pos)
+#define EIC_CONFIG_FILTEN5_Pos      23           /**< \brief (EIC_CONFIG) Filter 5 Enable */
+#define EIC_CONFIG_FILTEN5          (0x1u << EIC_CONFIG_FILTEN5_Pos)
+#define EIC_CONFIG_SENSE6_Pos       24           /**< \brief (EIC_CONFIG) Input Sense 6 Configuration */
+#define EIC_CONFIG_SENSE6_Msk       (0x7u << EIC_CONFIG_SENSE6_Pos)
+#define EIC_CONFIG_SENSE6(value)    ((EIC_CONFIG_SENSE6_Msk & ((value) << EIC_CONFIG_SENSE6_Pos)))
+#define   EIC_CONFIG_SENSE6_NONE_Val      0x0u   /**< \brief (EIC_CONFIG) No detection */
+#define   EIC_CONFIG_SENSE6_RISE_Val      0x1u   /**< \brief (EIC_CONFIG) Rising edge detection */
+#define   EIC_CONFIG_SENSE6_FALL_Val      0x2u   /**< \brief (EIC_CONFIG) Falling edge detection */
+#define   EIC_CONFIG_SENSE6_BOTH_Val      0x3u   /**< \brief (EIC_CONFIG) Both edges detection */
+#define   EIC_CONFIG_SENSE6_HIGH_Val      0x4u   /**< \brief (EIC_CONFIG) High level detection */
+#define   EIC_CONFIG_SENSE6_LOW_Val       0x5u   /**< \brief (EIC_CONFIG) Low level detection */
+#define EIC_CONFIG_SENSE6_NONE      (EIC_CONFIG_SENSE6_NONE_Val    << EIC_CONFIG_SENSE6_Pos)
+#define EIC_CONFIG_SENSE6_RISE      (EIC_CONFIG_SENSE6_RISE_Val    << EIC_CONFIG_SENSE6_Pos)
+#define EIC_CONFIG_SENSE6_FALL      (EIC_CONFIG_SENSE6_FALL_Val    << EIC_CONFIG_SENSE6_Pos)
+#define EIC_CONFIG_SENSE6_BOTH      (EIC_CONFIG_SENSE6_BOTH_Val    << EIC_CONFIG_SENSE6_Pos)
+#define EIC_CONFIG_SENSE6_HIGH      (EIC_CONFIG_SENSE6_HIGH_Val    << EIC_CONFIG_SENSE6_Pos)
+#define EIC_CONFIG_SENSE6_LOW       (EIC_CONFIG_SENSE6_LOW_Val     << EIC_CONFIG_SENSE6_Pos)
+#define EIC_CONFIG_FILTEN6_Pos      27           /**< \brief (EIC_CONFIG) Filter 6 Enable */
+#define EIC_CONFIG_FILTEN6          (0x1u << EIC_CONFIG_FILTEN6_Pos)
+#define EIC_CONFIG_SENSE7_Pos       28           /**< \brief (EIC_CONFIG) Input Sense 7 Configuration */
+#define EIC_CONFIG_SENSE7_Msk       (0x7u << EIC_CONFIG_SENSE7_Pos)
+#define EIC_CONFIG_SENSE7(value)    ((EIC_CONFIG_SENSE7_Msk & ((value) << EIC_CONFIG_SENSE7_Pos)))
+#define   EIC_CONFIG_SENSE7_NONE_Val      0x0u   /**< \brief (EIC_CONFIG) No detection */
+#define   EIC_CONFIG_SENSE7_RISE_Val      0x1u   /**< \brief (EIC_CONFIG) Rising edge detection */
+#define   EIC_CONFIG_SENSE7_FALL_Val      0x2u   /**< \brief (EIC_CONFIG) Falling edge detection */
+#define   EIC_CONFIG_SENSE7_BOTH_Val      0x3u   /**< \brief (EIC_CONFIG) Both edges detection */
+#define   EIC_CONFIG_SENSE7_HIGH_Val      0x4u   /**< \brief (EIC_CONFIG) High level detection */
+#define   EIC_CONFIG_SENSE7_LOW_Val       0x5u   /**< \brief (EIC_CONFIG) Low level detection */
+#define EIC_CONFIG_SENSE7_NONE      (EIC_CONFIG_SENSE7_NONE_Val    << EIC_CONFIG_SENSE7_Pos)
+#define EIC_CONFIG_SENSE7_RISE      (EIC_CONFIG_SENSE7_RISE_Val    << EIC_CONFIG_SENSE7_Pos)
+#define EIC_CONFIG_SENSE7_FALL      (EIC_CONFIG_SENSE7_FALL_Val    << EIC_CONFIG_SENSE7_Pos)
+#define EIC_CONFIG_SENSE7_BOTH      (EIC_CONFIG_SENSE7_BOTH_Val    << EIC_CONFIG_SENSE7_Pos)
+#define EIC_CONFIG_SENSE7_HIGH      (EIC_CONFIG_SENSE7_HIGH_Val    << EIC_CONFIG_SENSE7_Pos)
+#define EIC_CONFIG_SENSE7_LOW       (EIC_CONFIG_SENSE7_LOW_Val     << EIC_CONFIG_SENSE7_Pos)
+#define EIC_CONFIG_FILTEN7_Pos      31           /**< \brief (EIC_CONFIG) Filter 7 Enable */
+#define EIC_CONFIG_FILTEN7          (0x1u << EIC_CONFIG_FILTEN7_Pos)
+#define EIC_CONFIG_MASK             0xFFFFFFFFu  /**< \brief (EIC_CONFIG) MASK Register */
+
+/** \brief EIC hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO EIC_CTRL_Type             CTRL;        /**< \brief Offset: 0x00 (R/W  8) Control */
+  __I  EIC_STATUS_Type           STATUS;      /**< \brief Offset: 0x01 (R/   8) Status */
+  __IO EIC_NMICTRL_Type          NMICTRL;     /**< \brief Offset: 0x02 (R/W  8) Non-Maskable Interrupt Control */
+  __IO EIC_NMIFLAG_Type          NMIFLAG;     /**< \brief Offset: 0x03 (R/W  8) Non-Maskable Interrupt Flag Status and Clear */
+  __IO EIC_EVCTRL_Type           EVCTRL;      /**< \brief Offset: 0x04 (R/W 32) Event Control */
+  __IO EIC_INTENCLR_Type         INTENCLR;    /**< \brief Offset: 0x08 (R/W 32) Interrupt Enable Clear */
+  __IO EIC_INTENSET_Type         INTENSET;    /**< \brief Offset: 0x0C (R/W 32) Interrupt Enable Set */
+  __IO EIC_INTFLAG_Type          INTFLAG;     /**< \brief Offset: 0x10 (R/W 32) Interrupt Flag Status and Clear */
+  __IO EIC_WAKEUP_Type           WAKEUP;      /**< \brief Offset: 0x14 (R/W 32) Wake-Up Enable */
+  __IO EIC_CONFIG_Type           CONFIG[2];   /**< \brief Offset: 0x18 (R/W 32) Configuration n */
+} Eic;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_EIC_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/evsys.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/evsys.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/evsys.h	(revision 136)
@@ -0,0 +1,604 @@
+/**
+ * \file
+ *
+ * \brief Component description for EVSYS
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_EVSYS_COMPONENT_
+#define _SAMD21_EVSYS_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR EVSYS */
+/* ========================================================================== */
+/** \addtogroup SAMD21_EVSYS Event System Interface */
+/*@{*/
+
+#define EVSYS_U2208
+#define REV_EVSYS                   0x101
+
+/* -------- EVSYS_CTRL : (EVSYS Offset: 0x00) ( /W  8) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint8_t  :3;               /*!< bit:  1.. 3  Reserved                           */
+    uint8_t  GCLKREQ:1;        /*!< bit:      4  Generic Clock Requests             */
+    uint8_t  :3;               /*!< bit:  5.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} EVSYS_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EVSYS_CTRL_OFFSET           0x00         /**< \brief (EVSYS_CTRL offset) Control */
+#define EVSYS_CTRL_RESETVALUE       0x00         /**< \brief (EVSYS_CTRL reset_value) Control */
+
+#define EVSYS_CTRL_SWRST_Pos        0            /**< \brief (EVSYS_CTRL) Software Reset */
+#define EVSYS_CTRL_SWRST            (0x1u << EVSYS_CTRL_SWRST_Pos)
+#define EVSYS_CTRL_GCLKREQ_Pos      4            /**< \brief (EVSYS_CTRL) Generic Clock Requests */
+#define EVSYS_CTRL_GCLKREQ          (0x1u << EVSYS_CTRL_GCLKREQ_Pos)
+#define EVSYS_CTRL_MASK             0x11u        /**< \brief (EVSYS_CTRL) MASK Register */
+
+/* -------- EVSYS_CHANNEL : (EVSYS Offset: 0x04) (R/W 32) Channel -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CHANNEL:4;        /*!< bit:  0.. 3  Channel Selection                  */
+    uint32_t :4;               /*!< bit:  4.. 7  Reserved                           */
+    uint32_t SWEVT:1;          /*!< bit:      8  Software Event                     */
+    uint32_t :7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t EVGEN:7;          /*!< bit: 16..22  Event Generator Selection          */
+    uint32_t :1;               /*!< bit:     23  Reserved                           */
+    uint32_t PATH:2;           /*!< bit: 24..25  Path Selection                     */
+    uint32_t EDGSEL:2;         /*!< bit: 26..27  Edge Detection Selection           */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EVSYS_CHANNEL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EVSYS_CHANNEL_OFFSET        0x04         /**< \brief (EVSYS_CHANNEL offset) Channel */
+#define EVSYS_CHANNEL_RESETVALUE    0x00000000   /**< \brief (EVSYS_CHANNEL reset_value) Channel */
+
+#define EVSYS_CHANNEL_CHANNEL_Pos   0            /**< \brief (EVSYS_CHANNEL) Channel Selection */
+#define EVSYS_CHANNEL_CHANNEL_Msk   (0xFu << EVSYS_CHANNEL_CHANNEL_Pos)
+#define EVSYS_CHANNEL_CHANNEL(value) ((EVSYS_CHANNEL_CHANNEL_Msk & ((value) << EVSYS_CHANNEL_CHANNEL_Pos)))
+#define EVSYS_CHANNEL_SWEVT_Pos     8            /**< \brief (EVSYS_CHANNEL) Software Event */
+#define EVSYS_CHANNEL_SWEVT         (0x1u << EVSYS_CHANNEL_SWEVT_Pos)
+#define EVSYS_CHANNEL_EVGEN_Pos     16           /**< \brief (EVSYS_CHANNEL) Event Generator Selection */
+#define EVSYS_CHANNEL_EVGEN_Msk     (0x7Fu << EVSYS_CHANNEL_EVGEN_Pos)
+#define EVSYS_CHANNEL_EVGEN(value)  ((EVSYS_CHANNEL_EVGEN_Msk & ((value) << EVSYS_CHANNEL_EVGEN_Pos)))
+#define EVSYS_CHANNEL_PATH_Pos      24           /**< \brief (EVSYS_CHANNEL) Path Selection */
+#define EVSYS_CHANNEL_PATH_Msk      (0x3u << EVSYS_CHANNEL_PATH_Pos)
+#define EVSYS_CHANNEL_PATH(value)   ((EVSYS_CHANNEL_PATH_Msk & ((value) << EVSYS_CHANNEL_PATH_Pos)))
+#define   EVSYS_CHANNEL_PATH_SYNCHRONOUS_Val 0x0u   /**< \brief (EVSYS_CHANNEL) Synchronous path */
+#define   EVSYS_CHANNEL_PATH_RESYNCHRONIZED_Val 0x1u   /**< \brief (EVSYS_CHANNEL) Resynchronized path */
+#define   EVSYS_CHANNEL_PATH_ASYNCHRONOUS_Val 0x2u   /**< \brief (EVSYS_CHANNEL) Asynchronous path */
+#define EVSYS_CHANNEL_PATH_SYNCHRONOUS (EVSYS_CHANNEL_PATH_SYNCHRONOUS_Val << EVSYS_CHANNEL_PATH_Pos)
+#define EVSYS_CHANNEL_PATH_RESYNCHRONIZED (EVSYS_CHANNEL_PATH_RESYNCHRONIZED_Val << EVSYS_CHANNEL_PATH_Pos)
+#define EVSYS_CHANNEL_PATH_ASYNCHRONOUS (EVSYS_CHANNEL_PATH_ASYNCHRONOUS_Val << EVSYS_CHANNEL_PATH_Pos)
+#define EVSYS_CHANNEL_EDGSEL_Pos    26           /**< \brief (EVSYS_CHANNEL) Edge Detection Selection */
+#define EVSYS_CHANNEL_EDGSEL_Msk    (0x3u << EVSYS_CHANNEL_EDGSEL_Pos)
+#define EVSYS_CHANNEL_EDGSEL(value) ((EVSYS_CHANNEL_EDGSEL_Msk & ((value) << EVSYS_CHANNEL_EDGSEL_Pos)))
+#define   EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT_Val 0x0u   /**< \brief (EVSYS_CHANNEL) No event output when using the resynchronized or synchronous path */
+#define   EVSYS_CHANNEL_EDGSEL_RISING_EDGE_Val 0x1u   /**< \brief (EVSYS_CHANNEL) Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path */
+#define   EVSYS_CHANNEL_EDGSEL_FALLING_EDGE_Val 0x2u   /**< \brief (EVSYS_CHANNEL) Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path */
+#define   EVSYS_CHANNEL_EDGSEL_BOTH_EDGES_Val 0x3u   /**< \brief (EVSYS_CHANNEL) Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path */
+#define EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT (EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT_Val << EVSYS_CHANNEL_EDGSEL_Pos)
+#define EVSYS_CHANNEL_EDGSEL_RISING_EDGE (EVSYS_CHANNEL_EDGSEL_RISING_EDGE_Val << EVSYS_CHANNEL_EDGSEL_Pos)
+#define EVSYS_CHANNEL_EDGSEL_FALLING_EDGE (EVSYS_CHANNEL_EDGSEL_FALLING_EDGE_Val << EVSYS_CHANNEL_EDGSEL_Pos)
+#define EVSYS_CHANNEL_EDGSEL_BOTH_EDGES (EVSYS_CHANNEL_EDGSEL_BOTH_EDGES_Val << EVSYS_CHANNEL_EDGSEL_Pos)
+#define EVSYS_CHANNEL_MASK          0x0F7F010Fu  /**< \brief (EVSYS_CHANNEL) MASK Register */
+
+/* -------- EVSYS_USER : (EVSYS Offset: 0x08) (R/W 16) User Multiplexer -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t USER:5;           /*!< bit:  0.. 4  User Multiplexer Selection         */
+    uint16_t :3;               /*!< bit:  5.. 7  Reserved                           */
+    uint16_t CHANNEL:5;        /*!< bit:  8..12  Channel Event Selection            */
+    uint16_t :3;               /*!< bit: 13..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} EVSYS_USER_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EVSYS_USER_OFFSET           0x08         /**< \brief (EVSYS_USER offset) User Multiplexer */
+#define EVSYS_USER_RESETVALUE       0x0000       /**< \brief (EVSYS_USER reset_value) User Multiplexer */
+
+#define EVSYS_USER_USER_Pos         0            /**< \brief (EVSYS_USER) User Multiplexer Selection */
+#define EVSYS_USER_USER_Msk         (0x1Fu << EVSYS_USER_USER_Pos)
+#define EVSYS_USER_USER(value)      ((EVSYS_USER_USER_Msk & ((value) << EVSYS_USER_USER_Pos)))
+#define EVSYS_USER_CHANNEL_Pos      8            /**< \brief (EVSYS_USER) Channel Event Selection */
+#define EVSYS_USER_CHANNEL_Msk      (0x1Fu << EVSYS_USER_CHANNEL_Pos)
+#define EVSYS_USER_CHANNEL(value)   ((EVSYS_USER_CHANNEL_Msk & ((value) << EVSYS_USER_CHANNEL_Pos)))
+#define   EVSYS_USER_CHANNEL_0_Val        0x0u   /**< \brief (EVSYS_USER) No Channel Output Selected */
+#define EVSYS_USER_CHANNEL_0        (EVSYS_USER_CHANNEL_0_Val      << EVSYS_USER_CHANNEL_Pos)
+#define EVSYS_USER_MASK             0x1F1Fu      /**< \brief (EVSYS_USER) MASK Register */
+
+/* -------- EVSYS_CHSTATUS : (EVSYS Offset: 0x0C) (R/  32) Channel Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t USRRDY0:1;        /*!< bit:      0  Channel 0 User Ready               */
+    uint32_t USRRDY1:1;        /*!< bit:      1  Channel 1 User Ready               */
+    uint32_t USRRDY2:1;        /*!< bit:      2  Channel 2 User Ready               */
+    uint32_t USRRDY3:1;        /*!< bit:      3  Channel 3 User Ready               */
+    uint32_t USRRDY4:1;        /*!< bit:      4  Channel 4 User Ready               */
+    uint32_t USRRDY5:1;        /*!< bit:      5  Channel 5 User Ready               */
+    uint32_t USRRDY6:1;        /*!< bit:      6  Channel 6 User Ready               */
+    uint32_t USRRDY7:1;        /*!< bit:      7  Channel 7 User Ready               */
+    uint32_t CHBUSY0:1;        /*!< bit:      8  Channel 0 Busy                     */
+    uint32_t CHBUSY1:1;        /*!< bit:      9  Channel 1 Busy                     */
+    uint32_t CHBUSY2:1;        /*!< bit:     10  Channel 2 Busy                     */
+    uint32_t CHBUSY3:1;        /*!< bit:     11  Channel 3 Busy                     */
+    uint32_t CHBUSY4:1;        /*!< bit:     12  Channel 4 Busy                     */
+    uint32_t CHBUSY5:1;        /*!< bit:     13  Channel 5 Busy                     */
+    uint32_t CHBUSY6:1;        /*!< bit:     14  Channel 6 Busy                     */
+    uint32_t CHBUSY7:1;        /*!< bit:     15  Channel 7 Busy                     */
+    uint32_t USRRDY8:1;        /*!< bit:     16  Channel 8 User Ready               */
+    uint32_t USRRDY9:1;        /*!< bit:     17  Channel 9 User Ready               */
+    uint32_t USRRDY10:1;       /*!< bit:     18  Channel 10 User Ready              */
+    uint32_t USRRDY11:1;       /*!< bit:     19  Channel 11 User Ready              */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t CHBUSY8:1;        /*!< bit:     24  Channel 8 Busy                     */
+    uint32_t CHBUSY9:1;        /*!< bit:     25  Channel 9 Busy                     */
+    uint32_t CHBUSY10:1;       /*!< bit:     26  Channel 10 Busy                    */
+    uint32_t CHBUSY11:1;       /*!< bit:     27  Channel 11 Busy                    */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t USRRDY:8;         /*!< bit:  0.. 7  Channel x User Ready               */
+    uint32_t CHBUSY:8;         /*!< bit:  8..15  Channel x Busy                     */
+    uint32_t USRRDYp8:4;       /*!< bit: 16..19  Channel x+8 User Ready             */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t CHBUSYp8:4;       /*!< bit: 24..27  Channel x+8 Busy                   */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EVSYS_CHSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EVSYS_CHSTATUS_OFFSET       0x0C         /**< \brief (EVSYS_CHSTATUS offset) Channel Status */
+#define EVSYS_CHSTATUS_RESETVALUE   0x000F00FF   /**< \brief (EVSYS_CHSTATUS reset_value) Channel Status */
+
+#define EVSYS_CHSTATUS_USRRDY0_Pos  0            /**< \brief (EVSYS_CHSTATUS) Channel 0 User Ready */
+#define EVSYS_CHSTATUS_USRRDY0      (1 << EVSYS_CHSTATUS_USRRDY0_Pos)
+#define EVSYS_CHSTATUS_USRRDY1_Pos  1            /**< \brief (EVSYS_CHSTATUS) Channel 1 User Ready */
+#define EVSYS_CHSTATUS_USRRDY1      (1 << EVSYS_CHSTATUS_USRRDY1_Pos)
+#define EVSYS_CHSTATUS_USRRDY2_Pos  2            /**< \brief (EVSYS_CHSTATUS) Channel 2 User Ready */
+#define EVSYS_CHSTATUS_USRRDY2      (1 << EVSYS_CHSTATUS_USRRDY2_Pos)
+#define EVSYS_CHSTATUS_USRRDY3_Pos  3            /**< \brief (EVSYS_CHSTATUS) Channel 3 User Ready */
+#define EVSYS_CHSTATUS_USRRDY3      (1 << EVSYS_CHSTATUS_USRRDY3_Pos)
+#define EVSYS_CHSTATUS_USRRDY4_Pos  4            /**< \brief (EVSYS_CHSTATUS) Channel 4 User Ready */
+#define EVSYS_CHSTATUS_USRRDY4      (1 << EVSYS_CHSTATUS_USRRDY4_Pos)
+#define EVSYS_CHSTATUS_USRRDY5_Pos  5            /**< \brief (EVSYS_CHSTATUS) Channel 5 User Ready */
+#define EVSYS_CHSTATUS_USRRDY5      (1 << EVSYS_CHSTATUS_USRRDY5_Pos)
+#define EVSYS_CHSTATUS_USRRDY6_Pos  6            /**< \brief (EVSYS_CHSTATUS) Channel 6 User Ready */
+#define EVSYS_CHSTATUS_USRRDY6      (1 << EVSYS_CHSTATUS_USRRDY6_Pos)
+#define EVSYS_CHSTATUS_USRRDY7_Pos  7            /**< \brief (EVSYS_CHSTATUS) Channel 7 User Ready */
+#define EVSYS_CHSTATUS_USRRDY7      (1 << EVSYS_CHSTATUS_USRRDY7_Pos)
+#define EVSYS_CHSTATUS_USRRDY_Pos   0            /**< \brief (EVSYS_CHSTATUS) Channel x User Ready */
+#define EVSYS_CHSTATUS_USRRDY_Msk   (0xFFu << EVSYS_CHSTATUS_USRRDY_Pos)
+#define EVSYS_CHSTATUS_USRRDY(value) ((EVSYS_CHSTATUS_USRRDY_Msk & ((value) << EVSYS_CHSTATUS_USRRDY_Pos)))
+#define EVSYS_CHSTATUS_CHBUSY0_Pos  8            /**< \brief (EVSYS_CHSTATUS) Channel 0 Busy */
+#define EVSYS_CHSTATUS_CHBUSY0      (1 << EVSYS_CHSTATUS_CHBUSY0_Pos)
+#define EVSYS_CHSTATUS_CHBUSY1_Pos  9            /**< \brief (EVSYS_CHSTATUS) Channel 1 Busy */
+#define EVSYS_CHSTATUS_CHBUSY1      (1 << EVSYS_CHSTATUS_CHBUSY1_Pos)
+#define EVSYS_CHSTATUS_CHBUSY2_Pos  10           /**< \brief (EVSYS_CHSTATUS) Channel 2 Busy */
+#define EVSYS_CHSTATUS_CHBUSY2      (1 << EVSYS_CHSTATUS_CHBUSY2_Pos)
+#define EVSYS_CHSTATUS_CHBUSY3_Pos  11           /**< \brief (EVSYS_CHSTATUS) Channel 3 Busy */
+#define EVSYS_CHSTATUS_CHBUSY3      (1 << EVSYS_CHSTATUS_CHBUSY3_Pos)
+#define EVSYS_CHSTATUS_CHBUSY4_Pos  12           /**< \brief (EVSYS_CHSTATUS) Channel 4 Busy */
+#define EVSYS_CHSTATUS_CHBUSY4      (1 << EVSYS_CHSTATUS_CHBUSY4_Pos)
+#define EVSYS_CHSTATUS_CHBUSY5_Pos  13           /**< \brief (EVSYS_CHSTATUS) Channel 5 Busy */
+#define EVSYS_CHSTATUS_CHBUSY5      (1 << EVSYS_CHSTATUS_CHBUSY5_Pos)
+#define EVSYS_CHSTATUS_CHBUSY6_Pos  14           /**< \brief (EVSYS_CHSTATUS) Channel 6 Busy */
+#define EVSYS_CHSTATUS_CHBUSY6      (1 << EVSYS_CHSTATUS_CHBUSY6_Pos)
+#define EVSYS_CHSTATUS_CHBUSY7_Pos  15           /**< \brief (EVSYS_CHSTATUS) Channel 7 Busy */
+#define EVSYS_CHSTATUS_CHBUSY7      (1 << EVSYS_CHSTATUS_CHBUSY7_Pos)
+#define EVSYS_CHSTATUS_CHBUSY_Pos   8            /**< \brief (EVSYS_CHSTATUS) Channel x Busy */
+#define EVSYS_CHSTATUS_CHBUSY_Msk   (0xFFu << EVSYS_CHSTATUS_CHBUSY_Pos)
+#define EVSYS_CHSTATUS_CHBUSY(value) ((EVSYS_CHSTATUS_CHBUSY_Msk & ((value) << EVSYS_CHSTATUS_CHBUSY_Pos)))
+#define EVSYS_CHSTATUS_USRRDY8_Pos  16           /**< \brief (EVSYS_CHSTATUS) Channel 8 User Ready */
+#define EVSYS_CHSTATUS_USRRDY8      (1 << EVSYS_CHSTATUS_USRRDY8_Pos)
+#define EVSYS_CHSTATUS_USRRDY9_Pos  17           /**< \brief (EVSYS_CHSTATUS) Channel 9 User Ready */
+#define EVSYS_CHSTATUS_USRRDY9      (1 << EVSYS_CHSTATUS_USRRDY9_Pos)
+#define EVSYS_CHSTATUS_USRRDY10_Pos 18           /**< \brief (EVSYS_CHSTATUS) Channel 10 User Ready */
+#define EVSYS_CHSTATUS_USRRDY10     (1 << EVSYS_CHSTATUS_USRRDY10_Pos)
+#define EVSYS_CHSTATUS_USRRDY11_Pos 19           /**< \brief (EVSYS_CHSTATUS) Channel 11 User Ready */
+#define EVSYS_CHSTATUS_USRRDY11     (1 << EVSYS_CHSTATUS_USRRDY11_Pos)
+#define EVSYS_CHSTATUS_USRRDYp8_Pos 16           /**< \brief (EVSYS_CHSTATUS) Channel x+8 User Ready */
+#define EVSYS_CHSTATUS_USRRDYp8_Msk (0xFu << EVSYS_CHSTATUS_USRRDYp8_Pos)
+#define EVSYS_CHSTATUS_USRRDYp8(value) ((EVSYS_CHSTATUS_USRRDYp8_Msk & ((value) << EVSYS_CHSTATUS_USRRDYp8_Pos)))
+#define EVSYS_CHSTATUS_CHBUSY8_Pos  24           /**< \brief (EVSYS_CHSTATUS) Channel 8 Busy */
+#define EVSYS_CHSTATUS_CHBUSY8      (1 << EVSYS_CHSTATUS_CHBUSY8_Pos)
+#define EVSYS_CHSTATUS_CHBUSY9_Pos  25           /**< \brief (EVSYS_CHSTATUS) Channel 9 Busy */
+#define EVSYS_CHSTATUS_CHBUSY9      (1 << EVSYS_CHSTATUS_CHBUSY9_Pos)
+#define EVSYS_CHSTATUS_CHBUSY10_Pos 26           /**< \brief (EVSYS_CHSTATUS) Channel 10 Busy */
+#define EVSYS_CHSTATUS_CHBUSY10     (1 << EVSYS_CHSTATUS_CHBUSY10_Pos)
+#define EVSYS_CHSTATUS_CHBUSY11_Pos 27           /**< \brief (EVSYS_CHSTATUS) Channel 11 Busy */
+#define EVSYS_CHSTATUS_CHBUSY11     (1 << EVSYS_CHSTATUS_CHBUSY11_Pos)
+#define EVSYS_CHSTATUS_CHBUSYp8_Pos 24           /**< \brief (EVSYS_CHSTATUS) Channel x+8 Busy */
+#define EVSYS_CHSTATUS_CHBUSYp8_Msk (0xFu << EVSYS_CHSTATUS_CHBUSYp8_Pos)
+#define EVSYS_CHSTATUS_CHBUSYp8(value) ((EVSYS_CHSTATUS_CHBUSYp8_Msk & ((value) << EVSYS_CHSTATUS_CHBUSYp8_Pos)))
+#define EVSYS_CHSTATUS_MASK         0x0F0FFFFFu  /**< \brief (EVSYS_CHSTATUS) MASK Register */
+
+/* -------- EVSYS_INTENCLR : (EVSYS Offset: 0x10) (R/W 32) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OVR0:1;           /*!< bit:      0  Channel 0 Overrun Interrupt Enable */
+    uint32_t OVR1:1;           /*!< bit:      1  Channel 1 Overrun Interrupt Enable */
+    uint32_t OVR2:1;           /*!< bit:      2  Channel 2 Overrun Interrupt Enable */
+    uint32_t OVR3:1;           /*!< bit:      3  Channel 3 Overrun Interrupt Enable */
+    uint32_t OVR4:1;           /*!< bit:      4  Channel 4 Overrun Interrupt Enable */
+    uint32_t OVR5:1;           /*!< bit:      5  Channel 5 Overrun Interrupt Enable */
+    uint32_t OVR6:1;           /*!< bit:      6  Channel 6 Overrun Interrupt Enable */
+    uint32_t OVR7:1;           /*!< bit:      7  Channel 7 Overrun Interrupt Enable */
+    uint32_t EVD0:1;           /*!< bit:      8  Channel 0 Event Detection Interrupt Enable */
+    uint32_t EVD1:1;           /*!< bit:      9  Channel 1 Event Detection Interrupt Enable */
+    uint32_t EVD2:1;           /*!< bit:     10  Channel 2 Event Detection Interrupt Enable */
+    uint32_t EVD3:1;           /*!< bit:     11  Channel 3 Event Detection Interrupt Enable */
+    uint32_t EVD4:1;           /*!< bit:     12  Channel 4 Event Detection Interrupt Enable */
+    uint32_t EVD5:1;           /*!< bit:     13  Channel 5 Event Detection Interrupt Enable */
+    uint32_t EVD6:1;           /*!< bit:     14  Channel 6 Event Detection Interrupt Enable */
+    uint32_t EVD7:1;           /*!< bit:     15  Channel 7 Event Detection Interrupt Enable */
+    uint32_t OVR8:1;           /*!< bit:     16  Channel 8 Overrun Interrupt Enable */
+    uint32_t OVR9:1;           /*!< bit:     17  Channel 9 Overrun Interrupt Enable */
+    uint32_t OVR10:1;          /*!< bit:     18  Channel 10 Overrun Interrupt Enable */
+    uint32_t OVR11:1;          /*!< bit:     19  Channel 11 Overrun Interrupt Enable */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t EVD8:1;           /*!< bit:     24  Channel 8 Event Detection Interrupt Enable */
+    uint32_t EVD9:1;           /*!< bit:     25  Channel 9 Event Detection Interrupt Enable */
+    uint32_t EVD10:1;          /*!< bit:     26  Channel 10 Event Detection Interrupt Enable */
+    uint32_t EVD11:1;          /*!< bit:     27  Channel 11 Event Detection Interrupt Enable */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t OVR:8;            /*!< bit:  0.. 7  Channel x Overrun Interrupt Enable */
+    uint32_t EVD:8;            /*!< bit:  8..15  Channel x Event Detection Interrupt Enable */
+    uint32_t OVRp8:4;          /*!< bit: 16..19  Channel x+8 Overrun Interrupt Enable */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t EVDp8:4;          /*!< bit: 24..27  Channel x+8 Event Detection Interrupt Enable */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EVSYS_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EVSYS_INTENCLR_OFFSET       0x10         /**< \brief (EVSYS_INTENCLR offset) Interrupt Enable Clear */
+#define EVSYS_INTENCLR_RESETVALUE   0x00000000   /**< \brief (EVSYS_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define EVSYS_INTENCLR_OVR0_Pos     0            /**< \brief (EVSYS_INTENCLR) Channel 0 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR0         (1 << EVSYS_INTENCLR_OVR0_Pos)
+#define EVSYS_INTENCLR_OVR1_Pos     1            /**< \brief (EVSYS_INTENCLR) Channel 1 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR1         (1 << EVSYS_INTENCLR_OVR1_Pos)
+#define EVSYS_INTENCLR_OVR2_Pos     2            /**< \brief (EVSYS_INTENCLR) Channel 2 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR2         (1 << EVSYS_INTENCLR_OVR2_Pos)
+#define EVSYS_INTENCLR_OVR3_Pos     3            /**< \brief (EVSYS_INTENCLR) Channel 3 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR3         (1 << EVSYS_INTENCLR_OVR3_Pos)
+#define EVSYS_INTENCLR_OVR4_Pos     4            /**< \brief (EVSYS_INTENCLR) Channel 4 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR4         (1 << EVSYS_INTENCLR_OVR4_Pos)
+#define EVSYS_INTENCLR_OVR5_Pos     5            /**< \brief (EVSYS_INTENCLR) Channel 5 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR5         (1 << EVSYS_INTENCLR_OVR5_Pos)
+#define EVSYS_INTENCLR_OVR6_Pos     6            /**< \brief (EVSYS_INTENCLR) Channel 6 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR6         (1 << EVSYS_INTENCLR_OVR6_Pos)
+#define EVSYS_INTENCLR_OVR7_Pos     7            /**< \brief (EVSYS_INTENCLR) Channel 7 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR7         (1 << EVSYS_INTENCLR_OVR7_Pos)
+#define EVSYS_INTENCLR_OVR_Pos      0            /**< \brief (EVSYS_INTENCLR) Channel x Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR_Msk      (0xFFu << EVSYS_INTENCLR_OVR_Pos)
+#define EVSYS_INTENCLR_OVR(value)   ((EVSYS_INTENCLR_OVR_Msk & ((value) << EVSYS_INTENCLR_OVR_Pos)))
+#define EVSYS_INTENCLR_EVD0_Pos     8            /**< \brief (EVSYS_INTENCLR) Channel 0 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD0         (1 << EVSYS_INTENCLR_EVD0_Pos)
+#define EVSYS_INTENCLR_EVD1_Pos     9            /**< \brief (EVSYS_INTENCLR) Channel 1 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD1         (1 << EVSYS_INTENCLR_EVD1_Pos)
+#define EVSYS_INTENCLR_EVD2_Pos     10           /**< \brief (EVSYS_INTENCLR) Channel 2 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD2         (1 << EVSYS_INTENCLR_EVD2_Pos)
+#define EVSYS_INTENCLR_EVD3_Pos     11           /**< \brief (EVSYS_INTENCLR) Channel 3 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD3         (1 << EVSYS_INTENCLR_EVD3_Pos)
+#define EVSYS_INTENCLR_EVD4_Pos     12           /**< \brief (EVSYS_INTENCLR) Channel 4 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD4         (1 << EVSYS_INTENCLR_EVD4_Pos)
+#define EVSYS_INTENCLR_EVD5_Pos     13           /**< \brief (EVSYS_INTENCLR) Channel 5 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD5         (1 << EVSYS_INTENCLR_EVD5_Pos)
+#define EVSYS_INTENCLR_EVD6_Pos     14           /**< \brief (EVSYS_INTENCLR) Channel 6 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD6         (1 << EVSYS_INTENCLR_EVD6_Pos)
+#define EVSYS_INTENCLR_EVD7_Pos     15           /**< \brief (EVSYS_INTENCLR) Channel 7 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD7         (1 << EVSYS_INTENCLR_EVD7_Pos)
+#define EVSYS_INTENCLR_EVD_Pos      8            /**< \brief (EVSYS_INTENCLR) Channel x Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD_Msk      (0xFFu << EVSYS_INTENCLR_EVD_Pos)
+#define EVSYS_INTENCLR_EVD(value)   ((EVSYS_INTENCLR_EVD_Msk & ((value) << EVSYS_INTENCLR_EVD_Pos)))
+#define EVSYS_INTENCLR_OVR8_Pos     16           /**< \brief (EVSYS_INTENCLR) Channel 8 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR8         (1 << EVSYS_INTENCLR_OVR8_Pos)
+#define EVSYS_INTENCLR_OVR9_Pos     17           /**< \brief (EVSYS_INTENCLR) Channel 9 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR9         (1 << EVSYS_INTENCLR_OVR9_Pos)
+#define EVSYS_INTENCLR_OVR10_Pos    18           /**< \brief (EVSYS_INTENCLR) Channel 10 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR10        (1 << EVSYS_INTENCLR_OVR10_Pos)
+#define EVSYS_INTENCLR_OVR11_Pos    19           /**< \brief (EVSYS_INTENCLR) Channel 11 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVR11        (1 << EVSYS_INTENCLR_OVR11_Pos)
+#define EVSYS_INTENCLR_OVRp8_Pos    16           /**< \brief (EVSYS_INTENCLR) Channel x+8 Overrun Interrupt Enable */
+#define EVSYS_INTENCLR_OVRp8_Msk    (0xFu << EVSYS_INTENCLR_OVRp8_Pos)
+#define EVSYS_INTENCLR_OVRp8(value) ((EVSYS_INTENCLR_OVRp8_Msk & ((value) << EVSYS_INTENCLR_OVRp8_Pos)))
+#define EVSYS_INTENCLR_EVD8_Pos     24           /**< \brief (EVSYS_INTENCLR) Channel 8 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD8         (1 << EVSYS_INTENCLR_EVD8_Pos)
+#define EVSYS_INTENCLR_EVD9_Pos     25           /**< \brief (EVSYS_INTENCLR) Channel 9 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD9         (1 << EVSYS_INTENCLR_EVD9_Pos)
+#define EVSYS_INTENCLR_EVD10_Pos    26           /**< \brief (EVSYS_INTENCLR) Channel 10 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD10        (1 << EVSYS_INTENCLR_EVD10_Pos)
+#define EVSYS_INTENCLR_EVD11_Pos    27           /**< \brief (EVSYS_INTENCLR) Channel 11 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVD11        (1 << EVSYS_INTENCLR_EVD11_Pos)
+#define EVSYS_INTENCLR_EVDp8_Pos    24           /**< \brief (EVSYS_INTENCLR) Channel x+8 Event Detection Interrupt Enable */
+#define EVSYS_INTENCLR_EVDp8_Msk    (0xFu << EVSYS_INTENCLR_EVDp8_Pos)
+#define EVSYS_INTENCLR_EVDp8(value) ((EVSYS_INTENCLR_EVDp8_Msk & ((value) << EVSYS_INTENCLR_EVDp8_Pos)))
+#define EVSYS_INTENCLR_MASK         0x0F0FFFFFu  /**< \brief (EVSYS_INTENCLR) MASK Register */
+
+/* -------- EVSYS_INTENSET : (EVSYS Offset: 0x14) (R/W 32) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OVR0:1;           /*!< bit:      0  Channel 0 Overrun Interrupt Enable */
+    uint32_t OVR1:1;           /*!< bit:      1  Channel 1 Overrun Interrupt Enable */
+    uint32_t OVR2:1;           /*!< bit:      2  Channel 2 Overrun Interrupt Enable */
+    uint32_t OVR3:1;           /*!< bit:      3  Channel 3 Overrun Interrupt Enable */
+    uint32_t OVR4:1;           /*!< bit:      4  Channel 4 Overrun Interrupt Enable */
+    uint32_t OVR5:1;           /*!< bit:      5  Channel 5 Overrun Interrupt Enable */
+    uint32_t OVR6:1;           /*!< bit:      6  Channel 6 Overrun Interrupt Enable */
+    uint32_t OVR7:1;           /*!< bit:      7  Channel 7 Overrun Interrupt Enable */
+    uint32_t EVD0:1;           /*!< bit:      8  Channel 0 Event Detection Interrupt Enable */
+    uint32_t EVD1:1;           /*!< bit:      9  Channel 1 Event Detection Interrupt Enable */
+    uint32_t EVD2:1;           /*!< bit:     10  Channel 2 Event Detection Interrupt Enable */
+    uint32_t EVD3:1;           /*!< bit:     11  Channel 3 Event Detection Interrupt Enable */
+    uint32_t EVD4:1;           /*!< bit:     12  Channel 4 Event Detection Interrupt Enable */
+    uint32_t EVD5:1;           /*!< bit:     13  Channel 5 Event Detection Interrupt Enable */
+    uint32_t EVD6:1;           /*!< bit:     14  Channel 6 Event Detection Interrupt Enable */
+    uint32_t EVD7:1;           /*!< bit:     15  Channel 7 Event Detection Interrupt Enable */
+    uint32_t OVR8:1;           /*!< bit:     16  Channel 8 Overrun Interrupt Enable */
+    uint32_t OVR9:1;           /*!< bit:     17  Channel 9 Overrun Interrupt Enable */
+    uint32_t OVR10:1;          /*!< bit:     18  Channel 10 Overrun Interrupt Enable */
+    uint32_t OVR11:1;          /*!< bit:     19  Channel 11 Overrun Interrupt Enable */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t EVD8:1;           /*!< bit:     24  Channel 8 Event Detection Interrupt Enable */
+    uint32_t EVD9:1;           /*!< bit:     25  Channel 9 Event Detection Interrupt Enable */
+    uint32_t EVD10:1;          /*!< bit:     26  Channel 10 Event Detection Interrupt Enable */
+    uint32_t EVD11:1;          /*!< bit:     27  Channel 11 Event Detection Interrupt Enable */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t OVR:8;            /*!< bit:  0.. 7  Channel x Overrun Interrupt Enable */
+    uint32_t EVD:8;            /*!< bit:  8..15  Channel x Event Detection Interrupt Enable */
+    uint32_t OVRp8:4;          /*!< bit: 16..19  Channel x+8 Overrun Interrupt Enable */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t EVDp8:4;          /*!< bit: 24..27  Channel x+8 Event Detection Interrupt Enable */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EVSYS_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EVSYS_INTENSET_OFFSET       0x14         /**< \brief (EVSYS_INTENSET offset) Interrupt Enable Set */
+#define EVSYS_INTENSET_RESETVALUE   0x00000000   /**< \brief (EVSYS_INTENSET reset_value) Interrupt Enable Set */
+
+#define EVSYS_INTENSET_OVR0_Pos     0            /**< \brief (EVSYS_INTENSET) Channel 0 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR0         (1 << EVSYS_INTENSET_OVR0_Pos)
+#define EVSYS_INTENSET_OVR1_Pos     1            /**< \brief (EVSYS_INTENSET) Channel 1 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR1         (1 << EVSYS_INTENSET_OVR1_Pos)
+#define EVSYS_INTENSET_OVR2_Pos     2            /**< \brief (EVSYS_INTENSET) Channel 2 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR2         (1 << EVSYS_INTENSET_OVR2_Pos)
+#define EVSYS_INTENSET_OVR3_Pos     3            /**< \brief (EVSYS_INTENSET) Channel 3 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR3         (1 << EVSYS_INTENSET_OVR3_Pos)
+#define EVSYS_INTENSET_OVR4_Pos     4            /**< \brief (EVSYS_INTENSET) Channel 4 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR4         (1 << EVSYS_INTENSET_OVR4_Pos)
+#define EVSYS_INTENSET_OVR5_Pos     5            /**< \brief (EVSYS_INTENSET) Channel 5 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR5         (1 << EVSYS_INTENSET_OVR5_Pos)
+#define EVSYS_INTENSET_OVR6_Pos     6            /**< \brief (EVSYS_INTENSET) Channel 6 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR6         (1 << EVSYS_INTENSET_OVR6_Pos)
+#define EVSYS_INTENSET_OVR7_Pos     7            /**< \brief (EVSYS_INTENSET) Channel 7 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR7         (1 << EVSYS_INTENSET_OVR7_Pos)
+#define EVSYS_INTENSET_OVR_Pos      0            /**< \brief (EVSYS_INTENSET) Channel x Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR_Msk      (0xFFu << EVSYS_INTENSET_OVR_Pos)
+#define EVSYS_INTENSET_OVR(value)   ((EVSYS_INTENSET_OVR_Msk & ((value) << EVSYS_INTENSET_OVR_Pos)))
+#define EVSYS_INTENSET_EVD0_Pos     8            /**< \brief (EVSYS_INTENSET) Channel 0 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD0         (1 << EVSYS_INTENSET_EVD0_Pos)
+#define EVSYS_INTENSET_EVD1_Pos     9            /**< \brief (EVSYS_INTENSET) Channel 1 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD1         (1 << EVSYS_INTENSET_EVD1_Pos)
+#define EVSYS_INTENSET_EVD2_Pos     10           /**< \brief (EVSYS_INTENSET) Channel 2 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD2         (1 << EVSYS_INTENSET_EVD2_Pos)
+#define EVSYS_INTENSET_EVD3_Pos     11           /**< \brief (EVSYS_INTENSET) Channel 3 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD3         (1 << EVSYS_INTENSET_EVD3_Pos)
+#define EVSYS_INTENSET_EVD4_Pos     12           /**< \brief (EVSYS_INTENSET) Channel 4 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD4         (1 << EVSYS_INTENSET_EVD4_Pos)
+#define EVSYS_INTENSET_EVD5_Pos     13           /**< \brief (EVSYS_INTENSET) Channel 5 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD5         (1 << EVSYS_INTENSET_EVD5_Pos)
+#define EVSYS_INTENSET_EVD6_Pos     14           /**< \brief (EVSYS_INTENSET) Channel 6 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD6         (1 << EVSYS_INTENSET_EVD6_Pos)
+#define EVSYS_INTENSET_EVD7_Pos     15           /**< \brief (EVSYS_INTENSET) Channel 7 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD7         (1 << EVSYS_INTENSET_EVD7_Pos)
+#define EVSYS_INTENSET_EVD_Pos      8            /**< \brief (EVSYS_INTENSET) Channel x Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD_Msk      (0xFFu << EVSYS_INTENSET_EVD_Pos)
+#define EVSYS_INTENSET_EVD(value)   ((EVSYS_INTENSET_EVD_Msk & ((value) << EVSYS_INTENSET_EVD_Pos)))
+#define EVSYS_INTENSET_OVR8_Pos     16           /**< \brief (EVSYS_INTENSET) Channel 8 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR8         (1 << EVSYS_INTENSET_OVR8_Pos)
+#define EVSYS_INTENSET_OVR9_Pos     17           /**< \brief (EVSYS_INTENSET) Channel 9 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR9         (1 << EVSYS_INTENSET_OVR9_Pos)
+#define EVSYS_INTENSET_OVR10_Pos    18           /**< \brief (EVSYS_INTENSET) Channel 10 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR10        (1 << EVSYS_INTENSET_OVR10_Pos)
+#define EVSYS_INTENSET_OVR11_Pos    19           /**< \brief (EVSYS_INTENSET) Channel 11 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVR11        (1 << EVSYS_INTENSET_OVR11_Pos)
+#define EVSYS_INTENSET_OVRp8_Pos    16           /**< \brief (EVSYS_INTENSET) Channel x+8 Overrun Interrupt Enable */
+#define EVSYS_INTENSET_OVRp8_Msk    (0xFu << EVSYS_INTENSET_OVRp8_Pos)
+#define EVSYS_INTENSET_OVRp8(value) ((EVSYS_INTENSET_OVRp8_Msk & ((value) << EVSYS_INTENSET_OVRp8_Pos)))
+#define EVSYS_INTENSET_EVD8_Pos     24           /**< \brief (EVSYS_INTENSET) Channel 8 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD8         (1 << EVSYS_INTENSET_EVD8_Pos)
+#define EVSYS_INTENSET_EVD9_Pos     25           /**< \brief (EVSYS_INTENSET) Channel 9 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD9         (1 << EVSYS_INTENSET_EVD9_Pos)
+#define EVSYS_INTENSET_EVD10_Pos    26           /**< \brief (EVSYS_INTENSET) Channel 10 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD10        (1 << EVSYS_INTENSET_EVD10_Pos)
+#define EVSYS_INTENSET_EVD11_Pos    27           /**< \brief (EVSYS_INTENSET) Channel 11 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVD11        (1 << EVSYS_INTENSET_EVD11_Pos)
+#define EVSYS_INTENSET_EVDp8_Pos    24           /**< \brief (EVSYS_INTENSET) Channel x+8 Event Detection Interrupt Enable */
+#define EVSYS_INTENSET_EVDp8_Msk    (0xFu << EVSYS_INTENSET_EVDp8_Pos)
+#define EVSYS_INTENSET_EVDp8(value) ((EVSYS_INTENSET_EVDp8_Msk & ((value) << EVSYS_INTENSET_EVDp8_Pos)))
+#define EVSYS_INTENSET_MASK         0x0F0FFFFFu  /**< \brief (EVSYS_INTENSET) MASK Register */
+
+/* -------- EVSYS_INTFLAG : (EVSYS Offset: 0x18) (R/W 32) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OVR0:1;           /*!< bit:      0  Channel 0 Overrun                  */
+    uint32_t OVR1:1;           /*!< bit:      1  Channel 1 Overrun                  */
+    uint32_t OVR2:1;           /*!< bit:      2  Channel 2 Overrun                  */
+    uint32_t OVR3:1;           /*!< bit:      3  Channel 3 Overrun                  */
+    uint32_t OVR4:1;           /*!< bit:      4  Channel 4 Overrun                  */
+    uint32_t OVR5:1;           /*!< bit:      5  Channel 5 Overrun                  */
+    uint32_t OVR6:1;           /*!< bit:      6  Channel 6 Overrun                  */
+    uint32_t OVR7:1;           /*!< bit:      7  Channel 7 Overrun                  */
+    uint32_t EVD0:1;           /*!< bit:      8  Channel 0 Event Detection          */
+    uint32_t EVD1:1;           /*!< bit:      9  Channel 1 Event Detection          */
+    uint32_t EVD2:1;           /*!< bit:     10  Channel 2 Event Detection          */
+    uint32_t EVD3:1;           /*!< bit:     11  Channel 3 Event Detection          */
+    uint32_t EVD4:1;           /*!< bit:     12  Channel 4 Event Detection          */
+    uint32_t EVD5:1;           /*!< bit:     13  Channel 5 Event Detection          */
+    uint32_t EVD6:1;           /*!< bit:     14  Channel 6 Event Detection          */
+    uint32_t EVD7:1;           /*!< bit:     15  Channel 7 Event Detection          */
+    uint32_t OVR8:1;           /*!< bit:     16  Channel 8 Overrun                  */
+    uint32_t OVR9:1;           /*!< bit:     17  Channel 9 Overrun                  */
+    uint32_t OVR10:1;          /*!< bit:     18  Channel 10 Overrun                 */
+    uint32_t OVR11:1;          /*!< bit:     19  Channel 11 Overrun                 */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t EVD8:1;           /*!< bit:     24  Channel 8 Event Detection          */
+    uint32_t EVD9:1;           /*!< bit:     25  Channel 9 Event Detection          */
+    uint32_t EVD10:1;          /*!< bit:     26  Channel 10 Event Detection         */
+    uint32_t EVD11:1;          /*!< bit:     27  Channel 11 Event Detection         */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t OVR:8;            /*!< bit:  0.. 7  Channel x Overrun                  */
+    uint32_t EVD:8;            /*!< bit:  8..15  Channel x Event Detection          */
+    uint32_t OVRp8:4;          /*!< bit: 16..19  Channel x+8 Overrun                */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t EVDp8:4;          /*!< bit: 24..27  Channel x+8 Event Detection        */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} EVSYS_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define EVSYS_INTFLAG_OFFSET        0x18         /**< \brief (EVSYS_INTFLAG offset) Interrupt Flag Status and Clear */
+#define EVSYS_INTFLAG_RESETVALUE    0x00000000   /**< \brief (EVSYS_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define EVSYS_INTFLAG_OVR0_Pos      0            /**< \brief (EVSYS_INTFLAG) Channel 0 Overrun */
+#define EVSYS_INTFLAG_OVR0          (1 << EVSYS_INTFLAG_OVR0_Pos)
+#define EVSYS_INTFLAG_OVR1_Pos      1            /**< \brief (EVSYS_INTFLAG) Channel 1 Overrun */
+#define EVSYS_INTFLAG_OVR1          (1 << EVSYS_INTFLAG_OVR1_Pos)
+#define EVSYS_INTFLAG_OVR2_Pos      2            /**< \brief (EVSYS_INTFLAG) Channel 2 Overrun */
+#define EVSYS_INTFLAG_OVR2          (1 << EVSYS_INTFLAG_OVR2_Pos)
+#define EVSYS_INTFLAG_OVR3_Pos      3            /**< \brief (EVSYS_INTFLAG) Channel 3 Overrun */
+#define EVSYS_INTFLAG_OVR3          (1 << EVSYS_INTFLAG_OVR3_Pos)
+#define EVSYS_INTFLAG_OVR4_Pos      4            /**< \brief (EVSYS_INTFLAG) Channel 4 Overrun */
+#define EVSYS_INTFLAG_OVR4          (1 << EVSYS_INTFLAG_OVR4_Pos)
+#define EVSYS_INTFLAG_OVR5_Pos      5            /**< \brief (EVSYS_INTFLAG) Channel 5 Overrun */
+#define EVSYS_INTFLAG_OVR5          (1 << EVSYS_INTFLAG_OVR5_Pos)
+#define EVSYS_INTFLAG_OVR6_Pos      6            /**< \brief (EVSYS_INTFLAG) Channel 6 Overrun */
+#define EVSYS_INTFLAG_OVR6          (1 << EVSYS_INTFLAG_OVR6_Pos)
+#define EVSYS_INTFLAG_OVR7_Pos      7            /**< \brief (EVSYS_INTFLAG) Channel 7 Overrun */
+#define EVSYS_INTFLAG_OVR7          (1 << EVSYS_INTFLAG_OVR7_Pos)
+#define EVSYS_INTFLAG_OVR_Pos       0            /**< \brief (EVSYS_INTFLAG) Channel x Overrun */
+#define EVSYS_INTFLAG_OVR_Msk       (0xFFu << EVSYS_INTFLAG_OVR_Pos)
+#define EVSYS_INTFLAG_OVR(value)    ((EVSYS_INTFLAG_OVR_Msk & ((value) << EVSYS_INTFLAG_OVR_Pos)))
+#define EVSYS_INTFLAG_EVD0_Pos      8            /**< \brief (EVSYS_INTFLAG) Channel 0 Event Detection */
+#define EVSYS_INTFLAG_EVD0          (1 << EVSYS_INTFLAG_EVD0_Pos)
+#define EVSYS_INTFLAG_EVD1_Pos      9            /**< \brief (EVSYS_INTFLAG) Channel 1 Event Detection */
+#define EVSYS_INTFLAG_EVD1          (1 << EVSYS_INTFLAG_EVD1_Pos)
+#define EVSYS_INTFLAG_EVD2_Pos      10           /**< \brief (EVSYS_INTFLAG) Channel 2 Event Detection */
+#define EVSYS_INTFLAG_EVD2          (1 << EVSYS_INTFLAG_EVD2_Pos)
+#define EVSYS_INTFLAG_EVD3_Pos      11           /**< \brief (EVSYS_INTFLAG) Channel 3 Event Detection */
+#define EVSYS_INTFLAG_EVD3          (1 << EVSYS_INTFLAG_EVD3_Pos)
+#define EVSYS_INTFLAG_EVD4_Pos      12           /**< \brief (EVSYS_INTFLAG) Channel 4 Event Detection */
+#define EVSYS_INTFLAG_EVD4          (1 << EVSYS_INTFLAG_EVD4_Pos)
+#define EVSYS_INTFLAG_EVD5_Pos      13           /**< \brief (EVSYS_INTFLAG) Channel 5 Event Detection */
+#define EVSYS_INTFLAG_EVD5          (1 << EVSYS_INTFLAG_EVD5_Pos)
+#define EVSYS_INTFLAG_EVD6_Pos      14           /**< \brief (EVSYS_INTFLAG) Channel 6 Event Detection */
+#define EVSYS_INTFLAG_EVD6          (1 << EVSYS_INTFLAG_EVD6_Pos)
+#define EVSYS_INTFLAG_EVD7_Pos      15           /**< \brief (EVSYS_INTFLAG) Channel 7 Event Detection */
+#define EVSYS_INTFLAG_EVD7          (1 << EVSYS_INTFLAG_EVD7_Pos)
+#define EVSYS_INTFLAG_EVD_Pos       8            /**< \brief (EVSYS_INTFLAG) Channel x Event Detection */
+#define EVSYS_INTFLAG_EVD_Msk       (0xFFu << EVSYS_INTFLAG_EVD_Pos)
+#define EVSYS_INTFLAG_EVD(value)    ((EVSYS_INTFLAG_EVD_Msk & ((value) << EVSYS_INTFLAG_EVD_Pos)))
+#define EVSYS_INTFLAG_OVR8_Pos      16           /**< \brief (EVSYS_INTFLAG) Channel 8 Overrun */
+#define EVSYS_INTFLAG_OVR8          (1 << EVSYS_INTFLAG_OVR8_Pos)
+#define EVSYS_INTFLAG_OVR9_Pos      17           /**< \brief (EVSYS_INTFLAG) Channel 9 Overrun */
+#define EVSYS_INTFLAG_OVR9          (1 << EVSYS_INTFLAG_OVR9_Pos)
+#define EVSYS_INTFLAG_OVR10_Pos     18           /**< \brief (EVSYS_INTFLAG) Channel 10 Overrun */
+#define EVSYS_INTFLAG_OVR10         (1 << EVSYS_INTFLAG_OVR10_Pos)
+#define EVSYS_INTFLAG_OVR11_Pos     19           /**< \brief (EVSYS_INTFLAG) Channel 11 Overrun */
+#define EVSYS_INTFLAG_OVR11         (1 << EVSYS_INTFLAG_OVR11_Pos)
+#define EVSYS_INTFLAG_OVRp8_Pos     16           /**< \brief (EVSYS_INTFLAG) Channel x+8 Overrun */
+#define EVSYS_INTFLAG_OVRp8_Msk     (0xFu << EVSYS_INTFLAG_OVRp8_Pos)
+#define EVSYS_INTFLAG_OVRp8(value)  ((EVSYS_INTFLAG_OVRp8_Msk & ((value) << EVSYS_INTFLAG_OVRp8_Pos)))
+#define EVSYS_INTFLAG_EVD8_Pos      24           /**< \brief (EVSYS_INTFLAG) Channel 8 Event Detection */
+#define EVSYS_INTFLAG_EVD8          (1 << EVSYS_INTFLAG_EVD8_Pos)
+#define EVSYS_INTFLAG_EVD9_Pos      25           /**< \brief (EVSYS_INTFLAG) Channel 9 Event Detection */
+#define EVSYS_INTFLAG_EVD9          (1 << EVSYS_INTFLAG_EVD9_Pos)
+#define EVSYS_INTFLAG_EVD10_Pos     26           /**< \brief (EVSYS_INTFLAG) Channel 10 Event Detection */
+#define EVSYS_INTFLAG_EVD10         (1 << EVSYS_INTFLAG_EVD10_Pos)
+#define EVSYS_INTFLAG_EVD11_Pos     27           /**< \brief (EVSYS_INTFLAG) Channel 11 Event Detection */
+#define EVSYS_INTFLAG_EVD11         (1 << EVSYS_INTFLAG_EVD11_Pos)
+#define EVSYS_INTFLAG_EVDp8_Pos     24           /**< \brief (EVSYS_INTFLAG) Channel x+8 Event Detection */
+#define EVSYS_INTFLAG_EVDp8_Msk     (0xFu << EVSYS_INTFLAG_EVDp8_Pos)
+#define EVSYS_INTFLAG_EVDp8(value)  ((EVSYS_INTFLAG_EVDp8_Msk & ((value) << EVSYS_INTFLAG_EVDp8_Pos)))
+#define EVSYS_INTFLAG_MASK          0x0F0FFFFFu  /**< \brief (EVSYS_INTFLAG) MASK Register */
+
+/** \brief EVSYS hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __O  EVSYS_CTRL_Type           CTRL;        /**< \brief Offset: 0x00 ( /W  8) Control */
+       RoReg8                    Reserved1[0x3];
+  __IO EVSYS_CHANNEL_Type        CHANNEL;     /**< \brief Offset: 0x04 (R/W 32) Channel */
+  __IO EVSYS_USER_Type           USER;        /**< \brief Offset: 0x08 (R/W 16) User Multiplexer */
+       RoReg8                    Reserved2[0x2];
+  __I  EVSYS_CHSTATUS_Type       CHSTATUS;    /**< \brief Offset: 0x0C (R/  32) Channel Status */
+  __IO EVSYS_INTENCLR_Type       INTENCLR;    /**< \brief Offset: 0x10 (R/W 32) Interrupt Enable Clear */
+  __IO EVSYS_INTENSET_Type       INTENSET;    /**< \brief Offset: 0x14 (R/W 32) Interrupt Enable Set */
+  __IO EVSYS_INTFLAG_Type        INTFLAG;     /**< \brief Offset: 0x18 (R/W 32) Interrupt Flag Status and Clear */
+} Evsys;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_EVSYS_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/gclk.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/gclk.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/gclk.h	(revision 136)
@@ -0,0 +1,234 @@
+/**
+ * \file
+ *
+ * \brief Component description for GCLK
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_GCLK_COMPONENT_
+#define _SAMD21_GCLK_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR GCLK */
+/* ========================================================================== */
+/** \addtogroup SAMD21_GCLK Generic Clock Generator */
+/*@{*/
+
+#define GCLK_U2102
+#define REV_GCLK                    0x210
+
+/* -------- GCLK_CTRL : (GCLK Offset: 0x0) (R/W  8) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} GCLK_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define GCLK_CTRL_OFFSET            0x0          /**< \brief (GCLK_CTRL offset) Control */
+#define GCLK_CTRL_RESETVALUE        0x00         /**< \brief (GCLK_CTRL reset_value) Control */
+
+#define GCLK_CTRL_SWRST_Pos         0            /**< \brief (GCLK_CTRL) Software Reset */
+#define GCLK_CTRL_SWRST             (0x1u << GCLK_CTRL_SWRST_Pos)
+#define GCLK_CTRL_MASK              0x01u        /**< \brief (GCLK_CTRL) MASK Register */
+
+/* -------- GCLK_STATUS : (GCLK Offset: 0x1) (R/   8) Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :7;               /*!< bit:  0.. 6  Reserved                           */
+    uint8_t  SYNCBUSY:1;       /*!< bit:      7  Synchronization Busy Status        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} GCLK_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define GCLK_STATUS_OFFSET          0x1          /**< \brief (GCLK_STATUS offset) Status */
+#define GCLK_STATUS_RESETVALUE      0x00         /**< \brief (GCLK_STATUS reset_value) Status */
+
+#define GCLK_STATUS_SYNCBUSY_Pos    7            /**< \brief (GCLK_STATUS) Synchronization Busy Status */
+#define GCLK_STATUS_SYNCBUSY        (0x1u << GCLK_STATUS_SYNCBUSY_Pos)
+#define GCLK_STATUS_MASK            0x80u        /**< \brief (GCLK_STATUS) MASK Register */
+
+/* -------- GCLK_CLKCTRL : (GCLK Offset: 0x2) (R/W 16) Generic Clock Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t ID:6;             /*!< bit:  0.. 5  Generic Clock Selection ID         */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t GEN:4;            /*!< bit:  8..11  Generic Clock Generator            */
+    uint16_t :2;               /*!< bit: 12..13  Reserved                           */
+    uint16_t CLKEN:1;          /*!< bit:     14  Clock Enable                       */
+    uint16_t WRTLOCK:1;        /*!< bit:     15  Write Lock                         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} GCLK_CLKCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define GCLK_CLKCTRL_OFFSET         0x2          /**< \brief (GCLK_CLKCTRL offset) Generic Clock Control */
+#define GCLK_CLKCTRL_RESETVALUE     0x0000       /**< \brief (GCLK_CLKCTRL reset_value) Generic Clock Control */
+
+#define GCLK_CLKCTRL_ID_Pos         0            /**< \brief (GCLK_CLKCTRL) Generic Clock Selection ID */
+#define GCLK_CLKCTRL_ID_Msk         (0x3Fu << GCLK_CLKCTRL_ID_Pos)
+#define GCLK_CLKCTRL_ID(value)      ((GCLK_CLKCTRL_ID_Msk & ((value) << GCLK_CLKCTRL_ID_Pos)))
+#define GCLK_CLKCTRL_GEN_Pos        8            /**< \brief (GCLK_CLKCTRL) Generic Clock Generator */
+#define GCLK_CLKCTRL_GEN_Msk        (0xFu << GCLK_CLKCTRL_GEN_Pos)
+#define GCLK_CLKCTRL_GEN(value)     ((GCLK_CLKCTRL_GEN_Msk & ((value) << GCLK_CLKCTRL_GEN_Pos)))
+#define   GCLK_CLKCTRL_GEN_GCLK0_Val      0x0u   /**< \brief (GCLK_CLKCTRL) Generic clock generator 0 */
+#define   GCLK_CLKCTRL_GEN_GCLK1_Val      0x1u   /**< \brief (GCLK_CLKCTRL) Generic clock generator 1 */
+#define   GCLK_CLKCTRL_GEN_GCLK2_Val      0x2u   /**< \brief (GCLK_CLKCTRL) Generic clock generator 2 */
+#define   GCLK_CLKCTRL_GEN_GCLK3_Val      0x3u   /**< \brief (GCLK_CLKCTRL) Generic clock generator 3 */
+#define   GCLK_CLKCTRL_GEN_GCLK4_Val      0x4u   /**< \brief (GCLK_CLKCTRL) Generic clock generator 4 */
+#define   GCLK_CLKCTRL_GEN_GCLK5_Val      0x5u   /**< \brief (GCLK_CLKCTRL) Generic clock generator 5 */
+#define   GCLK_CLKCTRL_GEN_GCLK6_Val      0x6u   /**< \brief (GCLK_CLKCTRL) Generic clock generator 6 */
+#define   GCLK_CLKCTRL_GEN_GCLK7_Val      0x7u   /**< \brief (GCLK_CLKCTRL) Generic clock generator 7 */
+#define GCLK_CLKCTRL_GEN_GCLK0      (GCLK_CLKCTRL_GEN_GCLK0_Val    << GCLK_CLKCTRL_GEN_Pos)
+#define GCLK_CLKCTRL_GEN_GCLK1      (GCLK_CLKCTRL_GEN_GCLK1_Val    << GCLK_CLKCTRL_GEN_Pos)
+#define GCLK_CLKCTRL_GEN_GCLK2      (GCLK_CLKCTRL_GEN_GCLK2_Val    << GCLK_CLKCTRL_GEN_Pos)
+#define GCLK_CLKCTRL_GEN_GCLK3      (GCLK_CLKCTRL_GEN_GCLK3_Val    << GCLK_CLKCTRL_GEN_Pos)
+#define GCLK_CLKCTRL_GEN_GCLK4      (GCLK_CLKCTRL_GEN_GCLK4_Val    << GCLK_CLKCTRL_GEN_Pos)
+#define GCLK_CLKCTRL_GEN_GCLK5      (GCLK_CLKCTRL_GEN_GCLK5_Val    << GCLK_CLKCTRL_GEN_Pos)
+#define GCLK_CLKCTRL_GEN_GCLK6      (GCLK_CLKCTRL_GEN_GCLK6_Val    << GCLK_CLKCTRL_GEN_Pos)
+#define GCLK_CLKCTRL_GEN_GCLK7      (GCLK_CLKCTRL_GEN_GCLK7_Val    << GCLK_CLKCTRL_GEN_Pos)
+#define GCLK_CLKCTRL_CLKEN_Pos      14           /**< \brief (GCLK_CLKCTRL) Clock Enable */
+#define GCLK_CLKCTRL_CLKEN          (0x1u << GCLK_CLKCTRL_CLKEN_Pos)
+#define GCLK_CLKCTRL_WRTLOCK_Pos    15           /**< \brief (GCLK_CLKCTRL) Write Lock */
+#define GCLK_CLKCTRL_WRTLOCK        (0x1u << GCLK_CLKCTRL_WRTLOCK_Pos)
+#define GCLK_CLKCTRL_MASK           0xCF3Fu      /**< \brief (GCLK_CLKCTRL) MASK Register */
+
+/* -------- GCLK_GENCTRL : (GCLK Offset: 0x4) (R/W 32) Generic Clock Generator Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t ID:4;             /*!< bit:  0.. 3  Generic Clock Generator Selection  */
+    uint32_t :4;               /*!< bit:  4.. 7  Reserved                           */
+    uint32_t SRC:5;            /*!< bit:  8..12  Source Select                      */
+    uint32_t :3;               /*!< bit: 13..15  Reserved                           */
+    uint32_t GENEN:1;          /*!< bit:     16  Generic Clock Generator Enable     */
+    uint32_t IDC:1;            /*!< bit:     17  Improve Duty Cycle                 */
+    uint32_t OOV:1;            /*!< bit:     18  Output Off Value                   */
+    uint32_t OE:1;             /*!< bit:     19  Output Enable                      */
+    uint32_t DIVSEL:1;         /*!< bit:     20  Divide Selection                   */
+    uint32_t RUNSTDBY:1;       /*!< bit:     21  Run in Standby                     */
+    uint32_t :10;              /*!< bit: 22..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} GCLK_GENCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define GCLK_GENCTRL_OFFSET         0x4          /**< \brief (GCLK_GENCTRL offset) Generic Clock Generator Control */
+#define GCLK_GENCTRL_RESETVALUE     0x00000000   /**< \brief (GCLK_GENCTRL reset_value) Generic Clock Generator Control */
+
+#define GCLK_GENCTRL_ID_Pos         0            /**< \brief (GCLK_GENCTRL) Generic Clock Generator Selection */
+#define GCLK_GENCTRL_ID_Msk         (0xFu << GCLK_GENCTRL_ID_Pos)
+#define GCLK_GENCTRL_ID(value)      ((GCLK_GENCTRL_ID_Msk & ((value) << GCLK_GENCTRL_ID_Pos)))
+#define GCLK_GENCTRL_SRC_Pos        8            /**< \brief (GCLK_GENCTRL) Source Select */
+#define GCLK_GENCTRL_SRC_Msk        (0x1Fu << GCLK_GENCTRL_SRC_Pos)
+#define GCLK_GENCTRL_SRC(value)     ((GCLK_GENCTRL_SRC_Msk & ((value) << GCLK_GENCTRL_SRC_Pos)))
+#define   GCLK_GENCTRL_SRC_XOSC_Val       0x0u   /**< \brief (GCLK_GENCTRL) XOSC oscillator output */
+#define   GCLK_GENCTRL_SRC_GCLKIN_Val     0x1u   /**< \brief (GCLK_GENCTRL) Generator input pad */
+#define   GCLK_GENCTRL_SRC_GCLKGEN1_Val   0x2u   /**< \brief (GCLK_GENCTRL) Generic clock generator 1 output */
+#define   GCLK_GENCTRL_SRC_OSCULP32K_Val  0x3u   /**< \brief (GCLK_GENCTRL) OSCULP32K oscillator output */
+#define   GCLK_GENCTRL_SRC_OSC32K_Val     0x4u   /**< \brief (GCLK_GENCTRL) OSC32K oscillator output */
+#define   GCLK_GENCTRL_SRC_XOSC32K_Val    0x5u   /**< \brief (GCLK_GENCTRL) XOSC32K oscillator output */
+#define   GCLK_GENCTRL_SRC_OSC8M_Val      0x6u   /**< \brief (GCLK_GENCTRL) OSC8M oscillator output */
+#define   GCLK_GENCTRL_SRC_DFLL48M_Val    0x7u   /**< \brief (GCLK_GENCTRL) DFLL48M output */
+#define GCLK_GENCTRL_SRC_XOSC       (GCLK_GENCTRL_SRC_XOSC_Val     << GCLK_GENCTRL_SRC_Pos)
+#define GCLK_GENCTRL_SRC_GCLKIN     (GCLK_GENCTRL_SRC_GCLKIN_Val   << GCLK_GENCTRL_SRC_Pos)
+#define GCLK_GENCTRL_SRC_GCLKGEN1   (GCLK_GENCTRL_SRC_GCLKGEN1_Val << GCLK_GENCTRL_SRC_Pos)
+#define GCLK_GENCTRL_SRC_OSCULP32K  (GCLK_GENCTRL_SRC_OSCULP32K_Val << GCLK_GENCTRL_SRC_Pos)
+#define GCLK_GENCTRL_SRC_OSC32K     (GCLK_GENCTRL_SRC_OSC32K_Val   << GCLK_GENCTRL_SRC_Pos)
+#define GCLK_GENCTRL_SRC_XOSC32K    (GCLK_GENCTRL_SRC_XOSC32K_Val  << GCLK_GENCTRL_SRC_Pos)
+#define GCLK_GENCTRL_SRC_OSC8M      (GCLK_GENCTRL_SRC_OSC8M_Val    << GCLK_GENCTRL_SRC_Pos)
+#define GCLK_GENCTRL_SRC_DFLL48M    (GCLK_GENCTRL_SRC_DFLL48M_Val  << GCLK_GENCTRL_SRC_Pos)
+#define GCLK_GENCTRL_GENEN_Pos      16           /**< \brief (GCLK_GENCTRL) Generic Clock Generator Enable */
+#define GCLK_GENCTRL_GENEN          (0x1u << GCLK_GENCTRL_GENEN_Pos)
+#define GCLK_GENCTRL_IDC_Pos        17           /**< \brief (GCLK_GENCTRL) Improve Duty Cycle */
+#define GCLK_GENCTRL_IDC            (0x1u << GCLK_GENCTRL_IDC_Pos)
+#define GCLK_GENCTRL_OOV_Pos        18           /**< \brief (GCLK_GENCTRL) Output Off Value */
+#define GCLK_GENCTRL_OOV            (0x1u << GCLK_GENCTRL_OOV_Pos)
+#define GCLK_GENCTRL_OE_Pos         19           /**< \brief (GCLK_GENCTRL) Output Enable */
+#define GCLK_GENCTRL_OE             (0x1u << GCLK_GENCTRL_OE_Pos)
+#define GCLK_GENCTRL_DIVSEL_Pos     20           /**< \brief (GCLK_GENCTRL) Divide Selection */
+#define GCLK_GENCTRL_DIVSEL         (0x1u << GCLK_GENCTRL_DIVSEL_Pos)
+#define GCLK_GENCTRL_RUNSTDBY_Pos   21           /**< \brief (GCLK_GENCTRL) Run in Standby */
+#define GCLK_GENCTRL_RUNSTDBY       (0x1u << GCLK_GENCTRL_RUNSTDBY_Pos)
+#define GCLK_GENCTRL_MASK           0x003F1F0Fu  /**< \brief (GCLK_GENCTRL) MASK Register */
+
+/* -------- GCLK_GENDIV : (GCLK Offset: 0x8) (R/W 32) Generic Clock Generator Division -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t ID:4;             /*!< bit:  0.. 3  Generic Clock Generator Selection  */
+    uint32_t :4;               /*!< bit:  4.. 7  Reserved                           */
+    uint32_t DIV:16;           /*!< bit:  8..23  Division Factor                    */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} GCLK_GENDIV_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define GCLK_GENDIV_OFFSET          0x8          /**< \brief (GCLK_GENDIV offset) Generic Clock Generator Division */
+#define GCLK_GENDIV_RESETVALUE      0x00000000   /**< \brief (GCLK_GENDIV reset_value) Generic Clock Generator Division */
+
+#define GCLK_GENDIV_ID_Pos          0            /**< \brief (GCLK_GENDIV) Generic Clock Generator Selection */
+#define GCLK_GENDIV_ID_Msk          (0xFu << GCLK_GENDIV_ID_Pos)
+#define GCLK_GENDIV_ID(value)       ((GCLK_GENDIV_ID_Msk & ((value) << GCLK_GENDIV_ID_Pos)))
+#define GCLK_GENDIV_DIV_Pos         8            /**< \brief (GCLK_GENDIV) Division Factor */
+#define GCLK_GENDIV_DIV_Msk         (0xFFFFu << GCLK_GENDIV_DIV_Pos)
+#define GCLK_GENDIV_DIV(value)      ((GCLK_GENDIV_DIV_Msk & ((value) << GCLK_GENDIV_DIV_Pos)))
+#define GCLK_GENDIV_MASK            0x00FFFF0Fu  /**< \brief (GCLK_GENDIV) MASK Register */
+
+/** \brief GCLK hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO GCLK_CTRL_Type            CTRL;        /**< \brief Offset: 0x0 (R/W  8) Control */
+  __I  GCLK_STATUS_Type          STATUS;      /**< \brief Offset: 0x1 (R/   8) Status */
+  __IO GCLK_CLKCTRL_Type         CLKCTRL;     /**< \brief Offset: 0x2 (R/W 16) Generic Clock Control */
+  __IO GCLK_GENCTRL_Type         GENCTRL;     /**< \brief Offset: 0x4 (R/W 32) Generic Clock Generator Control */
+  __IO GCLK_GENDIV_Type          GENDIV;      /**< \brief Offset: 0x8 (R/W 32) Generic Clock Generator Division */
+} Gclk;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_GCLK_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/i2s.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/i2s.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/i2s.h	(revision 136)
@@ -0,0 +1,639 @@
+/**
+ * \file
+ *
+ * \brief Component description for I2S
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_I2S_COMPONENT_
+#define _SAMD21_I2S_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR I2S */
+/* ========================================================================== */
+/** \addtogroup SAMD21_I2S Inter-IC Sound Interface */
+/*@{*/
+
+#define I2S_U2224
+#define REV_I2S                     0x101
+
+/* -------- I2S_CTRLA : (I2S Offset: 0x00) (R/W  8) Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint8_t  CKEN0:1;          /*!< bit:      2  Clock Unit 0 Enable                */
+    uint8_t  CKEN1:1;          /*!< bit:      3  Clock Unit 1 Enable                */
+    uint8_t  SEREN0:1;         /*!< bit:      4  Serializer 0 Enable                */
+    uint8_t  SEREN1:1;         /*!< bit:      5  Serializer 1 Enable                */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint8_t  CKEN:2;           /*!< bit:  2.. 3  Clock Unit x Enable                */
+    uint8_t  SEREN:2;          /*!< bit:  4.. 5  Serializer x Enable                */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} I2S_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define I2S_CTRLA_OFFSET            0x00         /**< \brief (I2S_CTRLA offset) Control A */
+#define I2S_CTRLA_RESETVALUE        0x00         /**< \brief (I2S_CTRLA reset_value) Control A */
+
+#define I2S_CTRLA_SWRST_Pos         0            /**< \brief (I2S_CTRLA) Software Reset */
+#define I2S_CTRLA_SWRST             (0x1u << I2S_CTRLA_SWRST_Pos)
+#define I2S_CTRLA_ENABLE_Pos        1            /**< \brief (I2S_CTRLA) Enable */
+#define I2S_CTRLA_ENABLE            (0x1u << I2S_CTRLA_ENABLE_Pos)
+#define I2S_CTRLA_CKEN0_Pos         2            /**< \brief (I2S_CTRLA) Clock Unit 0 Enable */
+#define I2S_CTRLA_CKEN0             (1 << I2S_CTRLA_CKEN0_Pos)
+#define I2S_CTRLA_CKEN1_Pos         3            /**< \brief (I2S_CTRLA) Clock Unit 1 Enable */
+#define I2S_CTRLA_CKEN1             (1 << I2S_CTRLA_CKEN1_Pos)
+#define I2S_CTRLA_CKEN_Pos          2            /**< \brief (I2S_CTRLA) Clock Unit x Enable */
+#define I2S_CTRLA_CKEN_Msk          (0x3u << I2S_CTRLA_CKEN_Pos)
+#define I2S_CTRLA_CKEN(value)       ((I2S_CTRLA_CKEN_Msk & ((value) << I2S_CTRLA_CKEN_Pos)))
+#define I2S_CTRLA_SEREN0_Pos        4            /**< \brief (I2S_CTRLA) Serializer 0 Enable */
+#define I2S_CTRLA_SEREN0            (1 << I2S_CTRLA_SEREN0_Pos)
+#define I2S_CTRLA_SEREN1_Pos        5            /**< \brief (I2S_CTRLA) Serializer 1 Enable */
+#define I2S_CTRLA_SEREN1            (1 << I2S_CTRLA_SEREN1_Pos)
+#define I2S_CTRLA_SEREN_Pos         4            /**< \brief (I2S_CTRLA) Serializer x Enable */
+#define I2S_CTRLA_SEREN_Msk         (0x3u << I2S_CTRLA_SEREN_Pos)
+#define I2S_CTRLA_SEREN(value)      ((I2S_CTRLA_SEREN_Msk & ((value) << I2S_CTRLA_SEREN_Pos)))
+#define I2S_CTRLA_MASK              0x3Fu        /**< \brief (I2S_CTRLA) MASK Register */
+
+/* -------- I2S_CLKCTRL : (I2S Offset: 0x04) (R/W 32) Clock Unit n Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SLOTSIZE:2;       /*!< bit:  0.. 1  Slot Size                          */
+    uint32_t NBSLOTS:3;        /*!< bit:  2.. 4  Number of Slots in Frame           */
+    uint32_t FSWIDTH:2;        /*!< bit:  5.. 6  Frame Sync Width                   */
+    uint32_t BITDELAY:1;       /*!< bit:      7  Data Delay from Frame Sync         */
+    uint32_t FSSEL:1;          /*!< bit:      8  Frame Sync Select                  */
+    uint32_t :2;               /*!< bit:  9..10  Reserved                           */
+    uint32_t FSINV:1;          /*!< bit:     11  Frame Sync Invert                  */
+    uint32_t SCKSEL:1;         /*!< bit:     12  Serial Clock Select                */
+    uint32_t :3;               /*!< bit: 13..15  Reserved                           */
+    uint32_t MCKSEL:1;         /*!< bit:     16  Master Clock Select                */
+    uint32_t :1;               /*!< bit:     17  Reserved                           */
+    uint32_t MCKEN:1;          /*!< bit:     18  Master Clock Enable                */
+    uint32_t MCKDIV:5;         /*!< bit: 19..23  Master Clock Division Factor       */
+    uint32_t MCKOUTDIV:5;      /*!< bit: 24..28  Master Clock Output Division Factor */
+    uint32_t FSOUTINV:1;       /*!< bit:     29  Frame Sync Output Invert           */
+    uint32_t SCKOUTINV:1;      /*!< bit:     30  Serial Clock Output Invert         */
+    uint32_t MCKOUTINV:1;      /*!< bit:     31  Master Clock Output Invert         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} I2S_CLKCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define I2S_CLKCTRL_OFFSET          0x04         /**< \brief (I2S_CLKCTRL offset) Clock Unit n Control */
+#define I2S_CLKCTRL_RESETVALUE      0x00000000   /**< \brief (I2S_CLKCTRL reset_value) Clock Unit n Control */
+
+#define I2S_CLKCTRL_SLOTSIZE_Pos    0            /**< \brief (I2S_CLKCTRL) Slot Size */
+#define I2S_CLKCTRL_SLOTSIZE_Msk    (0x3u << I2S_CLKCTRL_SLOTSIZE_Pos)
+#define I2S_CLKCTRL_SLOTSIZE(value) ((I2S_CLKCTRL_SLOTSIZE_Msk & ((value) << I2S_CLKCTRL_SLOTSIZE_Pos)))
+#define   I2S_CLKCTRL_SLOTSIZE_8_Val      0x0u   /**< \brief (I2S_CLKCTRL) 8-bit Slot for Clock Unit n */
+#define   I2S_CLKCTRL_SLOTSIZE_16_Val     0x1u   /**< \brief (I2S_CLKCTRL) 16-bit Slot for Clock Unit n */
+#define   I2S_CLKCTRL_SLOTSIZE_24_Val     0x2u   /**< \brief (I2S_CLKCTRL) 24-bit Slot for Clock Unit n */
+#define   I2S_CLKCTRL_SLOTSIZE_32_Val     0x3u   /**< \brief (I2S_CLKCTRL) 32-bit Slot for Clock Unit n */
+#define I2S_CLKCTRL_SLOTSIZE_8      (I2S_CLKCTRL_SLOTSIZE_8_Val    << I2S_CLKCTRL_SLOTSIZE_Pos)
+#define I2S_CLKCTRL_SLOTSIZE_16     (I2S_CLKCTRL_SLOTSIZE_16_Val   << I2S_CLKCTRL_SLOTSIZE_Pos)
+#define I2S_CLKCTRL_SLOTSIZE_24     (I2S_CLKCTRL_SLOTSIZE_24_Val   << I2S_CLKCTRL_SLOTSIZE_Pos)
+#define I2S_CLKCTRL_SLOTSIZE_32     (I2S_CLKCTRL_SLOTSIZE_32_Val   << I2S_CLKCTRL_SLOTSIZE_Pos)
+#define I2S_CLKCTRL_NBSLOTS_Pos     2            /**< \brief (I2S_CLKCTRL) Number of Slots in Frame */
+#define I2S_CLKCTRL_NBSLOTS_Msk     (0x7u << I2S_CLKCTRL_NBSLOTS_Pos)
+#define I2S_CLKCTRL_NBSLOTS(value)  ((I2S_CLKCTRL_NBSLOTS_Msk & ((value) << I2S_CLKCTRL_NBSLOTS_Pos)))
+#define I2S_CLKCTRL_FSWIDTH_Pos     5            /**< \brief (I2S_CLKCTRL) Frame Sync Width */
+#define I2S_CLKCTRL_FSWIDTH_Msk     (0x3u << I2S_CLKCTRL_FSWIDTH_Pos)
+#define I2S_CLKCTRL_FSWIDTH(value)  ((I2S_CLKCTRL_FSWIDTH_Msk & ((value) << I2S_CLKCTRL_FSWIDTH_Pos)))
+#define   I2S_CLKCTRL_FSWIDTH_SLOT_Val    0x0u   /**< \brief (I2S_CLKCTRL) Frame Sync Pulse is 1 Slot wide (default for I2S protocol) */
+#define   I2S_CLKCTRL_FSWIDTH_HALF_Val    0x1u   /**< \brief (I2S_CLKCTRL) Frame Sync Pulse is half a Frame wide */
+#define   I2S_CLKCTRL_FSWIDTH_BIT_Val     0x2u   /**< \brief (I2S_CLKCTRL) Frame Sync Pulse is 1 Bit wide */
+#define   I2S_CLKCTRL_FSWIDTH_BURST_Val   0x3u   /**< \brief (I2S_CLKCTRL) Clock Unit n operates in Burst mode, with a 1-bit wide Frame Sync pulse per Data sample, only when Data transfer is requested */
+#define I2S_CLKCTRL_FSWIDTH_SLOT    (I2S_CLKCTRL_FSWIDTH_SLOT_Val  << I2S_CLKCTRL_FSWIDTH_Pos)
+#define I2S_CLKCTRL_FSWIDTH_HALF    (I2S_CLKCTRL_FSWIDTH_HALF_Val  << I2S_CLKCTRL_FSWIDTH_Pos)
+#define I2S_CLKCTRL_FSWIDTH_BIT     (I2S_CLKCTRL_FSWIDTH_BIT_Val   << I2S_CLKCTRL_FSWIDTH_Pos)
+#define I2S_CLKCTRL_FSWIDTH_BURST   (I2S_CLKCTRL_FSWIDTH_BURST_Val << I2S_CLKCTRL_FSWIDTH_Pos)
+#define I2S_CLKCTRL_BITDELAY_Pos    7            /**< \brief (I2S_CLKCTRL) Data Delay from Frame Sync */
+#define I2S_CLKCTRL_BITDELAY        (0x1u << I2S_CLKCTRL_BITDELAY_Pos)
+#define   I2S_CLKCTRL_BITDELAY_LJ_Val     0x0u   /**< \brief (I2S_CLKCTRL) Left Justified (0 Bit Delay) */
+#define   I2S_CLKCTRL_BITDELAY_I2S_Val    0x1u   /**< \brief (I2S_CLKCTRL) I2S (1 Bit Delay) */
+#define I2S_CLKCTRL_BITDELAY_LJ     (I2S_CLKCTRL_BITDELAY_LJ_Val   << I2S_CLKCTRL_BITDELAY_Pos)
+#define I2S_CLKCTRL_BITDELAY_I2S    (I2S_CLKCTRL_BITDELAY_I2S_Val  << I2S_CLKCTRL_BITDELAY_Pos)
+#define I2S_CLKCTRL_FSSEL_Pos       8            /**< \brief (I2S_CLKCTRL) Frame Sync Select */
+#define I2S_CLKCTRL_FSSEL           (0x1u << I2S_CLKCTRL_FSSEL_Pos)
+#define   I2S_CLKCTRL_FSSEL_SCKDIV_Val    0x0u   /**< \brief (I2S_CLKCTRL) Divided Serial Clock n is used as Frame Sync n source */
+#define   I2S_CLKCTRL_FSSEL_FSPIN_Val     0x1u   /**< \brief (I2S_CLKCTRL) FSn input pin is used as Frame Sync n source */
+#define I2S_CLKCTRL_FSSEL_SCKDIV    (I2S_CLKCTRL_FSSEL_SCKDIV_Val  << I2S_CLKCTRL_FSSEL_Pos)
+#define I2S_CLKCTRL_FSSEL_FSPIN     (I2S_CLKCTRL_FSSEL_FSPIN_Val   << I2S_CLKCTRL_FSSEL_Pos)
+#define I2S_CLKCTRL_FSINV_Pos       11           /**< \brief (I2S_CLKCTRL) Frame Sync Invert */
+#define I2S_CLKCTRL_FSINV           (0x1u << I2S_CLKCTRL_FSINV_Pos)
+#define I2S_CLKCTRL_SCKSEL_Pos      12           /**< \brief (I2S_CLKCTRL) Serial Clock Select */
+#define I2S_CLKCTRL_SCKSEL          (0x1u << I2S_CLKCTRL_SCKSEL_Pos)
+#define   I2S_CLKCTRL_SCKSEL_MCKDIV_Val   0x0u   /**< \brief (I2S_CLKCTRL) Divided Master Clock n is used as Serial Clock n source */
+#define   I2S_CLKCTRL_SCKSEL_SCKPIN_Val   0x1u   /**< \brief (I2S_CLKCTRL) SCKn input pin is used as Serial Clock n source */
+#define I2S_CLKCTRL_SCKSEL_MCKDIV   (I2S_CLKCTRL_SCKSEL_MCKDIV_Val << I2S_CLKCTRL_SCKSEL_Pos)
+#define I2S_CLKCTRL_SCKSEL_SCKPIN   (I2S_CLKCTRL_SCKSEL_SCKPIN_Val << I2S_CLKCTRL_SCKSEL_Pos)
+#define I2S_CLKCTRL_MCKSEL_Pos      16           /**< \brief (I2S_CLKCTRL) Master Clock Select */
+#define I2S_CLKCTRL_MCKSEL          (0x1u << I2S_CLKCTRL_MCKSEL_Pos)
+#define   I2S_CLKCTRL_MCKSEL_GCLK_Val     0x0u   /**< \brief (I2S_CLKCTRL) GCLK_I2S_n is used as Master Clock n source */
+#define   I2S_CLKCTRL_MCKSEL_MCKPIN_Val   0x1u   /**< \brief (I2S_CLKCTRL) MCKn input pin is used as Master Clock n source */
+#define I2S_CLKCTRL_MCKSEL_GCLK     (I2S_CLKCTRL_MCKSEL_GCLK_Val   << I2S_CLKCTRL_MCKSEL_Pos)
+#define I2S_CLKCTRL_MCKSEL_MCKPIN   (I2S_CLKCTRL_MCKSEL_MCKPIN_Val << I2S_CLKCTRL_MCKSEL_Pos)
+#define I2S_CLKCTRL_MCKEN_Pos       18           /**< \brief (I2S_CLKCTRL) Master Clock Enable */
+#define I2S_CLKCTRL_MCKEN           (0x1u << I2S_CLKCTRL_MCKEN_Pos)
+#define I2S_CLKCTRL_MCKDIV_Pos      19           /**< \brief (I2S_CLKCTRL) Master Clock Division Factor */
+#define I2S_CLKCTRL_MCKDIV_Msk      (0x1Fu << I2S_CLKCTRL_MCKDIV_Pos)
+#define I2S_CLKCTRL_MCKDIV(value)   ((I2S_CLKCTRL_MCKDIV_Msk & ((value) << I2S_CLKCTRL_MCKDIV_Pos)))
+#define I2S_CLKCTRL_MCKOUTDIV_Pos   24           /**< \brief (I2S_CLKCTRL) Master Clock Output Division Factor */
+#define I2S_CLKCTRL_MCKOUTDIV_Msk   (0x1Fu << I2S_CLKCTRL_MCKOUTDIV_Pos)
+#define I2S_CLKCTRL_MCKOUTDIV(value) ((I2S_CLKCTRL_MCKOUTDIV_Msk & ((value) << I2S_CLKCTRL_MCKOUTDIV_Pos)))
+#define I2S_CLKCTRL_FSOUTINV_Pos    29           /**< \brief (I2S_CLKCTRL) Frame Sync Output Invert */
+#define I2S_CLKCTRL_FSOUTINV        (0x1u << I2S_CLKCTRL_FSOUTINV_Pos)
+#define I2S_CLKCTRL_SCKOUTINV_Pos   30           /**< \brief (I2S_CLKCTRL) Serial Clock Output Invert */
+#define I2S_CLKCTRL_SCKOUTINV       (0x1u << I2S_CLKCTRL_SCKOUTINV_Pos)
+#define I2S_CLKCTRL_MCKOUTINV_Pos   31           /**< \brief (I2S_CLKCTRL) Master Clock Output Invert */
+#define I2S_CLKCTRL_MCKOUTINV       (0x1u << I2S_CLKCTRL_MCKOUTINV_Pos)
+#define I2S_CLKCTRL_MASK            0xFFFD19FFu  /**< \brief (I2S_CLKCTRL) MASK Register */
+
+/* -------- I2S_INTENCLR : (I2S Offset: 0x0C) (R/W 16) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t RXRDY0:1;         /*!< bit:      0  Receive Ready 0 Interrupt Enable   */
+    uint16_t RXRDY1:1;         /*!< bit:      1  Receive Ready 1 Interrupt Enable   */
+    uint16_t :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint16_t RXOR0:1;          /*!< bit:      4  Receive Overrun 0 Interrupt Enable */
+    uint16_t RXOR1:1;          /*!< bit:      5  Receive Overrun 1 Interrupt Enable */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t TXRDY0:1;         /*!< bit:      8  Transmit Ready 0 Interrupt Enable  */
+    uint16_t TXRDY1:1;         /*!< bit:      9  Transmit Ready 1 Interrupt Enable  */
+    uint16_t :2;               /*!< bit: 10..11  Reserved                           */
+    uint16_t TXUR0:1;          /*!< bit:     12  Transmit Underrun 0 Interrupt Enable */
+    uint16_t TXUR1:1;          /*!< bit:     13  Transmit Underrun 1 Interrupt Enable */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t RXRDY:2;          /*!< bit:  0.. 1  Receive Ready x Interrupt Enable   */
+    uint16_t :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint16_t RXOR:2;           /*!< bit:  4.. 5  Receive Overrun x Interrupt Enable */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t TXRDY:2;          /*!< bit:  8.. 9  Transmit Ready x Interrupt Enable  */
+    uint16_t :2;               /*!< bit: 10..11  Reserved                           */
+    uint16_t TXUR:2;           /*!< bit: 12..13  Transmit Underrun x Interrupt Enable */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} I2S_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define I2S_INTENCLR_OFFSET         0x0C         /**< \brief (I2S_INTENCLR offset) Interrupt Enable Clear */
+#define I2S_INTENCLR_RESETVALUE     0x0000       /**< \brief (I2S_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define I2S_INTENCLR_RXRDY0_Pos     0            /**< \brief (I2S_INTENCLR) Receive Ready 0 Interrupt Enable */
+#define I2S_INTENCLR_RXRDY0         (1 << I2S_INTENCLR_RXRDY0_Pos)
+#define I2S_INTENCLR_RXRDY1_Pos     1            /**< \brief (I2S_INTENCLR) Receive Ready 1 Interrupt Enable */
+#define I2S_INTENCLR_RXRDY1         (1 << I2S_INTENCLR_RXRDY1_Pos)
+#define I2S_INTENCLR_RXRDY_Pos      0            /**< \brief (I2S_INTENCLR) Receive Ready x Interrupt Enable */
+#define I2S_INTENCLR_RXRDY_Msk      (0x3u << I2S_INTENCLR_RXRDY_Pos)
+#define I2S_INTENCLR_RXRDY(value)   ((I2S_INTENCLR_RXRDY_Msk & ((value) << I2S_INTENCLR_RXRDY_Pos)))
+#define I2S_INTENCLR_RXOR0_Pos      4            /**< \brief (I2S_INTENCLR) Receive Overrun 0 Interrupt Enable */
+#define I2S_INTENCLR_RXOR0          (1 << I2S_INTENCLR_RXOR0_Pos)
+#define I2S_INTENCLR_RXOR1_Pos      5            /**< \brief (I2S_INTENCLR) Receive Overrun 1 Interrupt Enable */
+#define I2S_INTENCLR_RXOR1          (1 << I2S_INTENCLR_RXOR1_Pos)
+#define I2S_INTENCLR_RXOR_Pos       4            /**< \brief (I2S_INTENCLR) Receive Overrun x Interrupt Enable */
+#define I2S_INTENCLR_RXOR_Msk       (0x3u << I2S_INTENCLR_RXOR_Pos)
+#define I2S_INTENCLR_RXOR(value)    ((I2S_INTENCLR_RXOR_Msk & ((value) << I2S_INTENCLR_RXOR_Pos)))
+#define I2S_INTENCLR_TXRDY0_Pos     8            /**< \brief (I2S_INTENCLR) Transmit Ready 0 Interrupt Enable */
+#define I2S_INTENCLR_TXRDY0         (1 << I2S_INTENCLR_TXRDY0_Pos)
+#define I2S_INTENCLR_TXRDY1_Pos     9            /**< \brief (I2S_INTENCLR) Transmit Ready 1 Interrupt Enable */
+#define I2S_INTENCLR_TXRDY1         (1 << I2S_INTENCLR_TXRDY1_Pos)
+#define I2S_INTENCLR_TXRDY_Pos      8            /**< \brief (I2S_INTENCLR) Transmit Ready x Interrupt Enable */
+#define I2S_INTENCLR_TXRDY_Msk      (0x3u << I2S_INTENCLR_TXRDY_Pos)
+#define I2S_INTENCLR_TXRDY(value)   ((I2S_INTENCLR_TXRDY_Msk & ((value) << I2S_INTENCLR_TXRDY_Pos)))
+#define I2S_INTENCLR_TXUR0_Pos      12           /**< \brief (I2S_INTENCLR) Transmit Underrun 0 Interrupt Enable */
+#define I2S_INTENCLR_TXUR0          (1 << I2S_INTENCLR_TXUR0_Pos)
+#define I2S_INTENCLR_TXUR1_Pos      13           /**< \brief (I2S_INTENCLR) Transmit Underrun 1 Interrupt Enable */
+#define I2S_INTENCLR_TXUR1          (1 << I2S_INTENCLR_TXUR1_Pos)
+#define I2S_INTENCLR_TXUR_Pos       12           /**< \brief (I2S_INTENCLR) Transmit Underrun x Interrupt Enable */
+#define I2S_INTENCLR_TXUR_Msk       (0x3u << I2S_INTENCLR_TXUR_Pos)
+#define I2S_INTENCLR_TXUR(value)    ((I2S_INTENCLR_TXUR_Msk & ((value) << I2S_INTENCLR_TXUR_Pos)))
+#define I2S_INTENCLR_MASK           0x3333u      /**< \brief (I2S_INTENCLR) MASK Register */
+
+/* -------- I2S_INTENSET : (I2S Offset: 0x10) (R/W 16) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t RXRDY0:1;         /*!< bit:      0  Receive Ready 0 Interrupt Enable   */
+    uint16_t RXRDY1:1;         /*!< bit:      1  Receive Ready 1 Interrupt Enable   */
+    uint16_t :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint16_t RXOR0:1;          /*!< bit:      4  Receive Overrun 0 Interrupt Enable */
+    uint16_t RXOR1:1;          /*!< bit:      5  Receive Overrun 1 Interrupt Enable */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t TXRDY0:1;         /*!< bit:      8  Transmit Ready 0 Interrupt Enable  */
+    uint16_t TXRDY1:1;         /*!< bit:      9  Transmit Ready 1 Interrupt Enable  */
+    uint16_t :2;               /*!< bit: 10..11  Reserved                           */
+    uint16_t TXUR0:1;          /*!< bit:     12  Transmit Underrun 0 Interrupt Enable */
+    uint16_t TXUR1:1;          /*!< bit:     13  Transmit Underrun 1 Interrupt Enable */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t RXRDY:2;          /*!< bit:  0.. 1  Receive Ready x Interrupt Enable   */
+    uint16_t :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint16_t RXOR:2;           /*!< bit:  4.. 5  Receive Overrun x Interrupt Enable */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t TXRDY:2;          /*!< bit:  8.. 9  Transmit Ready x Interrupt Enable  */
+    uint16_t :2;               /*!< bit: 10..11  Reserved                           */
+    uint16_t TXUR:2;           /*!< bit: 12..13  Transmit Underrun x Interrupt Enable */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} I2S_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define I2S_INTENSET_OFFSET         0x10         /**< \brief (I2S_INTENSET offset) Interrupt Enable Set */
+#define I2S_INTENSET_RESETVALUE     0x0000       /**< \brief (I2S_INTENSET reset_value) Interrupt Enable Set */
+
+#define I2S_INTENSET_RXRDY0_Pos     0            /**< \brief (I2S_INTENSET) Receive Ready 0 Interrupt Enable */
+#define I2S_INTENSET_RXRDY0         (1 << I2S_INTENSET_RXRDY0_Pos)
+#define I2S_INTENSET_RXRDY1_Pos     1            /**< \brief (I2S_INTENSET) Receive Ready 1 Interrupt Enable */
+#define I2S_INTENSET_RXRDY1         (1 << I2S_INTENSET_RXRDY1_Pos)
+#define I2S_INTENSET_RXRDY_Pos      0            /**< \brief (I2S_INTENSET) Receive Ready x Interrupt Enable */
+#define I2S_INTENSET_RXRDY_Msk      (0x3u << I2S_INTENSET_RXRDY_Pos)
+#define I2S_INTENSET_RXRDY(value)   ((I2S_INTENSET_RXRDY_Msk & ((value) << I2S_INTENSET_RXRDY_Pos)))
+#define I2S_INTENSET_RXOR0_Pos      4            /**< \brief (I2S_INTENSET) Receive Overrun 0 Interrupt Enable */
+#define I2S_INTENSET_RXOR0          (1 << I2S_INTENSET_RXOR0_Pos)
+#define I2S_INTENSET_RXOR1_Pos      5            /**< \brief (I2S_INTENSET) Receive Overrun 1 Interrupt Enable */
+#define I2S_INTENSET_RXOR1          (1 << I2S_INTENSET_RXOR1_Pos)
+#define I2S_INTENSET_RXOR_Pos       4            /**< \brief (I2S_INTENSET) Receive Overrun x Interrupt Enable */
+#define I2S_INTENSET_RXOR_Msk       (0x3u << I2S_INTENSET_RXOR_Pos)
+#define I2S_INTENSET_RXOR(value)    ((I2S_INTENSET_RXOR_Msk & ((value) << I2S_INTENSET_RXOR_Pos)))
+#define I2S_INTENSET_TXRDY0_Pos     8            /**< \brief (I2S_INTENSET) Transmit Ready 0 Interrupt Enable */
+#define I2S_INTENSET_TXRDY0         (1 << I2S_INTENSET_TXRDY0_Pos)
+#define I2S_INTENSET_TXRDY1_Pos     9            /**< \brief (I2S_INTENSET) Transmit Ready 1 Interrupt Enable */
+#define I2S_INTENSET_TXRDY1         (1 << I2S_INTENSET_TXRDY1_Pos)
+#define I2S_INTENSET_TXRDY_Pos      8            /**< \brief (I2S_INTENSET) Transmit Ready x Interrupt Enable */
+#define I2S_INTENSET_TXRDY_Msk      (0x3u << I2S_INTENSET_TXRDY_Pos)
+#define I2S_INTENSET_TXRDY(value)   ((I2S_INTENSET_TXRDY_Msk & ((value) << I2S_INTENSET_TXRDY_Pos)))
+#define I2S_INTENSET_TXUR0_Pos      12           /**< \brief (I2S_INTENSET) Transmit Underrun 0 Interrupt Enable */
+#define I2S_INTENSET_TXUR0          (1 << I2S_INTENSET_TXUR0_Pos)
+#define I2S_INTENSET_TXUR1_Pos      13           /**< \brief (I2S_INTENSET) Transmit Underrun 1 Interrupt Enable */
+#define I2S_INTENSET_TXUR1          (1 << I2S_INTENSET_TXUR1_Pos)
+#define I2S_INTENSET_TXUR_Pos       12           /**< \brief (I2S_INTENSET) Transmit Underrun x Interrupt Enable */
+#define I2S_INTENSET_TXUR_Msk       (0x3u << I2S_INTENSET_TXUR_Pos)
+#define I2S_INTENSET_TXUR(value)    ((I2S_INTENSET_TXUR_Msk & ((value) << I2S_INTENSET_TXUR_Pos)))
+#define I2S_INTENSET_MASK           0x3333u      /**< \brief (I2S_INTENSET) MASK Register */
+
+/* -------- I2S_INTFLAG : (I2S Offset: 0x14) (R/W 16) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t RXRDY0:1;         /*!< bit:      0  Receive Ready 0                    */
+    uint16_t RXRDY1:1;         /*!< bit:      1  Receive Ready 1                    */
+    uint16_t :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint16_t RXOR0:1;          /*!< bit:      4  Receive Overrun 0                  */
+    uint16_t RXOR1:1;          /*!< bit:      5  Receive Overrun 1                  */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t TXRDY0:1;         /*!< bit:      8  Transmit Ready 0                   */
+    uint16_t TXRDY1:1;         /*!< bit:      9  Transmit Ready 1                   */
+    uint16_t :2;               /*!< bit: 10..11  Reserved                           */
+    uint16_t TXUR0:1;          /*!< bit:     12  Transmit Underrun 0                */
+    uint16_t TXUR1:1;          /*!< bit:     13  Transmit Underrun 1                */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t RXRDY:2;          /*!< bit:  0.. 1  Receive Ready x                    */
+    uint16_t :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint16_t RXOR:2;           /*!< bit:  4.. 5  Receive Overrun x                  */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t TXRDY:2;          /*!< bit:  8.. 9  Transmit Ready x                   */
+    uint16_t :2;               /*!< bit: 10..11  Reserved                           */
+    uint16_t TXUR:2;           /*!< bit: 12..13  Transmit Underrun x                */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} I2S_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define I2S_INTFLAG_OFFSET          0x14         /**< \brief (I2S_INTFLAG offset) Interrupt Flag Status and Clear */
+#define I2S_INTFLAG_RESETVALUE      0x0000       /**< \brief (I2S_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define I2S_INTFLAG_RXRDY0_Pos      0            /**< \brief (I2S_INTFLAG) Receive Ready 0 */
+#define I2S_INTFLAG_RXRDY0          (1 << I2S_INTFLAG_RXRDY0_Pos)
+#define I2S_INTFLAG_RXRDY1_Pos      1            /**< \brief (I2S_INTFLAG) Receive Ready 1 */
+#define I2S_INTFLAG_RXRDY1          (1 << I2S_INTFLAG_RXRDY1_Pos)
+#define I2S_INTFLAG_RXRDY_Pos       0            /**< \brief (I2S_INTFLAG) Receive Ready x */
+#define I2S_INTFLAG_RXRDY_Msk       (0x3u << I2S_INTFLAG_RXRDY_Pos)
+#define I2S_INTFLAG_RXRDY(value)    ((I2S_INTFLAG_RXRDY_Msk & ((value) << I2S_INTFLAG_RXRDY_Pos)))
+#define I2S_INTFLAG_RXOR0_Pos       4            /**< \brief (I2S_INTFLAG) Receive Overrun 0 */
+#define I2S_INTFLAG_RXOR0           (1 << I2S_INTFLAG_RXOR0_Pos)
+#define I2S_INTFLAG_RXOR1_Pos       5            /**< \brief (I2S_INTFLAG) Receive Overrun 1 */
+#define I2S_INTFLAG_RXOR1           (1 << I2S_INTFLAG_RXOR1_Pos)
+#define I2S_INTFLAG_RXOR_Pos        4            /**< \brief (I2S_INTFLAG) Receive Overrun x */
+#define I2S_INTFLAG_RXOR_Msk        (0x3u << I2S_INTFLAG_RXOR_Pos)
+#define I2S_INTFLAG_RXOR(value)     ((I2S_INTFLAG_RXOR_Msk & ((value) << I2S_INTFLAG_RXOR_Pos)))
+#define I2S_INTFLAG_TXRDY0_Pos      8            /**< \brief (I2S_INTFLAG) Transmit Ready 0 */
+#define I2S_INTFLAG_TXRDY0          (1 << I2S_INTFLAG_TXRDY0_Pos)
+#define I2S_INTFLAG_TXRDY1_Pos      9            /**< \brief (I2S_INTFLAG) Transmit Ready 1 */
+#define I2S_INTFLAG_TXRDY1          (1 << I2S_INTFLAG_TXRDY1_Pos)
+#define I2S_INTFLAG_TXRDY_Pos       8            /**< \brief (I2S_INTFLAG) Transmit Ready x */
+#define I2S_INTFLAG_TXRDY_Msk       (0x3u << I2S_INTFLAG_TXRDY_Pos)
+#define I2S_INTFLAG_TXRDY(value)    ((I2S_INTFLAG_TXRDY_Msk & ((value) << I2S_INTFLAG_TXRDY_Pos)))
+#define I2S_INTFLAG_TXUR0_Pos       12           /**< \brief (I2S_INTFLAG) Transmit Underrun 0 */
+#define I2S_INTFLAG_TXUR0           (1 << I2S_INTFLAG_TXUR0_Pos)
+#define I2S_INTFLAG_TXUR1_Pos       13           /**< \brief (I2S_INTFLAG) Transmit Underrun 1 */
+#define I2S_INTFLAG_TXUR1           (1 << I2S_INTFLAG_TXUR1_Pos)
+#define I2S_INTFLAG_TXUR_Pos        12           /**< \brief (I2S_INTFLAG) Transmit Underrun x */
+#define I2S_INTFLAG_TXUR_Msk        (0x3u << I2S_INTFLAG_TXUR_Pos)
+#define I2S_INTFLAG_TXUR(value)     ((I2S_INTFLAG_TXUR_Msk & ((value) << I2S_INTFLAG_TXUR_Pos)))
+#define I2S_INTFLAG_MASK            0x3333u      /**< \brief (I2S_INTFLAG) MASK Register */
+
+/* -------- I2S_SYNCBUSY : (I2S Offset: 0x18) (R/  16) Synchronization Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SWRST:1;          /*!< bit:      0  Software Reset Synchronization Status */
+    uint16_t ENABLE:1;         /*!< bit:      1  Enable Synchronization Status      */
+    uint16_t CKEN0:1;          /*!< bit:      2  Clock Unit 0 Enable Synchronization Status */
+    uint16_t CKEN1:1;          /*!< bit:      3  Clock Unit 1 Enable Synchronization Status */
+    uint16_t SEREN0:1;         /*!< bit:      4  Serializer 0 Enable Synchronization Status */
+    uint16_t SEREN1:1;         /*!< bit:      5  Serializer 1 Enable Synchronization Status */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t DATA0:1;          /*!< bit:      8  Data 0 Synchronization Status      */
+    uint16_t DATA1:1;          /*!< bit:      9  Data 1 Synchronization Status      */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint16_t CKEN:2;           /*!< bit:  2.. 3  Clock Unit x Enable Synchronization Status */
+    uint16_t SEREN:2;          /*!< bit:  4.. 5  Serializer x Enable Synchronization Status */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t DATA:2;           /*!< bit:  8.. 9  Data x Synchronization Status      */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} I2S_SYNCBUSY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define I2S_SYNCBUSY_OFFSET         0x18         /**< \brief (I2S_SYNCBUSY offset) Synchronization Status */
+#define I2S_SYNCBUSY_RESETVALUE     0x0000       /**< \brief (I2S_SYNCBUSY reset_value) Synchronization Status */
+
+#define I2S_SYNCBUSY_SWRST_Pos      0            /**< \brief (I2S_SYNCBUSY) Software Reset Synchronization Status */
+#define I2S_SYNCBUSY_SWRST          (0x1u << I2S_SYNCBUSY_SWRST_Pos)
+#define I2S_SYNCBUSY_ENABLE_Pos     1            /**< \brief (I2S_SYNCBUSY) Enable Synchronization Status */
+#define I2S_SYNCBUSY_ENABLE         (0x1u << I2S_SYNCBUSY_ENABLE_Pos)
+#define I2S_SYNCBUSY_CKEN0_Pos      2            /**< \brief (I2S_SYNCBUSY) Clock Unit 0 Enable Synchronization Status */
+#define I2S_SYNCBUSY_CKEN0          (1 << I2S_SYNCBUSY_CKEN0_Pos)
+#define I2S_SYNCBUSY_CKEN1_Pos      3            /**< \brief (I2S_SYNCBUSY) Clock Unit 1 Enable Synchronization Status */
+#define I2S_SYNCBUSY_CKEN1          (1 << I2S_SYNCBUSY_CKEN1_Pos)
+#define I2S_SYNCBUSY_CKEN_Pos       2            /**< \brief (I2S_SYNCBUSY) Clock Unit x Enable Synchronization Status */
+#define I2S_SYNCBUSY_CKEN_Msk       (0x3u << I2S_SYNCBUSY_CKEN_Pos)
+#define I2S_SYNCBUSY_CKEN(value)    ((I2S_SYNCBUSY_CKEN_Msk & ((value) << I2S_SYNCBUSY_CKEN_Pos)))
+#define I2S_SYNCBUSY_SEREN0_Pos     4            /**< \brief (I2S_SYNCBUSY) Serializer 0 Enable Synchronization Status */
+#define I2S_SYNCBUSY_SEREN0         (1 << I2S_SYNCBUSY_SEREN0_Pos)
+#define I2S_SYNCBUSY_SEREN1_Pos     5            /**< \brief (I2S_SYNCBUSY) Serializer 1 Enable Synchronization Status */
+#define I2S_SYNCBUSY_SEREN1         (1 << I2S_SYNCBUSY_SEREN1_Pos)
+#define I2S_SYNCBUSY_SEREN_Pos      4            /**< \brief (I2S_SYNCBUSY) Serializer x Enable Synchronization Status */
+#define I2S_SYNCBUSY_SEREN_Msk      (0x3u << I2S_SYNCBUSY_SEREN_Pos)
+#define I2S_SYNCBUSY_SEREN(value)   ((I2S_SYNCBUSY_SEREN_Msk & ((value) << I2S_SYNCBUSY_SEREN_Pos)))
+#define I2S_SYNCBUSY_DATA0_Pos      8            /**< \brief (I2S_SYNCBUSY) Data 0 Synchronization Status */
+#define I2S_SYNCBUSY_DATA0          (1 << I2S_SYNCBUSY_DATA0_Pos)
+#define I2S_SYNCBUSY_DATA1_Pos      9            /**< \brief (I2S_SYNCBUSY) Data 1 Synchronization Status */
+#define I2S_SYNCBUSY_DATA1          (1 << I2S_SYNCBUSY_DATA1_Pos)
+#define I2S_SYNCBUSY_DATA_Pos       8            /**< \brief (I2S_SYNCBUSY) Data x Synchronization Status */
+#define I2S_SYNCBUSY_DATA_Msk       (0x3u << I2S_SYNCBUSY_DATA_Pos)
+#define I2S_SYNCBUSY_DATA(value)    ((I2S_SYNCBUSY_DATA_Msk & ((value) << I2S_SYNCBUSY_DATA_Pos)))
+#define I2S_SYNCBUSY_MASK           0x033Fu      /**< \brief (I2S_SYNCBUSY) MASK Register */
+
+/* -------- I2S_SERCTRL : (I2S Offset: 0x20) (R/W 32) Serializer n Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SERMODE:2;        /*!< bit:  0.. 1  Serializer Mode                    */
+    uint32_t TXDEFAULT:2;      /*!< bit:  2.. 3  Line Default Line when Slot Disabled */
+    uint32_t TXSAME:1;         /*!< bit:      4  Transmit Data when Underrun        */
+    uint32_t CLKSEL:1;         /*!< bit:      5  Clock Unit Selection               */
+    uint32_t :1;               /*!< bit:      6  Reserved                           */
+    uint32_t SLOTADJ:1;        /*!< bit:      7  Data Slot Formatting Adjust        */
+    uint32_t DATASIZE:3;       /*!< bit:  8..10  Data Word Size                     */
+    uint32_t :1;               /*!< bit:     11  Reserved                           */
+    uint32_t WORDADJ:1;        /*!< bit:     12  Data Word Formatting Adjust        */
+    uint32_t EXTEND:2;         /*!< bit: 13..14  Data Formatting Bit Extension      */
+    uint32_t BITREV:1;         /*!< bit:     15  Data Formatting Bit Reverse        */
+    uint32_t SLOTDIS0:1;       /*!< bit:     16  Slot 0 Disabled for this Serializer */
+    uint32_t SLOTDIS1:1;       /*!< bit:     17  Slot 1 Disabled for this Serializer */
+    uint32_t SLOTDIS2:1;       /*!< bit:     18  Slot 2 Disabled for this Serializer */
+    uint32_t SLOTDIS3:1;       /*!< bit:     19  Slot 3 Disabled for this Serializer */
+    uint32_t SLOTDIS4:1;       /*!< bit:     20  Slot 4 Disabled for this Serializer */
+    uint32_t SLOTDIS5:1;       /*!< bit:     21  Slot 5 Disabled for this Serializer */
+    uint32_t SLOTDIS6:1;       /*!< bit:     22  Slot 6 Disabled for this Serializer */
+    uint32_t SLOTDIS7:1;       /*!< bit:     23  Slot 7 Disabled for this Serializer */
+    uint32_t MONO:1;           /*!< bit:     24  Mono Mode                          */
+    uint32_t DMA:1;            /*!< bit:     25  Single or Multiple DMA Channels    */
+    uint32_t RXLOOP:1;         /*!< bit:     26  Loop-back Test Mode                */
+    uint32_t :5;               /*!< bit: 27..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t SLOTDIS:8;        /*!< bit: 16..23  Slot x Disabled for this Serializer */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} I2S_SERCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define I2S_SERCTRL_OFFSET          0x20         /**< \brief (I2S_SERCTRL offset) Serializer n Control */
+#define I2S_SERCTRL_RESETVALUE      0x00000000   /**< \brief (I2S_SERCTRL reset_value) Serializer n Control */
+
+#define I2S_SERCTRL_SERMODE_Pos     0            /**< \brief (I2S_SERCTRL) Serializer Mode */
+#define I2S_SERCTRL_SERMODE_Msk     (0x3u << I2S_SERCTRL_SERMODE_Pos)
+#define I2S_SERCTRL_SERMODE(value)  ((I2S_SERCTRL_SERMODE_Msk & ((value) << I2S_SERCTRL_SERMODE_Pos)))
+#define   I2S_SERCTRL_SERMODE_RX_Val      0x0u   /**< \brief (I2S_SERCTRL) Receive */
+#define   I2S_SERCTRL_SERMODE_TX_Val      0x1u   /**< \brief (I2S_SERCTRL) Transmit */
+#define   I2S_SERCTRL_SERMODE_PDM2_Val    0x2u   /**< \brief (I2S_SERCTRL) Receive one PDM data on each serial clock edge */
+#define I2S_SERCTRL_SERMODE_RX      (I2S_SERCTRL_SERMODE_RX_Val    << I2S_SERCTRL_SERMODE_Pos)
+#define I2S_SERCTRL_SERMODE_TX      (I2S_SERCTRL_SERMODE_TX_Val    << I2S_SERCTRL_SERMODE_Pos)
+#define I2S_SERCTRL_SERMODE_PDM2    (I2S_SERCTRL_SERMODE_PDM2_Val  << I2S_SERCTRL_SERMODE_Pos)
+#define I2S_SERCTRL_TXDEFAULT_Pos   2            /**< \brief (I2S_SERCTRL) Line Default Line when Slot Disabled */
+#define I2S_SERCTRL_TXDEFAULT_Msk   (0x3u << I2S_SERCTRL_TXDEFAULT_Pos)
+#define I2S_SERCTRL_TXDEFAULT(value) ((I2S_SERCTRL_TXDEFAULT_Msk & ((value) << I2S_SERCTRL_TXDEFAULT_Pos)))
+#define   I2S_SERCTRL_TXDEFAULT_ZERO_Val  0x0u   /**< \brief (I2S_SERCTRL) Output Default Value is 0 */
+#define   I2S_SERCTRL_TXDEFAULT_ONE_Val   0x1u   /**< \brief (I2S_SERCTRL) Output Default Value is 1 */
+#define   I2S_SERCTRL_TXDEFAULT_HIZ_Val   0x3u   /**< \brief (I2S_SERCTRL) Output Default Value is high impedance */
+#define I2S_SERCTRL_TXDEFAULT_ZERO  (I2S_SERCTRL_TXDEFAULT_ZERO_Val << I2S_SERCTRL_TXDEFAULT_Pos)
+#define I2S_SERCTRL_TXDEFAULT_ONE   (I2S_SERCTRL_TXDEFAULT_ONE_Val << I2S_SERCTRL_TXDEFAULT_Pos)
+#define I2S_SERCTRL_TXDEFAULT_HIZ   (I2S_SERCTRL_TXDEFAULT_HIZ_Val << I2S_SERCTRL_TXDEFAULT_Pos)
+#define I2S_SERCTRL_TXSAME_Pos      4            /**< \brief (I2S_SERCTRL) Transmit Data when Underrun */
+#define I2S_SERCTRL_TXSAME          (0x1u << I2S_SERCTRL_TXSAME_Pos)
+#define   I2S_SERCTRL_TXSAME_ZERO_Val     0x0u   /**< \brief (I2S_SERCTRL) Zero data transmitted in case of underrun */
+#define   I2S_SERCTRL_TXSAME_SAME_Val     0x1u   /**< \brief (I2S_SERCTRL) Last data transmitted in case of underrun */
+#define I2S_SERCTRL_TXSAME_ZERO     (I2S_SERCTRL_TXSAME_ZERO_Val   << I2S_SERCTRL_TXSAME_Pos)
+#define I2S_SERCTRL_TXSAME_SAME     (I2S_SERCTRL_TXSAME_SAME_Val   << I2S_SERCTRL_TXSAME_Pos)
+#define I2S_SERCTRL_CLKSEL_Pos      5            /**< \brief (I2S_SERCTRL) Clock Unit Selection */
+#define I2S_SERCTRL_CLKSEL          (0x1u << I2S_SERCTRL_CLKSEL_Pos)
+#define   I2S_SERCTRL_CLKSEL_CLK0_Val     0x0u   /**< \brief (I2S_SERCTRL) Use Clock Unit 0 */
+#define   I2S_SERCTRL_CLKSEL_CLK1_Val     0x1u   /**< \brief (I2S_SERCTRL) Use Clock Unit 1 */
+#define I2S_SERCTRL_CLKSEL_CLK0     (I2S_SERCTRL_CLKSEL_CLK0_Val   << I2S_SERCTRL_CLKSEL_Pos)
+#define I2S_SERCTRL_CLKSEL_CLK1     (I2S_SERCTRL_CLKSEL_CLK1_Val   << I2S_SERCTRL_CLKSEL_Pos)
+#define I2S_SERCTRL_SLOTADJ_Pos     7            /**< \brief (I2S_SERCTRL) Data Slot Formatting Adjust */
+#define I2S_SERCTRL_SLOTADJ         (0x1u << I2S_SERCTRL_SLOTADJ_Pos)
+#define   I2S_SERCTRL_SLOTADJ_RIGHT_Val   0x0u   /**< \brief (I2S_SERCTRL) Data is right adjusted in slot */
+#define   I2S_SERCTRL_SLOTADJ_LEFT_Val    0x1u   /**< \brief (I2S_SERCTRL) Data is left adjusted in slot */
+#define I2S_SERCTRL_SLOTADJ_RIGHT   (I2S_SERCTRL_SLOTADJ_RIGHT_Val << I2S_SERCTRL_SLOTADJ_Pos)
+#define I2S_SERCTRL_SLOTADJ_LEFT    (I2S_SERCTRL_SLOTADJ_LEFT_Val  << I2S_SERCTRL_SLOTADJ_Pos)
+#define I2S_SERCTRL_DATASIZE_Pos    8            /**< \brief (I2S_SERCTRL) Data Word Size */
+#define I2S_SERCTRL_DATASIZE_Msk    (0x7u << I2S_SERCTRL_DATASIZE_Pos)
+#define I2S_SERCTRL_DATASIZE(value) ((I2S_SERCTRL_DATASIZE_Msk & ((value) << I2S_SERCTRL_DATASIZE_Pos)))
+#define   I2S_SERCTRL_DATASIZE_32_Val     0x0u   /**< \brief (I2S_SERCTRL) 32 bits */
+#define   I2S_SERCTRL_DATASIZE_24_Val     0x1u   /**< \brief (I2S_SERCTRL) 24 bits */
+#define   I2S_SERCTRL_DATASIZE_20_Val     0x2u   /**< \brief (I2S_SERCTRL) 20 bits */
+#define   I2S_SERCTRL_DATASIZE_18_Val     0x3u   /**< \brief (I2S_SERCTRL) 18 bits */
+#define   I2S_SERCTRL_DATASIZE_16_Val     0x4u   /**< \brief (I2S_SERCTRL) 16 bits */
+#define   I2S_SERCTRL_DATASIZE_16C_Val    0x5u   /**< \brief (I2S_SERCTRL) 16 bits compact stereo */
+#define   I2S_SERCTRL_DATASIZE_8_Val      0x6u   /**< \brief (I2S_SERCTRL) 8 bits */
+#define   I2S_SERCTRL_DATASIZE_8C_Val     0x7u   /**< \brief (I2S_SERCTRL) 8 bits compact stereo */
+#define I2S_SERCTRL_DATASIZE_32     (I2S_SERCTRL_DATASIZE_32_Val   << I2S_SERCTRL_DATASIZE_Pos)
+#define I2S_SERCTRL_DATASIZE_24     (I2S_SERCTRL_DATASIZE_24_Val   << I2S_SERCTRL_DATASIZE_Pos)
+#define I2S_SERCTRL_DATASIZE_20     (I2S_SERCTRL_DATASIZE_20_Val   << I2S_SERCTRL_DATASIZE_Pos)
+#define I2S_SERCTRL_DATASIZE_18     (I2S_SERCTRL_DATASIZE_18_Val   << I2S_SERCTRL_DATASIZE_Pos)
+#define I2S_SERCTRL_DATASIZE_16     (I2S_SERCTRL_DATASIZE_16_Val   << I2S_SERCTRL_DATASIZE_Pos)
+#define I2S_SERCTRL_DATASIZE_16C    (I2S_SERCTRL_DATASIZE_16C_Val  << I2S_SERCTRL_DATASIZE_Pos)
+#define I2S_SERCTRL_DATASIZE_8      (I2S_SERCTRL_DATASIZE_8_Val    << I2S_SERCTRL_DATASIZE_Pos)
+#define I2S_SERCTRL_DATASIZE_8C     (I2S_SERCTRL_DATASIZE_8C_Val   << I2S_SERCTRL_DATASIZE_Pos)
+#define I2S_SERCTRL_WORDADJ_Pos     12           /**< \brief (I2S_SERCTRL) Data Word Formatting Adjust */
+#define I2S_SERCTRL_WORDADJ         (0x1u << I2S_SERCTRL_WORDADJ_Pos)
+#define   I2S_SERCTRL_WORDADJ_RIGHT_Val   0x0u   /**< \brief (I2S_SERCTRL) Data is right adjusted in word */
+#define   I2S_SERCTRL_WORDADJ_LEFT_Val    0x1u   /**< \brief (I2S_SERCTRL) Data is left adjusted in word */
+#define I2S_SERCTRL_WORDADJ_RIGHT   (I2S_SERCTRL_WORDADJ_RIGHT_Val << I2S_SERCTRL_WORDADJ_Pos)
+#define I2S_SERCTRL_WORDADJ_LEFT    (I2S_SERCTRL_WORDADJ_LEFT_Val  << I2S_SERCTRL_WORDADJ_Pos)
+#define I2S_SERCTRL_EXTEND_Pos      13           /**< \brief (I2S_SERCTRL) Data Formatting Bit Extension */
+#define I2S_SERCTRL_EXTEND_Msk      (0x3u << I2S_SERCTRL_EXTEND_Pos)
+#define I2S_SERCTRL_EXTEND(value)   ((I2S_SERCTRL_EXTEND_Msk & ((value) << I2S_SERCTRL_EXTEND_Pos)))
+#define   I2S_SERCTRL_EXTEND_ZERO_Val     0x0u   /**< \brief (I2S_SERCTRL) Extend with zeroes */
+#define   I2S_SERCTRL_EXTEND_ONE_Val      0x1u   /**< \brief (I2S_SERCTRL) Extend with ones */
+#define   I2S_SERCTRL_EXTEND_MSBIT_Val    0x2u   /**< \brief (I2S_SERCTRL) Extend with Most Significant Bit */
+#define   I2S_SERCTRL_EXTEND_LSBIT_Val    0x3u   /**< \brief (I2S_SERCTRL) Extend with Least Significant Bit */
+#define I2S_SERCTRL_EXTEND_ZERO     (I2S_SERCTRL_EXTEND_ZERO_Val   << I2S_SERCTRL_EXTEND_Pos)
+#define I2S_SERCTRL_EXTEND_ONE      (I2S_SERCTRL_EXTEND_ONE_Val    << I2S_SERCTRL_EXTEND_Pos)
+#define I2S_SERCTRL_EXTEND_MSBIT    (I2S_SERCTRL_EXTEND_MSBIT_Val  << I2S_SERCTRL_EXTEND_Pos)
+#define I2S_SERCTRL_EXTEND_LSBIT    (I2S_SERCTRL_EXTEND_LSBIT_Val  << I2S_SERCTRL_EXTEND_Pos)
+#define I2S_SERCTRL_BITREV_Pos      15           /**< \brief (I2S_SERCTRL) Data Formatting Bit Reverse */
+#define I2S_SERCTRL_BITREV          (0x1u << I2S_SERCTRL_BITREV_Pos)
+#define   I2S_SERCTRL_BITREV_MSBIT_Val    0x0u   /**< \brief (I2S_SERCTRL) Transfer Data Most Significant Bit (MSB) first (default for I2S protocol) */
+#define   I2S_SERCTRL_BITREV_LSBIT_Val    0x1u   /**< \brief (I2S_SERCTRL) Transfer Data Least Significant Bit (LSB) first */
+#define I2S_SERCTRL_BITREV_MSBIT    (I2S_SERCTRL_BITREV_MSBIT_Val  << I2S_SERCTRL_BITREV_Pos)
+#define I2S_SERCTRL_BITREV_LSBIT    (I2S_SERCTRL_BITREV_LSBIT_Val  << I2S_SERCTRL_BITREV_Pos)
+#define I2S_SERCTRL_SLOTDIS0_Pos    16           /**< \brief (I2S_SERCTRL) Slot 0 Disabled for this Serializer */
+#define I2S_SERCTRL_SLOTDIS0        (1 << I2S_SERCTRL_SLOTDIS0_Pos)
+#define I2S_SERCTRL_SLOTDIS1_Pos    17           /**< \brief (I2S_SERCTRL) Slot 1 Disabled for this Serializer */
+#define I2S_SERCTRL_SLOTDIS1        (1 << I2S_SERCTRL_SLOTDIS1_Pos)
+#define I2S_SERCTRL_SLOTDIS2_Pos    18           /**< \brief (I2S_SERCTRL) Slot 2 Disabled for this Serializer */
+#define I2S_SERCTRL_SLOTDIS2        (1 << I2S_SERCTRL_SLOTDIS2_Pos)
+#define I2S_SERCTRL_SLOTDIS3_Pos    19           /**< \brief (I2S_SERCTRL) Slot 3 Disabled for this Serializer */
+#define I2S_SERCTRL_SLOTDIS3        (1 << I2S_SERCTRL_SLOTDIS3_Pos)
+#define I2S_SERCTRL_SLOTDIS4_Pos    20           /**< \brief (I2S_SERCTRL) Slot 4 Disabled for this Serializer */
+#define I2S_SERCTRL_SLOTDIS4        (1 << I2S_SERCTRL_SLOTDIS4_Pos)
+#define I2S_SERCTRL_SLOTDIS5_Pos    21           /**< \brief (I2S_SERCTRL) Slot 5 Disabled for this Serializer */
+#define I2S_SERCTRL_SLOTDIS5        (1 << I2S_SERCTRL_SLOTDIS5_Pos)
+#define I2S_SERCTRL_SLOTDIS6_Pos    22           /**< \brief (I2S_SERCTRL) Slot 6 Disabled for this Serializer */
+#define I2S_SERCTRL_SLOTDIS6        (1 << I2S_SERCTRL_SLOTDIS6_Pos)
+#define I2S_SERCTRL_SLOTDIS7_Pos    23           /**< \brief (I2S_SERCTRL) Slot 7 Disabled for this Serializer */
+#define I2S_SERCTRL_SLOTDIS7        (1 << I2S_SERCTRL_SLOTDIS7_Pos)
+#define I2S_SERCTRL_SLOTDIS_Pos     16           /**< \brief (I2S_SERCTRL) Slot x Disabled for this Serializer */
+#define I2S_SERCTRL_SLOTDIS_Msk     (0xFFu << I2S_SERCTRL_SLOTDIS_Pos)
+#define I2S_SERCTRL_SLOTDIS(value)  ((I2S_SERCTRL_SLOTDIS_Msk & ((value) << I2S_SERCTRL_SLOTDIS_Pos)))
+#define I2S_SERCTRL_MONO_Pos        24           /**< \brief (I2S_SERCTRL) Mono Mode */
+#define I2S_SERCTRL_MONO            (0x1u << I2S_SERCTRL_MONO_Pos)
+#define   I2S_SERCTRL_MONO_STEREO_Val     0x0u   /**< \brief (I2S_SERCTRL) Normal mode */
+#define   I2S_SERCTRL_MONO_MONO_Val       0x1u   /**< \brief (I2S_SERCTRL) Left channel data is duplicated to right channel */
+#define I2S_SERCTRL_MONO_STEREO     (I2S_SERCTRL_MONO_STEREO_Val   << I2S_SERCTRL_MONO_Pos)
+#define I2S_SERCTRL_MONO_MONO       (I2S_SERCTRL_MONO_MONO_Val     << I2S_SERCTRL_MONO_Pos)
+#define I2S_SERCTRL_DMA_Pos         25           /**< \brief (I2S_SERCTRL) Single or Multiple DMA Channels */
+#define I2S_SERCTRL_DMA             (0x1u << I2S_SERCTRL_DMA_Pos)
+#define   I2S_SERCTRL_DMA_SINGLE_Val      0x0u   /**< \brief (I2S_SERCTRL) Single DMA channel */
+#define   I2S_SERCTRL_DMA_MULTIPLE_Val    0x1u   /**< \brief (I2S_SERCTRL) One DMA channel per data channel */
+#define I2S_SERCTRL_DMA_SINGLE      (I2S_SERCTRL_DMA_SINGLE_Val    << I2S_SERCTRL_DMA_Pos)
+#define I2S_SERCTRL_DMA_MULTIPLE    (I2S_SERCTRL_DMA_MULTIPLE_Val  << I2S_SERCTRL_DMA_Pos)
+#define I2S_SERCTRL_RXLOOP_Pos      26           /**< \brief (I2S_SERCTRL) Loop-back Test Mode */
+#define I2S_SERCTRL_RXLOOP          (0x1u << I2S_SERCTRL_RXLOOP_Pos)
+#define I2S_SERCTRL_MASK            0x07FFF7BFu  /**< \brief (I2S_SERCTRL) MASK Register */
+
+/* -------- I2S_DATA : (I2S Offset: 0x30) (R/W 32) Data n -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DATA:32;          /*!< bit:  0..31  Sample Data                        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} I2S_DATA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define I2S_DATA_OFFSET             0x30         /**< \brief (I2S_DATA offset) Data n */
+#define I2S_DATA_RESETVALUE         0x00000000   /**< \brief (I2S_DATA reset_value) Data n */
+
+#define I2S_DATA_DATA_Pos           0            /**< \brief (I2S_DATA) Sample Data */
+#define I2S_DATA_DATA_Msk           (0xFFFFFFFFu << I2S_DATA_DATA_Pos)
+#define I2S_DATA_DATA(value)        ((I2S_DATA_DATA_Msk & ((value) << I2S_DATA_DATA_Pos)))
+#define I2S_DATA_MASK               0xFFFFFFFFu  /**< \brief (I2S_DATA) MASK Register */
+
+/** \brief I2S hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO I2S_CTRLA_Type            CTRLA;       /**< \brief Offset: 0x00 (R/W  8) Control A */
+       RoReg8                    Reserved1[0x3];
+  __IO I2S_CLKCTRL_Type          CLKCTRL[2];  /**< \brief Offset: 0x04 (R/W 32) Clock Unit n Control */
+  __IO I2S_INTENCLR_Type         INTENCLR;    /**< \brief Offset: 0x0C (R/W 16) Interrupt Enable Clear */
+       RoReg8                    Reserved2[0x2];
+  __IO I2S_INTENSET_Type         INTENSET;    /**< \brief Offset: 0x10 (R/W 16) Interrupt Enable Set */
+       RoReg8                    Reserved3[0x2];
+  __IO I2S_INTFLAG_Type          INTFLAG;     /**< \brief Offset: 0x14 (R/W 16) Interrupt Flag Status and Clear */
+       RoReg8                    Reserved4[0x2];
+  __I  I2S_SYNCBUSY_Type         SYNCBUSY;    /**< \brief Offset: 0x18 (R/  16) Synchronization Status */
+       RoReg8                    Reserved5[0x6];
+  __IO I2S_SERCTRL_Type          SERCTRL[2];  /**< \brief Offset: 0x20 (R/W 32) Serializer n Control */
+       RoReg8                    Reserved6[0x8];
+  __IO I2S_DATA_Type             DATA[2];     /**< \brief Offset: 0x30 (R/W 32) Data n */
+} I2s;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_I2S_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/mtb.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/mtb.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/mtb.h	(revision 136)
@@ -0,0 +1,396 @@
+/**
+ * \file
+ *
+ * \brief Component description for MTB
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_MTB_COMPONENT_
+#define _SAMD21_MTB_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR MTB */
+/* ========================================================================== */
+/** \addtogroup SAMD21_MTB Cortex-M0+ Micro-Trace Buffer */
+/*@{*/
+
+#define MTB_U2002
+#define REV_MTB                     0x100
+
+/* -------- MTB_POSITION : (MTB Offset: 0x000) (R/W 32) MTB Position -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint32_t WRAP:1;           /*!< bit:      2  Pointer Value Wraps                */
+    uint32_t POINTER:29;       /*!< bit:  3..31  Trace Packet Location Pointer      */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_POSITION_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_POSITION_OFFSET         0x000        /**< \brief (MTB_POSITION offset) MTB Position */
+
+#define MTB_POSITION_WRAP_Pos       2            /**< \brief (MTB_POSITION) Pointer Value Wraps */
+#define MTB_POSITION_WRAP           (0x1u << MTB_POSITION_WRAP_Pos)
+#define MTB_POSITION_POINTER_Pos    3            /**< \brief (MTB_POSITION) Trace Packet Location Pointer */
+#define MTB_POSITION_POINTER_Msk    (0x1FFFFFFFu << MTB_POSITION_POINTER_Pos)
+#define MTB_POSITION_POINTER(value) ((MTB_POSITION_POINTER_Msk & ((value) << MTB_POSITION_POINTER_Pos)))
+#define MTB_POSITION_MASK           0xFFFFFFFCu  /**< \brief (MTB_POSITION) MASK Register */
+
+/* -------- MTB_MASTER : (MTB Offset: 0x004) (R/W 32) MTB Master -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t MASK:5;           /*!< bit:  0.. 4  Maximum Value of the Trace Buffer in SRAM */
+    uint32_t TSTARTEN:1;       /*!< bit:      5  Trace Start Input Enable           */
+    uint32_t TSTOPEN:1;        /*!< bit:      6  Trace Stop Input Enable            */
+    uint32_t SFRWPRIV:1;       /*!< bit:      7  Special Function Register Write Privilege */
+    uint32_t RAMPRIV:1;        /*!< bit:      8  SRAM Privilege                     */
+    uint32_t HALTREQ:1;        /*!< bit:      9  Halt Request                       */
+    uint32_t :21;              /*!< bit: 10..30  Reserved                           */
+    uint32_t EN:1;             /*!< bit:     31  Main Trace Enable                  */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_MASTER_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_MASTER_OFFSET           0x004        /**< \brief (MTB_MASTER offset) MTB Master */
+#define MTB_MASTER_RESETVALUE       0x00000000   /**< \brief (MTB_MASTER reset_value) MTB Master */
+
+#define MTB_MASTER_MASK_Pos         0            /**< \brief (MTB_MASTER) Maximum Value of the Trace Buffer in SRAM */
+#define MTB_MASTER_MASK_Msk         (0x1Fu << MTB_MASTER_MASK_Pos)
+#define MTB_MASTER_MASK(value)      ((MTB_MASTER_MASK_Msk & ((value) << MTB_MASTER_MASK_Pos)))
+#define MTB_MASTER_TSTARTEN_Pos     5            /**< \brief (MTB_MASTER) Trace Start Input Enable */
+#define MTB_MASTER_TSTARTEN         (0x1u << MTB_MASTER_TSTARTEN_Pos)
+#define MTB_MASTER_TSTOPEN_Pos      6            /**< \brief (MTB_MASTER) Trace Stop Input Enable */
+#define MTB_MASTER_TSTOPEN          (0x1u << MTB_MASTER_TSTOPEN_Pos)
+#define MTB_MASTER_SFRWPRIV_Pos     7            /**< \brief (MTB_MASTER) Special Function Register Write Privilege */
+#define MTB_MASTER_SFRWPRIV         (0x1u << MTB_MASTER_SFRWPRIV_Pos)
+#define MTB_MASTER_RAMPRIV_Pos      8            /**< \brief (MTB_MASTER) SRAM Privilege */
+#define MTB_MASTER_RAMPRIV          (0x1u << MTB_MASTER_RAMPRIV_Pos)
+#define MTB_MASTER_HALTREQ_Pos      9            /**< \brief (MTB_MASTER) Halt Request */
+#define MTB_MASTER_HALTREQ          (0x1u << MTB_MASTER_HALTREQ_Pos)
+#define MTB_MASTER_EN_Pos           31           /**< \brief (MTB_MASTER) Main Trace Enable */
+#define MTB_MASTER_EN               (0x1u << MTB_MASTER_EN_Pos)
+#define MTB_MASTER_MASK_            0x800003FFu  /**< \brief (MTB_MASTER) MASK Register */
+
+/* -------- MTB_FLOW : (MTB Offset: 0x008) (R/W 32) MTB Flow -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t AUTOSTOP:1;       /*!< bit:      0  Auto Stop Tracing                  */
+    uint32_t AUTOHALT:1;       /*!< bit:      1  Auto Halt Request                  */
+    uint32_t :1;               /*!< bit:      2  Reserved                           */
+    uint32_t WATERMARK:29;     /*!< bit:  3..31  Watermark value                    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_FLOW_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_FLOW_OFFSET             0x008        /**< \brief (MTB_FLOW offset) MTB Flow */
+#define MTB_FLOW_RESETVALUE         0x00000000   /**< \brief (MTB_FLOW reset_value) MTB Flow */
+
+#define MTB_FLOW_AUTOSTOP_Pos       0            /**< \brief (MTB_FLOW) Auto Stop Tracing */
+#define MTB_FLOW_AUTOSTOP           (0x1u << MTB_FLOW_AUTOSTOP_Pos)
+#define MTB_FLOW_AUTOHALT_Pos       1            /**< \brief (MTB_FLOW) Auto Halt Request */
+#define MTB_FLOW_AUTOHALT           (0x1u << MTB_FLOW_AUTOHALT_Pos)
+#define MTB_FLOW_WATERMARK_Pos      3            /**< \brief (MTB_FLOW) Watermark value */
+#define MTB_FLOW_WATERMARK_Msk      (0x1FFFFFFFu << MTB_FLOW_WATERMARK_Pos)
+#define MTB_FLOW_WATERMARK(value)   ((MTB_FLOW_WATERMARK_Msk & ((value) << MTB_FLOW_WATERMARK_Pos)))
+#define MTB_FLOW_MASK               0xFFFFFFFBu  /**< \brief (MTB_FLOW) MASK Register */
+
+/* -------- MTB_BASE : (MTB Offset: 0x00C) (R/  32) MTB Base -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_BASE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_BASE_OFFSET             0x00C        /**< \brief (MTB_BASE offset) MTB Base */
+#define MTB_BASE_MASK               0xFFFFFFFFu  /**< \brief (MTB_BASE) MASK Register */
+
+/* -------- MTB_ITCTRL : (MTB Offset: 0xF00) (R/W 32) MTB Integration Mode Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_ITCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_ITCTRL_OFFSET           0xF00        /**< \brief (MTB_ITCTRL offset) MTB Integration Mode Control */
+#define MTB_ITCTRL_MASK             0xFFFFFFFFu  /**< \brief (MTB_ITCTRL) MASK Register */
+
+/* -------- MTB_CLAIMSET : (MTB Offset: 0xFA0) (R/W 32) MTB Claim Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_CLAIMSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_CLAIMSET_OFFSET         0xFA0        /**< \brief (MTB_CLAIMSET offset) MTB Claim Set */
+#define MTB_CLAIMSET_MASK           0xFFFFFFFFu  /**< \brief (MTB_CLAIMSET) MASK Register */
+
+/* -------- MTB_CLAIMCLR : (MTB Offset: 0xFA4) (R/W 32) MTB Claim Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_CLAIMCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_CLAIMCLR_OFFSET         0xFA4        /**< \brief (MTB_CLAIMCLR offset) MTB Claim Clear */
+#define MTB_CLAIMCLR_MASK           0xFFFFFFFFu  /**< \brief (MTB_CLAIMCLR) MASK Register */
+
+/* -------- MTB_LOCKACCESS : (MTB Offset: 0xFB0) (R/W 32) MTB Lock Access -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_LOCKACCESS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_LOCKACCESS_OFFSET       0xFB0        /**< \brief (MTB_LOCKACCESS offset) MTB Lock Access */
+#define MTB_LOCKACCESS_MASK         0xFFFFFFFFu  /**< \brief (MTB_LOCKACCESS) MASK Register */
+
+/* -------- MTB_LOCKSTATUS : (MTB Offset: 0xFB4) (R/  32) MTB Lock Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_LOCKSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_LOCKSTATUS_OFFSET       0xFB4        /**< \brief (MTB_LOCKSTATUS offset) MTB Lock Status */
+#define MTB_LOCKSTATUS_MASK         0xFFFFFFFFu  /**< \brief (MTB_LOCKSTATUS) MASK Register */
+
+/* -------- MTB_AUTHSTATUS : (MTB Offset: 0xFB8) (R/  32) MTB Authentication Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_AUTHSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_AUTHSTATUS_OFFSET       0xFB8        /**< \brief (MTB_AUTHSTATUS offset) MTB Authentication Status */
+#define MTB_AUTHSTATUS_MASK         0xFFFFFFFFu  /**< \brief (MTB_AUTHSTATUS) MASK Register */
+
+/* -------- MTB_DEVARCH : (MTB Offset: 0xFBC) (R/  32) MTB Device Architecture -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_DEVARCH_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_DEVARCH_OFFSET          0xFBC        /**< \brief (MTB_DEVARCH offset) MTB Device Architecture */
+#define MTB_DEVARCH_MASK            0xFFFFFFFFu  /**< \brief (MTB_DEVARCH) MASK Register */
+
+/* -------- MTB_DEVID : (MTB Offset: 0xFC8) (R/  32) MTB Device Configuration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_DEVID_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_DEVID_OFFSET            0xFC8        /**< \brief (MTB_DEVID offset) MTB Device Configuration */
+#define MTB_DEVID_MASK              0xFFFFFFFFu  /**< \brief (MTB_DEVID) MASK Register */
+
+/* -------- MTB_DEVTYPE : (MTB Offset: 0xFCC) (R/  32) MTB Device Type -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_DEVTYPE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_DEVTYPE_OFFSET          0xFCC        /**< \brief (MTB_DEVTYPE offset) MTB Device Type */
+#define MTB_DEVTYPE_MASK            0xFFFFFFFFu  /**< \brief (MTB_DEVTYPE) MASK Register */
+
+/* -------- MTB_PID4 : (MTB Offset: 0xFD0) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_PID4_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_PID4_OFFSET             0xFD0        /**< \brief (MTB_PID4 offset) CoreSight */
+#define MTB_PID4_MASK               0xFFFFFFFFu  /**< \brief (MTB_PID4) MASK Register */
+
+/* -------- MTB_PID5 : (MTB Offset: 0xFD4) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_PID5_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_PID5_OFFSET             0xFD4        /**< \brief (MTB_PID5 offset) CoreSight */
+#define MTB_PID5_MASK               0xFFFFFFFFu  /**< \brief (MTB_PID5) MASK Register */
+
+/* -------- MTB_PID6 : (MTB Offset: 0xFD8) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_PID6_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_PID6_OFFSET             0xFD8        /**< \brief (MTB_PID6 offset) CoreSight */
+#define MTB_PID6_MASK               0xFFFFFFFFu  /**< \brief (MTB_PID6) MASK Register */
+
+/* -------- MTB_PID7 : (MTB Offset: 0xFDC) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_PID7_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_PID7_OFFSET             0xFDC        /**< \brief (MTB_PID7 offset) CoreSight */
+#define MTB_PID7_MASK               0xFFFFFFFFu  /**< \brief (MTB_PID7) MASK Register */
+
+/* -------- MTB_PID0 : (MTB Offset: 0xFE0) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_PID0_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_PID0_OFFSET             0xFE0        /**< \brief (MTB_PID0 offset) CoreSight */
+#define MTB_PID0_MASK               0xFFFFFFFFu  /**< \brief (MTB_PID0) MASK Register */
+
+/* -------- MTB_PID1 : (MTB Offset: 0xFE4) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_PID1_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_PID1_OFFSET             0xFE4        /**< \brief (MTB_PID1 offset) CoreSight */
+#define MTB_PID1_MASK               0xFFFFFFFFu  /**< \brief (MTB_PID1) MASK Register */
+
+/* -------- MTB_PID2 : (MTB Offset: 0xFE8) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_PID2_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_PID2_OFFSET             0xFE8        /**< \brief (MTB_PID2 offset) CoreSight */
+#define MTB_PID2_MASK               0xFFFFFFFFu  /**< \brief (MTB_PID2) MASK Register */
+
+/* -------- MTB_PID3 : (MTB Offset: 0xFEC) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_PID3_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_PID3_OFFSET             0xFEC        /**< \brief (MTB_PID3 offset) CoreSight */
+#define MTB_PID3_MASK               0xFFFFFFFFu  /**< \brief (MTB_PID3) MASK Register */
+
+/* -------- MTB_CID0 : (MTB Offset: 0xFF0) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_CID0_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_CID0_OFFSET             0xFF0        /**< \brief (MTB_CID0 offset) CoreSight */
+#define MTB_CID0_MASK               0xFFFFFFFFu  /**< \brief (MTB_CID0) MASK Register */
+
+/* -------- MTB_CID1 : (MTB Offset: 0xFF4) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_CID1_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_CID1_OFFSET             0xFF4        /**< \brief (MTB_CID1 offset) CoreSight */
+#define MTB_CID1_MASK               0xFFFFFFFFu  /**< \brief (MTB_CID1) MASK Register */
+
+/* -------- MTB_CID2 : (MTB Offset: 0xFF8) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_CID2_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_CID2_OFFSET             0xFF8        /**< \brief (MTB_CID2 offset) CoreSight */
+#define MTB_CID2_MASK               0xFFFFFFFFu  /**< \brief (MTB_CID2) MASK Register */
+
+/* -------- MTB_CID3 : (MTB Offset: 0xFFC) (R/  32) CoreSight -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint32_t reg;                /*!< Type      used for register access              */
+} MTB_CID3_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define MTB_CID3_OFFSET             0xFFC        /**< \brief (MTB_CID3 offset) CoreSight */
+#define MTB_CID3_MASK               0xFFFFFFFFu  /**< \brief (MTB_CID3) MASK Register */
+
+/** \brief MTB hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO MTB_POSITION_Type         POSITION;    /**< \brief Offset: 0x000 (R/W 32) MTB Position */
+  __IO MTB_MASTER_Type           MASTER;      /**< \brief Offset: 0x004 (R/W 32) MTB Master */
+  __IO MTB_FLOW_Type             FLOW;        /**< \brief Offset: 0x008 (R/W 32) MTB Flow */
+  __I  MTB_BASE_Type             BASE;        /**< \brief Offset: 0x00C (R/  32) MTB Base */
+       RoReg8                    Reserved1[0xEF0];
+  __IO MTB_ITCTRL_Type           ITCTRL;      /**< \brief Offset: 0xF00 (R/W 32) MTB Integration Mode Control */
+       RoReg8                    Reserved2[0x9C];
+  __IO MTB_CLAIMSET_Type         CLAIMSET;    /**< \brief Offset: 0xFA0 (R/W 32) MTB Claim Set */
+  __IO MTB_CLAIMCLR_Type         CLAIMCLR;    /**< \brief Offset: 0xFA4 (R/W 32) MTB Claim Clear */
+       RoReg8                    Reserved3[0x8];
+  __IO MTB_LOCKACCESS_Type       LOCKACCESS;  /**< \brief Offset: 0xFB0 (R/W 32) MTB Lock Access */
+  __I  MTB_LOCKSTATUS_Type       LOCKSTATUS;  /**< \brief Offset: 0xFB4 (R/  32) MTB Lock Status */
+  __I  MTB_AUTHSTATUS_Type       AUTHSTATUS;  /**< \brief Offset: 0xFB8 (R/  32) MTB Authentication Status */
+  __I  MTB_DEVARCH_Type          DEVARCH;     /**< \brief Offset: 0xFBC (R/  32) MTB Device Architecture */
+       RoReg8                    Reserved4[0x8];
+  __I  MTB_DEVID_Type            DEVID;       /**< \brief Offset: 0xFC8 (R/  32) MTB Device Configuration */
+  __I  MTB_DEVTYPE_Type          DEVTYPE;     /**< \brief Offset: 0xFCC (R/  32) MTB Device Type */
+  __I  MTB_PID4_Type             PID4;        /**< \brief Offset: 0xFD0 (R/  32) CoreSight */
+  __I  MTB_PID5_Type             PID5;        /**< \brief Offset: 0xFD4 (R/  32) CoreSight */
+  __I  MTB_PID6_Type             PID6;        /**< \brief Offset: 0xFD8 (R/  32) CoreSight */
+  __I  MTB_PID7_Type             PID7;        /**< \brief Offset: 0xFDC (R/  32) CoreSight */
+  __I  MTB_PID0_Type             PID0;        /**< \brief Offset: 0xFE0 (R/  32) CoreSight */
+  __I  MTB_PID1_Type             PID1;        /**< \brief Offset: 0xFE4 (R/  32) CoreSight */
+  __I  MTB_PID2_Type             PID2;        /**< \brief Offset: 0xFE8 (R/  32) CoreSight */
+  __I  MTB_PID3_Type             PID3;        /**< \brief Offset: 0xFEC (R/  32) CoreSight */
+  __I  MTB_CID0_Type             CID0;        /**< \brief Offset: 0xFF0 (R/  32) CoreSight */
+  __I  MTB_CID1_Type             CID1;        /**< \brief Offset: 0xFF4 (R/  32) CoreSight */
+  __I  MTB_CID2_Type             CID2;        /**< \brief Offset: 0xFF8 (R/  32) CoreSight */
+  __I  MTB_CID3_Type             CID3;        /**< \brief Offset: 0xFFC (R/  32) CoreSight */
+} Mtb;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_MTB_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/nvmctrl.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/nvmctrl.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/nvmctrl.h	(revision 136)
@@ -0,0 +1,530 @@
+/**
+ * \file
+ *
+ * \brief Component description for NVMCTRL
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_NVMCTRL_COMPONENT_
+#define _SAMD21_NVMCTRL_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR NVMCTRL */
+/* ========================================================================== */
+/** \addtogroup SAMD21_NVMCTRL Non-Volatile Memory Controller */
+/*@{*/
+
+#define NVMCTRL_U2207
+#define REV_NVMCTRL                 0x106
+
+/* -------- NVMCTRL_CTRLA : (NVMCTRL Offset: 0x00) (R/W 16) Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t CMD:7;            /*!< bit:  0.. 6  Command                            */
+    uint16_t :1;               /*!< bit:      7  Reserved                           */
+    uint16_t CMDEX:8;          /*!< bit:  8..15  Command Execution                  */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} NVMCTRL_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define NVMCTRL_CTRLA_OFFSET        0x00         /**< \brief (NVMCTRL_CTRLA offset) Control A */
+#define NVMCTRL_CTRLA_RESETVALUE    0x0000       /**< \brief (NVMCTRL_CTRLA reset_value) Control A */
+
+#define NVMCTRL_CTRLA_CMD_Pos       0            /**< \brief (NVMCTRL_CTRLA) Command */
+#define NVMCTRL_CTRLA_CMD_Msk       (0x7Fu << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD(value)    ((NVMCTRL_CTRLA_CMD_Msk & ((value) << NVMCTRL_CTRLA_CMD_Pos)))
+#define   NVMCTRL_CTRLA_CMD_ER_Val        0x2u   /**< \brief (NVMCTRL_CTRLA) Erase Row - Erases the row addressed by the ADDR register. */
+#define   NVMCTRL_CTRLA_CMD_WP_Val        0x4u   /**< \brief (NVMCTRL_CTRLA) Write Page - Writes the contents of the page buffer to the page addressed by the ADDR register. */
+#define   NVMCTRL_CTRLA_CMD_EAR_Val       0x5u   /**< \brief (NVMCTRL_CTRLA) Erase Auxiliary Row - Erases the auxiliary row addressed by the ADDR register. This command can be given only when the security bit is not set and only to the user configuration row. */
+#define   NVMCTRL_CTRLA_CMD_WAP_Val       0x6u   /**< \brief (NVMCTRL_CTRLA) Write Auxiliary Page - Writes the contents of the page buffer to the page addressed by the ADDR register. This command can be given only when the security bit is not set and only to the user configuration row. */
+#define   NVMCTRL_CTRLA_CMD_SF_Val        0xAu   /**< \brief (NVMCTRL_CTRLA) Security Flow Command */
+#define   NVMCTRL_CTRLA_CMD_WL_Val        0xFu   /**< \brief (NVMCTRL_CTRLA) Write lockbits */
+#define   NVMCTRL_CTRLA_CMD_LR_Val        0x40u   /**< \brief (NVMCTRL_CTRLA) Lock Region - Locks the region containing the address location in the ADDR register. */
+#define   NVMCTRL_CTRLA_CMD_UR_Val        0x41u   /**< \brief (NVMCTRL_CTRLA) Unlock Region - Unlocks the region containing the address location in the ADDR register. */
+#define   NVMCTRL_CTRLA_CMD_SPRM_Val      0x42u   /**< \brief (NVMCTRL_CTRLA) Sets the power reduction mode. */
+#define   NVMCTRL_CTRLA_CMD_CPRM_Val      0x43u   /**< \brief (NVMCTRL_CTRLA) Clears the power reduction mode. */
+#define   NVMCTRL_CTRLA_CMD_PBC_Val       0x44u   /**< \brief (NVMCTRL_CTRLA) Page Buffer Clear - Clears the page buffer. */
+#define   NVMCTRL_CTRLA_CMD_SSB_Val       0x45u   /**< \brief (NVMCTRL_CTRLA) Set Security Bit - Sets the security bit by writing 0x00 to the first byte in the lockbit row. */
+#define   NVMCTRL_CTRLA_CMD_INVALL_Val    0x46u   /**< \brief (NVMCTRL_CTRLA) Invalidates all cache lines. */
+#define NVMCTRL_CTRLA_CMD_ER        (NVMCTRL_CTRLA_CMD_ER_Val      << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_WP        (NVMCTRL_CTRLA_CMD_WP_Val      << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_EAR       (NVMCTRL_CTRLA_CMD_EAR_Val     << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_WAP       (NVMCTRL_CTRLA_CMD_WAP_Val     << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_SF        (NVMCTRL_CTRLA_CMD_SF_Val      << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_WL        (NVMCTRL_CTRLA_CMD_WL_Val      << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_LR        (NVMCTRL_CTRLA_CMD_LR_Val      << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_UR        (NVMCTRL_CTRLA_CMD_UR_Val      << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_SPRM      (NVMCTRL_CTRLA_CMD_SPRM_Val    << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_CPRM      (NVMCTRL_CTRLA_CMD_CPRM_Val    << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_PBC       (NVMCTRL_CTRLA_CMD_PBC_Val     << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_SSB       (NVMCTRL_CTRLA_CMD_SSB_Val     << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMD_INVALL    (NVMCTRL_CTRLA_CMD_INVALL_Val  << NVMCTRL_CTRLA_CMD_Pos)
+#define NVMCTRL_CTRLA_CMDEX_Pos     8            /**< \brief (NVMCTRL_CTRLA) Command Execution */
+#define NVMCTRL_CTRLA_CMDEX_Msk     (0xFFu << NVMCTRL_CTRLA_CMDEX_Pos)
+#define NVMCTRL_CTRLA_CMDEX(value)  ((NVMCTRL_CTRLA_CMDEX_Msk & ((value) << NVMCTRL_CTRLA_CMDEX_Pos)))
+#define   NVMCTRL_CTRLA_CMDEX_KEY_Val     0xA5u   /**< \brief (NVMCTRL_CTRLA) Execution Key */
+#define NVMCTRL_CTRLA_CMDEX_KEY     (NVMCTRL_CTRLA_CMDEX_KEY_Val   << NVMCTRL_CTRLA_CMDEX_Pos)
+#define NVMCTRL_CTRLA_MASK          0xFF7Fu      /**< \brief (NVMCTRL_CTRLA) MASK Register */
+
+/* -------- NVMCTRL_CTRLB : (NVMCTRL Offset: 0x04) (R/W 32) Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :1;               /*!< bit:      0  Reserved                           */
+    uint32_t RWS:4;            /*!< bit:  1.. 4  NVM Read Wait States               */
+    uint32_t :2;               /*!< bit:  5.. 6  Reserved                           */
+    uint32_t MANW:1;           /*!< bit:      7  Manual Write                       */
+    uint32_t SLEEPPRM:2;       /*!< bit:  8.. 9  Power Reduction Mode during Sleep  */
+    uint32_t :6;               /*!< bit: 10..15  Reserved                           */
+    uint32_t READMODE:2;       /*!< bit: 16..17  NVMCTRL Read Mode                  */
+    uint32_t CACHEDIS:1;       /*!< bit:     18  Cache Disable                      */
+    uint32_t :13;              /*!< bit: 19..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} NVMCTRL_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define NVMCTRL_CTRLB_OFFSET        0x04         /**< \brief (NVMCTRL_CTRLB offset) Control B */
+#define NVMCTRL_CTRLB_RESETVALUE    0x00000000   /**< \brief (NVMCTRL_CTRLB reset_value) Control B */
+
+#define NVMCTRL_CTRLB_RWS_Pos       1            /**< \brief (NVMCTRL_CTRLB) NVM Read Wait States */
+#define NVMCTRL_CTRLB_RWS_Msk       (0xFu << NVMCTRL_CTRLB_RWS_Pos)
+#define NVMCTRL_CTRLB_RWS(value)    ((NVMCTRL_CTRLB_RWS_Msk & ((value) << NVMCTRL_CTRLB_RWS_Pos)))
+#define   NVMCTRL_CTRLB_RWS_SINGLE_Val    0x0u   /**< \brief (NVMCTRL_CTRLB) Single Auto Wait State */
+#define   NVMCTRL_CTRLB_RWS_HALF_Val      0x1u   /**< \brief (NVMCTRL_CTRLB) Half Auto Wait State */
+#define   NVMCTRL_CTRLB_RWS_DUAL_Val      0x2u   /**< \brief (NVMCTRL_CTRLB) Dual Auto Wait State */
+#define NVMCTRL_CTRLB_RWS_SINGLE    (NVMCTRL_CTRLB_RWS_SINGLE_Val  << NVMCTRL_CTRLB_RWS_Pos)
+#define NVMCTRL_CTRLB_RWS_HALF      (NVMCTRL_CTRLB_RWS_HALF_Val    << NVMCTRL_CTRLB_RWS_Pos)
+#define NVMCTRL_CTRLB_RWS_DUAL      (NVMCTRL_CTRLB_RWS_DUAL_Val    << NVMCTRL_CTRLB_RWS_Pos)
+#define NVMCTRL_CTRLB_MANW_Pos      7            /**< \brief (NVMCTRL_CTRLB) Manual Write */
+#define NVMCTRL_CTRLB_MANW          (0x1u << NVMCTRL_CTRLB_MANW_Pos)
+#define NVMCTRL_CTRLB_SLEEPPRM_Pos  8            /**< \brief (NVMCTRL_CTRLB) Power Reduction Mode during Sleep */
+#define NVMCTRL_CTRLB_SLEEPPRM_Msk  (0x3u << NVMCTRL_CTRLB_SLEEPPRM_Pos)
+#define NVMCTRL_CTRLB_SLEEPPRM(value) ((NVMCTRL_CTRLB_SLEEPPRM_Msk & ((value) << NVMCTRL_CTRLB_SLEEPPRM_Pos)))
+#define   NVMCTRL_CTRLB_SLEEPPRM_WAKEONACCESS_Val 0x0u   /**< \brief (NVMCTRL_CTRLB) NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access. */
+#define   NVMCTRL_CTRLB_SLEEPPRM_WAKEUPINSTANT_Val 0x1u   /**< \brief (NVMCTRL_CTRLB) NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep. */
+#define   NVMCTRL_CTRLB_SLEEPPRM_DISABLED_Val 0x3u   /**< \brief (NVMCTRL_CTRLB) Auto power reduction disabled. */
+#define NVMCTRL_CTRLB_SLEEPPRM_WAKEONACCESS (NVMCTRL_CTRLB_SLEEPPRM_WAKEONACCESS_Val << NVMCTRL_CTRLB_SLEEPPRM_Pos)
+#define NVMCTRL_CTRLB_SLEEPPRM_WAKEUPINSTANT (NVMCTRL_CTRLB_SLEEPPRM_WAKEUPINSTANT_Val << NVMCTRL_CTRLB_SLEEPPRM_Pos)
+#define NVMCTRL_CTRLB_SLEEPPRM_DISABLED (NVMCTRL_CTRLB_SLEEPPRM_DISABLED_Val << NVMCTRL_CTRLB_SLEEPPRM_Pos)
+#define NVMCTRL_CTRLB_READMODE_Pos  16           /**< \brief (NVMCTRL_CTRLB) NVMCTRL Read Mode */
+#define NVMCTRL_CTRLB_READMODE_Msk  (0x3u << NVMCTRL_CTRLB_READMODE_Pos)
+#define NVMCTRL_CTRLB_READMODE(value) ((NVMCTRL_CTRLB_READMODE_Msk & ((value) << NVMCTRL_CTRLB_READMODE_Pos)))
+#define   NVMCTRL_CTRLB_READMODE_NO_MISS_PENALTY_Val 0x0u   /**< \brief (NVMCTRL_CTRLB) The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance. */
+#define   NVMCTRL_CTRLB_READMODE_LOW_POWER_Val 0x1u   /**< \brief (NVMCTRL_CTRLB) Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time. */
+#define   NVMCTRL_CTRLB_READMODE_DETERMINISTIC_Val 0x2u   /**< \brief (NVMCTRL_CTRLB) The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings. */
+#define NVMCTRL_CTRLB_READMODE_NO_MISS_PENALTY (NVMCTRL_CTRLB_READMODE_NO_MISS_PENALTY_Val << NVMCTRL_CTRLB_READMODE_Pos)
+#define NVMCTRL_CTRLB_READMODE_LOW_POWER (NVMCTRL_CTRLB_READMODE_LOW_POWER_Val << NVMCTRL_CTRLB_READMODE_Pos)
+#define NVMCTRL_CTRLB_READMODE_DETERMINISTIC (NVMCTRL_CTRLB_READMODE_DETERMINISTIC_Val << NVMCTRL_CTRLB_READMODE_Pos)
+#define NVMCTRL_CTRLB_CACHEDIS_Pos  18           /**< \brief (NVMCTRL_CTRLB) Cache Disable */
+#define NVMCTRL_CTRLB_CACHEDIS      (0x1u << NVMCTRL_CTRLB_CACHEDIS_Pos)
+#define NVMCTRL_CTRLB_MASK          0x0007039Eu  /**< \brief (NVMCTRL_CTRLB) MASK Register */
+
+/* -------- NVMCTRL_PARAM : (NVMCTRL Offset: 0x08) (R/W 32) NVM Parameter -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t NVMP:16;          /*!< bit:  0..15  NVM Pages                          */
+    uint32_t PSZ:3;            /*!< bit: 16..18  Page Size                          */
+    uint32_t :13;              /*!< bit: 19..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} NVMCTRL_PARAM_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define NVMCTRL_PARAM_OFFSET        0x08         /**< \brief (NVMCTRL_PARAM offset) NVM Parameter */
+#define NVMCTRL_PARAM_RESETVALUE    0x00000000   /**< \brief (NVMCTRL_PARAM reset_value) NVM Parameter */
+
+#define NVMCTRL_PARAM_NVMP_Pos      0            /**< \brief (NVMCTRL_PARAM) NVM Pages */
+#define NVMCTRL_PARAM_NVMP_Msk      (0xFFFFu << NVMCTRL_PARAM_NVMP_Pos)
+#define NVMCTRL_PARAM_NVMP(value)   ((NVMCTRL_PARAM_NVMP_Msk & ((value) << NVMCTRL_PARAM_NVMP_Pos)))
+#define NVMCTRL_PARAM_PSZ_Pos       16           /**< \brief (NVMCTRL_PARAM) Page Size */
+#define NVMCTRL_PARAM_PSZ_Msk       (0x7u << NVMCTRL_PARAM_PSZ_Pos)
+#define NVMCTRL_PARAM_PSZ(value)    ((NVMCTRL_PARAM_PSZ_Msk & ((value) << NVMCTRL_PARAM_PSZ_Pos)))
+#define   NVMCTRL_PARAM_PSZ_8_Val         0x0u   /**< \brief (NVMCTRL_PARAM) 8 bytes */
+#define   NVMCTRL_PARAM_PSZ_16_Val        0x1u   /**< \brief (NVMCTRL_PARAM) 16 bytes */
+#define   NVMCTRL_PARAM_PSZ_32_Val        0x2u   /**< \brief (NVMCTRL_PARAM) 32 bytes */
+#define   NVMCTRL_PARAM_PSZ_64_Val        0x3u   /**< \brief (NVMCTRL_PARAM) 64 bytes */
+#define   NVMCTRL_PARAM_PSZ_128_Val       0x4u   /**< \brief (NVMCTRL_PARAM) 128 bytes */
+#define   NVMCTRL_PARAM_PSZ_256_Val       0x5u   /**< \brief (NVMCTRL_PARAM) 256 bytes */
+#define   NVMCTRL_PARAM_PSZ_512_Val       0x6u   /**< \brief (NVMCTRL_PARAM) 512 bytes */
+#define   NVMCTRL_PARAM_PSZ_1024_Val      0x7u   /**< \brief (NVMCTRL_PARAM) 1024 bytes */
+#define NVMCTRL_PARAM_PSZ_8         (NVMCTRL_PARAM_PSZ_8_Val       << NVMCTRL_PARAM_PSZ_Pos)
+#define NVMCTRL_PARAM_PSZ_16        (NVMCTRL_PARAM_PSZ_16_Val      << NVMCTRL_PARAM_PSZ_Pos)
+#define NVMCTRL_PARAM_PSZ_32        (NVMCTRL_PARAM_PSZ_32_Val      << NVMCTRL_PARAM_PSZ_Pos)
+#define NVMCTRL_PARAM_PSZ_64        (NVMCTRL_PARAM_PSZ_64_Val      << NVMCTRL_PARAM_PSZ_Pos)
+#define NVMCTRL_PARAM_PSZ_128       (NVMCTRL_PARAM_PSZ_128_Val     << NVMCTRL_PARAM_PSZ_Pos)
+#define NVMCTRL_PARAM_PSZ_256       (NVMCTRL_PARAM_PSZ_256_Val     << NVMCTRL_PARAM_PSZ_Pos)
+#define NVMCTRL_PARAM_PSZ_512       (NVMCTRL_PARAM_PSZ_512_Val     << NVMCTRL_PARAM_PSZ_Pos)
+#define NVMCTRL_PARAM_PSZ_1024      (NVMCTRL_PARAM_PSZ_1024_Val    << NVMCTRL_PARAM_PSZ_Pos)
+#define NVMCTRL_PARAM_MASK          0x0007FFFFu  /**< \brief (NVMCTRL_PARAM) MASK Register */
+
+/* -------- NVMCTRL_INTENCLR : (NVMCTRL Offset: 0x0C) (R/W  8) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  READY:1;          /*!< bit:      0  NVM Ready Interrupt Enable         */
+    uint8_t  ERROR:1;          /*!< bit:      1  Error Interrupt Enable             */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} NVMCTRL_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define NVMCTRL_INTENCLR_OFFSET     0x0C         /**< \brief (NVMCTRL_INTENCLR offset) Interrupt Enable Clear */
+#define NVMCTRL_INTENCLR_RESETVALUE 0x00         /**< \brief (NVMCTRL_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define NVMCTRL_INTENCLR_READY_Pos  0            /**< \brief (NVMCTRL_INTENCLR) NVM Ready Interrupt Enable */
+#define NVMCTRL_INTENCLR_READY      (0x1u << NVMCTRL_INTENCLR_READY_Pos)
+#define NVMCTRL_INTENCLR_ERROR_Pos  1            /**< \brief (NVMCTRL_INTENCLR) Error Interrupt Enable */
+#define NVMCTRL_INTENCLR_ERROR      (0x1u << NVMCTRL_INTENCLR_ERROR_Pos)
+#define NVMCTRL_INTENCLR_MASK       0x03u        /**< \brief (NVMCTRL_INTENCLR) MASK Register */
+
+/* -------- NVMCTRL_INTENSET : (NVMCTRL Offset: 0x10) (R/W  8) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  READY:1;          /*!< bit:      0  NVM Ready Interrupt Enable         */
+    uint8_t  ERROR:1;          /*!< bit:      1  Error Interrupt Enable             */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} NVMCTRL_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define NVMCTRL_INTENSET_OFFSET     0x10         /**< \brief (NVMCTRL_INTENSET offset) Interrupt Enable Set */
+#define NVMCTRL_INTENSET_RESETVALUE 0x00         /**< \brief (NVMCTRL_INTENSET reset_value) Interrupt Enable Set */
+
+#define NVMCTRL_INTENSET_READY_Pos  0            /**< \brief (NVMCTRL_INTENSET) NVM Ready Interrupt Enable */
+#define NVMCTRL_INTENSET_READY      (0x1u << NVMCTRL_INTENSET_READY_Pos)
+#define NVMCTRL_INTENSET_ERROR_Pos  1            /**< \brief (NVMCTRL_INTENSET) Error Interrupt Enable */
+#define NVMCTRL_INTENSET_ERROR      (0x1u << NVMCTRL_INTENSET_ERROR_Pos)
+#define NVMCTRL_INTENSET_MASK       0x03u        /**< \brief (NVMCTRL_INTENSET) MASK Register */
+
+/* -------- NVMCTRL_INTFLAG : (NVMCTRL Offset: 0x14) (R/W  8) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  READY:1;          /*!< bit:      0  NVM Ready                          */
+    uint8_t  ERROR:1;          /*!< bit:      1  Error                              */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} NVMCTRL_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define NVMCTRL_INTFLAG_OFFSET      0x14         /**< \brief (NVMCTRL_INTFLAG offset) Interrupt Flag Status and Clear */
+#define NVMCTRL_INTFLAG_RESETVALUE  0x00         /**< \brief (NVMCTRL_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define NVMCTRL_INTFLAG_READY_Pos   0            /**< \brief (NVMCTRL_INTFLAG) NVM Ready */
+#define NVMCTRL_INTFLAG_READY       (0x1u << NVMCTRL_INTFLAG_READY_Pos)
+#define NVMCTRL_INTFLAG_ERROR_Pos   1            /**< \brief (NVMCTRL_INTFLAG) Error */
+#define NVMCTRL_INTFLAG_ERROR       (0x1u << NVMCTRL_INTFLAG_ERROR_Pos)
+#define NVMCTRL_INTFLAG_MASK        0x03u        /**< \brief (NVMCTRL_INTFLAG) MASK Register */
+
+/* -------- NVMCTRL_STATUS : (NVMCTRL Offset: 0x18) (R/W 16) Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t PRM:1;            /*!< bit:      0  Power Reduction Mode               */
+    uint16_t LOAD:1;           /*!< bit:      1  NVM Page Buffer Active Loading     */
+    uint16_t PROGE:1;          /*!< bit:      2  Programming Error Status           */
+    uint16_t LOCKE:1;          /*!< bit:      3  Lock Error Status                  */
+    uint16_t NVME:1;           /*!< bit:      4  NVM Error                          */
+    uint16_t :3;               /*!< bit:  5.. 7  Reserved                           */
+    uint16_t SB:1;             /*!< bit:      8  Security Bit Status                */
+    uint16_t :7;               /*!< bit:  9..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} NVMCTRL_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define NVMCTRL_STATUS_OFFSET       0x18         /**< \brief (NVMCTRL_STATUS offset) Status */
+#define NVMCTRL_STATUS_RESETVALUE   0x0000       /**< \brief (NVMCTRL_STATUS reset_value) Status */
+
+#define NVMCTRL_STATUS_PRM_Pos      0            /**< \brief (NVMCTRL_STATUS) Power Reduction Mode */
+#define NVMCTRL_STATUS_PRM          (0x1u << NVMCTRL_STATUS_PRM_Pos)
+#define NVMCTRL_STATUS_LOAD_Pos     1            /**< \brief (NVMCTRL_STATUS) NVM Page Buffer Active Loading */
+#define NVMCTRL_STATUS_LOAD         (0x1u << NVMCTRL_STATUS_LOAD_Pos)
+#define NVMCTRL_STATUS_PROGE_Pos    2            /**< \brief (NVMCTRL_STATUS) Programming Error Status */
+#define NVMCTRL_STATUS_PROGE        (0x1u << NVMCTRL_STATUS_PROGE_Pos)
+#define NVMCTRL_STATUS_LOCKE_Pos    3            /**< \brief (NVMCTRL_STATUS) Lock Error Status */
+#define NVMCTRL_STATUS_LOCKE        (0x1u << NVMCTRL_STATUS_LOCKE_Pos)
+#define NVMCTRL_STATUS_NVME_Pos     4            /**< \brief (NVMCTRL_STATUS) NVM Error */
+#define NVMCTRL_STATUS_NVME         (0x1u << NVMCTRL_STATUS_NVME_Pos)
+#define NVMCTRL_STATUS_SB_Pos       8            /**< \brief (NVMCTRL_STATUS) Security Bit Status */
+#define NVMCTRL_STATUS_SB           (0x1u << NVMCTRL_STATUS_SB_Pos)
+#define NVMCTRL_STATUS_MASK         0x011Fu      /**< \brief (NVMCTRL_STATUS) MASK Register */
+
+/* -------- NVMCTRL_ADDR : (NVMCTRL Offset: 0x1C) (R/W 32) Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t ADDR:22;          /*!< bit:  0..21  NVM Address                        */
+    uint32_t :10;              /*!< bit: 22..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} NVMCTRL_ADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define NVMCTRL_ADDR_OFFSET         0x1C         /**< \brief (NVMCTRL_ADDR offset) Address */
+#define NVMCTRL_ADDR_RESETVALUE     0x00000000   /**< \brief (NVMCTRL_ADDR reset_value) Address */
+
+#define NVMCTRL_ADDR_ADDR_Pos       0            /**< \brief (NVMCTRL_ADDR) NVM Address */
+#define NVMCTRL_ADDR_ADDR_Msk       (0x3FFFFFu << NVMCTRL_ADDR_ADDR_Pos)
+#define NVMCTRL_ADDR_ADDR(value)    ((NVMCTRL_ADDR_ADDR_Msk & ((value) << NVMCTRL_ADDR_ADDR_Pos)))
+#define NVMCTRL_ADDR_MASK           0x003FFFFFu  /**< \brief (NVMCTRL_ADDR) MASK Register */
+
+/* -------- NVMCTRL_LOCK : (NVMCTRL Offset: 0x20) (R/W 16) Lock Section -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t LOCK:16;          /*!< bit:  0..15  Region Lock Bits                   */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} NVMCTRL_LOCK_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define NVMCTRL_LOCK_OFFSET         0x20         /**< \brief (NVMCTRL_LOCK offset) Lock Section */
+
+#define NVMCTRL_LOCK_LOCK_Pos       0            /**< \brief (NVMCTRL_LOCK) Region Lock Bits */
+#define NVMCTRL_LOCK_LOCK_Msk       (0xFFFFu << NVMCTRL_LOCK_LOCK_Pos)
+#define NVMCTRL_LOCK_LOCK(value)    ((NVMCTRL_LOCK_LOCK_Msk & ((value) << NVMCTRL_LOCK_LOCK_Pos)))
+#define NVMCTRL_LOCK_MASK           0xFFFFu      /**< \brief (NVMCTRL_LOCK) MASK Register */
+
+/** \brief NVMCTRL APB hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO NVMCTRL_CTRLA_Type        CTRLA;       /**< \brief Offset: 0x00 (R/W 16) Control A */
+       RoReg8                    Reserved1[0x2];
+  __IO NVMCTRL_CTRLB_Type        CTRLB;       /**< \brief Offset: 0x04 (R/W 32) Control B */
+  __IO NVMCTRL_PARAM_Type        PARAM;       /**< \brief Offset: 0x08 (R/W 32) NVM Parameter */
+  __IO NVMCTRL_INTENCLR_Type     INTENCLR;    /**< \brief Offset: 0x0C (R/W  8) Interrupt Enable Clear */
+       RoReg8                    Reserved2[0x3];
+  __IO NVMCTRL_INTENSET_Type     INTENSET;    /**< \brief Offset: 0x10 (R/W  8) Interrupt Enable Set */
+       RoReg8                    Reserved3[0x3];
+  __IO NVMCTRL_INTFLAG_Type      INTFLAG;     /**< \brief Offset: 0x14 (R/W  8) Interrupt Flag Status and Clear */
+       RoReg8                    Reserved4[0x3];
+  __IO NVMCTRL_STATUS_Type       STATUS;      /**< \brief Offset: 0x18 (R/W 16) Status */
+       RoReg8                    Reserved5[0x2];
+  __IO NVMCTRL_ADDR_Type         ADDR;        /**< \brief Offset: 0x1C (R/W 32) Address */
+  __IO NVMCTRL_LOCK_Type         LOCK;        /**< \brief Offset: 0x20 (R/W 16) Lock Section */
+} Nvmctrl;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#define SECTION_NVMCTRL_CAL
+#define SECTION_NVMCTRL_LOCKBIT
+#define SECTION_NVMCTRL_OTP1
+#define SECTION_NVMCTRL_OTP2
+#define SECTION_NVMCTRL_OTP4
+#define SECTION_NVMCTRL_TEMP_LOG
+#define SECTION_NVMCTRL_USER
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR NON-VOLATILE FUSES */
+/* ************************************************************************** */
+/** \addtogroup fuses_api Peripheral Software API */
+/*@{*/
+
+
+#define ADC_FUSES_BIASCAL_ADDR      (NVMCTRL_OTP4 + 4)
+#define ADC_FUSES_BIASCAL_Pos       3            /**< \brief (NVMCTRL_OTP4) ADC Bias Calibration */
+#define ADC_FUSES_BIASCAL_Msk       (0x7u << ADC_FUSES_BIASCAL_Pos)
+#define ADC_FUSES_BIASCAL(value)    ((ADC_FUSES_BIASCAL_Msk & ((value) << ADC_FUSES_BIASCAL_Pos)))
+
+#define ADC_FUSES_LINEARITY_0_ADDR  NVMCTRL_OTP4
+#define ADC_FUSES_LINEARITY_0_Pos   27           /**< \brief (NVMCTRL_OTP4) ADC Linearity bits 4:0 */
+#define ADC_FUSES_LINEARITY_0_Msk   (0x1Fu << ADC_FUSES_LINEARITY_0_Pos)
+#define ADC_FUSES_LINEARITY_0(value) ((ADC_FUSES_LINEARITY_0_Msk & ((value) << ADC_FUSES_LINEARITY_0_Pos)))
+
+#define ADC_FUSES_LINEARITY_1_ADDR  (NVMCTRL_OTP4 + 4)
+#define ADC_FUSES_LINEARITY_1_Pos   0            /**< \brief (NVMCTRL_OTP4) ADC Linearity bits 7:5 */
+#define ADC_FUSES_LINEARITY_1_Msk   (0x7u << ADC_FUSES_LINEARITY_1_Pos)
+#define ADC_FUSES_LINEARITY_1(value) ((ADC_FUSES_LINEARITY_1_Msk & ((value) << ADC_FUSES_LINEARITY_1_Pos)))
+
+#define NVMCTRL_FUSES_BOOTPROT_ADDR NVMCTRL_USER
+#define NVMCTRL_FUSES_BOOTPROT_Pos  0            /**< \brief (NVMCTRL_USER) Bootloader Size */
+#define NVMCTRL_FUSES_BOOTPROT_Msk  (0x7u << NVMCTRL_FUSES_BOOTPROT_Pos)
+#define NVMCTRL_FUSES_BOOTPROT(value) ((NVMCTRL_FUSES_BOOTPROT_Msk & ((value) << NVMCTRL_FUSES_BOOTPROT_Pos)))
+
+#define NVMCTRL_FUSES_EEPROM_SIZE_ADDR NVMCTRL_USER
+#define NVMCTRL_FUSES_EEPROM_SIZE_Pos 4            /**< \brief (NVMCTRL_USER) EEPROM Size */
+#define NVMCTRL_FUSES_EEPROM_SIZE_Msk (0x7u << NVMCTRL_FUSES_EEPROM_SIZE_Pos)
+#define NVMCTRL_FUSES_EEPROM_SIZE(value) ((NVMCTRL_FUSES_EEPROM_SIZE_Msk & ((value) << NVMCTRL_FUSES_EEPROM_SIZE_Pos)))
+
+#define NVMCTRL_FUSES_HOT_ADC_VAL_ADDR (NVMCTRL_TEMP_LOG + 4)
+#define NVMCTRL_FUSES_HOT_ADC_VAL_Pos 20           /**< \brief (NVMCTRL_TEMP_LOG) 12-bit ADC conversion at hot temperature */
+#define NVMCTRL_FUSES_HOT_ADC_VAL_Msk (0xFFFu << NVMCTRL_FUSES_HOT_ADC_VAL_Pos)
+#define NVMCTRL_FUSES_HOT_ADC_VAL(value) ((NVMCTRL_FUSES_HOT_ADC_VAL_Msk & ((value) << NVMCTRL_FUSES_HOT_ADC_VAL_Pos)))
+
+#define NVMCTRL_FUSES_HOT_INT1V_VAL_ADDR (NVMCTRL_TEMP_LOG + 4)
+#define NVMCTRL_FUSES_HOT_INT1V_VAL_Pos 0            /**< \brief (NVMCTRL_TEMP_LOG) 2's complement of the internal 1V reference drift at hot temperature (versus a 1.0 centered value) */
+#define NVMCTRL_FUSES_HOT_INT1V_VAL_Msk (0xFFu << NVMCTRL_FUSES_HOT_INT1V_VAL_Pos)
+#define NVMCTRL_FUSES_HOT_INT1V_VAL(value) ((NVMCTRL_FUSES_HOT_INT1V_VAL_Msk & ((value) << NVMCTRL_FUSES_HOT_INT1V_VAL_Pos)))
+
+#define NVMCTRL_FUSES_HOT_TEMP_VAL_DEC_ADDR NVMCTRL_TEMP_LOG
+#define NVMCTRL_FUSES_HOT_TEMP_VAL_DEC_Pos 20           /**< \brief (NVMCTRL_TEMP_LOG) Decimal part of hot temperature */
+#define NVMCTRL_FUSES_HOT_TEMP_VAL_DEC_Msk (0xFu << NVMCTRL_FUSES_HOT_TEMP_VAL_DEC_Pos)
+#define NVMCTRL_FUSES_HOT_TEMP_VAL_DEC(value) ((NVMCTRL_FUSES_HOT_TEMP_VAL_DEC_Msk & ((value) << NVMCTRL_FUSES_HOT_TEMP_VAL_DEC_Pos)))
+
+#define NVMCTRL_FUSES_HOT_TEMP_VAL_INT_ADDR NVMCTRL_TEMP_LOG
+#define NVMCTRL_FUSES_HOT_TEMP_VAL_INT_Pos 12           /**< \brief (NVMCTRL_TEMP_LOG) Integer part of hot temperature in oC */
+#define NVMCTRL_FUSES_HOT_TEMP_VAL_INT_Msk (0xFFu << NVMCTRL_FUSES_HOT_TEMP_VAL_INT_Pos)
+#define NVMCTRL_FUSES_HOT_TEMP_VAL_INT(value) ((NVMCTRL_FUSES_HOT_TEMP_VAL_INT_Msk & ((value) << NVMCTRL_FUSES_HOT_TEMP_VAL_INT_Pos)))
+
+#define NVMCTRL_FUSES_NVMP_ADDR     NVMCTRL_OTP1
+#define NVMCTRL_FUSES_NVMP_Pos      16           /**< \brief (NVMCTRL_OTP1) Number of NVM Pages */
+#define NVMCTRL_FUSES_NVMP_Msk      (0xFFFFu << NVMCTRL_FUSES_NVMP_Pos)
+#define NVMCTRL_FUSES_NVMP(value)   ((NVMCTRL_FUSES_NVMP_Msk & ((value) << NVMCTRL_FUSES_NVMP_Pos)))
+
+#define NVMCTRL_FUSES_NVM_LOCK_ADDR NVMCTRL_OTP1
+#define NVMCTRL_FUSES_NVM_LOCK_Pos  0            /**< \brief (NVMCTRL_OTP1) NVM Lock */
+#define NVMCTRL_FUSES_NVM_LOCK_Msk  (0xFFu << NVMCTRL_FUSES_NVM_LOCK_Pos)
+#define NVMCTRL_FUSES_NVM_LOCK(value) ((NVMCTRL_FUSES_NVM_LOCK_Msk & ((value) << NVMCTRL_FUSES_NVM_LOCK_Pos)))
+
+#define NVMCTRL_FUSES_PSZ_ADDR      NVMCTRL_OTP1
+#define NVMCTRL_FUSES_PSZ_Pos       8            /**< \brief (NVMCTRL_OTP1) NVM Page Size */
+#define NVMCTRL_FUSES_PSZ_Msk       (0xFu << NVMCTRL_FUSES_PSZ_Pos)
+#define NVMCTRL_FUSES_PSZ(value)    ((NVMCTRL_FUSES_PSZ_Msk & ((value) << NVMCTRL_FUSES_PSZ_Pos)))
+
+#define NVMCTRL_FUSES_REGION_LOCKS_ADDR (NVMCTRL_USER + 4)
+#define NVMCTRL_FUSES_REGION_LOCKS_Pos 16           /**< \brief (NVMCTRL_USER) NVM Region Locks */
+#define NVMCTRL_FUSES_REGION_LOCKS_Msk (0xFFFFu << NVMCTRL_FUSES_REGION_LOCKS_Pos)
+#define NVMCTRL_FUSES_REGION_LOCKS(value) ((NVMCTRL_FUSES_REGION_LOCKS_Msk & ((value) << NVMCTRL_FUSES_REGION_LOCKS_Pos)))
+
+#define NVMCTRL_FUSES_ROOM_ADC_VAL_ADDR (NVMCTRL_TEMP_LOG + 4)
+#define NVMCTRL_FUSES_ROOM_ADC_VAL_Pos 8            /**< \brief (NVMCTRL_TEMP_LOG) 12-bit ADC conversion at room temperature */
+#define NVMCTRL_FUSES_ROOM_ADC_VAL_Msk (0xFFFu << NVMCTRL_FUSES_ROOM_ADC_VAL_Pos)
+#define NVMCTRL_FUSES_ROOM_ADC_VAL(value) ((NVMCTRL_FUSES_ROOM_ADC_VAL_Msk & ((value) << NVMCTRL_FUSES_ROOM_ADC_VAL_Pos)))
+
+#define NVMCTRL_FUSES_ROOM_INT1V_VAL_ADDR NVMCTRL_TEMP_LOG
+#define NVMCTRL_FUSES_ROOM_INT1V_VAL_Pos 24           /**< \brief (NVMCTRL_TEMP_LOG) 2's complement of the internal 1V reference drift at room temperature (versus a 1.0 centered value) */
+#define NVMCTRL_FUSES_ROOM_INT1V_VAL_Msk (0xFFu << NVMCTRL_FUSES_ROOM_INT1V_VAL_Pos)
+#define NVMCTRL_FUSES_ROOM_INT1V_VAL(value) ((NVMCTRL_FUSES_ROOM_INT1V_VAL_Msk & ((value) << NVMCTRL_FUSES_ROOM_INT1V_VAL_Pos)))
+
+#define NVMCTRL_FUSES_ROOM_TEMP_VAL_DEC_ADDR NVMCTRL_TEMP_LOG
+#define NVMCTRL_FUSES_ROOM_TEMP_VAL_DEC_Pos 8            /**< \brief (NVMCTRL_TEMP_LOG) Decimal part of room temperature */
+#define NVMCTRL_FUSES_ROOM_TEMP_VAL_DEC_Msk (0xFu << NVMCTRL_FUSES_ROOM_TEMP_VAL_DEC_Pos)
+#define NVMCTRL_FUSES_ROOM_TEMP_VAL_DEC(value) ((NVMCTRL_FUSES_ROOM_TEMP_VAL_DEC_Msk & ((value) << NVMCTRL_FUSES_ROOM_TEMP_VAL_DEC_Pos)))
+
+#define NVMCTRL_FUSES_ROOM_TEMP_VAL_INT_ADDR NVMCTRL_TEMP_LOG
+#define NVMCTRL_FUSES_ROOM_TEMP_VAL_INT_Pos 0            /**< \brief (NVMCTRL_TEMP_LOG) Integer part of room temperature in oC */
+#define NVMCTRL_FUSES_ROOM_TEMP_VAL_INT_Msk (0xFFu << NVMCTRL_FUSES_ROOM_TEMP_VAL_INT_Pos)
+#define NVMCTRL_FUSES_ROOM_TEMP_VAL_INT(value) ((NVMCTRL_FUSES_ROOM_TEMP_VAL_INT_Msk & ((value) << NVMCTRL_FUSES_ROOM_TEMP_VAL_INT_Pos)))
+
+#define SYSCTRL_FUSES_BOD33USERLEVEL_ADDR NVMCTRL_USER
+#define SYSCTRL_FUSES_BOD33USERLEVEL_Pos 8            /**< \brief (NVMCTRL_USER) BOD33 User Level */
+#define SYSCTRL_FUSES_BOD33USERLEVEL_Msk (0x3Fu << SYSCTRL_FUSES_BOD33USERLEVEL_Pos)
+#define SYSCTRL_FUSES_BOD33USERLEVEL(value) ((SYSCTRL_FUSES_BOD33USERLEVEL_Msk & ((value) << SYSCTRL_FUSES_BOD33USERLEVEL_Pos)))
+
+#define SYSCTRL_FUSES_BOD33_ACTION_ADDR NVMCTRL_USER
+#define SYSCTRL_FUSES_BOD33_ACTION_Pos 15           /**< \brief (NVMCTRL_USER) BOD33 Action */
+#define SYSCTRL_FUSES_BOD33_ACTION_Msk (0x3u << SYSCTRL_FUSES_BOD33_ACTION_Pos)
+#define SYSCTRL_FUSES_BOD33_ACTION(value) ((SYSCTRL_FUSES_BOD33_ACTION_Msk & ((value) << SYSCTRL_FUSES_BOD33_ACTION_Pos)))
+
+#define SYSCTRL_FUSES_BOD33_EN_ADDR NVMCTRL_USER
+#define SYSCTRL_FUSES_BOD33_EN_Pos  14           /**< \brief (NVMCTRL_USER) BOD33 Enable */
+#define SYSCTRL_FUSES_BOD33_EN_Msk  (0x1u << SYSCTRL_FUSES_BOD33_EN_Pos)
+
+#define SYSCTRL_FUSES_BOD33_HYST_ADDR (NVMCTRL_USER + 4)
+#define SYSCTRL_FUSES_BOD33_HYST_Pos 8            /**< \brief (NVMCTRL_USER) BOD33 Hysteresis */
+#define SYSCTRL_FUSES_BOD33_HYST_Msk (0x1u << SYSCTRL_FUSES_BOD33_HYST_Pos)
+
+#define SYSCTRL_FUSES_DFLL48M_COARSE_CAL_ADDR (NVMCTRL_OTP4 + 4)
+#define SYSCTRL_FUSES_DFLL48M_COARSE_CAL_Pos 26           /**< \brief (NVMCTRL_OTP4) DFLL48M Coarse Calibration */
+#define SYSCTRL_FUSES_DFLL48M_COARSE_CAL_Msk (0x3Fu << SYSCTRL_FUSES_DFLL48M_COARSE_CAL_Pos)
+#define SYSCTRL_FUSES_DFLL48M_COARSE_CAL(value) ((SYSCTRL_FUSES_DFLL48M_COARSE_CAL_Msk & ((value) << SYSCTRL_FUSES_DFLL48M_COARSE_CAL_Pos)))
+
+#define SYSCTRL_FUSES_OSC32K_CAL_ADDR (NVMCTRL_OTP4 + 4)
+#define SYSCTRL_FUSES_OSC32K_CAL_Pos 6            /**< \brief (NVMCTRL_OTP4) OSC32K Calibration */
+#define SYSCTRL_FUSES_OSC32K_CAL_Msk (0x7Fu << SYSCTRL_FUSES_OSC32K_CAL_Pos)
+#define SYSCTRL_FUSES_OSC32K_CAL(value) ((SYSCTRL_FUSES_OSC32K_CAL_Msk & ((value) << SYSCTRL_FUSES_OSC32K_CAL_Pos)))
+
+#define USB_FUSES_TRANSN_ADDR       (NVMCTRL_OTP4 + 4)
+#define USB_FUSES_TRANSN_Pos        13           /**< \brief (NVMCTRL_OTP4) USB pad Transn calibration */
+#define USB_FUSES_TRANSN_Msk        (0x1Fu << USB_FUSES_TRANSN_Pos)
+#define USB_FUSES_TRANSN(value)     ((USB_FUSES_TRANSN_Msk & ((value) << USB_FUSES_TRANSN_Pos)))
+
+#define USB_FUSES_TRANSP_ADDR       (NVMCTRL_OTP4 + 4)
+#define USB_FUSES_TRANSP_Pos        18           /**< \brief (NVMCTRL_OTP4) USB pad Transp calibration */
+#define USB_FUSES_TRANSP_Msk        (0x1Fu << USB_FUSES_TRANSP_Pos)
+#define USB_FUSES_TRANSP(value)     ((USB_FUSES_TRANSP_Msk & ((value) << USB_FUSES_TRANSP_Pos)))
+
+#define USB_FUSES_TRIM_ADDR         (NVMCTRL_OTP4 + 4)
+#define USB_FUSES_TRIM_Pos          23           /**< \brief (NVMCTRL_OTP4) USB pad Trim calibration */
+#define USB_FUSES_TRIM_Msk          (0x7u << USB_FUSES_TRIM_Pos)
+#define USB_FUSES_TRIM(value)       ((USB_FUSES_TRIM_Msk & ((value) << USB_FUSES_TRIM_Pos)))
+
+#define WDT_FUSES_ALWAYSON_ADDR     NVMCTRL_USER
+#define WDT_FUSES_ALWAYSON_Pos      26           /**< \brief (NVMCTRL_USER) WDT Always On */
+#define WDT_FUSES_ALWAYSON_Msk      (0x1u << WDT_FUSES_ALWAYSON_Pos)
+
+#define WDT_FUSES_ENABLE_ADDR       NVMCTRL_USER
+#define WDT_FUSES_ENABLE_Pos        25           /**< \brief (NVMCTRL_USER) WDT Enable */
+#define WDT_FUSES_ENABLE_Msk        (0x1u << WDT_FUSES_ENABLE_Pos)
+
+#define WDT_FUSES_EWOFFSET_ADDR     (NVMCTRL_USER + 4)
+#define WDT_FUSES_EWOFFSET_Pos      3            /**< \brief (NVMCTRL_USER) WDT Early Warning Offset */
+#define WDT_FUSES_EWOFFSET_Msk      (0xFu << WDT_FUSES_EWOFFSET_Pos)
+#define WDT_FUSES_EWOFFSET(value)   ((WDT_FUSES_EWOFFSET_Msk & ((value) << WDT_FUSES_EWOFFSET_Pos)))
+
+#define WDT_FUSES_PER_ADDR          NVMCTRL_USER
+#define WDT_FUSES_PER_Pos           27           /**< \brief (NVMCTRL_USER) WDT Period */
+#define WDT_FUSES_PER_Msk           (0xFu << WDT_FUSES_PER_Pos)
+#define WDT_FUSES_PER(value)        ((WDT_FUSES_PER_Msk & ((value) << WDT_FUSES_PER_Pos)))
+
+#define WDT_FUSES_WEN_ADDR          (NVMCTRL_USER + 4)
+#define WDT_FUSES_WEN_Pos           7            /**< \brief (NVMCTRL_USER) WDT Window Mode Enable */
+#define WDT_FUSES_WEN_Msk           (0x1u << WDT_FUSES_WEN_Pos)
+
+#define WDT_FUSES_WINDOW_0_ADDR     NVMCTRL_USER
+#define WDT_FUSES_WINDOW_0_Pos      31           /**< \brief (NVMCTRL_USER) WDT Window bit 0 */
+#define WDT_FUSES_WINDOW_0_Msk      (0x1u << WDT_FUSES_WINDOW_0_Pos)
+
+#define WDT_FUSES_WINDOW_1_ADDR     (NVMCTRL_USER + 4)
+#define WDT_FUSES_WINDOW_1_Pos      0            /**< \brief (NVMCTRL_USER) WDT Window bits 3:1 */
+#define WDT_FUSES_WINDOW_1_Msk      (0x7u << WDT_FUSES_WINDOW_1_Pos)
+#define WDT_FUSES_WINDOW_1(value)   ((WDT_FUSES_WINDOW_1_Msk & ((value) << WDT_FUSES_WINDOW_1_Pos)))
+
+/*@}*/
+
+#endif /* _SAMD21_NVMCTRL_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/pac.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/pac.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/pac.h	(revision 136)
@@ -0,0 +1,104 @@
+/**
+ * \file
+ *
+ * \brief Component description for PAC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_PAC_COMPONENT_
+#define _SAMD21_PAC_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR PAC */
+/* ========================================================================== */
+/** \addtogroup SAMD21_PAC Peripheral Access Controller */
+/*@{*/
+
+#define PAC_U2211
+#define REV_PAC                     0x101
+
+/* -------- PAC_WPCLR : (PAC Offset: 0x0) (R/W 32) Write Protection Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :1;               /*!< bit:      0  Reserved                           */
+    uint32_t WP:31;            /*!< bit:  1..31  Write Protection Clear             */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PAC_WPCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PAC_WPCLR_OFFSET            0x0          /**< \brief (PAC_WPCLR offset) Write Protection Clear */
+#define PAC_WPCLR_RESETVALUE        0x00000000   /**< \brief (PAC_WPCLR reset_value) Write Protection Clear */
+
+#define PAC_WPCLR_WP_Pos            1            /**< \brief (PAC_WPCLR) Write Protection Clear */
+#define PAC_WPCLR_WP_Msk            (0x7FFFFFFFu << PAC_WPCLR_WP_Pos)
+#define PAC_WPCLR_WP(value)         ((PAC_WPCLR_WP_Msk & ((value) << PAC_WPCLR_WP_Pos)))
+#define PAC_WPCLR_MASK              0xFFFFFFFEu  /**< \brief (PAC_WPCLR) MASK Register */
+
+/* -------- PAC_WPSET : (PAC Offset: 0x4) (R/W 32) Write Protection Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :1;               /*!< bit:      0  Reserved                           */
+    uint32_t WP:31;            /*!< bit:  1..31  Write Protection Set               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PAC_WPSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PAC_WPSET_OFFSET            0x4          /**< \brief (PAC_WPSET offset) Write Protection Set */
+#define PAC_WPSET_RESETVALUE        0x00000000   /**< \brief (PAC_WPSET reset_value) Write Protection Set */
+
+#define PAC_WPSET_WP_Pos            1            /**< \brief (PAC_WPSET) Write Protection Set */
+#define PAC_WPSET_WP_Msk            (0x7FFFFFFFu << PAC_WPSET_WP_Pos)
+#define PAC_WPSET_WP(value)         ((PAC_WPSET_WP_Msk & ((value) << PAC_WPSET_WP_Pos)))
+#define PAC_WPSET_MASK              0xFFFFFFFEu  /**< \brief (PAC_WPSET) MASK Register */
+
+/** \brief PAC hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO PAC_WPCLR_Type            WPCLR;       /**< \brief Offset: 0x0 (R/W 32) Write Protection Clear */
+  __IO PAC_WPSET_Type            WPSET;       /**< \brief Offset: 0x4 (R/W 32) Write Protection Set */
+} Pac;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_PAC_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/pm.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/pm.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/pm.h	(revision 136)
@@ -0,0 +1,530 @@
+/**
+ * \file
+ *
+ * \brief Component description for PM
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_PM_COMPONENT_
+#define _SAMD21_PM_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR PM */
+/* ========================================================================== */
+/** \addtogroup SAMD21_PM Power Manager */
+/*@{*/
+
+#define PM_U2206
+#define REV_PM                      0x201
+
+/* -------- PM_CTRL : (PM Offset: 0x00) (R/W  8) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_CTRL_OFFSET              0x00         /**< \brief (PM_CTRL offset) Control */
+#define PM_CTRL_RESETVALUE          0x00         /**< \brief (PM_CTRL reset_value) Control */
+
+#define PM_CTRL_MASK                0x00u        /**< \brief (PM_CTRL) MASK Register */
+
+/* -------- PM_SLEEP : (PM Offset: 0x01) (R/W  8) Sleep Mode -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  IDLE:2;           /*!< bit:  0.. 1  Idle Mode Configuration            */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_SLEEP_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_SLEEP_OFFSET             0x01         /**< \brief (PM_SLEEP offset) Sleep Mode */
+#define PM_SLEEP_RESETVALUE         0x00         /**< \brief (PM_SLEEP reset_value) Sleep Mode */
+
+#define PM_SLEEP_IDLE_Pos           0            /**< \brief (PM_SLEEP) Idle Mode Configuration */
+#define PM_SLEEP_IDLE_Msk           (0x3u << PM_SLEEP_IDLE_Pos)
+#define PM_SLEEP_IDLE(value)        ((PM_SLEEP_IDLE_Msk & ((value) << PM_SLEEP_IDLE_Pos)))
+#define   PM_SLEEP_IDLE_CPU_Val           0x0u   /**< \brief (PM_SLEEP) The CPU clock domain is stopped */
+#define   PM_SLEEP_IDLE_AHB_Val           0x1u   /**< \brief (PM_SLEEP) The CPU and AHB clock domains are stopped */
+#define   PM_SLEEP_IDLE_APB_Val           0x2u   /**< \brief (PM_SLEEP) The CPU, AHB and APB clock domains are stopped */
+#define PM_SLEEP_IDLE_CPU           (PM_SLEEP_IDLE_CPU_Val         << PM_SLEEP_IDLE_Pos)
+#define PM_SLEEP_IDLE_AHB           (PM_SLEEP_IDLE_AHB_Val         << PM_SLEEP_IDLE_Pos)
+#define PM_SLEEP_IDLE_APB           (PM_SLEEP_IDLE_APB_Val         << PM_SLEEP_IDLE_Pos)
+#define PM_SLEEP_MASK               0x03u        /**< \brief (PM_SLEEP) MASK Register */
+
+/* -------- PM_CPUSEL : (PM Offset: 0x08) (R/W  8) CPU Clock Select -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CPUDIV:3;         /*!< bit:  0.. 2  CPU Prescaler Selection            */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_CPUSEL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_CPUSEL_OFFSET            0x08         /**< \brief (PM_CPUSEL offset) CPU Clock Select */
+#define PM_CPUSEL_RESETVALUE        0x00         /**< \brief (PM_CPUSEL reset_value) CPU Clock Select */
+
+#define PM_CPUSEL_CPUDIV_Pos        0            /**< \brief (PM_CPUSEL) CPU Prescaler Selection */
+#define PM_CPUSEL_CPUDIV_Msk        (0x7u << PM_CPUSEL_CPUDIV_Pos)
+#define PM_CPUSEL_CPUDIV(value)     ((PM_CPUSEL_CPUDIV_Msk & ((value) << PM_CPUSEL_CPUDIV_Pos)))
+#define   PM_CPUSEL_CPUDIV_DIV1_Val       0x0u   /**< \brief (PM_CPUSEL) Divide by 1 */
+#define   PM_CPUSEL_CPUDIV_DIV2_Val       0x1u   /**< \brief (PM_CPUSEL) Divide by 2 */
+#define   PM_CPUSEL_CPUDIV_DIV4_Val       0x2u   /**< \brief (PM_CPUSEL) Divide by 4 */
+#define   PM_CPUSEL_CPUDIV_DIV8_Val       0x3u   /**< \brief (PM_CPUSEL) Divide by 8 */
+#define   PM_CPUSEL_CPUDIV_DIV16_Val      0x4u   /**< \brief (PM_CPUSEL) Divide by 16 */
+#define   PM_CPUSEL_CPUDIV_DIV32_Val      0x5u   /**< \brief (PM_CPUSEL) Divide by 32 */
+#define   PM_CPUSEL_CPUDIV_DIV64_Val      0x6u   /**< \brief (PM_CPUSEL) Divide by 64 */
+#define   PM_CPUSEL_CPUDIV_DIV128_Val     0x7u   /**< \brief (PM_CPUSEL) Divide by 128 */
+#define PM_CPUSEL_CPUDIV_DIV1       (PM_CPUSEL_CPUDIV_DIV1_Val     << PM_CPUSEL_CPUDIV_Pos)
+#define PM_CPUSEL_CPUDIV_DIV2       (PM_CPUSEL_CPUDIV_DIV2_Val     << PM_CPUSEL_CPUDIV_Pos)
+#define PM_CPUSEL_CPUDIV_DIV4       (PM_CPUSEL_CPUDIV_DIV4_Val     << PM_CPUSEL_CPUDIV_Pos)
+#define PM_CPUSEL_CPUDIV_DIV8       (PM_CPUSEL_CPUDIV_DIV8_Val     << PM_CPUSEL_CPUDIV_Pos)
+#define PM_CPUSEL_CPUDIV_DIV16      (PM_CPUSEL_CPUDIV_DIV16_Val    << PM_CPUSEL_CPUDIV_Pos)
+#define PM_CPUSEL_CPUDIV_DIV32      (PM_CPUSEL_CPUDIV_DIV32_Val    << PM_CPUSEL_CPUDIV_Pos)
+#define PM_CPUSEL_CPUDIV_DIV64      (PM_CPUSEL_CPUDIV_DIV64_Val    << PM_CPUSEL_CPUDIV_Pos)
+#define PM_CPUSEL_CPUDIV_DIV128     (PM_CPUSEL_CPUDIV_DIV128_Val   << PM_CPUSEL_CPUDIV_Pos)
+#define PM_CPUSEL_MASK              0x07u        /**< \brief (PM_CPUSEL) MASK Register */
+
+/* -------- PM_APBASEL : (PM Offset: 0x09) (R/W  8) APBA Clock Select -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  APBADIV:3;        /*!< bit:  0.. 2  APBA Prescaler Selection           */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_APBASEL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_APBASEL_OFFSET           0x09         /**< \brief (PM_APBASEL offset) APBA Clock Select */
+#define PM_APBASEL_RESETVALUE       0x00         /**< \brief (PM_APBASEL reset_value) APBA Clock Select */
+
+#define PM_APBASEL_APBADIV_Pos      0            /**< \brief (PM_APBASEL) APBA Prescaler Selection */
+#define PM_APBASEL_APBADIV_Msk      (0x7u << PM_APBASEL_APBADIV_Pos)
+#define PM_APBASEL_APBADIV(value)   ((PM_APBASEL_APBADIV_Msk & ((value) << PM_APBASEL_APBADIV_Pos)))
+#define   PM_APBASEL_APBADIV_DIV1_Val     0x0u   /**< \brief (PM_APBASEL) Divide by 1 */
+#define   PM_APBASEL_APBADIV_DIV2_Val     0x1u   /**< \brief (PM_APBASEL) Divide by 2 */
+#define   PM_APBASEL_APBADIV_DIV4_Val     0x2u   /**< \brief (PM_APBASEL) Divide by 4 */
+#define   PM_APBASEL_APBADIV_DIV8_Val     0x3u   /**< \brief (PM_APBASEL) Divide by 8 */
+#define   PM_APBASEL_APBADIV_DIV16_Val    0x4u   /**< \brief (PM_APBASEL) Divide by 16 */
+#define   PM_APBASEL_APBADIV_DIV32_Val    0x5u   /**< \brief (PM_APBASEL) Divide by 32 */
+#define   PM_APBASEL_APBADIV_DIV64_Val    0x6u   /**< \brief (PM_APBASEL) Divide by 64 */
+#define   PM_APBASEL_APBADIV_DIV128_Val   0x7u   /**< \brief (PM_APBASEL) Divide by 128 */
+#define PM_APBASEL_APBADIV_DIV1     (PM_APBASEL_APBADIV_DIV1_Val   << PM_APBASEL_APBADIV_Pos)
+#define PM_APBASEL_APBADIV_DIV2     (PM_APBASEL_APBADIV_DIV2_Val   << PM_APBASEL_APBADIV_Pos)
+#define PM_APBASEL_APBADIV_DIV4     (PM_APBASEL_APBADIV_DIV4_Val   << PM_APBASEL_APBADIV_Pos)
+#define PM_APBASEL_APBADIV_DIV8     (PM_APBASEL_APBADIV_DIV8_Val   << PM_APBASEL_APBADIV_Pos)
+#define PM_APBASEL_APBADIV_DIV16    (PM_APBASEL_APBADIV_DIV16_Val  << PM_APBASEL_APBADIV_Pos)
+#define PM_APBASEL_APBADIV_DIV32    (PM_APBASEL_APBADIV_DIV32_Val  << PM_APBASEL_APBADIV_Pos)
+#define PM_APBASEL_APBADIV_DIV64    (PM_APBASEL_APBADIV_DIV64_Val  << PM_APBASEL_APBADIV_Pos)
+#define PM_APBASEL_APBADIV_DIV128   (PM_APBASEL_APBADIV_DIV128_Val << PM_APBASEL_APBADIV_Pos)
+#define PM_APBASEL_MASK             0x07u        /**< \brief (PM_APBASEL) MASK Register */
+
+/* -------- PM_APBBSEL : (PM Offset: 0x0A) (R/W  8) APBB Clock Select -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  APBBDIV:3;        /*!< bit:  0.. 2  APBB Prescaler Selection           */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_APBBSEL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_APBBSEL_OFFSET           0x0A         /**< \brief (PM_APBBSEL offset) APBB Clock Select */
+#define PM_APBBSEL_RESETVALUE       0x00         /**< \brief (PM_APBBSEL reset_value) APBB Clock Select */
+
+#define PM_APBBSEL_APBBDIV_Pos      0            /**< \brief (PM_APBBSEL) APBB Prescaler Selection */
+#define PM_APBBSEL_APBBDIV_Msk      (0x7u << PM_APBBSEL_APBBDIV_Pos)
+#define PM_APBBSEL_APBBDIV(value)   ((PM_APBBSEL_APBBDIV_Msk & ((value) << PM_APBBSEL_APBBDIV_Pos)))
+#define   PM_APBBSEL_APBBDIV_DIV1_Val     0x0u   /**< \brief (PM_APBBSEL) Divide by 1 */
+#define   PM_APBBSEL_APBBDIV_DIV2_Val     0x1u   /**< \brief (PM_APBBSEL) Divide by 2 */
+#define   PM_APBBSEL_APBBDIV_DIV4_Val     0x2u   /**< \brief (PM_APBBSEL) Divide by 4 */
+#define   PM_APBBSEL_APBBDIV_DIV8_Val     0x3u   /**< \brief (PM_APBBSEL) Divide by 8 */
+#define   PM_APBBSEL_APBBDIV_DIV16_Val    0x4u   /**< \brief (PM_APBBSEL) Divide by 16 */
+#define   PM_APBBSEL_APBBDIV_DIV32_Val    0x5u   /**< \brief (PM_APBBSEL) Divide by 32 */
+#define   PM_APBBSEL_APBBDIV_DIV64_Val    0x6u   /**< \brief (PM_APBBSEL) Divide by 64 */
+#define   PM_APBBSEL_APBBDIV_DIV128_Val   0x7u   /**< \brief (PM_APBBSEL) Divide by 128 */
+#define PM_APBBSEL_APBBDIV_DIV1     (PM_APBBSEL_APBBDIV_DIV1_Val   << PM_APBBSEL_APBBDIV_Pos)
+#define PM_APBBSEL_APBBDIV_DIV2     (PM_APBBSEL_APBBDIV_DIV2_Val   << PM_APBBSEL_APBBDIV_Pos)
+#define PM_APBBSEL_APBBDIV_DIV4     (PM_APBBSEL_APBBDIV_DIV4_Val   << PM_APBBSEL_APBBDIV_Pos)
+#define PM_APBBSEL_APBBDIV_DIV8     (PM_APBBSEL_APBBDIV_DIV8_Val   << PM_APBBSEL_APBBDIV_Pos)
+#define PM_APBBSEL_APBBDIV_DIV16    (PM_APBBSEL_APBBDIV_DIV16_Val  << PM_APBBSEL_APBBDIV_Pos)
+#define PM_APBBSEL_APBBDIV_DIV32    (PM_APBBSEL_APBBDIV_DIV32_Val  << PM_APBBSEL_APBBDIV_Pos)
+#define PM_APBBSEL_APBBDIV_DIV64    (PM_APBBSEL_APBBDIV_DIV64_Val  << PM_APBBSEL_APBBDIV_Pos)
+#define PM_APBBSEL_APBBDIV_DIV128   (PM_APBBSEL_APBBDIV_DIV128_Val << PM_APBBSEL_APBBDIV_Pos)
+#define PM_APBBSEL_MASK             0x07u        /**< \brief (PM_APBBSEL) MASK Register */
+
+/* -------- PM_APBCSEL : (PM Offset: 0x0B) (R/W  8) APBC Clock Select -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  APBCDIV:3;        /*!< bit:  0.. 2  APBC Prescaler Selection           */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_APBCSEL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_APBCSEL_OFFSET           0x0B         /**< \brief (PM_APBCSEL offset) APBC Clock Select */
+#define PM_APBCSEL_RESETVALUE       0x00         /**< \brief (PM_APBCSEL reset_value) APBC Clock Select */
+
+#define PM_APBCSEL_APBCDIV_Pos      0            /**< \brief (PM_APBCSEL) APBC Prescaler Selection */
+#define PM_APBCSEL_APBCDIV_Msk      (0x7u << PM_APBCSEL_APBCDIV_Pos)
+#define PM_APBCSEL_APBCDIV(value)   ((PM_APBCSEL_APBCDIV_Msk & ((value) << PM_APBCSEL_APBCDIV_Pos)))
+#define   PM_APBCSEL_APBCDIV_DIV1_Val     0x0u   /**< \brief (PM_APBCSEL) Divide by 1 */
+#define   PM_APBCSEL_APBCDIV_DIV2_Val     0x1u   /**< \brief (PM_APBCSEL) Divide by 2 */
+#define   PM_APBCSEL_APBCDIV_DIV4_Val     0x2u   /**< \brief (PM_APBCSEL) Divide by 4 */
+#define   PM_APBCSEL_APBCDIV_DIV8_Val     0x3u   /**< \brief (PM_APBCSEL) Divide by 8 */
+#define   PM_APBCSEL_APBCDIV_DIV16_Val    0x4u   /**< \brief (PM_APBCSEL) Divide by 16 */
+#define   PM_APBCSEL_APBCDIV_DIV32_Val    0x5u   /**< \brief (PM_APBCSEL) Divide by 32 */
+#define   PM_APBCSEL_APBCDIV_DIV64_Val    0x6u   /**< \brief (PM_APBCSEL) Divide by 64 */
+#define   PM_APBCSEL_APBCDIV_DIV128_Val   0x7u   /**< \brief (PM_APBCSEL) Divide by 128 */
+#define PM_APBCSEL_APBCDIV_DIV1     (PM_APBCSEL_APBCDIV_DIV1_Val   << PM_APBCSEL_APBCDIV_Pos)
+#define PM_APBCSEL_APBCDIV_DIV2     (PM_APBCSEL_APBCDIV_DIV2_Val   << PM_APBCSEL_APBCDIV_Pos)
+#define PM_APBCSEL_APBCDIV_DIV4     (PM_APBCSEL_APBCDIV_DIV4_Val   << PM_APBCSEL_APBCDIV_Pos)
+#define PM_APBCSEL_APBCDIV_DIV8     (PM_APBCSEL_APBCDIV_DIV8_Val   << PM_APBCSEL_APBCDIV_Pos)
+#define PM_APBCSEL_APBCDIV_DIV16    (PM_APBCSEL_APBCDIV_DIV16_Val  << PM_APBCSEL_APBCDIV_Pos)
+#define PM_APBCSEL_APBCDIV_DIV32    (PM_APBCSEL_APBCDIV_DIV32_Val  << PM_APBCSEL_APBCDIV_Pos)
+#define PM_APBCSEL_APBCDIV_DIV64    (PM_APBCSEL_APBCDIV_DIV64_Val  << PM_APBCSEL_APBCDIV_Pos)
+#define PM_APBCSEL_APBCDIV_DIV128   (PM_APBCSEL_APBCDIV_DIV128_Val << PM_APBCSEL_APBCDIV_Pos)
+#define PM_APBCSEL_MASK             0x07u        /**< \brief (PM_APBCSEL) MASK Register */
+
+/* -------- PM_AHBMASK : (PM Offset: 0x14) (R/W 32) AHB Mask -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t HPB0:1;           /*!< bit:      0  HPB0 AHB Clock Enable              */
+    uint32_t HPB1:1;           /*!< bit:      1  HPB1 AHB Clock Enable              */
+    uint32_t HPB2:1;           /*!< bit:      2  HPB2 AHB Clock Enable              */
+    uint32_t DSU:1;            /*!< bit:      3  DSU AHB Clock Enable               */
+    uint32_t NVMCTRL:1;        /*!< bit:      4  NVMCTRL AHB Clock Enable           */
+    uint32_t DMAC:1;           /*!< bit:      5  DMAC AHB Clock Enable              */
+    uint32_t USB:1;            /*!< bit:      6  USB AHB Clock Enable               */
+    uint32_t :25;              /*!< bit:  7..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PM_AHBMASK_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_AHBMASK_OFFSET           0x14         /**< \brief (PM_AHBMASK offset) AHB Mask */
+#define PM_AHBMASK_RESETVALUE       0x0000007F   /**< \brief (PM_AHBMASK reset_value) AHB Mask */
+
+#define PM_AHBMASK_HPB0_Pos         0            /**< \brief (PM_AHBMASK) HPB0 AHB Clock Enable */
+#define PM_AHBMASK_HPB0             (0x1u << PM_AHBMASK_HPB0_Pos)
+#define PM_AHBMASK_HPB1_Pos         1            /**< \brief (PM_AHBMASK) HPB1 AHB Clock Enable */
+#define PM_AHBMASK_HPB1             (0x1u << PM_AHBMASK_HPB1_Pos)
+#define PM_AHBMASK_HPB2_Pos         2            /**< \brief (PM_AHBMASK) HPB2 AHB Clock Enable */
+#define PM_AHBMASK_HPB2             (0x1u << PM_AHBMASK_HPB2_Pos)
+#define PM_AHBMASK_DSU_Pos          3            /**< \brief (PM_AHBMASK) DSU AHB Clock Enable */
+#define PM_AHBMASK_DSU              (0x1u << PM_AHBMASK_DSU_Pos)
+#define PM_AHBMASK_NVMCTRL_Pos      4            /**< \brief (PM_AHBMASK) NVMCTRL AHB Clock Enable */
+#define PM_AHBMASK_NVMCTRL          (0x1u << PM_AHBMASK_NVMCTRL_Pos)
+#define PM_AHBMASK_DMAC_Pos         5            /**< \brief (PM_AHBMASK) DMAC AHB Clock Enable */
+#define PM_AHBMASK_DMAC             (0x1u << PM_AHBMASK_DMAC_Pos)
+#define PM_AHBMASK_USB_Pos          6            /**< \brief (PM_AHBMASK) USB AHB Clock Enable */
+#define PM_AHBMASK_USB              (0x1u << PM_AHBMASK_USB_Pos)
+#define PM_AHBMASK_MASK             0x0000007Fu  /**< \brief (PM_AHBMASK) MASK Register */
+
+/* -------- PM_APBAMASK : (PM Offset: 0x18) (R/W 32) APBA Mask -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PAC0:1;           /*!< bit:      0  PAC0 APB Clock Enable              */
+    uint32_t PM:1;             /*!< bit:      1  PM APB Clock Enable                */
+    uint32_t SYSCTRL:1;        /*!< bit:      2  SYSCTRL APB Clock Enable           */
+    uint32_t GCLK:1;           /*!< bit:      3  GCLK APB Clock Enable              */
+    uint32_t WDT:1;            /*!< bit:      4  WDT APB Clock Enable               */
+    uint32_t RTC:1;            /*!< bit:      5  RTC APB Clock Enable               */
+    uint32_t EIC:1;            /*!< bit:      6  EIC APB Clock Enable               */
+    uint32_t :25;              /*!< bit:  7..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PM_APBAMASK_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_APBAMASK_OFFSET          0x18         /**< \brief (PM_APBAMASK offset) APBA Mask */
+#define PM_APBAMASK_RESETVALUE      0x0000007F   /**< \brief (PM_APBAMASK reset_value) APBA Mask */
+
+#define PM_APBAMASK_PAC0_Pos        0            /**< \brief (PM_APBAMASK) PAC0 APB Clock Enable */
+#define PM_APBAMASK_PAC0            (0x1u << PM_APBAMASK_PAC0_Pos)
+#define PM_APBAMASK_PM_Pos          1            /**< \brief (PM_APBAMASK) PM APB Clock Enable */
+#define PM_APBAMASK_PM              (0x1u << PM_APBAMASK_PM_Pos)
+#define PM_APBAMASK_SYSCTRL_Pos     2            /**< \brief (PM_APBAMASK) SYSCTRL APB Clock Enable */
+#define PM_APBAMASK_SYSCTRL         (0x1u << PM_APBAMASK_SYSCTRL_Pos)
+#define PM_APBAMASK_GCLK_Pos        3            /**< \brief (PM_APBAMASK) GCLK APB Clock Enable */
+#define PM_APBAMASK_GCLK            (0x1u << PM_APBAMASK_GCLK_Pos)
+#define PM_APBAMASK_WDT_Pos         4            /**< \brief (PM_APBAMASK) WDT APB Clock Enable */
+#define PM_APBAMASK_WDT             (0x1u << PM_APBAMASK_WDT_Pos)
+#define PM_APBAMASK_RTC_Pos         5            /**< \brief (PM_APBAMASK) RTC APB Clock Enable */
+#define PM_APBAMASK_RTC             (0x1u << PM_APBAMASK_RTC_Pos)
+#define PM_APBAMASK_EIC_Pos         6            /**< \brief (PM_APBAMASK) EIC APB Clock Enable */
+#define PM_APBAMASK_EIC             (0x1u << PM_APBAMASK_EIC_Pos)
+#define PM_APBAMASK_MASK            0x0000007Fu  /**< \brief (PM_APBAMASK) MASK Register */
+
+/* -------- PM_APBBMASK : (PM Offset: 0x1C) (R/W 32) APBB Mask -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PAC1:1;           /*!< bit:      0  PAC1 APB Clock Enable              */
+    uint32_t DSU:1;            /*!< bit:      1  DSU APB Clock Enable               */
+    uint32_t NVMCTRL:1;        /*!< bit:      2  NVMCTRL APB Clock Enable           */
+    uint32_t PORT:1;           /*!< bit:      3  PORT APB Clock Enable              */
+    uint32_t DMAC:1;           /*!< bit:      4  DMAC APB Clock Enable              */
+    uint32_t USB:1;            /*!< bit:      5  USB APB Clock Enable               */
+    uint32_t :26;              /*!< bit:  6..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PM_APBBMASK_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_APBBMASK_OFFSET          0x1C         /**< \brief (PM_APBBMASK offset) APBB Mask */
+#define PM_APBBMASK_RESETVALUE      0x0000007F   /**< \brief (PM_APBBMASK reset_value) APBB Mask */
+
+#define PM_APBBMASK_PAC1_Pos        0            /**< \brief (PM_APBBMASK) PAC1 APB Clock Enable */
+#define PM_APBBMASK_PAC1            (0x1u << PM_APBBMASK_PAC1_Pos)
+#define PM_APBBMASK_DSU_Pos         1            /**< \brief (PM_APBBMASK) DSU APB Clock Enable */
+#define PM_APBBMASK_DSU             (0x1u << PM_APBBMASK_DSU_Pos)
+#define PM_APBBMASK_NVMCTRL_Pos     2            /**< \brief (PM_APBBMASK) NVMCTRL APB Clock Enable */
+#define PM_APBBMASK_NVMCTRL         (0x1u << PM_APBBMASK_NVMCTRL_Pos)
+#define PM_APBBMASK_PORT_Pos        3            /**< \brief (PM_APBBMASK) PORT APB Clock Enable */
+#define PM_APBBMASK_PORT            (0x1u << PM_APBBMASK_PORT_Pos)
+#define PM_APBBMASK_DMAC_Pos        4            /**< \brief (PM_APBBMASK) DMAC APB Clock Enable */
+#define PM_APBBMASK_DMAC            (0x1u << PM_APBBMASK_DMAC_Pos)
+#define PM_APBBMASK_USB_Pos         5            /**< \brief (PM_APBBMASK) USB APB Clock Enable */
+#define PM_APBBMASK_USB             (0x1u << PM_APBBMASK_USB_Pos)
+#define PM_APBBMASK_MASK            0x0000003Fu  /**< \brief (PM_APBBMASK) MASK Register */
+
+/* -------- PM_APBCMASK : (PM Offset: 0x20) (R/W 32) APBC Mask -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PAC2:1;           /*!< bit:      0  PAC2 APB Clock Enable              */
+    uint32_t EVSYS:1;          /*!< bit:      1  EVSYS APB Clock Enable             */
+    uint32_t SERCOM0:1;        /*!< bit:      2  SERCOM0 APB Clock Enable           */
+    uint32_t SERCOM1:1;        /*!< bit:      3  SERCOM1 APB Clock Enable           */
+    uint32_t SERCOM2:1;        /*!< bit:      4  SERCOM2 APB Clock Enable           */
+    uint32_t SERCOM3:1;        /*!< bit:      5  SERCOM3 APB Clock Enable           */
+    uint32_t SERCOM4:1;        /*!< bit:      6  SERCOM4 APB Clock Enable           */
+    uint32_t SERCOM5:1;        /*!< bit:      7  SERCOM5 APB Clock Enable           */
+    uint32_t TCC0:1;           /*!< bit:      8  TCC0 APB Clock Enable              */
+    uint32_t TCC1:1;           /*!< bit:      9  TCC1 APB Clock Enable              */
+    uint32_t TCC2:1;           /*!< bit:     10  TCC2 APB Clock Enable              */
+    uint32_t TC3:1;            /*!< bit:     11  TC3 APB Clock Enable               */
+    uint32_t TC4:1;            /*!< bit:     12  TC4 APB Clock Enable               */
+    uint32_t TC5:1;            /*!< bit:     13  TC5 APB Clock Enable               */
+    uint32_t TC6:1;            /*!< bit:     14  TC6 APB Clock Enable               */
+    uint32_t TC7:1;            /*!< bit:     15  TC7 APB Clock Enable               */
+    uint32_t ADC:1;            /*!< bit:     16  ADC APB Clock Enable               */
+    uint32_t AC:1;             /*!< bit:     17  AC APB Clock Enable                */
+    uint32_t DAC:1;            /*!< bit:     18  DAC APB Clock Enable               */
+    uint32_t PTC:1;            /*!< bit:     19  PTC APB Clock Enable               */
+    uint32_t I2S:1;            /*!< bit:     20  I2S APB Clock Enable               */
+    uint32_t :11;              /*!< bit: 21..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PM_APBCMASK_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_APBCMASK_OFFSET          0x20         /**< \brief (PM_APBCMASK offset) APBC Mask */
+#define PM_APBCMASK_RESETVALUE      0x00010000   /**< \brief (PM_APBCMASK reset_value) APBC Mask */
+
+#define PM_APBCMASK_PAC2_Pos        0            /**< \brief (PM_APBCMASK) PAC2 APB Clock Enable */
+#define PM_APBCMASK_PAC2            (0x1u << PM_APBCMASK_PAC2_Pos)
+#define PM_APBCMASK_EVSYS_Pos       1            /**< \brief (PM_APBCMASK) EVSYS APB Clock Enable */
+#define PM_APBCMASK_EVSYS           (0x1u << PM_APBCMASK_EVSYS_Pos)
+#define PM_APBCMASK_SERCOM0_Pos     2            /**< \brief (PM_APBCMASK) SERCOM0 APB Clock Enable */
+#define PM_APBCMASK_SERCOM0         (0x1u << PM_APBCMASK_SERCOM0_Pos)
+#define PM_APBCMASK_SERCOM1_Pos     3            /**< \brief (PM_APBCMASK) SERCOM1 APB Clock Enable */
+#define PM_APBCMASK_SERCOM1         (0x1u << PM_APBCMASK_SERCOM1_Pos)
+#define PM_APBCMASK_SERCOM2_Pos     4            /**< \brief (PM_APBCMASK) SERCOM2 APB Clock Enable */
+#define PM_APBCMASK_SERCOM2         (0x1u << PM_APBCMASK_SERCOM2_Pos)
+#define PM_APBCMASK_SERCOM3_Pos     5            /**< \brief (PM_APBCMASK) SERCOM3 APB Clock Enable */
+#define PM_APBCMASK_SERCOM3         (0x1u << PM_APBCMASK_SERCOM3_Pos)
+#define PM_APBCMASK_SERCOM4_Pos     6            /**< \brief (PM_APBCMASK) SERCOM4 APB Clock Enable */
+#define PM_APBCMASK_SERCOM4         (0x1u << PM_APBCMASK_SERCOM4_Pos)
+#define PM_APBCMASK_SERCOM5_Pos     7            /**< \brief (PM_APBCMASK) SERCOM5 APB Clock Enable */
+#define PM_APBCMASK_SERCOM5         (0x1u << PM_APBCMASK_SERCOM5_Pos)
+#define PM_APBCMASK_TCC0_Pos        8            /**< \brief (PM_APBCMASK) TCC0 APB Clock Enable */
+#define PM_APBCMASK_TCC0            (0x1u << PM_APBCMASK_TCC0_Pos)
+#define PM_APBCMASK_TCC1_Pos        9            /**< \brief (PM_APBCMASK) TCC1 APB Clock Enable */
+#define PM_APBCMASK_TCC1            (0x1u << PM_APBCMASK_TCC1_Pos)
+#define PM_APBCMASK_TCC2_Pos        10           /**< \brief (PM_APBCMASK) TCC2 APB Clock Enable */
+#define PM_APBCMASK_TCC2            (0x1u << PM_APBCMASK_TCC2_Pos)
+#define PM_APBCMASK_TC3_Pos         11           /**< \brief (PM_APBCMASK) TC3 APB Clock Enable */
+#define PM_APBCMASK_TC3             (0x1u << PM_APBCMASK_TC3_Pos)
+#define PM_APBCMASK_TC4_Pos         12           /**< \brief (PM_APBCMASK) TC4 APB Clock Enable */
+#define PM_APBCMASK_TC4             (0x1u << PM_APBCMASK_TC4_Pos)
+#define PM_APBCMASK_TC5_Pos         13           /**< \brief (PM_APBCMASK) TC5 APB Clock Enable */
+#define PM_APBCMASK_TC5             (0x1u << PM_APBCMASK_TC5_Pos)
+#define PM_APBCMASK_TC6_Pos         14           /**< \brief (PM_APBCMASK) TC6 APB Clock Enable */
+#define PM_APBCMASK_TC6             (0x1u << PM_APBCMASK_TC6_Pos)
+#define PM_APBCMASK_TC7_Pos         15           /**< \brief (PM_APBCMASK) TC7 APB Clock Enable */
+#define PM_APBCMASK_TC7             (0x1u << PM_APBCMASK_TC7_Pos)
+#define PM_APBCMASK_ADC_Pos         16           /**< \brief (PM_APBCMASK) ADC APB Clock Enable */
+#define PM_APBCMASK_ADC             (0x1u << PM_APBCMASK_ADC_Pos)
+#define PM_APBCMASK_AC_Pos          17           /**< \brief (PM_APBCMASK) AC APB Clock Enable */
+#define PM_APBCMASK_AC              (0x1u << PM_APBCMASK_AC_Pos)
+#define PM_APBCMASK_DAC_Pos         18           /**< \brief (PM_APBCMASK) DAC APB Clock Enable */
+#define PM_APBCMASK_DAC             (0x1u << PM_APBCMASK_DAC_Pos)
+#define PM_APBCMASK_PTC_Pos         19           /**< \brief (PM_APBCMASK) PTC APB Clock Enable */
+#define PM_APBCMASK_PTC             (0x1u << PM_APBCMASK_PTC_Pos)
+#define PM_APBCMASK_I2S_Pos         20           /**< \brief (PM_APBCMASK) I2S APB Clock Enable */
+#define PM_APBCMASK_I2S             (0x1u << PM_APBCMASK_I2S_Pos)
+#define PM_APBCMASK_MASK            0x001FFFFFu  /**< \brief (PM_APBCMASK) MASK Register */
+
+/* -------- PM_INTENCLR : (PM Offset: 0x34) (R/W  8) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CKRDY:1;          /*!< bit:      0  Clock Ready Interrupt Enable       */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_INTENCLR_OFFSET          0x34         /**< \brief (PM_INTENCLR offset) Interrupt Enable Clear */
+#define PM_INTENCLR_RESETVALUE      0x00         /**< \brief (PM_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define PM_INTENCLR_CKRDY_Pos       0            /**< \brief (PM_INTENCLR) Clock Ready Interrupt Enable */
+#define PM_INTENCLR_CKRDY           (0x1u << PM_INTENCLR_CKRDY_Pos)
+#define PM_INTENCLR_MASK            0x01u        /**< \brief (PM_INTENCLR) MASK Register */
+
+/* -------- PM_INTENSET : (PM Offset: 0x35) (R/W  8) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CKRDY:1;          /*!< bit:      0  Clock Ready Interrupt Enable       */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_INTENSET_OFFSET          0x35         /**< \brief (PM_INTENSET offset) Interrupt Enable Set */
+#define PM_INTENSET_RESETVALUE      0x00         /**< \brief (PM_INTENSET reset_value) Interrupt Enable Set */
+
+#define PM_INTENSET_CKRDY_Pos       0            /**< \brief (PM_INTENSET) Clock Ready Interrupt Enable */
+#define PM_INTENSET_CKRDY           (0x1u << PM_INTENSET_CKRDY_Pos)
+#define PM_INTENSET_MASK            0x01u        /**< \brief (PM_INTENSET) MASK Register */
+
+/* -------- PM_INTFLAG : (PM Offset: 0x36) (R/W  8) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CKRDY:1;          /*!< bit:      0  Clock Ready                        */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_INTFLAG_OFFSET           0x36         /**< \brief (PM_INTFLAG offset) Interrupt Flag Status and Clear */
+#define PM_INTFLAG_RESETVALUE       0x00         /**< \brief (PM_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define PM_INTFLAG_CKRDY_Pos        0            /**< \brief (PM_INTFLAG) Clock Ready */
+#define PM_INTFLAG_CKRDY            (0x1u << PM_INTFLAG_CKRDY_Pos)
+#define PM_INTFLAG_MASK             0x01u        /**< \brief (PM_INTFLAG) MASK Register */
+
+/* -------- PM_RCAUSE : (PM Offset: 0x38) (R/   8) Reset Cause -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  POR:1;            /*!< bit:      0  Power On Reset                     */
+    uint8_t  BOD12:1;          /*!< bit:      1  Brown Out 12 Detector Reset        */
+    uint8_t  BOD33:1;          /*!< bit:      2  Brown Out 33 Detector Reset        */
+    uint8_t  :1;               /*!< bit:      3  Reserved                           */
+    uint8_t  EXT:1;            /*!< bit:      4  External Reset                     */
+    uint8_t  WDT:1;            /*!< bit:      5  Watchdog Reset                     */
+    uint8_t  SYST:1;           /*!< bit:      6  System Reset Request               */
+    uint8_t  :1;               /*!< bit:      7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PM_RCAUSE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PM_RCAUSE_OFFSET            0x38         /**< \brief (PM_RCAUSE offset) Reset Cause */
+#define PM_RCAUSE_RESETVALUE        0x01         /**< \brief (PM_RCAUSE reset_value) Reset Cause */
+
+#define PM_RCAUSE_POR_Pos           0            /**< \brief (PM_RCAUSE) Power On Reset */
+#define PM_RCAUSE_POR               (0x1u << PM_RCAUSE_POR_Pos)
+#define PM_RCAUSE_BOD12_Pos         1            /**< \brief (PM_RCAUSE) Brown Out 12 Detector Reset */
+#define PM_RCAUSE_BOD12             (0x1u << PM_RCAUSE_BOD12_Pos)
+#define PM_RCAUSE_BOD33_Pos         2            /**< \brief (PM_RCAUSE) Brown Out 33 Detector Reset */
+#define PM_RCAUSE_BOD33             (0x1u << PM_RCAUSE_BOD33_Pos)
+#define PM_RCAUSE_EXT_Pos           4            /**< \brief (PM_RCAUSE) External Reset */
+#define PM_RCAUSE_EXT               (0x1u << PM_RCAUSE_EXT_Pos)
+#define PM_RCAUSE_WDT_Pos           5            /**< \brief (PM_RCAUSE) Watchdog Reset */
+#define PM_RCAUSE_WDT               (0x1u << PM_RCAUSE_WDT_Pos)
+#define PM_RCAUSE_SYST_Pos          6            /**< \brief (PM_RCAUSE) System Reset Request */
+#define PM_RCAUSE_SYST              (0x1u << PM_RCAUSE_SYST_Pos)
+#define PM_RCAUSE_MASK              0x77u        /**< \brief (PM_RCAUSE) MASK Register */
+
+/** \brief PM hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO PM_CTRL_Type              CTRL;        /**< \brief Offset: 0x00 (R/W  8) Control */
+  __IO PM_SLEEP_Type             SLEEP;       /**< \brief Offset: 0x01 (R/W  8) Sleep Mode */
+       RoReg8                    Reserved1[0x6];
+  __IO PM_CPUSEL_Type            CPUSEL;      /**< \brief Offset: 0x08 (R/W  8) CPU Clock Select */
+  __IO PM_APBASEL_Type           APBASEL;     /**< \brief Offset: 0x09 (R/W  8) APBA Clock Select */
+  __IO PM_APBBSEL_Type           APBBSEL;     /**< \brief Offset: 0x0A (R/W  8) APBB Clock Select */
+  __IO PM_APBCSEL_Type           APBCSEL;     /**< \brief Offset: 0x0B (R/W  8) APBC Clock Select */
+       RoReg8                    Reserved2[0x8];
+  __IO PM_AHBMASK_Type           AHBMASK;     /**< \brief Offset: 0x14 (R/W 32) AHB Mask */
+  __IO PM_APBAMASK_Type          APBAMASK;    /**< \brief Offset: 0x18 (R/W 32) APBA Mask */
+  __IO PM_APBBMASK_Type          APBBMASK;    /**< \brief Offset: 0x1C (R/W 32) APBB Mask */
+  __IO PM_APBCMASK_Type          APBCMASK;    /**< \brief Offset: 0x20 (R/W 32) APBC Mask */
+       RoReg8                    Reserved3[0x10];
+  __IO PM_INTENCLR_Type          INTENCLR;    /**< \brief Offset: 0x34 (R/W  8) Interrupt Enable Clear */
+  __IO PM_INTENSET_Type          INTENSET;    /**< \brief Offset: 0x35 (R/W  8) Interrupt Enable Set */
+  __IO PM_INTFLAG_Type           INTFLAG;     /**< \brief Offset: 0x36 (R/W  8) Interrupt Flag Status and Clear */
+       RoReg8                    Reserved4[0x1];
+  __I  PM_RCAUSE_Type            RCAUSE;      /**< \brief Offset: 0x38 (R/   8) Reset Cause */
+} Pm;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_PM_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/port.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/port.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/port.h	(revision 136)
@@ -0,0 +1,395 @@
+/**
+ * \file
+ *
+ * \brief Component description for PORT
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_PORT_COMPONENT_
+#define _SAMD21_PORT_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR PORT */
+/* ========================================================================== */
+/** \addtogroup SAMD21_PORT Port Module */
+/*@{*/
+
+#define PORT_U2210
+#define REV_PORT                    0x100
+
+/* -------- PORT_DIR : (PORT Offset: 0x00) (R/W 32) GROUP Data Direction -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DIR:32;           /*!< bit:  0..31  Port Data Direction                */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_DIR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_DIR_OFFSET             0x00         /**< \brief (PORT_DIR offset) Data Direction */
+#define PORT_DIR_RESETVALUE         0x00000000   /**< \brief (PORT_DIR reset_value) Data Direction */
+
+#define PORT_DIR_DIR_Pos            0            /**< \brief (PORT_DIR) Port Data Direction */
+#define PORT_DIR_DIR_Msk            (0xFFFFFFFFu << PORT_DIR_DIR_Pos)
+#define PORT_DIR_DIR(value)         ((PORT_DIR_DIR_Msk & ((value) << PORT_DIR_DIR_Pos)))
+#define PORT_DIR_MASK               0xFFFFFFFFu  /**< \brief (PORT_DIR) MASK Register */
+
+/* -------- PORT_DIRCLR : (PORT Offset: 0x04) (R/W 32) GROUP Data Direction Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DIRCLR:32;        /*!< bit:  0..31  Port Data Direction Clear          */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_DIRCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_DIRCLR_OFFSET          0x04         /**< \brief (PORT_DIRCLR offset) Data Direction Clear */
+#define PORT_DIRCLR_RESETVALUE      0x00000000   /**< \brief (PORT_DIRCLR reset_value) Data Direction Clear */
+
+#define PORT_DIRCLR_DIRCLR_Pos      0            /**< \brief (PORT_DIRCLR) Port Data Direction Clear */
+#define PORT_DIRCLR_DIRCLR_Msk      (0xFFFFFFFFu << PORT_DIRCLR_DIRCLR_Pos)
+#define PORT_DIRCLR_DIRCLR(value)   ((PORT_DIRCLR_DIRCLR_Msk & ((value) << PORT_DIRCLR_DIRCLR_Pos)))
+#define PORT_DIRCLR_MASK            0xFFFFFFFFu  /**< \brief (PORT_DIRCLR) MASK Register */
+
+/* -------- PORT_DIRSET : (PORT Offset: 0x08) (R/W 32) GROUP Data Direction Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DIRSET:32;        /*!< bit:  0..31  Port Data Direction Set            */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_DIRSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_DIRSET_OFFSET          0x08         /**< \brief (PORT_DIRSET offset) Data Direction Set */
+#define PORT_DIRSET_RESETVALUE      0x00000000   /**< \brief (PORT_DIRSET reset_value) Data Direction Set */
+
+#define PORT_DIRSET_DIRSET_Pos      0            /**< \brief (PORT_DIRSET) Port Data Direction Set */
+#define PORT_DIRSET_DIRSET_Msk      (0xFFFFFFFFu << PORT_DIRSET_DIRSET_Pos)
+#define PORT_DIRSET_DIRSET(value)   ((PORT_DIRSET_DIRSET_Msk & ((value) << PORT_DIRSET_DIRSET_Pos)))
+#define PORT_DIRSET_MASK            0xFFFFFFFFu  /**< \brief (PORT_DIRSET) MASK Register */
+
+/* -------- PORT_DIRTGL : (PORT Offset: 0x0C) (R/W 32) GROUP Data Direction Toggle -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DIRTGL:32;        /*!< bit:  0..31  Port Data Direction Toggle         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_DIRTGL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_DIRTGL_OFFSET          0x0C         /**< \brief (PORT_DIRTGL offset) Data Direction Toggle */
+#define PORT_DIRTGL_RESETVALUE      0x00000000   /**< \brief (PORT_DIRTGL reset_value) Data Direction Toggle */
+
+#define PORT_DIRTGL_DIRTGL_Pos      0            /**< \brief (PORT_DIRTGL) Port Data Direction Toggle */
+#define PORT_DIRTGL_DIRTGL_Msk      (0xFFFFFFFFu << PORT_DIRTGL_DIRTGL_Pos)
+#define PORT_DIRTGL_DIRTGL(value)   ((PORT_DIRTGL_DIRTGL_Msk & ((value) << PORT_DIRTGL_DIRTGL_Pos)))
+#define PORT_DIRTGL_MASK            0xFFFFFFFFu  /**< \brief (PORT_DIRTGL) MASK Register */
+
+/* -------- PORT_OUT : (PORT Offset: 0x10) (R/W 32) GROUP Data Output Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OUT:32;           /*!< bit:  0..31  Port Data Output Value             */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_OUT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_OUT_OFFSET             0x10         /**< \brief (PORT_OUT offset) Data Output Value */
+#define PORT_OUT_RESETVALUE         0x00000000   /**< \brief (PORT_OUT reset_value) Data Output Value */
+
+#define PORT_OUT_OUT_Pos            0            /**< \brief (PORT_OUT) Port Data Output Value */
+#define PORT_OUT_OUT_Msk            (0xFFFFFFFFu << PORT_OUT_OUT_Pos)
+#define PORT_OUT_OUT(value)         ((PORT_OUT_OUT_Msk & ((value) << PORT_OUT_OUT_Pos)))
+#define PORT_OUT_MASK               0xFFFFFFFFu  /**< \brief (PORT_OUT) MASK Register */
+
+/* -------- PORT_OUTCLR : (PORT Offset: 0x14) (R/W 32) GROUP Data Output Value Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OUTCLR:32;        /*!< bit:  0..31  Port Data Output Value Clear       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_OUTCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_OUTCLR_OFFSET          0x14         /**< \brief (PORT_OUTCLR offset) Data Output Value Clear */
+#define PORT_OUTCLR_RESETVALUE      0x00000000   /**< \brief (PORT_OUTCLR reset_value) Data Output Value Clear */
+
+#define PORT_OUTCLR_OUTCLR_Pos      0            /**< \brief (PORT_OUTCLR) Port Data Output Value Clear */
+#define PORT_OUTCLR_OUTCLR_Msk      (0xFFFFFFFFu << PORT_OUTCLR_OUTCLR_Pos)
+#define PORT_OUTCLR_OUTCLR(value)   ((PORT_OUTCLR_OUTCLR_Msk & ((value) << PORT_OUTCLR_OUTCLR_Pos)))
+#define PORT_OUTCLR_MASK            0xFFFFFFFFu  /**< \brief (PORT_OUTCLR) MASK Register */
+
+/* -------- PORT_OUTSET : (PORT Offset: 0x18) (R/W 32) GROUP Data Output Value Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OUTSET:32;        /*!< bit:  0..31  Port Data Output Value Set         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_OUTSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_OUTSET_OFFSET          0x18         /**< \brief (PORT_OUTSET offset) Data Output Value Set */
+#define PORT_OUTSET_RESETVALUE      0x00000000   /**< \brief (PORT_OUTSET reset_value) Data Output Value Set */
+
+#define PORT_OUTSET_OUTSET_Pos      0            /**< \brief (PORT_OUTSET) Port Data Output Value Set */
+#define PORT_OUTSET_OUTSET_Msk      (0xFFFFFFFFu << PORT_OUTSET_OUTSET_Pos)
+#define PORT_OUTSET_OUTSET(value)   ((PORT_OUTSET_OUTSET_Msk & ((value) << PORT_OUTSET_OUTSET_Pos)))
+#define PORT_OUTSET_MASK            0xFFFFFFFFu  /**< \brief (PORT_OUTSET) MASK Register */
+
+/* -------- PORT_OUTTGL : (PORT Offset: 0x1C) (R/W 32) GROUP Data Output Value Toggle -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OUTTGL:32;        /*!< bit:  0..31  Port Data Output Value Toggle      */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_OUTTGL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_OUTTGL_OFFSET          0x1C         /**< \brief (PORT_OUTTGL offset) Data Output Value Toggle */
+#define PORT_OUTTGL_RESETVALUE      0x00000000   /**< \brief (PORT_OUTTGL reset_value) Data Output Value Toggle */
+
+#define PORT_OUTTGL_OUTTGL_Pos      0            /**< \brief (PORT_OUTTGL) Port Data Output Value Toggle */
+#define PORT_OUTTGL_OUTTGL_Msk      (0xFFFFFFFFu << PORT_OUTTGL_OUTTGL_Pos)
+#define PORT_OUTTGL_OUTTGL(value)   ((PORT_OUTTGL_OUTTGL_Msk & ((value) << PORT_OUTTGL_OUTTGL_Pos)))
+#define PORT_OUTTGL_MASK            0xFFFFFFFFu  /**< \brief (PORT_OUTTGL) MASK Register */
+
+/* -------- PORT_IN : (PORT Offset: 0x20) (R/  32) GROUP Data Input Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t IN:32;            /*!< bit:  0..31  Port Data Input Value              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_IN_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_IN_OFFSET              0x20         /**< \brief (PORT_IN offset) Data Input Value */
+#define PORT_IN_RESETVALUE          0x00000000   /**< \brief (PORT_IN reset_value) Data Input Value */
+
+#define PORT_IN_IN_Pos              0            /**< \brief (PORT_IN) Port Data Input Value */
+#define PORT_IN_IN_Msk              (0xFFFFFFFFu << PORT_IN_IN_Pos)
+#define PORT_IN_IN(value)           ((PORT_IN_IN_Msk & ((value) << PORT_IN_IN_Pos)))
+#define PORT_IN_MASK                0xFFFFFFFFu  /**< \brief (PORT_IN) MASK Register */
+
+/* -------- PORT_CTRL : (PORT Offset: 0x24) (R/W 32) GROUP Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SAMPLING:32;      /*!< bit:  0..31  Input Sampling Mode                */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_CTRL_OFFSET            0x24         /**< \brief (PORT_CTRL offset) Control */
+#define PORT_CTRL_RESETVALUE        0x00000000   /**< \brief (PORT_CTRL reset_value) Control */
+
+#define PORT_CTRL_SAMPLING_Pos      0            /**< \brief (PORT_CTRL) Input Sampling Mode */
+#define PORT_CTRL_SAMPLING_Msk      (0xFFFFFFFFu << PORT_CTRL_SAMPLING_Pos)
+#define PORT_CTRL_SAMPLING(value)   ((PORT_CTRL_SAMPLING_Msk & ((value) << PORT_CTRL_SAMPLING_Pos)))
+#define PORT_CTRL_MASK              0xFFFFFFFFu  /**< \brief (PORT_CTRL) MASK Register */
+
+/* -------- PORT_WRCONFIG : (PORT Offset: 0x28) ( /W 32) GROUP Write Configuration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PINMASK:16;       /*!< bit:  0..15  Pin Mask for Multiple Pin Configuration */
+    uint32_t PMUXEN:1;         /*!< bit:     16  Peripheral Multiplexer Enable      */
+    uint32_t INEN:1;           /*!< bit:     17  Input Enable                       */
+    uint32_t PULLEN:1;         /*!< bit:     18  Pull Enable                        */
+    uint32_t :3;               /*!< bit: 19..21  Reserved                           */
+    uint32_t DRVSTR:1;         /*!< bit:     22  Output Driver Strength Selection   */
+    uint32_t :1;               /*!< bit:     23  Reserved                           */
+    uint32_t PMUX:4;           /*!< bit: 24..27  Peripheral Multiplexing            */
+    uint32_t WRPMUX:1;         /*!< bit:     28  Write PMUX                         */
+    uint32_t :1;               /*!< bit:     29  Reserved                           */
+    uint32_t WRPINCFG:1;       /*!< bit:     30  Write PINCFG                       */
+    uint32_t HWSEL:1;          /*!< bit:     31  Half-Word Select                   */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} PORT_WRCONFIG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_WRCONFIG_OFFSET        0x28         /**< \brief (PORT_WRCONFIG offset) Write Configuration */
+#define PORT_WRCONFIG_RESETVALUE    0x00000000   /**< \brief (PORT_WRCONFIG reset_value) Write Configuration */
+
+#define PORT_WRCONFIG_PINMASK_Pos   0            /**< \brief (PORT_WRCONFIG) Pin Mask for Multiple Pin Configuration */
+#define PORT_WRCONFIG_PINMASK_Msk   (0xFFFFu << PORT_WRCONFIG_PINMASK_Pos)
+#define PORT_WRCONFIG_PINMASK(value) ((PORT_WRCONFIG_PINMASK_Msk & ((value) << PORT_WRCONFIG_PINMASK_Pos)))
+#define PORT_WRCONFIG_PMUXEN_Pos    16           /**< \brief (PORT_WRCONFIG) Peripheral Multiplexer Enable */
+#define PORT_WRCONFIG_PMUXEN        (0x1u << PORT_WRCONFIG_PMUXEN_Pos)
+#define PORT_WRCONFIG_INEN_Pos      17           /**< \brief (PORT_WRCONFIG) Input Enable */
+#define PORT_WRCONFIG_INEN          (0x1u << PORT_WRCONFIG_INEN_Pos)
+#define PORT_WRCONFIG_PULLEN_Pos    18           /**< \brief (PORT_WRCONFIG) Pull Enable */
+#define PORT_WRCONFIG_PULLEN        (0x1u << PORT_WRCONFIG_PULLEN_Pos)
+#define PORT_WRCONFIG_DRVSTR_Pos    22           /**< \brief (PORT_WRCONFIG) Output Driver Strength Selection */
+#define PORT_WRCONFIG_DRVSTR        (0x1u << PORT_WRCONFIG_DRVSTR_Pos)
+#define PORT_WRCONFIG_PMUX_Pos      24           /**< \brief (PORT_WRCONFIG) Peripheral Multiplexing */
+#define PORT_WRCONFIG_PMUX_Msk      (0xFu << PORT_WRCONFIG_PMUX_Pos)
+#define PORT_WRCONFIG_PMUX(value)   ((PORT_WRCONFIG_PMUX_Msk & ((value) << PORT_WRCONFIG_PMUX_Pos)))
+#define PORT_WRCONFIG_WRPMUX_Pos    28           /**< \brief (PORT_WRCONFIG) Write PMUX */
+#define PORT_WRCONFIG_WRPMUX        (0x1u << PORT_WRCONFIG_WRPMUX_Pos)
+#define PORT_WRCONFIG_WRPINCFG_Pos  30           /**< \brief (PORT_WRCONFIG) Write PINCFG */
+#define PORT_WRCONFIG_WRPINCFG      (0x1u << PORT_WRCONFIG_WRPINCFG_Pos)
+#define PORT_WRCONFIG_HWSEL_Pos     31           /**< \brief (PORT_WRCONFIG) Half-Word Select */
+#define PORT_WRCONFIG_HWSEL         (0x1u << PORT_WRCONFIG_HWSEL_Pos)
+#define PORT_WRCONFIG_MASK          0xDF47FFFFu  /**< \brief (PORT_WRCONFIG) MASK Register */
+
+/* -------- PORT_PMUX : (PORT Offset: 0x30) (R/W  8) GROUP Peripheral Multiplexing n -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PMUXE:4;          /*!< bit:  0.. 3  Peripheral Multiplexing Even       */
+    uint8_t  PMUXO:4;          /*!< bit:  4.. 7  Peripheral Multiplexing Odd        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PORT_PMUX_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_PMUX_OFFSET            0x30         /**< \brief (PORT_PMUX offset) Peripheral Multiplexing n */
+#define PORT_PMUX_RESETVALUE        0x00         /**< \brief (PORT_PMUX reset_value) Peripheral Multiplexing n */
+
+#define PORT_PMUX_PMUXE_Pos         0            /**< \brief (PORT_PMUX) Peripheral Multiplexing Even */
+#define PORT_PMUX_PMUXE_Msk         (0xFu << PORT_PMUX_PMUXE_Pos)
+#define PORT_PMUX_PMUXE(value)      ((PORT_PMUX_PMUXE_Msk & ((value) << PORT_PMUX_PMUXE_Pos)))
+#define   PORT_PMUX_PMUXE_A_Val           0x0u   /**< \brief (PORT_PMUX) Peripheral function A selected */
+#define   PORT_PMUX_PMUXE_B_Val           0x1u   /**< \brief (PORT_PMUX) Peripheral function B selected */
+#define   PORT_PMUX_PMUXE_C_Val           0x2u   /**< \brief (PORT_PMUX) Peripheral function C selected */
+#define   PORT_PMUX_PMUXE_D_Val           0x3u   /**< \brief (PORT_PMUX) Peripheral function D selected */
+#define   PORT_PMUX_PMUXE_E_Val           0x4u   /**< \brief (PORT_PMUX) Peripheral function E selected */
+#define   PORT_PMUX_PMUXE_F_Val           0x5u   /**< \brief (PORT_PMUX) Peripheral function F selected */
+#define   PORT_PMUX_PMUXE_G_Val           0x6u   /**< \brief (PORT_PMUX) Peripheral function G selected */
+#define   PORT_PMUX_PMUXE_H_Val           0x7u   /**< \brief (PORT_PMUX) Peripheral function H selected */
+#define PORT_PMUX_PMUXE_A           (PORT_PMUX_PMUXE_A_Val         << PORT_PMUX_PMUXE_Pos)
+#define PORT_PMUX_PMUXE_B           (PORT_PMUX_PMUXE_B_Val         << PORT_PMUX_PMUXE_Pos)
+#define PORT_PMUX_PMUXE_C           (PORT_PMUX_PMUXE_C_Val         << PORT_PMUX_PMUXE_Pos)
+#define PORT_PMUX_PMUXE_D           (PORT_PMUX_PMUXE_D_Val         << PORT_PMUX_PMUXE_Pos)
+#define PORT_PMUX_PMUXE_E           (PORT_PMUX_PMUXE_E_Val         << PORT_PMUX_PMUXE_Pos)
+#define PORT_PMUX_PMUXE_F           (PORT_PMUX_PMUXE_F_Val         << PORT_PMUX_PMUXE_Pos)
+#define PORT_PMUX_PMUXE_G           (PORT_PMUX_PMUXE_G_Val         << PORT_PMUX_PMUXE_Pos)
+#define PORT_PMUX_PMUXE_H           (PORT_PMUX_PMUXE_H_Val         << PORT_PMUX_PMUXE_Pos)
+#define PORT_PMUX_PMUXO_Pos         4            /**< \brief (PORT_PMUX) Peripheral Multiplexing Odd */
+#define PORT_PMUX_PMUXO_Msk         (0xFu << PORT_PMUX_PMUXO_Pos)
+#define PORT_PMUX_PMUXO(value)      ((PORT_PMUX_PMUXO_Msk & ((value) << PORT_PMUX_PMUXO_Pos)))
+#define   PORT_PMUX_PMUXO_A_Val           0x0u   /**< \brief (PORT_PMUX) Peripheral function A selected */
+#define   PORT_PMUX_PMUXO_B_Val           0x1u   /**< \brief (PORT_PMUX) Peripheral function B selected */
+#define   PORT_PMUX_PMUXO_C_Val           0x2u   /**< \brief (PORT_PMUX) Peripheral function C selected */
+#define   PORT_PMUX_PMUXO_D_Val           0x3u   /**< \brief (PORT_PMUX) Peripheral function D selected */
+#define   PORT_PMUX_PMUXO_E_Val           0x4u   /**< \brief (PORT_PMUX) Peripheral function E selected */
+#define   PORT_PMUX_PMUXO_F_Val           0x5u   /**< \brief (PORT_PMUX) Peripheral function F selected */
+#define   PORT_PMUX_PMUXO_G_Val           0x6u   /**< \brief (PORT_PMUX) Peripheral function G selected */
+#define   PORT_PMUX_PMUXO_H_Val           0x7u   /**< \brief (PORT_PMUX) Peripheral function H selected */
+#define PORT_PMUX_PMUXO_A           (PORT_PMUX_PMUXO_A_Val         << PORT_PMUX_PMUXO_Pos)
+#define PORT_PMUX_PMUXO_B           (PORT_PMUX_PMUXO_B_Val         << PORT_PMUX_PMUXO_Pos)
+#define PORT_PMUX_PMUXO_C           (PORT_PMUX_PMUXO_C_Val         << PORT_PMUX_PMUXO_Pos)
+#define PORT_PMUX_PMUXO_D           (PORT_PMUX_PMUXO_D_Val         << PORT_PMUX_PMUXO_Pos)
+#define PORT_PMUX_PMUXO_E           (PORT_PMUX_PMUXO_E_Val         << PORT_PMUX_PMUXO_Pos)
+#define PORT_PMUX_PMUXO_F           (PORT_PMUX_PMUXO_F_Val         << PORT_PMUX_PMUXO_Pos)
+#define PORT_PMUX_PMUXO_G           (PORT_PMUX_PMUXO_G_Val         << PORT_PMUX_PMUXO_Pos)
+#define PORT_PMUX_PMUXO_H           (PORT_PMUX_PMUXO_H_Val         << PORT_PMUX_PMUXO_Pos)
+#define PORT_PMUX_MASK              0xFFu        /**< \brief (PORT_PMUX) MASK Register */
+
+/* -------- PORT_PINCFG : (PORT Offset: 0x40) (R/W  8) GROUP Pin Configuration n -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PMUXEN:1;         /*!< bit:      0  Peripheral Multiplexer Enable      */
+    uint8_t  INEN:1;           /*!< bit:      1  Input Enable                       */
+    uint8_t  PULLEN:1;         /*!< bit:      2  Pull Enable                        */
+    uint8_t  :3;               /*!< bit:  3.. 5  Reserved                           */
+    uint8_t  DRVSTR:1;         /*!< bit:      6  Output Driver Strength Selection   */
+    uint8_t  :1;               /*!< bit:      7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} PORT_PINCFG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define PORT_PINCFG_OFFSET          0x40         /**< \brief (PORT_PINCFG offset) Pin Configuration n */
+#define PORT_PINCFG_RESETVALUE      0x00         /**< \brief (PORT_PINCFG reset_value) Pin Configuration n */
+
+#define PORT_PINCFG_PMUXEN_Pos      0            /**< \brief (PORT_PINCFG) Peripheral Multiplexer Enable */
+#define PORT_PINCFG_PMUXEN          (0x1u << PORT_PINCFG_PMUXEN_Pos)
+#define PORT_PINCFG_INEN_Pos        1            /**< \brief (PORT_PINCFG) Input Enable */
+#define PORT_PINCFG_INEN            (0x1u << PORT_PINCFG_INEN_Pos)
+#define PORT_PINCFG_PULLEN_Pos      2            /**< \brief (PORT_PINCFG) Pull Enable */
+#define PORT_PINCFG_PULLEN          (0x1u << PORT_PINCFG_PULLEN_Pos)
+#define PORT_PINCFG_DRVSTR_Pos      6            /**< \brief (PORT_PINCFG) Output Driver Strength Selection */
+#define PORT_PINCFG_DRVSTR          (0x1u << PORT_PINCFG_DRVSTR_Pos)
+#define PORT_PINCFG_MASK            0x47u        /**< \brief (PORT_PINCFG) MASK Register */
+
+/** \brief PortGroup hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO PORT_DIR_Type             DIR;         /**< \brief Offset: 0x00 (R/W 32) Data Direction */
+  __IO PORT_DIRCLR_Type          DIRCLR;      /**< \brief Offset: 0x04 (R/W 32) Data Direction Clear */
+  __IO PORT_DIRSET_Type          DIRSET;      /**< \brief Offset: 0x08 (R/W 32) Data Direction Set */
+  __IO PORT_DIRTGL_Type          DIRTGL;      /**< \brief Offset: 0x0C (R/W 32) Data Direction Toggle */
+  __IO PORT_OUT_Type             OUT;         /**< \brief Offset: 0x10 (R/W 32) Data Output Value */
+  __IO PORT_OUTCLR_Type          OUTCLR;      /**< \brief Offset: 0x14 (R/W 32) Data Output Value Clear */
+  __IO PORT_OUTSET_Type          OUTSET;      /**< \brief Offset: 0x18 (R/W 32) Data Output Value Set */
+  __IO PORT_OUTTGL_Type          OUTTGL;      /**< \brief Offset: 0x1C (R/W 32) Data Output Value Toggle */
+  __I  PORT_IN_Type              IN;          /**< \brief Offset: 0x20 (R/  32) Data Input Value */
+  __IO PORT_CTRL_Type            CTRL;        /**< \brief Offset: 0x24 (R/W 32) Control */
+  __O  PORT_WRCONFIG_Type        WRCONFIG;    /**< \brief Offset: 0x28 ( /W 32) Write Configuration */
+       RoReg8                    Reserved1[0x4];
+  __IO PORT_PMUX_Type            PMUX[16];    /**< \brief Offset: 0x30 (R/W  8) Peripheral Multiplexing n */
+  __IO PORT_PINCFG_Type          PINCFG[32];  /**< \brief Offset: 0x40 (R/W  8) Pin Configuration n */
+       RoReg8                    Reserved2[0x20];
+} PortGroup;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief PORT APB hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+       PortGroup                 Group[3];    /**< \brief Offset: 0x00 PortGroup groups [GROUPS] */
+} Port;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#define SECTION_PORT_IOBUS
+
+/*@}*/
+
+#endif /* _SAMD21_PORT_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/rtc.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/rtc.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/rtc.h	(revision 136)
@@ -0,0 +1,1062 @@
+/**
+ * \file
+ *
+ * \brief Component description for RTC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_RTC_COMPONENT_
+#define _SAMD21_RTC_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR RTC */
+/* ========================================================================== */
+/** \addtogroup SAMD21_RTC Real-Time Counter */
+/*@{*/
+
+#define RTC_U2202
+#define REV_RTC                     0x101
+
+/* -------- RTC_MODE0_CTRL : (RTC Offset: 0x00) (R/W 16) MODE0 MODE0 Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint16_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint16_t MODE:2;           /*!< bit:  2.. 3  Operating Mode                     */
+    uint16_t :3;               /*!< bit:  4.. 6  Reserved                           */
+    uint16_t MATCHCLR:1;       /*!< bit:      7  Clear on Match                     */
+    uint16_t PRESCALER:4;      /*!< bit:  8..11  Prescaler                          */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_MODE0_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE0_CTRL_OFFSET       0x00         /**< \brief (RTC_MODE0_CTRL offset) MODE0 Control */
+#define RTC_MODE0_CTRL_RESETVALUE   0x0000       /**< \brief (RTC_MODE0_CTRL reset_value) MODE0 Control */
+
+#define RTC_MODE0_CTRL_SWRST_Pos    0            /**< \brief (RTC_MODE0_CTRL) Software Reset */
+#define RTC_MODE0_CTRL_SWRST        (0x1u << RTC_MODE0_CTRL_SWRST_Pos)
+#define RTC_MODE0_CTRL_ENABLE_Pos   1            /**< \brief (RTC_MODE0_CTRL) Enable */
+#define RTC_MODE0_CTRL_ENABLE       (0x1u << RTC_MODE0_CTRL_ENABLE_Pos)
+#define RTC_MODE0_CTRL_MODE_Pos     2            /**< \brief (RTC_MODE0_CTRL) Operating Mode */
+#define RTC_MODE0_CTRL_MODE_Msk     (0x3u << RTC_MODE0_CTRL_MODE_Pos)
+#define RTC_MODE0_CTRL_MODE(value)  ((RTC_MODE0_CTRL_MODE_Msk & ((value) << RTC_MODE0_CTRL_MODE_Pos)))
+#define   RTC_MODE0_CTRL_MODE_COUNT32_Val 0x0u   /**< \brief (RTC_MODE0_CTRL) Mode 0: 32-bit Counter */
+#define   RTC_MODE0_CTRL_MODE_COUNT16_Val 0x1u   /**< \brief (RTC_MODE0_CTRL) Mode 1: 16-bit Counter */
+#define   RTC_MODE0_CTRL_MODE_CLOCK_Val   0x2u   /**< \brief (RTC_MODE0_CTRL) Mode 2: Clock/Calendar */
+#define RTC_MODE0_CTRL_MODE_COUNT32 (RTC_MODE0_CTRL_MODE_COUNT32_Val << RTC_MODE0_CTRL_MODE_Pos)
+#define RTC_MODE0_CTRL_MODE_COUNT16 (RTC_MODE0_CTRL_MODE_COUNT16_Val << RTC_MODE0_CTRL_MODE_Pos)
+#define RTC_MODE0_CTRL_MODE_CLOCK   (RTC_MODE0_CTRL_MODE_CLOCK_Val << RTC_MODE0_CTRL_MODE_Pos)
+#define RTC_MODE0_CTRL_MATCHCLR_Pos 7            /**< \brief (RTC_MODE0_CTRL) Clear on Match */
+#define RTC_MODE0_CTRL_MATCHCLR     (0x1u << RTC_MODE0_CTRL_MATCHCLR_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_Pos 8            /**< \brief (RTC_MODE0_CTRL) Prescaler */
+#define RTC_MODE0_CTRL_PRESCALER_Msk (0xFu << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER(value) ((RTC_MODE0_CTRL_PRESCALER_Msk & ((value) << RTC_MODE0_CTRL_PRESCALER_Pos)))
+#define   RTC_MODE0_CTRL_PRESCALER_DIV1_Val 0x0u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/1 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV2_Val 0x1u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/2 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV4_Val 0x2u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/4 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV8_Val 0x3u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/8 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV16_Val 0x4u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/16 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV32_Val 0x5u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/32 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV64_Val 0x6u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/64 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV128_Val 0x7u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/128 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV256_Val 0x8u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/256 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV512_Val 0x9u   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/512 */
+#define   RTC_MODE0_CTRL_PRESCALER_DIV1024_Val 0xAu   /**< \brief (RTC_MODE0_CTRL) CLK_RTC_CNT = GCLK_RTC/1024 */
+#define RTC_MODE0_CTRL_PRESCALER_DIV1 (RTC_MODE0_CTRL_PRESCALER_DIV1_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV2 (RTC_MODE0_CTRL_PRESCALER_DIV2_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV4 (RTC_MODE0_CTRL_PRESCALER_DIV4_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV8 (RTC_MODE0_CTRL_PRESCALER_DIV8_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV16 (RTC_MODE0_CTRL_PRESCALER_DIV16_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV32 (RTC_MODE0_CTRL_PRESCALER_DIV32_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV64 (RTC_MODE0_CTRL_PRESCALER_DIV64_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV128 (RTC_MODE0_CTRL_PRESCALER_DIV128_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV256 (RTC_MODE0_CTRL_PRESCALER_DIV256_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV512 (RTC_MODE0_CTRL_PRESCALER_DIV512_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_PRESCALER_DIV1024 (RTC_MODE0_CTRL_PRESCALER_DIV1024_Val << RTC_MODE0_CTRL_PRESCALER_Pos)
+#define RTC_MODE0_CTRL_MASK         0x0F8Fu      /**< \brief (RTC_MODE0_CTRL) MASK Register */
+
+/* -------- RTC_MODE1_CTRL : (RTC Offset: 0x00) (R/W 16) MODE1 MODE1 Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint16_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint16_t MODE:2;           /*!< bit:  2.. 3  Operating Mode                     */
+    uint16_t :4;               /*!< bit:  4.. 7  Reserved                           */
+    uint16_t PRESCALER:4;      /*!< bit:  8..11  Prescaler                          */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_MODE1_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE1_CTRL_OFFSET       0x00         /**< \brief (RTC_MODE1_CTRL offset) MODE1 Control */
+#define RTC_MODE1_CTRL_RESETVALUE   0x0000       /**< \brief (RTC_MODE1_CTRL reset_value) MODE1 Control */
+
+#define RTC_MODE1_CTRL_SWRST_Pos    0            /**< \brief (RTC_MODE1_CTRL) Software Reset */
+#define RTC_MODE1_CTRL_SWRST        (0x1u << RTC_MODE1_CTRL_SWRST_Pos)
+#define RTC_MODE1_CTRL_ENABLE_Pos   1            /**< \brief (RTC_MODE1_CTRL) Enable */
+#define RTC_MODE1_CTRL_ENABLE       (0x1u << RTC_MODE1_CTRL_ENABLE_Pos)
+#define RTC_MODE1_CTRL_MODE_Pos     2            /**< \brief (RTC_MODE1_CTRL) Operating Mode */
+#define RTC_MODE1_CTRL_MODE_Msk     (0x3u << RTC_MODE1_CTRL_MODE_Pos)
+#define RTC_MODE1_CTRL_MODE(value)  ((RTC_MODE1_CTRL_MODE_Msk & ((value) << RTC_MODE1_CTRL_MODE_Pos)))
+#define   RTC_MODE1_CTRL_MODE_COUNT32_Val 0x0u   /**< \brief (RTC_MODE1_CTRL) Mode 0: 32-bit Counter */
+#define   RTC_MODE1_CTRL_MODE_COUNT16_Val 0x1u   /**< \brief (RTC_MODE1_CTRL) Mode 1: 16-bit Counter */
+#define   RTC_MODE1_CTRL_MODE_CLOCK_Val   0x2u   /**< \brief (RTC_MODE1_CTRL) Mode 2: Clock/Calendar */
+#define RTC_MODE1_CTRL_MODE_COUNT32 (RTC_MODE1_CTRL_MODE_COUNT32_Val << RTC_MODE1_CTRL_MODE_Pos)
+#define RTC_MODE1_CTRL_MODE_COUNT16 (RTC_MODE1_CTRL_MODE_COUNT16_Val << RTC_MODE1_CTRL_MODE_Pos)
+#define RTC_MODE1_CTRL_MODE_CLOCK   (RTC_MODE1_CTRL_MODE_CLOCK_Val << RTC_MODE1_CTRL_MODE_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_Pos 8            /**< \brief (RTC_MODE1_CTRL) Prescaler */
+#define RTC_MODE1_CTRL_PRESCALER_Msk (0xFu << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER(value) ((RTC_MODE1_CTRL_PRESCALER_Msk & ((value) << RTC_MODE1_CTRL_PRESCALER_Pos)))
+#define   RTC_MODE1_CTRL_PRESCALER_DIV1_Val 0x0u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/1 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV2_Val 0x1u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/2 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV4_Val 0x2u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/4 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV8_Val 0x3u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/8 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV16_Val 0x4u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/16 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV32_Val 0x5u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/32 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV64_Val 0x6u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/64 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV128_Val 0x7u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/128 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV256_Val 0x8u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/256 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV512_Val 0x9u   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/512 */
+#define   RTC_MODE1_CTRL_PRESCALER_DIV1024_Val 0xAu   /**< \brief (RTC_MODE1_CTRL) CLK_RTC_CNT = GCLK_RTC/1024 */
+#define RTC_MODE1_CTRL_PRESCALER_DIV1 (RTC_MODE1_CTRL_PRESCALER_DIV1_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV2 (RTC_MODE1_CTRL_PRESCALER_DIV2_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV4 (RTC_MODE1_CTRL_PRESCALER_DIV4_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV8 (RTC_MODE1_CTRL_PRESCALER_DIV8_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV16 (RTC_MODE1_CTRL_PRESCALER_DIV16_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV32 (RTC_MODE1_CTRL_PRESCALER_DIV32_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV64 (RTC_MODE1_CTRL_PRESCALER_DIV64_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV128 (RTC_MODE1_CTRL_PRESCALER_DIV128_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV256 (RTC_MODE1_CTRL_PRESCALER_DIV256_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV512 (RTC_MODE1_CTRL_PRESCALER_DIV512_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_PRESCALER_DIV1024 (RTC_MODE1_CTRL_PRESCALER_DIV1024_Val << RTC_MODE1_CTRL_PRESCALER_Pos)
+#define RTC_MODE1_CTRL_MASK         0x0F0Fu      /**< \brief (RTC_MODE1_CTRL) MASK Register */
+
+/* -------- RTC_MODE2_CTRL : (RTC Offset: 0x00) (R/W 16) MODE2 MODE2 Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint16_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint16_t MODE:2;           /*!< bit:  2.. 3  Operating Mode                     */
+    uint16_t :2;               /*!< bit:  4.. 5  Reserved                           */
+    uint16_t CLKREP:1;         /*!< bit:      6  Clock Representation               */
+    uint16_t MATCHCLR:1;       /*!< bit:      7  Clear on Match                     */
+    uint16_t PRESCALER:4;      /*!< bit:  8..11  Prescaler                          */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_MODE2_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE2_CTRL_OFFSET       0x00         /**< \brief (RTC_MODE2_CTRL offset) MODE2 Control */
+#define RTC_MODE2_CTRL_RESETVALUE   0x0000       /**< \brief (RTC_MODE2_CTRL reset_value) MODE2 Control */
+
+#define RTC_MODE2_CTRL_SWRST_Pos    0            /**< \brief (RTC_MODE2_CTRL) Software Reset */
+#define RTC_MODE2_CTRL_SWRST        (0x1u << RTC_MODE2_CTRL_SWRST_Pos)
+#define RTC_MODE2_CTRL_ENABLE_Pos   1            /**< \brief (RTC_MODE2_CTRL) Enable */
+#define RTC_MODE2_CTRL_ENABLE       (0x1u << RTC_MODE2_CTRL_ENABLE_Pos)
+#define RTC_MODE2_CTRL_MODE_Pos     2            /**< \brief (RTC_MODE2_CTRL) Operating Mode */
+#define RTC_MODE2_CTRL_MODE_Msk     (0x3u << RTC_MODE2_CTRL_MODE_Pos)
+#define RTC_MODE2_CTRL_MODE(value)  ((RTC_MODE2_CTRL_MODE_Msk & ((value) << RTC_MODE2_CTRL_MODE_Pos)))
+#define   RTC_MODE2_CTRL_MODE_COUNT32_Val 0x0u   /**< \brief (RTC_MODE2_CTRL) Mode 0: 32-bit Counter */
+#define   RTC_MODE2_CTRL_MODE_COUNT16_Val 0x1u   /**< \brief (RTC_MODE2_CTRL) Mode 1: 16-bit Counter */
+#define   RTC_MODE2_CTRL_MODE_CLOCK_Val   0x2u   /**< \brief (RTC_MODE2_CTRL) Mode 2: Clock/Calendar */
+#define RTC_MODE2_CTRL_MODE_COUNT32 (RTC_MODE2_CTRL_MODE_COUNT32_Val << RTC_MODE2_CTRL_MODE_Pos)
+#define RTC_MODE2_CTRL_MODE_COUNT16 (RTC_MODE2_CTRL_MODE_COUNT16_Val << RTC_MODE2_CTRL_MODE_Pos)
+#define RTC_MODE2_CTRL_MODE_CLOCK   (RTC_MODE2_CTRL_MODE_CLOCK_Val << RTC_MODE2_CTRL_MODE_Pos)
+#define RTC_MODE2_CTRL_CLKREP_Pos   6            /**< \brief (RTC_MODE2_CTRL) Clock Representation */
+#define RTC_MODE2_CTRL_CLKREP       (0x1u << RTC_MODE2_CTRL_CLKREP_Pos)
+#define RTC_MODE2_CTRL_MATCHCLR_Pos 7            /**< \brief (RTC_MODE2_CTRL) Clear on Match */
+#define RTC_MODE2_CTRL_MATCHCLR     (0x1u << RTC_MODE2_CTRL_MATCHCLR_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_Pos 8            /**< \brief (RTC_MODE2_CTRL) Prescaler */
+#define RTC_MODE2_CTRL_PRESCALER_Msk (0xFu << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER(value) ((RTC_MODE2_CTRL_PRESCALER_Msk & ((value) << RTC_MODE2_CTRL_PRESCALER_Pos)))
+#define   RTC_MODE2_CTRL_PRESCALER_DIV1_Val 0x0u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/1 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV2_Val 0x1u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/2 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV4_Val 0x2u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/4 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV8_Val 0x3u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/8 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV16_Val 0x4u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/16 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV32_Val 0x5u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/32 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV64_Val 0x6u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/64 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV128_Val 0x7u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/128 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV256_Val 0x8u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/256 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV512_Val 0x9u   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/512 */
+#define   RTC_MODE2_CTRL_PRESCALER_DIV1024_Val 0xAu   /**< \brief (RTC_MODE2_CTRL) CLK_RTC_CNT = GCLK_RTC/1024 */
+#define RTC_MODE2_CTRL_PRESCALER_DIV1 (RTC_MODE2_CTRL_PRESCALER_DIV1_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV2 (RTC_MODE2_CTRL_PRESCALER_DIV2_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV4 (RTC_MODE2_CTRL_PRESCALER_DIV4_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV8 (RTC_MODE2_CTRL_PRESCALER_DIV8_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV16 (RTC_MODE2_CTRL_PRESCALER_DIV16_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV32 (RTC_MODE2_CTRL_PRESCALER_DIV32_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV64 (RTC_MODE2_CTRL_PRESCALER_DIV64_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV128 (RTC_MODE2_CTRL_PRESCALER_DIV128_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV256 (RTC_MODE2_CTRL_PRESCALER_DIV256_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV512 (RTC_MODE2_CTRL_PRESCALER_DIV512_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_PRESCALER_DIV1024 (RTC_MODE2_CTRL_PRESCALER_DIV1024_Val << RTC_MODE2_CTRL_PRESCALER_Pos)
+#define RTC_MODE2_CTRL_MASK         0x0FCFu      /**< \brief (RTC_MODE2_CTRL) MASK Register */
+
+/* -------- RTC_READREQ : (RTC Offset: 0x02) (R/W 16) Read Request -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t ADDR:6;           /*!< bit:  0.. 5  Address                            */
+    uint16_t :8;               /*!< bit:  6..13  Reserved                           */
+    uint16_t RCONT:1;          /*!< bit:     14  Read Continuously                  */
+    uint16_t RREQ:1;           /*!< bit:     15  Read Request                       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_READREQ_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_READREQ_OFFSET          0x02         /**< \brief (RTC_READREQ offset) Read Request */
+#define RTC_READREQ_RESETVALUE      0x0010       /**< \brief (RTC_READREQ reset_value) Read Request */
+
+#define RTC_READREQ_ADDR_Pos        0            /**< \brief (RTC_READREQ) Address */
+#define RTC_READREQ_ADDR_Msk        (0x3Fu << RTC_READREQ_ADDR_Pos)
+#define RTC_READREQ_ADDR(value)     ((RTC_READREQ_ADDR_Msk & ((value) << RTC_READREQ_ADDR_Pos)))
+#define RTC_READREQ_RCONT_Pos       14           /**< \brief (RTC_READREQ) Read Continuously */
+#define RTC_READREQ_RCONT           (0x1u << RTC_READREQ_RCONT_Pos)
+#define RTC_READREQ_RREQ_Pos        15           /**< \brief (RTC_READREQ) Read Request */
+#define RTC_READREQ_RREQ            (0x1u << RTC_READREQ_RREQ_Pos)
+#define RTC_READREQ_MASK            0xC03Fu      /**< \brief (RTC_READREQ) MASK Register */
+
+/* -------- RTC_MODE0_EVCTRL : (RTC Offset: 0x04) (R/W 16) MODE0 MODE0 Event Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t PEREO0:1;         /*!< bit:      0  Periodic Interval 0 Event Output Enable */
+    uint16_t PEREO1:1;         /*!< bit:      1  Periodic Interval 1 Event Output Enable */
+    uint16_t PEREO2:1;         /*!< bit:      2  Periodic Interval 2 Event Output Enable */
+    uint16_t PEREO3:1;         /*!< bit:      3  Periodic Interval 3 Event Output Enable */
+    uint16_t PEREO4:1;         /*!< bit:      4  Periodic Interval 4 Event Output Enable */
+    uint16_t PEREO5:1;         /*!< bit:      5  Periodic Interval 5 Event Output Enable */
+    uint16_t PEREO6:1;         /*!< bit:      6  Periodic Interval 6 Event Output Enable */
+    uint16_t PEREO7:1;         /*!< bit:      7  Periodic Interval 7 Event Output Enable */
+    uint16_t CMPEO0:1;         /*!< bit:      8  Compare 0 Event Output Enable      */
+    uint16_t :6;               /*!< bit:  9..14  Reserved                           */
+    uint16_t OVFEO:1;          /*!< bit:     15  Overflow Event Output Enable       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t PEREO:8;          /*!< bit:  0.. 7  Periodic Interval x Event Output Enable */
+    uint16_t CMPEO:1;          /*!< bit:      8  Compare x Event Output Enable      */
+    uint16_t :7;               /*!< bit:  9..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_MODE0_EVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE0_EVCTRL_OFFSET     0x04         /**< \brief (RTC_MODE0_EVCTRL offset) MODE0 Event Control */
+#define RTC_MODE0_EVCTRL_RESETVALUE 0x0000       /**< \brief (RTC_MODE0_EVCTRL reset_value) MODE0 Event Control */
+
+#define RTC_MODE0_EVCTRL_PEREO0_Pos 0            /**< \brief (RTC_MODE0_EVCTRL) Periodic Interval 0 Event Output Enable */
+#define RTC_MODE0_EVCTRL_PEREO0     (1 << RTC_MODE0_EVCTRL_PEREO0_Pos)
+#define RTC_MODE0_EVCTRL_PEREO1_Pos 1            /**< \brief (RTC_MODE0_EVCTRL) Periodic Interval 1 Event Output Enable */
+#define RTC_MODE0_EVCTRL_PEREO1     (1 << RTC_MODE0_EVCTRL_PEREO1_Pos)
+#define RTC_MODE0_EVCTRL_PEREO2_Pos 2            /**< \brief (RTC_MODE0_EVCTRL) Periodic Interval 2 Event Output Enable */
+#define RTC_MODE0_EVCTRL_PEREO2     (1 << RTC_MODE0_EVCTRL_PEREO2_Pos)
+#define RTC_MODE0_EVCTRL_PEREO3_Pos 3            /**< \brief (RTC_MODE0_EVCTRL) Periodic Interval 3 Event Output Enable */
+#define RTC_MODE0_EVCTRL_PEREO3     (1 << RTC_MODE0_EVCTRL_PEREO3_Pos)
+#define RTC_MODE0_EVCTRL_PEREO4_Pos 4            /**< \brief (RTC_MODE0_EVCTRL) Periodic Interval 4 Event Output Enable */
+#define RTC_MODE0_EVCTRL_PEREO4     (1 << RTC_MODE0_EVCTRL_PEREO4_Pos)
+#define RTC_MODE0_EVCTRL_PEREO5_Pos 5            /**< \brief (RTC_MODE0_EVCTRL) Periodic Interval 5 Event Output Enable */
+#define RTC_MODE0_EVCTRL_PEREO5     (1 << RTC_MODE0_EVCTRL_PEREO5_Pos)
+#define RTC_MODE0_EVCTRL_PEREO6_Pos 6            /**< \brief (RTC_MODE0_EVCTRL) Periodic Interval 6 Event Output Enable */
+#define RTC_MODE0_EVCTRL_PEREO6     (1 << RTC_MODE0_EVCTRL_PEREO6_Pos)
+#define RTC_MODE0_EVCTRL_PEREO7_Pos 7            /**< \brief (RTC_MODE0_EVCTRL) Periodic Interval 7 Event Output Enable */
+#define RTC_MODE0_EVCTRL_PEREO7     (1 << RTC_MODE0_EVCTRL_PEREO7_Pos)
+#define RTC_MODE0_EVCTRL_PEREO_Pos  0            /**< \brief (RTC_MODE0_EVCTRL) Periodic Interval x Event Output Enable */
+#define RTC_MODE0_EVCTRL_PEREO_Msk  (0xFFu << RTC_MODE0_EVCTRL_PEREO_Pos)
+#define RTC_MODE0_EVCTRL_PEREO(value) ((RTC_MODE0_EVCTRL_PEREO_Msk & ((value) << RTC_MODE0_EVCTRL_PEREO_Pos)))
+#define RTC_MODE0_EVCTRL_CMPEO0_Pos 8            /**< \brief (RTC_MODE0_EVCTRL) Compare 0 Event Output Enable */
+#define RTC_MODE0_EVCTRL_CMPEO0     (1 << RTC_MODE0_EVCTRL_CMPEO0_Pos)
+#define RTC_MODE0_EVCTRL_CMPEO_Pos  8            /**< \brief (RTC_MODE0_EVCTRL) Compare x Event Output Enable */
+#define RTC_MODE0_EVCTRL_CMPEO_Msk  (0x1u << RTC_MODE0_EVCTRL_CMPEO_Pos)
+#define RTC_MODE0_EVCTRL_CMPEO(value) ((RTC_MODE0_EVCTRL_CMPEO_Msk & ((value) << RTC_MODE0_EVCTRL_CMPEO_Pos)))
+#define RTC_MODE0_EVCTRL_OVFEO_Pos  15           /**< \brief (RTC_MODE0_EVCTRL) Overflow Event Output Enable */
+#define RTC_MODE0_EVCTRL_OVFEO      (0x1u << RTC_MODE0_EVCTRL_OVFEO_Pos)
+#define RTC_MODE0_EVCTRL_MASK       0x81FFu      /**< \brief (RTC_MODE0_EVCTRL) MASK Register */
+
+/* -------- RTC_MODE1_EVCTRL : (RTC Offset: 0x04) (R/W 16) MODE1 MODE1 Event Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t PEREO0:1;         /*!< bit:      0  Periodic Interval 0 Event Output Enable */
+    uint16_t PEREO1:1;         /*!< bit:      1  Periodic Interval 1 Event Output Enable */
+    uint16_t PEREO2:1;         /*!< bit:      2  Periodic Interval 2 Event Output Enable */
+    uint16_t PEREO3:1;         /*!< bit:      3  Periodic Interval 3 Event Output Enable */
+    uint16_t PEREO4:1;         /*!< bit:      4  Periodic Interval 4 Event Output Enable */
+    uint16_t PEREO5:1;         /*!< bit:      5  Periodic Interval 5 Event Output Enable */
+    uint16_t PEREO6:1;         /*!< bit:      6  Periodic Interval 6 Event Output Enable */
+    uint16_t PEREO7:1;         /*!< bit:      7  Periodic Interval 7 Event Output Enable */
+    uint16_t CMPEO0:1;         /*!< bit:      8  Compare 0 Event Output Enable      */
+    uint16_t CMPEO1:1;         /*!< bit:      9  Compare 1 Event Output Enable      */
+    uint16_t :5;               /*!< bit: 10..14  Reserved                           */
+    uint16_t OVFEO:1;          /*!< bit:     15  Overflow Event Output Enable       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t PEREO:8;          /*!< bit:  0.. 7  Periodic Interval x Event Output Enable */
+    uint16_t CMPEO:2;          /*!< bit:  8.. 9  Compare x Event Output Enable      */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_MODE1_EVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE1_EVCTRL_OFFSET     0x04         /**< \brief (RTC_MODE1_EVCTRL offset) MODE1 Event Control */
+#define RTC_MODE1_EVCTRL_RESETVALUE 0x0000       /**< \brief (RTC_MODE1_EVCTRL reset_value) MODE1 Event Control */
+
+#define RTC_MODE1_EVCTRL_PEREO0_Pos 0            /**< \brief (RTC_MODE1_EVCTRL) Periodic Interval 0 Event Output Enable */
+#define RTC_MODE1_EVCTRL_PEREO0     (1 << RTC_MODE1_EVCTRL_PEREO0_Pos)
+#define RTC_MODE1_EVCTRL_PEREO1_Pos 1            /**< \brief (RTC_MODE1_EVCTRL) Periodic Interval 1 Event Output Enable */
+#define RTC_MODE1_EVCTRL_PEREO1     (1 << RTC_MODE1_EVCTRL_PEREO1_Pos)
+#define RTC_MODE1_EVCTRL_PEREO2_Pos 2            /**< \brief (RTC_MODE1_EVCTRL) Periodic Interval 2 Event Output Enable */
+#define RTC_MODE1_EVCTRL_PEREO2     (1 << RTC_MODE1_EVCTRL_PEREO2_Pos)
+#define RTC_MODE1_EVCTRL_PEREO3_Pos 3            /**< \brief (RTC_MODE1_EVCTRL) Periodic Interval 3 Event Output Enable */
+#define RTC_MODE1_EVCTRL_PEREO3     (1 << RTC_MODE1_EVCTRL_PEREO3_Pos)
+#define RTC_MODE1_EVCTRL_PEREO4_Pos 4            /**< \brief (RTC_MODE1_EVCTRL) Periodic Interval 4 Event Output Enable */
+#define RTC_MODE1_EVCTRL_PEREO4     (1 << RTC_MODE1_EVCTRL_PEREO4_Pos)
+#define RTC_MODE1_EVCTRL_PEREO5_Pos 5            /**< \brief (RTC_MODE1_EVCTRL) Periodic Interval 5 Event Output Enable */
+#define RTC_MODE1_EVCTRL_PEREO5     (1 << RTC_MODE1_EVCTRL_PEREO5_Pos)
+#define RTC_MODE1_EVCTRL_PEREO6_Pos 6            /**< \brief (RTC_MODE1_EVCTRL) Periodic Interval 6 Event Output Enable */
+#define RTC_MODE1_EVCTRL_PEREO6     (1 << RTC_MODE1_EVCTRL_PEREO6_Pos)
+#define RTC_MODE1_EVCTRL_PEREO7_Pos 7            /**< \brief (RTC_MODE1_EVCTRL) Periodic Interval 7 Event Output Enable */
+#define RTC_MODE1_EVCTRL_PEREO7     (1 << RTC_MODE1_EVCTRL_PEREO7_Pos)
+#define RTC_MODE1_EVCTRL_PEREO_Pos  0            /**< \brief (RTC_MODE1_EVCTRL) Periodic Interval x Event Output Enable */
+#define RTC_MODE1_EVCTRL_PEREO_Msk  (0xFFu << RTC_MODE1_EVCTRL_PEREO_Pos)
+#define RTC_MODE1_EVCTRL_PEREO(value) ((RTC_MODE1_EVCTRL_PEREO_Msk & ((value) << RTC_MODE1_EVCTRL_PEREO_Pos)))
+#define RTC_MODE1_EVCTRL_CMPEO0_Pos 8            /**< \brief (RTC_MODE1_EVCTRL) Compare 0 Event Output Enable */
+#define RTC_MODE1_EVCTRL_CMPEO0     (1 << RTC_MODE1_EVCTRL_CMPEO0_Pos)
+#define RTC_MODE1_EVCTRL_CMPEO1_Pos 9            /**< \brief (RTC_MODE1_EVCTRL) Compare 1 Event Output Enable */
+#define RTC_MODE1_EVCTRL_CMPEO1     (1 << RTC_MODE1_EVCTRL_CMPEO1_Pos)
+#define RTC_MODE1_EVCTRL_CMPEO_Pos  8            /**< \brief (RTC_MODE1_EVCTRL) Compare x Event Output Enable */
+#define RTC_MODE1_EVCTRL_CMPEO_Msk  (0x3u << RTC_MODE1_EVCTRL_CMPEO_Pos)
+#define RTC_MODE1_EVCTRL_CMPEO(value) ((RTC_MODE1_EVCTRL_CMPEO_Msk & ((value) << RTC_MODE1_EVCTRL_CMPEO_Pos)))
+#define RTC_MODE1_EVCTRL_OVFEO_Pos  15           /**< \brief (RTC_MODE1_EVCTRL) Overflow Event Output Enable */
+#define RTC_MODE1_EVCTRL_OVFEO      (0x1u << RTC_MODE1_EVCTRL_OVFEO_Pos)
+#define RTC_MODE1_EVCTRL_MASK       0x83FFu      /**< \brief (RTC_MODE1_EVCTRL) MASK Register */
+
+/* -------- RTC_MODE2_EVCTRL : (RTC Offset: 0x04) (R/W 16) MODE2 MODE2 Event Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t PEREO0:1;         /*!< bit:      0  Periodic Interval 0 Event Output Enable */
+    uint16_t PEREO1:1;         /*!< bit:      1  Periodic Interval 1 Event Output Enable */
+    uint16_t PEREO2:1;         /*!< bit:      2  Periodic Interval 2 Event Output Enable */
+    uint16_t PEREO3:1;         /*!< bit:      3  Periodic Interval 3 Event Output Enable */
+    uint16_t PEREO4:1;         /*!< bit:      4  Periodic Interval 4 Event Output Enable */
+    uint16_t PEREO5:1;         /*!< bit:      5  Periodic Interval 5 Event Output Enable */
+    uint16_t PEREO6:1;         /*!< bit:      6  Periodic Interval 6 Event Output Enable */
+    uint16_t PEREO7:1;         /*!< bit:      7  Periodic Interval 7 Event Output Enable */
+    uint16_t ALARMEO0:1;       /*!< bit:      8  Alarm 0 Event Output Enable        */
+    uint16_t :6;               /*!< bit:  9..14  Reserved                           */
+    uint16_t OVFEO:1;          /*!< bit:     15  Overflow Event Output Enable       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t PEREO:8;          /*!< bit:  0.. 7  Periodic Interval x Event Output Enable */
+    uint16_t ALARMEO:1;        /*!< bit:      8  Alarm x Event Output Enable        */
+    uint16_t :7;               /*!< bit:  9..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_MODE2_EVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE2_EVCTRL_OFFSET     0x04         /**< \brief (RTC_MODE2_EVCTRL offset) MODE2 Event Control */
+#define RTC_MODE2_EVCTRL_RESETVALUE 0x0000       /**< \brief (RTC_MODE2_EVCTRL reset_value) MODE2 Event Control */
+
+#define RTC_MODE2_EVCTRL_PEREO0_Pos 0            /**< \brief (RTC_MODE2_EVCTRL) Periodic Interval 0 Event Output Enable */
+#define RTC_MODE2_EVCTRL_PEREO0     (1 << RTC_MODE2_EVCTRL_PEREO0_Pos)
+#define RTC_MODE2_EVCTRL_PEREO1_Pos 1            /**< \brief (RTC_MODE2_EVCTRL) Periodic Interval 1 Event Output Enable */
+#define RTC_MODE2_EVCTRL_PEREO1     (1 << RTC_MODE2_EVCTRL_PEREO1_Pos)
+#define RTC_MODE2_EVCTRL_PEREO2_Pos 2            /**< \brief (RTC_MODE2_EVCTRL) Periodic Interval 2 Event Output Enable */
+#define RTC_MODE2_EVCTRL_PEREO2     (1 << RTC_MODE2_EVCTRL_PEREO2_Pos)
+#define RTC_MODE2_EVCTRL_PEREO3_Pos 3            /**< \brief (RTC_MODE2_EVCTRL) Periodic Interval 3 Event Output Enable */
+#define RTC_MODE2_EVCTRL_PEREO3     (1 << RTC_MODE2_EVCTRL_PEREO3_Pos)
+#define RTC_MODE2_EVCTRL_PEREO4_Pos 4            /**< \brief (RTC_MODE2_EVCTRL) Periodic Interval 4 Event Output Enable */
+#define RTC_MODE2_EVCTRL_PEREO4     (1 << RTC_MODE2_EVCTRL_PEREO4_Pos)
+#define RTC_MODE2_EVCTRL_PEREO5_Pos 5            /**< \brief (RTC_MODE2_EVCTRL) Periodic Interval 5 Event Output Enable */
+#define RTC_MODE2_EVCTRL_PEREO5     (1 << RTC_MODE2_EVCTRL_PEREO5_Pos)
+#define RTC_MODE2_EVCTRL_PEREO6_Pos 6            /**< \brief (RTC_MODE2_EVCTRL) Periodic Interval 6 Event Output Enable */
+#define RTC_MODE2_EVCTRL_PEREO6     (1 << RTC_MODE2_EVCTRL_PEREO6_Pos)
+#define RTC_MODE2_EVCTRL_PEREO7_Pos 7            /**< \brief (RTC_MODE2_EVCTRL) Periodic Interval 7 Event Output Enable */
+#define RTC_MODE2_EVCTRL_PEREO7     (1 << RTC_MODE2_EVCTRL_PEREO7_Pos)
+#define RTC_MODE2_EVCTRL_PEREO_Pos  0            /**< \brief (RTC_MODE2_EVCTRL) Periodic Interval x Event Output Enable */
+#define RTC_MODE2_EVCTRL_PEREO_Msk  (0xFFu << RTC_MODE2_EVCTRL_PEREO_Pos)
+#define RTC_MODE2_EVCTRL_PEREO(value) ((RTC_MODE2_EVCTRL_PEREO_Msk & ((value) << RTC_MODE2_EVCTRL_PEREO_Pos)))
+#define RTC_MODE2_EVCTRL_ALARMEO0_Pos 8            /**< \brief (RTC_MODE2_EVCTRL) Alarm 0 Event Output Enable */
+#define RTC_MODE2_EVCTRL_ALARMEO0   (1 << RTC_MODE2_EVCTRL_ALARMEO0_Pos)
+#define RTC_MODE2_EVCTRL_ALARMEO_Pos 8            /**< \brief (RTC_MODE2_EVCTRL) Alarm x Event Output Enable */
+#define RTC_MODE2_EVCTRL_ALARMEO_Msk (0x1u << RTC_MODE2_EVCTRL_ALARMEO_Pos)
+#define RTC_MODE2_EVCTRL_ALARMEO(value) ((RTC_MODE2_EVCTRL_ALARMEO_Msk & ((value) << RTC_MODE2_EVCTRL_ALARMEO_Pos)))
+#define RTC_MODE2_EVCTRL_OVFEO_Pos  15           /**< \brief (RTC_MODE2_EVCTRL) Overflow Event Output Enable */
+#define RTC_MODE2_EVCTRL_OVFEO      (0x1u << RTC_MODE2_EVCTRL_OVFEO_Pos)
+#define RTC_MODE2_EVCTRL_MASK       0x81FFu      /**< \brief (RTC_MODE2_EVCTRL) MASK Register */
+
+/* -------- RTC_MODE0_INTENCLR : (RTC Offset: 0x06) (R/W  8) MODE0 MODE0 Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CMP0:1;           /*!< bit:      0  Compare 0 Interrupt Enable         */
+    uint8_t  :5;               /*!< bit:  1.. 5  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      6  Synchronization Ready Interrupt Enable */
+    uint8_t  OVF:1;            /*!< bit:      7  Overflow Interrupt Enable          */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  CMP:1;            /*!< bit:      0  Compare x Interrupt Enable         */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE0_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE0_INTENCLR_OFFSET   0x06         /**< \brief (RTC_MODE0_INTENCLR offset) MODE0 Interrupt Enable Clear */
+#define RTC_MODE0_INTENCLR_RESETVALUE 0x00         /**< \brief (RTC_MODE0_INTENCLR reset_value) MODE0 Interrupt Enable Clear */
+
+#define RTC_MODE0_INTENCLR_CMP0_Pos 0            /**< \brief (RTC_MODE0_INTENCLR) Compare 0 Interrupt Enable */
+#define RTC_MODE0_INTENCLR_CMP0     (1 << RTC_MODE0_INTENCLR_CMP0_Pos)
+#define RTC_MODE0_INTENCLR_CMP_Pos  0            /**< \brief (RTC_MODE0_INTENCLR) Compare x Interrupt Enable */
+#define RTC_MODE0_INTENCLR_CMP_Msk  (0x1u << RTC_MODE0_INTENCLR_CMP_Pos)
+#define RTC_MODE0_INTENCLR_CMP(value) ((RTC_MODE0_INTENCLR_CMP_Msk & ((value) << RTC_MODE0_INTENCLR_CMP_Pos)))
+#define RTC_MODE0_INTENCLR_SYNCRDY_Pos 6            /**< \brief (RTC_MODE0_INTENCLR) Synchronization Ready Interrupt Enable */
+#define RTC_MODE0_INTENCLR_SYNCRDY  (0x1u << RTC_MODE0_INTENCLR_SYNCRDY_Pos)
+#define RTC_MODE0_INTENCLR_OVF_Pos  7            /**< \brief (RTC_MODE0_INTENCLR) Overflow Interrupt Enable */
+#define RTC_MODE0_INTENCLR_OVF      (0x1u << RTC_MODE0_INTENCLR_OVF_Pos)
+#define RTC_MODE0_INTENCLR_MASK     0xC1u        /**< \brief (RTC_MODE0_INTENCLR) MASK Register */
+
+/* -------- RTC_MODE1_INTENCLR : (RTC Offset: 0x06) (R/W  8) MODE1 MODE1 Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CMP0:1;           /*!< bit:      0  Compare 0 Interrupt Enable         */
+    uint8_t  CMP1:1;           /*!< bit:      1  Compare 1 Interrupt Enable         */
+    uint8_t  :4;               /*!< bit:  2.. 5  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      6  Synchronization Ready Interrupt Enable */
+    uint8_t  OVF:1;            /*!< bit:      7  Overflow Interrupt Enable          */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  CMP:2;            /*!< bit:  0.. 1  Compare x Interrupt Enable         */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE1_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE1_INTENCLR_OFFSET   0x06         /**< \brief (RTC_MODE1_INTENCLR offset) MODE1 Interrupt Enable Clear */
+#define RTC_MODE1_INTENCLR_RESETVALUE 0x00         /**< \brief (RTC_MODE1_INTENCLR reset_value) MODE1 Interrupt Enable Clear */
+
+#define RTC_MODE1_INTENCLR_CMP0_Pos 0            /**< \brief (RTC_MODE1_INTENCLR) Compare 0 Interrupt Enable */
+#define RTC_MODE1_INTENCLR_CMP0     (1 << RTC_MODE1_INTENCLR_CMP0_Pos)
+#define RTC_MODE1_INTENCLR_CMP1_Pos 1            /**< \brief (RTC_MODE1_INTENCLR) Compare 1 Interrupt Enable */
+#define RTC_MODE1_INTENCLR_CMP1     (1 << RTC_MODE1_INTENCLR_CMP1_Pos)
+#define RTC_MODE1_INTENCLR_CMP_Pos  0            /**< \brief (RTC_MODE1_INTENCLR) Compare x Interrupt Enable */
+#define RTC_MODE1_INTENCLR_CMP_Msk  (0x3u << RTC_MODE1_INTENCLR_CMP_Pos)
+#define RTC_MODE1_INTENCLR_CMP(value) ((RTC_MODE1_INTENCLR_CMP_Msk & ((value) << RTC_MODE1_INTENCLR_CMP_Pos)))
+#define RTC_MODE1_INTENCLR_SYNCRDY_Pos 6            /**< \brief (RTC_MODE1_INTENCLR) Synchronization Ready Interrupt Enable */
+#define RTC_MODE1_INTENCLR_SYNCRDY  (0x1u << RTC_MODE1_INTENCLR_SYNCRDY_Pos)
+#define RTC_MODE1_INTENCLR_OVF_Pos  7            /**< \brief (RTC_MODE1_INTENCLR) Overflow Interrupt Enable */
+#define RTC_MODE1_INTENCLR_OVF      (0x1u << RTC_MODE1_INTENCLR_OVF_Pos)
+#define RTC_MODE1_INTENCLR_MASK     0xC3u        /**< \brief (RTC_MODE1_INTENCLR) MASK Register */
+
+/* -------- RTC_MODE2_INTENCLR : (RTC Offset: 0x06) (R/W  8) MODE2 MODE2 Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  ALARM0:1;         /*!< bit:      0  Alarm 0 Interrupt Enable           */
+    uint8_t  :5;               /*!< bit:  1.. 5  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      6  Synchronization Ready Interrupt Enable */
+    uint8_t  OVF:1;            /*!< bit:      7  Overflow Interrupt Enable          */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  ALARM:1;          /*!< bit:      0  Alarm x Interrupt Enable           */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE2_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE2_INTENCLR_OFFSET   0x06         /**< \brief (RTC_MODE2_INTENCLR offset) MODE2 Interrupt Enable Clear */
+#define RTC_MODE2_INTENCLR_RESETVALUE 0x00         /**< \brief (RTC_MODE2_INTENCLR reset_value) MODE2 Interrupt Enable Clear */
+
+#define RTC_MODE2_INTENCLR_ALARM0_Pos 0            /**< \brief (RTC_MODE2_INTENCLR) Alarm 0 Interrupt Enable */
+#define RTC_MODE2_INTENCLR_ALARM0   (1 << RTC_MODE2_INTENCLR_ALARM0_Pos)
+#define RTC_MODE2_INTENCLR_ALARM_Pos 0            /**< \brief (RTC_MODE2_INTENCLR) Alarm x Interrupt Enable */
+#define RTC_MODE2_INTENCLR_ALARM_Msk (0x1u << RTC_MODE2_INTENCLR_ALARM_Pos)
+#define RTC_MODE2_INTENCLR_ALARM(value) ((RTC_MODE2_INTENCLR_ALARM_Msk & ((value) << RTC_MODE2_INTENCLR_ALARM_Pos)))
+#define RTC_MODE2_INTENCLR_SYNCRDY_Pos 6            /**< \brief (RTC_MODE2_INTENCLR) Synchronization Ready Interrupt Enable */
+#define RTC_MODE2_INTENCLR_SYNCRDY  (0x1u << RTC_MODE2_INTENCLR_SYNCRDY_Pos)
+#define RTC_MODE2_INTENCLR_OVF_Pos  7            /**< \brief (RTC_MODE2_INTENCLR) Overflow Interrupt Enable */
+#define RTC_MODE2_INTENCLR_OVF      (0x1u << RTC_MODE2_INTENCLR_OVF_Pos)
+#define RTC_MODE2_INTENCLR_MASK     0xC1u        /**< \brief (RTC_MODE2_INTENCLR) MASK Register */
+
+/* -------- RTC_MODE0_INTENSET : (RTC Offset: 0x07) (R/W  8) MODE0 MODE0 Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CMP0:1;           /*!< bit:      0  Compare 0 Interrupt Enable         */
+    uint8_t  :5;               /*!< bit:  1.. 5  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      6  Synchronization Ready Interrupt Enable */
+    uint8_t  OVF:1;            /*!< bit:      7  Overflow Interrupt Enable          */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  CMP:1;            /*!< bit:      0  Compare x Interrupt Enable         */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE0_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE0_INTENSET_OFFSET   0x07         /**< \brief (RTC_MODE0_INTENSET offset) MODE0 Interrupt Enable Set */
+#define RTC_MODE0_INTENSET_RESETVALUE 0x00         /**< \brief (RTC_MODE0_INTENSET reset_value) MODE0 Interrupt Enable Set */
+
+#define RTC_MODE0_INTENSET_CMP0_Pos 0            /**< \brief (RTC_MODE0_INTENSET) Compare 0 Interrupt Enable */
+#define RTC_MODE0_INTENSET_CMP0     (1 << RTC_MODE0_INTENSET_CMP0_Pos)
+#define RTC_MODE0_INTENSET_CMP_Pos  0            /**< \brief (RTC_MODE0_INTENSET) Compare x Interrupt Enable */
+#define RTC_MODE0_INTENSET_CMP_Msk  (0x1u << RTC_MODE0_INTENSET_CMP_Pos)
+#define RTC_MODE0_INTENSET_CMP(value) ((RTC_MODE0_INTENSET_CMP_Msk & ((value) << RTC_MODE0_INTENSET_CMP_Pos)))
+#define RTC_MODE0_INTENSET_SYNCRDY_Pos 6            /**< \brief (RTC_MODE0_INTENSET) Synchronization Ready Interrupt Enable */
+#define RTC_MODE0_INTENSET_SYNCRDY  (0x1u << RTC_MODE0_INTENSET_SYNCRDY_Pos)
+#define RTC_MODE0_INTENSET_OVF_Pos  7            /**< \brief (RTC_MODE0_INTENSET) Overflow Interrupt Enable */
+#define RTC_MODE0_INTENSET_OVF      (0x1u << RTC_MODE0_INTENSET_OVF_Pos)
+#define RTC_MODE0_INTENSET_MASK     0xC1u        /**< \brief (RTC_MODE0_INTENSET) MASK Register */
+
+/* -------- RTC_MODE1_INTENSET : (RTC Offset: 0x07) (R/W  8) MODE1 MODE1 Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CMP0:1;           /*!< bit:      0  Compare 0 Interrupt Enable         */
+    uint8_t  CMP1:1;           /*!< bit:      1  Compare 1 Interrupt Enable         */
+    uint8_t  :4;               /*!< bit:  2.. 5  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      6  Synchronization Ready Interrupt Enable */
+    uint8_t  OVF:1;            /*!< bit:      7  Overflow Interrupt Enable          */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  CMP:2;            /*!< bit:  0.. 1  Compare x Interrupt Enable         */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE1_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE1_INTENSET_OFFSET   0x07         /**< \brief (RTC_MODE1_INTENSET offset) MODE1 Interrupt Enable Set */
+#define RTC_MODE1_INTENSET_RESETVALUE 0x00         /**< \brief (RTC_MODE1_INTENSET reset_value) MODE1 Interrupt Enable Set */
+
+#define RTC_MODE1_INTENSET_CMP0_Pos 0            /**< \brief (RTC_MODE1_INTENSET) Compare 0 Interrupt Enable */
+#define RTC_MODE1_INTENSET_CMP0     (1 << RTC_MODE1_INTENSET_CMP0_Pos)
+#define RTC_MODE1_INTENSET_CMP1_Pos 1            /**< \brief (RTC_MODE1_INTENSET) Compare 1 Interrupt Enable */
+#define RTC_MODE1_INTENSET_CMP1     (1 << RTC_MODE1_INTENSET_CMP1_Pos)
+#define RTC_MODE1_INTENSET_CMP_Pos  0            /**< \brief (RTC_MODE1_INTENSET) Compare x Interrupt Enable */
+#define RTC_MODE1_INTENSET_CMP_Msk  (0x3u << RTC_MODE1_INTENSET_CMP_Pos)
+#define RTC_MODE1_INTENSET_CMP(value) ((RTC_MODE1_INTENSET_CMP_Msk & ((value) << RTC_MODE1_INTENSET_CMP_Pos)))
+#define RTC_MODE1_INTENSET_SYNCRDY_Pos 6            /**< \brief (RTC_MODE1_INTENSET) Synchronization Ready Interrupt Enable */
+#define RTC_MODE1_INTENSET_SYNCRDY  (0x1u << RTC_MODE1_INTENSET_SYNCRDY_Pos)
+#define RTC_MODE1_INTENSET_OVF_Pos  7            /**< \brief (RTC_MODE1_INTENSET) Overflow Interrupt Enable */
+#define RTC_MODE1_INTENSET_OVF      (0x1u << RTC_MODE1_INTENSET_OVF_Pos)
+#define RTC_MODE1_INTENSET_MASK     0xC3u        /**< \brief (RTC_MODE1_INTENSET) MASK Register */
+
+/* -------- RTC_MODE2_INTENSET : (RTC Offset: 0x07) (R/W  8) MODE2 MODE2 Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  ALARM0:1;         /*!< bit:      0  Alarm 0 Interrupt Enable           */
+    uint8_t  :5;               /*!< bit:  1.. 5  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      6  Synchronization Ready Interrupt Enable */
+    uint8_t  OVF:1;            /*!< bit:      7  Overflow Interrupt Enable          */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  ALARM:1;          /*!< bit:      0  Alarm x Interrupt Enable           */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE2_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE2_INTENSET_OFFSET   0x07         /**< \brief (RTC_MODE2_INTENSET offset) MODE2 Interrupt Enable Set */
+#define RTC_MODE2_INTENSET_RESETVALUE 0x00         /**< \brief (RTC_MODE2_INTENSET reset_value) MODE2 Interrupt Enable Set */
+
+#define RTC_MODE2_INTENSET_ALARM0_Pos 0            /**< \brief (RTC_MODE2_INTENSET) Alarm 0 Interrupt Enable */
+#define RTC_MODE2_INTENSET_ALARM0   (1 << RTC_MODE2_INTENSET_ALARM0_Pos)
+#define RTC_MODE2_INTENSET_ALARM_Pos 0            /**< \brief (RTC_MODE2_INTENSET) Alarm x Interrupt Enable */
+#define RTC_MODE2_INTENSET_ALARM_Msk (0x1u << RTC_MODE2_INTENSET_ALARM_Pos)
+#define RTC_MODE2_INTENSET_ALARM(value) ((RTC_MODE2_INTENSET_ALARM_Msk & ((value) << RTC_MODE2_INTENSET_ALARM_Pos)))
+#define RTC_MODE2_INTENSET_SYNCRDY_Pos 6            /**< \brief (RTC_MODE2_INTENSET) Synchronization Ready Interrupt Enable */
+#define RTC_MODE2_INTENSET_SYNCRDY  (0x1u << RTC_MODE2_INTENSET_SYNCRDY_Pos)
+#define RTC_MODE2_INTENSET_OVF_Pos  7            /**< \brief (RTC_MODE2_INTENSET) Overflow Interrupt Enable */
+#define RTC_MODE2_INTENSET_OVF      (0x1u << RTC_MODE2_INTENSET_OVF_Pos)
+#define RTC_MODE2_INTENSET_MASK     0xC1u        /**< \brief (RTC_MODE2_INTENSET) MASK Register */
+
+/* -------- RTC_MODE0_INTFLAG : (RTC Offset: 0x08) (R/W  8) MODE0 MODE0 Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CMP0:1;           /*!< bit:      0  Compare 0                          */
+    uint8_t  :5;               /*!< bit:  1.. 5  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      6  Synchronization Ready              */
+    uint8_t  OVF:1;            /*!< bit:      7  Overflow                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  CMP:1;            /*!< bit:      0  Compare x                          */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE0_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE0_INTFLAG_OFFSET    0x08         /**< \brief (RTC_MODE0_INTFLAG offset) MODE0 Interrupt Flag Status and Clear */
+#define RTC_MODE0_INTFLAG_RESETVALUE 0x00         /**< \brief (RTC_MODE0_INTFLAG reset_value) MODE0 Interrupt Flag Status and Clear */
+
+#define RTC_MODE0_INTFLAG_CMP0_Pos  0            /**< \brief (RTC_MODE0_INTFLAG) Compare 0 */
+#define RTC_MODE0_INTFLAG_CMP0      (1 << RTC_MODE0_INTFLAG_CMP0_Pos)
+#define RTC_MODE0_INTFLAG_CMP_Pos   0            /**< \brief (RTC_MODE0_INTFLAG) Compare x */
+#define RTC_MODE0_INTFLAG_CMP_Msk   (0x1u << RTC_MODE0_INTFLAG_CMP_Pos)
+#define RTC_MODE0_INTFLAG_CMP(value) ((RTC_MODE0_INTFLAG_CMP_Msk & ((value) << RTC_MODE0_INTFLAG_CMP_Pos)))
+#define RTC_MODE0_INTFLAG_SYNCRDY_Pos 6            /**< \brief (RTC_MODE0_INTFLAG) Synchronization Ready */
+#define RTC_MODE0_INTFLAG_SYNCRDY   (0x1u << RTC_MODE0_INTFLAG_SYNCRDY_Pos)
+#define RTC_MODE0_INTFLAG_OVF_Pos   7            /**< \brief (RTC_MODE0_INTFLAG) Overflow */
+#define RTC_MODE0_INTFLAG_OVF       (0x1u << RTC_MODE0_INTFLAG_OVF_Pos)
+#define RTC_MODE0_INTFLAG_MASK      0xC1u        /**< \brief (RTC_MODE0_INTFLAG) MASK Register */
+
+/* -------- RTC_MODE1_INTFLAG : (RTC Offset: 0x08) (R/W  8) MODE1 MODE1 Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CMP0:1;           /*!< bit:      0  Compare 0                          */
+    uint8_t  CMP1:1;           /*!< bit:      1  Compare 1                          */
+    uint8_t  :4;               /*!< bit:  2.. 5  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      6  Synchronization Ready              */
+    uint8_t  OVF:1;            /*!< bit:      7  Overflow                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  CMP:2;            /*!< bit:  0.. 1  Compare x                          */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE1_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE1_INTFLAG_OFFSET    0x08         /**< \brief (RTC_MODE1_INTFLAG offset) MODE1 Interrupt Flag Status and Clear */
+#define RTC_MODE1_INTFLAG_RESETVALUE 0x00         /**< \brief (RTC_MODE1_INTFLAG reset_value) MODE1 Interrupt Flag Status and Clear */
+
+#define RTC_MODE1_INTFLAG_CMP0_Pos  0            /**< \brief (RTC_MODE1_INTFLAG) Compare 0 */
+#define RTC_MODE1_INTFLAG_CMP0      (1 << RTC_MODE1_INTFLAG_CMP0_Pos)
+#define RTC_MODE1_INTFLAG_CMP1_Pos  1            /**< \brief (RTC_MODE1_INTFLAG) Compare 1 */
+#define RTC_MODE1_INTFLAG_CMP1      (1 << RTC_MODE1_INTFLAG_CMP1_Pos)
+#define RTC_MODE1_INTFLAG_CMP_Pos   0            /**< \brief (RTC_MODE1_INTFLAG) Compare x */
+#define RTC_MODE1_INTFLAG_CMP_Msk   (0x3u << RTC_MODE1_INTFLAG_CMP_Pos)
+#define RTC_MODE1_INTFLAG_CMP(value) ((RTC_MODE1_INTFLAG_CMP_Msk & ((value) << RTC_MODE1_INTFLAG_CMP_Pos)))
+#define RTC_MODE1_INTFLAG_SYNCRDY_Pos 6            /**< \brief (RTC_MODE1_INTFLAG) Synchronization Ready */
+#define RTC_MODE1_INTFLAG_SYNCRDY   (0x1u << RTC_MODE1_INTFLAG_SYNCRDY_Pos)
+#define RTC_MODE1_INTFLAG_OVF_Pos   7            /**< \brief (RTC_MODE1_INTFLAG) Overflow */
+#define RTC_MODE1_INTFLAG_OVF       (0x1u << RTC_MODE1_INTFLAG_OVF_Pos)
+#define RTC_MODE1_INTFLAG_MASK      0xC3u        /**< \brief (RTC_MODE1_INTFLAG) MASK Register */
+
+/* -------- RTC_MODE2_INTFLAG : (RTC Offset: 0x08) (R/W  8) MODE2 MODE2 Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  ALARM0:1;         /*!< bit:      0  Alarm 0                            */
+    uint8_t  :5;               /*!< bit:  1.. 5  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      6  Synchronization Ready              */
+    uint8_t  OVF:1;            /*!< bit:      7  Overflow                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  ALARM:1;          /*!< bit:      0  Alarm x                            */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE2_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE2_INTFLAG_OFFSET    0x08         /**< \brief (RTC_MODE2_INTFLAG offset) MODE2 Interrupt Flag Status and Clear */
+#define RTC_MODE2_INTFLAG_RESETVALUE 0x00         /**< \brief (RTC_MODE2_INTFLAG reset_value) MODE2 Interrupt Flag Status and Clear */
+
+#define RTC_MODE2_INTFLAG_ALARM0_Pos 0            /**< \brief (RTC_MODE2_INTFLAG) Alarm 0 */
+#define RTC_MODE2_INTFLAG_ALARM0    (1 << RTC_MODE2_INTFLAG_ALARM0_Pos)
+#define RTC_MODE2_INTFLAG_ALARM_Pos 0            /**< \brief (RTC_MODE2_INTFLAG) Alarm x */
+#define RTC_MODE2_INTFLAG_ALARM_Msk (0x1u << RTC_MODE2_INTFLAG_ALARM_Pos)
+#define RTC_MODE2_INTFLAG_ALARM(value) ((RTC_MODE2_INTFLAG_ALARM_Msk & ((value) << RTC_MODE2_INTFLAG_ALARM_Pos)))
+#define RTC_MODE2_INTFLAG_SYNCRDY_Pos 6            /**< \brief (RTC_MODE2_INTFLAG) Synchronization Ready */
+#define RTC_MODE2_INTFLAG_SYNCRDY   (0x1u << RTC_MODE2_INTFLAG_SYNCRDY_Pos)
+#define RTC_MODE2_INTFLAG_OVF_Pos   7            /**< \brief (RTC_MODE2_INTFLAG) Overflow */
+#define RTC_MODE2_INTFLAG_OVF       (0x1u << RTC_MODE2_INTFLAG_OVF_Pos)
+#define RTC_MODE2_INTFLAG_MASK      0xC1u        /**< \brief (RTC_MODE2_INTFLAG) MASK Register */
+
+/* -------- RTC_STATUS : (RTC Offset: 0x0A) (R/W  8) Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :7;               /*!< bit:  0.. 6  Reserved                           */
+    uint8_t  SYNCBUSY:1;       /*!< bit:      7  Synchronization Busy               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_STATUS_OFFSET           0x0A         /**< \brief (RTC_STATUS offset) Status */
+#define RTC_STATUS_RESETVALUE       0x00         /**< \brief (RTC_STATUS reset_value) Status */
+
+#define RTC_STATUS_SYNCBUSY_Pos     7            /**< \brief (RTC_STATUS) Synchronization Busy */
+#define RTC_STATUS_SYNCBUSY         (0x1u << RTC_STATUS_SYNCBUSY_Pos)
+#define RTC_STATUS_MASK             0x80u        /**< \brief (RTC_STATUS) MASK Register */
+
+/* -------- RTC_DBGCTRL : (RTC Offset: 0x0B) (R/W  8) Debug Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DBGRUN:1;         /*!< bit:      0  Run During Debug                   */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_DBGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_DBGCTRL_OFFSET          0x0B         /**< \brief (RTC_DBGCTRL offset) Debug Control */
+#define RTC_DBGCTRL_RESETVALUE      0x00         /**< \brief (RTC_DBGCTRL reset_value) Debug Control */
+
+#define RTC_DBGCTRL_DBGRUN_Pos      0            /**< \brief (RTC_DBGCTRL) Run During Debug */
+#define RTC_DBGCTRL_DBGRUN          (0x1u << RTC_DBGCTRL_DBGRUN_Pos)
+#define RTC_DBGCTRL_MASK            0x01u        /**< \brief (RTC_DBGCTRL) MASK Register */
+
+/* -------- RTC_FREQCORR : (RTC Offset: 0x0C) (R/W  8) Frequency Correction -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  VALUE:7;          /*!< bit:  0.. 6  Correction Value                   */
+    uint8_t  SIGN:1;           /*!< bit:      7  Correction Sign                    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_FREQCORR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_FREQCORR_OFFSET         0x0C         /**< \brief (RTC_FREQCORR offset) Frequency Correction */
+#define RTC_FREQCORR_RESETVALUE     0x00         /**< \brief (RTC_FREQCORR reset_value) Frequency Correction */
+
+#define RTC_FREQCORR_VALUE_Pos      0            /**< \brief (RTC_FREQCORR) Correction Value */
+#define RTC_FREQCORR_VALUE_Msk      (0x7Fu << RTC_FREQCORR_VALUE_Pos)
+#define RTC_FREQCORR_VALUE(value)   ((RTC_FREQCORR_VALUE_Msk & ((value) << RTC_FREQCORR_VALUE_Pos)))
+#define RTC_FREQCORR_SIGN_Pos       7            /**< \brief (RTC_FREQCORR) Correction Sign */
+#define RTC_FREQCORR_SIGN           (0x1u << RTC_FREQCORR_SIGN_Pos)
+#define RTC_FREQCORR_MASK           0xFFu        /**< \brief (RTC_FREQCORR) MASK Register */
+
+/* -------- RTC_MODE0_COUNT : (RTC Offset: 0x10) (R/W 32) MODE0 MODE0 Counter Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t COUNT:32;         /*!< bit:  0..31  Counter Value                      */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} RTC_MODE0_COUNT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE0_COUNT_OFFSET      0x10         /**< \brief (RTC_MODE0_COUNT offset) MODE0 Counter Value */
+#define RTC_MODE0_COUNT_RESETVALUE  0x00000000   /**< \brief (RTC_MODE0_COUNT reset_value) MODE0 Counter Value */
+
+#define RTC_MODE0_COUNT_COUNT_Pos   0            /**< \brief (RTC_MODE0_COUNT) Counter Value */
+#define RTC_MODE0_COUNT_COUNT_Msk   (0xFFFFFFFFu << RTC_MODE0_COUNT_COUNT_Pos)
+#define RTC_MODE0_COUNT_COUNT(value) ((RTC_MODE0_COUNT_COUNT_Msk & ((value) << RTC_MODE0_COUNT_COUNT_Pos)))
+#define RTC_MODE0_COUNT_MASK        0xFFFFFFFFu  /**< \brief (RTC_MODE0_COUNT) MASK Register */
+
+/* -------- RTC_MODE1_COUNT : (RTC Offset: 0x10) (R/W 16) MODE1 MODE1 Counter Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t COUNT:16;         /*!< bit:  0..15  Counter Value                      */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_MODE1_COUNT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE1_COUNT_OFFSET      0x10         /**< \brief (RTC_MODE1_COUNT offset) MODE1 Counter Value */
+#define RTC_MODE1_COUNT_RESETVALUE  0x0000       /**< \brief (RTC_MODE1_COUNT reset_value) MODE1 Counter Value */
+
+#define RTC_MODE1_COUNT_COUNT_Pos   0            /**< \brief (RTC_MODE1_COUNT) Counter Value */
+#define RTC_MODE1_COUNT_COUNT_Msk   (0xFFFFu << RTC_MODE1_COUNT_COUNT_Pos)
+#define RTC_MODE1_COUNT_COUNT(value) ((RTC_MODE1_COUNT_COUNT_Msk & ((value) << RTC_MODE1_COUNT_COUNT_Pos)))
+#define RTC_MODE1_COUNT_MASK        0xFFFFu      /**< \brief (RTC_MODE1_COUNT) MASK Register */
+
+/* -------- RTC_MODE2_CLOCK : (RTC Offset: 0x10) (R/W 32) MODE2 MODE2 Clock Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SECOND:6;         /*!< bit:  0.. 5  Second                             */
+    uint32_t MINUTE:6;         /*!< bit:  6..11  Minute                             */
+    uint32_t HOUR:5;           /*!< bit: 12..16  Hour                               */
+    uint32_t DAY:5;            /*!< bit: 17..21  Day                                */
+    uint32_t MONTH:4;          /*!< bit: 22..25  Month                              */
+    uint32_t YEAR:6;           /*!< bit: 26..31  Year                               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} RTC_MODE2_CLOCK_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE2_CLOCK_OFFSET      0x10         /**< \brief (RTC_MODE2_CLOCK offset) MODE2 Clock Value */
+#define RTC_MODE2_CLOCK_RESETVALUE  0x00000000   /**< \brief (RTC_MODE2_CLOCK reset_value) MODE2 Clock Value */
+
+#define RTC_MODE2_CLOCK_SECOND_Pos  0            /**< \brief (RTC_MODE2_CLOCK) Second */
+#define RTC_MODE2_CLOCK_SECOND_Msk  (0x3Fu << RTC_MODE2_CLOCK_SECOND_Pos)
+#define RTC_MODE2_CLOCK_SECOND(value) ((RTC_MODE2_CLOCK_SECOND_Msk & ((value) << RTC_MODE2_CLOCK_SECOND_Pos)))
+#define RTC_MODE2_CLOCK_MINUTE_Pos  6            /**< \brief (RTC_MODE2_CLOCK) Minute */
+#define RTC_MODE2_CLOCK_MINUTE_Msk  (0x3Fu << RTC_MODE2_CLOCK_MINUTE_Pos)
+#define RTC_MODE2_CLOCK_MINUTE(value) ((RTC_MODE2_CLOCK_MINUTE_Msk & ((value) << RTC_MODE2_CLOCK_MINUTE_Pos)))
+#define RTC_MODE2_CLOCK_HOUR_Pos    12           /**< \brief (RTC_MODE2_CLOCK) Hour */
+#define RTC_MODE2_CLOCK_HOUR_Msk    (0x1Fu << RTC_MODE2_CLOCK_HOUR_Pos)
+#define RTC_MODE2_CLOCK_HOUR(value) ((RTC_MODE2_CLOCK_HOUR_Msk & ((value) << RTC_MODE2_CLOCK_HOUR_Pos)))
+#define   RTC_MODE2_CLOCK_HOUR_PM_Val     0x10u   /**< \brief (RTC_MODE2_CLOCK) Afternoon Hour */
+#define RTC_MODE2_CLOCK_HOUR_PM     (RTC_MODE2_CLOCK_HOUR_PM_Val   << RTC_MODE2_CLOCK_HOUR_Pos)
+#define RTC_MODE2_CLOCK_DAY_Pos     17           /**< \brief (RTC_MODE2_CLOCK) Day */
+#define RTC_MODE2_CLOCK_DAY_Msk     (0x1Fu << RTC_MODE2_CLOCK_DAY_Pos)
+#define RTC_MODE2_CLOCK_DAY(value)  ((RTC_MODE2_CLOCK_DAY_Msk & ((value) << RTC_MODE2_CLOCK_DAY_Pos)))
+#define RTC_MODE2_CLOCK_MONTH_Pos   22           /**< \brief (RTC_MODE2_CLOCK) Month */
+#define RTC_MODE2_CLOCK_MONTH_Msk   (0xFu << RTC_MODE2_CLOCK_MONTH_Pos)
+#define RTC_MODE2_CLOCK_MONTH(value) ((RTC_MODE2_CLOCK_MONTH_Msk & ((value) << RTC_MODE2_CLOCK_MONTH_Pos)))
+#define RTC_MODE2_CLOCK_YEAR_Pos    26           /**< \brief (RTC_MODE2_CLOCK) Year */
+#define RTC_MODE2_CLOCK_YEAR_Msk    (0x3Fu << RTC_MODE2_CLOCK_YEAR_Pos)
+#define RTC_MODE2_CLOCK_YEAR(value) ((RTC_MODE2_CLOCK_YEAR_Msk & ((value) << RTC_MODE2_CLOCK_YEAR_Pos)))
+#define RTC_MODE2_CLOCK_MASK        0xFFFFFFFFu  /**< \brief (RTC_MODE2_CLOCK) MASK Register */
+
+/* -------- RTC_MODE1_PER : (RTC Offset: 0x14) (R/W 16) MODE1 MODE1 Counter Period -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t PER:16;           /*!< bit:  0..15  Counter Period                     */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_MODE1_PER_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE1_PER_OFFSET        0x14         /**< \brief (RTC_MODE1_PER offset) MODE1 Counter Period */
+#define RTC_MODE1_PER_RESETVALUE    0x0000       /**< \brief (RTC_MODE1_PER reset_value) MODE1 Counter Period */
+
+#define RTC_MODE1_PER_PER_Pos       0            /**< \brief (RTC_MODE1_PER) Counter Period */
+#define RTC_MODE1_PER_PER_Msk       (0xFFFFu << RTC_MODE1_PER_PER_Pos)
+#define RTC_MODE1_PER_PER(value)    ((RTC_MODE1_PER_PER_Msk & ((value) << RTC_MODE1_PER_PER_Pos)))
+#define RTC_MODE1_PER_MASK          0xFFFFu      /**< \brief (RTC_MODE1_PER) MASK Register */
+
+/* -------- RTC_MODE0_COMP : (RTC Offset: 0x18) (R/W 32) MODE0 MODE0 Compare n Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t COMP:32;          /*!< bit:  0..31  Compare Value                      */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} RTC_MODE0_COMP_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE0_COMP_OFFSET       0x18         /**< \brief (RTC_MODE0_COMP offset) MODE0 Compare n Value */
+#define RTC_MODE0_COMP_RESETVALUE   0x00000000   /**< \brief (RTC_MODE0_COMP reset_value) MODE0 Compare n Value */
+
+#define RTC_MODE0_COMP_COMP_Pos     0            /**< \brief (RTC_MODE0_COMP) Compare Value */
+#define RTC_MODE0_COMP_COMP_Msk     (0xFFFFFFFFu << RTC_MODE0_COMP_COMP_Pos)
+#define RTC_MODE0_COMP_COMP(value)  ((RTC_MODE0_COMP_COMP_Msk & ((value) << RTC_MODE0_COMP_COMP_Pos)))
+#define RTC_MODE0_COMP_MASK         0xFFFFFFFFu  /**< \brief (RTC_MODE0_COMP) MASK Register */
+
+/* -------- RTC_MODE1_COMP : (RTC Offset: 0x18) (R/W 16) MODE1 MODE1 Compare n Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t COMP:16;          /*!< bit:  0..15  Compare Value                      */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} RTC_MODE1_COMP_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE1_COMP_OFFSET       0x18         /**< \brief (RTC_MODE1_COMP offset) MODE1 Compare n Value */
+#define RTC_MODE1_COMP_RESETVALUE   0x0000       /**< \brief (RTC_MODE1_COMP reset_value) MODE1 Compare n Value */
+
+#define RTC_MODE1_COMP_COMP_Pos     0            /**< \brief (RTC_MODE1_COMP) Compare Value */
+#define RTC_MODE1_COMP_COMP_Msk     (0xFFFFu << RTC_MODE1_COMP_COMP_Pos)
+#define RTC_MODE1_COMP_COMP(value)  ((RTC_MODE1_COMP_COMP_Msk & ((value) << RTC_MODE1_COMP_COMP_Pos)))
+#define RTC_MODE1_COMP_MASK         0xFFFFu      /**< \brief (RTC_MODE1_COMP) MASK Register */
+
+/* -------- RTC_MODE2_ALARM : (RTC Offset: 0x18) (R/W 32) MODE2 MODE2_ALARM Alarm n Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SECOND:6;         /*!< bit:  0.. 5  Second                             */
+    uint32_t MINUTE:6;         /*!< bit:  6..11  Minute                             */
+    uint32_t HOUR:5;           /*!< bit: 12..16  Hour                               */
+    uint32_t DAY:5;            /*!< bit: 17..21  Day                                */
+    uint32_t MONTH:4;          /*!< bit: 22..25  Month                              */
+    uint32_t YEAR:6;           /*!< bit: 26..31  Year                               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} RTC_MODE2_ALARM_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE2_ALARM_OFFSET      0x18         /**< \brief (RTC_MODE2_ALARM offset) MODE2_ALARM Alarm n Value */
+#define RTC_MODE2_ALARM_RESETVALUE  0x00000000   /**< \brief (RTC_MODE2_ALARM reset_value) MODE2_ALARM Alarm n Value */
+
+#define RTC_MODE2_ALARM_SECOND_Pos  0            /**< \brief (RTC_MODE2_ALARM) Second */
+#define RTC_MODE2_ALARM_SECOND_Msk  (0x3Fu << RTC_MODE2_ALARM_SECOND_Pos)
+#define RTC_MODE2_ALARM_SECOND(value) ((RTC_MODE2_ALARM_SECOND_Msk & ((value) << RTC_MODE2_ALARM_SECOND_Pos)))
+#define RTC_MODE2_ALARM_MINUTE_Pos  6            /**< \brief (RTC_MODE2_ALARM) Minute */
+#define RTC_MODE2_ALARM_MINUTE_Msk  (0x3Fu << RTC_MODE2_ALARM_MINUTE_Pos)
+#define RTC_MODE2_ALARM_MINUTE(value) ((RTC_MODE2_ALARM_MINUTE_Msk & ((value) << RTC_MODE2_ALARM_MINUTE_Pos)))
+#define RTC_MODE2_ALARM_HOUR_Pos    12           /**< \brief (RTC_MODE2_ALARM) Hour */
+#define RTC_MODE2_ALARM_HOUR_Msk    (0x1Fu << RTC_MODE2_ALARM_HOUR_Pos)
+#define RTC_MODE2_ALARM_HOUR(value) ((RTC_MODE2_ALARM_HOUR_Msk & ((value) << RTC_MODE2_ALARM_HOUR_Pos)))
+#define RTC_MODE2_ALARM_DAY_Pos     17           /**< \brief (RTC_MODE2_ALARM) Day */
+#define RTC_MODE2_ALARM_DAY_Msk     (0x1Fu << RTC_MODE2_ALARM_DAY_Pos)
+#define RTC_MODE2_ALARM_DAY(value)  ((RTC_MODE2_ALARM_DAY_Msk & ((value) << RTC_MODE2_ALARM_DAY_Pos)))
+#define RTC_MODE2_ALARM_MONTH_Pos   22           /**< \brief (RTC_MODE2_ALARM) Month */
+#define RTC_MODE2_ALARM_MONTH_Msk   (0xFu << RTC_MODE2_ALARM_MONTH_Pos)
+#define RTC_MODE2_ALARM_MONTH(value) ((RTC_MODE2_ALARM_MONTH_Msk & ((value) << RTC_MODE2_ALARM_MONTH_Pos)))
+#define RTC_MODE2_ALARM_YEAR_Pos    26           /**< \brief (RTC_MODE2_ALARM) Year */
+#define RTC_MODE2_ALARM_YEAR_Msk    (0x3Fu << RTC_MODE2_ALARM_YEAR_Pos)
+#define RTC_MODE2_ALARM_YEAR(value) ((RTC_MODE2_ALARM_YEAR_Msk & ((value) << RTC_MODE2_ALARM_YEAR_Pos)))
+#define RTC_MODE2_ALARM_MASK        0xFFFFFFFFu  /**< \brief (RTC_MODE2_ALARM) MASK Register */
+
+/* -------- RTC_MODE2_MASK : (RTC Offset: 0x1C) (R/W  8) MODE2 MODE2_ALARM Alarm n Mask -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SEL:3;            /*!< bit:  0.. 2  Alarm Mask Selection               */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} RTC_MODE2_MASK_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define RTC_MODE2_MASK_OFFSET       0x1C         /**< \brief (RTC_MODE2_MASK offset) MODE2_ALARM Alarm n Mask */
+#define RTC_MODE2_MASK_RESETVALUE   0x00         /**< \brief (RTC_MODE2_MASK reset_value) MODE2_ALARM Alarm n Mask */
+
+#define RTC_MODE2_MASK_SEL_Pos      0            /**< \brief (RTC_MODE2_MASK) Alarm Mask Selection */
+#define RTC_MODE2_MASK_SEL_Msk      (0x7u << RTC_MODE2_MASK_SEL_Pos)
+#define RTC_MODE2_MASK_SEL(value)   ((RTC_MODE2_MASK_SEL_Msk & ((value) << RTC_MODE2_MASK_SEL_Pos)))
+#define   RTC_MODE2_MASK_SEL_OFF_Val      0x0u   /**< \brief (RTC_MODE2_MASK) Alarm Disabled */
+#define   RTC_MODE2_MASK_SEL_SS_Val       0x1u   /**< \brief (RTC_MODE2_MASK) Match seconds only */
+#define   RTC_MODE2_MASK_SEL_MMSS_Val     0x2u   /**< \brief (RTC_MODE2_MASK) Match seconds and minutes only */
+#define   RTC_MODE2_MASK_SEL_HHMMSS_Val   0x3u   /**< \brief (RTC_MODE2_MASK) Match seconds, minutes, and hours only */
+#define   RTC_MODE2_MASK_SEL_DDHHMMSS_Val 0x4u   /**< \brief (RTC_MODE2_MASK) Match seconds, minutes, hours, and days only */
+#define   RTC_MODE2_MASK_SEL_MMDDHHMMSS_Val 0x5u   /**< \brief (RTC_MODE2_MASK) Match seconds, minutes, hours, days, and months only */
+#define   RTC_MODE2_MASK_SEL_YYMMDDHHMMSS_Val 0x6u   /**< \brief (RTC_MODE2_MASK) Match seconds, minutes, hours, days, months, and years */
+#define RTC_MODE2_MASK_SEL_OFF      (RTC_MODE2_MASK_SEL_OFF_Val    << RTC_MODE2_MASK_SEL_Pos)
+#define RTC_MODE2_MASK_SEL_SS       (RTC_MODE2_MASK_SEL_SS_Val     << RTC_MODE2_MASK_SEL_Pos)
+#define RTC_MODE2_MASK_SEL_MMSS     (RTC_MODE2_MASK_SEL_MMSS_Val   << RTC_MODE2_MASK_SEL_Pos)
+#define RTC_MODE2_MASK_SEL_HHMMSS   (RTC_MODE2_MASK_SEL_HHMMSS_Val << RTC_MODE2_MASK_SEL_Pos)
+#define RTC_MODE2_MASK_SEL_DDHHMMSS (RTC_MODE2_MASK_SEL_DDHHMMSS_Val << RTC_MODE2_MASK_SEL_Pos)
+#define RTC_MODE2_MASK_SEL_MMDDHHMMSS (RTC_MODE2_MASK_SEL_MMDDHHMMSS_Val << RTC_MODE2_MASK_SEL_Pos)
+#define RTC_MODE2_MASK_SEL_YYMMDDHHMMSS (RTC_MODE2_MASK_SEL_YYMMDDHHMMSS_Val << RTC_MODE2_MASK_SEL_Pos)
+#define RTC_MODE2_MASK_MASK         0x07u        /**< \brief (RTC_MODE2_MASK) MASK Register */
+
+/** \brief RtcMode2Alarm hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO RTC_MODE2_ALARM_Type      ALARM;       /**< \brief Offset: 0x00 (R/W 32) MODE2_ALARM Alarm n Value */
+  __IO RTC_MODE2_MASK_Type       MASK;        /**< \brief Offset: 0x04 (R/W  8) MODE2_ALARM Alarm n Mask */
+       RoReg8                    Reserved1[0x3];
+} RtcMode2Alarm;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief RTC_MODE0 hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* 32-bit Counter with Single 32-bit Compare */
+  __IO RTC_MODE0_CTRL_Type       CTRL;        /**< \brief Offset: 0x00 (R/W 16) MODE0 Control */
+  __IO RTC_READREQ_Type          READREQ;     /**< \brief Offset: 0x02 (R/W 16) Read Request */
+  __IO RTC_MODE0_EVCTRL_Type     EVCTRL;      /**< \brief Offset: 0x04 (R/W 16) MODE0 Event Control */
+  __IO RTC_MODE0_INTENCLR_Type   INTENCLR;    /**< \brief Offset: 0x06 (R/W  8) MODE0 Interrupt Enable Clear */
+  __IO RTC_MODE0_INTENSET_Type   INTENSET;    /**< \brief Offset: 0x07 (R/W  8) MODE0 Interrupt Enable Set */
+  __IO RTC_MODE0_INTFLAG_Type    INTFLAG;     /**< \brief Offset: 0x08 (R/W  8) MODE0 Interrupt Flag Status and Clear */
+       RoReg8                    Reserved1[0x1];
+  __IO RTC_STATUS_Type           STATUS;      /**< \brief Offset: 0x0A (R/W  8) Status */
+  __IO RTC_DBGCTRL_Type          DBGCTRL;     /**< \brief Offset: 0x0B (R/W  8) Debug Control */
+  __IO RTC_FREQCORR_Type         FREQCORR;    /**< \brief Offset: 0x0C (R/W  8) Frequency Correction */
+       RoReg8                    Reserved2[0x3];
+  __IO RTC_MODE0_COUNT_Type      COUNT;       /**< \brief Offset: 0x10 (R/W 32) MODE0 Counter Value */
+       RoReg8                    Reserved3[0x4];
+  __IO RTC_MODE0_COMP_Type       COMP[1];     /**< \brief Offset: 0x18 (R/W 32) MODE0 Compare n Value */
+} RtcMode0;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief RTC_MODE1 hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* 16-bit Counter with Two 16-bit Compares */
+  __IO RTC_MODE1_CTRL_Type       CTRL;        /**< \brief Offset: 0x00 (R/W 16) MODE1 Control */
+  __IO RTC_READREQ_Type          READREQ;     /**< \brief Offset: 0x02 (R/W 16) Read Request */
+  __IO RTC_MODE1_EVCTRL_Type     EVCTRL;      /**< \brief Offset: 0x04 (R/W 16) MODE1 Event Control */
+  __IO RTC_MODE1_INTENCLR_Type   INTENCLR;    /**< \brief Offset: 0x06 (R/W  8) MODE1 Interrupt Enable Clear */
+  __IO RTC_MODE1_INTENSET_Type   INTENSET;    /**< \brief Offset: 0x07 (R/W  8) MODE1 Interrupt Enable Set */
+  __IO RTC_MODE1_INTFLAG_Type    INTFLAG;     /**< \brief Offset: 0x08 (R/W  8) MODE1 Interrupt Flag Status and Clear */
+       RoReg8                    Reserved1[0x1];
+  __IO RTC_STATUS_Type           STATUS;      /**< \brief Offset: 0x0A (R/W  8) Status */
+  __IO RTC_DBGCTRL_Type          DBGCTRL;     /**< \brief Offset: 0x0B (R/W  8) Debug Control */
+  __IO RTC_FREQCORR_Type         FREQCORR;    /**< \brief Offset: 0x0C (R/W  8) Frequency Correction */
+       RoReg8                    Reserved2[0x3];
+  __IO RTC_MODE1_COUNT_Type      COUNT;       /**< \brief Offset: 0x10 (R/W 16) MODE1 Counter Value */
+       RoReg8                    Reserved3[0x2];
+  __IO RTC_MODE1_PER_Type        PER;         /**< \brief Offset: 0x14 (R/W 16) MODE1 Counter Period */
+       RoReg8                    Reserved4[0x2];
+  __IO RTC_MODE1_COMP_Type       COMP[2];     /**< \brief Offset: 0x18 (R/W 16) MODE1 Compare n Value */
+} RtcMode1;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief RTC_MODE2 hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* Clock/Calendar with Alarm */
+  __IO RTC_MODE2_CTRL_Type       CTRL;        /**< \brief Offset: 0x00 (R/W 16) MODE2 Control */
+  __IO RTC_READREQ_Type          READREQ;     /**< \brief Offset: 0x02 (R/W 16) Read Request */
+  __IO RTC_MODE2_EVCTRL_Type     EVCTRL;      /**< \brief Offset: 0x04 (R/W 16) MODE2 Event Control */
+  __IO RTC_MODE2_INTENCLR_Type   INTENCLR;    /**< \brief Offset: 0x06 (R/W  8) MODE2 Interrupt Enable Clear */
+  __IO RTC_MODE2_INTENSET_Type   INTENSET;    /**< \brief Offset: 0x07 (R/W  8) MODE2 Interrupt Enable Set */
+  __IO RTC_MODE2_INTFLAG_Type    INTFLAG;     /**< \brief Offset: 0x08 (R/W  8) MODE2 Interrupt Flag Status and Clear */
+       RoReg8                    Reserved1[0x1];
+  __IO RTC_STATUS_Type           STATUS;      /**< \brief Offset: 0x0A (R/W  8) Status */
+  __IO RTC_DBGCTRL_Type          DBGCTRL;     /**< \brief Offset: 0x0B (R/W  8) Debug Control */
+  __IO RTC_FREQCORR_Type         FREQCORR;    /**< \brief Offset: 0x0C (R/W  8) Frequency Correction */
+       RoReg8                    Reserved2[0x3];
+  __IO RTC_MODE2_CLOCK_Type      CLOCK;       /**< \brief Offset: 0x10 (R/W 32) MODE2 Clock Value */
+       RoReg8                    Reserved3[0x4];
+       RtcMode2Alarm             Mode2Alarm[1]; /**< \brief Offset: 0x18 RtcMode2Alarm groups [ALARM_NUM] */
+} RtcMode2;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+       RtcMode0                  MODE0;       /**< \brief Offset: 0x00 32-bit Counter with Single 32-bit Compare */
+       RtcMode1                  MODE1;       /**< \brief Offset: 0x00 16-bit Counter with Two 16-bit Compares */
+       RtcMode2                  MODE2;       /**< \brief Offset: 0x00 Clock/Calendar with Alarm */
+} Rtc;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_RTC_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/sercom.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/sercom.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/sercom.h	(revision 136)
@@ -0,0 +1,1508 @@
+/**
+ * \file
+ *
+ * \brief Component description for SERCOM
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_SERCOM_COMPONENT_
+#define _SAMD21_SERCOM_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR SERCOM */
+/* ========================================================================== */
+/** \addtogroup SAMD21_SERCOM Serial Communication Interface */
+/*@{*/
+
+#define SERCOM_U2201
+#define REV_SERCOM                  0x200
+
+/* -------- SERCOM_I2CM_CTRLA : (SERCOM Offset: 0x00) (R/W 32) I2CM I2CM Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint32_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint32_t MODE:3;           /*!< bit:  2.. 4  Operating Mode                     */
+    uint32_t :2;               /*!< bit:  5.. 6  Reserved                           */
+    uint32_t RUNSTDBY:1;       /*!< bit:      7  Run in Standby                     */
+    uint32_t :8;               /*!< bit:  8..15  Reserved                           */
+    uint32_t PINOUT:1;         /*!< bit:     16  Pin Usage                          */
+    uint32_t :3;               /*!< bit: 17..19  Reserved                           */
+    uint32_t SDAHOLD:2;        /*!< bit: 20..21  SDA Hold Time                      */
+    uint32_t MEXTTOEN:1;       /*!< bit:     22  Master SCL Low Extend Timeout      */
+    uint32_t SEXTTOEN:1;       /*!< bit:     23  Slave SCL Low Extend Timeout       */
+    uint32_t SPEED:2;          /*!< bit: 24..25  Transfer Speed                     */
+    uint32_t :1;               /*!< bit:     26  Reserved                           */
+    uint32_t SCLSM:1;          /*!< bit:     27  SCL Clock Stretch Mode             */
+    uint32_t INACTOUT:2;       /*!< bit: 28..29  Inactive Time-Out                  */
+    uint32_t LOWTOUTEN:1;      /*!< bit:     30  SCL Low Timeout Enable             */
+    uint32_t :1;               /*!< bit:     31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CM_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_CTRLA_OFFSET    0x00         /**< \brief (SERCOM_I2CM_CTRLA offset) I2CM Control A */
+#define SERCOM_I2CM_CTRLA_RESETVALUE 0x00000000   /**< \brief (SERCOM_I2CM_CTRLA reset_value) I2CM Control A */
+
+#define SERCOM_I2CM_CTRLA_SWRST_Pos 0            /**< \brief (SERCOM_I2CM_CTRLA) Software Reset */
+#define SERCOM_I2CM_CTRLA_SWRST     (0x1u << SERCOM_I2CM_CTRLA_SWRST_Pos)
+#define SERCOM_I2CM_CTRLA_ENABLE_Pos 1            /**< \brief (SERCOM_I2CM_CTRLA) Enable */
+#define SERCOM_I2CM_CTRLA_ENABLE    (0x1u << SERCOM_I2CM_CTRLA_ENABLE_Pos)
+#define SERCOM_I2CM_CTRLA_MODE_Pos  2            /**< \brief (SERCOM_I2CM_CTRLA) Operating Mode */
+#define SERCOM_I2CM_CTRLA_MODE_Msk  (0x7u << SERCOM_I2CM_CTRLA_MODE_Pos)
+#define SERCOM_I2CM_CTRLA_MODE(value) ((SERCOM_I2CM_CTRLA_MODE_Msk & ((value) << SERCOM_I2CM_CTRLA_MODE_Pos)))
+#define   SERCOM_I2CM_CTRLA_MODE_USART_EXT_CLK_Val 0x0u   /**< \brief (SERCOM_I2CM_CTRLA) USART mode with external clock */
+#define   SERCOM_I2CM_CTRLA_MODE_USART_INT_CLK_Val 0x1u   /**< \brief (SERCOM_I2CM_CTRLA) USART mode with internal clock */
+#define   SERCOM_I2CM_CTRLA_MODE_SPI_SLAVE_Val 0x2u   /**< \brief (SERCOM_I2CM_CTRLA) SPI mode with external clock */
+#define   SERCOM_I2CM_CTRLA_MODE_SPI_MASTER_Val 0x3u   /**< \brief (SERCOM_I2CM_CTRLA) SPI mode with internal clock */
+#define   SERCOM_I2CM_CTRLA_MODE_I2C_SLAVE_Val 0x4u   /**< \brief (SERCOM_I2CM_CTRLA) I2C mode with external clock */
+#define   SERCOM_I2CM_CTRLA_MODE_I2C_MASTER_Val 0x5u   /**< \brief (SERCOM_I2CM_CTRLA) I2C mode with internal clock */
+#define SERCOM_I2CM_CTRLA_MODE_USART_EXT_CLK (SERCOM_I2CM_CTRLA_MODE_USART_EXT_CLK_Val << SERCOM_I2CM_CTRLA_MODE_Pos)
+#define SERCOM_I2CM_CTRLA_MODE_USART_INT_CLK (SERCOM_I2CM_CTRLA_MODE_USART_INT_CLK_Val << SERCOM_I2CM_CTRLA_MODE_Pos)
+#define SERCOM_I2CM_CTRLA_MODE_SPI_SLAVE (SERCOM_I2CM_CTRLA_MODE_SPI_SLAVE_Val << SERCOM_I2CM_CTRLA_MODE_Pos)
+#define SERCOM_I2CM_CTRLA_MODE_SPI_MASTER (SERCOM_I2CM_CTRLA_MODE_SPI_MASTER_Val << SERCOM_I2CM_CTRLA_MODE_Pos)
+#define SERCOM_I2CM_CTRLA_MODE_I2C_SLAVE (SERCOM_I2CM_CTRLA_MODE_I2C_SLAVE_Val << SERCOM_I2CM_CTRLA_MODE_Pos)
+#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (SERCOM_I2CM_CTRLA_MODE_I2C_MASTER_Val << SERCOM_I2CM_CTRLA_MODE_Pos)
+#define SERCOM_I2CM_CTRLA_RUNSTDBY_Pos 7            /**< \brief (SERCOM_I2CM_CTRLA) Run in Standby */
+#define SERCOM_I2CM_CTRLA_RUNSTDBY  (0x1u << SERCOM_I2CM_CTRLA_RUNSTDBY_Pos)
+#define SERCOM_I2CM_CTRLA_PINOUT_Pos 16           /**< \brief (SERCOM_I2CM_CTRLA) Pin Usage */
+#define SERCOM_I2CM_CTRLA_PINOUT    (0x1u << SERCOM_I2CM_CTRLA_PINOUT_Pos)
+#define SERCOM_I2CM_CTRLA_SDAHOLD_Pos 20           /**< \brief (SERCOM_I2CM_CTRLA) SDA Hold Time */
+#define SERCOM_I2CM_CTRLA_SDAHOLD_Msk (0x3u << SERCOM_I2CM_CTRLA_SDAHOLD_Pos)
+#define SERCOM_I2CM_CTRLA_SDAHOLD(value) ((SERCOM_I2CM_CTRLA_SDAHOLD_Msk & ((value) << SERCOM_I2CM_CTRLA_SDAHOLD_Pos)))
+#define SERCOM_I2CM_CTRLA_MEXTTOEN_Pos 22           /**< \brief (SERCOM_I2CM_CTRLA) Master SCL Low Extend Timeout */
+#define SERCOM_I2CM_CTRLA_MEXTTOEN  (0x1u << SERCOM_I2CM_CTRLA_MEXTTOEN_Pos)
+#define SERCOM_I2CM_CTRLA_SEXTTOEN_Pos 23           /**< \brief (SERCOM_I2CM_CTRLA) Slave SCL Low Extend Timeout */
+#define SERCOM_I2CM_CTRLA_SEXTTOEN  (0x1u << SERCOM_I2CM_CTRLA_SEXTTOEN_Pos)
+#define SERCOM_I2CM_CTRLA_SPEED_Pos 24           /**< \brief (SERCOM_I2CM_CTRLA) Transfer Speed */
+#define SERCOM_I2CM_CTRLA_SPEED_Msk (0x3u << SERCOM_I2CM_CTRLA_SPEED_Pos)
+#define SERCOM_I2CM_CTRLA_SPEED(value) ((SERCOM_I2CM_CTRLA_SPEED_Msk & ((value) << SERCOM_I2CM_CTRLA_SPEED_Pos)))
+#define SERCOM_I2CM_CTRLA_SCLSM_Pos 27           /**< \brief (SERCOM_I2CM_CTRLA) SCL Clock Stretch Mode */
+#define SERCOM_I2CM_CTRLA_SCLSM     (0x1u << SERCOM_I2CM_CTRLA_SCLSM_Pos)
+#define SERCOM_I2CM_CTRLA_INACTOUT_Pos 28           /**< \brief (SERCOM_I2CM_CTRLA) Inactive Time-Out */
+#define SERCOM_I2CM_CTRLA_INACTOUT_Msk (0x3u << SERCOM_I2CM_CTRLA_INACTOUT_Pos)
+#define SERCOM_I2CM_CTRLA_INACTOUT(value) ((SERCOM_I2CM_CTRLA_INACTOUT_Msk & ((value) << SERCOM_I2CM_CTRLA_INACTOUT_Pos)))
+#define SERCOM_I2CM_CTRLA_LOWTOUTEN_Pos 30           /**< \brief (SERCOM_I2CM_CTRLA) SCL Low Timeout Enable */
+#define SERCOM_I2CM_CTRLA_LOWTOUTEN (0x1u << SERCOM_I2CM_CTRLA_LOWTOUTEN_Pos)
+#define SERCOM_I2CM_CTRLA_MASK      0x7BF1009Fu  /**< \brief (SERCOM_I2CM_CTRLA) MASK Register */
+
+/* -------- SERCOM_I2CS_CTRLA : (SERCOM Offset: 0x00) (R/W 32) I2CS I2CS Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint32_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint32_t MODE:3;           /*!< bit:  2.. 4  Operating Mode                     */
+    uint32_t :2;               /*!< bit:  5.. 6  Reserved                           */
+    uint32_t RUNSTDBY:1;       /*!< bit:      7  Run during Standby                 */
+    uint32_t :8;               /*!< bit:  8..15  Reserved                           */
+    uint32_t PINOUT:1;         /*!< bit:     16  Pin Usage                          */
+    uint32_t :3;               /*!< bit: 17..19  Reserved                           */
+    uint32_t SDAHOLD:2;        /*!< bit: 20..21  SDA Hold Time                      */
+    uint32_t :1;               /*!< bit:     22  Reserved                           */
+    uint32_t SEXTTOEN:1;       /*!< bit:     23  Slave SCL Low Extend Timeout       */
+    uint32_t SPEED:2;          /*!< bit: 24..25  Transfer Speed                     */
+    uint32_t :1;               /*!< bit:     26  Reserved                           */
+    uint32_t SCLSM:1;          /*!< bit:     27  SCL Clock Stretch Mode             */
+    uint32_t :2;               /*!< bit: 28..29  Reserved                           */
+    uint32_t LOWTOUTEN:1;      /*!< bit:     30  SCL Low Timeout Enable             */
+    uint32_t :1;               /*!< bit:     31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CS_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CS_CTRLA_OFFSET    0x00         /**< \brief (SERCOM_I2CS_CTRLA offset) I2CS Control A */
+#define SERCOM_I2CS_CTRLA_RESETVALUE 0x00000000   /**< \brief (SERCOM_I2CS_CTRLA reset_value) I2CS Control A */
+
+#define SERCOM_I2CS_CTRLA_SWRST_Pos 0            /**< \brief (SERCOM_I2CS_CTRLA) Software Reset */
+#define SERCOM_I2CS_CTRLA_SWRST     (0x1u << SERCOM_I2CS_CTRLA_SWRST_Pos)
+#define SERCOM_I2CS_CTRLA_ENABLE_Pos 1            /**< \brief (SERCOM_I2CS_CTRLA) Enable */
+#define SERCOM_I2CS_CTRLA_ENABLE    (0x1u << SERCOM_I2CS_CTRLA_ENABLE_Pos)
+#define SERCOM_I2CS_CTRLA_MODE_Pos  2            /**< \brief (SERCOM_I2CS_CTRLA) Operating Mode */
+#define SERCOM_I2CS_CTRLA_MODE_Msk  (0x7u << SERCOM_I2CS_CTRLA_MODE_Pos)
+#define SERCOM_I2CS_CTRLA_MODE(value) ((SERCOM_I2CS_CTRLA_MODE_Msk & ((value) << SERCOM_I2CS_CTRLA_MODE_Pos)))
+#define   SERCOM_I2CS_CTRLA_MODE_USART_EXT_CLK_Val 0x0u   /**< \brief (SERCOM_I2CS_CTRLA) USART mode with external clock */
+#define   SERCOM_I2CS_CTRLA_MODE_USART_INT_CLK_Val 0x1u   /**< \brief (SERCOM_I2CS_CTRLA) USART mode with internal clock */
+#define   SERCOM_I2CS_CTRLA_MODE_SPI_SLAVE_Val 0x2u   /**< \brief (SERCOM_I2CS_CTRLA) SPI mode with external clock */
+#define   SERCOM_I2CS_CTRLA_MODE_SPI_MASTER_Val 0x3u   /**< \brief (SERCOM_I2CS_CTRLA) SPI mode with internal clock */
+#define   SERCOM_I2CS_CTRLA_MODE_I2C_SLAVE_Val 0x4u   /**< \brief (SERCOM_I2CS_CTRLA) I2C mode with external clock */
+#define   SERCOM_I2CS_CTRLA_MODE_I2C_MASTER_Val 0x5u   /**< \brief (SERCOM_I2CS_CTRLA) I2C mode with internal clock */
+#define SERCOM_I2CS_CTRLA_MODE_USART_EXT_CLK (SERCOM_I2CS_CTRLA_MODE_USART_EXT_CLK_Val << SERCOM_I2CS_CTRLA_MODE_Pos)
+#define SERCOM_I2CS_CTRLA_MODE_USART_INT_CLK (SERCOM_I2CS_CTRLA_MODE_USART_INT_CLK_Val << SERCOM_I2CS_CTRLA_MODE_Pos)
+#define SERCOM_I2CS_CTRLA_MODE_SPI_SLAVE (SERCOM_I2CS_CTRLA_MODE_SPI_SLAVE_Val << SERCOM_I2CS_CTRLA_MODE_Pos)
+#define SERCOM_I2CS_CTRLA_MODE_SPI_MASTER (SERCOM_I2CS_CTRLA_MODE_SPI_MASTER_Val << SERCOM_I2CS_CTRLA_MODE_Pos)
+#define SERCOM_I2CS_CTRLA_MODE_I2C_SLAVE (SERCOM_I2CS_CTRLA_MODE_I2C_SLAVE_Val << SERCOM_I2CS_CTRLA_MODE_Pos)
+#define SERCOM_I2CS_CTRLA_MODE_I2C_MASTER (SERCOM_I2CS_CTRLA_MODE_I2C_MASTER_Val << SERCOM_I2CS_CTRLA_MODE_Pos)
+#define SERCOM_I2CS_CTRLA_RUNSTDBY_Pos 7            /**< \brief (SERCOM_I2CS_CTRLA) Run during Standby */
+#define SERCOM_I2CS_CTRLA_RUNSTDBY  (0x1u << SERCOM_I2CS_CTRLA_RUNSTDBY_Pos)
+#define SERCOM_I2CS_CTRLA_PINOUT_Pos 16           /**< \brief (SERCOM_I2CS_CTRLA) Pin Usage */
+#define SERCOM_I2CS_CTRLA_PINOUT    (0x1u << SERCOM_I2CS_CTRLA_PINOUT_Pos)
+#define SERCOM_I2CS_CTRLA_SDAHOLD_Pos 20           /**< \brief (SERCOM_I2CS_CTRLA) SDA Hold Time */
+#define SERCOM_I2CS_CTRLA_SDAHOLD_Msk (0x3u << SERCOM_I2CS_CTRLA_SDAHOLD_Pos)
+#define SERCOM_I2CS_CTRLA_SDAHOLD(value) ((SERCOM_I2CS_CTRLA_SDAHOLD_Msk & ((value) << SERCOM_I2CS_CTRLA_SDAHOLD_Pos)))
+#define SERCOM_I2CS_CTRLA_SEXTTOEN_Pos 23           /**< \brief (SERCOM_I2CS_CTRLA) Slave SCL Low Extend Timeout */
+#define SERCOM_I2CS_CTRLA_SEXTTOEN  (0x1u << SERCOM_I2CS_CTRLA_SEXTTOEN_Pos)
+#define SERCOM_I2CS_CTRLA_SPEED_Pos 24           /**< \brief (SERCOM_I2CS_CTRLA) Transfer Speed */
+#define SERCOM_I2CS_CTRLA_SPEED_Msk (0x3u << SERCOM_I2CS_CTRLA_SPEED_Pos)
+#define SERCOM_I2CS_CTRLA_SPEED(value) ((SERCOM_I2CS_CTRLA_SPEED_Msk & ((value) << SERCOM_I2CS_CTRLA_SPEED_Pos)))
+#define SERCOM_I2CS_CTRLA_SCLSM_Pos 27           /**< \brief (SERCOM_I2CS_CTRLA) SCL Clock Stretch Mode */
+#define SERCOM_I2CS_CTRLA_SCLSM     (0x1u << SERCOM_I2CS_CTRLA_SCLSM_Pos)
+#define SERCOM_I2CS_CTRLA_LOWTOUTEN_Pos 30           /**< \brief (SERCOM_I2CS_CTRLA) SCL Low Timeout Enable */
+#define SERCOM_I2CS_CTRLA_LOWTOUTEN (0x1u << SERCOM_I2CS_CTRLA_LOWTOUTEN_Pos)
+#define SERCOM_I2CS_CTRLA_MASK      0x4BB1009Fu  /**< \brief (SERCOM_I2CS_CTRLA) MASK Register */
+
+/* -------- SERCOM_SPI_CTRLA : (SERCOM Offset: 0x00) (R/W 32) SPI SPI Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint32_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint32_t MODE:3;           /*!< bit:  2.. 4  Operating Mode                     */
+    uint32_t :2;               /*!< bit:  5.. 6  Reserved                           */
+    uint32_t RUNSTDBY:1;       /*!< bit:      7  Run during Standby                 */
+    uint32_t IBON:1;           /*!< bit:      8  Immediate Buffer Overflow Notification */
+    uint32_t :7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t DOPO:2;           /*!< bit: 16..17  Data Out Pinout                    */
+    uint32_t :2;               /*!< bit: 18..19  Reserved                           */
+    uint32_t DIPO:2;           /*!< bit: 20..21  Data In Pinout                     */
+    uint32_t :2;               /*!< bit: 22..23  Reserved                           */
+    uint32_t FORM:4;           /*!< bit: 24..27  Frame Format                       */
+    uint32_t CPHA:1;           /*!< bit:     28  Clock Phase                        */
+    uint32_t CPOL:1;           /*!< bit:     29  Clock Polarity                     */
+    uint32_t DORD:1;           /*!< bit:     30  Data Order                         */
+    uint32_t :1;               /*!< bit:     31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_SPI_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_CTRLA_OFFSET     0x00         /**< \brief (SERCOM_SPI_CTRLA offset) SPI Control A */
+#define SERCOM_SPI_CTRLA_RESETVALUE 0x00000000   /**< \brief (SERCOM_SPI_CTRLA reset_value) SPI Control A */
+
+#define SERCOM_SPI_CTRLA_SWRST_Pos  0            /**< \brief (SERCOM_SPI_CTRLA) Software Reset */
+#define SERCOM_SPI_CTRLA_SWRST      (0x1u << SERCOM_SPI_CTRLA_SWRST_Pos)
+#define SERCOM_SPI_CTRLA_ENABLE_Pos 1            /**< \brief (SERCOM_SPI_CTRLA) Enable */
+#define SERCOM_SPI_CTRLA_ENABLE     (0x1u << SERCOM_SPI_CTRLA_ENABLE_Pos)
+#define SERCOM_SPI_CTRLA_MODE_Pos   2            /**< \brief (SERCOM_SPI_CTRLA) Operating Mode */
+#define SERCOM_SPI_CTRLA_MODE_Msk   (0x7u << SERCOM_SPI_CTRLA_MODE_Pos)
+#define SERCOM_SPI_CTRLA_MODE(value) ((SERCOM_SPI_CTRLA_MODE_Msk & ((value) << SERCOM_SPI_CTRLA_MODE_Pos)))
+#define   SERCOM_SPI_CTRLA_MODE_USART_EXT_CLK_Val 0x0u   /**< \brief (SERCOM_SPI_CTRLA) USART mode with external clock */
+#define   SERCOM_SPI_CTRLA_MODE_USART_INT_CLK_Val 0x1u   /**< \brief (SERCOM_SPI_CTRLA) USART mode with internal clock */
+#define   SERCOM_SPI_CTRLA_MODE_SPI_SLAVE_Val 0x2u   /**< \brief (SERCOM_SPI_CTRLA) SPI mode with external clock */
+#define   SERCOM_SPI_CTRLA_MODE_SPI_MASTER_Val 0x3u   /**< \brief (SERCOM_SPI_CTRLA) SPI mode with internal clock */
+#define   SERCOM_SPI_CTRLA_MODE_I2C_SLAVE_Val 0x4u   /**< \brief (SERCOM_SPI_CTRLA) I2C mode with external clock */
+#define   SERCOM_SPI_CTRLA_MODE_I2C_MASTER_Val 0x5u   /**< \brief (SERCOM_SPI_CTRLA) I2C mode with internal clock */
+#define SERCOM_SPI_CTRLA_MODE_USART_EXT_CLK (SERCOM_SPI_CTRLA_MODE_USART_EXT_CLK_Val << SERCOM_SPI_CTRLA_MODE_Pos)
+#define SERCOM_SPI_CTRLA_MODE_USART_INT_CLK (SERCOM_SPI_CTRLA_MODE_USART_INT_CLK_Val << SERCOM_SPI_CTRLA_MODE_Pos)
+#define SERCOM_SPI_CTRLA_MODE_SPI_SLAVE (SERCOM_SPI_CTRLA_MODE_SPI_SLAVE_Val << SERCOM_SPI_CTRLA_MODE_Pos)
+#define SERCOM_SPI_CTRLA_MODE_SPI_MASTER (SERCOM_SPI_CTRLA_MODE_SPI_MASTER_Val << SERCOM_SPI_CTRLA_MODE_Pos)
+#define SERCOM_SPI_CTRLA_MODE_I2C_SLAVE (SERCOM_SPI_CTRLA_MODE_I2C_SLAVE_Val << SERCOM_SPI_CTRLA_MODE_Pos)
+#define SERCOM_SPI_CTRLA_MODE_I2C_MASTER (SERCOM_SPI_CTRLA_MODE_I2C_MASTER_Val << SERCOM_SPI_CTRLA_MODE_Pos)
+#define SERCOM_SPI_CTRLA_RUNSTDBY_Pos 7            /**< \brief (SERCOM_SPI_CTRLA) Run during Standby */
+#define SERCOM_SPI_CTRLA_RUNSTDBY   (0x1u << SERCOM_SPI_CTRLA_RUNSTDBY_Pos)
+#define SERCOM_SPI_CTRLA_IBON_Pos   8            /**< \brief (SERCOM_SPI_CTRLA) Immediate Buffer Overflow Notification */
+#define SERCOM_SPI_CTRLA_IBON       (0x1u << SERCOM_SPI_CTRLA_IBON_Pos)
+#define SERCOM_SPI_CTRLA_DOPO_Pos   16           /**< \brief (SERCOM_SPI_CTRLA) Data Out Pinout */
+#define SERCOM_SPI_CTRLA_DOPO_Msk   (0x3u << SERCOM_SPI_CTRLA_DOPO_Pos)
+#define SERCOM_SPI_CTRLA_DOPO(value) ((SERCOM_SPI_CTRLA_DOPO_Msk & ((value) << SERCOM_SPI_CTRLA_DOPO_Pos)))
+#define SERCOM_SPI_CTRLA_DIPO_Pos   20           /**< \brief (SERCOM_SPI_CTRLA) Data In Pinout */
+#define SERCOM_SPI_CTRLA_DIPO_Msk   (0x3u << SERCOM_SPI_CTRLA_DIPO_Pos)
+#define SERCOM_SPI_CTRLA_DIPO(value) ((SERCOM_SPI_CTRLA_DIPO_Msk & ((value) << SERCOM_SPI_CTRLA_DIPO_Pos)))
+#define SERCOM_SPI_CTRLA_FORM_Pos   24           /**< \brief (SERCOM_SPI_CTRLA) Frame Format */
+#define SERCOM_SPI_CTRLA_FORM_Msk   (0xFu << SERCOM_SPI_CTRLA_FORM_Pos)
+#define SERCOM_SPI_CTRLA_FORM(value) ((SERCOM_SPI_CTRLA_FORM_Msk & ((value) << SERCOM_SPI_CTRLA_FORM_Pos)))
+#define SERCOM_SPI_CTRLA_CPHA_Pos   28           /**< \brief (SERCOM_SPI_CTRLA) Clock Phase */
+#define SERCOM_SPI_CTRLA_CPHA       (0x1u << SERCOM_SPI_CTRLA_CPHA_Pos)
+#define SERCOM_SPI_CTRLA_CPOL_Pos   29           /**< \brief (SERCOM_SPI_CTRLA) Clock Polarity */
+#define SERCOM_SPI_CTRLA_CPOL       (0x1u << SERCOM_SPI_CTRLA_CPOL_Pos)
+#define SERCOM_SPI_CTRLA_DORD_Pos   30           /**< \brief (SERCOM_SPI_CTRLA) Data Order */
+#define SERCOM_SPI_CTRLA_DORD       (0x1u << SERCOM_SPI_CTRLA_DORD_Pos)
+#define SERCOM_SPI_CTRLA_MASK       0x7F33019Fu  /**< \brief (SERCOM_SPI_CTRLA) MASK Register */
+
+/* -------- SERCOM_USART_CTRLA : (SERCOM Offset: 0x00) (R/W 32) USART USART Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint32_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint32_t MODE:3;           /*!< bit:  2.. 4  Operating Mode                     */
+    uint32_t :2;               /*!< bit:  5.. 6  Reserved                           */
+    uint32_t RUNSTDBY:1;       /*!< bit:      7  Run during Standby                 */
+    uint32_t IBON:1;           /*!< bit:      8  Immediate Buffer Overflow Notification */
+    uint32_t :4;               /*!< bit:  9..12  Reserved                           */
+    uint32_t SAMPR:3;          /*!< bit: 13..15  Sample                             */
+    uint32_t TXPO:2;           /*!< bit: 16..17  Transmit Data Pinout               */
+    uint32_t :2;               /*!< bit: 18..19  Reserved                           */
+    uint32_t RXPO:2;           /*!< bit: 20..21  Receive Data Pinout                */
+    uint32_t SAMPA:2;          /*!< bit: 22..23  Sample Adjustment                  */
+    uint32_t FORM:4;           /*!< bit: 24..27  Frame Format                       */
+    uint32_t CMODE:1;          /*!< bit:     28  Communication Mode                 */
+    uint32_t CPOL:1;           /*!< bit:     29  Clock Polarity                     */
+    uint32_t DORD:1;           /*!< bit:     30  Data Order                         */
+    uint32_t :1;               /*!< bit:     31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_USART_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_CTRLA_OFFSET   0x00         /**< \brief (SERCOM_USART_CTRLA offset) USART Control A */
+#define SERCOM_USART_CTRLA_RESETVALUE 0x00000000   /**< \brief (SERCOM_USART_CTRLA reset_value) USART Control A */
+
+#define SERCOM_USART_CTRLA_SWRST_Pos 0            /**< \brief (SERCOM_USART_CTRLA) Software Reset */
+#define SERCOM_USART_CTRLA_SWRST    (0x1u << SERCOM_USART_CTRLA_SWRST_Pos)
+#define SERCOM_USART_CTRLA_ENABLE_Pos 1            /**< \brief (SERCOM_USART_CTRLA) Enable */
+#define SERCOM_USART_CTRLA_ENABLE   (0x1u << SERCOM_USART_CTRLA_ENABLE_Pos)
+#define SERCOM_USART_CTRLA_MODE_Pos 2            /**< \brief (SERCOM_USART_CTRLA) Operating Mode */
+#define SERCOM_USART_CTRLA_MODE_Msk (0x7u << SERCOM_USART_CTRLA_MODE_Pos)
+#define SERCOM_USART_CTRLA_MODE(value) ((SERCOM_USART_CTRLA_MODE_Msk & ((value) << SERCOM_USART_CTRLA_MODE_Pos)))
+#define   SERCOM_USART_CTRLA_MODE_USART_EXT_CLK_Val 0x0u   /**< \brief (SERCOM_USART_CTRLA) USART mode with external clock */
+#define   SERCOM_USART_CTRLA_MODE_USART_INT_CLK_Val 0x1u   /**< \brief (SERCOM_USART_CTRLA) USART mode with internal clock */
+#define   SERCOM_USART_CTRLA_MODE_SPI_SLAVE_Val 0x2u   /**< \brief (SERCOM_USART_CTRLA) SPI mode with external clock */
+#define   SERCOM_USART_CTRLA_MODE_SPI_MASTER_Val 0x3u   /**< \brief (SERCOM_USART_CTRLA) SPI mode with internal clock */
+#define   SERCOM_USART_CTRLA_MODE_I2C_SLAVE_Val 0x4u   /**< \brief (SERCOM_USART_CTRLA) I2C mode with external clock */
+#define   SERCOM_USART_CTRLA_MODE_I2C_MASTER_Val 0x5u   /**< \brief (SERCOM_USART_CTRLA) I2C mode with internal clock */
+#define SERCOM_USART_CTRLA_MODE_USART_EXT_CLK (SERCOM_USART_CTRLA_MODE_USART_EXT_CLK_Val << SERCOM_USART_CTRLA_MODE_Pos)
+#define SERCOM_USART_CTRLA_MODE_USART_INT_CLK (SERCOM_USART_CTRLA_MODE_USART_INT_CLK_Val << SERCOM_USART_CTRLA_MODE_Pos)
+#define SERCOM_USART_CTRLA_MODE_SPI_SLAVE (SERCOM_USART_CTRLA_MODE_SPI_SLAVE_Val << SERCOM_USART_CTRLA_MODE_Pos)
+#define SERCOM_USART_CTRLA_MODE_SPI_MASTER (SERCOM_USART_CTRLA_MODE_SPI_MASTER_Val << SERCOM_USART_CTRLA_MODE_Pos)
+#define SERCOM_USART_CTRLA_MODE_I2C_SLAVE (SERCOM_USART_CTRLA_MODE_I2C_SLAVE_Val << SERCOM_USART_CTRLA_MODE_Pos)
+#define SERCOM_USART_CTRLA_MODE_I2C_MASTER (SERCOM_USART_CTRLA_MODE_I2C_MASTER_Val << SERCOM_USART_CTRLA_MODE_Pos)
+#define SERCOM_USART_CTRLA_RUNSTDBY_Pos 7            /**< \brief (SERCOM_USART_CTRLA) Run during Standby */
+#define SERCOM_USART_CTRLA_RUNSTDBY (0x1u << SERCOM_USART_CTRLA_RUNSTDBY_Pos)
+#define SERCOM_USART_CTRLA_IBON_Pos 8            /**< \brief (SERCOM_USART_CTRLA) Immediate Buffer Overflow Notification */
+#define SERCOM_USART_CTRLA_IBON     (0x1u << SERCOM_USART_CTRLA_IBON_Pos)
+#define SERCOM_USART_CTRLA_SAMPR_Pos 13           /**< \brief (SERCOM_USART_CTRLA) Sample */
+#define SERCOM_USART_CTRLA_SAMPR_Msk (0x7u << SERCOM_USART_CTRLA_SAMPR_Pos)
+#define SERCOM_USART_CTRLA_SAMPR(value) ((SERCOM_USART_CTRLA_SAMPR_Msk & ((value) << SERCOM_USART_CTRLA_SAMPR_Pos)))
+#define SERCOM_USART_CTRLA_TXPO_Pos 16           /**< \brief (SERCOM_USART_CTRLA) Transmit Data Pinout */
+#define SERCOM_USART_CTRLA_TXPO_Msk (0x3u << SERCOM_USART_CTRLA_TXPO_Pos)
+#define SERCOM_USART_CTRLA_TXPO(value) ((SERCOM_USART_CTRLA_TXPO_Msk & ((value) << SERCOM_USART_CTRLA_TXPO_Pos)))
+#define SERCOM_USART_CTRLA_RXPO_Pos 20           /**< \brief (SERCOM_USART_CTRLA) Receive Data Pinout */
+#define SERCOM_USART_CTRLA_RXPO_Msk (0x3u << SERCOM_USART_CTRLA_RXPO_Pos)
+#define SERCOM_USART_CTRLA_RXPO(value) ((SERCOM_USART_CTRLA_RXPO_Msk & ((value) << SERCOM_USART_CTRLA_RXPO_Pos)))
+#define SERCOM_USART_CTRLA_SAMPA_Pos 22           /**< \brief (SERCOM_USART_CTRLA) Sample Adjustment */
+#define SERCOM_USART_CTRLA_SAMPA_Msk (0x3u << SERCOM_USART_CTRLA_SAMPA_Pos)
+#define SERCOM_USART_CTRLA_SAMPA(value) ((SERCOM_USART_CTRLA_SAMPA_Msk & ((value) << SERCOM_USART_CTRLA_SAMPA_Pos)))
+#define SERCOM_USART_CTRLA_FORM_Pos 24           /**< \brief (SERCOM_USART_CTRLA) Frame Format */
+#define SERCOM_USART_CTRLA_FORM_Msk (0xFu << SERCOM_USART_CTRLA_FORM_Pos)
+#define SERCOM_USART_CTRLA_FORM(value) ((SERCOM_USART_CTRLA_FORM_Msk & ((value) << SERCOM_USART_CTRLA_FORM_Pos)))
+#define SERCOM_USART_CTRLA_CMODE_Pos 28           /**< \brief (SERCOM_USART_CTRLA) Communication Mode */
+#define SERCOM_USART_CTRLA_CMODE    (0x1u << SERCOM_USART_CTRLA_CMODE_Pos)
+#define SERCOM_USART_CTRLA_CPOL_Pos 29           /**< \brief (SERCOM_USART_CTRLA) Clock Polarity */
+#define SERCOM_USART_CTRLA_CPOL     (0x1u << SERCOM_USART_CTRLA_CPOL_Pos)
+#define SERCOM_USART_CTRLA_DORD_Pos 30           /**< \brief (SERCOM_USART_CTRLA) Data Order */
+#define SERCOM_USART_CTRLA_DORD     (0x1u << SERCOM_USART_CTRLA_DORD_Pos)
+#define SERCOM_USART_CTRLA_MASK     0x7FF3E19Fu  /**< \brief (SERCOM_USART_CTRLA) MASK Register */
+
+/* -------- SERCOM_I2CM_CTRLB : (SERCOM Offset: 0x04) (R/W 32) I2CM I2CM Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :8;               /*!< bit:  0.. 7  Reserved                           */
+    uint32_t SMEN:1;           /*!< bit:      8  Smart Mode Enable                  */
+    uint32_t QCEN:1;           /*!< bit:      9  Quick Command Enable               */
+    uint32_t :6;               /*!< bit: 10..15  Reserved                           */
+    uint32_t CMD:2;            /*!< bit: 16..17  Command                            */
+    uint32_t ACKACT:1;         /*!< bit:     18  Acknowledge Action                 */
+    uint32_t :13;              /*!< bit: 19..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CM_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_CTRLB_OFFSET    0x04         /**< \brief (SERCOM_I2CM_CTRLB offset) I2CM Control B */
+#define SERCOM_I2CM_CTRLB_RESETVALUE 0x00000000   /**< \brief (SERCOM_I2CM_CTRLB reset_value) I2CM Control B */
+
+#define SERCOM_I2CM_CTRLB_SMEN_Pos  8            /**< \brief (SERCOM_I2CM_CTRLB) Smart Mode Enable */
+#define SERCOM_I2CM_CTRLB_SMEN      (0x1u << SERCOM_I2CM_CTRLB_SMEN_Pos)
+#define SERCOM_I2CM_CTRLB_QCEN_Pos  9            /**< \brief (SERCOM_I2CM_CTRLB) Quick Command Enable */
+#define SERCOM_I2CM_CTRLB_QCEN      (0x1u << SERCOM_I2CM_CTRLB_QCEN_Pos)
+#define SERCOM_I2CM_CTRLB_CMD_Pos   16           /**< \brief (SERCOM_I2CM_CTRLB) Command */
+#define SERCOM_I2CM_CTRLB_CMD_Msk   (0x3u << SERCOM_I2CM_CTRLB_CMD_Pos)
+#define SERCOM_I2CM_CTRLB_CMD(value) ((SERCOM_I2CM_CTRLB_CMD_Msk & ((value) << SERCOM_I2CM_CTRLB_CMD_Pos)))
+#define SERCOM_I2CM_CTRLB_ACKACT_Pos 18           /**< \brief (SERCOM_I2CM_CTRLB) Acknowledge Action */
+#define SERCOM_I2CM_CTRLB_ACKACT    (0x1u << SERCOM_I2CM_CTRLB_ACKACT_Pos)
+#define SERCOM_I2CM_CTRLB_MASK      0x00070300u  /**< \brief (SERCOM_I2CM_CTRLB) MASK Register */
+
+/* -------- SERCOM_I2CS_CTRLB : (SERCOM Offset: 0x04) (R/W 32) I2CS I2CS Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :8;               /*!< bit:  0.. 7  Reserved                           */
+    uint32_t SMEN:1;           /*!< bit:      8  Smart Mode Enable                  */
+    uint32_t GCMD:1;           /*!< bit:      9  PMBus Group Command                */
+    uint32_t AACKEN:1;         /*!< bit:     10  Automatic Address Acknowledge      */
+    uint32_t :3;               /*!< bit: 11..13  Reserved                           */
+    uint32_t AMODE:2;          /*!< bit: 14..15  Address Mode                       */
+    uint32_t CMD:2;            /*!< bit: 16..17  Command                            */
+    uint32_t ACKACT:1;         /*!< bit:     18  Acknowledge Action                 */
+    uint32_t :13;              /*!< bit: 19..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CS_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CS_CTRLB_OFFSET    0x04         /**< \brief (SERCOM_I2CS_CTRLB offset) I2CS Control B */
+#define SERCOM_I2CS_CTRLB_RESETVALUE 0x00000000   /**< \brief (SERCOM_I2CS_CTRLB reset_value) I2CS Control B */
+
+#define SERCOM_I2CS_CTRLB_SMEN_Pos  8            /**< \brief (SERCOM_I2CS_CTRLB) Smart Mode Enable */
+#define SERCOM_I2CS_CTRLB_SMEN      (0x1u << SERCOM_I2CS_CTRLB_SMEN_Pos)
+#define SERCOM_I2CS_CTRLB_GCMD_Pos  9            /**< \brief (SERCOM_I2CS_CTRLB) PMBus Group Command */
+#define SERCOM_I2CS_CTRLB_GCMD      (0x1u << SERCOM_I2CS_CTRLB_GCMD_Pos)
+#define SERCOM_I2CS_CTRLB_AACKEN_Pos 10           /**< \brief (SERCOM_I2CS_CTRLB) Automatic Address Acknowledge */
+#define SERCOM_I2CS_CTRLB_AACKEN    (0x1u << SERCOM_I2CS_CTRLB_AACKEN_Pos)
+#define SERCOM_I2CS_CTRLB_AMODE_Pos 14           /**< \brief (SERCOM_I2CS_CTRLB) Address Mode */
+#define SERCOM_I2CS_CTRLB_AMODE_Msk (0x3u << SERCOM_I2CS_CTRLB_AMODE_Pos)
+#define SERCOM_I2CS_CTRLB_AMODE(value) ((SERCOM_I2CS_CTRLB_AMODE_Msk & ((value) << SERCOM_I2CS_CTRLB_AMODE_Pos)))
+#define SERCOM_I2CS_CTRLB_CMD_Pos   16           /**< \brief (SERCOM_I2CS_CTRLB) Command */
+#define SERCOM_I2CS_CTRLB_CMD_Msk   (0x3u << SERCOM_I2CS_CTRLB_CMD_Pos)
+#define SERCOM_I2CS_CTRLB_CMD(value) ((SERCOM_I2CS_CTRLB_CMD_Msk & ((value) << SERCOM_I2CS_CTRLB_CMD_Pos)))
+#define SERCOM_I2CS_CTRLB_ACKACT_Pos 18           /**< \brief (SERCOM_I2CS_CTRLB) Acknowledge Action */
+#define SERCOM_I2CS_CTRLB_ACKACT    (0x1u << SERCOM_I2CS_CTRLB_ACKACT_Pos)
+#define SERCOM_I2CS_CTRLB_MASK      0x0007C700u  /**< \brief (SERCOM_I2CS_CTRLB) MASK Register */
+
+/* -------- SERCOM_SPI_CTRLB : (SERCOM Offset: 0x04) (R/W 32) SPI SPI Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CHSIZE:3;         /*!< bit:  0.. 2  Character Size                     */
+    uint32_t :3;               /*!< bit:  3.. 5  Reserved                           */
+    uint32_t PLOADEN:1;        /*!< bit:      6  Data Preload Enable                */
+    uint32_t :2;               /*!< bit:  7.. 8  Reserved                           */
+    uint32_t SSDE:1;           /*!< bit:      9  Slave Select Low Detect Enable     */
+    uint32_t :3;               /*!< bit: 10..12  Reserved                           */
+    uint32_t MSSEN:1;          /*!< bit:     13  Master Slave Select Enable         */
+    uint32_t AMODE:2;          /*!< bit: 14..15  Address Mode                       */
+    uint32_t :1;               /*!< bit:     16  Reserved                           */
+    uint32_t RXEN:1;           /*!< bit:     17  Receiver Enable                    */
+    uint32_t :14;              /*!< bit: 18..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_SPI_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_CTRLB_OFFSET     0x04         /**< \brief (SERCOM_SPI_CTRLB offset) SPI Control B */
+#define SERCOM_SPI_CTRLB_RESETVALUE 0x00000000   /**< \brief (SERCOM_SPI_CTRLB reset_value) SPI Control B */
+
+#define SERCOM_SPI_CTRLB_CHSIZE_Pos 0            /**< \brief (SERCOM_SPI_CTRLB) Character Size */
+#define SERCOM_SPI_CTRLB_CHSIZE_Msk (0x7u << SERCOM_SPI_CTRLB_CHSIZE_Pos)
+#define SERCOM_SPI_CTRLB_CHSIZE(value) ((SERCOM_SPI_CTRLB_CHSIZE_Msk & ((value) << SERCOM_SPI_CTRLB_CHSIZE_Pos)))
+#define SERCOM_SPI_CTRLB_PLOADEN_Pos 6            /**< \brief (SERCOM_SPI_CTRLB) Data Preload Enable */
+#define SERCOM_SPI_CTRLB_PLOADEN    (0x1u << SERCOM_SPI_CTRLB_PLOADEN_Pos)
+#define SERCOM_SPI_CTRLB_SSDE_Pos   9            /**< \brief (SERCOM_SPI_CTRLB) Slave Select Low Detect Enable */
+#define SERCOM_SPI_CTRLB_SSDE       (0x1u << SERCOM_SPI_CTRLB_SSDE_Pos)
+#define SERCOM_SPI_CTRLB_MSSEN_Pos  13           /**< \brief (SERCOM_SPI_CTRLB) Master Slave Select Enable */
+#define SERCOM_SPI_CTRLB_MSSEN      (0x1u << SERCOM_SPI_CTRLB_MSSEN_Pos)
+#define SERCOM_SPI_CTRLB_AMODE_Pos  14           /**< \brief (SERCOM_SPI_CTRLB) Address Mode */
+#define SERCOM_SPI_CTRLB_AMODE_Msk  (0x3u << SERCOM_SPI_CTRLB_AMODE_Pos)
+#define SERCOM_SPI_CTRLB_AMODE(value) ((SERCOM_SPI_CTRLB_AMODE_Msk & ((value) << SERCOM_SPI_CTRLB_AMODE_Pos)))
+#define SERCOM_SPI_CTRLB_RXEN_Pos   17           /**< \brief (SERCOM_SPI_CTRLB) Receiver Enable */
+#define SERCOM_SPI_CTRLB_RXEN       (0x1u << SERCOM_SPI_CTRLB_RXEN_Pos)
+#define SERCOM_SPI_CTRLB_MASK       0x0002E247u  /**< \brief (SERCOM_SPI_CTRLB) MASK Register */
+
+/* -------- SERCOM_USART_CTRLB : (SERCOM Offset: 0x04) (R/W 32) USART USART Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CHSIZE:3;         /*!< bit:  0.. 2  Character Size                     */
+    uint32_t :3;               /*!< bit:  3.. 5  Reserved                           */
+    uint32_t SBMODE:1;         /*!< bit:      6  Stop Bit Mode                      */
+    uint32_t :1;               /*!< bit:      7  Reserved                           */
+    uint32_t COLDEN:1;         /*!< bit:      8  Collision Detection Enable         */
+    uint32_t SFDE:1;           /*!< bit:      9  Start of Frame Detection Enable    */
+    uint32_t ENC:1;            /*!< bit:     10  Encoding Format                    */
+    uint32_t :2;               /*!< bit: 11..12  Reserved                           */
+    uint32_t PMODE:1;          /*!< bit:     13  Parity Mode                        */
+    uint32_t :2;               /*!< bit: 14..15  Reserved                           */
+    uint32_t TXEN:1;           /*!< bit:     16  Transmitter Enable                 */
+    uint32_t RXEN:1;           /*!< bit:     17  Receiver Enable                    */
+    uint32_t :14;              /*!< bit: 18..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_USART_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_CTRLB_OFFSET   0x04         /**< \brief (SERCOM_USART_CTRLB offset) USART Control B */
+#define SERCOM_USART_CTRLB_RESETVALUE 0x00000000   /**< \brief (SERCOM_USART_CTRLB reset_value) USART Control B */
+
+#define SERCOM_USART_CTRLB_CHSIZE_Pos 0            /**< \brief (SERCOM_USART_CTRLB) Character Size */
+#define SERCOM_USART_CTRLB_CHSIZE_Msk (0x7u << SERCOM_USART_CTRLB_CHSIZE_Pos)
+#define SERCOM_USART_CTRLB_CHSIZE(value) ((SERCOM_USART_CTRLB_CHSIZE_Msk & ((value) << SERCOM_USART_CTRLB_CHSIZE_Pos)))
+#define SERCOM_USART_CTRLB_SBMODE_Pos 6            /**< \brief (SERCOM_USART_CTRLB) Stop Bit Mode */
+#define SERCOM_USART_CTRLB_SBMODE   (0x1u << SERCOM_USART_CTRLB_SBMODE_Pos)
+#define SERCOM_USART_CTRLB_COLDEN_Pos 8            /**< \brief (SERCOM_USART_CTRLB) Collision Detection Enable */
+#define SERCOM_USART_CTRLB_COLDEN   (0x1u << SERCOM_USART_CTRLB_COLDEN_Pos)
+#define SERCOM_USART_CTRLB_SFDE_Pos 9            /**< \brief (SERCOM_USART_CTRLB) Start of Frame Detection Enable */
+#define SERCOM_USART_CTRLB_SFDE     (0x1u << SERCOM_USART_CTRLB_SFDE_Pos)
+#define SERCOM_USART_CTRLB_ENC_Pos  10           /**< \brief (SERCOM_USART_CTRLB) Encoding Format */
+#define SERCOM_USART_CTRLB_ENC      (0x1u << SERCOM_USART_CTRLB_ENC_Pos)
+#define SERCOM_USART_CTRLB_PMODE_Pos 13           /**< \brief (SERCOM_USART_CTRLB) Parity Mode */
+#define SERCOM_USART_CTRLB_PMODE    (0x1u << SERCOM_USART_CTRLB_PMODE_Pos)
+#define SERCOM_USART_CTRLB_TXEN_Pos 16           /**< \brief (SERCOM_USART_CTRLB) Transmitter Enable */
+#define SERCOM_USART_CTRLB_TXEN     (0x1u << SERCOM_USART_CTRLB_TXEN_Pos)
+#define SERCOM_USART_CTRLB_RXEN_Pos 17           /**< \brief (SERCOM_USART_CTRLB) Receiver Enable */
+#define SERCOM_USART_CTRLB_RXEN     (0x1u << SERCOM_USART_CTRLB_RXEN_Pos)
+#define SERCOM_USART_CTRLB_MASK     0x00032747u  /**< \brief (SERCOM_USART_CTRLB) MASK Register */
+
+/* -------- SERCOM_I2CM_BAUD : (SERCOM Offset: 0x0C) (R/W 32) I2CM I2CM Baud Rate -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t BAUD:8;           /*!< bit:  0.. 7  Baud Rate Value                    */
+    uint32_t BAUDLOW:8;        /*!< bit:  8..15  Baud Rate Value Low                */
+    uint32_t HSBAUD:8;         /*!< bit: 16..23  High Speed Baud Rate Value         */
+    uint32_t HSBAUDLOW:8;      /*!< bit: 24..31  High Speed Baud Rate Value Low     */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CM_BAUD_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_BAUD_OFFSET     0x0C         /**< \brief (SERCOM_I2CM_BAUD offset) I2CM Baud Rate */
+#define SERCOM_I2CM_BAUD_RESETVALUE 0x00000000   /**< \brief (SERCOM_I2CM_BAUD reset_value) I2CM Baud Rate */
+
+#define SERCOM_I2CM_BAUD_BAUD_Pos   0            /**< \brief (SERCOM_I2CM_BAUD) Baud Rate Value */
+#define SERCOM_I2CM_BAUD_BAUD_Msk   (0xFFu << SERCOM_I2CM_BAUD_BAUD_Pos)
+#define SERCOM_I2CM_BAUD_BAUD(value) ((SERCOM_I2CM_BAUD_BAUD_Msk & ((value) << SERCOM_I2CM_BAUD_BAUD_Pos)))
+#define SERCOM_I2CM_BAUD_BAUDLOW_Pos 8            /**< \brief (SERCOM_I2CM_BAUD) Baud Rate Value Low */
+#define SERCOM_I2CM_BAUD_BAUDLOW_Msk (0xFFu << SERCOM_I2CM_BAUD_BAUDLOW_Pos)
+#define SERCOM_I2CM_BAUD_BAUDLOW(value) ((SERCOM_I2CM_BAUD_BAUDLOW_Msk & ((value) << SERCOM_I2CM_BAUD_BAUDLOW_Pos)))
+#define SERCOM_I2CM_BAUD_HSBAUD_Pos 16           /**< \brief (SERCOM_I2CM_BAUD) High Speed Baud Rate Value */
+#define SERCOM_I2CM_BAUD_HSBAUD_Msk (0xFFu << SERCOM_I2CM_BAUD_HSBAUD_Pos)
+#define SERCOM_I2CM_BAUD_HSBAUD(value) ((SERCOM_I2CM_BAUD_HSBAUD_Msk & ((value) << SERCOM_I2CM_BAUD_HSBAUD_Pos)))
+#define SERCOM_I2CM_BAUD_HSBAUDLOW_Pos 24           /**< \brief (SERCOM_I2CM_BAUD) High Speed Baud Rate Value Low */
+#define SERCOM_I2CM_BAUD_HSBAUDLOW_Msk (0xFFu << SERCOM_I2CM_BAUD_HSBAUDLOW_Pos)
+#define SERCOM_I2CM_BAUD_HSBAUDLOW(value) ((SERCOM_I2CM_BAUD_HSBAUDLOW_Msk & ((value) << SERCOM_I2CM_BAUD_HSBAUDLOW_Pos)))
+#define SERCOM_I2CM_BAUD_MASK       0xFFFFFFFFu  /**< \brief (SERCOM_I2CM_BAUD) MASK Register */
+
+/* -------- SERCOM_SPI_BAUD : (SERCOM Offset: 0x0C) (R/W  8) SPI SPI Baud Rate -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  BAUD:8;           /*!< bit:  0.. 7  Baud Rate Value                    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_SPI_BAUD_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_BAUD_OFFSET      0x0C         /**< \brief (SERCOM_SPI_BAUD offset) SPI Baud Rate */
+#define SERCOM_SPI_BAUD_RESETVALUE  0x00         /**< \brief (SERCOM_SPI_BAUD reset_value) SPI Baud Rate */
+
+#define SERCOM_SPI_BAUD_BAUD_Pos    0            /**< \brief (SERCOM_SPI_BAUD) Baud Rate Value */
+#define SERCOM_SPI_BAUD_BAUD_Msk    (0xFFu << SERCOM_SPI_BAUD_BAUD_Pos)
+#define SERCOM_SPI_BAUD_BAUD(value) ((SERCOM_SPI_BAUD_BAUD_Msk & ((value) << SERCOM_SPI_BAUD_BAUD_Pos)))
+#define SERCOM_SPI_BAUD_MASK        0xFFu        /**< \brief (SERCOM_SPI_BAUD) MASK Register */
+
+/* -------- SERCOM_USART_BAUD : (SERCOM Offset: 0x0C) (R/W 16) USART USART Baud Rate -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t BAUD:16;          /*!< bit:  0..15  Baud Rate Value                    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct { // FRAC mode
+    uint16_t BAUD:13;          /*!< bit:  0..12  Baud Rate Value                    */
+    uint16_t FP:3;             /*!< bit: 13..15  Fractional Part                    */
+  } FRAC;                      /*!< Structure used for FRAC                         */
+  struct { // FRACFP mode
+    uint16_t BAUD:13;          /*!< bit:  0..12  Baud Rate Value                    */
+    uint16_t FP:3;             /*!< bit: 13..15  Fractional Part                    */
+  } FRACFP;                    /*!< Structure used for FRACFP                       */
+  struct { // USARTFP mode
+    uint16_t BAUD:16;          /*!< bit:  0..15  Baud Rate Value                    */
+  } USARTFP;                   /*!< Structure used for USARTFP                      */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SERCOM_USART_BAUD_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_BAUD_OFFSET    0x0C         /**< \brief (SERCOM_USART_BAUD offset) USART Baud Rate */
+#define SERCOM_USART_BAUD_RESETVALUE 0x0000       /**< \brief (SERCOM_USART_BAUD reset_value) USART Baud Rate */
+
+#define SERCOM_USART_BAUD_BAUD_Pos  0            /**< \brief (SERCOM_USART_BAUD) Baud Rate Value */
+#define SERCOM_USART_BAUD_BAUD_Msk  (0xFFFFu << SERCOM_USART_BAUD_BAUD_Pos)
+#define SERCOM_USART_BAUD_BAUD(value) ((SERCOM_USART_BAUD_BAUD_Msk & ((value) << SERCOM_USART_BAUD_BAUD_Pos)))
+#define SERCOM_USART_BAUD_MASK      0xFFFFu      /**< \brief (SERCOM_USART_BAUD) MASK Register */
+
+// FRAC mode
+#define SERCOM_USART_BAUD_FRAC_BAUD_Pos 0            /**< \brief (SERCOM_USART_BAUD_FRAC) Baud Rate Value */
+#define SERCOM_USART_BAUD_FRAC_BAUD_Msk (0x1FFFu << SERCOM_USART_BAUD_FRAC_BAUD_Pos)
+#define SERCOM_USART_BAUD_FRAC_BAUD(value) ((SERCOM_USART_BAUD_FRAC_BAUD_Msk & ((value) << SERCOM_USART_BAUD_FRAC_BAUD_Pos)))
+#define SERCOM_USART_BAUD_FRAC_FP_Pos 13           /**< \brief (SERCOM_USART_BAUD_FRAC) Fractional Part */
+#define SERCOM_USART_BAUD_FRAC_FP_Msk (0x7u << SERCOM_USART_BAUD_FRAC_FP_Pos)
+#define SERCOM_USART_BAUD_FRAC_FP(value) ((SERCOM_USART_BAUD_FRAC_FP_Msk & ((value) << SERCOM_USART_BAUD_FRAC_FP_Pos)))
+#define SERCOM_USART_BAUD_FRAC_MASK 0xFFFFu      /**< \brief (SERCOM_USART_BAUD_FRAC) MASK Register */
+
+// FRACFP mode
+#define SERCOM_USART_BAUD_FRACFP_BAUD_Pos 0            /**< \brief (SERCOM_USART_BAUD_FRACFP) Baud Rate Value */
+#define SERCOM_USART_BAUD_FRACFP_BAUD_Msk (0x1FFFu << SERCOM_USART_BAUD_FRACFP_BAUD_Pos)
+#define SERCOM_USART_BAUD_FRACFP_BAUD(value) ((SERCOM_USART_BAUD_FRACFP_BAUD_Msk & ((value) << SERCOM_USART_BAUD_FRACFP_BAUD_Pos)))
+#define SERCOM_USART_BAUD_FRACFP_FP_Pos 13           /**< \brief (SERCOM_USART_BAUD_FRACFP) Fractional Part */
+#define SERCOM_USART_BAUD_FRACFP_FP_Msk (0x7u << SERCOM_USART_BAUD_FRACFP_FP_Pos)
+#define SERCOM_USART_BAUD_FRACFP_FP(value) ((SERCOM_USART_BAUD_FRACFP_FP_Msk & ((value) << SERCOM_USART_BAUD_FRACFP_FP_Pos)))
+#define SERCOM_USART_BAUD_FRACFP_MASK 0xFFFFu      /**< \brief (SERCOM_USART_BAUD_FRACFP) MASK Register */
+
+// USARTFP mode
+#define SERCOM_USART_BAUD_USARTFP_BAUD_Pos 0            /**< \brief (SERCOM_USART_BAUD_USARTFP) Baud Rate Value */
+#define SERCOM_USART_BAUD_USARTFP_BAUD_Msk (0xFFFFu << SERCOM_USART_BAUD_USARTFP_BAUD_Pos)
+#define SERCOM_USART_BAUD_USARTFP_BAUD(value) ((SERCOM_USART_BAUD_USARTFP_BAUD_Msk & ((value) << SERCOM_USART_BAUD_USARTFP_BAUD_Pos)))
+#define SERCOM_USART_BAUD_USARTFP_MASK 0xFFFFu      /**< \brief (SERCOM_USART_BAUD_USARTFP) MASK Register */
+
+/* -------- SERCOM_USART_RXPL : (SERCOM Offset: 0x0E) (R/W  8) USART USART Receive Pulse Length -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  RXPL:8;           /*!< bit:  0.. 7  Receive Pulse Length               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_USART_RXPL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_RXPL_OFFSET    0x0E         /**< \brief (SERCOM_USART_RXPL offset) USART Receive Pulse Length */
+#define SERCOM_USART_RXPL_RESETVALUE 0x00         /**< \brief (SERCOM_USART_RXPL reset_value) USART Receive Pulse Length */
+
+#define SERCOM_USART_RXPL_RXPL_Pos  0            /**< \brief (SERCOM_USART_RXPL) Receive Pulse Length */
+#define SERCOM_USART_RXPL_RXPL_Msk  (0xFFu << SERCOM_USART_RXPL_RXPL_Pos)
+#define SERCOM_USART_RXPL_RXPL(value) ((SERCOM_USART_RXPL_RXPL_Msk & ((value) << SERCOM_USART_RXPL_RXPL_Pos)))
+#define SERCOM_USART_RXPL_MASK      0xFFu        /**< \brief (SERCOM_USART_RXPL) MASK Register */
+
+/* -------- SERCOM_I2CM_INTENCLR : (SERCOM Offset: 0x14) (R/W  8) I2CM I2CM Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  MB:1;             /*!< bit:      0  Master On Bus Interrupt Disable    */
+    uint8_t  SB:1;             /*!< bit:      1  Slave On Bus Interrupt Disable     */
+    uint8_t  :5;               /*!< bit:  2.. 6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt Disable   */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_I2CM_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_INTENCLR_OFFSET 0x14         /**< \brief (SERCOM_I2CM_INTENCLR offset) I2CM Interrupt Enable Clear */
+#define SERCOM_I2CM_INTENCLR_RESETVALUE 0x00         /**< \brief (SERCOM_I2CM_INTENCLR reset_value) I2CM Interrupt Enable Clear */
+
+#define SERCOM_I2CM_INTENCLR_MB_Pos 0            /**< \brief (SERCOM_I2CM_INTENCLR) Master On Bus Interrupt Disable */
+#define SERCOM_I2CM_INTENCLR_MB     (0x1u << SERCOM_I2CM_INTENCLR_MB_Pos)
+#define SERCOM_I2CM_INTENCLR_SB_Pos 1            /**< \brief (SERCOM_I2CM_INTENCLR) Slave On Bus Interrupt Disable */
+#define SERCOM_I2CM_INTENCLR_SB     (0x1u << SERCOM_I2CM_INTENCLR_SB_Pos)
+#define SERCOM_I2CM_INTENCLR_ERROR_Pos 7            /**< \brief (SERCOM_I2CM_INTENCLR) Combined Error Interrupt Disable */
+#define SERCOM_I2CM_INTENCLR_ERROR  (0x1u << SERCOM_I2CM_INTENCLR_ERROR_Pos)
+#define SERCOM_I2CM_INTENCLR_MASK   0x83u        /**< \brief (SERCOM_I2CM_INTENCLR) MASK Register */
+
+/* -------- SERCOM_I2CS_INTENCLR : (SERCOM Offset: 0x14) (R/W  8) I2CS I2CS Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PREC:1;           /*!< bit:      0  Stop Received Interrupt Disable    */
+    uint8_t  AMATCH:1;         /*!< bit:      1  Address Match Interrupt Disable    */
+    uint8_t  DRDY:1;           /*!< bit:      2  Data Interrupt Disable             */
+    uint8_t  :4;               /*!< bit:  3.. 6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt Disable   */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_I2CS_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CS_INTENCLR_OFFSET 0x14         /**< \brief (SERCOM_I2CS_INTENCLR offset) I2CS Interrupt Enable Clear */
+#define SERCOM_I2CS_INTENCLR_RESETVALUE 0x00         /**< \brief (SERCOM_I2CS_INTENCLR reset_value) I2CS Interrupt Enable Clear */
+
+#define SERCOM_I2CS_INTENCLR_PREC_Pos 0            /**< \brief (SERCOM_I2CS_INTENCLR) Stop Received Interrupt Disable */
+#define SERCOM_I2CS_INTENCLR_PREC   (0x1u << SERCOM_I2CS_INTENCLR_PREC_Pos)
+#define SERCOM_I2CS_INTENCLR_AMATCH_Pos 1            /**< \brief (SERCOM_I2CS_INTENCLR) Address Match Interrupt Disable */
+#define SERCOM_I2CS_INTENCLR_AMATCH (0x1u << SERCOM_I2CS_INTENCLR_AMATCH_Pos)
+#define SERCOM_I2CS_INTENCLR_DRDY_Pos 2            /**< \brief (SERCOM_I2CS_INTENCLR) Data Interrupt Disable */
+#define SERCOM_I2CS_INTENCLR_DRDY   (0x1u << SERCOM_I2CS_INTENCLR_DRDY_Pos)
+#define SERCOM_I2CS_INTENCLR_ERROR_Pos 7            /**< \brief (SERCOM_I2CS_INTENCLR) Combined Error Interrupt Disable */
+#define SERCOM_I2CS_INTENCLR_ERROR  (0x1u << SERCOM_I2CS_INTENCLR_ERROR_Pos)
+#define SERCOM_I2CS_INTENCLR_MASK   0x87u        /**< \brief (SERCOM_I2CS_INTENCLR) MASK Register */
+
+/* -------- SERCOM_SPI_INTENCLR : (SERCOM Offset: 0x14) (R/W  8) SPI SPI Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DRE:1;            /*!< bit:      0  Data Register Empty Interrupt Disable */
+    uint8_t  TXC:1;            /*!< bit:      1  Transmit Complete Interrupt Disable */
+    uint8_t  RXC:1;            /*!< bit:      2  Receive Complete Interrupt Disable */
+    uint8_t  SSL:1;            /*!< bit:      3  Slave Select Low Interrupt Disable */
+    uint8_t  :3;               /*!< bit:  4.. 6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt Disable   */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_SPI_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_INTENCLR_OFFSET  0x14         /**< \brief (SERCOM_SPI_INTENCLR offset) SPI Interrupt Enable Clear */
+#define SERCOM_SPI_INTENCLR_RESETVALUE 0x00         /**< \brief (SERCOM_SPI_INTENCLR reset_value) SPI Interrupt Enable Clear */
+
+#define SERCOM_SPI_INTENCLR_DRE_Pos 0            /**< \brief (SERCOM_SPI_INTENCLR) Data Register Empty Interrupt Disable */
+#define SERCOM_SPI_INTENCLR_DRE     (0x1u << SERCOM_SPI_INTENCLR_DRE_Pos)
+#define SERCOM_SPI_INTENCLR_TXC_Pos 1            /**< \brief (SERCOM_SPI_INTENCLR) Transmit Complete Interrupt Disable */
+#define SERCOM_SPI_INTENCLR_TXC     (0x1u << SERCOM_SPI_INTENCLR_TXC_Pos)
+#define SERCOM_SPI_INTENCLR_RXC_Pos 2            /**< \brief (SERCOM_SPI_INTENCLR) Receive Complete Interrupt Disable */
+#define SERCOM_SPI_INTENCLR_RXC     (0x1u << SERCOM_SPI_INTENCLR_RXC_Pos)
+#define SERCOM_SPI_INTENCLR_SSL_Pos 3            /**< \brief (SERCOM_SPI_INTENCLR) Slave Select Low Interrupt Disable */
+#define SERCOM_SPI_INTENCLR_SSL     (0x1u << SERCOM_SPI_INTENCLR_SSL_Pos)
+#define SERCOM_SPI_INTENCLR_ERROR_Pos 7            /**< \brief (SERCOM_SPI_INTENCLR) Combined Error Interrupt Disable */
+#define SERCOM_SPI_INTENCLR_ERROR   (0x1u << SERCOM_SPI_INTENCLR_ERROR_Pos)
+#define SERCOM_SPI_INTENCLR_MASK    0x8Fu        /**< \brief (SERCOM_SPI_INTENCLR) MASK Register */
+
+/* -------- SERCOM_USART_INTENCLR : (SERCOM Offset: 0x14) (R/W  8) USART USART Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DRE:1;            /*!< bit:      0  Data Register Empty Interrupt Disable */
+    uint8_t  TXC:1;            /*!< bit:      1  Transmit Complete Interrupt Disable */
+    uint8_t  RXC:1;            /*!< bit:      2  Receive Complete Interrupt Disable */
+    uint8_t  RXS:1;            /*!< bit:      3  Receive Start Interrupt Disable    */
+    uint8_t  CTSIC:1;          /*!< bit:      4  Clear To Send Input Change Interrupt Disable */
+    uint8_t  RXBRK:1;          /*!< bit:      5  Break Received Interrupt Disable   */
+    uint8_t  :1;               /*!< bit:      6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt Disable   */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_USART_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_INTENCLR_OFFSET 0x14         /**< \brief (SERCOM_USART_INTENCLR offset) USART Interrupt Enable Clear */
+#define SERCOM_USART_INTENCLR_RESETVALUE 0x00         /**< \brief (SERCOM_USART_INTENCLR reset_value) USART Interrupt Enable Clear */
+
+#define SERCOM_USART_INTENCLR_DRE_Pos 0            /**< \brief (SERCOM_USART_INTENCLR) Data Register Empty Interrupt Disable */
+#define SERCOM_USART_INTENCLR_DRE   (0x1u << SERCOM_USART_INTENCLR_DRE_Pos)
+#define SERCOM_USART_INTENCLR_TXC_Pos 1            /**< \brief (SERCOM_USART_INTENCLR) Transmit Complete Interrupt Disable */
+#define SERCOM_USART_INTENCLR_TXC   (0x1u << SERCOM_USART_INTENCLR_TXC_Pos)
+#define SERCOM_USART_INTENCLR_RXC_Pos 2            /**< \brief (SERCOM_USART_INTENCLR) Receive Complete Interrupt Disable */
+#define SERCOM_USART_INTENCLR_RXC   (0x1u << SERCOM_USART_INTENCLR_RXC_Pos)
+#define SERCOM_USART_INTENCLR_RXS_Pos 3            /**< \brief (SERCOM_USART_INTENCLR) Receive Start Interrupt Disable */
+#define SERCOM_USART_INTENCLR_RXS   (0x1u << SERCOM_USART_INTENCLR_RXS_Pos)
+#define SERCOM_USART_INTENCLR_CTSIC_Pos 4            /**< \brief (SERCOM_USART_INTENCLR) Clear To Send Input Change Interrupt Disable */
+#define SERCOM_USART_INTENCLR_CTSIC (0x1u << SERCOM_USART_INTENCLR_CTSIC_Pos)
+#define SERCOM_USART_INTENCLR_RXBRK_Pos 5            /**< \brief (SERCOM_USART_INTENCLR) Break Received Interrupt Disable */
+#define SERCOM_USART_INTENCLR_RXBRK (0x1u << SERCOM_USART_INTENCLR_RXBRK_Pos)
+#define SERCOM_USART_INTENCLR_ERROR_Pos 7            /**< \brief (SERCOM_USART_INTENCLR) Combined Error Interrupt Disable */
+#define SERCOM_USART_INTENCLR_ERROR (0x1u << SERCOM_USART_INTENCLR_ERROR_Pos)
+#define SERCOM_USART_INTENCLR_MASK  0xBFu        /**< \brief (SERCOM_USART_INTENCLR) MASK Register */
+
+/* -------- SERCOM_I2CM_INTENSET : (SERCOM Offset: 0x16) (R/W  8) I2CM I2CM Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  MB:1;             /*!< bit:      0  Master On Bus Interrupt Enable     */
+    uint8_t  SB:1;             /*!< bit:      1  Slave On Bus Interrupt Enable      */
+    uint8_t  :5;               /*!< bit:  2.. 6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt Enable    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_I2CM_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_INTENSET_OFFSET 0x16         /**< \brief (SERCOM_I2CM_INTENSET offset) I2CM Interrupt Enable Set */
+#define SERCOM_I2CM_INTENSET_RESETVALUE 0x00         /**< \brief (SERCOM_I2CM_INTENSET reset_value) I2CM Interrupt Enable Set */
+
+#define SERCOM_I2CM_INTENSET_MB_Pos 0            /**< \brief (SERCOM_I2CM_INTENSET) Master On Bus Interrupt Enable */
+#define SERCOM_I2CM_INTENSET_MB     (0x1u << SERCOM_I2CM_INTENSET_MB_Pos)
+#define SERCOM_I2CM_INTENSET_SB_Pos 1            /**< \brief (SERCOM_I2CM_INTENSET) Slave On Bus Interrupt Enable */
+#define SERCOM_I2CM_INTENSET_SB     (0x1u << SERCOM_I2CM_INTENSET_SB_Pos)
+#define SERCOM_I2CM_INTENSET_ERROR_Pos 7            /**< \brief (SERCOM_I2CM_INTENSET) Combined Error Interrupt Enable */
+#define SERCOM_I2CM_INTENSET_ERROR  (0x1u << SERCOM_I2CM_INTENSET_ERROR_Pos)
+#define SERCOM_I2CM_INTENSET_MASK   0x83u        /**< \brief (SERCOM_I2CM_INTENSET) MASK Register */
+
+/* -------- SERCOM_I2CS_INTENSET : (SERCOM Offset: 0x16) (R/W  8) I2CS I2CS Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PREC:1;           /*!< bit:      0  Stop Received Interrupt Enable     */
+    uint8_t  AMATCH:1;         /*!< bit:      1  Address Match Interrupt Enable     */
+    uint8_t  DRDY:1;           /*!< bit:      2  Data Interrupt Enable              */
+    uint8_t  :4;               /*!< bit:  3.. 6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt Enable    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_I2CS_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CS_INTENSET_OFFSET 0x16         /**< \brief (SERCOM_I2CS_INTENSET offset) I2CS Interrupt Enable Set */
+#define SERCOM_I2CS_INTENSET_RESETVALUE 0x00         /**< \brief (SERCOM_I2CS_INTENSET reset_value) I2CS Interrupt Enable Set */
+
+#define SERCOM_I2CS_INTENSET_PREC_Pos 0            /**< \brief (SERCOM_I2CS_INTENSET) Stop Received Interrupt Enable */
+#define SERCOM_I2CS_INTENSET_PREC   (0x1u << SERCOM_I2CS_INTENSET_PREC_Pos)
+#define SERCOM_I2CS_INTENSET_AMATCH_Pos 1            /**< \brief (SERCOM_I2CS_INTENSET) Address Match Interrupt Enable */
+#define SERCOM_I2CS_INTENSET_AMATCH (0x1u << SERCOM_I2CS_INTENSET_AMATCH_Pos)
+#define SERCOM_I2CS_INTENSET_DRDY_Pos 2            /**< \brief (SERCOM_I2CS_INTENSET) Data Interrupt Enable */
+#define SERCOM_I2CS_INTENSET_DRDY   (0x1u << SERCOM_I2CS_INTENSET_DRDY_Pos)
+#define SERCOM_I2CS_INTENSET_ERROR_Pos 7            /**< \brief (SERCOM_I2CS_INTENSET) Combined Error Interrupt Enable */
+#define SERCOM_I2CS_INTENSET_ERROR  (0x1u << SERCOM_I2CS_INTENSET_ERROR_Pos)
+#define SERCOM_I2CS_INTENSET_MASK   0x87u        /**< \brief (SERCOM_I2CS_INTENSET) MASK Register */
+
+/* -------- SERCOM_SPI_INTENSET : (SERCOM Offset: 0x16) (R/W  8) SPI SPI Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DRE:1;            /*!< bit:      0  Data Register Empty Interrupt Enable */
+    uint8_t  TXC:1;            /*!< bit:      1  Transmit Complete Interrupt Enable */
+    uint8_t  RXC:1;            /*!< bit:      2  Receive Complete Interrupt Enable  */
+    uint8_t  SSL:1;            /*!< bit:      3  Slave Select Low Interrupt Enable  */
+    uint8_t  :3;               /*!< bit:  4.. 6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt Enable    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_SPI_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_INTENSET_OFFSET  0x16         /**< \brief (SERCOM_SPI_INTENSET offset) SPI Interrupt Enable Set */
+#define SERCOM_SPI_INTENSET_RESETVALUE 0x00         /**< \brief (SERCOM_SPI_INTENSET reset_value) SPI Interrupt Enable Set */
+
+#define SERCOM_SPI_INTENSET_DRE_Pos 0            /**< \brief (SERCOM_SPI_INTENSET) Data Register Empty Interrupt Enable */
+#define SERCOM_SPI_INTENSET_DRE     (0x1u << SERCOM_SPI_INTENSET_DRE_Pos)
+#define SERCOM_SPI_INTENSET_TXC_Pos 1            /**< \brief (SERCOM_SPI_INTENSET) Transmit Complete Interrupt Enable */
+#define SERCOM_SPI_INTENSET_TXC     (0x1u << SERCOM_SPI_INTENSET_TXC_Pos)
+#define SERCOM_SPI_INTENSET_RXC_Pos 2            /**< \brief (SERCOM_SPI_INTENSET) Receive Complete Interrupt Enable */
+#define SERCOM_SPI_INTENSET_RXC     (0x1u << SERCOM_SPI_INTENSET_RXC_Pos)
+#define SERCOM_SPI_INTENSET_SSL_Pos 3            /**< \brief (SERCOM_SPI_INTENSET) Slave Select Low Interrupt Enable */
+#define SERCOM_SPI_INTENSET_SSL     (0x1u << SERCOM_SPI_INTENSET_SSL_Pos)
+#define SERCOM_SPI_INTENSET_ERROR_Pos 7            /**< \brief (SERCOM_SPI_INTENSET) Combined Error Interrupt Enable */
+#define SERCOM_SPI_INTENSET_ERROR   (0x1u << SERCOM_SPI_INTENSET_ERROR_Pos)
+#define SERCOM_SPI_INTENSET_MASK    0x8Fu        /**< \brief (SERCOM_SPI_INTENSET) MASK Register */
+
+/* -------- SERCOM_USART_INTENSET : (SERCOM Offset: 0x16) (R/W  8) USART USART Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DRE:1;            /*!< bit:      0  Data Register Empty Interrupt Enable */
+    uint8_t  TXC:1;            /*!< bit:      1  Transmit Complete Interrupt Enable */
+    uint8_t  RXC:1;            /*!< bit:      2  Receive Complete Interrupt Enable  */
+    uint8_t  RXS:1;            /*!< bit:      3  Receive Start Interrupt Enable     */
+    uint8_t  CTSIC:1;          /*!< bit:      4  Clear To Send Input Change Interrupt Enable */
+    uint8_t  RXBRK:1;          /*!< bit:      5  Break Received Interrupt Enable    */
+    uint8_t  :1;               /*!< bit:      6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt Enable    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_USART_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_INTENSET_OFFSET 0x16         /**< \brief (SERCOM_USART_INTENSET offset) USART Interrupt Enable Set */
+#define SERCOM_USART_INTENSET_RESETVALUE 0x00         /**< \brief (SERCOM_USART_INTENSET reset_value) USART Interrupt Enable Set */
+
+#define SERCOM_USART_INTENSET_DRE_Pos 0            /**< \brief (SERCOM_USART_INTENSET) Data Register Empty Interrupt Enable */
+#define SERCOM_USART_INTENSET_DRE   (0x1u << SERCOM_USART_INTENSET_DRE_Pos)
+#define SERCOM_USART_INTENSET_TXC_Pos 1            /**< \brief (SERCOM_USART_INTENSET) Transmit Complete Interrupt Enable */
+#define SERCOM_USART_INTENSET_TXC   (0x1u << SERCOM_USART_INTENSET_TXC_Pos)
+#define SERCOM_USART_INTENSET_RXC_Pos 2            /**< \brief (SERCOM_USART_INTENSET) Receive Complete Interrupt Enable */
+#define SERCOM_USART_INTENSET_RXC   (0x1u << SERCOM_USART_INTENSET_RXC_Pos)
+#define SERCOM_USART_INTENSET_RXS_Pos 3            /**< \brief (SERCOM_USART_INTENSET) Receive Start Interrupt Enable */
+#define SERCOM_USART_INTENSET_RXS   (0x1u << SERCOM_USART_INTENSET_RXS_Pos)
+#define SERCOM_USART_INTENSET_CTSIC_Pos 4            /**< \brief (SERCOM_USART_INTENSET) Clear To Send Input Change Interrupt Enable */
+#define SERCOM_USART_INTENSET_CTSIC (0x1u << SERCOM_USART_INTENSET_CTSIC_Pos)
+#define SERCOM_USART_INTENSET_RXBRK_Pos 5            /**< \brief (SERCOM_USART_INTENSET) Break Received Interrupt Enable */
+#define SERCOM_USART_INTENSET_RXBRK (0x1u << SERCOM_USART_INTENSET_RXBRK_Pos)
+#define SERCOM_USART_INTENSET_ERROR_Pos 7            /**< \brief (SERCOM_USART_INTENSET) Combined Error Interrupt Enable */
+#define SERCOM_USART_INTENSET_ERROR (0x1u << SERCOM_USART_INTENSET_ERROR_Pos)
+#define SERCOM_USART_INTENSET_MASK  0xBFu        /**< \brief (SERCOM_USART_INTENSET) MASK Register */
+
+/* -------- SERCOM_I2CM_INTFLAG : (SERCOM Offset: 0x18) (R/W  8) I2CM I2CM Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  MB:1;             /*!< bit:      0  Master On Bus Interrupt            */
+    uint8_t  SB:1;             /*!< bit:      1  Slave On Bus Interrupt             */
+    uint8_t  :5;               /*!< bit:  2.. 6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_I2CM_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_INTFLAG_OFFSET  0x18         /**< \brief (SERCOM_I2CM_INTFLAG offset) I2CM Interrupt Flag Status and Clear */
+#define SERCOM_I2CM_INTFLAG_RESETVALUE 0x00         /**< \brief (SERCOM_I2CM_INTFLAG reset_value) I2CM Interrupt Flag Status and Clear */
+
+#define SERCOM_I2CM_INTFLAG_MB_Pos  0            /**< \brief (SERCOM_I2CM_INTFLAG) Master On Bus Interrupt */
+#define SERCOM_I2CM_INTFLAG_MB      (0x1u << SERCOM_I2CM_INTFLAG_MB_Pos)
+#define SERCOM_I2CM_INTFLAG_SB_Pos  1            /**< \brief (SERCOM_I2CM_INTFLAG) Slave On Bus Interrupt */
+#define SERCOM_I2CM_INTFLAG_SB      (0x1u << SERCOM_I2CM_INTFLAG_SB_Pos)
+#define SERCOM_I2CM_INTFLAG_ERROR_Pos 7            /**< \brief (SERCOM_I2CM_INTFLAG) Combined Error Interrupt */
+#define SERCOM_I2CM_INTFLAG_ERROR   (0x1u << SERCOM_I2CM_INTFLAG_ERROR_Pos)
+#define SERCOM_I2CM_INTFLAG_MASK    0x83u        /**< \brief (SERCOM_I2CM_INTFLAG) MASK Register */
+
+/* -------- SERCOM_I2CS_INTFLAG : (SERCOM Offset: 0x18) (R/W  8) I2CS I2CS Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PREC:1;           /*!< bit:      0  Stop Received Interrupt            */
+    uint8_t  AMATCH:1;         /*!< bit:      1  Address Match Interrupt            */
+    uint8_t  DRDY:1;           /*!< bit:      2  Data Interrupt                     */
+    uint8_t  :4;               /*!< bit:  3.. 6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_I2CS_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CS_INTFLAG_OFFSET  0x18         /**< \brief (SERCOM_I2CS_INTFLAG offset) I2CS Interrupt Flag Status and Clear */
+#define SERCOM_I2CS_INTFLAG_RESETVALUE 0x00         /**< \brief (SERCOM_I2CS_INTFLAG reset_value) I2CS Interrupt Flag Status and Clear */
+
+#define SERCOM_I2CS_INTFLAG_PREC_Pos 0            /**< \brief (SERCOM_I2CS_INTFLAG) Stop Received Interrupt */
+#define SERCOM_I2CS_INTFLAG_PREC    (0x1u << SERCOM_I2CS_INTFLAG_PREC_Pos)
+#define SERCOM_I2CS_INTFLAG_AMATCH_Pos 1            /**< \brief (SERCOM_I2CS_INTFLAG) Address Match Interrupt */
+#define SERCOM_I2CS_INTFLAG_AMATCH  (0x1u << SERCOM_I2CS_INTFLAG_AMATCH_Pos)
+#define SERCOM_I2CS_INTFLAG_DRDY_Pos 2            /**< \brief (SERCOM_I2CS_INTFLAG) Data Interrupt */
+#define SERCOM_I2CS_INTFLAG_DRDY    (0x1u << SERCOM_I2CS_INTFLAG_DRDY_Pos)
+#define SERCOM_I2CS_INTFLAG_ERROR_Pos 7            /**< \brief (SERCOM_I2CS_INTFLAG) Combined Error Interrupt */
+#define SERCOM_I2CS_INTFLAG_ERROR   (0x1u << SERCOM_I2CS_INTFLAG_ERROR_Pos)
+#define SERCOM_I2CS_INTFLAG_MASK    0x87u        /**< \brief (SERCOM_I2CS_INTFLAG) MASK Register */
+
+/* -------- SERCOM_SPI_INTFLAG : (SERCOM Offset: 0x18) (R/W  8) SPI SPI Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DRE:1;            /*!< bit:      0  Data Register Empty Interrupt      */
+    uint8_t  TXC:1;            /*!< bit:      1  Transmit Complete Interrupt        */
+    uint8_t  RXC:1;            /*!< bit:      2  Receive Complete Interrupt         */
+    uint8_t  SSL:1;            /*!< bit:      3  Slave Select Low Interrupt Flag    */
+    uint8_t  :3;               /*!< bit:  4.. 6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_SPI_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_INTFLAG_OFFSET   0x18         /**< \brief (SERCOM_SPI_INTFLAG offset) SPI Interrupt Flag Status and Clear */
+#define SERCOM_SPI_INTFLAG_RESETVALUE 0x00         /**< \brief (SERCOM_SPI_INTFLAG reset_value) SPI Interrupt Flag Status and Clear */
+
+#define SERCOM_SPI_INTFLAG_DRE_Pos  0            /**< \brief (SERCOM_SPI_INTFLAG) Data Register Empty Interrupt */
+#define SERCOM_SPI_INTFLAG_DRE      (0x1u << SERCOM_SPI_INTFLAG_DRE_Pos)
+#define SERCOM_SPI_INTFLAG_TXC_Pos  1            /**< \brief (SERCOM_SPI_INTFLAG) Transmit Complete Interrupt */
+#define SERCOM_SPI_INTFLAG_TXC      (0x1u << SERCOM_SPI_INTFLAG_TXC_Pos)
+#define SERCOM_SPI_INTFLAG_RXC_Pos  2            /**< \brief (SERCOM_SPI_INTFLAG) Receive Complete Interrupt */
+#define SERCOM_SPI_INTFLAG_RXC      (0x1u << SERCOM_SPI_INTFLAG_RXC_Pos)
+#define SERCOM_SPI_INTFLAG_SSL_Pos  3            /**< \brief (SERCOM_SPI_INTFLAG) Slave Select Low Interrupt Flag */
+#define SERCOM_SPI_INTFLAG_SSL      (0x1u << SERCOM_SPI_INTFLAG_SSL_Pos)
+#define SERCOM_SPI_INTFLAG_ERROR_Pos 7            /**< \brief (SERCOM_SPI_INTFLAG) Combined Error Interrupt */
+#define SERCOM_SPI_INTFLAG_ERROR    (0x1u << SERCOM_SPI_INTFLAG_ERROR_Pos)
+#define SERCOM_SPI_INTFLAG_MASK     0x8Fu        /**< \brief (SERCOM_SPI_INTFLAG) MASK Register */
+
+/* -------- SERCOM_USART_INTFLAG : (SERCOM Offset: 0x18) (R/W  8) USART USART Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DRE:1;            /*!< bit:      0  Data Register Empty Interrupt      */
+    uint8_t  TXC:1;            /*!< bit:      1  Transmit Complete Interrupt        */
+    uint8_t  RXC:1;            /*!< bit:      2  Receive Complete Interrupt         */
+    uint8_t  RXS:1;            /*!< bit:      3  Receive Start Interrupt            */
+    uint8_t  CTSIC:1;          /*!< bit:      4  Clear To Send Input Change Interrupt */
+    uint8_t  RXBRK:1;          /*!< bit:      5  Break Received Interrupt           */
+    uint8_t  :1;               /*!< bit:      6  Reserved                           */
+    uint8_t  ERROR:1;          /*!< bit:      7  Combined Error Interrupt           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_USART_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_INTFLAG_OFFSET 0x18         /**< \brief (SERCOM_USART_INTFLAG offset) USART Interrupt Flag Status and Clear */
+#define SERCOM_USART_INTFLAG_RESETVALUE 0x00         /**< \brief (SERCOM_USART_INTFLAG reset_value) USART Interrupt Flag Status and Clear */
+
+#define SERCOM_USART_INTFLAG_DRE_Pos 0            /**< \brief (SERCOM_USART_INTFLAG) Data Register Empty Interrupt */
+#define SERCOM_USART_INTFLAG_DRE    (0x1u << SERCOM_USART_INTFLAG_DRE_Pos)
+#define SERCOM_USART_INTFLAG_TXC_Pos 1            /**< \brief (SERCOM_USART_INTFLAG) Transmit Complete Interrupt */
+#define SERCOM_USART_INTFLAG_TXC    (0x1u << SERCOM_USART_INTFLAG_TXC_Pos)
+#define SERCOM_USART_INTFLAG_RXC_Pos 2            /**< \brief (SERCOM_USART_INTFLAG) Receive Complete Interrupt */
+#define SERCOM_USART_INTFLAG_RXC    (0x1u << SERCOM_USART_INTFLAG_RXC_Pos)
+#define SERCOM_USART_INTFLAG_RXS_Pos 3            /**< \brief (SERCOM_USART_INTFLAG) Receive Start Interrupt */
+#define SERCOM_USART_INTFLAG_RXS    (0x1u << SERCOM_USART_INTFLAG_RXS_Pos)
+#define SERCOM_USART_INTFLAG_CTSIC_Pos 4            /**< \brief (SERCOM_USART_INTFLAG) Clear To Send Input Change Interrupt */
+#define SERCOM_USART_INTFLAG_CTSIC  (0x1u << SERCOM_USART_INTFLAG_CTSIC_Pos)
+#define SERCOM_USART_INTFLAG_RXBRK_Pos 5            /**< \brief (SERCOM_USART_INTFLAG) Break Received Interrupt */
+#define SERCOM_USART_INTFLAG_RXBRK  (0x1u << SERCOM_USART_INTFLAG_RXBRK_Pos)
+#define SERCOM_USART_INTFLAG_ERROR_Pos 7            /**< \brief (SERCOM_USART_INTFLAG) Combined Error Interrupt */
+#define SERCOM_USART_INTFLAG_ERROR  (0x1u << SERCOM_USART_INTFLAG_ERROR_Pos)
+#define SERCOM_USART_INTFLAG_MASK   0xBFu        /**< \brief (SERCOM_USART_INTFLAG) MASK Register */
+
+/* -------- SERCOM_I2CM_STATUS : (SERCOM Offset: 0x1A) (R/W 16) I2CM I2CM Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t BUSERR:1;         /*!< bit:      0  Bus Error                          */
+    uint16_t ARBLOST:1;        /*!< bit:      1  Arbitration Lost                   */
+    uint16_t RXNACK:1;         /*!< bit:      2  Received Not Acknowledge           */
+    uint16_t :1;               /*!< bit:      3  Reserved                           */
+    uint16_t BUSSTATE:2;       /*!< bit:  4.. 5  Bus State                          */
+    uint16_t LOWTOUT:1;        /*!< bit:      6  SCL Low Timeout                    */
+    uint16_t CLKHOLD:1;        /*!< bit:      7  Clock Hold                         */
+    uint16_t MEXTTOUT:1;       /*!< bit:      8  Master SCL Low Extend Timeout      */
+    uint16_t SEXTTOUT:1;       /*!< bit:      9  Slave SCL Low Extend Timeout       */
+    uint16_t LENERR:1;         /*!< bit:     10  Length Error                       */
+    uint16_t :5;               /*!< bit: 11..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CM_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_STATUS_OFFSET   0x1A         /**< \brief (SERCOM_I2CM_STATUS offset) I2CM Status */
+#define SERCOM_I2CM_STATUS_RESETVALUE 0x0000       /**< \brief (SERCOM_I2CM_STATUS reset_value) I2CM Status */
+
+#define SERCOM_I2CM_STATUS_BUSERR_Pos 0            /**< \brief (SERCOM_I2CM_STATUS) Bus Error */
+#define SERCOM_I2CM_STATUS_BUSERR   (0x1u << SERCOM_I2CM_STATUS_BUSERR_Pos)
+#define SERCOM_I2CM_STATUS_ARBLOST_Pos 1            /**< \brief (SERCOM_I2CM_STATUS) Arbitration Lost */
+#define SERCOM_I2CM_STATUS_ARBLOST  (0x1u << SERCOM_I2CM_STATUS_ARBLOST_Pos)
+#define SERCOM_I2CM_STATUS_RXNACK_Pos 2            /**< \brief (SERCOM_I2CM_STATUS) Received Not Acknowledge */
+#define SERCOM_I2CM_STATUS_RXNACK   (0x1u << SERCOM_I2CM_STATUS_RXNACK_Pos)
+#define SERCOM_I2CM_STATUS_BUSSTATE_Pos 4            /**< \brief (SERCOM_I2CM_STATUS) Bus State */
+#define SERCOM_I2CM_STATUS_BUSSTATE_Msk (0x3u << SERCOM_I2CM_STATUS_BUSSTATE_Pos)
+#define SERCOM_I2CM_STATUS_BUSSTATE(value) ((SERCOM_I2CM_STATUS_BUSSTATE_Msk & ((value) << SERCOM_I2CM_STATUS_BUSSTATE_Pos)))
+#define SERCOM_I2CM_STATUS_LOWTOUT_Pos 6            /**< \brief (SERCOM_I2CM_STATUS) SCL Low Timeout */
+#define SERCOM_I2CM_STATUS_LOWTOUT  (0x1u << SERCOM_I2CM_STATUS_LOWTOUT_Pos)
+#define SERCOM_I2CM_STATUS_CLKHOLD_Pos 7            /**< \brief (SERCOM_I2CM_STATUS) Clock Hold */
+#define SERCOM_I2CM_STATUS_CLKHOLD  (0x1u << SERCOM_I2CM_STATUS_CLKHOLD_Pos)
+#define SERCOM_I2CM_STATUS_MEXTTOUT_Pos 8            /**< \brief (SERCOM_I2CM_STATUS) Master SCL Low Extend Timeout */
+#define SERCOM_I2CM_STATUS_MEXTTOUT (0x1u << SERCOM_I2CM_STATUS_MEXTTOUT_Pos)
+#define SERCOM_I2CM_STATUS_SEXTTOUT_Pos 9            /**< \brief (SERCOM_I2CM_STATUS) Slave SCL Low Extend Timeout */
+#define SERCOM_I2CM_STATUS_SEXTTOUT (0x1u << SERCOM_I2CM_STATUS_SEXTTOUT_Pos)
+#define SERCOM_I2CM_STATUS_LENERR_Pos 10           /**< \brief (SERCOM_I2CM_STATUS) Length Error */
+#define SERCOM_I2CM_STATUS_LENERR   (0x1u << SERCOM_I2CM_STATUS_LENERR_Pos)
+#define SERCOM_I2CM_STATUS_MASK     0x07F7u      /**< \brief (SERCOM_I2CM_STATUS) MASK Register */
+
+/* -------- SERCOM_I2CS_STATUS : (SERCOM Offset: 0x1A) (R/W 16) I2CS I2CS Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t BUSERR:1;         /*!< bit:      0  Bus Error                          */
+    uint16_t COLL:1;           /*!< bit:      1  Transmit Collision                 */
+    uint16_t RXNACK:1;         /*!< bit:      2  Received Not Acknowledge           */
+    uint16_t DIR:1;            /*!< bit:      3  Read/Write Direction               */
+    uint16_t SR:1;             /*!< bit:      4  Repeated Start                     */
+    uint16_t :1;               /*!< bit:      5  Reserved                           */
+    uint16_t LOWTOUT:1;        /*!< bit:      6  SCL Low Timeout                    */
+    uint16_t CLKHOLD:1;        /*!< bit:      7  Clock Hold                         */
+    uint16_t :1;               /*!< bit:      8  Reserved                           */
+    uint16_t SEXTTOUT:1;       /*!< bit:      9  Slave SCL Low Extend Timeout       */
+    uint16_t HS:1;             /*!< bit:     10  High Speed                         */
+    uint16_t :5;               /*!< bit: 11..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CS_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CS_STATUS_OFFSET   0x1A         /**< \brief (SERCOM_I2CS_STATUS offset) I2CS Status */
+#define SERCOM_I2CS_STATUS_RESETVALUE 0x0000       /**< \brief (SERCOM_I2CS_STATUS reset_value) I2CS Status */
+
+#define SERCOM_I2CS_STATUS_BUSERR_Pos 0            /**< \brief (SERCOM_I2CS_STATUS) Bus Error */
+#define SERCOM_I2CS_STATUS_BUSERR   (0x1u << SERCOM_I2CS_STATUS_BUSERR_Pos)
+#define SERCOM_I2CS_STATUS_COLL_Pos 1            /**< \brief (SERCOM_I2CS_STATUS) Transmit Collision */
+#define SERCOM_I2CS_STATUS_COLL     (0x1u << SERCOM_I2CS_STATUS_COLL_Pos)
+#define SERCOM_I2CS_STATUS_RXNACK_Pos 2            /**< \brief (SERCOM_I2CS_STATUS) Received Not Acknowledge */
+#define SERCOM_I2CS_STATUS_RXNACK   (0x1u << SERCOM_I2CS_STATUS_RXNACK_Pos)
+#define SERCOM_I2CS_STATUS_DIR_Pos  3            /**< \brief (SERCOM_I2CS_STATUS) Read/Write Direction */
+#define SERCOM_I2CS_STATUS_DIR      (0x1u << SERCOM_I2CS_STATUS_DIR_Pos)
+#define SERCOM_I2CS_STATUS_SR_Pos   4            /**< \brief (SERCOM_I2CS_STATUS) Repeated Start */
+#define SERCOM_I2CS_STATUS_SR       (0x1u << SERCOM_I2CS_STATUS_SR_Pos)
+#define SERCOM_I2CS_STATUS_LOWTOUT_Pos 6            /**< \brief (SERCOM_I2CS_STATUS) SCL Low Timeout */
+#define SERCOM_I2CS_STATUS_LOWTOUT  (0x1u << SERCOM_I2CS_STATUS_LOWTOUT_Pos)
+#define SERCOM_I2CS_STATUS_CLKHOLD_Pos 7            /**< \brief (SERCOM_I2CS_STATUS) Clock Hold */
+#define SERCOM_I2CS_STATUS_CLKHOLD  (0x1u << SERCOM_I2CS_STATUS_CLKHOLD_Pos)
+#define SERCOM_I2CS_STATUS_SEXTTOUT_Pos 9            /**< \brief (SERCOM_I2CS_STATUS) Slave SCL Low Extend Timeout */
+#define SERCOM_I2CS_STATUS_SEXTTOUT (0x1u << SERCOM_I2CS_STATUS_SEXTTOUT_Pos)
+#define SERCOM_I2CS_STATUS_HS_Pos   10           /**< \brief (SERCOM_I2CS_STATUS) High Speed */
+#define SERCOM_I2CS_STATUS_HS       (0x1u << SERCOM_I2CS_STATUS_HS_Pos)
+#define SERCOM_I2CS_STATUS_MASK     0x06DFu      /**< \brief (SERCOM_I2CS_STATUS) MASK Register */
+
+/* -------- SERCOM_SPI_STATUS : (SERCOM Offset: 0x1A) (R/W 16) SPI SPI Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint16_t BUFOVF:1;         /*!< bit:      2  Buffer Overflow                    */
+    uint16_t :13;              /*!< bit:  3..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SERCOM_SPI_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_STATUS_OFFSET    0x1A         /**< \brief (SERCOM_SPI_STATUS offset) SPI Status */
+#define SERCOM_SPI_STATUS_RESETVALUE 0x0000       /**< \brief (SERCOM_SPI_STATUS reset_value) SPI Status */
+
+#define SERCOM_SPI_STATUS_BUFOVF_Pos 2            /**< \brief (SERCOM_SPI_STATUS) Buffer Overflow */
+#define SERCOM_SPI_STATUS_BUFOVF    (0x1u << SERCOM_SPI_STATUS_BUFOVF_Pos)
+#define SERCOM_SPI_STATUS_MASK      0x0004u      /**< \brief (SERCOM_SPI_STATUS) MASK Register */
+
+/* -------- SERCOM_USART_STATUS : (SERCOM Offset: 0x1A) (R/W 16) USART USART Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t PERR:1;           /*!< bit:      0  Parity Error                       */
+    uint16_t FERR:1;           /*!< bit:      1  Frame Error                        */
+    uint16_t BUFOVF:1;         /*!< bit:      2  Buffer Overflow                    */
+    uint16_t CTS:1;            /*!< bit:      3  Clear To Send                      */
+    uint16_t ISF:1;            /*!< bit:      4  Inconsistent Sync Field            */
+    uint16_t COLL:1;           /*!< bit:      5  Collision Detected                 */
+    uint16_t :10;              /*!< bit:  6..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SERCOM_USART_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_STATUS_OFFSET  0x1A         /**< \brief (SERCOM_USART_STATUS offset) USART Status */
+#define SERCOM_USART_STATUS_RESETVALUE 0x0000       /**< \brief (SERCOM_USART_STATUS reset_value) USART Status */
+
+#define SERCOM_USART_STATUS_PERR_Pos 0            /**< \brief (SERCOM_USART_STATUS) Parity Error */
+#define SERCOM_USART_STATUS_PERR    (0x1u << SERCOM_USART_STATUS_PERR_Pos)
+#define SERCOM_USART_STATUS_FERR_Pos 1            /**< \brief (SERCOM_USART_STATUS) Frame Error */
+#define SERCOM_USART_STATUS_FERR    (0x1u << SERCOM_USART_STATUS_FERR_Pos)
+#define SERCOM_USART_STATUS_BUFOVF_Pos 2            /**< \brief (SERCOM_USART_STATUS) Buffer Overflow */
+#define SERCOM_USART_STATUS_BUFOVF  (0x1u << SERCOM_USART_STATUS_BUFOVF_Pos)
+#define SERCOM_USART_STATUS_CTS_Pos 3            /**< \brief (SERCOM_USART_STATUS) Clear To Send */
+#define SERCOM_USART_STATUS_CTS     (0x1u << SERCOM_USART_STATUS_CTS_Pos)
+#define SERCOM_USART_STATUS_ISF_Pos 4            /**< \brief (SERCOM_USART_STATUS) Inconsistent Sync Field */
+#define SERCOM_USART_STATUS_ISF     (0x1u << SERCOM_USART_STATUS_ISF_Pos)
+#define SERCOM_USART_STATUS_COLL_Pos 5            /**< \brief (SERCOM_USART_STATUS) Collision Detected */
+#define SERCOM_USART_STATUS_COLL    (0x1u << SERCOM_USART_STATUS_COLL_Pos)
+#define SERCOM_USART_STATUS_MASK    0x003Fu      /**< \brief (SERCOM_USART_STATUS) MASK Register */
+
+/* -------- SERCOM_I2CM_SYNCBUSY : (SERCOM Offset: 0x1C) (R/  32) I2CM I2CM Syncbusy -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Software Reset Synchronization Busy */
+    uint32_t ENABLE:1;         /*!< bit:      1  SERCOM Enable Synchronization Busy */
+    uint32_t SYSOP:1;          /*!< bit:      2  System Operation Synchronization Busy */
+    uint32_t :29;              /*!< bit:  3..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CM_SYNCBUSY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_SYNCBUSY_OFFSET 0x1C         /**< \brief (SERCOM_I2CM_SYNCBUSY offset) I2CM Syncbusy */
+#define SERCOM_I2CM_SYNCBUSY_RESETVALUE 0x00000000   /**< \brief (SERCOM_I2CM_SYNCBUSY reset_value) I2CM Syncbusy */
+
+#define SERCOM_I2CM_SYNCBUSY_SWRST_Pos 0            /**< \brief (SERCOM_I2CM_SYNCBUSY) Software Reset Synchronization Busy */
+#define SERCOM_I2CM_SYNCBUSY_SWRST  (0x1u << SERCOM_I2CM_SYNCBUSY_SWRST_Pos)
+#define SERCOM_I2CM_SYNCBUSY_ENABLE_Pos 1            /**< \brief (SERCOM_I2CM_SYNCBUSY) SERCOM Enable Synchronization Busy */
+#define SERCOM_I2CM_SYNCBUSY_ENABLE (0x1u << SERCOM_I2CM_SYNCBUSY_ENABLE_Pos)
+#define SERCOM_I2CM_SYNCBUSY_SYSOP_Pos 2            /**< \brief (SERCOM_I2CM_SYNCBUSY) System Operation Synchronization Busy */
+#define SERCOM_I2CM_SYNCBUSY_SYSOP  (0x1u << SERCOM_I2CM_SYNCBUSY_SYSOP_Pos)
+#define SERCOM_I2CM_SYNCBUSY_MASK   0x00000007u  /**< \brief (SERCOM_I2CM_SYNCBUSY) MASK Register */
+
+/* -------- SERCOM_I2CS_SYNCBUSY : (SERCOM Offset: 0x1C) (R/  32) I2CS I2CS Syncbusy -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Software Reset Synchronization Busy */
+    uint32_t ENABLE:1;         /*!< bit:      1  SERCOM Enable Synchronization Busy */
+    uint32_t :30;              /*!< bit:  2..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CS_SYNCBUSY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CS_SYNCBUSY_OFFSET 0x1C         /**< \brief (SERCOM_I2CS_SYNCBUSY offset) I2CS Syncbusy */
+#define SERCOM_I2CS_SYNCBUSY_RESETVALUE 0x00000000   /**< \brief (SERCOM_I2CS_SYNCBUSY reset_value) I2CS Syncbusy */
+
+#define SERCOM_I2CS_SYNCBUSY_SWRST_Pos 0            /**< \brief (SERCOM_I2CS_SYNCBUSY) Software Reset Synchronization Busy */
+#define SERCOM_I2CS_SYNCBUSY_SWRST  (0x1u << SERCOM_I2CS_SYNCBUSY_SWRST_Pos)
+#define SERCOM_I2CS_SYNCBUSY_ENABLE_Pos 1            /**< \brief (SERCOM_I2CS_SYNCBUSY) SERCOM Enable Synchronization Busy */
+#define SERCOM_I2CS_SYNCBUSY_ENABLE (0x1u << SERCOM_I2CS_SYNCBUSY_ENABLE_Pos)
+#define SERCOM_I2CS_SYNCBUSY_MASK   0x00000003u  /**< \brief (SERCOM_I2CS_SYNCBUSY) MASK Register */
+
+/* -------- SERCOM_SPI_SYNCBUSY : (SERCOM Offset: 0x1C) (R/  32) SPI SPI Syncbusy -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Software Reset Synchronization Busy */
+    uint32_t ENABLE:1;         /*!< bit:      1  SERCOM Enable Synchronization Busy */
+    uint32_t CTRLB:1;          /*!< bit:      2  CTRLB Synchronization Busy         */
+    uint32_t :29;              /*!< bit:  3..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_SPI_SYNCBUSY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_SYNCBUSY_OFFSET  0x1C         /**< \brief (SERCOM_SPI_SYNCBUSY offset) SPI Syncbusy */
+#define SERCOM_SPI_SYNCBUSY_RESETVALUE 0x00000000   /**< \brief (SERCOM_SPI_SYNCBUSY reset_value) SPI Syncbusy */
+
+#define SERCOM_SPI_SYNCBUSY_SWRST_Pos 0            /**< \brief (SERCOM_SPI_SYNCBUSY) Software Reset Synchronization Busy */
+#define SERCOM_SPI_SYNCBUSY_SWRST   (0x1u << SERCOM_SPI_SYNCBUSY_SWRST_Pos)
+#define SERCOM_SPI_SYNCBUSY_ENABLE_Pos 1            /**< \brief (SERCOM_SPI_SYNCBUSY) SERCOM Enable Synchronization Busy */
+#define SERCOM_SPI_SYNCBUSY_ENABLE  (0x1u << SERCOM_SPI_SYNCBUSY_ENABLE_Pos)
+#define SERCOM_SPI_SYNCBUSY_CTRLB_Pos 2            /**< \brief (SERCOM_SPI_SYNCBUSY) CTRLB Synchronization Busy */
+#define SERCOM_SPI_SYNCBUSY_CTRLB   (0x1u << SERCOM_SPI_SYNCBUSY_CTRLB_Pos)
+#define SERCOM_SPI_SYNCBUSY_MASK    0x00000007u  /**< \brief (SERCOM_SPI_SYNCBUSY) MASK Register */
+
+/* -------- SERCOM_USART_SYNCBUSY : (SERCOM Offset: 0x1C) (R/  32) USART USART Syncbusy -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Software Reset Synchronization Busy */
+    uint32_t ENABLE:1;         /*!< bit:      1  SERCOM Enable Synchronization Busy */
+    uint32_t CTRLB:1;          /*!< bit:      2  CTRLB Synchronization Busy         */
+    uint32_t :29;              /*!< bit:  3..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_USART_SYNCBUSY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_SYNCBUSY_OFFSET 0x1C         /**< \brief (SERCOM_USART_SYNCBUSY offset) USART Syncbusy */
+#define SERCOM_USART_SYNCBUSY_RESETVALUE 0x00000000   /**< \brief (SERCOM_USART_SYNCBUSY reset_value) USART Syncbusy */
+
+#define SERCOM_USART_SYNCBUSY_SWRST_Pos 0            /**< \brief (SERCOM_USART_SYNCBUSY) Software Reset Synchronization Busy */
+#define SERCOM_USART_SYNCBUSY_SWRST (0x1u << SERCOM_USART_SYNCBUSY_SWRST_Pos)
+#define SERCOM_USART_SYNCBUSY_ENABLE_Pos 1            /**< \brief (SERCOM_USART_SYNCBUSY) SERCOM Enable Synchronization Busy */
+#define SERCOM_USART_SYNCBUSY_ENABLE (0x1u << SERCOM_USART_SYNCBUSY_ENABLE_Pos)
+#define SERCOM_USART_SYNCBUSY_CTRLB_Pos 2            /**< \brief (SERCOM_USART_SYNCBUSY) CTRLB Synchronization Busy */
+#define SERCOM_USART_SYNCBUSY_CTRLB (0x1u << SERCOM_USART_SYNCBUSY_CTRLB_Pos)
+#define SERCOM_USART_SYNCBUSY_MASK  0x00000007u  /**< \brief (SERCOM_USART_SYNCBUSY) MASK Register */
+
+/* -------- SERCOM_I2CM_ADDR : (SERCOM Offset: 0x24) (R/W 32) I2CM I2CM Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t ADDR:11;          /*!< bit:  0..10  Address Value                      */
+    uint32_t :2;               /*!< bit: 11..12  Reserved                           */
+    uint32_t LENEN:1;          /*!< bit:     13  Length Enable                      */
+    uint32_t HS:1;             /*!< bit:     14  High Speed Mode                    */
+    uint32_t TENBITEN:1;       /*!< bit:     15  Ten Bit Addressing Enable          */
+    uint32_t LEN:8;            /*!< bit: 16..23  Length                             */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CM_ADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_ADDR_OFFSET     0x24         /**< \brief (SERCOM_I2CM_ADDR offset) I2CM Address */
+#define SERCOM_I2CM_ADDR_RESETVALUE 0x00000000   /**< \brief (SERCOM_I2CM_ADDR reset_value) I2CM Address */
+
+#define SERCOM_I2CM_ADDR_ADDR_Pos   0            /**< \brief (SERCOM_I2CM_ADDR) Address Value */
+#define SERCOM_I2CM_ADDR_ADDR_Msk   (0x7FFu << SERCOM_I2CM_ADDR_ADDR_Pos)
+#define SERCOM_I2CM_ADDR_ADDR(value) ((SERCOM_I2CM_ADDR_ADDR_Msk & ((value) << SERCOM_I2CM_ADDR_ADDR_Pos)))
+#define SERCOM_I2CM_ADDR_LENEN_Pos  13           /**< \brief (SERCOM_I2CM_ADDR) Length Enable */
+#define SERCOM_I2CM_ADDR_LENEN      (0x1u << SERCOM_I2CM_ADDR_LENEN_Pos)
+#define SERCOM_I2CM_ADDR_HS_Pos     14           /**< \brief (SERCOM_I2CM_ADDR) High Speed Mode */
+#define SERCOM_I2CM_ADDR_HS         (0x1u << SERCOM_I2CM_ADDR_HS_Pos)
+#define SERCOM_I2CM_ADDR_TENBITEN_Pos 15           /**< \brief (SERCOM_I2CM_ADDR) Ten Bit Addressing Enable */
+#define SERCOM_I2CM_ADDR_TENBITEN   (0x1u << SERCOM_I2CM_ADDR_TENBITEN_Pos)
+#define SERCOM_I2CM_ADDR_LEN_Pos    16           /**< \brief (SERCOM_I2CM_ADDR) Length */
+#define SERCOM_I2CM_ADDR_LEN_Msk    (0xFFu << SERCOM_I2CM_ADDR_LEN_Pos)
+#define SERCOM_I2CM_ADDR_LEN(value) ((SERCOM_I2CM_ADDR_LEN_Msk & ((value) << SERCOM_I2CM_ADDR_LEN_Pos)))
+#define SERCOM_I2CM_ADDR_MASK       0x00FFE7FFu  /**< \brief (SERCOM_I2CM_ADDR) MASK Register */
+
+/* -------- SERCOM_I2CS_ADDR : (SERCOM Offset: 0x24) (R/W 32) I2CS I2CS Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t GENCEN:1;         /*!< bit:      0  General Call Address Enable        */
+    uint32_t ADDR:10;          /*!< bit:  1..10  Address Value                      */
+    uint32_t :4;               /*!< bit: 11..14  Reserved                           */
+    uint32_t TENBITEN:1;       /*!< bit:     15  Ten Bit Addressing Enable          */
+    uint32_t :1;               /*!< bit:     16  Reserved                           */
+    uint32_t ADDRMASK:10;      /*!< bit: 17..26  Address Mask                       */
+    uint32_t :5;               /*!< bit: 27..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_I2CS_ADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CS_ADDR_OFFSET     0x24         /**< \brief (SERCOM_I2CS_ADDR offset) I2CS Address */
+#define SERCOM_I2CS_ADDR_RESETVALUE 0x00000000   /**< \brief (SERCOM_I2CS_ADDR reset_value) I2CS Address */
+
+#define SERCOM_I2CS_ADDR_GENCEN_Pos 0            /**< \brief (SERCOM_I2CS_ADDR) General Call Address Enable */
+#define SERCOM_I2CS_ADDR_GENCEN     (0x1u << SERCOM_I2CS_ADDR_GENCEN_Pos)
+#define SERCOM_I2CS_ADDR_ADDR_Pos   1            /**< \brief (SERCOM_I2CS_ADDR) Address Value */
+#define SERCOM_I2CS_ADDR_ADDR_Msk   (0x3FFu << SERCOM_I2CS_ADDR_ADDR_Pos)
+#define SERCOM_I2CS_ADDR_ADDR(value) ((SERCOM_I2CS_ADDR_ADDR_Msk & ((value) << SERCOM_I2CS_ADDR_ADDR_Pos)))
+#define SERCOM_I2CS_ADDR_TENBITEN_Pos 15           /**< \brief (SERCOM_I2CS_ADDR) Ten Bit Addressing Enable */
+#define SERCOM_I2CS_ADDR_TENBITEN   (0x1u << SERCOM_I2CS_ADDR_TENBITEN_Pos)
+#define SERCOM_I2CS_ADDR_ADDRMASK_Pos 17           /**< \brief (SERCOM_I2CS_ADDR) Address Mask */
+#define SERCOM_I2CS_ADDR_ADDRMASK_Msk (0x3FFu << SERCOM_I2CS_ADDR_ADDRMASK_Pos)
+#define SERCOM_I2CS_ADDR_ADDRMASK(value) ((SERCOM_I2CS_ADDR_ADDRMASK_Msk & ((value) << SERCOM_I2CS_ADDR_ADDRMASK_Pos)))
+#define SERCOM_I2CS_ADDR_MASK       0x07FE87FFu  /**< \brief (SERCOM_I2CS_ADDR) MASK Register */
+
+/* -------- SERCOM_SPI_ADDR : (SERCOM Offset: 0x24) (R/W 32) SPI SPI Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t ADDR:8;           /*!< bit:  0.. 7  Address Value                      */
+    uint32_t :8;               /*!< bit:  8..15  Reserved                           */
+    uint32_t ADDRMASK:8;       /*!< bit: 16..23  Address Mask                       */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_SPI_ADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_ADDR_OFFSET      0x24         /**< \brief (SERCOM_SPI_ADDR offset) SPI Address */
+#define SERCOM_SPI_ADDR_RESETVALUE  0x00000000   /**< \brief (SERCOM_SPI_ADDR reset_value) SPI Address */
+
+#define SERCOM_SPI_ADDR_ADDR_Pos    0            /**< \brief (SERCOM_SPI_ADDR) Address Value */
+#define SERCOM_SPI_ADDR_ADDR_Msk    (0xFFu << SERCOM_SPI_ADDR_ADDR_Pos)
+#define SERCOM_SPI_ADDR_ADDR(value) ((SERCOM_SPI_ADDR_ADDR_Msk & ((value) << SERCOM_SPI_ADDR_ADDR_Pos)))
+#define SERCOM_SPI_ADDR_ADDRMASK_Pos 16           /**< \brief (SERCOM_SPI_ADDR) Address Mask */
+#define SERCOM_SPI_ADDR_ADDRMASK_Msk (0xFFu << SERCOM_SPI_ADDR_ADDRMASK_Pos)
+#define SERCOM_SPI_ADDR_ADDRMASK(value) ((SERCOM_SPI_ADDR_ADDRMASK_Msk & ((value) << SERCOM_SPI_ADDR_ADDRMASK_Pos)))
+#define SERCOM_SPI_ADDR_MASK        0x00FF00FFu  /**< \brief (SERCOM_SPI_ADDR) MASK Register */
+
+/* -------- SERCOM_I2CM_DATA : (SERCOM Offset: 0x28) (R/W  8) I2CM I2CM Data -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DATA:8;           /*!< bit:  0.. 7  Data Value                         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_I2CM_DATA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_DATA_OFFSET     0x28         /**< \brief (SERCOM_I2CM_DATA offset) I2CM Data */
+#define SERCOM_I2CM_DATA_RESETVALUE 0x00         /**< \brief (SERCOM_I2CM_DATA reset_value) I2CM Data */
+
+#define SERCOM_I2CM_DATA_DATA_Pos   0            /**< \brief (SERCOM_I2CM_DATA) Data Value */
+#define SERCOM_I2CM_DATA_DATA_Msk   (0xFFu << SERCOM_I2CM_DATA_DATA_Pos)
+#define SERCOM_I2CM_DATA_DATA(value) ((SERCOM_I2CM_DATA_DATA_Msk & ((value) << SERCOM_I2CM_DATA_DATA_Pos)))
+#define SERCOM_I2CM_DATA_MASK       0xFFu        /**< \brief (SERCOM_I2CM_DATA) MASK Register */
+
+/* -------- SERCOM_I2CS_DATA : (SERCOM Offset: 0x28) (R/W  8) I2CS I2CS Data -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DATA:8;           /*!< bit:  0.. 7  Data Value                         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_I2CS_DATA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CS_DATA_OFFSET     0x28         /**< \brief (SERCOM_I2CS_DATA offset) I2CS Data */
+#define SERCOM_I2CS_DATA_RESETVALUE 0x00         /**< \brief (SERCOM_I2CS_DATA reset_value) I2CS Data */
+
+#define SERCOM_I2CS_DATA_DATA_Pos   0            /**< \brief (SERCOM_I2CS_DATA) Data Value */
+#define SERCOM_I2CS_DATA_DATA_Msk   (0xFFu << SERCOM_I2CS_DATA_DATA_Pos)
+#define SERCOM_I2CS_DATA_DATA(value) ((SERCOM_I2CS_DATA_DATA_Msk & ((value) << SERCOM_I2CS_DATA_DATA_Pos)))
+#define SERCOM_I2CS_DATA_MASK       0xFFu        /**< \brief (SERCOM_I2CS_DATA) MASK Register */
+
+/* -------- SERCOM_SPI_DATA : (SERCOM Offset: 0x28) (R/W 32) SPI SPI Data -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DATA:9;           /*!< bit:  0.. 8  Data Value                         */
+    uint32_t :23;              /*!< bit:  9..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SERCOM_SPI_DATA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_DATA_OFFSET      0x28         /**< \brief (SERCOM_SPI_DATA offset) SPI Data */
+#define SERCOM_SPI_DATA_RESETVALUE  0x00000000   /**< \brief (SERCOM_SPI_DATA reset_value) SPI Data */
+
+#define SERCOM_SPI_DATA_DATA_Pos    0            /**< \brief (SERCOM_SPI_DATA) Data Value */
+#define SERCOM_SPI_DATA_DATA_Msk    (0x1FFu << SERCOM_SPI_DATA_DATA_Pos)
+#define SERCOM_SPI_DATA_DATA(value) ((SERCOM_SPI_DATA_DATA_Msk & ((value) << SERCOM_SPI_DATA_DATA_Pos)))
+#define SERCOM_SPI_DATA_MASK        0x000001FFu  /**< \brief (SERCOM_SPI_DATA) MASK Register */
+
+/* -------- SERCOM_USART_DATA : (SERCOM Offset: 0x28) (R/W 16) USART USART Data -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t DATA:9;           /*!< bit:  0.. 8  Data Value                         */
+    uint16_t :7;               /*!< bit:  9..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SERCOM_USART_DATA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_DATA_OFFSET    0x28         /**< \brief (SERCOM_USART_DATA offset) USART Data */
+#define SERCOM_USART_DATA_RESETVALUE 0x0000       /**< \brief (SERCOM_USART_DATA reset_value) USART Data */
+
+#define SERCOM_USART_DATA_DATA_Pos  0            /**< \brief (SERCOM_USART_DATA) Data Value */
+#define SERCOM_USART_DATA_DATA_Msk  (0x1FFu << SERCOM_USART_DATA_DATA_Pos)
+#define SERCOM_USART_DATA_DATA(value) ((SERCOM_USART_DATA_DATA_Msk & ((value) << SERCOM_USART_DATA_DATA_Pos)))
+#define SERCOM_USART_DATA_MASK      0x01FFu      /**< \brief (SERCOM_USART_DATA) MASK Register */
+
+/* -------- SERCOM_I2CM_DBGCTRL : (SERCOM Offset: 0x30) (R/W  8) I2CM I2CM Debug Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DBGSTOP:1;        /*!< bit:      0  Debug Mode                         */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_I2CM_DBGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_I2CM_DBGCTRL_OFFSET  0x30         /**< \brief (SERCOM_I2CM_DBGCTRL offset) I2CM Debug Control */
+#define SERCOM_I2CM_DBGCTRL_RESETVALUE 0x00         /**< \brief (SERCOM_I2CM_DBGCTRL reset_value) I2CM Debug Control */
+
+#define SERCOM_I2CM_DBGCTRL_DBGSTOP_Pos 0            /**< \brief (SERCOM_I2CM_DBGCTRL) Debug Mode */
+#define SERCOM_I2CM_DBGCTRL_DBGSTOP (0x1u << SERCOM_I2CM_DBGCTRL_DBGSTOP_Pos)
+#define SERCOM_I2CM_DBGCTRL_MASK    0x01u        /**< \brief (SERCOM_I2CM_DBGCTRL) MASK Register */
+
+/* -------- SERCOM_SPI_DBGCTRL : (SERCOM Offset: 0x30) (R/W  8) SPI SPI Debug Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DBGSTOP:1;        /*!< bit:      0  Debug Mode                         */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_SPI_DBGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_SPI_DBGCTRL_OFFSET   0x30         /**< \brief (SERCOM_SPI_DBGCTRL offset) SPI Debug Control */
+#define SERCOM_SPI_DBGCTRL_RESETVALUE 0x00         /**< \brief (SERCOM_SPI_DBGCTRL reset_value) SPI Debug Control */
+
+#define SERCOM_SPI_DBGCTRL_DBGSTOP_Pos 0            /**< \brief (SERCOM_SPI_DBGCTRL) Debug Mode */
+#define SERCOM_SPI_DBGCTRL_DBGSTOP  (0x1u << SERCOM_SPI_DBGCTRL_DBGSTOP_Pos)
+#define SERCOM_SPI_DBGCTRL_MASK     0x01u        /**< \brief (SERCOM_SPI_DBGCTRL) MASK Register */
+
+/* -------- SERCOM_USART_DBGCTRL : (SERCOM Offset: 0x30) (R/W  8) USART USART Debug Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DBGSTOP:1;        /*!< bit:      0  Debug Mode                         */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SERCOM_USART_DBGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SERCOM_USART_DBGCTRL_OFFSET 0x30         /**< \brief (SERCOM_USART_DBGCTRL offset) USART Debug Control */
+#define SERCOM_USART_DBGCTRL_RESETVALUE 0x00         /**< \brief (SERCOM_USART_DBGCTRL reset_value) USART Debug Control */
+
+#define SERCOM_USART_DBGCTRL_DBGSTOP_Pos 0            /**< \brief (SERCOM_USART_DBGCTRL) Debug Mode */
+#define SERCOM_USART_DBGCTRL_DBGSTOP (0x1u << SERCOM_USART_DBGCTRL_DBGSTOP_Pos)
+#define SERCOM_USART_DBGCTRL_MASK   0x01u        /**< \brief (SERCOM_USART_DBGCTRL) MASK Register */
+
+/** \brief SERCOM_I2CM hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* I2C Master Mode */
+  __IO SERCOM_I2CM_CTRLA_Type    CTRLA;       /**< \brief Offset: 0x00 (R/W 32) I2CM Control A */
+  __IO SERCOM_I2CM_CTRLB_Type    CTRLB;       /**< \brief Offset: 0x04 (R/W 32) I2CM Control B */
+       RoReg8                    Reserved1[0x4];
+  __IO SERCOM_I2CM_BAUD_Type     BAUD;        /**< \brief Offset: 0x0C (R/W 32) I2CM Baud Rate */
+       RoReg8                    Reserved2[0x4];
+  __IO SERCOM_I2CM_INTENCLR_Type INTENCLR;    /**< \brief Offset: 0x14 (R/W  8) I2CM Interrupt Enable Clear */
+       RoReg8                    Reserved3[0x1];
+  __IO SERCOM_I2CM_INTENSET_Type INTENSET;    /**< \brief Offset: 0x16 (R/W  8) I2CM Interrupt Enable Set */
+       RoReg8                    Reserved4[0x1];
+  __IO SERCOM_I2CM_INTFLAG_Type  INTFLAG;     /**< \brief Offset: 0x18 (R/W  8) I2CM Interrupt Flag Status and Clear */
+       RoReg8                    Reserved5[0x1];
+  __IO SERCOM_I2CM_STATUS_Type   STATUS;      /**< \brief Offset: 0x1A (R/W 16) I2CM Status */
+  __I  SERCOM_I2CM_SYNCBUSY_Type SYNCBUSY;    /**< \brief Offset: 0x1C (R/  32) I2CM Syncbusy */
+       RoReg8                    Reserved6[0x4];
+  __IO SERCOM_I2CM_ADDR_Type     ADDR;        /**< \brief Offset: 0x24 (R/W 32) I2CM Address */
+  __IO SERCOM_I2CM_DATA_Type     DATA;        /**< \brief Offset: 0x28 (R/W  8) I2CM Data */
+       RoReg8                    Reserved7[0x7];
+  __IO SERCOM_I2CM_DBGCTRL_Type  DBGCTRL;     /**< \brief Offset: 0x30 (R/W  8) I2CM Debug Control */
+} SercomI2cm;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief SERCOM_I2CS hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* I2C Slave Mode */
+  __IO SERCOM_I2CS_CTRLA_Type    CTRLA;       /**< \brief Offset: 0x00 (R/W 32) I2CS Control A */
+  __IO SERCOM_I2CS_CTRLB_Type    CTRLB;       /**< \brief Offset: 0x04 (R/W 32) I2CS Control B */
+       RoReg8                    Reserved1[0xC];
+  __IO SERCOM_I2CS_INTENCLR_Type INTENCLR;    /**< \brief Offset: 0x14 (R/W  8) I2CS Interrupt Enable Clear */
+       RoReg8                    Reserved2[0x1];
+  __IO SERCOM_I2CS_INTENSET_Type INTENSET;    /**< \brief Offset: 0x16 (R/W  8) I2CS Interrupt Enable Set */
+       RoReg8                    Reserved3[0x1];
+  __IO SERCOM_I2CS_INTFLAG_Type  INTFLAG;     /**< \brief Offset: 0x18 (R/W  8) I2CS Interrupt Flag Status and Clear */
+       RoReg8                    Reserved4[0x1];
+  __IO SERCOM_I2CS_STATUS_Type   STATUS;      /**< \brief Offset: 0x1A (R/W 16) I2CS Status */
+  __I  SERCOM_I2CS_SYNCBUSY_Type SYNCBUSY;    /**< \brief Offset: 0x1C (R/  32) I2CS Syncbusy */
+       RoReg8                    Reserved5[0x4];
+  __IO SERCOM_I2CS_ADDR_Type     ADDR;        /**< \brief Offset: 0x24 (R/W 32) I2CS Address */
+  __IO SERCOM_I2CS_DATA_Type     DATA;        /**< \brief Offset: 0x28 (R/W  8) I2CS Data */
+} SercomI2cs;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief SERCOM_SPI hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* SPI Mode */
+  __IO SERCOM_SPI_CTRLA_Type     CTRLA;       /**< \brief Offset: 0x00 (R/W 32) SPI Control A */
+  __IO SERCOM_SPI_CTRLB_Type     CTRLB;       /**< \brief Offset: 0x04 (R/W 32) SPI Control B */
+       RoReg8                    Reserved1[0x4];
+  __IO SERCOM_SPI_BAUD_Type      BAUD;        /**< \brief Offset: 0x0C (R/W  8) SPI Baud Rate */
+       RoReg8                    Reserved2[0x7];
+  __IO SERCOM_SPI_INTENCLR_Type  INTENCLR;    /**< \brief Offset: 0x14 (R/W  8) SPI Interrupt Enable Clear */
+       RoReg8                    Reserved3[0x1];
+  __IO SERCOM_SPI_INTENSET_Type  INTENSET;    /**< \brief Offset: 0x16 (R/W  8) SPI Interrupt Enable Set */
+       RoReg8                    Reserved4[0x1];
+  __IO SERCOM_SPI_INTFLAG_Type   INTFLAG;     /**< \brief Offset: 0x18 (R/W  8) SPI Interrupt Flag Status and Clear */
+       RoReg8                    Reserved5[0x1];
+  __IO SERCOM_SPI_STATUS_Type    STATUS;      /**< \brief Offset: 0x1A (R/W 16) SPI Status */
+  __I  SERCOM_SPI_SYNCBUSY_Type  SYNCBUSY;    /**< \brief Offset: 0x1C (R/  32) SPI Syncbusy */
+       RoReg8                    Reserved6[0x4];
+  __IO SERCOM_SPI_ADDR_Type      ADDR;        /**< \brief Offset: 0x24 (R/W 32) SPI Address */
+  __IO SERCOM_SPI_DATA_Type      DATA;        /**< \brief Offset: 0x28 (R/W 32) SPI Data */
+       RoReg8                    Reserved7[0x4];
+  __IO SERCOM_SPI_DBGCTRL_Type   DBGCTRL;     /**< \brief Offset: 0x30 (R/W  8) SPI Debug Control */
+} SercomSpi;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief SERCOM_USART hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* USART Mode */
+  __IO SERCOM_USART_CTRLA_Type   CTRLA;       /**< \brief Offset: 0x00 (R/W 32) USART Control A */
+  __IO SERCOM_USART_CTRLB_Type   CTRLB;       /**< \brief Offset: 0x04 (R/W 32) USART Control B */
+       RoReg8                    Reserved1[0x4];
+  __IO SERCOM_USART_BAUD_Type    BAUD;        /**< \brief Offset: 0x0C (R/W 16) USART Baud Rate */
+  __IO SERCOM_USART_RXPL_Type    RXPL;        /**< \brief Offset: 0x0E (R/W  8) USART Receive Pulse Length */
+       RoReg8                    Reserved2[0x5];
+  __IO SERCOM_USART_INTENCLR_Type INTENCLR;    /**< \brief Offset: 0x14 (R/W  8) USART Interrupt Enable Clear */
+       RoReg8                    Reserved3[0x1];
+  __IO SERCOM_USART_INTENSET_Type INTENSET;    /**< \brief Offset: 0x16 (R/W  8) USART Interrupt Enable Set */
+       RoReg8                    Reserved4[0x1];
+  __IO SERCOM_USART_INTFLAG_Type INTFLAG;     /**< \brief Offset: 0x18 (R/W  8) USART Interrupt Flag Status and Clear */
+       RoReg8                    Reserved5[0x1];
+  __IO SERCOM_USART_STATUS_Type  STATUS;      /**< \brief Offset: 0x1A (R/W 16) USART Status */
+  __I  SERCOM_USART_SYNCBUSY_Type SYNCBUSY;    /**< \brief Offset: 0x1C (R/  32) USART Syncbusy */
+       RoReg8                    Reserved6[0x8];
+  __IO SERCOM_USART_DATA_Type    DATA;        /**< \brief Offset: 0x28 (R/W 16) USART Data */
+       RoReg8                    Reserved7[0x6];
+  __IO SERCOM_USART_DBGCTRL_Type DBGCTRL;     /**< \brief Offset: 0x30 (R/W  8) USART Debug Control */
+} SercomUsart;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+       SercomI2cm                I2CM;        /**< \brief Offset: 0x00 I2C Master Mode */
+       SercomI2cs                I2CS;        /**< \brief Offset: 0x00 I2C Slave Mode */
+       SercomSpi                 SPI;         /**< \brief Offset: 0x00 SPI Mode */
+       SercomUsart               USART;       /**< \brief Offset: 0x00 USART Mode */
+} Sercom;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_SERCOM_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/sysctrl.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/sysctrl.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/sysctrl.h	(revision 136)
@@ -0,0 +1,944 @@
+/**
+ * \file
+ *
+ * \brief Component description for SYSCTRL
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_SYSCTRL_COMPONENT_
+#define _SAMD21_SYSCTRL_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR SYSCTRL */
+/* ========================================================================== */
+/** \addtogroup SAMD21_SYSCTRL System Control */
+/*@{*/
+
+#define SYSCTRL_U2100
+#define REV_SYSCTRL                 0x201
+
+/* -------- SYSCTRL_INTENCLR : (SYSCTRL Offset: 0x00) (R/W 32) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t XOSCRDY:1;        /*!< bit:      0  XOSC Ready Interrupt Enable        */
+    uint32_t XOSC32KRDY:1;     /*!< bit:      1  XOSC32K Ready Interrupt Enable     */
+    uint32_t OSC32KRDY:1;      /*!< bit:      2  OSC32K Ready Interrupt Enable      */
+    uint32_t OSC8MRDY:1;       /*!< bit:      3  OSC8M Ready Interrupt Enable       */
+    uint32_t DFLLRDY:1;        /*!< bit:      4  DFLL Ready Interrupt Enable        */
+    uint32_t DFLLOOB:1;        /*!< bit:      5  DFLL Out Of Bounds Interrupt Enable */
+    uint32_t DFLLLCKF:1;       /*!< bit:      6  DFLL Lock Fine Interrupt Enable    */
+    uint32_t DFLLLCKC:1;       /*!< bit:      7  DFLL Lock Coarse Interrupt Enable  */
+    uint32_t DFLLRCS:1;        /*!< bit:      8  DFLL Reference Clock Stopped Interrupt Enable */
+    uint32_t BOD33RDY:1;       /*!< bit:      9  BOD33 Ready Interrupt Enable       */
+    uint32_t BOD33DET:1;       /*!< bit:     10  BOD33 Detection Interrupt Enable   */
+    uint32_t B33SRDY:1;        /*!< bit:     11  BOD33 Synchronization Ready Interrupt Enable */
+    uint32_t :3;               /*!< bit: 12..14  Reserved                           */
+    uint32_t DPLLLCKR:1;       /*!< bit:     15  DPLL Lock Rise Interrupt Enable    */
+    uint32_t DPLLLCKF:1;       /*!< bit:     16  DPLL Lock Fall Interrupt Enable    */
+    uint32_t DPLLLTO:1;        /*!< bit:     17  DPLL Lock Timeout Interrupt Enable */
+    uint32_t :14;              /*!< bit: 18..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_INTENCLR_OFFSET     0x00         /**< \brief (SYSCTRL_INTENCLR offset) Interrupt Enable Clear */
+#define SYSCTRL_INTENCLR_RESETVALUE 0x00000000   /**< \brief (SYSCTRL_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define SYSCTRL_INTENCLR_XOSCRDY_Pos 0            /**< \brief (SYSCTRL_INTENCLR) XOSC Ready Interrupt Enable */
+#define SYSCTRL_INTENCLR_XOSCRDY    (0x1u << SYSCTRL_INTENCLR_XOSCRDY_Pos)
+#define SYSCTRL_INTENCLR_XOSC32KRDY_Pos 1            /**< \brief (SYSCTRL_INTENCLR) XOSC32K Ready Interrupt Enable */
+#define SYSCTRL_INTENCLR_XOSC32KRDY (0x1u << SYSCTRL_INTENCLR_XOSC32KRDY_Pos)
+#define SYSCTRL_INTENCLR_OSC32KRDY_Pos 2            /**< \brief (SYSCTRL_INTENCLR) OSC32K Ready Interrupt Enable */
+#define SYSCTRL_INTENCLR_OSC32KRDY  (0x1u << SYSCTRL_INTENCLR_OSC32KRDY_Pos)
+#define SYSCTRL_INTENCLR_OSC8MRDY_Pos 3            /**< \brief (SYSCTRL_INTENCLR) OSC8M Ready Interrupt Enable */
+#define SYSCTRL_INTENCLR_OSC8MRDY   (0x1u << SYSCTRL_INTENCLR_OSC8MRDY_Pos)
+#define SYSCTRL_INTENCLR_DFLLRDY_Pos 4            /**< \brief (SYSCTRL_INTENCLR) DFLL Ready Interrupt Enable */
+#define SYSCTRL_INTENCLR_DFLLRDY    (0x1u << SYSCTRL_INTENCLR_DFLLRDY_Pos)
+#define SYSCTRL_INTENCLR_DFLLOOB_Pos 5            /**< \brief (SYSCTRL_INTENCLR) DFLL Out Of Bounds Interrupt Enable */
+#define SYSCTRL_INTENCLR_DFLLOOB    (0x1u << SYSCTRL_INTENCLR_DFLLOOB_Pos)
+#define SYSCTRL_INTENCLR_DFLLLCKF_Pos 6            /**< \brief (SYSCTRL_INTENCLR) DFLL Lock Fine Interrupt Enable */
+#define SYSCTRL_INTENCLR_DFLLLCKF   (0x1u << SYSCTRL_INTENCLR_DFLLLCKF_Pos)
+#define SYSCTRL_INTENCLR_DFLLLCKC_Pos 7            /**< \brief (SYSCTRL_INTENCLR) DFLL Lock Coarse Interrupt Enable */
+#define SYSCTRL_INTENCLR_DFLLLCKC   (0x1u << SYSCTRL_INTENCLR_DFLLLCKC_Pos)
+#define SYSCTRL_INTENCLR_DFLLRCS_Pos 8            /**< \brief (SYSCTRL_INTENCLR) DFLL Reference Clock Stopped Interrupt Enable */
+#define SYSCTRL_INTENCLR_DFLLRCS    (0x1u << SYSCTRL_INTENCLR_DFLLRCS_Pos)
+#define SYSCTRL_INTENCLR_BOD33RDY_Pos 9            /**< \brief (SYSCTRL_INTENCLR) BOD33 Ready Interrupt Enable */
+#define SYSCTRL_INTENCLR_BOD33RDY   (0x1u << SYSCTRL_INTENCLR_BOD33RDY_Pos)
+#define SYSCTRL_INTENCLR_BOD33DET_Pos 10           /**< \brief (SYSCTRL_INTENCLR) BOD33 Detection Interrupt Enable */
+#define SYSCTRL_INTENCLR_BOD33DET   (0x1u << SYSCTRL_INTENCLR_BOD33DET_Pos)
+#define SYSCTRL_INTENCLR_B33SRDY_Pos 11           /**< \brief (SYSCTRL_INTENCLR) BOD33 Synchronization Ready Interrupt Enable */
+#define SYSCTRL_INTENCLR_B33SRDY    (0x1u << SYSCTRL_INTENCLR_B33SRDY_Pos)
+#define SYSCTRL_INTENCLR_DPLLLCKR_Pos 15           /**< \brief (SYSCTRL_INTENCLR) DPLL Lock Rise Interrupt Enable */
+#define SYSCTRL_INTENCLR_DPLLLCKR   (0x1u << SYSCTRL_INTENCLR_DPLLLCKR_Pos)
+#define SYSCTRL_INTENCLR_DPLLLCKF_Pos 16           /**< \brief (SYSCTRL_INTENCLR) DPLL Lock Fall Interrupt Enable */
+#define SYSCTRL_INTENCLR_DPLLLCKF   (0x1u << SYSCTRL_INTENCLR_DPLLLCKF_Pos)
+#define SYSCTRL_INTENCLR_DPLLLTO_Pos 17           /**< \brief (SYSCTRL_INTENCLR) DPLL Lock Timeout Interrupt Enable */
+#define SYSCTRL_INTENCLR_DPLLLTO    (0x1u << SYSCTRL_INTENCLR_DPLLLTO_Pos)
+#define SYSCTRL_INTENCLR_MASK       0x00038FFFu  /**< \brief (SYSCTRL_INTENCLR) MASK Register */
+
+/* -------- SYSCTRL_INTENSET : (SYSCTRL Offset: 0x04) (R/W 32) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t XOSCRDY:1;        /*!< bit:      0  XOSC Ready Interrupt Enable        */
+    uint32_t XOSC32KRDY:1;     /*!< bit:      1  XOSC32K Ready Interrupt Enable     */
+    uint32_t OSC32KRDY:1;      /*!< bit:      2  OSC32K Ready Interrupt Enable      */
+    uint32_t OSC8MRDY:1;       /*!< bit:      3  OSC8M Ready Interrupt Enable       */
+    uint32_t DFLLRDY:1;        /*!< bit:      4  DFLL Ready Interrupt Enable        */
+    uint32_t DFLLOOB:1;        /*!< bit:      5  DFLL Out Of Bounds Interrupt Enable */
+    uint32_t DFLLLCKF:1;       /*!< bit:      6  DFLL Lock Fine Interrupt Enable    */
+    uint32_t DFLLLCKC:1;       /*!< bit:      7  DFLL Lock Coarse Interrupt Enable  */
+    uint32_t DFLLRCS:1;        /*!< bit:      8  DFLL Reference Clock Stopped Interrupt Enable */
+    uint32_t BOD33RDY:1;       /*!< bit:      9  BOD33 Ready Interrupt Enable       */
+    uint32_t BOD33DET:1;       /*!< bit:     10  BOD33 Detection Interrupt Enable   */
+    uint32_t B33SRDY:1;        /*!< bit:     11  BOD33 Synchronization Ready Interrupt Enable */
+    uint32_t :3;               /*!< bit: 12..14  Reserved                           */
+    uint32_t DPLLLCKR:1;       /*!< bit:     15  DPLL Lock Rise Interrupt Enable    */
+    uint32_t DPLLLCKF:1;       /*!< bit:     16  DPLL Lock Fall Interrupt Enable    */
+    uint32_t DPLLLTO:1;        /*!< bit:     17  DPLL Lock Timeout Interrupt Enable */
+    uint32_t :14;              /*!< bit: 18..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_INTENSET_OFFSET     0x04         /**< \brief (SYSCTRL_INTENSET offset) Interrupt Enable Set */
+#define SYSCTRL_INTENSET_RESETVALUE 0x00000000   /**< \brief (SYSCTRL_INTENSET reset_value) Interrupt Enable Set */
+
+#define SYSCTRL_INTENSET_XOSCRDY_Pos 0            /**< \brief (SYSCTRL_INTENSET) XOSC Ready Interrupt Enable */
+#define SYSCTRL_INTENSET_XOSCRDY    (0x1u << SYSCTRL_INTENSET_XOSCRDY_Pos)
+#define SYSCTRL_INTENSET_XOSC32KRDY_Pos 1            /**< \brief (SYSCTRL_INTENSET) XOSC32K Ready Interrupt Enable */
+#define SYSCTRL_INTENSET_XOSC32KRDY (0x1u << SYSCTRL_INTENSET_XOSC32KRDY_Pos)
+#define SYSCTRL_INTENSET_OSC32KRDY_Pos 2            /**< \brief (SYSCTRL_INTENSET) OSC32K Ready Interrupt Enable */
+#define SYSCTRL_INTENSET_OSC32KRDY  (0x1u << SYSCTRL_INTENSET_OSC32KRDY_Pos)
+#define SYSCTRL_INTENSET_OSC8MRDY_Pos 3            /**< \brief (SYSCTRL_INTENSET) OSC8M Ready Interrupt Enable */
+#define SYSCTRL_INTENSET_OSC8MRDY   (0x1u << SYSCTRL_INTENSET_OSC8MRDY_Pos)
+#define SYSCTRL_INTENSET_DFLLRDY_Pos 4            /**< \brief (SYSCTRL_INTENSET) DFLL Ready Interrupt Enable */
+#define SYSCTRL_INTENSET_DFLLRDY    (0x1u << SYSCTRL_INTENSET_DFLLRDY_Pos)
+#define SYSCTRL_INTENSET_DFLLOOB_Pos 5            /**< \brief (SYSCTRL_INTENSET) DFLL Out Of Bounds Interrupt Enable */
+#define SYSCTRL_INTENSET_DFLLOOB    (0x1u << SYSCTRL_INTENSET_DFLLOOB_Pos)
+#define SYSCTRL_INTENSET_DFLLLCKF_Pos 6            /**< \brief (SYSCTRL_INTENSET) DFLL Lock Fine Interrupt Enable */
+#define SYSCTRL_INTENSET_DFLLLCKF   (0x1u << SYSCTRL_INTENSET_DFLLLCKF_Pos)
+#define SYSCTRL_INTENSET_DFLLLCKC_Pos 7            /**< \brief (SYSCTRL_INTENSET) DFLL Lock Coarse Interrupt Enable */
+#define SYSCTRL_INTENSET_DFLLLCKC   (0x1u << SYSCTRL_INTENSET_DFLLLCKC_Pos)
+#define SYSCTRL_INTENSET_DFLLRCS_Pos 8            /**< \brief (SYSCTRL_INTENSET) DFLL Reference Clock Stopped Interrupt Enable */
+#define SYSCTRL_INTENSET_DFLLRCS    (0x1u << SYSCTRL_INTENSET_DFLLRCS_Pos)
+#define SYSCTRL_INTENSET_BOD33RDY_Pos 9            /**< \brief (SYSCTRL_INTENSET) BOD33 Ready Interrupt Enable */
+#define SYSCTRL_INTENSET_BOD33RDY   (0x1u << SYSCTRL_INTENSET_BOD33RDY_Pos)
+#define SYSCTRL_INTENSET_BOD33DET_Pos 10           /**< \brief (SYSCTRL_INTENSET) BOD33 Detection Interrupt Enable */
+#define SYSCTRL_INTENSET_BOD33DET   (0x1u << SYSCTRL_INTENSET_BOD33DET_Pos)
+#define SYSCTRL_INTENSET_B33SRDY_Pos 11           /**< \brief (SYSCTRL_INTENSET) BOD33 Synchronization Ready Interrupt Enable */
+#define SYSCTRL_INTENSET_B33SRDY    (0x1u << SYSCTRL_INTENSET_B33SRDY_Pos)
+#define SYSCTRL_INTENSET_DPLLLCKR_Pos 15           /**< \brief (SYSCTRL_INTENSET) DPLL Lock Rise Interrupt Enable */
+#define SYSCTRL_INTENSET_DPLLLCKR   (0x1u << SYSCTRL_INTENSET_DPLLLCKR_Pos)
+#define SYSCTRL_INTENSET_DPLLLCKF_Pos 16           /**< \brief (SYSCTRL_INTENSET) DPLL Lock Fall Interrupt Enable */
+#define SYSCTRL_INTENSET_DPLLLCKF   (0x1u << SYSCTRL_INTENSET_DPLLLCKF_Pos)
+#define SYSCTRL_INTENSET_DPLLLTO_Pos 17           /**< \brief (SYSCTRL_INTENSET) DPLL Lock Timeout Interrupt Enable */
+#define SYSCTRL_INTENSET_DPLLLTO    (0x1u << SYSCTRL_INTENSET_DPLLLTO_Pos)
+#define SYSCTRL_INTENSET_MASK       0x00038FFFu  /**< \brief (SYSCTRL_INTENSET) MASK Register */
+
+/* -------- SYSCTRL_INTFLAG : (SYSCTRL Offset: 0x08) (R/W 32) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t XOSCRDY:1;        /*!< bit:      0  XOSC Ready                         */
+    uint32_t XOSC32KRDY:1;     /*!< bit:      1  XOSC32K Ready                      */
+    uint32_t OSC32KRDY:1;      /*!< bit:      2  OSC32K Ready                       */
+    uint32_t OSC8MRDY:1;       /*!< bit:      3  OSC8M Ready                        */
+    uint32_t DFLLRDY:1;        /*!< bit:      4  DFLL Ready                         */
+    uint32_t DFLLOOB:1;        /*!< bit:      5  DFLL Out Of Bounds                 */
+    uint32_t DFLLLCKF:1;       /*!< bit:      6  DFLL Lock Fine                     */
+    uint32_t DFLLLCKC:1;       /*!< bit:      7  DFLL Lock Coarse                   */
+    uint32_t DFLLRCS:1;        /*!< bit:      8  DFLL Reference Clock Stopped       */
+    uint32_t BOD33RDY:1;       /*!< bit:      9  BOD33 Ready                        */
+    uint32_t BOD33DET:1;       /*!< bit:     10  BOD33 Detection                    */
+    uint32_t B33SRDY:1;        /*!< bit:     11  BOD33 Synchronization Ready        */
+    uint32_t :3;               /*!< bit: 12..14  Reserved                           */
+    uint32_t DPLLLCKR:1;       /*!< bit:     15  DPLL Lock Rise                     */
+    uint32_t DPLLLCKF:1;       /*!< bit:     16  DPLL Lock Fall                     */
+    uint32_t DPLLLTO:1;        /*!< bit:     17  DPLL Lock Timeout                  */
+    uint32_t :14;              /*!< bit: 18..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_INTFLAG_OFFSET      0x08         /**< \brief (SYSCTRL_INTFLAG offset) Interrupt Flag Status and Clear */
+#define SYSCTRL_INTFLAG_RESETVALUE  0x00000000   /**< \brief (SYSCTRL_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define SYSCTRL_INTFLAG_XOSCRDY_Pos 0            /**< \brief (SYSCTRL_INTFLAG) XOSC Ready */
+#define SYSCTRL_INTFLAG_XOSCRDY     (0x1u << SYSCTRL_INTFLAG_XOSCRDY_Pos)
+#define SYSCTRL_INTFLAG_XOSC32KRDY_Pos 1            /**< \brief (SYSCTRL_INTFLAG) XOSC32K Ready */
+#define SYSCTRL_INTFLAG_XOSC32KRDY  (0x1u << SYSCTRL_INTFLAG_XOSC32KRDY_Pos)
+#define SYSCTRL_INTFLAG_OSC32KRDY_Pos 2            /**< \brief (SYSCTRL_INTFLAG) OSC32K Ready */
+#define SYSCTRL_INTFLAG_OSC32KRDY   (0x1u << SYSCTRL_INTFLAG_OSC32KRDY_Pos)
+#define SYSCTRL_INTFLAG_OSC8MRDY_Pos 3            /**< \brief (SYSCTRL_INTFLAG) OSC8M Ready */
+#define SYSCTRL_INTFLAG_OSC8MRDY    (0x1u << SYSCTRL_INTFLAG_OSC8MRDY_Pos)
+#define SYSCTRL_INTFLAG_DFLLRDY_Pos 4            /**< \brief (SYSCTRL_INTFLAG) DFLL Ready */
+#define SYSCTRL_INTFLAG_DFLLRDY     (0x1u << SYSCTRL_INTFLAG_DFLLRDY_Pos)
+#define SYSCTRL_INTFLAG_DFLLOOB_Pos 5            /**< \brief (SYSCTRL_INTFLAG) DFLL Out Of Bounds */
+#define SYSCTRL_INTFLAG_DFLLOOB     (0x1u << SYSCTRL_INTFLAG_DFLLOOB_Pos)
+#define SYSCTRL_INTFLAG_DFLLLCKF_Pos 6            /**< \brief (SYSCTRL_INTFLAG) DFLL Lock Fine */
+#define SYSCTRL_INTFLAG_DFLLLCKF    (0x1u << SYSCTRL_INTFLAG_DFLLLCKF_Pos)
+#define SYSCTRL_INTFLAG_DFLLLCKC_Pos 7            /**< \brief (SYSCTRL_INTFLAG) DFLL Lock Coarse */
+#define SYSCTRL_INTFLAG_DFLLLCKC    (0x1u << SYSCTRL_INTFLAG_DFLLLCKC_Pos)
+#define SYSCTRL_INTFLAG_DFLLRCS_Pos 8            /**< \brief (SYSCTRL_INTFLAG) DFLL Reference Clock Stopped */
+#define SYSCTRL_INTFLAG_DFLLRCS     (0x1u << SYSCTRL_INTFLAG_DFLLRCS_Pos)
+#define SYSCTRL_INTFLAG_BOD33RDY_Pos 9            /**< \brief (SYSCTRL_INTFLAG) BOD33 Ready */
+#define SYSCTRL_INTFLAG_BOD33RDY    (0x1u << SYSCTRL_INTFLAG_BOD33RDY_Pos)
+#define SYSCTRL_INTFLAG_BOD33DET_Pos 10           /**< \brief (SYSCTRL_INTFLAG) BOD33 Detection */
+#define SYSCTRL_INTFLAG_BOD33DET    (0x1u << SYSCTRL_INTFLAG_BOD33DET_Pos)
+#define SYSCTRL_INTFLAG_B33SRDY_Pos 11           /**< \brief (SYSCTRL_INTFLAG) BOD33 Synchronization Ready */
+#define SYSCTRL_INTFLAG_B33SRDY     (0x1u << SYSCTRL_INTFLAG_B33SRDY_Pos)
+#define SYSCTRL_INTFLAG_DPLLLCKR_Pos 15           /**< \brief (SYSCTRL_INTFLAG) DPLL Lock Rise */
+#define SYSCTRL_INTFLAG_DPLLLCKR    (0x1u << SYSCTRL_INTFLAG_DPLLLCKR_Pos)
+#define SYSCTRL_INTFLAG_DPLLLCKF_Pos 16           /**< \brief (SYSCTRL_INTFLAG) DPLL Lock Fall */
+#define SYSCTRL_INTFLAG_DPLLLCKF    (0x1u << SYSCTRL_INTFLAG_DPLLLCKF_Pos)
+#define SYSCTRL_INTFLAG_DPLLLTO_Pos 17           /**< \brief (SYSCTRL_INTFLAG) DPLL Lock Timeout */
+#define SYSCTRL_INTFLAG_DPLLLTO     (0x1u << SYSCTRL_INTFLAG_DPLLLTO_Pos)
+#define SYSCTRL_INTFLAG_MASK        0x00038FFFu  /**< \brief (SYSCTRL_INTFLAG) MASK Register */
+
+/* -------- SYSCTRL_PCLKSR : (SYSCTRL Offset: 0x0C) (R/  32) Power and Clocks Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t XOSCRDY:1;        /*!< bit:      0  XOSC Ready                         */
+    uint32_t XOSC32KRDY:1;     /*!< bit:      1  XOSC32K Ready                      */
+    uint32_t OSC32KRDY:1;      /*!< bit:      2  OSC32K Ready                       */
+    uint32_t OSC8MRDY:1;       /*!< bit:      3  OSC8M Ready                        */
+    uint32_t DFLLRDY:1;        /*!< bit:      4  DFLL Ready                         */
+    uint32_t DFLLOOB:1;        /*!< bit:      5  DFLL Out Of Bounds                 */
+    uint32_t DFLLLCKF:1;       /*!< bit:      6  DFLL Lock Fine                     */
+    uint32_t DFLLLCKC:1;       /*!< bit:      7  DFLL Lock Coarse                   */
+    uint32_t DFLLRCS:1;        /*!< bit:      8  DFLL Reference Clock Stopped       */
+    uint32_t BOD33RDY:1;       /*!< bit:      9  BOD33 Ready                        */
+    uint32_t BOD33DET:1;       /*!< bit:     10  BOD33 Detection                    */
+    uint32_t B33SRDY:1;        /*!< bit:     11  BOD33 Synchronization Ready        */
+    uint32_t :3;               /*!< bit: 12..14  Reserved                           */
+    uint32_t DPLLLCKR:1;       /*!< bit:     15  DPLL Lock Rise                     */
+    uint32_t DPLLLCKF:1;       /*!< bit:     16  DPLL Lock Fall                     */
+    uint32_t DPLLLTO:1;        /*!< bit:     17  DPLL Lock Timeout                  */
+    uint32_t :14;              /*!< bit: 18..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_PCLKSR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_PCLKSR_OFFSET       0x0C         /**< \brief (SYSCTRL_PCLKSR offset) Power and Clocks Status */
+#define SYSCTRL_PCLKSR_RESETVALUE   0x00000000   /**< \brief (SYSCTRL_PCLKSR reset_value) Power and Clocks Status */
+
+#define SYSCTRL_PCLKSR_XOSCRDY_Pos  0            /**< \brief (SYSCTRL_PCLKSR) XOSC Ready */
+#define SYSCTRL_PCLKSR_XOSCRDY      (0x1u << SYSCTRL_PCLKSR_XOSCRDY_Pos)
+#define SYSCTRL_PCLKSR_XOSC32KRDY_Pos 1            /**< \brief (SYSCTRL_PCLKSR) XOSC32K Ready */
+#define SYSCTRL_PCLKSR_XOSC32KRDY   (0x1u << SYSCTRL_PCLKSR_XOSC32KRDY_Pos)
+#define SYSCTRL_PCLKSR_OSC32KRDY_Pos 2            /**< \brief (SYSCTRL_PCLKSR) OSC32K Ready */
+#define SYSCTRL_PCLKSR_OSC32KRDY    (0x1u << SYSCTRL_PCLKSR_OSC32KRDY_Pos)
+#define SYSCTRL_PCLKSR_OSC8MRDY_Pos 3            /**< \brief (SYSCTRL_PCLKSR) OSC8M Ready */
+#define SYSCTRL_PCLKSR_OSC8MRDY     (0x1u << SYSCTRL_PCLKSR_OSC8MRDY_Pos)
+#define SYSCTRL_PCLKSR_DFLLRDY_Pos  4            /**< \brief (SYSCTRL_PCLKSR) DFLL Ready */
+#define SYSCTRL_PCLKSR_DFLLRDY      (0x1u << SYSCTRL_PCLKSR_DFLLRDY_Pos)
+#define SYSCTRL_PCLKSR_DFLLOOB_Pos  5            /**< \brief (SYSCTRL_PCLKSR) DFLL Out Of Bounds */
+#define SYSCTRL_PCLKSR_DFLLOOB      (0x1u << SYSCTRL_PCLKSR_DFLLOOB_Pos)
+#define SYSCTRL_PCLKSR_DFLLLCKF_Pos 6            /**< \brief (SYSCTRL_PCLKSR) DFLL Lock Fine */
+#define SYSCTRL_PCLKSR_DFLLLCKF     (0x1u << SYSCTRL_PCLKSR_DFLLLCKF_Pos)
+#define SYSCTRL_PCLKSR_DFLLLCKC_Pos 7            /**< \brief (SYSCTRL_PCLKSR) DFLL Lock Coarse */
+#define SYSCTRL_PCLKSR_DFLLLCKC     (0x1u << SYSCTRL_PCLKSR_DFLLLCKC_Pos)
+#define SYSCTRL_PCLKSR_DFLLRCS_Pos  8            /**< \brief (SYSCTRL_PCLKSR) DFLL Reference Clock Stopped */
+#define SYSCTRL_PCLKSR_DFLLRCS      (0x1u << SYSCTRL_PCLKSR_DFLLRCS_Pos)
+#define SYSCTRL_PCLKSR_BOD33RDY_Pos 9            /**< \brief (SYSCTRL_PCLKSR) BOD33 Ready */
+#define SYSCTRL_PCLKSR_BOD33RDY     (0x1u << SYSCTRL_PCLKSR_BOD33RDY_Pos)
+#define SYSCTRL_PCLKSR_BOD33DET_Pos 10           /**< \brief (SYSCTRL_PCLKSR) BOD33 Detection */
+#define SYSCTRL_PCLKSR_BOD33DET     (0x1u << SYSCTRL_PCLKSR_BOD33DET_Pos)
+#define SYSCTRL_PCLKSR_B33SRDY_Pos  11           /**< \brief (SYSCTRL_PCLKSR) BOD33 Synchronization Ready */
+#define SYSCTRL_PCLKSR_B33SRDY      (0x1u << SYSCTRL_PCLKSR_B33SRDY_Pos)
+#define SYSCTRL_PCLKSR_DPLLLCKR_Pos 15           /**< \brief (SYSCTRL_PCLKSR) DPLL Lock Rise */
+#define SYSCTRL_PCLKSR_DPLLLCKR     (0x1u << SYSCTRL_PCLKSR_DPLLLCKR_Pos)
+#define SYSCTRL_PCLKSR_DPLLLCKF_Pos 16           /**< \brief (SYSCTRL_PCLKSR) DPLL Lock Fall */
+#define SYSCTRL_PCLKSR_DPLLLCKF     (0x1u << SYSCTRL_PCLKSR_DPLLLCKF_Pos)
+#define SYSCTRL_PCLKSR_DPLLLTO_Pos  17           /**< \brief (SYSCTRL_PCLKSR) DPLL Lock Timeout */
+#define SYSCTRL_PCLKSR_DPLLLTO      (0x1u << SYSCTRL_PCLKSR_DPLLLTO_Pos)
+#define SYSCTRL_PCLKSR_MASK         0x00038FFFu  /**< \brief (SYSCTRL_PCLKSR) MASK Register */
+
+/* -------- SYSCTRL_XOSC : (SYSCTRL Offset: 0x10) (R/W 16) External Multipurpose Crystal Oscillator (XOSC) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t :1;               /*!< bit:      0  Reserved                           */
+    uint16_t ENABLE:1;         /*!< bit:      1  Oscillator Enable                  */
+    uint16_t XTALEN:1;         /*!< bit:      2  Crystal Oscillator Enable          */
+    uint16_t :3;               /*!< bit:  3.. 5  Reserved                           */
+    uint16_t RUNSTDBY:1;       /*!< bit:      6  Run in Standby                     */
+    uint16_t ONDEMAND:1;       /*!< bit:      7  On Demand Control                  */
+    uint16_t GAIN:3;           /*!< bit:  8..10  Oscillator Gain                    */
+    uint16_t AMPGC:1;          /*!< bit:     11  Automatic Amplitude Gain Control   */
+    uint16_t STARTUP:4;        /*!< bit: 12..15  Start-Up Time                      */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_XOSC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_XOSC_OFFSET         0x10         /**< \brief (SYSCTRL_XOSC offset) External Multipurpose Crystal Oscillator (XOSC) Control */
+#define SYSCTRL_XOSC_RESETVALUE     0x0080       /**< \brief (SYSCTRL_XOSC reset_value) External Multipurpose Crystal Oscillator (XOSC) Control */
+
+#define SYSCTRL_XOSC_ENABLE_Pos     1            /**< \brief (SYSCTRL_XOSC) Oscillator Enable */
+#define SYSCTRL_XOSC_ENABLE         (0x1u << SYSCTRL_XOSC_ENABLE_Pos)
+#define SYSCTRL_XOSC_XTALEN_Pos     2            /**< \brief (SYSCTRL_XOSC) Crystal Oscillator Enable */
+#define SYSCTRL_XOSC_XTALEN         (0x1u << SYSCTRL_XOSC_XTALEN_Pos)
+#define SYSCTRL_XOSC_RUNSTDBY_Pos   6            /**< \brief (SYSCTRL_XOSC) Run in Standby */
+#define SYSCTRL_XOSC_RUNSTDBY       (0x1u << SYSCTRL_XOSC_RUNSTDBY_Pos)
+#define SYSCTRL_XOSC_ONDEMAND_Pos   7            /**< \brief (SYSCTRL_XOSC) On Demand Control */
+#define SYSCTRL_XOSC_ONDEMAND       (0x1u << SYSCTRL_XOSC_ONDEMAND_Pos)
+#define SYSCTRL_XOSC_GAIN_Pos       8            /**< \brief (SYSCTRL_XOSC) Oscillator Gain */
+#define SYSCTRL_XOSC_GAIN_Msk       (0x7u << SYSCTRL_XOSC_GAIN_Pos)
+#define SYSCTRL_XOSC_GAIN(value)    ((SYSCTRL_XOSC_GAIN_Msk & ((value) << SYSCTRL_XOSC_GAIN_Pos)))
+#define   SYSCTRL_XOSC_GAIN_0_Val         0x0u   /**< \brief (SYSCTRL_XOSC) 2MHz */
+#define   SYSCTRL_XOSC_GAIN_1_Val         0x1u   /**< \brief (SYSCTRL_XOSC) 4MHz */
+#define   SYSCTRL_XOSC_GAIN_2_Val         0x2u   /**< \brief (SYSCTRL_XOSC) 8MHz */
+#define   SYSCTRL_XOSC_GAIN_3_Val         0x3u   /**< \brief (SYSCTRL_XOSC) 16MHz */
+#define   SYSCTRL_XOSC_GAIN_4_Val         0x4u   /**< \brief (SYSCTRL_XOSC) 30MHz */
+#define SYSCTRL_XOSC_GAIN_0         (SYSCTRL_XOSC_GAIN_0_Val       << SYSCTRL_XOSC_GAIN_Pos)
+#define SYSCTRL_XOSC_GAIN_1         (SYSCTRL_XOSC_GAIN_1_Val       << SYSCTRL_XOSC_GAIN_Pos)
+#define SYSCTRL_XOSC_GAIN_2         (SYSCTRL_XOSC_GAIN_2_Val       << SYSCTRL_XOSC_GAIN_Pos)
+#define SYSCTRL_XOSC_GAIN_3         (SYSCTRL_XOSC_GAIN_3_Val       << SYSCTRL_XOSC_GAIN_Pos)
+#define SYSCTRL_XOSC_GAIN_4         (SYSCTRL_XOSC_GAIN_4_Val       << SYSCTRL_XOSC_GAIN_Pos)
+#define SYSCTRL_XOSC_AMPGC_Pos      11           /**< \brief (SYSCTRL_XOSC) Automatic Amplitude Gain Control */
+#define SYSCTRL_XOSC_AMPGC          (0x1u << SYSCTRL_XOSC_AMPGC_Pos)
+#define SYSCTRL_XOSC_STARTUP_Pos    12           /**< \brief (SYSCTRL_XOSC) Start-Up Time */
+#define SYSCTRL_XOSC_STARTUP_Msk    (0xFu << SYSCTRL_XOSC_STARTUP_Pos)
+#define SYSCTRL_XOSC_STARTUP(value) ((SYSCTRL_XOSC_STARTUP_Msk & ((value) << SYSCTRL_XOSC_STARTUP_Pos)))
+#define SYSCTRL_XOSC_MASK           0xFFC6u      /**< \brief (SYSCTRL_XOSC) MASK Register */
+
+/* -------- SYSCTRL_XOSC32K : (SYSCTRL Offset: 0x14) (R/W 16) 32kHz External Crystal Oscillator (XOSC32K) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t :1;               /*!< bit:      0  Reserved                           */
+    uint16_t ENABLE:1;         /*!< bit:      1  Oscillator Enable                  */
+    uint16_t XTALEN:1;         /*!< bit:      2  Crystal Oscillator Enable          */
+    uint16_t EN32K:1;          /*!< bit:      3  32kHz Output Enable                */
+    uint16_t EN1K:1;           /*!< bit:      4  1kHz Output Enable                 */
+    uint16_t AAMPEN:1;         /*!< bit:      5  Automatic Amplitude Control Enable */
+    uint16_t RUNSTDBY:1;       /*!< bit:      6  Run in Standby                     */
+    uint16_t ONDEMAND:1;       /*!< bit:      7  On Demand Control                  */
+    uint16_t STARTUP:3;        /*!< bit:  8..10  Oscillator Start-Up Time           */
+    uint16_t :1;               /*!< bit:     11  Reserved                           */
+    uint16_t WRTLOCK:1;        /*!< bit:     12  Write Lock                         */
+    uint16_t :3;               /*!< bit: 13..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_XOSC32K_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_XOSC32K_OFFSET      0x14         /**< \brief (SYSCTRL_XOSC32K offset) 32kHz External Crystal Oscillator (XOSC32K) Control */
+#define SYSCTRL_XOSC32K_RESETVALUE  0x0080       /**< \brief (SYSCTRL_XOSC32K reset_value) 32kHz External Crystal Oscillator (XOSC32K) Control */
+
+#define SYSCTRL_XOSC32K_ENABLE_Pos  1            /**< \brief (SYSCTRL_XOSC32K) Oscillator Enable */
+#define SYSCTRL_XOSC32K_ENABLE      (0x1u << SYSCTRL_XOSC32K_ENABLE_Pos)
+#define SYSCTRL_XOSC32K_XTALEN_Pos  2            /**< \brief (SYSCTRL_XOSC32K) Crystal Oscillator Enable */
+#define SYSCTRL_XOSC32K_XTALEN      (0x1u << SYSCTRL_XOSC32K_XTALEN_Pos)
+#define SYSCTRL_XOSC32K_EN32K_Pos   3            /**< \brief (SYSCTRL_XOSC32K) 32kHz Output Enable */
+#define SYSCTRL_XOSC32K_EN32K       (0x1u << SYSCTRL_XOSC32K_EN32K_Pos)
+#define SYSCTRL_XOSC32K_EN1K_Pos    4            /**< \brief (SYSCTRL_XOSC32K) 1kHz Output Enable */
+#define SYSCTRL_XOSC32K_EN1K        (0x1u << SYSCTRL_XOSC32K_EN1K_Pos)
+#define SYSCTRL_XOSC32K_AAMPEN_Pos  5            /**< \brief (SYSCTRL_XOSC32K) Automatic Amplitude Control Enable */
+#define SYSCTRL_XOSC32K_AAMPEN      (0x1u << SYSCTRL_XOSC32K_AAMPEN_Pos)
+#define SYSCTRL_XOSC32K_RUNSTDBY_Pos 6            /**< \brief (SYSCTRL_XOSC32K) Run in Standby */
+#define SYSCTRL_XOSC32K_RUNSTDBY    (0x1u << SYSCTRL_XOSC32K_RUNSTDBY_Pos)
+#define SYSCTRL_XOSC32K_ONDEMAND_Pos 7            /**< \brief (SYSCTRL_XOSC32K) On Demand Control */
+#define SYSCTRL_XOSC32K_ONDEMAND    (0x1u << SYSCTRL_XOSC32K_ONDEMAND_Pos)
+#define SYSCTRL_XOSC32K_STARTUP_Pos 8            /**< \brief (SYSCTRL_XOSC32K) Oscillator Start-Up Time */
+#define SYSCTRL_XOSC32K_STARTUP_Msk (0x7u << SYSCTRL_XOSC32K_STARTUP_Pos)
+#define SYSCTRL_XOSC32K_STARTUP(value) ((SYSCTRL_XOSC32K_STARTUP_Msk & ((value) << SYSCTRL_XOSC32K_STARTUP_Pos)))
+#define SYSCTRL_XOSC32K_WRTLOCK_Pos 12           /**< \brief (SYSCTRL_XOSC32K) Write Lock */
+#define SYSCTRL_XOSC32K_WRTLOCK     (0x1u << SYSCTRL_XOSC32K_WRTLOCK_Pos)
+#define SYSCTRL_XOSC32K_MASK        0x17FEu      /**< \brief (SYSCTRL_XOSC32K) MASK Register */
+
+/* -------- SYSCTRL_OSC32K : (SYSCTRL Offset: 0x18) (R/W 32) 32kHz Internal Oscillator (OSC32K) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :1;               /*!< bit:      0  Reserved                           */
+    uint32_t ENABLE:1;         /*!< bit:      1  Oscillator Enable                  */
+    uint32_t EN32K:1;          /*!< bit:      2  32kHz Output Enable                */
+    uint32_t EN1K:1;           /*!< bit:      3  1kHz Output Enable                 */
+    uint32_t :2;               /*!< bit:  4.. 5  Reserved                           */
+    uint32_t RUNSTDBY:1;       /*!< bit:      6  Run in Standby                     */
+    uint32_t ONDEMAND:1;       /*!< bit:      7  On Demand Control                  */
+    uint32_t STARTUP:3;        /*!< bit:  8..10  Oscillator Start-Up Time           */
+    uint32_t :1;               /*!< bit:     11  Reserved                           */
+    uint32_t WRTLOCK:1;        /*!< bit:     12  Write Lock                         */
+    uint32_t :3;               /*!< bit: 13..15  Reserved                           */
+    uint32_t CALIB:7;          /*!< bit: 16..22  Oscillator Calibration             */
+    uint32_t :9;               /*!< bit: 23..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_OSC32K_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_OSC32K_OFFSET       0x18         /**< \brief (SYSCTRL_OSC32K offset) 32kHz Internal Oscillator (OSC32K) Control */
+#define SYSCTRL_OSC32K_RESETVALUE   0x003F0080   /**< \brief (SYSCTRL_OSC32K reset_value) 32kHz Internal Oscillator (OSC32K) Control */
+
+#define SYSCTRL_OSC32K_ENABLE_Pos   1            /**< \brief (SYSCTRL_OSC32K) Oscillator Enable */
+#define SYSCTRL_OSC32K_ENABLE       (0x1u << SYSCTRL_OSC32K_ENABLE_Pos)
+#define SYSCTRL_OSC32K_EN32K_Pos    2            /**< \brief (SYSCTRL_OSC32K) 32kHz Output Enable */
+#define SYSCTRL_OSC32K_EN32K        (0x1u << SYSCTRL_OSC32K_EN32K_Pos)
+#define SYSCTRL_OSC32K_EN1K_Pos     3            /**< \brief (SYSCTRL_OSC32K) 1kHz Output Enable */
+#define SYSCTRL_OSC32K_EN1K         (0x1u << SYSCTRL_OSC32K_EN1K_Pos)
+#define SYSCTRL_OSC32K_RUNSTDBY_Pos 6            /**< \brief (SYSCTRL_OSC32K) Run in Standby */
+#define SYSCTRL_OSC32K_RUNSTDBY     (0x1u << SYSCTRL_OSC32K_RUNSTDBY_Pos)
+#define SYSCTRL_OSC32K_ONDEMAND_Pos 7            /**< \brief (SYSCTRL_OSC32K) On Demand Control */
+#define SYSCTRL_OSC32K_ONDEMAND     (0x1u << SYSCTRL_OSC32K_ONDEMAND_Pos)
+#define SYSCTRL_OSC32K_STARTUP_Pos  8            /**< \brief (SYSCTRL_OSC32K) Oscillator Start-Up Time */
+#define SYSCTRL_OSC32K_STARTUP_Msk  (0x7u << SYSCTRL_OSC32K_STARTUP_Pos)
+#define SYSCTRL_OSC32K_STARTUP(value) ((SYSCTRL_OSC32K_STARTUP_Msk & ((value) << SYSCTRL_OSC32K_STARTUP_Pos)))
+#define SYSCTRL_OSC32K_WRTLOCK_Pos  12           /**< \brief (SYSCTRL_OSC32K) Write Lock */
+#define SYSCTRL_OSC32K_WRTLOCK      (0x1u << SYSCTRL_OSC32K_WRTLOCK_Pos)
+#define SYSCTRL_OSC32K_CALIB_Pos    16           /**< \brief (SYSCTRL_OSC32K) Oscillator Calibration */
+#define SYSCTRL_OSC32K_CALIB_Msk    (0x7Fu << SYSCTRL_OSC32K_CALIB_Pos)
+#define SYSCTRL_OSC32K_CALIB(value) ((SYSCTRL_OSC32K_CALIB_Msk & ((value) << SYSCTRL_OSC32K_CALIB_Pos)))
+#define SYSCTRL_OSC32K_MASK         0x007F17CEu  /**< \brief (SYSCTRL_OSC32K) MASK Register */
+
+/* -------- SYSCTRL_OSCULP32K : (SYSCTRL Offset: 0x1C) (R/W  8) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CALIB:5;          /*!< bit:  0.. 4  Oscillator Calibration             */
+    uint8_t  :2;               /*!< bit:  5.. 6  Reserved                           */
+    uint8_t  WRTLOCK:1;        /*!< bit:      7  Write Lock                         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SYSCTRL_OSCULP32K_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_OSCULP32K_OFFSET    0x1C         /**< \brief (SYSCTRL_OSCULP32K offset) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */
+#define SYSCTRL_OSCULP32K_RESETVALUE 0x1F         /**< \brief (SYSCTRL_OSCULP32K reset_value) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */
+
+#define SYSCTRL_OSCULP32K_CALIB_Pos 0            /**< \brief (SYSCTRL_OSCULP32K) Oscillator Calibration */
+#define SYSCTRL_OSCULP32K_CALIB_Msk (0x1Fu << SYSCTRL_OSCULP32K_CALIB_Pos)
+#define SYSCTRL_OSCULP32K_CALIB(value) ((SYSCTRL_OSCULP32K_CALIB_Msk & ((value) << SYSCTRL_OSCULP32K_CALIB_Pos)))
+#define SYSCTRL_OSCULP32K_WRTLOCK_Pos 7            /**< \brief (SYSCTRL_OSCULP32K) Write Lock */
+#define SYSCTRL_OSCULP32K_WRTLOCK   (0x1u << SYSCTRL_OSCULP32K_WRTLOCK_Pos)
+#define SYSCTRL_OSCULP32K_MASK      0x9Fu        /**< \brief (SYSCTRL_OSCULP32K) MASK Register */
+
+/* -------- SYSCTRL_OSC8M : (SYSCTRL Offset: 0x20) (R/W 32) 8MHz Internal Oscillator (OSC8M) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :1;               /*!< bit:      0  Reserved                           */
+    uint32_t ENABLE:1;         /*!< bit:      1  Oscillator Enable                  */
+    uint32_t :4;               /*!< bit:  2.. 5  Reserved                           */
+    uint32_t RUNSTDBY:1;       /*!< bit:      6  Run in Standby                     */
+    uint32_t ONDEMAND:1;       /*!< bit:      7  On Demand Control                  */
+    uint32_t PRESC:2;          /*!< bit:  8.. 9  Oscillator Prescaler               */
+    uint32_t :6;               /*!< bit: 10..15  Reserved                           */
+    uint32_t CALIB:12;         /*!< bit: 16..27  Oscillator Calibration             */
+    uint32_t :2;               /*!< bit: 28..29  Reserved                           */
+    uint32_t FRANGE:2;         /*!< bit: 30..31  Oscillator Frequency Range         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_OSC8M_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_OSC8M_OFFSET        0x20         /**< \brief (SYSCTRL_OSC8M offset) 8MHz Internal Oscillator (OSC8M) Control */
+#define SYSCTRL_OSC8M_RESETVALUE    0x87070382   /**< \brief (SYSCTRL_OSC8M reset_value) 8MHz Internal Oscillator (OSC8M) Control */
+
+#define SYSCTRL_OSC8M_ENABLE_Pos    1            /**< \brief (SYSCTRL_OSC8M) Oscillator Enable */
+#define SYSCTRL_OSC8M_ENABLE        (0x1u << SYSCTRL_OSC8M_ENABLE_Pos)
+#define SYSCTRL_OSC8M_RUNSTDBY_Pos  6            /**< \brief (SYSCTRL_OSC8M) Run in Standby */
+#define SYSCTRL_OSC8M_RUNSTDBY      (0x1u << SYSCTRL_OSC8M_RUNSTDBY_Pos)
+#define SYSCTRL_OSC8M_ONDEMAND_Pos  7            /**< \brief (SYSCTRL_OSC8M) On Demand Control */
+#define SYSCTRL_OSC8M_ONDEMAND      (0x1u << SYSCTRL_OSC8M_ONDEMAND_Pos)
+#define SYSCTRL_OSC8M_PRESC_Pos     8            /**< \brief (SYSCTRL_OSC8M) Oscillator Prescaler */
+#define SYSCTRL_OSC8M_PRESC_Msk     (0x3u << SYSCTRL_OSC8M_PRESC_Pos)
+#define SYSCTRL_OSC8M_PRESC(value)  ((SYSCTRL_OSC8M_PRESC_Msk & ((value) << SYSCTRL_OSC8M_PRESC_Pos)))
+#define   SYSCTRL_OSC8M_PRESC_0_Val       0x0u   /**< \brief (SYSCTRL_OSC8M) 1 */
+#define   SYSCTRL_OSC8M_PRESC_1_Val       0x1u   /**< \brief (SYSCTRL_OSC8M) 2 */
+#define   SYSCTRL_OSC8M_PRESC_2_Val       0x2u   /**< \brief (SYSCTRL_OSC8M) 4 */
+#define   SYSCTRL_OSC8M_PRESC_3_Val       0x3u   /**< \brief (SYSCTRL_OSC8M) 8 */
+#define SYSCTRL_OSC8M_PRESC_0       (SYSCTRL_OSC8M_PRESC_0_Val     << SYSCTRL_OSC8M_PRESC_Pos)
+#define SYSCTRL_OSC8M_PRESC_1       (SYSCTRL_OSC8M_PRESC_1_Val     << SYSCTRL_OSC8M_PRESC_Pos)
+#define SYSCTRL_OSC8M_PRESC_2       (SYSCTRL_OSC8M_PRESC_2_Val     << SYSCTRL_OSC8M_PRESC_Pos)
+#define SYSCTRL_OSC8M_PRESC_3       (SYSCTRL_OSC8M_PRESC_3_Val     << SYSCTRL_OSC8M_PRESC_Pos)
+#define SYSCTRL_OSC8M_CALIB_Pos     16           /**< \brief (SYSCTRL_OSC8M) Oscillator Calibration */
+#define SYSCTRL_OSC8M_CALIB_Msk     (0xFFFu << SYSCTRL_OSC8M_CALIB_Pos)
+#define SYSCTRL_OSC8M_CALIB(value)  ((SYSCTRL_OSC8M_CALIB_Msk & ((value) << SYSCTRL_OSC8M_CALIB_Pos)))
+#define SYSCTRL_OSC8M_FRANGE_Pos    30           /**< \brief (SYSCTRL_OSC8M) Oscillator Frequency Range */
+#define SYSCTRL_OSC8M_FRANGE_Msk    (0x3u << SYSCTRL_OSC8M_FRANGE_Pos)
+#define SYSCTRL_OSC8M_FRANGE(value) ((SYSCTRL_OSC8M_FRANGE_Msk & ((value) << SYSCTRL_OSC8M_FRANGE_Pos)))
+#define   SYSCTRL_OSC8M_FRANGE_0_Val      0x0u   /**< \brief (SYSCTRL_OSC8M) 4 to 6MHz */
+#define   SYSCTRL_OSC8M_FRANGE_1_Val      0x1u   /**< \brief (SYSCTRL_OSC8M) 6 to 8MHz */
+#define   SYSCTRL_OSC8M_FRANGE_2_Val      0x2u   /**< \brief (SYSCTRL_OSC8M) 8 to 11MHz */
+#define   SYSCTRL_OSC8M_FRANGE_3_Val      0x3u   /**< \brief (SYSCTRL_OSC8M) 11 to 15MHz */
+#define SYSCTRL_OSC8M_FRANGE_0      (SYSCTRL_OSC8M_FRANGE_0_Val    << SYSCTRL_OSC8M_FRANGE_Pos)
+#define SYSCTRL_OSC8M_FRANGE_1      (SYSCTRL_OSC8M_FRANGE_1_Val    << SYSCTRL_OSC8M_FRANGE_Pos)
+#define SYSCTRL_OSC8M_FRANGE_2      (SYSCTRL_OSC8M_FRANGE_2_Val    << SYSCTRL_OSC8M_FRANGE_Pos)
+#define SYSCTRL_OSC8M_FRANGE_3      (SYSCTRL_OSC8M_FRANGE_3_Val    << SYSCTRL_OSC8M_FRANGE_Pos)
+#define SYSCTRL_OSC8M_MASK          0xCFFF03C2u  /**< \brief (SYSCTRL_OSC8M) MASK Register */
+
+/* -------- SYSCTRL_DFLLCTRL : (SYSCTRL Offset: 0x24) (R/W 16) DFLL48M Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t :1;               /*!< bit:      0  Reserved                           */
+    uint16_t ENABLE:1;         /*!< bit:      1  DFLL Enable                        */
+    uint16_t MODE:1;           /*!< bit:      2  Operating Mode Selection           */
+    uint16_t STABLE:1;         /*!< bit:      3  Stable DFLL Frequency              */
+    uint16_t LLAW:1;           /*!< bit:      4  Lose Lock After Wake               */
+    uint16_t USBCRM:1;         /*!< bit:      5  USB Clock Recovery Mode            */
+    uint16_t RUNSTDBY:1;       /*!< bit:      6  Run in Standby                     */
+    uint16_t ONDEMAND:1;       /*!< bit:      7  On Demand Control                  */
+    uint16_t CCDIS:1;          /*!< bit:      8  Chill Cycle Disable                */
+    uint16_t QLDIS:1;          /*!< bit:      9  Quick Lock Disable                 */
+    uint16_t BPLCKC:1;         /*!< bit:     10  Bypass Coarse Lock                 */
+    uint16_t WAITLOCK:1;       /*!< bit:     11  Wait Lock                          */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_DFLLCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_DFLLCTRL_OFFSET     0x24         /**< \brief (SYSCTRL_DFLLCTRL offset) DFLL48M Control */
+#define SYSCTRL_DFLLCTRL_RESETVALUE 0x0080       /**< \brief (SYSCTRL_DFLLCTRL reset_value) DFLL48M Control */
+
+#define SYSCTRL_DFLLCTRL_ENABLE_Pos 1            /**< \brief (SYSCTRL_DFLLCTRL) DFLL Enable */
+#define SYSCTRL_DFLLCTRL_ENABLE     (0x1u << SYSCTRL_DFLLCTRL_ENABLE_Pos)
+#define SYSCTRL_DFLLCTRL_MODE_Pos   2            /**< \brief (SYSCTRL_DFLLCTRL) Operating Mode Selection */
+#define SYSCTRL_DFLLCTRL_MODE       (0x1u << SYSCTRL_DFLLCTRL_MODE_Pos)
+#define SYSCTRL_DFLLCTRL_STABLE_Pos 3            /**< \brief (SYSCTRL_DFLLCTRL) Stable DFLL Frequency */
+#define SYSCTRL_DFLLCTRL_STABLE     (0x1u << SYSCTRL_DFLLCTRL_STABLE_Pos)
+#define SYSCTRL_DFLLCTRL_LLAW_Pos   4            /**< \brief (SYSCTRL_DFLLCTRL) Lose Lock After Wake */
+#define SYSCTRL_DFLLCTRL_LLAW       (0x1u << SYSCTRL_DFLLCTRL_LLAW_Pos)
+#define SYSCTRL_DFLLCTRL_USBCRM_Pos 5            /**< \brief (SYSCTRL_DFLLCTRL) USB Clock Recovery Mode */
+#define SYSCTRL_DFLLCTRL_USBCRM     (0x1u << SYSCTRL_DFLLCTRL_USBCRM_Pos)
+#define SYSCTRL_DFLLCTRL_RUNSTDBY_Pos 6            /**< \brief (SYSCTRL_DFLLCTRL) Run in Standby */
+#define SYSCTRL_DFLLCTRL_RUNSTDBY   (0x1u << SYSCTRL_DFLLCTRL_RUNSTDBY_Pos)
+#define SYSCTRL_DFLLCTRL_ONDEMAND_Pos 7            /**< \brief (SYSCTRL_DFLLCTRL) On Demand Control */
+#define SYSCTRL_DFLLCTRL_ONDEMAND   (0x1u << SYSCTRL_DFLLCTRL_ONDEMAND_Pos)
+#define SYSCTRL_DFLLCTRL_CCDIS_Pos  8            /**< \brief (SYSCTRL_DFLLCTRL) Chill Cycle Disable */
+#define SYSCTRL_DFLLCTRL_CCDIS      (0x1u << SYSCTRL_DFLLCTRL_CCDIS_Pos)
+#define SYSCTRL_DFLLCTRL_QLDIS_Pos  9            /**< \brief (SYSCTRL_DFLLCTRL) Quick Lock Disable */
+#define SYSCTRL_DFLLCTRL_QLDIS      (0x1u << SYSCTRL_DFLLCTRL_QLDIS_Pos)
+#define SYSCTRL_DFLLCTRL_BPLCKC_Pos 10           /**< \brief (SYSCTRL_DFLLCTRL) Bypass Coarse Lock */
+#define SYSCTRL_DFLLCTRL_BPLCKC     (0x1u << SYSCTRL_DFLLCTRL_BPLCKC_Pos)
+#define SYSCTRL_DFLLCTRL_WAITLOCK_Pos 11           /**< \brief (SYSCTRL_DFLLCTRL) Wait Lock */
+#define SYSCTRL_DFLLCTRL_WAITLOCK   (0x1u << SYSCTRL_DFLLCTRL_WAITLOCK_Pos)
+#define SYSCTRL_DFLLCTRL_MASK       0x0FFEu      /**< \brief (SYSCTRL_DFLLCTRL) MASK Register */
+
+/* -------- SYSCTRL_DFLLVAL : (SYSCTRL Offset: 0x28) (R/W 32) DFLL48M Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t FINE:10;          /*!< bit:  0.. 9  Fine Value                         */
+    uint32_t COARSE:6;         /*!< bit: 10..15  Coarse Value                       */
+    uint32_t DIFF:16;          /*!< bit: 16..31  Multiplication Ratio Difference    */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_DFLLVAL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_DFLLVAL_OFFSET      0x28         /**< \brief (SYSCTRL_DFLLVAL offset) DFLL48M Value */
+#define SYSCTRL_DFLLVAL_RESETVALUE  0x00000000   /**< \brief (SYSCTRL_DFLLVAL reset_value) DFLL48M Value */
+
+#define SYSCTRL_DFLLVAL_FINE_Pos    0            /**< \brief (SYSCTRL_DFLLVAL) Fine Value */
+#define SYSCTRL_DFLLVAL_FINE_Msk    (0x3FFu << SYSCTRL_DFLLVAL_FINE_Pos)
+#define SYSCTRL_DFLLVAL_FINE(value) ((SYSCTRL_DFLLVAL_FINE_Msk & ((value) << SYSCTRL_DFLLVAL_FINE_Pos)))
+#define SYSCTRL_DFLLVAL_COARSE_Pos  10           /**< \brief (SYSCTRL_DFLLVAL) Coarse Value */
+#define SYSCTRL_DFLLVAL_COARSE_Msk  (0x3Fu << SYSCTRL_DFLLVAL_COARSE_Pos)
+#define SYSCTRL_DFLLVAL_COARSE(value) ((SYSCTRL_DFLLVAL_COARSE_Msk & ((value) << SYSCTRL_DFLLVAL_COARSE_Pos)))
+#define SYSCTRL_DFLLVAL_DIFF_Pos    16           /**< \brief (SYSCTRL_DFLLVAL) Multiplication Ratio Difference */
+#define SYSCTRL_DFLLVAL_DIFF_Msk    (0xFFFFu << SYSCTRL_DFLLVAL_DIFF_Pos)
+#define SYSCTRL_DFLLVAL_DIFF(value) ((SYSCTRL_DFLLVAL_DIFF_Msk & ((value) << SYSCTRL_DFLLVAL_DIFF_Pos)))
+#define SYSCTRL_DFLLVAL_MASK        0xFFFFFFFFu  /**< \brief (SYSCTRL_DFLLVAL) MASK Register */
+
+/* -------- SYSCTRL_DFLLMUL : (SYSCTRL Offset: 0x2C) (R/W 32) DFLL48M Multiplier -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t MUL:16;           /*!< bit:  0..15  DFLL Multiply Factor               */
+    uint32_t FSTEP:10;         /*!< bit: 16..25  Fine Maximum Step                  */
+    uint32_t CSTEP:6;          /*!< bit: 26..31  Coarse Maximum Step                */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_DFLLMUL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_DFLLMUL_OFFSET      0x2C         /**< \brief (SYSCTRL_DFLLMUL offset) DFLL48M Multiplier */
+#define SYSCTRL_DFLLMUL_RESETVALUE  0x00000000   /**< \brief (SYSCTRL_DFLLMUL reset_value) DFLL48M Multiplier */
+
+#define SYSCTRL_DFLLMUL_MUL_Pos     0            /**< \brief (SYSCTRL_DFLLMUL) DFLL Multiply Factor */
+#define SYSCTRL_DFLLMUL_MUL_Msk     (0xFFFFu << SYSCTRL_DFLLMUL_MUL_Pos)
+#define SYSCTRL_DFLLMUL_MUL(value)  ((SYSCTRL_DFLLMUL_MUL_Msk & ((value) << SYSCTRL_DFLLMUL_MUL_Pos)))
+#define SYSCTRL_DFLLMUL_FSTEP_Pos   16           /**< \brief (SYSCTRL_DFLLMUL) Fine Maximum Step */
+#define SYSCTRL_DFLLMUL_FSTEP_Msk   (0x3FFu << SYSCTRL_DFLLMUL_FSTEP_Pos)
+#define SYSCTRL_DFLLMUL_FSTEP(value) ((SYSCTRL_DFLLMUL_FSTEP_Msk & ((value) << SYSCTRL_DFLLMUL_FSTEP_Pos)))
+#define SYSCTRL_DFLLMUL_CSTEP_Pos   26           /**< \brief (SYSCTRL_DFLLMUL) Coarse Maximum Step */
+#define SYSCTRL_DFLLMUL_CSTEP_Msk   (0x3Fu << SYSCTRL_DFLLMUL_CSTEP_Pos)
+#define SYSCTRL_DFLLMUL_CSTEP(value) ((SYSCTRL_DFLLMUL_CSTEP_Msk & ((value) << SYSCTRL_DFLLMUL_CSTEP_Pos)))
+#define SYSCTRL_DFLLMUL_MASK        0xFFFFFFFFu  /**< \brief (SYSCTRL_DFLLMUL) MASK Register */
+
+/* -------- SYSCTRL_DFLLSYNC : (SYSCTRL Offset: 0x30) (R/W  8) DFLL48M Synchronization -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :7;               /*!< bit:  0.. 6  Reserved                           */
+    uint8_t  READREQ:1;        /*!< bit:      7  Read Request                       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SYSCTRL_DFLLSYNC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_DFLLSYNC_OFFSET     0x30         /**< \brief (SYSCTRL_DFLLSYNC offset) DFLL48M Synchronization */
+#define SYSCTRL_DFLLSYNC_RESETVALUE 0x00         /**< \brief (SYSCTRL_DFLLSYNC reset_value) DFLL48M Synchronization */
+
+#define SYSCTRL_DFLLSYNC_READREQ_Pos 7            /**< \brief (SYSCTRL_DFLLSYNC) Read Request */
+#define SYSCTRL_DFLLSYNC_READREQ    (0x1u << SYSCTRL_DFLLSYNC_READREQ_Pos)
+#define SYSCTRL_DFLLSYNC_MASK       0x80u        /**< \brief (SYSCTRL_DFLLSYNC) MASK Register */
+
+/* -------- SYSCTRL_BOD33 : (SYSCTRL Offset: 0x34) (R/W 32) 3.3V Brown-Out Detector (BOD33) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :1;               /*!< bit:      0  Reserved                           */
+    uint32_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint32_t HYST:1;           /*!< bit:      2  Hysteresis                         */
+    uint32_t ACTION:2;         /*!< bit:  3.. 4  BOD33 Action                       */
+    uint32_t :1;               /*!< bit:      5  Reserved                           */
+    uint32_t RUNSTDBY:1;       /*!< bit:      6  Run in Standby                     */
+    uint32_t :1;               /*!< bit:      7  Reserved                           */
+    uint32_t MODE:1;           /*!< bit:      8  Operation Mode                     */
+    uint32_t CEN:1;            /*!< bit:      9  Clock Enable                       */
+    uint32_t :2;               /*!< bit: 10..11  Reserved                           */
+    uint32_t PSEL:4;           /*!< bit: 12..15  Prescaler Select                   */
+    uint32_t LEVEL:6;          /*!< bit: 16..21  BOD33 Threshold Level              */
+    uint32_t :10;              /*!< bit: 22..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_BOD33_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_BOD33_OFFSET        0x34         /**< \brief (SYSCTRL_BOD33 offset) 3.3V Brown-Out Detector (BOD33) Control */
+#define SYSCTRL_BOD33_RESETVALUE    0x00000000   /**< \brief (SYSCTRL_BOD33 reset_value) 3.3V Brown-Out Detector (BOD33) Control */
+
+#define SYSCTRL_BOD33_ENABLE_Pos    1            /**< \brief (SYSCTRL_BOD33) Enable */
+#define SYSCTRL_BOD33_ENABLE        (0x1u << SYSCTRL_BOD33_ENABLE_Pos)
+#define SYSCTRL_BOD33_HYST_Pos      2            /**< \brief (SYSCTRL_BOD33) Hysteresis */
+#define SYSCTRL_BOD33_HYST          (0x1u << SYSCTRL_BOD33_HYST_Pos)
+#define SYSCTRL_BOD33_ACTION_Pos    3            /**< \brief (SYSCTRL_BOD33) BOD33 Action */
+#define SYSCTRL_BOD33_ACTION_Msk    (0x3u << SYSCTRL_BOD33_ACTION_Pos)
+#define SYSCTRL_BOD33_ACTION(value) ((SYSCTRL_BOD33_ACTION_Msk & ((value) << SYSCTRL_BOD33_ACTION_Pos)))
+#define   SYSCTRL_BOD33_ACTION_NONE_Val   0x0u   /**< \brief (SYSCTRL_BOD33) No action */
+#define   SYSCTRL_BOD33_ACTION_RESET_Val  0x1u   /**< \brief (SYSCTRL_BOD33) The BOD33 generates a reset */
+#define   SYSCTRL_BOD33_ACTION_INTERRUPT_Val 0x2u   /**< \brief (SYSCTRL_BOD33) The BOD33 generates an interrupt */
+#define SYSCTRL_BOD33_ACTION_NONE   (SYSCTRL_BOD33_ACTION_NONE_Val << SYSCTRL_BOD33_ACTION_Pos)
+#define SYSCTRL_BOD33_ACTION_RESET  (SYSCTRL_BOD33_ACTION_RESET_Val << SYSCTRL_BOD33_ACTION_Pos)
+#define SYSCTRL_BOD33_ACTION_INTERRUPT (SYSCTRL_BOD33_ACTION_INTERRUPT_Val << SYSCTRL_BOD33_ACTION_Pos)
+#define SYSCTRL_BOD33_RUNSTDBY_Pos  6            /**< \brief (SYSCTRL_BOD33) Run in Standby */
+#define SYSCTRL_BOD33_RUNSTDBY      (0x1u << SYSCTRL_BOD33_RUNSTDBY_Pos)
+#define SYSCTRL_BOD33_MODE_Pos      8            /**< \brief (SYSCTRL_BOD33) Operation Mode */
+#define SYSCTRL_BOD33_MODE          (0x1u << SYSCTRL_BOD33_MODE_Pos)
+#define SYSCTRL_BOD33_CEN_Pos       9            /**< \brief (SYSCTRL_BOD33) Clock Enable */
+#define SYSCTRL_BOD33_CEN           (0x1u << SYSCTRL_BOD33_CEN_Pos)
+#define SYSCTRL_BOD33_PSEL_Pos      12           /**< \brief (SYSCTRL_BOD33) Prescaler Select */
+#define SYSCTRL_BOD33_PSEL_Msk      (0xFu << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL(value)   ((SYSCTRL_BOD33_PSEL_Msk & ((value) << SYSCTRL_BOD33_PSEL_Pos)))
+#define   SYSCTRL_BOD33_PSEL_DIV2_Val     0x0u   /**< \brief (SYSCTRL_BOD33) Divide clock by 2 */
+#define   SYSCTRL_BOD33_PSEL_DIV4_Val     0x1u   /**< \brief (SYSCTRL_BOD33) Divide clock by 4 */
+#define   SYSCTRL_BOD33_PSEL_DIV8_Val     0x2u   /**< \brief (SYSCTRL_BOD33) Divide clock by 8 */
+#define   SYSCTRL_BOD33_PSEL_DIV16_Val    0x3u   /**< \brief (SYSCTRL_BOD33) Divide clock by 16 */
+#define   SYSCTRL_BOD33_PSEL_DIV32_Val    0x4u   /**< \brief (SYSCTRL_BOD33) Divide clock by 32 */
+#define   SYSCTRL_BOD33_PSEL_DIV64_Val    0x5u   /**< \brief (SYSCTRL_BOD33) Divide clock by 64 */
+#define   SYSCTRL_BOD33_PSEL_DIV128_Val   0x6u   /**< \brief (SYSCTRL_BOD33) Divide clock by 128 */
+#define   SYSCTRL_BOD33_PSEL_DIV256_Val   0x7u   /**< \brief (SYSCTRL_BOD33) Divide clock by 256 */
+#define   SYSCTRL_BOD33_PSEL_DIV512_Val   0x8u   /**< \brief (SYSCTRL_BOD33) Divide clock by 512 */
+#define   SYSCTRL_BOD33_PSEL_DIV1K_Val    0x9u   /**< \brief (SYSCTRL_BOD33) Divide clock by 1024 */
+#define   SYSCTRL_BOD33_PSEL_DIV2K_Val    0xAu   /**< \brief (SYSCTRL_BOD33) Divide clock by 2048 */
+#define   SYSCTRL_BOD33_PSEL_DIV4K_Val    0xBu   /**< \brief (SYSCTRL_BOD33) Divide clock by 4096 */
+#define   SYSCTRL_BOD33_PSEL_DIV8K_Val    0xCu   /**< \brief (SYSCTRL_BOD33) Divide clock by 8192 */
+#define   SYSCTRL_BOD33_PSEL_DIV16K_Val   0xDu   /**< \brief (SYSCTRL_BOD33) Divide clock by 16384 */
+#define   SYSCTRL_BOD33_PSEL_DIV32K_Val   0xEu   /**< \brief (SYSCTRL_BOD33) Divide clock by 32768 */
+#define   SYSCTRL_BOD33_PSEL_DIV64K_Val   0xFu   /**< \brief (SYSCTRL_BOD33) Divide clock by 65536 */
+#define SYSCTRL_BOD33_PSEL_DIV2     (SYSCTRL_BOD33_PSEL_DIV2_Val   << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV4     (SYSCTRL_BOD33_PSEL_DIV4_Val   << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV8     (SYSCTRL_BOD33_PSEL_DIV8_Val   << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV16    (SYSCTRL_BOD33_PSEL_DIV16_Val  << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV32    (SYSCTRL_BOD33_PSEL_DIV32_Val  << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV64    (SYSCTRL_BOD33_PSEL_DIV64_Val  << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV128   (SYSCTRL_BOD33_PSEL_DIV128_Val << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV256   (SYSCTRL_BOD33_PSEL_DIV256_Val << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV512   (SYSCTRL_BOD33_PSEL_DIV512_Val << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV1K    (SYSCTRL_BOD33_PSEL_DIV1K_Val  << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV2K    (SYSCTRL_BOD33_PSEL_DIV2K_Val  << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV4K    (SYSCTRL_BOD33_PSEL_DIV4K_Val  << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV8K    (SYSCTRL_BOD33_PSEL_DIV8K_Val  << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV16K   (SYSCTRL_BOD33_PSEL_DIV16K_Val << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV32K   (SYSCTRL_BOD33_PSEL_DIV32K_Val << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_PSEL_DIV64K   (SYSCTRL_BOD33_PSEL_DIV64K_Val << SYSCTRL_BOD33_PSEL_Pos)
+#define SYSCTRL_BOD33_LEVEL_Pos     16           /**< \brief (SYSCTRL_BOD33) BOD33 Threshold Level */
+#define SYSCTRL_BOD33_LEVEL_Msk     (0x3Fu << SYSCTRL_BOD33_LEVEL_Pos)
+#define SYSCTRL_BOD33_LEVEL(value)  ((SYSCTRL_BOD33_LEVEL_Msk & ((value) << SYSCTRL_BOD33_LEVEL_Pos)))
+#define SYSCTRL_BOD33_MASK          0x003FF35Eu  /**< \brief (SYSCTRL_BOD33) MASK Register */
+
+/* -------- SYSCTRL_VREG : (SYSCTRL Offset: 0x3C) (R/W 16) Voltage Regulator System (VREG) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t :6;               /*!< bit:  0.. 5  Reserved                           */
+    uint16_t RUNSTDBY:1;       /*!< bit:      6  Run in Standby                     */
+    uint16_t :9;               /*!< bit:  7..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_VREG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_VREG_OFFSET         0x3C         /**< \brief (SYSCTRL_VREG offset) Voltage Regulator System (VREG) Control */
+#define SYSCTRL_VREG_RESETVALUE     0x0000       /**< \brief (SYSCTRL_VREG reset_value) Voltage Regulator System (VREG) Control */
+
+#define SYSCTRL_VREG_RUNSTDBY_Pos   6            /**< \brief (SYSCTRL_VREG) Run in Standby */
+#define SYSCTRL_VREG_RUNSTDBY       (0x1u << SYSCTRL_VREG_RUNSTDBY_Pos)
+#define SYSCTRL_VREG_MASK           0x0040u      /**< \brief (SYSCTRL_VREG) MASK Register */
+
+/* -------- SYSCTRL_VREF : (SYSCTRL Offset: 0x40) (R/W 32) Voltage References System (VREF) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t :1;               /*!< bit:      0  Reserved                           */
+    uint32_t TSEN:1;           /*!< bit:      1  Temperature Sensor Enable          */
+    uint32_t BGOUTEN:1;        /*!< bit:      2  Bandgap Output Enable              */
+    uint32_t :13;              /*!< bit:  3..15  Reserved                           */
+    uint32_t CALIB:11;         /*!< bit: 16..26  Bandgap Voltage Generator Calibration */
+    uint32_t :5;               /*!< bit: 27..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_VREF_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_VREF_OFFSET         0x40         /**< \brief (SYSCTRL_VREF offset) Voltage References System (VREF) Control */
+#define SYSCTRL_VREF_RESETVALUE     0x00000000   /**< \brief (SYSCTRL_VREF reset_value) Voltage References System (VREF) Control */
+
+#define SYSCTRL_VREF_TSEN_Pos       1            /**< \brief (SYSCTRL_VREF) Temperature Sensor Enable */
+#define SYSCTRL_VREF_TSEN           (0x1u << SYSCTRL_VREF_TSEN_Pos)
+#define SYSCTRL_VREF_BGOUTEN_Pos    2            /**< \brief (SYSCTRL_VREF) Bandgap Output Enable */
+#define SYSCTRL_VREF_BGOUTEN        (0x1u << SYSCTRL_VREF_BGOUTEN_Pos)
+#define SYSCTRL_VREF_CALIB_Pos      16           /**< \brief (SYSCTRL_VREF) Bandgap Voltage Generator Calibration */
+#define SYSCTRL_VREF_CALIB_Msk      (0x7FFu << SYSCTRL_VREF_CALIB_Pos)
+#define SYSCTRL_VREF_CALIB(value)   ((SYSCTRL_VREF_CALIB_Msk & ((value) << SYSCTRL_VREF_CALIB_Pos)))
+#define SYSCTRL_VREF_MASK           0x07FF0006u  /**< \brief (SYSCTRL_VREF) MASK Register */
+
+/* -------- SYSCTRL_DPLLCTRLA : (SYSCTRL Offset: 0x44) (R/W  8) DPLL Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :1;               /*!< bit:      0  Reserved                           */
+    uint8_t  ENABLE:1;         /*!< bit:      1  DPLL Enable                        */
+    uint8_t  :4;               /*!< bit:  2.. 5  Reserved                           */
+    uint8_t  RUNSTDBY:1;       /*!< bit:      6  Run in Standby                     */
+    uint8_t  ONDEMAND:1;       /*!< bit:      7  On Demand Clock Activation         */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SYSCTRL_DPLLCTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_DPLLCTRLA_OFFSET    0x44         /**< \brief (SYSCTRL_DPLLCTRLA offset) DPLL Control A */
+#define SYSCTRL_DPLLCTRLA_RESETVALUE 0x80         /**< \brief (SYSCTRL_DPLLCTRLA reset_value) DPLL Control A */
+
+#define SYSCTRL_DPLLCTRLA_ENABLE_Pos 1            /**< \brief (SYSCTRL_DPLLCTRLA) DPLL Enable */
+#define SYSCTRL_DPLLCTRLA_ENABLE    (0x1u << SYSCTRL_DPLLCTRLA_ENABLE_Pos)
+#define SYSCTRL_DPLLCTRLA_RUNSTDBY_Pos 6            /**< \brief (SYSCTRL_DPLLCTRLA) Run in Standby */
+#define SYSCTRL_DPLLCTRLA_RUNSTDBY  (0x1u << SYSCTRL_DPLLCTRLA_RUNSTDBY_Pos)
+#define SYSCTRL_DPLLCTRLA_ONDEMAND_Pos 7            /**< \brief (SYSCTRL_DPLLCTRLA) On Demand Clock Activation */
+#define SYSCTRL_DPLLCTRLA_ONDEMAND  (0x1u << SYSCTRL_DPLLCTRLA_ONDEMAND_Pos)
+#define SYSCTRL_DPLLCTRLA_MASK      0xC2u        /**< \brief (SYSCTRL_DPLLCTRLA) MASK Register */
+
+/* -------- SYSCTRL_DPLLRATIO : (SYSCTRL Offset: 0x48) (R/W 32) DPLL Ratio Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t LDR:12;           /*!< bit:  0..11  Loop Divider Ratio                 */
+    uint32_t :4;               /*!< bit: 12..15  Reserved                           */
+    uint32_t LDRFRAC:4;        /*!< bit: 16..19  Loop Divider Ratio Fractional Part */
+    uint32_t :12;              /*!< bit: 20..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_DPLLRATIO_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_DPLLRATIO_OFFSET    0x48         /**< \brief (SYSCTRL_DPLLRATIO offset) DPLL Ratio Control */
+#define SYSCTRL_DPLLRATIO_RESETVALUE 0x00000000   /**< \brief (SYSCTRL_DPLLRATIO reset_value) DPLL Ratio Control */
+
+#define SYSCTRL_DPLLRATIO_LDR_Pos   0            /**< \brief (SYSCTRL_DPLLRATIO) Loop Divider Ratio */
+#define SYSCTRL_DPLLRATIO_LDR_Msk   (0xFFFu << SYSCTRL_DPLLRATIO_LDR_Pos)
+#define SYSCTRL_DPLLRATIO_LDR(value) ((SYSCTRL_DPLLRATIO_LDR_Msk & ((value) << SYSCTRL_DPLLRATIO_LDR_Pos)))
+#define SYSCTRL_DPLLRATIO_LDRFRAC_Pos 16           /**< \brief (SYSCTRL_DPLLRATIO) Loop Divider Ratio Fractional Part */
+#define SYSCTRL_DPLLRATIO_LDRFRAC_Msk (0xFu << SYSCTRL_DPLLRATIO_LDRFRAC_Pos)
+#define SYSCTRL_DPLLRATIO_LDRFRAC(value) ((SYSCTRL_DPLLRATIO_LDRFRAC_Msk & ((value) << SYSCTRL_DPLLRATIO_LDRFRAC_Pos)))
+#define SYSCTRL_DPLLRATIO_MASK      0x000F0FFFu  /**< \brief (SYSCTRL_DPLLRATIO) MASK Register */
+
+/* -------- SYSCTRL_DPLLCTRLB : (SYSCTRL Offset: 0x4C) (R/W 32) DPLL Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t FILTER:2;         /*!< bit:  0.. 1  Proportional Integral Filter Selection */
+    uint32_t LPEN:1;           /*!< bit:      2  Low-Power Enable                   */
+    uint32_t WUF:1;            /*!< bit:      3  Wake Up Fast                       */
+    uint32_t REFCLK:2;         /*!< bit:  4.. 5  Reference Clock Selection          */
+    uint32_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint32_t LTIME:3;          /*!< bit:  8..10  Lock Time                          */
+    uint32_t :1;               /*!< bit:     11  Reserved                           */
+    uint32_t LBYPASS:1;        /*!< bit:     12  Lock Bypass                        */
+    uint32_t :3;               /*!< bit: 13..15  Reserved                           */
+    uint32_t DIV:11;           /*!< bit: 16..26  Clock Divider                      */
+    uint32_t :5;               /*!< bit: 27..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} SYSCTRL_DPLLCTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_DPLLCTRLB_OFFSET    0x4C         /**< \brief (SYSCTRL_DPLLCTRLB offset) DPLL Control B */
+#define SYSCTRL_DPLLCTRLB_RESETVALUE 0x00000000   /**< \brief (SYSCTRL_DPLLCTRLB reset_value) DPLL Control B */
+
+#define SYSCTRL_DPLLCTRLB_FILTER_Pos 0            /**< \brief (SYSCTRL_DPLLCTRLB) Proportional Integral Filter Selection */
+#define SYSCTRL_DPLLCTRLB_FILTER_Msk (0x3u << SYSCTRL_DPLLCTRLB_FILTER_Pos)
+#define SYSCTRL_DPLLCTRLB_FILTER(value) ((SYSCTRL_DPLLCTRLB_FILTER_Msk & ((value) << SYSCTRL_DPLLCTRLB_FILTER_Pos)))
+#define   SYSCTRL_DPLLCTRLB_FILTER_DEFAULT_Val 0x0u   /**< \brief (SYSCTRL_DPLLCTRLB) Default filter mode */
+#define   SYSCTRL_DPLLCTRLB_FILTER_LBFILT_Val 0x1u   /**< \brief (SYSCTRL_DPLLCTRLB) Low bandwidth filter */
+#define   SYSCTRL_DPLLCTRLB_FILTER_HBFILT_Val 0x2u   /**< \brief (SYSCTRL_DPLLCTRLB) High bandwidth filter */
+#define   SYSCTRL_DPLLCTRLB_FILTER_HDFILT_Val 0x3u   /**< \brief (SYSCTRL_DPLLCTRLB) High damping filter */
+#define SYSCTRL_DPLLCTRLB_FILTER_DEFAULT (SYSCTRL_DPLLCTRLB_FILTER_DEFAULT_Val << SYSCTRL_DPLLCTRLB_FILTER_Pos)
+#define SYSCTRL_DPLLCTRLB_FILTER_LBFILT (SYSCTRL_DPLLCTRLB_FILTER_LBFILT_Val << SYSCTRL_DPLLCTRLB_FILTER_Pos)
+#define SYSCTRL_DPLLCTRLB_FILTER_HBFILT (SYSCTRL_DPLLCTRLB_FILTER_HBFILT_Val << SYSCTRL_DPLLCTRLB_FILTER_Pos)
+#define SYSCTRL_DPLLCTRLB_FILTER_HDFILT (SYSCTRL_DPLLCTRLB_FILTER_HDFILT_Val << SYSCTRL_DPLLCTRLB_FILTER_Pos)
+#define SYSCTRL_DPLLCTRLB_LPEN_Pos  2            /**< \brief (SYSCTRL_DPLLCTRLB) Low-Power Enable */
+#define SYSCTRL_DPLLCTRLB_LPEN      (0x1u << SYSCTRL_DPLLCTRLB_LPEN_Pos)
+#define SYSCTRL_DPLLCTRLB_WUF_Pos   3            /**< \brief (SYSCTRL_DPLLCTRLB) Wake Up Fast */
+#define SYSCTRL_DPLLCTRLB_WUF       (0x1u << SYSCTRL_DPLLCTRLB_WUF_Pos)
+#define SYSCTRL_DPLLCTRLB_REFCLK_Pos 4            /**< \brief (SYSCTRL_DPLLCTRLB) Reference Clock Selection */
+#define SYSCTRL_DPLLCTRLB_REFCLK_Msk (0x3u << SYSCTRL_DPLLCTRLB_REFCLK_Pos)
+#define SYSCTRL_DPLLCTRLB_REFCLK(value) ((SYSCTRL_DPLLCTRLB_REFCLK_Msk & ((value) << SYSCTRL_DPLLCTRLB_REFCLK_Pos)))
+#define   SYSCTRL_DPLLCTRLB_REFCLK_REF0_Val 0x0u   /**< \brief (SYSCTRL_DPLLCTRLB) CLK_DPLL_REF0 clock reference */
+#define   SYSCTRL_DPLLCTRLB_REFCLK_REF1_Val 0x1u   /**< \brief (SYSCTRL_DPLLCTRLB) CLK_DPLL_REF1 clock reference */
+#define   SYSCTRL_DPLLCTRLB_REFCLK_GCLK_Val 0x2u   /**< \brief (SYSCTRL_DPLLCTRLB) GCLK_DPLL clock reference */
+#define SYSCTRL_DPLLCTRLB_REFCLK_REF0 (SYSCTRL_DPLLCTRLB_REFCLK_REF0_Val << SYSCTRL_DPLLCTRLB_REFCLK_Pos)
+#define SYSCTRL_DPLLCTRLB_REFCLK_REF1 (SYSCTRL_DPLLCTRLB_REFCLK_REF1_Val << SYSCTRL_DPLLCTRLB_REFCLK_Pos)
+#define SYSCTRL_DPLLCTRLB_REFCLK_GCLK (SYSCTRL_DPLLCTRLB_REFCLK_GCLK_Val << SYSCTRL_DPLLCTRLB_REFCLK_Pos)
+#define SYSCTRL_DPLLCTRLB_LTIME_Pos 8            /**< \brief (SYSCTRL_DPLLCTRLB) Lock Time */
+#define SYSCTRL_DPLLCTRLB_LTIME_Msk (0x7u << SYSCTRL_DPLLCTRLB_LTIME_Pos)
+#define SYSCTRL_DPLLCTRLB_LTIME(value) ((SYSCTRL_DPLLCTRLB_LTIME_Msk & ((value) << SYSCTRL_DPLLCTRLB_LTIME_Pos)))
+#define   SYSCTRL_DPLLCTRLB_LTIME_DEFAULT_Val 0x0u   /**< \brief (SYSCTRL_DPLLCTRLB) No time-out */
+#define   SYSCTRL_DPLLCTRLB_LTIME_8MS_Val 0x4u   /**< \brief (SYSCTRL_DPLLCTRLB) Time-out if no lock within 8 ms */
+#define   SYSCTRL_DPLLCTRLB_LTIME_9MS_Val 0x5u   /**< \brief (SYSCTRL_DPLLCTRLB) Time-out if no lock within 9 ms */
+#define   SYSCTRL_DPLLCTRLB_LTIME_10MS_Val 0x6u   /**< \brief (SYSCTRL_DPLLCTRLB) Time-out if no lock within 10 ms */
+#define   SYSCTRL_DPLLCTRLB_LTIME_11MS_Val 0x7u   /**< \brief (SYSCTRL_DPLLCTRLB) Time-out if no lock within 11 ms */
+#define SYSCTRL_DPLLCTRLB_LTIME_DEFAULT (SYSCTRL_DPLLCTRLB_LTIME_DEFAULT_Val << SYSCTRL_DPLLCTRLB_LTIME_Pos)
+#define SYSCTRL_DPLLCTRLB_LTIME_8MS (SYSCTRL_DPLLCTRLB_LTIME_8MS_Val << SYSCTRL_DPLLCTRLB_LTIME_Pos)
+#define SYSCTRL_DPLLCTRLB_LTIME_9MS (SYSCTRL_DPLLCTRLB_LTIME_9MS_Val << SYSCTRL_DPLLCTRLB_LTIME_Pos)
+#define SYSCTRL_DPLLCTRLB_LTIME_10MS (SYSCTRL_DPLLCTRLB_LTIME_10MS_Val << SYSCTRL_DPLLCTRLB_LTIME_Pos)
+#define SYSCTRL_DPLLCTRLB_LTIME_11MS (SYSCTRL_DPLLCTRLB_LTIME_11MS_Val << SYSCTRL_DPLLCTRLB_LTIME_Pos)
+#define SYSCTRL_DPLLCTRLB_LBYPASS_Pos 12           /**< \brief (SYSCTRL_DPLLCTRLB) Lock Bypass */
+#define SYSCTRL_DPLLCTRLB_LBYPASS   (0x1u << SYSCTRL_DPLLCTRLB_LBYPASS_Pos)
+#define SYSCTRL_DPLLCTRLB_DIV_Pos   16           /**< \brief (SYSCTRL_DPLLCTRLB) Clock Divider */
+#define SYSCTRL_DPLLCTRLB_DIV_Msk   (0x7FFu << SYSCTRL_DPLLCTRLB_DIV_Pos)
+#define SYSCTRL_DPLLCTRLB_DIV(value) ((SYSCTRL_DPLLCTRLB_DIV_Msk & ((value) << SYSCTRL_DPLLCTRLB_DIV_Pos)))
+#define SYSCTRL_DPLLCTRLB_MASK      0x07FF173Fu  /**< \brief (SYSCTRL_DPLLCTRLB) MASK Register */
+
+/* -------- SYSCTRL_DPLLSTATUS : (SYSCTRL Offset: 0x50) (R/   8) DPLL Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  LOCK:1;           /*!< bit:      0  DPLL Lock Status                   */
+    uint8_t  CLKRDY:1;         /*!< bit:      1  Output Clock Ready                 */
+    uint8_t  ENABLE:1;         /*!< bit:      2  DPLL Enable                        */
+    uint8_t  DIV:1;            /*!< bit:      3  Divider Enable                     */
+    uint8_t  :4;               /*!< bit:  4.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} SYSCTRL_DPLLSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define SYSCTRL_DPLLSTATUS_OFFSET   0x50         /**< \brief (SYSCTRL_DPLLSTATUS offset) DPLL Status */
+#define SYSCTRL_DPLLSTATUS_RESETVALUE 0x00         /**< \brief (SYSCTRL_DPLLSTATUS reset_value) DPLL Status */
+
+#define SYSCTRL_DPLLSTATUS_LOCK_Pos 0            /**< \brief (SYSCTRL_DPLLSTATUS) DPLL Lock Status */
+#define SYSCTRL_DPLLSTATUS_LOCK     (0x1u << SYSCTRL_DPLLSTATUS_LOCK_Pos)
+#define SYSCTRL_DPLLSTATUS_CLKRDY_Pos 1            /**< \brief (SYSCTRL_DPLLSTATUS) Output Clock Ready */
+#define SYSCTRL_DPLLSTATUS_CLKRDY   (0x1u << SYSCTRL_DPLLSTATUS_CLKRDY_Pos)
+#define SYSCTRL_DPLLSTATUS_ENABLE_Pos 2            /**< \brief (SYSCTRL_DPLLSTATUS) DPLL Enable */
+#define SYSCTRL_DPLLSTATUS_ENABLE   (0x1u << SYSCTRL_DPLLSTATUS_ENABLE_Pos)
+#define SYSCTRL_DPLLSTATUS_DIV_Pos  3            /**< \brief (SYSCTRL_DPLLSTATUS) Divider Enable */
+#define SYSCTRL_DPLLSTATUS_DIV      (0x1u << SYSCTRL_DPLLSTATUS_DIV_Pos)
+#define SYSCTRL_DPLLSTATUS_MASK     0x0Fu        /**< \brief (SYSCTRL_DPLLSTATUS) MASK Register */
+
+/** \brief SYSCTRL hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO SYSCTRL_INTENCLR_Type     INTENCLR;    /**< \brief Offset: 0x00 (R/W 32) Interrupt Enable Clear */
+  __IO SYSCTRL_INTENSET_Type     INTENSET;    /**< \brief Offset: 0x04 (R/W 32) Interrupt Enable Set */
+  __IO SYSCTRL_INTFLAG_Type      INTFLAG;     /**< \brief Offset: 0x08 (R/W 32) Interrupt Flag Status and Clear */
+  __I  SYSCTRL_PCLKSR_Type       PCLKSR;      /**< \brief Offset: 0x0C (R/  32) Power and Clocks Status */
+  __IO SYSCTRL_XOSC_Type         XOSC;        /**< \brief Offset: 0x10 (R/W 16) External Multipurpose Crystal Oscillator (XOSC) Control */
+       RoReg8                    Reserved1[0x2];
+  __IO SYSCTRL_XOSC32K_Type      XOSC32K;     /**< \brief Offset: 0x14 (R/W 16) 32kHz External Crystal Oscillator (XOSC32K) Control */
+       RoReg8                    Reserved2[0x2];
+  __IO SYSCTRL_OSC32K_Type       OSC32K;      /**< \brief Offset: 0x18 (R/W 32) 32kHz Internal Oscillator (OSC32K) Control */
+  __IO SYSCTRL_OSCULP32K_Type    OSCULP32K;   /**< \brief Offset: 0x1C (R/W  8) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */
+       RoReg8                    Reserved3[0x3];
+  __IO SYSCTRL_OSC8M_Type        OSC8M;       /**< \brief Offset: 0x20 (R/W 32) 8MHz Internal Oscillator (OSC8M) Control */
+  __IO SYSCTRL_DFLLCTRL_Type     DFLLCTRL;    /**< \brief Offset: 0x24 (R/W 16) DFLL48M Control */
+       RoReg8                    Reserved4[0x2];
+  __IO SYSCTRL_DFLLVAL_Type      DFLLVAL;     /**< \brief Offset: 0x28 (R/W 32) DFLL48M Value */
+  __IO SYSCTRL_DFLLMUL_Type      DFLLMUL;     /**< \brief Offset: 0x2C (R/W 32) DFLL48M Multiplier */
+  __IO SYSCTRL_DFLLSYNC_Type     DFLLSYNC;    /**< \brief Offset: 0x30 (R/W  8) DFLL48M Synchronization */
+       RoReg8                    Reserved5[0x3];
+  __IO SYSCTRL_BOD33_Type        BOD33;       /**< \brief Offset: 0x34 (R/W 32) 3.3V Brown-Out Detector (BOD33) Control */
+       RoReg8                    Reserved6[0x4];
+  __IO SYSCTRL_VREG_Type         VREG;        /**< \brief Offset: 0x3C (R/W 16) Voltage Regulator System (VREG) Control */
+       RoReg8                    Reserved7[0x2];
+  __IO SYSCTRL_VREF_Type         VREF;        /**< \brief Offset: 0x40 (R/W 32) Voltage References System (VREF) Control */
+  __IO SYSCTRL_DPLLCTRLA_Type    DPLLCTRLA;   /**< \brief Offset: 0x44 (R/W  8) DPLL Control A */
+       RoReg8                    Reserved8[0x3];
+  __IO SYSCTRL_DPLLRATIO_Type    DPLLRATIO;   /**< \brief Offset: 0x48 (R/W 32) DPLL Ratio Control */
+  __IO SYSCTRL_DPLLCTRLB_Type    DPLLCTRLB;   /**< \brief Offset: 0x4C (R/W 32) DPLL Control B */
+  __I  SYSCTRL_DPLLSTATUS_Type   DPLLSTATUS;  /**< \brief Offset: 0x50 (R/   8) DPLL Status */
+} Sysctrl;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_SYSCTRL_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/tc.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/tc.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/tc.h	(revision 136)
@@ -0,0 +1,684 @@
+/**
+ * \file
+ *
+ * \brief Component description for TC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TC_COMPONENT_
+#define _SAMD21_TC_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR TC */
+/* ========================================================================== */
+/** \addtogroup SAMD21_TC Basic Timer Counter */
+/*@{*/
+
+#define TC_U2212
+#define REV_TC                      0x121
+
+/* -------- TC_CTRLA : (TC Offset: 0x00) (R/W 16) Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint16_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint16_t MODE:2;           /*!< bit:  2.. 3  TC Mode                            */
+    uint16_t :1;               /*!< bit:      4  Reserved                           */
+    uint16_t WAVEGEN:2;        /*!< bit:  5.. 6  Waveform Generation Operation      */
+    uint16_t :1;               /*!< bit:      7  Reserved                           */
+    uint16_t PRESCALER:3;      /*!< bit:  8..10  Prescaler                          */
+    uint16_t RUNSTDBY:1;       /*!< bit:     11  Run in Standby                     */
+    uint16_t PRESCSYNC:2;      /*!< bit: 12..13  Prescaler and Counter Synchronization */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} TC_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_CTRLA_OFFSET             0x00         /**< \brief (TC_CTRLA offset) Control A */
+#define TC_CTRLA_RESETVALUE         0x0000       /**< \brief (TC_CTRLA reset_value) Control A */
+
+#define TC_CTRLA_SWRST_Pos          0            /**< \brief (TC_CTRLA) Software Reset */
+#define TC_CTRLA_SWRST              (0x1u << TC_CTRLA_SWRST_Pos)
+#define TC_CTRLA_ENABLE_Pos         1            /**< \brief (TC_CTRLA) Enable */
+#define TC_CTRLA_ENABLE             (0x1u << TC_CTRLA_ENABLE_Pos)
+#define TC_CTRLA_MODE_Pos           2            /**< \brief (TC_CTRLA) TC Mode */
+#define TC_CTRLA_MODE_Msk           (0x3u << TC_CTRLA_MODE_Pos)
+#define TC_CTRLA_MODE(value)        ((TC_CTRLA_MODE_Msk & ((value) << TC_CTRLA_MODE_Pos)))
+#define   TC_CTRLA_MODE_COUNT16_Val       0x0u   /**< \brief (TC_CTRLA) Counter in 16-bit mode */
+#define   TC_CTRLA_MODE_COUNT8_Val        0x1u   /**< \brief (TC_CTRLA) Counter in 8-bit mode */
+#define   TC_CTRLA_MODE_COUNT32_Val       0x2u   /**< \brief (TC_CTRLA) Counter in 32-bit mode */
+#define TC_CTRLA_MODE_COUNT16       (TC_CTRLA_MODE_COUNT16_Val     << TC_CTRLA_MODE_Pos)
+#define TC_CTRLA_MODE_COUNT8        (TC_CTRLA_MODE_COUNT8_Val      << TC_CTRLA_MODE_Pos)
+#define TC_CTRLA_MODE_COUNT32       (TC_CTRLA_MODE_COUNT32_Val     << TC_CTRLA_MODE_Pos)
+#define TC_CTRLA_WAVEGEN_Pos        5            /**< \brief (TC_CTRLA) Waveform Generation Operation */
+#define TC_CTRLA_WAVEGEN_Msk        (0x3u << TC_CTRLA_WAVEGEN_Pos)
+#define TC_CTRLA_WAVEGEN(value)     ((TC_CTRLA_WAVEGEN_Msk & ((value) << TC_CTRLA_WAVEGEN_Pos)))
+#define   TC_CTRLA_WAVEGEN_NFRQ_Val       0x0u   /**< \brief (TC_CTRLA)  */
+#define   TC_CTRLA_WAVEGEN_MFRQ_Val       0x1u   /**< \brief (TC_CTRLA)  */
+#define   TC_CTRLA_WAVEGEN_NPWM_Val       0x2u   /**< \brief (TC_CTRLA)  */
+#define   TC_CTRLA_WAVEGEN_MPWM_Val       0x3u   /**< \brief (TC_CTRLA)  */
+#define TC_CTRLA_WAVEGEN_NFRQ       (TC_CTRLA_WAVEGEN_NFRQ_Val     << TC_CTRLA_WAVEGEN_Pos)
+#define TC_CTRLA_WAVEGEN_MFRQ       (TC_CTRLA_WAVEGEN_MFRQ_Val     << TC_CTRLA_WAVEGEN_Pos)
+#define TC_CTRLA_WAVEGEN_NPWM       (TC_CTRLA_WAVEGEN_NPWM_Val     << TC_CTRLA_WAVEGEN_Pos)
+#define TC_CTRLA_WAVEGEN_MPWM       (TC_CTRLA_WAVEGEN_MPWM_Val     << TC_CTRLA_WAVEGEN_Pos)
+#define TC_CTRLA_PRESCALER_Pos      8            /**< \brief (TC_CTRLA) Prescaler */
+#define TC_CTRLA_PRESCALER_Msk      (0x7u << TC_CTRLA_PRESCALER_Pos)
+#define TC_CTRLA_PRESCALER(value)   ((TC_CTRLA_PRESCALER_Msk & ((value) << TC_CTRLA_PRESCALER_Pos)))
+#define   TC_CTRLA_PRESCALER_DIV1_Val     0x0u   /**< \brief (TC_CTRLA) Prescaler: GCLK_TC */
+#define   TC_CTRLA_PRESCALER_DIV2_Val     0x1u   /**< \brief (TC_CTRLA) Prescaler: GCLK_TC/2 */
+#define   TC_CTRLA_PRESCALER_DIV4_Val     0x2u   /**< \brief (TC_CTRLA) Prescaler: GCLK_TC/4 */
+#define   TC_CTRLA_PRESCALER_DIV8_Val     0x3u   /**< \brief (TC_CTRLA) Prescaler: GCLK_TC/8 */
+#define   TC_CTRLA_PRESCALER_DIV16_Val    0x4u   /**< \brief (TC_CTRLA) Prescaler: GCLK_TC/16 */
+#define   TC_CTRLA_PRESCALER_DIV64_Val    0x5u   /**< \brief (TC_CTRLA) Prescaler: GCLK_TC/64 */
+#define   TC_CTRLA_PRESCALER_DIV256_Val   0x6u   /**< \brief (TC_CTRLA) Prescaler: GCLK_TC/256 */
+#define   TC_CTRLA_PRESCALER_DIV1024_Val  0x7u   /**< \brief (TC_CTRLA) Prescaler: GCLK_TC/1024 */
+#define TC_CTRLA_PRESCALER_DIV1     (TC_CTRLA_PRESCALER_DIV1_Val   << TC_CTRLA_PRESCALER_Pos)
+#define TC_CTRLA_PRESCALER_DIV2     (TC_CTRLA_PRESCALER_DIV2_Val   << TC_CTRLA_PRESCALER_Pos)
+#define TC_CTRLA_PRESCALER_DIV4     (TC_CTRLA_PRESCALER_DIV4_Val   << TC_CTRLA_PRESCALER_Pos)
+#define TC_CTRLA_PRESCALER_DIV8     (TC_CTRLA_PRESCALER_DIV8_Val   << TC_CTRLA_PRESCALER_Pos)
+#define TC_CTRLA_PRESCALER_DIV16    (TC_CTRLA_PRESCALER_DIV16_Val  << TC_CTRLA_PRESCALER_Pos)
+#define TC_CTRLA_PRESCALER_DIV64    (TC_CTRLA_PRESCALER_DIV64_Val  << TC_CTRLA_PRESCALER_Pos)
+#define TC_CTRLA_PRESCALER_DIV256   (TC_CTRLA_PRESCALER_DIV256_Val << TC_CTRLA_PRESCALER_Pos)
+#define TC_CTRLA_PRESCALER_DIV1024  (TC_CTRLA_PRESCALER_DIV1024_Val << TC_CTRLA_PRESCALER_Pos)
+#define TC_CTRLA_RUNSTDBY_Pos       11           /**< \brief (TC_CTRLA) Run in Standby */
+#define TC_CTRLA_RUNSTDBY           (0x1u << TC_CTRLA_RUNSTDBY_Pos)
+#define TC_CTRLA_PRESCSYNC_Pos      12           /**< \brief (TC_CTRLA) Prescaler and Counter Synchronization */
+#define TC_CTRLA_PRESCSYNC_Msk      (0x3u << TC_CTRLA_PRESCSYNC_Pos)
+#define TC_CTRLA_PRESCSYNC(value)   ((TC_CTRLA_PRESCSYNC_Msk & ((value) << TC_CTRLA_PRESCSYNC_Pos)))
+#define   TC_CTRLA_PRESCSYNC_GCLK_Val     0x0u   /**< \brief (TC_CTRLA) Reload or reset the counter on next generic clock */
+#define   TC_CTRLA_PRESCSYNC_PRESC_Val    0x1u   /**< \brief (TC_CTRLA) Reload or reset the counter on next prescaler clock */
+#define   TC_CTRLA_PRESCSYNC_RESYNC_Val   0x2u   /**< \brief (TC_CTRLA) Reload or reset the counter on next generic clock. Reset the prescaler counter */
+#define TC_CTRLA_PRESCSYNC_GCLK     (TC_CTRLA_PRESCSYNC_GCLK_Val   << TC_CTRLA_PRESCSYNC_Pos)
+#define TC_CTRLA_PRESCSYNC_PRESC    (TC_CTRLA_PRESCSYNC_PRESC_Val  << TC_CTRLA_PRESCSYNC_Pos)
+#define TC_CTRLA_PRESCSYNC_RESYNC   (TC_CTRLA_PRESCSYNC_RESYNC_Val << TC_CTRLA_PRESCSYNC_Pos)
+#define TC_CTRLA_MASK               0x3F6Fu      /**< \brief (TC_CTRLA) MASK Register */
+
+/* -------- TC_READREQ : (TC Offset: 0x02) (R/W 16) Read Request -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t ADDR:5;           /*!< bit:  0.. 4  Address                            */
+    uint16_t :9;               /*!< bit:  5..13  Reserved                           */
+    uint16_t RCONT:1;          /*!< bit:     14  Read Continuously                  */
+    uint16_t RREQ:1;           /*!< bit:     15  Read Request                       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} TC_READREQ_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_READREQ_OFFSET           0x02         /**< \brief (TC_READREQ offset) Read Request */
+#define TC_READREQ_RESETVALUE       0x0000       /**< \brief (TC_READREQ reset_value) Read Request */
+
+#define TC_READREQ_ADDR_Pos         0            /**< \brief (TC_READREQ) Address */
+#define TC_READREQ_ADDR_Msk         (0x1Fu << TC_READREQ_ADDR_Pos)
+#define TC_READREQ_ADDR(value)      ((TC_READREQ_ADDR_Msk & ((value) << TC_READREQ_ADDR_Pos)))
+#define TC_READREQ_RCONT_Pos        14           /**< \brief (TC_READREQ) Read Continuously */
+#define TC_READREQ_RCONT            (0x1u << TC_READREQ_RCONT_Pos)
+#define TC_READREQ_RREQ_Pos         15           /**< \brief (TC_READREQ) Read Request */
+#define TC_READREQ_RREQ             (0x1u << TC_READREQ_RREQ_Pos)
+#define TC_READREQ_MASK             0xC01Fu      /**< \brief (TC_READREQ) MASK Register */
+
+/* -------- TC_CTRLBCLR : (TC Offset: 0x04) (R/W  8) Control B Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DIR:1;            /*!< bit:      0  Counter Direction                  */
+    uint8_t  :1;               /*!< bit:      1  Reserved                           */
+    uint8_t  ONESHOT:1;        /*!< bit:      2  One-Shot                           */
+    uint8_t  :3;               /*!< bit:  3.. 5  Reserved                           */
+    uint8_t  CMD:2;            /*!< bit:  6.. 7  Command                            */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_CTRLBCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_CTRLBCLR_OFFSET          0x04         /**< \brief (TC_CTRLBCLR offset) Control B Clear */
+#define TC_CTRLBCLR_RESETVALUE      0x02         /**< \brief (TC_CTRLBCLR reset_value) Control B Clear */
+
+#define TC_CTRLBCLR_DIR_Pos         0            /**< \brief (TC_CTRLBCLR) Counter Direction */
+#define TC_CTRLBCLR_DIR             (0x1u << TC_CTRLBCLR_DIR_Pos)
+#define TC_CTRLBCLR_ONESHOT_Pos     2            /**< \brief (TC_CTRLBCLR) One-Shot */
+#define TC_CTRLBCLR_ONESHOT         (0x1u << TC_CTRLBCLR_ONESHOT_Pos)
+#define TC_CTRLBCLR_CMD_Pos         6            /**< \brief (TC_CTRLBCLR) Command */
+#define TC_CTRLBCLR_CMD_Msk         (0x3u << TC_CTRLBCLR_CMD_Pos)
+#define TC_CTRLBCLR_CMD(value)      ((TC_CTRLBCLR_CMD_Msk & ((value) << TC_CTRLBCLR_CMD_Pos)))
+#define   TC_CTRLBCLR_CMD_NONE_Val        0x0u   /**< \brief (TC_CTRLBCLR) No action */
+#define   TC_CTRLBCLR_CMD_RETRIGGER_Val   0x1u   /**< \brief (TC_CTRLBCLR) Force a start, restart or retrigger */
+#define   TC_CTRLBCLR_CMD_STOP_Val        0x2u   /**< \brief (TC_CTRLBCLR) Force a stop */
+#define TC_CTRLBCLR_CMD_NONE        (TC_CTRLBCLR_CMD_NONE_Val      << TC_CTRLBCLR_CMD_Pos)
+#define TC_CTRLBCLR_CMD_RETRIGGER   (TC_CTRLBCLR_CMD_RETRIGGER_Val << TC_CTRLBCLR_CMD_Pos)
+#define TC_CTRLBCLR_CMD_STOP        (TC_CTRLBCLR_CMD_STOP_Val      << TC_CTRLBCLR_CMD_Pos)
+#define TC_CTRLBCLR_MASK            0xC5u        /**< \brief (TC_CTRLBCLR) MASK Register */
+
+/* -------- TC_CTRLBSET : (TC Offset: 0x05) (R/W  8) Control B Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DIR:1;            /*!< bit:      0  Counter Direction                  */
+    uint8_t  :1;               /*!< bit:      1  Reserved                           */
+    uint8_t  ONESHOT:1;        /*!< bit:      2  One-Shot                           */
+    uint8_t  :3;               /*!< bit:  3.. 5  Reserved                           */
+    uint8_t  CMD:2;            /*!< bit:  6.. 7  Command                            */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_CTRLBSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_CTRLBSET_OFFSET          0x05         /**< \brief (TC_CTRLBSET offset) Control B Set */
+#define TC_CTRLBSET_RESETVALUE      0x00         /**< \brief (TC_CTRLBSET reset_value) Control B Set */
+
+#define TC_CTRLBSET_DIR_Pos         0            /**< \brief (TC_CTRLBSET) Counter Direction */
+#define TC_CTRLBSET_DIR             (0x1u << TC_CTRLBSET_DIR_Pos)
+#define TC_CTRLBSET_ONESHOT_Pos     2            /**< \brief (TC_CTRLBSET) One-Shot */
+#define TC_CTRLBSET_ONESHOT         (0x1u << TC_CTRLBSET_ONESHOT_Pos)
+#define TC_CTRLBSET_CMD_Pos         6            /**< \brief (TC_CTRLBSET) Command */
+#define TC_CTRLBSET_CMD_Msk         (0x3u << TC_CTRLBSET_CMD_Pos)
+#define TC_CTRLBSET_CMD(value)      ((TC_CTRLBSET_CMD_Msk & ((value) << TC_CTRLBSET_CMD_Pos)))
+#define   TC_CTRLBSET_CMD_NONE_Val        0x0u   /**< \brief (TC_CTRLBSET) No action */
+#define   TC_CTRLBSET_CMD_RETRIGGER_Val   0x1u   /**< \brief (TC_CTRLBSET) Force a start, restart or retrigger */
+#define   TC_CTRLBSET_CMD_STOP_Val        0x2u   /**< \brief (TC_CTRLBSET) Force a stop */
+#define TC_CTRLBSET_CMD_NONE        (TC_CTRLBSET_CMD_NONE_Val      << TC_CTRLBSET_CMD_Pos)
+#define TC_CTRLBSET_CMD_RETRIGGER   (TC_CTRLBSET_CMD_RETRIGGER_Val << TC_CTRLBSET_CMD_Pos)
+#define TC_CTRLBSET_CMD_STOP        (TC_CTRLBSET_CMD_STOP_Val      << TC_CTRLBSET_CMD_Pos)
+#define TC_CTRLBSET_MASK            0xC5u        /**< \brief (TC_CTRLBSET) MASK Register */
+
+/* -------- TC_CTRLC : (TC Offset: 0x06) (R/W  8) Control C -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  INVEN0:1;         /*!< bit:      0  Output Waveform 0 Invert Enable    */
+    uint8_t  INVEN1:1;         /*!< bit:      1  Output Waveform 1 Invert Enable    */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  CPTEN0:1;         /*!< bit:      4  Capture Channel 0 Enable           */
+    uint8_t  CPTEN1:1;         /*!< bit:      5  Capture Channel 1 Enable           */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  INVEN:2;          /*!< bit:  0.. 1  Output Waveform x Invert Enable    */
+    uint8_t  :2;               /*!< bit:  2.. 3  Reserved                           */
+    uint8_t  CPTEN:2;          /*!< bit:  4.. 5  Capture Channel x Enable           */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_CTRLC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_CTRLC_OFFSET             0x06         /**< \brief (TC_CTRLC offset) Control C */
+#define TC_CTRLC_RESETVALUE         0x00         /**< \brief (TC_CTRLC reset_value) Control C */
+
+#define TC_CTRLC_INVEN0_Pos         0            /**< \brief (TC_CTRLC) Output Waveform 0 Invert Enable */
+#define TC_CTRLC_INVEN0             (1 << TC_CTRLC_INVEN0_Pos)
+#define TC_CTRLC_INVEN1_Pos         1            /**< \brief (TC_CTRLC) Output Waveform 1 Invert Enable */
+#define TC_CTRLC_INVEN1             (1 << TC_CTRLC_INVEN1_Pos)
+#define TC_CTRLC_INVEN_Pos          0            /**< \brief (TC_CTRLC) Output Waveform x Invert Enable */
+#define TC_CTRLC_INVEN_Msk          (0x3u << TC_CTRLC_INVEN_Pos)
+#define TC_CTRLC_INVEN(value)       ((TC_CTRLC_INVEN_Msk & ((value) << TC_CTRLC_INVEN_Pos)))
+#define TC_CTRLC_CPTEN0_Pos         4            /**< \brief (TC_CTRLC) Capture Channel 0 Enable */
+#define TC_CTRLC_CPTEN0             (1 << TC_CTRLC_CPTEN0_Pos)
+#define TC_CTRLC_CPTEN1_Pos         5            /**< \brief (TC_CTRLC) Capture Channel 1 Enable */
+#define TC_CTRLC_CPTEN1             (1 << TC_CTRLC_CPTEN1_Pos)
+#define TC_CTRLC_CPTEN_Pos          4            /**< \brief (TC_CTRLC) Capture Channel x Enable */
+#define TC_CTRLC_CPTEN_Msk          (0x3u << TC_CTRLC_CPTEN_Pos)
+#define TC_CTRLC_CPTEN(value)       ((TC_CTRLC_CPTEN_Msk & ((value) << TC_CTRLC_CPTEN_Pos)))
+#define TC_CTRLC_MASK               0x33u        /**< \brief (TC_CTRLC) MASK Register */
+
+/* -------- TC_DBGCTRL : (TC Offset: 0x08) (R/W  8) Debug Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DBGRUN:1;         /*!< bit:      0  Debug Run Mode                     */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_DBGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_DBGCTRL_OFFSET           0x08         /**< \brief (TC_DBGCTRL offset) Debug Control */
+#define TC_DBGCTRL_RESETVALUE       0x00         /**< \brief (TC_DBGCTRL reset_value) Debug Control */
+
+#define TC_DBGCTRL_DBGRUN_Pos       0            /**< \brief (TC_DBGCTRL) Debug Run Mode */
+#define TC_DBGCTRL_DBGRUN           (0x1u << TC_DBGCTRL_DBGRUN_Pos)
+#define TC_DBGCTRL_MASK             0x01u        /**< \brief (TC_DBGCTRL) MASK Register */
+
+/* -------- TC_EVCTRL : (TC Offset: 0x0A) (R/W 16) Event Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t EVACT:3;          /*!< bit:  0.. 2  Event Action                       */
+    uint16_t :1;               /*!< bit:      3  Reserved                           */
+    uint16_t TCINV:1;          /*!< bit:      4  TC Inverted Event Input            */
+    uint16_t TCEI:1;           /*!< bit:      5  TC Event Input                     */
+    uint16_t :2;               /*!< bit:  6.. 7  Reserved                           */
+    uint16_t OVFEO:1;          /*!< bit:      8  Overflow/Underflow Event Output Enable */
+    uint16_t :3;               /*!< bit:  9..11  Reserved                           */
+    uint16_t MCEO0:1;          /*!< bit:     12  Match or Capture Channel 0 Event Output Enable */
+    uint16_t MCEO1:1;          /*!< bit:     13  Match or Capture Channel 1 Event Output Enable */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t :12;              /*!< bit:  0..11  Reserved                           */
+    uint16_t MCEO:2;           /*!< bit: 12..13  Match or Capture Channel x Event Output Enable */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} TC_EVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_EVCTRL_OFFSET            0x0A         /**< \brief (TC_EVCTRL offset) Event Control */
+#define TC_EVCTRL_RESETVALUE        0x0000       /**< \brief (TC_EVCTRL reset_value) Event Control */
+
+#define TC_EVCTRL_EVACT_Pos         0            /**< \brief (TC_EVCTRL) Event Action */
+#define TC_EVCTRL_EVACT_Msk         (0x7u << TC_EVCTRL_EVACT_Pos)
+#define TC_EVCTRL_EVACT(value)      ((TC_EVCTRL_EVACT_Msk & ((value) << TC_EVCTRL_EVACT_Pos)))
+#define   TC_EVCTRL_EVACT_OFF_Val         0x0u   /**< \brief (TC_EVCTRL) Event action disabled */
+#define   TC_EVCTRL_EVACT_RETRIGGER_Val   0x1u   /**< \brief (TC_EVCTRL) Start, restart or retrigger TC on event */
+#define   TC_EVCTRL_EVACT_COUNT_Val       0x2u   /**< \brief (TC_EVCTRL) Count on event */
+#define   TC_EVCTRL_EVACT_START_Val       0x3u   /**< \brief (TC_EVCTRL) Start TC on event */
+#define   TC_EVCTRL_EVACT_PPW_Val         0x5u   /**< \brief (TC_EVCTRL) Period captured in CC0, pulse width in CC1 */
+#define   TC_EVCTRL_EVACT_PWP_Val         0x6u   /**< \brief (TC_EVCTRL) Period captured in CC1, pulse width in CC0 */
+#define TC_EVCTRL_EVACT_OFF         (TC_EVCTRL_EVACT_OFF_Val       << TC_EVCTRL_EVACT_Pos)
+#define TC_EVCTRL_EVACT_RETRIGGER   (TC_EVCTRL_EVACT_RETRIGGER_Val << TC_EVCTRL_EVACT_Pos)
+#define TC_EVCTRL_EVACT_COUNT       (TC_EVCTRL_EVACT_COUNT_Val     << TC_EVCTRL_EVACT_Pos)
+#define TC_EVCTRL_EVACT_START       (TC_EVCTRL_EVACT_START_Val     << TC_EVCTRL_EVACT_Pos)
+#define TC_EVCTRL_EVACT_PPW         (TC_EVCTRL_EVACT_PPW_Val       << TC_EVCTRL_EVACT_Pos)
+#define TC_EVCTRL_EVACT_PWP         (TC_EVCTRL_EVACT_PWP_Val       << TC_EVCTRL_EVACT_Pos)
+#define TC_EVCTRL_TCINV_Pos         4            /**< \brief (TC_EVCTRL) TC Inverted Event Input */
+#define TC_EVCTRL_TCINV             (0x1u << TC_EVCTRL_TCINV_Pos)
+#define TC_EVCTRL_TCEI_Pos          5            /**< \brief (TC_EVCTRL) TC Event Input */
+#define TC_EVCTRL_TCEI              (0x1u << TC_EVCTRL_TCEI_Pos)
+#define TC_EVCTRL_OVFEO_Pos         8            /**< \brief (TC_EVCTRL) Overflow/Underflow Event Output Enable */
+#define TC_EVCTRL_OVFEO             (0x1u << TC_EVCTRL_OVFEO_Pos)
+#define TC_EVCTRL_MCEO0_Pos         12           /**< \brief (TC_EVCTRL) Match or Capture Channel 0 Event Output Enable */
+#define TC_EVCTRL_MCEO0             (1 << TC_EVCTRL_MCEO0_Pos)
+#define TC_EVCTRL_MCEO1_Pos         13           /**< \brief (TC_EVCTRL) Match or Capture Channel 1 Event Output Enable */
+#define TC_EVCTRL_MCEO1             (1 << TC_EVCTRL_MCEO1_Pos)
+#define TC_EVCTRL_MCEO_Pos          12           /**< \brief (TC_EVCTRL) Match or Capture Channel x Event Output Enable */
+#define TC_EVCTRL_MCEO_Msk          (0x3u << TC_EVCTRL_MCEO_Pos)
+#define TC_EVCTRL_MCEO(value)       ((TC_EVCTRL_MCEO_Msk & ((value) << TC_EVCTRL_MCEO_Pos)))
+#define TC_EVCTRL_MASK              0x3137u      /**< \brief (TC_EVCTRL) MASK Register */
+
+/* -------- TC_INTENCLR : (TC Offset: 0x0C) (R/W  8) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  OVF:1;            /*!< bit:      0  Overflow Interrupt Enable          */
+    uint8_t  ERR:1;            /*!< bit:      1  Error Interrupt Enable             */
+    uint8_t  :1;               /*!< bit:      2  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      3  Synchronization Ready Interrupt Enable */
+    uint8_t  MC0:1;            /*!< bit:      4  Match or Capture Channel 0 Interrupt Enable */
+    uint8_t  MC1:1;            /*!< bit:      5  Match or Capture Channel 1 Interrupt Enable */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  :4;               /*!< bit:  0.. 3  Reserved                           */
+    uint8_t  MC:2;             /*!< bit:  4.. 5  Match or Capture Channel x Interrupt Enable */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_INTENCLR_OFFSET          0x0C         /**< \brief (TC_INTENCLR offset) Interrupt Enable Clear */
+#define TC_INTENCLR_RESETVALUE      0x00         /**< \brief (TC_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define TC_INTENCLR_OVF_Pos         0            /**< \brief (TC_INTENCLR) Overflow Interrupt Enable */
+#define TC_INTENCLR_OVF             (0x1u << TC_INTENCLR_OVF_Pos)
+#define TC_INTENCLR_ERR_Pos         1            /**< \brief (TC_INTENCLR) Error Interrupt Enable */
+#define TC_INTENCLR_ERR             (0x1u << TC_INTENCLR_ERR_Pos)
+#define TC_INTENCLR_SYNCRDY_Pos     3            /**< \brief (TC_INTENCLR) Synchronization Ready Interrupt Enable */
+#define TC_INTENCLR_SYNCRDY         (0x1u << TC_INTENCLR_SYNCRDY_Pos)
+#define TC_INTENCLR_MC0_Pos         4            /**< \brief (TC_INTENCLR) Match or Capture Channel 0 Interrupt Enable */
+#define TC_INTENCLR_MC0             (1 << TC_INTENCLR_MC0_Pos)
+#define TC_INTENCLR_MC1_Pos         5            /**< \brief (TC_INTENCLR) Match or Capture Channel 1 Interrupt Enable */
+#define TC_INTENCLR_MC1             (1 << TC_INTENCLR_MC1_Pos)
+#define TC_INTENCLR_MC_Pos          4            /**< \brief (TC_INTENCLR) Match or Capture Channel x Interrupt Enable */
+#define TC_INTENCLR_MC_Msk          (0x3u << TC_INTENCLR_MC_Pos)
+#define TC_INTENCLR_MC(value)       ((TC_INTENCLR_MC_Msk & ((value) << TC_INTENCLR_MC_Pos)))
+#define TC_INTENCLR_MASK            0x3Bu        /**< \brief (TC_INTENCLR) MASK Register */
+
+/* -------- TC_INTENSET : (TC Offset: 0x0D) (R/W  8) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  OVF:1;            /*!< bit:      0  Overflow Interrupt Enable          */
+    uint8_t  ERR:1;            /*!< bit:      1  Error Interrupt Enable             */
+    uint8_t  :1;               /*!< bit:      2  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      3  Synchronization Ready Interrupt Enable */
+    uint8_t  MC0:1;            /*!< bit:      4  Match or Capture Channel 0 Interrupt Enable */
+    uint8_t  MC1:1;            /*!< bit:      5  Match or Capture Channel 1 Interrupt Enable */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  :4;               /*!< bit:  0.. 3  Reserved                           */
+    uint8_t  MC:2;             /*!< bit:  4.. 5  Match or Capture Channel x Interrupt Enable */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_INTENSET_OFFSET          0x0D         /**< \brief (TC_INTENSET offset) Interrupt Enable Set */
+#define TC_INTENSET_RESETVALUE      0x00         /**< \brief (TC_INTENSET reset_value) Interrupt Enable Set */
+
+#define TC_INTENSET_OVF_Pos         0            /**< \brief (TC_INTENSET) Overflow Interrupt Enable */
+#define TC_INTENSET_OVF             (0x1u << TC_INTENSET_OVF_Pos)
+#define TC_INTENSET_ERR_Pos         1            /**< \brief (TC_INTENSET) Error Interrupt Enable */
+#define TC_INTENSET_ERR             (0x1u << TC_INTENSET_ERR_Pos)
+#define TC_INTENSET_SYNCRDY_Pos     3            /**< \brief (TC_INTENSET) Synchronization Ready Interrupt Enable */
+#define TC_INTENSET_SYNCRDY         (0x1u << TC_INTENSET_SYNCRDY_Pos)
+#define TC_INTENSET_MC0_Pos         4            /**< \brief (TC_INTENSET) Match or Capture Channel 0 Interrupt Enable */
+#define TC_INTENSET_MC0             (1 << TC_INTENSET_MC0_Pos)
+#define TC_INTENSET_MC1_Pos         5            /**< \brief (TC_INTENSET) Match or Capture Channel 1 Interrupt Enable */
+#define TC_INTENSET_MC1             (1 << TC_INTENSET_MC1_Pos)
+#define TC_INTENSET_MC_Pos          4            /**< \brief (TC_INTENSET) Match or Capture Channel x Interrupt Enable */
+#define TC_INTENSET_MC_Msk          (0x3u << TC_INTENSET_MC_Pos)
+#define TC_INTENSET_MC(value)       ((TC_INTENSET_MC_Msk & ((value) << TC_INTENSET_MC_Pos)))
+#define TC_INTENSET_MASK            0x3Bu        /**< \brief (TC_INTENSET) MASK Register */
+
+/* -------- TC_INTFLAG : (TC Offset: 0x0E) (R/W  8) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  OVF:1;            /*!< bit:      0  Overflow                           */
+    uint8_t  ERR:1;            /*!< bit:      1  Error                              */
+    uint8_t  :1;               /*!< bit:      2  Reserved                           */
+    uint8_t  SYNCRDY:1;        /*!< bit:      3  Synchronization Ready              */
+    uint8_t  MC0:1;            /*!< bit:      4  Match or Capture Channel 0         */
+    uint8_t  MC1:1;            /*!< bit:      5  Match or Capture Channel 1         */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  :4;               /*!< bit:  0.. 3  Reserved                           */
+    uint8_t  MC:2;             /*!< bit:  4.. 5  Match or Capture Channel x         */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_INTFLAG_OFFSET           0x0E         /**< \brief (TC_INTFLAG offset) Interrupt Flag Status and Clear */
+#define TC_INTFLAG_RESETVALUE       0x00         /**< \brief (TC_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define TC_INTFLAG_OVF_Pos          0            /**< \brief (TC_INTFLAG) Overflow */
+#define TC_INTFLAG_OVF              (0x1u << TC_INTFLAG_OVF_Pos)
+#define TC_INTFLAG_ERR_Pos          1            /**< \brief (TC_INTFLAG) Error */
+#define TC_INTFLAG_ERR              (0x1u << TC_INTFLAG_ERR_Pos)
+#define TC_INTFLAG_SYNCRDY_Pos      3            /**< \brief (TC_INTFLAG) Synchronization Ready */
+#define TC_INTFLAG_SYNCRDY          (0x1u << TC_INTFLAG_SYNCRDY_Pos)
+#define TC_INTFLAG_MC0_Pos          4            /**< \brief (TC_INTFLAG) Match or Capture Channel 0 */
+#define TC_INTFLAG_MC0              (1 << TC_INTFLAG_MC0_Pos)
+#define TC_INTFLAG_MC1_Pos          5            /**< \brief (TC_INTFLAG) Match or Capture Channel 1 */
+#define TC_INTFLAG_MC1              (1 << TC_INTFLAG_MC1_Pos)
+#define TC_INTFLAG_MC_Pos           4            /**< \brief (TC_INTFLAG) Match or Capture Channel x */
+#define TC_INTFLAG_MC_Msk           (0x3u << TC_INTFLAG_MC_Pos)
+#define TC_INTFLAG_MC(value)        ((TC_INTFLAG_MC_Msk & ((value) << TC_INTFLAG_MC_Pos)))
+#define TC_INTFLAG_MASK             0x3Bu        /**< \brief (TC_INTFLAG) MASK Register */
+
+/* -------- TC_STATUS : (TC Offset: 0x0F) (R/   8) Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :3;               /*!< bit:  0.. 2  Reserved                           */
+    uint8_t  STOP:1;           /*!< bit:      3  Stop                               */
+    uint8_t  SLAVE:1;          /*!< bit:      4  Slave                              */
+    uint8_t  :2;               /*!< bit:  5.. 6  Reserved                           */
+    uint8_t  SYNCBUSY:1;       /*!< bit:      7  Synchronization Busy               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_STATUS_OFFSET            0x0F         /**< \brief (TC_STATUS offset) Status */
+#define TC_STATUS_RESETVALUE        0x08         /**< \brief (TC_STATUS reset_value) Status */
+
+#define TC_STATUS_STOP_Pos          3            /**< \brief (TC_STATUS) Stop */
+#define TC_STATUS_STOP              (0x1u << TC_STATUS_STOP_Pos)
+#define TC_STATUS_SLAVE_Pos         4            /**< \brief (TC_STATUS) Slave */
+#define TC_STATUS_SLAVE             (0x1u << TC_STATUS_SLAVE_Pos)
+#define TC_STATUS_SYNCBUSY_Pos      7            /**< \brief (TC_STATUS) Synchronization Busy */
+#define TC_STATUS_SYNCBUSY          (0x1u << TC_STATUS_SYNCBUSY_Pos)
+#define TC_STATUS_MASK              0x98u        /**< \brief (TC_STATUS) MASK Register */
+
+/* -------- TC_COUNT16_COUNT : (TC Offset: 0x10) (R/W 16) COUNT16 COUNT16 Counter Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t COUNT:16;         /*!< bit:  0..15  Count Value                        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} TC_COUNT16_COUNT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_COUNT16_COUNT_OFFSET     0x10         /**< \brief (TC_COUNT16_COUNT offset) COUNT16 Counter Value */
+#define TC_COUNT16_COUNT_RESETVALUE 0x0000       /**< \brief (TC_COUNT16_COUNT reset_value) COUNT16 Counter Value */
+
+#define TC_COUNT16_COUNT_COUNT_Pos  0            /**< \brief (TC_COUNT16_COUNT) Count Value */
+#define TC_COUNT16_COUNT_COUNT_Msk  (0xFFFFu << TC_COUNT16_COUNT_COUNT_Pos)
+#define TC_COUNT16_COUNT_COUNT(value) ((TC_COUNT16_COUNT_COUNT_Msk & ((value) << TC_COUNT16_COUNT_COUNT_Pos)))
+#define TC_COUNT16_COUNT_MASK       0xFFFFu      /**< \brief (TC_COUNT16_COUNT) MASK Register */
+
+/* -------- TC_COUNT32_COUNT : (TC Offset: 0x10) (R/W 32) COUNT32 COUNT32 Counter Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t COUNT:32;         /*!< bit:  0..31  Count Value                        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TC_COUNT32_COUNT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_COUNT32_COUNT_OFFSET     0x10         /**< \brief (TC_COUNT32_COUNT offset) COUNT32 Counter Value */
+#define TC_COUNT32_COUNT_RESETVALUE 0x00000000   /**< \brief (TC_COUNT32_COUNT reset_value) COUNT32 Counter Value */
+
+#define TC_COUNT32_COUNT_COUNT_Pos  0            /**< \brief (TC_COUNT32_COUNT) Count Value */
+#define TC_COUNT32_COUNT_COUNT_Msk  (0xFFFFFFFFu << TC_COUNT32_COUNT_COUNT_Pos)
+#define TC_COUNT32_COUNT_COUNT(value) ((TC_COUNT32_COUNT_COUNT_Msk & ((value) << TC_COUNT32_COUNT_COUNT_Pos)))
+#define TC_COUNT32_COUNT_MASK       0xFFFFFFFFu  /**< \brief (TC_COUNT32_COUNT) MASK Register */
+
+/* -------- TC_COUNT8_COUNT : (TC Offset: 0x10) (R/W  8) COUNT8 COUNT8 Counter Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  COUNT:8;          /*!< bit:  0.. 7  Counter Value                      */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_COUNT8_COUNT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_COUNT8_COUNT_OFFSET      0x10         /**< \brief (TC_COUNT8_COUNT offset) COUNT8 Counter Value */
+#define TC_COUNT8_COUNT_RESETVALUE  0x00         /**< \brief (TC_COUNT8_COUNT reset_value) COUNT8 Counter Value */
+
+#define TC_COUNT8_COUNT_COUNT_Pos   0            /**< \brief (TC_COUNT8_COUNT) Counter Value */
+#define TC_COUNT8_COUNT_COUNT_Msk   (0xFFu << TC_COUNT8_COUNT_COUNT_Pos)
+#define TC_COUNT8_COUNT_COUNT(value) ((TC_COUNT8_COUNT_COUNT_Msk & ((value) << TC_COUNT8_COUNT_COUNT_Pos)))
+#define TC_COUNT8_COUNT_MASK        0xFFu        /**< \brief (TC_COUNT8_COUNT) MASK Register */
+
+/* -------- TC_COUNT8_PER : (TC Offset: 0x14) (R/W  8) COUNT8 COUNT8 Period Value -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PER:8;            /*!< bit:  0.. 7  Period Value                       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_COUNT8_PER_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_COUNT8_PER_OFFSET        0x14         /**< \brief (TC_COUNT8_PER offset) COUNT8 Period Value */
+#define TC_COUNT8_PER_RESETVALUE    0xFF         /**< \brief (TC_COUNT8_PER reset_value) COUNT8 Period Value */
+
+#define TC_COUNT8_PER_PER_Pos       0            /**< \brief (TC_COUNT8_PER) Period Value */
+#define TC_COUNT8_PER_PER_Msk       (0xFFu << TC_COUNT8_PER_PER_Pos)
+#define TC_COUNT8_PER_PER(value)    ((TC_COUNT8_PER_PER_Msk & ((value) << TC_COUNT8_PER_PER_Pos)))
+#define TC_COUNT8_PER_MASK          0xFFu        /**< \brief (TC_COUNT8_PER) MASK Register */
+
+/* -------- TC_COUNT16_CC : (TC Offset: 0x18) (R/W 16) COUNT16 COUNT16 Compare/Capture -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t CC:16;            /*!< bit:  0..15  Compare/Capture Value              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} TC_COUNT16_CC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_COUNT16_CC_OFFSET        0x18         /**< \brief (TC_COUNT16_CC offset) COUNT16 Compare/Capture */
+#define TC_COUNT16_CC_RESETVALUE    0x0000       /**< \brief (TC_COUNT16_CC reset_value) COUNT16 Compare/Capture */
+
+#define TC_COUNT16_CC_CC_Pos        0            /**< \brief (TC_COUNT16_CC) Compare/Capture Value */
+#define TC_COUNT16_CC_CC_Msk        (0xFFFFu << TC_COUNT16_CC_CC_Pos)
+#define TC_COUNT16_CC_CC(value)     ((TC_COUNT16_CC_CC_Msk & ((value) << TC_COUNT16_CC_CC_Pos)))
+#define TC_COUNT16_CC_MASK          0xFFFFu      /**< \brief (TC_COUNT16_CC) MASK Register */
+
+/* -------- TC_COUNT32_CC : (TC Offset: 0x18) (R/W 32) COUNT32 COUNT32 Compare/Capture -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CC:32;            /*!< bit:  0..31  Compare/Capture Value              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TC_COUNT32_CC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_COUNT32_CC_OFFSET        0x18         /**< \brief (TC_COUNT32_CC offset) COUNT32 Compare/Capture */
+#define TC_COUNT32_CC_RESETVALUE    0x00000000   /**< \brief (TC_COUNT32_CC reset_value) COUNT32 Compare/Capture */
+
+#define TC_COUNT32_CC_CC_Pos        0            /**< \brief (TC_COUNT32_CC) Compare/Capture Value */
+#define TC_COUNT32_CC_CC_Msk        (0xFFFFFFFFu << TC_COUNT32_CC_CC_Pos)
+#define TC_COUNT32_CC_CC(value)     ((TC_COUNT32_CC_CC_Msk & ((value) << TC_COUNT32_CC_CC_Pos)))
+#define TC_COUNT32_CC_MASK          0xFFFFFFFFu  /**< \brief (TC_COUNT32_CC) MASK Register */
+
+/* -------- TC_COUNT8_CC : (TC Offset: 0x18) (R/W  8) COUNT8 COUNT8 Compare/Capture -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CC:8;             /*!< bit:  0.. 7  Compare/Capture Value              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TC_COUNT8_CC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TC_COUNT8_CC_OFFSET         0x18         /**< \brief (TC_COUNT8_CC offset) COUNT8 Compare/Capture */
+#define TC_COUNT8_CC_RESETVALUE     0x00         /**< \brief (TC_COUNT8_CC reset_value) COUNT8 Compare/Capture */
+
+#define TC_COUNT8_CC_CC_Pos         0            /**< \brief (TC_COUNT8_CC) Compare/Capture Value */
+#define TC_COUNT8_CC_CC_Msk         (0xFFu << TC_COUNT8_CC_CC_Pos)
+#define TC_COUNT8_CC_CC(value)      ((TC_COUNT8_CC_CC_Msk & ((value) << TC_COUNT8_CC_CC_Pos)))
+#define TC_COUNT8_CC_MASK           0xFFu        /**< \brief (TC_COUNT8_CC) MASK Register */
+
+/** \brief TC_COUNT8 hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* 8-bit Counter Mode */
+  __IO TC_CTRLA_Type             CTRLA;       /**< \brief Offset: 0x00 (R/W 16) Control A */
+  __IO TC_READREQ_Type           READREQ;     /**< \brief Offset: 0x02 (R/W 16) Read Request */
+  __IO TC_CTRLBCLR_Type          CTRLBCLR;    /**< \brief Offset: 0x04 (R/W  8) Control B Clear */
+  __IO TC_CTRLBSET_Type          CTRLBSET;    /**< \brief Offset: 0x05 (R/W  8) Control B Set */
+  __IO TC_CTRLC_Type             CTRLC;       /**< \brief Offset: 0x06 (R/W  8) Control C */
+       RoReg8                    Reserved1[0x1];
+  __IO TC_DBGCTRL_Type           DBGCTRL;     /**< \brief Offset: 0x08 (R/W  8) Debug Control */
+       RoReg8                    Reserved2[0x1];
+  __IO TC_EVCTRL_Type            EVCTRL;      /**< \brief Offset: 0x0A (R/W 16) Event Control */
+  __IO TC_INTENCLR_Type          INTENCLR;    /**< \brief Offset: 0x0C (R/W  8) Interrupt Enable Clear */
+  __IO TC_INTENSET_Type          INTENSET;    /**< \brief Offset: 0x0D (R/W  8) Interrupt Enable Set */
+  __IO TC_INTFLAG_Type           INTFLAG;     /**< \brief Offset: 0x0E (R/W  8) Interrupt Flag Status and Clear */
+  __I  TC_STATUS_Type            STATUS;      /**< \brief Offset: 0x0F (R/   8) Status */
+  __IO TC_COUNT8_COUNT_Type      COUNT;       /**< \brief Offset: 0x10 (R/W  8) COUNT8 Counter Value */
+       RoReg8                    Reserved3[0x3];
+  __IO TC_COUNT8_PER_Type        PER;         /**< \brief Offset: 0x14 (R/W  8) COUNT8 Period Value */
+       RoReg8                    Reserved4[0x3];
+  __IO TC_COUNT8_CC_Type         CC[2];       /**< \brief Offset: 0x18 (R/W  8) COUNT8 Compare/Capture */
+} TcCount8;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief TC_COUNT16 hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* 16-bit Counter Mode */
+  __IO TC_CTRLA_Type             CTRLA;       /**< \brief Offset: 0x00 (R/W 16) Control A */
+  __IO TC_READREQ_Type           READREQ;     /**< \brief Offset: 0x02 (R/W 16) Read Request */
+  __IO TC_CTRLBCLR_Type          CTRLBCLR;    /**< \brief Offset: 0x04 (R/W  8) Control B Clear */
+  __IO TC_CTRLBSET_Type          CTRLBSET;    /**< \brief Offset: 0x05 (R/W  8) Control B Set */
+  __IO TC_CTRLC_Type             CTRLC;       /**< \brief Offset: 0x06 (R/W  8) Control C */
+       RoReg8                    Reserved1[0x1];
+  __IO TC_DBGCTRL_Type           DBGCTRL;     /**< \brief Offset: 0x08 (R/W  8) Debug Control */
+       RoReg8                    Reserved2[0x1];
+  __IO TC_EVCTRL_Type            EVCTRL;      /**< \brief Offset: 0x0A (R/W 16) Event Control */
+  __IO TC_INTENCLR_Type          INTENCLR;    /**< \brief Offset: 0x0C (R/W  8) Interrupt Enable Clear */
+  __IO TC_INTENSET_Type          INTENSET;    /**< \brief Offset: 0x0D (R/W  8) Interrupt Enable Set */
+  __IO TC_INTFLAG_Type           INTFLAG;     /**< \brief Offset: 0x0E (R/W  8) Interrupt Flag Status and Clear */
+  __I  TC_STATUS_Type            STATUS;      /**< \brief Offset: 0x0F (R/   8) Status */
+  __IO TC_COUNT16_COUNT_Type     COUNT;       /**< \brief Offset: 0x10 (R/W 16) COUNT16 Counter Value */
+       RoReg8                    Reserved3[0x6];
+  __IO TC_COUNT16_CC_Type        CC[2];       /**< \brief Offset: 0x18 (R/W 16) COUNT16 Compare/Capture */
+} TcCount16;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief TC_COUNT32 hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* 32-bit Counter Mode */
+  __IO TC_CTRLA_Type             CTRLA;       /**< \brief Offset: 0x00 (R/W 16) Control A */
+  __IO TC_READREQ_Type           READREQ;     /**< \brief Offset: 0x02 (R/W 16) Read Request */
+  __IO TC_CTRLBCLR_Type          CTRLBCLR;    /**< \brief Offset: 0x04 (R/W  8) Control B Clear */
+  __IO TC_CTRLBSET_Type          CTRLBSET;    /**< \brief Offset: 0x05 (R/W  8) Control B Set */
+  __IO TC_CTRLC_Type             CTRLC;       /**< \brief Offset: 0x06 (R/W  8) Control C */
+       RoReg8                    Reserved1[0x1];
+  __IO TC_DBGCTRL_Type           DBGCTRL;     /**< \brief Offset: 0x08 (R/W  8) Debug Control */
+       RoReg8                    Reserved2[0x1];
+  __IO TC_EVCTRL_Type            EVCTRL;      /**< \brief Offset: 0x0A (R/W 16) Event Control */
+  __IO TC_INTENCLR_Type          INTENCLR;    /**< \brief Offset: 0x0C (R/W  8) Interrupt Enable Clear */
+  __IO TC_INTENSET_Type          INTENSET;    /**< \brief Offset: 0x0D (R/W  8) Interrupt Enable Set */
+  __IO TC_INTFLAG_Type           INTFLAG;     /**< \brief Offset: 0x0E (R/W  8) Interrupt Flag Status and Clear */
+  __I  TC_STATUS_Type            STATUS;      /**< \brief Offset: 0x0F (R/   8) Status */
+  __IO TC_COUNT32_COUNT_Type     COUNT;       /**< \brief Offset: 0x10 (R/W 32) COUNT32 Counter Value */
+       RoReg8                    Reserved3[0x4];
+  __IO TC_COUNT32_CC_Type        CC[2];       /**< \brief Offset: 0x18 (R/W 32) COUNT32 Compare/Capture */
+} TcCount32;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+       TcCount8                  COUNT8;      /**< \brief Offset: 0x00 8-bit Counter Mode */
+       TcCount16                 COUNT16;     /**< \brief Offset: 0x00 16-bit Counter Mode */
+       TcCount32                 COUNT32;     /**< \brief Offset: 0x00 32-bit Counter Mode */
+} Tc;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_TC_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/tcc.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/tcc.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/tcc.h	(revision 136)
@@ -0,0 +1,1608 @@
+/**
+ * \file
+ *
+ * \brief Component description for TCC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TCC_COMPONENT_
+#define _SAMD21_TCC_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR TCC */
+/* ========================================================================== */
+/** \addtogroup SAMD21_TCC Timer Counter Control */
+/*@{*/
+
+#define TCC_U2213
+#define REV_TCC                     0x101
+
+/* -------- TCC_CTRLA : (TCC Offset: 0x00) (R/W 32) Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint32_t ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint32_t :3;               /*!< bit:  2.. 4  Reserved                           */
+    uint32_t RESOLUTION:2;     /*!< bit:  5.. 6  Enhanced Resolution                */
+    uint32_t :1;               /*!< bit:      7  Reserved                           */
+    uint32_t PRESCALER:3;      /*!< bit:  8..10  Prescaler                          */
+    uint32_t RUNSTDBY:1;       /*!< bit:     11  Run in Standby                     */
+    uint32_t PRESCSYNC:2;      /*!< bit: 12..13  Prescaler and Counter Synchronization Selection */
+    uint32_t ALOCK:1;          /*!< bit:     14  Auto Lock                          */
+    uint32_t :9;               /*!< bit: 15..23  Reserved                           */
+    uint32_t CPTEN0:1;         /*!< bit:     24  Capture Channel 0 Enable           */
+    uint32_t CPTEN1:1;         /*!< bit:     25  Capture Channel 1 Enable           */
+    uint32_t CPTEN2:1;         /*!< bit:     26  Capture Channel 2 Enable           */
+    uint32_t CPTEN3:1;         /*!< bit:     27  Capture Channel 3 Enable           */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :24;              /*!< bit:  0..23  Reserved                           */
+    uint32_t CPTEN:4;          /*!< bit: 24..27  Capture Channel x Enable           */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_CTRLA_OFFSET            0x00         /**< \brief (TCC_CTRLA offset) Control A */
+#define TCC_CTRLA_RESETVALUE        0x00000000   /**< \brief (TCC_CTRLA reset_value) Control A */
+
+#define TCC_CTRLA_SWRST_Pos         0            /**< \brief (TCC_CTRLA) Software Reset */
+#define TCC_CTRLA_SWRST             (0x1u << TCC_CTRLA_SWRST_Pos)
+#define TCC_CTRLA_ENABLE_Pos        1            /**< \brief (TCC_CTRLA) Enable */
+#define TCC_CTRLA_ENABLE            (0x1u << TCC_CTRLA_ENABLE_Pos)
+#define TCC_CTRLA_RESOLUTION_Pos    5            /**< \brief (TCC_CTRLA) Enhanced Resolution */
+#define TCC_CTRLA_RESOLUTION_Msk    (0x3u << TCC_CTRLA_RESOLUTION_Pos)
+#define TCC_CTRLA_RESOLUTION(value) ((TCC_CTRLA_RESOLUTION_Msk & ((value) << TCC_CTRLA_RESOLUTION_Pos)))
+#define   TCC_CTRLA_RESOLUTION_NONE_Val   0x0u   /**< \brief (TCC_CTRLA) Dithering is disabled */
+#define   TCC_CTRLA_RESOLUTION_DITH4_Val  0x1u   /**< \brief (TCC_CTRLA) Dithering is done every 16 PWM frames. PER[3:0] and CCx[3:0] contain dithering pattern selection. */
+#define   TCC_CTRLA_RESOLUTION_DITH5_Val  0x2u   /**< \brief (TCC_CTRLA) Dithering is done every 32 PWM frames. PER[4:0] and CCx[4:0] contain dithering pattern selection. */
+#define   TCC_CTRLA_RESOLUTION_DITH6_Val  0x3u   /**< \brief (TCC_CTRLA) Dithering is done every 64 PWM frames. PER[5:0] and CCx[5:0] contain dithering pattern selection. */
+#define TCC_CTRLA_RESOLUTION_NONE   (TCC_CTRLA_RESOLUTION_NONE_Val << TCC_CTRLA_RESOLUTION_Pos)
+#define TCC_CTRLA_RESOLUTION_DITH4  (TCC_CTRLA_RESOLUTION_DITH4_Val << TCC_CTRLA_RESOLUTION_Pos)
+#define TCC_CTRLA_RESOLUTION_DITH5  (TCC_CTRLA_RESOLUTION_DITH5_Val << TCC_CTRLA_RESOLUTION_Pos)
+#define TCC_CTRLA_RESOLUTION_DITH6  (TCC_CTRLA_RESOLUTION_DITH6_Val << TCC_CTRLA_RESOLUTION_Pos)
+#define TCC_CTRLA_PRESCALER_Pos     8            /**< \brief (TCC_CTRLA) Prescaler */
+#define TCC_CTRLA_PRESCALER_Msk     (0x7u << TCC_CTRLA_PRESCALER_Pos)
+#define TCC_CTRLA_PRESCALER(value)  ((TCC_CTRLA_PRESCALER_Msk & ((value) << TCC_CTRLA_PRESCALER_Pos)))
+#define   TCC_CTRLA_PRESCALER_DIV1_Val    0x0u   /**< \brief (TCC_CTRLA) Prescaler: GCLK_TCC */
+#define   TCC_CTRLA_PRESCALER_DIV2_Val    0x1u   /**< \brief (TCC_CTRLA) Prescaler: GCLK_TCC/2 */
+#define   TCC_CTRLA_PRESCALER_DIV4_Val    0x2u   /**< \brief (TCC_CTRLA) Prescaler: GCLK_TCC/4 */
+#define   TCC_CTRLA_PRESCALER_DIV8_Val    0x3u   /**< \brief (TCC_CTRLA) Prescaler: GCLK_TCC/8 */
+#define   TCC_CTRLA_PRESCALER_DIV16_Val   0x4u   /**< \brief (TCC_CTRLA) Prescaler: GCLK_TCC/16 */
+#define   TCC_CTRLA_PRESCALER_DIV64_Val   0x5u   /**< \brief (TCC_CTRLA) Prescaler: GCLK_TCC/64 */
+#define   TCC_CTRLA_PRESCALER_DIV256_Val  0x6u   /**< \brief (TCC_CTRLA) Prescaler: GCLK_TCC/256 */
+#define   TCC_CTRLA_PRESCALER_DIV1024_Val 0x7u   /**< \brief (TCC_CTRLA) Prescaler: GCLK_TCC/1024 */
+#define TCC_CTRLA_PRESCALER_DIV1    (TCC_CTRLA_PRESCALER_DIV1_Val  << TCC_CTRLA_PRESCALER_Pos)
+#define TCC_CTRLA_PRESCALER_DIV2    (TCC_CTRLA_PRESCALER_DIV2_Val  << TCC_CTRLA_PRESCALER_Pos)
+#define TCC_CTRLA_PRESCALER_DIV4    (TCC_CTRLA_PRESCALER_DIV4_Val  << TCC_CTRLA_PRESCALER_Pos)
+#define TCC_CTRLA_PRESCALER_DIV8    (TCC_CTRLA_PRESCALER_DIV8_Val  << TCC_CTRLA_PRESCALER_Pos)
+#define TCC_CTRLA_PRESCALER_DIV16   (TCC_CTRLA_PRESCALER_DIV16_Val << TCC_CTRLA_PRESCALER_Pos)
+#define TCC_CTRLA_PRESCALER_DIV64   (TCC_CTRLA_PRESCALER_DIV64_Val << TCC_CTRLA_PRESCALER_Pos)
+#define TCC_CTRLA_PRESCALER_DIV256  (TCC_CTRLA_PRESCALER_DIV256_Val << TCC_CTRLA_PRESCALER_Pos)
+#define TCC_CTRLA_PRESCALER_DIV1024 (TCC_CTRLA_PRESCALER_DIV1024_Val << TCC_CTRLA_PRESCALER_Pos)
+#define TCC_CTRLA_RUNSTDBY_Pos      11           /**< \brief (TCC_CTRLA) Run in Standby */
+#define TCC_CTRLA_RUNSTDBY          (0x1u << TCC_CTRLA_RUNSTDBY_Pos)
+#define TCC_CTRLA_PRESCSYNC_Pos     12           /**< \brief (TCC_CTRLA) Prescaler and Counter Synchronization Selection */
+#define TCC_CTRLA_PRESCSYNC_Msk     (0x3u << TCC_CTRLA_PRESCSYNC_Pos)
+#define TCC_CTRLA_PRESCSYNC(value)  ((TCC_CTRLA_PRESCSYNC_Msk & ((value) << TCC_CTRLA_PRESCSYNC_Pos)))
+#define   TCC_CTRLA_PRESCSYNC_GCLK_Val    0x0u   /**< \brief (TCC_CTRLA) Reload or reset Counter on next GCLK */
+#define   TCC_CTRLA_PRESCSYNC_PRESC_Val   0x1u   /**< \brief (TCC_CTRLA) Reload or reset Counter on next prescaler clock */
+#define   TCC_CTRLA_PRESCSYNC_RESYNC_Val  0x2u   /**< \brief (TCC_CTRLA) Reload or reset Counter on next GCLK */
+#define TCC_CTRLA_PRESCSYNC_GCLK    (TCC_CTRLA_PRESCSYNC_GCLK_Val  << TCC_CTRLA_PRESCSYNC_Pos)
+#define TCC_CTRLA_PRESCSYNC_PRESC   (TCC_CTRLA_PRESCSYNC_PRESC_Val << TCC_CTRLA_PRESCSYNC_Pos)
+#define TCC_CTRLA_PRESCSYNC_RESYNC  (TCC_CTRLA_PRESCSYNC_RESYNC_Val << TCC_CTRLA_PRESCSYNC_Pos)
+#define TCC_CTRLA_ALOCK_Pos         14           /**< \brief (TCC_CTRLA) Auto Lock */
+#define TCC_CTRLA_ALOCK             (0x1u << TCC_CTRLA_ALOCK_Pos)
+#define TCC_CTRLA_CPTEN0_Pos        24           /**< \brief (TCC_CTRLA) Capture Channel 0 Enable */
+#define TCC_CTRLA_CPTEN0            (1 << TCC_CTRLA_CPTEN0_Pos)
+#define TCC_CTRLA_CPTEN1_Pos        25           /**< \brief (TCC_CTRLA) Capture Channel 1 Enable */
+#define TCC_CTRLA_CPTEN1            (1 << TCC_CTRLA_CPTEN1_Pos)
+#define TCC_CTRLA_CPTEN2_Pos        26           /**< \brief (TCC_CTRLA) Capture Channel 2 Enable */
+#define TCC_CTRLA_CPTEN2            (1 << TCC_CTRLA_CPTEN2_Pos)
+#define TCC_CTRLA_CPTEN3_Pos        27           /**< \brief (TCC_CTRLA) Capture Channel 3 Enable */
+#define TCC_CTRLA_CPTEN3            (1 << TCC_CTRLA_CPTEN3_Pos)
+#define TCC_CTRLA_CPTEN_Pos         24           /**< \brief (TCC_CTRLA) Capture Channel x Enable */
+#define TCC_CTRLA_CPTEN_Msk         (0xFu << TCC_CTRLA_CPTEN_Pos)
+#define TCC_CTRLA_CPTEN(value)      ((TCC_CTRLA_CPTEN_Msk & ((value) << TCC_CTRLA_CPTEN_Pos)))
+#define TCC_CTRLA_MASK              0x0F007F63u  /**< \brief (TCC_CTRLA) MASK Register */
+
+/* -------- TCC_CTRLBCLR : (TCC Offset: 0x04) (R/W  8) Control B Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DIR:1;            /*!< bit:      0  Counter Direction                  */
+    uint8_t  LUPD:1;           /*!< bit:      1  Lock Update                        */
+    uint8_t  ONESHOT:1;        /*!< bit:      2  One-Shot                           */
+    uint8_t  IDXCMD:2;         /*!< bit:  3.. 4  Ramp Index Command                 */
+    uint8_t  CMD:3;            /*!< bit:  5.. 7  TCC Command                        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TCC_CTRLBCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_CTRLBCLR_OFFSET         0x04         /**< \brief (TCC_CTRLBCLR offset) Control B Clear */
+#define TCC_CTRLBCLR_RESETVALUE     0x00         /**< \brief (TCC_CTRLBCLR reset_value) Control B Clear */
+
+#define TCC_CTRLBCLR_DIR_Pos        0            /**< \brief (TCC_CTRLBCLR) Counter Direction */
+#define TCC_CTRLBCLR_DIR            (0x1u << TCC_CTRLBCLR_DIR_Pos)
+#define TCC_CTRLBCLR_LUPD_Pos       1            /**< \brief (TCC_CTRLBCLR) Lock Update */
+#define TCC_CTRLBCLR_LUPD           (0x1u << TCC_CTRLBCLR_LUPD_Pos)
+#define TCC_CTRLBCLR_ONESHOT_Pos    2            /**< \brief (TCC_CTRLBCLR) One-Shot */
+#define TCC_CTRLBCLR_ONESHOT        (0x1u << TCC_CTRLBCLR_ONESHOT_Pos)
+#define TCC_CTRLBCLR_IDXCMD_Pos     3            /**< \brief (TCC_CTRLBCLR) Ramp Index Command */
+#define TCC_CTRLBCLR_IDXCMD_Msk     (0x3u << TCC_CTRLBCLR_IDXCMD_Pos)
+#define TCC_CTRLBCLR_IDXCMD(value)  ((TCC_CTRLBCLR_IDXCMD_Msk & ((value) << TCC_CTRLBCLR_IDXCMD_Pos)))
+#define   TCC_CTRLBCLR_IDXCMD_DISABLE_Val 0x0u   /**< \brief (TCC_CTRLBCLR) Command disabled: IDX toggles between cycles A and B */
+#define   TCC_CTRLBCLR_IDXCMD_SET_Val     0x1u   /**< \brief (TCC_CTRLBCLR) Set IDX: cycle B will be forced in the next cycle */
+#define   TCC_CTRLBCLR_IDXCMD_CLEAR_Val   0x2u   /**< \brief (TCC_CTRLBCLR) Clear IDX: cycle A will be forced in next cycle */
+#define   TCC_CTRLBCLR_IDXCMD_HOLD_Val    0x3u   /**< \brief (TCC_CTRLBCLR) Hold IDX: the next cycle will be the same as the current cycle. */
+#define TCC_CTRLBCLR_IDXCMD_DISABLE (TCC_CTRLBCLR_IDXCMD_DISABLE_Val << TCC_CTRLBCLR_IDXCMD_Pos)
+#define TCC_CTRLBCLR_IDXCMD_SET     (TCC_CTRLBCLR_IDXCMD_SET_Val   << TCC_CTRLBCLR_IDXCMD_Pos)
+#define TCC_CTRLBCLR_IDXCMD_CLEAR   (TCC_CTRLBCLR_IDXCMD_CLEAR_Val << TCC_CTRLBCLR_IDXCMD_Pos)
+#define TCC_CTRLBCLR_IDXCMD_HOLD    (TCC_CTRLBCLR_IDXCMD_HOLD_Val  << TCC_CTRLBCLR_IDXCMD_Pos)
+#define TCC_CTRLBCLR_CMD_Pos        5            /**< \brief (TCC_CTRLBCLR) TCC Command */
+#define TCC_CTRLBCLR_CMD_Msk        (0x7u << TCC_CTRLBCLR_CMD_Pos)
+#define TCC_CTRLBCLR_CMD(value)     ((TCC_CTRLBCLR_CMD_Msk & ((value) << TCC_CTRLBCLR_CMD_Pos)))
+#define   TCC_CTRLBCLR_CMD_NONE_Val       0x0u   /**< \brief (TCC_CTRLBCLR) No action */
+#define   TCC_CTRLBCLR_CMD_RETRIGGER_Val  0x1u   /**< \brief (TCC_CTRLBCLR) Clear start, restart or retrigger */
+#define   TCC_CTRLBCLR_CMD_STOP_Val       0x2u   /**< \brief (TCC_CTRLBCLR) Force stop */
+#define   TCC_CTRLBCLR_CMD_UPDATE_Val     0x3u   /**< \brief (TCC_CTRLBCLR) Force update of double buffered registers */
+#define   TCC_CTRLBCLR_CMD_READSYNC_Val   0x4u   /**< \brief (TCC_CTRLBCLR) Force COUNT read synchronization */
+#define TCC_CTRLBCLR_CMD_NONE       (TCC_CTRLBCLR_CMD_NONE_Val     << TCC_CTRLBCLR_CMD_Pos)
+#define TCC_CTRLBCLR_CMD_RETRIGGER  (TCC_CTRLBCLR_CMD_RETRIGGER_Val << TCC_CTRLBCLR_CMD_Pos)
+#define TCC_CTRLBCLR_CMD_STOP       (TCC_CTRLBCLR_CMD_STOP_Val     << TCC_CTRLBCLR_CMD_Pos)
+#define TCC_CTRLBCLR_CMD_UPDATE     (TCC_CTRLBCLR_CMD_UPDATE_Val   << TCC_CTRLBCLR_CMD_Pos)
+#define TCC_CTRLBCLR_CMD_READSYNC   (TCC_CTRLBCLR_CMD_READSYNC_Val << TCC_CTRLBCLR_CMD_Pos)
+#define TCC_CTRLBCLR_MASK           0xFFu        /**< \brief (TCC_CTRLBCLR) MASK Register */
+
+/* -------- TCC_CTRLBSET : (TCC Offset: 0x05) (R/W  8) Control B Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DIR:1;            /*!< bit:      0  Counter Direction                  */
+    uint8_t  LUPD:1;           /*!< bit:      1  Lock update                        */
+    uint8_t  ONESHOT:1;        /*!< bit:      2  One-Shot                           */
+    uint8_t  IDXCMD:2;         /*!< bit:  3.. 4  Ramp Index Command                 */
+    uint8_t  CMD:3;            /*!< bit:  5.. 7  TCC Command                        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TCC_CTRLBSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_CTRLBSET_OFFSET         0x05         /**< \brief (TCC_CTRLBSET offset) Control B Set */
+#define TCC_CTRLBSET_RESETVALUE     0x00         /**< \brief (TCC_CTRLBSET reset_value) Control B Set */
+
+#define TCC_CTRLBSET_DIR_Pos        0            /**< \brief (TCC_CTRLBSET) Counter Direction */
+#define TCC_CTRLBSET_DIR            (0x1u << TCC_CTRLBSET_DIR_Pos)
+#define TCC_CTRLBSET_LUPD_Pos       1            /**< \brief (TCC_CTRLBSET) Lock update */
+#define TCC_CTRLBSET_LUPD           (0x1u << TCC_CTRLBSET_LUPD_Pos)
+#define TCC_CTRLBSET_ONESHOT_Pos    2            /**< \brief (TCC_CTRLBSET) One-Shot */
+#define TCC_CTRLBSET_ONESHOT        (0x1u << TCC_CTRLBSET_ONESHOT_Pos)
+#define TCC_CTRLBSET_IDXCMD_Pos     3            /**< \brief (TCC_CTRLBSET) Ramp Index Command */
+#define TCC_CTRLBSET_IDXCMD_Msk     (0x3u << TCC_CTRLBSET_IDXCMD_Pos)
+#define TCC_CTRLBSET_IDXCMD(value)  ((TCC_CTRLBSET_IDXCMD_Msk & ((value) << TCC_CTRLBSET_IDXCMD_Pos)))
+#define   TCC_CTRLBSET_IDXCMD_DISABLE_Val 0x0u   /**< \brief (TCC_CTRLBSET)  */
+#define   TCC_CTRLBSET_IDXCMD_SET_Val     0x1u   /**< \brief (TCC_CTRLBSET)  */
+#define   TCC_CTRLBSET_IDXCMD_CLEAR_Val   0x2u   /**< \brief (TCC_CTRLBSET)  */
+#define   TCC_CTRLBSET_IDXCMD_HOLD_Val    0x3u   /**< \brief (TCC_CTRLBSET)  */
+#define TCC_CTRLBSET_IDXCMD_DISABLE (TCC_CTRLBSET_IDXCMD_DISABLE_Val << TCC_CTRLBSET_IDXCMD_Pos)
+#define TCC_CTRLBSET_IDXCMD_SET     (TCC_CTRLBSET_IDXCMD_SET_Val   << TCC_CTRLBSET_IDXCMD_Pos)
+#define TCC_CTRLBSET_IDXCMD_CLEAR   (TCC_CTRLBSET_IDXCMD_CLEAR_Val << TCC_CTRLBSET_IDXCMD_Pos)
+#define TCC_CTRLBSET_IDXCMD_HOLD    (TCC_CTRLBSET_IDXCMD_HOLD_Val  << TCC_CTRLBSET_IDXCMD_Pos)
+#define TCC_CTRLBSET_CMD_Pos        5            /**< \brief (TCC_CTRLBSET) TCC Command */
+#define TCC_CTRLBSET_CMD_Msk        (0x7u << TCC_CTRLBSET_CMD_Pos)
+#define TCC_CTRLBSET_CMD(value)     ((TCC_CTRLBSET_CMD_Msk & ((value) << TCC_CTRLBSET_CMD_Pos)))
+#define   TCC_CTRLBSET_CMD_NONE_Val       0x0u   /**< \brief (TCC_CTRLBSET)  */
+#define   TCC_CTRLBSET_CMD_RETRIGGER_Val  0x1u   /**< \brief (TCC_CTRLBSET)  */
+#define   TCC_CTRLBSET_CMD_STOP_Val       0x2u   /**< \brief (TCC_CTRLBSET)  */
+#define   TCC_CTRLBSET_CMD_UPDATE_Val     0x3u   /**< \brief (TCC_CTRLBSET)  */
+#define   TCC_CTRLBSET_CMD_READSYNC_Val   0x4u   /**< \brief (TCC_CTRLBSET)  */
+#define TCC_CTRLBSET_CMD_NONE       (TCC_CTRLBSET_CMD_NONE_Val     << TCC_CTRLBSET_CMD_Pos)
+#define TCC_CTRLBSET_CMD_RETRIGGER  (TCC_CTRLBSET_CMD_RETRIGGER_Val << TCC_CTRLBSET_CMD_Pos)
+#define TCC_CTRLBSET_CMD_STOP       (TCC_CTRLBSET_CMD_STOP_Val     << TCC_CTRLBSET_CMD_Pos)
+#define TCC_CTRLBSET_CMD_UPDATE     (TCC_CTRLBSET_CMD_UPDATE_Val   << TCC_CTRLBSET_CMD_Pos)
+#define TCC_CTRLBSET_CMD_READSYNC   (TCC_CTRLBSET_CMD_READSYNC_Val << TCC_CTRLBSET_CMD_Pos)
+#define TCC_CTRLBSET_MASK           0xFFu        /**< \brief (TCC_CTRLBSET) MASK Register */
+
+/* -------- TCC_SYNCBUSY : (TCC Offset: 0x08) (R/  32) Synchronization Busy -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SWRST:1;          /*!< bit:      0  Swrst Busy                         */
+    uint32_t ENABLE:1;         /*!< bit:      1  Enable Busy                        */
+    uint32_t CTRLB:1;          /*!< bit:      2  Ctrlb Busy                         */
+    uint32_t STATUS:1;         /*!< bit:      3  Status Busy                        */
+    uint32_t COUNT:1;          /*!< bit:      4  Count Busy                         */
+    uint32_t PATT:1;           /*!< bit:      5  Pattern Busy                       */
+    uint32_t WAVE:1;           /*!< bit:      6  Wave Busy                          */
+    uint32_t PER:1;            /*!< bit:      7  Period busy                        */
+    uint32_t CC0:1;            /*!< bit:      8  Compare Channel Buffer 0 Busy      */
+    uint32_t CC1:1;            /*!< bit:      9  Compare Channel Buffer 1 Busy      */
+    uint32_t CC2:1;            /*!< bit:     10  Compare Channel Buffer 2 Busy      */
+    uint32_t CC3:1;            /*!< bit:     11  Compare Channel Buffer 3 Busy      */
+    uint32_t :4;               /*!< bit: 12..15  Reserved                           */
+    uint32_t PATTB:1;          /*!< bit:     16  Pattern Buffer Busy                */
+    uint32_t WAVEB:1;          /*!< bit:     17  Wave Buffer Busy                   */
+    uint32_t PERB:1;           /*!< bit:     18  Period Buffer Busy                 */
+    uint32_t CCB0:1;           /*!< bit:     19  Compare Channel Buffer 0 Busy      */
+    uint32_t CCB1:1;           /*!< bit:     20  Compare Channel Buffer 1 Busy      */
+    uint32_t CCB2:1;           /*!< bit:     21  Compare Channel Buffer 2 Busy      */
+    uint32_t CCB3:1;           /*!< bit:     22  Compare Channel Buffer 3 Busy      */
+    uint32_t :9;               /*!< bit: 23..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :8;               /*!< bit:  0.. 7  Reserved                           */
+    uint32_t CC:4;             /*!< bit:  8..11  Compare Channel Buffer x Busy      */
+    uint32_t :7;               /*!< bit: 12..18  Reserved                           */
+    uint32_t CCB:4;            /*!< bit: 19..22  Compare Channel Buffer x Busy      */
+    uint32_t :9;               /*!< bit: 23..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_SYNCBUSY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_SYNCBUSY_OFFSET         0x08         /**< \brief (TCC_SYNCBUSY offset) Synchronization Busy */
+#define TCC_SYNCBUSY_RESETVALUE     0x00000000   /**< \brief (TCC_SYNCBUSY reset_value) Synchronization Busy */
+
+#define TCC_SYNCBUSY_SWRST_Pos      0            /**< \brief (TCC_SYNCBUSY) Swrst Busy */
+#define TCC_SYNCBUSY_SWRST          (0x1u << TCC_SYNCBUSY_SWRST_Pos)
+#define TCC_SYNCBUSY_ENABLE_Pos     1            /**< \brief (TCC_SYNCBUSY) Enable Busy */
+#define TCC_SYNCBUSY_ENABLE         (0x1u << TCC_SYNCBUSY_ENABLE_Pos)
+#define TCC_SYNCBUSY_CTRLB_Pos      2            /**< \brief (TCC_SYNCBUSY) Ctrlb Busy */
+#define TCC_SYNCBUSY_CTRLB          (0x1u << TCC_SYNCBUSY_CTRLB_Pos)
+#define TCC_SYNCBUSY_STATUS_Pos     3            /**< \brief (TCC_SYNCBUSY) Status Busy */
+#define TCC_SYNCBUSY_STATUS         (0x1u << TCC_SYNCBUSY_STATUS_Pos)
+#define TCC_SYNCBUSY_COUNT_Pos      4            /**< \brief (TCC_SYNCBUSY) Count Busy */
+#define TCC_SYNCBUSY_COUNT          (0x1u << TCC_SYNCBUSY_COUNT_Pos)
+#define TCC_SYNCBUSY_PATT_Pos       5            /**< \brief (TCC_SYNCBUSY) Pattern Busy */
+#define TCC_SYNCBUSY_PATT           (0x1u << TCC_SYNCBUSY_PATT_Pos)
+#define TCC_SYNCBUSY_WAVE_Pos       6            /**< \brief (TCC_SYNCBUSY) Wave Busy */
+#define TCC_SYNCBUSY_WAVE           (0x1u << TCC_SYNCBUSY_WAVE_Pos)
+#define TCC_SYNCBUSY_PER_Pos        7            /**< \brief (TCC_SYNCBUSY) Period busy */
+#define TCC_SYNCBUSY_PER            (0x1u << TCC_SYNCBUSY_PER_Pos)
+#define TCC_SYNCBUSY_CC0_Pos        8            /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer 0 Busy */
+#define TCC_SYNCBUSY_CC0            (1 << TCC_SYNCBUSY_CC0_Pos)
+#define TCC_SYNCBUSY_CC1_Pos        9            /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer 1 Busy */
+#define TCC_SYNCBUSY_CC1            (1 << TCC_SYNCBUSY_CC1_Pos)
+#define TCC_SYNCBUSY_CC2_Pos        10           /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer 2 Busy */
+#define TCC_SYNCBUSY_CC2            (1 << TCC_SYNCBUSY_CC2_Pos)
+#define TCC_SYNCBUSY_CC3_Pos        11           /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer 3 Busy */
+#define TCC_SYNCBUSY_CC3            (1 << TCC_SYNCBUSY_CC3_Pos)
+#define TCC_SYNCBUSY_CC_Pos         8            /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer x Busy */
+#define TCC_SYNCBUSY_CC_Msk         (0xFu << TCC_SYNCBUSY_CC_Pos)
+#define TCC_SYNCBUSY_CC(value)      ((TCC_SYNCBUSY_CC_Msk & ((value) << TCC_SYNCBUSY_CC_Pos)))
+#define TCC_SYNCBUSY_PATTB_Pos      16           /**< \brief (TCC_SYNCBUSY) Pattern Buffer Busy */
+#define TCC_SYNCBUSY_PATTB          (0x1u << TCC_SYNCBUSY_PATTB_Pos)
+#define TCC_SYNCBUSY_WAVEB_Pos      17           /**< \brief (TCC_SYNCBUSY) Wave Buffer Busy */
+#define TCC_SYNCBUSY_WAVEB          (0x1u << TCC_SYNCBUSY_WAVEB_Pos)
+#define TCC_SYNCBUSY_PERB_Pos       18           /**< \brief (TCC_SYNCBUSY) Period Buffer Busy */
+#define TCC_SYNCBUSY_PERB           (0x1u << TCC_SYNCBUSY_PERB_Pos)
+#define TCC_SYNCBUSY_CCB0_Pos       19           /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer 0 Busy */
+#define TCC_SYNCBUSY_CCB0           (1 << TCC_SYNCBUSY_CCB0_Pos)
+#define TCC_SYNCBUSY_CCB1_Pos       20           /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer 1 Busy */
+#define TCC_SYNCBUSY_CCB1           (1 << TCC_SYNCBUSY_CCB1_Pos)
+#define TCC_SYNCBUSY_CCB2_Pos       21           /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer 2 Busy */
+#define TCC_SYNCBUSY_CCB2           (1 << TCC_SYNCBUSY_CCB2_Pos)
+#define TCC_SYNCBUSY_CCB3_Pos       22           /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer 3 Busy */
+#define TCC_SYNCBUSY_CCB3           (1 << TCC_SYNCBUSY_CCB3_Pos)
+#define TCC_SYNCBUSY_CCB_Pos        19           /**< \brief (TCC_SYNCBUSY) Compare Channel Buffer x Busy */
+#define TCC_SYNCBUSY_CCB_Msk        (0xFu << TCC_SYNCBUSY_CCB_Pos)
+#define TCC_SYNCBUSY_CCB(value)     ((TCC_SYNCBUSY_CCB_Msk & ((value) << TCC_SYNCBUSY_CCB_Pos)))
+#define TCC_SYNCBUSY_MASK           0x007F0FFFu  /**< \brief (TCC_SYNCBUSY) MASK Register */
+
+/* -------- TCC_FCTRLA : (TCC Offset: 0x0C) (R/W 32) Recoverable FaultA Configuration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SRC:2;            /*!< bit:  0.. 1  FaultA Source                      */
+    uint32_t :1;               /*!< bit:      2  Reserved                           */
+    uint32_t KEEP:1;           /*!< bit:      3  FaultA Keeper                      */
+    uint32_t QUAL:1;           /*!< bit:      4  FaultA Qualification               */
+    uint32_t BLANK:2;          /*!< bit:  5.. 6  FaultA Blanking Mode               */
+    uint32_t RESTART:1;        /*!< bit:      7  FaultA Restart                     */
+    uint32_t HALT:2;           /*!< bit:  8.. 9  FaultA Halt Mode                   */
+    uint32_t CHSEL:2;          /*!< bit: 10..11  FaultA Capture Channel             */
+    uint32_t CAPTURE:3;        /*!< bit: 12..14  FaultA Capture Action              */
+    uint32_t :1;               /*!< bit:     15  Reserved                           */
+    uint32_t BLANKVAL:8;       /*!< bit: 16..23  FaultA Blanking Time               */
+    uint32_t FILTERVAL:4;      /*!< bit: 24..27  FaultA Filter Value                */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_FCTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_FCTRLA_OFFSET           0x0C         /**< \brief (TCC_FCTRLA offset) Recoverable FaultA Configuration */
+#define TCC_FCTRLA_RESETVALUE       0x00000000   /**< \brief (TCC_FCTRLA reset_value) Recoverable FaultA Configuration */
+
+#define TCC_FCTRLA_SRC_Pos          0            /**< \brief (TCC_FCTRLA) FaultA Source */
+#define TCC_FCTRLA_SRC_Msk          (0x3u << TCC_FCTRLA_SRC_Pos)
+#define TCC_FCTRLA_SRC(value)       ((TCC_FCTRLA_SRC_Msk & ((value) << TCC_FCTRLA_SRC_Pos)))
+#define   TCC_FCTRLA_SRC_DISABLE_Val      0x0u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_SRC_ENABLE_Val       0x1u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_SRC_INVERT_Val       0x2u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_SRC_ALTFAULT_Val     0x3u   /**< \brief (TCC_FCTRLA)  */
+#define TCC_FCTRLA_SRC_DISABLE      (TCC_FCTRLA_SRC_DISABLE_Val    << TCC_FCTRLA_SRC_Pos)
+#define TCC_FCTRLA_SRC_ENABLE       (TCC_FCTRLA_SRC_ENABLE_Val     << TCC_FCTRLA_SRC_Pos)
+#define TCC_FCTRLA_SRC_INVERT       (TCC_FCTRLA_SRC_INVERT_Val     << TCC_FCTRLA_SRC_Pos)
+#define TCC_FCTRLA_SRC_ALTFAULT     (TCC_FCTRLA_SRC_ALTFAULT_Val   << TCC_FCTRLA_SRC_Pos)
+#define TCC_FCTRLA_KEEP_Pos         3            /**< \brief (TCC_FCTRLA) FaultA Keeper */
+#define TCC_FCTRLA_KEEP             (0x1u << TCC_FCTRLA_KEEP_Pos)
+#define TCC_FCTRLA_QUAL_Pos         4            /**< \brief (TCC_FCTRLA) FaultA Qualification */
+#define TCC_FCTRLA_QUAL             (0x1u << TCC_FCTRLA_QUAL_Pos)
+#define TCC_FCTRLA_BLANK_Pos        5            /**< \brief (TCC_FCTRLA) FaultA Blanking Mode */
+#define TCC_FCTRLA_BLANK_Msk        (0x3u << TCC_FCTRLA_BLANK_Pos)
+#define TCC_FCTRLA_BLANK(value)     ((TCC_FCTRLA_BLANK_Msk & ((value) << TCC_FCTRLA_BLANK_Pos)))
+#define   TCC_FCTRLA_BLANK_DISABLE_Val    0x0u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_BLANK_RISE_Val       0x1u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_BLANK_FALL_Val       0x2u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_BLANK_BOTH_Val       0x3u   /**< \brief (TCC_FCTRLA)  */
+#define TCC_FCTRLA_BLANK_DISABLE    (TCC_FCTRLA_BLANK_DISABLE_Val  << TCC_FCTRLA_BLANK_Pos)
+#define TCC_FCTRLA_BLANK_RISE       (TCC_FCTRLA_BLANK_RISE_Val     << TCC_FCTRLA_BLANK_Pos)
+#define TCC_FCTRLA_BLANK_FALL       (TCC_FCTRLA_BLANK_FALL_Val     << TCC_FCTRLA_BLANK_Pos)
+#define TCC_FCTRLA_BLANK_BOTH       (TCC_FCTRLA_BLANK_BOTH_Val     << TCC_FCTRLA_BLANK_Pos)
+#define TCC_FCTRLA_RESTART_Pos      7            /**< \brief (TCC_FCTRLA) FaultA Restart */
+#define TCC_FCTRLA_RESTART          (0x1u << TCC_FCTRLA_RESTART_Pos)
+#define TCC_FCTRLA_HALT_Pos         8            /**< \brief (TCC_FCTRLA) FaultA Halt Mode */
+#define TCC_FCTRLA_HALT_Msk         (0x3u << TCC_FCTRLA_HALT_Pos)
+#define TCC_FCTRLA_HALT(value)      ((TCC_FCTRLA_HALT_Msk & ((value) << TCC_FCTRLA_HALT_Pos)))
+#define   TCC_FCTRLA_HALT_DISABLE_Val     0x0u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_HALT_HW_Val          0x1u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_HALT_SW_Val          0x2u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_HALT_NR_Val          0x3u   /**< \brief (TCC_FCTRLA)  */
+#define TCC_FCTRLA_HALT_DISABLE     (TCC_FCTRLA_HALT_DISABLE_Val   << TCC_FCTRLA_HALT_Pos)
+#define TCC_FCTRLA_HALT_HW          (TCC_FCTRLA_HALT_HW_Val        << TCC_FCTRLA_HALT_Pos)
+#define TCC_FCTRLA_HALT_SW          (TCC_FCTRLA_HALT_SW_Val        << TCC_FCTRLA_HALT_Pos)
+#define TCC_FCTRLA_HALT_NR          (TCC_FCTRLA_HALT_NR_Val        << TCC_FCTRLA_HALT_Pos)
+#define TCC_FCTRLA_CHSEL_Pos        10           /**< \brief (TCC_FCTRLA) FaultA Capture Channel */
+#define TCC_FCTRLA_CHSEL_Msk        (0x3u << TCC_FCTRLA_CHSEL_Pos)
+#define TCC_FCTRLA_CHSEL(value)     ((TCC_FCTRLA_CHSEL_Msk & ((value) << TCC_FCTRLA_CHSEL_Pos)))
+#define   TCC_FCTRLA_CHSEL_CC0_Val        0x0u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_CHSEL_CC1_Val        0x1u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_CHSEL_CC2_Val        0x2u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_CHSEL_CC3_Val        0x3u   /**< \brief (TCC_FCTRLA)  */
+#define TCC_FCTRLA_CHSEL_CC0        (TCC_FCTRLA_CHSEL_CC0_Val      << TCC_FCTRLA_CHSEL_Pos)
+#define TCC_FCTRLA_CHSEL_CC1        (TCC_FCTRLA_CHSEL_CC1_Val      << TCC_FCTRLA_CHSEL_Pos)
+#define TCC_FCTRLA_CHSEL_CC2        (TCC_FCTRLA_CHSEL_CC2_Val      << TCC_FCTRLA_CHSEL_Pos)
+#define TCC_FCTRLA_CHSEL_CC3        (TCC_FCTRLA_CHSEL_CC3_Val      << TCC_FCTRLA_CHSEL_Pos)
+#define TCC_FCTRLA_CAPTURE_Pos      12           /**< \brief (TCC_FCTRLA) FaultA Capture Action */
+#define TCC_FCTRLA_CAPTURE_Msk      (0x7u << TCC_FCTRLA_CAPTURE_Pos)
+#define TCC_FCTRLA_CAPTURE(value)   ((TCC_FCTRLA_CAPTURE_Msk & ((value) << TCC_FCTRLA_CAPTURE_Pos)))
+#define   TCC_FCTRLA_CAPTURE_DISABLE_Val  0x0u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_CAPTURE_CAPT_Val     0x1u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_CAPTURE_CAPTMIN_Val  0x2u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_CAPTURE_CAPTMAX_Val  0x3u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_CAPTURE_LOCMIN_Val   0x4u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_CAPTURE_LOCMAX_Val   0x5u   /**< \brief (TCC_FCTRLA)  */
+#define   TCC_FCTRLA_CAPTURE_DERIV0_Val   0x6u   /**< \brief (TCC_FCTRLA)  */
+#define TCC_FCTRLA_CAPTURE_DISABLE  (TCC_FCTRLA_CAPTURE_DISABLE_Val << TCC_FCTRLA_CAPTURE_Pos)
+#define TCC_FCTRLA_CAPTURE_CAPT     (TCC_FCTRLA_CAPTURE_CAPT_Val   << TCC_FCTRLA_CAPTURE_Pos)
+#define TCC_FCTRLA_CAPTURE_CAPTMIN  (TCC_FCTRLA_CAPTURE_CAPTMIN_Val << TCC_FCTRLA_CAPTURE_Pos)
+#define TCC_FCTRLA_CAPTURE_CAPTMAX  (TCC_FCTRLA_CAPTURE_CAPTMAX_Val << TCC_FCTRLA_CAPTURE_Pos)
+#define TCC_FCTRLA_CAPTURE_LOCMIN   (TCC_FCTRLA_CAPTURE_LOCMIN_Val << TCC_FCTRLA_CAPTURE_Pos)
+#define TCC_FCTRLA_CAPTURE_LOCMAX   (TCC_FCTRLA_CAPTURE_LOCMAX_Val << TCC_FCTRLA_CAPTURE_Pos)
+#define TCC_FCTRLA_CAPTURE_DERIV0   (TCC_FCTRLA_CAPTURE_DERIV0_Val << TCC_FCTRLA_CAPTURE_Pos)
+#define TCC_FCTRLA_BLANKVAL_Pos     16           /**< \brief (TCC_FCTRLA) FaultA Blanking Time */
+#define TCC_FCTRLA_BLANKVAL_Msk     (0xFFu << TCC_FCTRLA_BLANKVAL_Pos)
+#define TCC_FCTRLA_BLANKVAL(value)  ((TCC_FCTRLA_BLANKVAL_Msk & ((value) << TCC_FCTRLA_BLANKVAL_Pos)))
+#define TCC_FCTRLA_FILTERVAL_Pos    24           /**< \brief (TCC_FCTRLA) FaultA Filter Value */
+#define TCC_FCTRLA_FILTERVAL_Msk    (0xFu << TCC_FCTRLA_FILTERVAL_Pos)
+#define TCC_FCTRLA_FILTERVAL(value) ((TCC_FCTRLA_FILTERVAL_Msk & ((value) << TCC_FCTRLA_FILTERVAL_Pos)))
+#define TCC_FCTRLA_MASK             0x0FFF7FFBu  /**< \brief (TCC_FCTRLA) MASK Register */
+
+/* -------- TCC_FCTRLB : (TCC Offset: 0x10) (R/W 32) Recoverable FaultB Configuration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t SRC:2;            /*!< bit:  0.. 1  FaultB Source                      */
+    uint32_t :1;               /*!< bit:      2  Reserved                           */
+    uint32_t KEEP:1;           /*!< bit:      3  FaultB Keeper                      */
+    uint32_t QUAL:1;           /*!< bit:      4  FaultB Qualification               */
+    uint32_t BLANK:2;          /*!< bit:  5.. 6  FaultB Blanking Mode               */
+    uint32_t RESTART:1;        /*!< bit:      7  FaultB Restart                     */
+    uint32_t HALT:2;           /*!< bit:  8.. 9  FaultB Halt Mode                   */
+    uint32_t CHSEL:2;          /*!< bit: 10..11  FaultB Capture Channel             */
+    uint32_t CAPTURE:3;        /*!< bit: 12..14  FaultB Capture Action              */
+    uint32_t :1;               /*!< bit:     15  Reserved                           */
+    uint32_t BLANKVAL:8;       /*!< bit: 16..23  FaultB Blanking Time               */
+    uint32_t FILTERVAL:4;      /*!< bit: 24..27  FaultB Filter Value                */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_FCTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_FCTRLB_OFFSET           0x10         /**< \brief (TCC_FCTRLB offset) Recoverable FaultB Configuration */
+#define TCC_FCTRLB_RESETVALUE       0x00000000   /**< \brief (TCC_FCTRLB reset_value) Recoverable FaultB Configuration */
+
+#define TCC_FCTRLB_SRC_Pos          0            /**< \brief (TCC_FCTRLB) FaultB Source */
+#define TCC_FCTRLB_SRC_Msk          (0x3u << TCC_FCTRLB_SRC_Pos)
+#define TCC_FCTRLB_SRC(value)       ((TCC_FCTRLB_SRC_Msk & ((value) << TCC_FCTRLB_SRC_Pos)))
+#define   TCC_FCTRLB_SRC_DISABLE_Val      0x0u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_SRC_ENABLE_Val       0x1u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_SRC_INVERT_Val       0x2u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_SRC_ALTFAULT_Val     0x3u   /**< \brief (TCC_FCTRLB)  */
+#define TCC_FCTRLB_SRC_DISABLE      (TCC_FCTRLB_SRC_DISABLE_Val    << TCC_FCTRLB_SRC_Pos)
+#define TCC_FCTRLB_SRC_ENABLE       (TCC_FCTRLB_SRC_ENABLE_Val     << TCC_FCTRLB_SRC_Pos)
+#define TCC_FCTRLB_SRC_INVERT       (TCC_FCTRLB_SRC_INVERT_Val     << TCC_FCTRLB_SRC_Pos)
+#define TCC_FCTRLB_SRC_ALTFAULT     (TCC_FCTRLB_SRC_ALTFAULT_Val   << TCC_FCTRLB_SRC_Pos)
+#define TCC_FCTRLB_KEEP_Pos         3            /**< \brief (TCC_FCTRLB) FaultB Keeper */
+#define TCC_FCTRLB_KEEP             (0x1u << TCC_FCTRLB_KEEP_Pos)
+#define TCC_FCTRLB_QUAL_Pos         4            /**< \brief (TCC_FCTRLB) FaultB Qualification */
+#define TCC_FCTRLB_QUAL             (0x1u << TCC_FCTRLB_QUAL_Pos)
+#define TCC_FCTRLB_BLANK_Pos        5            /**< \brief (TCC_FCTRLB) FaultB Blanking Mode */
+#define TCC_FCTRLB_BLANK_Msk        (0x3u << TCC_FCTRLB_BLANK_Pos)
+#define TCC_FCTRLB_BLANK(value)     ((TCC_FCTRLB_BLANK_Msk & ((value) << TCC_FCTRLB_BLANK_Pos)))
+#define   TCC_FCTRLB_BLANK_DISABLE_Val    0x0u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_BLANK_RISE_Val       0x1u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_BLANK_FALL_Val       0x2u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_BLANK_BOTH_Val       0x3u   /**< \brief (TCC_FCTRLB)  */
+#define TCC_FCTRLB_BLANK_DISABLE    (TCC_FCTRLB_BLANK_DISABLE_Val  << TCC_FCTRLB_BLANK_Pos)
+#define TCC_FCTRLB_BLANK_RISE       (TCC_FCTRLB_BLANK_RISE_Val     << TCC_FCTRLB_BLANK_Pos)
+#define TCC_FCTRLB_BLANK_FALL       (TCC_FCTRLB_BLANK_FALL_Val     << TCC_FCTRLB_BLANK_Pos)
+#define TCC_FCTRLB_BLANK_BOTH       (TCC_FCTRLB_BLANK_BOTH_Val     << TCC_FCTRLB_BLANK_Pos)
+#define TCC_FCTRLB_RESTART_Pos      7            /**< \brief (TCC_FCTRLB) FaultB Restart */
+#define TCC_FCTRLB_RESTART          (0x1u << TCC_FCTRLB_RESTART_Pos)
+#define TCC_FCTRLB_HALT_Pos         8            /**< \brief (TCC_FCTRLB) FaultB Halt Mode */
+#define TCC_FCTRLB_HALT_Msk         (0x3u << TCC_FCTRLB_HALT_Pos)
+#define TCC_FCTRLB_HALT(value)      ((TCC_FCTRLB_HALT_Msk & ((value) << TCC_FCTRLB_HALT_Pos)))
+#define   TCC_FCTRLB_HALT_DISABLE_Val     0x0u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_HALT_HW_Val          0x1u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_HALT_SW_Val          0x2u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_HALT_NR_Val          0x3u   /**< \brief (TCC_FCTRLB)  */
+#define TCC_FCTRLB_HALT_DISABLE     (TCC_FCTRLB_HALT_DISABLE_Val   << TCC_FCTRLB_HALT_Pos)
+#define TCC_FCTRLB_HALT_HW          (TCC_FCTRLB_HALT_HW_Val        << TCC_FCTRLB_HALT_Pos)
+#define TCC_FCTRLB_HALT_SW          (TCC_FCTRLB_HALT_SW_Val        << TCC_FCTRLB_HALT_Pos)
+#define TCC_FCTRLB_HALT_NR          (TCC_FCTRLB_HALT_NR_Val        << TCC_FCTRLB_HALT_Pos)
+#define TCC_FCTRLB_CHSEL_Pos        10           /**< \brief (TCC_FCTRLB) FaultB Capture Channel */
+#define TCC_FCTRLB_CHSEL_Msk        (0x3u << TCC_FCTRLB_CHSEL_Pos)
+#define TCC_FCTRLB_CHSEL(value)     ((TCC_FCTRLB_CHSEL_Msk & ((value) << TCC_FCTRLB_CHSEL_Pos)))
+#define   TCC_FCTRLB_CHSEL_CC0_Val        0x0u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_CHSEL_CC1_Val        0x1u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_CHSEL_CC2_Val        0x2u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_CHSEL_CC3_Val        0x3u   /**< \brief (TCC_FCTRLB)  */
+#define TCC_FCTRLB_CHSEL_CC0        (TCC_FCTRLB_CHSEL_CC0_Val      << TCC_FCTRLB_CHSEL_Pos)
+#define TCC_FCTRLB_CHSEL_CC1        (TCC_FCTRLB_CHSEL_CC1_Val      << TCC_FCTRLB_CHSEL_Pos)
+#define TCC_FCTRLB_CHSEL_CC2        (TCC_FCTRLB_CHSEL_CC2_Val      << TCC_FCTRLB_CHSEL_Pos)
+#define TCC_FCTRLB_CHSEL_CC3        (TCC_FCTRLB_CHSEL_CC3_Val      << TCC_FCTRLB_CHSEL_Pos)
+#define TCC_FCTRLB_CAPTURE_Pos      12           /**< \brief (TCC_FCTRLB) FaultB Capture Action */
+#define TCC_FCTRLB_CAPTURE_Msk      (0x7u << TCC_FCTRLB_CAPTURE_Pos)
+#define TCC_FCTRLB_CAPTURE(value)   ((TCC_FCTRLB_CAPTURE_Msk & ((value) << TCC_FCTRLB_CAPTURE_Pos)))
+#define   TCC_FCTRLB_CAPTURE_DISABLE_Val  0x0u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_CAPTURE_CAPT_Val     0x1u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_CAPTURE_CAPTMIN_Val  0x2u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_CAPTURE_CAPTMAX_Val  0x3u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_CAPTURE_LOCMIN_Val   0x4u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_CAPTURE_LOCMAX_Val   0x5u   /**< \brief (TCC_FCTRLB)  */
+#define   TCC_FCTRLB_CAPTURE_DERIV0_Val   0x6u   /**< \brief (TCC_FCTRLB)  */
+#define TCC_FCTRLB_CAPTURE_DISABLE  (TCC_FCTRLB_CAPTURE_DISABLE_Val << TCC_FCTRLB_CAPTURE_Pos)
+#define TCC_FCTRLB_CAPTURE_CAPT     (TCC_FCTRLB_CAPTURE_CAPT_Val   << TCC_FCTRLB_CAPTURE_Pos)
+#define TCC_FCTRLB_CAPTURE_CAPTMIN  (TCC_FCTRLB_CAPTURE_CAPTMIN_Val << TCC_FCTRLB_CAPTURE_Pos)
+#define TCC_FCTRLB_CAPTURE_CAPTMAX  (TCC_FCTRLB_CAPTURE_CAPTMAX_Val << TCC_FCTRLB_CAPTURE_Pos)
+#define TCC_FCTRLB_CAPTURE_LOCMIN   (TCC_FCTRLB_CAPTURE_LOCMIN_Val << TCC_FCTRLB_CAPTURE_Pos)
+#define TCC_FCTRLB_CAPTURE_LOCMAX   (TCC_FCTRLB_CAPTURE_LOCMAX_Val << TCC_FCTRLB_CAPTURE_Pos)
+#define TCC_FCTRLB_CAPTURE_DERIV0   (TCC_FCTRLB_CAPTURE_DERIV0_Val << TCC_FCTRLB_CAPTURE_Pos)
+#define TCC_FCTRLB_BLANKVAL_Pos     16           /**< \brief (TCC_FCTRLB) FaultB Blanking Time */
+#define TCC_FCTRLB_BLANKVAL_Msk     (0xFFu << TCC_FCTRLB_BLANKVAL_Pos)
+#define TCC_FCTRLB_BLANKVAL(value)  ((TCC_FCTRLB_BLANKVAL_Msk & ((value) << TCC_FCTRLB_BLANKVAL_Pos)))
+#define TCC_FCTRLB_FILTERVAL_Pos    24           /**< \brief (TCC_FCTRLB) FaultB Filter Value */
+#define TCC_FCTRLB_FILTERVAL_Msk    (0xFu << TCC_FCTRLB_FILTERVAL_Pos)
+#define TCC_FCTRLB_FILTERVAL(value) ((TCC_FCTRLB_FILTERVAL_Msk & ((value) << TCC_FCTRLB_FILTERVAL_Pos)))
+#define TCC_FCTRLB_MASK             0x0FFF7FFBu  /**< \brief (TCC_FCTRLB) MASK Register */
+
+/* -------- TCC_WEXCTRL : (TCC Offset: 0x14) (R/W 32) Waveform Extension Configuration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OTMX:2;           /*!< bit:  0.. 1  Output Matrix                      */
+    uint32_t :6;               /*!< bit:  2.. 7  Reserved                           */
+    uint32_t DTIEN0:1;         /*!< bit:      8  Dead-time Insertion Generator 0 Enable */
+    uint32_t DTIEN1:1;         /*!< bit:      9  Dead-time Insertion Generator 1 Enable */
+    uint32_t DTIEN2:1;         /*!< bit:     10  Dead-time Insertion Generator 2 Enable */
+    uint32_t DTIEN3:1;         /*!< bit:     11  Dead-time Insertion Generator 3 Enable */
+    uint32_t :4;               /*!< bit: 12..15  Reserved                           */
+    uint32_t DTLS:8;           /*!< bit: 16..23  Dead-time Low Side Outputs Value   */
+    uint32_t DTHS:8;           /*!< bit: 24..31  Dead-time High Side Outputs Value  */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :8;               /*!< bit:  0.. 7  Reserved                           */
+    uint32_t DTIEN:4;          /*!< bit:  8..11  Dead-time Insertion Generator x Enable */
+    uint32_t :20;              /*!< bit: 12..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_WEXCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_WEXCTRL_OFFSET          0x14         /**< \brief (TCC_WEXCTRL offset) Waveform Extension Configuration */
+#define TCC_WEXCTRL_RESETVALUE      0x00000000   /**< \brief (TCC_WEXCTRL reset_value) Waveform Extension Configuration */
+
+#define TCC_WEXCTRL_OTMX_Pos        0            /**< \brief (TCC_WEXCTRL) Output Matrix */
+#define TCC_WEXCTRL_OTMX_Msk        (0x3u << TCC_WEXCTRL_OTMX_Pos)
+#define TCC_WEXCTRL_OTMX(value)     ((TCC_WEXCTRL_OTMX_Msk & ((value) << TCC_WEXCTRL_OTMX_Pos)))
+#define TCC_WEXCTRL_DTIEN0_Pos      8            /**< \brief (TCC_WEXCTRL) Dead-time Insertion Generator 0 Enable */
+#define TCC_WEXCTRL_DTIEN0          (1 << TCC_WEXCTRL_DTIEN0_Pos)
+#define TCC_WEXCTRL_DTIEN1_Pos      9            /**< \brief (TCC_WEXCTRL) Dead-time Insertion Generator 1 Enable */
+#define TCC_WEXCTRL_DTIEN1          (1 << TCC_WEXCTRL_DTIEN1_Pos)
+#define TCC_WEXCTRL_DTIEN2_Pos      10           /**< \brief (TCC_WEXCTRL) Dead-time Insertion Generator 2 Enable */
+#define TCC_WEXCTRL_DTIEN2          (1 << TCC_WEXCTRL_DTIEN2_Pos)
+#define TCC_WEXCTRL_DTIEN3_Pos      11           /**< \brief (TCC_WEXCTRL) Dead-time Insertion Generator 3 Enable */
+#define TCC_WEXCTRL_DTIEN3          (1 << TCC_WEXCTRL_DTIEN3_Pos)
+#define TCC_WEXCTRL_DTIEN_Pos       8            /**< \brief (TCC_WEXCTRL) Dead-time Insertion Generator x Enable */
+#define TCC_WEXCTRL_DTIEN_Msk       (0xFu << TCC_WEXCTRL_DTIEN_Pos)
+#define TCC_WEXCTRL_DTIEN(value)    ((TCC_WEXCTRL_DTIEN_Msk & ((value) << TCC_WEXCTRL_DTIEN_Pos)))
+#define TCC_WEXCTRL_DTLS_Pos        16           /**< \brief (TCC_WEXCTRL) Dead-time Low Side Outputs Value */
+#define TCC_WEXCTRL_DTLS_Msk        (0xFFu << TCC_WEXCTRL_DTLS_Pos)
+#define TCC_WEXCTRL_DTLS(value)     ((TCC_WEXCTRL_DTLS_Msk & ((value) << TCC_WEXCTRL_DTLS_Pos)))
+#define TCC_WEXCTRL_DTHS_Pos        24           /**< \brief (TCC_WEXCTRL) Dead-time High Side Outputs Value */
+#define TCC_WEXCTRL_DTHS_Msk        (0xFFu << TCC_WEXCTRL_DTHS_Pos)
+#define TCC_WEXCTRL_DTHS(value)     ((TCC_WEXCTRL_DTHS_Msk & ((value) << TCC_WEXCTRL_DTHS_Pos)))
+#define TCC_WEXCTRL_MASK            0xFFFF0F03u  /**< \brief (TCC_WEXCTRL) MASK Register */
+
+/* -------- TCC_DRVCTRL : (TCC Offset: 0x18) (R/W 32) Driver Configuration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t NRE0:1;           /*!< bit:      0  Non-Recoverable State 0 Output Enable */
+    uint32_t NRE1:1;           /*!< bit:      1  Non-Recoverable State 1 Output Enable */
+    uint32_t NRE2:1;           /*!< bit:      2  Non-Recoverable State 2 Output Enable */
+    uint32_t NRE3:1;           /*!< bit:      3  Non-Recoverable State 3 Output Enable */
+    uint32_t NRE4:1;           /*!< bit:      4  Non-Recoverable State 4 Output Enable */
+    uint32_t NRE5:1;           /*!< bit:      5  Non-Recoverable State 5 Output Enable */
+    uint32_t NRE6:1;           /*!< bit:      6  Non-Recoverable State 6 Output Enable */
+    uint32_t NRE7:1;           /*!< bit:      7  Non-Recoverable State 7 Output Enable */
+    uint32_t NRV0:1;           /*!< bit:      8  Non-Recoverable State 0 Output Value */
+    uint32_t NRV1:1;           /*!< bit:      9  Non-Recoverable State 1 Output Value */
+    uint32_t NRV2:1;           /*!< bit:     10  Non-Recoverable State 2 Output Value */
+    uint32_t NRV3:1;           /*!< bit:     11  Non-Recoverable State 3 Output Value */
+    uint32_t NRV4:1;           /*!< bit:     12  Non-Recoverable State 4 Output Value */
+    uint32_t NRV5:1;           /*!< bit:     13  Non-Recoverable State 5 Output Value */
+    uint32_t NRV6:1;           /*!< bit:     14  Non-Recoverable State 6 Output Value */
+    uint32_t NRV7:1;           /*!< bit:     15  Non-Recoverable State 7 Output Value */
+    uint32_t INVEN0:1;         /*!< bit:     16  Output Waveform 0 Inversion        */
+    uint32_t INVEN1:1;         /*!< bit:     17  Output Waveform 1 Inversion        */
+    uint32_t INVEN2:1;         /*!< bit:     18  Output Waveform 2 Inversion        */
+    uint32_t INVEN3:1;         /*!< bit:     19  Output Waveform 3 Inversion        */
+    uint32_t INVEN4:1;         /*!< bit:     20  Output Waveform 4 Inversion        */
+    uint32_t INVEN5:1;         /*!< bit:     21  Output Waveform 5 Inversion        */
+    uint32_t INVEN6:1;         /*!< bit:     22  Output Waveform 6 Inversion        */
+    uint32_t INVEN7:1;         /*!< bit:     23  Output Waveform 7 Inversion        */
+    uint32_t FILTERVAL0:4;     /*!< bit: 24..27  Non-Recoverable Fault Input 0 Filter Value */
+    uint32_t FILTERVAL1:4;     /*!< bit: 28..31  Non-Recoverable Fault Input 1 Filter Value */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t NRE:8;            /*!< bit:  0.. 7  Non-Recoverable State x Output Enable */
+    uint32_t NRV:8;            /*!< bit:  8..15  Non-Recoverable State x Output Value */
+    uint32_t INVEN:8;          /*!< bit: 16..23  Output Waveform x Inversion        */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_DRVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_DRVCTRL_OFFSET          0x18         /**< \brief (TCC_DRVCTRL offset) Driver Configuration */
+#define TCC_DRVCTRL_RESETVALUE      0x00000000   /**< \brief (TCC_DRVCTRL reset_value) Driver Configuration */
+
+#define TCC_DRVCTRL_NRE0_Pos        0            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 0 Output Enable */
+#define TCC_DRVCTRL_NRE0            (1 << TCC_DRVCTRL_NRE0_Pos)
+#define TCC_DRVCTRL_NRE1_Pos        1            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 1 Output Enable */
+#define TCC_DRVCTRL_NRE1            (1 << TCC_DRVCTRL_NRE1_Pos)
+#define TCC_DRVCTRL_NRE2_Pos        2            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 2 Output Enable */
+#define TCC_DRVCTRL_NRE2            (1 << TCC_DRVCTRL_NRE2_Pos)
+#define TCC_DRVCTRL_NRE3_Pos        3            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 3 Output Enable */
+#define TCC_DRVCTRL_NRE3            (1 << TCC_DRVCTRL_NRE3_Pos)
+#define TCC_DRVCTRL_NRE4_Pos        4            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 4 Output Enable */
+#define TCC_DRVCTRL_NRE4            (1 << TCC_DRVCTRL_NRE4_Pos)
+#define TCC_DRVCTRL_NRE5_Pos        5            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 5 Output Enable */
+#define TCC_DRVCTRL_NRE5            (1 << TCC_DRVCTRL_NRE5_Pos)
+#define TCC_DRVCTRL_NRE6_Pos        6            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 6 Output Enable */
+#define TCC_DRVCTRL_NRE6            (1 << TCC_DRVCTRL_NRE6_Pos)
+#define TCC_DRVCTRL_NRE7_Pos        7            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 7 Output Enable */
+#define TCC_DRVCTRL_NRE7            (1 << TCC_DRVCTRL_NRE7_Pos)
+#define TCC_DRVCTRL_NRE_Pos         0            /**< \brief (TCC_DRVCTRL) Non-Recoverable State x Output Enable */
+#define TCC_DRVCTRL_NRE_Msk         (0xFFu << TCC_DRVCTRL_NRE_Pos)
+#define TCC_DRVCTRL_NRE(value)      ((TCC_DRVCTRL_NRE_Msk & ((value) << TCC_DRVCTRL_NRE_Pos)))
+#define TCC_DRVCTRL_NRV0_Pos        8            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 0 Output Value */
+#define TCC_DRVCTRL_NRV0            (1 << TCC_DRVCTRL_NRV0_Pos)
+#define TCC_DRVCTRL_NRV1_Pos        9            /**< \brief (TCC_DRVCTRL) Non-Recoverable State 1 Output Value */
+#define TCC_DRVCTRL_NRV1            (1 << TCC_DRVCTRL_NRV1_Pos)
+#define TCC_DRVCTRL_NRV2_Pos        10           /**< \brief (TCC_DRVCTRL) Non-Recoverable State 2 Output Value */
+#define TCC_DRVCTRL_NRV2            (1 << TCC_DRVCTRL_NRV2_Pos)
+#define TCC_DRVCTRL_NRV3_Pos        11           /**< \brief (TCC_DRVCTRL) Non-Recoverable State 3 Output Value */
+#define TCC_DRVCTRL_NRV3            (1 << TCC_DRVCTRL_NRV3_Pos)
+#define TCC_DRVCTRL_NRV4_Pos        12           /**< \brief (TCC_DRVCTRL) Non-Recoverable State 4 Output Value */
+#define TCC_DRVCTRL_NRV4            (1 << TCC_DRVCTRL_NRV4_Pos)
+#define TCC_DRVCTRL_NRV5_Pos        13           /**< \brief (TCC_DRVCTRL) Non-Recoverable State 5 Output Value */
+#define TCC_DRVCTRL_NRV5            (1 << TCC_DRVCTRL_NRV5_Pos)
+#define TCC_DRVCTRL_NRV6_Pos        14           /**< \brief (TCC_DRVCTRL) Non-Recoverable State 6 Output Value */
+#define TCC_DRVCTRL_NRV6            (1 << TCC_DRVCTRL_NRV6_Pos)
+#define TCC_DRVCTRL_NRV7_Pos        15           /**< \brief (TCC_DRVCTRL) Non-Recoverable State 7 Output Value */
+#define TCC_DRVCTRL_NRV7            (1 << TCC_DRVCTRL_NRV7_Pos)
+#define TCC_DRVCTRL_NRV_Pos         8            /**< \brief (TCC_DRVCTRL) Non-Recoverable State x Output Value */
+#define TCC_DRVCTRL_NRV_Msk         (0xFFu << TCC_DRVCTRL_NRV_Pos)
+#define TCC_DRVCTRL_NRV(value)      ((TCC_DRVCTRL_NRV_Msk & ((value) << TCC_DRVCTRL_NRV_Pos)))
+#define TCC_DRVCTRL_INVEN0_Pos      16           /**< \brief (TCC_DRVCTRL) Output Waveform 0 Inversion */
+#define TCC_DRVCTRL_INVEN0          (1 << TCC_DRVCTRL_INVEN0_Pos)
+#define TCC_DRVCTRL_INVEN1_Pos      17           /**< \brief (TCC_DRVCTRL) Output Waveform 1 Inversion */
+#define TCC_DRVCTRL_INVEN1          (1 << TCC_DRVCTRL_INVEN1_Pos)
+#define TCC_DRVCTRL_INVEN2_Pos      18           /**< \brief (TCC_DRVCTRL) Output Waveform 2 Inversion */
+#define TCC_DRVCTRL_INVEN2          (1 << TCC_DRVCTRL_INVEN2_Pos)
+#define TCC_DRVCTRL_INVEN3_Pos      19           /**< \brief (TCC_DRVCTRL) Output Waveform 3 Inversion */
+#define TCC_DRVCTRL_INVEN3          (1 << TCC_DRVCTRL_INVEN3_Pos)
+#define TCC_DRVCTRL_INVEN4_Pos      20           /**< \brief (TCC_DRVCTRL) Output Waveform 4 Inversion */
+#define TCC_DRVCTRL_INVEN4          (1 << TCC_DRVCTRL_INVEN4_Pos)
+#define TCC_DRVCTRL_INVEN5_Pos      21           /**< \brief (TCC_DRVCTRL) Output Waveform 5 Inversion */
+#define TCC_DRVCTRL_INVEN5          (1 << TCC_DRVCTRL_INVEN5_Pos)
+#define TCC_DRVCTRL_INVEN6_Pos      22           /**< \brief (TCC_DRVCTRL) Output Waveform 6 Inversion */
+#define TCC_DRVCTRL_INVEN6          (1 << TCC_DRVCTRL_INVEN6_Pos)
+#define TCC_DRVCTRL_INVEN7_Pos      23           /**< \brief (TCC_DRVCTRL) Output Waveform 7 Inversion */
+#define TCC_DRVCTRL_INVEN7          (1 << TCC_DRVCTRL_INVEN7_Pos)
+#define TCC_DRVCTRL_INVEN_Pos       16           /**< \brief (TCC_DRVCTRL) Output Waveform x Inversion */
+#define TCC_DRVCTRL_INVEN_Msk       (0xFFu << TCC_DRVCTRL_INVEN_Pos)
+#define TCC_DRVCTRL_INVEN(value)    ((TCC_DRVCTRL_INVEN_Msk & ((value) << TCC_DRVCTRL_INVEN_Pos)))
+#define TCC_DRVCTRL_FILTERVAL0_Pos  24           /**< \brief (TCC_DRVCTRL) Non-Recoverable Fault Input 0 Filter Value */
+#define TCC_DRVCTRL_FILTERVAL0_Msk  (0xFu << TCC_DRVCTRL_FILTERVAL0_Pos)
+#define TCC_DRVCTRL_FILTERVAL0(value) ((TCC_DRVCTRL_FILTERVAL0_Msk & ((value) << TCC_DRVCTRL_FILTERVAL0_Pos)))
+#define TCC_DRVCTRL_FILTERVAL1_Pos  28           /**< \brief (TCC_DRVCTRL) Non-Recoverable Fault Input 1 Filter Value */
+#define TCC_DRVCTRL_FILTERVAL1_Msk  (0xFu << TCC_DRVCTRL_FILTERVAL1_Pos)
+#define TCC_DRVCTRL_FILTERVAL1(value) ((TCC_DRVCTRL_FILTERVAL1_Msk & ((value) << TCC_DRVCTRL_FILTERVAL1_Pos)))
+#define TCC_DRVCTRL_MASK            0xFFFFFFFFu  /**< \brief (TCC_DRVCTRL) MASK Register */
+
+/* -------- TCC_DBGCTRL : (TCC Offset: 0x1E) (R/W  8) Debug Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DBGRUN:1;         /*!< bit:      0  Debug Running Mode                 */
+    uint8_t  :1;               /*!< bit:      1  Reserved                           */
+    uint8_t  FDDBD:1;          /*!< bit:      2  Fault Detection on Debug Break Detection */
+    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} TCC_DBGCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_DBGCTRL_OFFSET          0x1E         /**< \brief (TCC_DBGCTRL offset) Debug Control */
+#define TCC_DBGCTRL_RESETVALUE      0x00         /**< \brief (TCC_DBGCTRL reset_value) Debug Control */
+
+#define TCC_DBGCTRL_DBGRUN_Pos      0            /**< \brief (TCC_DBGCTRL) Debug Running Mode */
+#define TCC_DBGCTRL_DBGRUN          (0x1u << TCC_DBGCTRL_DBGRUN_Pos)
+#define TCC_DBGCTRL_FDDBD_Pos       2            /**< \brief (TCC_DBGCTRL) Fault Detection on Debug Break Detection */
+#define TCC_DBGCTRL_FDDBD           (0x1u << TCC_DBGCTRL_FDDBD_Pos)
+#define TCC_DBGCTRL_MASK            0x05u        /**< \brief (TCC_DBGCTRL) MASK Register */
+
+/* -------- TCC_EVCTRL : (TCC Offset: 0x20) (R/W 32) Event Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t EVACT0:3;         /*!< bit:  0.. 2  Timer/counter Input Event0 Action  */
+    uint32_t EVACT1:3;         /*!< bit:  3.. 5  Timer/counter Input Event1 Action  */
+    uint32_t CNTSEL:2;         /*!< bit:  6.. 7  Timer/counter Output Event Mode    */
+    uint32_t OVFEO:1;          /*!< bit:      8  Overflow/Underflow Output Event Enable */
+    uint32_t TRGEO:1;          /*!< bit:      9  Retrigger Output Event Enable      */
+    uint32_t CNTEO:1;          /*!< bit:     10  Timer/counter Output Event Enable  */
+    uint32_t :1;               /*!< bit:     11  Reserved                           */
+    uint32_t TCINV0:1;         /*!< bit:     12  Inverted Event 0 Input Enable      */
+    uint32_t TCINV1:1;         /*!< bit:     13  Inverted Event 1 Input Enable      */
+    uint32_t TCEI0:1;          /*!< bit:     14  Timer/counter Event 0 Input Enable */
+    uint32_t TCEI1:1;          /*!< bit:     15  Timer/counter Event 1 Input Enable */
+    uint32_t MCEI0:1;          /*!< bit:     16  Match or Capture Channel 0 Event Input Enable */
+    uint32_t MCEI1:1;          /*!< bit:     17  Match or Capture Channel 1 Event Input Enable */
+    uint32_t MCEI2:1;          /*!< bit:     18  Match or Capture Channel 2 Event Input Enable */
+    uint32_t MCEI3:1;          /*!< bit:     19  Match or Capture Channel 3 Event Input Enable */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t MCEO0:1;          /*!< bit:     24  Match or Capture Channel 0 Event Output Enable */
+    uint32_t MCEO1:1;          /*!< bit:     25  Match or Capture Channel 1 Event Output Enable */
+    uint32_t MCEO2:1;          /*!< bit:     26  Match or Capture Channel 2 Event Output Enable */
+    uint32_t MCEO3:1;          /*!< bit:     27  Match or Capture Channel 3 Event Output Enable */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :12;              /*!< bit:  0..11  Reserved                           */
+    uint32_t TCINV:2;          /*!< bit: 12..13  Inverted Event x Input Enable      */
+    uint32_t TCEI:2;           /*!< bit: 14..15  Timer/counter Event x Input Enable */
+    uint32_t MCEI:4;           /*!< bit: 16..19  Match or Capture Channel x Event Input Enable */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t MCEO:4;           /*!< bit: 24..27  Match or Capture Channel x Event Output Enable */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_EVCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_EVCTRL_OFFSET           0x20         /**< \brief (TCC_EVCTRL offset) Event Control */
+#define TCC_EVCTRL_RESETVALUE       0x00000000   /**< \brief (TCC_EVCTRL reset_value) Event Control */
+
+#define TCC_EVCTRL_EVACT0_Pos       0            /**< \brief (TCC_EVCTRL) Timer/counter Input Event0 Action */
+#define TCC_EVCTRL_EVACT0_Msk       (0x7u << TCC_EVCTRL_EVACT0_Pos)
+#define TCC_EVCTRL_EVACT0(value)    ((TCC_EVCTRL_EVACT0_Msk & ((value) << TCC_EVCTRL_EVACT0_Pos)))
+#define   TCC_EVCTRL_EVACT0_OFF_Val       0x0u   /**< \brief (TCC_EVCTRL) Event action disabled. */
+#define   TCC_EVCTRL_EVACT0_RETRIGGER_Val 0x1u   /**< \brief (TCC_EVCTRL) Start restart or re-trigger TC on event */
+#define   TCC_EVCTRL_EVACT0_COUNTEV_Val   0x2u   /**< \brief (TCC_EVCTRL) Count on event. Increment or decrement depending on count direction. */
+#define   TCC_EVCTRL_EVACT0_START_Val     0x3u   /**< \brief (TCC_EVCTRL) Count on event.Start counting on the event rising edge. Further events will not restart the counter; it keeps on counting using prescaled GCLK_TCCx, until it reaches TOP or Zero depending on the direction. */
+#define   TCC_EVCTRL_EVACT0_INC_Val       0x4u   /**< \brief (TCC_EVCTRL) Increment TC on EVENT. Increment the counter on event, irrespective of count direction */
+#define   TCC_EVCTRL_EVACT0_COUNT_Val     0x5u   /**< \brief (TCC_EVCTRL) Count on active state of asynchronous event */
+#define   TCC_EVCTRL_EVACT0_FAULT_Val     0x7u   /**< \brief (TCC_EVCTRL) Non-recoverable Fault */
+#define TCC_EVCTRL_EVACT0_OFF       (TCC_EVCTRL_EVACT0_OFF_Val     << TCC_EVCTRL_EVACT0_Pos)
+#define TCC_EVCTRL_EVACT0_RETRIGGER (TCC_EVCTRL_EVACT0_RETRIGGER_Val << TCC_EVCTRL_EVACT0_Pos)
+#define TCC_EVCTRL_EVACT0_COUNTEV   (TCC_EVCTRL_EVACT0_COUNTEV_Val << TCC_EVCTRL_EVACT0_Pos)
+#define TCC_EVCTRL_EVACT0_START     (TCC_EVCTRL_EVACT0_START_Val   << TCC_EVCTRL_EVACT0_Pos)
+#define TCC_EVCTRL_EVACT0_INC       (TCC_EVCTRL_EVACT0_INC_Val     << TCC_EVCTRL_EVACT0_Pos)
+#define TCC_EVCTRL_EVACT0_COUNT     (TCC_EVCTRL_EVACT0_COUNT_Val   << TCC_EVCTRL_EVACT0_Pos)
+#define TCC_EVCTRL_EVACT0_FAULT     (TCC_EVCTRL_EVACT0_FAULT_Val   << TCC_EVCTRL_EVACT0_Pos)
+#define TCC_EVCTRL_EVACT1_Pos       3            /**< \brief (TCC_EVCTRL) Timer/counter Input Event1 Action */
+#define TCC_EVCTRL_EVACT1_Msk       (0x7u << TCC_EVCTRL_EVACT1_Pos)
+#define TCC_EVCTRL_EVACT1(value)    ((TCC_EVCTRL_EVACT1_Msk & ((value) << TCC_EVCTRL_EVACT1_Pos)))
+#define   TCC_EVCTRL_EVACT1_OFF_Val       0x0u   /**< \brief (TCC_EVCTRL) Event action disabled. */
+#define   TCC_EVCTRL_EVACT1_RETRIGGER_Val 0x1u   /**< \brief (TCC_EVCTRL) Re-trigger TC on event */
+#define   TCC_EVCTRL_EVACT1_DIR_Val       0x2u   /**< \brief (TCC_EVCTRL) Direction control */
+#define   TCC_EVCTRL_EVACT1_STOP_Val      0x3u   /**< \brief (TCC_EVCTRL) Stop TC on event */
+#define   TCC_EVCTRL_EVACT1_DEC_Val       0x4u   /**< \brief (TCC_EVCTRL) Decrement TC on event */
+#define   TCC_EVCTRL_EVACT1_PPW_Val       0x5u   /**< \brief (TCC_EVCTRL) Period captured into CC0 Pulse Width on CC1 */
+#define   TCC_EVCTRL_EVACT1_PWP_Val       0x6u   /**< \brief (TCC_EVCTRL) Period captured into CC1 Pulse Width on CC0 */
+#define   TCC_EVCTRL_EVACT1_FAULT_Val     0x7u   /**< \brief (TCC_EVCTRL) Non-recoverable Fault */
+#define TCC_EVCTRL_EVACT1_OFF       (TCC_EVCTRL_EVACT1_OFF_Val     << TCC_EVCTRL_EVACT1_Pos)
+#define TCC_EVCTRL_EVACT1_RETRIGGER (TCC_EVCTRL_EVACT1_RETRIGGER_Val << TCC_EVCTRL_EVACT1_Pos)
+#define TCC_EVCTRL_EVACT1_DIR       (TCC_EVCTRL_EVACT1_DIR_Val     << TCC_EVCTRL_EVACT1_Pos)
+#define TCC_EVCTRL_EVACT1_STOP      (TCC_EVCTRL_EVACT1_STOP_Val    << TCC_EVCTRL_EVACT1_Pos)
+#define TCC_EVCTRL_EVACT1_DEC       (TCC_EVCTRL_EVACT1_DEC_Val     << TCC_EVCTRL_EVACT1_Pos)
+#define TCC_EVCTRL_EVACT1_PPW       (TCC_EVCTRL_EVACT1_PPW_Val     << TCC_EVCTRL_EVACT1_Pos)
+#define TCC_EVCTRL_EVACT1_PWP       (TCC_EVCTRL_EVACT1_PWP_Val     << TCC_EVCTRL_EVACT1_Pos)
+#define TCC_EVCTRL_EVACT1_FAULT     (TCC_EVCTRL_EVACT1_FAULT_Val   << TCC_EVCTRL_EVACT1_Pos)
+#define TCC_EVCTRL_CNTSEL_Pos       6            /**< \brief (TCC_EVCTRL) Timer/counter Output Event Mode */
+#define TCC_EVCTRL_CNTSEL_Msk       (0x3u << TCC_EVCTRL_CNTSEL_Pos)
+#define TCC_EVCTRL_CNTSEL(value)    ((TCC_EVCTRL_CNTSEL_Msk & ((value) << TCC_EVCTRL_CNTSEL_Pos)))
+#define   TCC_EVCTRL_CNTSEL_START_Val     0x0u   /**< \brief (TCC_EVCTRL) An interrupt/event is generated when a new counter cycle starts */
+#define   TCC_EVCTRL_CNTSEL_END_Val       0x1u   /**< \brief (TCC_EVCTRL) An interrupt/event is generated when a counter cycle ends */
+#define   TCC_EVCTRL_CNTSEL_BETWEEN_Val   0x2u   /**< \brief (TCC_EVCTRL) An interrupt/event is generated when a counter cycle ends, except for the first and last cycles. */
+#define   TCC_EVCTRL_CNTSEL_BOUNDARY_Val  0x3u   /**< \brief (TCC_EVCTRL) An interrupt/event is generated when a new counter cycle starts or a counter cycle ends */
+#define TCC_EVCTRL_CNTSEL_START     (TCC_EVCTRL_CNTSEL_START_Val   << TCC_EVCTRL_CNTSEL_Pos)
+#define TCC_EVCTRL_CNTSEL_END       (TCC_EVCTRL_CNTSEL_END_Val     << TCC_EVCTRL_CNTSEL_Pos)
+#define TCC_EVCTRL_CNTSEL_BETWEEN   (TCC_EVCTRL_CNTSEL_BETWEEN_Val << TCC_EVCTRL_CNTSEL_Pos)
+#define TCC_EVCTRL_CNTSEL_BOUNDARY  (TCC_EVCTRL_CNTSEL_BOUNDARY_Val << TCC_EVCTRL_CNTSEL_Pos)
+#define TCC_EVCTRL_OVFEO_Pos        8            /**< \brief (TCC_EVCTRL) Overflow/Underflow Output Event Enable */
+#define TCC_EVCTRL_OVFEO            (0x1u << TCC_EVCTRL_OVFEO_Pos)
+#define TCC_EVCTRL_TRGEO_Pos        9            /**< \brief (TCC_EVCTRL) Retrigger Output Event Enable */
+#define TCC_EVCTRL_TRGEO            (0x1u << TCC_EVCTRL_TRGEO_Pos)
+#define TCC_EVCTRL_CNTEO_Pos        10           /**< \brief (TCC_EVCTRL) Timer/counter Output Event Enable */
+#define TCC_EVCTRL_CNTEO            (0x1u << TCC_EVCTRL_CNTEO_Pos)
+#define TCC_EVCTRL_TCINV0_Pos       12           /**< \brief (TCC_EVCTRL) Inverted Event 0 Input Enable */
+#define TCC_EVCTRL_TCINV0           (1 << TCC_EVCTRL_TCINV0_Pos)
+#define TCC_EVCTRL_TCINV1_Pos       13           /**< \brief (TCC_EVCTRL) Inverted Event 1 Input Enable */
+#define TCC_EVCTRL_TCINV1           (1 << TCC_EVCTRL_TCINV1_Pos)
+#define TCC_EVCTRL_TCINV_Pos        12           /**< \brief (TCC_EVCTRL) Inverted Event x Input Enable */
+#define TCC_EVCTRL_TCINV_Msk        (0x3u << TCC_EVCTRL_TCINV_Pos)
+#define TCC_EVCTRL_TCINV(value)     ((TCC_EVCTRL_TCINV_Msk & ((value) << TCC_EVCTRL_TCINV_Pos)))
+#define TCC_EVCTRL_TCEI0_Pos        14           /**< \brief (TCC_EVCTRL) Timer/counter Event 0 Input Enable */
+#define TCC_EVCTRL_TCEI0            (1 << TCC_EVCTRL_TCEI0_Pos)
+#define TCC_EVCTRL_TCEI1_Pos        15           /**< \brief (TCC_EVCTRL) Timer/counter Event 1 Input Enable */
+#define TCC_EVCTRL_TCEI1            (1 << TCC_EVCTRL_TCEI1_Pos)
+#define TCC_EVCTRL_TCEI_Pos         14           /**< \brief (TCC_EVCTRL) Timer/counter Event x Input Enable */
+#define TCC_EVCTRL_TCEI_Msk         (0x3u << TCC_EVCTRL_TCEI_Pos)
+#define TCC_EVCTRL_TCEI(value)      ((TCC_EVCTRL_TCEI_Msk & ((value) << TCC_EVCTRL_TCEI_Pos)))
+#define TCC_EVCTRL_MCEI0_Pos        16           /**< \brief (TCC_EVCTRL) Match or Capture Channel 0 Event Input Enable */
+#define TCC_EVCTRL_MCEI0            (1 << TCC_EVCTRL_MCEI0_Pos)
+#define TCC_EVCTRL_MCEI1_Pos        17           /**< \brief (TCC_EVCTRL) Match or Capture Channel 1 Event Input Enable */
+#define TCC_EVCTRL_MCEI1            (1 << TCC_EVCTRL_MCEI1_Pos)
+#define TCC_EVCTRL_MCEI2_Pos        18           /**< \brief (TCC_EVCTRL) Match or Capture Channel 2 Event Input Enable */
+#define TCC_EVCTRL_MCEI2            (1 << TCC_EVCTRL_MCEI2_Pos)
+#define TCC_EVCTRL_MCEI3_Pos        19           /**< \brief (TCC_EVCTRL) Match or Capture Channel 3 Event Input Enable */
+#define TCC_EVCTRL_MCEI3            (1 << TCC_EVCTRL_MCEI3_Pos)
+#define TCC_EVCTRL_MCEI_Pos         16           /**< \brief (TCC_EVCTRL) Match or Capture Channel x Event Input Enable */
+#define TCC_EVCTRL_MCEI_Msk         (0xFu << TCC_EVCTRL_MCEI_Pos)
+#define TCC_EVCTRL_MCEI(value)      ((TCC_EVCTRL_MCEI_Msk & ((value) << TCC_EVCTRL_MCEI_Pos)))
+#define TCC_EVCTRL_MCEO0_Pos        24           /**< \brief (TCC_EVCTRL) Match or Capture Channel 0 Event Output Enable */
+#define TCC_EVCTRL_MCEO0            (1 << TCC_EVCTRL_MCEO0_Pos)
+#define TCC_EVCTRL_MCEO1_Pos        25           /**< \brief (TCC_EVCTRL) Match or Capture Channel 1 Event Output Enable */
+#define TCC_EVCTRL_MCEO1            (1 << TCC_EVCTRL_MCEO1_Pos)
+#define TCC_EVCTRL_MCEO2_Pos        26           /**< \brief (TCC_EVCTRL) Match or Capture Channel 2 Event Output Enable */
+#define TCC_EVCTRL_MCEO2            (1 << TCC_EVCTRL_MCEO2_Pos)
+#define TCC_EVCTRL_MCEO3_Pos        27           /**< \brief (TCC_EVCTRL) Match or Capture Channel 3 Event Output Enable */
+#define TCC_EVCTRL_MCEO3            (1 << TCC_EVCTRL_MCEO3_Pos)
+#define TCC_EVCTRL_MCEO_Pos         24           /**< \brief (TCC_EVCTRL) Match or Capture Channel x Event Output Enable */
+#define TCC_EVCTRL_MCEO_Msk         (0xFu << TCC_EVCTRL_MCEO_Pos)
+#define TCC_EVCTRL_MCEO(value)      ((TCC_EVCTRL_MCEO_Msk & ((value) << TCC_EVCTRL_MCEO_Pos)))
+#define TCC_EVCTRL_MASK             0x0F0FF7FFu  /**< \brief (TCC_EVCTRL) MASK Register */
+
+/* -------- TCC_INTENCLR : (TCC Offset: 0x24) (R/W 32) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OVF:1;            /*!< bit:      0  Overflow Interrupt Enable          */
+    uint32_t TRG:1;            /*!< bit:      1  Retrigger Interrupt Enable         */
+    uint32_t CNT:1;            /*!< bit:      2  Counter Interrupt Enable           */
+    uint32_t ERR:1;            /*!< bit:      3  Error Interrupt Enable             */
+    uint32_t :7;               /*!< bit:  4..10  Reserved                           */
+    uint32_t DFS:1;            /*!< bit:     11  Non-recoverable Debug Fault Interrupt Enable */
+    uint32_t FAULTA:1;         /*!< bit:     12  Recoverable FaultA Interrupt Enable */
+    uint32_t FAULTB:1;         /*!< bit:     13  Recoverable FaultB Interrupt Enable */
+    uint32_t FAULT0:1;         /*!< bit:     14  Non-Recoverable Fault 0 Interrupt Enable */
+    uint32_t FAULT1:1;         /*!< bit:     15  Non-Recoverable Fault 1 Interrupt Enable */
+    uint32_t MC0:1;            /*!< bit:     16  Match or Capture Channel 0 Interrupt Enable */
+    uint32_t MC1:1;            /*!< bit:     17  Match or Capture Channel 1 Interrupt Enable */
+    uint32_t MC2:1;            /*!< bit:     18  Match or Capture Channel 2 Interrupt Enable */
+    uint32_t MC3:1;            /*!< bit:     19  Match or Capture Channel 3 Interrupt Enable */
+    uint32_t :12;              /*!< bit: 20..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t MC:4;             /*!< bit: 16..19  Match or Capture Channel x Interrupt Enable */
+    uint32_t :12;              /*!< bit: 20..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_INTENCLR_OFFSET         0x24         /**< \brief (TCC_INTENCLR offset) Interrupt Enable Clear */
+#define TCC_INTENCLR_RESETVALUE     0x00000000   /**< \brief (TCC_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define TCC_INTENCLR_OVF_Pos        0            /**< \brief (TCC_INTENCLR) Overflow Interrupt Enable */
+#define TCC_INTENCLR_OVF            (0x1u << TCC_INTENCLR_OVF_Pos)
+#define TCC_INTENCLR_TRG_Pos        1            /**< \brief (TCC_INTENCLR) Retrigger Interrupt Enable */
+#define TCC_INTENCLR_TRG            (0x1u << TCC_INTENCLR_TRG_Pos)
+#define TCC_INTENCLR_CNT_Pos        2            /**< \brief (TCC_INTENCLR) Counter Interrupt Enable */
+#define TCC_INTENCLR_CNT            (0x1u << TCC_INTENCLR_CNT_Pos)
+#define TCC_INTENCLR_ERR_Pos        3            /**< \brief (TCC_INTENCLR) Error Interrupt Enable */
+#define TCC_INTENCLR_ERR            (0x1u << TCC_INTENCLR_ERR_Pos)
+#define TCC_INTENCLR_DFS_Pos        11           /**< \brief (TCC_INTENCLR) Non-recoverable Debug Fault Interrupt Enable */
+#define TCC_INTENCLR_DFS            (0x1u << TCC_INTENCLR_DFS_Pos)
+#define TCC_INTENCLR_FAULTA_Pos     12           /**< \brief (TCC_INTENCLR) Recoverable FaultA Interrupt Enable */
+#define TCC_INTENCLR_FAULTA         (0x1u << TCC_INTENCLR_FAULTA_Pos)
+#define TCC_INTENCLR_FAULTB_Pos     13           /**< \brief (TCC_INTENCLR) Recoverable FaultB Interrupt Enable */
+#define TCC_INTENCLR_FAULTB         (0x1u << TCC_INTENCLR_FAULTB_Pos)
+#define TCC_INTENCLR_FAULT0_Pos     14           /**< \brief (TCC_INTENCLR) Non-Recoverable Fault 0 Interrupt Enable */
+#define TCC_INTENCLR_FAULT0         (0x1u << TCC_INTENCLR_FAULT0_Pos)
+#define TCC_INTENCLR_FAULT1_Pos     15           /**< \brief (TCC_INTENCLR) Non-Recoverable Fault 1 Interrupt Enable */
+#define TCC_INTENCLR_FAULT1         (0x1u << TCC_INTENCLR_FAULT1_Pos)
+#define TCC_INTENCLR_MC0_Pos        16           /**< \brief (TCC_INTENCLR) Match or Capture Channel 0 Interrupt Enable */
+#define TCC_INTENCLR_MC0            (1 << TCC_INTENCLR_MC0_Pos)
+#define TCC_INTENCLR_MC1_Pos        17           /**< \brief (TCC_INTENCLR) Match or Capture Channel 1 Interrupt Enable */
+#define TCC_INTENCLR_MC1            (1 << TCC_INTENCLR_MC1_Pos)
+#define TCC_INTENCLR_MC2_Pos        18           /**< \brief (TCC_INTENCLR) Match or Capture Channel 2 Interrupt Enable */
+#define TCC_INTENCLR_MC2            (1 << TCC_INTENCLR_MC2_Pos)
+#define TCC_INTENCLR_MC3_Pos        19           /**< \brief (TCC_INTENCLR) Match or Capture Channel 3 Interrupt Enable */
+#define TCC_INTENCLR_MC3            (1 << TCC_INTENCLR_MC3_Pos)
+#define TCC_INTENCLR_MC_Pos         16           /**< \brief (TCC_INTENCLR) Match or Capture Channel x Interrupt Enable */
+#define TCC_INTENCLR_MC_Msk         (0xFu << TCC_INTENCLR_MC_Pos)
+#define TCC_INTENCLR_MC(value)      ((TCC_INTENCLR_MC_Msk & ((value) << TCC_INTENCLR_MC_Pos)))
+#define TCC_INTENCLR_MASK           0x000FF80Fu  /**< \brief (TCC_INTENCLR) MASK Register */
+
+/* -------- TCC_INTENSET : (TCC Offset: 0x28) (R/W 32) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OVF:1;            /*!< bit:      0  Overflow Interrupt Enable          */
+    uint32_t TRG:1;            /*!< bit:      1  Retrigger Interrupt Enable         */
+    uint32_t CNT:1;            /*!< bit:      2  Counter Interrupt Enable           */
+    uint32_t ERR:1;            /*!< bit:      3  Error Interrupt Enable             */
+    uint32_t :7;               /*!< bit:  4..10  Reserved                           */
+    uint32_t DFS:1;            /*!< bit:     11  Non-Recoverable Debug Fault Interrupt Enable */
+    uint32_t FAULTA:1;         /*!< bit:     12  Recoverable FaultA Interrupt Enable */
+    uint32_t FAULTB:1;         /*!< bit:     13  Recoverable FaultB Interrupt Enable */
+    uint32_t FAULT0:1;         /*!< bit:     14  Non-Recoverable Fault 0 Interrupt Enable */
+    uint32_t FAULT1:1;         /*!< bit:     15  Non-Recoverable Fault 1 Interrupt Enabl */
+    uint32_t MC0:1;            /*!< bit:     16  Match or Capture Channel 0 Interrupt Enable */
+    uint32_t MC1:1;            /*!< bit:     17  Match or Capture Channel 1 Interrupt Enable */
+    uint32_t MC2:1;            /*!< bit:     18  Match or Capture Channel 2 Interrupt Enable */
+    uint32_t MC3:1;            /*!< bit:     19  Match or Capture Channel 3 Interrupt Enable */
+    uint32_t :12;              /*!< bit: 20..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t MC:4;             /*!< bit: 16..19  Match or Capture Channel x Interrupt Enable */
+    uint32_t :12;              /*!< bit: 20..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_INTENSET_OFFSET         0x28         /**< \brief (TCC_INTENSET offset) Interrupt Enable Set */
+#define TCC_INTENSET_RESETVALUE     0x00000000   /**< \brief (TCC_INTENSET reset_value) Interrupt Enable Set */
+
+#define TCC_INTENSET_OVF_Pos        0            /**< \brief (TCC_INTENSET) Overflow Interrupt Enable */
+#define TCC_INTENSET_OVF            (0x1u << TCC_INTENSET_OVF_Pos)
+#define TCC_INTENSET_TRG_Pos        1            /**< \brief (TCC_INTENSET) Retrigger Interrupt Enable */
+#define TCC_INTENSET_TRG            (0x1u << TCC_INTENSET_TRG_Pos)
+#define TCC_INTENSET_CNT_Pos        2            /**< \brief (TCC_INTENSET) Counter Interrupt Enable */
+#define TCC_INTENSET_CNT            (0x1u << TCC_INTENSET_CNT_Pos)
+#define TCC_INTENSET_ERR_Pos        3            /**< \brief (TCC_INTENSET) Error Interrupt Enable */
+#define TCC_INTENSET_ERR            (0x1u << TCC_INTENSET_ERR_Pos)
+#define TCC_INTENSET_DFS_Pos        11           /**< \brief (TCC_INTENSET) Non-Recoverable Debug Fault Interrupt Enable */
+#define TCC_INTENSET_DFS            (0x1u << TCC_INTENSET_DFS_Pos)
+#define TCC_INTENSET_FAULTA_Pos     12           /**< \brief (TCC_INTENSET) Recoverable FaultA Interrupt Enable */
+#define TCC_INTENSET_FAULTA         (0x1u << TCC_INTENSET_FAULTA_Pos)
+#define TCC_INTENSET_FAULTB_Pos     13           /**< \brief (TCC_INTENSET) Recoverable FaultB Interrupt Enable */
+#define TCC_INTENSET_FAULTB         (0x1u << TCC_INTENSET_FAULTB_Pos)
+#define TCC_INTENSET_FAULT0_Pos     14           /**< \brief (TCC_INTENSET) Non-Recoverable Fault 0 Interrupt Enable */
+#define TCC_INTENSET_FAULT0         (0x1u << TCC_INTENSET_FAULT0_Pos)
+#define TCC_INTENSET_FAULT1_Pos     15           /**< \brief (TCC_INTENSET) Non-Recoverable Fault 1 Interrupt Enabl */
+#define TCC_INTENSET_FAULT1         (0x1u << TCC_INTENSET_FAULT1_Pos)
+#define TCC_INTENSET_MC0_Pos        16           /**< \brief (TCC_INTENSET) Match or Capture Channel 0 Interrupt Enable */
+#define TCC_INTENSET_MC0            (1 << TCC_INTENSET_MC0_Pos)
+#define TCC_INTENSET_MC1_Pos        17           /**< \brief (TCC_INTENSET) Match or Capture Channel 1 Interrupt Enable */
+#define TCC_INTENSET_MC1            (1 << TCC_INTENSET_MC1_Pos)
+#define TCC_INTENSET_MC2_Pos        18           /**< \brief (TCC_INTENSET) Match or Capture Channel 2 Interrupt Enable */
+#define TCC_INTENSET_MC2            (1 << TCC_INTENSET_MC2_Pos)
+#define TCC_INTENSET_MC3_Pos        19           /**< \brief (TCC_INTENSET) Match or Capture Channel 3 Interrupt Enable */
+#define TCC_INTENSET_MC3            (1 << TCC_INTENSET_MC3_Pos)
+#define TCC_INTENSET_MC_Pos         16           /**< \brief (TCC_INTENSET) Match or Capture Channel x Interrupt Enable */
+#define TCC_INTENSET_MC_Msk         (0xFu << TCC_INTENSET_MC_Pos)
+#define TCC_INTENSET_MC(value)      ((TCC_INTENSET_MC_Msk & ((value) << TCC_INTENSET_MC_Pos)))
+#define TCC_INTENSET_MASK           0x000FF80Fu  /**< \brief (TCC_INTENSET) MASK Register */
+
+/* -------- TCC_INTFLAG : (TCC Offset: 0x2C) (R/W 32) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t OVF:1;            /*!< bit:      0  Overflow                           */
+    uint32_t TRG:1;            /*!< bit:      1  Retrigger                          */
+    uint32_t CNT:1;            /*!< bit:      2  Counter                            */
+    uint32_t ERR:1;            /*!< bit:      3  Error                              */
+    uint32_t :7;               /*!< bit:  4..10  Reserved                           */
+    uint32_t DFS:1;            /*!< bit:     11  Non-Recoverable Debug Fault        */
+    uint32_t FAULTA:1;         /*!< bit:     12  Recoverable FaultA                 */
+    uint32_t FAULTB:1;         /*!< bit:     13  Recoverable FaultB                 */
+    uint32_t FAULT0:1;         /*!< bit:     14  Non-Recoverable Fault 0            */
+    uint32_t FAULT1:1;         /*!< bit:     15  Non-Recoverable Fault 1            */
+    uint32_t MC0:1;            /*!< bit:     16  Match or Capture 0                 */
+    uint32_t MC1:1;            /*!< bit:     17  Match or Capture 1                 */
+    uint32_t MC2:1;            /*!< bit:     18  Match or Capture 2                 */
+    uint32_t MC3:1;            /*!< bit:     19  Match or Capture 3                 */
+    uint32_t :12;              /*!< bit: 20..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t MC:4;             /*!< bit: 16..19  Match or Capture x                 */
+    uint32_t :12;              /*!< bit: 20..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_INTFLAG_OFFSET          0x2C         /**< \brief (TCC_INTFLAG offset) Interrupt Flag Status and Clear */
+#define TCC_INTFLAG_RESETVALUE      0x00000000   /**< \brief (TCC_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define TCC_INTFLAG_OVF_Pos         0            /**< \brief (TCC_INTFLAG) Overflow */
+#define TCC_INTFLAG_OVF             (0x1u << TCC_INTFLAG_OVF_Pos)
+#define TCC_INTFLAG_TRG_Pos         1            /**< \brief (TCC_INTFLAG) Retrigger */
+#define TCC_INTFLAG_TRG             (0x1u << TCC_INTFLAG_TRG_Pos)
+#define TCC_INTFLAG_CNT_Pos         2            /**< \brief (TCC_INTFLAG) Counter */
+#define TCC_INTFLAG_CNT             (0x1u << TCC_INTFLAG_CNT_Pos)
+#define TCC_INTFLAG_ERR_Pos         3            /**< \brief (TCC_INTFLAG) Error */
+#define TCC_INTFLAG_ERR             (0x1u << TCC_INTFLAG_ERR_Pos)
+#define TCC_INTFLAG_DFS_Pos         11           /**< \brief (TCC_INTFLAG) Non-Recoverable Debug Fault */
+#define TCC_INTFLAG_DFS             (0x1u << TCC_INTFLAG_DFS_Pos)
+#define TCC_INTFLAG_FAULTA_Pos      12           /**< \brief (TCC_INTFLAG) Recoverable FaultA */
+#define TCC_INTFLAG_FAULTA          (0x1u << TCC_INTFLAG_FAULTA_Pos)
+#define TCC_INTFLAG_FAULTB_Pos      13           /**< \brief (TCC_INTFLAG) Recoverable FaultB */
+#define TCC_INTFLAG_FAULTB          (0x1u << TCC_INTFLAG_FAULTB_Pos)
+#define TCC_INTFLAG_FAULT0_Pos      14           /**< \brief (TCC_INTFLAG) Non-Recoverable Fault 0 */
+#define TCC_INTFLAG_FAULT0          (0x1u << TCC_INTFLAG_FAULT0_Pos)
+#define TCC_INTFLAG_FAULT1_Pos      15           /**< \brief (TCC_INTFLAG) Non-Recoverable Fault 1 */
+#define TCC_INTFLAG_FAULT1          (0x1u << TCC_INTFLAG_FAULT1_Pos)
+#define TCC_INTFLAG_MC0_Pos         16           /**< \brief (TCC_INTFLAG) Match or Capture 0 */
+#define TCC_INTFLAG_MC0             (1 << TCC_INTFLAG_MC0_Pos)
+#define TCC_INTFLAG_MC1_Pos         17           /**< \brief (TCC_INTFLAG) Match or Capture 1 */
+#define TCC_INTFLAG_MC1             (1 << TCC_INTFLAG_MC1_Pos)
+#define TCC_INTFLAG_MC2_Pos         18           /**< \brief (TCC_INTFLAG) Match or Capture 2 */
+#define TCC_INTFLAG_MC2             (1 << TCC_INTFLAG_MC2_Pos)
+#define TCC_INTFLAG_MC3_Pos         19           /**< \brief (TCC_INTFLAG) Match or Capture 3 */
+#define TCC_INTFLAG_MC3             (1 << TCC_INTFLAG_MC3_Pos)
+#define TCC_INTFLAG_MC_Pos          16           /**< \brief (TCC_INTFLAG) Match or Capture x */
+#define TCC_INTFLAG_MC_Msk          (0xFu << TCC_INTFLAG_MC_Pos)
+#define TCC_INTFLAG_MC(value)       ((TCC_INTFLAG_MC_Msk & ((value) << TCC_INTFLAG_MC_Pos)))
+#define TCC_INTFLAG_MASK            0x000FF80Fu  /**< \brief (TCC_INTFLAG) MASK Register */
+
+/* -------- TCC_STATUS : (TCC Offset: 0x30) (R/W 32) Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t STOP:1;           /*!< bit:      0  Stop                               */
+    uint32_t IDX:1;            /*!< bit:      1  Ramp                               */
+    uint32_t :1;               /*!< bit:      2  Reserved                           */
+    uint32_t DFS:1;            /*!< bit:      3  Non-Recoverable Debug Fault State  */
+    uint32_t :1;               /*!< bit:      4  Reserved                           */
+    uint32_t PATTBV:1;         /*!< bit:      5  Pattern Buffer Valid               */
+    uint32_t WAVEBV:1;         /*!< bit:      6  Wave Buffer Valid                  */
+    uint32_t PERBV:1;          /*!< bit:      7  Period Buffer Valid                */
+    uint32_t FAULTAIN:1;       /*!< bit:      8  Recoverable FaultA Input           */
+    uint32_t FAULTBIN:1;       /*!< bit:      9  Recoverable FaultB Input           */
+    uint32_t FAULT0IN:1;       /*!< bit:     10  Non-Recoverable Fault0 Input       */
+    uint32_t FAULT1IN:1;       /*!< bit:     11  Non-Recoverable Fault1 Input       */
+    uint32_t FAULTA:1;         /*!< bit:     12  Recoverable FaultA State           */
+    uint32_t FAULTB:1;         /*!< bit:     13  Recoverable FaultB State           */
+    uint32_t FAULT0:1;         /*!< bit:     14  Non-Recoverable Fault 0 State      */
+    uint32_t FAULT1:1;         /*!< bit:     15  Non-Recoverable Fault 1 State      */
+    uint32_t CCBV0:1;          /*!< bit:     16  Compare Channel 0 Buffer Valid     */
+    uint32_t CCBV1:1;          /*!< bit:     17  Compare Channel 1 Buffer Valid     */
+    uint32_t CCBV2:1;          /*!< bit:     18  Compare Channel 2 Buffer Valid     */
+    uint32_t CCBV3:1;          /*!< bit:     19  Compare Channel 3 Buffer Valid     */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t CMP0:1;           /*!< bit:     24  Compare Channel 0 Value            */
+    uint32_t CMP1:1;           /*!< bit:     25  Compare Channel 1 Value            */
+    uint32_t CMP2:1;           /*!< bit:     26  Compare Channel 2 Value            */
+    uint32_t CMP3:1;           /*!< bit:     27  Compare Channel 3 Value            */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t CCBV:4;           /*!< bit: 16..19  Compare Channel x Buffer Valid     */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t CMP:4;            /*!< bit: 24..27  Compare Channel x Value            */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_STATUS_OFFSET           0x30         /**< \brief (TCC_STATUS offset) Status */
+#define TCC_STATUS_RESETVALUE       0x00000001   /**< \brief (TCC_STATUS reset_value) Status */
+
+#define TCC_STATUS_STOP_Pos         0            /**< \brief (TCC_STATUS) Stop */
+#define TCC_STATUS_STOP             (0x1u << TCC_STATUS_STOP_Pos)
+#define TCC_STATUS_IDX_Pos          1            /**< \brief (TCC_STATUS) Ramp */
+#define TCC_STATUS_IDX              (0x1u << TCC_STATUS_IDX_Pos)
+#define TCC_STATUS_DFS_Pos          3            /**< \brief (TCC_STATUS) Non-Recoverable Debug Fault State */
+#define TCC_STATUS_DFS              (0x1u << TCC_STATUS_DFS_Pos)
+#define TCC_STATUS_PATTBV_Pos       5            /**< \brief (TCC_STATUS) Pattern Buffer Valid */
+#define TCC_STATUS_PATTBV           (0x1u << TCC_STATUS_PATTBV_Pos)
+#define TCC_STATUS_WAVEBV_Pos       6            /**< \brief (TCC_STATUS) Wave Buffer Valid */
+#define TCC_STATUS_WAVEBV           (0x1u << TCC_STATUS_WAVEBV_Pos)
+#define TCC_STATUS_PERBV_Pos        7            /**< \brief (TCC_STATUS) Period Buffer Valid */
+#define TCC_STATUS_PERBV            (0x1u << TCC_STATUS_PERBV_Pos)
+#define TCC_STATUS_FAULTAIN_Pos     8            /**< \brief (TCC_STATUS) Recoverable FaultA Input */
+#define TCC_STATUS_FAULTAIN         (0x1u << TCC_STATUS_FAULTAIN_Pos)
+#define TCC_STATUS_FAULTBIN_Pos     9            /**< \brief (TCC_STATUS) Recoverable FaultB Input */
+#define TCC_STATUS_FAULTBIN         (0x1u << TCC_STATUS_FAULTBIN_Pos)
+#define TCC_STATUS_FAULT0IN_Pos     10           /**< \brief (TCC_STATUS) Non-Recoverable Fault0 Input */
+#define TCC_STATUS_FAULT0IN         (0x1u << TCC_STATUS_FAULT0IN_Pos)
+#define TCC_STATUS_FAULT1IN_Pos     11           /**< \brief (TCC_STATUS) Non-Recoverable Fault1 Input */
+#define TCC_STATUS_FAULT1IN         (0x1u << TCC_STATUS_FAULT1IN_Pos)
+#define TCC_STATUS_FAULTA_Pos       12           /**< \brief (TCC_STATUS) Recoverable FaultA State */
+#define TCC_STATUS_FAULTA           (0x1u << TCC_STATUS_FAULTA_Pos)
+#define TCC_STATUS_FAULTB_Pos       13           /**< \brief (TCC_STATUS) Recoverable FaultB State */
+#define TCC_STATUS_FAULTB           (0x1u << TCC_STATUS_FAULTB_Pos)
+#define TCC_STATUS_FAULT0_Pos       14           /**< \brief (TCC_STATUS) Non-Recoverable Fault 0 State */
+#define TCC_STATUS_FAULT0           (0x1u << TCC_STATUS_FAULT0_Pos)
+#define TCC_STATUS_FAULT1_Pos       15           /**< \brief (TCC_STATUS) Non-Recoverable Fault 1 State */
+#define TCC_STATUS_FAULT1           (0x1u << TCC_STATUS_FAULT1_Pos)
+#define TCC_STATUS_CCBV0_Pos        16           /**< \brief (TCC_STATUS) Compare Channel 0 Buffer Valid */
+#define TCC_STATUS_CCBV0            (1 << TCC_STATUS_CCBV0_Pos)
+#define TCC_STATUS_CCBV1_Pos        17           /**< \brief (TCC_STATUS) Compare Channel 1 Buffer Valid */
+#define TCC_STATUS_CCBV1            (1 << TCC_STATUS_CCBV1_Pos)
+#define TCC_STATUS_CCBV2_Pos        18           /**< \brief (TCC_STATUS) Compare Channel 2 Buffer Valid */
+#define TCC_STATUS_CCBV2            (1 << TCC_STATUS_CCBV2_Pos)
+#define TCC_STATUS_CCBV3_Pos        19           /**< \brief (TCC_STATUS) Compare Channel 3 Buffer Valid */
+#define TCC_STATUS_CCBV3            (1 << TCC_STATUS_CCBV3_Pos)
+#define TCC_STATUS_CCBV_Pos         16           /**< \brief (TCC_STATUS) Compare Channel x Buffer Valid */
+#define TCC_STATUS_CCBV_Msk         (0xFu << TCC_STATUS_CCBV_Pos)
+#define TCC_STATUS_CCBV(value)      ((TCC_STATUS_CCBV_Msk & ((value) << TCC_STATUS_CCBV_Pos)))
+#define TCC_STATUS_CMP0_Pos         24           /**< \brief (TCC_STATUS) Compare Channel 0 Value */
+#define TCC_STATUS_CMP0             (1 << TCC_STATUS_CMP0_Pos)
+#define TCC_STATUS_CMP1_Pos         25           /**< \brief (TCC_STATUS) Compare Channel 1 Value */
+#define TCC_STATUS_CMP1             (1 << TCC_STATUS_CMP1_Pos)
+#define TCC_STATUS_CMP2_Pos         26           /**< \brief (TCC_STATUS) Compare Channel 2 Value */
+#define TCC_STATUS_CMP2             (1 << TCC_STATUS_CMP2_Pos)
+#define TCC_STATUS_CMP3_Pos         27           /**< \brief (TCC_STATUS) Compare Channel 3 Value */
+#define TCC_STATUS_CMP3             (1 << TCC_STATUS_CMP3_Pos)
+#define TCC_STATUS_CMP_Pos          24           /**< \brief (TCC_STATUS) Compare Channel x Value */
+#define TCC_STATUS_CMP_Msk          (0xFu << TCC_STATUS_CMP_Pos)
+#define TCC_STATUS_CMP(value)       ((TCC_STATUS_CMP_Msk & ((value) << TCC_STATUS_CMP_Pos)))
+#define TCC_STATUS_MASK             0x0F0FFFEBu  /**< \brief (TCC_STATUS) MASK Register */
+
+/* -------- TCC_COUNT : (TCC Offset: 0x34) (R/W 32) Count -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t COUNT:24;         /*!< bit:  0..23  Count Value                        */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_COUNT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_COUNT_OFFSET            0x34         /**< \brief (TCC_COUNT offset) Count */
+#define TCC_COUNT_RESETVALUE        0x00000000   /**< \brief (TCC_COUNT reset_value) Count */
+
+#define TCC_COUNT_COUNT_Pos         0            /**< \brief (TCC_COUNT) Count Value */
+#define TCC_COUNT_COUNT_Msk         (0xFFFFFFu << TCC_COUNT_COUNT_Pos)
+#define TCC_COUNT_COUNT(value)      ((TCC_COUNT_COUNT_Msk & ((value) << TCC_COUNT_COUNT_Pos)))
+#define TCC_COUNT_MASK              0x00FFFFFFu  /**< \brief (TCC_COUNT) MASK Register */
+
+/* -------- TCC_PATT : (TCC Offset: 0x38) (R/W 16) Pattern -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t PGE0:1;           /*!< bit:      0  Pattern Generator 0 Output Enable  */
+    uint16_t PGE1:1;           /*!< bit:      1  Pattern Generator 1 Output Enable  */
+    uint16_t PGE2:1;           /*!< bit:      2  Pattern Generator 2 Output Enable  */
+    uint16_t PGE3:1;           /*!< bit:      3  Pattern Generator 3 Output Enable  */
+    uint16_t PGE4:1;           /*!< bit:      4  Pattern Generator 4 Output Enable  */
+    uint16_t PGE5:1;           /*!< bit:      5  Pattern Generator 5 Output Enable  */
+    uint16_t PGE6:1;           /*!< bit:      6  Pattern Generator 6 Output Enable  */
+    uint16_t PGE7:1;           /*!< bit:      7  Pattern Generator 7 Output Enable  */
+    uint16_t PGV0:1;           /*!< bit:      8  Pattern Generator 0 Output Value   */
+    uint16_t PGV1:1;           /*!< bit:      9  Pattern Generator 1 Output Value   */
+    uint16_t PGV2:1;           /*!< bit:     10  Pattern Generator 2 Output Value   */
+    uint16_t PGV3:1;           /*!< bit:     11  Pattern Generator 3 Output Value   */
+    uint16_t PGV4:1;           /*!< bit:     12  Pattern Generator 4 Output Value   */
+    uint16_t PGV5:1;           /*!< bit:     13  Pattern Generator 5 Output Value   */
+    uint16_t PGV6:1;           /*!< bit:     14  Pattern Generator 6 Output Value   */
+    uint16_t PGV7:1;           /*!< bit:     15  Pattern Generator 7 Output Value   */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t PGE:8;            /*!< bit:  0.. 7  Pattern Generator x Output Enable  */
+    uint16_t PGV:8;            /*!< bit:  8..15  Pattern Generator x Output Value   */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} TCC_PATT_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_PATT_OFFSET             0x38         /**< \brief (TCC_PATT offset) Pattern */
+#define TCC_PATT_RESETVALUE         0x0000       /**< \brief (TCC_PATT reset_value) Pattern */
+
+#define TCC_PATT_PGE0_Pos           0            /**< \brief (TCC_PATT) Pattern Generator 0 Output Enable */
+#define TCC_PATT_PGE0               (1 << TCC_PATT_PGE0_Pos)
+#define TCC_PATT_PGE1_Pos           1            /**< \brief (TCC_PATT) Pattern Generator 1 Output Enable */
+#define TCC_PATT_PGE1               (1 << TCC_PATT_PGE1_Pos)
+#define TCC_PATT_PGE2_Pos           2            /**< \brief (TCC_PATT) Pattern Generator 2 Output Enable */
+#define TCC_PATT_PGE2               (1 << TCC_PATT_PGE2_Pos)
+#define TCC_PATT_PGE3_Pos           3            /**< \brief (TCC_PATT) Pattern Generator 3 Output Enable */
+#define TCC_PATT_PGE3               (1 << TCC_PATT_PGE3_Pos)
+#define TCC_PATT_PGE4_Pos           4            /**< \brief (TCC_PATT) Pattern Generator 4 Output Enable */
+#define TCC_PATT_PGE4               (1 << TCC_PATT_PGE4_Pos)
+#define TCC_PATT_PGE5_Pos           5            /**< \brief (TCC_PATT) Pattern Generator 5 Output Enable */
+#define TCC_PATT_PGE5               (1 << TCC_PATT_PGE5_Pos)
+#define TCC_PATT_PGE6_Pos           6            /**< \brief (TCC_PATT) Pattern Generator 6 Output Enable */
+#define TCC_PATT_PGE6               (1 << TCC_PATT_PGE6_Pos)
+#define TCC_PATT_PGE7_Pos           7            /**< \brief (TCC_PATT) Pattern Generator 7 Output Enable */
+#define TCC_PATT_PGE7               (1 << TCC_PATT_PGE7_Pos)
+#define TCC_PATT_PGE_Pos            0            /**< \brief (TCC_PATT) Pattern Generator x Output Enable */
+#define TCC_PATT_PGE_Msk            (0xFFu << TCC_PATT_PGE_Pos)
+#define TCC_PATT_PGE(value)         ((TCC_PATT_PGE_Msk & ((value) << TCC_PATT_PGE_Pos)))
+#define TCC_PATT_PGV0_Pos           8            /**< \brief (TCC_PATT) Pattern Generator 0 Output Value */
+#define TCC_PATT_PGV0               (1 << TCC_PATT_PGV0_Pos)
+#define TCC_PATT_PGV1_Pos           9            /**< \brief (TCC_PATT) Pattern Generator 1 Output Value */
+#define TCC_PATT_PGV1               (1 << TCC_PATT_PGV1_Pos)
+#define TCC_PATT_PGV2_Pos           10           /**< \brief (TCC_PATT) Pattern Generator 2 Output Value */
+#define TCC_PATT_PGV2               (1 << TCC_PATT_PGV2_Pos)
+#define TCC_PATT_PGV3_Pos           11           /**< \brief (TCC_PATT) Pattern Generator 3 Output Value */
+#define TCC_PATT_PGV3               (1 << TCC_PATT_PGV3_Pos)
+#define TCC_PATT_PGV4_Pos           12           /**< \brief (TCC_PATT) Pattern Generator 4 Output Value */
+#define TCC_PATT_PGV4               (1 << TCC_PATT_PGV4_Pos)
+#define TCC_PATT_PGV5_Pos           13           /**< \brief (TCC_PATT) Pattern Generator 5 Output Value */
+#define TCC_PATT_PGV5               (1 << TCC_PATT_PGV5_Pos)
+#define TCC_PATT_PGV6_Pos           14           /**< \brief (TCC_PATT) Pattern Generator 6 Output Value */
+#define TCC_PATT_PGV6               (1 << TCC_PATT_PGV6_Pos)
+#define TCC_PATT_PGV7_Pos           15           /**< \brief (TCC_PATT) Pattern Generator 7 Output Value */
+#define TCC_PATT_PGV7               (1 << TCC_PATT_PGV7_Pos)
+#define TCC_PATT_PGV_Pos            8            /**< \brief (TCC_PATT) Pattern Generator x Output Value */
+#define TCC_PATT_PGV_Msk            (0xFFu << TCC_PATT_PGV_Pos)
+#define TCC_PATT_PGV(value)         ((TCC_PATT_PGV_Msk & ((value) << TCC_PATT_PGV_Pos)))
+#define TCC_PATT_MASK               0xFFFFu      /**< \brief (TCC_PATT) MASK Register */
+
+/* -------- TCC_WAVE : (TCC Offset: 0x3C) (R/W 32) Waveform Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t WAVEGEN:3;        /*!< bit:  0.. 2  Waveform Generation                */
+    uint32_t :1;               /*!< bit:      3  Reserved                           */
+    uint32_t RAMP:2;           /*!< bit:  4.. 5  Ramp Mode                          */
+    uint32_t :1;               /*!< bit:      6  Reserved                           */
+    uint32_t CIPEREN:1;        /*!< bit:      7  Circular period Enable             */
+    uint32_t CICCEN0:1;        /*!< bit:      8  Circular Channel 0 Enable          */
+    uint32_t CICCEN1:1;        /*!< bit:      9  Circular Channel 1 Enable          */
+    uint32_t CICCEN2:1;        /*!< bit:     10  Circular Channel 2 Enable          */
+    uint32_t CICCEN3:1;        /*!< bit:     11  Circular Channel 3 Enable          */
+    uint32_t :4;               /*!< bit: 12..15  Reserved                           */
+    uint32_t POL0:1;           /*!< bit:     16  Channel 0 Polarity                 */
+    uint32_t POL1:1;           /*!< bit:     17  Channel 1 Polarity                 */
+    uint32_t POL2:1;           /*!< bit:     18  Channel 2 Polarity                 */
+    uint32_t POL3:1;           /*!< bit:     19  Channel 3 Polarity                 */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t SWAP0:1;          /*!< bit:     24  Swap DTI Output Pair 0             */
+    uint32_t SWAP1:1;          /*!< bit:     25  Swap DTI Output Pair 1             */
+    uint32_t SWAP2:1;          /*!< bit:     26  Swap DTI Output Pair 2             */
+    uint32_t SWAP3:1;          /*!< bit:     27  Swap DTI Output Pair 3             */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :8;               /*!< bit:  0.. 7  Reserved                           */
+    uint32_t CICCEN:4;         /*!< bit:  8..11  Circular Channel x Enable          */
+    uint32_t :4;               /*!< bit: 12..15  Reserved                           */
+    uint32_t POL:4;            /*!< bit: 16..19  Channel x Polarity                 */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t SWAP:4;           /*!< bit: 24..27  Swap DTI Output Pair x             */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_WAVE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_WAVE_OFFSET             0x3C         /**< \brief (TCC_WAVE offset) Waveform Control */
+#define TCC_WAVE_RESETVALUE         0x00000000   /**< \brief (TCC_WAVE reset_value) Waveform Control */
+
+#define TCC_WAVE_WAVEGEN_Pos        0            /**< \brief (TCC_WAVE) Waveform Generation */
+#define TCC_WAVE_WAVEGEN_Msk        (0x7u << TCC_WAVE_WAVEGEN_Pos)
+#define TCC_WAVE_WAVEGEN(value)     ((TCC_WAVE_WAVEGEN_Msk & ((value) << TCC_WAVE_WAVEGEN_Pos)))
+#define   TCC_WAVE_WAVEGEN_NFRQ_Val       0x0u   /**< \brief (TCC_WAVE)  */
+#define   TCC_WAVE_WAVEGEN_MFRQ_Val       0x1u   /**< \brief (TCC_WAVE)  */
+#define   TCC_WAVE_WAVEGEN_NPWM_Val       0x2u   /**< \brief (TCC_WAVE)  */
+#define   TCC_WAVE_WAVEGEN_DSCRITICAL_Val 0x4u   /**< \brief (TCC_WAVE)  */
+#define   TCC_WAVE_WAVEGEN_DSBOTTOM_Val   0x5u   /**< \brief (TCC_WAVE)  */
+#define   TCC_WAVE_WAVEGEN_DSBOTH_Val     0x6u   /**< \brief (TCC_WAVE)  */
+#define   TCC_WAVE_WAVEGEN_DSTOP_Val      0x7u   /**< \brief (TCC_WAVE)  */
+#define TCC_WAVE_WAVEGEN_NFRQ       (TCC_WAVE_WAVEGEN_NFRQ_Val     << TCC_WAVE_WAVEGEN_Pos)
+#define TCC_WAVE_WAVEGEN_MFRQ       (TCC_WAVE_WAVEGEN_MFRQ_Val     << TCC_WAVE_WAVEGEN_Pos)
+#define TCC_WAVE_WAVEGEN_NPWM       (TCC_WAVE_WAVEGEN_NPWM_Val     << TCC_WAVE_WAVEGEN_Pos)
+#define TCC_WAVE_WAVEGEN_DSCRITICAL (TCC_WAVE_WAVEGEN_DSCRITICAL_Val << TCC_WAVE_WAVEGEN_Pos)
+#define TCC_WAVE_WAVEGEN_DSBOTTOM   (TCC_WAVE_WAVEGEN_DSBOTTOM_Val << TCC_WAVE_WAVEGEN_Pos)
+#define TCC_WAVE_WAVEGEN_DSBOTH     (TCC_WAVE_WAVEGEN_DSBOTH_Val   << TCC_WAVE_WAVEGEN_Pos)
+#define TCC_WAVE_WAVEGEN_DSTOP      (TCC_WAVE_WAVEGEN_DSTOP_Val    << TCC_WAVE_WAVEGEN_Pos)
+#define TCC_WAVE_RAMP_Pos           4            /**< \brief (TCC_WAVE) Ramp Mode */
+#define TCC_WAVE_RAMP_Msk           (0x3u << TCC_WAVE_RAMP_Pos)
+#define TCC_WAVE_RAMP(value)        ((TCC_WAVE_RAMP_Msk & ((value) << TCC_WAVE_RAMP_Pos)))
+#define   TCC_WAVE_RAMP_RAMP1_Val         0x0u   /**< \brief (TCC_WAVE)  */
+#define   TCC_WAVE_RAMP_RAMP2A_Val        0x1u   /**< \brief (TCC_WAVE)  */
+#define   TCC_WAVE_RAMP_RAMP2_Val         0x2u   /**< \brief (TCC_WAVE)  */
+#define TCC_WAVE_RAMP_RAMP1         (TCC_WAVE_RAMP_RAMP1_Val       << TCC_WAVE_RAMP_Pos)
+#define TCC_WAVE_RAMP_RAMP2A        (TCC_WAVE_RAMP_RAMP2A_Val      << TCC_WAVE_RAMP_Pos)
+#define TCC_WAVE_RAMP_RAMP2         (TCC_WAVE_RAMP_RAMP2_Val       << TCC_WAVE_RAMP_Pos)
+#define TCC_WAVE_CIPEREN_Pos        7            /**< \brief (TCC_WAVE) Circular period Enable */
+#define TCC_WAVE_CIPEREN            (0x1u << TCC_WAVE_CIPEREN_Pos)
+#define TCC_WAVE_CICCEN0_Pos        8            /**< \brief (TCC_WAVE) Circular Channel 0 Enable */
+#define TCC_WAVE_CICCEN0            (1 << TCC_WAVE_CICCEN0_Pos)
+#define TCC_WAVE_CICCEN1_Pos        9            /**< \brief (TCC_WAVE) Circular Channel 1 Enable */
+#define TCC_WAVE_CICCEN1            (1 << TCC_WAVE_CICCEN1_Pos)
+#define TCC_WAVE_CICCEN2_Pos        10           /**< \brief (TCC_WAVE) Circular Channel 2 Enable */
+#define TCC_WAVE_CICCEN2            (1 << TCC_WAVE_CICCEN2_Pos)
+#define TCC_WAVE_CICCEN3_Pos        11           /**< \brief (TCC_WAVE) Circular Channel 3 Enable */
+#define TCC_WAVE_CICCEN3            (1 << TCC_WAVE_CICCEN3_Pos)
+#define TCC_WAVE_CICCEN_Pos         8            /**< \brief (TCC_WAVE) Circular Channel x Enable */
+#define TCC_WAVE_CICCEN_Msk         (0xFu << TCC_WAVE_CICCEN_Pos)
+#define TCC_WAVE_CICCEN(value)      ((TCC_WAVE_CICCEN_Msk & ((value) << TCC_WAVE_CICCEN_Pos)))
+#define TCC_WAVE_POL0_Pos           16           /**< \brief (TCC_WAVE) Channel 0 Polarity */
+#define TCC_WAVE_POL0               (1 << TCC_WAVE_POL0_Pos)
+#define TCC_WAVE_POL1_Pos           17           /**< \brief (TCC_WAVE) Channel 1 Polarity */
+#define TCC_WAVE_POL1               (1 << TCC_WAVE_POL1_Pos)
+#define TCC_WAVE_POL2_Pos           18           /**< \brief (TCC_WAVE) Channel 2 Polarity */
+#define TCC_WAVE_POL2               (1 << TCC_WAVE_POL2_Pos)
+#define TCC_WAVE_POL3_Pos           19           /**< \brief (TCC_WAVE) Channel 3 Polarity */
+#define TCC_WAVE_POL3               (1 << TCC_WAVE_POL3_Pos)
+#define TCC_WAVE_POL_Pos            16           /**< \brief (TCC_WAVE) Channel x Polarity */
+#define TCC_WAVE_POL_Msk            (0xFu << TCC_WAVE_POL_Pos)
+#define TCC_WAVE_POL(value)         ((TCC_WAVE_POL_Msk & ((value) << TCC_WAVE_POL_Pos)))
+#define TCC_WAVE_SWAP0_Pos          24           /**< \brief (TCC_WAVE) Swap DTI Output Pair 0 */
+#define TCC_WAVE_SWAP0              (1 << TCC_WAVE_SWAP0_Pos)
+#define TCC_WAVE_SWAP1_Pos          25           /**< \brief (TCC_WAVE) Swap DTI Output Pair 1 */
+#define TCC_WAVE_SWAP1              (1 << TCC_WAVE_SWAP1_Pos)
+#define TCC_WAVE_SWAP2_Pos          26           /**< \brief (TCC_WAVE) Swap DTI Output Pair 2 */
+#define TCC_WAVE_SWAP2              (1 << TCC_WAVE_SWAP2_Pos)
+#define TCC_WAVE_SWAP3_Pos          27           /**< \brief (TCC_WAVE) Swap DTI Output Pair 3 */
+#define TCC_WAVE_SWAP3              (1 << TCC_WAVE_SWAP3_Pos)
+#define TCC_WAVE_SWAP_Pos           24           /**< \brief (TCC_WAVE) Swap DTI Output Pair x */
+#define TCC_WAVE_SWAP_Msk           (0xFu << TCC_WAVE_SWAP_Pos)
+#define TCC_WAVE_SWAP(value)        ((TCC_WAVE_SWAP_Msk & ((value) << TCC_WAVE_SWAP_Pos)))
+#define TCC_WAVE_MASK               0x0F0F0FB7u  /**< \brief (TCC_WAVE) MASK Register */
+
+/* -------- TCC_PER : (TCC Offset: 0x40) (R/W 32) Period -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PER:24;           /*!< bit:  0..23  Period Value                       */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_PER_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_PER_OFFSET              0x40         /**< \brief (TCC_PER offset) Period */
+#define TCC_PER_RESETVALUE          0xFFFFFFFF   /**< \brief (TCC_PER reset_value) Period */
+
+#define TCC_PER_PER_Pos             0            /**< \brief (TCC_PER) Period Value */
+#define TCC_PER_PER_Msk             (0xFFFFFFu << TCC_PER_PER_Pos)
+#define TCC_PER_PER(value)          ((TCC_PER_PER_Msk & ((value) << TCC_PER_PER_Pos)))
+#define TCC_PER_MASK                0x00FFFFFFu  /**< \brief (TCC_PER) MASK Register */
+
+/* -------- TCC_CC : (TCC Offset: 0x44) (R/W 32) Compare and Capture -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CC:24;            /*!< bit:  0..23  Compare and Capture value          */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_CC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_CC_OFFSET               0x44         /**< \brief (TCC_CC offset) Compare and Capture */
+#define TCC_CC_RESETVALUE           0x00000000   /**< \brief (TCC_CC reset_value) Compare and Capture */
+
+#define TCC_CC_CC_Pos               0            /**< \brief (TCC_CC) Compare and Capture value */
+#define TCC_CC_CC_Msk               (0xFFFFFFu << TCC_CC_CC_Pos)
+#define TCC_CC_CC(value)            ((TCC_CC_CC_Msk & ((value) << TCC_CC_CC_Pos)))
+#define TCC_CC_MASK                 0x00FFFFFFu  /**< \brief (TCC_CC) MASK Register */
+
+/* -------- TCC_PATTB : (TCC Offset: 0x64) (R/W 16) Pattern Buffer -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t PGEB0:1;          /*!< bit:      0  Pattern Generator 0 Output Enable Buffer */
+    uint16_t PGEB1:1;          /*!< bit:      1  Pattern Generator 1 Output Enable Buffer */
+    uint16_t PGEB2:1;          /*!< bit:      2  Pattern Generator 2 Output Enable Buffer */
+    uint16_t PGEB3:1;          /*!< bit:      3  Pattern Generator 3 Output Enable Buffer */
+    uint16_t PGEB4:1;          /*!< bit:      4  Pattern Generator 4 Output Enable Buffer */
+    uint16_t PGEB5:1;          /*!< bit:      5  Pattern Generator 5 Output Enable Buffer */
+    uint16_t PGEB6:1;          /*!< bit:      6  Pattern Generator 6 Output Enable Buffer */
+    uint16_t PGEB7:1;          /*!< bit:      7  Pattern Generator 7 Output Enable Buffer */
+    uint16_t PGVB0:1;          /*!< bit:      8  Pattern Generator 0 Output Enable  */
+    uint16_t PGVB1:1;          /*!< bit:      9  Pattern Generator 1 Output Enable  */
+    uint16_t PGVB2:1;          /*!< bit:     10  Pattern Generator 2 Output Enable  */
+    uint16_t PGVB3:1;          /*!< bit:     11  Pattern Generator 3 Output Enable  */
+    uint16_t PGVB4:1;          /*!< bit:     12  Pattern Generator 4 Output Enable  */
+    uint16_t PGVB5:1;          /*!< bit:     13  Pattern Generator 5 Output Enable  */
+    uint16_t PGVB6:1;          /*!< bit:     14  Pattern Generator 6 Output Enable  */
+    uint16_t PGVB7:1;          /*!< bit:     15  Pattern Generator 7 Output Enable  */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t PGEB:8;           /*!< bit:  0.. 7  Pattern Generator x Output Enable Buffer */
+    uint16_t PGVB:8;           /*!< bit:  8..15  Pattern Generator x Output Enable  */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} TCC_PATTB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_PATTB_OFFSET            0x64         /**< \brief (TCC_PATTB offset) Pattern Buffer */
+#define TCC_PATTB_RESETVALUE        0x0000       /**< \brief (TCC_PATTB reset_value) Pattern Buffer */
+
+#define TCC_PATTB_PGEB0_Pos         0            /**< \brief (TCC_PATTB) Pattern Generator 0 Output Enable Buffer */
+#define TCC_PATTB_PGEB0             (1 << TCC_PATTB_PGEB0_Pos)
+#define TCC_PATTB_PGEB1_Pos         1            /**< \brief (TCC_PATTB) Pattern Generator 1 Output Enable Buffer */
+#define TCC_PATTB_PGEB1             (1 << TCC_PATTB_PGEB1_Pos)
+#define TCC_PATTB_PGEB2_Pos         2            /**< \brief (TCC_PATTB) Pattern Generator 2 Output Enable Buffer */
+#define TCC_PATTB_PGEB2             (1 << TCC_PATTB_PGEB2_Pos)
+#define TCC_PATTB_PGEB3_Pos         3            /**< \brief (TCC_PATTB) Pattern Generator 3 Output Enable Buffer */
+#define TCC_PATTB_PGEB3             (1 << TCC_PATTB_PGEB3_Pos)
+#define TCC_PATTB_PGEB4_Pos         4            /**< \brief (TCC_PATTB) Pattern Generator 4 Output Enable Buffer */
+#define TCC_PATTB_PGEB4             (1 << TCC_PATTB_PGEB4_Pos)
+#define TCC_PATTB_PGEB5_Pos         5            /**< \brief (TCC_PATTB) Pattern Generator 5 Output Enable Buffer */
+#define TCC_PATTB_PGEB5             (1 << TCC_PATTB_PGEB5_Pos)
+#define TCC_PATTB_PGEB6_Pos         6            /**< \brief (TCC_PATTB) Pattern Generator 6 Output Enable Buffer */
+#define TCC_PATTB_PGEB6             (1 << TCC_PATTB_PGEB6_Pos)
+#define TCC_PATTB_PGEB7_Pos         7            /**< \brief (TCC_PATTB) Pattern Generator 7 Output Enable Buffer */
+#define TCC_PATTB_PGEB7             (1 << TCC_PATTB_PGEB7_Pos)
+#define TCC_PATTB_PGEB_Pos          0            /**< \brief (TCC_PATTB) Pattern Generator x Output Enable Buffer */
+#define TCC_PATTB_PGEB_Msk          (0xFFu << TCC_PATTB_PGEB_Pos)
+#define TCC_PATTB_PGEB(value)       ((TCC_PATTB_PGEB_Msk & ((value) << TCC_PATTB_PGEB_Pos)))
+#define TCC_PATTB_PGVB0_Pos         8            /**< \brief (TCC_PATTB) Pattern Generator 0 Output Enable */
+#define TCC_PATTB_PGVB0             (1 << TCC_PATTB_PGVB0_Pos)
+#define TCC_PATTB_PGVB1_Pos         9            /**< \brief (TCC_PATTB) Pattern Generator 1 Output Enable */
+#define TCC_PATTB_PGVB1             (1 << TCC_PATTB_PGVB1_Pos)
+#define TCC_PATTB_PGVB2_Pos         10           /**< \brief (TCC_PATTB) Pattern Generator 2 Output Enable */
+#define TCC_PATTB_PGVB2             (1 << TCC_PATTB_PGVB2_Pos)
+#define TCC_PATTB_PGVB3_Pos         11           /**< \brief (TCC_PATTB) Pattern Generator 3 Output Enable */
+#define TCC_PATTB_PGVB3             (1 << TCC_PATTB_PGVB3_Pos)
+#define TCC_PATTB_PGVB4_Pos         12           /**< \brief (TCC_PATTB) Pattern Generator 4 Output Enable */
+#define TCC_PATTB_PGVB4             (1 << TCC_PATTB_PGVB4_Pos)
+#define TCC_PATTB_PGVB5_Pos         13           /**< \brief (TCC_PATTB) Pattern Generator 5 Output Enable */
+#define TCC_PATTB_PGVB5             (1 << TCC_PATTB_PGVB5_Pos)
+#define TCC_PATTB_PGVB6_Pos         14           /**< \brief (TCC_PATTB) Pattern Generator 6 Output Enable */
+#define TCC_PATTB_PGVB6             (1 << TCC_PATTB_PGVB6_Pos)
+#define TCC_PATTB_PGVB7_Pos         15           /**< \brief (TCC_PATTB) Pattern Generator 7 Output Enable */
+#define TCC_PATTB_PGVB7             (1 << TCC_PATTB_PGVB7_Pos)
+#define TCC_PATTB_PGVB_Pos          8            /**< \brief (TCC_PATTB) Pattern Generator x Output Enable */
+#define TCC_PATTB_PGVB_Msk          (0xFFu << TCC_PATTB_PGVB_Pos)
+#define TCC_PATTB_PGVB(value)       ((TCC_PATTB_PGVB_Msk & ((value) << TCC_PATTB_PGVB_Pos)))
+#define TCC_PATTB_MASK              0xFFFFu      /**< \brief (TCC_PATTB) MASK Register */
+
+/* -------- TCC_WAVEB : (TCC Offset: 0x68) (R/W 32) Waveform Control Buffer -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t WAVEGENB:3;       /*!< bit:  0.. 2  Waveform Generation Buffer         */
+    uint32_t :1;               /*!< bit:      3  Reserved                           */
+    uint32_t RAMPB:2;          /*!< bit:  4.. 5  Ramp Mode Buffer                   */
+    uint32_t :1;               /*!< bit:      6  Reserved                           */
+    uint32_t CIPERENB:1;       /*!< bit:      7  Circular Period Enable Buffer      */
+    uint32_t CICCENB0:1;       /*!< bit:      8  Circular Channel 0 Enable Buffer   */
+    uint32_t CICCENB1:1;       /*!< bit:      9  Circular Channel 1 Enable Buffer   */
+    uint32_t CICCENB2:1;       /*!< bit:     10  Circular Channel 2 Enable Buffer   */
+    uint32_t CICCENB3:1;       /*!< bit:     11  Circular Channel 3 Enable Buffer   */
+    uint32_t :4;               /*!< bit: 12..15  Reserved                           */
+    uint32_t POLB0:1;          /*!< bit:     16  Channel 0 Polarity Buffer          */
+    uint32_t POLB1:1;          /*!< bit:     17  Channel 1 Polarity Buffer          */
+    uint32_t POLB2:1;          /*!< bit:     18  Channel 2 Polarity Buffer          */
+    uint32_t POLB3:1;          /*!< bit:     19  Channel 3 Polarity Buffer          */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t SWAPB0:1;         /*!< bit:     24  Swap DTI Output Pair 0 Buffer      */
+    uint32_t SWAPB1:1;         /*!< bit:     25  Swap DTI Output Pair 1 Buffer      */
+    uint32_t SWAPB2:1;         /*!< bit:     26  Swap DTI Output Pair 2 Buffer      */
+    uint32_t SWAPB3:1;         /*!< bit:     27  Swap DTI Output Pair 3 Buffer      */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint32_t :8;               /*!< bit:  0.. 7  Reserved                           */
+    uint32_t CICCENB:4;        /*!< bit:  8..11  Circular Channel x Enable Buffer   */
+    uint32_t :4;               /*!< bit: 12..15  Reserved                           */
+    uint32_t POLB:4;           /*!< bit: 16..19  Channel x Polarity Buffer          */
+    uint32_t :4;               /*!< bit: 20..23  Reserved                           */
+    uint32_t SWAPB:4;          /*!< bit: 24..27  Swap DTI Output Pair x Buffer      */
+    uint32_t :4;               /*!< bit: 28..31  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_WAVEB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_WAVEB_OFFSET            0x68         /**< \brief (TCC_WAVEB offset) Waveform Control Buffer */
+#define TCC_WAVEB_RESETVALUE        0x00000000   /**< \brief (TCC_WAVEB reset_value) Waveform Control Buffer */
+
+#define TCC_WAVEB_WAVEGENB_Pos      0            /**< \brief (TCC_WAVEB) Waveform Generation Buffer */
+#define TCC_WAVEB_WAVEGENB_Msk      (0x7u << TCC_WAVEB_WAVEGENB_Pos)
+#define TCC_WAVEB_WAVEGENB(value)   ((TCC_WAVEB_WAVEGENB_Msk & ((value) << TCC_WAVEB_WAVEGENB_Pos)))
+#define   TCC_WAVEB_WAVEGENB_NFRQ_Val     0x0u   /**< \brief (TCC_WAVEB)  */
+#define   TCC_WAVEB_WAVEGENB_MFRQ_Val     0x1u   /**< \brief (TCC_WAVEB)  */
+#define   TCC_WAVEB_WAVEGENB_NPWM_Val     0x2u   /**< \brief (TCC_WAVEB)  */
+#define   TCC_WAVEB_WAVEGENB_DSCRITICAL_Val 0x4u   /**< \brief (TCC_WAVEB)  */
+#define   TCC_WAVEB_WAVEGENB_DSBOTTOM_Val 0x5u   /**< \brief (TCC_WAVEB)  */
+#define   TCC_WAVEB_WAVEGENB_DSBOTH_Val   0x6u   /**< \brief (TCC_WAVEB)  */
+#define   TCC_WAVEB_WAVEGENB_DSTOP_Val    0x7u   /**< \brief (TCC_WAVEB)  */
+#define TCC_WAVEB_WAVEGENB_NFRQ     (TCC_WAVEB_WAVEGENB_NFRQ_Val   << TCC_WAVEB_WAVEGENB_Pos)
+#define TCC_WAVEB_WAVEGENB_MFRQ     (TCC_WAVEB_WAVEGENB_MFRQ_Val   << TCC_WAVEB_WAVEGENB_Pos)
+#define TCC_WAVEB_WAVEGENB_NPWM     (TCC_WAVEB_WAVEGENB_NPWM_Val   << TCC_WAVEB_WAVEGENB_Pos)
+#define TCC_WAVEB_WAVEGENB_DSCRITICAL (TCC_WAVEB_WAVEGENB_DSCRITICAL_Val << TCC_WAVEB_WAVEGENB_Pos)
+#define TCC_WAVEB_WAVEGENB_DSBOTTOM (TCC_WAVEB_WAVEGENB_DSBOTTOM_Val << TCC_WAVEB_WAVEGENB_Pos)
+#define TCC_WAVEB_WAVEGENB_DSBOTH   (TCC_WAVEB_WAVEGENB_DSBOTH_Val << TCC_WAVEB_WAVEGENB_Pos)
+#define TCC_WAVEB_WAVEGENB_DSTOP    (TCC_WAVEB_WAVEGENB_DSTOP_Val  << TCC_WAVEB_WAVEGENB_Pos)
+#define TCC_WAVEB_RAMPB_Pos         4            /**< \brief (TCC_WAVEB) Ramp Mode Buffer */
+#define TCC_WAVEB_RAMPB_Msk         (0x3u << TCC_WAVEB_RAMPB_Pos)
+#define TCC_WAVEB_RAMPB(value)      ((TCC_WAVEB_RAMPB_Msk & ((value) << TCC_WAVEB_RAMPB_Pos)))
+#define TCC_WAVEB_CIPERENB_Pos      7            /**< \brief (TCC_WAVEB) Circular Period Enable Buffer */
+#define TCC_WAVEB_CIPERENB          (0x1u << TCC_WAVEB_CIPERENB_Pos)
+#define TCC_WAVEB_CICCENB0_Pos      8            /**< \brief (TCC_WAVEB) Circular Channel 0 Enable Buffer */
+#define TCC_WAVEB_CICCENB0          (1 << TCC_WAVEB_CICCENB0_Pos)
+#define TCC_WAVEB_CICCENB1_Pos      9            /**< \brief (TCC_WAVEB) Circular Channel 1 Enable Buffer */
+#define TCC_WAVEB_CICCENB1          (1 << TCC_WAVEB_CICCENB1_Pos)
+#define TCC_WAVEB_CICCENB2_Pos      10           /**< \brief (TCC_WAVEB) Circular Channel 2 Enable Buffer */
+#define TCC_WAVEB_CICCENB2          (1 << TCC_WAVEB_CICCENB2_Pos)
+#define TCC_WAVEB_CICCENB3_Pos      11           /**< \brief (TCC_WAVEB) Circular Channel 3 Enable Buffer */
+#define TCC_WAVEB_CICCENB3          (1 << TCC_WAVEB_CICCENB3_Pos)
+#define TCC_WAVEB_CICCENB_Pos       8            /**< \brief (TCC_WAVEB) Circular Channel x Enable Buffer */
+#define TCC_WAVEB_CICCENB_Msk       (0xFu << TCC_WAVEB_CICCENB_Pos)
+#define TCC_WAVEB_CICCENB(value)    ((TCC_WAVEB_CICCENB_Msk & ((value) << TCC_WAVEB_CICCENB_Pos)))
+#define TCC_WAVEB_POLB0_Pos         16           /**< \brief (TCC_WAVEB) Channel 0 Polarity Buffer */
+#define TCC_WAVEB_POLB0             (1 << TCC_WAVEB_POLB0_Pos)
+#define TCC_WAVEB_POLB1_Pos         17           /**< \brief (TCC_WAVEB) Channel 1 Polarity Buffer */
+#define TCC_WAVEB_POLB1             (1 << TCC_WAVEB_POLB1_Pos)
+#define TCC_WAVEB_POLB2_Pos         18           /**< \brief (TCC_WAVEB) Channel 2 Polarity Buffer */
+#define TCC_WAVEB_POLB2             (1 << TCC_WAVEB_POLB2_Pos)
+#define TCC_WAVEB_POLB3_Pos         19           /**< \brief (TCC_WAVEB) Channel 3 Polarity Buffer */
+#define TCC_WAVEB_POLB3             (1 << TCC_WAVEB_POLB3_Pos)
+#define TCC_WAVEB_POLB_Pos          16           /**< \brief (TCC_WAVEB) Channel x Polarity Buffer */
+#define TCC_WAVEB_POLB_Msk          (0xFu << TCC_WAVEB_POLB_Pos)
+#define TCC_WAVEB_POLB(value)       ((TCC_WAVEB_POLB_Msk & ((value) << TCC_WAVEB_POLB_Pos)))
+#define TCC_WAVEB_SWAPB0_Pos        24           /**< \brief (TCC_WAVEB) Swap DTI Output Pair 0 Buffer */
+#define TCC_WAVEB_SWAPB0            (1 << TCC_WAVEB_SWAPB0_Pos)
+#define TCC_WAVEB_SWAPB1_Pos        25           /**< \brief (TCC_WAVEB) Swap DTI Output Pair 1 Buffer */
+#define TCC_WAVEB_SWAPB1            (1 << TCC_WAVEB_SWAPB1_Pos)
+#define TCC_WAVEB_SWAPB2_Pos        26           /**< \brief (TCC_WAVEB) Swap DTI Output Pair 2 Buffer */
+#define TCC_WAVEB_SWAPB2            (1 << TCC_WAVEB_SWAPB2_Pos)
+#define TCC_WAVEB_SWAPB3_Pos        27           /**< \brief (TCC_WAVEB) Swap DTI Output Pair 3 Buffer */
+#define TCC_WAVEB_SWAPB3            (1 << TCC_WAVEB_SWAPB3_Pos)
+#define TCC_WAVEB_SWAPB_Pos         24           /**< \brief (TCC_WAVEB) Swap DTI Output Pair x Buffer */
+#define TCC_WAVEB_SWAPB_Msk         (0xFu << TCC_WAVEB_SWAPB_Pos)
+#define TCC_WAVEB_SWAPB(value)      ((TCC_WAVEB_SWAPB_Msk & ((value) << TCC_WAVEB_SWAPB_Pos)))
+#define TCC_WAVEB_MASK              0x0F0F0FB7u  /**< \brief (TCC_WAVEB) MASK Register */
+
+/* -------- TCC_PERB : (TCC Offset: 0x6C) (R/W 32) Period Buffer -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t PERB:24;          /*!< bit:  0..23  Period Value                       */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_PERB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_PERB_OFFSET             0x6C         /**< \brief (TCC_PERB offset) Period Buffer */
+#define TCC_PERB_RESETVALUE         0xFFFFFFFF   /**< \brief (TCC_PERB reset_value) Period Buffer */
+
+#define TCC_PERB_PERB_Pos           0            /**< \brief (TCC_PERB) Period Value */
+#define TCC_PERB_PERB_Msk           (0xFFFFFFu << TCC_PERB_PERB_Pos)
+#define TCC_PERB_PERB(value)        ((TCC_PERB_PERB_Msk & ((value) << TCC_PERB_PERB_Pos)))
+#define TCC_PERB_MASK               0x00FFFFFFu  /**< \brief (TCC_PERB) MASK Register */
+
+/* -------- TCC_CCB : (TCC Offset: 0x70) (R/W 32) Compare and Capture Buffer -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t CCB:24;           /*!< bit:  0..23  Compare and Capture buffer value   */
+    uint32_t :8;               /*!< bit: 24..31  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} TCC_CCB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define TCC_CCB_OFFSET              0x70         /**< \brief (TCC_CCB offset) Compare and Capture Buffer */
+#define TCC_CCB_RESETVALUE          0x00000000   /**< \brief (TCC_CCB reset_value) Compare and Capture Buffer */
+
+#define TCC_CCB_CCB_Pos             0            /**< \brief (TCC_CCB) Compare and Capture buffer value */
+#define TCC_CCB_CCB_Msk             (0xFFFFFFu << TCC_CCB_CCB_Pos)
+#define TCC_CCB_CCB(value)          ((TCC_CCB_CCB_Msk & ((value) << TCC_CCB_CCB_Pos)))
+#define TCC_CCB_MASK                0x00FFFFFFu  /**< \brief (TCC_CCB) MASK Register */
+
+/** \brief TCC hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO TCC_CTRLA_Type            CTRLA;       /**< \brief Offset: 0x00 (R/W 32) Control A */
+  __IO TCC_CTRLBCLR_Type         CTRLBCLR;    /**< \brief Offset: 0x04 (R/W  8) Control B Clear */
+  __IO TCC_CTRLBSET_Type         CTRLBSET;    /**< \brief Offset: 0x05 (R/W  8) Control B Set */
+       RoReg8                    Reserved1[0x2];
+  __I  TCC_SYNCBUSY_Type         SYNCBUSY;    /**< \brief Offset: 0x08 (R/  32) Synchronization Busy */
+  __IO TCC_FCTRLA_Type           FCTRLA;      /**< \brief Offset: 0x0C (R/W 32) Recoverable FaultA Configuration */
+  __IO TCC_FCTRLB_Type           FCTRLB;      /**< \brief Offset: 0x10 (R/W 32) Recoverable FaultB Configuration */
+  __IO TCC_WEXCTRL_Type          WEXCTRL;     /**< \brief Offset: 0x14 (R/W 32) Waveform Extension Configuration */
+  __IO TCC_DRVCTRL_Type          DRVCTRL;     /**< \brief Offset: 0x18 (R/W 32) Driver Configuration */
+       RoReg8                    Reserved2[0x2];
+  __IO TCC_DBGCTRL_Type          DBGCTRL;     /**< \brief Offset: 0x1E (R/W  8) Debug Control */
+       RoReg8                    Reserved3[0x1];
+  __IO TCC_EVCTRL_Type           EVCTRL;      /**< \brief Offset: 0x20 (R/W 32) Event Control */
+  __IO TCC_INTENCLR_Type         INTENCLR;    /**< \brief Offset: 0x24 (R/W 32) Interrupt Enable Clear */
+  __IO TCC_INTENSET_Type         INTENSET;    /**< \brief Offset: 0x28 (R/W 32) Interrupt Enable Set */
+  __IO TCC_INTFLAG_Type          INTFLAG;     /**< \brief Offset: 0x2C (R/W 32) Interrupt Flag Status and Clear */
+  __IO TCC_STATUS_Type           STATUS;      /**< \brief Offset: 0x30 (R/W 32) Status */
+  __IO TCC_COUNT_Type            COUNT;       /**< \brief Offset: 0x34 (R/W 32) Count */
+  __IO TCC_PATT_Type             PATT;        /**< \brief Offset: 0x38 (R/W 16) Pattern */
+       RoReg8                    Reserved4[0x2];
+  __IO TCC_WAVE_Type             WAVE;        /**< \brief Offset: 0x3C (R/W 32) Waveform Control */
+  __IO TCC_PER_Type              PER;         /**< \brief Offset: 0x40 (R/W 32) Period */
+  __IO TCC_CC_Type               CC[4];       /**< \brief Offset: 0x44 (R/W 32) Compare and Capture */
+       RoReg8                    Reserved5[0x10];
+  __IO TCC_PATTB_Type            PATTB;       /**< \brief Offset: 0x64 (R/W 16) Pattern Buffer */
+       RoReg8                    Reserved6[0x2];
+  __IO TCC_WAVEB_Type            WAVEB;       /**< \brief Offset: 0x68 (R/W 32) Waveform Control Buffer */
+  __IO TCC_PERB_Type             PERB;        /**< \brief Offset: 0x6C (R/W 32) Period Buffer */
+  __IO TCC_CCB_Type              CCB[4];      /**< \brief Offset: 0x70 (R/W 32) Compare and Capture Buffer */
+} Tcc;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_TCC_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/usb.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/usb.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/usb.h	(revision 136)
@@ -0,0 +1,1767 @@
+/**
+ * \file
+ *
+ * \brief Component description for USB
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_USB_COMPONENT_
+#define _SAMD21_USB_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR USB */
+/* ========================================================================== */
+/** \addtogroup SAMD21_USB Universal Serial Bus */
+/*@{*/
+
+#define USB_U2222
+#define REV_USB                     0x101
+
+/* -------- USB_CTRLA : (USB Offset: 0x000) (R/W  8) Control A -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
+    uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint8_t  RUNSTDBY:1;       /*!< bit:      2  Run in Standby Mode                */
+    uint8_t  :4;               /*!< bit:  3.. 6  Reserved                           */
+    uint8_t  MODE:1;           /*!< bit:      7  Operating Mode                     */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_CTRLA_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_CTRLA_OFFSET            0x000        /**< \brief (USB_CTRLA offset) Control A */
+#define USB_CTRLA_RESETVALUE        0x00         /**< \brief (USB_CTRLA reset_value) Control A */
+
+#define USB_CTRLA_SWRST_Pos         0            /**< \brief (USB_CTRLA) Software Reset */
+#define USB_CTRLA_SWRST             (0x1u << USB_CTRLA_SWRST_Pos)
+#define USB_CTRLA_ENABLE_Pos        1            /**< \brief (USB_CTRLA) Enable */
+#define USB_CTRLA_ENABLE            (0x1u << USB_CTRLA_ENABLE_Pos)
+#define USB_CTRLA_RUNSTDBY_Pos      2            /**< \brief (USB_CTRLA) Run in Standby Mode */
+#define USB_CTRLA_RUNSTDBY          (0x1u << USB_CTRLA_RUNSTDBY_Pos)
+#define USB_CTRLA_MODE_Pos          7            /**< \brief (USB_CTRLA) Operating Mode */
+#define USB_CTRLA_MODE              (0x1u << USB_CTRLA_MODE_Pos)
+#define   USB_CTRLA_MODE_DEVICE_Val       0x0u   /**< \brief (USB_CTRLA) Device Mode */
+#define   USB_CTRLA_MODE_HOST_Val         0x1u   /**< \brief (USB_CTRLA) Host Mode */
+#define USB_CTRLA_MODE_DEVICE       (USB_CTRLA_MODE_DEVICE_Val     << USB_CTRLA_MODE_Pos)
+#define USB_CTRLA_MODE_HOST         (USB_CTRLA_MODE_HOST_Val       << USB_CTRLA_MODE_Pos)
+#define USB_CTRLA_MASK              0x87u        /**< \brief (USB_CTRLA) MASK Register */
+
+/* -------- USB_SYNCBUSY : (USB Offset: 0x002) (R/   8) Synchronization Busy -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset Synchronization Busy */
+    uint8_t  ENABLE:1;         /*!< bit:      1  Enable Synchronization Busy        */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_SYNCBUSY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_SYNCBUSY_OFFSET         0x002        /**< \brief (USB_SYNCBUSY offset) Synchronization Busy */
+#define USB_SYNCBUSY_RESETVALUE     0x00         /**< \brief (USB_SYNCBUSY reset_value) Synchronization Busy */
+
+#define USB_SYNCBUSY_SWRST_Pos      0            /**< \brief (USB_SYNCBUSY) Software Reset Synchronization Busy */
+#define USB_SYNCBUSY_SWRST          (0x1u << USB_SYNCBUSY_SWRST_Pos)
+#define USB_SYNCBUSY_ENABLE_Pos     1            /**< \brief (USB_SYNCBUSY) Enable Synchronization Busy */
+#define USB_SYNCBUSY_ENABLE         (0x1u << USB_SYNCBUSY_ENABLE_Pos)
+#define USB_SYNCBUSY_MASK           0x03u        /**< \brief (USB_SYNCBUSY) MASK Register */
+
+/* -------- USB_DEVICE_CTRLB : (USB Offset: 0x008) (R/W 16) DEVICE DEVICE Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t DETACH:1;         /*!< bit:      0  Detach                             */
+    uint16_t UPRSM:1;          /*!< bit:      1  Upstream Resume                    */
+    uint16_t SPDCONF:2;        /*!< bit:  2.. 3  Speed Configuration                */
+    uint16_t NREPLY:1;         /*!< bit:      4  No Reply                           */
+    uint16_t TSTJ:1;           /*!< bit:      5  Test mode J                        */
+    uint16_t TSTK:1;           /*!< bit:      6  Test mode K                        */
+    uint16_t TSTPCKT:1;        /*!< bit:      7  Test packet mode                   */
+    uint16_t OPMODE2:1;        /*!< bit:      8  Specific Operational Mode          */
+    uint16_t GNAK:1;           /*!< bit:      9  Global NAK                         */
+    uint16_t LPMHDSK:2;        /*!< bit: 10..11  Link Power Management Handshake    */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_DEVICE_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_CTRLB_OFFSET     0x008        /**< \brief (USB_DEVICE_CTRLB offset) DEVICE Control B */
+#define USB_DEVICE_CTRLB_RESETVALUE 0x0001       /**< \brief (USB_DEVICE_CTRLB reset_value) DEVICE Control B */
+
+#define USB_DEVICE_CTRLB_DETACH_Pos 0            /**< \brief (USB_DEVICE_CTRLB) Detach */
+#define USB_DEVICE_CTRLB_DETACH     (0x1u << USB_DEVICE_CTRLB_DETACH_Pos)
+#define USB_DEVICE_CTRLB_UPRSM_Pos  1            /**< \brief (USB_DEVICE_CTRLB) Upstream Resume */
+#define USB_DEVICE_CTRLB_UPRSM      (0x1u << USB_DEVICE_CTRLB_UPRSM_Pos)
+#define USB_DEVICE_CTRLB_SPDCONF_Pos 2            /**< \brief (USB_DEVICE_CTRLB) Speed Configuration */
+#define USB_DEVICE_CTRLB_SPDCONF_Msk (0x3u << USB_DEVICE_CTRLB_SPDCONF_Pos)
+#define USB_DEVICE_CTRLB_SPDCONF(value) ((USB_DEVICE_CTRLB_SPDCONF_Msk & ((value) << USB_DEVICE_CTRLB_SPDCONF_Pos)))
+#define   USB_DEVICE_CTRLB_SPDCONF_0_Val  0x0u   /**< \brief (USB_DEVICE_CTRLB) FS : Full Speed */
+#define   USB_DEVICE_CTRLB_SPDCONF_1_Val  0x1u   /**< \brief (USB_DEVICE_CTRLB) LS : Low Speed */
+#define   USB_DEVICE_CTRLB_SPDCONF_2_Val  0x2u   /**< \brief (USB_DEVICE_CTRLB) HS : High Speed capable */
+#define   USB_DEVICE_CTRLB_SPDCONF_3_Val  0x3u   /**< \brief (USB_DEVICE_CTRLB) HSTM: High Speed Test Mode (force high-speed mode for test mode) */
+#define USB_DEVICE_CTRLB_SPDCONF_0  (USB_DEVICE_CTRLB_SPDCONF_0_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
+#define USB_DEVICE_CTRLB_SPDCONF_1  (USB_DEVICE_CTRLB_SPDCONF_1_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
+#define USB_DEVICE_CTRLB_SPDCONF_2  (USB_DEVICE_CTRLB_SPDCONF_2_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
+#define USB_DEVICE_CTRLB_SPDCONF_3  (USB_DEVICE_CTRLB_SPDCONF_3_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
+#define USB_DEVICE_CTRLB_NREPLY_Pos 4            /**< \brief (USB_DEVICE_CTRLB) No Reply */
+#define USB_DEVICE_CTRLB_NREPLY     (0x1u << USB_DEVICE_CTRLB_NREPLY_Pos)
+#define USB_DEVICE_CTRLB_TSTJ_Pos   5            /**< \brief (USB_DEVICE_CTRLB) Test mode J */
+#define USB_DEVICE_CTRLB_TSTJ       (0x1u << USB_DEVICE_CTRLB_TSTJ_Pos)
+#define USB_DEVICE_CTRLB_TSTK_Pos   6            /**< \brief (USB_DEVICE_CTRLB) Test mode K */
+#define USB_DEVICE_CTRLB_TSTK       (0x1u << USB_DEVICE_CTRLB_TSTK_Pos)
+#define USB_DEVICE_CTRLB_TSTPCKT_Pos 7            /**< \brief (USB_DEVICE_CTRLB) Test packet mode */
+#define USB_DEVICE_CTRLB_TSTPCKT    (0x1u << USB_DEVICE_CTRLB_TSTPCKT_Pos)
+#define USB_DEVICE_CTRLB_OPMODE2_Pos 8            /**< \brief (USB_DEVICE_CTRLB) Specific Operational Mode */
+#define USB_DEVICE_CTRLB_OPMODE2    (0x1u << USB_DEVICE_CTRLB_OPMODE2_Pos)
+#define USB_DEVICE_CTRLB_GNAK_Pos   9            /**< \brief (USB_DEVICE_CTRLB) Global NAK */
+#define USB_DEVICE_CTRLB_GNAK       (0x1u << USB_DEVICE_CTRLB_GNAK_Pos)
+#define USB_DEVICE_CTRLB_LPMHDSK_Pos 10           /**< \brief (USB_DEVICE_CTRLB) Link Power Management Handshake */
+#define USB_DEVICE_CTRLB_LPMHDSK_Msk (0x3u << USB_DEVICE_CTRLB_LPMHDSK_Pos)
+#define USB_DEVICE_CTRLB_LPMHDSK(value) ((USB_DEVICE_CTRLB_LPMHDSK_Msk & ((value) << USB_DEVICE_CTRLB_LPMHDSK_Pos)))
+#define   USB_DEVICE_CTRLB_LPMHDSK_NO_Val 0x0u   /**< \brief (USB_DEVICE_CTRLB) No handshake. LPM is not supported */
+#define   USB_DEVICE_CTRLB_LPMHDSK_ACK_Val 0x1u   /**< \brief (USB_DEVICE_CTRLB) ACK */
+#define   USB_DEVICE_CTRLB_LPMHDSK_NYET_Val 0x2u   /**< \brief (USB_DEVICE_CTRLB) NYET */
+#define   USB_DEVICE_CTRLB_LPMHDSK_STALL_Val 0x3u   /**< \brief (USB_DEVICE_CTRLB) STALL */
+#define USB_DEVICE_CTRLB_LPMHDSK_NO (USB_DEVICE_CTRLB_LPMHDSK_NO_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
+#define USB_DEVICE_CTRLB_LPMHDSK_ACK (USB_DEVICE_CTRLB_LPMHDSK_ACK_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
+#define USB_DEVICE_CTRLB_LPMHDSK_NYET (USB_DEVICE_CTRLB_LPMHDSK_NYET_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
+#define USB_DEVICE_CTRLB_LPMHDSK_STALL (USB_DEVICE_CTRLB_LPMHDSK_STALL_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
+#define USB_DEVICE_CTRLB_MASK       0x0FFFu      /**< \brief (USB_DEVICE_CTRLB) MASK Register */
+
+/* -------- USB_HOST_CTRLB : (USB Offset: 0x008) (R/W 16) HOST HOST Control B -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t :1;               /*!< bit:      0  Reserved                           */
+    uint16_t RESUME:1;         /*!< bit:      1  Send USB Resume                    */
+    uint16_t SPDCONF:2;        /*!< bit:  2.. 3  Speed Configuration for Host       */
+    uint16_t :1;               /*!< bit:      4  Reserved                           */
+    uint16_t TSTJ:1;           /*!< bit:      5  Test mode J                        */
+    uint16_t TSTK:1;           /*!< bit:      6  Test mode K                        */
+    uint16_t :1;               /*!< bit:      7  Reserved                           */
+    uint16_t SOFE:1;           /*!< bit:      8  Start of Frame Generation Enable   */
+    uint16_t BUSRESET:1;       /*!< bit:      9  Send USB Reset                     */
+    uint16_t VBUSOK:1;         /*!< bit:     10  VBUS is OK                         */
+    uint16_t L1RESUME:1;       /*!< bit:     11  Send L1 Resume                     */
+    uint16_t :4;               /*!< bit: 12..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_HOST_CTRLB_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_CTRLB_OFFSET       0x008        /**< \brief (USB_HOST_CTRLB offset) HOST Control B */
+#define USB_HOST_CTRLB_RESETVALUE   0x0000       /**< \brief (USB_HOST_CTRLB reset_value) HOST Control B */
+
+#define USB_HOST_CTRLB_RESUME_Pos   1            /**< \brief (USB_HOST_CTRLB) Send USB Resume */
+#define USB_HOST_CTRLB_RESUME       (0x1u << USB_HOST_CTRLB_RESUME_Pos)
+#define USB_HOST_CTRLB_SPDCONF_Pos  2            /**< \brief (USB_HOST_CTRLB) Speed Configuration for Host */
+#define USB_HOST_CTRLB_SPDCONF_Msk  (0x3u << USB_HOST_CTRLB_SPDCONF_Pos)
+#define USB_HOST_CTRLB_SPDCONF(value) ((USB_HOST_CTRLB_SPDCONF_Msk & ((value) << USB_HOST_CTRLB_SPDCONF_Pos)))
+#define   USB_HOST_CTRLB_SPDCONF_0_Val    0x0u   /**< \brief (USB_HOST_CTRLB) Normal mode:the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheralis high-speed capable. */
+#define   USB_HOST_CTRLB_SPDCONF_1_Val    0x1u   /**< \brief (USB_HOST_CTRLB) reserved */
+#define   USB_HOST_CTRLB_SPDCONF_2_Val    0x2u   /**< \brief (USB_HOST_CTRLB) reserved */
+#define   USB_HOST_CTRLB_SPDCONF_3_Val    0x3u   /**< \brief (USB_HOST_CTRLB) Full-speed:the host remains in full-speed mode whatever is the peripheral speed capability. Releveant in UTMI mode only. */
+#define USB_HOST_CTRLB_SPDCONF_0    (USB_HOST_CTRLB_SPDCONF_0_Val  << USB_HOST_CTRLB_SPDCONF_Pos)
+#define USB_HOST_CTRLB_SPDCONF_1    (USB_HOST_CTRLB_SPDCONF_1_Val  << USB_HOST_CTRLB_SPDCONF_Pos)
+#define USB_HOST_CTRLB_SPDCONF_2    (USB_HOST_CTRLB_SPDCONF_2_Val  << USB_HOST_CTRLB_SPDCONF_Pos)
+#define USB_HOST_CTRLB_SPDCONF_3    (USB_HOST_CTRLB_SPDCONF_3_Val  << USB_HOST_CTRLB_SPDCONF_Pos)
+#define USB_HOST_CTRLB_TSTJ_Pos     5            /**< \brief (USB_HOST_CTRLB) Test mode J */
+#define USB_HOST_CTRLB_TSTJ         (0x1u << USB_HOST_CTRLB_TSTJ_Pos)
+#define USB_HOST_CTRLB_TSTK_Pos     6            /**< \brief (USB_HOST_CTRLB) Test mode K */
+#define USB_HOST_CTRLB_TSTK         (0x1u << USB_HOST_CTRLB_TSTK_Pos)
+#define USB_HOST_CTRLB_SOFE_Pos     8            /**< \brief (USB_HOST_CTRLB) Start of Frame Generation Enable */
+#define USB_HOST_CTRLB_SOFE         (0x1u << USB_HOST_CTRLB_SOFE_Pos)
+#define USB_HOST_CTRLB_BUSRESET_Pos 9            /**< \brief (USB_HOST_CTRLB) Send USB Reset */
+#define USB_HOST_CTRLB_BUSRESET     (0x1u << USB_HOST_CTRLB_BUSRESET_Pos)
+#define USB_HOST_CTRLB_VBUSOK_Pos   10           /**< \brief (USB_HOST_CTRLB) VBUS is OK */
+#define USB_HOST_CTRLB_VBUSOK       (0x1u << USB_HOST_CTRLB_VBUSOK_Pos)
+#define USB_HOST_CTRLB_L1RESUME_Pos 11           /**< \brief (USB_HOST_CTRLB) Send L1 Resume */
+#define USB_HOST_CTRLB_L1RESUME     (0x1u << USB_HOST_CTRLB_L1RESUME_Pos)
+#define USB_HOST_CTRLB_MASK         0x0F6Eu      /**< \brief (USB_HOST_CTRLB) MASK Register */
+
+/* -------- USB_DEVICE_DADD : (USB Offset: 0x00A) (R/W  8) DEVICE DEVICE Device Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DADD:7;           /*!< bit:  0.. 6  Device Address                     */
+    uint8_t  ADDEN:1;          /*!< bit:      7  Device Address Enable              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_DADD_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_DADD_OFFSET      0x00A        /**< \brief (USB_DEVICE_DADD offset) DEVICE Device Address */
+#define USB_DEVICE_DADD_RESETVALUE  0x00         /**< \brief (USB_DEVICE_DADD reset_value) DEVICE Device Address */
+
+#define USB_DEVICE_DADD_DADD_Pos    0            /**< \brief (USB_DEVICE_DADD) Device Address */
+#define USB_DEVICE_DADD_DADD_Msk    (0x7Fu << USB_DEVICE_DADD_DADD_Pos)
+#define USB_DEVICE_DADD_DADD(value) ((USB_DEVICE_DADD_DADD_Msk & ((value) << USB_DEVICE_DADD_DADD_Pos)))
+#define USB_DEVICE_DADD_ADDEN_Pos   7            /**< \brief (USB_DEVICE_DADD) Device Address Enable */
+#define USB_DEVICE_DADD_ADDEN       (0x1u << USB_DEVICE_DADD_ADDEN_Pos)
+#define USB_DEVICE_DADD_MASK        0xFFu        /**< \brief (USB_DEVICE_DADD) MASK Register */
+
+/* -------- USB_HOST_HSOFC : (USB Offset: 0x00A) (R/W  8) HOST HOST Host Start Of Frame Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  FLENC:4;          /*!< bit:  0.. 3  Frame Length Control               */
+    uint8_t  :3;               /*!< bit:  4.. 6  Reserved                           */
+    uint8_t  FLENCE:1;         /*!< bit:      7  Frame Length Control Enable        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_HSOFC_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_HSOFC_OFFSET       0x00A        /**< \brief (USB_HOST_HSOFC offset) HOST Host Start Of Frame Control */
+#define USB_HOST_HSOFC_RESETVALUE   0x00         /**< \brief (USB_HOST_HSOFC reset_value) HOST Host Start Of Frame Control */
+
+#define USB_HOST_HSOFC_FLENC_Pos    0            /**< \brief (USB_HOST_HSOFC) Frame Length Control */
+#define USB_HOST_HSOFC_FLENC_Msk    (0xFu << USB_HOST_HSOFC_FLENC_Pos)
+#define USB_HOST_HSOFC_FLENC(value) ((USB_HOST_HSOFC_FLENC_Msk & ((value) << USB_HOST_HSOFC_FLENC_Pos)))
+#define USB_HOST_HSOFC_FLENCE_Pos   7            /**< \brief (USB_HOST_HSOFC) Frame Length Control Enable */
+#define USB_HOST_HSOFC_FLENCE       (0x1u << USB_HOST_HSOFC_FLENCE_Pos)
+#define USB_HOST_HSOFC_MASK         0x8Fu        /**< \brief (USB_HOST_HSOFC) MASK Register */
+
+/* -------- USB_DEVICE_STATUS : (USB Offset: 0x00C) (R/   8) DEVICE DEVICE Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint8_t  SPEED:2;          /*!< bit:  2.. 3  Speed Status                       */
+    uint8_t  :2;               /*!< bit:  4.. 5  Reserved                           */
+    uint8_t  LINESTATE:2;      /*!< bit:  6.. 7  USB Line State Status              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_STATUS_OFFSET    0x00C        /**< \brief (USB_DEVICE_STATUS offset) DEVICE Status */
+#define USB_DEVICE_STATUS_RESETVALUE 0x40         /**< \brief (USB_DEVICE_STATUS reset_value) DEVICE Status */
+
+#define USB_DEVICE_STATUS_SPEED_Pos 2            /**< \brief (USB_DEVICE_STATUS) Speed Status */
+#define USB_DEVICE_STATUS_SPEED_Msk (0x3u << USB_DEVICE_STATUS_SPEED_Pos)
+#define USB_DEVICE_STATUS_SPEED(value) ((USB_DEVICE_STATUS_SPEED_Msk & ((value) << USB_DEVICE_STATUS_SPEED_Pos)))
+#define   USB_DEVICE_STATUS_SPEED_0_Val   0x0u   /**< \brief (USB_DEVICE_STATUS) Full-speed mode */
+#define   USB_DEVICE_STATUS_SPEED_1_Val   0x1u   /**< \brief (USB_DEVICE_STATUS) High-speed mode */
+#define   USB_DEVICE_STATUS_SPEED_2_Val   0x2u   /**< \brief (USB_DEVICE_STATUS) Low-speed mode */
+#define USB_DEVICE_STATUS_SPEED_0   (USB_DEVICE_STATUS_SPEED_0_Val << USB_DEVICE_STATUS_SPEED_Pos)
+#define USB_DEVICE_STATUS_SPEED_1   (USB_DEVICE_STATUS_SPEED_1_Val << USB_DEVICE_STATUS_SPEED_Pos)
+#define USB_DEVICE_STATUS_SPEED_2   (USB_DEVICE_STATUS_SPEED_2_Val << USB_DEVICE_STATUS_SPEED_Pos)
+#define USB_DEVICE_STATUS_LINESTATE_Pos 6            /**< \brief (USB_DEVICE_STATUS) USB Line State Status */
+#define USB_DEVICE_STATUS_LINESTATE_Msk (0x3u << USB_DEVICE_STATUS_LINESTATE_Pos)
+#define USB_DEVICE_STATUS_LINESTATE(value) ((USB_DEVICE_STATUS_LINESTATE_Msk & ((value) << USB_DEVICE_STATUS_LINESTATE_Pos)))
+#define   USB_DEVICE_STATUS_LINESTATE_0_Val 0x0u   /**< \brief (USB_DEVICE_STATUS) SE0/RESET */
+#define   USB_DEVICE_STATUS_LINESTATE_1_Val 0x1u   /**< \brief (USB_DEVICE_STATUS) FS-J or LS-K State */
+#define   USB_DEVICE_STATUS_LINESTATE_2_Val 0x2u   /**< \brief (USB_DEVICE_STATUS) FS-K or LS-J State */
+#define USB_DEVICE_STATUS_LINESTATE_0 (USB_DEVICE_STATUS_LINESTATE_0_Val << USB_DEVICE_STATUS_LINESTATE_Pos)
+#define USB_DEVICE_STATUS_LINESTATE_1 (USB_DEVICE_STATUS_LINESTATE_1_Val << USB_DEVICE_STATUS_LINESTATE_Pos)
+#define USB_DEVICE_STATUS_LINESTATE_2 (USB_DEVICE_STATUS_LINESTATE_2_Val << USB_DEVICE_STATUS_LINESTATE_Pos)
+#define USB_DEVICE_STATUS_MASK      0xCCu        /**< \brief (USB_DEVICE_STATUS) MASK Register */
+
+/* -------- USB_HOST_STATUS : (USB Offset: 0x00C) (R/W  8) HOST HOST Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint8_t  SPEED:2;          /*!< bit:  2.. 3  Speed Status                       */
+    uint8_t  :2;               /*!< bit:  4.. 5  Reserved                           */
+    uint8_t  LINESTATE:2;      /*!< bit:  6.. 7  USB Line State Status              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_STATUS_OFFSET      0x00C        /**< \brief (USB_HOST_STATUS offset) HOST Status */
+#define USB_HOST_STATUS_RESETVALUE  0x00         /**< \brief (USB_HOST_STATUS reset_value) HOST Status */
+
+#define USB_HOST_STATUS_SPEED_Pos   2            /**< \brief (USB_HOST_STATUS) Speed Status */
+#define USB_HOST_STATUS_SPEED_Msk   (0x3u << USB_HOST_STATUS_SPEED_Pos)
+#define USB_HOST_STATUS_SPEED(value) ((USB_HOST_STATUS_SPEED_Msk & ((value) << USB_HOST_STATUS_SPEED_Pos)))
+#define USB_HOST_STATUS_LINESTATE_Pos 6            /**< \brief (USB_HOST_STATUS) USB Line State Status */
+#define USB_HOST_STATUS_LINESTATE_Msk (0x3u << USB_HOST_STATUS_LINESTATE_Pos)
+#define USB_HOST_STATUS_LINESTATE(value) ((USB_HOST_STATUS_LINESTATE_Msk & ((value) << USB_HOST_STATUS_LINESTATE_Pos)))
+#define USB_HOST_STATUS_MASK        0xCCu        /**< \brief (USB_HOST_STATUS) MASK Register */
+
+/* -------- USB_FSMSTATUS : (USB Offset: 0x00D) (R/   8) Finite State Machine Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  FSMSTATE:6;       /*!< bit:  0.. 5  Fine State Machine Status          */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_FSMSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_FSMSTATUS_OFFSET        0x00D        /**< \brief (USB_FSMSTATUS offset) Finite State Machine Status */
+#define USB_FSMSTATUS_RESETVALUE    0x01         /**< \brief (USB_FSMSTATUS reset_value) Finite State Machine Status */
+
+#define USB_FSMSTATUS_FSMSTATE_Pos  0            /**< \brief (USB_FSMSTATUS) Fine State Machine Status */
+#define USB_FSMSTATUS_FSMSTATE_Msk  (0x3Fu << USB_FSMSTATUS_FSMSTATE_Pos)
+#define USB_FSMSTATUS_FSMSTATE(value) ((USB_FSMSTATUS_FSMSTATE_Msk & ((value) << USB_FSMSTATUS_FSMSTATE_Pos)))
+#define   USB_FSMSTATUS_FSMSTATE_1_Val    0x1u   /**< \brief (USB_FSMSTATUS) OFF (L3). It corresponds to the powered-off, disconnected, and disabled state */
+#define   USB_FSMSTATUS_FSMSTATE_2_Val    0x2u   /**< \brief (USB_FSMSTATUS) ON (L0). It corresponds to the Idle and Active states */
+#define   USB_FSMSTATUS_FSMSTATE_4_Val    0x4u   /**< \brief (USB_FSMSTATUS) SUSPEND (L2) */
+#define   USB_FSMSTATUS_FSMSTATE_8_Val    0x8u   /**< \brief (USB_FSMSTATUS) SLEEP (L1) */
+#define   USB_FSMSTATUS_FSMSTATE_16_Val   0x10u   /**< \brief (USB_FSMSTATUS) DNRESUME. Down Stream Resume. */
+#define   USB_FSMSTATUS_FSMSTATE_32_Val   0x20u   /**< \brief (USB_FSMSTATUS) UPRESUME. Up Stream Resume. */
+#define   USB_FSMSTATUS_FSMSTATE_64_Val   0x40u   /**< \brief (USB_FSMSTATUS) RESET. USB lines Reset. */
+#define USB_FSMSTATUS_FSMSTATE_1    (USB_FSMSTATUS_FSMSTATE_1_Val  << USB_FSMSTATUS_FSMSTATE_Pos)
+#define USB_FSMSTATUS_FSMSTATE_2    (USB_FSMSTATUS_FSMSTATE_2_Val  << USB_FSMSTATUS_FSMSTATE_Pos)
+#define USB_FSMSTATUS_FSMSTATE_4    (USB_FSMSTATUS_FSMSTATE_4_Val  << USB_FSMSTATUS_FSMSTATE_Pos)
+#define USB_FSMSTATUS_FSMSTATE_8    (USB_FSMSTATUS_FSMSTATE_8_Val  << USB_FSMSTATUS_FSMSTATE_Pos)
+#define USB_FSMSTATUS_FSMSTATE_16   (USB_FSMSTATUS_FSMSTATE_16_Val << USB_FSMSTATUS_FSMSTATE_Pos)
+#define USB_FSMSTATUS_FSMSTATE_32   (USB_FSMSTATUS_FSMSTATE_32_Val << USB_FSMSTATUS_FSMSTATE_Pos)
+#define USB_FSMSTATUS_FSMSTATE_64   (USB_FSMSTATUS_FSMSTATE_64_Val << USB_FSMSTATUS_FSMSTATE_Pos)
+#define USB_FSMSTATUS_MASK          0x3Fu        /**< \brief (USB_FSMSTATUS) MASK Register */
+
+/* -------- USB_DEVICE_FNUM : (USB Offset: 0x010) (R/  16) DEVICE DEVICE Device Frame Number -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t MFNUM:3;          /*!< bit:  0.. 2  Micro Frame Number                 */
+    uint16_t FNUM:11;          /*!< bit:  3..13  Frame Number                       */
+    uint16_t :1;               /*!< bit:     14  Reserved                           */
+    uint16_t FNCERR:1;         /*!< bit:     15  Frame Number CRC Error             */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_DEVICE_FNUM_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_FNUM_OFFSET      0x010        /**< \brief (USB_DEVICE_FNUM offset) DEVICE Device Frame Number */
+#define USB_DEVICE_FNUM_RESETVALUE  0x0000       /**< \brief (USB_DEVICE_FNUM reset_value) DEVICE Device Frame Number */
+
+#define USB_DEVICE_FNUM_MFNUM_Pos   0            /**< \brief (USB_DEVICE_FNUM) Micro Frame Number */
+#define USB_DEVICE_FNUM_MFNUM_Msk   (0x7u << USB_DEVICE_FNUM_MFNUM_Pos)
+#define USB_DEVICE_FNUM_MFNUM(value) ((USB_DEVICE_FNUM_MFNUM_Msk & ((value) << USB_DEVICE_FNUM_MFNUM_Pos)))
+#define USB_DEVICE_FNUM_FNUM_Pos    3            /**< \brief (USB_DEVICE_FNUM) Frame Number */
+#define USB_DEVICE_FNUM_FNUM_Msk    (0x7FFu << USB_DEVICE_FNUM_FNUM_Pos)
+#define USB_DEVICE_FNUM_FNUM(value) ((USB_DEVICE_FNUM_FNUM_Msk & ((value) << USB_DEVICE_FNUM_FNUM_Pos)))
+#define USB_DEVICE_FNUM_FNCERR_Pos  15           /**< \brief (USB_DEVICE_FNUM) Frame Number CRC Error */
+#define USB_DEVICE_FNUM_FNCERR      (0x1u << USB_DEVICE_FNUM_FNCERR_Pos)
+#define USB_DEVICE_FNUM_MASK        0xBFFFu      /**< \brief (USB_DEVICE_FNUM) MASK Register */
+
+/* -------- USB_HOST_FNUM : (USB Offset: 0x010) (R/W 16) HOST HOST Host Frame Number -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t MFNUM:3;          /*!< bit:  0.. 2  Micro Frame Number                 */
+    uint16_t FNUM:11;          /*!< bit:  3..13  Frame Number                       */
+    uint16_t :2;               /*!< bit: 14..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_HOST_FNUM_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_FNUM_OFFSET        0x010        /**< \brief (USB_HOST_FNUM offset) HOST Host Frame Number */
+#define USB_HOST_FNUM_RESETVALUE    0x0000       /**< \brief (USB_HOST_FNUM reset_value) HOST Host Frame Number */
+
+#define USB_HOST_FNUM_MFNUM_Pos     0            /**< \brief (USB_HOST_FNUM) Micro Frame Number */
+#define USB_HOST_FNUM_MFNUM_Msk     (0x7u << USB_HOST_FNUM_MFNUM_Pos)
+#define USB_HOST_FNUM_MFNUM(value)  ((USB_HOST_FNUM_MFNUM_Msk & ((value) << USB_HOST_FNUM_MFNUM_Pos)))
+#define USB_HOST_FNUM_FNUM_Pos      3            /**< \brief (USB_HOST_FNUM) Frame Number */
+#define USB_HOST_FNUM_FNUM_Msk      (0x7FFu << USB_HOST_FNUM_FNUM_Pos)
+#define USB_HOST_FNUM_FNUM(value)   ((USB_HOST_FNUM_FNUM_Msk & ((value) << USB_HOST_FNUM_FNUM_Pos)))
+#define USB_HOST_FNUM_MASK          0x3FFFu      /**< \brief (USB_HOST_FNUM) MASK Register */
+
+/* -------- USB_HOST_FLENHIGH : (USB Offset: 0x012) (R/   8) HOST HOST Host Frame Length -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  FLENHIGH:8;       /*!< bit:  0.. 7  Frame Length                       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_FLENHIGH_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_FLENHIGH_OFFSET    0x012        /**< \brief (USB_HOST_FLENHIGH offset) HOST Host Frame Length */
+#define USB_HOST_FLENHIGH_RESETVALUE 0x00         /**< \brief (USB_HOST_FLENHIGH reset_value) HOST Host Frame Length */
+
+#define USB_HOST_FLENHIGH_FLENHIGH_Pos 0            /**< \brief (USB_HOST_FLENHIGH) Frame Length */
+#define USB_HOST_FLENHIGH_FLENHIGH_Msk (0xFFu << USB_HOST_FLENHIGH_FLENHIGH_Pos)
+#define USB_HOST_FLENHIGH_FLENHIGH(value) ((USB_HOST_FLENHIGH_FLENHIGH_Msk & ((value) << USB_HOST_FLENHIGH_FLENHIGH_Pos)))
+#define USB_HOST_FLENHIGH_MASK      0xFFu        /**< \brief (USB_HOST_FLENHIGH) MASK Register */
+
+/* -------- USB_DEVICE_INTENCLR : (USB Offset: 0x014) (R/W 16) DEVICE DEVICE Device Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SUSPEND:1;        /*!< bit:      0  Suspend Interrupt Enable           */
+    uint16_t MSOF:1;           /*!< bit:      1  Micro Start of Frame Interrupt Enable in High Speed Mode */
+    uint16_t SOF:1;            /*!< bit:      2  Start Of Frame Interrupt Enable    */
+    uint16_t EORST:1;          /*!< bit:      3  End of Reset Interrupt Enable      */
+    uint16_t WAKEUP:1;         /*!< bit:      4  Wake Up Interrupt Enable           */
+    uint16_t EORSM:1;          /*!< bit:      5  End Of Resume Interrupt Enable     */
+    uint16_t UPRSM:1;          /*!< bit:      6  Upstream Resume Interrupt Enable   */
+    uint16_t RAMACER:1;        /*!< bit:      7  Ram Access Interrupt Enable        */
+    uint16_t LPMNYET:1;        /*!< bit:      8  Link Power Management Not Yet Interrupt Enable */
+    uint16_t LPMSUSP:1;        /*!< bit:      9  Link Power Management Suspend Interrupt Enable */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_DEVICE_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_INTENCLR_OFFSET  0x014        /**< \brief (USB_DEVICE_INTENCLR offset) DEVICE Device Interrupt Enable Clear */
+#define USB_DEVICE_INTENCLR_RESETVALUE 0x0000       /**< \brief (USB_DEVICE_INTENCLR reset_value) DEVICE Device Interrupt Enable Clear */
+
+#define USB_DEVICE_INTENCLR_SUSPEND_Pos 0            /**< \brief (USB_DEVICE_INTENCLR) Suspend Interrupt Enable */
+#define USB_DEVICE_INTENCLR_SUSPEND (0x1u << USB_DEVICE_INTENCLR_SUSPEND_Pos)
+#define USB_DEVICE_INTENCLR_MSOF_Pos 1            /**< \brief (USB_DEVICE_INTENCLR) Micro Start of Frame Interrupt Enable in High Speed Mode */
+#define USB_DEVICE_INTENCLR_MSOF    (0x1u << USB_DEVICE_INTENCLR_MSOF_Pos)
+#define USB_DEVICE_INTENCLR_SOF_Pos 2            /**< \brief (USB_DEVICE_INTENCLR) Start Of Frame Interrupt Enable */
+#define USB_DEVICE_INTENCLR_SOF     (0x1u << USB_DEVICE_INTENCLR_SOF_Pos)
+#define USB_DEVICE_INTENCLR_EORST_Pos 3            /**< \brief (USB_DEVICE_INTENCLR) End of Reset Interrupt Enable */
+#define USB_DEVICE_INTENCLR_EORST   (0x1u << USB_DEVICE_INTENCLR_EORST_Pos)
+#define USB_DEVICE_INTENCLR_WAKEUP_Pos 4            /**< \brief (USB_DEVICE_INTENCLR) Wake Up Interrupt Enable */
+#define USB_DEVICE_INTENCLR_WAKEUP  (0x1u << USB_DEVICE_INTENCLR_WAKEUP_Pos)
+#define USB_DEVICE_INTENCLR_EORSM_Pos 5            /**< \brief (USB_DEVICE_INTENCLR) End Of Resume Interrupt Enable */
+#define USB_DEVICE_INTENCLR_EORSM   (0x1u << USB_DEVICE_INTENCLR_EORSM_Pos)
+#define USB_DEVICE_INTENCLR_UPRSM_Pos 6            /**< \brief (USB_DEVICE_INTENCLR) Upstream Resume Interrupt Enable */
+#define USB_DEVICE_INTENCLR_UPRSM   (0x1u << USB_DEVICE_INTENCLR_UPRSM_Pos)
+#define USB_DEVICE_INTENCLR_RAMACER_Pos 7            /**< \brief (USB_DEVICE_INTENCLR) Ram Access Interrupt Enable */
+#define USB_DEVICE_INTENCLR_RAMACER (0x1u << USB_DEVICE_INTENCLR_RAMACER_Pos)
+#define USB_DEVICE_INTENCLR_LPMNYET_Pos 8            /**< \brief (USB_DEVICE_INTENCLR) Link Power Management Not Yet Interrupt Enable */
+#define USB_DEVICE_INTENCLR_LPMNYET (0x1u << USB_DEVICE_INTENCLR_LPMNYET_Pos)
+#define USB_DEVICE_INTENCLR_LPMSUSP_Pos 9            /**< \brief (USB_DEVICE_INTENCLR) Link Power Management Suspend Interrupt Enable */
+#define USB_DEVICE_INTENCLR_LPMSUSP (0x1u << USB_DEVICE_INTENCLR_LPMSUSP_Pos)
+#define USB_DEVICE_INTENCLR_MASK    0x03FFu      /**< \brief (USB_DEVICE_INTENCLR) MASK Register */
+
+/* -------- USB_HOST_INTENCLR : (USB Offset: 0x014) (R/W 16) HOST HOST Host Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint16_t HSOF:1;           /*!< bit:      2  Host Start Of Frame Interrupt Disable */
+    uint16_t RST:1;            /*!< bit:      3  BUS Reset Interrupt Disable        */
+    uint16_t WAKEUP:1;         /*!< bit:      4  Wake Up Interrupt Disable          */
+    uint16_t DNRSM:1;          /*!< bit:      5  DownStream to Device Interrupt Disable */
+    uint16_t UPRSM:1;          /*!< bit:      6  Upstream Resume from Device Interrupt Disable */
+    uint16_t RAMACER:1;        /*!< bit:      7  Ram Access Interrupt Disable       */
+    uint16_t DCONN:1;          /*!< bit:      8  Device Connection Interrupt Disable */
+    uint16_t DDISC:1;          /*!< bit:      9  Device Disconnection Interrupt Disable */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_HOST_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_INTENCLR_OFFSET    0x014        /**< \brief (USB_HOST_INTENCLR offset) HOST Host Interrupt Enable Clear */
+#define USB_HOST_INTENCLR_RESETVALUE 0x0000       /**< \brief (USB_HOST_INTENCLR reset_value) HOST Host Interrupt Enable Clear */
+
+#define USB_HOST_INTENCLR_HSOF_Pos  2            /**< \brief (USB_HOST_INTENCLR) Host Start Of Frame Interrupt Disable */
+#define USB_HOST_INTENCLR_HSOF      (0x1u << USB_HOST_INTENCLR_HSOF_Pos)
+#define USB_HOST_INTENCLR_RST_Pos   3            /**< \brief (USB_HOST_INTENCLR) BUS Reset Interrupt Disable */
+#define USB_HOST_INTENCLR_RST       (0x1u << USB_HOST_INTENCLR_RST_Pos)
+#define USB_HOST_INTENCLR_WAKEUP_Pos 4            /**< \brief (USB_HOST_INTENCLR) Wake Up Interrupt Disable */
+#define USB_HOST_INTENCLR_WAKEUP    (0x1u << USB_HOST_INTENCLR_WAKEUP_Pos)
+#define USB_HOST_INTENCLR_DNRSM_Pos 5            /**< \brief (USB_HOST_INTENCLR) DownStream to Device Interrupt Disable */
+#define USB_HOST_INTENCLR_DNRSM     (0x1u << USB_HOST_INTENCLR_DNRSM_Pos)
+#define USB_HOST_INTENCLR_UPRSM_Pos 6            /**< \brief (USB_HOST_INTENCLR) Upstream Resume from Device Interrupt Disable */
+#define USB_HOST_INTENCLR_UPRSM     (0x1u << USB_HOST_INTENCLR_UPRSM_Pos)
+#define USB_HOST_INTENCLR_RAMACER_Pos 7            /**< \brief (USB_HOST_INTENCLR) Ram Access Interrupt Disable */
+#define USB_HOST_INTENCLR_RAMACER   (0x1u << USB_HOST_INTENCLR_RAMACER_Pos)
+#define USB_HOST_INTENCLR_DCONN_Pos 8            /**< \brief (USB_HOST_INTENCLR) Device Connection Interrupt Disable */
+#define USB_HOST_INTENCLR_DCONN     (0x1u << USB_HOST_INTENCLR_DCONN_Pos)
+#define USB_HOST_INTENCLR_DDISC_Pos 9            /**< \brief (USB_HOST_INTENCLR) Device Disconnection Interrupt Disable */
+#define USB_HOST_INTENCLR_DDISC     (0x1u << USB_HOST_INTENCLR_DDISC_Pos)
+#define USB_HOST_INTENCLR_MASK      0x03FCu      /**< \brief (USB_HOST_INTENCLR) MASK Register */
+
+/* -------- USB_DEVICE_INTENSET : (USB Offset: 0x018) (R/W 16) DEVICE DEVICE Device Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SUSPEND:1;        /*!< bit:      0  Suspend Interrupt Enable           */
+    uint16_t MSOF:1;           /*!< bit:      1  Micro Start of Frame Interrupt Enable in High Speed Mode */
+    uint16_t SOF:1;            /*!< bit:      2  Start Of Frame Interrupt Enable    */
+    uint16_t EORST:1;          /*!< bit:      3  End of Reset Interrupt Enable      */
+    uint16_t WAKEUP:1;         /*!< bit:      4  Wake Up Interrupt Enable           */
+    uint16_t EORSM:1;          /*!< bit:      5  End Of Resume Interrupt Enable     */
+    uint16_t UPRSM:1;          /*!< bit:      6  Upstream Resume Interrupt Enable   */
+    uint16_t RAMACER:1;        /*!< bit:      7  Ram Access Interrupt Enable        */
+    uint16_t LPMNYET:1;        /*!< bit:      8  Link Power Management Not Yet Interrupt Enable */
+    uint16_t LPMSUSP:1;        /*!< bit:      9  Link Power Management Suspend Interrupt Enable */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_DEVICE_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_INTENSET_OFFSET  0x018        /**< \brief (USB_DEVICE_INTENSET offset) DEVICE Device Interrupt Enable Set */
+#define USB_DEVICE_INTENSET_RESETVALUE 0x0000       /**< \brief (USB_DEVICE_INTENSET reset_value) DEVICE Device Interrupt Enable Set */
+
+#define USB_DEVICE_INTENSET_SUSPEND_Pos 0            /**< \brief (USB_DEVICE_INTENSET) Suspend Interrupt Enable */
+#define USB_DEVICE_INTENSET_SUSPEND (0x1u << USB_DEVICE_INTENSET_SUSPEND_Pos)
+#define USB_DEVICE_INTENSET_MSOF_Pos 1            /**< \brief (USB_DEVICE_INTENSET) Micro Start of Frame Interrupt Enable in High Speed Mode */
+#define USB_DEVICE_INTENSET_MSOF    (0x1u << USB_DEVICE_INTENSET_MSOF_Pos)
+#define USB_DEVICE_INTENSET_SOF_Pos 2            /**< \brief (USB_DEVICE_INTENSET) Start Of Frame Interrupt Enable */
+#define USB_DEVICE_INTENSET_SOF     (0x1u << USB_DEVICE_INTENSET_SOF_Pos)
+#define USB_DEVICE_INTENSET_EORST_Pos 3            /**< \brief (USB_DEVICE_INTENSET) End of Reset Interrupt Enable */
+#define USB_DEVICE_INTENSET_EORST   (0x1u << USB_DEVICE_INTENSET_EORST_Pos)
+#define USB_DEVICE_INTENSET_WAKEUP_Pos 4            /**< \brief (USB_DEVICE_INTENSET) Wake Up Interrupt Enable */
+#define USB_DEVICE_INTENSET_WAKEUP  (0x1u << USB_DEVICE_INTENSET_WAKEUP_Pos)
+#define USB_DEVICE_INTENSET_EORSM_Pos 5            /**< \brief (USB_DEVICE_INTENSET) End Of Resume Interrupt Enable */
+#define USB_DEVICE_INTENSET_EORSM   (0x1u << USB_DEVICE_INTENSET_EORSM_Pos)
+#define USB_DEVICE_INTENSET_UPRSM_Pos 6            /**< \brief (USB_DEVICE_INTENSET) Upstream Resume Interrupt Enable */
+#define USB_DEVICE_INTENSET_UPRSM   (0x1u << USB_DEVICE_INTENSET_UPRSM_Pos)
+#define USB_DEVICE_INTENSET_RAMACER_Pos 7            /**< \brief (USB_DEVICE_INTENSET) Ram Access Interrupt Enable */
+#define USB_DEVICE_INTENSET_RAMACER (0x1u << USB_DEVICE_INTENSET_RAMACER_Pos)
+#define USB_DEVICE_INTENSET_LPMNYET_Pos 8            /**< \brief (USB_DEVICE_INTENSET) Link Power Management Not Yet Interrupt Enable */
+#define USB_DEVICE_INTENSET_LPMNYET (0x1u << USB_DEVICE_INTENSET_LPMNYET_Pos)
+#define USB_DEVICE_INTENSET_LPMSUSP_Pos 9            /**< \brief (USB_DEVICE_INTENSET) Link Power Management Suspend Interrupt Enable */
+#define USB_DEVICE_INTENSET_LPMSUSP (0x1u << USB_DEVICE_INTENSET_LPMSUSP_Pos)
+#define USB_DEVICE_INTENSET_MASK    0x03FFu      /**< \brief (USB_DEVICE_INTENSET) MASK Register */
+
+/* -------- USB_HOST_INTENSET : (USB Offset: 0x018) (R/W 16) HOST HOST Host Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint16_t HSOF:1;           /*!< bit:      2  Host Start Of Frame Interrupt Enable */
+    uint16_t RST:1;            /*!< bit:      3  Bus Reset Interrupt Enable         */
+    uint16_t WAKEUP:1;         /*!< bit:      4  Wake Up Interrupt Enable           */
+    uint16_t DNRSM:1;          /*!< bit:      5  DownStream to the Device Interrupt Enable */
+    uint16_t UPRSM:1;          /*!< bit:      6  Upstream Resume fromthe device Interrupt Enable */
+    uint16_t RAMACER:1;        /*!< bit:      7  Ram Access Interrupt Enable        */
+    uint16_t DCONN:1;          /*!< bit:      8  Link Power Management Interrupt Enable */
+    uint16_t DDISC:1;          /*!< bit:      9  Device Disconnection Interrupt Enable */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_HOST_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_INTENSET_OFFSET    0x018        /**< \brief (USB_HOST_INTENSET offset) HOST Host Interrupt Enable Set */
+#define USB_HOST_INTENSET_RESETVALUE 0x0000       /**< \brief (USB_HOST_INTENSET reset_value) HOST Host Interrupt Enable Set */
+
+#define USB_HOST_INTENSET_HSOF_Pos  2            /**< \brief (USB_HOST_INTENSET) Host Start Of Frame Interrupt Enable */
+#define USB_HOST_INTENSET_HSOF      (0x1u << USB_HOST_INTENSET_HSOF_Pos)
+#define USB_HOST_INTENSET_RST_Pos   3            /**< \brief (USB_HOST_INTENSET) Bus Reset Interrupt Enable */
+#define USB_HOST_INTENSET_RST       (0x1u << USB_HOST_INTENSET_RST_Pos)
+#define USB_HOST_INTENSET_WAKEUP_Pos 4            /**< \brief (USB_HOST_INTENSET) Wake Up Interrupt Enable */
+#define USB_HOST_INTENSET_WAKEUP    (0x1u << USB_HOST_INTENSET_WAKEUP_Pos)
+#define USB_HOST_INTENSET_DNRSM_Pos 5            /**< \brief (USB_HOST_INTENSET) DownStream to the Device Interrupt Enable */
+#define USB_HOST_INTENSET_DNRSM     (0x1u << USB_HOST_INTENSET_DNRSM_Pos)
+#define USB_HOST_INTENSET_UPRSM_Pos 6            /**< \brief (USB_HOST_INTENSET) Upstream Resume fromthe device Interrupt Enable */
+#define USB_HOST_INTENSET_UPRSM     (0x1u << USB_HOST_INTENSET_UPRSM_Pos)
+#define USB_HOST_INTENSET_RAMACER_Pos 7            /**< \brief (USB_HOST_INTENSET) Ram Access Interrupt Enable */
+#define USB_HOST_INTENSET_RAMACER   (0x1u << USB_HOST_INTENSET_RAMACER_Pos)
+#define USB_HOST_INTENSET_DCONN_Pos 8            /**< \brief (USB_HOST_INTENSET) Link Power Management Interrupt Enable */
+#define USB_HOST_INTENSET_DCONN     (0x1u << USB_HOST_INTENSET_DCONN_Pos)
+#define USB_HOST_INTENSET_DDISC_Pos 9            /**< \brief (USB_HOST_INTENSET) Device Disconnection Interrupt Enable */
+#define USB_HOST_INTENSET_DDISC     (0x1u << USB_HOST_INTENSET_DDISC_Pos)
+#define USB_HOST_INTENSET_MASK      0x03FCu      /**< \brief (USB_HOST_INTENSET) MASK Register */
+
+/* -------- USB_DEVICE_INTFLAG : (USB Offset: 0x01C) (R/W 16) DEVICE DEVICE Device Interrupt Flag -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SUSPEND:1;        /*!< bit:      0  Suspend                            */
+    uint16_t MSOF:1;           /*!< bit:      1  Micro Start of Frame in High Speed Mode */
+    uint16_t SOF:1;            /*!< bit:      2  Start Of Frame                     */
+    uint16_t EORST:1;          /*!< bit:      3  End of Reset                       */
+    uint16_t WAKEUP:1;         /*!< bit:      4  Wake Up                            */
+    uint16_t EORSM:1;          /*!< bit:      5  End Of Resume                      */
+    uint16_t UPRSM:1;          /*!< bit:      6  Upstream Resume                    */
+    uint16_t RAMACER:1;        /*!< bit:      7  Ram Access                         */
+    uint16_t LPMNYET:1;        /*!< bit:      8  Link Power Management Not Yet      */
+    uint16_t LPMSUSP:1;        /*!< bit:      9  Link Power Management Suspend      */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_DEVICE_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_INTFLAG_OFFSET   0x01C        /**< \brief (USB_DEVICE_INTFLAG offset) DEVICE Device Interrupt Flag */
+#define USB_DEVICE_INTFLAG_RESETVALUE 0x0000       /**< \brief (USB_DEVICE_INTFLAG reset_value) DEVICE Device Interrupt Flag */
+
+#define USB_DEVICE_INTFLAG_SUSPEND_Pos 0            /**< \brief (USB_DEVICE_INTFLAG) Suspend */
+#define USB_DEVICE_INTFLAG_SUSPEND  (0x1u << USB_DEVICE_INTFLAG_SUSPEND_Pos)
+#define USB_DEVICE_INTFLAG_MSOF_Pos 1            /**< \brief (USB_DEVICE_INTFLAG) Micro Start of Frame in High Speed Mode */
+#define USB_DEVICE_INTFLAG_MSOF     (0x1u << USB_DEVICE_INTFLAG_MSOF_Pos)
+#define USB_DEVICE_INTFLAG_SOF_Pos  2            /**< \brief (USB_DEVICE_INTFLAG) Start Of Frame */
+#define USB_DEVICE_INTFLAG_SOF      (0x1u << USB_DEVICE_INTFLAG_SOF_Pos)
+#define USB_DEVICE_INTFLAG_EORST_Pos 3            /**< \brief (USB_DEVICE_INTFLAG) End of Reset */
+#define USB_DEVICE_INTFLAG_EORST    (0x1u << USB_DEVICE_INTFLAG_EORST_Pos)
+#define USB_DEVICE_INTFLAG_WAKEUP_Pos 4            /**< \brief (USB_DEVICE_INTFLAG) Wake Up */
+#define USB_DEVICE_INTFLAG_WAKEUP   (0x1u << USB_DEVICE_INTFLAG_WAKEUP_Pos)
+#define USB_DEVICE_INTFLAG_EORSM_Pos 5            /**< \brief (USB_DEVICE_INTFLAG) End Of Resume */
+#define USB_DEVICE_INTFLAG_EORSM    (0x1u << USB_DEVICE_INTFLAG_EORSM_Pos)
+#define USB_DEVICE_INTFLAG_UPRSM_Pos 6            /**< \brief (USB_DEVICE_INTFLAG) Upstream Resume */
+#define USB_DEVICE_INTFLAG_UPRSM    (0x1u << USB_DEVICE_INTFLAG_UPRSM_Pos)
+#define USB_DEVICE_INTFLAG_RAMACER_Pos 7            /**< \brief (USB_DEVICE_INTFLAG) Ram Access */
+#define USB_DEVICE_INTFLAG_RAMACER  (0x1u << USB_DEVICE_INTFLAG_RAMACER_Pos)
+#define USB_DEVICE_INTFLAG_LPMNYET_Pos 8            /**< \brief (USB_DEVICE_INTFLAG) Link Power Management Not Yet */
+#define USB_DEVICE_INTFLAG_LPMNYET  (0x1u << USB_DEVICE_INTFLAG_LPMNYET_Pos)
+#define USB_DEVICE_INTFLAG_LPMSUSP_Pos 9            /**< \brief (USB_DEVICE_INTFLAG) Link Power Management Suspend */
+#define USB_DEVICE_INTFLAG_LPMSUSP  (0x1u << USB_DEVICE_INTFLAG_LPMSUSP_Pos)
+#define USB_DEVICE_INTFLAG_MASK     0x03FFu      /**< \brief (USB_DEVICE_INTFLAG) MASK Register */
+
+/* -------- USB_HOST_INTFLAG : (USB Offset: 0x01C) (R/W 16) HOST HOST Host Interrupt Flag -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t :2;               /*!< bit:  0.. 1  Reserved                           */
+    uint16_t HSOF:1;           /*!< bit:      2  Host Start Of Frame                */
+    uint16_t RST:1;            /*!< bit:      3  Bus Reset                          */
+    uint16_t WAKEUP:1;         /*!< bit:      4  Wake Up                            */
+    uint16_t DNRSM:1;          /*!< bit:      5  Downstream                         */
+    uint16_t UPRSM:1;          /*!< bit:      6  Upstream Resume from the Device    */
+    uint16_t RAMACER:1;        /*!< bit:      7  Ram Access                         */
+    uint16_t DCONN:1;          /*!< bit:      8  Device Connection                  */
+    uint16_t DDISC:1;          /*!< bit:      9  Device Disconnection               */
+    uint16_t :6;               /*!< bit: 10..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_HOST_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_INTFLAG_OFFSET     0x01C        /**< \brief (USB_HOST_INTFLAG offset) HOST Host Interrupt Flag */
+#define USB_HOST_INTFLAG_RESETVALUE 0x0000       /**< \brief (USB_HOST_INTFLAG reset_value) HOST Host Interrupt Flag */
+
+#define USB_HOST_INTFLAG_HSOF_Pos   2            /**< \brief (USB_HOST_INTFLAG) Host Start Of Frame */
+#define USB_HOST_INTFLAG_HSOF       (0x1u << USB_HOST_INTFLAG_HSOF_Pos)
+#define USB_HOST_INTFLAG_RST_Pos    3            /**< \brief (USB_HOST_INTFLAG) Bus Reset */
+#define USB_HOST_INTFLAG_RST        (0x1u << USB_HOST_INTFLAG_RST_Pos)
+#define USB_HOST_INTFLAG_WAKEUP_Pos 4            /**< \brief (USB_HOST_INTFLAG) Wake Up */
+#define USB_HOST_INTFLAG_WAKEUP     (0x1u << USB_HOST_INTFLAG_WAKEUP_Pos)
+#define USB_HOST_INTFLAG_DNRSM_Pos  5            /**< \brief (USB_HOST_INTFLAG) Downstream */
+#define USB_HOST_INTFLAG_DNRSM      (0x1u << USB_HOST_INTFLAG_DNRSM_Pos)
+#define USB_HOST_INTFLAG_UPRSM_Pos  6            /**< \brief (USB_HOST_INTFLAG) Upstream Resume from the Device */
+#define USB_HOST_INTFLAG_UPRSM      (0x1u << USB_HOST_INTFLAG_UPRSM_Pos)
+#define USB_HOST_INTFLAG_RAMACER_Pos 7            /**< \brief (USB_HOST_INTFLAG) Ram Access */
+#define USB_HOST_INTFLAG_RAMACER    (0x1u << USB_HOST_INTFLAG_RAMACER_Pos)
+#define USB_HOST_INTFLAG_DCONN_Pos  8            /**< \brief (USB_HOST_INTFLAG) Device Connection */
+#define USB_HOST_INTFLAG_DCONN      (0x1u << USB_HOST_INTFLAG_DCONN_Pos)
+#define USB_HOST_INTFLAG_DDISC_Pos  9            /**< \brief (USB_HOST_INTFLAG) Device Disconnection */
+#define USB_HOST_INTFLAG_DDISC      (0x1u << USB_HOST_INTFLAG_DDISC_Pos)
+#define USB_HOST_INTFLAG_MASK       0x03FCu      /**< \brief (USB_HOST_INTFLAG) MASK Register */
+
+/* -------- USB_DEVICE_EPINTSMRY : (USB Offset: 0x020) (R/  16) DEVICE DEVICE End Point Interrupt Summary -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t EPINT0:1;         /*!< bit:      0  End Point 0 Interrupt              */
+    uint16_t EPINT1:1;         /*!< bit:      1  End Point 1 Interrupt              */
+    uint16_t EPINT2:1;         /*!< bit:      2  End Point 2 Interrupt              */
+    uint16_t EPINT3:1;         /*!< bit:      3  End Point 3 Interrupt              */
+    uint16_t EPINT4:1;         /*!< bit:      4  End Point 4 Interrupt              */
+    uint16_t EPINT5:1;         /*!< bit:      5  End Point 5 Interrupt              */
+    uint16_t EPINT6:1;         /*!< bit:      6  End Point 6 Interrupt              */
+    uint16_t EPINT7:1;         /*!< bit:      7  End Point 7 Interrupt              */
+    uint16_t :8;               /*!< bit:  8..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t EPINT:8;          /*!< bit:  0.. 7  End Point x Interrupt              */
+    uint16_t :8;               /*!< bit:  8..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_DEVICE_EPINTSMRY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_EPINTSMRY_OFFSET 0x020        /**< \brief (USB_DEVICE_EPINTSMRY offset) DEVICE End Point Interrupt Summary */
+#define USB_DEVICE_EPINTSMRY_RESETVALUE 0x0000       /**< \brief (USB_DEVICE_EPINTSMRY reset_value) DEVICE End Point Interrupt Summary */
+
+#define USB_DEVICE_EPINTSMRY_EPINT0_Pos 0            /**< \brief (USB_DEVICE_EPINTSMRY) End Point 0 Interrupt */
+#define USB_DEVICE_EPINTSMRY_EPINT0 (1 << USB_DEVICE_EPINTSMRY_EPINT0_Pos)
+#define USB_DEVICE_EPINTSMRY_EPINT1_Pos 1            /**< \brief (USB_DEVICE_EPINTSMRY) End Point 1 Interrupt */
+#define USB_DEVICE_EPINTSMRY_EPINT1 (1 << USB_DEVICE_EPINTSMRY_EPINT1_Pos)
+#define USB_DEVICE_EPINTSMRY_EPINT2_Pos 2            /**< \brief (USB_DEVICE_EPINTSMRY) End Point 2 Interrupt */
+#define USB_DEVICE_EPINTSMRY_EPINT2 (1 << USB_DEVICE_EPINTSMRY_EPINT2_Pos)
+#define USB_DEVICE_EPINTSMRY_EPINT3_Pos 3            /**< \brief (USB_DEVICE_EPINTSMRY) End Point 3 Interrupt */
+#define USB_DEVICE_EPINTSMRY_EPINT3 (1 << USB_DEVICE_EPINTSMRY_EPINT3_Pos)
+#define USB_DEVICE_EPINTSMRY_EPINT4_Pos 4            /**< \brief (USB_DEVICE_EPINTSMRY) End Point 4 Interrupt */
+#define USB_DEVICE_EPINTSMRY_EPINT4 (1 << USB_DEVICE_EPINTSMRY_EPINT4_Pos)
+#define USB_DEVICE_EPINTSMRY_EPINT5_Pos 5            /**< \brief (USB_DEVICE_EPINTSMRY) End Point 5 Interrupt */
+#define USB_DEVICE_EPINTSMRY_EPINT5 (1 << USB_DEVICE_EPINTSMRY_EPINT5_Pos)
+#define USB_DEVICE_EPINTSMRY_EPINT6_Pos 6            /**< \brief (USB_DEVICE_EPINTSMRY) End Point 6 Interrupt */
+#define USB_DEVICE_EPINTSMRY_EPINT6 (1 << USB_DEVICE_EPINTSMRY_EPINT6_Pos)
+#define USB_DEVICE_EPINTSMRY_EPINT7_Pos 7            /**< \brief (USB_DEVICE_EPINTSMRY) End Point 7 Interrupt */
+#define USB_DEVICE_EPINTSMRY_EPINT7 (1 << USB_DEVICE_EPINTSMRY_EPINT7_Pos)
+#define USB_DEVICE_EPINTSMRY_EPINT_Pos 0            /**< \brief (USB_DEVICE_EPINTSMRY) End Point x Interrupt */
+#define USB_DEVICE_EPINTSMRY_EPINT_Msk (0xFFu << USB_DEVICE_EPINTSMRY_EPINT_Pos)
+#define USB_DEVICE_EPINTSMRY_EPINT(value) ((USB_DEVICE_EPINTSMRY_EPINT_Msk & ((value) << USB_DEVICE_EPINTSMRY_EPINT_Pos)))
+#define USB_DEVICE_EPINTSMRY_MASK   0x00FFu      /**< \brief (USB_DEVICE_EPINTSMRY) MASK Register */
+
+/* -------- USB_HOST_PINTSMRY : (USB Offset: 0x020) (R/  16) HOST HOST Pipe Interrupt Summary -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t EPINT0:1;         /*!< bit:      0  Pipe 0 Interrupt                   */
+    uint16_t EPINT1:1;         /*!< bit:      1  Pipe 1 Interrupt                   */
+    uint16_t EPINT2:1;         /*!< bit:      2  Pipe 2 Interrupt                   */
+    uint16_t EPINT3:1;         /*!< bit:      3  Pipe 3 Interrupt                   */
+    uint16_t EPINT4:1;         /*!< bit:      4  Pipe 4 Interrupt                   */
+    uint16_t EPINT5:1;         /*!< bit:      5  Pipe 5 Interrupt                   */
+    uint16_t EPINT6:1;         /*!< bit:      6  Pipe 6 Interrupt                   */
+    uint16_t EPINT7:1;         /*!< bit:      7  Pipe 7 Interrupt                   */
+    uint16_t :8;               /*!< bit:  8..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint16_t EPINT:8;          /*!< bit:  0.. 7  Pipe x Interrupt                   */
+    uint16_t :8;               /*!< bit:  8..15  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_HOST_PINTSMRY_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_PINTSMRY_OFFSET    0x020        /**< \brief (USB_HOST_PINTSMRY offset) HOST Pipe Interrupt Summary */
+#define USB_HOST_PINTSMRY_RESETVALUE 0x0000       /**< \brief (USB_HOST_PINTSMRY reset_value) HOST Pipe Interrupt Summary */
+
+#define USB_HOST_PINTSMRY_EPINT0_Pos 0            /**< \brief (USB_HOST_PINTSMRY) Pipe 0 Interrupt */
+#define USB_HOST_PINTSMRY_EPINT0    (1 << USB_HOST_PINTSMRY_EPINT0_Pos)
+#define USB_HOST_PINTSMRY_EPINT1_Pos 1            /**< \brief (USB_HOST_PINTSMRY) Pipe 1 Interrupt */
+#define USB_HOST_PINTSMRY_EPINT1    (1 << USB_HOST_PINTSMRY_EPINT1_Pos)
+#define USB_HOST_PINTSMRY_EPINT2_Pos 2            /**< \brief (USB_HOST_PINTSMRY) Pipe 2 Interrupt */
+#define USB_HOST_PINTSMRY_EPINT2    (1 << USB_HOST_PINTSMRY_EPINT2_Pos)
+#define USB_HOST_PINTSMRY_EPINT3_Pos 3            /**< \brief (USB_HOST_PINTSMRY) Pipe 3 Interrupt */
+#define USB_HOST_PINTSMRY_EPINT3    (1 << USB_HOST_PINTSMRY_EPINT3_Pos)
+#define USB_HOST_PINTSMRY_EPINT4_Pos 4            /**< \brief (USB_HOST_PINTSMRY) Pipe 4 Interrupt */
+#define USB_HOST_PINTSMRY_EPINT4    (1 << USB_HOST_PINTSMRY_EPINT4_Pos)
+#define USB_HOST_PINTSMRY_EPINT5_Pos 5            /**< \brief (USB_HOST_PINTSMRY) Pipe 5 Interrupt */
+#define USB_HOST_PINTSMRY_EPINT5    (1 << USB_HOST_PINTSMRY_EPINT5_Pos)
+#define USB_HOST_PINTSMRY_EPINT6_Pos 6            /**< \brief (USB_HOST_PINTSMRY) Pipe 6 Interrupt */
+#define USB_HOST_PINTSMRY_EPINT6    (1 << USB_HOST_PINTSMRY_EPINT6_Pos)
+#define USB_HOST_PINTSMRY_EPINT7_Pos 7            /**< \brief (USB_HOST_PINTSMRY) Pipe 7 Interrupt */
+#define USB_HOST_PINTSMRY_EPINT7    (1 << USB_HOST_PINTSMRY_EPINT7_Pos)
+#define USB_HOST_PINTSMRY_EPINT_Pos 0            /**< \brief (USB_HOST_PINTSMRY) Pipe x Interrupt */
+#define USB_HOST_PINTSMRY_EPINT_Msk (0xFFu << USB_HOST_PINTSMRY_EPINT_Pos)
+#define USB_HOST_PINTSMRY_EPINT(value) ((USB_HOST_PINTSMRY_EPINT_Msk & ((value) << USB_HOST_PINTSMRY_EPINT_Pos)))
+#define USB_HOST_PINTSMRY_MASK      0x00FFu      /**< \brief (USB_HOST_PINTSMRY) MASK Register */
+
+/* -------- USB_DESCADD : (USB Offset: 0x024) (R/W 32) Descriptor Address -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t DESCADD:32;       /*!< bit:  0..31  Descriptor Address Value           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} USB_DESCADD_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DESCADD_OFFSET          0x024        /**< \brief (USB_DESCADD offset) Descriptor Address */
+#define USB_DESCADD_RESETVALUE      0x00000000   /**< \brief (USB_DESCADD reset_value) Descriptor Address */
+
+#define USB_DESCADD_DESCADD_Pos     0            /**< \brief (USB_DESCADD) Descriptor Address Value */
+#define USB_DESCADD_DESCADD_Msk     (0xFFFFFFFFu << USB_DESCADD_DESCADD_Pos)
+#define USB_DESCADD_DESCADD(value)  ((USB_DESCADD_DESCADD_Msk & ((value) << USB_DESCADD_DESCADD_Pos)))
+#define USB_DESCADD_MASK            0xFFFFFFFFu  /**< \brief (USB_DESCADD) MASK Register */
+
+/* -------- USB_PADCAL : (USB Offset: 0x028) (R/W 16) USB PAD Calibration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t TRANSP:5;         /*!< bit:  0.. 4  USB Pad Transp calibration         */
+    uint16_t :1;               /*!< bit:      5  Reserved                           */
+    uint16_t TRANSN:5;         /*!< bit:  6..10  USB Pad Transn calibration         */
+    uint16_t :1;               /*!< bit:     11  Reserved                           */
+    uint16_t TRIM:3;           /*!< bit: 12..14  USB Pad Trim calibration           */
+    uint16_t :1;               /*!< bit:     15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_PADCAL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_PADCAL_OFFSET           0x028        /**< \brief (USB_PADCAL offset) USB PAD Calibration */
+#define USB_PADCAL_RESETVALUE       0x0000       /**< \brief (USB_PADCAL reset_value) USB PAD Calibration */
+
+#define USB_PADCAL_TRANSP_Pos       0            /**< \brief (USB_PADCAL) USB Pad Transp calibration */
+#define USB_PADCAL_TRANSP_Msk       (0x1Fu << USB_PADCAL_TRANSP_Pos)
+#define USB_PADCAL_TRANSP(value)    ((USB_PADCAL_TRANSP_Msk & ((value) << USB_PADCAL_TRANSP_Pos)))
+#define USB_PADCAL_TRANSN_Pos       6            /**< \brief (USB_PADCAL) USB Pad Transn calibration */
+#define USB_PADCAL_TRANSN_Msk       (0x1Fu << USB_PADCAL_TRANSN_Pos)
+#define USB_PADCAL_TRANSN(value)    ((USB_PADCAL_TRANSN_Msk & ((value) << USB_PADCAL_TRANSN_Pos)))
+#define USB_PADCAL_TRIM_Pos         12           /**< \brief (USB_PADCAL) USB Pad Trim calibration */
+#define USB_PADCAL_TRIM_Msk         (0x7u << USB_PADCAL_TRIM_Pos)
+#define USB_PADCAL_TRIM(value)      ((USB_PADCAL_TRIM_Msk & ((value) << USB_PADCAL_TRIM_Pos)))
+#define USB_PADCAL_MASK             0x77DFu      /**< \brief (USB_PADCAL) MASK Register */
+
+/* -------- USB_DEVICE_EPCFG : (USB Offset: 0x100) (R/W  8) DEVICE DEVICE_ENDPOINT End Point Configuration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  EPTYPE0:3;        /*!< bit:  0.. 2  End Point Type0                    */
+    uint8_t  :1;               /*!< bit:      3  Reserved                           */
+    uint8_t  EPTYPE1:3;        /*!< bit:  4.. 6  End Point Type1                    */
+    uint8_t  NYETDIS:1;        /*!< bit:      7  NYET Token Disable                 */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_EPCFG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_EPCFG_OFFSET     0x100        /**< \brief (USB_DEVICE_EPCFG offset) DEVICE_ENDPOINT End Point Configuration */
+#define USB_DEVICE_EPCFG_RESETVALUE 0x00         /**< \brief (USB_DEVICE_EPCFG reset_value) DEVICE_ENDPOINT End Point Configuration */
+
+#define USB_DEVICE_EPCFG_EPTYPE0_Pos 0            /**< \brief (USB_DEVICE_EPCFG) End Point Type0 */
+#define USB_DEVICE_EPCFG_EPTYPE0_Msk (0x7u << USB_DEVICE_EPCFG_EPTYPE0_Pos)
+#define USB_DEVICE_EPCFG_EPTYPE0(value) ((USB_DEVICE_EPCFG_EPTYPE0_Msk & ((value) << USB_DEVICE_EPCFG_EPTYPE0_Pos)))
+#define USB_DEVICE_EPCFG_EPTYPE1_Pos 4            /**< \brief (USB_DEVICE_EPCFG) End Point Type1 */
+#define USB_DEVICE_EPCFG_EPTYPE1_Msk (0x7u << USB_DEVICE_EPCFG_EPTYPE1_Pos)
+#define USB_DEVICE_EPCFG_EPTYPE1(value) ((USB_DEVICE_EPCFG_EPTYPE1_Msk & ((value) << USB_DEVICE_EPCFG_EPTYPE1_Pos)))
+#define USB_DEVICE_EPCFG_NYETDIS_Pos 7            /**< \brief (USB_DEVICE_EPCFG) NYET Token Disable */
+#define USB_DEVICE_EPCFG_NYETDIS    (0x1u << USB_DEVICE_EPCFG_NYETDIS_Pos)
+#define USB_DEVICE_EPCFG_MASK       0xF7u        /**< \brief (USB_DEVICE_EPCFG) MASK Register */
+
+/* -------- USB_HOST_PCFG : (USB Offset: 0x100) (R/W  8) HOST HOST_PIPE End Point Configuration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PTOKEN:2;         /*!< bit:  0.. 1  Pipe Token                         */
+    uint8_t  BK:1;             /*!< bit:      2  Pipe Bank                          */
+    uint8_t  PTYPE:3;          /*!< bit:  3.. 5  Pipe Type                          */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_PCFG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_PCFG_OFFSET        0x100        /**< \brief (USB_HOST_PCFG offset) HOST_PIPE End Point Configuration */
+#define USB_HOST_PCFG_RESETVALUE    0x00         /**< \brief (USB_HOST_PCFG reset_value) HOST_PIPE End Point Configuration */
+
+#define USB_HOST_PCFG_PTOKEN_Pos    0            /**< \brief (USB_HOST_PCFG) Pipe Token */
+#define USB_HOST_PCFG_PTOKEN_Msk    (0x3u << USB_HOST_PCFG_PTOKEN_Pos)
+#define USB_HOST_PCFG_PTOKEN(value) ((USB_HOST_PCFG_PTOKEN_Msk & ((value) << USB_HOST_PCFG_PTOKEN_Pos)))
+#define USB_HOST_PCFG_BK_Pos        2            /**< \brief (USB_HOST_PCFG) Pipe Bank */
+#define USB_HOST_PCFG_BK            (0x1u << USB_HOST_PCFG_BK_Pos)
+#define USB_HOST_PCFG_PTYPE_Pos     3            /**< \brief (USB_HOST_PCFG) Pipe Type */
+#define USB_HOST_PCFG_PTYPE_Msk     (0x7u << USB_HOST_PCFG_PTYPE_Pos)
+#define USB_HOST_PCFG_PTYPE(value)  ((USB_HOST_PCFG_PTYPE_Msk & ((value) << USB_HOST_PCFG_PTYPE_Pos)))
+#define USB_HOST_PCFG_MASK          0x3Fu        /**< \brief (USB_HOST_PCFG) MASK Register */
+
+/* -------- USB_HOST_BINTERVAL : (USB Offset: 0x103) (R/W  8) HOST HOST_PIPE Bus Access Period of Pipe -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  BITINTERVAL:8;    /*!< bit:  0.. 7  Bit Interval                       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_BINTERVAL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_BINTERVAL_OFFSET   0x103        /**< \brief (USB_HOST_BINTERVAL offset) HOST_PIPE Bus Access Period of Pipe */
+#define USB_HOST_BINTERVAL_RESETVALUE 0x00         /**< \brief (USB_HOST_BINTERVAL reset_value) HOST_PIPE Bus Access Period of Pipe */
+
+#define USB_HOST_BINTERVAL_BITINTERVAL_Pos 0            /**< \brief (USB_HOST_BINTERVAL) Bit Interval */
+#define USB_HOST_BINTERVAL_BITINTERVAL_Msk (0xFFu << USB_HOST_BINTERVAL_BITINTERVAL_Pos)
+#define USB_HOST_BINTERVAL_BITINTERVAL(value) ((USB_HOST_BINTERVAL_BITINTERVAL_Msk & ((value) << USB_HOST_BINTERVAL_BITINTERVAL_Pos)))
+#define USB_HOST_BINTERVAL_MASK     0xFFu        /**< \brief (USB_HOST_BINTERVAL) MASK Register */
+
+/* -------- USB_DEVICE_EPSTATUSCLR : (USB Offset: 0x104) ( /W  8) DEVICE DEVICE_ENDPOINT End Point Pipe Status Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DTGLOUT:1;        /*!< bit:      0  Data Toggle OUT Clear              */
+    uint8_t  DTGLIN:1;         /*!< bit:      1  Data Toggle IN Clear               */
+    uint8_t  CURBK:1;          /*!< bit:      2  Curren Bank Clear                  */
+    uint8_t  :1;               /*!< bit:      3  Reserved                           */
+    uint8_t  STALLRQ0:1;       /*!< bit:      4  Stall 0 Request Clear              */
+    uint8_t  STALLRQ1:1;       /*!< bit:      5  Stall 1 Request Clear              */
+    uint8_t  BK0RDY:1;         /*!< bit:      6  Bank 0 Ready Clear                 */
+    uint8_t  BK1RDY:1;         /*!< bit:      7  Bank 1 Ready Clear                 */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  :4;               /*!< bit:  0.. 3  Reserved                           */
+    uint8_t  STALLRQ:2;        /*!< bit:  4.. 5  Stall x Request Clear              */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_EPSTATUSCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_EPSTATUSCLR_OFFSET 0x104        /**< \brief (USB_DEVICE_EPSTATUSCLR offset) DEVICE_ENDPOINT End Point Pipe Status Clear */
+#define USB_DEVICE_EPSTATUSCLR_RESETVALUE 0x00         /**< \brief (USB_DEVICE_EPSTATUSCLR reset_value) DEVICE_ENDPOINT End Point Pipe Status Clear */
+
+#define USB_DEVICE_EPSTATUSCLR_DTGLOUT_Pos 0            /**< \brief (USB_DEVICE_EPSTATUSCLR) Data Toggle OUT Clear */
+#define USB_DEVICE_EPSTATUSCLR_DTGLOUT (0x1u << USB_DEVICE_EPSTATUSCLR_DTGLOUT_Pos)
+#define USB_DEVICE_EPSTATUSCLR_DTGLIN_Pos 1            /**< \brief (USB_DEVICE_EPSTATUSCLR) Data Toggle IN Clear */
+#define USB_DEVICE_EPSTATUSCLR_DTGLIN (0x1u << USB_DEVICE_EPSTATUSCLR_DTGLIN_Pos)
+#define USB_DEVICE_EPSTATUSCLR_CURBK_Pos 2            /**< \brief (USB_DEVICE_EPSTATUSCLR) Curren Bank Clear */
+#define USB_DEVICE_EPSTATUSCLR_CURBK (0x1u << USB_DEVICE_EPSTATUSCLR_CURBK_Pos)
+#define USB_DEVICE_EPSTATUSCLR_STALLRQ0_Pos 4            /**< \brief (USB_DEVICE_EPSTATUSCLR) Stall 0 Request Clear */
+#define USB_DEVICE_EPSTATUSCLR_STALLRQ0 (1 << USB_DEVICE_EPSTATUSCLR_STALLRQ0_Pos)
+#define USB_DEVICE_EPSTATUSCLR_STALLRQ1_Pos 5            /**< \brief (USB_DEVICE_EPSTATUSCLR) Stall 1 Request Clear */
+#define USB_DEVICE_EPSTATUSCLR_STALLRQ1 (1 << USB_DEVICE_EPSTATUSCLR_STALLRQ1_Pos)
+#define USB_DEVICE_EPSTATUSCLR_STALLRQ_Pos 4            /**< \brief (USB_DEVICE_EPSTATUSCLR) Stall x Request Clear */
+#define USB_DEVICE_EPSTATUSCLR_STALLRQ_Msk (0x3u << USB_DEVICE_EPSTATUSCLR_STALLRQ_Pos)
+#define USB_DEVICE_EPSTATUSCLR_STALLRQ(value) ((USB_DEVICE_EPSTATUSCLR_STALLRQ_Msk & ((value) << USB_DEVICE_EPSTATUSCLR_STALLRQ_Pos)))
+#define USB_DEVICE_EPSTATUSCLR_BK0RDY_Pos 6            /**< \brief (USB_DEVICE_EPSTATUSCLR) Bank 0 Ready Clear */
+#define USB_DEVICE_EPSTATUSCLR_BK0RDY (0x1u << USB_DEVICE_EPSTATUSCLR_BK0RDY_Pos)
+#define USB_DEVICE_EPSTATUSCLR_BK1RDY_Pos 7            /**< \brief (USB_DEVICE_EPSTATUSCLR) Bank 1 Ready Clear */
+#define USB_DEVICE_EPSTATUSCLR_BK1RDY (0x1u << USB_DEVICE_EPSTATUSCLR_BK1RDY_Pos)
+#define USB_DEVICE_EPSTATUSCLR_MASK 0xF7u        /**< \brief (USB_DEVICE_EPSTATUSCLR) MASK Register */
+
+/* -------- USB_HOST_PSTATUSCLR : (USB Offset: 0x104) ( /W  8) HOST HOST_PIPE End Point Pipe Status Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DTGL:1;           /*!< bit:      0  Data Toggle clear                  */
+    uint8_t  :1;               /*!< bit:      1  Reserved                           */
+    uint8_t  CURBK:1;          /*!< bit:      2  Curren Bank clear                  */
+    uint8_t  :1;               /*!< bit:      3  Reserved                           */
+    uint8_t  PFREEZE:1;        /*!< bit:      4  Pipe Freeze Clear                  */
+    uint8_t  :1;               /*!< bit:      5  Reserved                           */
+    uint8_t  BK0RDY:1;         /*!< bit:      6  Bank 0 Ready Clear                 */
+    uint8_t  BK1RDY:1;         /*!< bit:      7  Bank 1 Ready Clear                 */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_PSTATUSCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_PSTATUSCLR_OFFSET  0x104        /**< \brief (USB_HOST_PSTATUSCLR offset) HOST_PIPE End Point Pipe Status Clear */
+#define USB_HOST_PSTATUSCLR_RESETVALUE 0x00         /**< \brief (USB_HOST_PSTATUSCLR reset_value) HOST_PIPE End Point Pipe Status Clear */
+
+#define USB_HOST_PSTATUSCLR_DTGL_Pos 0            /**< \brief (USB_HOST_PSTATUSCLR) Data Toggle clear */
+#define USB_HOST_PSTATUSCLR_DTGL    (0x1u << USB_HOST_PSTATUSCLR_DTGL_Pos)
+#define USB_HOST_PSTATUSCLR_CURBK_Pos 2            /**< \brief (USB_HOST_PSTATUSCLR) Curren Bank clear */
+#define USB_HOST_PSTATUSCLR_CURBK   (0x1u << USB_HOST_PSTATUSCLR_CURBK_Pos)
+#define USB_HOST_PSTATUSCLR_PFREEZE_Pos 4            /**< \brief (USB_HOST_PSTATUSCLR) Pipe Freeze Clear */
+#define USB_HOST_PSTATUSCLR_PFREEZE (0x1u << USB_HOST_PSTATUSCLR_PFREEZE_Pos)
+#define USB_HOST_PSTATUSCLR_BK0RDY_Pos 6            /**< \brief (USB_HOST_PSTATUSCLR) Bank 0 Ready Clear */
+#define USB_HOST_PSTATUSCLR_BK0RDY  (0x1u << USB_HOST_PSTATUSCLR_BK0RDY_Pos)
+#define USB_HOST_PSTATUSCLR_BK1RDY_Pos 7            /**< \brief (USB_HOST_PSTATUSCLR) Bank 1 Ready Clear */
+#define USB_HOST_PSTATUSCLR_BK1RDY  (0x1u << USB_HOST_PSTATUSCLR_BK1RDY_Pos)
+#define USB_HOST_PSTATUSCLR_MASK    0xD5u        /**< \brief (USB_HOST_PSTATUSCLR) MASK Register */
+
+/* -------- USB_DEVICE_EPSTATUSSET : (USB Offset: 0x105) ( /W  8) DEVICE DEVICE_ENDPOINT End Point Pipe Status Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DTGLOUT:1;        /*!< bit:      0  Data Toggle OUT Set                */
+    uint8_t  DTGLIN:1;         /*!< bit:      1  Data Toggle IN Set                 */
+    uint8_t  CURBK:1;          /*!< bit:      2  Current Bank Set                   */
+    uint8_t  :1;               /*!< bit:      3  Reserved                           */
+    uint8_t  STALLRQ0:1;       /*!< bit:      4  Stall 0 Request Set                */
+    uint8_t  STALLRQ1:1;       /*!< bit:      5  Stall 1 Request Set                */
+    uint8_t  BK0RDY:1;         /*!< bit:      6  Bank 0 Ready Set                   */
+    uint8_t  BK1RDY:1;         /*!< bit:      7  Bank 1 Ready Set                   */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  :4;               /*!< bit:  0.. 3  Reserved                           */
+    uint8_t  STALLRQ:2;        /*!< bit:  4.. 5  Stall x Request Set                */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_EPSTATUSSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_EPSTATUSSET_OFFSET 0x105        /**< \brief (USB_DEVICE_EPSTATUSSET offset) DEVICE_ENDPOINT End Point Pipe Status Set */
+#define USB_DEVICE_EPSTATUSSET_RESETVALUE 0x00         /**< \brief (USB_DEVICE_EPSTATUSSET reset_value) DEVICE_ENDPOINT End Point Pipe Status Set */
+
+#define USB_DEVICE_EPSTATUSSET_DTGLOUT_Pos 0            /**< \brief (USB_DEVICE_EPSTATUSSET) Data Toggle OUT Set */
+#define USB_DEVICE_EPSTATUSSET_DTGLOUT (0x1u << USB_DEVICE_EPSTATUSSET_DTGLOUT_Pos)
+#define USB_DEVICE_EPSTATUSSET_DTGLIN_Pos 1            /**< \brief (USB_DEVICE_EPSTATUSSET) Data Toggle IN Set */
+#define USB_DEVICE_EPSTATUSSET_DTGLIN (0x1u << USB_DEVICE_EPSTATUSSET_DTGLIN_Pos)
+#define USB_DEVICE_EPSTATUSSET_CURBK_Pos 2            /**< \brief (USB_DEVICE_EPSTATUSSET) Current Bank Set */
+#define USB_DEVICE_EPSTATUSSET_CURBK (0x1u << USB_DEVICE_EPSTATUSSET_CURBK_Pos)
+#define USB_DEVICE_EPSTATUSSET_STALLRQ0_Pos 4            /**< \brief (USB_DEVICE_EPSTATUSSET) Stall 0 Request Set */
+#define USB_DEVICE_EPSTATUSSET_STALLRQ0 (1 << USB_DEVICE_EPSTATUSSET_STALLRQ0_Pos)
+#define USB_DEVICE_EPSTATUSSET_STALLRQ1_Pos 5            /**< \brief (USB_DEVICE_EPSTATUSSET) Stall 1 Request Set */
+#define USB_DEVICE_EPSTATUSSET_STALLRQ1 (1 << USB_DEVICE_EPSTATUSSET_STALLRQ1_Pos)
+#define USB_DEVICE_EPSTATUSSET_STALLRQ_Pos 4            /**< \brief (USB_DEVICE_EPSTATUSSET) Stall x Request Set */
+#define USB_DEVICE_EPSTATUSSET_STALLRQ_Msk (0x3u << USB_DEVICE_EPSTATUSSET_STALLRQ_Pos)
+#define USB_DEVICE_EPSTATUSSET_STALLRQ(value) ((USB_DEVICE_EPSTATUSSET_STALLRQ_Msk & ((value) << USB_DEVICE_EPSTATUSSET_STALLRQ_Pos)))
+#define USB_DEVICE_EPSTATUSSET_BK0RDY_Pos 6            /**< \brief (USB_DEVICE_EPSTATUSSET) Bank 0 Ready Set */
+#define USB_DEVICE_EPSTATUSSET_BK0RDY (0x1u << USB_DEVICE_EPSTATUSSET_BK0RDY_Pos)
+#define USB_DEVICE_EPSTATUSSET_BK1RDY_Pos 7            /**< \brief (USB_DEVICE_EPSTATUSSET) Bank 1 Ready Set */
+#define USB_DEVICE_EPSTATUSSET_BK1RDY (0x1u << USB_DEVICE_EPSTATUSSET_BK1RDY_Pos)
+#define USB_DEVICE_EPSTATUSSET_MASK 0xF7u        /**< \brief (USB_DEVICE_EPSTATUSSET) MASK Register */
+
+/* -------- USB_HOST_PSTATUSSET : (USB Offset: 0x105) ( /W  8) HOST HOST_PIPE End Point Pipe Status Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DTGL:1;           /*!< bit:      0  Data Toggle Set                    */
+    uint8_t  :1;               /*!< bit:      1  Reserved                           */
+    uint8_t  CURBK:1;          /*!< bit:      2  Current Bank Set                   */
+    uint8_t  :1;               /*!< bit:      3  Reserved                           */
+    uint8_t  PFREEZE:1;        /*!< bit:      4  Pipe Freeze Set                    */
+    uint8_t  :1;               /*!< bit:      5  Reserved                           */
+    uint8_t  BK0RDY:1;         /*!< bit:      6  Bank 0 Ready Set                   */
+    uint8_t  BK1RDY:1;         /*!< bit:      7  Bank 1 Ready Set                   */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_PSTATUSSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_PSTATUSSET_OFFSET  0x105        /**< \brief (USB_HOST_PSTATUSSET offset) HOST_PIPE End Point Pipe Status Set */
+#define USB_HOST_PSTATUSSET_RESETVALUE 0x00         /**< \brief (USB_HOST_PSTATUSSET reset_value) HOST_PIPE End Point Pipe Status Set */
+
+#define USB_HOST_PSTATUSSET_DTGL_Pos 0            /**< \brief (USB_HOST_PSTATUSSET) Data Toggle Set */
+#define USB_HOST_PSTATUSSET_DTGL    (0x1u << USB_HOST_PSTATUSSET_DTGL_Pos)
+#define USB_HOST_PSTATUSSET_CURBK_Pos 2            /**< \brief (USB_HOST_PSTATUSSET) Current Bank Set */
+#define USB_HOST_PSTATUSSET_CURBK   (0x1u << USB_HOST_PSTATUSSET_CURBK_Pos)
+#define USB_HOST_PSTATUSSET_PFREEZE_Pos 4            /**< \brief (USB_HOST_PSTATUSSET) Pipe Freeze Set */
+#define USB_HOST_PSTATUSSET_PFREEZE (0x1u << USB_HOST_PSTATUSSET_PFREEZE_Pos)
+#define USB_HOST_PSTATUSSET_BK0RDY_Pos 6            /**< \brief (USB_HOST_PSTATUSSET) Bank 0 Ready Set */
+#define USB_HOST_PSTATUSSET_BK0RDY  (0x1u << USB_HOST_PSTATUSSET_BK0RDY_Pos)
+#define USB_HOST_PSTATUSSET_BK1RDY_Pos 7            /**< \brief (USB_HOST_PSTATUSSET) Bank 1 Ready Set */
+#define USB_HOST_PSTATUSSET_BK1RDY  (0x1u << USB_HOST_PSTATUSSET_BK1RDY_Pos)
+#define USB_HOST_PSTATUSSET_MASK    0xD5u        /**< \brief (USB_HOST_PSTATUSSET) MASK Register */
+
+/* -------- USB_DEVICE_EPSTATUS : (USB Offset: 0x106) (R/   8) DEVICE DEVICE_ENDPOINT End Point Pipe Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DTGLOUT:1;        /*!< bit:      0  Data Toggle Out                    */
+    uint8_t  DTGLIN:1;         /*!< bit:      1  Data Toggle In                     */
+    uint8_t  CURBK:1;          /*!< bit:      2  Current Bank                       */
+    uint8_t  :1;               /*!< bit:      3  Reserved                           */
+    uint8_t  STALLRQ0:1;       /*!< bit:      4  Stall 0 Request                    */
+    uint8_t  STALLRQ1:1;       /*!< bit:      5  Stall 1 Request                    */
+    uint8_t  BK0RDY:1;         /*!< bit:      6  Bank 0 ready                       */
+    uint8_t  BK1RDY:1;         /*!< bit:      7  Bank 1 ready                       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  :4;               /*!< bit:  0.. 3  Reserved                           */
+    uint8_t  STALLRQ:2;        /*!< bit:  4.. 5  Stall x Request                    */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_EPSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_EPSTATUS_OFFSET  0x106        /**< \brief (USB_DEVICE_EPSTATUS offset) DEVICE_ENDPOINT End Point Pipe Status */
+#define USB_DEVICE_EPSTATUS_RESETVALUE 0x00         /**< \brief (USB_DEVICE_EPSTATUS reset_value) DEVICE_ENDPOINT End Point Pipe Status */
+
+#define USB_DEVICE_EPSTATUS_DTGLOUT_Pos 0            /**< \brief (USB_DEVICE_EPSTATUS) Data Toggle Out */
+#define USB_DEVICE_EPSTATUS_DTGLOUT (0x1u << USB_DEVICE_EPSTATUS_DTGLOUT_Pos)
+#define USB_DEVICE_EPSTATUS_DTGLIN_Pos 1            /**< \brief (USB_DEVICE_EPSTATUS) Data Toggle In */
+#define USB_DEVICE_EPSTATUS_DTGLIN  (0x1u << USB_DEVICE_EPSTATUS_DTGLIN_Pos)
+#define USB_DEVICE_EPSTATUS_CURBK_Pos 2            /**< \brief (USB_DEVICE_EPSTATUS) Current Bank */
+#define USB_DEVICE_EPSTATUS_CURBK   (0x1u << USB_DEVICE_EPSTATUS_CURBK_Pos)
+#define USB_DEVICE_EPSTATUS_STALLRQ0_Pos 4            /**< \brief (USB_DEVICE_EPSTATUS) Stall 0 Request */
+#define USB_DEVICE_EPSTATUS_STALLRQ0 (1 << USB_DEVICE_EPSTATUS_STALLRQ0_Pos)
+#define USB_DEVICE_EPSTATUS_STALLRQ1_Pos 5            /**< \brief (USB_DEVICE_EPSTATUS) Stall 1 Request */
+#define USB_DEVICE_EPSTATUS_STALLRQ1 (1 << USB_DEVICE_EPSTATUS_STALLRQ1_Pos)
+#define USB_DEVICE_EPSTATUS_STALLRQ_Pos 4            /**< \brief (USB_DEVICE_EPSTATUS) Stall x Request */
+#define USB_DEVICE_EPSTATUS_STALLRQ_Msk (0x3u << USB_DEVICE_EPSTATUS_STALLRQ_Pos)
+#define USB_DEVICE_EPSTATUS_STALLRQ(value) ((USB_DEVICE_EPSTATUS_STALLRQ_Msk & ((value) << USB_DEVICE_EPSTATUS_STALLRQ_Pos)))
+#define USB_DEVICE_EPSTATUS_BK0RDY_Pos 6            /**< \brief (USB_DEVICE_EPSTATUS) Bank 0 ready */
+#define USB_DEVICE_EPSTATUS_BK0RDY  (0x1u << USB_DEVICE_EPSTATUS_BK0RDY_Pos)
+#define USB_DEVICE_EPSTATUS_BK1RDY_Pos 7            /**< \brief (USB_DEVICE_EPSTATUS) Bank 1 ready */
+#define USB_DEVICE_EPSTATUS_BK1RDY  (0x1u << USB_DEVICE_EPSTATUS_BK1RDY_Pos)
+#define USB_DEVICE_EPSTATUS_MASK    0xF7u        /**< \brief (USB_DEVICE_EPSTATUS) MASK Register */
+
+/* -------- USB_HOST_PSTATUS : (USB Offset: 0x106) (R/   8) HOST HOST_PIPE End Point Pipe Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  DTGL:1;           /*!< bit:      0  Data Toggle                        */
+    uint8_t  :1;               /*!< bit:      1  Reserved                           */
+    uint8_t  CURBK:1;          /*!< bit:      2  Current Bank                       */
+    uint8_t  :1;               /*!< bit:      3  Reserved                           */
+    uint8_t  PFREEZE:1;        /*!< bit:      4  Pipe Freeze                        */
+    uint8_t  :1;               /*!< bit:      5  Reserved                           */
+    uint8_t  BK0RDY:1;         /*!< bit:      6  Bank 0 ready                       */
+    uint8_t  BK1RDY:1;         /*!< bit:      7  Bank 1 ready                       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_PSTATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_PSTATUS_OFFSET     0x106        /**< \brief (USB_HOST_PSTATUS offset) HOST_PIPE End Point Pipe Status */
+#define USB_HOST_PSTATUS_RESETVALUE 0x00         /**< \brief (USB_HOST_PSTATUS reset_value) HOST_PIPE End Point Pipe Status */
+
+#define USB_HOST_PSTATUS_DTGL_Pos   0            /**< \brief (USB_HOST_PSTATUS) Data Toggle */
+#define USB_HOST_PSTATUS_DTGL       (0x1u << USB_HOST_PSTATUS_DTGL_Pos)
+#define USB_HOST_PSTATUS_CURBK_Pos  2            /**< \brief (USB_HOST_PSTATUS) Current Bank */
+#define USB_HOST_PSTATUS_CURBK      (0x1u << USB_HOST_PSTATUS_CURBK_Pos)
+#define USB_HOST_PSTATUS_PFREEZE_Pos 4            /**< \brief (USB_HOST_PSTATUS) Pipe Freeze */
+#define USB_HOST_PSTATUS_PFREEZE    (0x1u << USB_HOST_PSTATUS_PFREEZE_Pos)
+#define USB_HOST_PSTATUS_BK0RDY_Pos 6            /**< \brief (USB_HOST_PSTATUS) Bank 0 ready */
+#define USB_HOST_PSTATUS_BK0RDY     (0x1u << USB_HOST_PSTATUS_BK0RDY_Pos)
+#define USB_HOST_PSTATUS_BK1RDY_Pos 7            /**< \brief (USB_HOST_PSTATUS) Bank 1 ready */
+#define USB_HOST_PSTATUS_BK1RDY     (0x1u << USB_HOST_PSTATUS_BK1RDY_Pos)
+#define USB_HOST_PSTATUS_MASK       0xD5u        /**< \brief (USB_HOST_PSTATUS) MASK Register */
+
+/* -------- USB_DEVICE_EPINTFLAG : (USB Offset: 0x107) (R/W  8) DEVICE DEVICE_ENDPOINT End Point Interrupt Flag -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  TRCPT0:1;         /*!< bit:      0  Transfer Complete 0                */
+    uint8_t  TRCPT1:1;         /*!< bit:      1  Transfer Complete 1                */
+    uint8_t  TRFAIL0:1;        /*!< bit:      2  Error Flow 0                       */
+    uint8_t  TRFAIL1:1;        /*!< bit:      3  Error Flow 1                       */
+    uint8_t  RXSTP:1;          /*!< bit:      4  Received Setup                     */
+    uint8_t  STALL0:1;         /*!< bit:      5  Stall 0 In/out                     */
+    uint8_t  STALL1:1;         /*!< bit:      6  Stall 1 In/out                     */
+    uint8_t  :1;               /*!< bit:      7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  TRCPT:2;          /*!< bit:  0.. 1  Transfer Complete x                */
+    uint8_t  TRFAIL:2;         /*!< bit:  2.. 3  Error Flow x                       */
+    uint8_t  :1;               /*!< bit:      4  Reserved                           */
+    uint8_t  STALL:2;          /*!< bit:  5.. 6  Stall x In/out                     */
+    uint8_t  :1;               /*!< bit:      7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_EPINTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_EPINTFLAG_OFFSET 0x107        /**< \brief (USB_DEVICE_EPINTFLAG offset) DEVICE_ENDPOINT End Point Interrupt Flag */
+#define USB_DEVICE_EPINTFLAG_RESETVALUE 0x00         /**< \brief (USB_DEVICE_EPINTFLAG reset_value) DEVICE_ENDPOINT End Point Interrupt Flag */
+
+#define USB_DEVICE_EPINTFLAG_TRCPT0_Pos 0            /**< \brief (USB_DEVICE_EPINTFLAG) Transfer Complete 0 */
+#define USB_DEVICE_EPINTFLAG_TRCPT0 (1 << USB_DEVICE_EPINTFLAG_TRCPT0_Pos)
+#define USB_DEVICE_EPINTFLAG_TRCPT1_Pos 1            /**< \brief (USB_DEVICE_EPINTFLAG) Transfer Complete 1 */
+#define USB_DEVICE_EPINTFLAG_TRCPT1 (1 << USB_DEVICE_EPINTFLAG_TRCPT1_Pos)
+#define USB_DEVICE_EPINTFLAG_TRCPT_Pos 0            /**< \brief (USB_DEVICE_EPINTFLAG) Transfer Complete x */
+#define USB_DEVICE_EPINTFLAG_TRCPT_Msk (0x3u << USB_DEVICE_EPINTFLAG_TRCPT_Pos)
+#define USB_DEVICE_EPINTFLAG_TRCPT(value) ((USB_DEVICE_EPINTFLAG_TRCPT_Msk & ((value) << USB_DEVICE_EPINTFLAG_TRCPT_Pos)))
+#define USB_DEVICE_EPINTFLAG_TRFAIL0_Pos 2            /**< \brief (USB_DEVICE_EPINTFLAG) Error Flow 0 */
+#define USB_DEVICE_EPINTFLAG_TRFAIL0 (1 << USB_DEVICE_EPINTFLAG_TRFAIL0_Pos)
+#define USB_DEVICE_EPINTFLAG_TRFAIL1_Pos 3            /**< \brief (USB_DEVICE_EPINTFLAG) Error Flow 1 */
+#define USB_DEVICE_EPINTFLAG_TRFAIL1 (1 << USB_DEVICE_EPINTFLAG_TRFAIL1_Pos)
+#define USB_DEVICE_EPINTFLAG_TRFAIL_Pos 2            /**< \brief (USB_DEVICE_EPINTFLAG) Error Flow x */
+#define USB_DEVICE_EPINTFLAG_TRFAIL_Msk (0x3u << USB_DEVICE_EPINTFLAG_TRFAIL_Pos)
+#define USB_DEVICE_EPINTFLAG_TRFAIL(value) ((USB_DEVICE_EPINTFLAG_TRFAIL_Msk & ((value) << USB_DEVICE_EPINTFLAG_TRFAIL_Pos)))
+#define USB_DEVICE_EPINTFLAG_RXSTP_Pos 4            /**< \brief (USB_DEVICE_EPINTFLAG) Received Setup */
+#define USB_DEVICE_EPINTFLAG_RXSTP  (0x1u << USB_DEVICE_EPINTFLAG_RXSTP_Pos)
+#define USB_DEVICE_EPINTFLAG_STALL0_Pos 5            /**< \brief (USB_DEVICE_EPINTFLAG) Stall 0 In/out */
+#define USB_DEVICE_EPINTFLAG_STALL0 (1 << USB_DEVICE_EPINTFLAG_STALL0_Pos)
+#define USB_DEVICE_EPINTFLAG_STALL1_Pos 6            /**< \brief (USB_DEVICE_EPINTFLAG) Stall 1 In/out */
+#define USB_DEVICE_EPINTFLAG_STALL1 (1 << USB_DEVICE_EPINTFLAG_STALL1_Pos)
+#define USB_DEVICE_EPINTFLAG_STALL_Pos 5            /**< \brief (USB_DEVICE_EPINTFLAG) Stall x In/out */
+#define USB_DEVICE_EPINTFLAG_STALL_Msk (0x3u << USB_DEVICE_EPINTFLAG_STALL_Pos)
+#define USB_DEVICE_EPINTFLAG_STALL(value) ((USB_DEVICE_EPINTFLAG_STALL_Msk & ((value) << USB_DEVICE_EPINTFLAG_STALL_Pos)))
+#define USB_DEVICE_EPINTFLAG_MASK   0x7Fu        /**< \brief (USB_DEVICE_EPINTFLAG) MASK Register */
+
+/* -------- USB_HOST_PINTFLAG : (USB Offset: 0x107) (R/W  8) HOST HOST_PIPE Pipe Interrupt Flag -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  TRCPT0:1;         /*!< bit:      0  Transfer Complete 0 Interrupt Flag */
+    uint8_t  TRCPT1:1;         /*!< bit:      1  Transfer Complete 1 Interrupt Flag */
+    uint8_t  TRFAIL:1;         /*!< bit:      2  Error Flow Interrupt Flag          */
+    uint8_t  PERR:1;           /*!< bit:      3  Pipe Error Interrupt Flag          */
+    uint8_t  TXSTP:1;          /*!< bit:      4  Transmit  Setup Interrupt Flag     */
+    uint8_t  STALL:1;          /*!< bit:      5  Stall Interrupt Flag               */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  TRCPT:2;          /*!< bit:  0.. 1  Transfer Complete x Interrupt Flag */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_PINTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_PINTFLAG_OFFSET    0x107        /**< \brief (USB_HOST_PINTFLAG offset) HOST_PIPE Pipe Interrupt Flag */
+#define USB_HOST_PINTFLAG_RESETVALUE 0x00         /**< \brief (USB_HOST_PINTFLAG reset_value) HOST_PIPE Pipe Interrupt Flag */
+
+#define USB_HOST_PINTFLAG_TRCPT0_Pos 0            /**< \brief (USB_HOST_PINTFLAG) Transfer Complete 0 Interrupt Flag */
+#define USB_HOST_PINTFLAG_TRCPT0    (1 << USB_HOST_PINTFLAG_TRCPT0_Pos)
+#define USB_HOST_PINTFLAG_TRCPT1_Pos 1            /**< \brief (USB_HOST_PINTFLAG) Transfer Complete 1 Interrupt Flag */
+#define USB_HOST_PINTFLAG_TRCPT1    (1 << USB_HOST_PINTFLAG_TRCPT1_Pos)
+#define USB_HOST_PINTFLAG_TRCPT_Pos 0            /**< \brief (USB_HOST_PINTFLAG) Transfer Complete x Interrupt Flag */
+#define USB_HOST_PINTFLAG_TRCPT_Msk (0x3u << USB_HOST_PINTFLAG_TRCPT_Pos)
+#define USB_HOST_PINTFLAG_TRCPT(value) ((USB_HOST_PINTFLAG_TRCPT_Msk & ((value) << USB_HOST_PINTFLAG_TRCPT_Pos)))
+#define USB_HOST_PINTFLAG_TRFAIL_Pos 2            /**< \brief (USB_HOST_PINTFLAG) Error Flow Interrupt Flag */
+#define USB_HOST_PINTFLAG_TRFAIL    (0x1u << USB_HOST_PINTFLAG_TRFAIL_Pos)
+#define USB_HOST_PINTFLAG_PERR_Pos  3            /**< \brief (USB_HOST_PINTFLAG) Pipe Error Interrupt Flag */
+#define USB_HOST_PINTFLAG_PERR      (0x1u << USB_HOST_PINTFLAG_PERR_Pos)
+#define USB_HOST_PINTFLAG_TXSTP_Pos 4            /**< \brief (USB_HOST_PINTFLAG) Transmit  Setup Interrupt Flag */
+#define USB_HOST_PINTFLAG_TXSTP     (0x1u << USB_HOST_PINTFLAG_TXSTP_Pos)
+#define USB_HOST_PINTFLAG_STALL_Pos 5            /**< \brief (USB_HOST_PINTFLAG) Stall Interrupt Flag */
+#define USB_HOST_PINTFLAG_STALL     (0x1u << USB_HOST_PINTFLAG_STALL_Pos)
+#define USB_HOST_PINTFLAG_MASK      0x3Fu        /**< \brief (USB_HOST_PINTFLAG) MASK Register */
+
+/* -------- USB_DEVICE_EPINTENCLR : (USB Offset: 0x108) (R/W  8) DEVICE DEVICE_ENDPOINT End Point Interrupt Clear Flag -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  TRCPT0:1;         /*!< bit:      0  Transfer Complete 0 Interrupt Disable */
+    uint8_t  TRCPT1:1;         /*!< bit:      1  Transfer Complete 1 Interrupt Disable */
+    uint8_t  TRFAIL0:1;        /*!< bit:      2  Error Flow 0 Interrupt Disable     */
+    uint8_t  TRFAIL1:1;        /*!< bit:      3  Error Flow 1 Interrupt Disable     */
+    uint8_t  RXSTP:1;          /*!< bit:      4  Received Setup Interrupt Disable   */
+    uint8_t  STALL0:1;         /*!< bit:      5  Stall 0 In/Out Interrupt Disable   */
+    uint8_t  STALL1:1;         /*!< bit:      6  Stall 1 In/Out Interrupt Disable   */
+    uint8_t  :1;               /*!< bit:      7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  TRCPT:2;          /*!< bit:  0.. 1  Transfer Complete x Interrupt Disable */
+    uint8_t  TRFAIL:2;         /*!< bit:  2.. 3  Error Flow x Interrupt Disable     */
+    uint8_t  :1;               /*!< bit:      4  Reserved                           */
+    uint8_t  STALL:2;          /*!< bit:  5.. 6  Stall x In/Out Interrupt Disable   */
+    uint8_t  :1;               /*!< bit:      7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_EPINTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_EPINTENCLR_OFFSET 0x108        /**< \brief (USB_DEVICE_EPINTENCLR offset) DEVICE_ENDPOINT End Point Interrupt Clear Flag */
+#define USB_DEVICE_EPINTENCLR_RESETVALUE 0x00         /**< \brief (USB_DEVICE_EPINTENCLR reset_value) DEVICE_ENDPOINT End Point Interrupt Clear Flag */
+
+#define USB_DEVICE_EPINTENCLR_TRCPT0_Pos 0            /**< \brief (USB_DEVICE_EPINTENCLR) Transfer Complete 0 Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_TRCPT0 (1 << USB_DEVICE_EPINTENCLR_TRCPT0_Pos)
+#define USB_DEVICE_EPINTENCLR_TRCPT1_Pos 1            /**< \brief (USB_DEVICE_EPINTENCLR) Transfer Complete 1 Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_TRCPT1 (1 << USB_DEVICE_EPINTENCLR_TRCPT1_Pos)
+#define USB_DEVICE_EPINTENCLR_TRCPT_Pos 0            /**< \brief (USB_DEVICE_EPINTENCLR) Transfer Complete x Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_TRCPT_Msk (0x3u << USB_DEVICE_EPINTENCLR_TRCPT_Pos)
+#define USB_DEVICE_EPINTENCLR_TRCPT(value) ((USB_DEVICE_EPINTENCLR_TRCPT_Msk & ((value) << USB_DEVICE_EPINTENCLR_TRCPT_Pos)))
+#define USB_DEVICE_EPINTENCLR_TRFAIL0_Pos 2            /**< \brief (USB_DEVICE_EPINTENCLR) Error Flow 0 Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_TRFAIL0 (1 << USB_DEVICE_EPINTENCLR_TRFAIL0_Pos)
+#define USB_DEVICE_EPINTENCLR_TRFAIL1_Pos 3            /**< \brief (USB_DEVICE_EPINTENCLR) Error Flow 1 Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_TRFAIL1 (1 << USB_DEVICE_EPINTENCLR_TRFAIL1_Pos)
+#define USB_DEVICE_EPINTENCLR_TRFAIL_Pos 2            /**< \brief (USB_DEVICE_EPINTENCLR) Error Flow x Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_TRFAIL_Msk (0x3u << USB_DEVICE_EPINTENCLR_TRFAIL_Pos)
+#define USB_DEVICE_EPINTENCLR_TRFAIL(value) ((USB_DEVICE_EPINTENCLR_TRFAIL_Msk & ((value) << USB_DEVICE_EPINTENCLR_TRFAIL_Pos)))
+#define USB_DEVICE_EPINTENCLR_RXSTP_Pos 4            /**< \brief (USB_DEVICE_EPINTENCLR) Received Setup Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_RXSTP (0x1u << USB_DEVICE_EPINTENCLR_RXSTP_Pos)
+#define USB_DEVICE_EPINTENCLR_STALL0_Pos 5            /**< \brief (USB_DEVICE_EPINTENCLR) Stall 0 In/Out Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_STALL0 (1 << USB_DEVICE_EPINTENCLR_STALL0_Pos)
+#define USB_DEVICE_EPINTENCLR_STALL1_Pos 6            /**< \brief (USB_DEVICE_EPINTENCLR) Stall 1 In/Out Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_STALL1 (1 << USB_DEVICE_EPINTENCLR_STALL1_Pos)
+#define USB_DEVICE_EPINTENCLR_STALL_Pos 5            /**< \brief (USB_DEVICE_EPINTENCLR) Stall x In/Out Interrupt Disable */
+#define USB_DEVICE_EPINTENCLR_STALL_Msk (0x3u << USB_DEVICE_EPINTENCLR_STALL_Pos)
+#define USB_DEVICE_EPINTENCLR_STALL(value) ((USB_DEVICE_EPINTENCLR_STALL_Msk & ((value) << USB_DEVICE_EPINTENCLR_STALL_Pos)))
+#define USB_DEVICE_EPINTENCLR_MASK  0x7Fu        /**< \brief (USB_DEVICE_EPINTENCLR) MASK Register */
+
+/* -------- USB_HOST_PINTENCLR : (USB Offset: 0x108) (R/W  8) HOST HOST_PIPE Pipe Interrupt Flag Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  TRCPT0:1;         /*!< bit:      0  Transfer Complete 0 Disable        */
+    uint8_t  TRCPT1:1;         /*!< bit:      1  Transfer Complete 1 Disable        */
+    uint8_t  TRFAIL:1;         /*!< bit:      2  Error Flow Interrupt Disable       */
+    uint8_t  PERR:1;           /*!< bit:      3  Pipe Error Interrupt Disable       */
+    uint8_t  TXSTP:1;          /*!< bit:      4  Transmit  Setup Interrupt Disable  */
+    uint8_t  STALL:1;          /*!< bit:      5  Stall Inetrrupt Disable            */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  TRCPT:2;          /*!< bit:  0.. 1  Transfer Complete x Disable        */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_PINTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_PINTENCLR_OFFSET   0x108        /**< \brief (USB_HOST_PINTENCLR offset) HOST_PIPE Pipe Interrupt Flag Clear */
+#define USB_HOST_PINTENCLR_RESETVALUE 0x00         /**< \brief (USB_HOST_PINTENCLR reset_value) HOST_PIPE Pipe Interrupt Flag Clear */
+
+#define USB_HOST_PINTENCLR_TRCPT0_Pos 0            /**< \brief (USB_HOST_PINTENCLR) Transfer Complete 0 Disable */
+#define USB_HOST_PINTENCLR_TRCPT0   (1 << USB_HOST_PINTENCLR_TRCPT0_Pos)
+#define USB_HOST_PINTENCLR_TRCPT1_Pos 1            /**< \brief (USB_HOST_PINTENCLR) Transfer Complete 1 Disable */
+#define USB_HOST_PINTENCLR_TRCPT1   (1 << USB_HOST_PINTENCLR_TRCPT1_Pos)
+#define USB_HOST_PINTENCLR_TRCPT_Pos 0            /**< \brief (USB_HOST_PINTENCLR) Transfer Complete x Disable */
+#define USB_HOST_PINTENCLR_TRCPT_Msk (0x3u << USB_HOST_PINTENCLR_TRCPT_Pos)
+#define USB_HOST_PINTENCLR_TRCPT(value) ((USB_HOST_PINTENCLR_TRCPT_Msk & ((value) << USB_HOST_PINTENCLR_TRCPT_Pos)))
+#define USB_HOST_PINTENCLR_TRFAIL_Pos 2            /**< \brief (USB_HOST_PINTENCLR) Error Flow Interrupt Disable */
+#define USB_HOST_PINTENCLR_TRFAIL   (0x1u << USB_HOST_PINTENCLR_TRFAIL_Pos)
+#define USB_HOST_PINTENCLR_PERR_Pos 3            /**< \brief (USB_HOST_PINTENCLR) Pipe Error Interrupt Disable */
+#define USB_HOST_PINTENCLR_PERR     (0x1u << USB_HOST_PINTENCLR_PERR_Pos)
+#define USB_HOST_PINTENCLR_TXSTP_Pos 4            /**< \brief (USB_HOST_PINTENCLR) Transmit  Setup Interrupt Disable */
+#define USB_HOST_PINTENCLR_TXSTP    (0x1u << USB_HOST_PINTENCLR_TXSTP_Pos)
+#define USB_HOST_PINTENCLR_STALL_Pos 5            /**< \brief (USB_HOST_PINTENCLR) Stall Inetrrupt Disable */
+#define USB_HOST_PINTENCLR_STALL    (0x1u << USB_HOST_PINTENCLR_STALL_Pos)
+#define USB_HOST_PINTENCLR_MASK     0x3Fu        /**< \brief (USB_HOST_PINTENCLR) MASK Register */
+
+/* -------- USB_DEVICE_EPINTENSET : (USB Offset: 0x109) (R/W  8) DEVICE DEVICE_ENDPOINT End Point Interrupt Set Flag -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  TRCPT0:1;         /*!< bit:      0  Transfer Complete 0 Interrupt Enable */
+    uint8_t  TRCPT1:1;         /*!< bit:      1  Transfer Complete 1 Interrupt Enable */
+    uint8_t  TRFAIL0:1;        /*!< bit:      2  Error Flow 0 Interrupt Enable      */
+    uint8_t  TRFAIL1:1;        /*!< bit:      3  Error Flow 1 Interrupt Enable      */
+    uint8_t  RXSTP:1;          /*!< bit:      4  Received Setup Interrupt Enable    */
+    uint8_t  STALL0:1;         /*!< bit:      5  Stall 0 In/out Interrupt enable    */
+    uint8_t  STALL1:1;         /*!< bit:      6  Stall 1 In/out Interrupt enable    */
+    uint8_t  :1;               /*!< bit:      7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  TRCPT:2;          /*!< bit:  0.. 1  Transfer Complete x Interrupt Enable */
+    uint8_t  TRFAIL:2;         /*!< bit:  2.. 3  Error Flow x Interrupt Enable      */
+    uint8_t  :1;               /*!< bit:      4  Reserved                           */
+    uint8_t  STALL:2;          /*!< bit:  5.. 6  Stall x In/out Interrupt enable    */
+    uint8_t  :1;               /*!< bit:      7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_EPINTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_EPINTENSET_OFFSET 0x109        /**< \brief (USB_DEVICE_EPINTENSET offset) DEVICE_ENDPOINT End Point Interrupt Set Flag */
+#define USB_DEVICE_EPINTENSET_RESETVALUE 0x00         /**< \brief (USB_DEVICE_EPINTENSET reset_value) DEVICE_ENDPOINT End Point Interrupt Set Flag */
+
+#define USB_DEVICE_EPINTENSET_TRCPT0_Pos 0            /**< \brief (USB_DEVICE_EPINTENSET) Transfer Complete 0 Interrupt Enable */
+#define USB_DEVICE_EPINTENSET_TRCPT0 (1 << USB_DEVICE_EPINTENSET_TRCPT0_Pos)
+#define USB_DEVICE_EPINTENSET_TRCPT1_Pos 1            /**< \brief (USB_DEVICE_EPINTENSET) Transfer Complete 1 Interrupt Enable */
+#define USB_DEVICE_EPINTENSET_TRCPT1 (1 << USB_DEVICE_EPINTENSET_TRCPT1_Pos)
+#define USB_DEVICE_EPINTENSET_TRCPT_Pos 0            /**< \brief (USB_DEVICE_EPINTENSET) Transfer Complete x Interrupt Enable */
+#define USB_DEVICE_EPINTENSET_TRCPT_Msk (0x3u << USB_DEVICE_EPINTENSET_TRCPT_Pos)
+#define USB_DEVICE_EPINTENSET_TRCPT(value) ((USB_DEVICE_EPINTENSET_TRCPT_Msk & ((value) << USB_DEVICE_EPINTENSET_TRCPT_Pos)))
+#define USB_DEVICE_EPINTENSET_TRFAIL0_Pos 2            /**< \brief (USB_DEVICE_EPINTENSET) Error Flow 0 Interrupt Enable */
+#define USB_DEVICE_EPINTENSET_TRFAIL0 (1 << USB_DEVICE_EPINTENSET_TRFAIL0_Pos)
+#define USB_DEVICE_EPINTENSET_TRFAIL1_Pos 3            /**< \brief (USB_DEVICE_EPINTENSET) Error Flow 1 Interrupt Enable */
+#define USB_DEVICE_EPINTENSET_TRFAIL1 (1 << USB_DEVICE_EPINTENSET_TRFAIL1_Pos)
+#define USB_DEVICE_EPINTENSET_TRFAIL_Pos 2            /**< \brief (USB_DEVICE_EPINTENSET) Error Flow x Interrupt Enable */
+#define USB_DEVICE_EPINTENSET_TRFAIL_Msk (0x3u << USB_DEVICE_EPINTENSET_TRFAIL_Pos)
+#define USB_DEVICE_EPINTENSET_TRFAIL(value) ((USB_DEVICE_EPINTENSET_TRFAIL_Msk & ((value) << USB_DEVICE_EPINTENSET_TRFAIL_Pos)))
+#define USB_DEVICE_EPINTENSET_RXSTP_Pos 4            /**< \brief (USB_DEVICE_EPINTENSET) Received Setup Interrupt Enable */
+#define USB_DEVICE_EPINTENSET_RXSTP (0x1u << USB_DEVICE_EPINTENSET_RXSTP_Pos)
+#define USB_DEVICE_EPINTENSET_STALL0_Pos 5            /**< \brief (USB_DEVICE_EPINTENSET) Stall 0 In/out Interrupt enable */
+#define USB_DEVICE_EPINTENSET_STALL0 (1 << USB_DEVICE_EPINTENSET_STALL0_Pos)
+#define USB_DEVICE_EPINTENSET_STALL1_Pos 6            /**< \brief (USB_DEVICE_EPINTENSET) Stall 1 In/out Interrupt enable */
+#define USB_DEVICE_EPINTENSET_STALL1 (1 << USB_DEVICE_EPINTENSET_STALL1_Pos)
+#define USB_DEVICE_EPINTENSET_STALL_Pos 5            /**< \brief (USB_DEVICE_EPINTENSET) Stall x In/out Interrupt enable */
+#define USB_DEVICE_EPINTENSET_STALL_Msk (0x3u << USB_DEVICE_EPINTENSET_STALL_Pos)
+#define USB_DEVICE_EPINTENSET_STALL(value) ((USB_DEVICE_EPINTENSET_STALL_Msk & ((value) << USB_DEVICE_EPINTENSET_STALL_Pos)))
+#define USB_DEVICE_EPINTENSET_MASK  0x7Fu        /**< \brief (USB_DEVICE_EPINTENSET) MASK Register */
+
+/* -------- USB_HOST_PINTENSET : (USB Offset: 0x109) (R/W  8) HOST HOST_PIPE Pipe Interrupt Flag Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  TRCPT0:1;         /*!< bit:      0  Transfer Complete 0 Interrupt Enable */
+    uint8_t  TRCPT1:1;         /*!< bit:      1  Transfer Complete 1 Interrupt Enable */
+    uint8_t  TRFAIL:1;         /*!< bit:      2  Error Flow Interrupt Enable        */
+    uint8_t  PERR:1;           /*!< bit:      3  Pipe Error Interrupt Enable        */
+    uint8_t  TXSTP:1;          /*!< bit:      4  Transmit  Setup Interrupt Enable   */
+    uint8_t  STALL:1;          /*!< bit:      5  Stall Interrupt Enable             */
+    uint8_t  :2;               /*!< bit:  6.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  struct {
+    uint8_t  TRCPT:2;          /*!< bit:  0.. 1  Transfer Complete x Interrupt Enable */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } vec;                       /*!< Structure used for vec  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_PINTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_PINTENSET_OFFSET   0x109        /**< \brief (USB_HOST_PINTENSET offset) HOST_PIPE Pipe Interrupt Flag Set */
+#define USB_HOST_PINTENSET_RESETVALUE 0x00         /**< \brief (USB_HOST_PINTENSET reset_value) HOST_PIPE Pipe Interrupt Flag Set */
+
+#define USB_HOST_PINTENSET_TRCPT0_Pos 0            /**< \brief (USB_HOST_PINTENSET) Transfer Complete 0 Interrupt Enable */
+#define USB_HOST_PINTENSET_TRCPT0   (1 << USB_HOST_PINTENSET_TRCPT0_Pos)
+#define USB_HOST_PINTENSET_TRCPT1_Pos 1            /**< \brief (USB_HOST_PINTENSET) Transfer Complete 1 Interrupt Enable */
+#define USB_HOST_PINTENSET_TRCPT1   (1 << USB_HOST_PINTENSET_TRCPT1_Pos)
+#define USB_HOST_PINTENSET_TRCPT_Pos 0            /**< \brief (USB_HOST_PINTENSET) Transfer Complete x Interrupt Enable */
+#define USB_HOST_PINTENSET_TRCPT_Msk (0x3u << USB_HOST_PINTENSET_TRCPT_Pos)
+#define USB_HOST_PINTENSET_TRCPT(value) ((USB_HOST_PINTENSET_TRCPT_Msk & ((value) << USB_HOST_PINTENSET_TRCPT_Pos)))
+#define USB_HOST_PINTENSET_TRFAIL_Pos 2            /**< \brief (USB_HOST_PINTENSET) Error Flow Interrupt Enable */
+#define USB_HOST_PINTENSET_TRFAIL   (0x1u << USB_HOST_PINTENSET_TRFAIL_Pos)
+#define USB_HOST_PINTENSET_PERR_Pos 3            /**< \brief (USB_HOST_PINTENSET) Pipe Error Interrupt Enable */
+#define USB_HOST_PINTENSET_PERR     (0x1u << USB_HOST_PINTENSET_PERR_Pos)
+#define USB_HOST_PINTENSET_TXSTP_Pos 4            /**< \brief (USB_HOST_PINTENSET) Transmit  Setup Interrupt Enable */
+#define USB_HOST_PINTENSET_TXSTP    (0x1u << USB_HOST_PINTENSET_TXSTP_Pos)
+#define USB_HOST_PINTENSET_STALL_Pos 5            /**< \brief (USB_HOST_PINTENSET) Stall Interrupt Enable */
+#define USB_HOST_PINTENSET_STALL    (0x1u << USB_HOST_PINTENSET_STALL_Pos)
+#define USB_HOST_PINTENSET_MASK     0x3Fu        /**< \brief (USB_HOST_PINTENSET) MASK Register */
+
+/* -------- USB_DEVICE_ADDR : (USB Offset: 0x000) (R/W 32) DEVICE DEVICE_DESC_BANK Endpoint Bank, Adress of Data Buffer -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t ADDR:32;          /*!< bit:  0..31  Adress of data buffer              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} USB_DEVICE_ADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_ADDR_OFFSET      0x000        /**< \brief (USB_DEVICE_ADDR offset) DEVICE_DESC_BANK Endpoint Bank, Adress of Data Buffer */
+
+#define USB_DEVICE_ADDR_ADDR_Pos    0            /**< \brief (USB_DEVICE_ADDR) Adress of data buffer */
+#define USB_DEVICE_ADDR_ADDR_Msk    (0xFFFFFFFFu << USB_DEVICE_ADDR_ADDR_Pos)
+#define USB_DEVICE_ADDR_ADDR(value) ((USB_DEVICE_ADDR_ADDR_Msk & ((value) << USB_DEVICE_ADDR_ADDR_Pos)))
+#define USB_DEVICE_ADDR_MASK        0xFFFFFFFFu  /**< \brief (USB_DEVICE_ADDR) MASK Register */
+
+/* -------- USB_HOST_ADDR : (USB Offset: 0x000) (R/W 32) HOST HOST_DESC_BANK Host Bank, Adress of Data Buffer -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t ADDR:32;          /*!< bit:  0..31  Adress of data buffer              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} USB_HOST_ADDR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_ADDR_OFFSET        0x000        /**< \brief (USB_HOST_ADDR offset) HOST_DESC_BANK Host Bank, Adress of Data Buffer */
+
+#define USB_HOST_ADDR_ADDR_Pos      0            /**< \brief (USB_HOST_ADDR) Adress of data buffer */
+#define USB_HOST_ADDR_ADDR_Msk      (0xFFFFFFFFu << USB_HOST_ADDR_ADDR_Pos)
+#define USB_HOST_ADDR_ADDR(value)   ((USB_HOST_ADDR_ADDR_Msk & ((value) << USB_HOST_ADDR_ADDR_Pos)))
+#define USB_HOST_ADDR_MASK          0xFFFFFFFFu  /**< \brief (USB_HOST_ADDR) MASK Register */
+
+/* -------- USB_DEVICE_PCKSIZE : (USB Offset: 0x004) (R/W 32) DEVICE DEVICE_DESC_BANK Endpoint Bank, Packet Size -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t BYTE_COUNT:14;    /*!< bit:  0..13  Byte Count                         */
+    uint32_t MULTI_PACKET_SIZE:14; /*!< bit: 14..27  Multi Packet In or Out size        */
+    uint32_t SIZE:3;           /*!< bit: 28..30  Enpoint size                       */
+    uint32_t AUTO_ZLP:1;       /*!< bit:     31  Automatic Zero Length Packet       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} USB_DEVICE_PCKSIZE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_PCKSIZE_OFFSET   0x004        /**< \brief (USB_DEVICE_PCKSIZE offset) DEVICE_DESC_BANK Endpoint Bank, Packet Size */
+
+#define USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos 0            /**< \brief (USB_DEVICE_PCKSIZE) Byte Count */
+#define USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk (0x3FFFu << USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos)
+#define USB_DEVICE_PCKSIZE_BYTE_COUNT(value) ((USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk & ((value) << USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos)))
+#define USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos 14           /**< \brief (USB_DEVICE_PCKSIZE) Multi Packet In or Out size */
+#define USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk (0x3FFFu << USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos)
+#define USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(value) ((USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk & ((value) << USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos)))
+#define USB_DEVICE_PCKSIZE_SIZE_Pos 28           /**< \brief (USB_DEVICE_PCKSIZE) Enpoint size */
+#define USB_DEVICE_PCKSIZE_SIZE_Msk (0x7u << USB_DEVICE_PCKSIZE_SIZE_Pos)
+#define USB_DEVICE_PCKSIZE_SIZE(value) ((USB_DEVICE_PCKSIZE_SIZE_Msk & ((value) << USB_DEVICE_PCKSIZE_SIZE_Pos)))
+#define USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos 31           /**< \brief (USB_DEVICE_PCKSIZE) Automatic Zero Length Packet */
+#define USB_DEVICE_PCKSIZE_AUTO_ZLP (0x1u << USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos)
+#define USB_DEVICE_PCKSIZE_MASK     0xFFFFFFFFu  /**< \brief (USB_DEVICE_PCKSIZE) MASK Register */
+
+/* -------- USB_HOST_PCKSIZE : (USB Offset: 0x004) (R/W 32) HOST HOST_DESC_BANK Host Bank, Packet Size -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint32_t BYTE_COUNT:14;    /*!< bit:  0..13  Byte Count                         */
+    uint32_t MULTI_PACKET_SIZE:14; /*!< bit: 14..27  Multi Packet In or Out size        */
+    uint32_t SIZE:3;           /*!< bit: 28..30  Pipe size                          */
+    uint32_t AUTO_ZLP:1;       /*!< bit:     31  Automatic Zero Length Packet       */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint32_t reg;                /*!< Type      used for register access              */
+} USB_HOST_PCKSIZE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_PCKSIZE_OFFSET     0x004        /**< \brief (USB_HOST_PCKSIZE offset) HOST_DESC_BANK Host Bank, Packet Size */
+
+#define USB_HOST_PCKSIZE_BYTE_COUNT_Pos 0            /**< \brief (USB_HOST_PCKSIZE) Byte Count */
+#define USB_HOST_PCKSIZE_BYTE_COUNT_Msk (0x3FFFu << USB_HOST_PCKSIZE_BYTE_COUNT_Pos)
+#define USB_HOST_PCKSIZE_BYTE_COUNT(value) ((USB_HOST_PCKSIZE_BYTE_COUNT_Msk & ((value) << USB_HOST_PCKSIZE_BYTE_COUNT_Pos)))
+#define USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos 14           /**< \brief (USB_HOST_PCKSIZE) Multi Packet In or Out size */
+#define USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk (0x3FFFu << USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos)
+#define USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(value) ((USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk & ((value) << USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos)))
+#define USB_HOST_PCKSIZE_SIZE_Pos   28           /**< \brief (USB_HOST_PCKSIZE) Pipe size */
+#define USB_HOST_PCKSIZE_SIZE_Msk   (0x7u << USB_HOST_PCKSIZE_SIZE_Pos)
+#define USB_HOST_PCKSIZE_SIZE(value) ((USB_HOST_PCKSIZE_SIZE_Msk & ((value) << USB_HOST_PCKSIZE_SIZE_Pos)))
+#define USB_HOST_PCKSIZE_AUTO_ZLP_Pos 31           /**< \brief (USB_HOST_PCKSIZE) Automatic Zero Length Packet */
+#define USB_HOST_PCKSIZE_AUTO_ZLP   (0x1u << USB_HOST_PCKSIZE_AUTO_ZLP_Pos)
+#define USB_HOST_PCKSIZE_MASK       0xFFFFFFFFu  /**< \brief (USB_HOST_PCKSIZE) MASK Register */
+
+/* -------- USB_DEVICE_EXTREG : (USB Offset: 0x008) (R/W 16) DEVICE DEVICE_DESC_BANK Endpoint Bank, Extended -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SUBPID:4;         /*!< bit:  0.. 3  SUBPID field send with extended token */
+    uint16_t VARIABLE:11;      /*!< bit:  4..14  Variable field send with extended token */
+    uint16_t :1;               /*!< bit:     15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_DEVICE_EXTREG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_EXTREG_OFFSET    0x008        /**< \brief (USB_DEVICE_EXTREG offset) DEVICE_DESC_BANK Endpoint Bank, Extended */
+
+#define USB_DEVICE_EXTREG_SUBPID_Pos 0            /**< \brief (USB_DEVICE_EXTREG) SUBPID field send with extended token */
+#define USB_DEVICE_EXTREG_SUBPID_Msk (0xFu << USB_DEVICE_EXTREG_SUBPID_Pos)
+#define USB_DEVICE_EXTREG_SUBPID(value) ((USB_DEVICE_EXTREG_SUBPID_Msk & ((value) << USB_DEVICE_EXTREG_SUBPID_Pos)))
+#define USB_DEVICE_EXTREG_VARIABLE_Pos 4            /**< \brief (USB_DEVICE_EXTREG) Variable field send with extended token */
+#define USB_DEVICE_EXTREG_VARIABLE_Msk (0x7FFu << USB_DEVICE_EXTREG_VARIABLE_Pos)
+#define USB_DEVICE_EXTREG_VARIABLE(value) ((USB_DEVICE_EXTREG_VARIABLE_Msk & ((value) << USB_DEVICE_EXTREG_VARIABLE_Pos)))
+#define USB_DEVICE_EXTREG_MASK      0x7FFFu      /**< \brief (USB_DEVICE_EXTREG) MASK Register */
+
+/* -------- USB_HOST_EXTREG : (USB Offset: 0x008) (R/W 16) HOST HOST_DESC_BANK Host Bank, Extended -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t SUBPID:4;         /*!< bit:  0.. 3  SUBPID field send with extended token */
+    uint16_t VARIABLE:11;      /*!< bit:  4..14  Variable field send with extended token */
+    uint16_t :1;               /*!< bit:     15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_HOST_EXTREG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_EXTREG_OFFSET      0x008        /**< \brief (USB_HOST_EXTREG offset) HOST_DESC_BANK Host Bank, Extended */
+
+#define USB_HOST_EXTREG_SUBPID_Pos  0            /**< \brief (USB_HOST_EXTREG) SUBPID field send with extended token */
+#define USB_HOST_EXTREG_SUBPID_Msk  (0xFu << USB_HOST_EXTREG_SUBPID_Pos)
+#define USB_HOST_EXTREG_SUBPID(value) ((USB_HOST_EXTREG_SUBPID_Msk & ((value) << USB_HOST_EXTREG_SUBPID_Pos)))
+#define USB_HOST_EXTREG_VARIABLE_Pos 4            /**< \brief (USB_HOST_EXTREG) Variable field send with extended token */
+#define USB_HOST_EXTREG_VARIABLE_Msk (0x7FFu << USB_HOST_EXTREG_VARIABLE_Pos)
+#define USB_HOST_EXTREG_VARIABLE(value) ((USB_HOST_EXTREG_VARIABLE_Msk & ((value) << USB_HOST_EXTREG_VARIABLE_Pos)))
+#define USB_HOST_EXTREG_MASK        0x7FFFu      /**< \brief (USB_HOST_EXTREG) MASK Register */
+
+/* -------- USB_DEVICE_STATUS_BK : (USB Offset: 0x00A) (R/W  8) DEVICE DEVICE_DESC_BANK Enpoint Bank, Status of Bank -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CRCERR:1;         /*!< bit:      0  CRC Error Status                   */
+    uint8_t  ERRORFLOW:1;      /*!< bit:      1  Error Flow Status                  */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_DEVICE_STATUS_BK_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_DEVICE_STATUS_BK_OFFSET 0x00A        /**< \brief (USB_DEVICE_STATUS_BK offset) DEVICE_DESC_BANK Enpoint Bank, Status of Bank */
+
+#define USB_DEVICE_STATUS_BK_CRCERR_Pos 0            /**< \brief (USB_DEVICE_STATUS_BK) CRC Error Status */
+#define USB_DEVICE_STATUS_BK_CRCERR (0x1u << USB_DEVICE_STATUS_BK_CRCERR_Pos)
+#define USB_DEVICE_STATUS_BK_ERRORFLOW_Pos 1            /**< \brief (USB_DEVICE_STATUS_BK) Error Flow Status */
+#define USB_DEVICE_STATUS_BK_ERRORFLOW (0x1u << USB_DEVICE_STATUS_BK_ERRORFLOW_Pos)
+#define USB_DEVICE_STATUS_BK_MASK   0x03u        /**< \brief (USB_DEVICE_STATUS_BK) MASK Register */
+
+/* -------- USB_HOST_STATUS_BK : (USB Offset: 0x00A) (R/W  8) HOST HOST_DESC_BANK Host Bank, Status of Bank -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CRCERR:1;         /*!< bit:      0  CRC Error Status                   */
+    uint8_t  ERRORFLOW:1;      /*!< bit:      1  Error Flow Status                  */
+    uint8_t  :6;               /*!< bit:  2.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} USB_HOST_STATUS_BK_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_STATUS_BK_OFFSET   0x00A        /**< \brief (USB_HOST_STATUS_BK offset) HOST_DESC_BANK Host Bank, Status of Bank */
+
+#define USB_HOST_STATUS_BK_CRCERR_Pos 0            /**< \brief (USB_HOST_STATUS_BK) CRC Error Status */
+#define USB_HOST_STATUS_BK_CRCERR   (0x1u << USB_HOST_STATUS_BK_CRCERR_Pos)
+#define USB_HOST_STATUS_BK_ERRORFLOW_Pos 1            /**< \brief (USB_HOST_STATUS_BK) Error Flow Status */
+#define USB_HOST_STATUS_BK_ERRORFLOW (0x1u << USB_HOST_STATUS_BK_ERRORFLOW_Pos)
+#define USB_HOST_STATUS_BK_MASK     0x03u        /**< \brief (USB_HOST_STATUS_BK) MASK Register */
+
+/* -------- USB_HOST_CTRL_PIPE : (USB Offset: 0x00C) (R/W 16) HOST HOST_DESC_BANK Host Bank, Host Control Pipe -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t PDADDR:7;         /*!< bit:  0.. 6  Pipe Device Adress                 */
+    uint16_t :1;               /*!< bit:      7  Reserved                           */
+    uint16_t PEPNUM:4;         /*!< bit:  8..11  Pipe Endpoint Number               */
+    uint16_t PERMAX:4;         /*!< bit: 12..15  Pipe Error Max Number              */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_HOST_CTRL_PIPE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_CTRL_PIPE_OFFSET   0x00C        /**< \brief (USB_HOST_CTRL_PIPE offset) HOST_DESC_BANK Host Bank, Host Control Pipe */
+#define USB_HOST_CTRL_PIPE_RESETVALUE 0x0000       /**< \brief (USB_HOST_CTRL_PIPE reset_value) HOST_DESC_BANK Host Bank, Host Control Pipe */
+
+#define USB_HOST_CTRL_PIPE_PDADDR_Pos 0            /**< \brief (USB_HOST_CTRL_PIPE) Pipe Device Adress */
+#define USB_HOST_CTRL_PIPE_PDADDR_Msk (0x7Fu << USB_HOST_CTRL_PIPE_PDADDR_Pos)
+#define USB_HOST_CTRL_PIPE_PDADDR(value) ((USB_HOST_CTRL_PIPE_PDADDR_Msk & ((value) << USB_HOST_CTRL_PIPE_PDADDR_Pos)))
+#define USB_HOST_CTRL_PIPE_PEPNUM_Pos 8            /**< \brief (USB_HOST_CTRL_PIPE) Pipe Endpoint Number */
+#define USB_HOST_CTRL_PIPE_PEPNUM_Msk (0xFu << USB_HOST_CTRL_PIPE_PEPNUM_Pos)
+#define USB_HOST_CTRL_PIPE_PEPNUM(value) ((USB_HOST_CTRL_PIPE_PEPNUM_Msk & ((value) << USB_HOST_CTRL_PIPE_PEPNUM_Pos)))
+#define USB_HOST_CTRL_PIPE_PERMAX_Pos 12           /**< \brief (USB_HOST_CTRL_PIPE) Pipe Error Max Number */
+#define USB_HOST_CTRL_PIPE_PERMAX_Msk (0xFu << USB_HOST_CTRL_PIPE_PERMAX_Pos)
+#define USB_HOST_CTRL_PIPE_PERMAX(value) ((USB_HOST_CTRL_PIPE_PERMAX_Msk & ((value) << USB_HOST_CTRL_PIPE_PERMAX_Pos)))
+#define USB_HOST_CTRL_PIPE_MASK     0xFF7Fu      /**< \brief (USB_HOST_CTRL_PIPE) MASK Register */
+
+/* -------- USB_HOST_STATUS_PIPE : (USB Offset: 0x00E) (R/W 16) HOST HOST_DESC_BANK Host Bank, Host Status Pipe -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint16_t DTGLER:1;         /*!< bit:      0  Data Toggle Error                  */
+    uint16_t DAPIDER:1;        /*!< bit:      1  Data PID Error                     */
+    uint16_t PIDER:1;          /*!< bit:      2  PID Error                          */
+    uint16_t TOUTER:1;         /*!< bit:      3  Time Out Error                     */
+    uint16_t CRC16ER:1;        /*!< bit:      4  CRC16 Error                        */
+    uint16_t ERCNT:3;          /*!< bit:  5.. 7  Pipe Error Count                   */
+    uint16_t :8;               /*!< bit:  8..15  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint16_t reg;                /*!< Type      used for register access              */
+} USB_HOST_STATUS_PIPE_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define USB_HOST_STATUS_PIPE_OFFSET 0x00E        /**< \brief (USB_HOST_STATUS_PIPE offset) HOST_DESC_BANK Host Bank, Host Status Pipe */
+
+#define USB_HOST_STATUS_PIPE_DTGLER_Pos 0            /**< \brief (USB_HOST_STATUS_PIPE) Data Toggle Error */
+#define USB_HOST_STATUS_PIPE_DTGLER (0x1u << USB_HOST_STATUS_PIPE_DTGLER_Pos)
+#define USB_HOST_STATUS_PIPE_DAPIDER_Pos 1            /**< \brief (USB_HOST_STATUS_PIPE) Data PID Error */
+#define USB_HOST_STATUS_PIPE_DAPIDER (0x1u << USB_HOST_STATUS_PIPE_DAPIDER_Pos)
+#define USB_HOST_STATUS_PIPE_PIDER_Pos 2            /**< \brief (USB_HOST_STATUS_PIPE) PID Error */
+#define USB_HOST_STATUS_PIPE_PIDER  (0x1u << USB_HOST_STATUS_PIPE_PIDER_Pos)
+#define USB_HOST_STATUS_PIPE_TOUTER_Pos 3            /**< \brief (USB_HOST_STATUS_PIPE) Time Out Error */
+#define USB_HOST_STATUS_PIPE_TOUTER (0x1u << USB_HOST_STATUS_PIPE_TOUTER_Pos)
+#define USB_HOST_STATUS_PIPE_CRC16ER_Pos 4            /**< \brief (USB_HOST_STATUS_PIPE) CRC16 Error */
+#define USB_HOST_STATUS_PIPE_CRC16ER (0x1u << USB_HOST_STATUS_PIPE_CRC16ER_Pos)
+#define USB_HOST_STATUS_PIPE_ERCNT_Pos 5            /**< \brief (USB_HOST_STATUS_PIPE) Pipe Error Count */
+#define USB_HOST_STATUS_PIPE_ERCNT_Msk (0x7u << USB_HOST_STATUS_PIPE_ERCNT_Pos)
+#define USB_HOST_STATUS_PIPE_ERCNT(value) ((USB_HOST_STATUS_PIPE_ERCNT_Msk & ((value) << USB_HOST_STATUS_PIPE_ERCNT_Pos)))
+#define USB_HOST_STATUS_PIPE_MASK   0x00FFu      /**< \brief (USB_HOST_STATUS_PIPE) MASK Register */
+
+/** \brief UsbDeviceDescBank SRAM registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO USB_DEVICE_ADDR_Type      ADDR;        /**< \brief Offset: 0x000 (R/W 32) DEVICE_DESC_BANK Endpoint Bank, Adress of Data Buffer */
+  __IO USB_DEVICE_PCKSIZE_Type   PCKSIZE;     /**< \brief Offset: 0x004 (R/W 32) DEVICE_DESC_BANK Endpoint Bank, Packet Size */
+  __IO USB_DEVICE_EXTREG_Type    EXTREG;      /**< \brief Offset: 0x008 (R/W 16) DEVICE_DESC_BANK Endpoint Bank, Extended */
+  __IO USB_DEVICE_STATUS_BK_Type STATUS_BK;   /**< \brief Offset: 0x00A (R/W  8) DEVICE_DESC_BANK Enpoint Bank, Status of Bank */
+       RoReg8                    Reserved1[0x5];
+} UsbDeviceDescBank;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief UsbHostDescBank SRAM registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO USB_HOST_ADDR_Type        ADDR;        /**< \brief Offset: 0x000 (R/W 32) HOST_DESC_BANK Host Bank, Adress of Data Buffer */
+  __IO USB_HOST_PCKSIZE_Type     PCKSIZE;     /**< \brief Offset: 0x004 (R/W 32) HOST_DESC_BANK Host Bank, Packet Size */
+  __IO USB_HOST_EXTREG_Type      EXTREG;      /**< \brief Offset: 0x008 (R/W 16) HOST_DESC_BANK Host Bank, Extended */
+  __IO USB_HOST_STATUS_BK_Type   STATUS_BK;   /**< \brief Offset: 0x00A (R/W  8) HOST_DESC_BANK Host Bank, Status of Bank */
+       RoReg8                    Reserved1[0x1];
+  __IO USB_HOST_CTRL_PIPE_Type   CTRL_PIPE;   /**< \brief Offset: 0x00C (R/W 16) HOST_DESC_BANK Host Bank, Host Control Pipe */
+  __IO USB_HOST_STATUS_PIPE_Type STATUS_PIPE; /**< \brief Offset: 0x00E (R/W 16) HOST_DESC_BANK Host Bank, Host Status Pipe */
+} UsbHostDescBank;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief UsbDeviceEndpoint hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO USB_DEVICE_EPCFG_Type     EPCFG;       /**< \brief Offset: 0x000 (R/W  8) DEVICE_ENDPOINT End Point Configuration */
+       RoReg8                    Reserved1[0x3];
+  __O  USB_DEVICE_EPSTATUSCLR_Type EPSTATUSCLR; /**< \brief Offset: 0x004 ( /W  8) DEVICE_ENDPOINT End Point Pipe Status Clear */
+  __O  USB_DEVICE_EPSTATUSSET_Type EPSTATUSSET; /**< \brief Offset: 0x005 ( /W  8) DEVICE_ENDPOINT End Point Pipe Status Set */
+  __I  USB_DEVICE_EPSTATUS_Type  EPSTATUS;    /**< \brief Offset: 0x006 (R/   8) DEVICE_ENDPOINT End Point Pipe Status */
+  __IO USB_DEVICE_EPINTFLAG_Type EPINTFLAG;   /**< \brief Offset: 0x007 (R/W  8) DEVICE_ENDPOINT End Point Interrupt Flag */
+  __IO USB_DEVICE_EPINTENCLR_Type EPINTENCLR;  /**< \brief Offset: 0x008 (R/W  8) DEVICE_ENDPOINT End Point Interrupt Clear Flag */
+  __IO USB_DEVICE_EPINTENSET_Type EPINTENSET;  /**< \brief Offset: 0x009 (R/W  8) DEVICE_ENDPOINT End Point Interrupt Set Flag */
+       RoReg8                    Reserved2[0x16];
+} UsbDeviceEndpoint;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief UsbHostPipe hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO USB_HOST_PCFG_Type        PCFG;        /**< \brief Offset: 0x000 (R/W  8) HOST_PIPE End Point Configuration */
+       RoReg8                    Reserved1[0x2];
+  __IO USB_HOST_BINTERVAL_Type   BINTERVAL;   /**< \brief Offset: 0x003 (R/W  8) HOST_PIPE Bus Access Period of Pipe */
+  __O  USB_HOST_PSTATUSCLR_Type  PSTATUSCLR;  /**< \brief Offset: 0x004 ( /W  8) HOST_PIPE End Point Pipe Status Clear */
+  __O  USB_HOST_PSTATUSSET_Type  PSTATUSSET;  /**< \brief Offset: 0x005 ( /W  8) HOST_PIPE End Point Pipe Status Set */
+  __I  USB_HOST_PSTATUS_Type     PSTATUS;     /**< \brief Offset: 0x006 (R/   8) HOST_PIPE End Point Pipe Status */
+  __IO USB_HOST_PINTFLAG_Type    PINTFLAG;    /**< \brief Offset: 0x007 (R/W  8) HOST_PIPE Pipe Interrupt Flag */
+  __IO USB_HOST_PINTENCLR_Type   PINTENCLR;   /**< \brief Offset: 0x008 (R/W  8) HOST_PIPE Pipe Interrupt Flag Clear */
+  __IO USB_HOST_PINTENSET_Type   PINTENSET;   /**< \brief Offset: 0x009 (R/W  8) HOST_PIPE Pipe Interrupt Flag Set */
+       RoReg8                    Reserved2[0x16];
+} UsbHostPipe;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief USB_DEVICE APB hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* USB is Device */
+  __IO USB_CTRLA_Type            CTRLA;       /**< \brief Offset: 0x000 (R/W  8) Control A */
+       RoReg8                    Reserved1[0x1];
+  __I  USB_SYNCBUSY_Type         SYNCBUSY;    /**< \brief Offset: 0x002 (R/   8) Synchronization Busy */
+       RoReg8                    Reserved2[0x5];
+  __IO USB_DEVICE_CTRLB_Type     CTRLB;       /**< \brief Offset: 0x008 (R/W 16) DEVICE Control B */
+  __IO USB_DEVICE_DADD_Type      DADD;        /**< \brief Offset: 0x00A (R/W  8) DEVICE Device Address */
+       RoReg8                    Reserved3[0x1];
+  __I  USB_DEVICE_STATUS_Type    STATUS;      /**< \brief Offset: 0x00C (R/   8) DEVICE Status */
+  __I  USB_FSMSTATUS_Type        FSMSTATUS;   /**< \brief Offset: 0x00D (R/   8) Finite State Machine Status */
+       RoReg8                    Reserved4[0x2];
+  __I  USB_DEVICE_FNUM_Type      FNUM;        /**< \brief Offset: 0x010 (R/  16) DEVICE Device Frame Number */
+       RoReg8                    Reserved5[0x2];
+  __IO USB_DEVICE_INTENCLR_Type  INTENCLR;    /**< \brief Offset: 0x014 (R/W 16) DEVICE Device Interrupt Enable Clear */
+       RoReg8                    Reserved6[0x2];
+  __IO USB_DEVICE_INTENSET_Type  INTENSET;    /**< \brief Offset: 0x018 (R/W 16) DEVICE Device Interrupt Enable Set */
+       RoReg8                    Reserved7[0x2];
+  __IO USB_DEVICE_INTFLAG_Type   INTFLAG;     /**< \brief Offset: 0x01C (R/W 16) DEVICE Device Interrupt Flag */
+       RoReg8                    Reserved8[0x2];
+  __I  USB_DEVICE_EPINTSMRY_Type EPINTSMRY;   /**< \brief Offset: 0x020 (R/  16) DEVICE End Point Interrupt Summary */
+       RoReg8                    Reserved9[0x2];
+  __IO USB_DESCADD_Type          DESCADD;     /**< \brief Offset: 0x024 (R/W 32) Descriptor Address */
+  __IO USB_PADCAL_Type           PADCAL;      /**< \brief Offset: 0x028 (R/W 16) USB PAD Calibration */
+       RoReg8                    Reserved10[0xD6];
+       UsbDeviceEndpoint         DeviceEndpoint[8]; /**< \brief Offset: 0x100 UsbDeviceEndpoint groups [EPT_NUM] */
+} UsbDevice;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief USB_HOST hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* USB is Host */
+  __IO USB_CTRLA_Type            CTRLA;       /**< \brief Offset: 0x000 (R/W  8) Control A */
+       RoReg8                    Reserved1[0x1];
+  __I  USB_SYNCBUSY_Type         SYNCBUSY;    /**< \brief Offset: 0x002 (R/   8) Synchronization Busy */
+       RoReg8                    Reserved2[0x5];
+  __IO USB_HOST_CTRLB_Type       CTRLB;       /**< \brief Offset: 0x008 (R/W 16) HOST Control B */
+  __IO USB_HOST_HSOFC_Type       HSOFC;       /**< \brief Offset: 0x00A (R/W  8) HOST Host Start Of Frame Control */
+       RoReg8                    Reserved3[0x1];
+  __IO USB_HOST_STATUS_Type      STATUS;      /**< \brief Offset: 0x00C (R/W  8) HOST Status */
+  __I  USB_FSMSTATUS_Type        FSMSTATUS;   /**< \brief Offset: 0x00D (R/   8) Finite State Machine Status */
+       RoReg8                    Reserved4[0x2];
+  __IO USB_HOST_FNUM_Type        FNUM;        /**< \brief Offset: 0x010 (R/W 16) HOST Host Frame Number */
+  __I  USB_HOST_FLENHIGH_Type    FLENHIGH;    /**< \brief Offset: 0x012 (R/   8) HOST Host Frame Length */
+       RoReg8                    Reserved5[0x1];
+  __IO USB_HOST_INTENCLR_Type    INTENCLR;    /**< \brief Offset: 0x014 (R/W 16) HOST Host Interrupt Enable Clear */
+       RoReg8                    Reserved6[0x2];
+  __IO USB_HOST_INTENSET_Type    INTENSET;    /**< \brief Offset: 0x018 (R/W 16) HOST Host Interrupt Enable Set */
+       RoReg8                    Reserved7[0x2];
+  __IO USB_HOST_INTFLAG_Type     INTFLAG;     /**< \brief Offset: 0x01C (R/W 16) HOST Host Interrupt Flag */
+       RoReg8                    Reserved8[0x2];
+  __I  USB_HOST_PINTSMRY_Type    PINTSMRY;    /**< \brief Offset: 0x020 (R/  16) HOST Pipe Interrupt Summary */
+       RoReg8                    Reserved9[0x2];
+  __IO USB_DESCADD_Type          DESCADD;     /**< \brief Offset: 0x024 (R/W 32) Descriptor Address */
+  __IO USB_PADCAL_Type           PADCAL;      /**< \brief Offset: 0x028 (R/W 16) USB PAD Calibration */
+       RoReg8                    Reserved10[0xD6];
+       UsbHostPipe               HostPipe[8]; /**< \brief Offset: 0x100 UsbHostPipe groups [EPT_NUM] */
+} UsbHost;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief USB_DEVICE Descriptor SRAM registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* USB is Device */
+       UsbDeviceDescBank         DeviceDescBank[2]; /**< \brief Offset: 0x000 UsbDeviceDescBank groups */
+} UsbDeviceDescriptor;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/** \brief USB_HOST Descriptor SRAM registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct { /* USB is Host */
+       UsbHostDescBank           HostDescBank[2]; /**< \brief Offset: 0x000 UsbHostDescBank groups */
+} UsbHostDescriptor;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+#define SECTION_USB_DESCRIPTOR
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+       UsbDevice                 DEVICE;      /**< \brief Offset: 0x000 USB is Device */
+       UsbHost                   HOST;        /**< \brief Offset: 0x000 USB is Host */
+} Usb;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_USB_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/wdt.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/wdt.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/component/wdt.h	(revision 136)
@@ -0,0 +1,303 @@
+/**
+ * \file
+ *
+ * \brief Component description for WDT
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_WDT_COMPONENT_
+#define _SAMD21_WDT_COMPONENT_
+
+/* ========================================================================== */
+/**  SOFTWARE API DEFINITION FOR WDT */
+/* ========================================================================== */
+/** \addtogroup SAMD21_WDT Watchdog Timer */
+/*@{*/
+
+#define WDT_U2203
+#define REV_WDT                     0x200
+
+/* -------- WDT_CTRL : (WDT Offset: 0x0) (R/W  8) Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :1;               /*!< bit:      0  Reserved                           */
+    uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
+    uint8_t  WEN:1;            /*!< bit:      2  Watchdog Timer Window Mode Enable  */
+    uint8_t  :4;               /*!< bit:  3.. 6  Reserved                           */
+    uint8_t  ALWAYSON:1;       /*!< bit:      7  Always-On                          */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} WDT_CTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define WDT_CTRL_OFFSET             0x0          /**< \brief (WDT_CTRL offset) Control */
+#define WDT_CTRL_RESETVALUE         0x00         /**< \brief (WDT_CTRL reset_value) Control */
+
+#define WDT_CTRL_ENABLE_Pos         1            /**< \brief (WDT_CTRL) Enable */
+#define WDT_CTRL_ENABLE             (0x1u << WDT_CTRL_ENABLE_Pos)
+#define WDT_CTRL_WEN_Pos            2            /**< \brief (WDT_CTRL) Watchdog Timer Window Mode Enable */
+#define WDT_CTRL_WEN                (0x1u << WDT_CTRL_WEN_Pos)
+#define WDT_CTRL_ALWAYSON_Pos       7            /**< \brief (WDT_CTRL) Always-On */
+#define WDT_CTRL_ALWAYSON           (0x1u << WDT_CTRL_ALWAYSON_Pos)
+#define WDT_CTRL_MASK               0x86u        /**< \brief (WDT_CTRL) MASK Register */
+
+/* -------- WDT_CONFIG : (WDT Offset: 0x1) (R/W  8) Configuration -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  PER:4;            /*!< bit:  0.. 3  Time-Out Period                    */
+    uint8_t  WINDOW:4;         /*!< bit:  4.. 7  Window Mode Time-Out Period        */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} WDT_CONFIG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define WDT_CONFIG_OFFSET           0x1          /**< \brief (WDT_CONFIG offset) Configuration */
+#define WDT_CONFIG_RESETVALUE       0xBB         /**< \brief (WDT_CONFIG reset_value) Configuration */
+
+#define WDT_CONFIG_PER_Pos          0            /**< \brief (WDT_CONFIG) Time-Out Period */
+#define WDT_CONFIG_PER_Msk          (0xFu << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER(value)       ((WDT_CONFIG_PER_Msk & ((value) << WDT_CONFIG_PER_Pos)))
+#define   WDT_CONFIG_PER_0_Val            0x0u   /**< \brief (WDT_CONFIG) 8 clock cycles */
+#define   WDT_CONFIG_PER_1_Val            0x1u   /**< \brief (WDT_CONFIG) 16 clock cycles */
+#define   WDT_CONFIG_PER_2_Val            0x2u   /**< \brief (WDT_CONFIG) 32 clock cycles */
+#define   WDT_CONFIG_PER_3_Val            0x3u   /**< \brief (WDT_CONFIG) 64 clock cycles */
+#define   WDT_CONFIG_PER_4_Val            0x4u   /**< \brief (WDT_CONFIG) 128 clock cycles */
+#define   WDT_CONFIG_PER_5_Val            0x5u   /**< \brief (WDT_CONFIG) 256 clock cycles */
+#define   WDT_CONFIG_PER_6_Val            0x6u   /**< \brief (WDT_CONFIG) 512 clock cycles */
+#define   WDT_CONFIG_PER_7_Val            0x7u   /**< \brief (WDT_CONFIG) 1024 clock cycles */
+#define   WDT_CONFIG_PER_8_Val            0x8u   /**< \brief (WDT_CONFIG) 2048 clock cycles */
+#define   WDT_CONFIG_PER_9_Val            0x9u   /**< \brief (WDT_CONFIG) 4096 clock cycles */
+#define   WDT_CONFIG_PER_10_Val           0xAu   /**< \brief (WDT_CONFIG) 8192 clock cycles */
+#define   WDT_CONFIG_PER_11_Val           0xBu   /**< \brief (WDT_CONFIG) 16384 clock cycles */
+#define WDT_CONFIG_PER_0            (WDT_CONFIG_PER_0_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_1            (WDT_CONFIG_PER_1_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_2            (WDT_CONFIG_PER_2_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_3            (WDT_CONFIG_PER_3_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_4            (WDT_CONFIG_PER_4_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_5            (WDT_CONFIG_PER_5_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_6            (WDT_CONFIG_PER_6_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_7            (WDT_CONFIG_PER_7_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_8            (WDT_CONFIG_PER_8_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_9            (WDT_CONFIG_PER_9_Val          << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_10           (WDT_CONFIG_PER_10_Val         << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_PER_11           (WDT_CONFIG_PER_11_Val         << WDT_CONFIG_PER_Pos)
+#define WDT_CONFIG_WINDOW_Pos       4            /**< \brief (WDT_CONFIG) Window Mode Time-Out Period */
+#define WDT_CONFIG_WINDOW_Msk       (0xFu << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW(value)    ((WDT_CONFIG_WINDOW_Msk & ((value) << WDT_CONFIG_WINDOW_Pos)))
+#define   WDT_CONFIG_WINDOW_0_Val         0x0u   /**< \brief (WDT_CONFIG) 8 clock cycles */
+#define   WDT_CONFIG_WINDOW_1_Val         0x1u   /**< \brief (WDT_CONFIG) 16 clock cycles */
+#define   WDT_CONFIG_WINDOW_2_Val         0x2u   /**< \brief (WDT_CONFIG) 32 clock cycles */
+#define   WDT_CONFIG_WINDOW_3_Val         0x3u   /**< \brief (WDT_CONFIG) 64 clock cycles */
+#define   WDT_CONFIG_WINDOW_4_Val         0x4u   /**< \brief (WDT_CONFIG) 128 clock cycles */
+#define   WDT_CONFIG_WINDOW_5_Val         0x5u   /**< \brief (WDT_CONFIG) 256 clock cycles */
+#define   WDT_CONFIG_WINDOW_6_Val         0x6u   /**< \brief (WDT_CONFIG) 512 clock cycles */
+#define   WDT_CONFIG_WINDOW_7_Val         0x7u   /**< \brief (WDT_CONFIG) 1024 clock cycles */
+#define   WDT_CONFIG_WINDOW_8_Val         0x8u   /**< \brief (WDT_CONFIG) 2048 clock cycles */
+#define   WDT_CONFIG_WINDOW_9_Val         0x9u   /**< \brief (WDT_CONFIG) 4096 clock cycles */
+#define   WDT_CONFIG_WINDOW_10_Val        0xAu   /**< \brief (WDT_CONFIG) 8192 clock cycles */
+#define   WDT_CONFIG_WINDOW_11_Val        0xBu   /**< \brief (WDT_CONFIG) 16384 clock cycles */
+#define WDT_CONFIG_WINDOW_0         (WDT_CONFIG_WINDOW_0_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_1         (WDT_CONFIG_WINDOW_1_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_2         (WDT_CONFIG_WINDOW_2_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_3         (WDT_CONFIG_WINDOW_3_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_4         (WDT_CONFIG_WINDOW_4_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_5         (WDT_CONFIG_WINDOW_5_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_6         (WDT_CONFIG_WINDOW_6_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_7         (WDT_CONFIG_WINDOW_7_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_8         (WDT_CONFIG_WINDOW_8_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_9         (WDT_CONFIG_WINDOW_9_Val       << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_10        (WDT_CONFIG_WINDOW_10_Val      << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_WINDOW_11        (WDT_CONFIG_WINDOW_11_Val      << WDT_CONFIG_WINDOW_Pos)
+#define WDT_CONFIG_MASK             0xFFu        /**< \brief (WDT_CONFIG) MASK Register */
+
+/* -------- WDT_EWCTRL : (WDT Offset: 0x2) (R/W  8) Early Warning Interrupt Control -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  EWOFFSET:4;       /*!< bit:  0.. 3  Early Warning Interrupt Time Offset */
+    uint8_t  :4;               /*!< bit:  4.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} WDT_EWCTRL_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define WDT_EWCTRL_OFFSET           0x2          /**< \brief (WDT_EWCTRL offset) Early Warning Interrupt Control */
+#define WDT_EWCTRL_RESETVALUE       0x0B         /**< \brief (WDT_EWCTRL reset_value) Early Warning Interrupt Control */
+
+#define WDT_EWCTRL_EWOFFSET_Pos     0            /**< \brief (WDT_EWCTRL) Early Warning Interrupt Time Offset */
+#define WDT_EWCTRL_EWOFFSET_Msk     (0xFu << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET(value)  ((WDT_EWCTRL_EWOFFSET_Msk & ((value) << WDT_EWCTRL_EWOFFSET_Pos)))
+#define   WDT_EWCTRL_EWOFFSET_0_Val       0x0u   /**< \brief (WDT_EWCTRL) 8 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_1_Val       0x1u   /**< \brief (WDT_EWCTRL) 16 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_2_Val       0x2u   /**< \brief (WDT_EWCTRL) 32 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_3_Val       0x3u   /**< \brief (WDT_EWCTRL) 64 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_4_Val       0x4u   /**< \brief (WDT_EWCTRL) 128 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_5_Val       0x5u   /**< \brief (WDT_EWCTRL) 256 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_6_Val       0x6u   /**< \brief (WDT_EWCTRL) 512 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_7_Val       0x7u   /**< \brief (WDT_EWCTRL) 1024 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_8_Val       0x8u   /**< \brief (WDT_EWCTRL) 2048 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_9_Val       0x9u   /**< \brief (WDT_EWCTRL) 4096 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_10_Val      0xAu   /**< \brief (WDT_EWCTRL) 8192 clock cycles */
+#define   WDT_EWCTRL_EWOFFSET_11_Val      0xBu   /**< \brief (WDT_EWCTRL) 16384 clock cycles */
+#define WDT_EWCTRL_EWOFFSET_0       (WDT_EWCTRL_EWOFFSET_0_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_1       (WDT_EWCTRL_EWOFFSET_1_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_2       (WDT_EWCTRL_EWOFFSET_2_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_3       (WDT_EWCTRL_EWOFFSET_3_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_4       (WDT_EWCTRL_EWOFFSET_4_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_5       (WDT_EWCTRL_EWOFFSET_5_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_6       (WDT_EWCTRL_EWOFFSET_6_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_7       (WDT_EWCTRL_EWOFFSET_7_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_8       (WDT_EWCTRL_EWOFFSET_8_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_9       (WDT_EWCTRL_EWOFFSET_9_Val     << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_10      (WDT_EWCTRL_EWOFFSET_10_Val    << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_EWOFFSET_11      (WDT_EWCTRL_EWOFFSET_11_Val    << WDT_EWCTRL_EWOFFSET_Pos)
+#define WDT_EWCTRL_MASK             0x0Fu        /**< \brief (WDT_EWCTRL) MASK Register */
+
+/* -------- WDT_INTENCLR : (WDT Offset: 0x4) (R/W  8) Interrupt Enable Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  EW:1;             /*!< bit:      0  Early Warning Interrupt Enable     */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} WDT_INTENCLR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define WDT_INTENCLR_OFFSET         0x4          /**< \brief (WDT_INTENCLR offset) Interrupt Enable Clear */
+#define WDT_INTENCLR_RESETVALUE     0x00         /**< \brief (WDT_INTENCLR reset_value) Interrupt Enable Clear */
+
+#define WDT_INTENCLR_EW_Pos         0            /**< \brief (WDT_INTENCLR) Early Warning Interrupt Enable */
+#define WDT_INTENCLR_EW             (0x1u << WDT_INTENCLR_EW_Pos)
+#define WDT_INTENCLR_MASK           0x01u        /**< \brief (WDT_INTENCLR) MASK Register */
+
+/* -------- WDT_INTENSET : (WDT Offset: 0x5) (R/W  8) Interrupt Enable Set -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  EW:1;             /*!< bit:      0  Early Warning Interrupt Enable     */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} WDT_INTENSET_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define WDT_INTENSET_OFFSET         0x5          /**< \brief (WDT_INTENSET offset) Interrupt Enable Set */
+#define WDT_INTENSET_RESETVALUE     0x00         /**< \brief (WDT_INTENSET reset_value) Interrupt Enable Set */
+
+#define WDT_INTENSET_EW_Pos         0            /**< \brief (WDT_INTENSET) Early Warning Interrupt Enable */
+#define WDT_INTENSET_EW             (0x1u << WDT_INTENSET_EW_Pos)
+#define WDT_INTENSET_MASK           0x01u        /**< \brief (WDT_INTENSET) MASK Register */
+
+/* -------- WDT_INTFLAG : (WDT Offset: 0x6) (R/W  8) Interrupt Flag Status and Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  EW:1;             /*!< bit:      0  Early Warning                      */
+    uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} WDT_INTFLAG_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define WDT_INTFLAG_OFFSET          0x6          /**< \brief (WDT_INTFLAG offset) Interrupt Flag Status and Clear */
+#define WDT_INTFLAG_RESETVALUE      0x00         /**< \brief (WDT_INTFLAG reset_value) Interrupt Flag Status and Clear */
+
+#define WDT_INTFLAG_EW_Pos          0            /**< \brief (WDT_INTFLAG) Early Warning */
+#define WDT_INTFLAG_EW              (0x1u << WDT_INTFLAG_EW_Pos)
+#define WDT_INTFLAG_MASK            0x01u        /**< \brief (WDT_INTFLAG) MASK Register */
+
+/* -------- WDT_STATUS : (WDT Offset: 0x7) (R/   8) Status -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  :7;               /*!< bit:  0.. 6  Reserved                           */
+    uint8_t  SYNCBUSY:1;       /*!< bit:      7  Synchronization Busy               */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} WDT_STATUS_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define WDT_STATUS_OFFSET           0x7          /**< \brief (WDT_STATUS offset) Status */
+#define WDT_STATUS_RESETVALUE       0x00         /**< \brief (WDT_STATUS reset_value) Status */
+
+#define WDT_STATUS_SYNCBUSY_Pos     7            /**< \brief (WDT_STATUS) Synchronization Busy */
+#define WDT_STATUS_SYNCBUSY         (0x1u << WDT_STATUS_SYNCBUSY_Pos)
+#define WDT_STATUS_MASK             0x80u        /**< \brief (WDT_STATUS) MASK Register */
+
+/* -------- WDT_CLEAR : (WDT Offset: 0x8) ( /W  8) Clear -------- */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef union {
+  struct {
+    uint8_t  CLEAR:8;          /*!< bit:  0.. 7  Watchdog Clear                     */
+  } bit;                       /*!< Structure used for bit  access                  */
+  uint8_t reg;                 /*!< Type      used for register access              */
+} WDT_CLEAR_Type;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+#define WDT_CLEAR_OFFSET            0x8          /**< \brief (WDT_CLEAR offset) Clear */
+#define WDT_CLEAR_RESETVALUE        0x00         /**< \brief (WDT_CLEAR reset_value) Clear */
+
+#define WDT_CLEAR_CLEAR_Pos         0            /**< \brief (WDT_CLEAR) Watchdog Clear */
+#define WDT_CLEAR_CLEAR_Msk         (0xFFu << WDT_CLEAR_CLEAR_Pos)
+#define WDT_CLEAR_CLEAR(value)      ((WDT_CLEAR_CLEAR_Msk & ((value) << WDT_CLEAR_CLEAR_Pos)))
+#define   WDT_CLEAR_CLEAR_KEY_Val         0xA5u   /**< \brief (WDT_CLEAR) Clear Key */
+#define WDT_CLEAR_CLEAR_KEY         (WDT_CLEAR_CLEAR_KEY_Val       << WDT_CLEAR_CLEAR_Pos)
+#define WDT_CLEAR_MASK              0xFFu        /**< \brief (WDT_CLEAR) MASK Register */
+
+/** \brief WDT hardware registers */
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+typedef struct {
+  __IO WDT_CTRL_Type             CTRL;        /**< \brief Offset: 0x0 (R/W  8) Control */
+  __IO WDT_CONFIG_Type           CONFIG;      /**< \brief Offset: 0x1 (R/W  8) Configuration */
+  __IO WDT_EWCTRL_Type           EWCTRL;      /**< \brief Offset: 0x2 (R/W  8) Early Warning Interrupt Control */
+       RoReg8                    Reserved1[0x1];
+  __IO WDT_INTENCLR_Type         INTENCLR;    /**< \brief Offset: 0x4 (R/W  8) Interrupt Enable Clear */
+  __IO WDT_INTENSET_Type         INTENSET;    /**< \brief Offset: 0x5 (R/W  8) Interrupt Enable Set */
+  __IO WDT_INTFLAG_Type          INTFLAG;     /**< \brief Offset: 0x6 (R/W  8) Interrupt Flag Status and Clear */
+  __I  WDT_STATUS_Type           STATUS;      /**< \brief Offset: 0x7 (R/   8) Status */
+  __O  WDT_CLEAR_Type            CLEAR;       /**< \brief Offset: 0x8 ( /W  8) Clear */
+} Wdt;
+#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/*@}*/
+
+#endif /* _SAMD21_WDT_COMPONENT_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/ac.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/ac.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/ac.h	(revision 136)
@@ -0,0 +1,87 @@
+/**
+ * \file
+ *
+ * \brief Instance description for AC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_AC_INSTANCE_
+#define _SAMD21_AC_INSTANCE_
+
+/* ========== Register definition for AC peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_AC_CTRLA               (0x42004400U) /**< \brief (AC) Control A */
+#define REG_AC_CTRLB               (0x42004401U) /**< \brief (AC) Control B */
+#define REG_AC_EVCTRL              (0x42004402U) /**< \brief (AC) Event Control */
+#define REG_AC_INTENCLR            (0x42004404U) /**< \brief (AC) Interrupt Enable Clear */
+#define REG_AC_INTENSET            (0x42004405U) /**< \brief (AC) Interrupt Enable Set */
+#define REG_AC_INTFLAG             (0x42004406U) /**< \brief (AC) Interrupt Flag Status and Clear */
+#define REG_AC_STATUSA             (0x42004408U) /**< \brief (AC) Status A */
+#define REG_AC_STATUSB             (0x42004409U) /**< \brief (AC) Status B */
+#define REG_AC_STATUSC             (0x4200440AU) /**< \brief (AC) Status C */
+#define REG_AC_WINCTRL             (0x4200440CU) /**< \brief (AC) Window Control */
+#define REG_AC_COMPCTRL0           (0x42004410U) /**< \brief (AC) Comparator Control 0 */
+#define REG_AC_COMPCTRL1           (0x42004414U) /**< \brief (AC) Comparator Control 1 */
+#define REG_AC_SCALER0             (0x42004420U) /**< \brief (AC) Scaler 0 */
+#define REG_AC_SCALER1             (0x42004421U) /**< \brief (AC) Scaler 1 */
+#else
+#define REG_AC_CTRLA               (*(RwReg8 *)0x42004400U) /**< \brief (AC) Control A */
+#define REG_AC_CTRLB               (*(WoReg8 *)0x42004401U) /**< \brief (AC) Control B */
+#define REG_AC_EVCTRL              (*(RwReg16*)0x42004402U) /**< \brief (AC) Event Control */
+#define REG_AC_INTENCLR            (*(RwReg8 *)0x42004404U) /**< \brief (AC) Interrupt Enable Clear */
+#define REG_AC_INTENSET            (*(RwReg8 *)0x42004405U) /**< \brief (AC) Interrupt Enable Set */
+#define REG_AC_INTFLAG             (*(RwReg8 *)0x42004406U) /**< \brief (AC) Interrupt Flag Status and Clear */
+#define REG_AC_STATUSA             (*(RoReg8 *)0x42004408U) /**< \brief (AC) Status A */
+#define REG_AC_STATUSB             (*(RoReg8 *)0x42004409U) /**< \brief (AC) Status B */
+#define REG_AC_STATUSC             (*(RoReg8 *)0x4200440AU) /**< \brief (AC) Status C */
+#define REG_AC_WINCTRL             (*(RwReg8 *)0x4200440CU) /**< \brief (AC) Window Control */
+#define REG_AC_COMPCTRL0           (*(RwReg  *)0x42004410U) /**< \brief (AC) Comparator Control 0 */
+#define REG_AC_COMPCTRL1           (*(RwReg  *)0x42004414U) /**< \brief (AC) Comparator Control 1 */
+#define REG_AC_SCALER0             (*(RwReg8 *)0x42004420U) /**< \brief (AC) Scaler 0 */
+#define REG_AC_SCALER1             (*(RwReg8 *)0x42004421U) /**< \brief (AC) Scaler 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for AC peripheral ========== */
+#define AC_CMP_NUM                  2
+#define AC_GCLK_ID_ANA              32
+#define AC_GCLK_ID_DIG              31
+#define AC_NUM_CMP                  AC_CMP_NUM
+#define AC_PAIRS                    1
+
+#endif /* _SAMD21_AC_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/adc.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/adc.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/adc.h	(revision 136)
@@ -0,0 +1,99 @@
+/**
+ * \file
+ *
+ * \brief Instance description for ADC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_ADC_INSTANCE_
+#define _SAMD21_ADC_INSTANCE_
+
+/* ========== Register definition for ADC peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_ADC_CTRLA              (0x42004000U) /**< \brief (ADC) Control A */
+#define REG_ADC_REFCTRL            (0x42004001U) /**< \brief (ADC) Reference Control */
+#define REG_ADC_AVGCTRL            (0x42004002U) /**< \brief (ADC) Average Control */
+#define REG_ADC_SAMPCTRL           (0x42004003U) /**< \brief (ADC) Sampling Time Control */
+#define REG_ADC_CTRLB              (0x42004004U) /**< \brief (ADC) Control B */
+#define REG_ADC_WINCTRL            (0x42004008U) /**< \brief (ADC) Window Monitor Control */
+#define REG_ADC_SWTRIG             (0x4200400CU) /**< \brief (ADC) Software Trigger */
+#define REG_ADC_INPUTCTRL          (0x42004010U) /**< \brief (ADC) Input Control */
+#define REG_ADC_EVCTRL             (0x42004014U) /**< \brief (ADC) Event Control */
+#define REG_ADC_INTENCLR           (0x42004016U) /**< \brief (ADC) Interrupt Enable Clear */
+#define REG_ADC_INTENSET           (0x42004017U) /**< \brief (ADC) Interrupt Enable Set */
+#define REG_ADC_INTFLAG            (0x42004018U) /**< \brief (ADC) Interrupt Flag Status and Clear */
+#define REG_ADC_STATUS             (0x42004019U) /**< \brief (ADC) Status */
+#define REG_ADC_RESULT             (0x4200401AU) /**< \brief (ADC) Result */
+#define REG_ADC_WINLT              (0x4200401CU) /**< \brief (ADC) Window Monitor Lower Threshold */
+#define REG_ADC_WINUT              (0x42004020U) /**< \brief (ADC) Window Monitor Upper Threshold */
+#define REG_ADC_GAINCORR           (0x42004024U) /**< \brief (ADC) Gain Correction */
+#define REG_ADC_OFFSETCORR         (0x42004026U) /**< \brief (ADC) Offset Correction */
+#define REG_ADC_CALIB              (0x42004028U) /**< \brief (ADC) Calibration */
+#define REG_ADC_DBGCTRL            (0x4200402AU) /**< \brief (ADC) Debug Control */
+#else
+#define REG_ADC_CTRLA              (*(RwReg8 *)0x42004000U) /**< \brief (ADC) Control A */
+#define REG_ADC_REFCTRL            (*(RwReg8 *)0x42004001U) /**< \brief (ADC) Reference Control */
+#define REG_ADC_AVGCTRL            (*(RwReg8 *)0x42004002U) /**< \brief (ADC) Average Control */
+#define REG_ADC_SAMPCTRL           (*(RwReg8 *)0x42004003U) /**< \brief (ADC) Sampling Time Control */
+#define REG_ADC_CTRLB              (*(RwReg16*)0x42004004U) /**< \brief (ADC) Control B */
+#define REG_ADC_WINCTRL            (*(RwReg8 *)0x42004008U) /**< \brief (ADC) Window Monitor Control */
+#define REG_ADC_SWTRIG             (*(RwReg8 *)0x4200400CU) /**< \brief (ADC) Software Trigger */
+#define REG_ADC_INPUTCTRL          (*(RwReg  *)0x42004010U) /**< \brief (ADC) Input Control */
+#define REG_ADC_EVCTRL             (*(RwReg8 *)0x42004014U) /**< \brief (ADC) Event Control */
+#define REG_ADC_INTENCLR           (*(RwReg8 *)0x42004016U) /**< \brief (ADC) Interrupt Enable Clear */
+#define REG_ADC_INTENSET           (*(RwReg8 *)0x42004017U) /**< \brief (ADC) Interrupt Enable Set */
+#define REG_ADC_INTFLAG            (*(RwReg8 *)0x42004018U) /**< \brief (ADC) Interrupt Flag Status and Clear */
+#define REG_ADC_STATUS             (*(RoReg8 *)0x42004019U) /**< \brief (ADC) Status */
+#define REG_ADC_RESULT             (*(RoReg16*)0x4200401AU) /**< \brief (ADC) Result */
+#define REG_ADC_WINLT              (*(RwReg16*)0x4200401CU) /**< \brief (ADC) Window Monitor Lower Threshold */
+#define REG_ADC_WINUT              (*(RwReg16*)0x42004020U) /**< \brief (ADC) Window Monitor Upper Threshold */
+#define REG_ADC_GAINCORR           (*(RwReg16*)0x42004024U) /**< \brief (ADC) Gain Correction */
+#define REG_ADC_OFFSETCORR         (*(RwReg16*)0x42004026U) /**< \brief (ADC) Offset Correction */
+#define REG_ADC_CALIB              (*(RwReg16*)0x42004028U) /**< \brief (ADC) Calibration */
+#define REG_ADC_DBGCTRL            (*(RwReg8 *)0x4200402AU) /**< \brief (ADC) Debug Control */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for ADC peripheral ========== */
+#define ADC_DMAC_ID_RESRDY          39
+#define ADC_EXTCHANNEL_MSB          19
+#define ADC_GCLK_ID                 30
+#define ADC_RESULT_BITS             16
+#define ADC_RESULT_MSB              (ADC_RESULT_BITS-1)
+
+#endif /* _SAMD21_ADC_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/dac.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/dac.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/dac.h	(revision 136)
@@ -0,0 +1,74 @@
+/**
+ * \file
+ *
+ * \brief Instance description for DAC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_DAC_INSTANCE_
+#define _SAMD21_DAC_INSTANCE_
+
+/* ========== Register definition for DAC peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_DAC_CTRLA              (0x42004800U) /**< \brief (DAC) Control A */
+#define REG_DAC_CTRLB              (0x42004801U) /**< \brief (DAC) Control B */
+#define REG_DAC_EVCTRL             (0x42004802U) /**< \brief (DAC) Event Control */
+#define REG_DAC_INTENCLR           (0x42004804U) /**< \brief (DAC) Interrupt Enable Clear */
+#define REG_DAC_INTENSET           (0x42004805U) /**< \brief (DAC) Interrupt Enable Set */
+#define REG_DAC_INTFLAG            (0x42004806U) /**< \brief (DAC) Interrupt Flag Status and Clear */
+#define REG_DAC_STATUS             (0x42004807U) /**< \brief (DAC) Status */
+#define REG_DAC_DATA               (0x42004808U) /**< \brief (DAC) Data */
+#define REG_DAC_DATABUF            (0x4200480CU) /**< \brief (DAC) Data Buffer */
+#else
+#define REG_DAC_CTRLA              (*(RwReg8 *)0x42004800U) /**< \brief (DAC) Control A */
+#define REG_DAC_CTRLB              (*(RwReg8 *)0x42004801U) /**< \brief (DAC) Control B */
+#define REG_DAC_EVCTRL             (*(RwReg8 *)0x42004802U) /**< \brief (DAC) Event Control */
+#define REG_DAC_INTENCLR           (*(RwReg8 *)0x42004804U) /**< \brief (DAC) Interrupt Enable Clear */
+#define REG_DAC_INTENSET           (*(RwReg8 *)0x42004805U) /**< \brief (DAC) Interrupt Enable Set */
+#define REG_DAC_INTFLAG            (*(RwReg8 *)0x42004806U) /**< \brief (DAC) Interrupt Flag Status and Clear */
+#define REG_DAC_STATUS             (*(RoReg8 *)0x42004807U) /**< \brief (DAC) Status */
+#define REG_DAC_DATA               (*(RwReg16*)0x42004808U) /**< \brief (DAC) Data */
+#define REG_DAC_DATABUF            (*(RwReg16*)0x4200480CU) /**< \brief (DAC) Data Buffer */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for DAC peripheral ========== */
+#define DAC_DMAC_ID_EMPTY           40
+#define DAC_GCLK_ID                 33
+
+#endif /* _SAMD21_DAC_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/dmac.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/dmac.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/dmac.h	(revision 136)
@@ -0,0 +1,107 @@
+/**
+ * \file
+ *
+ * \brief Instance description for DMAC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_DMAC_INSTANCE_
+#define _SAMD21_DMAC_INSTANCE_
+
+/* ========== Register definition for DMAC peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_DMAC_CTRL              (0x41004800U) /**< \brief (DMAC) Control */
+#define REG_DMAC_CRCCTRL           (0x41004802U) /**< \brief (DMAC) CRC Control */
+#define REG_DMAC_CRCDATAIN         (0x41004804U) /**< \brief (DMAC) CRC Data Input */
+#define REG_DMAC_CRCCHKSUM         (0x41004808U) /**< \brief (DMAC) CRC Checksum */
+#define REG_DMAC_CRCSTATUS         (0x4100480CU) /**< \brief (DMAC) CRC Status */
+#define REG_DMAC_DBGCTRL           (0x4100480DU) /**< \brief (DMAC) Debug Control */
+#define REG_DMAC_SWTRIGCTRL        (0x41004810U) /**< \brief (DMAC) Software Trigger Control */
+#define REG_DMAC_PRICTRL0          (0x41004814U) /**< \brief (DMAC) Priority Control 0 */
+#define REG_DMAC_INTPEND           (0x41004820U) /**< \brief (DMAC) Interrupt Pending */
+#define REG_DMAC_INTSTATUS         (0x41004824U) /**< \brief (DMAC) Interrupt Status */
+#define REG_DMAC_BUSYCH            (0x41004828U) /**< \brief (DMAC) Busy Channels */
+#define REG_DMAC_PENDCH            (0x4100482CU) /**< \brief (DMAC) Pending Channels */
+#define REG_DMAC_ACTIVE            (0x41004830U) /**< \brief (DMAC) Active Channel and Levels */
+#define REG_DMAC_BASEADDR          (0x41004834U) /**< \brief (DMAC) Descriptor Memory Section Base Address */
+#define REG_DMAC_WRBADDR           (0x41004838U) /**< \brief (DMAC) Write-Back Memory Section Base Address */
+#define REG_DMAC_CHID              (0x4100483FU) /**< \brief (DMAC) Channel ID */
+#define REG_DMAC_CHCTRLA           (0x41004840U) /**< \brief (DMAC) Channel Control A */
+#define REG_DMAC_CHCTRLB           (0x41004844U) /**< \brief (DMAC) Channel Control B */
+#define REG_DMAC_CHINTENCLR        (0x4100484CU) /**< \brief (DMAC) Channel Interrupt Enable Clear */
+#define REG_DMAC_CHINTENSET        (0x4100484DU) /**< \brief (DMAC) Channel Interrupt Enable Set */
+#define REG_DMAC_CHINTFLAG         (0x4100484EU) /**< \brief (DMAC) Channel Interrupt Flag Status and Clear */
+#define REG_DMAC_CHSTATUS          (0x4100484FU) /**< \brief (DMAC) Channel Status */
+#else
+#define REG_DMAC_CTRL              (*(RwReg16*)0x41004800U) /**< \brief (DMAC) Control */
+#define REG_DMAC_CRCCTRL           (*(RwReg16*)0x41004802U) /**< \brief (DMAC) CRC Control */
+#define REG_DMAC_CRCDATAIN         (*(RwReg  *)0x41004804U) /**< \brief (DMAC) CRC Data Input */
+#define REG_DMAC_CRCCHKSUM         (*(RwReg  *)0x41004808U) /**< \brief (DMAC) CRC Checksum */
+#define REG_DMAC_CRCSTATUS         (*(RwReg8 *)0x4100480CU) /**< \brief (DMAC) CRC Status */
+#define REG_DMAC_DBGCTRL           (*(RwReg8 *)0x4100480DU) /**< \brief (DMAC) Debug Control */
+#define REG_DMAC_SWTRIGCTRL        (*(RwReg  *)0x41004810U) /**< \brief (DMAC) Software Trigger Control */
+#define REG_DMAC_PRICTRL0          (*(RwReg  *)0x41004814U) /**< \brief (DMAC) Priority Control 0 */
+#define REG_DMAC_INTPEND           (*(RwReg16*)0x41004820U) /**< \brief (DMAC) Interrupt Pending */
+#define REG_DMAC_INTSTATUS         (*(RoReg  *)0x41004824U) /**< \brief (DMAC) Interrupt Status */
+#define REG_DMAC_BUSYCH            (*(RoReg  *)0x41004828U) /**< \brief (DMAC) Busy Channels */
+#define REG_DMAC_PENDCH            (*(RoReg  *)0x4100482CU) /**< \brief (DMAC) Pending Channels */
+#define REG_DMAC_ACTIVE            (*(RoReg  *)0x41004830U) /**< \brief (DMAC) Active Channel and Levels */
+#define REG_DMAC_BASEADDR          (*(RwReg  *)0x41004834U) /**< \brief (DMAC) Descriptor Memory Section Base Address */
+#define REG_DMAC_WRBADDR           (*(RwReg  *)0x41004838U) /**< \brief (DMAC) Write-Back Memory Section Base Address */
+#define REG_DMAC_CHID              (*(RwReg8 *)0x4100483FU) /**< \brief (DMAC) Channel ID */
+#define REG_DMAC_CHCTRLA           (*(RwReg8 *)0x41004840U) /**< \brief (DMAC) Channel Control A */
+#define REG_DMAC_CHCTRLB           (*(RwReg  *)0x41004844U) /**< \brief (DMAC) Channel Control B */
+#define REG_DMAC_CHINTENCLR        (*(RwReg8 *)0x4100484CU) /**< \brief (DMAC) Channel Interrupt Enable Clear */
+#define REG_DMAC_CHINTENSET        (*(RwReg8 *)0x4100484DU) /**< \brief (DMAC) Channel Interrupt Enable Set */
+#define REG_DMAC_CHINTFLAG         (*(RwReg8 *)0x4100484EU) /**< \brief (DMAC) Channel Interrupt Flag Status and Clear */
+#define REG_DMAC_CHSTATUS          (*(RoReg8 *)0x4100484FU) /**< \brief (DMAC) Channel Status */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for DMAC peripheral ========== */
+#define DMAC_CH_BITS                len(bin(DMAC_CH_NUM - 1))-2
+#define DMAC_CH_NUM                 12
+#define DMAC_CLK_AHB_ID             5
+#define DMAC_EVIN_NUM               4
+#define DMAC_EVOUT_NUM              4
+#define DMAC_LVL_BITS               len(bin(DMAC_LVL_NUM - 1))-2
+#define DMAC_LVL_NUM                4
+#define DMAC_TRIG_BITS              len(bin(DMAC_TRIG_NUM - 1))-2
+#define DMAC_TRIG_NUM               45
+
+#endif /* _SAMD21_DMAC_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/dsu.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/dsu.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/dsu.h	(revision 136)
@@ -0,0 +1,99 @@
+/**
+ * \file
+ *
+ * \brief Instance description for DSU
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_DSU_INSTANCE_
+#define _SAMD21_DSU_INSTANCE_
+
+/* ========== Register definition for DSU peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_DSU_CTRL               (0x41002000U) /**< \brief (DSU) Control */
+#define REG_DSU_STATUSA            (0x41002001U) /**< \brief (DSU) Status A */
+#define REG_DSU_STATUSB            (0x41002002U) /**< \brief (DSU) Status B */
+#define REG_DSU_ADDR               (0x41002004U) /**< \brief (DSU) Address */
+#define REG_DSU_LENGTH             (0x41002008U) /**< \brief (DSU) Length */
+#define REG_DSU_DATA               (0x4100200CU) /**< \brief (DSU) Data */
+#define REG_DSU_DCC0               (0x41002010U) /**< \brief (DSU) Debug Communication Channel 0 */
+#define REG_DSU_DCC1               (0x41002014U) /**< \brief (DSU) Debug Communication Channel 1 */
+#define REG_DSU_DID                (0x41002018U) /**< \brief (DSU) Device Identification */
+#define REG_DSU_ENTRY0             (0x41003000U) /**< \brief (DSU) Coresight ROM Table Entry 0 */
+#define REG_DSU_ENTRY1             (0x41003004U) /**< \brief (DSU) Coresight ROM Table Entry 1 */
+#define REG_DSU_END                (0x41003008U) /**< \brief (DSU) Coresight ROM Table End */
+#define REG_DSU_MEMTYPE            (0x41003FCCU) /**< \brief (DSU) Coresight ROM Table Memory Type */
+#define REG_DSU_PID4               (0x41003FD0U) /**< \brief (DSU) Peripheral Identification 4 */
+#define REG_DSU_PID0               (0x41003FE0U) /**< \brief (DSU) Peripheral Identification 0 */
+#define REG_DSU_PID1               (0x41003FE4U) /**< \brief (DSU) Peripheral Identification 1 */
+#define REG_DSU_PID2               (0x41003FE8U) /**< \brief (DSU) Peripheral Identification 2 */
+#define REG_DSU_PID3               (0x41003FECU) /**< \brief (DSU) Peripheral Identification 3 */
+#define REG_DSU_CID0               (0x41003FF0U) /**< \brief (DSU) Component Identification 0 */
+#define REG_DSU_CID1               (0x41003FF4U) /**< \brief (DSU) Component Identification 1 */
+#define REG_DSU_CID2               (0x41003FF8U) /**< \brief (DSU) Component Identification 2 */
+#define REG_DSU_CID3               (0x41003FFCU) /**< \brief (DSU) Component Identification 3 */
+#else
+#define REG_DSU_CTRL               (*(WoReg8 *)0x41002000U) /**< \brief (DSU) Control */
+#define REG_DSU_STATUSA            (*(RwReg8 *)0x41002001U) /**< \brief (DSU) Status A */
+#define REG_DSU_STATUSB            (*(RoReg8 *)0x41002002U) /**< \brief (DSU) Status B */
+#define REG_DSU_ADDR               (*(RwReg  *)0x41002004U) /**< \brief (DSU) Address */
+#define REG_DSU_LENGTH             (*(RwReg  *)0x41002008U) /**< \brief (DSU) Length */
+#define REG_DSU_DATA               (*(RwReg  *)0x4100200CU) /**< \brief (DSU) Data */
+#define REG_DSU_DCC0               (*(RwReg  *)0x41002010U) /**< \brief (DSU) Debug Communication Channel 0 */
+#define REG_DSU_DCC1               (*(RwReg  *)0x41002014U) /**< \brief (DSU) Debug Communication Channel 1 */
+#define REG_DSU_DID                (*(RoReg  *)0x41002018U) /**< \brief (DSU) Device Identification */
+#define REG_DSU_ENTRY0             (*(RoReg  *)0x41003000U) /**< \brief (DSU) Coresight ROM Table Entry 0 */
+#define REG_DSU_ENTRY1             (*(RoReg  *)0x41003004U) /**< \brief (DSU) Coresight ROM Table Entry 1 */
+#define REG_DSU_END                (*(RoReg  *)0x41003008U) /**< \brief (DSU) Coresight ROM Table End */
+#define REG_DSU_MEMTYPE            (*(RoReg  *)0x41003FCCU) /**< \brief (DSU) Coresight ROM Table Memory Type */
+#define REG_DSU_PID4               (*(RoReg  *)0x41003FD0U) /**< \brief (DSU) Peripheral Identification 4 */
+#define REG_DSU_PID0               (*(RoReg  *)0x41003FE0U) /**< \brief (DSU) Peripheral Identification 0 */
+#define REG_DSU_PID1               (*(RoReg  *)0x41003FE4U) /**< \brief (DSU) Peripheral Identification 1 */
+#define REG_DSU_PID2               (*(RoReg  *)0x41003FE8U) /**< \brief (DSU) Peripheral Identification 2 */
+#define REG_DSU_PID3               (*(RoReg  *)0x41003FECU) /**< \brief (DSU) Peripheral Identification 3 */
+#define REG_DSU_CID0               (*(RoReg  *)0x41003FF0U) /**< \brief (DSU) Component Identification 0 */
+#define REG_DSU_CID1               (*(RoReg  *)0x41003FF4U) /**< \brief (DSU) Component Identification 1 */
+#define REG_DSU_CID2               (*(RoReg  *)0x41003FF8U) /**< \brief (DSU) Component Identification 2 */
+#define REG_DSU_CID3               (*(RoReg  *)0x41003FFCU) /**< \brief (DSU) Component Identification 3 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for DSU peripheral ========== */
+#define DSU_CLK_HSB_ID              3
+
+#endif /* _SAMD21_DSU_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/eic.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/eic.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/eic.h	(revision 136)
@@ -0,0 +1,79 @@
+/**
+ * \file
+ *
+ * \brief Instance description for EIC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_EIC_INSTANCE_
+#define _SAMD21_EIC_INSTANCE_
+
+/* ========== Register definition for EIC peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_EIC_CTRL               (0x40001800U) /**< \brief (EIC) Control */
+#define REG_EIC_STATUS             (0x40001801U) /**< \brief (EIC) Status */
+#define REG_EIC_NMICTRL            (0x40001802U) /**< \brief (EIC) Non-Maskable Interrupt Control */
+#define REG_EIC_NMIFLAG            (0x40001803U) /**< \brief (EIC) Non-Maskable Interrupt Flag Status and Clear */
+#define REG_EIC_EVCTRL             (0x40001804U) /**< \brief (EIC) Event Control */
+#define REG_EIC_INTENCLR           (0x40001808U) /**< \brief (EIC) Interrupt Enable Clear */
+#define REG_EIC_INTENSET           (0x4000180CU) /**< \brief (EIC) Interrupt Enable Set */
+#define REG_EIC_INTFLAG            (0x40001810U) /**< \brief (EIC) Interrupt Flag Status and Clear */
+#define REG_EIC_WAKEUP             (0x40001814U) /**< \brief (EIC) Wake-Up Enable */
+#define REG_EIC_CONFIG0            (0x40001818U) /**< \brief (EIC) Configuration 0 */
+#define REG_EIC_CONFIG1            (0x4000181CU) /**< \brief (EIC) Configuration 1 */
+#else
+#define REG_EIC_CTRL               (*(RwReg8 *)0x40001800U) /**< \brief (EIC) Control */
+#define REG_EIC_STATUS             (*(RoReg8 *)0x40001801U) /**< \brief (EIC) Status */
+#define REG_EIC_NMICTRL            (*(RwReg8 *)0x40001802U) /**< \brief (EIC) Non-Maskable Interrupt Control */
+#define REG_EIC_NMIFLAG            (*(RwReg8 *)0x40001803U) /**< \brief (EIC) Non-Maskable Interrupt Flag Status and Clear */
+#define REG_EIC_EVCTRL             (*(RwReg  *)0x40001804U) /**< \brief (EIC) Event Control */
+#define REG_EIC_INTENCLR           (*(RwReg  *)0x40001808U) /**< \brief (EIC) Interrupt Enable Clear */
+#define REG_EIC_INTENSET           (*(RwReg  *)0x4000180CU) /**< \brief (EIC) Interrupt Enable Set */
+#define REG_EIC_INTFLAG            (*(RwReg  *)0x40001810U) /**< \brief (EIC) Interrupt Flag Status and Clear */
+#define REG_EIC_WAKEUP             (*(RwReg  *)0x40001814U) /**< \brief (EIC) Wake-Up Enable */
+#define REG_EIC_CONFIG0            (*(RwReg  *)0x40001818U) /**< \brief (EIC) Configuration 0 */
+#define REG_EIC_CONFIG1            (*(RwReg  *)0x4000181CU) /**< \brief (EIC) Configuration 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for EIC peripheral ========== */
+#define EIC_CONFIG_NUM              ((EIC_USABLE_EXTINT_NUM+7)/8)
+#define EIC_EXTINT_NUM              18
+#define EIC_GCLK_ID                 5
+
+#endif /* _SAMD21_EIC_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/evsys.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/evsys.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/evsys.h	(revision 136)
@@ -0,0 +1,197 @@
+/**
+ * \file
+ *
+ * \brief Instance description for EVSYS
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_EVSYS_INSTANCE_
+#define _SAMD21_EVSYS_INSTANCE_
+
+/* ========== Register definition for EVSYS peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_EVSYS_CTRL             (0x42000400U) /**< \brief (EVSYS) Control */
+#define REG_EVSYS_CHANNEL          (0x42000404U) /**< \brief (EVSYS) Channel */
+#define REG_EVSYS_USER             (0x42000408U) /**< \brief (EVSYS) User Multiplexer */
+#define REG_EVSYS_CHSTATUS         (0x4200040CU) /**< \brief (EVSYS) Channel Status */
+#define REG_EVSYS_INTENCLR         (0x42000410U) /**< \brief (EVSYS) Interrupt Enable Clear */
+#define REG_EVSYS_INTENSET         (0x42000414U) /**< \brief (EVSYS) Interrupt Enable Set */
+#define REG_EVSYS_INTFLAG          (0x42000418U) /**< \brief (EVSYS) Interrupt Flag Status and Clear */
+#else
+#define REG_EVSYS_CTRL             (*(WoReg8 *)0x42000400U) /**< \brief (EVSYS) Control */
+#define REG_EVSYS_CHANNEL          (*(RwReg  *)0x42000404U) /**< \brief (EVSYS) Channel */
+#define REG_EVSYS_USER             (*(RwReg16*)0x42000408U) /**< \brief (EVSYS) User Multiplexer */
+#define REG_EVSYS_CHSTATUS         (*(RoReg  *)0x4200040CU) /**< \brief (EVSYS) Channel Status */
+#define REG_EVSYS_INTENCLR         (*(RwReg  *)0x42000410U) /**< \brief (EVSYS) Interrupt Enable Clear */
+#define REG_EVSYS_INTENSET         (*(RwReg  *)0x42000414U) /**< \brief (EVSYS) Interrupt Enable Set */
+#define REG_EVSYS_INTFLAG          (*(RwReg  *)0x42000418U) /**< \brief (EVSYS) Interrupt Flag Status and Clear */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for EVSYS peripheral ========== */
+#define EVSYS_CHANNELS              12
+#define EVSYS_CHANNELS_BITS         (len(bin(EVSYS_CHANNELS-1))-2)
+#define EVSYS_CHANNELS_MSB          (EVSYS_CHANNELS-1)
+#define EVSYS_EXTEVT_NUM            0
+#define EVSYS_GCLK_ID_0             7
+#define EVSYS_GCLK_ID_1             8
+#define EVSYS_GCLK_ID_2             9
+#define EVSYS_GCLK_ID_3             10
+#define EVSYS_GCLK_ID_4             11
+#define EVSYS_GCLK_ID_5             12
+#define EVSYS_GCLK_ID_6             13
+#define EVSYS_GCLK_ID_7             14
+#define EVSYS_GCLK_ID_8             15
+#define EVSYS_GCLK_ID_9             16
+#define EVSYS_GCLK_ID_10            17
+#define EVSYS_GCLK_ID_11            18
+#define EVSYS_GCLK_ID_LSB           7
+#define EVSYS_GCLK_ID_MSB           18
+#define EVSYS_GCLK_ID_SIZE          12
+#define EVSYS_GENERATORS            73
+#define EVSYS_GENERATORS_BITS       (len(bin(EVSYS_GENERATORS-1))-2)
+#define EVSYS_USERS                 29
+#define EVSYS_USERS_BITS            (len(bin(EVSYS_USERS-1))-2)
+
+// GENERATORS
+#define EVSYS_ID_GEN_RTC_CMP_0      1
+#define EVSYS_ID_GEN_RTC_CMP_1      2
+#define EVSYS_ID_GEN_RTC_OVF        3
+#define EVSYS_ID_GEN_RTC_PER_0      4
+#define EVSYS_ID_GEN_RTC_PER_1      5
+#define EVSYS_ID_GEN_RTC_PER_2      6
+#define EVSYS_ID_GEN_RTC_PER_3      7
+#define EVSYS_ID_GEN_RTC_PER_4      8
+#define EVSYS_ID_GEN_RTC_PER_5      9
+#define EVSYS_ID_GEN_RTC_PER_6      10
+#define EVSYS_ID_GEN_RTC_PER_7      11
+#define EVSYS_ID_GEN_EIC_EXTINT_0   12
+#define EVSYS_ID_GEN_EIC_EXTINT_1   13
+#define EVSYS_ID_GEN_EIC_EXTINT_2   14
+#define EVSYS_ID_GEN_EIC_EXTINT_3   15
+#define EVSYS_ID_GEN_EIC_EXTINT_4   16
+#define EVSYS_ID_GEN_EIC_EXTINT_5   17
+#define EVSYS_ID_GEN_EIC_EXTINT_6   18
+#define EVSYS_ID_GEN_EIC_EXTINT_7   19
+#define EVSYS_ID_GEN_EIC_EXTINT_8   20
+#define EVSYS_ID_GEN_EIC_EXTINT_9   21
+#define EVSYS_ID_GEN_EIC_EXTINT_10  22
+#define EVSYS_ID_GEN_EIC_EXTINT_11  23
+#define EVSYS_ID_GEN_EIC_EXTINT_12  24
+#define EVSYS_ID_GEN_EIC_EXTINT_13  25
+#define EVSYS_ID_GEN_EIC_EXTINT_14  26
+#define EVSYS_ID_GEN_EIC_EXTINT_15  27
+#define EVSYS_ID_GEN_EIC_EXTINT_16  28
+#define EVSYS_ID_GEN_EIC_EXTINT_17  29
+#define EVSYS_ID_GEN_DMAC_CH_0      30
+#define EVSYS_ID_GEN_DMAC_CH_1      31
+#define EVSYS_ID_GEN_DMAC_CH_2      32
+#define EVSYS_ID_GEN_DMAC_CH_3      33
+#define EVSYS_ID_GEN_TCC0_OVF       34
+#define EVSYS_ID_GEN_TCC0_TRG       35
+#define EVSYS_ID_GEN_TCC0_CNT       36
+#define EVSYS_ID_GEN_TCC0_MCX_0     37
+#define EVSYS_ID_GEN_TCC0_MCX_1     38
+#define EVSYS_ID_GEN_TCC0_MCX_2     39
+#define EVSYS_ID_GEN_TCC0_MCX_3     40
+#define EVSYS_ID_GEN_TCC1_OVF       41
+#define EVSYS_ID_GEN_TCC1_TRG       42
+#define EVSYS_ID_GEN_TCC1_CNT       43
+#define EVSYS_ID_GEN_TCC1_MCX_0     44
+#define EVSYS_ID_GEN_TCC1_MCX_1     45
+#define EVSYS_ID_GEN_TCC2_OVF       46
+#define EVSYS_ID_GEN_TCC2_TRG       47
+#define EVSYS_ID_GEN_TCC2_CNT       48
+#define EVSYS_ID_GEN_TCC2_MCX_0     49
+#define EVSYS_ID_GEN_TCC2_MCX_1     50
+#define EVSYS_ID_GEN_TC3_OVF        51
+#define EVSYS_ID_GEN_TC3_MCX_0      52
+#define EVSYS_ID_GEN_TC3_MCX_1      53
+#define EVSYS_ID_GEN_TC4_OVF        54
+#define EVSYS_ID_GEN_TC4_MCX_0      55
+#define EVSYS_ID_GEN_TC4_MCX_1      56
+#define EVSYS_ID_GEN_TC5_OVF        57
+#define EVSYS_ID_GEN_TC5_MCX_0      58
+#define EVSYS_ID_GEN_TC5_MCX_1      59
+#define EVSYS_ID_GEN_TC6_OVF        60
+#define EVSYS_ID_GEN_TC6_MCX_0      61
+#define EVSYS_ID_GEN_TC6_MCX_1      62
+#define EVSYS_ID_GEN_TC7_OVF        63
+#define EVSYS_ID_GEN_TC7_MCX_0      64
+#define EVSYS_ID_GEN_TC7_MCX_1      65
+#define EVSYS_ID_GEN_ADC_RESRDY     66
+#define EVSYS_ID_GEN_ADC_WINMON     67
+#define EVSYS_ID_GEN_AC_COMP_0      68
+#define EVSYS_ID_GEN_AC_COMP_1      69
+#define EVSYS_ID_GEN_AC_WIN_0       70
+#define EVSYS_ID_GEN_DAC_EMPTY      71
+#define EVSYS_ID_GEN_PTC_EOC        72
+#define EVSYS_ID_GEN_PTC_WCOMP      73
+
+// USERS
+#define EVSYS_ID_USER_DMAC_CH_0     0
+#define EVSYS_ID_USER_DMAC_CH_1     1
+#define EVSYS_ID_USER_DMAC_CH_2     2
+#define EVSYS_ID_USER_DMAC_CH_3     3
+#define EVSYS_ID_USER_TCC0_EV_0     4
+#define EVSYS_ID_USER_TCC0_EV_1     5
+#define EVSYS_ID_USER_TCC0_MC_0     6
+#define EVSYS_ID_USER_TCC0_MC_1     7
+#define EVSYS_ID_USER_TCC0_MC_2     8
+#define EVSYS_ID_USER_TCC0_MC_3     9
+#define EVSYS_ID_USER_TCC1_EV_0     10
+#define EVSYS_ID_USER_TCC1_EV_1     11
+#define EVSYS_ID_USER_TCC1_MC_0     12
+#define EVSYS_ID_USER_TCC1_MC_1     13
+#define EVSYS_ID_USER_TCC2_EV_0     14
+#define EVSYS_ID_USER_TCC2_EV_1     15
+#define EVSYS_ID_USER_TCC2_MC_0     16
+#define EVSYS_ID_USER_TCC2_MC_1     17
+#define EVSYS_ID_USER_TC3_EVU       18
+#define EVSYS_ID_USER_TC4_EVU       19
+#define EVSYS_ID_USER_TC5_EVU       20
+#define EVSYS_ID_USER_TC6_EVU       21
+#define EVSYS_ID_USER_TC7_EVU       22
+#define EVSYS_ID_USER_ADC_START     23
+#define EVSYS_ID_USER_ADC_SYNC      24
+#define EVSYS_ID_USER_AC_SOC_0      25
+#define EVSYS_ID_USER_AC_SOC_1      26
+#define EVSYS_ID_USER_DAC_START     27
+#define EVSYS_ID_USER_PTC_STCONV    28
+
+#endif /* _SAMD21_EVSYS_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/gclk.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/gclk.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/gclk.h	(revision 136)
@@ -0,0 +1,79 @@
+/**
+ * \file
+ *
+ * \brief Instance description for GCLK
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_GCLK_INSTANCE_
+#define _SAMD21_GCLK_INSTANCE_
+
+/* ========== Register definition for GCLK peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_GCLK_CTRL              (0x40000C00U) /**< \brief (GCLK) Control */
+#define REG_GCLK_STATUS            (0x40000C01U) /**< \brief (GCLK) Status */
+#define REG_GCLK_CLKCTRL           (0x40000C02U) /**< \brief (GCLK) Generic Clock Control */
+#define REG_GCLK_GENCTRL           (0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */
+#define REG_GCLK_GENDIV            (0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */
+#else
+#define REG_GCLK_CTRL              (*(RwReg8 *)0x40000C00U) /**< \brief (GCLK) Control */
+#define REG_GCLK_STATUS            (*(RoReg8 *)0x40000C01U) /**< \brief (GCLK) Status */
+#define REG_GCLK_CLKCTRL           (*(RwReg16*)0x40000C02U) /**< \brief (GCLK) Generic Clock Control */
+#define REG_GCLK_GENCTRL           (*(RwReg  *)0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */
+#define REG_GCLK_GENDIV            (*(RwReg  *)0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for GCLK peripheral ========== */
+#define GCLK_GENDIV_BITS            16
+#define GCLK_GEN_NUM                9
+#define GCLK_GEN_NUM_MSB            (GCLK_GEN_NUM-1)
+#define GCLK_GEN_SOURCE_NUM_MSB     (GCLK_SOURCE_NUM-1)
+#define GCLK_NUM                    37
+#define GCLK_SOURCE_DFLL48M         7
+#define GCLK_SOURCE_FDPLL           8
+#define GCLK_SOURCE_GCLKGEN1        2
+#define GCLK_SOURCE_GCLKIN          1
+#define GCLK_SOURCE_NUM             9
+#define GCLK_SOURCE_OSCULP32K       3
+#define GCLK_SOURCE_OSC8M           6
+#define GCLK_SOURCE_OSC32K          4
+#define GCLK_SOURCE_XOSC            0
+#define GCLK_SOURCE_XOSC32K         5
+
+#endif /* _SAMD21_GCLK_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/i2s.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/i2s.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/i2s.h	(revision 136)
@@ -0,0 +1,94 @@
+/**
+ * \file
+ *
+ * \brief Instance description for I2S
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_I2S_INSTANCE_
+#define _SAMD21_I2S_INSTANCE_
+
+/* ========== Register definition for I2S peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_I2S_CTRLA              (0x42005000U) /**< \brief (I2S) Control A */
+#define REG_I2S_CLKCTRL0           (0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */
+#define REG_I2S_CLKCTRL1           (0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */
+#define REG_I2S_INTENCLR           (0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */
+#define REG_I2S_INTENSET           (0x42005010U) /**< \brief (I2S) Interrupt Enable Set */
+#define REG_I2S_INTFLAG            (0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */
+#define REG_I2S_SYNCBUSY           (0x42005018U) /**< \brief (I2S) Synchronization Status */
+#define REG_I2S_SERCTRL0           (0x42005020U) /**< \brief (I2S) Serializer 0 Control */
+#define REG_I2S_SERCTRL1           (0x42005024U) /**< \brief (I2S) Serializer 1 Control */
+#define REG_I2S_DATA0              (0x42005030U) /**< \brief (I2S) Data 0 */
+#define REG_I2S_DATA1              (0x42005034U) /**< \brief (I2S) Data 1 */
+#else
+#define REG_I2S_CTRLA              (*(RwReg8 *)0x42005000U) /**< \brief (I2S) Control A */
+#define REG_I2S_CLKCTRL0           (*(RwReg  *)0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */
+#define REG_I2S_CLKCTRL1           (*(RwReg  *)0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */
+#define REG_I2S_INTENCLR           (*(RwReg16*)0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */
+#define REG_I2S_INTENSET           (*(RwReg16*)0x42005010U) /**< \brief (I2S) Interrupt Enable Set */
+#define REG_I2S_INTFLAG            (*(RwReg16*)0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */
+#define REG_I2S_SYNCBUSY           (*(RoReg16*)0x42005018U) /**< \brief (I2S) Synchronization Status */
+#define REG_I2S_SERCTRL0           (*(RwReg  *)0x42005020U) /**< \brief (I2S) Serializer 0 Control */
+#define REG_I2S_SERCTRL1           (*(RwReg  *)0x42005024U) /**< \brief (I2S) Serializer 1 Control */
+#define REG_I2S_DATA0              (*(RwReg  *)0x42005030U) /**< \brief (I2S) Data 0 */
+#define REG_I2S_DATA1              (*(RwReg  *)0x42005034U) /**< \brief (I2S) Data 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for I2S peripheral ========== */
+#define I2S_CLK_NUM                 2
+#define I2S_DMAC_ID_RX_0            41
+#define I2S_DMAC_ID_RX_1            42
+#define I2S_DMAC_ID_RX_LSB          41
+#define I2S_DMAC_ID_RX_MSB          42
+#define I2S_DMAC_ID_RX_SIZE         2
+#define I2S_DMAC_ID_TX_0            43
+#define I2S_DMAC_ID_TX_1            44
+#define I2S_DMAC_ID_TX_LSB          43
+#define I2S_DMAC_ID_TX_MSB          44
+#define I2S_DMAC_ID_TX_SIZE         2
+#define I2S_GCLK_ID_0               35
+#define I2S_GCLK_ID_1               36
+#define I2S_GCLK_ID_LSB             35
+#define I2S_GCLK_ID_MSB             36
+#define I2S_GCLK_ID_SIZE            2
+#define I2S_MAX_SLOTS               8
+#define I2S_SER_NUM                 2
+
+#endif /* _SAMD21_I2S_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/mtb.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/mtb.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/mtb.h	(revision 136)
@@ -0,0 +1,103 @@
+/**
+ * \file
+ *
+ * \brief Instance description for MTB
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_MTB_INSTANCE_
+#define _SAMD21_MTB_INSTANCE_
+
+/* ========== Register definition for MTB peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_MTB_POSITION           (0x41006000U) /**< \brief (MTB) MTB Position */
+#define REG_MTB_MASTER             (0x41006004U) /**< \brief (MTB) MTB Master */
+#define REG_MTB_FLOW               (0x41006008U) /**< \brief (MTB) MTB Flow */
+#define REG_MTB_BASE               (0x4100600CU) /**< \brief (MTB) MTB Base */
+#define REG_MTB_ITCTRL             (0x41006F00U) /**< \brief (MTB) MTB Integration Mode Control */
+#define REG_MTB_CLAIMSET           (0x41006FA0U) /**< \brief (MTB) MTB Claim Set */
+#define REG_MTB_CLAIMCLR           (0x41006FA4U) /**< \brief (MTB) MTB Claim Clear */
+#define REG_MTB_LOCKACCESS         (0x41006FB0U) /**< \brief (MTB) MTB Lock Access */
+#define REG_MTB_LOCKSTATUS         (0x41006FB4U) /**< \brief (MTB) MTB Lock Status */
+#define REG_MTB_AUTHSTATUS         (0x41006FB8U) /**< \brief (MTB) MTB Authentication Status */
+#define REG_MTB_DEVARCH            (0x41006FBCU) /**< \brief (MTB) MTB Device Architecture */
+#define REG_MTB_DEVID              (0x41006FC8U) /**< \brief (MTB) MTB Device Configuration */
+#define REG_MTB_DEVTYPE            (0x41006FCCU) /**< \brief (MTB) MTB Device Type */
+#define REG_MTB_PID4               (0x41006FD0U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID5               (0x41006FD4U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID6               (0x41006FD8U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID7               (0x41006FDCU) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID0               (0x41006FE0U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID1               (0x41006FE4U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID2               (0x41006FE8U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID3               (0x41006FECU) /**< \brief (MTB) CoreSight */
+#define REG_MTB_CID0               (0x41006FF0U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_CID1               (0x41006FF4U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_CID2               (0x41006FF8U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_CID3               (0x41006FFCU) /**< \brief (MTB) CoreSight */
+#else
+#define REG_MTB_POSITION           (*(RwReg  *)0x41006000U) /**< \brief (MTB) MTB Position */
+#define REG_MTB_MASTER             (*(RwReg  *)0x41006004U) /**< \brief (MTB) MTB Master */
+#define REG_MTB_FLOW               (*(RwReg  *)0x41006008U) /**< \brief (MTB) MTB Flow */
+#define REG_MTB_BASE               (*(RoReg  *)0x4100600CU) /**< \brief (MTB) MTB Base */
+#define REG_MTB_ITCTRL             (*(RwReg  *)0x41006F00U) /**< \brief (MTB) MTB Integration Mode Control */
+#define REG_MTB_CLAIMSET           (*(RwReg  *)0x41006FA0U) /**< \brief (MTB) MTB Claim Set */
+#define REG_MTB_CLAIMCLR           (*(RwReg  *)0x41006FA4U) /**< \brief (MTB) MTB Claim Clear */
+#define REG_MTB_LOCKACCESS         (*(RwReg  *)0x41006FB0U) /**< \brief (MTB) MTB Lock Access */
+#define REG_MTB_LOCKSTATUS         (*(RoReg  *)0x41006FB4U) /**< \brief (MTB) MTB Lock Status */
+#define REG_MTB_AUTHSTATUS         (*(RoReg  *)0x41006FB8U) /**< \brief (MTB) MTB Authentication Status */
+#define REG_MTB_DEVARCH            (*(RoReg  *)0x41006FBCU) /**< \brief (MTB) MTB Device Architecture */
+#define REG_MTB_DEVID              (*(RoReg  *)0x41006FC8U) /**< \brief (MTB) MTB Device Configuration */
+#define REG_MTB_DEVTYPE            (*(RoReg  *)0x41006FCCU) /**< \brief (MTB) MTB Device Type */
+#define REG_MTB_PID4               (*(RoReg  *)0x41006FD0U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID5               (*(RoReg  *)0x41006FD4U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID6               (*(RoReg  *)0x41006FD8U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID7               (*(RoReg  *)0x41006FDCU) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID0               (*(RoReg  *)0x41006FE0U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID1               (*(RoReg  *)0x41006FE4U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID2               (*(RoReg  *)0x41006FE8U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_PID3               (*(RoReg  *)0x41006FECU) /**< \brief (MTB) CoreSight */
+#define REG_MTB_CID0               (*(RoReg  *)0x41006FF0U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_CID1               (*(RoReg  *)0x41006FF4U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_CID2               (*(RoReg  *)0x41006FF8U) /**< \brief (MTB) CoreSight */
+#define REG_MTB_CID3               (*(RoReg  *)0x41006FFCU) /**< \brief (MTB) CoreSight */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+
+#endif /* _SAMD21_MTB_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/nvmctrl.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/nvmctrl.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/nvmctrl.h	(revision 136)
@@ -0,0 +1,92 @@
+/**
+ * \file
+ *
+ * \brief Instance description for NVMCTRL
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_NVMCTRL_INSTANCE_
+#define _SAMD21_NVMCTRL_INSTANCE_
+
+/* ========== Register definition for NVMCTRL peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_NVMCTRL_CTRLA          (0x41004000U) /**< \brief (NVMCTRL) Control A */
+#define REG_NVMCTRL_CTRLB          (0x41004004U) /**< \brief (NVMCTRL) Control B */
+#define REG_NVMCTRL_PARAM          (0x41004008U) /**< \brief (NVMCTRL) NVM Parameter */
+#define REG_NVMCTRL_INTENCLR       (0x4100400CU) /**< \brief (NVMCTRL) Interrupt Enable Clear */
+#define REG_NVMCTRL_INTENSET       (0x41004010U) /**< \brief (NVMCTRL) Interrupt Enable Set */
+#define REG_NVMCTRL_INTFLAG        (0x41004014U) /**< \brief (NVMCTRL) Interrupt Flag Status and Clear */
+#define REG_NVMCTRL_STATUS         (0x41004018U) /**< \brief (NVMCTRL) Status */
+#define REG_NVMCTRL_ADDR           (0x4100401CU) /**< \brief (NVMCTRL) Address */
+#define REG_NVMCTRL_LOCK           (0x41004020U) /**< \brief (NVMCTRL) Lock Section */
+#else
+#define REG_NVMCTRL_CTRLA          (*(RwReg16*)0x41004000U) /**< \brief (NVMCTRL) Control A */
+#define REG_NVMCTRL_CTRLB          (*(RwReg  *)0x41004004U) /**< \brief (NVMCTRL) Control B */
+#define REG_NVMCTRL_PARAM          (*(RwReg  *)0x41004008U) /**< \brief (NVMCTRL) NVM Parameter */
+#define REG_NVMCTRL_INTENCLR       (*(RwReg8 *)0x4100400CU) /**< \brief (NVMCTRL) Interrupt Enable Clear */
+#define REG_NVMCTRL_INTENSET       (*(RwReg8 *)0x41004010U) /**< \brief (NVMCTRL) Interrupt Enable Set */
+#define REG_NVMCTRL_INTFLAG        (*(RwReg8 *)0x41004014U) /**< \brief (NVMCTRL) Interrupt Flag Status and Clear */
+#define REG_NVMCTRL_STATUS         (*(RwReg16*)0x41004018U) /**< \brief (NVMCTRL) Status */
+#define REG_NVMCTRL_ADDR           (*(RwReg  *)0x4100401CU) /**< \brief (NVMCTRL) Address */
+#define REG_NVMCTRL_LOCK           (*(RwReg16*)0x41004020U) /**< \brief (NVMCTRL) Lock Section */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for NVMCTRL peripheral ========== */
+#define NVMCTRL_AUX0_ADDRESS        (NVMCTRL_USER_PAGE_ADDRESS + 0x00004000)
+#define NVMCTRL_AUX1_ADDRESS        (NVMCTRL_USER_PAGE_ADDRESS + 0x00006000)
+#define NVMCTRL_AUX2_ADDRESS        (NVMCTRL_USER_PAGE_ADDRESS + 0x00008000)
+#define NVMCTRL_AUX3_ADDRESS        (NVMCTRL_USER_PAGE_ADDRESS + 0x0000A000)
+#define NVMCTRL_CLK_AHB_ID          4
+#define NVMCTRL_FACTORY_WORD_IMPLEMENTED_MASK 0xC0000007FFFFFFFF
+#define NVMCTRL_FLASH_SIZE          (NVMCTRL_PAGES*NVMCTRL_PAGE_SIZE)
+#define NVMCTRL_LOCKBIT_ADDRESS     (NVMCTRL_USER_PAGE_ADDRESS + 0x00002000)
+#define NVMCTRL_PAGES               4096
+#define NVMCTRL_PAGE_HW             (NVMCTRL_PAGE_SIZE/2)
+#define NVMCTRL_PAGE_SIZE           (1<<NVMCTRL_PSZ_BITS)
+#define NVMCTRL_PAGE_W              (NVMCTRL_PAGE_SIZE/4)
+#define NVMCTRL_PMSB                3
+#define NVMCTRL_PSZ_BITS            6
+#define NVMCTRL_ROW_PAGES           4
+#define NVMCTRL_ROW_SIZE            (NVMCTRL_PAGE_SIZE*NVMCTRL_ROW_PAGES)
+#define NVMCTRL_TEMP_LOG_ADDRESS    (NVMCTRL_USER_PAGE_ADDRESS + 0x00006030)
+#define NVMCTRL_USER_PAGE_ADDRESS   (FLASH_ADDR + NVMCTRL_USER_PAGE_OFFSET)
+#define NVMCTRL_USER_PAGE_OFFSET    0x00800000
+#define NVMCTRL_USER_WORD_IMPLEMENTED_MASK 0xC01FFFFFFFFFFFFF
+
+#endif /* _SAMD21_NVMCTRL_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pac0.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pac0.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pac0.h	(revision 136)
@@ -0,0 +1,59 @@
+/**
+ * \file
+ *
+ * \brief Instance description for PAC0
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_PAC0_INSTANCE_
+#define _SAMD21_PAC0_INSTANCE_
+
+/* ========== Register definition for PAC0 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_PAC0_WPCLR             (0x40000000U) /**< \brief (PAC0) Write Protection Clear */
+#define REG_PAC0_WPSET             (0x40000004U) /**< \brief (PAC0) Write Protection Set */
+#else
+#define REG_PAC0_WPCLR             (*(RwReg  *)0x40000000U) /**< \brief (PAC0) Write Protection Clear */
+#define REG_PAC0_WPSET             (*(RwReg  *)0x40000004U) /**< \brief (PAC0) Write Protection Set */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for PAC0 peripheral ========== */
+#define PAC0_WPROT_DEFAULT_VAL      0x00000000
+
+#endif /* _SAMD21_PAC0_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pac1.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pac1.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pac1.h	(revision 136)
@@ -0,0 +1,59 @@
+/**
+ * \file
+ *
+ * \brief Instance description for PAC1
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_PAC1_INSTANCE_
+#define _SAMD21_PAC1_INSTANCE_
+
+/* ========== Register definition for PAC1 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_PAC1_WPCLR             (0x41000000U) /**< \brief (PAC1) Write Protection Clear */
+#define REG_PAC1_WPSET             (0x41000004U) /**< \brief (PAC1) Write Protection Set */
+#else
+#define REG_PAC1_WPCLR             (*(RwReg  *)0x41000000U) /**< \brief (PAC1) Write Protection Clear */
+#define REG_PAC1_WPSET             (*(RwReg  *)0x41000004U) /**< \brief (PAC1) Write Protection Set */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for PAC1 peripheral ========== */
+#define PAC1_WPROT_DEFAULT_VAL      0x00000002
+
+#endif /* _SAMD21_PAC1_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pac2.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pac2.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pac2.h	(revision 136)
@@ -0,0 +1,59 @@
+/**
+ * \file
+ *
+ * \brief Instance description for PAC2
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_PAC2_INSTANCE_
+#define _SAMD21_PAC2_INSTANCE_
+
+/* ========== Register definition for PAC2 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_PAC2_WPCLR             (0x42000000U) /**< \brief (PAC2) Write Protection Clear */
+#define REG_PAC2_WPSET             (0x42000004U) /**< \brief (PAC2) Write Protection Set */
+#else
+#define REG_PAC2_WPCLR             (*(RwReg  *)0x42000000U) /**< \brief (PAC2) Write Protection Clear */
+#define REG_PAC2_WPSET             (*(RwReg  *)0x42000004U) /**< \brief (PAC2) Write Protection Set */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for PAC2 peripheral ========== */
+#define PAC2_WPROT_DEFAULT_VAL      0x00800000
+
+#endif /* _SAMD21_PAC2_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pm.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pm.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/pm.h	(revision 136)
@@ -0,0 +1,87 @@
+/**
+ * \file
+ *
+ * \brief Instance description for PM
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_PM_INSTANCE_
+#define _SAMD21_PM_INSTANCE_
+
+/* ========== Register definition for PM peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_PM_CTRL                (0x40000400U) /**< \brief (PM) Control */
+#define REG_PM_SLEEP               (0x40000401U) /**< \brief (PM) Sleep Mode */
+#define REG_PM_CPUSEL              (0x40000408U) /**< \brief (PM) CPU Clock Select */
+#define REG_PM_APBASEL             (0x40000409U) /**< \brief (PM) APBA Clock Select */
+#define REG_PM_APBBSEL             (0x4000040AU) /**< \brief (PM) APBB Clock Select */
+#define REG_PM_APBCSEL             (0x4000040BU) /**< \brief (PM) APBC Clock Select */
+#define REG_PM_AHBMASK             (0x40000414U) /**< \brief (PM) AHB Mask */
+#define REG_PM_APBAMASK            (0x40000418U) /**< \brief (PM) APBA Mask */
+#define REG_PM_APBBMASK            (0x4000041CU) /**< \brief (PM) APBB Mask */
+#define REG_PM_APBCMASK            (0x40000420U) /**< \brief (PM) APBC Mask */
+#define REG_PM_INTENCLR            (0x40000434U) /**< \brief (PM) Interrupt Enable Clear */
+#define REG_PM_INTENSET            (0x40000435U) /**< \brief (PM) Interrupt Enable Set */
+#define REG_PM_INTFLAG             (0x40000436U) /**< \brief (PM) Interrupt Flag Status and Clear */
+#define REG_PM_RCAUSE              (0x40000438U) /**< \brief (PM) Reset Cause */
+#else
+#define REG_PM_CTRL                (*(RwReg8 *)0x40000400U) /**< \brief (PM) Control */
+#define REG_PM_SLEEP               (*(RwReg8 *)0x40000401U) /**< \brief (PM) Sleep Mode */
+#define REG_PM_CPUSEL              (*(RwReg8 *)0x40000408U) /**< \brief (PM) CPU Clock Select */
+#define REG_PM_APBASEL             (*(RwReg8 *)0x40000409U) /**< \brief (PM) APBA Clock Select */
+#define REG_PM_APBBSEL             (*(RwReg8 *)0x4000040AU) /**< \brief (PM) APBB Clock Select */
+#define REG_PM_APBCSEL             (*(RwReg8 *)0x4000040BU) /**< \brief (PM) APBC Clock Select */
+#define REG_PM_AHBMASK             (*(RwReg  *)0x40000414U) /**< \brief (PM) AHB Mask */
+#define REG_PM_APBAMASK            (*(RwReg  *)0x40000418U) /**< \brief (PM) APBA Mask */
+#define REG_PM_APBBMASK            (*(RwReg  *)0x4000041CU) /**< \brief (PM) APBB Mask */
+#define REG_PM_APBCMASK            (*(RwReg  *)0x40000420U) /**< \brief (PM) APBC Mask */
+#define REG_PM_INTENCLR            (*(RwReg8 *)0x40000434U) /**< \brief (PM) Interrupt Enable Clear */
+#define REG_PM_INTENSET            (*(RwReg8 *)0x40000435U) /**< \brief (PM) Interrupt Enable Set */
+#define REG_PM_INTFLAG             (*(RwReg8 *)0x40000436U) /**< \brief (PM) Interrupt Flag Status and Clear */
+#define REG_PM_RCAUSE              (*(RoReg8 *)0x40000438U) /**< \brief (PM) Reset Cause */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for PM peripheral ========== */
+#define PM_CTRL_MCSEL_DFLL48M       3
+#define PM_CTRL_MCSEL_GCLK          0
+#define PM_CTRL_MCSEL_OSC8M         1
+#define PM_CTRL_MCSEL_XOSC          2
+#define PM_PM_CLK_APB_NUM           2
+
+#endif /* _SAMD21_PM_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/port.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/port.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/port.h	(revision 136)
@@ -0,0 +1,162 @@
+/**
+ * \file
+ *
+ * \brief Instance description for PORT
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_PORT_INSTANCE_
+#define _SAMD21_PORT_INSTANCE_
+
+/* ========== Register definition for PORT peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_PORT_DIR0              (0x41004400U) /**< \brief (PORT) Data Direction 0 */
+#define REG_PORT_DIRCLR0           (0x41004404U) /**< \brief (PORT) Data Direction Clear 0 */
+#define REG_PORT_DIRSET0           (0x41004408U) /**< \brief (PORT) Data Direction Set 0 */
+#define REG_PORT_DIRTGL0           (0x4100440CU) /**< \brief (PORT) Data Direction Toggle 0 */
+#define REG_PORT_OUT0              (0x41004410U) /**< \brief (PORT) Data Output Value 0 */
+#define REG_PORT_OUTCLR0           (0x41004414U) /**< \brief (PORT) Data Output Value Clear 0 */
+#define REG_PORT_OUTSET0           (0x41004418U) /**< \brief (PORT) Data Output Value Set 0 */
+#define REG_PORT_OUTTGL0           (0x4100441CU) /**< \brief (PORT) Data Output Value Toggle 0 */
+#define REG_PORT_IN0               (0x41004420U) /**< \brief (PORT) Data Input Value 0 */
+#define REG_PORT_CTRL0             (0x41004424U) /**< \brief (PORT) Control 0 */
+#define REG_PORT_WRCONFIG0         (0x41004428U) /**< \brief (PORT) Write Configuration 0 */
+#define REG_PORT_PMUX0             (0x41004430U) /**< \brief (PORT) Peripheral Multiplexing 0 */
+#define REG_PORT_PINCFG0           (0x41004440U) /**< \brief (PORT) Pin Configuration 0 */
+#define REG_PORT_DIR1              (0x41004480U) /**< \brief (PORT) Data Direction 1 */
+#define REG_PORT_DIRCLR1           (0x41004484U) /**< \brief (PORT) Data Direction Clear 1 */
+#define REG_PORT_DIRSET1           (0x41004488U) /**< \brief (PORT) Data Direction Set 1 */
+#define REG_PORT_DIRTGL1           (0x4100448CU) /**< \brief (PORT) Data Direction Toggle 1 */
+#define REG_PORT_OUT1              (0x41004490U) /**< \brief (PORT) Data Output Value 1 */
+#define REG_PORT_OUTCLR1           (0x41004494U) /**< \brief (PORT) Data Output Value Clear 1 */
+#define REG_PORT_OUTSET1           (0x41004498U) /**< \brief (PORT) Data Output Value Set 1 */
+#define REG_PORT_OUTTGL1           (0x4100449CU) /**< \brief (PORT) Data Output Value Toggle 1 */
+#define REG_PORT_IN1               (0x410044A0U) /**< \brief (PORT) Data Input Value 1 */
+#define REG_PORT_CTRL1             (0x410044A4U) /**< \brief (PORT) Control 1 */
+#define REG_PORT_WRCONFIG1         (0x410044A8U) /**< \brief (PORT) Write Configuration 1 */
+#define REG_PORT_PMUX1             (0x410044B0U) /**< \brief (PORT) Peripheral Multiplexing 1 */
+#define REG_PORT_PINCFG1           (0x410044C0U) /**< \brief (PORT) Pin Configuration 1 */
+#define REG_PORT_DIR2              (0x41004500U) /**< \brief (PORT) Data Direction 2 */
+#define REG_PORT_DIRCLR2           (0x41004504U) /**< \brief (PORT) Data Direction Clear 2 */
+#define REG_PORT_DIRSET2           (0x41004508U) /**< \brief (PORT) Data Direction Set 2 */
+#define REG_PORT_DIRTGL2           (0x4100450CU) /**< \brief (PORT) Data Direction Toggle 2 */
+#define REG_PORT_OUT2              (0x41004510U) /**< \brief (PORT) Data Output Value 2 */
+#define REG_PORT_OUTCLR2           (0x41004514U) /**< \brief (PORT) Data Output Value Clear 2 */
+#define REG_PORT_OUTSET2           (0x41004518U) /**< \brief (PORT) Data Output Value Set 2 */
+#define REG_PORT_OUTTGL2           (0x4100451CU) /**< \brief (PORT) Data Output Value Toggle 2 */
+#define REG_PORT_IN2               (0x41004520U) /**< \brief (PORT) Data Input Value 2 */
+#define REG_PORT_CTRL2             (0x41004524U) /**< \brief (PORT) Control 2 */
+#define REG_PORT_WRCONFIG2         (0x41004528U) /**< \brief (PORT) Write Configuration 2 */
+#define REG_PORT_PMUX2             (0x41004530U) /**< \brief (PORT) Peripheral Multiplexing 2 */
+#define REG_PORT_PINCFG2           (0x41004540U) /**< \brief (PORT) Pin Configuration 2 */
+#else
+#define REG_PORT_DIR0              (*(RwReg  *)0x41004400U) /**< \brief (PORT) Data Direction 0 */
+#define REG_PORT_DIRCLR0           (*(RwReg  *)0x41004404U) /**< \brief (PORT) Data Direction Clear 0 */
+#define REG_PORT_DIRSET0           (*(RwReg  *)0x41004408U) /**< \brief (PORT) Data Direction Set 0 */
+#define REG_PORT_DIRTGL0           (*(RwReg  *)0x4100440CU) /**< \brief (PORT) Data Direction Toggle 0 */
+#define REG_PORT_OUT0              (*(RwReg  *)0x41004410U) /**< \brief (PORT) Data Output Value 0 */
+#define REG_PORT_OUTCLR0           (*(RwReg  *)0x41004414U) /**< \brief (PORT) Data Output Value Clear 0 */
+#define REG_PORT_OUTSET0           (*(RwReg  *)0x41004418U) /**< \brief (PORT) Data Output Value Set 0 */
+#define REG_PORT_OUTTGL0           (*(RwReg  *)0x4100441CU) /**< \brief (PORT) Data Output Value Toggle 0 */
+#define REG_PORT_IN0               (*(RoReg  *)0x41004420U) /**< \brief (PORT) Data Input Value 0 */
+#define REG_PORT_CTRL0             (*(RwReg  *)0x41004424U) /**< \brief (PORT) Control 0 */
+#define REG_PORT_WRCONFIG0         (*(WoReg  *)0x41004428U) /**< \brief (PORT) Write Configuration 0 */
+#define REG_PORT_PMUX0             (*(RwReg  *)0x41004430U) /**< \brief (PORT) Peripheral Multiplexing 0 */
+#define REG_PORT_PINCFG0           (*(RwReg  *)0x41004440U) /**< \brief (PORT) Pin Configuration 0 */
+#define REG_PORT_DIR1              (*(RwReg  *)0x41004480U) /**< \brief (PORT) Data Direction 1 */
+#define REG_PORT_DIRCLR1           (*(RwReg  *)0x41004484U) /**< \brief (PORT) Data Direction Clear 1 */
+#define REG_PORT_DIRSET1           (*(RwReg  *)0x41004488U) /**< \brief (PORT) Data Direction Set 1 */
+#define REG_PORT_DIRTGL1           (*(RwReg  *)0x4100448CU) /**< \brief (PORT) Data Direction Toggle 1 */
+#define REG_PORT_OUT1              (*(RwReg  *)0x41004490U) /**< \brief (PORT) Data Output Value 1 */
+#define REG_PORT_OUTCLR1           (*(RwReg  *)0x41004494U) /**< \brief (PORT) Data Output Value Clear 1 */
+#define REG_PORT_OUTSET1           (*(RwReg  *)0x41004498U) /**< \brief (PORT) Data Output Value Set 1 */
+#define REG_PORT_OUTTGL1           (*(RwReg  *)0x4100449CU) /**< \brief (PORT) Data Output Value Toggle 1 */
+#define REG_PORT_IN1               (*(RoReg  *)0x410044A0U) /**< \brief (PORT) Data Input Value 1 */
+#define REG_PORT_CTRL1             (*(RwReg  *)0x410044A4U) /**< \brief (PORT) Control 1 */
+#define REG_PORT_WRCONFIG1         (*(WoReg  *)0x410044A8U) /**< \brief (PORT) Write Configuration 1 */
+#define REG_PORT_PMUX1             (*(RwReg  *)0x410044B0U) /**< \brief (PORT) Peripheral Multiplexing 1 */
+#define REG_PORT_PINCFG1           (*(RwReg  *)0x410044C0U) /**< \brief (PORT) Pin Configuration 1 */
+#define REG_PORT_DIR2              (*(RwReg  *)0x41004500U) /**< \brief (PORT) Data Direction 2 */
+#define REG_PORT_DIRCLR2           (*(RwReg  *)0x41004504U) /**< \brief (PORT) Data Direction Clear 2 */
+#define REG_PORT_DIRSET2           (*(RwReg  *)0x41004508U) /**< \brief (PORT) Data Direction Set 2 */
+#define REG_PORT_DIRTGL2           (*(RwReg  *)0x4100450CU) /**< \brief (PORT) Data Direction Toggle 2 */
+#define REG_PORT_OUT2              (*(RwReg  *)0x41004510U) /**< \brief (PORT) Data Output Value 2 */
+#define REG_PORT_OUTCLR2           (*(RwReg  *)0x41004514U) /**< \brief (PORT) Data Output Value Clear 2 */
+#define REG_PORT_OUTSET2           (*(RwReg  *)0x41004518U) /**< \brief (PORT) Data Output Value Set 2 */
+#define REG_PORT_OUTTGL2           (*(RwReg  *)0x4100451CU) /**< \brief (PORT) Data Output Value Toggle 2 */
+#define REG_PORT_IN2               (*(RoReg  *)0x41004520U) /**< \brief (PORT) Data Input Value 2 */
+#define REG_PORT_CTRL2             (*(RwReg  *)0x41004524U) /**< \brief (PORT) Control 2 */
+#define REG_PORT_WRCONFIG2         (*(WoReg  *)0x41004528U) /**< \brief (PORT) Write Configuration 2 */
+#define REG_PORT_PMUX2             (*(RwReg  *)0x41004530U) /**< \brief (PORT) Peripheral Multiplexing 2 */
+#define REG_PORT_PINCFG2           (*(RwReg  *)0x41004540U) /**< \brief (PORT) Pin Configuration 2 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for PORT peripheral ========== */
+#define PORT_BITS                   84
+#define PORT_DIR_DEFAULT_VAL        { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_DIR_IMPLEMENTED        { 0xDBFFFFFF, 0xC0C3FFFF, 0x000FFFFF }
+#define PORT_DRVSTR                 1
+#define PORT_DRVSTR_DEFAULT_VAL     { 0xD8FFFFFF, 0xC0C3FFFF, 0x000FFFFF }
+#define PORT_DRVSTR_IMPLEMENTED     { 0xD8FFFFFF, 0xC0C3FFFF, 0x000FFFFF }
+#define PORT_EVENT_IMPLEMENTED      { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_INEN_DEFAULT_VAL       { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_INEN_IMPLEMENTED       { 0xD8FFFFFF, 0xC0C3FFFF, 0x000FFFFF }
+#define PORT_ODRAIN                 0
+#define PORT_ODRAIN_DEFAULT_VAL     { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_ODRAIN_IMPLEMENTED     { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_OUT_DEFAULT_VAL        { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_OUT_IMPLEMENTED        { 0xDBFFFFFF, 0xC0C3FFFF, 0x000FFFFF }
+#define PORT_PIN_IMPLEMENTED        { 0xDBFFFFFF, 0xC0C3FFFF, 0x000FFFFF }
+#define PORT_PMUXBIT0_DEFAULT_VAL   { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_PMUXBIT0_IMPLEMENTED   { 0xDBFFFFFF, 0xC0C3FFFF, 0x000D0000 }
+#define PORT_PMUXBIT1_DEFAULT_VAL   { 0x40000000, 0x00000000, 0x00000000 }
+#define PORT_PMUXBIT1_IMPLEMENTED   { 0xDBFFFFF3, 0xC0C3FF0F, 0x00000000 }
+#define PORT_PMUXBIT2_DEFAULT_VAL   { 0x40000000, 0x00000000, 0x00000000 }
+#define PORT_PMUXBIT2_IMPLEMENTED   { 0xDBFFFFF3, 0xC0C3FF0F, 0x000D0000 }
+#define PORT_PMUXBIT3_DEFAULT_VAL   { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_PMUXBIT3_IMPLEMENTED   { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_PMUXEN_DEFAULT_VAL     { 0x64000000, 0x3F3C0000, 0x00000000 }
+#define PORT_PMUXEN_IMPLEMENTED     { 0xDBFFFFFF, 0xC0C3FFFF, 0x000F7FFE }
+#define PORT_PULLEN_DEFAULT_VAL     { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_PULLEN_IMPLEMENTED     { 0xDBFFFFFF, 0xC0C3FFFF, 0x000FFFFF }
+#define PORT_SLEWLIM                0
+#define PORT_SLEWLIM_DEFAULT_VAL    { 0x00000000, 0x00000000, 0x00000000 }
+#define PORT_SLEWLIM_IMPLEMENTED    { 0x00000000, 0x00000000, 0x00000000 }
+
+#endif /* _SAMD21_PORT_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/rtc.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/rtc.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/rtc.h	(revision 136)
@@ -0,0 +1,117 @@
+/**
+ * \file
+ *
+ * \brief Instance description for RTC
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_RTC_INSTANCE_
+#define _SAMD21_RTC_INSTANCE_
+
+/* ========== Register definition for RTC peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_RTC_READREQ            (0x40001402U) /**< \brief (RTC) Read Request */
+#define REG_RTC_STATUS             (0x4000140AU) /**< \brief (RTC) Status */
+#define REG_RTC_DBGCTRL            (0x4000140BU) /**< \brief (RTC) Debug Control */
+#define REG_RTC_FREQCORR           (0x4000140CU) /**< \brief (RTC) Frequency Correction */
+#define REG_RTC_MODE0_CTRL         (0x40001400U) /**< \brief (RTC) MODE0 Control */
+#define REG_RTC_MODE0_EVCTRL       (0x40001404U) /**< \brief (RTC) MODE0 Event Control */
+#define REG_RTC_MODE0_INTENCLR     (0x40001406U) /**< \brief (RTC) MODE0 Interrupt Enable Clear */
+#define REG_RTC_MODE0_INTENSET     (0x40001407U) /**< \brief (RTC) MODE0 Interrupt Enable Set */
+#define REG_RTC_MODE0_INTFLAG      (0x40001408U) /**< \brief (RTC) MODE0 Interrupt Flag Status and Clear */
+#define REG_RTC_MODE0_COUNT        (0x40001410U) /**< \brief (RTC) MODE0 Counter Value */
+#define REG_RTC_MODE0_COMP0        (0x40001418U) /**< \brief (RTC) MODE0 Compare 0 Value */
+#define REG_RTC_MODE1_CTRL         (0x40001400U) /**< \brief (RTC) MODE1 Control */
+#define REG_RTC_MODE1_EVCTRL       (0x40001404U) /**< \brief (RTC) MODE1 Event Control */
+#define REG_RTC_MODE1_INTENCLR     (0x40001406U) /**< \brief (RTC) MODE1 Interrupt Enable Clear */
+#define REG_RTC_MODE1_INTENSET     (0x40001407U) /**< \brief (RTC) MODE1 Interrupt Enable Set */
+#define REG_RTC_MODE1_INTFLAG      (0x40001408U) /**< \brief (RTC) MODE1 Interrupt Flag Status and Clear */
+#define REG_RTC_MODE1_COUNT        (0x40001410U) /**< \brief (RTC) MODE1 Counter Value */
+#define REG_RTC_MODE1_PER          (0x40001414U) /**< \brief (RTC) MODE1 Counter Period */
+#define REG_RTC_MODE1_COMP0        (0x40001418U) /**< \brief (RTC) MODE1 Compare 0 Value */
+#define REG_RTC_MODE1_COMP1        (0x4000141AU) /**< \brief (RTC) MODE1 Compare 1 Value */
+#define REG_RTC_MODE2_CTRL         (0x40001400U) /**< \brief (RTC) MODE2 Control */
+#define REG_RTC_MODE2_EVCTRL       (0x40001404U) /**< \brief (RTC) MODE2 Event Control */
+#define REG_RTC_MODE2_INTENCLR     (0x40001406U) /**< \brief (RTC) MODE2 Interrupt Enable Clear */
+#define REG_RTC_MODE2_INTENSET     (0x40001407U) /**< \brief (RTC) MODE2 Interrupt Enable Set */
+#define REG_RTC_MODE2_INTFLAG      (0x40001408U) /**< \brief (RTC) MODE2 Interrupt Flag Status and Clear */
+#define REG_RTC_MODE2_CLOCK        (0x40001410U) /**< \brief (RTC) MODE2 Clock Value */
+#define REG_RTC_MODE2_ALARM_ALARM0 (0x40001418U) /**< \brief (RTC) MODE2_ALARM Alarm 0 Value */
+#define REG_RTC_MODE2_ALARM_MASK0  (0x4000141CU) /**< \brief (RTC) MODE2_ALARM Alarm 0 Mask */
+#else
+#define REG_RTC_READREQ            (*(RwReg16*)0x40001402U) /**< \brief (RTC) Read Request */
+#define REG_RTC_STATUS             (*(RwReg8 *)0x4000140AU) /**< \brief (RTC) Status */
+#define REG_RTC_DBGCTRL            (*(RwReg8 *)0x4000140BU) /**< \brief (RTC) Debug Control */
+#define REG_RTC_FREQCORR           (*(RwReg8 *)0x4000140CU) /**< \brief (RTC) Frequency Correction */
+#define REG_RTC_MODE0_CTRL         (*(RwReg16*)0x40001400U) /**< \brief (RTC) MODE0 Control */
+#define REG_RTC_MODE0_EVCTRL       (*(RwReg16*)0x40001404U) /**< \brief (RTC) MODE0 Event Control */
+#define REG_RTC_MODE0_INTENCLR     (*(RwReg8 *)0x40001406U) /**< \brief (RTC) MODE0 Interrupt Enable Clear */
+#define REG_RTC_MODE0_INTENSET     (*(RwReg8 *)0x40001407U) /**< \brief (RTC) MODE0 Interrupt Enable Set */
+#define REG_RTC_MODE0_INTFLAG      (*(RwReg8 *)0x40001408U) /**< \brief (RTC) MODE0 Interrupt Flag Status and Clear */
+#define REG_RTC_MODE0_COUNT        (*(RwReg  *)0x40001410U) /**< \brief (RTC) MODE0 Counter Value */
+#define REG_RTC_MODE0_COMP0        (*(RwReg  *)0x40001418U) /**< \brief (RTC) MODE0 Compare 0 Value */
+#define REG_RTC_MODE1_CTRL         (*(RwReg16*)0x40001400U) /**< \brief (RTC) MODE1 Control */
+#define REG_RTC_MODE1_EVCTRL       (*(RwReg16*)0x40001404U) /**< \brief (RTC) MODE1 Event Control */
+#define REG_RTC_MODE1_INTENCLR     (*(RwReg8 *)0x40001406U) /**< \brief (RTC) MODE1 Interrupt Enable Clear */
+#define REG_RTC_MODE1_INTENSET     (*(RwReg8 *)0x40001407U) /**< \brief (RTC) MODE1 Interrupt Enable Set */
+#define REG_RTC_MODE1_INTFLAG      (*(RwReg8 *)0x40001408U) /**< \brief (RTC) MODE1 Interrupt Flag Status and Clear */
+#define REG_RTC_MODE1_COUNT        (*(RwReg16*)0x40001410U) /**< \brief (RTC) MODE1 Counter Value */
+#define REG_RTC_MODE1_PER          (*(RwReg16*)0x40001414U) /**< \brief (RTC) MODE1 Counter Period */
+#define REG_RTC_MODE1_COMP0        (*(RwReg16*)0x40001418U) /**< \brief (RTC) MODE1 Compare 0 Value */
+#define REG_RTC_MODE1_COMP1        (*(RwReg16*)0x4000141AU) /**< \brief (RTC) MODE1 Compare 1 Value */
+#define REG_RTC_MODE2_CTRL         (*(RwReg16*)0x40001400U) /**< \brief (RTC) MODE2 Control */
+#define REG_RTC_MODE2_EVCTRL       (*(RwReg16*)0x40001404U) /**< \brief (RTC) MODE2 Event Control */
+#define REG_RTC_MODE2_INTENCLR     (*(RwReg8 *)0x40001406U) /**< \brief (RTC) MODE2 Interrupt Enable Clear */
+#define REG_RTC_MODE2_INTENSET     (*(RwReg8 *)0x40001407U) /**< \brief (RTC) MODE2 Interrupt Enable Set */
+#define REG_RTC_MODE2_INTFLAG      (*(RwReg8 *)0x40001408U) /**< \brief (RTC) MODE2 Interrupt Flag Status and Clear */
+#define REG_RTC_MODE2_CLOCK        (*(RwReg  *)0x40001410U) /**< \brief (RTC) MODE2 Clock Value */
+#define REG_RTC_MODE2_ALARM_ALARM0 (*(RwReg  *)0x40001418U) /**< \brief (RTC) MODE2_ALARM Alarm 0 Value */
+#define REG_RTC_MODE2_ALARM_MASK0  (*(RwReg  *)0x4000141CU) /**< \brief (RTC) MODE2_ALARM Alarm 0 Mask */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for RTC peripheral ========== */
+#define RTC_ALARM_NUM               1
+#define RTC_COMP16_NUM              2
+#define RTC_COMP32_NUM              RTC_ALARM_NUM
+#define RTC_GCLK_ID                 4
+#define RTC_NUM_OF_ALARMS           RTC_ALARM_NUM
+#define RTC_NUM_OF_COMP16           RTC_COMP16_NUM
+#define RTC_NUM_OF_COMP32           RTC_COMP32_NUM
+
+#endif /* _SAMD21_RTC_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom0.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom0.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom0.h	(revision 136)
@@ -0,0 +1,143 @@
+/**
+ * \file
+ *
+ * \brief Instance description for SERCOM0
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_SERCOM0_INSTANCE_
+#define _SAMD21_SERCOM0_INSTANCE_
+
+/* ========== Register definition for SERCOM0 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_SERCOM0_I2CM_CTRLA     (0x42000800U) /**< \brief (SERCOM0) I2CM Control A */
+#define REG_SERCOM0_I2CM_CTRLB     (0x42000804U) /**< \brief (SERCOM0) I2CM Control B */
+#define REG_SERCOM0_I2CM_BAUD      (0x4200080CU) /**< \brief (SERCOM0) I2CM Baud Rate */
+#define REG_SERCOM0_I2CM_INTENCLR  (0x42000814U) /**< \brief (SERCOM0) I2CM Interrupt Enable Clear */
+#define REG_SERCOM0_I2CM_INTENSET  (0x42000816U) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */
+#define REG_SERCOM0_I2CM_INTFLAG   (0x42000818U) /**< \brief (SERCOM0) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM0_I2CM_STATUS    (0x4200081AU) /**< \brief (SERCOM0) I2CM Status */
+#define REG_SERCOM0_I2CM_SYNCBUSY  (0x4200081CU) /**< \brief (SERCOM0) I2CM Syncbusy */
+#define REG_SERCOM0_I2CM_ADDR      (0x42000824U) /**< \brief (SERCOM0) I2CM Address */
+#define REG_SERCOM0_I2CM_DATA      (0x42000828U) /**< \brief (SERCOM0) I2CM Data */
+#define REG_SERCOM0_I2CM_DBGCTRL   (0x42000830U) /**< \brief (SERCOM0) I2CM Debug Control */
+#define REG_SERCOM0_I2CS_CTRLA     (0x42000800U) /**< \brief (SERCOM0) I2CS Control A */
+#define REG_SERCOM0_I2CS_CTRLB     (0x42000804U) /**< \brief (SERCOM0) I2CS Control B */
+#define REG_SERCOM0_I2CS_INTENCLR  (0x42000814U) /**< \brief (SERCOM0) I2CS Interrupt Enable Clear */
+#define REG_SERCOM0_I2CS_INTENSET  (0x42000816U) /**< \brief (SERCOM0) I2CS Interrupt Enable Set */
+#define REG_SERCOM0_I2CS_INTFLAG   (0x42000818U) /**< \brief (SERCOM0) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM0_I2CS_STATUS    (0x4200081AU) /**< \brief (SERCOM0) I2CS Status */
+#define REG_SERCOM0_I2CS_SYNCBUSY  (0x4200081CU) /**< \brief (SERCOM0) I2CS Syncbusy */
+#define REG_SERCOM0_I2CS_ADDR      (0x42000824U) /**< \brief (SERCOM0) I2CS Address */
+#define REG_SERCOM0_I2CS_DATA      (0x42000828U) /**< \brief (SERCOM0) I2CS Data */
+#define REG_SERCOM0_SPI_CTRLA      (0x42000800U) /**< \brief (SERCOM0) SPI Control A */
+#define REG_SERCOM0_SPI_CTRLB      (0x42000804U) /**< \brief (SERCOM0) SPI Control B */
+#define REG_SERCOM0_SPI_BAUD       (0x4200080CU) /**< \brief (SERCOM0) SPI Baud Rate */
+#define REG_SERCOM0_SPI_INTENCLR   (0x42000814U) /**< \brief (SERCOM0) SPI Interrupt Enable Clear */
+#define REG_SERCOM0_SPI_INTENSET   (0x42000816U) /**< \brief (SERCOM0) SPI Interrupt Enable Set */
+#define REG_SERCOM0_SPI_INTFLAG    (0x42000818U) /**< \brief (SERCOM0) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM0_SPI_STATUS     (0x4200081AU) /**< \brief (SERCOM0) SPI Status */
+#define REG_SERCOM0_SPI_SYNCBUSY   (0x4200081CU) /**< \brief (SERCOM0) SPI Syncbusy */
+#define REG_SERCOM0_SPI_ADDR       (0x42000824U) /**< \brief (SERCOM0) SPI Address */
+#define REG_SERCOM0_SPI_DATA       (0x42000828U) /**< \brief (SERCOM0) SPI Data */
+#define REG_SERCOM0_SPI_DBGCTRL    (0x42000830U) /**< \brief (SERCOM0) SPI Debug Control */
+#define REG_SERCOM0_USART_CTRLA    (0x42000800U) /**< \brief (SERCOM0) USART Control A */
+#define REG_SERCOM0_USART_CTRLB    (0x42000804U) /**< \brief (SERCOM0) USART Control B */
+#define REG_SERCOM0_USART_BAUD     (0x4200080CU) /**< \brief (SERCOM0) USART Baud Rate */
+#define REG_SERCOM0_USART_RXPL     (0x4200080EU) /**< \brief (SERCOM0) USART Receive Pulse Length */
+#define REG_SERCOM0_USART_INTENCLR (0x42000814U) /**< \brief (SERCOM0) USART Interrupt Enable Clear */
+#define REG_SERCOM0_USART_INTENSET (0x42000816U) /**< \brief (SERCOM0) USART Interrupt Enable Set */
+#define REG_SERCOM0_USART_INTFLAG  (0x42000818U) /**< \brief (SERCOM0) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM0_USART_STATUS   (0x4200081AU) /**< \brief (SERCOM0) USART Status */
+#define REG_SERCOM0_USART_SYNCBUSY (0x4200081CU) /**< \brief (SERCOM0) USART Syncbusy */
+#define REG_SERCOM0_USART_DATA     (0x42000828U) /**< \brief (SERCOM0) USART Data */
+#define REG_SERCOM0_USART_DBGCTRL  (0x42000830U) /**< \brief (SERCOM0) USART Debug Control */
+#else
+#define REG_SERCOM0_I2CM_CTRLA     (*(RwReg  *)0x42000800U) /**< \brief (SERCOM0) I2CM Control A */
+#define REG_SERCOM0_I2CM_CTRLB     (*(RwReg  *)0x42000804U) /**< \brief (SERCOM0) I2CM Control B */
+#define REG_SERCOM0_I2CM_BAUD      (*(RwReg  *)0x4200080CU) /**< \brief (SERCOM0) I2CM Baud Rate */
+#define REG_SERCOM0_I2CM_INTENCLR  (*(RwReg8 *)0x42000814U) /**< \brief (SERCOM0) I2CM Interrupt Enable Clear */
+#define REG_SERCOM0_I2CM_INTENSET  (*(RwReg8 *)0x42000816U) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */
+#define REG_SERCOM0_I2CM_INTFLAG   (*(RwReg8 *)0x42000818U) /**< \brief (SERCOM0) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM0_I2CM_STATUS    (*(RwReg16*)0x4200081AU) /**< \brief (SERCOM0) I2CM Status */
+#define REG_SERCOM0_I2CM_SYNCBUSY  (*(RoReg  *)0x4200081CU) /**< \brief (SERCOM0) I2CM Syncbusy */
+#define REG_SERCOM0_I2CM_ADDR      (*(RwReg  *)0x42000824U) /**< \brief (SERCOM0) I2CM Address */
+#define REG_SERCOM0_I2CM_DATA      (*(RwReg8 *)0x42000828U) /**< \brief (SERCOM0) I2CM Data */
+#define REG_SERCOM0_I2CM_DBGCTRL   (*(RwReg8 *)0x42000830U) /**< \brief (SERCOM0) I2CM Debug Control */
+#define REG_SERCOM0_I2CS_CTRLA     (*(RwReg  *)0x42000800U) /**< \brief (SERCOM0) I2CS Control A */
+#define REG_SERCOM0_I2CS_CTRLB     (*(RwReg  *)0x42000804U) /**< \brief (SERCOM0) I2CS Control B */
+#define REG_SERCOM0_I2CS_INTENCLR  (*(RwReg8 *)0x42000814U) /**< \brief (SERCOM0) I2CS Interrupt Enable Clear */
+#define REG_SERCOM0_I2CS_INTENSET  (*(RwReg8 *)0x42000816U) /**< \brief (SERCOM0) I2CS Interrupt Enable Set */
+#define REG_SERCOM0_I2CS_INTFLAG   (*(RwReg8 *)0x42000818U) /**< \brief (SERCOM0) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM0_I2CS_STATUS    (*(RwReg16*)0x4200081AU) /**< \brief (SERCOM0) I2CS Status */
+#define REG_SERCOM0_I2CS_SYNCBUSY  (*(RoReg  *)0x4200081CU) /**< \brief (SERCOM0) I2CS Syncbusy */
+#define REG_SERCOM0_I2CS_ADDR      (*(RwReg  *)0x42000824U) /**< \brief (SERCOM0) I2CS Address */
+#define REG_SERCOM0_I2CS_DATA      (*(RwReg8 *)0x42000828U) /**< \brief (SERCOM0) I2CS Data */
+#define REG_SERCOM0_SPI_CTRLA      (*(RwReg  *)0x42000800U) /**< \brief (SERCOM0) SPI Control A */
+#define REG_SERCOM0_SPI_CTRLB      (*(RwReg  *)0x42000804U) /**< \brief (SERCOM0) SPI Control B */
+#define REG_SERCOM0_SPI_BAUD       (*(RwReg8 *)0x4200080CU) /**< \brief (SERCOM0) SPI Baud Rate */
+#define REG_SERCOM0_SPI_INTENCLR   (*(RwReg8 *)0x42000814U) /**< \brief (SERCOM0) SPI Interrupt Enable Clear */
+#define REG_SERCOM0_SPI_INTENSET   (*(RwReg8 *)0x42000816U) /**< \brief (SERCOM0) SPI Interrupt Enable Set */
+#define REG_SERCOM0_SPI_INTFLAG    (*(RwReg8 *)0x42000818U) /**< \brief (SERCOM0) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM0_SPI_STATUS     (*(RwReg16*)0x4200081AU) /**< \brief (SERCOM0) SPI Status */
+#define REG_SERCOM0_SPI_SYNCBUSY   (*(RoReg  *)0x4200081CU) /**< \brief (SERCOM0) SPI Syncbusy */
+#define REG_SERCOM0_SPI_ADDR       (*(RwReg  *)0x42000824U) /**< \brief (SERCOM0) SPI Address */
+#define REG_SERCOM0_SPI_DATA       (*(RwReg  *)0x42000828U) /**< \brief (SERCOM0) SPI Data */
+#define REG_SERCOM0_SPI_DBGCTRL    (*(RwReg8 *)0x42000830U) /**< \brief (SERCOM0) SPI Debug Control */
+#define REG_SERCOM0_USART_CTRLA    (*(RwReg  *)0x42000800U) /**< \brief (SERCOM0) USART Control A */
+#define REG_SERCOM0_USART_CTRLB    (*(RwReg  *)0x42000804U) /**< \brief (SERCOM0) USART Control B */
+#define REG_SERCOM0_USART_BAUD     (*(RwReg16*)0x4200080CU) /**< \brief (SERCOM0) USART Baud Rate */
+#define REG_SERCOM0_USART_RXPL     (*(RwReg8 *)0x4200080EU) /**< \brief (SERCOM0) USART Receive Pulse Length */
+#define REG_SERCOM0_USART_INTENCLR (*(RwReg8 *)0x42000814U) /**< \brief (SERCOM0) USART Interrupt Enable Clear */
+#define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000816U) /**< \brief (SERCOM0) USART Interrupt Enable Set */
+#define REG_SERCOM0_USART_INTFLAG  (*(RwReg8 *)0x42000818U) /**< \brief (SERCOM0) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM0_USART_STATUS   (*(RwReg16*)0x4200081AU) /**< \brief (SERCOM0) USART Status */
+#define REG_SERCOM0_USART_SYNCBUSY (*(RoReg  *)0x4200081CU) /**< \brief (SERCOM0) USART Syncbusy */
+#define REG_SERCOM0_USART_DATA     (*(RwReg16*)0x42000828U) /**< \brief (SERCOM0) USART Data */
+#define REG_SERCOM0_USART_DBGCTRL  (*(RwReg8 *)0x42000830U) /**< \brief (SERCOM0) USART Debug Control */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for SERCOM0 peripheral ========== */
+#define SERCOM0_DMAC_ID_RX          1
+#define SERCOM0_DMAC_ID_TX          2
+#define SERCOM0_GCLK_ID_CORE        20
+#define SERCOM0_GCLK_ID_SLOW        19
+#define SERCOM0_INT_MSB             6
+
+#endif /* _SAMD21_SERCOM0_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom1.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom1.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom1.h	(revision 136)
@@ -0,0 +1,143 @@
+/**
+ * \file
+ *
+ * \brief Instance description for SERCOM1
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_SERCOM1_INSTANCE_
+#define _SAMD21_SERCOM1_INSTANCE_
+
+/* ========== Register definition for SERCOM1 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_SERCOM1_I2CM_CTRLA     (0x42000C00U) /**< \brief (SERCOM1) I2CM Control A */
+#define REG_SERCOM1_I2CM_CTRLB     (0x42000C04U) /**< \brief (SERCOM1) I2CM Control B */
+#define REG_SERCOM1_I2CM_BAUD      (0x42000C0CU) /**< \brief (SERCOM1) I2CM Baud Rate */
+#define REG_SERCOM1_I2CM_INTENCLR  (0x42000C14U) /**< \brief (SERCOM1) I2CM Interrupt Enable Clear */
+#define REG_SERCOM1_I2CM_INTENSET  (0x42000C16U) /**< \brief (SERCOM1) I2CM Interrupt Enable Set */
+#define REG_SERCOM1_I2CM_INTFLAG   (0x42000C18U) /**< \brief (SERCOM1) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM1_I2CM_STATUS    (0x42000C1AU) /**< \brief (SERCOM1) I2CM Status */
+#define REG_SERCOM1_I2CM_SYNCBUSY  (0x42000C1CU) /**< \brief (SERCOM1) I2CM Syncbusy */
+#define REG_SERCOM1_I2CM_ADDR      (0x42000C24U) /**< \brief (SERCOM1) I2CM Address */
+#define REG_SERCOM1_I2CM_DATA      (0x42000C28U) /**< \brief (SERCOM1) I2CM Data */
+#define REG_SERCOM1_I2CM_DBGCTRL   (0x42000C30U) /**< \brief (SERCOM1) I2CM Debug Control */
+#define REG_SERCOM1_I2CS_CTRLA     (0x42000C00U) /**< \brief (SERCOM1) I2CS Control A */
+#define REG_SERCOM1_I2CS_CTRLB     (0x42000C04U) /**< \brief (SERCOM1) I2CS Control B */
+#define REG_SERCOM1_I2CS_INTENCLR  (0x42000C14U) /**< \brief (SERCOM1) I2CS Interrupt Enable Clear */
+#define REG_SERCOM1_I2CS_INTENSET  (0x42000C16U) /**< \brief (SERCOM1) I2CS Interrupt Enable Set */
+#define REG_SERCOM1_I2CS_INTFLAG   (0x42000C18U) /**< \brief (SERCOM1) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM1_I2CS_STATUS    (0x42000C1AU) /**< \brief (SERCOM1) I2CS Status */
+#define REG_SERCOM1_I2CS_SYNCBUSY  (0x42000C1CU) /**< \brief (SERCOM1) I2CS Syncbusy */
+#define REG_SERCOM1_I2CS_ADDR      (0x42000C24U) /**< \brief (SERCOM1) I2CS Address */
+#define REG_SERCOM1_I2CS_DATA      (0x42000C28U) /**< \brief (SERCOM1) I2CS Data */
+#define REG_SERCOM1_SPI_CTRLA      (0x42000C00U) /**< \brief (SERCOM1) SPI Control A */
+#define REG_SERCOM1_SPI_CTRLB      (0x42000C04U) /**< \brief (SERCOM1) SPI Control B */
+#define REG_SERCOM1_SPI_BAUD       (0x42000C0CU) /**< \brief (SERCOM1) SPI Baud Rate */
+#define REG_SERCOM1_SPI_INTENCLR   (0x42000C14U) /**< \brief (SERCOM1) SPI Interrupt Enable Clear */
+#define REG_SERCOM1_SPI_INTENSET   (0x42000C16U) /**< \brief (SERCOM1) SPI Interrupt Enable Set */
+#define REG_SERCOM1_SPI_INTFLAG    (0x42000C18U) /**< \brief (SERCOM1) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM1_SPI_STATUS     (0x42000C1AU) /**< \brief (SERCOM1) SPI Status */
+#define REG_SERCOM1_SPI_SYNCBUSY   (0x42000C1CU) /**< \brief (SERCOM1) SPI Syncbusy */
+#define REG_SERCOM1_SPI_ADDR       (0x42000C24U) /**< \brief (SERCOM1) SPI Address */
+#define REG_SERCOM1_SPI_DATA       (0x42000C28U) /**< \brief (SERCOM1) SPI Data */
+#define REG_SERCOM1_SPI_DBGCTRL    (0x42000C30U) /**< \brief (SERCOM1) SPI Debug Control */
+#define REG_SERCOM1_USART_CTRLA    (0x42000C00U) /**< \brief (SERCOM1) USART Control A */
+#define REG_SERCOM1_USART_CTRLB    (0x42000C04U) /**< \brief (SERCOM1) USART Control B */
+#define REG_SERCOM1_USART_BAUD     (0x42000C0CU) /**< \brief (SERCOM1) USART Baud Rate */
+#define REG_SERCOM1_USART_RXPL     (0x42000C0EU) /**< \brief (SERCOM1) USART Receive Pulse Length */
+#define REG_SERCOM1_USART_INTENCLR (0x42000C14U) /**< \brief (SERCOM1) USART Interrupt Enable Clear */
+#define REG_SERCOM1_USART_INTENSET (0x42000C16U) /**< \brief (SERCOM1) USART Interrupt Enable Set */
+#define REG_SERCOM1_USART_INTFLAG  (0x42000C18U) /**< \brief (SERCOM1) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM1_USART_STATUS   (0x42000C1AU) /**< \brief (SERCOM1) USART Status */
+#define REG_SERCOM1_USART_SYNCBUSY (0x42000C1CU) /**< \brief (SERCOM1) USART Syncbusy */
+#define REG_SERCOM1_USART_DATA     (0x42000C28U) /**< \brief (SERCOM1) USART Data */
+#define REG_SERCOM1_USART_DBGCTRL  (0x42000C30U) /**< \brief (SERCOM1) USART Debug Control */
+#else
+#define REG_SERCOM1_I2CM_CTRLA     (*(RwReg  *)0x42000C00U) /**< \brief (SERCOM1) I2CM Control A */
+#define REG_SERCOM1_I2CM_CTRLB     (*(RwReg  *)0x42000C04U) /**< \brief (SERCOM1) I2CM Control B */
+#define REG_SERCOM1_I2CM_BAUD      (*(RwReg  *)0x42000C0CU) /**< \brief (SERCOM1) I2CM Baud Rate */
+#define REG_SERCOM1_I2CM_INTENCLR  (*(RwReg8 *)0x42000C14U) /**< \brief (SERCOM1) I2CM Interrupt Enable Clear */
+#define REG_SERCOM1_I2CM_INTENSET  (*(RwReg8 *)0x42000C16U) /**< \brief (SERCOM1) I2CM Interrupt Enable Set */
+#define REG_SERCOM1_I2CM_INTFLAG   (*(RwReg8 *)0x42000C18U) /**< \brief (SERCOM1) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM1_I2CM_STATUS    (*(RwReg16*)0x42000C1AU) /**< \brief (SERCOM1) I2CM Status */
+#define REG_SERCOM1_I2CM_SYNCBUSY  (*(RoReg  *)0x42000C1CU) /**< \brief (SERCOM1) I2CM Syncbusy */
+#define REG_SERCOM1_I2CM_ADDR      (*(RwReg  *)0x42000C24U) /**< \brief (SERCOM1) I2CM Address */
+#define REG_SERCOM1_I2CM_DATA      (*(RwReg8 *)0x42000C28U) /**< \brief (SERCOM1) I2CM Data */
+#define REG_SERCOM1_I2CM_DBGCTRL   (*(RwReg8 *)0x42000C30U) /**< \brief (SERCOM1) I2CM Debug Control */
+#define REG_SERCOM1_I2CS_CTRLA     (*(RwReg  *)0x42000C00U) /**< \brief (SERCOM1) I2CS Control A */
+#define REG_SERCOM1_I2CS_CTRLB     (*(RwReg  *)0x42000C04U) /**< \brief (SERCOM1) I2CS Control B */
+#define REG_SERCOM1_I2CS_INTENCLR  (*(RwReg8 *)0x42000C14U) /**< \brief (SERCOM1) I2CS Interrupt Enable Clear */
+#define REG_SERCOM1_I2CS_INTENSET  (*(RwReg8 *)0x42000C16U) /**< \brief (SERCOM1) I2CS Interrupt Enable Set */
+#define REG_SERCOM1_I2CS_INTFLAG   (*(RwReg8 *)0x42000C18U) /**< \brief (SERCOM1) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM1_I2CS_STATUS    (*(RwReg16*)0x42000C1AU) /**< \brief (SERCOM1) I2CS Status */
+#define REG_SERCOM1_I2CS_SYNCBUSY  (*(RoReg  *)0x42000C1CU) /**< \brief (SERCOM1) I2CS Syncbusy */
+#define REG_SERCOM1_I2CS_ADDR      (*(RwReg  *)0x42000C24U) /**< \brief (SERCOM1) I2CS Address */
+#define REG_SERCOM1_I2CS_DATA      (*(RwReg8 *)0x42000C28U) /**< \brief (SERCOM1) I2CS Data */
+#define REG_SERCOM1_SPI_CTRLA      (*(RwReg  *)0x42000C00U) /**< \brief (SERCOM1) SPI Control A */
+#define REG_SERCOM1_SPI_CTRLB      (*(RwReg  *)0x42000C04U) /**< \brief (SERCOM1) SPI Control B */
+#define REG_SERCOM1_SPI_BAUD       (*(RwReg8 *)0x42000C0CU) /**< \brief (SERCOM1) SPI Baud Rate */
+#define REG_SERCOM1_SPI_INTENCLR   (*(RwReg8 *)0x42000C14U) /**< \brief (SERCOM1) SPI Interrupt Enable Clear */
+#define REG_SERCOM1_SPI_INTENSET   (*(RwReg8 *)0x42000C16U) /**< \brief (SERCOM1) SPI Interrupt Enable Set */
+#define REG_SERCOM1_SPI_INTFLAG    (*(RwReg8 *)0x42000C18U) /**< \brief (SERCOM1) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM1_SPI_STATUS     (*(RwReg16*)0x42000C1AU) /**< \brief (SERCOM1) SPI Status */
+#define REG_SERCOM1_SPI_SYNCBUSY   (*(RoReg  *)0x42000C1CU) /**< \brief (SERCOM1) SPI Syncbusy */
+#define REG_SERCOM1_SPI_ADDR       (*(RwReg  *)0x42000C24U) /**< \brief (SERCOM1) SPI Address */
+#define REG_SERCOM1_SPI_DATA       (*(RwReg  *)0x42000C28U) /**< \brief (SERCOM1) SPI Data */
+#define REG_SERCOM1_SPI_DBGCTRL    (*(RwReg8 *)0x42000C30U) /**< \brief (SERCOM1) SPI Debug Control */
+#define REG_SERCOM1_USART_CTRLA    (*(RwReg  *)0x42000C00U) /**< \brief (SERCOM1) USART Control A */
+#define REG_SERCOM1_USART_CTRLB    (*(RwReg  *)0x42000C04U) /**< \brief (SERCOM1) USART Control B */
+#define REG_SERCOM1_USART_BAUD     (*(RwReg16*)0x42000C0CU) /**< \brief (SERCOM1) USART Baud Rate */
+#define REG_SERCOM1_USART_RXPL     (*(RwReg8 *)0x42000C0EU) /**< \brief (SERCOM1) USART Receive Pulse Length */
+#define REG_SERCOM1_USART_INTENCLR (*(RwReg8 *)0x42000C14U) /**< \brief (SERCOM1) USART Interrupt Enable Clear */
+#define REG_SERCOM1_USART_INTENSET (*(RwReg8 *)0x42000C16U) /**< \brief (SERCOM1) USART Interrupt Enable Set */
+#define REG_SERCOM1_USART_INTFLAG  (*(RwReg8 *)0x42000C18U) /**< \brief (SERCOM1) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM1_USART_STATUS   (*(RwReg16*)0x42000C1AU) /**< \brief (SERCOM1) USART Status */
+#define REG_SERCOM1_USART_SYNCBUSY (*(RoReg  *)0x42000C1CU) /**< \brief (SERCOM1) USART Syncbusy */
+#define REG_SERCOM1_USART_DATA     (*(RwReg16*)0x42000C28U) /**< \brief (SERCOM1) USART Data */
+#define REG_SERCOM1_USART_DBGCTRL  (*(RwReg8 *)0x42000C30U) /**< \brief (SERCOM1) USART Debug Control */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for SERCOM1 peripheral ========== */
+#define SERCOM1_DMAC_ID_RX          3
+#define SERCOM1_DMAC_ID_TX          4
+#define SERCOM1_GCLK_ID_CORE        21
+#define SERCOM1_GCLK_ID_SLOW        19
+#define SERCOM1_INT_MSB             6
+
+#endif /* _SAMD21_SERCOM1_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom2.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom2.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom2.h	(revision 136)
@@ -0,0 +1,143 @@
+/**
+ * \file
+ *
+ * \brief Instance description for SERCOM2
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_SERCOM2_INSTANCE_
+#define _SAMD21_SERCOM2_INSTANCE_
+
+/* ========== Register definition for SERCOM2 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_SERCOM2_I2CM_CTRLA     (0x42001000U) /**< \brief (SERCOM2) I2CM Control A */
+#define REG_SERCOM2_I2CM_CTRLB     (0x42001004U) /**< \brief (SERCOM2) I2CM Control B */
+#define REG_SERCOM2_I2CM_BAUD      (0x4200100CU) /**< \brief (SERCOM2) I2CM Baud Rate */
+#define REG_SERCOM2_I2CM_INTENCLR  (0x42001014U) /**< \brief (SERCOM2) I2CM Interrupt Enable Clear */
+#define REG_SERCOM2_I2CM_INTENSET  (0x42001016U) /**< \brief (SERCOM2) I2CM Interrupt Enable Set */
+#define REG_SERCOM2_I2CM_INTFLAG   (0x42001018U) /**< \brief (SERCOM2) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM2_I2CM_STATUS    (0x4200101AU) /**< \brief (SERCOM2) I2CM Status */
+#define REG_SERCOM2_I2CM_SYNCBUSY  (0x4200101CU) /**< \brief (SERCOM2) I2CM Syncbusy */
+#define REG_SERCOM2_I2CM_ADDR      (0x42001024U) /**< \brief (SERCOM2) I2CM Address */
+#define REG_SERCOM2_I2CM_DATA      (0x42001028U) /**< \brief (SERCOM2) I2CM Data */
+#define REG_SERCOM2_I2CM_DBGCTRL   (0x42001030U) /**< \brief (SERCOM2) I2CM Debug Control */
+#define REG_SERCOM2_I2CS_CTRLA     (0x42001000U) /**< \brief (SERCOM2) I2CS Control A */
+#define REG_SERCOM2_I2CS_CTRLB     (0x42001004U) /**< \brief (SERCOM2) I2CS Control B */
+#define REG_SERCOM2_I2CS_INTENCLR  (0x42001014U) /**< \brief (SERCOM2) I2CS Interrupt Enable Clear */
+#define REG_SERCOM2_I2CS_INTENSET  (0x42001016U) /**< \brief (SERCOM2) I2CS Interrupt Enable Set */
+#define REG_SERCOM2_I2CS_INTFLAG   (0x42001018U) /**< \brief (SERCOM2) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM2_I2CS_STATUS    (0x4200101AU) /**< \brief (SERCOM2) I2CS Status */
+#define REG_SERCOM2_I2CS_SYNCBUSY  (0x4200101CU) /**< \brief (SERCOM2) I2CS Syncbusy */
+#define REG_SERCOM2_I2CS_ADDR      (0x42001024U) /**< \brief (SERCOM2) I2CS Address */
+#define REG_SERCOM2_I2CS_DATA      (0x42001028U) /**< \brief (SERCOM2) I2CS Data */
+#define REG_SERCOM2_SPI_CTRLA      (0x42001000U) /**< \brief (SERCOM2) SPI Control A */
+#define REG_SERCOM2_SPI_CTRLB      (0x42001004U) /**< \brief (SERCOM2) SPI Control B */
+#define REG_SERCOM2_SPI_BAUD       (0x4200100CU) /**< \brief (SERCOM2) SPI Baud Rate */
+#define REG_SERCOM2_SPI_INTENCLR   (0x42001014U) /**< \brief (SERCOM2) SPI Interrupt Enable Clear */
+#define REG_SERCOM2_SPI_INTENSET   (0x42001016U) /**< \brief (SERCOM2) SPI Interrupt Enable Set */
+#define REG_SERCOM2_SPI_INTFLAG    (0x42001018U) /**< \brief (SERCOM2) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM2_SPI_STATUS     (0x4200101AU) /**< \brief (SERCOM2) SPI Status */
+#define REG_SERCOM2_SPI_SYNCBUSY   (0x4200101CU) /**< \brief (SERCOM2) SPI Syncbusy */
+#define REG_SERCOM2_SPI_ADDR       (0x42001024U) /**< \brief (SERCOM2) SPI Address */
+#define REG_SERCOM2_SPI_DATA       (0x42001028U) /**< \brief (SERCOM2) SPI Data */
+#define REG_SERCOM2_SPI_DBGCTRL    (0x42001030U) /**< \brief (SERCOM2) SPI Debug Control */
+#define REG_SERCOM2_USART_CTRLA    (0x42001000U) /**< \brief (SERCOM2) USART Control A */
+#define REG_SERCOM2_USART_CTRLB    (0x42001004U) /**< \brief (SERCOM2) USART Control B */
+#define REG_SERCOM2_USART_BAUD     (0x4200100CU) /**< \brief (SERCOM2) USART Baud Rate */
+#define REG_SERCOM2_USART_RXPL     (0x4200100EU) /**< \brief (SERCOM2) USART Receive Pulse Length */
+#define REG_SERCOM2_USART_INTENCLR (0x42001014U) /**< \brief (SERCOM2) USART Interrupt Enable Clear */
+#define REG_SERCOM2_USART_INTENSET (0x42001016U) /**< \brief (SERCOM2) USART Interrupt Enable Set */
+#define REG_SERCOM2_USART_INTFLAG  (0x42001018U) /**< \brief (SERCOM2) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM2_USART_STATUS   (0x4200101AU) /**< \brief (SERCOM2) USART Status */
+#define REG_SERCOM2_USART_SYNCBUSY (0x4200101CU) /**< \brief (SERCOM2) USART Syncbusy */
+#define REG_SERCOM2_USART_DATA     (0x42001028U) /**< \brief (SERCOM2) USART Data */
+#define REG_SERCOM2_USART_DBGCTRL  (0x42001030U) /**< \brief (SERCOM2) USART Debug Control */
+#else
+#define REG_SERCOM2_I2CM_CTRLA     (*(RwReg  *)0x42001000U) /**< \brief (SERCOM2) I2CM Control A */
+#define REG_SERCOM2_I2CM_CTRLB     (*(RwReg  *)0x42001004U) /**< \brief (SERCOM2) I2CM Control B */
+#define REG_SERCOM2_I2CM_BAUD      (*(RwReg  *)0x4200100CU) /**< \brief (SERCOM2) I2CM Baud Rate */
+#define REG_SERCOM2_I2CM_INTENCLR  (*(RwReg8 *)0x42001014U) /**< \brief (SERCOM2) I2CM Interrupt Enable Clear */
+#define REG_SERCOM2_I2CM_INTENSET  (*(RwReg8 *)0x42001016U) /**< \brief (SERCOM2) I2CM Interrupt Enable Set */
+#define REG_SERCOM2_I2CM_INTFLAG   (*(RwReg8 *)0x42001018U) /**< \brief (SERCOM2) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM2_I2CM_STATUS    (*(RwReg16*)0x4200101AU) /**< \brief (SERCOM2) I2CM Status */
+#define REG_SERCOM2_I2CM_SYNCBUSY  (*(RoReg  *)0x4200101CU) /**< \brief (SERCOM2) I2CM Syncbusy */
+#define REG_SERCOM2_I2CM_ADDR      (*(RwReg  *)0x42001024U) /**< \brief (SERCOM2) I2CM Address */
+#define REG_SERCOM2_I2CM_DATA      (*(RwReg8 *)0x42001028U) /**< \brief (SERCOM2) I2CM Data */
+#define REG_SERCOM2_I2CM_DBGCTRL   (*(RwReg8 *)0x42001030U) /**< \brief (SERCOM2) I2CM Debug Control */
+#define REG_SERCOM2_I2CS_CTRLA     (*(RwReg  *)0x42001000U) /**< \brief (SERCOM2) I2CS Control A */
+#define REG_SERCOM2_I2CS_CTRLB     (*(RwReg  *)0x42001004U) /**< \brief (SERCOM2) I2CS Control B */
+#define REG_SERCOM2_I2CS_INTENCLR  (*(RwReg8 *)0x42001014U) /**< \brief (SERCOM2) I2CS Interrupt Enable Clear */
+#define REG_SERCOM2_I2CS_INTENSET  (*(RwReg8 *)0x42001016U) /**< \brief (SERCOM2) I2CS Interrupt Enable Set */
+#define REG_SERCOM2_I2CS_INTFLAG   (*(RwReg8 *)0x42001018U) /**< \brief (SERCOM2) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM2_I2CS_STATUS    (*(RwReg16*)0x4200101AU) /**< \brief (SERCOM2) I2CS Status */
+#define REG_SERCOM2_I2CS_SYNCBUSY  (*(RoReg  *)0x4200101CU) /**< \brief (SERCOM2) I2CS Syncbusy */
+#define REG_SERCOM2_I2CS_ADDR      (*(RwReg  *)0x42001024U) /**< \brief (SERCOM2) I2CS Address */
+#define REG_SERCOM2_I2CS_DATA      (*(RwReg8 *)0x42001028U) /**< \brief (SERCOM2) I2CS Data */
+#define REG_SERCOM2_SPI_CTRLA      (*(RwReg  *)0x42001000U) /**< \brief (SERCOM2) SPI Control A */
+#define REG_SERCOM2_SPI_CTRLB      (*(RwReg  *)0x42001004U) /**< \brief (SERCOM2) SPI Control B */
+#define REG_SERCOM2_SPI_BAUD       (*(RwReg8 *)0x4200100CU) /**< \brief (SERCOM2) SPI Baud Rate */
+#define REG_SERCOM2_SPI_INTENCLR   (*(RwReg8 *)0x42001014U) /**< \brief (SERCOM2) SPI Interrupt Enable Clear */
+#define REG_SERCOM2_SPI_INTENSET   (*(RwReg8 *)0x42001016U) /**< \brief (SERCOM2) SPI Interrupt Enable Set */
+#define REG_SERCOM2_SPI_INTFLAG    (*(RwReg8 *)0x42001018U) /**< \brief (SERCOM2) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM2_SPI_STATUS     (*(RwReg16*)0x4200101AU) /**< \brief (SERCOM2) SPI Status */
+#define REG_SERCOM2_SPI_SYNCBUSY   (*(RoReg  *)0x4200101CU) /**< \brief (SERCOM2) SPI Syncbusy */
+#define REG_SERCOM2_SPI_ADDR       (*(RwReg  *)0x42001024U) /**< \brief (SERCOM2) SPI Address */
+#define REG_SERCOM2_SPI_DATA       (*(RwReg  *)0x42001028U) /**< \brief (SERCOM2) SPI Data */
+#define REG_SERCOM2_SPI_DBGCTRL    (*(RwReg8 *)0x42001030U) /**< \brief (SERCOM2) SPI Debug Control */
+#define REG_SERCOM2_USART_CTRLA    (*(RwReg  *)0x42001000U) /**< \brief (SERCOM2) USART Control A */
+#define REG_SERCOM2_USART_CTRLB    (*(RwReg  *)0x42001004U) /**< \brief (SERCOM2) USART Control B */
+#define REG_SERCOM2_USART_BAUD     (*(RwReg16*)0x4200100CU) /**< \brief (SERCOM2) USART Baud Rate */
+#define REG_SERCOM2_USART_RXPL     (*(RwReg8 *)0x4200100EU) /**< \brief (SERCOM2) USART Receive Pulse Length */
+#define REG_SERCOM2_USART_INTENCLR (*(RwReg8 *)0x42001014U) /**< \brief (SERCOM2) USART Interrupt Enable Clear */
+#define REG_SERCOM2_USART_INTENSET (*(RwReg8 *)0x42001016U) /**< \brief (SERCOM2) USART Interrupt Enable Set */
+#define REG_SERCOM2_USART_INTFLAG  (*(RwReg8 *)0x42001018U) /**< \brief (SERCOM2) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM2_USART_STATUS   (*(RwReg16*)0x4200101AU) /**< \brief (SERCOM2) USART Status */
+#define REG_SERCOM2_USART_SYNCBUSY (*(RoReg  *)0x4200101CU) /**< \brief (SERCOM2) USART Syncbusy */
+#define REG_SERCOM2_USART_DATA     (*(RwReg16*)0x42001028U) /**< \brief (SERCOM2) USART Data */
+#define REG_SERCOM2_USART_DBGCTRL  (*(RwReg8 *)0x42001030U) /**< \brief (SERCOM2) USART Debug Control */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for SERCOM2 peripheral ========== */
+#define SERCOM2_DMAC_ID_RX          5
+#define SERCOM2_DMAC_ID_TX          6
+#define SERCOM2_GCLK_ID_CORE        22
+#define SERCOM2_GCLK_ID_SLOW        19
+#define SERCOM2_INT_MSB             6
+
+#endif /* _SAMD21_SERCOM2_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom3.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom3.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom3.h	(revision 136)
@@ -0,0 +1,143 @@
+/**
+ * \file
+ *
+ * \brief Instance description for SERCOM3
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_SERCOM3_INSTANCE_
+#define _SAMD21_SERCOM3_INSTANCE_
+
+/* ========== Register definition for SERCOM3 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_SERCOM3_I2CM_CTRLA     (0x42001400U) /**< \brief (SERCOM3) I2CM Control A */
+#define REG_SERCOM3_I2CM_CTRLB     (0x42001404U) /**< \brief (SERCOM3) I2CM Control B */
+#define REG_SERCOM3_I2CM_BAUD      (0x4200140CU) /**< \brief (SERCOM3) I2CM Baud Rate */
+#define REG_SERCOM3_I2CM_INTENCLR  (0x42001414U) /**< \brief (SERCOM3) I2CM Interrupt Enable Clear */
+#define REG_SERCOM3_I2CM_INTENSET  (0x42001416U) /**< \brief (SERCOM3) I2CM Interrupt Enable Set */
+#define REG_SERCOM3_I2CM_INTFLAG   (0x42001418U) /**< \brief (SERCOM3) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM3_I2CM_STATUS    (0x4200141AU) /**< \brief (SERCOM3) I2CM Status */
+#define REG_SERCOM3_I2CM_SYNCBUSY  (0x4200141CU) /**< \brief (SERCOM3) I2CM Syncbusy */
+#define REG_SERCOM3_I2CM_ADDR      (0x42001424U) /**< \brief (SERCOM3) I2CM Address */
+#define REG_SERCOM3_I2CM_DATA      (0x42001428U) /**< \brief (SERCOM3) I2CM Data */
+#define REG_SERCOM3_I2CM_DBGCTRL   (0x42001430U) /**< \brief (SERCOM3) I2CM Debug Control */
+#define REG_SERCOM3_I2CS_CTRLA     (0x42001400U) /**< \brief (SERCOM3) I2CS Control A */
+#define REG_SERCOM3_I2CS_CTRLB     (0x42001404U) /**< \brief (SERCOM3) I2CS Control B */
+#define REG_SERCOM3_I2CS_INTENCLR  (0x42001414U) /**< \brief (SERCOM3) I2CS Interrupt Enable Clear */
+#define REG_SERCOM3_I2CS_INTENSET  (0x42001416U) /**< \brief (SERCOM3) I2CS Interrupt Enable Set */
+#define REG_SERCOM3_I2CS_INTFLAG   (0x42001418U) /**< \brief (SERCOM3) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM3_I2CS_STATUS    (0x4200141AU) /**< \brief (SERCOM3) I2CS Status */
+#define REG_SERCOM3_I2CS_SYNCBUSY  (0x4200141CU) /**< \brief (SERCOM3) I2CS Syncbusy */
+#define REG_SERCOM3_I2CS_ADDR      (0x42001424U) /**< \brief (SERCOM3) I2CS Address */
+#define REG_SERCOM3_I2CS_DATA      (0x42001428U) /**< \brief (SERCOM3) I2CS Data */
+#define REG_SERCOM3_SPI_CTRLA      (0x42001400U) /**< \brief (SERCOM3) SPI Control A */
+#define REG_SERCOM3_SPI_CTRLB      (0x42001404U) /**< \brief (SERCOM3) SPI Control B */
+#define REG_SERCOM3_SPI_BAUD       (0x4200140CU) /**< \brief (SERCOM3) SPI Baud Rate */
+#define REG_SERCOM3_SPI_INTENCLR   (0x42001414U) /**< \brief (SERCOM3) SPI Interrupt Enable Clear */
+#define REG_SERCOM3_SPI_INTENSET   (0x42001416U) /**< \brief (SERCOM3) SPI Interrupt Enable Set */
+#define REG_SERCOM3_SPI_INTFLAG    (0x42001418U) /**< \brief (SERCOM3) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM3_SPI_STATUS     (0x4200141AU) /**< \brief (SERCOM3) SPI Status */
+#define REG_SERCOM3_SPI_SYNCBUSY   (0x4200141CU) /**< \brief (SERCOM3) SPI Syncbusy */
+#define REG_SERCOM3_SPI_ADDR       (0x42001424U) /**< \brief (SERCOM3) SPI Address */
+#define REG_SERCOM3_SPI_DATA       (0x42001428U) /**< \brief (SERCOM3) SPI Data */
+#define REG_SERCOM3_SPI_DBGCTRL    (0x42001430U) /**< \brief (SERCOM3) SPI Debug Control */
+#define REG_SERCOM3_USART_CTRLA    (0x42001400U) /**< \brief (SERCOM3) USART Control A */
+#define REG_SERCOM3_USART_CTRLB    (0x42001404U) /**< \brief (SERCOM3) USART Control B */
+#define REG_SERCOM3_USART_BAUD     (0x4200140CU) /**< \brief (SERCOM3) USART Baud Rate */
+#define REG_SERCOM3_USART_RXPL     (0x4200140EU) /**< \brief (SERCOM3) USART Receive Pulse Length */
+#define REG_SERCOM3_USART_INTENCLR (0x42001414U) /**< \brief (SERCOM3) USART Interrupt Enable Clear */
+#define REG_SERCOM3_USART_INTENSET (0x42001416U) /**< \brief (SERCOM3) USART Interrupt Enable Set */
+#define REG_SERCOM3_USART_INTFLAG  (0x42001418U) /**< \brief (SERCOM3) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM3_USART_STATUS   (0x4200141AU) /**< \brief (SERCOM3) USART Status */
+#define REG_SERCOM3_USART_SYNCBUSY (0x4200141CU) /**< \brief (SERCOM3) USART Syncbusy */
+#define REG_SERCOM3_USART_DATA     (0x42001428U) /**< \brief (SERCOM3) USART Data */
+#define REG_SERCOM3_USART_DBGCTRL  (0x42001430U) /**< \brief (SERCOM3) USART Debug Control */
+#else
+#define REG_SERCOM3_I2CM_CTRLA     (*(RwReg  *)0x42001400U) /**< \brief (SERCOM3) I2CM Control A */
+#define REG_SERCOM3_I2CM_CTRLB     (*(RwReg  *)0x42001404U) /**< \brief (SERCOM3) I2CM Control B */
+#define REG_SERCOM3_I2CM_BAUD      (*(RwReg  *)0x4200140CU) /**< \brief (SERCOM3) I2CM Baud Rate */
+#define REG_SERCOM3_I2CM_INTENCLR  (*(RwReg8 *)0x42001414U) /**< \brief (SERCOM3) I2CM Interrupt Enable Clear */
+#define REG_SERCOM3_I2CM_INTENSET  (*(RwReg8 *)0x42001416U) /**< \brief (SERCOM3) I2CM Interrupt Enable Set */
+#define REG_SERCOM3_I2CM_INTFLAG   (*(RwReg8 *)0x42001418U) /**< \brief (SERCOM3) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM3_I2CM_STATUS    (*(RwReg16*)0x4200141AU) /**< \brief (SERCOM3) I2CM Status */
+#define REG_SERCOM3_I2CM_SYNCBUSY  (*(RoReg  *)0x4200141CU) /**< \brief (SERCOM3) I2CM Syncbusy */
+#define REG_SERCOM3_I2CM_ADDR      (*(RwReg  *)0x42001424U) /**< \brief (SERCOM3) I2CM Address */
+#define REG_SERCOM3_I2CM_DATA      (*(RwReg8 *)0x42001428U) /**< \brief (SERCOM3) I2CM Data */
+#define REG_SERCOM3_I2CM_DBGCTRL   (*(RwReg8 *)0x42001430U) /**< \brief (SERCOM3) I2CM Debug Control */
+#define REG_SERCOM3_I2CS_CTRLA     (*(RwReg  *)0x42001400U) /**< \brief (SERCOM3) I2CS Control A */
+#define REG_SERCOM3_I2CS_CTRLB     (*(RwReg  *)0x42001404U) /**< \brief (SERCOM3) I2CS Control B */
+#define REG_SERCOM3_I2CS_INTENCLR  (*(RwReg8 *)0x42001414U) /**< \brief (SERCOM3) I2CS Interrupt Enable Clear */
+#define REG_SERCOM3_I2CS_INTENSET  (*(RwReg8 *)0x42001416U) /**< \brief (SERCOM3) I2CS Interrupt Enable Set */
+#define REG_SERCOM3_I2CS_INTFLAG   (*(RwReg8 *)0x42001418U) /**< \brief (SERCOM3) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM3_I2CS_STATUS    (*(RwReg16*)0x4200141AU) /**< \brief (SERCOM3) I2CS Status */
+#define REG_SERCOM3_I2CS_SYNCBUSY  (*(RoReg  *)0x4200141CU) /**< \brief (SERCOM3) I2CS Syncbusy */
+#define REG_SERCOM3_I2CS_ADDR      (*(RwReg  *)0x42001424U) /**< \brief (SERCOM3) I2CS Address */
+#define REG_SERCOM3_I2CS_DATA      (*(RwReg8 *)0x42001428U) /**< \brief (SERCOM3) I2CS Data */
+#define REG_SERCOM3_SPI_CTRLA      (*(RwReg  *)0x42001400U) /**< \brief (SERCOM3) SPI Control A */
+#define REG_SERCOM3_SPI_CTRLB      (*(RwReg  *)0x42001404U) /**< \brief (SERCOM3) SPI Control B */
+#define REG_SERCOM3_SPI_BAUD       (*(RwReg8 *)0x4200140CU) /**< \brief (SERCOM3) SPI Baud Rate */
+#define REG_SERCOM3_SPI_INTENCLR   (*(RwReg8 *)0x42001414U) /**< \brief (SERCOM3) SPI Interrupt Enable Clear */
+#define REG_SERCOM3_SPI_INTENSET   (*(RwReg8 *)0x42001416U) /**< \brief (SERCOM3) SPI Interrupt Enable Set */
+#define REG_SERCOM3_SPI_INTFLAG    (*(RwReg8 *)0x42001418U) /**< \brief (SERCOM3) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM3_SPI_STATUS     (*(RwReg16*)0x4200141AU) /**< \brief (SERCOM3) SPI Status */
+#define REG_SERCOM3_SPI_SYNCBUSY   (*(RoReg  *)0x4200141CU) /**< \brief (SERCOM3) SPI Syncbusy */
+#define REG_SERCOM3_SPI_ADDR       (*(RwReg  *)0x42001424U) /**< \brief (SERCOM3) SPI Address */
+#define REG_SERCOM3_SPI_DATA       (*(RwReg  *)0x42001428U) /**< \brief (SERCOM3) SPI Data */
+#define REG_SERCOM3_SPI_DBGCTRL    (*(RwReg8 *)0x42001430U) /**< \brief (SERCOM3) SPI Debug Control */
+#define REG_SERCOM3_USART_CTRLA    (*(RwReg  *)0x42001400U) /**< \brief (SERCOM3) USART Control A */
+#define REG_SERCOM3_USART_CTRLB    (*(RwReg  *)0x42001404U) /**< \brief (SERCOM3) USART Control B */
+#define REG_SERCOM3_USART_BAUD     (*(RwReg16*)0x4200140CU) /**< \brief (SERCOM3) USART Baud Rate */
+#define REG_SERCOM3_USART_RXPL     (*(RwReg8 *)0x4200140EU) /**< \brief (SERCOM3) USART Receive Pulse Length */
+#define REG_SERCOM3_USART_INTENCLR (*(RwReg8 *)0x42001414U) /**< \brief (SERCOM3) USART Interrupt Enable Clear */
+#define REG_SERCOM3_USART_INTENSET (*(RwReg8 *)0x42001416U) /**< \brief (SERCOM3) USART Interrupt Enable Set */
+#define REG_SERCOM3_USART_INTFLAG  (*(RwReg8 *)0x42001418U) /**< \brief (SERCOM3) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM3_USART_STATUS   (*(RwReg16*)0x4200141AU) /**< \brief (SERCOM3) USART Status */
+#define REG_SERCOM3_USART_SYNCBUSY (*(RoReg  *)0x4200141CU) /**< \brief (SERCOM3) USART Syncbusy */
+#define REG_SERCOM3_USART_DATA     (*(RwReg16*)0x42001428U) /**< \brief (SERCOM3) USART Data */
+#define REG_SERCOM3_USART_DBGCTRL  (*(RwReg8 *)0x42001430U) /**< \brief (SERCOM3) USART Debug Control */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for SERCOM3 peripheral ========== */
+#define SERCOM3_DMAC_ID_RX          7
+#define SERCOM3_DMAC_ID_TX          8
+#define SERCOM3_GCLK_ID_CORE        23
+#define SERCOM3_GCLK_ID_SLOW        19
+#define SERCOM3_INT_MSB             6
+
+#endif /* _SAMD21_SERCOM3_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom4.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom4.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom4.h	(revision 136)
@@ -0,0 +1,143 @@
+/**
+ * \file
+ *
+ * \brief Instance description for SERCOM4
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_SERCOM4_INSTANCE_
+#define _SAMD21_SERCOM4_INSTANCE_
+
+/* ========== Register definition for SERCOM4 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_SERCOM4_I2CM_CTRLA     (0x42001800U) /**< \brief (SERCOM4) I2CM Control A */
+#define REG_SERCOM4_I2CM_CTRLB     (0x42001804U) /**< \brief (SERCOM4) I2CM Control B */
+#define REG_SERCOM4_I2CM_BAUD      (0x4200180CU) /**< \brief (SERCOM4) I2CM Baud Rate */
+#define REG_SERCOM4_I2CM_INTENCLR  (0x42001814U) /**< \brief (SERCOM4) I2CM Interrupt Enable Clear */
+#define REG_SERCOM4_I2CM_INTENSET  (0x42001816U) /**< \brief (SERCOM4) I2CM Interrupt Enable Set */
+#define REG_SERCOM4_I2CM_INTFLAG   (0x42001818U) /**< \brief (SERCOM4) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM4_I2CM_STATUS    (0x4200181AU) /**< \brief (SERCOM4) I2CM Status */
+#define REG_SERCOM4_I2CM_SYNCBUSY  (0x4200181CU) /**< \brief (SERCOM4) I2CM Syncbusy */
+#define REG_SERCOM4_I2CM_ADDR      (0x42001824U) /**< \brief (SERCOM4) I2CM Address */
+#define REG_SERCOM4_I2CM_DATA      (0x42001828U) /**< \brief (SERCOM4) I2CM Data */
+#define REG_SERCOM4_I2CM_DBGCTRL   (0x42001830U) /**< \brief (SERCOM4) I2CM Debug Control */
+#define REG_SERCOM4_I2CS_CTRLA     (0x42001800U) /**< \brief (SERCOM4) I2CS Control A */
+#define REG_SERCOM4_I2CS_CTRLB     (0x42001804U) /**< \brief (SERCOM4) I2CS Control B */
+#define REG_SERCOM4_I2CS_INTENCLR  (0x42001814U) /**< \brief (SERCOM4) I2CS Interrupt Enable Clear */
+#define REG_SERCOM4_I2CS_INTENSET  (0x42001816U) /**< \brief (SERCOM4) I2CS Interrupt Enable Set */
+#define REG_SERCOM4_I2CS_INTFLAG   (0x42001818U) /**< \brief (SERCOM4) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM4_I2CS_STATUS    (0x4200181AU) /**< \brief (SERCOM4) I2CS Status */
+#define REG_SERCOM4_I2CS_SYNCBUSY  (0x4200181CU) /**< \brief (SERCOM4) I2CS Syncbusy */
+#define REG_SERCOM4_I2CS_ADDR      (0x42001824U) /**< \brief (SERCOM4) I2CS Address */
+#define REG_SERCOM4_I2CS_DATA      (0x42001828U) /**< \brief (SERCOM4) I2CS Data */
+#define REG_SERCOM4_SPI_CTRLA      (0x42001800U) /**< \brief (SERCOM4) SPI Control A */
+#define REG_SERCOM4_SPI_CTRLB      (0x42001804U) /**< \brief (SERCOM4) SPI Control B */
+#define REG_SERCOM4_SPI_BAUD       (0x4200180CU) /**< \brief (SERCOM4) SPI Baud Rate */
+#define REG_SERCOM4_SPI_INTENCLR   (0x42001814U) /**< \brief (SERCOM4) SPI Interrupt Enable Clear */
+#define REG_SERCOM4_SPI_INTENSET   (0x42001816U) /**< \brief (SERCOM4) SPI Interrupt Enable Set */
+#define REG_SERCOM4_SPI_INTFLAG    (0x42001818U) /**< \brief (SERCOM4) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM4_SPI_STATUS     (0x4200181AU) /**< \brief (SERCOM4) SPI Status */
+#define REG_SERCOM4_SPI_SYNCBUSY   (0x4200181CU) /**< \brief (SERCOM4) SPI Syncbusy */
+#define REG_SERCOM4_SPI_ADDR       (0x42001824U) /**< \brief (SERCOM4) SPI Address */
+#define REG_SERCOM4_SPI_DATA       (0x42001828U) /**< \brief (SERCOM4) SPI Data */
+#define REG_SERCOM4_SPI_DBGCTRL    (0x42001830U) /**< \brief (SERCOM4) SPI Debug Control */
+#define REG_SERCOM4_USART_CTRLA    (0x42001800U) /**< \brief (SERCOM4) USART Control A */
+#define REG_SERCOM4_USART_CTRLB    (0x42001804U) /**< \brief (SERCOM4) USART Control B */
+#define REG_SERCOM4_USART_BAUD     (0x4200180CU) /**< \brief (SERCOM4) USART Baud Rate */
+#define REG_SERCOM4_USART_RXPL     (0x4200180EU) /**< \brief (SERCOM4) USART Receive Pulse Length */
+#define REG_SERCOM4_USART_INTENCLR (0x42001814U) /**< \brief (SERCOM4) USART Interrupt Enable Clear */
+#define REG_SERCOM4_USART_INTENSET (0x42001816U) /**< \brief (SERCOM4) USART Interrupt Enable Set */
+#define REG_SERCOM4_USART_INTFLAG  (0x42001818U) /**< \brief (SERCOM4) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM4_USART_STATUS   (0x4200181AU) /**< \brief (SERCOM4) USART Status */
+#define REG_SERCOM4_USART_SYNCBUSY (0x4200181CU) /**< \brief (SERCOM4) USART Syncbusy */
+#define REG_SERCOM4_USART_DATA     (0x42001828U) /**< \brief (SERCOM4) USART Data */
+#define REG_SERCOM4_USART_DBGCTRL  (0x42001830U) /**< \brief (SERCOM4) USART Debug Control */
+#else
+#define REG_SERCOM4_I2CM_CTRLA     (*(RwReg  *)0x42001800U) /**< \brief (SERCOM4) I2CM Control A */
+#define REG_SERCOM4_I2CM_CTRLB     (*(RwReg  *)0x42001804U) /**< \brief (SERCOM4) I2CM Control B */
+#define REG_SERCOM4_I2CM_BAUD      (*(RwReg  *)0x4200180CU) /**< \brief (SERCOM4) I2CM Baud Rate */
+#define REG_SERCOM4_I2CM_INTENCLR  (*(RwReg8 *)0x42001814U) /**< \brief (SERCOM4) I2CM Interrupt Enable Clear */
+#define REG_SERCOM4_I2CM_INTENSET  (*(RwReg8 *)0x42001816U) /**< \brief (SERCOM4) I2CM Interrupt Enable Set */
+#define REG_SERCOM4_I2CM_INTFLAG   (*(RwReg8 *)0x42001818U) /**< \brief (SERCOM4) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM4_I2CM_STATUS    (*(RwReg16*)0x4200181AU) /**< \brief (SERCOM4) I2CM Status */
+#define REG_SERCOM4_I2CM_SYNCBUSY  (*(RoReg  *)0x4200181CU) /**< \brief (SERCOM4) I2CM Syncbusy */
+#define REG_SERCOM4_I2CM_ADDR      (*(RwReg  *)0x42001824U) /**< \brief (SERCOM4) I2CM Address */
+#define REG_SERCOM4_I2CM_DATA      (*(RwReg8 *)0x42001828U) /**< \brief (SERCOM4) I2CM Data */
+#define REG_SERCOM4_I2CM_DBGCTRL   (*(RwReg8 *)0x42001830U) /**< \brief (SERCOM4) I2CM Debug Control */
+#define REG_SERCOM4_I2CS_CTRLA     (*(RwReg  *)0x42001800U) /**< \brief (SERCOM4) I2CS Control A */
+#define REG_SERCOM4_I2CS_CTRLB     (*(RwReg  *)0x42001804U) /**< \brief (SERCOM4) I2CS Control B */
+#define REG_SERCOM4_I2CS_INTENCLR  (*(RwReg8 *)0x42001814U) /**< \brief (SERCOM4) I2CS Interrupt Enable Clear */
+#define REG_SERCOM4_I2CS_INTENSET  (*(RwReg8 *)0x42001816U) /**< \brief (SERCOM4) I2CS Interrupt Enable Set */
+#define REG_SERCOM4_I2CS_INTFLAG   (*(RwReg8 *)0x42001818U) /**< \brief (SERCOM4) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM4_I2CS_STATUS    (*(RwReg16*)0x4200181AU) /**< \brief (SERCOM4) I2CS Status */
+#define REG_SERCOM4_I2CS_SYNCBUSY  (*(RoReg  *)0x4200181CU) /**< \brief (SERCOM4) I2CS Syncbusy */
+#define REG_SERCOM4_I2CS_ADDR      (*(RwReg  *)0x42001824U) /**< \brief (SERCOM4) I2CS Address */
+#define REG_SERCOM4_I2CS_DATA      (*(RwReg8 *)0x42001828U) /**< \brief (SERCOM4) I2CS Data */
+#define REG_SERCOM4_SPI_CTRLA      (*(RwReg  *)0x42001800U) /**< \brief (SERCOM4) SPI Control A */
+#define REG_SERCOM4_SPI_CTRLB      (*(RwReg  *)0x42001804U) /**< \brief (SERCOM4) SPI Control B */
+#define REG_SERCOM4_SPI_BAUD       (*(RwReg8 *)0x4200180CU) /**< \brief (SERCOM4) SPI Baud Rate */
+#define REG_SERCOM4_SPI_INTENCLR   (*(RwReg8 *)0x42001814U) /**< \brief (SERCOM4) SPI Interrupt Enable Clear */
+#define REG_SERCOM4_SPI_INTENSET   (*(RwReg8 *)0x42001816U) /**< \brief (SERCOM4) SPI Interrupt Enable Set */
+#define REG_SERCOM4_SPI_INTFLAG    (*(RwReg8 *)0x42001818U) /**< \brief (SERCOM4) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM4_SPI_STATUS     (*(RwReg16*)0x4200181AU) /**< \brief (SERCOM4) SPI Status */
+#define REG_SERCOM4_SPI_SYNCBUSY   (*(RoReg  *)0x4200181CU) /**< \brief (SERCOM4) SPI Syncbusy */
+#define REG_SERCOM4_SPI_ADDR       (*(RwReg  *)0x42001824U) /**< \brief (SERCOM4) SPI Address */
+#define REG_SERCOM4_SPI_DATA       (*(RwReg  *)0x42001828U) /**< \brief (SERCOM4) SPI Data */
+#define REG_SERCOM4_SPI_DBGCTRL    (*(RwReg8 *)0x42001830U) /**< \brief (SERCOM4) SPI Debug Control */
+#define REG_SERCOM4_USART_CTRLA    (*(RwReg  *)0x42001800U) /**< \brief (SERCOM4) USART Control A */
+#define REG_SERCOM4_USART_CTRLB    (*(RwReg  *)0x42001804U) /**< \brief (SERCOM4) USART Control B */
+#define REG_SERCOM4_USART_BAUD     (*(RwReg16*)0x4200180CU) /**< \brief (SERCOM4) USART Baud Rate */
+#define REG_SERCOM4_USART_RXPL     (*(RwReg8 *)0x4200180EU) /**< \brief (SERCOM4) USART Receive Pulse Length */
+#define REG_SERCOM4_USART_INTENCLR (*(RwReg8 *)0x42001814U) /**< \brief (SERCOM4) USART Interrupt Enable Clear */
+#define REG_SERCOM4_USART_INTENSET (*(RwReg8 *)0x42001816U) /**< \brief (SERCOM4) USART Interrupt Enable Set */
+#define REG_SERCOM4_USART_INTFLAG  (*(RwReg8 *)0x42001818U) /**< \brief (SERCOM4) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM4_USART_STATUS   (*(RwReg16*)0x4200181AU) /**< \brief (SERCOM4) USART Status */
+#define REG_SERCOM4_USART_SYNCBUSY (*(RoReg  *)0x4200181CU) /**< \brief (SERCOM4) USART Syncbusy */
+#define REG_SERCOM4_USART_DATA     (*(RwReg16*)0x42001828U) /**< \brief (SERCOM4) USART Data */
+#define REG_SERCOM4_USART_DBGCTRL  (*(RwReg8 *)0x42001830U) /**< \brief (SERCOM4) USART Debug Control */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for SERCOM4 peripheral ========== */
+#define SERCOM4_DMAC_ID_RX          9
+#define SERCOM4_DMAC_ID_TX          10
+#define SERCOM4_GCLK_ID_CORE        24
+#define SERCOM4_GCLK_ID_SLOW        19
+#define SERCOM4_INT_MSB             6
+
+#endif /* _SAMD21_SERCOM4_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom5.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom5.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sercom5.h	(revision 136)
@@ -0,0 +1,143 @@
+/**
+ * \file
+ *
+ * \brief Instance description for SERCOM5
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_SERCOM5_INSTANCE_
+#define _SAMD21_SERCOM5_INSTANCE_
+
+/* ========== Register definition for SERCOM5 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_SERCOM5_I2CM_CTRLA     (0x42001C00U) /**< \brief (SERCOM5) I2CM Control A */
+#define REG_SERCOM5_I2CM_CTRLB     (0x42001C04U) /**< \brief (SERCOM5) I2CM Control B */
+#define REG_SERCOM5_I2CM_BAUD      (0x42001C0CU) /**< \brief (SERCOM5) I2CM Baud Rate */
+#define REG_SERCOM5_I2CM_INTENCLR  (0x42001C14U) /**< \brief (SERCOM5) I2CM Interrupt Enable Clear */
+#define REG_SERCOM5_I2CM_INTENSET  (0x42001C16U) /**< \brief (SERCOM5) I2CM Interrupt Enable Set */
+#define REG_SERCOM5_I2CM_INTFLAG   (0x42001C18U) /**< \brief (SERCOM5) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM5_I2CM_STATUS    (0x42001C1AU) /**< \brief (SERCOM5) I2CM Status */
+#define REG_SERCOM5_I2CM_SYNCBUSY  (0x42001C1CU) /**< \brief (SERCOM5) I2CM Syncbusy */
+#define REG_SERCOM5_I2CM_ADDR      (0x42001C24U) /**< \brief (SERCOM5) I2CM Address */
+#define REG_SERCOM5_I2CM_DATA      (0x42001C28U) /**< \brief (SERCOM5) I2CM Data */
+#define REG_SERCOM5_I2CM_DBGCTRL   (0x42001C30U) /**< \brief (SERCOM5) I2CM Debug Control */
+#define REG_SERCOM5_I2CS_CTRLA     (0x42001C00U) /**< \brief (SERCOM5) I2CS Control A */
+#define REG_SERCOM5_I2CS_CTRLB     (0x42001C04U) /**< \brief (SERCOM5) I2CS Control B */
+#define REG_SERCOM5_I2CS_INTENCLR  (0x42001C14U) /**< \brief (SERCOM5) I2CS Interrupt Enable Clear */
+#define REG_SERCOM5_I2CS_INTENSET  (0x42001C16U) /**< \brief (SERCOM5) I2CS Interrupt Enable Set */
+#define REG_SERCOM5_I2CS_INTFLAG   (0x42001C18U) /**< \brief (SERCOM5) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM5_I2CS_STATUS    (0x42001C1AU) /**< \brief (SERCOM5) I2CS Status */
+#define REG_SERCOM5_I2CS_SYNCBUSY  (0x42001C1CU) /**< \brief (SERCOM5) I2CS Syncbusy */
+#define REG_SERCOM5_I2CS_ADDR      (0x42001C24U) /**< \brief (SERCOM5) I2CS Address */
+#define REG_SERCOM5_I2CS_DATA      (0x42001C28U) /**< \brief (SERCOM5) I2CS Data */
+#define REG_SERCOM5_SPI_CTRLA      (0x42001C00U) /**< \brief (SERCOM5) SPI Control A */
+#define REG_SERCOM5_SPI_CTRLB      (0x42001C04U) /**< \brief (SERCOM5) SPI Control B */
+#define REG_SERCOM5_SPI_BAUD       (0x42001C0CU) /**< \brief (SERCOM5) SPI Baud Rate */
+#define REG_SERCOM5_SPI_INTENCLR   (0x42001C14U) /**< \brief (SERCOM5) SPI Interrupt Enable Clear */
+#define REG_SERCOM5_SPI_INTENSET   (0x42001C16U) /**< \brief (SERCOM5) SPI Interrupt Enable Set */
+#define REG_SERCOM5_SPI_INTFLAG    (0x42001C18U) /**< \brief (SERCOM5) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM5_SPI_STATUS     (0x42001C1AU) /**< \brief (SERCOM5) SPI Status */
+#define REG_SERCOM5_SPI_SYNCBUSY   (0x42001C1CU) /**< \brief (SERCOM5) SPI Syncbusy */
+#define REG_SERCOM5_SPI_ADDR       (0x42001C24U) /**< \brief (SERCOM5) SPI Address */
+#define REG_SERCOM5_SPI_DATA       (0x42001C28U) /**< \brief (SERCOM5) SPI Data */
+#define REG_SERCOM5_SPI_DBGCTRL    (0x42001C30U) /**< \brief (SERCOM5) SPI Debug Control */
+#define REG_SERCOM5_USART_CTRLA    (0x42001C00U) /**< \brief (SERCOM5) USART Control A */
+#define REG_SERCOM5_USART_CTRLB    (0x42001C04U) /**< \brief (SERCOM5) USART Control B */
+#define REG_SERCOM5_USART_BAUD     (0x42001C0CU) /**< \brief (SERCOM5) USART Baud Rate */
+#define REG_SERCOM5_USART_RXPL     (0x42001C0EU) /**< \brief (SERCOM5) USART Receive Pulse Length */
+#define REG_SERCOM5_USART_INTENCLR (0x42001C14U) /**< \brief (SERCOM5) USART Interrupt Enable Clear */
+#define REG_SERCOM5_USART_INTENSET (0x42001C16U) /**< \brief (SERCOM5) USART Interrupt Enable Set */
+#define REG_SERCOM5_USART_INTFLAG  (0x42001C18U) /**< \brief (SERCOM5) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM5_USART_STATUS   (0x42001C1AU) /**< \brief (SERCOM5) USART Status */
+#define REG_SERCOM5_USART_SYNCBUSY (0x42001C1CU) /**< \brief (SERCOM5) USART Syncbusy */
+#define REG_SERCOM5_USART_DATA     (0x42001C28U) /**< \brief (SERCOM5) USART Data */
+#define REG_SERCOM5_USART_DBGCTRL  (0x42001C30U) /**< \brief (SERCOM5) USART Debug Control */
+#else
+#define REG_SERCOM5_I2CM_CTRLA     (*(RwReg  *)0x42001C00U) /**< \brief (SERCOM5) I2CM Control A */
+#define REG_SERCOM5_I2CM_CTRLB     (*(RwReg  *)0x42001C04U) /**< \brief (SERCOM5) I2CM Control B */
+#define REG_SERCOM5_I2CM_BAUD      (*(RwReg  *)0x42001C0CU) /**< \brief (SERCOM5) I2CM Baud Rate */
+#define REG_SERCOM5_I2CM_INTENCLR  (*(RwReg8 *)0x42001C14U) /**< \brief (SERCOM5) I2CM Interrupt Enable Clear */
+#define REG_SERCOM5_I2CM_INTENSET  (*(RwReg8 *)0x42001C16U) /**< \brief (SERCOM5) I2CM Interrupt Enable Set */
+#define REG_SERCOM5_I2CM_INTFLAG   (*(RwReg8 *)0x42001C18U) /**< \brief (SERCOM5) I2CM Interrupt Flag Status and Clear */
+#define REG_SERCOM5_I2CM_STATUS    (*(RwReg16*)0x42001C1AU) /**< \brief (SERCOM5) I2CM Status */
+#define REG_SERCOM5_I2CM_SYNCBUSY  (*(RoReg  *)0x42001C1CU) /**< \brief (SERCOM5) I2CM Syncbusy */
+#define REG_SERCOM5_I2CM_ADDR      (*(RwReg  *)0x42001C24U) /**< \brief (SERCOM5) I2CM Address */
+#define REG_SERCOM5_I2CM_DATA      (*(RwReg8 *)0x42001C28U) /**< \brief (SERCOM5) I2CM Data */
+#define REG_SERCOM5_I2CM_DBGCTRL   (*(RwReg8 *)0x42001C30U) /**< \brief (SERCOM5) I2CM Debug Control */
+#define REG_SERCOM5_I2CS_CTRLA     (*(RwReg  *)0x42001C00U) /**< \brief (SERCOM5) I2CS Control A */
+#define REG_SERCOM5_I2CS_CTRLB     (*(RwReg  *)0x42001C04U) /**< \brief (SERCOM5) I2CS Control B */
+#define REG_SERCOM5_I2CS_INTENCLR  (*(RwReg8 *)0x42001C14U) /**< \brief (SERCOM5) I2CS Interrupt Enable Clear */
+#define REG_SERCOM5_I2CS_INTENSET  (*(RwReg8 *)0x42001C16U) /**< \brief (SERCOM5) I2CS Interrupt Enable Set */
+#define REG_SERCOM5_I2CS_INTFLAG   (*(RwReg8 *)0x42001C18U) /**< \brief (SERCOM5) I2CS Interrupt Flag Status and Clear */
+#define REG_SERCOM5_I2CS_STATUS    (*(RwReg16*)0x42001C1AU) /**< \brief (SERCOM5) I2CS Status */
+#define REG_SERCOM5_I2CS_SYNCBUSY  (*(RoReg  *)0x42001C1CU) /**< \brief (SERCOM5) I2CS Syncbusy */
+#define REG_SERCOM5_I2CS_ADDR      (*(RwReg  *)0x42001C24U) /**< \brief (SERCOM5) I2CS Address */
+#define REG_SERCOM5_I2CS_DATA      (*(RwReg8 *)0x42001C28U) /**< \brief (SERCOM5) I2CS Data */
+#define REG_SERCOM5_SPI_CTRLA      (*(RwReg  *)0x42001C00U) /**< \brief (SERCOM5) SPI Control A */
+#define REG_SERCOM5_SPI_CTRLB      (*(RwReg  *)0x42001C04U) /**< \brief (SERCOM5) SPI Control B */
+#define REG_SERCOM5_SPI_BAUD       (*(RwReg8 *)0x42001C0CU) /**< \brief (SERCOM5) SPI Baud Rate */
+#define REG_SERCOM5_SPI_INTENCLR   (*(RwReg8 *)0x42001C14U) /**< \brief (SERCOM5) SPI Interrupt Enable Clear */
+#define REG_SERCOM5_SPI_INTENSET   (*(RwReg8 *)0x42001C16U) /**< \brief (SERCOM5) SPI Interrupt Enable Set */
+#define REG_SERCOM5_SPI_INTFLAG    (*(RwReg8 *)0x42001C18U) /**< \brief (SERCOM5) SPI Interrupt Flag Status and Clear */
+#define REG_SERCOM5_SPI_STATUS     (*(RwReg16*)0x42001C1AU) /**< \brief (SERCOM5) SPI Status */
+#define REG_SERCOM5_SPI_SYNCBUSY   (*(RoReg  *)0x42001C1CU) /**< \brief (SERCOM5) SPI Syncbusy */
+#define REG_SERCOM5_SPI_ADDR       (*(RwReg  *)0x42001C24U) /**< \brief (SERCOM5) SPI Address */
+#define REG_SERCOM5_SPI_DATA       (*(RwReg  *)0x42001C28U) /**< \brief (SERCOM5) SPI Data */
+#define REG_SERCOM5_SPI_DBGCTRL    (*(RwReg8 *)0x42001C30U) /**< \brief (SERCOM5) SPI Debug Control */
+#define REG_SERCOM5_USART_CTRLA    (*(RwReg  *)0x42001C00U) /**< \brief (SERCOM5) USART Control A */
+#define REG_SERCOM5_USART_CTRLB    (*(RwReg  *)0x42001C04U) /**< \brief (SERCOM5) USART Control B */
+#define REG_SERCOM5_USART_BAUD     (*(RwReg16*)0x42001C0CU) /**< \brief (SERCOM5) USART Baud Rate */
+#define REG_SERCOM5_USART_RXPL     (*(RwReg8 *)0x42001C0EU) /**< \brief (SERCOM5) USART Receive Pulse Length */
+#define REG_SERCOM5_USART_INTENCLR (*(RwReg8 *)0x42001C14U) /**< \brief (SERCOM5) USART Interrupt Enable Clear */
+#define REG_SERCOM5_USART_INTENSET (*(RwReg8 *)0x42001C16U) /**< \brief (SERCOM5) USART Interrupt Enable Set */
+#define REG_SERCOM5_USART_INTFLAG  (*(RwReg8 *)0x42001C18U) /**< \brief (SERCOM5) USART Interrupt Flag Status and Clear */
+#define REG_SERCOM5_USART_STATUS   (*(RwReg16*)0x42001C1AU) /**< \brief (SERCOM5) USART Status */
+#define REG_SERCOM5_USART_SYNCBUSY (*(RoReg  *)0x42001C1CU) /**< \brief (SERCOM5) USART Syncbusy */
+#define REG_SERCOM5_USART_DATA     (*(RwReg16*)0x42001C28U) /**< \brief (SERCOM5) USART Data */
+#define REG_SERCOM5_USART_DBGCTRL  (*(RwReg8 *)0x42001C30U) /**< \brief (SERCOM5) USART Debug Control */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for SERCOM5 peripheral ========== */
+#define SERCOM5_DMAC_ID_RX          11
+#define SERCOM5_DMAC_ID_TX          12
+#define SERCOM5_GCLK_ID_CORE        25
+#define SERCOM5_GCLK_ID_SLOW        19
+#define SERCOM5_INT_MSB             6
+
+#endif /* _SAMD21_SERCOM5_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sysctrl.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sysctrl.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/sysctrl.h	(revision 136)
@@ -0,0 +1,120 @@
+/**
+ * \file
+ *
+ * \brief Instance description for SYSCTRL
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_SYSCTRL_INSTANCE_
+#define _SAMD21_SYSCTRL_INSTANCE_
+
+/* ========== Register definition for SYSCTRL peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_SYSCTRL_INTENCLR       (0x40000800U) /**< \brief (SYSCTRL) Interrupt Enable Clear */
+#define REG_SYSCTRL_INTENSET       (0x40000804U) /**< \brief (SYSCTRL) Interrupt Enable Set */
+#define REG_SYSCTRL_INTFLAG        (0x40000808U) /**< \brief (SYSCTRL) Interrupt Flag Status and Clear */
+#define REG_SYSCTRL_PCLKSR         (0x4000080CU) /**< \brief (SYSCTRL) Power and Clocks Status */
+#define REG_SYSCTRL_XOSC           (0x40000810U) /**< \brief (SYSCTRL) External Multipurpose Crystal Oscillator (XOSC) Control */
+#define REG_SYSCTRL_XOSC32K        (0x40000814U) /**< \brief (SYSCTRL) 32kHz External Crystal Oscillator (XOSC32K) Control */
+#define REG_SYSCTRL_OSC32K         (0x40000818U) /**< \brief (SYSCTRL) 32kHz Internal Oscillator (OSC32K) Control */
+#define REG_SYSCTRL_OSCULP32K      (0x4000081CU) /**< \brief (SYSCTRL) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */
+#define REG_SYSCTRL_OSC8M          (0x40000820U) /**< \brief (SYSCTRL) 8MHz Internal Oscillator (OSC8M) Control */
+#define REG_SYSCTRL_DFLLCTRL       (0x40000824U) /**< \brief (SYSCTRL) DFLL48M Control */
+#define REG_SYSCTRL_DFLLVAL        (0x40000828U) /**< \brief (SYSCTRL) DFLL48M Value */
+#define REG_SYSCTRL_DFLLMUL        (0x4000082CU) /**< \brief (SYSCTRL) DFLL48M Multiplier */
+#define REG_SYSCTRL_DFLLSYNC       (0x40000830U) /**< \brief (SYSCTRL) DFLL48M Synchronization */
+#define REG_SYSCTRL_BOD33          (0x40000834U) /**< \brief (SYSCTRL) 3.3V Brown-Out Detector (BOD33) Control */
+#define REG_SYSCTRL_VREG           (0x4000083CU) /**< \brief (SYSCTRL) Voltage Regulator System (VREG) Control */
+#define REG_SYSCTRL_VREF           (0x40000840U) /**< \brief (SYSCTRL) Voltage References System (VREF) Control */
+#define REG_SYSCTRL_DPLLCTRLA      (0x40000844U) /**< \brief (SYSCTRL) DPLL Control A */
+#define REG_SYSCTRL_DPLLRATIO      (0x40000848U) /**< \brief (SYSCTRL) DPLL Ratio Control */
+#define REG_SYSCTRL_DPLLCTRLB      (0x4000084CU) /**< \brief (SYSCTRL) DPLL Control B */
+#define REG_SYSCTRL_DPLLSTATUS     (0x40000850U) /**< \brief (SYSCTRL) DPLL Status */
+#else
+#define REG_SYSCTRL_INTENCLR       (*(RwReg  *)0x40000800U) /**< \brief (SYSCTRL) Interrupt Enable Clear */
+#define REG_SYSCTRL_INTENSET       (*(RwReg  *)0x40000804U) /**< \brief (SYSCTRL) Interrupt Enable Set */
+#define REG_SYSCTRL_INTFLAG        (*(RwReg  *)0x40000808U) /**< \brief (SYSCTRL) Interrupt Flag Status and Clear */
+#define REG_SYSCTRL_PCLKSR         (*(RoReg  *)0x4000080CU) /**< \brief (SYSCTRL) Power and Clocks Status */
+#define REG_SYSCTRL_XOSC           (*(RwReg16*)0x40000810U) /**< \brief (SYSCTRL) External Multipurpose Crystal Oscillator (XOSC) Control */
+#define REG_SYSCTRL_XOSC32K        (*(RwReg16*)0x40000814U) /**< \brief (SYSCTRL) 32kHz External Crystal Oscillator (XOSC32K) Control */
+#define REG_SYSCTRL_OSC32K         (*(RwReg  *)0x40000818U) /**< \brief (SYSCTRL) 32kHz Internal Oscillator (OSC32K) Control */
+#define REG_SYSCTRL_OSCULP32K      (*(RwReg8 *)0x4000081CU) /**< \brief (SYSCTRL) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control */
+#define REG_SYSCTRL_OSC8M          (*(RwReg  *)0x40000820U) /**< \brief (SYSCTRL) 8MHz Internal Oscillator (OSC8M) Control */
+#define REG_SYSCTRL_DFLLCTRL       (*(RwReg16*)0x40000824U) /**< \brief (SYSCTRL) DFLL48M Control */
+#define REG_SYSCTRL_DFLLVAL        (*(RwReg  *)0x40000828U) /**< \brief (SYSCTRL) DFLL48M Value */
+#define REG_SYSCTRL_DFLLMUL        (*(RwReg  *)0x4000082CU) /**< \brief (SYSCTRL) DFLL48M Multiplier */
+#define REG_SYSCTRL_DFLLSYNC       (*(RwReg8 *)0x40000830U) /**< \brief (SYSCTRL) DFLL48M Synchronization */
+#define REG_SYSCTRL_BOD33          (*(RwReg  *)0x40000834U) /**< \brief (SYSCTRL) 3.3V Brown-Out Detector (BOD33) Control */
+#define REG_SYSCTRL_VREG           (*(RwReg16*)0x4000083CU) /**< \brief (SYSCTRL) Voltage Regulator System (VREG) Control */
+#define REG_SYSCTRL_VREF           (*(RwReg  *)0x40000840U) /**< \brief (SYSCTRL) Voltage References System (VREF) Control */
+#define REG_SYSCTRL_DPLLCTRLA      (*(RwReg8 *)0x40000844U) /**< \brief (SYSCTRL) DPLL Control A */
+#define REG_SYSCTRL_DPLLRATIO      (*(RwReg  *)0x40000848U) /**< \brief (SYSCTRL) DPLL Ratio Control */
+#define REG_SYSCTRL_DPLLCTRLB      (*(RwReg  *)0x4000084CU) /**< \brief (SYSCTRL) DPLL Control B */
+#define REG_SYSCTRL_DPLLSTATUS     (*(RoReg8 *)0x40000850U) /**< \brief (SYSCTRL) DPLL Status */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for SYSCTRL peripheral ========== */
+#define SYSCTRL_BGAP_CALIB_MSB      11
+#define SYSCTRL_BOD33_CALIB_MSB     5
+#define SYSCTRL_DFLL48M_COARSE_MSB  5
+#define SYSCTRL_DFLL48M_FINE_MSB    9
+#define SYSCTRL_GCLK_ID_DFLL48      0
+#define SYSCTRL_GCLK_ID_FDPLL       1
+#define SYSCTRL_GCLK_ID_FDPLL32K    2
+#define SYSCTRL_OSC32K_COARSE_CALIB_MSB 6
+#define SYSCTRL_POR33_ENTEST_MSB    1
+#define SYSCTRL_ULPVREF_DIVLEV_MSB  3
+#define SYSCTRL_ULPVREG_FORCEGAIN_MSB 1
+#define SYSCTRL_ULPVREG_RAMREFSEL_MSB 2
+#define SYSCTRL_VREF_CONTROL_MSB    48
+#define SYSCTRL_VREF_STATUS_MSB     7
+#define SYSCTRL_VREG_LEVEL_MSB      2
+#define SYSCTRL_BOD12_VERSION       0x111
+#define SYSCTRL_BOD33_VERSION       0x111
+#define SYSCTRL_DFLL48M_VERSION     0x300
+#define SYSCTRL_FDPLL_VERSION       0x110
+#define SYSCTRL_OSCULP32K_VERSION   0x111
+#define SYSCTRL_OSC8M_VERSION       0x120
+#define SYSCTRL_OSC32K_VERSION      0x110
+#define SYSCTRL_VREF_VERSION        0x200
+#define SYSCTRL_VREG_VERSION        0x201
+#define SYSCTRL_XOSC_VERSION        0x111
+#define SYSCTRL_XOSC32K_VERSION     0x111
+
+#endif /* _SAMD21_SYSCTRL_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc3.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc3.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc3.h	(revision 136)
@@ -0,0 +1,111 @@
+/**
+ * \file
+ *
+ * \brief Instance description for TC3
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TC3_INSTANCE_
+#define _SAMD21_TC3_INSTANCE_
+
+/* ========== Register definition for TC3 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_TC3_CTRLA              (0x42002C00U) /**< \brief (TC3) Control A */
+#define REG_TC3_READREQ            (0x42002C02U) /**< \brief (TC3) Read Request */
+#define REG_TC3_CTRLBCLR           (0x42002C04U) /**< \brief (TC3) Control B Clear */
+#define REG_TC3_CTRLBSET           (0x42002C05U) /**< \brief (TC3) Control B Set */
+#define REG_TC3_CTRLC              (0x42002C06U) /**< \brief (TC3) Control C */
+#define REG_TC3_DBGCTRL            (0x42002C08U) /**< \brief (TC3) Debug Control */
+#define REG_TC3_EVCTRL             (0x42002C0AU) /**< \brief (TC3) Event Control */
+#define REG_TC3_INTENCLR           (0x42002C0CU) /**< \brief (TC3) Interrupt Enable Clear */
+#define REG_TC3_INTENSET           (0x42002C0DU) /**< \brief (TC3) Interrupt Enable Set */
+#define REG_TC3_INTFLAG            (0x42002C0EU) /**< \brief (TC3) Interrupt Flag Status and Clear */
+#define REG_TC3_STATUS             (0x42002C0FU) /**< \brief (TC3) Status */
+#define REG_TC3_COUNT16_COUNT      (0x42002C10U) /**< \brief (TC3) COUNT16 Counter Value */
+#define REG_TC3_COUNT16_CC0        (0x42002C18U) /**< \brief (TC3) COUNT16 Compare/Capture 0 */
+#define REG_TC3_COUNT16_CC1        (0x42002C1AU) /**< \brief (TC3) COUNT16 Compare/Capture 1 */
+#define REG_TC3_COUNT32_COUNT      (0x42002C10U) /**< \brief (TC3) COUNT32 Counter Value */
+#define REG_TC3_COUNT32_CC0        (0x42002C18U) /**< \brief (TC3) COUNT32 Compare/Capture 0 */
+#define REG_TC3_COUNT32_CC1        (0x42002C1CU) /**< \brief (TC3) COUNT32 Compare/Capture 1 */
+#define REG_TC3_COUNT8_COUNT       (0x42002C10U) /**< \brief (TC3) COUNT8 Counter Value */
+#define REG_TC3_COUNT8_PER         (0x42002C14U) /**< \brief (TC3) COUNT8 Period Value */
+#define REG_TC3_COUNT8_CC0         (0x42002C18U) /**< \brief (TC3) COUNT8 Compare/Capture 0 */
+#define REG_TC3_COUNT8_CC1         (0x42002C19U) /**< \brief (TC3) COUNT8 Compare/Capture 1 */
+#else
+#define REG_TC3_CTRLA              (*(RwReg16*)0x42002C00U) /**< \brief (TC3) Control A */
+#define REG_TC3_READREQ            (*(RwReg16*)0x42002C02U) /**< \brief (TC3) Read Request */
+#define REG_TC3_CTRLBCLR           (*(RwReg8 *)0x42002C04U) /**< \brief (TC3) Control B Clear */
+#define REG_TC3_CTRLBSET           (*(RwReg8 *)0x42002C05U) /**< \brief (TC3) Control B Set */
+#define REG_TC3_CTRLC              (*(RwReg8 *)0x42002C06U) /**< \brief (TC3) Control C */
+#define REG_TC3_DBGCTRL            (*(RwReg8 *)0x42002C08U) /**< \brief (TC3) Debug Control */
+#define REG_TC3_EVCTRL             (*(RwReg16*)0x42002C0AU) /**< \brief (TC3) Event Control */
+#define REG_TC3_INTENCLR           (*(RwReg8 *)0x42002C0CU) /**< \brief (TC3) Interrupt Enable Clear */
+#define REG_TC3_INTENSET           (*(RwReg8 *)0x42002C0DU) /**< \brief (TC3) Interrupt Enable Set */
+#define REG_TC3_INTFLAG            (*(RwReg8 *)0x42002C0EU) /**< \brief (TC3) Interrupt Flag Status and Clear */
+#define REG_TC3_STATUS             (*(RoReg8 *)0x42002C0FU) /**< \brief (TC3) Status */
+#define REG_TC3_COUNT16_COUNT      (*(RwReg16*)0x42002C10U) /**< \brief (TC3) COUNT16 Counter Value */
+#define REG_TC3_COUNT16_CC0        (*(RwReg16*)0x42002C18U) /**< \brief (TC3) COUNT16 Compare/Capture 0 */
+#define REG_TC3_COUNT16_CC1        (*(RwReg16*)0x42002C1AU) /**< \brief (TC3) COUNT16 Compare/Capture 1 */
+#define REG_TC3_COUNT32_COUNT      (*(RwReg  *)0x42002C10U) /**< \brief (TC3) COUNT32 Counter Value */
+#define REG_TC3_COUNT32_CC0        (*(RwReg  *)0x42002C18U) /**< \brief (TC3) COUNT32 Compare/Capture 0 */
+#define REG_TC3_COUNT32_CC1        (*(RwReg  *)0x42002C1CU) /**< \brief (TC3) COUNT32 Compare/Capture 1 */
+#define REG_TC3_COUNT8_COUNT       (*(RwReg8 *)0x42002C10U) /**< \brief (TC3) COUNT8 Counter Value */
+#define REG_TC3_COUNT8_PER         (*(RwReg8 *)0x42002C14U) /**< \brief (TC3) COUNT8 Period Value */
+#define REG_TC3_COUNT8_CC0         (*(RwReg8 *)0x42002C18U) /**< \brief (TC3) COUNT8 Compare/Capture 0 */
+#define REG_TC3_COUNT8_CC1         (*(RwReg8 *)0x42002C19U) /**< \brief (TC3) COUNT8 Compare/Capture 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for TC3 peripheral ========== */
+#define TC3_CC8_NUM                 2
+#define TC3_CC16_NUM                2
+#define TC3_CC32_NUM                2
+#define TC3_DITHERING_EXT           0
+#define TC3_DMAC_ID_MC_0            25
+#define TC3_DMAC_ID_MC_1            26
+#define TC3_DMAC_ID_MC_LSB          25
+#define TC3_DMAC_ID_MC_MSB          26
+#define TC3_DMAC_ID_MC_SIZE         2
+#define TC3_DMAC_ID_OVF             24
+#define TC3_GCLK_ID                 27
+#define TC3_MASTER                  0
+#define TC3_OW_NUM                  2
+#define TC3_PERIOD_EXT              0
+#define TC3_SHADOW_EXT              0
+
+#endif /* _SAMD21_TC3_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc4.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc4.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc4.h	(revision 136)
@@ -0,0 +1,111 @@
+/**
+ * \file
+ *
+ * \brief Instance description for TC4
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TC4_INSTANCE_
+#define _SAMD21_TC4_INSTANCE_
+
+/* ========== Register definition for TC4 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_TC4_CTRLA              (0x42003000U) /**< \brief (TC4) Control A */
+#define REG_TC4_READREQ            (0x42003002U) /**< \brief (TC4) Read Request */
+#define REG_TC4_CTRLBCLR           (0x42003004U) /**< \brief (TC4) Control B Clear */
+#define REG_TC4_CTRLBSET           (0x42003005U) /**< \brief (TC4) Control B Set */
+#define REG_TC4_CTRLC              (0x42003006U) /**< \brief (TC4) Control C */
+#define REG_TC4_DBGCTRL            (0x42003008U) /**< \brief (TC4) Debug Control */
+#define REG_TC4_EVCTRL             (0x4200300AU) /**< \brief (TC4) Event Control */
+#define REG_TC4_INTENCLR           (0x4200300CU) /**< \brief (TC4) Interrupt Enable Clear */
+#define REG_TC4_INTENSET           (0x4200300DU) /**< \brief (TC4) Interrupt Enable Set */
+#define REG_TC4_INTFLAG            (0x4200300EU) /**< \brief (TC4) Interrupt Flag Status and Clear */
+#define REG_TC4_STATUS             (0x4200300FU) /**< \brief (TC4) Status */
+#define REG_TC4_COUNT16_COUNT      (0x42003010U) /**< \brief (TC4) COUNT16 Counter Value */
+#define REG_TC4_COUNT16_CC0        (0x42003018U) /**< \brief (TC4) COUNT16 Compare/Capture 0 */
+#define REG_TC4_COUNT16_CC1        (0x4200301AU) /**< \brief (TC4) COUNT16 Compare/Capture 1 */
+#define REG_TC4_COUNT32_COUNT      (0x42003010U) /**< \brief (TC4) COUNT32 Counter Value */
+#define REG_TC4_COUNT32_CC0        (0x42003018U) /**< \brief (TC4) COUNT32 Compare/Capture 0 */
+#define REG_TC4_COUNT32_CC1        (0x4200301CU) /**< \brief (TC4) COUNT32 Compare/Capture 1 */
+#define REG_TC4_COUNT8_COUNT       (0x42003010U) /**< \brief (TC4) COUNT8 Counter Value */
+#define REG_TC4_COUNT8_PER         (0x42003014U) /**< \brief (TC4) COUNT8 Period Value */
+#define REG_TC4_COUNT8_CC0         (0x42003018U) /**< \brief (TC4) COUNT8 Compare/Capture 0 */
+#define REG_TC4_COUNT8_CC1         (0x42003019U) /**< \brief (TC4) COUNT8 Compare/Capture 1 */
+#else
+#define REG_TC4_CTRLA              (*(RwReg16*)0x42003000U) /**< \brief (TC4) Control A */
+#define REG_TC4_READREQ            (*(RwReg16*)0x42003002U) /**< \brief (TC4) Read Request */
+#define REG_TC4_CTRLBCLR           (*(RwReg8 *)0x42003004U) /**< \brief (TC4) Control B Clear */
+#define REG_TC4_CTRLBSET           (*(RwReg8 *)0x42003005U) /**< \brief (TC4) Control B Set */
+#define REG_TC4_CTRLC              (*(RwReg8 *)0x42003006U) /**< \brief (TC4) Control C */
+#define REG_TC4_DBGCTRL            (*(RwReg8 *)0x42003008U) /**< \brief (TC4) Debug Control */
+#define REG_TC4_EVCTRL             (*(RwReg16*)0x4200300AU) /**< \brief (TC4) Event Control */
+#define REG_TC4_INTENCLR           (*(RwReg8 *)0x4200300CU) /**< \brief (TC4) Interrupt Enable Clear */
+#define REG_TC4_INTENSET           (*(RwReg8 *)0x4200300DU) /**< \brief (TC4) Interrupt Enable Set */
+#define REG_TC4_INTFLAG            (*(RwReg8 *)0x4200300EU) /**< \brief (TC4) Interrupt Flag Status and Clear */
+#define REG_TC4_STATUS             (*(RoReg8 *)0x4200300FU) /**< \brief (TC4) Status */
+#define REG_TC4_COUNT16_COUNT      (*(RwReg16*)0x42003010U) /**< \brief (TC4) COUNT16 Counter Value */
+#define REG_TC4_COUNT16_CC0        (*(RwReg16*)0x42003018U) /**< \brief (TC4) COUNT16 Compare/Capture 0 */
+#define REG_TC4_COUNT16_CC1        (*(RwReg16*)0x4200301AU) /**< \brief (TC4) COUNT16 Compare/Capture 1 */
+#define REG_TC4_COUNT32_COUNT      (*(RwReg  *)0x42003010U) /**< \brief (TC4) COUNT32 Counter Value */
+#define REG_TC4_COUNT32_CC0        (*(RwReg  *)0x42003018U) /**< \brief (TC4) COUNT32 Compare/Capture 0 */
+#define REG_TC4_COUNT32_CC1        (*(RwReg  *)0x4200301CU) /**< \brief (TC4) COUNT32 Compare/Capture 1 */
+#define REG_TC4_COUNT8_COUNT       (*(RwReg8 *)0x42003010U) /**< \brief (TC4) COUNT8 Counter Value */
+#define REG_TC4_COUNT8_PER         (*(RwReg8 *)0x42003014U) /**< \brief (TC4) COUNT8 Period Value */
+#define REG_TC4_COUNT8_CC0         (*(RwReg8 *)0x42003018U) /**< \brief (TC4) COUNT8 Compare/Capture 0 */
+#define REG_TC4_COUNT8_CC1         (*(RwReg8 *)0x42003019U) /**< \brief (TC4) COUNT8 Compare/Capture 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for TC4 peripheral ========== */
+#define TC4_CC8_NUM                 2
+#define TC4_CC16_NUM                2
+#define TC4_CC32_NUM                2
+#define TC4_DITHERING_EXT           0
+#define TC4_DMAC_ID_MC_0            28
+#define TC4_DMAC_ID_MC_1            29
+#define TC4_DMAC_ID_MC_LSB          28
+#define TC4_DMAC_ID_MC_MSB          29
+#define TC4_DMAC_ID_MC_SIZE         2
+#define TC4_DMAC_ID_OVF             27
+#define TC4_GCLK_ID                 28
+#define TC4_MASTER                  1
+#define TC4_OW_NUM                  2
+#define TC4_PERIOD_EXT              0
+#define TC4_SHADOW_EXT              0
+
+#endif /* _SAMD21_TC4_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc5.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc5.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc5.h	(revision 136)
@@ -0,0 +1,111 @@
+/**
+ * \file
+ *
+ * \brief Instance description for TC5
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TC5_INSTANCE_
+#define _SAMD21_TC5_INSTANCE_
+
+/* ========== Register definition for TC5 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_TC5_CTRLA              (0x42003400U) /**< \brief (TC5) Control A */
+#define REG_TC5_READREQ            (0x42003402U) /**< \brief (TC5) Read Request */
+#define REG_TC5_CTRLBCLR           (0x42003404U) /**< \brief (TC5) Control B Clear */
+#define REG_TC5_CTRLBSET           (0x42003405U) /**< \brief (TC5) Control B Set */
+#define REG_TC5_CTRLC              (0x42003406U) /**< \brief (TC5) Control C */
+#define REG_TC5_DBGCTRL            (0x42003408U) /**< \brief (TC5) Debug Control */
+#define REG_TC5_EVCTRL             (0x4200340AU) /**< \brief (TC5) Event Control */
+#define REG_TC5_INTENCLR           (0x4200340CU) /**< \brief (TC5) Interrupt Enable Clear */
+#define REG_TC5_INTENSET           (0x4200340DU) /**< \brief (TC5) Interrupt Enable Set */
+#define REG_TC5_INTFLAG            (0x4200340EU) /**< \brief (TC5) Interrupt Flag Status and Clear */
+#define REG_TC5_STATUS             (0x4200340FU) /**< \brief (TC5) Status */
+#define REG_TC5_COUNT16_COUNT      (0x42003410U) /**< \brief (TC5) COUNT16 Counter Value */
+#define REG_TC5_COUNT16_CC0        (0x42003418U) /**< \brief (TC5) COUNT16 Compare/Capture 0 */
+#define REG_TC5_COUNT16_CC1        (0x4200341AU) /**< \brief (TC5) COUNT16 Compare/Capture 1 */
+#define REG_TC5_COUNT32_COUNT      (0x42003410U) /**< \brief (TC5) COUNT32 Counter Value */
+#define REG_TC5_COUNT32_CC0        (0x42003418U) /**< \brief (TC5) COUNT32 Compare/Capture 0 */
+#define REG_TC5_COUNT32_CC1        (0x4200341CU) /**< \brief (TC5) COUNT32 Compare/Capture 1 */
+#define REG_TC5_COUNT8_COUNT       (0x42003410U) /**< \brief (TC5) COUNT8 Counter Value */
+#define REG_TC5_COUNT8_PER         (0x42003414U) /**< \brief (TC5) COUNT8 Period Value */
+#define REG_TC5_COUNT8_CC0         (0x42003418U) /**< \brief (TC5) COUNT8 Compare/Capture 0 */
+#define REG_TC5_COUNT8_CC1         (0x42003419U) /**< \brief (TC5) COUNT8 Compare/Capture 1 */
+#else
+#define REG_TC5_CTRLA              (*(RwReg16*)0x42003400U) /**< \brief (TC5) Control A */
+#define REG_TC5_READREQ            (*(RwReg16*)0x42003402U) /**< \brief (TC5) Read Request */
+#define REG_TC5_CTRLBCLR           (*(RwReg8 *)0x42003404U) /**< \brief (TC5) Control B Clear */
+#define REG_TC5_CTRLBSET           (*(RwReg8 *)0x42003405U) /**< \brief (TC5) Control B Set */
+#define REG_TC5_CTRLC              (*(RwReg8 *)0x42003406U) /**< \brief (TC5) Control C */
+#define REG_TC5_DBGCTRL            (*(RwReg8 *)0x42003408U) /**< \brief (TC5) Debug Control */
+#define REG_TC5_EVCTRL             (*(RwReg16*)0x4200340AU) /**< \brief (TC5) Event Control */
+#define REG_TC5_INTENCLR           (*(RwReg8 *)0x4200340CU) /**< \brief (TC5) Interrupt Enable Clear */
+#define REG_TC5_INTENSET           (*(RwReg8 *)0x4200340DU) /**< \brief (TC5) Interrupt Enable Set */
+#define REG_TC5_INTFLAG            (*(RwReg8 *)0x4200340EU) /**< \brief (TC5) Interrupt Flag Status and Clear */
+#define REG_TC5_STATUS             (*(RoReg8 *)0x4200340FU) /**< \brief (TC5) Status */
+#define REG_TC5_COUNT16_COUNT      (*(RwReg16*)0x42003410U) /**< \brief (TC5) COUNT16 Counter Value */
+#define REG_TC5_COUNT16_CC0        (*(RwReg16*)0x42003418U) /**< \brief (TC5) COUNT16 Compare/Capture 0 */
+#define REG_TC5_COUNT16_CC1        (*(RwReg16*)0x4200341AU) /**< \brief (TC5) COUNT16 Compare/Capture 1 */
+#define REG_TC5_COUNT32_COUNT      (*(RwReg  *)0x42003410U) /**< \brief (TC5) COUNT32 Counter Value */
+#define REG_TC5_COUNT32_CC0        (*(RwReg  *)0x42003418U) /**< \brief (TC5) COUNT32 Compare/Capture 0 */
+#define REG_TC5_COUNT32_CC1        (*(RwReg  *)0x4200341CU) /**< \brief (TC5) COUNT32 Compare/Capture 1 */
+#define REG_TC5_COUNT8_COUNT       (*(RwReg8 *)0x42003410U) /**< \brief (TC5) COUNT8 Counter Value */
+#define REG_TC5_COUNT8_PER         (*(RwReg8 *)0x42003414U) /**< \brief (TC5) COUNT8 Period Value */
+#define REG_TC5_COUNT8_CC0         (*(RwReg8 *)0x42003418U) /**< \brief (TC5) COUNT8 Compare/Capture 0 */
+#define REG_TC5_COUNT8_CC1         (*(RwReg8 *)0x42003419U) /**< \brief (TC5) COUNT8 Compare/Capture 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for TC5 peripheral ========== */
+#define TC5_CC8_NUM                 2
+#define TC5_CC16_NUM                2
+#define TC5_CC32_NUM                2
+#define TC5_DITHERING_EXT           0
+#define TC5_DMAC_ID_MC_0            31
+#define TC5_DMAC_ID_MC_1            32
+#define TC5_DMAC_ID_MC_LSB          31
+#define TC5_DMAC_ID_MC_MSB          32
+#define TC5_DMAC_ID_MC_SIZE         2
+#define TC5_DMAC_ID_OVF             30
+#define TC5_GCLK_ID                 28
+#define TC5_MASTER                  0
+#define TC5_OW_NUM                  2
+#define TC5_PERIOD_EXT              0
+#define TC5_SHADOW_EXT              0
+
+#endif /* _SAMD21_TC5_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc6.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc6.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc6.h	(revision 136)
@@ -0,0 +1,111 @@
+/**
+ * \file
+ *
+ * \brief Instance description for TC6
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TC6_INSTANCE_
+#define _SAMD21_TC6_INSTANCE_
+
+/* ========== Register definition for TC6 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_TC6_CTRLA              (0x42003800U) /**< \brief (TC6) Control A */
+#define REG_TC6_READREQ            (0x42003802U) /**< \brief (TC6) Read Request */
+#define REG_TC6_CTRLBCLR           (0x42003804U) /**< \brief (TC6) Control B Clear */
+#define REG_TC6_CTRLBSET           (0x42003805U) /**< \brief (TC6) Control B Set */
+#define REG_TC6_CTRLC              (0x42003806U) /**< \brief (TC6) Control C */
+#define REG_TC6_DBGCTRL            (0x42003808U) /**< \brief (TC6) Debug Control */
+#define REG_TC6_EVCTRL             (0x4200380AU) /**< \brief (TC6) Event Control */
+#define REG_TC6_INTENCLR           (0x4200380CU) /**< \brief (TC6) Interrupt Enable Clear */
+#define REG_TC6_INTENSET           (0x4200380DU) /**< \brief (TC6) Interrupt Enable Set */
+#define REG_TC6_INTFLAG            (0x4200380EU) /**< \brief (TC6) Interrupt Flag Status and Clear */
+#define REG_TC6_STATUS             (0x4200380FU) /**< \brief (TC6) Status */
+#define REG_TC6_COUNT16_COUNT      (0x42003810U) /**< \brief (TC6) COUNT16 Counter Value */
+#define REG_TC6_COUNT16_CC0        (0x42003818U) /**< \brief (TC6) COUNT16 Compare/Capture 0 */
+#define REG_TC6_COUNT16_CC1        (0x4200381AU) /**< \brief (TC6) COUNT16 Compare/Capture 1 */
+#define REG_TC6_COUNT32_COUNT      (0x42003810U) /**< \brief (TC6) COUNT32 Counter Value */
+#define REG_TC6_COUNT32_CC0        (0x42003818U) /**< \brief (TC6) COUNT32 Compare/Capture 0 */
+#define REG_TC6_COUNT32_CC1        (0x4200381CU) /**< \brief (TC6) COUNT32 Compare/Capture 1 */
+#define REG_TC6_COUNT8_COUNT       (0x42003810U) /**< \brief (TC6) COUNT8 Counter Value */
+#define REG_TC6_COUNT8_PER         (0x42003814U) /**< \brief (TC6) COUNT8 Period Value */
+#define REG_TC6_COUNT8_CC0         (0x42003818U) /**< \brief (TC6) COUNT8 Compare/Capture 0 */
+#define REG_TC6_COUNT8_CC1         (0x42003819U) /**< \brief (TC6) COUNT8 Compare/Capture 1 */
+#else
+#define REG_TC6_CTRLA              (*(RwReg16*)0x42003800U) /**< \brief (TC6) Control A */
+#define REG_TC6_READREQ            (*(RwReg16*)0x42003802U) /**< \brief (TC6) Read Request */
+#define REG_TC6_CTRLBCLR           (*(RwReg8 *)0x42003804U) /**< \brief (TC6) Control B Clear */
+#define REG_TC6_CTRLBSET           (*(RwReg8 *)0x42003805U) /**< \brief (TC6) Control B Set */
+#define REG_TC6_CTRLC              (*(RwReg8 *)0x42003806U) /**< \brief (TC6) Control C */
+#define REG_TC6_DBGCTRL            (*(RwReg8 *)0x42003808U) /**< \brief (TC6) Debug Control */
+#define REG_TC6_EVCTRL             (*(RwReg16*)0x4200380AU) /**< \brief (TC6) Event Control */
+#define REG_TC6_INTENCLR           (*(RwReg8 *)0x4200380CU) /**< \brief (TC6) Interrupt Enable Clear */
+#define REG_TC6_INTENSET           (*(RwReg8 *)0x4200380DU) /**< \brief (TC6) Interrupt Enable Set */
+#define REG_TC6_INTFLAG            (*(RwReg8 *)0x4200380EU) /**< \brief (TC6) Interrupt Flag Status and Clear */
+#define REG_TC6_STATUS             (*(RoReg8 *)0x4200380FU) /**< \brief (TC6) Status */
+#define REG_TC6_COUNT16_COUNT      (*(RwReg16*)0x42003810U) /**< \brief (TC6) COUNT16 Counter Value */
+#define REG_TC6_COUNT16_CC0        (*(RwReg16*)0x42003818U) /**< \brief (TC6) COUNT16 Compare/Capture 0 */
+#define REG_TC6_COUNT16_CC1        (*(RwReg16*)0x4200381AU) /**< \brief (TC6) COUNT16 Compare/Capture 1 */
+#define REG_TC6_COUNT32_COUNT      (*(RwReg  *)0x42003810U) /**< \brief (TC6) COUNT32 Counter Value */
+#define REG_TC6_COUNT32_CC0        (*(RwReg  *)0x42003818U) /**< \brief (TC6) COUNT32 Compare/Capture 0 */
+#define REG_TC6_COUNT32_CC1        (*(RwReg  *)0x4200381CU) /**< \brief (TC6) COUNT32 Compare/Capture 1 */
+#define REG_TC6_COUNT8_COUNT       (*(RwReg8 *)0x42003810U) /**< \brief (TC6) COUNT8 Counter Value */
+#define REG_TC6_COUNT8_PER         (*(RwReg8 *)0x42003814U) /**< \brief (TC6) COUNT8 Period Value */
+#define REG_TC6_COUNT8_CC0         (*(RwReg8 *)0x42003818U) /**< \brief (TC6) COUNT8 Compare/Capture 0 */
+#define REG_TC6_COUNT8_CC1         (*(RwReg8 *)0x42003819U) /**< \brief (TC6) COUNT8 Compare/Capture 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for TC6 peripheral ========== */
+#define TC6_CC8_NUM                 2
+#define TC6_CC16_NUM                2
+#define TC6_CC32_NUM                2
+#define TC6_DITHERING_EXT           0
+#define TC6_DMAC_ID_MC_0            34
+#define TC6_DMAC_ID_MC_1            35
+#define TC6_DMAC_ID_MC_LSB          34
+#define TC6_DMAC_ID_MC_MSB          35
+#define TC6_DMAC_ID_MC_SIZE         2
+#define TC6_DMAC_ID_OVF             33
+#define TC6_GCLK_ID                 29
+#define TC6_MASTER                  1
+#define TC6_OW_NUM                  2
+#define TC6_PERIOD_EXT              0
+#define TC6_SHADOW_EXT              0
+
+#endif /* _SAMD21_TC6_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc7.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc7.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc7.h	(revision 136)
@@ -0,0 +1,111 @@
+/**
+ * \file
+ *
+ * \brief Instance description for TC7
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TC7_INSTANCE_
+#define _SAMD21_TC7_INSTANCE_
+
+/* ========== Register definition for TC7 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_TC7_CTRLA              (0x42003C00U) /**< \brief (TC7) Control A */
+#define REG_TC7_READREQ            (0x42003C02U) /**< \brief (TC7) Read Request */
+#define REG_TC7_CTRLBCLR           (0x42003C04U) /**< \brief (TC7) Control B Clear */
+#define REG_TC7_CTRLBSET           (0x42003C05U) /**< \brief (TC7) Control B Set */
+#define REG_TC7_CTRLC              (0x42003C06U) /**< \brief (TC7) Control C */
+#define REG_TC7_DBGCTRL            (0x42003C08U) /**< \brief (TC7) Debug Control */
+#define REG_TC7_EVCTRL             (0x42003C0AU) /**< \brief (TC7) Event Control */
+#define REG_TC7_INTENCLR           (0x42003C0CU) /**< \brief (TC7) Interrupt Enable Clear */
+#define REG_TC7_INTENSET           (0x42003C0DU) /**< \brief (TC7) Interrupt Enable Set */
+#define REG_TC7_INTFLAG            (0x42003C0EU) /**< \brief (TC7) Interrupt Flag Status and Clear */
+#define REG_TC7_STATUS             (0x42003C0FU) /**< \brief (TC7) Status */
+#define REG_TC7_COUNT16_COUNT      (0x42003C10U) /**< \brief (TC7) COUNT16 Counter Value */
+#define REG_TC7_COUNT16_CC0        (0x42003C18U) /**< \brief (TC7) COUNT16 Compare/Capture 0 */
+#define REG_TC7_COUNT16_CC1        (0x42003C1AU) /**< \brief (TC7) COUNT16 Compare/Capture 1 */
+#define REG_TC7_COUNT32_COUNT      (0x42003C10U) /**< \brief (TC7) COUNT32 Counter Value */
+#define REG_TC7_COUNT32_CC0        (0x42003C18U) /**< \brief (TC7) COUNT32 Compare/Capture 0 */
+#define REG_TC7_COUNT32_CC1        (0x42003C1CU) /**< \brief (TC7) COUNT32 Compare/Capture 1 */
+#define REG_TC7_COUNT8_COUNT       (0x42003C10U) /**< \brief (TC7) COUNT8 Counter Value */
+#define REG_TC7_COUNT8_PER         (0x42003C14U) /**< \brief (TC7) COUNT8 Period Value */
+#define REG_TC7_COUNT8_CC0         (0x42003C18U) /**< \brief (TC7) COUNT8 Compare/Capture 0 */
+#define REG_TC7_COUNT8_CC1         (0x42003C19U) /**< \brief (TC7) COUNT8 Compare/Capture 1 */
+#else
+#define REG_TC7_CTRLA              (*(RwReg16*)0x42003C00U) /**< \brief (TC7) Control A */
+#define REG_TC7_READREQ            (*(RwReg16*)0x42003C02U) /**< \brief (TC7) Read Request */
+#define REG_TC7_CTRLBCLR           (*(RwReg8 *)0x42003C04U) /**< \brief (TC7) Control B Clear */
+#define REG_TC7_CTRLBSET           (*(RwReg8 *)0x42003C05U) /**< \brief (TC7) Control B Set */
+#define REG_TC7_CTRLC              (*(RwReg8 *)0x42003C06U) /**< \brief (TC7) Control C */
+#define REG_TC7_DBGCTRL            (*(RwReg8 *)0x42003C08U) /**< \brief (TC7) Debug Control */
+#define REG_TC7_EVCTRL             (*(RwReg16*)0x42003C0AU) /**< \brief (TC7) Event Control */
+#define REG_TC7_INTENCLR           (*(RwReg8 *)0x42003C0CU) /**< \brief (TC7) Interrupt Enable Clear */
+#define REG_TC7_INTENSET           (*(RwReg8 *)0x42003C0DU) /**< \brief (TC7) Interrupt Enable Set */
+#define REG_TC7_INTFLAG            (*(RwReg8 *)0x42003C0EU) /**< \brief (TC7) Interrupt Flag Status and Clear */
+#define REG_TC7_STATUS             (*(RoReg8 *)0x42003C0FU) /**< \brief (TC7) Status */
+#define REG_TC7_COUNT16_COUNT      (*(RwReg16*)0x42003C10U) /**< \brief (TC7) COUNT16 Counter Value */
+#define REG_TC7_COUNT16_CC0        (*(RwReg16*)0x42003C18U) /**< \brief (TC7) COUNT16 Compare/Capture 0 */
+#define REG_TC7_COUNT16_CC1        (*(RwReg16*)0x42003C1AU) /**< \brief (TC7) COUNT16 Compare/Capture 1 */
+#define REG_TC7_COUNT32_COUNT      (*(RwReg  *)0x42003C10U) /**< \brief (TC7) COUNT32 Counter Value */
+#define REG_TC7_COUNT32_CC0        (*(RwReg  *)0x42003C18U) /**< \brief (TC7) COUNT32 Compare/Capture 0 */
+#define REG_TC7_COUNT32_CC1        (*(RwReg  *)0x42003C1CU) /**< \brief (TC7) COUNT32 Compare/Capture 1 */
+#define REG_TC7_COUNT8_COUNT       (*(RwReg8 *)0x42003C10U) /**< \brief (TC7) COUNT8 Counter Value */
+#define REG_TC7_COUNT8_PER         (*(RwReg8 *)0x42003C14U) /**< \brief (TC7) COUNT8 Period Value */
+#define REG_TC7_COUNT8_CC0         (*(RwReg8 *)0x42003C18U) /**< \brief (TC7) COUNT8 Compare/Capture 0 */
+#define REG_TC7_COUNT8_CC1         (*(RwReg8 *)0x42003C19U) /**< \brief (TC7) COUNT8 Compare/Capture 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for TC7 peripheral ========== */
+#define TC7_CC8_NUM                 2
+#define TC7_CC16_NUM                2
+#define TC7_CC32_NUM                2
+#define TC7_DITHERING_EXT           0
+#define TC7_DMAC_ID_MC_0            37
+#define TC7_DMAC_ID_MC_1            38
+#define TC7_DMAC_ID_MC_LSB          37
+#define TC7_DMAC_ID_MC_MSB          38
+#define TC7_DMAC_ID_MC_SIZE         2
+#define TC7_DMAC_ID_OVF             36
+#define TC7_GCLK_ID                 29
+#define TC7_MASTER                  0
+#define TC7_OW_NUM                  2
+#define TC7_PERIOD_EXT              0
+#define TC7_SHADOW_EXT              0
+
+#endif /* _SAMD21_TC7_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tcc0.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tcc0.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tcc0.h	(revision 136)
@@ -0,0 +1,131 @@
+/**
+ * \file
+ *
+ * \brief Instance description for TCC0
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TCC0_INSTANCE_
+#define _SAMD21_TCC0_INSTANCE_
+
+/* ========== Register definition for TCC0 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_TCC0_CTRLA             (0x42002000U) /**< \brief (TCC0) Control A */
+#define REG_TCC0_CTRLBCLR          (0x42002004U) /**< \brief (TCC0) Control B Clear */
+#define REG_TCC0_CTRLBSET          (0x42002005U) /**< \brief (TCC0) Control B Set */
+#define REG_TCC0_SYNCBUSY          (0x42002008U) /**< \brief (TCC0) Synchronization Busy */
+#define REG_TCC0_FCTRLA            (0x4200200CU) /**< \brief (TCC0) Recoverable FaultA Configuration */
+#define REG_TCC0_FCTRLB            (0x42002010U) /**< \brief (TCC0) Recoverable FaultB Configuration */
+#define REG_TCC0_WEXCTRL           (0x42002014U) /**< \brief (TCC0) Waveform Extension Configuration */
+#define REG_TCC0_DRVCTRL           (0x42002018U) /**< \brief (TCC0) Driver Configuration */
+#define REG_TCC0_DBGCTRL           (0x4200201EU) /**< \brief (TCC0) Debug Control */
+#define REG_TCC0_EVCTRL            (0x42002020U) /**< \brief (TCC0) Event Control */
+#define REG_TCC0_INTENCLR          (0x42002024U) /**< \brief (TCC0) Interrupt Enable Clear */
+#define REG_TCC0_INTENSET          (0x42002028U) /**< \brief (TCC0) Interrupt Enable Set */
+#define REG_TCC0_INTFLAG           (0x4200202CU) /**< \brief (TCC0) Interrupt Flag Status and Clear */
+#define REG_TCC0_STATUS            (0x42002030U) /**< \brief (TCC0) Status */
+#define REG_TCC0_COUNT             (0x42002034U) /**< \brief (TCC0) Count */
+#define REG_TCC0_PATT              (0x42002038U) /**< \brief (TCC0) Pattern */
+#define REG_TCC0_WAVE              (0x4200203CU) /**< \brief (TCC0) Waveform Control */
+#define REG_TCC0_PER               (0x42002040U) /**< \brief (TCC0) Period */
+#define REG_TCC0_CC0               (0x42002044U) /**< \brief (TCC0) Compare and Capture 0 */
+#define REG_TCC0_CC1               (0x42002048U) /**< \brief (TCC0) Compare and Capture 1 */
+#define REG_TCC0_CC2               (0x4200204CU) /**< \brief (TCC0) Compare and Capture 2 */
+#define REG_TCC0_CC3               (0x42002050U) /**< \brief (TCC0) Compare and Capture 3 */
+#define REG_TCC0_PATTB             (0x42002064U) /**< \brief (TCC0) Pattern Buffer */
+#define REG_TCC0_WAVEB             (0x42002068U) /**< \brief (TCC0) Waveform Control Buffer */
+#define REG_TCC0_PERB              (0x4200206CU) /**< \brief (TCC0) Period Buffer */
+#define REG_TCC0_CCB0              (0x42002070U) /**< \brief (TCC0) Compare and Capture Buffer 0 */
+#define REG_TCC0_CCB1              (0x42002074U) /**< \brief (TCC0) Compare and Capture Buffer 1 */
+#define REG_TCC0_CCB2              (0x42002078U) /**< \brief (TCC0) Compare and Capture Buffer 2 */
+#define REG_TCC0_CCB3              (0x4200207CU) /**< \brief (TCC0) Compare and Capture Buffer 3 */
+#else
+#define REG_TCC0_CTRLA             (*(RwReg  *)0x42002000U) /**< \brief (TCC0) Control A */
+#define REG_TCC0_CTRLBCLR          (*(RwReg8 *)0x42002004U) /**< \brief (TCC0) Control B Clear */
+#define REG_TCC0_CTRLBSET          (*(RwReg8 *)0x42002005U) /**< \brief (TCC0) Control B Set */
+#define REG_TCC0_SYNCBUSY          (*(RoReg  *)0x42002008U) /**< \brief (TCC0) Synchronization Busy */
+#define REG_TCC0_FCTRLA            (*(RwReg  *)0x4200200CU) /**< \brief (TCC0) Recoverable FaultA Configuration */
+#define REG_TCC0_FCTRLB            (*(RwReg  *)0x42002010U) /**< \brief (TCC0) Recoverable FaultB Configuration */
+#define REG_TCC0_WEXCTRL           (*(RwReg  *)0x42002014U) /**< \brief (TCC0) Waveform Extension Configuration */
+#define REG_TCC0_DRVCTRL           (*(RwReg  *)0x42002018U) /**< \brief (TCC0) Driver Configuration */
+#define REG_TCC0_DBGCTRL           (*(RwReg8 *)0x4200201EU) /**< \brief (TCC0) Debug Control */
+#define REG_TCC0_EVCTRL            (*(RwReg  *)0x42002020U) /**< \brief (TCC0) Event Control */
+#define REG_TCC0_INTENCLR          (*(RwReg  *)0x42002024U) /**< \brief (TCC0) Interrupt Enable Clear */
+#define REG_TCC0_INTENSET          (*(RwReg  *)0x42002028U) /**< \brief (TCC0) Interrupt Enable Set */
+#define REG_TCC0_INTFLAG           (*(RwReg  *)0x4200202CU) /**< \brief (TCC0) Interrupt Flag Status and Clear */
+#define REG_TCC0_STATUS            (*(RwReg  *)0x42002030U) /**< \brief (TCC0) Status */
+#define REG_TCC0_COUNT             (*(RwReg  *)0x42002034U) /**< \brief (TCC0) Count */
+#define REG_TCC0_PATT              (*(RwReg16*)0x42002038U) /**< \brief (TCC0) Pattern */
+#define REG_TCC0_WAVE              (*(RwReg  *)0x4200203CU) /**< \brief (TCC0) Waveform Control */
+#define REG_TCC0_PER               (*(RwReg  *)0x42002040U) /**< \brief (TCC0) Period */
+#define REG_TCC0_CC0               (*(RwReg  *)0x42002044U) /**< \brief (TCC0) Compare and Capture 0 */
+#define REG_TCC0_CC1               (*(RwReg  *)0x42002048U) /**< \brief (TCC0) Compare and Capture 1 */
+#define REG_TCC0_CC2               (*(RwReg  *)0x4200204CU) /**< \brief (TCC0) Compare and Capture 2 */
+#define REG_TCC0_CC3               (*(RwReg  *)0x42002050U) /**< \brief (TCC0) Compare and Capture 3 */
+#define REG_TCC0_PATTB             (*(RwReg16*)0x42002064U) /**< \brief (TCC0) Pattern Buffer */
+#define REG_TCC0_WAVEB             (*(RwReg  *)0x42002068U) /**< \brief (TCC0) Waveform Control Buffer */
+#define REG_TCC0_PERB              (*(RwReg  *)0x4200206CU) /**< \brief (TCC0) Period Buffer */
+#define REG_TCC0_CCB0              (*(RwReg  *)0x42002070U) /**< \brief (TCC0) Compare and Capture Buffer 0 */
+#define REG_TCC0_CCB1              (*(RwReg  *)0x42002074U) /**< \brief (TCC0) Compare and Capture Buffer 1 */
+#define REG_TCC0_CCB2              (*(RwReg  *)0x42002078U) /**< \brief (TCC0) Compare and Capture Buffer 2 */
+#define REG_TCC0_CCB3              (*(RwReg  *)0x4200207CU) /**< \brief (TCC0) Compare and Capture Buffer 3 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for TCC0 peripheral ========== */
+#define TCC0_CC_NUM                 4
+#define TCC0_DITHERING              1
+#define TCC0_DMAC_ID_MC_0           14
+#define TCC0_DMAC_ID_MC_1           15
+#define TCC0_DMAC_ID_MC_2           16
+#define TCC0_DMAC_ID_MC_3           17
+#define TCC0_DMAC_ID_MC_LSB         14
+#define TCC0_DMAC_ID_MC_MSB         17
+#define TCC0_DMAC_ID_MC_SIZE        4
+#define TCC0_DMAC_ID_OVF            13
+#define TCC0_DTI                    1
+#define TCC0_EXT                    (TCC0_DITHERING*16+TCC0_PG*8+TCC0_SWAP*4+TCC0_DTI*2+TCC0_OTMX*1)
+#define TCC0_GCLK_ID                26
+#define TCC0_MASTER                 0
+#define TCC0_OTMX                   1
+#define TCC0_OW_NUM                 8
+#define TCC0_PG                     1
+#define TCC0_SIZE                   24
+#define TCC0_SWAP                   1
+
+#endif /* _SAMD21_TCC0_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tcc1.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tcc1.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tcc1.h	(revision 136)
@@ -0,0 +1,119 @@
+/**
+ * \file
+ *
+ * \brief Instance description for TCC1
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TCC1_INSTANCE_
+#define _SAMD21_TCC1_INSTANCE_
+
+/* ========== Register definition for TCC1 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_TCC1_CTRLA             (0x42002400U) /**< \brief (TCC1) Control A */
+#define REG_TCC1_CTRLBCLR          (0x42002404U) /**< \brief (TCC1) Control B Clear */
+#define REG_TCC1_CTRLBSET          (0x42002405U) /**< \brief (TCC1) Control B Set */
+#define REG_TCC1_SYNCBUSY          (0x42002408U) /**< \brief (TCC1) Synchronization Busy */
+#define REG_TCC1_FCTRLA            (0x4200240CU) /**< \brief (TCC1) Recoverable FaultA Configuration */
+#define REG_TCC1_FCTRLB            (0x42002410U) /**< \brief (TCC1) Recoverable FaultB Configuration */
+#define REG_TCC1_DRVCTRL           (0x42002418U) /**< \brief (TCC1) Driver Configuration */
+#define REG_TCC1_DBGCTRL           (0x4200241EU) /**< \brief (TCC1) Debug Control */
+#define REG_TCC1_EVCTRL            (0x42002420U) /**< \brief (TCC1) Event Control */
+#define REG_TCC1_INTENCLR          (0x42002424U) /**< \brief (TCC1) Interrupt Enable Clear */
+#define REG_TCC1_INTENSET          (0x42002428U) /**< \brief (TCC1) Interrupt Enable Set */
+#define REG_TCC1_INTFLAG           (0x4200242CU) /**< \brief (TCC1) Interrupt Flag Status and Clear */
+#define REG_TCC1_STATUS            (0x42002430U) /**< \brief (TCC1) Status */
+#define REG_TCC1_COUNT             (0x42002434U) /**< \brief (TCC1) Count */
+#define REG_TCC1_PATT              (0x42002438U) /**< \brief (TCC1) Pattern */
+#define REG_TCC1_WAVE              (0x4200243CU) /**< \brief (TCC1) Waveform Control */
+#define REG_TCC1_PER               (0x42002440U) /**< \brief (TCC1) Period */
+#define REG_TCC1_CC0               (0x42002444U) /**< \brief (TCC1) Compare and Capture 0 */
+#define REG_TCC1_CC1               (0x42002448U) /**< \brief (TCC1) Compare and Capture 1 */
+#define REG_TCC1_PATTB             (0x42002464U) /**< \brief (TCC1) Pattern Buffer */
+#define REG_TCC1_WAVEB             (0x42002468U) /**< \brief (TCC1) Waveform Control Buffer */
+#define REG_TCC1_PERB              (0x4200246CU) /**< \brief (TCC1) Period Buffer */
+#define REG_TCC1_CCB0              (0x42002470U) /**< \brief (TCC1) Compare and Capture Buffer 0 */
+#define REG_TCC1_CCB1              (0x42002474U) /**< \brief (TCC1) Compare and Capture Buffer 1 */
+#else
+#define REG_TCC1_CTRLA             (*(RwReg  *)0x42002400U) /**< \brief (TCC1) Control A */
+#define REG_TCC1_CTRLBCLR          (*(RwReg8 *)0x42002404U) /**< \brief (TCC1) Control B Clear */
+#define REG_TCC1_CTRLBSET          (*(RwReg8 *)0x42002405U) /**< \brief (TCC1) Control B Set */
+#define REG_TCC1_SYNCBUSY          (*(RoReg  *)0x42002408U) /**< \brief (TCC1) Synchronization Busy */
+#define REG_TCC1_FCTRLA            (*(RwReg  *)0x4200240CU) /**< \brief (TCC1) Recoverable FaultA Configuration */
+#define REG_TCC1_FCTRLB            (*(RwReg  *)0x42002410U) /**< \brief (TCC1) Recoverable FaultB Configuration */
+#define REG_TCC1_DRVCTRL           (*(RwReg  *)0x42002418U) /**< \brief (TCC1) Driver Configuration */
+#define REG_TCC1_DBGCTRL           (*(RwReg8 *)0x4200241EU) /**< \brief (TCC1) Debug Control */
+#define REG_TCC1_EVCTRL            (*(RwReg  *)0x42002420U) /**< \brief (TCC1) Event Control */
+#define REG_TCC1_INTENCLR          (*(RwReg  *)0x42002424U) /**< \brief (TCC1) Interrupt Enable Clear */
+#define REG_TCC1_INTENSET          (*(RwReg  *)0x42002428U) /**< \brief (TCC1) Interrupt Enable Set */
+#define REG_TCC1_INTFLAG           (*(RwReg  *)0x4200242CU) /**< \brief (TCC1) Interrupt Flag Status and Clear */
+#define REG_TCC1_STATUS            (*(RwReg  *)0x42002430U) /**< \brief (TCC1) Status */
+#define REG_TCC1_COUNT             (*(RwReg  *)0x42002434U) /**< \brief (TCC1) Count */
+#define REG_TCC1_PATT              (*(RwReg16*)0x42002438U) /**< \brief (TCC1) Pattern */
+#define REG_TCC1_WAVE              (*(RwReg  *)0x4200243CU) /**< \brief (TCC1) Waveform Control */
+#define REG_TCC1_PER               (*(RwReg  *)0x42002440U) /**< \brief (TCC1) Period */
+#define REG_TCC1_CC0               (*(RwReg  *)0x42002444U) /**< \brief (TCC1) Compare and Capture 0 */
+#define REG_TCC1_CC1               (*(RwReg  *)0x42002448U) /**< \brief (TCC1) Compare and Capture 1 */
+#define REG_TCC1_PATTB             (*(RwReg16*)0x42002464U) /**< \brief (TCC1) Pattern Buffer */
+#define REG_TCC1_WAVEB             (*(RwReg  *)0x42002468U) /**< \brief (TCC1) Waveform Control Buffer */
+#define REG_TCC1_PERB              (*(RwReg  *)0x4200246CU) /**< \brief (TCC1) Period Buffer */
+#define REG_TCC1_CCB0              (*(RwReg  *)0x42002470U) /**< \brief (TCC1) Compare and Capture Buffer 0 */
+#define REG_TCC1_CCB1              (*(RwReg  *)0x42002474U) /**< \brief (TCC1) Compare and Capture Buffer 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for TCC1 peripheral ========== */
+#define TCC1_CC_NUM                 2
+#define TCC1_DITHERING              1
+#define TCC1_DMAC_ID_MC_0           19
+#define TCC1_DMAC_ID_MC_1           20
+#define TCC1_DMAC_ID_MC_LSB         19
+#define TCC1_DMAC_ID_MC_MSB         20
+#define TCC1_DMAC_ID_MC_SIZE        2
+#define TCC1_DMAC_ID_OVF            18
+#define TCC1_DTI                    0
+#define TCC1_EXT                    (TCC1_DITHERING*16+TCC1_PG*8+TCC1_SWAP*4+TCC1_DTI*2+TCC1_OTMX*1)
+#define TCC1_GCLK_ID                26
+#define TCC1_MASTER                 1
+#define TCC1_OTMX                   0
+#define TCC1_OW_NUM                 4
+#define TCC1_PG                     1
+#define TCC1_SIZE                   24
+#define TCC1_SWAP                   0
+
+#endif /* _SAMD21_TCC1_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tcc2.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tcc2.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tcc2.h	(revision 136)
@@ -0,0 +1,115 @@
+/**
+ * \file
+ *
+ * \brief Instance description for TCC2
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_TCC2_INSTANCE_
+#define _SAMD21_TCC2_INSTANCE_
+
+/* ========== Register definition for TCC2 peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_TCC2_CTRLA             (0x42002800U) /**< \brief (TCC2) Control A */
+#define REG_TCC2_CTRLBCLR          (0x42002804U) /**< \brief (TCC2) Control B Clear */
+#define REG_TCC2_CTRLBSET          (0x42002805U) /**< \brief (TCC2) Control B Set */
+#define REG_TCC2_SYNCBUSY          (0x42002808U) /**< \brief (TCC2) Synchronization Busy */
+#define REG_TCC2_FCTRLA            (0x4200280CU) /**< \brief (TCC2) Recoverable FaultA Configuration */
+#define REG_TCC2_FCTRLB            (0x42002810U) /**< \brief (TCC2) Recoverable FaultB Configuration */
+#define REG_TCC2_DRVCTRL           (0x42002818U) /**< \brief (TCC2) Driver Configuration */
+#define REG_TCC2_DBGCTRL           (0x4200281EU) /**< \brief (TCC2) Debug Control */
+#define REG_TCC2_EVCTRL            (0x42002820U) /**< \brief (TCC2) Event Control */
+#define REG_TCC2_INTENCLR          (0x42002824U) /**< \brief (TCC2) Interrupt Enable Clear */
+#define REG_TCC2_INTENSET          (0x42002828U) /**< \brief (TCC2) Interrupt Enable Set */
+#define REG_TCC2_INTFLAG           (0x4200282CU) /**< \brief (TCC2) Interrupt Flag Status and Clear */
+#define REG_TCC2_STATUS            (0x42002830U) /**< \brief (TCC2) Status */
+#define REG_TCC2_COUNT             (0x42002834U) /**< \brief (TCC2) Count */
+#define REG_TCC2_WAVE              (0x4200283CU) /**< \brief (TCC2) Waveform Control */
+#define REG_TCC2_PER               (0x42002840U) /**< \brief (TCC2) Period */
+#define REG_TCC2_CC0               (0x42002844U) /**< \brief (TCC2) Compare and Capture 0 */
+#define REG_TCC2_CC1               (0x42002848U) /**< \brief (TCC2) Compare and Capture 1 */
+#define REG_TCC2_WAVEB             (0x42002868U) /**< \brief (TCC2) Waveform Control Buffer */
+#define REG_TCC2_PERB              (0x4200286CU) /**< \brief (TCC2) Period Buffer */
+#define REG_TCC2_CCB0              (0x42002870U) /**< \brief (TCC2) Compare and Capture Buffer 0 */
+#define REG_TCC2_CCB1              (0x42002874U) /**< \brief (TCC2) Compare and Capture Buffer 1 */
+#else
+#define REG_TCC2_CTRLA             (*(RwReg  *)0x42002800U) /**< \brief (TCC2) Control A */
+#define REG_TCC2_CTRLBCLR          (*(RwReg8 *)0x42002804U) /**< \brief (TCC2) Control B Clear */
+#define REG_TCC2_CTRLBSET          (*(RwReg8 *)0x42002805U) /**< \brief (TCC2) Control B Set */
+#define REG_TCC2_SYNCBUSY          (*(RoReg  *)0x42002808U) /**< \brief (TCC2) Synchronization Busy */
+#define REG_TCC2_FCTRLA            (*(RwReg  *)0x4200280CU) /**< \brief (TCC2) Recoverable FaultA Configuration */
+#define REG_TCC2_FCTRLB            (*(RwReg  *)0x42002810U) /**< \brief (TCC2) Recoverable FaultB Configuration */
+#define REG_TCC2_DRVCTRL           (*(RwReg  *)0x42002818U) /**< \brief (TCC2) Driver Configuration */
+#define REG_TCC2_DBGCTRL           (*(RwReg8 *)0x4200281EU) /**< \brief (TCC2) Debug Control */
+#define REG_TCC2_EVCTRL            (*(RwReg  *)0x42002820U) /**< \brief (TCC2) Event Control */
+#define REG_TCC2_INTENCLR          (*(RwReg  *)0x42002824U) /**< \brief (TCC2) Interrupt Enable Clear */
+#define REG_TCC2_INTENSET          (*(RwReg  *)0x42002828U) /**< \brief (TCC2) Interrupt Enable Set */
+#define REG_TCC2_INTFLAG           (*(RwReg  *)0x4200282CU) /**< \brief (TCC2) Interrupt Flag Status and Clear */
+#define REG_TCC2_STATUS            (*(RwReg  *)0x42002830U) /**< \brief (TCC2) Status */
+#define REG_TCC2_COUNT             (*(RwReg  *)0x42002834U) /**< \brief (TCC2) Count */
+#define REG_TCC2_WAVE              (*(RwReg  *)0x4200283CU) /**< \brief (TCC2) Waveform Control */
+#define REG_TCC2_PER               (*(RwReg  *)0x42002840U) /**< \brief (TCC2) Period */
+#define REG_TCC2_CC0               (*(RwReg  *)0x42002844U) /**< \brief (TCC2) Compare and Capture 0 */
+#define REG_TCC2_CC1               (*(RwReg  *)0x42002848U) /**< \brief (TCC2) Compare and Capture 1 */
+#define REG_TCC2_WAVEB             (*(RwReg  *)0x42002868U) /**< \brief (TCC2) Waveform Control Buffer */
+#define REG_TCC2_PERB              (*(RwReg  *)0x4200286CU) /**< \brief (TCC2) Period Buffer */
+#define REG_TCC2_CCB0              (*(RwReg  *)0x42002870U) /**< \brief (TCC2) Compare and Capture Buffer 0 */
+#define REG_TCC2_CCB1              (*(RwReg  *)0x42002874U) /**< \brief (TCC2) Compare and Capture Buffer 1 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for TCC2 peripheral ========== */
+#define TCC2_CC_NUM                 2
+#define TCC2_DITHERING              0
+#define TCC2_DMAC_ID_MC_0           22
+#define TCC2_DMAC_ID_MC_1           23
+#define TCC2_DMAC_ID_MC_LSB         22
+#define TCC2_DMAC_ID_MC_MSB         23
+#define TCC2_DMAC_ID_MC_SIZE        2
+#define TCC2_DMAC_ID_OVF            21
+#define TCC2_DTI                    0
+#define TCC2_EXT                    (TCC2_DITHERING*16+TCC2_PG*8+TCC2_SWAP*4+TCC2_DTI*2+TCC2_OTMX*1)
+#define TCC2_GCLK_ID                27
+#define TCC2_MASTER                 0
+#define TCC2_OTMX                   0
+#define TCC2_OW_NUM                 2
+#define TCC2_PG                     0
+#define TCC2_SIZE                   16
+#define TCC2_SWAP                   0
+
+#endif /* _SAMD21_TCC2_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/usb.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/usb.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/usb.h	(revision 136)
@@ -0,0 +1,342 @@
+/**
+ * \file
+ *
+ * \brief Instance description for USB
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_USB_INSTANCE_
+#define _SAMD21_USB_INSTANCE_
+
+/* ========== Register definition for USB peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_USB_CTRLA              (0x41005000U) /**< \brief (USB) Control A */
+#define REG_USB_SYNCBUSY           (0x41005002U) /**< \brief (USB) Synchronization Busy */
+#define REG_USB_FSMSTATUS          (0x4100500DU) /**< \brief (USB) Finite State Machine Status */
+#define REG_USB_DESCADD            (0x41005024U) /**< \brief (USB) Descriptor Address */
+#define REG_USB_PADCAL             (0x41005028U) /**< \brief (USB) USB PAD Calibration */
+#define REG_USB_DEVICE_CTRLB       (0x41005008U) /**< \brief (USB) DEVICE Control B */
+#define REG_USB_DEVICE_DADD        (0x4100500AU) /**< \brief (USB) DEVICE Device Address */
+#define REG_USB_DEVICE_STATUS      (0x4100500CU) /**< \brief (USB) DEVICE Status */
+#define REG_USB_DEVICE_FNUM        (0x41005010U) /**< \brief (USB) DEVICE Device Frame Number */
+#define REG_USB_DEVICE_INTENCLR    (0x41005014U) /**< \brief (USB) DEVICE Device Interrupt Enable Clear */
+#define REG_USB_DEVICE_INTENSET    (0x41005018U) /**< \brief (USB) DEVICE Device Interrupt Enable Set */
+#define REG_USB_DEVICE_INTFLAG     (0x4100501CU) /**< \brief (USB) DEVICE Device Interrupt Flag */
+#define REG_USB_DEVICE_EPINTSMRY   (0x41005020U) /**< \brief (USB) DEVICE End Point Interrupt Summary */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG0 (0x41005100U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR0 (0x41005104U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET0 (0x41005105U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (0x41005106U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG0 (0x41005107U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR0 (0x41005108U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET0 (0x41005109U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG1 (0x41005120U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR1 (0x41005124U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET1 (0x41005125U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (0x41005126U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG1 (0x41005127U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR1 (0x41005128U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET1 (0x41005129U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG2 (0x41005140U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR2 (0x41005144U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET2 (0x41005145U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (0x41005146U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG2 (0x41005147U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR2 (0x41005148U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET2 (0x41005149U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG3 (0x41005160U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR3 (0x41005164U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET3 (0x41005165U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (0x41005166U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG3 (0x41005167U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR3 (0x41005168U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET3 (0x41005169U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG4 (0x41005180U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR4 (0x41005184U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET4 (0x41005185U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (0x41005186U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG4 (0x41005187U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR4 (0x41005188U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET4 (0x41005189U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG5 (0x410051A0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR5 (0x410051A4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET5 (0x410051A5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (0x410051A6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG5 (0x410051A7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR5 (0x410051A8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET5 (0x410051A9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG6 (0x410051C0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR6 (0x410051C4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET6 (0x410051C5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (0x410051C6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG6 (0x410051C7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR6 (0x410051C8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET6 (0x410051C9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG7 (0x410051E0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR7 (0x410051E4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET7 (0x410051E5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS7 (0x410051E6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG7 (0x410051E7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR7 (0x410051E8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET7 (0x410051E9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 7 */
+#define REG_USB_HOST_CTRLB         (0x41005008U) /**< \brief (USB) HOST Control B */
+#define REG_USB_HOST_HSOFC         (0x4100500AU) /**< \brief (USB) HOST Host Start Of Frame Control */
+#define REG_USB_HOST_STATUS        (0x4100500CU) /**< \brief (USB) HOST Status */
+#define REG_USB_HOST_FNUM          (0x41005010U) /**< \brief (USB) HOST Host Frame Number */
+#define REG_USB_HOST_FLENHIGH      (0x41005012U) /**< \brief (USB) HOST Host Frame Length */
+#define REG_USB_HOST_INTENCLR      (0x41005014U) /**< \brief (USB) HOST Host Interrupt Enable Clear */
+#define REG_USB_HOST_INTENSET      (0x41005018U) /**< \brief (USB) HOST Host Interrupt Enable Set */
+#define REG_USB_HOST_INTFLAG       (0x4100501CU) /**< \brief (USB) HOST Host Interrupt Flag */
+#define REG_USB_HOST_PINTSMRY      (0x41005020U) /**< \brief (USB) HOST Pipe Interrupt Summary */
+#define REG_USB_HOST_PIPE_PCFG0    (0x41005100U) /**< \brief (USB) HOST_PIPE End Point Configuration 0 */
+#define REG_USB_HOST_PIPE_BINTERVAL0 (0x41005103U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 0 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR0 (0x41005104U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 0 */
+#define REG_USB_HOST_PIPE_PSTATUSSET0 (0x41005105U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 0 */
+#define REG_USB_HOST_PIPE_PSTATUS0 (0x41005106U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 0 */
+#define REG_USB_HOST_PIPE_PINTFLAG0 (0x41005107U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 0 */
+#define REG_USB_HOST_PIPE_PINTENCLR0 (0x41005108U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 0 */
+#define REG_USB_HOST_PIPE_PINTENSET0 (0x41005109U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 0 */
+#define REG_USB_HOST_PIPE_PCFG1    (0x41005120U) /**< \brief (USB) HOST_PIPE End Point Configuration 1 */
+#define REG_USB_HOST_PIPE_BINTERVAL1 (0x41005123U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 1 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR1 (0x41005124U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 1 */
+#define REG_USB_HOST_PIPE_PSTATUSSET1 (0x41005125U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 1 */
+#define REG_USB_HOST_PIPE_PSTATUS1 (0x41005126U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 1 */
+#define REG_USB_HOST_PIPE_PINTFLAG1 (0x41005127U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 1 */
+#define REG_USB_HOST_PIPE_PINTENCLR1 (0x41005128U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 1 */
+#define REG_USB_HOST_PIPE_PINTENSET1 (0x41005129U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 1 */
+#define REG_USB_HOST_PIPE_PCFG2    (0x41005140U) /**< \brief (USB) HOST_PIPE End Point Configuration 2 */
+#define REG_USB_HOST_PIPE_BINTERVAL2 (0x41005143U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 2 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR2 (0x41005144U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 2 */
+#define REG_USB_HOST_PIPE_PSTATUSSET2 (0x41005145U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 2 */
+#define REG_USB_HOST_PIPE_PSTATUS2 (0x41005146U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 2 */
+#define REG_USB_HOST_PIPE_PINTFLAG2 (0x41005147U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 2 */
+#define REG_USB_HOST_PIPE_PINTENCLR2 (0x41005148U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 2 */
+#define REG_USB_HOST_PIPE_PINTENSET2 (0x41005149U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 2 */
+#define REG_USB_HOST_PIPE_PCFG3    (0x41005160U) /**< \brief (USB) HOST_PIPE End Point Configuration 3 */
+#define REG_USB_HOST_PIPE_BINTERVAL3 (0x41005163U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 3 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR3 (0x41005164U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 3 */
+#define REG_USB_HOST_PIPE_PSTATUSSET3 (0x41005165U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 3 */
+#define REG_USB_HOST_PIPE_PSTATUS3 (0x41005166U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 3 */
+#define REG_USB_HOST_PIPE_PINTFLAG3 (0x41005167U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 3 */
+#define REG_USB_HOST_PIPE_PINTENCLR3 (0x41005168U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 3 */
+#define REG_USB_HOST_PIPE_PINTENSET3 (0x41005169U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 3 */
+#define REG_USB_HOST_PIPE_PCFG4    (0x41005180U) /**< \brief (USB) HOST_PIPE End Point Configuration 4 */
+#define REG_USB_HOST_PIPE_BINTERVAL4 (0x41005183U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 4 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR4 (0x41005184U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 4 */
+#define REG_USB_HOST_PIPE_PSTATUSSET4 (0x41005185U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 4 */
+#define REG_USB_HOST_PIPE_PSTATUS4 (0x41005186U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 4 */
+#define REG_USB_HOST_PIPE_PINTFLAG4 (0x41005187U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 4 */
+#define REG_USB_HOST_PIPE_PINTENCLR4 (0x41005188U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 4 */
+#define REG_USB_HOST_PIPE_PINTENSET4 (0x41005189U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 4 */
+#define REG_USB_HOST_PIPE_PCFG5    (0x410051A0U) /**< \brief (USB) HOST_PIPE End Point Configuration 5 */
+#define REG_USB_HOST_PIPE_BINTERVAL5 (0x410051A3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 5 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR5 (0x410051A4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 5 */
+#define REG_USB_HOST_PIPE_PSTATUSSET5 (0x410051A5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 5 */
+#define REG_USB_HOST_PIPE_PSTATUS5 (0x410051A6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 5 */
+#define REG_USB_HOST_PIPE_PINTFLAG5 (0x410051A7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 5 */
+#define REG_USB_HOST_PIPE_PINTENCLR5 (0x410051A8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 5 */
+#define REG_USB_HOST_PIPE_PINTENSET5 (0x410051A9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 5 */
+#define REG_USB_HOST_PIPE_PCFG6    (0x410051C0U) /**< \brief (USB) HOST_PIPE End Point Configuration 6 */
+#define REG_USB_HOST_PIPE_BINTERVAL6 (0x410051C3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 6 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR6 (0x410051C4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 6 */
+#define REG_USB_HOST_PIPE_PSTATUSSET6 (0x410051C5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 6 */
+#define REG_USB_HOST_PIPE_PSTATUS6 (0x410051C6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 6 */
+#define REG_USB_HOST_PIPE_PINTFLAG6 (0x410051C7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 6 */
+#define REG_USB_HOST_PIPE_PINTENCLR6 (0x410051C8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 6 */
+#define REG_USB_HOST_PIPE_PINTENSET6 (0x410051C9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 6 */
+#define REG_USB_HOST_PIPE_PCFG7    (0x410051E0U) /**< \brief (USB) HOST_PIPE End Point Configuration 7 */
+#define REG_USB_HOST_PIPE_BINTERVAL7 (0x410051E3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 7 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR7 (0x410051E4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 7 */
+#define REG_USB_HOST_PIPE_PSTATUSSET7 (0x410051E5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 7 */
+#define REG_USB_HOST_PIPE_PSTATUS7 (0x410051E6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 7 */
+#define REG_USB_HOST_PIPE_PINTFLAG7 (0x410051E7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 7 */
+#define REG_USB_HOST_PIPE_PINTENCLR7 (0x410051E8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 7 */
+#define REG_USB_HOST_PIPE_PINTENSET7 (0x410051E9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 7 */
+#else
+#define REG_USB_CTRLA              (*(RwReg8 *)0x41005000U) /**< \brief (USB) Control A */
+#define REG_USB_SYNCBUSY           (*(RoReg8 *)0x41005002U) /**< \brief (USB) Synchronization Busy */
+#define REG_USB_FSMSTATUS          (*(RoReg8 *)0x4100500DU) /**< \brief (USB) Finite State Machine Status */
+#define REG_USB_DESCADD            (*(RwReg  *)0x41005024U) /**< \brief (USB) Descriptor Address */
+#define REG_USB_PADCAL             (*(RwReg16*)0x41005028U) /**< \brief (USB) USB PAD Calibration */
+#define REG_USB_DEVICE_CTRLB       (*(RwReg16*)0x41005008U) /**< \brief (USB) DEVICE Control B */
+#define REG_USB_DEVICE_DADD        (*(RwReg8 *)0x4100500AU) /**< \brief (USB) DEVICE Device Address */
+#define REG_USB_DEVICE_STATUS      (*(RoReg8 *)0x4100500CU) /**< \brief (USB) DEVICE Status */
+#define REG_USB_DEVICE_FNUM        (*(RoReg16*)0x41005010U) /**< \brief (USB) DEVICE Device Frame Number */
+#define REG_USB_DEVICE_INTENCLR    (*(RwReg16*)0x41005014U) /**< \brief (USB) DEVICE Device Interrupt Enable Clear */
+#define REG_USB_DEVICE_INTENSET    (*(RwReg16*)0x41005018U) /**< \brief (USB) DEVICE Device Interrupt Enable Set */
+#define REG_USB_DEVICE_INTFLAG     (*(RwReg16*)0x4100501CU) /**< \brief (USB) DEVICE Device Interrupt Flag */
+#define REG_USB_DEVICE_EPINTSMRY   (*(RoReg16*)0x41005020U) /**< \brief (USB) DEVICE End Point Interrupt Summary */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG0 (*(RwReg8 *)0x41005100U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR0 (*(WoReg8 *)0x41005104U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET0 (*(WoReg8 *)0x41005105U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41005106U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG0 (*(RwReg8 *)0x41005107U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR0 (*(RwReg8 *)0x41005108U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET0 (*(RwReg8 *)0x41005109U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 0 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG1 (*(RwReg8 *)0x41005120U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR1 (*(WoReg8 *)0x41005124U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET1 (*(WoReg8 *)0x41005125U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41005126U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG1 (*(RwReg8 *)0x41005127U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR1 (*(RwReg8 *)0x41005128U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET1 (*(RwReg8 *)0x41005129U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 1 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG2 (*(RwReg8 *)0x41005140U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR2 (*(WoReg8 *)0x41005144U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET2 (*(WoReg8 *)0x41005145U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41005146U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG2 (*(RwReg8 *)0x41005147U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR2 (*(RwReg8 *)0x41005148U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET2 (*(RwReg8 *)0x41005149U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 2 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG3 (*(RwReg8 *)0x41005160U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR3 (*(WoReg8 *)0x41005164U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET3 (*(WoReg8 *)0x41005165U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41005166U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG3 (*(RwReg8 *)0x41005167U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR3 (*(RwReg8 *)0x41005168U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET3 (*(RwReg8 *)0x41005169U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 3 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG4 (*(RwReg8 *)0x41005180U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR4 (*(WoReg8 *)0x41005184U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET4 (*(WoReg8 *)0x41005185U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41005186U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG4 (*(RwReg8 *)0x41005187U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR4 (*(RwReg8 *)0x41005188U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET4 (*(RwReg8 *)0x41005189U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 4 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG5 (*(RwReg8 *)0x410051A0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR5 (*(WoReg8 *)0x410051A4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET5 (*(WoReg8 *)0x410051A5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410051A6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG5 (*(RwReg8 *)0x410051A7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR5 (*(RwReg8 *)0x410051A8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET5 (*(RwReg8 *)0x410051A9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 5 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG6 (*(RwReg8 *)0x410051C0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR6 (*(WoReg8 *)0x410051C4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET6 (*(WoReg8 *)0x410051C5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410051C6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG6 (*(RwReg8 *)0x410051C7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR6 (*(RwReg8 *)0x410051C8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET6 (*(RwReg8 *)0x410051C9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 6 */
+#define REG_USB_DEVICE_ENDPOINT_EPCFG7 (*(RwReg8 *)0x410051E0U) /**< \brief (USB) DEVICE_ENDPOINT End Point Configuration 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR7 (*(WoReg8 *)0x410051E4U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Clear 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUSSET7 (*(WoReg8 *)0x410051E5U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status Set 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPSTATUS7 (*(RoReg8 *)0x410051E6U) /**< \brief (USB) DEVICE_ENDPOINT End Point Pipe Status 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTFLAG7 (*(RwReg8 *)0x410051E7U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Flag 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENCLR7 (*(RwReg8 *)0x410051E8U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 7 */
+#define REG_USB_DEVICE_ENDPOINT_EPINTENSET7 (*(RwReg8 *)0x410051E9U) /**< \brief (USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 7 */
+#define REG_USB_HOST_CTRLB         (*(RwReg16*)0x41005008U) /**< \brief (USB) HOST Control B */
+#define REG_USB_HOST_HSOFC         (*(RwReg8 *)0x4100500AU) /**< \brief (USB) HOST Host Start Of Frame Control */
+#define REG_USB_HOST_STATUS        (*(RwReg8 *)0x4100500CU) /**< \brief (USB) HOST Status */
+#define REG_USB_HOST_FNUM          (*(RwReg16*)0x41005010U) /**< \brief (USB) HOST Host Frame Number */
+#define REG_USB_HOST_FLENHIGH      (*(RoReg8 *)0x41005012U) /**< \brief (USB) HOST Host Frame Length */
+#define REG_USB_HOST_INTENCLR      (*(RwReg16*)0x41005014U) /**< \brief (USB) HOST Host Interrupt Enable Clear */
+#define REG_USB_HOST_INTENSET      (*(RwReg16*)0x41005018U) /**< \brief (USB) HOST Host Interrupt Enable Set */
+#define REG_USB_HOST_INTFLAG       (*(RwReg16*)0x4100501CU) /**< \brief (USB) HOST Host Interrupt Flag */
+#define REG_USB_HOST_PINTSMRY      (*(RoReg16*)0x41005020U) /**< \brief (USB) HOST Pipe Interrupt Summary */
+#define REG_USB_HOST_PIPE_PCFG0    (*(RwReg8 *)0x41005100U) /**< \brief (USB) HOST_PIPE End Point Configuration 0 */
+#define REG_USB_HOST_PIPE_BINTERVAL0 (*(RwReg8 *)0x41005103U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 0 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR0 (*(WoReg8 *)0x41005104U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 0 */
+#define REG_USB_HOST_PIPE_PSTATUSSET0 (*(WoReg8 *)0x41005105U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 0 */
+#define REG_USB_HOST_PIPE_PSTATUS0 (*(RoReg8 *)0x41005106U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 0 */
+#define REG_USB_HOST_PIPE_PINTFLAG0 (*(RwReg8 *)0x41005107U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 0 */
+#define REG_USB_HOST_PIPE_PINTENCLR0 (*(RwReg8 *)0x41005108U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 0 */
+#define REG_USB_HOST_PIPE_PINTENSET0 (*(RwReg8 *)0x41005109U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 0 */
+#define REG_USB_HOST_PIPE_PCFG1    (*(RwReg8 *)0x41005120U) /**< \brief (USB) HOST_PIPE End Point Configuration 1 */
+#define REG_USB_HOST_PIPE_BINTERVAL1 (*(RwReg8 *)0x41005123U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 1 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR1 (*(WoReg8 *)0x41005124U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 1 */
+#define REG_USB_HOST_PIPE_PSTATUSSET1 (*(WoReg8 *)0x41005125U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 1 */
+#define REG_USB_HOST_PIPE_PSTATUS1 (*(RoReg8 *)0x41005126U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 1 */
+#define REG_USB_HOST_PIPE_PINTFLAG1 (*(RwReg8 *)0x41005127U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 1 */
+#define REG_USB_HOST_PIPE_PINTENCLR1 (*(RwReg8 *)0x41005128U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 1 */
+#define REG_USB_HOST_PIPE_PINTENSET1 (*(RwReg8 *)0x41005129U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 1 */
+#define REG_USB_HOST_PIPE_PCFG2    (*(RwReg8 *)0x41005140U) /**< \brief (USB) HOST_PIPE End Point Configuration 2 */
+#define REG_USB_HOST_PIPE_BINTERVAL2 (*(RwReg8 *)0x41005143U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 2 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR2 (*(WoReg8 *)0x41005144U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 2 */
+#define REG_USB_HOST_PIPE_PSTATUSSET2 (*(WoReg8 *)0x41005145U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 2 */
+#define REG_USB_HOST_PIPE_PSTATUS2 (*(RoReg8 *)0x41005146U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 2 */
+#define REG_USB_HOST_PIPE_PINTFLAG2 (*(RwReg8 *)0x41005147U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 2 */
+#define REG_USB_HOST_PIPE_PINTENCLR2 (*(RwReg8 *)0x41005148U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 2 */
+#define REG_USB_HOST_PIPE_PINTENSET2 (*(RwReg8 *)0x41005149U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 2 */
+#define REG_USB_HOST_PIPE_PCFG3    (*(RwReg8 *)0x41005160U) /**< \brief (USB) HOST_PIPE End Point Configuration 3 */
+#define REG_USB_HOST_PIPE_BINTERVAL3 (*(RwReg8 *)0x41005163U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 3 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR3 (*(WoReg8 *)0x41005164U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 3 */
+#define REG_USB_HOST_PIPE_PSTATUSSET3 (*(WoReg8 *)0x41005165U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 3 */
+#define REG_USB_HOST_PIPE_PSTATUS3 (*(RoReg8 *)0x41005166U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 3 */
+#define REG_USB_HOST_PIPE_PINTFLAG3 (*(RwReg8 *)0x41005167U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 3 */
+#define REG_USB_HOST_PIPE_PINTENCLR3 (*(RwReg8 *)0x41005168U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 3 */
+#define REG_USB_HOST_PIPE_PINTENSET3 (*(RwReg8 *)0x41005169U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 3 */
+#define REG_USB_HOST_PIPE_PCFG4    (*(RwReg8 *)0x41005180U) /**< \brief (USB) HOST_PIPE End Point Configuration 4 */
+#define REG_USB_HOST_PIPE_BINTERVAL4 (*(RwReg8 *)0x41005183U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 4 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR4 (*(WoReg8 *)0x41005184U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 4 */
+#define REG_USB_HOST_PIPE_PSTATUSSET4 (*(WoReg8 *)0x41005185U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 4 */
+#define REG_USB_HOST_PIPE_PSTATUS4 (*(RoReg8 *)0x41005186U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 4 */
+#define REG_USB_HOST_PIPE_PINTFLAG4 (*(RwReg8 *)0x41005187U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 4 */
+#define REG_USB_HOST_PIPE_PINTENCLR4 (*(RwReg8 *)0x41005188U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 4 */
+#define REG_USB_HOST_PIPE_PINTENSET4 (*(RwReg8 *)0x41005189U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 4 */
+#define REG_USB_HOST_PIPE_PCFG5    (*(RwReg8 *)0x410051A0U) /**< \brief (USB) HOST_PIPE End Point Configuration 5 */
+#define REG_USB_HOST_PIPE_BINTERVAL5 (*(RwReg8 *)0x410051A3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 5 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR5 (*(WoReg8 *)0x410051A4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 5 */
+#define REG_USB_HOST_PIPE_PSTATUSSET5 (*(WoReg8 *)0x410051A5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 5 */
+#define REG_USB_HOST_PIPE_PSTATUS5 (*(RoReg8 *)0x410051A6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 5 */
+#define REG_USB_HOST_PIPE_PINTFLAG5 (*(RwReg8 *)0x410051A7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 5 */
+#define REG_USB_HOST_PIPE_PINTENCLR5 (*(RwReg8 *)0x410051A8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 5 */
+#define REG_USB_HOST_PIPE_PINTENSET5 (*(RwReg8 *)0x410051A9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 5 */
+#define REG_USB_HOST_PIPE_PCFG6    (*(RwReg8 *)0x410051C0U) /**< \brief (USB) HOST_PIPE End Point Configuration 6 */
+#define REG_USB_HOST_PIPE_BINTERVAL6 (*(RwReg8 *)0x410051C3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 6 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR6 (*(WoReg8 *)0x410051C4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 6 */
+#define REG_USB_HOST_PIPE_PSTATUSSET6 (*(WoReg8 *)0x410051C5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 6 */
+#define REG_USB_HOST_PIPE_PSTATUS6 (*(RoReg8 *)0x410051C6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 6 */
+#define REG_USB_HOST_PIPE_PINTFLAG6 (*(RwReg8 *)0x410051C7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 6 */
+#define REG_USB_HOST_PIPE_PINTENCLR6 (*(RwReg8 *)0x410051C8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 6 */
+#define REG_USB_HOST_PIPE_PINTENSET6 (*(RwReg8 *)0x410051C9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 6 */
+#define REG_USB_HOST_PIPE_PCFG7    (*(RwReg8 *)0x410051E0U) /**< \brief (USB) HOST_PIPE End Point Configuration 7 */
+#define REG_USB_HOST_PIPE_BINTERVAL7 (*(RwReg8 *)0x410051E3U) /**< \brief (USB) HOST_PIPE Bus Access Period of Pipe 7 */
+#define REG_USB_HOST_PIPE_PSTATUSCLR7 (*(WoReg8 *)0x410051E4U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Clear 7 */
+#define REG_USB_HOST_PIPE_PSTATUSSET7 (*(WoReg8 *)0x410051E5U) /**< \brief (USB) HOST_PIPE End Point Pipe Status Set 7 */
+#define REG_USB_HOST_PIPE_PSTATUS7 (*(RoReg8 *)0x410051E6U) /**< \brief (USB) HOST_PIPE End Point Pipe Status 7 */
+#define REG_USB_HOST_PIPE_PINTFLAG7 (*(RwReg8 *)0x410051E7U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag 7 */
+#define REG_USB_HOST_PIPE_PINTENCLR7 (*(RwReg8 *)0x410051E8U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Clear 7 */
+#define REG_USB_HOST_PIPE_PINTENSET7 (*(RwReg8 *)0x410051E9U) /**< \brief (USB) HOST_PIPE Pipe Interrupt Flag Set 7 */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for USB peripheral ========== */
+#define USB_EPT_NBR                 USB_EPT_NUM
+#define USB_EPT_NUM                 8
+#define USB_GCLK_ID                 6
+#define USB_PIPE_NUM                8
+
+#endif /* _SAMD21_USB_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/wdt.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/wdt.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/wdt.h	(revision 136)
@@ -0,0 +1,71 @@
+/**
+ * \file
+ *
+ * \brief Instance description for WDT
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21_WDT_INSTANCE_
+#define _SAMD21_WDT_INSTANCE_
+
+/* ========== Register definition for WDT peripheral ========== */
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#define REG_WDT_CTRL               (0x40001000U) /**< \brief (WDT) Control */
+#define REG_WDT_CONFIG             (0x40001001U) /**< \brief (WDT) Configuration */
+#define REG_WDT_EWCTRL             (0x40001002U) /**< \brief (WDT) Early Warning Interrupt Control */
+#define REG_WDT_INTENCLR           (0x40001004U) /**< \brief (WDT) Interrupt Enable Clear */
+#define REG_WDT_INTENSET           (0x40001005U) /**< \brief (WDT) Interrupt Enable Set */
+#define REG_WDT_INTFLAG            (0x40001006U) /**< \brief (WDT) Interrupt Flag Status and Clear */
+#define REG_WDT_STATUS             (0x40001007U) /**< \brief (WDT) Status */
+#define REG_WDT_CLEAR              (0x40001008U) /**< \brief (WDT) Clear */
+#else
+#define REG_WDT_CTRL               (*(RwReg8 *)0x40001000U) /**< \brief (WDT) Control */
+#define REG_WDT_CONFIG             (*(RwReg8 *)0x40001001U) /**< \brief (WDT) Configuration */
+#define REG_WDT_EWCTRL             (*(RwReg8 *)0x40001002U) /**< \brief (WDT) Early Warning Interrupt Control */
+#define REG_WDT_INTENCLR           (*(RwReg8 *)0x40001004U) /**< \brief (WDT) Interrupt Enable Clear */
+#define REG_WDT_INTENSET           (*(RwReg8 *)0x40001005U) /**< \brief (WDT) Interrupt Enable Set */
+#define REG_WDT_INTFLAG            (*(RwReg8 *)0x40001006U) /**< \brief (WDT) Interrupt Flag Status and Clear */
+#define REG_WDT_STATUS             (*(RoReg8 *)0x40001007U) /**< \brief (WDT) Status */
+#define REG_WDT_CLEAR              (*(WoReg8 *)0x40001008U) /**< \brief (WDT) Clear */
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+
+/* ========== Instance parameters for WDT peripheral ========== */
+#define WDT_GCLK_ID                 3
+
+#endif /* _SAMD21_WDT_INSTANCE_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e15a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e15a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e15a.h	(revision 136)
@@ -0,0 +1,670 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21E15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21E15A_PIO_
+#define _SAMD21E15A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+
+#endif /* _SAMD21E15A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e16a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e16a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e16a.h	(revision 136)
@@ -0,0 +1,670 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21E16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21E16A_PIO_
+#define _SAMD21E16A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+
+#endif /* _SAMD21E16A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e17a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e17a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e17a.h	(revision 136)
@@ -0,0 +1,670 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21E17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21E17A_PIO_
+#define _SAMD21E17A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+
+#endif /* _SAMD21E17A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e18a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e18a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21e18a.h	(revision 136)
@@ -0,0 +1,670 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21E18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21E18A_PIO_
+#define _SAMD21E18A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+
+#endif /* _SAMD21E18A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g15a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g15a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g15a.h	(revision 136)
@@ -0,0 +1,952 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21G15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21G15A_PIO_
+#define _SAMD21G15A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA12                          12  /**< \brief Pin Number for PA12 */
+#define PORT_PA12                  (1u << 12) /**< \brief PORT Mask  for PA12 */
+#define PIN_PA13                          13  /**< \brief Pin Number for PA13 */
+#define PORT_PA13                  (1u << 13) /**< \brief PORT Mask  for PA13 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA20                          20  /**< \brief Pin Number for PA20 */
+#define PORT_PA20                  (1u << 20) /**< \brief PORT Mask  for PA20 */
+#define PIN_PA21                          21  /**< \brief Pin Number for PA21 */
+#define PORT_PA21                  (1u << 21) /**< \brief PORT Mask  for PA21 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+#define PIN_PB02                          34  /**< \brief Pin Number for PB02 */
+#define PORT_PB02                  (1u <<  2) /**< \brief PORT Mask  for PB02 */
+#define PIN_PB03                          35  /**< \brief Pin Number for PB03 */
+#define PORT_PB03                  (1u <<  3) /**< \brief PORT Mask  for PB03 */
+#define PIN_PB08                          40  /**< \brief Pin Number for PB08 */
+#define PORT_PB08                  (1u <<  8) /**< \brief PORT Mask  for PB08 */
+#define PIN_PB09                          41  /**< \brief Pin Number for PB09 */
+#define PORT_PB09                  (1u <<  9) /**< \brief PORT Mask  for PB09 */
+#define PIN_PB10                          42  /**< \brief Pin Number for PB10 */
+#define PORT_PB10                  (1u << 10) /**< \brief PORT Mask  for PB10 */
+#define PIN_PB11                          43  /**< \brief Pin Number for PB11 */
+#define PORT_PB11                  (1u << 11) /**< \brief PORT Mask  for PB11 */
+#define PIN_PB22                          54  /**< \brief Pin Number for PB22 */
+#define PORT_PB22                  (1u << 22) /**< \brief PORT Mask  for PB22 */
+#define PIN_PB23                          55  /**< \brief Pin Number for PB23 */
+#define PORT_PB23                  (1u << 23) /**< \brief PORT Mask  for PB23 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PB22H_GCLK_IO0                54  /**< \brief GCLK signal: IO0 on PB22 mux H */
+#define MUX_PB22H_GCLK_IO0                 7
+#define PINMUX_PB22H_GCLK_IO0      ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
+#define PORT_PB22H_GCLK_IO0        (1u << 22)
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PB23H_GCLK_IO1                55  /**< \brief GCLK signal: IO1 on PB23 mux H */
+#define MUX_PB23H_GCLK_IO1                 7
+#define PINMUX_PB23H_GCLK_IO1      ((PIN_PB23H_GCLK_IO1 << 16) | MUX_PB23H_GCLK_IO1)
+#define PORT_PB23H_GCLK_IO1        (1u << 23)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA20H_GCLK_IO4                20  /**< \brief GCLK signal: IO4 on PA20 mux H */
+#define MUX_PA20H_GCLK_IO4                 7
+#define PINMUX_PA20H_GCLK_IO4      ((PIN_PA20H_GCLK_IO4 << 16) | MUX_PA20H_GCLK_IO4)
+#define PORT_PA20H_GCLK_IO4        (1u << 20)
+#define PIN_PB10H_GCLK_IO4                42  /**< \brief GCLK signal: IO4 on PB10 mux H */
+#define MUX_PB10H_GCLK_IO4                 7
+#define PINMUX_PB10H_GCLK_IO4      ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
+#define PORT_PB10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA21H_GCLK_IO5                21  /**< \brief GCLK signal: IO5 on PA21 mux H */
+#define MUX_PA21H_GCLK_IO5                 7
+#define PINMUX_PA21H_GCLK_IO5      ((PIN_PA21H_GCLK_IO5 << 16) | MUX_PA21H_GCLK_IO5)
+#define PORT_PA21H_GCLK_IO5        (1u << 21)
+#define PIN_PB11H_GCLK_IO5                43  /**< \brief GCLK signal: IO5 on PB11 mux H */
+#define MUX_PB11H_GCLK_IO5                 7
+#define PINMUX_PB11H_GCLK_IO5      ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
+#define PORT_PB11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PB02A_EIC_EXTINT2             34  /**< \brief EIC signal: EXTINT2 on PB02 mux A */
+#define MUX_PB02A_EIC_EXTINT2              0
+#define PINMUX_PB02A_EIC_EXTINT2   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
+#define PORT_PB02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PB03A_EIC_EXTINT3             35  /**< \brief EIC signal: EXTINT3 on PB03 mux A */
+#define MUX_PB03A_EIC_EXTINT3              0
+#define PINMUX_PB03A_EIC_EXTINT3   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
+#define PORT_PB03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA20A_EIC_EXTINT4             20  /**< \brief EIC signal: EXTINT4 on PA20 mux A */
+#define MUX_PA20A_EIC_EXTINT4              0
+#define PINMUX_PA20A_EIC_EXTINT4   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
+#define PORT_PA20A_EIC_EXTINT4     (1u << 20)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA21A_EIC_EXTINT5             21  /**< \brief EIC signal: EXTINT5 on PA21 mux A */
+#define MUX_PA21A_EIC_EXTINT5              0
+#define PINMUX_PA21A_EIC_EXTINT5   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
+#define PORT_PA21A_EIC_EXTINT5     (1u << 21)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PB22A_EIC_EXTINT6             54  /**< \brief EIC signal: EXTINT6 on PB22 mux A */
+#define MUX_PB22A_EIC_EXTINT6              0
+#define PINMUX_PB22A_EIC_EXTINT6   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
+#define PORT_PB22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PB23A_EIC_EXTINT7             55  /**< \brief EIC signal: EXTINT7 on PB23 mux A */
+#define MUX_PB23A_EIC_EXTINT7              0
+#define PINMUX_PB23A_EIC_EXTINT7   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
+#define PORT_PB23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PB08A_EIC_EXTINT8             40  /**< \brief EIC signal: EXTINT8 on PB08 mux A */
+#define MUX_PB08A_EIC_EXTINT8              0
+#define PINMUX_PB08A_EIC_EXTINT8   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
+#define PORT_PB08A_EIC_EXTINT8     (1u <<  8)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PB09A_EIC_EXTINT9             41  /**< \brief EIC signal: EXTINT9 on PB09 mux A */
+#define MUX_PB09A_EIC_EXTINT9              0
+#define PINMUX_PB09A_EIC_EXTINT9   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
+#define PORT_PB09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PB10A_EIC_EXTINT10            42  /**< \brief EIC signal: EXTINT10 on PB10 mux A */
+#define MUX_PB10A_EIC_EXTINT10             0
+#define PINMUX_PB10A_EIC_EXTINT10  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
+#define PORT_PB10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PB11A_EIC_EXTINT11            43  /**< \brief EIC signal: EXTINT11 on PB11 mux A */
+#define MUX_PB11A_EIC_EXTINT11             0
+#define PINMUX_PB11A_EIC_EXTINT11  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
+#define PORT_PB11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA12A_EIC_EXTINT12            12  /**< \brief EIC signal: EXTINT12 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT12             0
+#define PINMUX_PA12A_EIC_EXTINT12  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
+#define PORT_PA12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PA13A_EIC_EXTINT13            13  /**< \brief EIC signal: EXTINT13 on PA13 mux A */
+#define MUX_PA13A_EIC_EXTINT13             0
+#define PINMUX_PA13A_EIC_EXTINT13  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
+#define PORT_PA13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PA12A_EIC_EXTINT17            12  /**< \brief EIC signal: EXTINT17 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT17             0
+#define PINMUX_PA12A_EIC_EXTINT17  ((PIN_PA12A_EIC_EXTINT17 << 16) | MUX_PA12A_EIC_EXTINT17)
+#define PORT_PA12A_EIC_EXTINT17    (1u << 12)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA13A_SERCOM0_PAD0            13  /**< \brief SERCOM0 signal: PAD0 on PA13 mux A */
+#define MUX_PA13A_SERCOM0_PAD0             0
+#define PINMUX_PA13A_SERCOM0_PAD0  ((PIN_PA13A_SERCOM0_PAD0 << 16) | MUX_PA13A_SERCOM0_PAD0)
+#define PORT_PA13A_SERCOM0_PAD0    (1u << 13)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA12C_SERCOM2_PAD0            12  /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */
+#define MUX_PA12C_SERCOM2_PAD0             2
+#define PINMUX_PA12C_SERCOM2_PAD0  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
+#define PORT_PA12C_SERCOM2_PAD0    (1u << 12)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA13C_SERCOM2_PAD1            13  /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */
+#define MUX_PA13C_SERCOM2_PAD1             2
+#define PINMUX_PA13C_SERCOM2_PAD1  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
+#define PORT_PA13C_SERCOM2_PAD1    (1u << 13)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA20D_SERCOM3_PAD2            20  /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */
+#define MUX_PA20D_SERCOM3_PAD2             3
+#define PINMUX_PA20D_SERCOM3_PAD2  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
+#define PORT_PA20D_SERCOM3_PAD2    (1u << 20)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA21D_SERCOM3_PAD3            21  /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */
+#define MUX_PA21D_SERCOM3_PAD3             3
+#define PINMUX_PA21D_SERCOM3_PAD3  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
+#define PORT_PA21D_SERCOM3_PAD3    (1u << 21)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for SERCOM4 peripheral ========== */
+#define PIN_PA12D_SERCOM4_PAD0            12  /**< \brief SERCOM4 signal: PAD0 on PA12 mux D */
+#define MUX_PA12D_SERCOM4_PAD0             3
+#define PINMUX_PA12D_SERCOM4_PAD0  ((PIN_PA12D_SERCOM4_PAD0 << 16) | MUX_PA12D_SERCOM4_PAD0)
+#define PORT_PA12D_SERCOM4_PAD0    (1u << 12)
+#define PIN_PB08D_SERCOM4_PAD0            40  /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */
+#define MUX_PB08D_SERCOM4_PAD0             3
+#define PINMUX_PB08D_SERCOM4_PAD0  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
+#define PORT_PB08D_SERCOM4_PAD0    (1u <<  8)
+#define PIN_PA13D_SERCOM4_PAD1            13  /**< \brief SERCOM4 signal: PAD1 on PA13 mux D */
+#define MUX_PA13D_SERCOM4_PAD1             3
+#define PINMUX_PA13D_SERCOM4_PAD1  ((PIN_PA13D_SERCOM4_PAD1 << 16) | MUX_PA13D_SERCOM4_PAD1)
+#define PORT_PA13D_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB09D_SERCOM4_PAD1            41  /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */
+#define MUX_PB09D_SERCOM4_PAD1             3
+#define PINMUX_PB09D_SERCOM4_PAD1  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
+#define PORT_PB09D_SERCOM4_PAD1    (1u <<  9)
+#define PIN_PA14D_SERCOM4_PAD2            14  /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */
+#define MUX_PA14D_SERCOM4_PAD2             3
+#define PINMUX_PA14D_SERCOM4_PAD2  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
+#define PORT_PA14D_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB10D_SERCOM4_PAD2            42  /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
+#define MUX_PB10D_SERCOM4_PAD2             3
+#define PINMUX_PB10D_SERCOM4_PAD2  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
+#define PORT_PB10D_SERCOM4_PAD2    (1u << 10)
+#define PIN_PA15D_SERCOM4_PAD3            15  /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */
+#define MUX_PA15D_SERCOM4_PAD3             3
+#define PINMUX_PA15D_SERCOM4_PAD3  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
+#define PORT_PA15D_SERCOM4_PAD3    (1u << 15)
+#define PIN_PB11D_SERCOM4_PAD3            43  /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */
+#define MUX_PB11D_SERCOM4_PAD3             3
+#define PINMUX_PB11D_SERCOM4_PAD3  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
+#define PORT_PB11D_SERCOM4_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM5 peripheral ========== */
+#define PIN_PA22D_SERCOM5_PAD0            22  /**< \brief SERCOM5 signal: PAD0 on PA22 mux D */
+#define MUX_PA22D_SERCOM5_PAD0             3
+#define PINMUX_PA22D_SERCOM5_PAD0  ((PIN_PA22D_SERCOM5_PAD0 << 16) | MUX_PA22D_SERCOM5_PAD0)
+#define PORT_PA22D_SERCOM5_PAD0    (1u << 22)
+#define PIN_PB02D_SERCOM5_PAD0            34  /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */
+#define MUX_PB02D_SERCOM5_PAD0             3
+#define PINMUX_PB02D_SERCOM5_PAD0  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
+#define PORT_PB02D_SERCOM5_PAD0    (1u <<  2)
+#define PIN_PA23D_SERCOM5_PAD1            23  /**< \brief SERCOM5 signal: PAD1 on PA23 mux D */
+#define MUX_PA23D_SERCOM5_PAD1             3
+#define PINMUX_PA23D_SERCOM5_PAD1  ((PIN_PA23D_SERCOM5_PAD1 << 16) | MUX_PA23D_SERCOM5_PAD1)
+#define PORT_PA23D_SERCOM5_PAD1    (1u << 23)
+#define PIN_PB03D_SERCOM5_PAD1            35  /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */
+#define MUX_PB03D_SERCOM5_PAD1             3
+#define PINMUX_PB03D_SERCOM5_PAD1  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
+#define PORT_PB03D_SERCOM5_PAD1    (1u <<  3)
+#define PIN_PA24D_SERCOM5_PAD2            24  /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */
+#define MUX_PA24D_SERCOM5_PAD2             3
+#define PINMUX_PA24D_SERCOM5_PAD2  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
+#define PORT_PA24D_SERCOM5_PAD2    (1u << 24)
+#define PIN_PB22D_SERCOM5_PAD2            54  /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */
+#define MUX_PB22D_SERCOM5_PAD2             3
+#define PINMUX_PB22D_SERCOM5_PAD2  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
+#define PORT_PB22D_SERCOM5_PAD2    (1u << 22)
+#define PIN_PA20C_SERCOM5_PAD2            20  /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */
+#define MUX_PA20C_SERCOM5_PAD2             2
+#define PINMUX_PA20C_SERCOM5_PAD2  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
+#define PORT_PA20C_SERCOM5_PAD2    (1u << 20)
+#define PIN_PA25D_SERCOM5_PAD3            25  /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */
+#define MUX_PA25D_SERCOM5_PAD3             3
+#define PINMUX_PA25D_SERCOM5_PAD3  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
+#define PORT_PA25D_SERCOM5_PAD3    (1u << 25)
+#define PIN_PB23D_SERCOM5_PAD3            55  /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */
+#define MUX_PB23D_SERCOM5_PAD3             3
+#define PINMUX_PB23D_SERCOM5_PAD3  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
+#define PORT_PB23D_SERCOM5_PAD3    (1u << 23)
+#define PIN_PA21C_SERCOM5_PAD3            21  /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */
+#define MUX_PA21C_SERCOM5_PAD3             2
+#define PINMUX_PA21C_SERCOM5_PAD3  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
+#define PORT_PA21C_SERCOM5_PAD3    (1u << 21)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PB10F_TCC0_WO4                42  /**< \brief TCC0 signal: WO4 on PB10 mux F */
+#define MUX_PB10F_TCC0_WO4                 5
+#define PINMUX_PB10F_TCC0_WO4      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
+#define PORT_PB10F_TCC0_WO4        (1u << 10)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PB11F_TCC0_WO5                43  /**< \brief TCC0 signal: WO5 on PB11 mux F */
+#define MUX_PB11F_TCC0_WO5                 5
+#define PINMUX_PB11F_TCC0_WO5      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
+#define PORT_PB11F_TCC0_WO5        (1u << 11)
+#define PIN_PA12F_TCC0_WO6                12  /**< \brief TCC0 signal: WO6 on PA12 mux F */
+#define MUX_PA12F_TCC0_WO6                 5
+#define PINMUX_PA12F_TCC0_WO6      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
+#define PORT_PA12F_TCC0_WO6        (1u << 12)
+#define PIN_PA20F_TCC0_WO6                20  /**< \brief TCC0 signal: WO6 on PA20 mux F */
+#define MUX_PA20F_TCC0_WO6                 5
+#define PINMUX_PA20F_TCC0_WO6      ((PIN_PA20F_TCC0_WO6 << 16) | MUX_PA20F_TCC0_WO6)
+#define PORT_PA20F_TCC0_WO6        (1u << 20)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA13F_TCC0_WO7                13  /**< \brief TCC0 signal: WO7 on PA13 mux F */
+#define MUX_PA13F_TCC0_WO7                 5
+#define PINMUX_PA13F_TCC0_WO7      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
+#define PORT_PA13F_TCC0_WO7        (1u << 13)
+#define PIN_PA21F_TCC0_WO7                21  /**< \brief TCC0 signal: WO7 on PA21 mux F */
+#define MUX_PA21F_TCC0_WO7                 5
+#define PINMUX_PA21F_TCC0_WO7      ((PIN_PA21F_TCC0_WO7 << 16) | MUX_PA21F_TCC0_WO7)
+#define PORT_PA21F_TCC0_WO7        (1u << 21)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA12E_TCC2_WO0                12  /**< \brief TCC2 signal: WO0 on PA12 mux E */
+#define MUX_PA12E_TCC2_WO0                 4
+#define PINMUX_PA12E_TCC2_WO0      ((PIN_PA12E_TCC2_WO0 << 16) | MUX_PA12E_TCC2_WO0)
+#define PORT_PA12E_TCC2_WO0        (1u << 12)
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA13E_TCC2_WO1                13  /**< \brief TCC2 signal: WO1 on PA13 mux E */
+#define MUX_PA13E_TCC2_WO1                 4
+#define PINMUX_PA13E_TCC2_WO1      ((PIN_PA13E_TCC2_WO1 << 16) | MUX_PA13E_TCC2_WO1)
+#define PORT_PA13E_TCC2_WO1        (1u << 13)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PB08E_TC4_WO0                 40  /**< \brief TC4 signal: WO0 on PB08 mux E */
+#define MUX_PB08E_TC4_WO0                  4
+#define PINMUX_PB08E_TC4_WO0       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
+#define PORT_PB08E_TC4_WO0         (1u <<  8)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+#define PIN_PB09E_TC4_WO1                 41  /**< \brief TC4 signal: WO1 on PB09 mux E */
+#define MUX_PB09E_TC4_WO1                  4
+#define PINMUX_PB09E_TC4_WO1       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
+#define PORT_PB09E_TC4_WO1         (1u <<  9)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PB10E_TC5_WO0                 42  /**< \brief TC5 signal: WO0 on PB10 mux E */
+#define MUX_PB10E_TC5_WO0                  4
+#define PINMUX_PB10E_TC5_WO0       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
+#define PORT_PB10E_TC5_WO0         (1u << 10)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+#define PIN_PB11E_TC5_WO1                 43  /**< \brief TC5 signal: WO1 on PB11 mux E */
+#define MUX_PB11E_TC5_WO1                  4
+#define PINMUX_PB11E_TC5_WO1       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
+#define PORT_PB11E_TC5_WO1         (1u << 11)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PB08B_ADC_AIN2                40  /**< \brief ADC signal: AIN2 on PB08 mux B */
+#define MUX_PB08B_ADC_AIN2                 1
+#define PINMUX_PB08B_ADC_AIN2      ((PIN_PB08B_ADC_AIN2 << 16) | MUX_PB08B_ADC_AIN2)
+#define PORT_PB08B_ADC_AIN2        (1u <<  8)
+#define PIN_PB09B_ADC_AIN3                41  /**< \brief ADC signal: AIN3 on PB09 mux B */
+#define MUX_PB09B_ADC_AIN3                 1
+#define PINMUX_PB09B_ADC_AIN3      ((PIN_PB09B_ADC_AIN3 << 16) | MUX_PB09B_ADC_AIN3)
+#define PORT_PB09B_ADC_AIN3        (1u <<  9)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PB02B_ADC_AIN10               34  /**< \brief ADC signal: AIN10 on PB02 mux B */
+#define MUX_PB02B_ADC_AIN10                1
+#define PINMUX_PB02B_ADC_AIN10     ((PIN_PB02B_ADC_AIN10 << 16) | MUX_PB02B_ADC_AIN10)
+#define PORT_PB02B_ADC_AIN10       (1u <<  2)
+#define PIN_PB03B_ADC_AIN11               35  /**< \brief ADC signal: AIN11 on PB03 mux B */
+#define MUX_PB03B_ADC_AIN11                1
+#define PINMUX_PB03B_ADC_AIN11     ((PIN_PB03B_ADC_AIN11 << 16) | MUX_PB03B_ADC_AIN11)
+#define PORT_PB03B_ADC_AIN11       (1u <<  3)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA12H_AC_CMP0                 12  /**< \brief AC signal: CMP0 on PA12 mux H */
+#define MUX_PA12H_AC_CMP0                  7
+#define PINMUX_PA12H_AC_CMP0       ((PIN_PA12H_AC_CMP0 << 16) | MUX_PA12H_AC_CMP0)
+#define PORT_PA12H_AC_CMP0         (1u << 12)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA13H_AC_CMP1                 13  /**< \brief AC signal: CMP1 on PA13 mux H */
+#define MUX_PA13H_AC_CMP1                  7
+#define PINMUX_PA13H_AC_CMP1       ((PIN_PA13H_AC_CMP1 << 16) | MUX_PA13H_AC_CMP1)
+#define PORT_PA13H_AC_CMP1         (1u << 13)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA21G_I2S_FS0                 21  /**< \brief I2S signal: FS0 on PA21 mux G */
+#define MUX_PA21G_I2S_FS0                  6
+#define PINMUX_PA21G_I2S_FS0       ((PIN_PA21G_I2S_FS0 << 16) | MUX_PA21G_I2S_FS0)
+#define PORT_PA21G_I2S_FS0         (1u << 21)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PB10G_I2S_MCK1                42  /**< \brief I2S signal: MCK1 on PB10 mux G */
+#define MUX_PB10G_I2S_MCK1                 6
+#define PINMUX_PB10G_I2S_MCK1      ((PIN_PB10G_I2S_MCK1 << 16) | MUX_PB10G_I2S_MCK1)
+#define PORT_PB10G_I2S_MCK1        (1u << 10)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA20G_I2S_SCK0                20  /**< \brief I2S signal: SCK0 on PA20 mux G */
+#define MUX_PA20G_I2S_SCK0                 6
+#define PINMUX_PA20G_I2S_SCK0      ((PIN_PA20G_I2S_SCK0 << 16) | MUX_PA20G_I2S_SCK0)
+#define PORT_PA20G_I2S_SCK0        (1u << 20)
+#define PIN_PB11G_I2S_SCK1                43  /**< \brief I2S signal: SCK1 on PB11 mux G */
+#define MUX_PB11G_I2S_SCK1                 6
+#define PINMUX_PB11G_I2S_SCK1      ((PIN_PB11G_I2S_SCK1 << 16) | MUX_PB11G_I2S_SCK1)
+#define PORT_PB11G_I2S_SCK1        (1u << 11)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+
+#endif /* _SAMD21G15A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g16a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g16a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g16a.h	(revision 136)
@@ -0,0 +1,952 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21G16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21G16A_PIO_
+#define _SAMD21G16A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA12                          12  /**< \brief Pin Number for PA12 */
+#define PORT_PA12                  (1u << 12) /**< \brief PORT Mask  for PA12 */
+#define PIN_PA13                          13  /**< \brief Pin Number for PA13 */
+#define PORT_PA13                  (1u << 13) /**< \brief PORT Mask  for PA13 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA20                          20  /**< \brief Pin Number for PA20 */
+#define PORT_PA20                  (1u << 20) /**< \brief PORT Mask  for PA20 */
+#define PIN_PA21                          21  /**< \brief Pin Number for PA21 */
+#define PORT_PA21                  (1u << 21) /**< \brief PORT Mask  for PA21 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+#define PIN_PB02                          34  /**< \brief Pin Number for PB02 */
+#define PORT_PB02                  (1u <<  2) /**< \brief PORT Mask  for PB02 */
+#define PIN_PB03                          35  /**< \brief Pin Number for PB03 */
+#define PORT_PB03                  (1u <<  3) /**< \brief PORT Mask  for PB03 */
+#define PIN_PB08                          40  /**< \brief Pin Number for PB08 */
+#define PORT_PB08                  (1u <<  8) /**< \brief PORT Mask  for PB08 */
+#define PIN_PB09                          41  /**< \brief Pin Number for PB09 */
+#define PORT_PB09                  (1u <<  9) /**< \brief PORT Mask  for PB09 */
+#define PIN_PB10                          42  /**< \brief Pin Number for PB10 */
+#define PORT_PB10                  (1u << 10) /**< \brief PORT Mask  for PB10 */
+#define PIN_PB11                          43  /**< \brief Pin Number for PB11 */
+#define PORT_PB11                  (1u << 11) /**< \brief PORT Mask  for PB11 */
+#define PIN_PB22                          54  /**< \brief Pin Number for PB22 */
+#define PORT_PB22                  (1u << 22) /**< \brief PORT Mask  for PB22 */
+#define PIN_PB23                          55  /**< \brief Pin Number for PB23 */
+#define PORT_PB23                  (1u << 23) /**< \brief PORT Mask  for PB23 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PB22H_GCLK_IO0                54  /**< \brief GCLK signal: IO0 on PB22 mux H */
+#define MUX_PB22H_GCLK_IO0                 7
+#define PINMUX_PB22H_GCLK_IO0      ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
+#define PORT_PB22H_GCLK_IO0        (1u << 22)
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PB23H_GCLK_IO1                55  /**< \brief GCLK signal: IO1 on PB23 mux H */
+#define MUX_PB23H_GCLK_IO1                 7
+#define PINMUX_PB23H_GCLK_IO1      ((PIN_PB23H_GCLK_IO1 << 16) | MUX_PB23H_GCLK_IO1)
+#define PORT_PB23H_GCLK_IO1        (1u << 23)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA20H_GCLK_IO4                20  /**< \brief GCLK signal: IO4 on PA20 mux H */
+#define MUX_PA20H_GCLK_IO4                 7
+#define PINMUX_PA20H_GCLK_IO4      ((PIN_PA20H_GCLK_IO4 << 16) | MUX_PA20H_GCLK_IO4)
+#define PORT_PA20H_GCLK_IO4        (1u << 20)
+#define PIN_PB10H_GCLK_IO4                42  /**< \brief GCLK signal: IO4 on PB10 mux H */
+#define MUX_PB10H_GCLK_IO4                 7
+#define PINMUX_PB10H_GCLK_IO4      ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
+#define PORT_PB10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA21H_GCLK_IO5                21  /**< \brief GCLK signal: IO5 on PA21 mux H */
+#define MUX_PA21H_GCLK_IO5                 7
+#define PINMUX_PA21H_GCLK_IO5      ((PIN_PA21H_GCLK_IO5 << 16) | MUX_PA21H_GCLK_IO5)
+#define PORT_PA21H_GCLK_IO5        (1u << 21)
+#define PIN_PB11H_GCLK_IO5                43  /**< \brief GCLK signal: IO5 on PB11 mux H */
+#define MUX_PB11H_GCLK_IO5                 7
+#define PINMUX_PB11H_GCLK_IO5      ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
+#define PORT_PB11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PB02A_EIC_EXTINT2             34  /**< \brief EIC signal: EXTINT2 on PB02 mux A */
+#define MUX_PB02A_EIC_EXTINT2              0
+#define PINMUX_PB02A_EIC_EXTINT2   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
+#define PORT_PB02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PB03A_EIC_EXTINT3             35  /**< \brief EIC signal: EXTINT3 on PB03 mux A */
+#define MUX_PB03A_EIC_EXTINT3              0
+#define PINMUX_PB03A_EIC_EXTINT3   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
+#define PORT_PB03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA20A_EIC_EXTINT4             20  /**< \brief EIC signal: EXTINT4 on PA20 mux A */
+#define MUX_PA20A_EIC_EXTINT4              0
+#define PINMUX_PA20A_EIC_EXTINT4   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
+#define PORT_PA20A_EIC_EXTINT4     (1u << 20)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA21A_EIC_EXTINT5             21  /**< \brief EIC signal: EXTINT5 on PA21 mux A */
+#define MUX_PA21A_EIC_EXTINT5              0
+#define PINMUX_PA21A_EIC_EXTINT5   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
+#define PORT_PA21A_EIC_EXTINT5     (1u << 21)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PB22A_EIC_EXTINT6             54  /**< \brief EIC signal: EXTINT6 on PB22 mux A */
+#define MUX_PB22A_EIC_EXTINT6              0
+#define PINMUX_PB22A_EIC_EXTINT6   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
+#define PORT_PB22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PB23A_EIC_EXTINT7             55  /**< \brief EIC signal: EXTINT7 on PB23 mux A */
+#define MUX_PB23A_EIC_EXTINT7              0
+#define PINMUX_PB23A_EIC_EXTINT7   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
+#define PORT_PB23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PB08A_EIC_EXTINT8             40  /**< \brief EIC signal: EXTINT8 on PB08 mux A */
+#define MUX_PB08A_EIC_EXTINT8              0
+#define PINMUX_PB08A_EIC_EXTINT8   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
+#define PORT_PB08A_EIC_EXTINT8     (1u <<  8)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PB09A_EIC_EXTINT9             41  /**< \brief EIC signal: EXTINT9 on PB09 mux A */
+#define MUX_PB09A_EIC_EXTINT9              0
+#define PINMUX_PB09A_EIC_EXTINT9   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
+#define PORT_PB09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PB10A_EIC_EXTINT10            42  /**< \brief EIC signal: EXTINT10 on PB10 mux A */
+#define MUX_PB10A_EIC_EXTINT10             0
+#define PINMUX_PB10A_EIC_EXTINT10  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
+#define PORT_PB10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PB11A_EIC_EXTINT11            43  /**< \brief EIC signal: EXTINT11 on PB11 mux A */
+#define MUX_PB11A_EIC_EXTINT11             0
+#define PINMUX_PB11A_EIC_EXTINT11  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
+#define PORT_PB11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA12A_EIC_EXTINT12            12  /**< \brief EIC signal: EXTINT12 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT12             0
+#define PINMUX_PA12A_EIC_EXTINT12  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
+#define PORT_PA12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PA13A_EIC_EXTINT13            13  /**< \brief EIC signal: EXTINT13 on PA13 mux A */
+#define MUX_PA13A_EIC_EXTINT13             0
+#define PINMUX_PA13A_EIC_EXTINT13  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
+#define PORT_PA13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PA12A_EIC_EXTINT17            12  /**< \brief EIC signal: EXTINT17 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT17             0
+#define PINMUX_PA12A_EIC_EXTINT17  ((PIN_PA12A_EIC_EXTINT17 << 16) | MUX_PA12A_EIC_EXTINT17)
+#define PORT_PA12A_EIC_EXTINT17    (1u << 12)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA13A_SERCOM0_PAD0            13  /**< \brief SERCOM0 signal: PAD0 on PA13 mux A */
+#define MUX_PA13A_SERCOM0_PAD0             0
+#define PINMUX_PA13A_SERCOM0_PAD0  ((PIN_PA13A_SERCOM0_PAD0 << 16) | MUX_PA13A_SERCOM0_PAD0)
+#define PORT_PA13A_SERCOM0_PAD0    (1u << 13)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA12C_SERCOM2_PAD0            12  /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */
+#define MUX_PA12C_SERCOM2_PAD0             2
+#define PINMUX_PA12C_SERCOM2_PAD0  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
+#define PORT_PA12C_SERCOM2_PAD0    (1u << 12)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA13C_SERCOM2_PAD1            13  /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */
+#define MUX_PA13C_SERCOM2_PAD1             2
+#define PINMUX_PA13C_SERCOM2_PAD1  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
+#define PORT_PA13C_SERCOM2_PAD1    (1u << 13)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA20D_SERCOM3_PAD2            20  /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */
+#define MUX_PA20D_SERCOM3_PAD2             3
+#define PINMUX_PA20D_SERCOM3_PAD2  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
+#define PORT_PA20D_SERCOM3_PAD2    (1u << 20)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA21D_SERCOM3_PAD3            21  /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */
+#define MUX_PA21D_SERCOM3_PAD3             3
+#define PINMUX_PA21D_SERCOM3_PAD3  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
+#define PORT_PA21D_SERCOM3_PAD3    (1u << 21)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for SERCOM4 peripheral ========== */
+#define PIN_PA12D_SERCOM4_PAD0            12  /**< \brief SERCOM4 signal: PAD0 on PA12 mux D */
+#define MUX_PA12D_SERCOM4_PAD0             3
+#define PINMUX_PA12D_SERCOM4_PAD0  ((PIN_PA12D_SERCOM4_PAD0 << 16) | MUX_PA12D_SERCOM4_PAD0)
+#define PORT_PA12D_SERCOM4_PAD0    (1u << 12)
+#define PIN_PB08D_SERCOM4_PAD0            40  /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */
+#define MUX_PB08D_SERCOM4_PAD0             3
+#define PINMUX_PB08D_SERCOM4_PAD0  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
+#define PORT_PB08D_SERCOM4_PAD0    (1u <<  8)
+#define PIN_PA13D_SERCOM4_PAD1            13  /**< \brief SERCOM4 signal: PAD1 on PA13 mux D */
+#define MUX_PA13D_SERCOM4_PAD1             3
+#define PINMUX_PA13D_SERCOM4_PAD1  ((PIN_PA13D_SERCOM4_PAD1 << 16) | MUX_PA13D_SERCOM4_PAD1)
+#define PORT_PA13D_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB09D_SERCOM4_PAD1            41  /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */
+#define MUX_PB09D_SERCOM4_PAD1             3
+#define PINMUX_PB09D_SERCOM4_PAD1  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
+#define PORT_PB09D_SERCOM4_PAD1    (1u <<  9)
+#define PIN_PA14D_SERCOM4_PAD2            14  /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */
+#define MUX_PA14D_SERCOM4_PAD2             3
+#define PINMUX_PA14D_SERCOM4_PAD2  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
+#define PORT_PA14D_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB10D_SERCOM4_PAD2            42  /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
+#define MUX_PB10D_SERCOM4_PAD2             3
+#define PINMUX_PB10D_SERCOM4_PAD2  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
+#define PORT_PB10D_SERCOM4_PAD2    (1u << 10)
+#define PIN_PA15D_SERCOM4_PAD3            15  /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */
+#define MUX_PA15D_SERCOM4_PAD3             3
+#define PINMUX_PA15D_SERCOM4_PAD3  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
+#define PORT_PA15D_SERCOM4_PAD3    (1u << 15)
+#define PIN_PB11D_SERCOM4_PAD3            43  /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */
+#define MUX_PB11D_SERCOM4_PAD3             3
+#define PINMUX_PB11D_SERCOM4_PAD3  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
+#define PORT_PB11D_SERCOM4_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM5 peripheral ========== */
+#define PIN_PA22D_SERCOM5_PAD0            22  /**< \brief SERCOM5 signal: PAD0 on PA22 mux D */
+#define MUX_PA22D_SERCOM5_PAD0             3
+#define PINMUX_PA22D_SERCOM5_PAD0  ((PIN_PA22D_SERCOM5_PAD0 << 16) | MUX_PA22D_SERCOM5_PAD0)
+#define PORT_PA22D_SERCOM5_PAD0    (1u << 22)
+#define PIN_PB02D_SERCOM5_PAD0            34  /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */
+#define MUX_PB02D_SERCOM5_PAD0             3
+#define PINMUX_PB02D_SERCOM5_PAD0  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
+#define PORT_PB02D_SERCOM5_PAD0    (1u <<  2)
+#define PIN_PA23D_SERCOM5_PAD1            23  /**< \brief SERCOM5 signal: PAD1 on PA23 mux D */
+#define MUX_PA23D_SERCOM5_PAD1             3
+#define PINMUX_PA23D_SERCOM5_PAD1  ((PIN_PA23D_SERCOM5_PAD1 << 16) | MUX_PA23D_SERCOM5_PAD1)
+#define PORT_PA23D_SERCOM5_PAD1    (1u << 23)
+#define PIN_PB03D_SERCOM5_PAD1            35  /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */
+#define MUX_PB03D_SERCOM5_PAD1             3
+#define PINMUX_PB03D_SERCOM5_PAD1  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
+#define PORT_PB03D_SERCOM5_PAD1    (1u <<  3)
+#define PIN_PA24D_SERCOM5_PAD2            24  /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */
+#define MUX_PA24D_SERCOM5_PAD2             3
+#define PINMUX_PA24D_SERCOM5_PAD2  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
+#define PORT_PA24D_SERCOM5_PAD2    (1u << 24)
+#define PIN_PB22D_SERCOM5_PAD2            54  /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */
+#define MUX_PB22D_SERCOM5_PAD2             3
+#define PINMUX_PB22D_SERCOM5_PAD2  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
+#define PORT_PB22D_SERCOM5_PAD2    (1u << 22)
+#define PIN_PA20C_SERCOM5_PAD2            20  /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */
+#define MUX_PA20C_SERCOM5_PAD2             2
+#define PINMUX_PA20C_SERCOM5_PAD2  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
+#define PORT_PA20C_SERCOM5_PAD2    (1u << 20)
+#define PIN_PA25D_SERCOM5_PAD3            25  /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */
+#define MUX_PA25D_SERCOM5_PAD3             3
+#define PINMUX_PA25D_SERCOM5_PAD3  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
+#define PORT_PA25D_SERCOM5_PAD3    (1u << 25)
+#define PIN_PB23D_SERCOM5_PAD3            55  /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */
+#define MUX_PB23D_SERCOM5_PAD3             3
+#define PINMUX_PB23D_SERCOM5_PAD3  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
+#define PORT_PB23D_SERCOM5_PAD3    (1u << 23)
+#define PIN_PA21C_SERCOM5_PAD3            21  /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */
+#define MUX_PA21C_SERCOM5_PAD3             2
+#define PINMUX_PA21C_SERCOM5_PAD3  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
+#define PORT_PA21C_SERCOM5_PAD3    (1u << 21)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PB10F_TCC0_WO4                42  /**< \brief TCC0 signal: WO4 on PB10 mux F */
+#define MUX_PB10F_TCC0_WO4                 5
+#define PINMUX_PB10F_TCC0_WO4      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
+#define PORT_PB10F_TCC0_WO4        (1u << 10)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PB11F_TCC0_WO5                43  /**< \brief TCC0 signal: WO5 on PB11 mux F */
+#define MUX_PB11F_TCC0_WO5                 5
+#define PINMUX_PB11F_TCC0_WO5      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
+#define PORT_PB11F_TCC0_WO5        (1u << 11)
+#define PIN_PA12F_TCC0_WO6                12  /**< \brief TCC0 signal: WO6 on PA12 mux F */
+#define MUX_PA12F_TCC0_WO6                 5
+#define PINMUX_PA12F_TCC0_WO6      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
+#define PORT_PA12F_TCC0_WO6        (1u << 12)
+#define PIN_PA20F_TCC0_WO6                20  /**< \brief TCC0 signal: WO6 on PA20 mux F */
+#define MUX_PA20F_TCC0_WO6                 5
+#define PINMUX_PA20F_TCC0_WO6      ((PIN_PA20F_TCC0_WO6 << 16) | MUX_PA20F_TCC0_WO6)
+#define PORT_PA20F_TCC0_WO6        (1u << 20)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA13F_TCC0_WO7                13  /**< \brief TCC0 signal: WO7 on PA13 mux F */
+#define MUX_PA13F_TCC0_WO7                 5
+#define PINMUX_PA13F_TCC0_WO7      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
+#define PORT_PA13F_TCC0_WO7        (1u << 13)
+#define PIN_PA21F_TCC0_WO7                21  /**< \brief TCC0 signal: WO7 on PA21 mux F */
+#define MUX_PA21F_TCC0_WO7                 5
+#define PINMUX_PA21F_TCC0_WO7      ((PIN_PA21F_TCC0_WO7 << 16) | MUX_PA21F_TCC0_WO7)
+#define PORT_PA21F_TCC0_WO7        (1u << 21)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA12E_TCC2_WO0                12  /**< \brief TCC2 signal: WO0 on PA12 mux E */
+#define MUX_PA12E_TCC2_WO0                 4
+#define PINMUX_PA12E_TCC2_WO0      ((PIN_PA12E_TCC2_WO0 << 16) | MUX_PA12E_TCC2_WO0)
+#define PORT_PA12E_TCC2_WO0        (1u << 12)
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA13E_TCC2_WO1                13  /**< \brief TCC2 signal: WO1 on PA13 mux E */
+#define MUX_PA13E_TCC2_WO1                 4
+#define PINMUX_PA13E_TCC2_WO1      ((PIN_PA13E_TCC2_WO1 << 16) | MUX_PA13E_TCC2_WO1)
+#define PORT_PA13E_TCC2_WO1        (1u << 13)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PB08E_TC4_WO0                 40  /**< \brief TC4 signal: WO0 on PB08 mux E */
+#define MUX_PB08E_TC4_WO0                  4
+#define PINMUX_PB08E_TC4_WO0       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
+#define PORT_PB08E_TC4_WO0         (1u <<  8)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+#define PIN_PB09E_TC4_WO1                 41  /**< \brief TC4 signal: WO1 on PB09 mux E */
+#define MUX_PB09E_TC4_WO1                  4
+#define PINMUX_PB09E_TC4_WO1       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
+#define PORT_PB09E_TC4_WO1         (1u <<  9)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PB10E_TC5_WO0                 42  /**< \brief TC5 signal: WO0 on PB10 mux E */
+#define MUX_PB10E_TC5_WO0                  4
+#define PINMUX_PB10E_TC5_WO0       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
+#define PORT_PB10E_TC5_WO0         (1u << 10)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+#define PIN_PB11E_TC5_WO1                 43  /**< \brief TC5 signal: WO1 on PB11 mux E */
+#define MUX_PB11E_TC5_WO1                  4
+#define PINMUX_PB11E_TC5_WO1       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
+#define PORT_PB11E_TC5_WO1         (1u << 11)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PB08B_ADC_AIN2                40  /**< \brief ADC signal: AIN2 on PB08 mux B */
+#define MUX_PB08B_ADC_AIN2                 1
+#define PINMUX_PB08B_ADC_AIN2      ((PIN_PB08B_ADC_AIN2 << 16) | MUX_PB08B_ADC_AIN2)
+#define PORT_PB08B_ADC_AIN2        (1u <<  8)
+#define PIN_PB09B_ADC_AIN3                41  /**< \brief ADC signal: AIN3 on PB09 mux B */
+#define MUX_PB09B_ADC_AIN3                 1
+#define PINMUX_PB09B_ADC_AIN3      ((PIN_PB09B_ADC_AIN3 << 16) | MUX_PB09B_ADC_AIN3)
+#define PORT_PB09B_ADC_AIN3        (1u <<  9)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PB02B_ADC_AIN10               34  /**< \brief ADC signal: AIN10 on PB02 mux B */
+#define MUX_PB02B_ADC_AIN10                1
+#define PINMUX_PB02B_ADC_AIN10     ((PIN_PB02B_ADC_AIN10 << 16) | MUX_PB02B_ADC_AIN10)
+#define PORT_PB02B_ADC_AIN10       (1u <<  2)
+#define PIN_PB03B_ADC_AIN11               35  /**< \brief ADC signal: AIN11 on PB03 mux B */
+#define MUX_PB03B_ADC_AIN11                1
+#define PINMUX_PB03B_ADC_AIN11     ((PIN_PB03B_ADC_AIN11 << 16) | MUX_PB03B_ADC_AIN11)
+#define PORT_PB03B_ADC_AIN11       (1u <<  3)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA12H_AC_CMP0                 12  /**< \brief AC signal: CMP0 on PA12 mux H */
+#define MUX_PA12H_AC_CMP0                  7
+#define PINMUX_PA12H_AC_CMP0       ((PIN_PA12H_AC_CMP0 << 16) | MUX_PA12H_AC_CMP0)
+#define PORT_PA12H_AC_CMP0         (1u << 12)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA13H_AC_CMP1                 13  /**< \brief AC signal: CMP1 on PA13 mux H */
+#define MUX_PA13H_AC_CMP1                  7
+#define PINMUX_PA13H_AC_CMP1       ((PIN_PA13H_AC_CMP1 << 16) | MUX_PA13H_AC_CMP1)
+#define PORT_PA13H_AC_CMP1         (1u << 13)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA21G_I2S_FS0                 21  /**< \brief I2S signal: FS0 on PA21 mux G */
+#define MUX_PA21G_I2S_FS0                  6
+#define PINMUX_PA21G_I2S_FS0       ((PIN_PA21G_I2S_FS0 << 16) | MUX_PA21G_I2S_FS0)
+#define PORT_PA21G_I2S_FS0         (1u << 21)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PB10G_I2S_MCK1                42  /**< \brief I2S signal: MCK1 on PB10 mux G */
+#define MUX_PB10G_I2S_MCK1                 6
+#define PINMUX_PB10G_I2S_MCK1      ((PIN_PB10G_I2S_MCK1 << 16) | MUX_PB10G_I2S_MCK1)
+#define PORT_PB10G_I2S_MCK1        (1u << 10)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA20G_I2S_SCK0                20  /**< \brief I2S signal: SCK0 on PA20 mux G */
+#define MUX_PA20G_I2S_SCK0                 6
+#define PINMUX_PA20G_I2S_SCK0      ((PIN_PA20G_I2S_SCK0 << 16) | MUX_PA20G_I2S_SCK0)
+#define PORT_PA20G_I2S_SCK0        (1u << 20)
+#define PIN_PB11G_I2S_SCK1                43  /**< \brief I2S signal: SCK1 on PB11 mux G */
+#define MUX_PB11G_I2S_SCK1                 6
+#define PINMUX_PB11G_I2S_SCK1      ((PIN_PB11G_I2S_SCK1 << 16) | MUX_PB11G_I2S_SCK1)
+#define PORT_PB11G_I2S_SCK1        (1u << 11)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+
+#endif /* _SAMD21G16A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g17a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g17a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g17a.h	(revision 136)
@@ -0,0 +1,952 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21G17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21G17A_PIO_
+#define _SAMD21G17A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA12                          12  /**< \brief Pin Number for PA12 */
+#define PORT_PA12                  (1u << 12) /**< \brief PORT Mask  for PA12 */
+#define PIN_PA13                          13  /**< \brief Pin Number for PA13 */
+#define PORT_PA13                  (1u << 13) /**< \brief PORT Mask  for PA13 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA20                          20  /**< \brief Pin Number for PA20 */
+#define PORT_PA20                  (1u << 20) /**< \brief PORT Mask  for PA20 */
+#define PIN_PA21                          21  /**< \brief Pin Number for PA21 */
+#define PORT_PA21                  (1u << 21) /**< \brief PORT Mask  for PA21 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+#define PIN_PB02                          34  /**< \brief Pin Number for PB02 */
+#define PORT_PB02                  (1u <<  2) /**< \brief PORT Mask  for PB02 */
+#define PIN_PB03                          35  /**< \brief Pin Number for PB03 */
+#define PORT_PB03                  (1u <<  3) /**< \brief PORT Mask  for PB03 */
+#define PIN_PB08                          40  /**< \brief Pin Number for PB08 */
+#define PORT_PB08                  (1u <<  8) /**< \brief PORT Mask  for PB08 */
+#define PIN_PB09                          41  /**< \brief Pin Number for PB09 */
+#define PORT_PB09                  (1u <<  9) /**< \brief PORT Mask  for PB09 */
+#define PIN_PB10                          42  /**< \brief Pin Number for PB10 */
+#define PORT_PB10                  (1u << 10) /**< \brief PORT Mask  for PB10 */
+#define PIN_PB11                          43  /**< \brief Pin Number for PB11 */
+#define PORT_PB11                  (1u << 11) /**< \brief PORT Mask  for PB11 */
+#define PIN_PB22                          54  /**< \brief Pin Number for PB22 */
+#define PORT_PB22                  (1u << 22) /**< \brief PORT Mask  for PB22 */
+#define PIN_PB23                          55  /**< \brief Pin Number for PB23 */
+#define PORT_PB23                  (1u << 23) /**< \brief PORT Mask  for PB23 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PB22H_GCLK_IO0                54  /**< \brief GCLK signal: IO0 on PB22 mux H */
+#define MUX_PB22H_GCLK_IO0                 7
+#define PINMUX_PB22H_GCLK_IO0      ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
+#define PORT_PB22H_GCLK_IO0        (1u << 22)
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PB23H_GCLK_IO1                55  /**< \brief GCLK signal: IO1 on PB23 mux H */
+#define MUX_PB23H_GCLK_IO1                 7
+#define PINMUX_PB23H_GCLK_IO1      ((PIN_PB23H_GCLK_IO1 << 16) | MUX_PB23H_GCLK_IO1)
+#define PORT_PB23H_GCLK_IO1        (1u << 23)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA20H_GCLK_IO4                20  /**< \brief GCLK signal: IO4 on PA20 mux H */
+#define MUX_PA20H_GCLK_IO4                 7
+#define PINMUX_PA20H_GCLK_IO4      ((PIN_PA20H_GCLK_IO4 << 16) | MUX_PA20H_GCLK_IO4)
+#define PORT_PA20H_GCLK_IO4        (1u << 20)
+#define PIN_PB10H_GCLK_IO4                42  /**< \brief GCLK signal: IO4 on PB10 mux H */
+#define MUX_PB10H_GCLK_IO4                 7
+#define PINMUX_PB10H_GCLK_IO4      ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
+#define PORT_PB10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA21H_GCLK_IO5                21  /**< \brief GCLK signal: IO5 on PA21 mux H */
+#define MUX_PA21H_GCLK_IO5                 7
+#define PINMUX_PA21H_GCLK_IO5      ((PIN_PA21H_GCLK_IO5 << 16) | MUX_PA21H_GCLK_IO5)
+#define PORT_PA21H_GCLK_IO5        (1u << 21)
+#define PIN_PB11H_GCLK_IO5                43  /**< \brief GCLK signal: IO5 on PB11 mux H */
+#define MUX_PB11H_GCLK_IO5                 7
+#define PINMUX_PB11H_GCLK_IO5      ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
+#define PORT_PB11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PB02A_EIC_EXTINT2             34  /**< \brief EIC signal: EXTINT2 on PB02 mux A */
+#define MUX_PB02A_EIC_EXTINT2              0
+#define PINMUX_PB02A_EIC_EXTINT2   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
+#define PORT_PB02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PB03A_EIC_EXTINT3             35  /**< \brief EIC signal: EXTINT3 on PB03 mux A */
+#define MUX_PB03A_EIC_EXTINT3              0
+#define PINMUX_PB03A_EIC_EXTINT3   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
+#define PORT_PB03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA20A_EIC_EXTINT4             20  /**< \brief EIC signal: EXTINT4 on PA20 mux A */
+#define MUX_PA20A_EIC_EXTINT4              0
+#define PINMUX_PA20A_EIC_EXTINT4   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
+#define PORT_PA20A_EIC_EXTINT4     (1u << 20)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA21A_EIC_EXTINT5             21  /**< \brief EIC signal: EXTINT5 on PA21 mux A */
+#define MUX_PA21A_EIC_EXTINT5              0
+#define PINMUX_PA21A_EIC_EXTINT5   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
+#define PORT_PA21A_EIC_EXTINT5     (1u << 21)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PB22A_EIC_EXTINT6             54  /**< \brief EIC signal: EXTINT6 on PB22 mux A */
+#define MUX_PB22A_EIC_EXTINT6              0
+#define PINMUX_PB22A_EIC_EXTINT6   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
+#define PORT_PB22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PB23A_EIC_EXTINT7             55  /**< \brief EIC signal: EXTINT7 on PB23 mux A */
+#define MUX_PB23A_EIC_EXTINT7              0
+#define PINMUX_PB23A_EIC_EXTINT7   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
+#define PORT_PB23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PB08A_EIC_EXTINT8             40  /**< \brief EIC signal: EXTINT8 on PB08 mux A */
+#define MUX_PB08A_EIC_EXTINT8              0
+#define PINMUX_PB08A_EIC_EXTINT8   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
+#define PORT_PB08A_EIC_EXTINT8     (1u <<  8)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PB09A_EIC_EXTINT9             41  /**< \brief EIC signal: EXTINT9 on PB09 mux A */
+#define MUX_PB09A_EIC_EXTINT9              0
+#define PINMUX_PB09A_EIC_EXTINT9   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
+#define PORT_PB09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PB10A_EIC_EXTINT10            42  /**< \brief EIC signal: EXTINT10 on PB10 mux A */
+#define MUX_PB10A_EIC_EXTINT10             0
+#define PINMUX_PB10A_EIC_EXTINT10  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
+#define PORT_PB10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PB11A_EIC_EXTINT11            43  /**< \brief EIC signal: EXTINT11 on PB11 mux A */
+#define MUX_PB11A_EIC_EXTINT11             0
+#define PINMUX_PB11A_EIC_EXTINT11  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
+#define PORT_PB11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA12A_EIC_EXTINT12            12  /**< \brief EIC signal: EXTINT12 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT12             0
+#define PINMUX_PA12A_EIC_EXTINT12  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
+#define PORT_PA12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PA13A_EIC_EXTINT13            13  /**< \brief EIC signal: EXTINT13 on PA13 mux A */
+#define MUX_PA13A_EIC_EXTINT13             0
+#define PINMUX_PA13A_EIC_EXTINT13  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
+#define PORT_PA13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PA12A_EIC_EXTINT17            12  /**< \brief EIC signal: EXTINT17 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT17             0
+#define PINMUX_PA12A_EIC_EXTINT17  ((PIN_PA12A_EIC_EXTINT17 << 16) | MUX_PA12A_EIC_EXTINT17)
+#define PORT_PA12A_EIC_EXTINT17    (1u << 12)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA13A_SERCOM0_PAD0            13  /**< \brief SERCOM0 signal: PAD0 on PA13 mux A */
+#define MUX_PA13A_SERCOM0_PAD0             0
+#define PINMUX_PA13A_SERCOM0_PAD0  ((PIN_PA13A_SERCOM0_PAD0 << 16) | MUX_PA13A_SERCOM0_PAD0)
+#define PORT_PA13A_SERCOM0_PAD0    (1u << 13)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA12C_SERCOM2_PAD0            12  /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */
+#define MUX_PA12C_SERCOM2_PAD0             2
+#define PINMUX_PA12C_SERCOM2_PAD0  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
+#define PORT_PA12C_SERCOM2_PAD0    (1u << 12)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA13C_SERCOM2_PAD1            13  /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */
+#define MUX_PA13C_SERCOM2_PAD1             2
+#define PINMUX_PA13C_SERCOM2_PAD1  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
+#define PORT_PA13C_SERCOM2_PAD1    (1u << 13)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA20D_SERCOM3_PAD2            20  /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */
+#define MUX_PA20D_SERCOM3_PAD2             3
+#define PINMUX_PA20D_SERCOM3_PAD2  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
+#define PORT_PA20D_SERCOM3_PAD2    (1u << 20)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA21D_SERCOM3_PAD3            21  /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */
+#define MUX_PA21D_SERCOM3_PAD3             3
+#define PINMUX_PA21D_SERCOM3_PAD3  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
+#define PORT_PA21D_SERCOM3_PAD3    (1u << 21)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for SERCOM4 peripheral ========== */
+#define PIN_PA12D_SERCOM4_PAD0            12  /**< \brief SERCOM4 signal: PAD0 on PA12 mux D */
+#define MUX_PA12D_SERCOM4_PAD0             3
+#define PINMUX_PA12D_SERCOM4_PAD0  ((PIN_PA12D_SERCOM4_PAD0 << 16) | MUX_PA12D_SERCOM4_PAD0)
+#define PORT_PA12D_SERCOM4_PAD0    (1u << 12)
+#define PIN_PB08D_SERCOM4_PAD0            40  /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */
+#define MUX_PB08D_SERCOM4_PAD0             3
+#define PINMUX_PB08D_SERCOM4_PAD0  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
+#define PORT_PB08D_SERCOM4_PAD0    (1u <<  8)
+#define PIN_PA13D_SERCOM4_PAD1            13  /**< \brief SERCOM4 signal: PAD1 on PA13 mux D */
+#define MUX_PA13D_SERCOM4_PAD1             3
+#define PINMUX_PA13D_SERCOM4_PAD1  ((PIN_PA13D_SERCOM4_PAD1 << 16) | MUX_PA13D_SERCOM4_PAD1)
+#define PORT_PA13D_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB09D_SERCOM4_PAD1            41  /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */
+#define MUX_PB09D_SERCOM4_PAD1             3
+#define PINMUX_PB09D_SERCOM4_PAD1  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
+#define PORT_PB09D_SERCOM4_PAD1    (1u <<  9)
+#define PIN_PA14D_SERCOM4_PAD2            14  /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */
+#define MUX_PA14D_SERCOM4_PAD2             3
+#define PINMUX_PA14D_SERCOM4_PAD2  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
+#define PORT_PA14D_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB10D_SERCOM4_PAD2            42  /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
+#define MUX_PB10D_SERCOM4_PAD2             3
+#define PINMUX_PB10D_SERCOM4_PAD2  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
+#define PORT_PB10D_SERCOM4_PAD2    (1u << 10)
+#define PIN_PA15D_SERCOM4_PAD3            15  /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */
+#define MUX_PA15D_SERCOM4_PAD3             3
+#define PINMUX_PA15D_SERCOM4_PAD3  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
+#define PORT_PA15D_SERCOM4_PAD3    (1u << 15)
+#define PIN_PB11D_SERCOM4_PAD3            43  /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */
+#define MUX_PB11D_SERCOM4_PAD3             3
+#define PINMUX_PB11D_SERCOM4_PAD3  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
+#define PORT_PB11D_SERCOM4_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM5 peripheral ========== */
+#define PIN_PA22D_SERCOM5_PAD0            22  /**< \brief SERCOM5 signal: PAD0 on PA22 mux D */
+#define MUX_PA22D_SERCOM5_PAD0             3
+#define PINMUX_PA22D_SERCOM5_PAD0  ((PIN_PA22D_SERCOM5_PAD0 << 16) | MUX_PA22D_SERCOM5_PAD0)
+#define PORT_PA22D_SERCOM5_PAD0    (1u << 22)
+#define PIN_PB02D_SERCOM5_PAD0            34  /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */
+#define MUX_PB02D_SERCOM5_PAD0             3
+#define PINMUX_PB02D_SERCOM5_PAD0  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
+#define PORT_PB02D_SERCOM5_PAD0    (1u <<  2)
+#define PIN_PA23D_SERCOM5_PAD1            23  /**< \brief SERCOM5 signal: PAD1 on PA23 mux D */
+#define MUX_PA23D_SERCOM5_PAD1             3
+#define PINMUX_PA23D_SERCOM5_PAD1  ((PIN_PA23D_SERCOM5_PAD1 << 16) | MUX_PA23D_SERCOM5_PAD1)
+#define PORT_PA23D_SERCOM5_PAD1    (1u << 23)
+#define PIN_PB03D_SERCOM5_PAD1            35  /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */
+#define MUX_PB03D_SERCOM5_PAD1             3
+#define PINMUX_PB03D_SERCOM5_PAD1  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
+#define PORT_PB03D_SERCOM5_PAD1    (1u <<  3)
+#define PIN_PA24D_SERCOM5_PAD2            24  /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */
+#define MUX_PA24D_SERCOM5_PAD2             3
+#define PINMUX_PA24D_SERCOM5_PAD2  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
+#define PORT_PA24D_SERCOM5_PAD2    (1u << 24)
+#define PIN_PB22D_SERCOM5_PAD2            54  /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */
+#define MUX_PB22D_SERCOM5_PAD2             3
+#define PINMUX_PB22D_SERCOM5_PAD2  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
+#define PORT_PB22D_SERCOM5_PAD2    (1u << 22)
+#define PIN_PA20C_SERCOM5_PAD2            20  /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */
+#define MUX_PA20C_SERCOM5_PAD2             2
+#define PINMUX_PA20C_SERCOM5_PAD2  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
+#define PORT_PA20C_SERCOM5_PAD2    (1u << 20)
+#define PIN_PA25D_SERCOM5_PAD3            25  /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */
+#define MUX_PA25D_SERCOM5_PAD3             3
+#define PINMUX_PA25D_SERCOM5_PAD3  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
+#define PORT_PA25D_SERCOM5_PAD3    (1u << 25)
+#define PIN_PB23D_SERCOM5_PAD3            55  /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */
+#define MUX_PB23D_SERCOM5_PAD3             3
+#define PINMUX_PB23D_SERCOM5_PAD3  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
+#define PORT_PB23D_SERCOM5_PAD3    (1u << 23)
+#define PIN_PA21C_SERCOM5_PAD3            21  /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */
+#define MUX_PA21C_SERCOM5_PAD3             2
+#define PINMUX_PA21C_SERCOM5_PAD3  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
+#define PORT_PA21C_SERCOM5_PAD3    (1u << 21)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PB10F_TCC0_WO4                42  /**< \brief TCC0 signal: WO4 on PB10 mux F */
+#define MUX_PB10F_TCC0_WO4                 5
+#define PINMUX_PB10F_TCC0_WO4      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
+#define PORT_PB10F_TCC0_WO4        (1u << 10)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PB11F_TCC0_WO5                43  /**< \brief TCC0 signal: WO5 on PB11 mux F */
+#define MUX_PB11F_TCC0_WO5                 5
+#define PINMUX_PB11F_TCC0_WO5      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
+#define PORT_PB11F_TCC0_WO5        (1u << 11)
+#define PIN_PA12F_TCC0_WO6                12  /**< \brief TCC0 signal: WO6 on PA12 mux F */
+#define MUX_PA12F_TCC0_WO6                 5
+#define PINMUX_PA12F_TCC0_WO6      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
+#define PORT_PA12F_TCC0_WO6        (1u << 12)
+#define PIN_PA20F_TCC0_WO6                20  /**< \brief TCC0 signal: WO6 on PA20 mux F */
+#define MUX_PA20F_TCC0_WO6                 5
+#define PINMUX_PA20F_TCC0_WO6      ((PIN_PA20F_TCC0_WO6 << 16) | MUX_PA20F_TCC0_WO6)
+#define PORT_PA20F_TCC0_WO6        (1u << 20)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA13F_TCC0_WO7                13  /**< \brief TCC0 signal: WO7 on PA13 mux F */
+#define MUX_PA13F_TCC0_WO7                 5
+#define PINMUX_PA13F_TCC0_WO7      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
+#define PORT_PA13F_TCC0_WO7        (1u << 13)
+#define PIN_PA21F_TCC0_WO7                21  /**< \brief TCC0 signal: WO7 on PA21 mux F */
+#define MUX_PA21F_TCC0_WO7                 5
+#define PINMUX_PA21F_TCC0_WO7      ((PIN_PA21F_TCC0_WO7 << 16) | MUX_PA21F_TCC0_WO7)
+#define PORT_PA21F_TCC0_WO7        (1u << 21)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA12E_TCC2_WO0                12  /**< \brief TCC2 signal: WO0 on PA12 mux E */
+#define MUX_PA12E_TCC2_WO0                 4
+#define PINMUX_PA12E_TCC2_WO0      ((PIN_PA12E_TCC2_WO0 << 16) | MUX_PA12E_TCC2_WO0)
+#define PORT_PA12E_TCC2_WO0        (1u << 12)
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA13E_TCC2_WO1                13  /**< \brief TCC2 signal: WO1 on PA13 mux E */
+#define MUX_PA13E_TCC2_WO1                 4
+#define PINMUX_PA13E_TCC2_WO1      ((PIN_PA13E_TCC2_WO1 << 16) | MUX_PA13E_TCC2_WO1)
+#define PORT_PA13E_TCC2_WO1        (1u << 13)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PB08E_TC4_WO0                 40  /**< \brief TC4 signal: WO0 on PB08 mux E */
+#define MUX_PB08E_TC4_WO0                  4
+#define PINMUX_PB08E_TC4_WO0       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
+#define PORT_PB08E_TC4_WO0         (1u <<  8)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+#define PIN_PB09E_TC4_WO1                 41  /**< \brief TC4 signal: WO1 on PB09 mux E */
+#define MUX_PB09E_TC4_WO1                  4
+#define PINMUX_PB09E_TC4_WO1       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
+#define PORT_PB09E_TC4_WO1         (1u <<  9)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PB10E_TC5_WO0                 42  /**< \brief TC5 signal: WO0 on PB10 mux E */
+#define MUX_PB10E_TC5_WO0                  4
+#define PINMUX_PB10E_TC5_WO0       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
+#define PORT_PB10E_TC5_WO0         (1u << 10)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+#define PIN_PB11E_TC5_WO1                 43  /**< \brief TC5 signal: WO1 on PB11 mux E */
+#define MUX_PB11E_TC5_WO1                  4
+#define PINMUX_PB11E_TC5_WO1       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
+#define PORT_PB11E_TC5_WO1         (1u << 11)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PB08B_ADC_AIN2                40  /**< \brief ADC signal: AIN2 on PB08 mux B */
+#define MUX_PB08B_ADC_AIN2                 1
+#define PINMUX_PB08B_ADC_AIN2      ((PIN_PB08B_ADC_AIN2 << 16) | MUX_PB08B_ADC_AIN2)
+#define PORT_PB08B_ADC_AIN2        (1u <<  8)
+#define PIN_PB09B_ADC_AIN3                41  /**< \brief ADC signal: AIN3 on PB09 mux B */
+#define MUX_PB09B_ADC_AIN3                 1
+#define PINMUX_PB09B_ADC_AIN3      ((PIN_PB09B_ADC_AIN3 << 16) | MUX_PB09B_ADC_AIN3)
+#define PORT_PB09B_ADC_AIN3        (1u <<  9)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PB02B_ADC_AIN10               34  /**< \brief ADC signal: AIN10 on PB02 mux B */
+#define MUX_PB02B_ADC_AIN10                1
+#define PINMUX_PB02B_ADC_AIN10     ((PIN_PB02B_ADC_AIN10 << 16) | MUX_PB02B_ADC_AIN10)
+#define PORT_PB02B_ADC_AIN10       (1u <<  2)
+#define PIN_PB03B_ADC_AIN11               35  /**< \brief ADC signal: AIN11 on PB03 mux B */
+#define MUX_PB03B_ADC_AIN11                1
+#define PINMUX_PB03B_ADC_AIN11     ((PIN_PB03B_ADC_AIN11 << 16) | MUX_PB03B_ADC_AIN11)
+#define PORT_PB03B_ADC_AIN11       (1u <<  3)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA12H_AC_CMP0                 12  /**< \brief AC signal: CMP0 on PA12 mux H */
+#define MUX_PA12H_AC_CMP0                  7
+#define PINMUX_PA12H_AC_CMP0       ((PIN_PA12H_AC_CMP0 << 16) | MUX_PA12H_AC_CMP0)
+#define PORT_PA12H_AC_CMP0         (1u << 12)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA13H_AC_CMP1                 13  /**< \brief AC signal: CMP1 on PA13 mux H */
+#define MUX_PA13H_AC_CMP1                  7
+#define PINMUX_PA13H_AC_CMP1       ((PIN_PA13H_AC_CMP1 << 16) | MUX_PA13H_AC_CMP1)
+#define PORT_PA13H_AC_CMP1         (1u << 13)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA21G_I2S_FS0                 21  /**< \brief I2S signal: FS0 on PA21 mux G */
+#define MUX_PA21G_I2S_FS0                  6
+#define PINMUX_PA21G_I2S_FS0       ((PIN_PA21G_I2S_FS0 << 16) | MUX_PA21G_I2S_FS0)
+#define PORT_PA21G_I2S_FS0         (1u << 21)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PB10G_I2S_MCK1                42  /**< \brief I2S signal: MCK1 on PB10 mux G */
+#define MUX_PB10G_I2S_MCK1                 6
+#define PINMUX_PB10G_I2S_MCK1      ((PIN_PB10G_I2S_MCK1 << 16) | MUX_PB10G_I2S_MCK1)
+#define PORT_PB10G_I2S_MCK1        (1u << 10)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA20G_I2S_SCK0                20  /**< \brief I2S signal: SCK0 on PA20 mux G */
+#define MUX_PA20G_I2S_SCK0                 6
+#define PINMUX_PA20G_I2S_SCK0      ((PIN_PA20G_I2S_SCK0 << 16) | MUX_PA20G_I2S_SCK0)
+#define PORT_PA20G_I2S_SCK0        (1u << 20)
+#define PIN_PB11G_I2S_SCK1                43  /**< \brief I2S signal: SCK1 on PB11 mux G */
+#define MUX_PB11G_I2S_SCK1                 6
+#define PINMUX_PB11G_I2S_SCK1      ((PIN_PB11G_I2S_SCK1 << 16) | MUX_PB11G_I2S_SCK1)
+#define PORT_PB11G_I2S_SCK1        (1u << 11)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+
+#endif /* _SAMD21G17A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g18a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g18a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21g18a.h	(revision 136)
@@ -0,0 +1,952 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21G18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21G18A_PIO_
+#define _SAMD21G18A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA12                          12  /**< \brief Pin Number for PA12 */
+#define PORT_PA12                  (1u << 12) /**< \brief PORT Mask  for PA12 */
+#define PIN_PA13                          13  /**< \brief Pin Number for PA13 */
+#define PORT_PA13                  (1u << 13) /**< \brief PORT Mask  for PA13 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA20                          20  /**< \brief Pin Number for PA20 */
+#define PORT_PA20                  (1u << 20) /**< \brief PORT Mask  for PA20 */
+#define PIN_PA21                          21  /**< \brief Pin Number for PA21 */
+#define PORT_PA21                  (1u << 21) /**< \brief PORT Mask  for PA21 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+#define PIN_PB02                          34  /**< \brief Pin Number for PB02 */
+#define PORT_PB02                  (1u <<  2) /**< \brief PORT Mask  for PB02 */
+#define PIN_PB03                          35  /**< \brief Pin Number for PB03 */
+#define PORT_PB03                  (1u <<  3) /**< \brief PORT Mask  for PB03 */
+#define PIN_PB08                          40  /**< \brief Pin Number for PB08 */
+#define PORT_PB08                  (1u <<  8) /**< \brief PORT Mask  for PB08 */
+#define PIN_PB09                          41  /**< \brief Pin Number for PB09 */
+#define PORT_PB09                  (1u <<  9) /**< \brief PORT Mask  for PB09 */
+#define PIN_PB10                          42  /**< \brief Pin Number for PB10 */
+#define PORT_PB10                  (1u << 10) /**< \brief PORT Mask  for PB10 */
+#define PIN_PB11                          43  /**< \brief Pin Number for PB11 */
+#define PORT_PB11                  (1u << 11) /**< \brief PORT Mask  for PB11 */
+#define PIN_PB22                          54  /**< \brief Pin Number for PB22 */
+#define PORT_PB22                  (1u << 22) /**< \brief PORT Mask  for PB22 */
+#define PIN_PB23                          55  /**< \brief Pin Number for PB23 */
+#define PORT_PB23                  (1u << 23) /**< \brief PORT Mask  for PB23 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PB22H_GCLK_IO0                54  /**< \brief GCLK signal: IO0 on PB22 mux H */
+#define MUX_PB22H_GCLK_IO0                 7
+#define PINMUX_PB22H_GCLK_IO0      ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
+#define PORT_PB22H_GCLK_IO0        (1u << 22)
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PB23H_GCLK_IO1                55  /**< \brief GCLK signal: IO1 on PB23 mux H */
+#define MUX_PB23H_GCLK_IO1                 7
+#define PINMUX_PB23H_GCLK_IO1      ((PIN_PB23H_GCLK_IO1 << 16) | MUX_PB23H_GCLK_IO1)
+#define PORT_PB23H_GCLK_IO1        (1u << 23)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA20H_GCLK_IO4                20  /**< \brief GCLK signal: IO4 on PA20 mux H */
+#define MUX_PA20H_GCLK_IO4                 7
+#define PINMUX_PA20H_GCLK_IO4      ((PIN_PA20H_GCLK_IO4 << 16) | MUX_PA20H_GCLK_IO4)
+#define PORT_PA20H_GCLK_IO4        (1u << 20)
+#define PIN_PB10H_GCLK_IO4                42  /**< \brief GCLK signal: IO4 on PB10 mux H */
+#define MUX_PB10H_GCLK_IO4                 7
+#define PINMUX_PB10H_GCLK_IO4      ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
+#define PORT_PB10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA21H_GCLK_IO5                21  /**< \brief GCLK signal: IO5 on PA21 mux H */
+#define MUX_PA21H_GCLK_IO5                 7
+#define PINMUX_PA21H_GCLK_IO5      ((PIN_PA21H_GCLK_IO5 << 16) | MUX_PA21H_GCLK_IO5)
+#define PORT_PA21H_GCLK_IO5        (1u << 21)
+#define PIN_PB11H_GCLK_IO5                43  /**< \brief GCLK signal: IO5 on PB11 mux H */
+#define MUX_PB11H_GCLK_IO5                 7
+#define PINMUX_PB11H_GCLK_IO5      ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
+#define PORT_PB11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PB02A_EIC_EXTINT2             34  /**< \brief EIC signal: EXTINT2 on PB02 mux A */
+#define MUX_PB02A_EIC_EXTINT2              0
+#define PINMUX_PB02A_EIC_EXTINT2   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
+#define PORT_PB02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PB03A_EIC_EXTINT3             35  /**< \brief EIC signal: EXTINT3 on PB03 mux A */
+#define MUX_PB03A_EIC_EXTINT3              0
+#define PINMUX_PB03A_EIC_EXTINT3   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
+#define PORT_PB03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA20A_EIC_EXTINT4             20  /**< \brief EIC signal: EXTINT4 on PA20 mux A */
+#define MUX_PA20A_EIC_EXTINT4              0
+#define PINMUX_PA20A_EIC_EXTINT4   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
+#define PORT_PA20A_EIC_EXTINT4     (1u << 20)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA21A_EIC_EXTINT5             21  /**< \brief EIC signal: EXTINT5 on PA21 mux A */
+#define MUX_PA21A_EIC_EXTINT5              0
+#define PINMUX_PA21A_EIC_EXTINT5   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
+#define PORT_PA21A_EIC_EXTINT5     (1u << 21)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PB22A_EIC_EXTINT6             54  /**< \brief EIC signal: EXTINT6 on PB22 mux A */
+#define MUX_PB22A_EIC_EXTINT6              0
+#define PINMUX_PB22A_EIC_EXTINT6   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
+#define PORT_PB22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PB23A_EIC_EXTINT7             55  /**< \brief EIC signal: EXTINT7 on PB23 mux A */
+#define MUX_PB23A_EIC_EXTINT7              0
+#define PINMUX_PB23A_EIC_EXTINT7   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
+#define PORT_PB23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PB08A_EIC_EXTINT8             40  /**< \brief EIC signal: EXTINT8 on PB08 mux A */
+#define MUX_PB08A_EIC_EXTINT8              0
+#define PINMUX_PB08A_EIC_EXTINT8   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
+#define PORT_PB08A_EIC_EXTINT8     (1u <<  8)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PB09A_EIC_EXTINT9             41  /**< \brief EIC signal: EXTINT9 on PB09 mux A */
+#define MUX_PB09A_EIC_EXTINT9              0
+#define PINMUX_PB09A_EIC_EXTINT9   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
+#define PORT_PB09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PB10A_EIC_EXTINT10            42  /**< \brief EIC signal: EXTINT10 on PB10 mux A */
+#define MUX_PB10A_EIC_EXTINT10             0
+#define PINMUX_PB10A_EIC_EXTINT10  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
+#define PORT_PB10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PB11A_EIC_EXTINT11            43  /**< \brief EIC signal: EXTINT11 on PB11 mux A */
+#define MUX_PB11A_EIC_EXTINT11             0
+#define PINMUX_PB11A_EIC_EXTINT11  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
+#define PORT_PB11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA12A_EIC_EXTINT12            12  /**< \brief EIC signal: EXTINT12 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT12             0
+#define PINMUX_PA12A_EIC_EXTINT12  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
+#define PORT_PA12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PA13A_EIC_EXTINT13            13  /**< \brief EIC signal: EXTINT13 on PA13 mux A */
+#define MUX_PA13A_EIC_EXTINT13             0
+#define PINMUX_PA13A_EIC_EXTINT13  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
+#define PORT_PA13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PA12A_EIC_EXTINT17            12  /**< \brief EIC signal: EXTINT17 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT17             0
+#define PINMUX_PA12A_EIC_EXTINT17  ((PIN_PA12A_EIC_EXTINT17 << 16) | MUX_PA12A_EIC_EXTINT17)
+#define PORT_PA12A_EIC_EXTINT17    (1u << 12)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA13A_SERCOM0_PAD0            13  /**< \brief SERCOM0 signal: PAD0 on PA13 mux A */
+#define MUX_PA13A_SERCOM0_PAD0             0
+#define PINMUX_PA13A_SERCOM0_PAD0  ((PIN_PA13A_SERCOM0_PAD0 << 16) | MUX_PA13A_SERCOM0_PAD0)
+#define PORT_PA13A_SERCOM0_PAD0    (1u << 13)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA12C_SERCOM2_PAD0            12  /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */
+#define MUX_PA12C_SERCOM2_PAD0             2
+#define PINMUX_PA12C_SERCOM2_PAD0  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
+#define PORT_PA12C_SERCOM2_PAD0    (1u << 12)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA13C_SERCOM2_PAD1            13  /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */
+#define MUX_PA13C_SERCOM2_PAD1             2
+#define PINMUX_PA13C_SERCOM2_PAD1  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
+#define PORT_PA13C_SERCOM2_PAD1    (1u << 13)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA20D_SERCOM3_PAD2            20  /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */
+#define MUX_PA20D_SERCOM3_PAD2             3
+#define PINMUX_PA20D_SERCOM3_PAD2  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
+#define PORT_PA20D_SERCOM3_PAD2    (1u << 20)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA21D_SERCOM3_PAD3            21  /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */
+#define MUX_PA21D_SERCOM3_PAD3             3
+#define PINMUX_PA21D_SERCOM3_PAD3  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
+#define PORT_PA21D_SERCOM3_PAD3    (1u << 21)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for SERCOM4 peripheral ========== */
+#define PIN_PA12D_SERCOM4_PAD0            12  /**< \brief SERCOM4 signal: PAD0 on PA12 mux D */
+#define MUX_PA12D_SERCOM4_PAD0             3
+#define PINMUX_PA12D_SERCOM4_PAD0  ((PIN_PA12D_SERCOM4_PAD0 << 16) | MUX_PA12D_SERCOM4_PAD0)
+#define PORT_PA12D_SERCOM4_PAD0    (1u << 12)
+#define PIN_PB08D_SERCOM4_PAD0            40  /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */
+#define MUX_PB08D_SERCOM4_PAD0             3
+#define PINMUX_PB08D_SERCOM4_PAD0  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
+#define PORT_PB08D_SERCOM4_PAD0    (1u <<  8)
+#define PIN_PA13D_SERCOM4_PAD1            13  /**< \brief SERCOM4 signal: PAD1 on PA13 mux D */
+#define MUX_PA13D_SERCOM4_PAD1             3
+#define PINMUX_PA13D_SERCOM4_PAD1  ((PIN_PA13D_SERCOM4_PAD1 << 16) | MUX_PA13D_SERCOM4_PAD1)
+#define PORT_PA13D_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB09D_SERCOM4_PAD1            41  /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */
+#define MUX_PB09D_SERCOM4_PAD1             3
+#define PINMUX_PB09D_SERCOM4_PAD1  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
+#define PORT_PB09D_SERCOM4_PAD1    (1u <<  9)
+#define PIN_PA14D_SERCOM4_PAD2            14  /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */
+#define MUX_PA14D_SERCOM4_PAD2             3
+#define PINMUX_PA14D_SERCOM4_PAD2  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
+#define PORT_PA14D_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB10D_SERCOM4_PAD2            42  /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
+#define MUX_PB10D_SERCOM4_PAD2             3
+#define PINMUX_PB10D_SERCOM4_PAD2  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
+#define PORT_PB10D_SERCOM4_PAD2    (1u << 10)
+#define PIN_PA15D_SERCOM4_PAD3            15  /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */
+#define MUX_PA15D_SERCOM4_PAD3             3
+#define PINMUX_PA15D_SERCOM4_PAD3  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
+#define PORT_PA15D_SERCOM4_PAD3    (1u << 15)
+#define PIN_PB11D_SERCOM4_PAD3            43  /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */
+#define MUX_PB11D_SERCOM4_PAD3             3
+#define PINMUX_PB11D_SERCOM4_PAD3  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
+#define PORT_PB11D_SERCOM4_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM5 peripheral ========== */
+#define PIN_PA22D_SERCOM5_PAD0            22  /**< \brief SERCOM5 signal: PAD0 on PA22 mux D */
+#define MUX_PA22D_SERCOM5_PAD0             3
+#define PINMUX_PA22D_SERCOM5_PAD0  ((PIN_PA22D_SERCOM5_PAD0 << 16) | MUX_PA22D_SERCOM5_PAD0)
+#define PORT_PA22D_SERCOM5_PAD0    (1u << 22)
+#define PIN_PB02D_SERCOM5_PAD0            34  /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */
+#define MUX_PB02D_SERCOM5_PAD0             3
+#define PINMUX_PB02D_SERCOM5_PAD0  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
+#define PORT_PB02D_SERCOM5_PAD0    (1u <<  2)
+#define PIN_PA23D_SERCOM5_PAD1            23  /**< \brief SERCOM5 signal: PAD1 on PA23 mux D */
+#define MUX_PA23D_SERCOM5_PAD1             3
+#define PINMUX_PA23D_SERCOM5_PAD1  ((PIN_PA23D_SERCOM5_PAD1 << 16) | MUX_PA23D_SERCOM5_PAD1)
+#define PORT_PA23D_SERCOM5_PAD1    (1u << 23)
+#define PIN_PB03D_SERCOM5_PAD1            35  /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */
+#define MUX_PB03D_SERCOM5_PAD1             3
+#define PINMUX_PB03D_SERCOM5_PAD1  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
+#define PORT_PB03D_SERCOM5_PAD1    (1u <<  3)
+#define PIN_PA24D_SERCOM5_PAD2            24  /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */
+#define MUX_PA24D_SERCOM5_PAD2             3
+#define PINMUX_PA24D_SERCOM5_PAD2  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
+#define PORT_PA24D_SERCOM5_PAD2    (1u << 24)
+#define PIN_PB22D_SERCOM5_PAD2            54  /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */
+#define MUX_PB22D_SERCOM5_PAD2             3
+#define PINMUX_PB22D_SERCOM5_PAD2  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
+#define PORT_PB22D_SERCOM5_PAD2    (1u << 22)
+#define PIN_PA20C_SERCOM5_PAD2            20  /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */
+#define MUX_PA20C_SERCOM5_PAD2             2
+#define PINMUX_PA20C_SERCOM5_PAD2  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
+#define PORT_PA20C_SERCOM5_PAD2    (1u << 20)
+#define PIN_PA25D_SERCOM5_PAD3            25  /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */
+#define MUX_PA25D_SERCOM5_PAD3             3
+#define PINMUX_PA25D_SERCOM5_PAD3  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
+#define PORT_PA25D_SERCOM5_PAD3    (1u << 25)
+#define PIN_PB23D_SERCOM5_PAD3            55  /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */
+#define MUX_PB23D_SERCOM5_PAD3             3
+#define PINMUX_PB23D_SERCOM5_PAD3  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
+#define PORT_PB23D_SERCOM5_PAD3    (1u << 23)
+#define PIN_PA21C_SERCOM5_PAD3            21  /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */
+#define MUX_PA21C_SERCOM5_PAD3             2
+#define PINMUX_PA21C_SERCOM5_PAD3  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
+#define PORT_PA21C_SERCOM5_PAD3    (1u << 21)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PB10F_TCC0_WO4                42  /**< \brief TCC0 signal: WO4 on PB10 mux F */
+#define MUX_PB10F_TCC0_WO4                 5
+#define PINMUX_PB10F_TCC0_WO4      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
+#define PORT_PB10F_TCC0_WO4        (1u << 10)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PB11F_TCC0_WO5                43  /**< \brief TCC0 signal: WO5 on PB11 mux F */
+#define MUX_PB11F_TCC0_WO5                 5
+#define PINMUX_PB11F_TCC0_WO5      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
+#define PORT_PB11F_TCC0_WO5        (1u << 11)
+#define PIN_PA12F_TCC0_WO6                12  /**< \brief TCC0 signal: WO6 on PA12 mux F */
+#define MUX_PA12F_TCC0_WO6                 5
+#define PINMUX_PA12F_TCC0_WO6      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
+#define PORT_PA12F_TCC0_WO6        (1u << 12)
+#define PIN_PA20F_TCC0_WO6                20  /**< \brief TCC0 signal: WO6 on PA20 mux F */
+#define MUX_PA20F_TCC0_WO6                 5
+#define PINMUX_PA20F_TCC0_WO6      ((PIN_PA20F_TCC0_WO6 << 16) | MUX_PA20F_TCC0_WO6)
+#define PORT_PA20F_TCC0_WO6        (1u << 20)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA13F_TCC0_WO7                13  /**< \brief TCC0 signal: WO7 on PA13 mux F */
+#define MUX_PA13F_TCC0_WO7                 5
+#define PINMUX_PA13F_TCC0_WO7      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
+#define PORT_PA13F_TCC0_WO7        (1u << 13)
+#define PIN_PA21F_TCC0_WO7                21  /**< \brief TCC0 signal: WO7 on PA21 mux F */
+#define MUX_PA21F_TCC0_WO7                 5
+#define PINMUX_PA21F_TCC0_WO7      ((PIN_PA21F_TCC0_WO7 << 16) | MUX_PA21F_TCC0_WO7)
+#define PORT_PA21F_TCC0_WO7        (1u << 21)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA12E_TCC2_WO0                12  /**< \brief TCC2 signal: WO0 on PA12 mux E */
+#define MUX_PA12E_TCC2_WO0                 4
+#define PINMUX_PA12E_TCC2_WO0      ((PIN_PA12E_TCC2_WO0 << 16) | MUX_PA12E_TCC2_WO0)
+#define PORT_PA12E_TCC2_WO0        (1u << 12)
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA13E_TCC2_WO1                13  /**< \brief TCC2 signal: WO1 on PA13 mux E */
+#define MUX_PA13E_TCC2_WO1                 4
+#define PINMUX_PA13E_TCC2_WO1      ((PIN_PA13E_TCC2_WO1 << 16) | MUX_PA13E_TCC2_WO1)
+#define PORT_PA13E_TCC2_WO1        (1u << 13)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PB08E_TC4_WO0                 40  /**< \brief TC4 signal: WO0 on PB08 mux E */
+#define MUX_PB08E_TC4_WO0                  4
+#define PINMUX_PB08E_TC4_WO0       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
+#define PORT_PB08E_TC4_WO0         (1u <<  8)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+#define PIN_PB09E_TC4_WO1                 41  /**< \brief TC4 signal: WO1 on PB09 mux E */
+#define MUX_PB09E_TC4_WO1                  4
+#define PINMUX_PB09E_TC4_WO1       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
+#define PORT_PB09E_TC4_WO1         (1u <<  9)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PB10E_TC5_WO0                 42  /**< \brief TC5 signal: WO0 on PB10 mux E */
+#define MUX_PB10E_TC5_WO0                  4
+#define PINMUX_PB10E_TC5_WO0       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
+#define PORT_PB10E_TC5_WO0         (1u << 10)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+#define PIN_PB11E_TC5_WO1                 43  /**< \brief TC5 signal: WO1 on PB11 mux E */
+#define MUX_PB11E_TC5_WO1                  4
+#define PINMUX_PB11E_TC5_WO1       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
+#define PORT_PB11E_TC5_WO1         (1u << 11)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PB08B_ADC_AIN2                40  /**< \brief ADC signal: AIN2 on PB08 mux B */
+#define MUX_PB08B_ADC_AIN2                 1
+#define PINMUX_PB08B_ADC_AIN2      ((PIN_PB08B_ADC_AIN2 << 16) | MUX_PB08B_ADC_AIN2)
+#define PORT_PB08B_ADC_AIN2        (1u <<  8)
+#define PIN_PB09B_ADC_AIN3                41  /**< \brief ADC signal: AIN3 on PB09 mux B */
+#define MUX_PB09B_ADC_AIN3                 1
+#define PINMUX_PB09B_ADC_AIN3      ((PIN_PB09B_ADC_AIN3 << 16) | MUX_PB09B_ADC_AIN3)
+#define PORT_PB09B_ADC_AIN3        (1u <<  9)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PB02B_ADC_AIN10               34  /**< \brief ADC signal: AIN10 on PB02 mux B */
+#define MUX_PB02B_ADC_AIN10                1
+#define PINMUX_PB02B_ADC_AIN10     ((PIN_PB02B_ADC_AIN10 << 16) | MUX_PB02B_ADC_AIN10)
+#define PORT_PB02B_ADC_AIN10       (1u <<  2)
+#define PIN_PB03B_ADC_AIN11               35  /**< \brief ADC signal: AIN11 on PB03 mux B */
+#define MUX_PB03B_ADC_AIN11                1
+#define PINMUX_PB03B_ADC_AIN11     ((PIN_PB03B_ADC_AIN11 << 16) | MUX_PB03B_ADC_AIN11)
+#define PORT_PB03B_ADC_AIN11       (1u <<  3)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA12H_AC_CMP0                 12  /**< \brief AC signal: CMP0 on PA12 mux H */
+#define MUX_PA12H_AC_CMP0                  7
+#define PINMUX_PA12H_AC_CMP0       ((PIN_PA12H_AC_CMP0 << 16) | MUX_PA12H_AC_CMP0)
+#define PORT_PA12H_AC_CMP0         (1u << 12)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA13H_AC_CMP1                 13  /**< \brief AC signal: CMP1 on PA13 mux H */
+#define MUX_PA13H_AC_CMP1                  7
+#define PINMUX_PA13H_AC_CMP1       ((PIN_PA13H_AC_CMP1 << 16) | MUX_PA13H_AC_CMP1)
+#define PORT_PA13H_AC_CMP1         (1u << 13)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA21G_I2S_FS0                 21  /**< \brief I2S signal: FS0 on PA21 mux G */
+#define MUX_PA21G_I2S_FS0                  6
+#define PINMUX_PA21G_I2S_FS0       ((PIN_PA21G_I2S_FS0 << 16) | MUX_PA21G_I2S_FS0)
+#define PORT_PA21G_I2S_FS0         (1u << 21)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PB10G_I2S_MCK1                42  /**< \brief I2S signal: MCK1 on PB10 mux G */
+#define MUX_PB10G_I2S_MCK1                 6
+#define PINMUX_PB10G_I2S_MCK1      ((PIN_PB10G_I2S_MCK1 << 16) | MUX_PB10G_I2S_MCK1)
+#define PORT_PB10G_I2S_MCK1        (1u << 10)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA20G_I2S_SCK0                20  /**< \brief I2S signal: SCK0 on PA20 mux G */
+#define MUX_PA20G_I2S_SCK0                 6
+#define PINMUX_PA20G_I2S_SCK0      ((PIN_PA20G_I2S_SCK0 << 16) | MUX_PA20G_I2S_SCK0)
+#define PORT_PA20G_I2S_SCK0        (1u << 20)
+#define PIN_PB11G_I2S_SCK1                43  /**< \brief I2S signal: SCK1 on PB11 mux G */
+#define MUX_PB11G_I2S_SCK1                 6
+#define PINMUX_PB11G_I2S_SCK1      ((PIN_PB11G_I2S_SCK1 << 16) | MUX_PB11G_I2S_SCK1)
+#define PORT_PB11G_I2S_SCK1        (1u << 11)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+
+#endif /* _SAMD21G18A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j15a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j15a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j15a.h	(revision 136)
@@ -0,0 +1,1242 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21J15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21J15A_PIO_
+#define _SAMD21J15A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA12                          12  /**< \brief Pin Number for PA12 */
+#define PORT_PA12                  (1u << 12) /**< \brief PORT Mask  for PA12 */
+#define PIN_PA13                          13  /**< \brief Pin Number for PA13 */
+#define PORT_PA13                  (1u << 13) /**< \brief PORT Mask  for PA13 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA20                          20  /**< \brief Pin Number for PA20 */
+#define PORT_PA20                  (1u << 20) /**< \brief PORT Mask  for PA20 */
+#define PIN_PA21                          21  /**< \brief Pin Number for PA21 */
+#define PORT_PA21                  (1u << 21) /**< \brief PORT Mask  for PA21 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+#define PIN_PB00                          32  /**< \brief Pin Number for PB00 */
+#define PORT_PB00                  (1u <<  0) /**< \brief PORT Mask  for PB00 */
+#define PIN_PB01                          33  /**< \brief Pin Number for PB01 */
+#define PORT_PB01                  (1u <<  1) /**< \brief PORT Mask  for PB01 */
+#define PIN_PB02                          34  /**< \brief Pin Number for PB02 */
+#define PORT_PB02                  (1u <<  2) /**< \brief PORT Mask  for PB02 */
+#define PIN_PB03                          35  /**< \brief Pin Number for PB03 */
+#define PORT_PB03                  (1u <<  3) /**< \brief PORT Mask  for PB03 */
+#define PIN_PB04                          36  /**< \brief Pin Number for PB04 */
+#define PORT_PB04                  (1u <<  4) /**< \brief PORT Mask  for PB04 */
+#define PIN_PB05                          37  /**< \brief Pin Number for PB05 */
+#define PORT_PB05                  (1u <<  5) /**< \brief PORT Mask  for PB05 */
+#define PIN_PB06                          38  /**< \brief Pin Number for PB06 */
+#define PORT_PB06                  (1u <<  6) /**< \brief PORT Mask  for PB06 */
+#define PIN_PB07                          39  /**< \brief Pin Number for PB07 */
+#define PORT_PB07                  (1u <<  7) /**< \brief PORT Mask  for PB07 */
+#define PIN_PB08                          40  /**< \brief Pin Number for PB08 */
+#define PORT_PB08                  (1u <<  8) /**< \brief PORT Mask  for PB08 */
+#define PIN_PB09                          41  /**< \brief Pin Number for PB09 */
+#define PORT_PB09                  (1u <<  9) /**< \brief PORT Mask  for PB09 */
+#define PIN_PB10                          42  /**< \brief Pin Number for PB10 */
+#define PORT_PB10                  (1u << 10) /**< \brief PORT Mask  for PB10 */
+#define PIN_PB11                          43  /**< \brief Pin Number for PB11 */
+#define PORT_PB11                  (1u << 11) /**< \brief PORT Mask  for PB11 */
+#define PIN_PB12                          44  /**< \brief Pin Number for PB12 */
+#define PORT_PB12                  (1u << 12) /**< \brief PORT Mask  for PB12 */
+#define PIN_PB13                          45  /**< \brief Pin Number for PB13 */
+#define PORT_PB13                  (1u << 13) /**< \brief PORT Mask  for PB13 */
+#define PIN_PB14                          46  /**< \brief Pin Number for PB14 */
+#define PORT_PB14                  (1u << 14) /**< \brief PORT Mask  for PB14 */
+#define PIN_PB15                          47  /**< \brief Pin Number for PB15 */
+#define PORT_PB15                  (1u << 15) /**< \brief PORT Mask  for PB15 */
+#define PIN_PB16                          48  /**< \brief Pin Number for PB16 */
+#define PORT_PB16                  (1u << 16) /**< \brief PORT Mask  for PB16 */
+#define PIN_PB17                          49  /**< \brief Pin Number for PB17 */
+#define PORT_PB17                  (1u << 17) /**< \brief PORT Mask  for PB17 */
+#define PIN_PB22                          54  /**< \brief Pin Number for PB22 */
+#define PORT_PB22                  (1u << 22) /**< \brief PORT Mask  for PB22 */
+#define PIN_PB23                          55  /**< \brief Pin Number for PB23 */
+#define PORT_PB23                  (1u << 23) /**< \brief PORT Mask  for PB23 */
+#define PIN_PB30                          62  /**< \brief Pin Number for PB30 */
+#define PORT_PB30                  (1u << 30) /**< \brief PORT Mask  for PB30 */
+#define PIN_PB31                          63  /**< \brief Pin Number for PB31 */
+#define PORT_PB31                  (1u << 31) /**< \brief PORT Mask  for PB31 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PB14H_GCLK_IO0                46  /**< \brief GCLK signal: IO0 on PB14 mux H */
+#define MUX_PB14H_GCLK_IO0                 7
+#define PINMUX_PB14H_GCLK_IO0      ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
+#define PORT_PB14H_GCLK_IO0        (1u << 14)
+#define PIN_PB22H_GCLK_IO0                54  /**< \brief GCLK signal: IO0 on PB22 mux H */
+#define MUX_PB22H_GCLK_IO0                 7
+#define PINMUX_PB22H_GCLK_IO0      ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
+#define PORT_PB22H_GCLK_IO0        (1u << 22)
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PB15H_GCLK_IO1                47  /**< \brief GCLK signal: IO1 on PB15 mux H */
+#define MUX_PB15H_GCLK_IO1                 7
+#define PINMUX_PB15H_GCLK_IO1      ((PIN_PB15H_GCLK_IO1 << 16) | MUX_PB15H_GCLK_IO1)
+#define PORT_PB15H_GCLK_IO1        (1u << 15)
+#define PIN_PB23H_GCLK_IO1                55  /**< \brief GCLK signal: IO1 on PB23 mux H */
+#define MUX_PB23H_GCLK_IO1                 7
+#define PINMUX_PB23H_GCLK_IO1      ((PIN_PB23H_GCLK_IO1 << 16) | MUX_PB23H_GCLK_IO1)
+#define PORT_PB23H_GCLK_IO1        (1u << 23)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PB16H_GCLK_IO2                48  /**< \brief GCLK signal: IO2 on PB16 mux H */
+#define MUX_PB16H_GCLK_IO2                 7
+#define PINMUX_PB16H_GCLK_IO2      ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
+#define PORT_PB16H_GCLK_IO2        (1u << 16)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PB17H_GCLK_IO3                49  /**< \brief GCLK signal: IO3 on PB17 mux H */
+#define MUX_PB17H_GCLK_IO3                 7
+#define PINMUX_PB17H_GCLK_IO3      ((PIN_PB17H_GCLK_IO3 << 16) | MUX_PB17H_GCLK_IO3)
+#define PORT_PB17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA20H_GCLK_IO4                20  /**< \brief GCLK signal: IO4 on PA20 mux H */
+#define MUX_PA20H_GCLK_IO4                 7
+#define PINMUX_PA20H_GCLK_IO4      ((PIN_PA20H_GCLK_IO4 << 16) | MUX_PA20H_GCLK_IO4)
+#define PORT_PA20H_GCLK_IO4        (1u << 20)
+#define PIN_PB10H_GCLK_IO4                42  /**< \brief GCLK signal: IO4 on PB10 mux H */
+#define MUX_PB10H_GCLK_IO4                 7
+#define PINMUX_PB10H_GCLK_IO4      ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
+#define PORT_PB10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA21H_GCLK_IO5                21  /**< \brief GCLK signal: IO5 on PA21 mux H */
+#define MUX_PA21H_GCLK_IO5                 7
+#define PINMUX_PA21H_GCLK_IO5      ((PIN_PA21H_GCLK_IO5 << 16) | MUX_PA21H_GCLK_IO5)
+#define PORT_PA21H_GCLK_IO5        (1u << 21)
+#define PIN_PB11H_GCLK_IO5                43  /**< \brief GCLK signal: IO5 on PB11 mux H */
+#define MUX_PB11H_GCLK_IO5                 7
+#define PINMUX_PB11H_GCLK_IO5      ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
+#define PORT_PB11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PB12H_GCLK_IO6                44  /**< \brief GCLK signal: IO6 on PB12 mux H */
+#define MUX_PB12H_GCLK_IO6                 7
+#define PINMUX_PB12H_GCLK_IO6      ((PIN_PB12H_GCLK_IO6 << 16) | MUX_PB12H_GCLK_IO6)
+#define PORT_PB12H_GCLK_IO6        (1u << 12)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+#define PIN_PB13H_GCLK_IO7                45  /**< \brief GCLK signal: IO7 on PB13 mux H */
+#define MUX_PB13H_GCLK_IO7                 7
+#define PINMUX_PB13H_GCLK_IO7      ((PIN_PB13H_GCLK_IO7 << 16) | MUX_PB13H_GCLK_IO7)
+#define PORT_PB13H_GCLK_IO7        (1u << 13)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PB00A_EIC_EXTINT0             32  /**< \brief EIC signal: EXTINT0 on PB00 mux A */
+#define MUX_PB00A_EIC_EXTINT0              0
+#define PINMUX_PB00A_EIC_EXTINT0   ((PIN_PB00A_EIC_EXTINT0 << 16) | MUX_PB00A_EIC_EXTINT0)
+#define PORT_PB00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PB16A_EIC_EXTINT0             48  /**< \brief EIC signal: EXTINT0 on PB16 mux A */
+#define MUX_PB16A_EIC_EXTINT0              0
+#define PINMUX_PB16A_EIC_EXTINT0   ((PIN_PB16A_EIC_EXTINT0 << 16) | MUX_PB16A_EIC_EXTINT0)
+#define PORT_PB16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PB01A_EIC_EXTINT1             33  /**< \brief EIC signal: EXTINT1 on PB01 mux A */
+#define MUX_PB01A_EIC_EXTINT1              0
+#define PINMUX_PB01A_EIC_EXTINT1   ((PIN_PB01A_EIC_EXTINT1 << 16) | MUX_PB01A_EIC_EXTINT1)
+#define PORT_PB01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PB17A_EIC_EXTINT1             49  /**< \brief EIC signal: EXTINT1 on PB17 mux A */
+#define MUX_PB17A_EIC_EXTINT1              0
+#define PINMUX_PB17A_EIC_EXTINT1   ((PIN_PB17A_EIC_EXTINT1 << 16) | MUX_PB17A_EIC_EXTINT1)
+#define PORT_PB17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PB02A_EIC_EXTINT2             34  /**< \brief EIC signal: EXTINT2 on PB02 mux A */
+#define MUX_PB02A_EIC_EXTINT2              0
+#define PINMUX_PB02A_EIC_EXTINT2   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
+#define PORT_PB02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PB03A_EIC_EXTINT3             35  /**< \brief EIC signal: EXTINT3 on PB03 mux A */
+#define MUX_PB03A_EIC_EXTINT3              0
+#define PINMUX_PB03A_EIC_EXTINT3   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
+#define PORT_PB03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA20A_EIC_EXTINT4             20  /**< \brief EIC signal: EXTINT4 on PA20 mux A */
+#define MUX_PA20A_EIC_EXTINT4              0
+#define PINMUX_PA20A_EIC_EXTINT4   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
+#define PORT_PA20A_EIC_EXTINT4     (1u << 20)
+#define PIN_PB04A_EIC_EXTINT4             36  /**< \brief EIC signal: EXTINT4 on PB04 mux A */
+#define MUX_PB04A_EIC_EXTINT4              0
+#define PINMUX_PB04A_EIC_EXTINT4   ((PIN_PB04A_EIC_EXTINT4 << 16) | MUX_PB04A_EIC_EXTINT4)
+#define PORT_PB04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA21A_EIC_EXTINT5             21  /**< \brief EIC signal: EXTINT5 on PA21 mux A */
+#define MUX_PA21A_EIC_EXTINT5              0
+#define PINMUX_PA21A_EIC_EXTINT5   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
+#define PORT_PA21A_EIC_EXTINT5     (1u << 21)
+#define PIN_PB05A_EIC_EXTINT5             37  /**< \brief EIC signal: EXTINT5 on PB05 mux A */
+#define MUX_PB05A_EIC_EXTINT5              0
+#define PINMUX_PB05A_EIC_EXTINT5   ((PIN_PB05A_EIC_EXTINT5 << 16) | MUX_PB05A_EIC_EXTINT5)
+#define PORT_PB05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PB06A_EIC_EXTINT6             38  /**< \brief EIC signal: EXTINT6 on PB06 mux A */
+#define MUX_PB06A_EIC_EXTINT6              0
+#define PINMUX_PB06A_EIC_EXTINT6   ((PIN_PB06A_EIC_EXTINT6 << 16) | MUX_PB06A_EIC_EXTINT6)
+#define PORT_PB06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PB22A_EIC_EXTINT6             54  /**< \brief EIC signal: EXTINT6 on PB22 mux A */
+#define MUX_PB22A_EIC_EXTINT6              0
+#define PINMUX_PB22A_EIC_EXTINT6   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
+#define PORT_PB22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PB07A_EIC_EXTINT7             39  /**< \brief EIC signal: EXTINT7 on PB07 mux A */
+#define MUX_PB07A_EIC_EXTINT7              0
+#define PINMUX_PB07A_EIC_EXTINT7   ((PIN_PB07A_EIC_EXTINT7 << 16) | MUX_PB07A_EIC_EXTINT7)
+#define PORT_PB07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PB23A_EIC_EXTINT7             55  /**< \brief EIC signal: EXTINT7 on PB23 mux A */
+#define MUX_PB23A_EIC_EXTINT7              0
+#define PINMUX_PB23A_EIC_EXTINT7   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
+#define PORT_PB23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PB08A_EIC_EXTINT8             40  /**< \brief EIC signal: EXTINT8 on PB08 mux A */
+#define MUX_PB08A_EIC_EXTINT8              0
+#define PINMUX_PB08A_EIC_EXTINT8   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
+#define PORT_PB08A_EIC_EXTINT8     (1u <<  8)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PB09A_EIC_EXTINT9             41  /**< \brief EIC signal: EXTINT9 on PB09 mux A */
+#define MUX_PB09A_EIC_EXTINT9              0
+#define PINMUX_PB09A_EIC_EXTINT9   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
+#define PORT_PB09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PB10A_EIC_EXTINT10            42  /**< \brief EIC signal: EXTINT10 on PB10 mux A */
+#define MUX_PB10A_EIC_EXTINT10             0
+#define PINMUX_PB10A_EIC_EXTINT10  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
+#define PORT_PB10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PB11A_EIC_EXTINT11            43  /**< \brief EIC signal: EXTINT11 on PB11 mux A */
+#define MUX_PB11A_EIC_EXTINT11             0
+#define PINMUX_PB11A_EIC_EXTINT11  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
+#define PORT_PB11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA12A_EIC_EXTINT12            12  /**< \brief EIC signal: EXTINT12 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT12             0
+#define PINMUX_PA12A_EIC_EXTINT12  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
+#define PORT_PA12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PB12A_EIC_EXTINT12            44  /**< \brief EIC signal: EXTINT12 on PB12 mux A */
+#define MUX_PB12A_EIC_EXTINT12             0
+#define PINMUX_PB12A_EIC_EXTINT12  ((PIN_PB12A_EIC_EXTINT12 << 16) | MUX_PB12A_EIC_EXTINT12)
+#define PORT_PB12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA13A_EIC_EXTINT13            13  /**< \brief EIC signal: EXTINT13 on PA13 mux A */
+#define MUX_PA13A_EIC_EXTINT13             0
+#define PINMUX_PA13A_EIC_EXTINT13  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
+#define PORT_PA13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PB13A_EIC_EXTINT13            45  /**< \brief EIC signal: EXTINT13 on PB13 mux A */
+#define MUX_PB13A_EIC_EXTINT13             0
+#define PINMUX_PB13A_EIC_EXTINT13  ((PIN_PB13A_EIC_EXTINT13 << 16) | MUX_PB13A_EIC_EXTINT13)
+#define PORT_PB13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PB14A_EIC_EXTINT14            46  /**< \brief EIC signal: EXTINT14 on PB14 mux A */
+#define MUX_PB14A_EIC_EXTINT14             0
+#define PINMUX_PB14A_EIC_EXTINT14  ((PIN_PB14A_EIC_EXTINT14 << 16) | MUX_PB14A_EIC_EXTINT14)
+#define PORT_PB14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PB30A_EIC_EXTINT14            62  /**< \brief EIC signal: EXTINT14 on PB30 mux A */
+#define MUX_PB30A_EIC_EXTINT14             0
+#define PINMUX_PB30A_EIC_EXTINT14  ((PIN_PB30A_EIC_EXTINT14 << 16) | MUX_PB30A_EIC_EXTINT14)
+#define PORT_PB30A_EIC_EXTINT14    (1u << 30)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PB15A_EIC_EXTINT15            47  /**< \brief EIC signal: EXTINT15 on PB15 mux A */
+#define MUX_PB15A_EIC_EXTINT15             0
+#define PINMUX_PB15A_EIC_EXTINT15  ((PIN_PB15A_EIC_EXTINT15 << 16) | MUX_PB15A_EIC_EXTINT15)
+#define PORT_PB15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PB31A_EIC_EXTINT15            63  /**< \brief EIC signal: EXTINT15 on PB31 mux A */
+#define MUX_PB31A_EIC_EXTINT15             0
+#define PINMUX_PB31A_EIC_EXTINT15  ((PIN_PB31A_EIC_EXTINT15 << 16) | MUX_PB31A_EIC_EXTINT15)
+#define PORT_PB31A_EIC_EXTINT15    (1u << 31)
+#define PIN_PA12A_EIC_EXTINT17            12  /**< \brief EIC signal: EXTINT17 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT17             0
+#define PINMUX_PA12A_EIC_EXTINT17  ((PIN_PA12A_EIC_EXTINT17 << 16) | MUX_PA12A_EIC_EXTINT17)
+#define PORT_PA12A_EIC_EXTINT17    (1u << 12)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA13A_SERCOM0_PAD0            13  /**< \brief SERCOM0 signal: PAD0 on PA13 mux A */
+#define MUX_PA13A_SERCOM0_PAD0             0
+#define PINMUX_PA13A_SERCOM0_PAD0  ((PIN_PA13A_SERCOM0_PAD0 << 16) | MUX_PA13A_SERCOM0_PAD0)
+#define PORT_PA13A_SERCOM0_PAD0    (1u << 13)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA12C_SERCOM2_PAD0            12  /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */
+#define MUX_PA12C_SERCOM2_PAD0             2
+#define PINMUX_PA12C_SERCOM2_PAD0  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
+#define PORT_PA12C_SERCOM2_PAD0    (1u << 12)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA13C_SERCOM2_PAD1            13  /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */
+#define MUX_PA13C_SERCOM2_PAD1             2
+#define PINMUX_PA13C_SERCOM2_PAD1  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
+#define PORT_PA13C_SERCOM2_PAD1    (1u << 13)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA20D_SERCOM3_PAD2            20  /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */
+#define MUX_PA20D_SERCOM3_PAD2             3
+#define PINMUX_PA20D_SERCOM3_PAD2  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
+#define PORT_PA20D_SERCOM3_PAD2    (1u << 20)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA21D_SERCOM3_PAD3            21  /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */
+#define MUX_PA21D_SERCOM3_PAD3             3
+#define PINMUX_PA21D_SERCOM3_PAD3  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
+#define PORT_PA21D_SERCOM3_PAD3    (1u << 21)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for SERCOM4 peripheral ========== */
+#define PIN_PA12D_SERCOM4_PAD0            12  /**< \brief SERCOM4 signal: PAD0 on PA12 mux D */
+#define MUX_PA12D_SERCOM4_PAD0             3
+#define PINMUX_PA12D_SERCOM4_PAD0  ((PIN_PA12D_SERCOM4_PAD0 << 16) | MUX_PA12D_SERCOM4_PAD0)
+#define PORT_PA12D_SERCOM4_PAD0    (1u << 12)
+#define PIN_PB08D_SERCOM4_PAD0            40  /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */
+#define MUX_PB08D_SERCOM4_PAD0             3
+#define PINMUX_PB08D_SERCOM4_PAD0  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
+#define PORT_PB08D_SERCOM4_PAD0    (1u <<  8)
+#define PIN_PB12C_SERCOM4_PAD0            44  /**< \brief SERCOM4 signal: PAD0 on PB12 mux C */
+#define MUX_PB12C_SERCOM4_PAD0             2
+#define PINMUX_PB12C_SERCOM4_PAD0  ((PIN_PB12C_SERCOM4_PAD0 << 16) | MUX_PB12C_SERCOM4_PAD0)
+#define PORT_PB12C_SERCOM4_PAD0    (1u << 12)
+#define PIN_PA13D_SERCOM4_PAD1            13  /**< \brief SERCOM4 signal: PAD1 on PA13 mux D */
+#define MUX_PA13D_SERCOM4_PAD1             3
+#define PINMUX_PA13D_SERCOM4_PAD1  ((PIN_PA13D_SERCOM4_PAD1 << 16) | MUX_PA13D_SERCOM4_PAD1)
+#define PORT_PA13D_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB09D_SERCOM4_PAD1            41  /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */
+#define MUX_PB09D_SERCOM4_PAD1             3
+#define PINMUX_PB09D_SERCOM4_PAD1  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
+#define PORT_PB09D_SERCOM4_PAD1    (1u <<  9)
+#define PIN_PB13C_SERCOM4_PAD1            45  /**< \brief SERCOM4 signal: PAD1 on PB13 mux C */
+#define MUX_PB13C_SERCOM4_PAD1             2
+#define PINMUX_PB13C_SERCOM4_PAD1  ((PIN_PB13C_SERCOM4_PAD1 << 16) | MUX_PB13C_SERCOM4_PAD1)
+#define PORT_PB13C_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB31F_SERCOM4_PAD1            63  /**< \brief SERCOM4 signal: PAD1 on PB31 mux F */
+#define MUX_PB31F_SERCOM4_PAD1             5
+#define PINMUX_PB31F_SERCOM4_PAD1  ((PIN_PB31F_SERCOM4_PAD1 << 16) | MUX_PB31F_SERCOM4_PAD1)
+#define PORT_PB31F_SERCOM4_PAD1    (1u << 31)
+#define PIN_PA14D_SERCOM4_PAD2            14  /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */
+#define MUX_PA14D_SERCOM4_PAD2             3
+#define PINMUX_PA14D_SERCOM4_PAD2  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
+#define PORT_PA14D_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB10D_SERCOM4_PAD2            42  /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
+#define MUX_PB10D_SERCOM4_PAD2             3
+#define PINMUX_PB10D_SERCOM4_PAD2  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
+#define PORT_PB10D_SERCOM4_PAD2    (1u << 10)
+#define PIN_PB14C_SERCOM4_PAD2            46  /**< \brief SERCOM4 signal: PAD2 on PB14 mux C */
+#define MUX_PB14C_SERCOM4_PAD2             2
+#define PINMUX_PB14C_SERCOM4_PAD2  ((PIN_PB14C_SERCOM4_PAD2 << 16) | MUX_PB14C_SERCOM4_PAD2)
+#define PORT_PB14C_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB30F_SERCOM4_PAD2            62  /**< \brief SERCOM4 signal: PAD2 on PB30 mux F */
+#define MUX_PB30F_SERCOM4_PAD2             5
+#define PINMUX_PB30F_SERCOM4_PAD2  ((PIN_PB30F_SERCOM4_PAD2 << 16) | MUX_PB30F_SERCOM4_PAD2)
+#define PORT_PB30F_SERCOM4_PAD2    (1u << 30)
+#define PIN_PA15D_SERCOM4_PAD3            15  /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */
+#define MUX_PA15D_SERCOM4_PAD3             3
+#define PINMUX_PA15D_SERCOM4_PAD3  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
+#define PORT_PA15D_SERCOM4_PAD3    (1u << 15)
+#define PIN_PB11D_SERCOM4_PAD3            43  /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */
+#define MUX_PB11D_SERCOM4_PAD3             3
+#define PINMUX_PB11D_SERCOM4_PAD3  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
+#define PORT_PB11D_SERCOM4_PAD3    (1u << 11)
+#define PIN_PB15C_SERCOM4_PAD3            47  /**< \brief SERCOM4 signal: PAD3 on PB15 mux C */
+#define MUX_PB15C_SERCOM4_PAD3             2
+#define PINMUX_PB15C_SERCOM4_PAD3  ((PIN_PB15C_SERCOM4_PAD3 << 16) | MUX_PB15C_SERCOM4_PAD3)
+#define PORT_PB15C_SERCOM4_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM5 peripheral ========== */
+#define PIN_PB16C_SERCOM5_PAD0            48  /**< \brief SERCOM5 signal: PAD0 on PB16 mux C */
+#define MUX_PB16C_SERCOM5_PAD0             2
+#define PINMUX_PB16C_SERCOM5_PAD0  ((PIN_PB16C_SERCOM5_PAD0 << 16) | MUX_PB16C_SERCOM5_PAD0)
+#define PORT_PB16C_SERCOM5_PAD0    (1u << 16)
+#define PIN_PA22D_SERCOM5_PAD0            22  /**< \brief SERCOM5 signal: PAD0 on PA22 mux D */
+#define MUX_PA22D_SERCOM5_PAD0             3
+#define PINMUX_PA22D_SERCOM5_PAD0  ((PIN_PA22D_SERCOM5_PAD0 << 16) | MUX_PA22D_SERCOM5_PAD0)
+#define PORT_PA22D_SERCOM5_PAD0    (1u << 22)
+#define PIN_PB02D_SERCOM5_PAD0            34  /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */
+#define MUX_PB02D_SERCOM5_PAD0             3
+#define PINMUX_PB02D_SERCOM5_PAD0  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
+#define PORT_PB02D_SERCOM5_PAD0    (1u <<  2)
+#define PIN_PB30D_SERCOM5_PAD0            62  /**< \brief SERCOM5 signal: PAD0 on PB30 mux D */
+#define MUX_PB30D_SERCOM5_PAD0             3
+#define PINMUX_PB30D_SERCOM5_PAD0  ((PIN_PB30D_SERCOM5_PAD0 << 16) | MUX_PB30D_SERCOM5_PAD0)
+#define PORT_PB30D_SERCOM5_PAD0    (1u << 30)
+#define PIN_PB17C_SERCOM5_PAD0            49  /**< \brief SERCOM5 signal: PAD0 on PB17 mux C */
+#define MUX_PB17C_SERCOM5_PAD0             2
+#define PINMUX_PB17C_SERCOM5_PAD0  ((PIN_PB17C_SERCOM5_PAD0 << 16) | MUX_PB17C_SERCOM5_PAD0)
+#define PORT_PB17C_SERCOM5_PAD0    (1u << 17)
+#define PIN_PB17C_SERCOM5_PAD1            49  /**< \brief SERCOM5 signal: PAD1 on PB17 mux C */
+#define MUX_PB17C_SERCOM5_PAD1             2
+#define PINMUX_PB17C_SERCOM5_PAD1  ((PIN_PB17C_SERCOM5_PAD1 << 16) | MUX_PB17C_SERCOM5_PAD1)
+#define PORT_PB17C_SERCOM5_PAD1    (1u << 17)
+#define PIN_PA23D_SERCOM5_PAD1            23  /**< \brief SERCOM5 signal: PAD1 on PA23 mux D */
+#define MUX_PA23D_SERCOM5_PAD1             3
+#define PINMUX_PA23D_SERCOM5_PAD1  ((PIN_PA23D_SERCOM5_PAD1 << 16) | MUX_PA23D_SERCOM5_PAD1)
+#define PORT_PA23D_SERCOM5_PAD1    (1u << 23)
+#define PIN_PB03D_SERCOM5_PAD1            35  /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */
+#define MUX_PB03D_SERCOM5_PAD1             3
+#define PINMUX_PB03D_SERCOM5_PAD1  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
+#define PORT_PB03D_SERCOM5_PAD1    (1u <<  3)
+#define PIN_PB31D_SERCOM5_PAD1            63  /**< \brief SERCOM5 signal: PAD1 on PB31 mux D */
+#define MUX_PB31D_SERCOM5_PAD1             3
+#define PINMUX_PB31D_SERCOM5_PAD1  ((PIN_PB31D_SERCOM5_PAD1 << 16) | MUX_PB31D_SERCOM5_PAD1)
+#define PORT_PB31D_SERCOM5_PAD1    (1u << 31)
+#define PIN_PB16C_SERCOM5_PAD1            48  /**< \brief SERCOM5 signal: PAD1 on PB16 mux C */
+#define MUX_PB16C_SERCOM5_PAD1             2
+#define PINMUX_PB16C_SERCOM5_PAD1  ((PIN_PB16C_SERCOM5_PAD1 << 16) | MUX_PB16C_SERCOM5_PAD1)
+#define PORT_PB16C_SERCOM5_PAD1    (1u << 16)
+#define PIN_PA24D_SERCOM5_PAD2            24  /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */
+#define MUX_PA24D_SERCOM5_PAD2             3
+#define PINMUX_PA24D_SERCOM5_PAD2  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
+#define PORT_PA24D_SERCOM5_PAD2    (1u << 24)
+#define PIN_PB00D_SERCOM5_PAD2            32  /**< \brief SERCOM5 signal: PAD2 on PB00 mux D */
+#define MUX_PB00D_SERCOM5_PAD2             3
+#define PINMUX_PB00D_SERCOM5_PAD2  ((PIN_PB00D_SERCOM5_PAD2 << 16) | MUX_PB00D_SERCOM5_PAD2)
+#define PORT_PB00D_SERCOM5_PAD2    (1u <<  0)
+#define PIN_PB22D_SERCOM5_PAD2            54  /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */
+#define MUX_PB22D_SERCOM5_PAD2             3
+#define PINMUX_PB22D_SERCOM5_PAD2  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
+#define PORT_PB22D_SERCOM5_PAD2    (1u << 22)
+#define PIN_PA20C_SERCOM5_PAD2            20  /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */
+#define MUX_PA20C_SERCOM5_PAD2             2
+#define PINMUX_PA20C_SERCOM5_PAD2  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
+#define PORT_PA20C_SERCOM5_PAD2    (1u << 20)
+#define PIN_PA25D_SERCOM5_PAD3            25  /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */
+#define MUX_PA25D_SERCOM5_PAD3             3
+#define PINMUX_PA25D_SERCOM5_PAD3  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
+#define PORT_PA25D_SERCOM5_PAD3    (1u << 25)
+#define PIN_PB01D_SERCOM5_PAD3            33  /**< \brief SERCOM5 signal: PAD3 on PB01 mux D */
+#define MUX_PB01D_SERCOM5_PAD3             3
+#define PINMUX_PB01D_SERCOM5_PAD3  ((PIN_PB01D_SERCOM5_PAD3 << 16) | MUX_PB01D_SERCOM5_PAD3)
+#define PORT_PB01D_SERCOM5_PAD3    (1u <<  1)
+#define PIN_PB23D_SERCOM5_PAD3            55  /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */
+#define MUX_PB23D_SERCOM5_PAD3             3
+#define PINMUX_PB23D_SERCOM5_PAD3  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
+#define PORT_PB23D_SERCOM5_PAD3    (1u << 23)
+#define PIN_PA21C_SERCOM5_PAD3            21  /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */
+#define MUX_PA21C_SERCOM5_PAD3             2
+#define PINMUX_PA21C_SERCOM5_PAD3  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
+#define PORT_PA21C_SERCOM5_PAD3    (1u << 21)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PB30E_TCC0_WO0                62  /**< \brief TCC0 signal: WO0 on PB30 mux E */
+#define MUX_PB30E_TCC0_WO0                 4
+#define PINMUX_PB30E_TCC0_WO0      ((PIN_PB30E_TCC0_WO0 << 16) | MUX_PB30E_TCC0_WO0)
+#define PORT_PB30E_TCC0_WO0        (1u << 30)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PB31E_TCC0_WO1                63  /**< \brief TCC0 signal: WO1 on PB31 mux E */
+#define MUX_PB31E_TCC0_WO1                 4
+#define PINMUX_PB31E_TCC0_WO1      ((PIN_PB31E_TCC0_WO1 << 16) | MUX_PB31E_TCC0_WO1)
+#define PORT_PB31E_TCC0_WO1        (1u << 31)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PB10F_TCC0_WO4                42  /**< \brief TCC0 signal: WO4 on PB10 mux F */
+#define MUX_PB10F_TCC0_WO4                 5
+#define PINMUX_PB10F_TCC0_WO4      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
+#define PORT_PB10F_TCC0_WO4        (1u << 10)
+#define PIN_PB16F_TCC0_WO4                48  /**< \brief TCC0 signal: WO4 on PB16 mux F */
+#define MUX_PB16F_TCC0_WO4                 5
+#define PINMUX_PB16F_TCC0_WO4      ((PIN_PB16F_TCC0_WO4 << 16) | MUX_PB16F_TCC0_WO4)
+#define PORT_PB16F_TCC0_WO4        (1u << 16)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PB11F_TCC0_WO5                43  /**< \brief TCC0 signal: WO5 on PB11 mux F */
+#define MUX_PB11F_TCC0_WO5                 5
+#define PINMUX_PB11F_TCC0_WO5      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
+#define PORT_PB11F_TCC0_WO5        (1u << 11)
+#define PIN_PB17F_TCC0_WO5                49  /**< \brief TCC0 signal: WO5 on PB17 mux F */
+#define MUX_PB17F_TCC0_WO5                 5
+#define PINMUX_PB17F_TCC0_WO5      ((PIN_PB17F_TCC0_WO5 << 16) | MUX_PB17F_TCC0_WO5)
+#define PORT_PB17F_TCC0_WO5        (1u << 17)
+#define PIN_PA12F_TCC0_WO6                12  /**< \brief TCC0 signal: WO6 on PA12 mux F */
+#define MUX_PA12F_TCC0_WO6                 5
+#define PINMUX_PA12F_TCC0_WO6      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
+#define PORT_PA12F_TCC0_WO6        (1u << 12)
+#define PIN_PA20F_TCC0_WO6                20  /**< \brief TCC0 signal: WO6 on PA20 mux F */
+#define MUX_PA20F_TCC0_WO6                 5
+#define PINMUX_PA20F_TCC0_WO6      ((PIN_PA20F_TCC0_WO6 << 16) | MUX_PA20F_TCC0_WO6)
+#define PORT_PA20F_TCC0_WO6        (1u << 20)
+#define PIN_PB12F_TCC0_WO6                44  /**< \brief TCC0 signal: WO6 on PB12 mux F */
+#define MUX_PB12F_TCC0_WO6                 5
+#define PINMUX_PB12F_TCC0_WO6      ((PIN_PB12F_TCC0_WO6 << 16) | MUX_PB12F_TCC0_WO6)
+#define PORT_PB12F_TCC0_WO6        (1u << 12)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA13F_TCC0_WO7                13  /**< \brief TCC0 signal: WO7 on PA13 mux F */
+#define MUX_PA13F_TCC0_WO7                 5
+#define PINMUX_PA13F_TCC0_WO7      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
+#define PORT_PA13F_TCC0_WO7        (1u << 13)
+#define PIN_PA21F_TCC0_WO7                21  /**< \brief TCC0 signal: WO7 on PA21 mux F */
+#define MUX_PA21F_TCC0_WO7                 5
+#define PINMUX_PA21F_TCC0_WO7      ((PIN_PA21F_TCC0_WO7 << 16) | MUX_PA21F_TCC0_WO7)
+#define PORT_PA21F_TCC0_WO7        (1u << 21)
+#define PIN_PB13F_TCC0_WO7                45  /**< \brief TCC0 signal: WO7 on PB13 mux F */
+#define MUX_PB13F_TCC0_WO7                 5
+#define PINMUX_PB13F_TCC0_WO7      ((PIN_PB13F_TCC0_WO7 << 16) | MUX_PB13F_TCC0_WO7)
+#define PORT_PB13F_TCC0_WO7        (1u << 13)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PB30F_TCC1_WO2                62  /**< \brief TCC1 signal: WO2 on PB30 mux F */
+#define MUX_PB30F_TCC1_WO2                 5
+#define PINMUX_PB30F_TCC1_WO2      ((PIN_PB30F_TCC1_WO2 << 16) | MUX_PB30F_TCC1_WO2)
+#define PORT_PB30F_TCC1_WO2        (1u << 30)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+#define PIN_PB31F_TCC1_WO3                63  /**< \brief TCC1 signal: WO3 on PB31 mux F */
+#define MUX_PB31F_TCC1_WO3                 5
+#define PINMUX_PB31F_TCC1_WO3      ((PIN_PB31F_TCC1_WO3 << 16) | MUX_PB31F_TCC1_WO3)
+#define PORT_PB31F_TCC1_WO3        (1u << 31)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA12E_TCC2_WO0                12  /**< \brief TCC2 signal: WO0 on PA12 mux E */
+#define MUX_PA12E_TCC2_WO0                 4
+#define PINMUX_PA12E_TCC2_WO0      ((PIN_PA12E_TCC2_WO0 << 16) | MUX_PA12E_TCC2_WO0)
+#define PORT_PA12E_TCC2_WO0        (1u << 12)
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA13E_TCC2_WO1                13  /**< \brief TCC2 signal: WO1 on PA13 mux E */
+#define MUX_PA13E_TCC2_WO1                 4
+#define PINMUX_PA13E_TCC2_WO1      ((PIN_PA13E_TCC2_WO1 << 16) | MUX_PA13E_TCC2_WO1)
+#define PORT_PA13E_TCC2_WO1        (1u << 13)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PB08E_TC4_WO0                 40  /**< \brief TC4 signal: WO0 on PB08 mux E */
+#define MUX_PB08E_TC4_WO0                  4
+#define PINMUX_PB08E_TC4_WO0       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
+#define PORT_PB08E_TC4_WO0         (1u <<  8)
+#define PIN_PB12E_TC4_WO0                 44  /**< \brief TC4 signal: WO0 on PB12 mux E */
+#define MUX_PB12E_TC4_WO0                  4
+#define PINMUX_PB12E_TC4_WO0       ((PIN_PB12E_TC4_WO0 << 16) | MUX_PB12E_TC4_WO0)
+#define PORT_PB12E_TC4_WO0         (1u << 12)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+#define PIN_PB09E_TC4_WO1                 41  /**< \brief TC4 signal: WO1 on PB09 mux E */
+#define MUX_PB09E_TC4_WO1                  4
+#define PINMUX_PB09E_TC4_WO1       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
+#define PORT_PB09E_TC4_WO1         (1u <<  9)
+#define PIN_PB13E_TC4_WO1                 45  /**< \brief TC4 signal: WO1 on PB13 mux E */
+#define MUX_PB13E_TC4_WO1                  4
+#define PINMUX_PB13E_TC4_WO1       ((PIN_PB13E_TC4_WO1 << 16) | MUX_PB13E_TC4_WO1)
+#define PORT_PB13E_TC4_WO1         (1u << 13)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PB10E_TC5_WO0                 42  /**< \brief TC5 signal: WO0 on PB10 mux E */
+#define MUX_PB10E_TC5_WO0                  4
+#define PINMUX_PB10E_TC5_WO0       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
+#define PORT_PB10E_TC5_WO0         (1u << 10)
+#define PIN_PB14E_TC5_WO0                 46  /**< \brief TC5 signal: WO0 on PB14 mux E */
+#define MUX_PB14E_TC5_WO0                  4
+#define PINMUX_PB14E_TC5_WO0       ((PIN_PB14E_TC5_WO0 << 16) | MUX_PB14E_TC5_WO0)
+#define PORT_PB14E_TC5_WO0         (1u << 14)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+#define PIN_PB11E_TC5_WO1                 43  /**< \brief TC5 signal: WO1 on PB11 mux E */
+#define MUX_PB11E_TC5_WO1                  4
+#define PINMUX_PB11E_TC5_WO1       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
+#define PORT_PB11E_TC5_WO1         (1u << 11)
+#define PIN_PB15E_TC5_WO1                 47  /**< \brief TC5 signal: WO1 on PB15 mux E */
+#define MUX_PB15E_TC5_WO1                  4
+#define PINMUX_PB15E_TC5_WO1       ((PIN_PB15E_TC5_WO1 << 16) | MUX_PB15E_TC5_WO1)
+#define PORT_PB15E_TC5_WO1         (1u << 15)
+/* ========== PORT definition for TC6 peripheral ========== */
+#define PIN_PB02E_TC6_WO0                 34  /**< \brief TC6 signal: WO0 on PB02 mux E */
+#define MUX_PB02E_TC6_WO0                  4
+#define PINMUX_PB02E_TC6_WO0       ((PIN_PB02E_TC6_WO0 << 16) | MUX_PB02E_TC6_WO0)
+#define PORT_PB02E_TC6_WO0         (1u <<  2)
+#define PIN_PB16E_TC6_WO0                 48  /**< \brief TC6 signal: WO0 on PB16 mux E */
+#define MUX_PB16E_TC6_WO0                  4
+#define PINMUX_PB16E_TC6_WO0       ((PIN_PB16E_TC6_WO0 << 16) | MUX_PB16E_TC6_WO0)
+#define PORT_PB16E_TC6_WO0         (1u << 16)
+#define PIN_PB03E_TC6_WO1                 35  /**< \brief TC6 signal: WO1 on PB03 mux E */
+#define MUX_PB03E_TC6_WO1                  4
+#define PINMUX_PB03E_TC6_WO1       ((PIN_PB03E_TC6_WO1 << 16) | MUX_PB03E_TC6_WO1)
+#define PORT_PB03E_TC6_WO1         (1u <<  3)
+#define PIN_PB17E_TC6_WO1                 49  /**< \brief TC6 signal: WO1 on PB17 mux E */
+#define MUX_PB17E_TC6_WO1                  4
+#define PINMUX_PB17E_TC6_WO1       ((PIN_PB17E_TC6_WO1 << 16) | MUX_PB17E_TC6_WO1)
+#define PORT_PB17E_TC6_WO1         (1u << 17)
+/* ========== PORT definition for TC7 peripheral ========== */
+#define PIN_PA20E_TC7_WO0                 20  /**< \brief TC7 signal: WO0 on PA20 mux E */
+#define MUX_PA20E_TC7_WO0                  4
+#define PINMUX_PA20E_TC7_WO0       ((PIN_PA20E_TC7_WO0 << 16) | MUX_PA20E_TC7_WO0)
+#define PORT_PA20E_TC7_WO0         (1u << 20)
+#define PIN_PB00E_TC7_WO0                 32  /**< \brief TC7 signal: WO0 on PB00 mux E */
+#define MUX_PB00E_TC7_WO0                  4
+#define PINMUX_PB00E_TC7_WO0       ((PIN_PB00E_TC7_WO0 << 16) | MUX_PB00E_TC7_WO0)
+#define PORT_PB00E_TC7_WO0         (1u <<  0)
+#define PIN_PB22E_TC7_WO0                 54  /**< \brief TC7 signal: WO0 on PB22 mux E */
+#define MUX_PB22E_TC7_WO0                  4
+#define PINMUX_PB22E_TC7_WO0       ((PIN_PB22E_TC7_WO0 << 16) | MUX_PB22E_TC7_WO0)
+#define PORT_PB22E_TC7_WO0         (1u << 22)
+#define PIN_PA21E_TC7_WO1                 21  /**< \brief TC7 signal: WO1 on PA21 mux E */
+#define MUX_PA21E_TC7_WO1                  4
+#define PINMUX_PA21E_TC7_WO1       ((PIN_PA21E_TC7_WO1 << 16) | MUX_PA21E_TC7_WO1)
+#define PORT_PA21E_TC7_WO1         (1u << 21)
+#define PIN_PB01E_TC7_WO1                 33  /**< \brief TC7 signal: WO1 on PB01 mux E */
+#define MUX_PB01E_TC7_WO1                  4
+#define PINMUX_PB01E_TC7_WO1       ((PIN_PB01E_TC7_WO1 << 16) | MUX_PB01E_TC7_WO1)
+#define PORT_PB01E_TC7_WO1         (1u <<  1)
+#define PIN_PB23E_TC7_WO1                 55  /**< \brief TC7 signal: WO1 on PB23 mux E */
+#define MUX_PB23E_TC7_WO1                  4
+#define PINMUX_PB23E_TC7_WO1       ((PIN_PB23E_TC7_WO1 << 16) | MUX_PB23E_TC7_WO1)
+#define PORT_PB23E_TC7_WO1         (1u << 23)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PB08B_ADC_AIN2                40  /**< \brief ADC signal: AIN2 on PB08 mux B */
+#define MUX_PB08B_ADC_AIN2                 1
+#define PINMUX_PB08B_ADC_AIN2      ((PIN_PB08B_ADC_AIN2 << 16) | MUX_PB08B_ADC_AIN2)
+#define PORT_PB08B_ADC_AIN2        (1u <<  8)
+#define PIN_PB09B_ADC_AIN3                41  /**< \brief ADC signal: AIN3 on PB09 mux B */
+#define MUX_PB09B_ADC_AIN3                 1
+#define PINMUX_PB09B_ADC_AIN3      ((PIN_PB09B_ADC_AIN3 << 16) | MUX_PB09B_ADC_AIN3)
+#define PORT_PB09B_ADC_AIN3        (1u <<  9)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PB00B_ADC_AIN8                32  /**< \brief ADC signal: AIN8 on PB00 mux B */
+#define MUX_PB00B_ADC_AIN8                 1
+#define PINMUX_PB00B_ADC_AIN8      ((PIN_PB00B_ADC_AIN8 << 16) | MUX_PB00B_ADC_AIN8)
+#define PORT_PB00B_ADC_AIN8        (1u <<  0)
+#define PIN_PB01B_ADC_AIN9                33  /**< \brief ADC signal: AIN9 on PB01 mux B */
+#define MUX_PB01B_ADC_AIN9                 1
+#define PINMUX_PB01B_ADC_AIN9      ((PIN_PB01B_ADC_AIN9 << 16) | MUX_PB01B_ADC_AIN9)
+#define PORT_PB01B_ADC_AIN9        (1u <<  1)
+#define PIN_PB02B_ADC_AIN10               34  /**< \brief ADC signal: AIN10 on PB02 mux B */
+#define MUX_PB02B_ADC_AIN10                1
+#define PINMUX_PB02B_ADC_AIN10     ((PIN_PB02B_ADC_AIN10 << 16) | MUX_PB02B_ADC_AIN10)
+#define PORT_PB02B_ADC_AIN10       (1u <<  2)
+#define PIN_PB03B_ADC_AIN11               35  /**< \brief ADC signal: AIN11 on PB03 mux B */
+#define MUX_PB03B_ADC_AIN11                1
+#define PINMUX_PB03B_ADC_AIN11     ((PIN_PB03B_ADC_AIN11 << 16) | MUX_PB03B_ADC_AIN11)
+#define PORT_PB03B_ADC_AIN11       (1u <<  3)
+#define PIN_PB04B_ADC_AIN12               36  /**< \brief ADC signal: AIN12 on PB04 mux B */
+#define MUX_PB04B_ADC_AIN12                1
+#define PINMUX_PB04B_ADC_AIN12     ((PIN_PB04B_ADC_AIN12 << 16) | MUX_PB04B_ADC_AIN12)
+#define PORT_PB04B_ADC_AIN12       (1u <<  4)
+#define PIN_PB05B_ADC_AIN13               37  /**< \brief ADC signal: AIN13 on PB05 mux B */
+#define MUX_PB05B_ADC_AIN13                1
+#define PINMUX_PB05B_ADC_AIN13     ((PIN_PB05B_ADC_AIN13 << 16) | MUX_PB05B_ADC_AIN13)
+#define PORT_PB05B_ADC_AIN13       (1u <<  5)
+#define PIN_PB06B_ADC_AIN14               38  /**< \brief ADC signal: AIN14 on PB06 mux B */
+#define MUX_PB06B_ADC_AIN14                1
+#define PINMUX_PB06B_ADC_AIN14     ((PIN_PB06B_ADC_AIN14 << 16) | MUX_PB06B_ADC_AIN14)
+#define PORT_PB06B_ADC_AIN14       (1u <<  6)
+#define PIN_PB07B_ADC_AIN15               39  /**< \brief ADC signal: AIN15 on PB07 mux B */
+#define MUX_PB07B_ADC_AIN15                1
+#define PINMUX_PB07B_ADC_AIN15     ((PIN_PB07B_ADC_AIN15 << 16) | MUX_PB07B_ADC_AIN15)
+#define PORT_PB07B_ADC_AIN15       (1u <<  7)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA12H_AC_CMP0                 12  /**< \brief AC signal: CMP0 on PA12 mux H */
+#define MUX_PA12H_AC_CMP0                  7
+#define PINMUX_PA12H_AC_CMP0       ((PIN_PA12H_AC_CMP0 << 16) | MUX_PA12H_AC_CMP0)
+#define PORT_PA12H_AC_CMP0         (1u << 12)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA13H_AC_CMP1                 13  /**< \brief AC signal: CMP1 on PA13 mux H */
+#define MUX_PA13H_AC_CMP1                  7
+#define PINMUX_PA13H_AC_CMP1       ((PIN_PA13H_AC_CMP1 << 16) | MUX_PA13H_AC_CMP1)
+#define PORT_PA13H_AC_CMP1         (1u << 13)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA21G_I2S_FS0                 21  /**< \brief I2S signal: FS0 on PA21 mux G */
+#define MUX_PA21G_I2S_FS0                  6
+#define PINMUX_PA21G_I2S_FS0       ((PIN_PA21G_I2S_FS0 << 16) | MUX_PA21G_I2S_FS0)
+#define PORT_PA21G_I2S_FS0         (1u << 21)
+#define PIN_PB12G_I2S_FS1                 44  /**< \brief I2S signal: FS1 on PB12 mux G */
+#define MUX_PB12G_I2S_FS1                  6
+#define PINMUX_PB12G_I2S_FS1       ((PIN_PB12G_I2S_FS1 << 16) | MUX_PB12G_I2S_FS1)
+#define PORT_PB12G_I2S_FS1         (1u << 12)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PB17G_I2S_MCK0                49  /**< \brief I2S signal: MCK0 on PB17 mux G */
+#define MUX_PB17G_I2S_MCK0                 6
+#define PINMUX_PB17G_I2S_MCK0      ((PIN_PB17G_I2S_MCK0 << 16) | MUX_PB17G_I2S_MCK0)
+#define PORT_PB17G_I2S_MCK0        (1u << 17)
+#define PIN_PB10G_I2S_MCK1                42  /**< \brief I2S signal: MCK1 on PB10 mux G */
+#define MUX_PB10G_I2S_MCK1                 6
+#define PINMUX_PB10G_I2S_MCK1      ((PIN_PB10G_I2S_MCK1 << 16) | MUX_PB10G_I2S_MCK1)
+#define PORT_PB10G_I2S_MCK1        (1u << 10)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA20G_I2S_SCK0                20  /**< \brief I2S signal: SCK0 on PA20 mux G */
+#define MUX_PA20G_I2S_SCK0                 6
+#define PINMUX_PA20G_I2S_SCK0      ((PIN_PA20G_I2S_SCK0 << 16) | MUX_PA20G_I2S_SCK0)
+#define PORT_PA20G_I2S_SCK0        (1u << 20)
+#define PIN_PB11G_I2S_SCK1                43  /**< \brief I2S signal: SCK1 on PB11 mux G */
+#define MUX_PB11G_I2S_SCK1                 6
+#define PINMUX_PB11G_I2S_SCK1      ((PIN_PB11G_I2S_SCK1 << 16) | MUX_PB11G_I2S_SCK1)
+#define PORT_PB11G_I2S_SCK1        (1u << 11)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+#define PIN_PB16G_I2S_SD1                 48  /**< \brief I2S signal: SD1 on PB16 mux G */
+#define MUX_PB16G_I2S_SD1                  6
+#define PINMUX_PB16G_I2S_SD1       ((PIN_PB16G_I2S_SD1 << 16) | MUX_PB16G_I2S_SD1)
+#define PORT_PB16G_I2S_SD1         (1u << 16)
+
+#endif /* _SAMD21J15A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j16a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j16a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j16a.h	(revision 136)
@@ -0,0 +1,1242 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21J16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21J16A_PIO_
+#define _SAMD21J16A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA12                          12  /**< \brief Pin Number for PA12 */
+#define PORT_PA12                  (1u << 12) /**< \brief PORT Mask  for PA12 */
+#define PIN_PA13                          13  /**< \brief Pin Number for PA13 */
+#define PORT_PA13                  (1u << 13) /**< \brief PORT Mask  for PA13 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA20                          20  /**< \brief Pin Number for PA20 */
+#define PORT_PA20                  (1u << 20) /**< \brief PORT Mask  for PA20 */
+#define PIN_PA21                          21  /**< \brief Pin Number for PA21 */
+#define PORT_PA21                  (1u << 21) /**< \brief PORT Mask  for PA21 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+#define PIN_PB00                          32  /**< \brief Pin Number for PB00 */
+#define PORT_PB00                  (1u <<  0) /**< \brief PORT Mask  for PB00 */
+#define PIN_PB01                          33  /**< \brief Pin Number for PB01 */
+#define PORT_PB01                  (1u <<  1) /**< \brief PORT Mask  for PB01 */
+#define PIN_PB02                          34  /**< \brief Pin Number for PB02 */
+#define PORT_PB02                  (1u <<  2) /**< \brief PORT Mask  for PB02 */
+#define PIN_PB03                          35  /**< \brief Pin Number for PB03 */
+#define PORT_PB03                  (1u <<  3) /**< \brief PORT Mask  for PB03 */
+#define PIN_PB04                          36  /**< \brief Pin Number for PB04 */
+#define PORT_PB04                  (1u <<  4) /**< \brief PORT Mask  for PB04 */
+#define PIN_PB05                          37  /**< \brief Pin Number for PB05 */
+#define PORT_PB05                  (1u <<  5) /**< \brief PORT Mask  for PB05 */
+#define PIN_PB06                          38  /**< \brief Pin Number for PB06 */
+#define PORT_PB06                  (1u <<  6) /**< \brief PORT Mask  for PB06 */
+#define PIN_PB07                          39  /**< \brief Pin Number for PB07 */
+#define PORT_PB07                  (1u <<  7) /**< \brief PORT Mask  for PB07 */
+#define PIN_PB08                          40  /**< \brief Pin Number for PB08 */
+#define PORT_PB08                  (1u <<  8) /**< \brief PORT Mask  for PB08 */
+#define PIN_PB09                          41  /**< \brief Pin Number for PB09 */
+#define PORT_PB09                  (1u <<  9) /**< \brief PORT Mask  for PB09 */
+#define PIN_PB10                          42  /**< \brief Pin Number for PB10 */
+#define PORT_PB10                  (1u << 10) /**< \brief PORT Mask  for PB10 */
+#define PIN_PB11                          43  /**< \brief Pin Number for PB11 */
+#define PORT_PB11                  (1u << 11) /**< \brief PORT Mask  for PB11 */
+#define PIN_PB12                          44  /**< \brief Pin Number for PB12 */
+#define PORT_PB12                  (1u << 12) /**< \brief PORT Mask  for PB12 */
+#define PIN_PB13                          45  /**< \brief Pin Number for PB13 */
+#define PORT_PB13                  (1u << 13) /**< \brief PORT Mask  for PB13 */
+#define PIN_PB14                          46  /**< \brief Pin Number for PB14 */
+#define PORT_PB14                  (1u << 14) /**< \brief PORT Mask  for PB14 */
+#define PIN_PB15                          47  /**< \brief Pin Number for PB15 */
+#define PORT_PB15                  (1u << 15) /**< \brief PORT Mask  for PB15 */
+#define PIN_PB16                          48  /**< \brief Pin Number for PB16 */
+#define PORT_PB16                  (1u << 16) /**< \brief PORT Mask  for PB16 */
+#define PIN_PB17                          49  /**< \brief Pin Number for PB17 */
+#define PORT_PB17                  (1u << 17) /**< \brief PORT Mask  for PB17 */
+#define PIN_PB22                          54  /**< \brief Pin Number for PB22 */
+#define PORT_PB22                  (1u << 22) /**< \brief PORT Mask  for PB22 */
+#define PIN_PB23                          55  /**< \brief Pin Number for PB23 */
+#define PORT_PB23                  (1u << 23) /**< \brief PORT Mask  for PB23 */
+#define PIN_PB30                          62  /**< \brief Pin Number for PB30 */
+#define PORT_PB30                  (1u << 30) /**< \brief PORT Mask  for PB30 */
+#define PIN_PB31                          63  /**< \brief Pin Number for PB31 */
+#define PORT_PB31                  (1u << 31) /**< \brief PORT Mask  for PB31 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PB14H_GCLK_IO0                46  /**< \brief GCLK signal: IO0 on PB14 mux H */
+#define MUX_PB14H_GCLK_IO0                 7
+#define PINMUX_PB14H_GCLK_IO0      ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
+#define PORT_PB14H_GCLK_IO0        (1u << 14)
+#define PIN_PB22H_GCLK_IO0                54  /**< \brief GCLK signal: IO0 on PB22 mux H */
+#define MUX_PB22H_GCLK_IO0                 7
+#define PINMUX_PB22H_GCLK_IO0      ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
+#define PORT_PB22H_GCLK_IO0        (1u << 22)
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PB15H_GCLK_IO1                47  /**< \brief GCLK signal: IO1 on PB15 mux H */
+#define MUX_PB15H_GCLK_IO1                 7
+#define PINMUX_PB15H_GCLK_IO1      ((PIN_PB15H_GCLK_IO1 << 16) | MUX_PB15H_GCLK_IO1)
+#define PORT_PB15H_GCLK_IO1        (1u << 15)
+#define PIN_PB23H_GCLK_IO1                55  /**< \brief GCLK signal: IO1 on PB23 mux H */
+#define MUX_PB23H_GCLK_IO1                 7
+#define PINMUX_PB23H_GCLK_IO1      ((PIN_PB23H_GCLK_IO1 << 16) | MUX_PB23H_GCLK_IO1)
+#define PORT_PB23H_GCLK_IO1        (1u << 23)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PB16H_GCLK_IO2                48  /**< \brief GCLK signal: IO2 on PB16 mux H */
+#define MUX_PB16H_GCLK_IO2                 7
+#define PINMUX_PB16H_GCLK_IO2      ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
+#define PORT_PB16H_GCLK_IO2        (1u << 16)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PB17H_GCLK_IO3                49  /**< \brief GCLK signal: IO3 on PB17 mux H */
+#define MUX_PB17H_GCLK_IO3                 7
+#define PINMUX_PB17H_GCLK_IO3      ((PIN_PB17H_GCLK_IO3 << 16) | MUX_PB17H_GCLK_IO3)
+#define PORT_PB17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA20H_GCLK_IO4                20  /**< \brief GCLK signal: IO4 on PA20 mux H */
+#define MUX_PA20H_GCLK_IO4                 7
+#define PINMUX_PA20H_GCLK_IO4      ((PIN_PA20H_GCLK_IO4 << 16) | MUX_PA20H_GCLK_IO4)
+#define PORT_PA20H_GCLK_IO4        (1u << 20)
+#define PIN_PB10H_GCLK_IO4                42  /**< \brief GCLK signal: IO4 on PB10 mux H */
+#define MUX_PB10H_GCLK_IO4                 7
+#define PINMUX_PB10H_GCLK_IO4      ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
+#define PORT_PB10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA21H_GCLK_IO5                21  /**< \brief GCLK signal: IO5 on PA21 mux H */
+#define MUX_PA21H_GCLK_IO5                 7
+#define PINMUX_PA21H_GCLK_IO5      ((PIN_PA21H_GCLK_IO5 << 16) | MUX_PA21H_GCLK_IO5)
+#define PORT_PA21H_GCLK_IO5        (1u << 21)
+#define PIN_PB11H_GCLK_IO5                43  /**< \brief GCLK signal: IO5 on PB11 mux H */
+#define MUX_PB11H_GCLK_IO5                 7
+#define PINMUX_PB11H_GCLK_IO5      ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
+#define PORT_PB11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PB12H_GCLK_IO6                44  /**< \brief GCLK signal: IO6 on PB12 mux H */
+#define MUX_PB12H_GCLK_IO6                 7
+#define PINMUX_PB12H_GCLK_IO6      ((PIN_PB12H_GCLK_IO6 << 16) | MUX_PB12H_GCLK_IO6)
+#define PORT_PB12H_GCLK_IO6        (1u << 12)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+#define PIN_PB13H_GCLK_IO7                45  /**< \brief GCLK signal: IO7 on PB13 mux H */
+#define MUX_PB13H_GCLK_IO7                 7
+#define PINMUX_PB13H_GCLK_IO7      ((PIN_PB13H_GCLK_IO7 << 16) | MUX_PB13H_GCLK_IO7)
+#define PORT_PB13H_GCLK_IO7        (1u << 13)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PB00A_EIC_EXTINT0             32  /**< \brief EIC signal: EXTINT0 on PB00 mux A */
+#define MUX_PB00A_EIC_EXTINT0              0
+#define PINMUX_PB00A_EIC_EXTINT0   ((PIN_PB00A_EIC_EXTINT0 << 16) | MUX_PB00A_EIC_EXTINT0)
+#define PORT_PB00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PB16A_EIC_EXTINT0             48  /**< \brief EIC signal: EXTINT0 on PB16 mux A */
+#define MUX_PB16A_EIC_EXTINT0              0
+#define PINMUX_PB16A_EIC_EXTINT0   ((PIN_PB16A_EIC_EXTINT0 << 16) | MUX_PB16A_EIC_EXTINT0)
+#define PORT_PB16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PB01A_EIC_EXTINT1             33  /**< \brief EIC signal: EXTINT1 on PB01 mux A */
+#define MUX_PB01A_EIC_EXTINT1              0
+#define PINMUX_PB01A_EIC_EXTINT1   ((PIN_PB01A_EIC_EXTINT1 << 16) | MUX_PB01A_EIC_EXTINT1)
+#define PORT_PB01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PB17A_EIC_EXTINT1             49  /**< \brief EIC signal: EXTINT1 on PB17 mux A */
+#define MUX_PB17A_EIC_EXTINT1              0
+#define PINMUX_PB17A_EIC_EXTINT1   ((PIN_PB17A_EIC_EXTINT1 << 16) | MUX_PB17A_EIC_EXTINT1)
+#define PORT_PB17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PB02A_EIC_EXTINT2             34  /**< \brief EIC signal: EXTINT2 on PB02 mux A */
+#define MUX_PB02A_EIC_EXTINT2              0
+#define PINMUX_PB02A_EIC_EXTINT2   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
+#define PORT_PB02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PB03A_EIC_EXTINT3             35  /**< \brief EIC signal: EXTINT3 on PB03 mux A */
+#define MUX_PB03A_EIC_EXTINT3              0
+#define PINMUX_PB03A_EIC_EXTINT3   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
+#define PORT_PB03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA20A_EIC_EXTINT4             20  /**< \brief EIC signal: EXTINT4 on PA20 mux A */
+#define MUX_PA20A_EIC_EXTINT4              0
+#define PINMUX_PA20A_EIC_EXTINT4   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
+#define PORT_PA20A_EIC_EXTINT4     (1u << 20)
+#define PIN_PB04A_EIC_EXTINT4             36  /**< \brief EIC signal: EXTINT4 on PB04 mux A */
+#define MUX_PB04A_EIC_EXTINT4              0
+#define PINMUX_PB04A_EIC_EXTINT4   ((PIN_PB04A_EIC_EXTINT4 << 16) | MUX_PB04A_EIC_EXTINT4)
+#define PORT_PB04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA21A_EIC_EXTINT5             21  /**< \brief EIC signal: EXTINT5 on PA21 mux A */
+#define MUX_PA21A_EIC_EXTINT5              0
+#define PINMUX_PA21A_EIC_EXTINT5   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
+#define PORT_PA21A_EIC_EXTINT5     (1u << 21)
+#define PIN_PB05A_EIC_EXTINT5             37  /**< \brief EIC signal: EXTINT5 on PB05 mux A */
+#define MUX_PB05A_EIC_EXTINT5              0
+#define PINMUX_PB05A_EIC_EXTINT5   ((PIN_PB05A_EIC_EXTINT5 << 16) | MUX_PB05A_EIC_EXTINT5)
+#define PORT_PB05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PB06A_EIC_EXTINT6             38  /**< \brief EIC signal: EXTINT6 on PB06 mux A */
+#define MUX_PB06A_EIC_EXTINT6              0
+#define PINMUX_PB06A_EIC_EXTINT6   ((PIN_PB06A_EIC_EXTINT6 << 16) | MUX_PB06A_EIC_EXTINT6)
+#define PORT_PB06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PB22A_EIC_EXTINT6             54  /**< \brief EIC signal: EXTINT6 on PB22 mux A */
+#define MUX_PB22A_EIC_EXTINT6              0
+#define PINMUX_PB22A_EIC_EXTINT6   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
+#define PORT_PB22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PB07A_EIC_EXTINT7             39  /**< \brief EIC signal: EXTINT7 on PB07 mux A */
+#define MUX_PB07A_EIC_EXTINT7              0
+#define PINMUX_PB07A_EIC_EXTINT7   ((PIN_PB07A_EIC_EXTINT7 << 16) | MUX_PB07A_EIC_EXTINT7)
+#define PORT_PB07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PB23A_EIC_EXTINT7             55  /**< \brief EIC signal: EXTINT7 on PB23 mux A */
+#define MUX_PB23A_EIC_EXTINT7              0
+#define PINMUX_PB23A_EIC_EXTINT7   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
+#define PORT_PB23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PB08A_EIC_EXTINT8             40  /**< \brief EIC signal: EXTINT8 on PB08 mux A */
+#define MUX_PB08A_EIC_EXTINT8              0
+#define PINMUX_PB08A_EIC_EXTINT8   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
+#define PORT_PB08A_EIC_EXTINT8     (1u <<  8)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PB09A_EIC_EXTINT9             41  /**< \brief EIC signal: EXTINT9 on PB09 mux A */
+#define MUX_PB09A_EIC_EXTINT9              0
+#define PINMUX_PB09A_EIC_EXTINT9   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
+#define PORT_PB09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PB10A_EIC_EXTINT10            42  /**< \brief EIC signal: EXTINT10 on PB10 mux A */
+#define MUX_PB10A_EIC_EXTINT10             0
+#define PINMUX_PB10A_EIC_EXTINT10  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
+#define PORT_PB10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PB11A_EIC_EXTINT11            43  /**< \brief EIC signal: EXTINT11 on PB11 mux A */
+#define MUX_PB11A_EIC_EXTINT11             0
+#define PINMUX_PB11A_EIC_EXTINT11  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
+#define PORT_PB11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA12A_EIC_EXTINT12            12  /**< \brief EIC signal: EXTINT12 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT12             0
+#define PINMUX_PA12A_EIC_EXTINT12  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
+#define PORT_PA12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PB12A_EIC_EXTINT12            44  /**< \brief EIC signal: EXTINT12 on PB12 mux A */
+#define MUX_PB12A_EIC_EXTINT12             0
+#define PINMUX_PB12A_EIC_EXTINT12  ((PIN_PB12A_EIC_EXTINT12 << 16) | MUX_PB12A_EIC_EXTINT12)
+#define PORT_PB12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA13A_EIC_EXTINT13            13  /**< \brief EIC signal: EXTINT13 on PA13 mux A */
+#define MUX_PA13A_EIC_EXTINT13             0
+#define PINMUX_PA13A_EIC_EXTINT13  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
+#define PORT_PA13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PB13A_EIC_EXTINT13            45  /**< \brief EIC signal: EXTINT13 on PB13 mux A */
+#define MUX_PB13A_EIC_EXTINT13             0
+#define PINMUX_PB13A_EIC_EXTINT13  ((PIN_PB13A_EIC_EXTINT13 << 16) | MUX_PB13A_EIC_EXTINT13)
+#define PORT_PB13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PB14A_EIC_EXTINT14            46  /**< \brief EIC signal: EXTINT14 on PB14 mux A */
+#define MUX_PB14A_EIC_EXTINT14             0
+#define PINMUX_PB14A_EIC_EXTINT14  ((PIN_PB14A_EIC_EXTINT14 << 16) | MUX_PB14A_EIC_EXTINT14)
+#define PORT_PB14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PB30A_EIC_EXTINT14            62  /**< \brief EIC signal: EXTINT14 on PB30 mux A */
+#define MUX_PB30A_EIC_EXTINT14             0
+#define PINMUX_PB30A_EIC_EXTINT14  ((PIN_PB30A_EIC_EXTINT14 << 16) | MUX_PB30A_EIC_EXTINT14)
+#define PORT_PB30A_EIC_EXTINT14    (1u << 30)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PB15A_EIC_EXTINT15            47  /**< \brief EIC signal: EXTINT15 on PB15 mux A */
+#define MUX_PB15A_EIC_EXTINT15             0
+#define PINMUX_PB15A_EIC_EXTINT15  ((PIN_PB15A_EIC_EXTINT15 << 16) | MUX_PB15A_EIC_EXTINT15)
+#define PORT_PB15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PB31A_EIC_EXTINT15            63  /**< \brief EIC signal: EXTINT15 on PB31 mux A */
+#define MUX_PB31A_EIC_EXTINT15             0
+#define PINMUX_PB31A_EIC_EXTINT15  ((PIN_PB31A_EIC_EXTINT15 << 16) | MUX_PB31A_EIC_EXTINT15)
+#define PORT_PB31A_EIC_EXTINT15    (1u << 31)
+#define PIN_PA12A_EIC_EXTINT17            12  /**< \brief EIC signal: EXTINT17 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT17             0
+#define PINMUX_PA12A_EIC_EXTINT17  ((PIN_PA12A_EIC_EXTINT17 << 16) | MUX_PA12A_EIC_EXTINT17)
+#define PORT_PA12A_EIC_EXTINT17    (1u << 12)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA13A_SERCOM0_PAD0            13  /**< \brief SERCOM0 signal: PAD0 on PA13 mux A */
+#define MUX_PA13A_SERCOM0_PAD0             0
+#define PINMUX_PA13A_SERCOM0_PAD0  ((PIN_PA13A_SERCOM0_PAD0 << 16) | MUX_PA13A_SERCOM0_PAD0)
+#define PORT_PA13A_SERCOM0_PAD0    (1u << 13)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA12C_SERCOM2_PAD0            12  /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */
+#define MUX_PA12C_SERCOM2_PAD0             2
+#define PINMUX_PA12C_SERCOM2_PAD0  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
+#define PORT_PA12C_SERCOM2_PAD0    (1u << 12)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA13C_SERCOM2_PAD1            13  /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */
+#define MUX_PA13C_SERCOM2_PAD1             2
+#define PINMUX_PA13C_SERCOM2_PAD1  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
+#define PORT_PA13C_SERCOM2_PAD1    (1u << 13)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA20D_SERCOM3_PAD2            20  /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */
+#define MUX_PA20D_SERCOM3_PAD2             3
+#define PINMUX_PA20D_SERCOM3_PAD2  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
+#define PORT_PA20D_SERCOM3_PAD2    (1u << 20)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA21D_SERCOM3_PAD3            21  /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */
+#define MUX_PA21D_SERCOM3_PAD3             3
+#define PINMUX_PA21D_SERCOM3_PAD3  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
+#define PORT_PA21D_SERCOM3_PAD3    (1u << 21)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for SERCOM4 peripheral ========== */
+#define PIN_PA12D_SERCOM4_PAD0            12  /**< \brief SERCOM4 signal: PAD0 on PA12 mux D */
+#define MUX_PA12D_SERCOM4_PAD0             3
+#define PINMUX_PA12D_SERCOM4_PAD0  ((PIN_PA12D_SERCOM4_PAD0 << 16) | MUX_PA12D_SERCOM4_PAD0)
+#define PORT_PA12D_SERCOM4_PAD0    (1u << 12)
+#define PIN_PB08D_SERCOM4_PAD0            40  /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */
+#define MUX_PB08D_SERCOM4_PAD0             3
+#define PINMUX_PB08D_SERCOM4_PAD0  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
+#define PORT_PB08D_SERCOM4_PAD0    (1u <<  8)
+#define PIN_PB12C_SERCOM4_PAD0            44  /**< \brief SERCOM4 signal: PAD0 on PB12 mux C */
+#define MUX_PB12C_SERCOM4_PAD0             2
+#define PINMUX_PB12C_SERCOM4_PAD0  ((PIN_PB12C_SERCOM4_PAD0 << 16) | MUX_PB12C_SERCOM4_PAD0)
+#define PORT_PB12C_SERCOM4_PAD0    (1u << 12)
+#define PIN_PA13D_SERCOM4_PAD1            13  /**< \brief SERCOM4 signal: PAD1 on PA13 mux D */
+#define MUX_PA13D_SERCOM4_PAD1             3
+#define PINMUX_PA13D_SERCOM4_PAD1  ((PIN_PA13D_SERCOM4_PAD1 << 16) | MUX_PA13D_SERCOM4_PAD1)
+#define PORT_PA13D_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB09D_SERCOM4_PAD1            41  /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */
+#define MUX_PB09D_SERCOM4_PAD1             3
+#define PINMUX_PB09D_SERCOM4_PAD1  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
+#define PORT_PB09D_SERCOM4_PAD1    (1u <<  9)
+#define PIN_PB13C_SERCOM4_PAD1            45  /**< \brief SERCOM4 signal: PAD1 on PB13 mux C */
+#define MUX_PB13C_SERCOM4_PAD1             2
+#define PINMUX_PB13C_SERCOM4_PAD1  ((PIN_PB13C_SERCOM4_PAD1 << 16) | MUX_PB13C_SERCOM4_PAD1)
+#define PORT_PB13C_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB31F_SERCOM4_PAD1            63  /**< \brief SERCOM4 signal: PAD1 on PB31 mux F */
+#define MUX_PB31F_SERCOM4_PAD1             5
+#define PINMUX_PB31F_SERCOM4_PAD1  ((PIN_PB31F_SERCOM4_PAD1 << 16) | MUX_PB31F_SERCOM4_PAD1)
+#define PORT_PB31F_SERCOM4_PAD1    (1u << 31)
+#define PIN_PA14D_SERCOM4_PAD2            14  /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */
+#define MUX_PA14D_SERCOM4_PAD2             3
+#define PINMUX_PA14D_SERCOM4_PAD2  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
+#define PORT_PA14D_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB10D_SERCOM4_PAD2            42  /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
+#define MUX_PB10D_SERCOM4_PAD2             3
+#define PINMUX_PB10D_SERCOM4_PAD2  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
+#define PORT_PB10D_SERCOM4_PAD2    (1u << 10)
+#define PIN_PB14C_SERCOM4_PAD2            46  /**< \brief SERCOM4 signal: PAD2 on PB14 mux C */
+#define MUX_PB14C_SERCOM4_PAD2             2
+#define PINMUX_PB14C_SERCOM4_PAD2  ((PIN_PB14C_SERCOM4_PAD2 << 16) | MUX_PB14C_SERCOM4_PAD2)
+#define PORT_PB14C_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB30F_SERCOM4_PAD2            62  /**< \brief SERCOM4 signal: PAD2 on PB30 mux F */
+#define MUX_PB30F_SERCOM4_PAD2             5
+#define PINMUX_PB30F_SERCOM4_PAD2  ((PIN_PB30F_SERCOM4_PAD2 << 16) | MUX_PB30F_SERCOM4_PAD2)
+#define PORT_PB30F_SERCOM4_PAD2    (1u << 30)
+#define PIN_PA15D_SERCOM4_PAD3            15  /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */
+#define MUX_PA15D_SERCOM4_PAD3             3
+#define PINMUX_PA15D_SERCOM4_PAD3  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
+#define PORT_PA15D_SERCOM4_PAD3    (1u << 15)
+#define PIN_PB11D_SERCOM4_PAD3            43  /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */
+#define MUX_PB11D_SERCOM4_PAD3             3
+#define PINMUX_PB11D_SERCOM4_PAD3  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
+#define PORT_PB11D_SERCOM4_PAD3    (1u << 11)
+#define PIN_PB15C_SERCOM4_PAD3            47  /**< \brief SERCOM4 signal: PAD3 on PB15 mux C */
+#define MUX_PB15C_SERCOM4_PAD3             2
+#define PINMUX_PB15C_SERCOM4_PAD3  ((PIN_PB15C_SERCOM4_PAD3 << 16) | MUX_PB15C_SERCOM4_PAD3)
+#define PORT_PB15C_SERCOM4_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM5 peripheral ========== */
+#define PIN_PB16C_SERCOM5_PAD0            48  /**< \brief SERCOM5 signal: PAD0 on PB16 mux C */
+#define MUX_PB16C_SERCOM5_PAD0             2
+#define PINMUX_PB16C_SERCOM5_PAD0  ((PIN_PB16C_SERCOM5_PAD0 << 16) | MUX_PB16C_SERCOM5_PAD0)
+#define PORT_PB16C_SERCOM5_PAD0    (1u << 16)
+#define PIN_PA22D_SERCOM5_PAD0            22  /**< \brief SERCOM5 signal: PAD0 on PA22 mux D */
+#define MUX_PA22D_SERCOM5_PAD0             3
+#define PINMUX_PA22D_SERCOM5_PAD0  ((PIN_PA22D_SERCOM5_PAD0 << 16) | MUX_PA22D_SERCOM5_PAD0)
+#define PORT_PA22D_SERCOM5_PAD0    (1u << 22)
+#define PIN_PB02D_SERCOM5_PAD0            34  /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */
+#define MUX_PB02D_SERCOM5_PAD0             3
+#define PINMUX_PB02D_SERCOM5_PAD0  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
+#define PORT_PB02D_SERCOM5_PAD0    (1u <<  2)
+#define PIN_PB30D_SERCOM5_PAD0            62  /**< \brief SERCOM5 signal: PAD0 on PB30 mux D */
+#define MUX_PB30D_SERCOM5_PAD0             3
+#define PINMUX_PB30D_SERCOM5_PAD0  ((PIN_PB30D_SERCOM5_PAD0 << 16) | MUX_PB30D_SERCOM5_PAD0)
+#define PORT_PB30D_SERCOM5_PAD0    (1u << 30)
+#define PIN_PB17C_SERCOM5_PAD0            49  /**< \brief SERCOM5 signal: PAD0 on PB17 mux C */
+#define MUX_PB17C_SERCOM5_PAD0             2
+#define PINMUX_PB17C_SERCOM5_PAD0  ((PIN_PB17C_SERCOM5_PAD0 << 16) | MUX_PB17C_SERCOM5_PAD0)
+#define PORT_PB17C_SERCOM5_PAD0    (1u << 17)
+#define PIN_PB17C_SERCOM5_PAD1            49  /**< \brief SERCOM5 signal: PAD1 on PB17 mux C */
+#define MUX_PB17C_SERCOM5_PAD1             2
+#define PINMUX_PB17C_SERCOM5_PAD1  ((PIN_PB17C_SERCOM5_PAD1 << 16) | MUX_PB17C_SERCOM5_PAD1)
+#define PORT_PB17C_SERCOM5_PAD1    (1u << 17)
+#define PIN_PA23D_SERCOM5_PAD1            23  /**< \brief SERCOM5 signal: PAD1 on PA23 mux D */
+#define MUX_PA23D_SERCOM5_PAD1             3
+#define PINMUX_PA23D_SERCOM5_PAD1  ((PIN_PA23D_SERCOM5_PAD1 << 16) | MUX_PA23D_SERCOM5_PAD1)
+#define PORT_PA23D_SERCOM5_PAD1    (1u << 23)
+#define PIN_PB03D_SERCOM5_PAD1            35  /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */
+#define MUX_PB03D_SERCOM5_PAD1             3
+#define PINMUX_PB03D_SERCOM5_PAD1  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
+#define PORT_PB03D_SERCOM5_PAD1    (1u <<  3)
+#define PIN_PB31D_SERCOM5_PAD1            63  /**< \brief SERCOM5 signal: PAD1 on PB31 mux D */
+#define MUX_PB31D_SERCOM5_PAD1             3
+#define PINMUX_PB31D_SERCOM5_PAD1  ((PIN_PB31D_SERCOM5_PAD1 << 16) | MUX_PB31D_SERCOM5_PAD1)
+#define PORT_PB31D_SERCOM5_PAD1    (1u << 31)
+#define PIN_PB16C_SERCOM5_PAD1            48  /**< \brief SERCOM5 signal: PAD1 on PB16 mux C */
+#define MUX_PB16C_SERCOM5_PAD1             2
+#define PINMUX_PB16C_SERCOM5_PAD1  ((PIN_PB16C_SERCOM5_PAD1 << 16) | MUX_PB16C_SERCOM5_PAD1)
+#define PORT_PB16C_SERCOM5_PAD1    (1u << 16)
+#define PIN_PA24D_SERCOM5_PAD2            24  /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */
+#define MUX_PA24D_SERCOM5_PAD2             3
+#define PINMUX_PA24D_SERCOM5_PAD2  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
+#define PORT_PA24D_SERCOM5_PAD2    (1u << 24)
+#define PIN_PB00D_SERCOM5_PAD2            32  /**< \brief SERCOM5 signal: PAD2 on PB00 mux D */
+#define MUX_PB00D_SERCOM5_PAD2             3
+#define PINMUX_PB00D_SERCOM5_PAD2  ((PIN_PB00D_SERCOM5_PAD2 << 16) | MUX_PB00D_SERCOM5_PAD2)
+#define PORT_PB00D_SERCOM5_PAD2    (1u <<  0)
+#define PIN_PB22D_SERCOM5_PAD2            54  /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */
+#define MUX_PB22D_SERCOM5_PAD2             3
+#define PINMUX_PB22D_SERCOM5_PAD2  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
+#define PORT_PB22D_SERCOM5_PAD2    (1u << 22)
+#define PIN_PA20C_SERCOM5_PAD2            20  /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */
+#define MUX_PA20C_SERCOM5_PAD2             2
+#define PINMUX_PA20C_SERCOM5_PAD2  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
+#define PORT_PA20C_SERCOM5_PAD2    (1u << 20)
+#define PIN_PA25D_SERCOM5_PAD3            25  /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */
+#define MUX_PA25D_SERCOM5_PAD3             3
+#define PINMUX_PA25D_SERCOM5_PAD3  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
+#define PORT_PA25D_SERCOM5_PAD3    (1u << 25)
+#define PIN_PB01D_SERCOM5_PAD3            33  /**< \brief SERCOM5 signal: PAD3 on PB01 mux D */
+#define MUX_PB01D_SERCOM5_PAD3             3
+#define PINMUX_PB01D_SERCOM5_PAD3  ((PIN_PB01D_SERCOM5_PAD3 << 16) | MUX_PB01D_SERCOM5_PAD3)
+#define PORT_PB01D_SERCOM5_PAD3    (1u <<  1)
+#define PIN_PB23D_SERCOM5_PAD3            55  /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */
+#define MUX_PB23D_SERCOM5_PAD3             3
+#define PINMUX_PB23D_SERCOM5_PAD3  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
+#define PORT_PB23D_SERCOM5_PAD3    (1u << 23)
+#define PIN_PA21C_SERCOM5_PAD3            21  /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */
+#define MUX_PA21C_SERCOM5_PAD3             2
+#define PINMUX_PA21C_SERCOM5_PAD3  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
+#define PORT_PA21C_SERCOM5_PAD3    (1u << 21)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PB30E_TCC0_WO0                62  /**< \brief TCC0 signal: WO0 on PB30 mux E */
+#define MUX_PB30E_TCC0_WO0                 4
+#define PINMUX_PB30E_TCC0_WO0      ((PIN_PB30E_TCC0_WO0 << 16) | MUX_PB30E_TCC0_WO0)
+#define PORT_PB30E_TCC0_WO0        (1u << 30)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PB31E_TCC0_WO1                63  /**< \brief TCC0 signal: WO1 on PB31 mux E */
+#define MUX_PB31E_TCC0_WO1                 4
+#define PINMUX_PB31E_TCC0_WO1      ((PIN_PB31E_TCC0_WO1 << 16) | MUX_PB31E_TCC0_WO1)
+#define PORT_PB31E_TCC0_WO1        (1u << 31)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PB10F_TCC0_WO4                42  /**< \brief TCC0 signal: WO4 on PB10 mux F */
+#define MUX_PB10F_TCC0_WO4                 5
+#define PINMUX_PB10F_TCC0_WO4      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
+#define PORT_PB10F_TCC0_WO4        (1u << 10)
+#define PIN_PB16F_TCC0_WO4                48  /**< \brief TCC0 signal: WO4 on PB16 mux F */
+#define MUX_PB16F_TCC0_WO4                 5
+#define PINMUX_PB16F_TCC0_WO4      ((PIN_PB16F_TCC0_WO4 << 16) | MUX_PB16F_TCC0_WO4)
+#define PORT_PB16F_TCC0_WO4        (1u << 16)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PB11F_TCC0_WO5                43  /**< \brief TCC0 signal: WO5 on PB11 mux F */
+#define MUX_PB11F_TCC0_WO5                 5
+#define PINMUX_PB11F_TCC0_WO5      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
+#define PORT_PB11F_TCC0_WO5        (1u << 11)
+#define PIN_PB17F_TCC0_WO5                49  /**< \brief TCC0 signal: WO5 on PB17 mux F */
+#define MUX_PB17F_TCC0_WO5                 5
+#define PINMUX_PB17F_TCC0_WO5      ((PIN_PB17F_TCC0_WO5 << 16) | MUX_PB17F_TCC0_WO5)
+#define PORT_PB17F_TCC0_WO5        (1u << 17)
+#define PIN_PA12F_TCC0_WO6                12  /**< \brief TCC0 signal: WO6 on PA12 mux F */
+#define MUX_PA12F_TCC0_WO6                 5
+#define PINMUX_PA12F_TCC0_WO6      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
+#define PORT_PA12F_TCC0_WO6        (1u << 12)
+#define PIN_PA20F_TCC0_WO6                20  /**< \brief TCC0 signal: WO6 on PA20 mux F */
+#define MUX_PA20F_TCC0_WO6                 5
+#define PINMUX_PA20F_TCC0_WO6      ((PIN_PA20F_TCC0_WO6 << 16) | MUX_PA20F_TCC0_WO6)
+#define PORT_PA20F_TCC0_WO6        (1u << 20)
+#define PIN_PB12F_TCC0_WO6                44  /**< \brief TCC0 signal: WO6 on PB12 mux F */
+#define MUX_PB12F_TCC0_WO6                 5
+#define PINMUX_PB12F_TCC0_WO6      ((PIN_PB12F_TCC0_WO6 << 16) | MUX_PB12F_TCC0_WO6)
+#define PORT_PB12F_TCC0_WO6        (1u << 12)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA13F_TCC0_WO7                13  /**< \brief TCC0 signal: WO7 on PA13 mux F */
+#define MUX_PA13F_TCC0_WO7                 5
+#define PINMUX_PA13F_TCC0_WO7      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
+#define PORT_PA13F_TCC0_WO7        (1u << 13)
+#define PIN_PA21F_TCC0_WO7                21  /**< \brief TCC0 signal: WO7 on PA21 mux F */
+#define MUX_PA21F_TCC0_WO7                 5
+#define PINMUX_PA21F_TCC0_WO7      ((PIN_PA21F_TCC0_WO7 << 16) | MUX_PA21F_TCC0_WO7)
+#define PORT_PA21F_TCC0_WO7        (1u << 21)
+#define PIN_PB13F_TCC0_WO7                45  /**< \brief TCC0 signal: WO7 on PB13 mux F */
+#define MUX_PB13F_TCC0_WO7                 5
+#define PINMUX_PB13F_TCC0_WO7      ((PIN_PB13F_TCC0_WO7 << 16) | MUX_PB13F_TCC0_WO7)
+#define PORT_PB13F_TCC0_WO7        (1u << 13)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PB30F_TCC1_WO2                62  /**< \brief TCC1 signal: WO2 on PB30 mux F */
+#define MUX_PB30F_TCC1_WO2                 5
+#define PINMUX_PB30F_TCC1_WO2      ((PIN_PB30F_TCC1_WO2 << 16) | MUX_PB30F_TCC1_WO2)
+#define PORT_PB30F_TCC1_WO2        (1u << 30)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+#define PIN_PB31F_TCC1_WO3                63  /**< \brief TCC1 signal: WO3 on PB31 mux F */
+#define MUX_PB31F_TCC1_WO3                 5
+#define PINMUX_PB31F_TCC1_WO3      ((PIN_PB31F_TCC1_WO3 << 16) | MUX_PB31F_TCC1_WO3)
+#define PORT_PB31F_TCC1_WO3        (1u << 31)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA12E_TCC2_WO0                12  /**< \brief TCC2 signal: WO0 on PA12 mux E */
+#define MUX_PA12E_TCC2_WO0                 4
+#define PINMUX_PA12E_TCC2_WO0      ((PIN_PA12E_TCC2_WO0 << 16) | MUX_PA12E_TCC2_WO0)
+#define PORT_PA12E_TCC2_WO0        (1u << 12)
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA13E_TCC2_WO1                13  /**< \brief TCC2 signal: WO1 on PA13 mux E */
+#define MUX_PA13E_TCC2_WO1                 4
+#define PINMUX_PA13E_TCC2_WO1      ((PIN_PA13E_TCC2_WO1 << 16) | MUX_PA13E_TCC2_WO1)
+#define PORT_PA13E_TCC2_WO1        (1u << 13)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PB08E_TC4_WO0                 40  /**< \brief TC4 signal: WO0 on PB08 mux E */
+#define MUX_PB08E_TC4_WO0                  4
+#define PINMUX_PB08E_TC4_WO0       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
+#define PORT_PB08E_TC4_WO0         (1u <<  8)
+#define PIN_PB12E_TC4_WO0                 44  /**< \brief TC4 signal: WO0 on PB12 mux E */
+#define MUX_PB12E_TC4_WO0                  4
+#define PINMUX_PB12E_TC4_WO0       ((PIN_PB12E_TC4_WO0 << 16) | MUX_PB12E_TC4_WO0)
+#define PORT_PB12E_TC4_WO0         (1u << 12)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+#define PIN_PB09E_TC4_WO1                 41  /**< \brief TC4 signal: WO1 on PB09 mux E */
+#define MUX_PB09E_TC4_WO1                  4
+#define PINMUX_PB09E_TC4_WO1       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
+#define PORT_PB09E_TC4_WO1         (1u <<  9)
+#define PIN_PB13E_TC4_WO1                 45  /**< \brief TC4 signal: WO1 on PB13 mux E */
+#define MUX_PB13E_TC4_WO1                  4
+#define PINMUX_PB13E_TC4_WO1       ((PIN_PB13E_TC4_WO1 << 16) | MUX_PB13E_TC4_WO1)
+#define PORT_PB13E_TC4_WO1         (1u << 13)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PB10E_TC5_WO0                 42  /**< \brief TC5 signal: WO0 on PB10 mux E */
+#define MUX_PB10E_TC5_WO0                  4
+#define PINMUX_PB10E_TC5_WO0       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
+#define PORT_PB10E_TC5_WO0         (1u << 10)
+#define PIN_PB14E_TC5_WO0                 46  /**< \brief TC5 signal: WO0 on PB14 mux E */
+#define MUX_PB14E_TC5_WO0                  4
+#define PINMUX_PB14E_TC5_WO0       ((PIN_PB14E_TC5_WO0 << 16) | MUX_PB14E_TC5_WO0)
+#define PORT_PB14E_TC5_WO0         (1u << 14)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+#define PIN_PB11E_TC5_WO1                 43  /**< \brief TC5 signal: WO1 on PB11 mux E */
+#define MUX_PB11E_TC5_WO1                  4
+#define PINMUX_PB11E_TC5_WO1       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
+#define PORT_PB11E_TC5_WO1         (1u << 11)
+#define PIN_PB15E_TC5_WO1                 47  /**< \brief TC5 signal: WO1 on PB15 mux E */
+#define MUX_PB15E_TC5_WO1                  4
+#define PINMUX_PB15E_TC5_WO1       ((PIN_PB15E_TC5_WO1 << 16) | MUX_PB15E_TC5_WO1)
+#define PORT_PB15E_TC5_WO1         (1u << 15)
+/* ========== PORT definition for TC6 peripheral ========== */
+#define PIN_PB02E_TC6_WO0                 34  /**< \brief TC6 signal: WO0 on PB02 mux E */
+#define MUX_PB02E_TC6_WO0                  4
+#define PINMUX_PB02E_TC6_WO0       ((PIN_PB02E_TC6_WO0 << 16) | MUX_PB02E_TC6_WO0)
+#define PORT_PB02E_TC6_WO0         (1u <<  2)
+#define PIN_PB16E_TC6_WO0                 48  /**< \brief TC6 signal: WO0 on PB16 mux E */
+#define MUX_PB16E_TC6_WO0                  4
+#define PINMUX_PB16E_TC6_WO0       ((PIN_PB16E_TC6_WO0 << 16) | MUX_PB16E_TC6_WO0)
+#define PORT_PB16E_TC6_WO0         (1u << 16)
+#define PIN_PB03E_TC6_WO1                 35  /**< \brief TC6 signal: WO1 on PB03 mux E */
+#define MUX_PB03E_TC6_WO1                  4
+#define PINMUX_PB03E_TC6_WO1       ((PIN_PB03E_TC6_WO1 << 16) | MUX_PB03E_TC6_WO1)
+#define PORT_PB03E_TC6_WO1         (1u <<  3)
+#define PIN_PB17E_TC6_WO1                 49  /**< \brief TC6 signal: WO1 on PB17 mux E */
+#define MUX_PB17E_TC6_WO1                  4
+#define PINMUX_PB17E_TC6_WO1       ((PIN_PB17E_TC6_WO1 << 16) | MUX_PB17E_TC6_WO1)
+#define PORT_PB17E_TC6_WO1         (1u << 17)
+/* ========== PORT definition for TC7 peripheral ========== */
+#define PIN_PA20E_TC7_WO0                 20  /**< \brief TC7 signal: WO0 on PA20 mux E */
+#define MUX_PA20E_TC7_WO0                  4
+#define PINMUX_PA20E_TC7_WO0       ((PIN_PA20E_TC7_WO0 << 16) | MUX_PA20E_TC7_WO0)
+#define PORT_PA20E_TC7_WO0         (1u << 20)
+#define PIN_PB00E_TC7_WO0                 32  /**< \brief TC7 signal: WO0 on PB00 mux E */
+#define MUX_PB00E_TC7_WO0                  4
+#define PINMUX_PB00E_TC7_WO0       ((PIN_PB00E_TC7_WO0 << 16) | MUX_PB00E_TC7_WO0)
+#define PORT_PB00E_TC7_WO0         (1u <<  0)
+#define PIN_PB22E_TC7_WO0                 54  /**< \brief TC7 signal: WO0 on PB22 mux E */
+#define MUX_PB22E_TC7_WO0                  4
+#define PINMUX_PB22E_TC7_WO0       ((PIN_PB22E_TC7_WO0 << 16) | MUX_PB22E_TC7_WO0)
+#define PORT_PB22E_TC7_WO0         (1u << 22)
+#define PIN_PA21E_TC7_WO1                 21  /**< \brief TC7 signal: WO1 on PA21 mux E */
+#define MUX_PA21E_TC7_WO1                  4
+#define PINMUX_PA21E_TC7_WO1       ((PIN_PA21E_TC7_WO1 << 16) | MUX_PA21E_TC7_WO1)
+#define PORT_PA21E_TC7_WO1         (1u << 21)
+#define PIN_PB01E_TC7_WO1                 33  /**< \brief TC7 signal: WO1 on PB01 mux E */
+#define MUX_PB01E_TC7_WO1                  4
+#define PINMUX_PB01E_TC7_WO1       ((PIN_PB01E_TC7_WO1 << 16) | MUX_PB01E_TC7_WO1)
+#define PORT_PB01E_TC7_WO1         (1u <<  1)
+#define PIN_PB23E_TC7_WO1                 55  /**< \brief TC7 signal: WO1 on PB23 mux E */
+#define MUX_PB23E_TC7_WO1                  4
+#define PINMUX_PB23E_TC7_WO1       ((PIN_PB23E_TC7_WO1 << 16) | MUX_PB23E_TC7_WO1)
+#define PORT_PB23E_TC7_WO1         (1u << 23)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PB08B_ADC_AIN2                40  /**< \brief ADC signal: AIN2 on PB08 mux B */
+#define MUX_PB08B_ADC_AIN2                 1
+#define PINMUX_PB08B_ADC_AIN2      ((PIN_PB08B_ADC_AIN2 << 16) | MUX_PB08B_ADC_AIN2)
+#define PORT_PB08B_ADC_AIN2        (1u <<  8)
+#define PIN_PB09B_ADC_AIN3                41  /**< \brief ADC signal: AIN3 on PB09 mux B */
+#define MUX_PB09B_ADC_AIN3                 1
+#define PINMUX_PB09B_ADC_AIN3      ((PIN_PB09B_ADC_AIN3 << 16) | MUX_PB09B_ADC_AIN3)
+#define PORT_PB09B_ADC_AIN3        (1u <<  9)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PB00B_ADC_AIN8                32  /**< \brief ADC signal: AIN8 on PB00 mux B */
+#define MUX_PB00B_ADC_AIN8                 1
+#define PINMUX_PB00B_ADC_AIN8      ((PIN_PB00B_ADC_AIN8 << 16) | MUX_PB00B_ADC_AIN8)
+#define PORT_PB00B_ADC_AIN8        (1u <<  0)
+#define PIN_PB01B_ADC_AIN9                33  /**< \brief ADC signal: AIN9 on PB01 mux B */
+#define MUX_PB01B_ADC_AIN9                 1
+#define PINMUX_PB01B_ADC_AIN9      ((PIN_PB01B_ADC_AIN9 << 16) | MUX_PB01B_ADC_AIN9)
+#define PORT_PB01B_ADC_AIN9        (1u <<  1)
+#define PIN_PB02B_ADC_AIN10               34  /**< \brief ADC signal: AIN10 on PB02 mux B */
+#define MUX_PB02B_ADC_AIN10                1
+#define PINMUX_PB02B_ADC_AIN10     ((PIN_PB02B_ADC_AIN10 << 16) | MUX_PB02B_ADC_AIN10)
+#define PORT_PB02B_ADC_AIN10       (1u <<  2)
+#define PIN_PB03B_ADC_AIN11               35  /**< \brief ADC signal: AIN11 on PB03 mux B */
+#define MUX_PB03B_ADC_AIN11                1
+#define PINMUX_PB03B_ADC_AIN11     ((PIN_PB03B_ADC_AIN11 << 16) | MUX_PB03B_ADC_AIN11)
+#define PORT_PB03B_ADC_AIN11       (1u <<  3)
+#define PIN_PB04B_ADC_AIN12               36  /**< \brief ADC signal: AIN12 on PB04 mux B */
+#define MUX_PB04B_ADC_AIN12                1
+#define PINMUX_PB04B_ADC_AIN12     ((PIN_PB04B_ADC_AIN12 << 16) | MUX_PB04B_ADC_AIN12)
+#define PORT_PB04B_ADC_AIN12       (1u <<  4)
+#define PIN_PB05B_ADC_AIN13               37  /**< \brief ADC signal: AIN13 on PB05 mux B */
+#define MUX_PB05B_ADC_AIN13                1
+#define PINMUX_PB05B_ADC_AIN13     ((PIN_PB05B_ADC_AIN13 << 16) | MUX_PB05B_ADC_AIN13)
+#define PORT_PB05B_ADC_AIN13       (1u <<  5)
+#define PIN_PB06B_ADC_AIN14               38  /**< \brief ADC signal: AIN14 on PB06 mux B */
+#define MUX_PB06B_ADC_AIN14                1
+#define PINMUX_PB06B_ADC_AIN14     ((PIN_PB06B_ADC_AIN14 << 16) | MUX_PB06B_ADC_AIN14)
+#define PORT_PB06B_ADC_AIN14       (1u <<  6)
+#define PIN_PB07B_ADC_AIN15               39  /**< \brief ADC signal: AIN15 on PB07 mux B */
+#define MUX_PB07B_ADC_AIN15                1
+#define PINMUX_PB07B_ADC_AIN15     ((PIN_PB07B_ADC_AIN15 << 16) | MUX_PB07B_ADC_AIN15)
+#define PORT_PB07B_ADC_AIN15       (1u <<  7)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA12H_AC_CMP0                 12  /**< \brief AC signal: CMP0 on PA12 mux H */
+#define MUX_PA12H_AC_CMP0                  7
+#define PINMUX_PA12H_AC_CMP0       ((PIN_PA12H_AC_CMP0 << 16) | MUX_PA12H_AC_CMP0)
+#define PORT_PA12H_AC_CMP0         (1u << 12)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA13H_AC_CMP1                 13  /**< \brief AC signal: CMP1 on PA13 mux H */
+#define MUX_PA13H_AC_CMP1                  7
+#define PINMUX_PA13H_AC_CMP1       ((PIN_PA13H_AC_CMP1 << 16) | MUX_PA13H_AC_CMP1)
+#define PORT_PA13H_AC_CMP1         (1u << 13)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA21G_I2S_FS0                 21  /**< \brief I2S signal: FS0 on PA21 mux G */
+#define MUX_PA21G_I2S_FS0                  6
+#define PINMUX_PA21G_I2S_FS0       ((PIN_PA21G_I2S_FS0 << 16) | MUX_PA21G_I2S_FS0)
+#define PORT_PA21G_I2S_FS0         (1u << 21)
+#define PIN_PB12G_I2S_FS1                 44  /**< \brief I2S signal: FS1 on PB12 mux G */
+#define MUX_PB12G_I2S_FS1                  6
+#define PINMUX_PB12G_I2S_FS1       ((PIN_PB12G_I2S_FS1 << 16) | MUX_PB12G_I2S_FS1)
+#define PORT_PB12G_I2S_FS1         (1u << 12)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PB17G_I2S_MCK0                49  /**< \brief I2S signal: MCK0 on PB17 mux G */
+#define MUX_PB17G_I2S_MCK0                 6
+#define PINMUX_PB17G_I2S_MCK0      ((PIN_PB17G_I2S_MCK0 << 16) | MUX_PB17G_I2S_MCK0)
+#define PORT_PB17G_I2S_MCK0        (1u << 17)
+#define PIN_PB10G_I2S_MCK1                42  /**< \brief I2S signal: MCK1 on PB10 mux G */
+#define MUX_PB10G_I2S_MCK1                 6
+#define PINMUX_PB10G_I2S_MCK1      ((PIN_PB10G_I2S_MCK1 << 16) | MUX_PB10G_I2S_MCK1)
+#define PORT_PB10G_I2S_MCK1        (1u << 10)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA20G_I2S_SCK0                20  /**< \brief I2S signal: SCK0 on PA20 mux G */
+#define MUX_PA20G_I2S_SCK0                 6
+#define PINMUX_PA20G_I2S_SCK0      ((PIN_PA20G_I2S_SCK0 << 16) | MUX_PA20G_I2S_SCK0)
+#define PORT_PA20G_I2S_SCK0        (1u << 20)
+#define PIN_PB11G_I2S_SCK1                43  /**< \brief I2S signal: SCK1 on PB11 mux G */
+#define MUX_PB11G_I2S_SCK1                 6
+#define PINMUX_PB11G_I2S_SCK1      ((PIN_PB11G_I2S_SCK1 << 16) | MUX_PB11G_I2S_SCK1)
+#define PORT_PB11G_I2S_SCK1        (1u << 11)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+#define PIN_PB16G_I2S_SD1                 48  /**< \brief I2S signal: SD1 on PB16 mux G */
+#define MUX_PB16G_I2S_SD1                  6
+#define PINMUX_PB16G_I2S_SD1       ((PIN_PB16G_I2S_SD1 << 16) | MUX_PB16G_I2S_SD1)
+#define PORT_PB16G_I2S_SD1         (1u << 16)
+
+#endif /* _SAMD21J16A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j17a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j17a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j17a.h	(revision 136)
@@ -0,0 +1,1242 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21J17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21J17A_PIO_
+#define _SAMD21J17A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA12                          12  /**< \brief Pin Number for PA12 */
+#define PORT_PA12                  (1u << 12) /**< \brief PORT Mask  for PA12 */
+#define PIN_PA13                          13  /**< \brief Pin Number for PA13 */
+#define PORT_PA13                  (1u << 13) /**< \brief PORT Mask  for PA13 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA20                          20  /**< \brief Pin Number for PA20 */
+#define PORT_PA20                  (1u << 20) /**< \brief PORT Mask  for PA20 */
+#define PIN_PA21                          21  /**< \brief Pin Number for PA21 */
+#define PORT_PA21                  (1u << 21) /**< \brief PORT Mask  for PA21 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+#define PIN_PB00                          32  /**< \brief Pin Number for PB00 */
+#define PORT_PB00                  (1u <<  0) /**< \brief PORT Mask  for PB00 */
+#define PIN_PB01                          33  /**< \brief Pin Number for PB01 */
+#define PORT_PB01                  (1u <<  1) /**< \brief PORT Mask  for PB01 */
+#define PIN_PB02                          34  /**< \brief Pin Number for PB02 */
+#define PORT_PB02                  (1u <<  2) /**< \brief PORT Mask  for PB02 */
+#define PIN_PB03                          35  /**< \brief Pin Number for PB03 */
+#define PORT_PB03                  (1u <<  3) /**< \brief PORT Mask  for PB03 */
+#define PIN_PB04                          36  /**< \brief Pin Number for PB04 */
+#define PORT_PB04                  (1u <<  4) /**< \brief PORT Mask  for PB04 */
+#define PIN_PB05                          37  /**< \brief Pin Number for PB05 */
+#define PORT_PB05                  (1u <<  5) /**< \brief PORT Mask  for PB05 */
+#define PIN_PB06                          38  /**< \brief Pin Number for PB06 */
+#define PORT_PB06                  (1u <<  6) /**< \brief PORT Mask  for PB06 */
+#define PIN_PB07                          39  /**< \brief Pin Number for PB07 */
+#define PORT_PB07                  (1u <<  7) /**< \brief PORT Mask  for PB07 */
+#define PIN_PB08                          40  /**< \brief Pin Number for PB08 */
+#define PORT_PB08                  (1u <<  8) /**< \brief PORT Mask  for PB08 */
+#define PIN_PB09                          41  /**< \brief Pin Number for PB09 */
+#define PORT_PB09                  (1u <<  9) /**< \brief PORT Mask  for PB09 */
+#define PIN_PB10                          42  /**< \brief Pin Number for PB10 */
+#define PORT_PB10                  (1u << 10) /**< \brief PORT Mask  for PB10 */
+#define PIN_PB11                          43  /**< \brief Pin Number for PB11 */
+#define PORT_PB11                  (1u << 11) /**< \brief PORT Mask  for PB11 */
+#define PIN_PB12                          44  /**< \brief Pin Number for PB12 */
+#define PORT_PB12                  (1u << 12) /**< \brief PORT Mask  for PB12 */
+#define PIN_PB13                          45  /**< \brief Pin Number for PB13 */
+#define PORT_PB13                  (1u << 13) /**< \brief PORT Mask  for PB13 */
+#define PIN_PB14                          46  /**< \brief Pin Number for PB14 */
+#define PORT_PB14                  (1u << 14) /**< \brief PORT Mask  for PB14 */
+#define PIN_PB15                          47  /**< \brief Pin Number for PB15 */
+#define PORT_PB15                  (1u << 15) /**< \brief PORT Mask  for PB15 */
+#define PIN_PB16                          48  /**< \brief Pin Number for PB16 */
+#define PORT_PB16                  (1u << 16) /**< \brief PORT Mask  for PB16 */
+#define PIN_PB17                          49  /**< \brief Pin Number for PB17 */
+#define PORT_PB17                  (1u << 17) /**< \brief PORT Mask  for PB17 */
+#define PIN_PB22                          54  /**< \brief Pin Number for PB22 */
+#define PORT_PB22                  (1u << 22) /**< \brief PORT Mask  for PB22 */
+#define PIN_PB23                          55  /**< \brief Pin Number for PB23 */
+#define PORT_PB23                  (1u << 23) /**< \brief PORT Mask  for PB23 */
+#define PIN_PB30                          62  /**< \brief Pin Number for PB30 */
+#define PORT_PB30                  (1u << 30) /**< \brief PORT Mask  for PB30 */
+#define PIN_PB31                          63  /**< \brief Pin Number for PB31 */
+#define PORT_PB31                  (1u << 31) /**< \brief PORT Mask  for PB31 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PB14H_GCLK_IO0                46  /**< \brief GCLK signal: IO0 on PB14 mux H */
+#define MUX_PB14H_GCLK_IO0                 7
+#define PINMUX_PB14H_GCLK_IO0      ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
+#define PORT_PB14H_GCLK_IO0        (1u << 14)
+#define PIN_PB22H_GCLK_IO0                54  /**< \brief GCLK signal: IO0 on PB22 mux H */
+#define MUX_PB22H_GCLK_IO0                 7
+#define PINMUX_PB22H_GCLK_IO0      ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
+#define PORT_PB22H_GCLK_IO0        (1u << 22)
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PB15H_GCLK_IO1                47  /**< \brief GCLK signal: IO1 on PB15 mux H */
+#define MUX_PB15H_GCLK_IO1                 7
+#define PINMUX_PB15H_GCLK_IO1      ((PIN_PB15H_GCLK_IO1 << 16) | MUX_PB15H_GCLK_IO1)
+#define PORT_PB15H_GCLK_IO1        (1u << 15)
+#define PIN_PB23H_GCLK_IO1                55  /**< \brief GCLK signal: IO1 on PB23 mux H */
+#define MUX_PB23H_GCLK_IO1                 7
+#define PINMUX_PB23H_GCLK_IO1      ((PIN_PB23H_GCLK_IO1 << 16) | MUX_PB23H_GCLK_IO1)
+#define PORT_PB23H_GCLK_IO1        (1u << 23)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PB16H_GCLK_IO2                48  /**< \brief GCLK signal: IO2 on PB16 mux H */
+#define MUX_PB16H_GCLK_IO2                 7
+#define PINMUX_PB16H_GCLK_IO2      ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
+#define PORT_PB16H_GCLK_IO2        (1u << 16)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PB17H_GCLK_IO3                49  /**< \brief GCLK signal: IO3 on PB17 mux H */
+#define MUX_PB17H_GCLK_IO3                 7
+#define PINMUX_PB17H_GCLK_IO3      ((PIN_PB17H_GCLK_IO3 << 16) | MUX_PB17H_GCLK_IO3)
+#define PORT_PB17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA20H_GCLK_IO4                20  /**< \brief GCLK signal: IO4 on PA20 mux H */
+#define MUX_PA20H_GCLK_IO4                 7
+#define PINMUX_PA20H_GCLK_IO4      ((PIN_PA20H_GCLK_IO4 << 16) | MUX_PA20H_GCLK_IO4)
+#define PORT_PA20H_GCLK_IO4        (1u << 20)
+#define PIN_PB10H_GCLK_IO4                42  /**< \brief GCLK signal: IO4 on PB10 mux H */
+#define MUX_PB10H_GCLK_IO4                 7
+#define PINMUX_PB10H_GCLK_IO4      ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
+#define PORT_PB10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA21H_GCLK_IO5                21  /**< \brief GCLK signal: IO5 on PA21 mux H */
+#define MUX_PA21H_GCLK_IO5                 7
+#define PINMUX_PA21H_GCLK_IO5      ((PIN_PA21H_GCLK_IO5 << 16) | MUX_PA21H_GCLK_IO5)
+#define PORT_PA21H_GCLK_IO5        (1u << 21)
+#define PIN_PB11H_GCLK_IO5                43  /**< \brief GCLK signal: IO5 on PB11 mux H */
+#define MUX_PB11H_GCLK_IO5                 7
+#define PINMUX_PB11H_GCLK_IO5      ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
+#define PORT_PB11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PB12H_GCLK_IO6                44  /**< \brief GCLK signal: IO6 on PB12 mux H */
+#define MUX_PB12H_GCLK_IO6                 7
+#define PINMUX_PB12H_GCLK_IO6      ((PIN_PB12H_GCLK_IO6 << 16) | MUX_PB12H_GCLK_IO6)
+#define PORT_PB12H_GCLK_IO6        (1u << 12)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+#define PIN_PB13H_GCLK_IO7                45  /**< \brief GCLK signal: IO7 on PB13 mux H */
+#define MUX_PB13H_GCLK_IO7                 7
+#define PINMUX_PB13H_GCLK_IO7      ((PIN_PB13H_GCLK_IO7 << 16) | MUX_PB13H_GCLK_IO7)
+#define PORT_PB13H_GCLK_IO7        (1u << 13)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PB00A_EIC_EXTINT0             32  /**< \brief EIC signal: EXTINT0 on PB00 mux A */
+#define MUX_PB00A_EIC_EXTINT0              0
+#define PINMUX_PB00A_EIC_EXTINT0   ((PIN_PB00A_EIC_EXTINT0 << 16) | MUX_PB00A_EIC_EXTINT0)
+#define PORT_PB00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PB16A_EIC_EXTINT0             48  /**< \brief EIC signal: EXTINT0 on PB16 mux A */
+#define MUX_PB16A_EIC_EXTINT0              0
+#define PINMUX_PB16A_EIC_EXTINT0   ((PIN_PB16A_EIC_EXTINT0 << 16) | MUX_PB16A_EIC_EXTINT0)
+#define PORT_PB16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PB01A_EIC_EXTINT1             33  /**< \brief EIC signal: EXTINT1 on PB01 mux A */
+#define MUX_PB01A_EIC_EXTINT1              0
+#define PINMUX_PB01A_EIC_EXTINT1   ((PIN_PB01A_EIC_EXTINT1 << 16) | MUX_PB01A_EIC_EXTINT1)
+#define PORT_PB01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PB17A_EIC_EXTINT1             49  /**< \brief EIC signal: EXTINT1 on PB17 mux A */
+#define MUX_PB17A_EIC_EXTINT1              0
+#define PINMUX_PB17A_EIC_EXTINT1   ((PIN_PB17A_EIC_EXTINT1 << 16) | MUX_PB17A_EIC_EXTINT1)
+#define PORT_PB17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PB02A_EIC_EXTINT2             34  /**< \brief EIC signal: EXTINT2 on PB02 mux A */
+#define MUX_PB02A_EIC_EXTINT2              0
+#define PINMUX_PB02A_EIC_EXTINT2   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
+#define PORT_PB02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PB03A_EIC_EXTINT3             35  /**< \brief EIC signal: EXTINT3 on PB03 mux A */
+#define MUX_PB03A_EIC_EXTINT3              0
+#define PINMUX_PB03A_EIC_EXTINT3   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
+#define PORT_PB03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA20A_EIC_EXTINT4             20  /**< \brief EIC signal: EXTINT4 on PA20 mux A */
+#define MUX_PA20A_EIC_EXTINT4              0
+#define PINMUX_PA20A_EIC_EXTINT4   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
+#define PORT_PA20A_EIC_EXTINT4     (1u << 20)
+#define PIN_PB04A_EIC_EXTINT4             36  /**< \brief EIC signal: EXTINT4 on PB04 mux A */
+#define MUX_PB04A_EIC_EXTINT4              0
+#define PINMUX_PB04A_EIC_EXTINT4   ((PIN_PB04A_EIC_EXTINT4 << 16) | MUX_PB04A_EIC_EXTINT4)
+#define PORT_PB04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA21A_EIC_EXTINT5             21  /**< \brief EIC signal: EXTINT5 on PA21 mux A */
+#define MUX_PA21A_EIC_EXTINT5              0
+#define PINMUX_PA21A_EIC_EXTINT5   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
+#define PORT_PA21A_EIC_EXTINT5     (1u << 21)
+#define PIN_PB05A_EIC_EXTINT5             37  /**< \brief EIC signal: EXTINT5 on PB05 mux A */
+#define MUX_PB05A_EIC_EXTINT5              0
+#define PINMUX_PB05A_EIC_EXTINT5   ((PIN_PB05A_EIC_EXTINT5 << 16) | MUX_PB05A_EIC_EXTINT5)
+#define PORT_PB05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PB06A_EIC_EXTINT6             38  /**< \brief EIC signal: EXTINT6 on PB06 mux A */
+#define MUX_PB06A_EIC_EXTINT6              0
+#define PINMUX_PB06A_EIC_EXTINT6   ((PIN_PB06A_EIC_EXTINT6 << 16) | MUX_PB06A_EIC_EXTINT6)
+#define PORT_PB06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PB22A_EIC_EXTINT6             54  /**< \brief EIC signal: EXTINT6 on PB22 mux A */
+#define MUX_PB22A_EIC_EXTINT6              0
+#define PINMUX_PB22A_EIC_EXTINT6   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
+#define PORT_PB22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PB07A_EIC_EXTINT7             39  /**< \brief EIC signal: EXTINT7 on PB07 mux A */
+#define MUX_PB07A_EIC_EXTINT7              0
+#define PINMUX_PB07A_EIC_EXTINT7   ((PIN_PB07A_EIC_EXTINT7 << 16) | MUX_PB07A_EIC_EXTINT7)
+#define PORT_PB07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PB23A_EIC_EXTINT7             55  /**< \brief EIC signal: EXTINT7 on PB23 mux A */
+#define MUX_PB23A_EIC_EXTINT7              0
+#define PINMUX_PB23A_EIC_EXTINT7   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
+#define PORT_PB23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PB08A_EIC_EXTINT8             40  /**< \brief EIC signal: EXTINT8 on PB08 mux A */
+#define MUX_PB08A_EIC_EXTINT8              0
+#define PINMUX_PB08A_EIC_EXTINT8   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
+#define PORT_PB08A_EIC_EXTINT8     (1u <<  8)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PB09A_EIC_EXTINT9             41  /**< \brief EIC signal: EXTINT9 on PB09 mux A */
+#define MUX_PB09A_EIC_EXTINT9              0
+#define PINMUX_PB09A_EIC_EXTINT9   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
+#define PORT_PB09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PB10A_EIC_EXTINT10            42  /**< \brief EIC signal: EXTINT10 on PB10 mux A */
+#define MUX_PB10A_EIC_EXTINT10             0
+#define PINMUX_PB10A_EIC_EXTINT10  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
+#define PORT_PB10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PB11A_EIC_EXTINT11            43  /**< \brief EIC signal: EXTINT11 on PB11 mux A */
+#define MUX_PB11A_EIC_EXTINT11             0
+#define PINMUX_PB11A_EIC_EXTINT11  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
+#define PORT_PB11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA12A_EIC_EXTINT12            12  /**< \brief EIC signal: EXTINT12 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT12             0
+#define PINMUX_PA12A_EIC_EXTINT12  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
+#define PORT_PA12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PB12A_EIC_EXTINT12            44  /**< \brief EIC signal: EXTINT12 on PB12 mux A */
+#define MUX_PB12A_EIC_EXTINT12             0
+#define PINMUX_PB12A_EIC_EXTINT12  ((PIN_PB12A_EIC_EXTINT12 << 16) | MUX_PB12A_EIC_EXTINT12)
+#define PORT_PB12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA13A_EIC_EXTINT13            13  /**< \brief EIC signal: EXTINT13 on PA13 mux A */
+#define MUX_PA13A_EIC_EXTINT13             0
+#define PINMUX_PA13A_EIC_EXTINT13  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
+#define PORT_PA13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PB13A_EIC_EXTINT13            45  /**< \brief EIC signal: EXTINT13 on PB13 mux A */
+#define MUX_PB13A_EIC_EXTINT13             0
+#define PINMUX_PB13A_EIC_EXTINT13  ((PIN_PB13A_EIC_EXTINT13 << 16) | MUX_PB13A_EIC_EXTINT13)
+#define PORT_PB13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PB14A_EIC_EXTINT14            46  /**< \brief EIC signal: EXTINT14 on PB14 mux A */
+#define MUX_PB14A_EIC_EXTINT14             0
+#define PINMUX_PB14A_EIC_EXTINT14  ((PIN_PB14A_EIC_EXTINT14 << 16) | MUX_PB14A_EIC_EXTINT14)
+#define PORT_PB14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PB30A_EIC_EXTINT14            62  /**< \brief EIC signal: EXTINT14 on PB30 mux A */
+#define MUX_PB30A_EIC_EXTINT14             0
+#define PINMUX_PB30A_EIC_EXTINT14  ((PIN_PB30A_EIC_EXTINT14 << 16) | MUX_PB30A_EIC_EXTINT14)
+#define PORT_PB30A_EIC_EXTINT14    (1u << 30)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PB15A_EIC_EXTINT15            47  /**< \brief EIC signal: EXTINT15 on PB15 mux A */
+#define MUX_PB15A_EIC_EXTINT15             0
+#define PINMUX_PB15A_EIC_EXTINT15  ((PIN_PB15A_EIC_EXTINT15 << 16) | MUX_PB15A_EIC_EXTINT15)
+#define PORT_PB15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PB31A_EIC_EXTINT15            63  /**< \brief EIC signal: EXTINT15 on PB31 mux A */
+#define MUX_PB31A_EIC_EXTINT15             0
+#define PINMUX_PB31A_EIC_EXTINT15  ((PIN_PB31A_EIC_EXTINT15 << 16) | MUX_PB31A_EIC_EXTINT15)
+#define PORT_PB31A_EIC_EXTINT15    (1u << 31)
+#define PIN_PA12A_EIC_EXTINT17            12  /**< \brief EIC signal: EXTINT17 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT17             0
+#define PINMUX_PA12A_EIC_EXTINT17  ((PIN_PA12A_EIC_EXTINT17 << 16) | MUX_PA12A_EIC_EXTINT17)
+#define PORT_PA12A_EIC_EXTINT17    (1u << 12)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA13A_SERCOM0_PAD0            13  /**< \brief SERCOM0 signal: PAD0 on PA13 mux A */
+#define MUX_PA13A_SERCOM0_PAD0             0
+#define PINMUX_PA13A_SERCOM0_PAD0  ((PIN_PA13A_SERCOM0_PAD0 << 16) | MUX_PA13A_SERCOM0_PAD0)
+#define PORT_PA13A_SERCOM0_PAD0    (1u << 13)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA12C_SERCOM2_PAD0            12  /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */
+#define MUX_PA12C_SERCOM2_PAD0             2
+#define PINMUX_PA12C_SERCOM2_PAD0  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
+#define PORT_PA12C_SERCOM2_PAD0    (1u << 12)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA13C_SERCOM2_PAD1            13  /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */
+#define MUX_PA13C_SERCOM2_PAD1             2
+#define PINMUX_PA13C_SERCOM2_PAD1  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
+#define PORT_PA13C_SERCOM2_PAD1    (1u << 13)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA20D_SERCOM3_PAD2            20  /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */
+#define MUX_PA20D_SERCOM3_PAD2             3
+#define PINMUX_PA20D_SERCOM3_PAD2  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
+#define PORT_PA20D_SERCOM3_PAD2    (1u << 20)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA21D_SERCOM3_PAD3            21  /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */
+#define MUX_PA21D_SERCOM3_PAD3             3
+#define PINMUX_PA21D_SERCOM3_PAD3  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
+#define PORT_PA21D_SERCOM3_PAD3    (1u << 21)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for SERCOM4 peripheral ========== */
+#define PIN_PA12D_SERCOM4_PAD0            12  /**< \brief SERCOM4 signal: PAD0 on PA12 mux D */
+#define MUX_PA12D_SERCOM4_PAD0             3
+#define PINMUX_PA12D_SERCOM4_PAD0  ((PIN_PA12D_SERCOM4_PAD0 << 16) | MUX_PA12D_SERCOM4_PAD0)
+#define PORT_PA12D_SERCOM4_PAD0    (1u << 12)
+#define PIN_PB08D_SERCOM4_PAD0            40  /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */
+#define MUX_PB08D_SERCOM4_PAD0             3
+#define PINMUX_PB08D_SERCOM4_PAD0  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
+#define PORT_PB08D_SERCOM4_PAD0    (1u <<  8)
+#define PIN_PB12C_SERCOM4_PAD0            44  /**< \brief SERCOM4 signal: PAD0 on PB12 mux C */
+#define MUX_PB12C_SERCOM4_PAD0             2
+#define PINMUX_PB12C_SERCOM4_PAD0  ((PIN_PB12C_SERCOM4_PAD0 << 16) | MUX_PB12C_SERCOM4_PAD0)
+#define PORT_PB12C_SERCOM4_PAD0    (1u << 12)
+#define PIN_PA13D_SERCOM4_PAD1            13  /**< \brief SERCOM4 signal: PAD1 on PA13 mux D */
+#define MUX_PA13D_SERCOM4_PAD1             3
+#define PINMUX_PA13D_SERCOM4_PAD1  ((PIN_PA13D_SERCOM4_PAD1 << 16) | MUX_PA13D_SERCOM4_PAD1)
+#define PORT_PA13D_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB09D_SERCOM4_PAD1            41  /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */
+#define MUX_PB09D_SERCOM4_PAD1             3
+#define PINMUX_PB09D_SERCOM4_PAD1  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
+#define PORT_PB09D_SERCOM4_PAD1    (1u <<  9)
+#define PIN_PB13C_SERCOM4_PAD1            45  /**< \brief SERCOM4 signal: PAD1 on PB13 mux C */
+#define MUX_PB13C_SERCOM4_PAD1             2
+#define PINMUX_PB13C_SERCOM4_PAD1  ((PIN_PB13C_SERCOM4_PAD1 << 16) | MUX_PB13C_SERCOM4_PAD1)
+#define PORT_PB13C_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB31F_SERCOM4_PAD1            63  /**< \brief SERCOM4 signal: PAD1 on PB31 mux F */
+#define MUX_PB31F_SERCOM4_PAD1             5
+#define PINMUX_PB31F_SERCOM4_PAD1  ((PIN_PB31F_SERCOM4_PAD1 << 16) | MUX_PB31F_SERCOM4_PAD1)
+#define PORT_PB31F_SERCOM4_PAD1    (1u << 31)
+#define PIN_PA14D_SERCOM4_PAD2            14  /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */
+#define MUX_PA14D_SERCOM4_PAD2             3
+#define PINMUX_PA14D_SERCOM4_PAD2  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
+#define PORT_PA14D_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB10D_SERCOM4_PAD2            42  /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
+#define MUX_PB10D_SERCOM4_PAD2             3
+#define PINMUX_PB10D_SERCOM4_PAD2  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
+#define PORT_PB10D_SERCOM4_PAD2    (1u << 10)
+#define PIN_PB14C_SERCOM4_PAD2            46  /**< \brief SERCOM4 signal: PAD2 on PB14 mux C */
+#define MUX_PB14C_SERCOM4_PAD2             2
+#define PINMUX_PB14C_SERCOM4_PAD2  ((PIN_PB14C_SERCOM4_PAD2 << 16) | MUX_PB14C_SERCOM4_PAD2)
+#define PORT_PB14C_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB30F_SERCOM4_PAD2            62  /**< \brief SERCOM4 signal: PAD2 on PB30 mux F */
+#define MUX_PB30F_SERCOM4_PAD2             5
+#define PINMUX_PB30F_SERCOM4_PAD2  ((PIN_PB30F_SERCOM4_PAD2 << 16) | MUX_PB30F_SERCOM4_PAD2)
+#define PORT_PB30F_SERCOM4_PAD2    (1u << 30)
+#define PIN_PA15D_SERCOM4_PAD3            15  /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */
+#define MUX_PA15D_SERCOM4_PAD3             3
+#define PINMUX_PA15D_SERCOM4_PAD3  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
+#define PORT_PA15D_SERCOM4_PAD3    (1u << 15)
+#define PIN_PB11D_SERCOM4_PAD3            43  /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */
+#define MUX_PB11D_SERCOM4_PAD3             3
+#define PINMUX_PB11D_SERCOM4_PAD3  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
+#define PORT_PB11D_SERCOM4_PAD3    (1u << 11)
+#define PIN_PB15C_SERCOM4_PAD3            47  /**< \brief SERCOM4 signal: PAD3 on PB15 mux C */
+#define MUX_PB15C_SERCOM4_PAD3             2
+#define PINMUX_PB15C_SERCOM4_PAD3  ((PIN_PB15C_SERCOM4_PAD3 << 16) | MUX_PB15C_SERCOM4_PAD3)
+#define PORT_PB15C_SERCOM4_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM5 peripheral ========== */
+#define PIN_PB16C_SERCOM5_PAD0            48  /**< \brief SERCOM5 signal: PAD0 on PB16 mux C */
+#define MUX_PB16C_SERCOM5_PAD0             2
+#define PINMUX_PB16C_SERCOM5_PAD0  ((PIN_PB16C_SERCOM5_PAD0 << 16) | MUX_PB16C_SERCOM5_PAD0)
+#define PORT_PB16C_SERCOM5_PAD0    (1u << 16)
+#define PIN_PA22D_SERCOM5_PAD0            22  /**< \brief SERCOM5 signal: PAD0 on PA22 mux D */
+#define MUX_PA22D_SERCOM5_PAD0             3
+#define PINMUX_PA22D_SERCOM5_PAD0  ((PIN_PA22D_SERCOM5_PAD0 << 16) | MUX_PA22D_SERCOM5_PAD0)
+#define PORT_PA22D_SERCOM5_PAD0    (1u << 22)
+#define PIN_PB02D_SERCOM5_PAD0            34  /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */
+#define MUX_PB02D_SERCOM5_PAD0             3
+#define PINMUX_PB02D_SERCOM5_PAD0  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
+#define PORT_PB02D_SERCOM5_PAD0    (1u <<  2)
+#define PIN_PB30D_SERCOM5_PAD0            62  /**< \brief SERCOM5 signal: PAD0 on PB30 mux D */
+#define MUX_PB30D_SERCOM5_PAD0             3
+#define PINMUX_PB30D_SERCOM5_PAD0  ((PIN_PB30D_SERCOM5_PAD0 << 16) | MUX_PB30D_SERCOM5_PAD0)
+#define PORT_PB30D_SERCOM5_PAD0    (1u << 30)
+#define PIN_PB17C_SERCOM5_PAD0            49  /**< \brief SERCOM5 signal: PAD0 on PB17 mux C */
+#define MUX_PB17C_SERCOM5_PAD0             2
+#define PINMUX_PB17C_SERCOM5_PAD0  ((PIN_PB17C_SERCOM5_PAD0 << 16) | MUX_PB17C_SERCOM5_PAD0)
+#define PORT_PB17C_SERCOM5_PAD0    (1u << 17)
+#define PIN_PB17C_SERCOM5_PAD1            49  /**< \brief SERCOM5 signal: PAD1 on PB17 mux C */
+#define MUX_PB17C_SERCOM5_PAD1             2
+#define PINMUX_PB17C_SERCOM5_PAD1  ((PIN_PB17C_SERCOM5_PAD1 << 16) | MUX_PB17C_SERCOM5_PAD1)
+#define PORT_PB17C_SERCOM5_PAD1    (1u << 17)
+#define PIN_PA23D_SERCOM5_PAD1            23  /**< \brief SERCOM5 signal: PAD1 on PA23 mux D */
+#define MUX_PA23D_SERCOM5_PAD1             3
+#define PINMUX_PA23D_SERCOM5_PAD1  ((PIN_PA23D_SERCOM5_PAD1 << 16) | MUX_PA23D_SERCOM5_PAD1)
+#define PORT_PA23D_SERCOM5_PAD1    (1u << 23)
+#define PIN_PB03D_SERCOM5_PAD1            35  /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */
+#define MUX_PB03D_SERCOM5_PAD1             3
+#define PINMUX_PB03D_SERCOM5_PAD1  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
+#define PORT_PB03D_SERCOM5_PAD1    (1u <<  3)
+#define PIN_PB31D_SERCOM5_PAD1            63  /**< \brief SERCOM5 signal: PAD1 on PB31 mux D */
+#define MUX_PB31D_SERCOM5_PAD1             3
+#define PINMUX_PB31D_SERCOM5_PAD1  ((PIN_PB31D_SERCOM5_PAD1 << 16) | MUX_PB31D_SERCOM5_PAD1)
+#define PORT_PB31D_SERCOM5_PAD1    (1u << 31)
+#define PIN_PB16C_SERCOM5_PAD1            48  /**< \brief SERCOM5 signal: PAD1 on PB16 mux C */
+#define MUX_PB16C_SERCOM5_PAD1             2
+#define PINMUX_PB16C_SERCOM5_PAD1  ((PIN_PB16C_SERCOM5_PAD1 << 16) | MUX_PB16C_SERCOM5_PAD1)
+#define PORT_PB16C_SERCOM5_PAD1    (1u << 16)
+#define PIN_PA24D_SERCOM5_PAD2            24  /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */
+#define MUX_PA24D_SERCOM5_PAD2             3
+#define PINMUX_PA24D_SERCOM5_PAD2  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
+#define PORT_PA24D_SERCOM5_PAD2    (1u << 24)
+#define PIN_PB00D_SERCOM5_PAD2            32  /**< \brief SERCOM5 signal: PAD2 on PB00 mux D */
+#define MUX_PB00D_SERCOM5_PAD2             3
+#define PINMUX_PB00D_SERCOM5_PAD2  ((PIN_PB00D_SERCOM5_PAD2 << 16) | MUX_PB00D_SERCOM5_PAD2)
+#define PORT_PB00D_SERCOM5_PAD2    (1u <<  0)
+#define PIN_PB22D_SERCOM5_PAD2            54  /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */
+#define MUX_PB22D_SERCOM5_PAD2             3
+#define PINMUX_PB22D_SERCOM5_PAD2  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
+#define PORT_PB22D_SERCOM5_PAD2    (1u << 22)
+#define PIN_PA20C_SERCOM5_PAD2            20  /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */
+#define MUX_PA20C_SERCOM5_PAD2             2
+#define PINMUX_PA20C_SERCOM5_PAD2  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
+#define PORT_PA20C_SERCOM5_PAD2    (1u << 20)
+#define PIN_PA25D_SERCOM5_PAD3            25  /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */
+#define MUX_PA25D_SERCOM5_PAD3             3
+#define PINMUX_PA25D_SERCOM5_PAD3  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
+#define PORT_PA25D_SERCOM5_PAD3    (1u << 25)
+#define PIN_PB01D_SERCOM5_PAD3            33  /**< \brief SERCOM5 signal: PAD3 on PB01 mux D */
+#define MUX_PB01D_SERCOM5_PAD3             3
+#define PINMUX_PB01D_SERCOM5_PAD3  ((PIN_PB01D_SERCOM5_PAD3 << 16) | MUX_PB01D_SERCOM5_PAD3)
+#define PORT_PB01D_SERCOM5_PAD3    (1u <<  1)
+#define PIN_PB23D_SERCOM5_PAD3            55  /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */
+#define MUX_PB23D_SERCOM5_PAD3             3
+#define PINMUX_PB23D_SERCOM5_PAD3  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
+#define PORT_PB23D_SERCOM5_PAD3    (1u << 23)
+#define PIN_PA21C_SERCOM5_PAD3            21  /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */
+#define MUX_PA21C_SERCOM5_PAD3             2
+#define PINMUX_PA21C_SERCOM5_PAD3  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
+#define PORT_PA21C_SERCOM5_PAD3    (1u << 21)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PB30E_TCC0_WO0                62  /**< \brief TCC0 signal: WO0 on PB30 mux E */
+#define MUX_PB30E_TCC0_WO0                 4
+#define PINMUX_PB30E_TCC0_WO0      ((PIN_PB30E_TCC0_WO0 << 16) | MUX_PB30E_TCC0_WO0)
+#define PORT_PB30E_TCC0_WO0        (1u << 30)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PB31E_TCC0_WO1                63  /**< \brief TCC0 signal: WO1 on PB31 mux E */
+#define MUX_PB31E_TCC0_WO1                 4
+#define PINMUX_PB31E_TCC0_WO1      ((PIN_PB31E_TCC0_WO1 << 16) | MUX_PB31E_TCC0_WO1)
+#define PORT_PB31E_TCC0_WO1        (1u << 31)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PB10F_TCC0_WO4                42  /**< \brief TCC0 signal: WO4 on PB10 mux F */
+#define MUX_PB10F_TCC0_WO4                 5
+#define PINMUX_PB10F_TCC0_WO4      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
+#define PORT_PB10F_TCC0_WO4        (1u << 10)
+#define PIN_PB16F_TCC0_WO4                48  /**< \brief TCC0 signal: WO4 on PB16 mux F */
+#define MUX_PB16F_TCC0_WO4                 5
+#define PINMUX_PB16F_TCC0_WO4      ((PIN_PB16F_TCC0_WO4 << 16) | MUX_PB16F_TCC0_WO4)
+#define PORT_PB16F_TCC0_WO4        (1u << 16)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PB11F_TCC0_WO5                43  /**< \brief TCC0 signal: WO5 on PB11 mux F */
+#define MUX_PB11F_TCC0_WO5                 5
+#define PINMUX_PB11F_TCC0_WO5      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
+#define PORT_PB11F_TCC0_WO5        (1u << 11)
+#define PIN_PB17F_TCC0_WO5                49  /**< \brief TCC0 signal: WO5 on PB17 mux F */
+#define MUX_PB17F_TCC0_WO5                 5
+#define PINMUX_PB17F_TCC0_WO5      ((PIN_PB17F_TCC0_WO5 << 16) | MUX_PB17F_TCC0_WO5)
+#define PORT_PB17F_TCC0_WO5        (1u << 17)
+#define PIN_PA12F_TCC0_WO6                12  /**< \brief TCC0 signal: WO6 on PA12 mux F */
+#define MUX_PA12F_TCC0_WO6                 5
+#define PINMUX_PA12F_TCC0_WO6      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
+#define PORT_PA12F_TCC0_WO6        (1u << 12)
+#define PIN_PA20F_TCC0_WO6                20  /**< \brief TCC0 signal: WO6 on PA20 mux F */
+#define MUX_PA20F_TCC0_WO6                 5
+#define PINMUX_PA20F_TCC0_WO6      ((PIN_PA20F_TCC0_WO6 << 16) | MUX_PA20F_TCC0_WO6)
+#define PORT_PA20F_TCC0_WO6        (1u << 20)
+#define PIN_PB12F_TCC0_WO6                44  /**< \brief TCC0 signal: WO6 on PB12 mux F */
+#define MUX_PB12F_TCC0_WO6                 5
+#define PINMUX_PB12F_TCC0_WO6      ((PIN_PB12F_TCC0_WO6 << 16) | MUX_PB12F_TCC0_WO6)
+#define PORT_PB12F_TCC0_WO6        (1u << 12)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA13F_TCC0_WO7                13  /**< \brief TCC0 signal: WO7 on PA13 mux F */
+#define MUX_PA13F_TCC0_WO7                 5
+#define PINMUX_PA13F_TCC0_WO7      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
+#define PORT_PA13F_TCC0_WO7        (1u << 13)
+#define PIN_PA21F_TCC0_WO7                21  /**< \brief TCC0 signal: WO7 on PA21 mux F */
+#define MUX_PA21F_TCC0_WO7                 5
+#define PINMUX_PA21F_TCC0_WO7      ((PIN_PA21F_TCC0_WO7 << 16) | MUX_PA21F_TCC0_WO7)
+#define PORT_PA21F_TCC0_WO7        (1u << 21)
+#define PIN_PB13F_TCC0_WO7                45  /**< \brief TCC0 signal: WO7 on PB13 mux F */
+#define MUX_PB13F_TCC0_WO7                 5
+#define PINMUX_PB13F_TCC0_WO7      ((PIN_PB13F_TCC0_WO7 << 16) | MUX_PB13F_TCC0_WO7)
+#define PORT_PB13F_TCC0_WO7        (1u << 13)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PB30F_TCC1_WO2                62  /**< \brief TCC1 signal: WO2 on PB30 mux F */
+#define MUX_PB30F_TCC1_WO2                 5
+#define PINMUX_PB30F_TCC1_WO2      ((PIN_PB30F_TCC1_WO2 << 16) | MUX_PB30F_TCC1_WO2)
+#define PORT_PB30F_TCC1_WO2        (1u << 30)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+#define PIN_PB31F_TCC1_WO3                63  /**< \brief TCC1 signal: WO3 on PB31 mux F */
+#define MUX_PB31F_TCC1_WO3                 5
+#define PINMUX_PB31F_TCC1_WO3      ((PIN_PB31F_TCC1_WO3 << 16) | MUX_PB31F_TCC1_WO3)
+#define PORT_PB31F_TCC1_WO3        (1u << 31)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA12E_TCC2_WO0                12  /**< \brief TCC2 signal: WO0 on PA12 mux E */
+#define MUX_PA12E_TCC2_WO0                 4
+#define PINMUX_PA12E_TCC2_WO0      ((PIN_PA12E_TCC2_WO0 << 16) | MUX_PA12E_TCC2_WO0)
+#define PORT_PA12E_TCC2_WO0        (1u << 12)
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA13E_TCC2_WO1                13  /**< \brief TCC2 signal: WO1 on PA13 mux E */
+#define MUX_PA13E_TCC2_WO1                 4
+#define PINMUX_PA13E_TCC2_WO1      ((PIN_PA13E_TCC2_WO1 << 16) | MUX_PA13E_TCC2_WO1)
+#define PORT_PA13E_TCC2_WO1        (1u << 13)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PB08E_TC4_WO0                 40  /**< \brief TC4 signal: WO0 on PB08 mux E */
+#define MUX_PB08E_TC4_WO0                  4
+#define PINMUX_PB08E_TC4_WO0       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
+#define PORT_PB08E_TC4_WO0         (1u <<  8)
+#define PIN_PB12E_TC4_WO0                 44  /**< \brief TC4 signal: WO0 on PB12 mux E */
+#define MUX_PB12E_TC4_WO0                  4
+#define PINMUX_PB12E_TC4_WO0       ((PIN_PB12E_TC4_WO0 << 16) | MUX_PB12E_TC4_WO0)
+#define PORT_PB12E_TC4_WO0         (1u << 12)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+#define PIN_PB09E_TC4_WO1                 41  /**< \brief TC4 signal: WO1 on PB09 mux E */
+#define MUX_PB09E_TC4_WO1                  4
+#define PINMUX_PB09E_TC4_WO1       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
+#define PORT_PB09E_TC4_WO1         (1u <<  9)
+#define PIN_PB13E_TC4_WO1                 45  /**< \brief TC4 signal: WO1 on PB13 mux E */
+#define MUX_PB13E_TC4_WO1                  4
+#define PINMUX_PB13E_TC4_WO1       ((PIN_PB13E_TC4_WO1 << 16) | MUX_PB13E_TC4_WO1)
+#define PORT_PB13E_TC4_WO1         (1u << 13)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PB10E_TC5_WO0                 42  /**< \brief TC5 signal: WO0 on PB10 mux E */
+#define MUX_PB10E_TC5_WO0                  4
+#define PINMUX_PB10E_TC5_WO0       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
+#define PORT_PB10E_TC5_WO0         (1u << 10)
+#define PIN_PB14E_TC5_WO0                 46  /**< \brief TC5 signal: WO0 on PB14 mux E */
+#define MUX_PB14E_TC5_WO0                  4
+#define PINMUX_PB14E_TC5_WO0       ((PIN_PB14E_TC5_WO0 << 16) | MUX_PB14E_TC5_WO0)
+#define PORT_PB14E_TC5_WO0         (1u << 14)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+#define PIN_PB11E_TC5_WO1                 43  /**< \brief TC5 signal: WO1 on PB11 mux E */
+#define MUX_PB11E_TC5_WO1                  4
+#define PINMUX_PB11E_TC5_WO1       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
+#define PORT_PB11E_TC5_WO1         (1u << 11)
+#define PIN_PB15E_TC5_WO1                 47  /**< \brief TC5 signal: WO1 on PB15 mux E */
+#define MUX_PB15E_TC5_WO1                  4
+#define PINMUX_PB15E_TC5_WO1       ((PIN_PB15E_TC5_WO1 << 16) | MUX_PB15E_TC5_WO1)
+#define PORT_PB15E_TC5_WO1         (1u << 15)
+/* ========== PORT definition for TC6 peripheral ========== */
+#define PIN_PB02E_TC6_WO0                 34  /**< \brief TC6 signal: WO0 on PB02 mux E */
+#define MUX_PB02E_TC6_WO0                  4
+#define PINMUX_PB02E_TC6_WO0       ((PIN_PB02E_TC6_WO0 << 16) | MUX_PB02E_TC6_WO0)
+#define PORT_PB02E_TC6_WO0         (1u <<  2)
+#define PIN_PB16E_TC6_WO0                 48  /**< \brief TC6 signal: WO0 on PB16 mux E */
+#define MUX_PB16E_TC6_WO0                  4
+#define PINMUX_PB16E_TC6_WO0       ((PIN_PB16E_TC6_WO0 << 16) | MUX_PB16E_TC6_WO0)
+#define PORT_PB16E_TC6_WO0         (1u << 16)
+#define PIN_PB03E_TC6_WO1                 35  /**< \brief TC6 signal: WO1 on PB03 mux E */
+#define MUX_PB03E_TC6_WO1                  4
+#define PINMUX_PB03E_TC6_WO1       ((PIN_PB03E_TC6_WO1 << 16) | MUX_PB03E_TC6_WO1)
+#define PORT_PB03E_TC6_WO1         (1u <<  3)
+#define PIN_PB17E_TC6_WO1                 49  /**< \brief TC6 signal: WO1 on PB17 mux E */
+#define MUX_PB17E_TC6_WO1                  4
+#define PINMUX_PB17E_TC6_WO1       ((PIN_PB17E_TC6_WO1 << 16) | MUX_PB17E_TC6_WO1)
+#define PORT_PB17E_TC6_WO1         (1u << 17)
+/* ========== PORT definition for TC7 peripheral ========== */
+#define PIN_PA20E_TC7_WO0                 20  /**< \brief TC7 signal: WO0 on PA20 mux E */
+#define MUX_PA20E_TC7_WO0                  4
+#define PINMUX_PA20E_TC7_WO0       ((PIN_PA20E_TC7_WO0 << 16) | MUX_PA20E_TC7_WO0)
+#define PORT_PA20E_TC7_WO0         (1u << 20)
+#define PIN_PB00E_TC7_WO0                 32  /**< \brief TC7 signal: WO0 on PB00 mux E */
+#define MUX_PB00E_TC7_WO0                  4
+#define PINMUX_PB00E_TC7_WO0       ((PIN_PB00E_TC7_WO0 << 16) | MUX_PB00E_TC7_WO0)
+#define PORT_PB00E_TC7_WO0         (1u <<  0)
+#define PIN_PB22E_TC7_WO0                 54  /**< \brief TC7 signal: WO0 on PB22 mux E */
+#define MUX_PB22E_TC7_WO0                  4
+#define PINMUX_PB22E_TC7_WO0       ((PIN_PB22E_TC7_WO0 << 16) | MUX_PB22E_TC7_WO0)
+#define PORT_PB22E_TC7_WO0         (1u << 22)
+#define PIN_PA21E_TC7_WO1                 21  /**< \brief TC7 signal: WO1 on PA21 mux E */
+#define MUX_PA21E_TC7_WO1                  4
+#define PINMUX_PA21E_TC7_WO1       ((PIN_PA21E_TC7_WO1 << 16) | MUX_PA21E_TC7_WO1)
+#define PORT_PA21E_TC7_WO1         (1u << 21)
+#define PIN_PB01E_TC7_WO1                 33  /**< \brief TC7 signal: WO1 on PB01 mux E */
+#define MUX_PB01E_TC7_WO1                  4
+#define PINMUX_PB01E_TC7_WO1       ((PIN_PB01E_TC7_WO1 << 16) | MUX_PB01E_TC7_WO1)
+#define PORT_PB01E_TC7_WO1         (1u <<  1)
+#define PIN_PB23E_TC7_WO1                 55  /**< \brief TC7 signal: WO1 on PB23 mux E */
+#define MUX_PB23E_TC7_WO1                  4
+#define PINMUX_PB23E_TC7_WO1       ((PIN_PB23E_TC7_WO1 << 16) | MUX_PB23E_TC7_WO1)
+#define PORT_PB23E_TC7_WO1         (1u << 23)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PB08B_ADC_AIN2                40  /**< \brief ADC signal: AIN2 on PB08 mux B */
+#define MUX_PB08B_ADC_AIN2                 1
+#define PINMUX_PB08B_ADC_AIN2      ((PIN_PB08B_ADC_AIN2 << 16) | MUX_PB08B_ADC_AIN2)
+#define PORT_PB08B_ADC_AIN2        (1u <<  8)
+#define PIN_PB09B_ADC_AIN3                41  /**< \brief ADC signal: AIN3 on PB09 mux B */
+#define MUX_PB09B_ADC_AIN3                 1
+#define PINMUX_PB09B_ADC_AIN3      ((PIN_PB09B_ADC_AIN3 << 16) | MUX_PB09B_ADC_AIN3)
+#define PORT_PB09B_ADC_AIN3        (1u <<  9)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PB00B_ADC_AIN8                32  /**< \brief ADC signal: AIN8 on PB00 mux B */
+#define MUX_PB00B_ADC_AIN8                 1
+#define PINMUX_PB00B_ADC_AIN8      ((PIN_PB00B_ADC_AIN8 << 16) | MUX_PB00B_ADC_AIN8)
+#define PORT_PB00B_ADC_AIN8        (1u <<  0)
+#define PIN_PB01B_ADC_AIN9                33  /**< \brief ADC signal: AIN9 on PB01 mux B */
+#define MUX_PB01B_ADC_AIN9                 1
+#define PINMUX_PB01B_ADC_AIN9      ((PIN_PB01B_ADC_AIN9 << 16) | MUX_PB01B_ADC_AIN9)
+#define PORT_PB01B_ADC_AIN9        (1u <<  1)
+#define PIN_PB02B_ADC_AIN10               34  /**< \brief ADC signal: AIN10 on PB02 mux B */
+#define MUX_PB02B_ADC_AIN10                1
+#define PINMUX_PB02B_ADC_AIN10     ((PIN_PB02B_ADC_AIN10 << 16) | MUX_PB02B_ADC_AIN10)
+#define PORT_PB02B_ADC_AIN10       (1u <<  2)
+#define PIN_PB03B_ADC_AIN11               35  /**< \brief ADC signal: AIN11 on PB03 mux B */
+#define MUX_PB03B_ADC_AIN11                1
+#define PINMUX_PB03B_ADC_AIN11     ((PIN_PB03B_ADC_AIN11 << 16) | MUX_PB03B_ADC_AIN11)
+#define PORT_PB03B_ADC_AIN11       (1u <<  3)
+#define PIN_PB04B_ADC_AIN12               36  /**< \brief ADC signal: AIN12 on PB04 mux B */
+#define MUX_PB04B_ADC_AIN12                1
+#define PINMUX_PB04B_ADC_AIN12     ((PIN_PB04B_ADC_AIN12 << 16) | MUX_PB04B_ADC_AIN12)
+#define PORT_PB04B_ADC_AIN12       (1u <<  4)
+#define PIN_PB05B_ADC_AIN13               37  /**< \brief ADC signal: AIN13 on PB05 mux B */
+#define MUX_PB05B_ADC_AIN13                1
+#define PINMUX_PB05B_ADC_AIN13     ((PIN_PB05B_ADC_AIN13 << 16) | MUX_PB05B_ADC_AIN13)
+#define PORT_PB05B_ADC_AIN13       (1u <<  5)
+#define PIN_PB06B_ADC_AIN14               38  /**< \brief ADC signal: AIN14 on PB06 mux B */
+#define MUX_PB06B_ADC_AIN14                1
+#define PINMUX_PB06B_ADC_AIN14     ((PIN_PB06B_ADC_AIN14 << 16) | MUX_PB06B_ADC_AIN14)
+#define PORT_PB06B_ADC_AIN14       (1u <<  6)
+#define PIN_PB07B_ADC_AIN15               39  /**< \brief ADC signal: AIN15 on PB07 mux B */
+#define MUX_PB07B_ADC_AIN15                1
+#define PINMUX_PB07B_ADC_AIN15     ((PIN_PB07B_ADC_AIN15 << 16) | MUX_PB07B_ADC_AIN15)
+#define PORT_PB07B_ADC_AIN15       (1u <<  7)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA12H_AC_CMP0                 12  /**< \brief AC signal: CMP0 on PA12 mux H */
+#define MUX_PA12H_AC_CMP0                  7
+#define PINMUX_PA12H_AC_CMP0       ((PIN_PA12H_AC_CMP0 << 16) | MUX_PA12H_AC_CMP0)
+#define PORT_PA12H_AC_CMP0         (1u << 12)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA13H_AC_CMP1                 13  /**< \brief AC signal: CMP1 on PA13 mux H */
+#define MUX_PA13H_AC_CMP1                  7
+#define PINMUX_PA13H_AC_CMP1       ((PIN_PA13H_AC_CMP1 << 16) | MUX_PA13H_AC_CMP1)
+#define PORT_PA13H_AC_CMP1         (1u << 13)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA21G_I2S_FS0                 21  /**< \brief I2S signal: FS0 on PA21 mux G */
+#define MUX_PA21G_I2S_FS0                  6
+#define PINMUX_PA21G_I2S_FS0       ((PIN_PA21G_I2S_FS0 << 16) | MUX_PA21G_I2S_FS0)
+#define PORT_PA21G_I2S_FS0         (1u << 21)
+#define PIN_PB12G_I2S_FS1                 44  /**< \brief I2S signal: FS1 on PB12 mux G */
+#define MUX_PB12G_I2S_FS1                  6
+#define PINMUX_PB12G_I2S_FS1       ((PIN_PB12G_I2S_FS1 << 16) | MUX_PB12G_I2S_FS1)
+#define PORT_PB12G_I2S_FS1         (1u << 12)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PB17G_I2S_MCK0                49  /**< \brief I2S signal: MCK0 on PB17 mux G */
+#define MUX_PB17G_I2S_MCK0                 6
+#define PINMUX_PB17G_I2S_MCK0      ((PIN_PB17G_I2S_MCK0 << 16) | MUX_PB17G_I2S_MCK0)
+#define PORT_PB17G_I2S_MCK0        (1u << 17)
+#define PIN_PB10G_I2S_MCK1                42  /**< \brief I2S signal: MCK1 on PB10 mux G */
+#define MUX_PB10G_I2S_MCK1                 6
+#define PINMUX_PB10G_I2S_MCK1      ((PIN_PB10G_I2S_MCK1 << 16) | MUX_PB10G_I2S_MCK1)
+#define PORT_PB10G_I2S_MCK1        (1u << 10)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA20G_I2S_SCK0                20  /**< \brief I2S signal: SCK0 on PA20 mux G */
+#define MUX_PA20G_I2S_SCK0                 6
+#define PINMUX_PA20G_I2S_SCK0      ((PIN_PA20G_I2S_SCK0 << 16) | MUX_PA20G_I2S_SCK0)
+#define PORT_PA20G_I2S_SCK0        (1u << 20)
+#define PIN_PB11G_I2S_SCK1                43  /**< \brief I2S signal: SCK1 on PB11 mux G */
+#define MUX_PB11G_I2S_SCK1                 6
+#define PINMUX_PB11G_I2S_SCK1      ((PIN_PB11G_I2S_SCK1 << 16) | MUX_PB11G_I2S_SCK1)
+#define PORT_PB11G_I2S_SCK1        (1u << 11)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+#define PIN_PB16G_I2S_SD1                 48  /**< \brief I2S signal: SD1 on PB16 mux G */
+#define MUX_PB16G_I2S_SD1                  6
+#define PINMUX_PB16G_I2S_SD1       ((PIN_PB16G_I2S_SD1 << 16) | MUX_PB16G_I2S_SD1)
+#define PORT_PB16G_I2S_SD1         (1u << 16)
+
+#endif /* _SAMD21J17A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j18a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j18a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/pio/samd21j18a.h	(revision 136)
@@ -0,0 +1,1242 @@
+/**
+ * \file
+ *
+ * \brief Peripheral I/O description for SAMD21J18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21J18A_PIO_
+#define _SAMD21J18A_PIO_
+
+#define PIN_PA00                           0  /**< \brief Pin Number for PA00 */
+#define PORT_PA00                  (1u <<  0) /**< \brief PORT Mask  for PA00 */
+#define PIN_PA01                           1  /**< \brief Pin Number for PA01 */
+#define PORT_PA01                  (1u <<  1) /**< \brief PORT Mask  for PA01 */
+#define PIN_PA02                           2  /**< \brief Pin Number for PA02 */
+#define PORT_PA02                  (1u <<  2) /**< \brief PORT Mask  for PA02 */
+#define PIN_PA03                           3  /**< \brief Pin Number for PA03 */
+#define PORT_PA03                  (1u <<  3) /**< \brief PORT Mask  for PA03 */
+#define PIN_PA04                           4  /**< \brief Pin Number for PA04 */
+#define PORT_PA04                  (1u <<  4) /**< \brief PORT Mask  for PA04 */
+#define PIN_PA05                           5  /**< \brief Pin Number for PA05 */
+#define PORT_PA05                  (1u <<  5) /**< \brief PORT Mask  for PA05 */
+#define PIN_PA06                           6  /**< \brief Pin Number for PA06 */
+#define PORT_PA06                  (1u <<  6) /**< \brief PORT Mask  for PA06 */
+#define PIN_PA07                           7  /**< \brief Pin Number for PA07 */
+#define PORT_PA07                  (1u <<  7) /**< \brief PORT Mask  for PA07 */
+#define PIN_PA08                           8  /**< \brief Pin Number for PA08 */
+#define PORT_PA08                  (1u <<  8) /**< \brief PORT Mask  for PA08 */
+#define PIN_PA09                           9  /**< \brief Pin Number for PA09 */
+#define PORT_PA09                  (1u <<  9) /**< \brief PORT Mask  for PA09 */
+#define PIN_PA10                          10  /**< \brief Pin Number for PA10 */
+#define PORT_PA10                  (1u << 10) /**< \brief PORT Mask  for PA10 */
+#define PIN_PA11                          11  /**< \brief Pin Number for PA11 */
+#define PORT_PA11                  (1u << 11) /**< \brief PORT Mask  for PA11 */
+#define PIN_PA12                          12  /**< \brief Pin Number for PA12 */
+#define PORT_PA12                  (1u << 12) /**< \brief PORT Mask  for PA12 */
+#define PIN_PA13                          13  /**< \brief Pin Number for PA13 */
+#define PORT_PA13                  (1u << 13) /**< \brief PORT Mask  for PA13 */
+#define PIN_PA14                          14  /**< \brief Pin Number for PA14 */
+#define PORT_PA14                  (1u << 14) /**< \brief PORT Mask  for PA14 */
+#define PIN_PA15                          15  /**< \brief Pin Number for PA15 */
+#define PORT_PA15                  (1u << 15) /**< \brief PORT Mask  for PA15 */
+#define PIN_PA16                          16  /**< \brief Pin Number for PA16 */
+#define PORT_PA16                  (1u << 16) /**< \brief PORT Mask  for PA16 */
+#define PIN_PA17                          17  /**< \brief Pin Number for PA17 */
+#define PORT_PA17                  (1u << 17) /**< \brief PORT Mask  for PA17 */
+#define PIN_PA18                          18  /**< \brief Pin Number for PA18 */
+#define PORT_PA18                  (1u << 18) /**< \brief PORT Mask  for PA18 */
+#define PIN_PA19                          19  /**< \brief Pin Number for PA19 */
+#define PORT_PA19                  (1u << 19) /**< \brief PORT Mask  for PA19 */
+#define PIN_PA20                          20  /**< \brief Pin Number for PA20 */
+#define PORT_PA20                  (1u << 20) /**< \brief PORT Mask  for PA20 */
+#define PIN_PA21                          21  /**< \brief Pin Number for PA21 */
+#define PORT_PA21                  (1u << 21) /**< \brief PORT Mask  for PA21 */
+#define PIN_PA22                          22  /**< \brief Pin Number for PA22 */
+#define PORT_PA22                  (1u << 22) /**< \brief PORT Mask  for PA22 */
+#define PIN_PA23                          23  /**< \brief Pin Number for PA23 */
+#define PORT_PA23                  (1u << 23) /**< \brief PORT Mask  for PA23 */
+#define PIN_PA24                          24  /**< \brief Pin Number for PA24 */
+#define PORT_PA24                  (1u << 24) /**< \brief PORT Mask  for PA24 */
+#define PIN_PA25                          25  /**< \brief Pin Number for PA25 */
+#define PORT_PA25                  (1u << 25) /**< \brief PORT Mask  for PA25 */
+#define PIN_PA27                          27  /**< \brief Pin Number for PA27 */
+#define PORT_PA27                  (1u << 27) /**< \brief PORT Mask  for PA27 */
+#define PIN_PA28                          28  /**< \brief Pin Number for PA28 */
+#define PORT_PA28                  (1u << 28) /**< \brief PORT Mask  for PA28 */
+#define PIN_PA30                          30  /**< \brief Pin Number for PA30 */
+#define PORT_PA30                  (1u << 30) /**< \brief PORT Mask  for PA30 */
+#define PIN_PA31                          31  /**< \brief Pin Number for PA31 */
+#define PORT_PA31                  (1u << 31) /**< \brief PORT Mask  for PA31 */
+#define PIN_PB00                          32  /**< \brief Pin Number for PB00 */
+#define PORT_PB00                  (1u <<  0) /**< \brief PORT Mask  for PB00 */
+#define PIN_PB01                          33  /**< \brief Pin Number for PB01 */
+#define PORT_PB01                  (1u <<  1) /**< \brief PORT Mask  for PB01 */
+#define PIN_PB02                          34  /**< \brief Pin Number for PB02 */
+#define PORT_PB02                  (1u <<  2) /**< \brief PORT Mask  for PB02 */
+#define PIN_PB03                          35  /**< \brief Pin Number for PB03 */
+#define PORT_PB03                  (1u <<  3) /**< \brief PORT Mask  for PB03 */
+#define PIN_PB04                          36  /**< \brief Pin Number for PB04 */
+#define PORT_PB04                  (1u <<  4) /**< \brief PORT Mask  for PB04 */
+#define PIN_PB05                          37  /**< \brief Pin Number for PB05 */
+#define PORT_PB05                  (1u <<  5) /**< \brief PORT Mask  for PB05 */
+#define PIN_PB06                          38  /**< \brief Pin Number for PB06 */
+#define PORT_PB06                  (1u <<  6) /**< \brief PORT Mask  for PB06 */
+#define PIN_PB07                          39  /**< \brief Pin Number for PB07 */
+#define PORT_PB07                  (1u <<  7) /**< \brief PORT Mask  for PB07 */
+#define PIN_PB08                          40  /**< \brief Pin Number for PB08 */
+#define PORT_PB08                  (1u <<  8) /**< \brief PORT Mask  for PB08 */
+#define PIN_PB09                          41  /**< \brief Pin Number for PB09 */
+#define PORT_PB09                  (1u <<  9) /**< \brief PORT Mask  for PB09 */
+#define PIN_PB10                          42  /**< \brief Pin Number for PB10 */
+#define PORT_PB10                  (1u << 10) /**< \brief PORT Mask  for PB10 */
+#define PIN_PB11                          43  /**< \brief Pin Number for PB11 */
+#define PORT_PB11                  (1u << 11) /**< \brief PORT Mask  for PB11 */
+#define PIN_PB12                          44  /**< \brief Pin Number for PB12 */
+#define PORT_PB12                  (1u << 12) /**< \brief PORT Mask  for PB12 */
+#define PIN_PB13                          45  /**< \brief Pin Number for PB13 */
+#define PORT_PB13                  (1u << 13) /**< \brief PORT Mask  for PB13 */
+#define PIN_PB14                          46  /**< \brief Pin Number for PB14 */
+#define PORT_PB14                  (1u << 14) /**< \brief PORT Mask  for PB14 */
+#define PIN_PB15                          47  /**< \brief Pin Number for PB15 */
+#define PORT_PB15                  (1u << 15) /**< \brief PORT Mask  for PB15 */
+#define PIN_PB16                          48  /**< \brief Pin Number for PB16 */
+#define PORT_PB16                  (1u << 16) /**< \brief PORT Mask  for PB16 */
+#define PIN_PB17                          49  /**< \brief Pin Number for PB17 */
+#define PORT_PB17                  (1u << 17) /**< \brief PORT Mask  for PB17 */
+#define PIN_PB22                          54  /**< \brief Pin Number for PB22 */
+#define PORT_PB22                  (1u << 22) /**< \brief PORT Mask  for PB22 */
+#define PIN_PB23                          55  /**< \brief Pin Number for PB23 */
+#define PORT_PB23                  (1u << 23) /**< \brief PORT Mask  for PB23 */
+#define PIN_PB30                          62  /**< \brief Pin Number for PB30 */
+#define PORT_PB30                  (1u << 30) /**< \brief PORT Mask  for PB30 */
+#define PIN_PB31                          63  /**< \brief Pin Number for PB31 */
+#define PORT_PB31                  (1u << 31) /**< \brief PORT Mask  for PB31 */
+/* ========== PORT definition for CORE peripheral ========== */
+#define PIN_PA30G_CORE_SWCLK              30  /**< \brief CORE signal: SWCLK on PA30 mux G */
+#define MUX_PA30G_CORE_SWCLK               6
+#define PINMUX_PA30G_CORE_SWCLK    ((PIN_PA30G_CORE_SWCLK << 16) | MUX_PA30G_CORE_SWCLK)
+#define PORT_PA30G_CORE_SWCLK      (1u << 30)
+/* ========== PORT definition for GCLK peripheral ========== */
+#define PIN_PB14H_GCLK_IO0                46  /**< \brief GCLK signal: IO0 on PB14 mux H */
+#define MUX_PB14H_GCLK_IO0                 7
+#define PINMUX_PB14H_GCLK_IO0      ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
+#define PORT_PB14H_GCLK_IO0        (1u << 14)
+#define PIN_PB22H_GCLK_IO0                54  /**< \brief GCLK signal: IO0 on PB22 mux H */
+#define MUX_PB22H_GCLK_IO0                 7
+#define PINMUX_PB22H_GCLK_IO0      ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
+#define PORT_PB22H_GCLK_IO0        (1u << 22)
+#define PIN_PA14H_GCLK_IO0                14  /**< \brief GCLK signal: IO0 on PA14 mux H */
+#define MUX_PA14H_GCLK_IO0                 7
+#define PINMUX_PA14H_GCLK_IO0      ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
+#define PORT_PA14H_GCLK_IO0        (1u << 14)
+#define PIN_PA27H_GCLK_IO0                27  /**< \brief GCLK signal: IO0 on PA27 mux H */
+#define MUX_PA27H_GCLK_IO0                 7
+#define PINMUX_PA27H_GCLK_IO0      ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
+#define PORT_PA27H_GCLK_IO0        (1u << 27)
+#define PIN_PA28H_GCLK_IO0                28  /**< \brief GCLK signal: IO0 on PA28 mux H */
+#define MUX_PA28H_GCLK_IO0                 7
+#define PINMUX_PA28H_GCLK_IO0      ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0)
+#define PORT_PA28H_GCLK_IO0        (1u << 28)
+#define PIN_PA30H_GCLK_IO0                30  /**< \brief GCLK signal: IO0 on PA30 mux H */
+#define MUX_PA30H_GCLK_IO0                 7
+#define PINMUX_PA30H_GCLK_IO0      ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0)
+#define PORT_PA30H_GCLK_IO0        (1u << 30)
+#define PIN_PB15H_GCLK_IO1                47  /**< \brief GCLK signal: IO1 on PB15 mux H */
+#define MUX_PB15H_GCLK_IO1                 7
+#define PINMUX_PB15H_GCLK_IO1      ((PIN_PB15H_GCLK_IO1 << 16) | MUX_PB15H_GCLK_IO1)
+#define PORT_PB15H_GCLK_IO1        (1u << 15)
+#define PIN_PB23H_GCLK_IO1                55  /**< \brief GCLK signal: IO1 on PB23 mux H */
+#define MUX_PB23H_GCLK_IO1                 7
+#define PINMUX_PB23H_GCLK_IO1      ((PIN_PB23H_GCLK_IO1 << 16) | MUX_PB23H_GCLK_IO1)
+#define PORT_PB23H_GCLK_IO1        (1u << 23)
+#define PIN_PA15H_GCLK_IO1                15  /**< \brief GCLK signal: IO1 on PA15 mux H */
+#define MUX_PA15H_GCLK_IO1                 7
+#define PINMUX_PA15H_GCLK_IO1      ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
+#define PORT_PA15H_GCLK_IO1        (1u << 15)
+#define PIN_PB16H_GCLK_IO2                48  /**< \brief GCLK signal: IO2 on PB16 mux H */
+#define MUX_PB16H_GCLK_IO2                 7
+#define PINMUX_PB16H_GCLK_IO2      ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
+#define PORT_PB16H_GCLK_IO2        (1u << 16)
+#define PIN_PA16H_GCLK_IO2                16  /**< \brief GCLK signal: IO2 on PA16 mux H */
+#define MUX_PA16H_GCLK_IO2                 7
+#define PINMUX_PA16H_GCLK_IO2      ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2)
+#define PORT_PA16H_GCLK_IO2        (1u << 16)
+#define PIN_PA17H_GCLK_IO3                17  /**< \brief GCLK signal: IO3 on PA17 mux H */
+#define MUX_PA17H_GCLK_IO3                 7
+#define PINMUX_PA17H_GCLK_IO3      ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3)
+#define PORT_PA17H_GCLK_IO3        (1u << 17)
+#define PIN_PB17H_GCLK_IO3                49  /**< \brief GCLK signal: IO3 on PB17 mux H */
+#define MUX_PB17H_GCLK_IO3                 7
+#define PINMUX_PB17H_GCLK_IO3      ((PIN_PB17H_GCLK_IO3 << 16) | MUX_PB17H_GCLK_IO3)
+#define PORT_PB17H_GCLK_IO3        (1u << 17)
+#define PIN_PA10H_GCLK_IO4                10  /**< \brief GCLK signal: IO4 on PA10 mux H */
+#define MUX_PA10H_GCLK_IO4                 7
+#define PINMUX_PA10H_GCLK_IO4      ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
+#define PORT_PA10H_GCLK_IO4        (1u << 10)
+#define PIN_PA20H_GCLK_IO4                20  /**< \brief GCLK signal: IO4 on PA20 mux H */
+#define MUX_PA20H_GCLK_IO4                 7
+#define PINMUX_PA20H_GCLK_IO4      ((PIN_PA20H_GCLK_IO4 << 16) | MUX_PA20H_GCLK_IO4)
+#define PORT_PA20H_GCLK_IO4        (1u << 20)
+#define PIN_PB10H_GCLK_IO4                42  /**< \brief GCLK signal: IO4 on PB10 mux H */
+#define MUX_PB10H_GCLK_IO4                 7
+#define PINMUX_PB10H_GCLK_IO4      ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
+#define PORT_PB10H_GCLK_IO4        (1u << 10)
+#define PIN_PA11H_GCLK_IO5                11  /**< \brief GCLK signal: IO5 on PA11 mux H */
+#define MUX_PA11H_GCLK_IO5                 7
+#define PINMUX_PA11H_GCLK_IO5      ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5)
+#define PORT_PA11H_GCLK_IO5        (1u << 11)
+#define PIN_PA21H_GCLK_IO5                21  /**< \brief GCLK signal: IO5 on PA21 mux H */
+#define MUX_PA21H_GCLK_IO5                 7
+#define PINMUX_PA21H_GCLK_IO5      ((PIN_PA21H_GCLK_IO5 << 16) | MUX_PA21H_GCLK_IO5)
+#define PORT_PA21H_GCLK_IO5        (1u << 21)
+#define PIN_PB11H_GCLK_IO5                43  /**< \brief GCLK signal: IO5 on PB11 mux H */
+#define MUX_PB11H_GCLK_IO5                 7
+#define PINMUX_PB11H_GCLK_IO5      ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
+#define PORT_PB11H_GCLK_IO5        (1u << 11)
+#define PIN_PA22H_GCLK_IO6                22  /**< \brief GCLK signal: IO6 on PA22 mux H */
+#define MUX_PA22H_GCLK_IO6                 7
+#define PINMUX_PA22H_GCLK_IO6      ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6)
+#define PORT_PA22H_GCLK_IO6        (1u << 22)
+#define PIN_PB12H_GCLK_IO6                44  /**< \brief GCLK signal: IO6 on PB12 mux H */
+#define MUX_PB12H_GCLK_IO6                 7
+#define PINMUX_PB12H_GCLK_IO6      ((PIN_PB12H_GCLK_IO6 << 16) | MUX_PB12H_GCLK_IO6)
+#define PORT_PB12H_GCLK_IO6        (1u << 12)
+#define PIN_PA23H_GCLK_IO7                23  /**< \brief GCLK signal: IO7 on PA23 mux H */
+#define MUX_PA23H_GCLK_IO7                 7
+#define PINMUX_PA23H_GCLK_IO7      ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7)
+#define PORT_PA23H_GCLK_IO7        (1u << 23)
+#define PIN_PB13H_GCLK_IO7                45  /**< \brief GCLK signal: IO7 on PB13 mux H */
+#define MUX_PB13H_GCLK_IO7                 7
+#define PINMUX_PB13H_GCLK_IO7      ((PIN_PB13H_GCLK_IO7 << 16) | MUX_PB13H_GCLK_IO7)
+#define PORT_PB13H_GCLK_IO7        (1u << 13)
+/* ========== PORT definition for EIC peripheral ========== */
+#define PIN_PA16A_EIC_EXTINT0             16  /**< \brief EIC signal: EXTINT0 on PA16 mux A */
+#define MUX_PA16A_EIC_EXTINT0              0
+#define PINMUX_PA16A_EIC_EXTINT0   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
+#define PORT_PA16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PB00A_EIC_EXTINT0             32  /**< \brief EIC signal: EXTINT0 on PB00 mux A */
+#define MUX_PB00A_EIC_EXTINT0              0
+#define PINMUX_PB00A_EIC_EXTINT0   ((PIN_PB00A_EIC_EXTINT0 << 16) | MUX_PB00A_EIC_EXTINT0)
+#define PORT_PB00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PB16A_EIC_EXTINT0             48  /**< \brief EIC signal: EXTINT0 on PB16 mux A */
+#define MUX_PB16A_EIC_EXTINT0              0
+#define PINMUX_PB16A_EIC_EXTINT0   ((PIN_PB16A_EIC_EXTINT0 << 16) | MUX_PB16A_EIC_EXTINT0)
+#define PORT_PB16A_EIC_EXTINT0     (1u << 16)
+#define PIN_PA00A_EIC_EXTINT0              0  /**< \brief EIC signal: EXTINT0 on PA00 mux A */
+#define MUX_PA00A_EIC_EXTINT0              0
+#define PINMUX_PA00A_EIC_EXTINT0   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
+#define PORT_PA00A_EIC_EXTINT0     (1u <<  0)
+#define PIN_PA17A_EIC_EXTINT1             17  /**< \brief EIC signal: EXTINT1 on PA17 mux A */
+#define MUX_PA17A_EIC_EXTINT1              0
+#define PINMUX_PA17A_EIC_EXTINT1   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
+#define PORT_PA17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PB01A_EIC_EXTINT1             33  /**< \brief EIC signal: EXTINT1 on PB01 mux A */
+#define MUX_PB01A_EIC_EXTINT1              0
+#define PINMUX_PB01A_EIC_EXTINT1   ((PIN_PB01A_EIC_EXTINT1 << 16) | MUX_PB01A_EIC_EXTINT1)
+#define PORT_PB01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PB17A_EIC_EXTINT1             49  /**< \brief EIC signal: EXTINT1 on PB17 mux A */
+#define MUX_PB17A_EIC_EXTINT1              0
+#define PINMUX_PB17A_EIC_EXTINT1   ((PIN_PB17A_EIC_EXTINT1 << 16) | MUX_PB17A_EIC_EXTINT1)
+#define PORT_PB17A_EIC_EXTINT1     (1u << 17)
+#define PIN_PA01A_EIC_EXTINT1              1  /**< \brief EIC signal: EXTINT1 on PA01 mux A */
+#define MUX_PA01A_EIC_EXTINT1              0
+#define PINMUX_PA01A_EIC_EXTINT1   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
+#define PORT_PA01A_EIC_EXTINT1     (1u <<  1)
+#define PIN_PA18A_EIC_EXTINT2             18  /**< \brief EIC signal: EXTINT2 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT2              0
+#define PINMUX_PA18A_EIC_EXTINT2   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
+#define PORT_PA18A_EIC_EXTINT2     (1u << 18)
+#define PIN_PA02A_EIC_EXTINT2              2  /**< \brief EIC signal: EXTINT2 on PA02 mux A */
+#define MUX_PA02A_EIC_EXTINT2              0
+#define PINMUX_PA02A_EIC_EXTINT2   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
+#define PORT_PA02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PB02A_EIC_EXTINT2             34  /**< \brief EIC signal: EXTINT2 on PB02 mux A */
+#define MUX_PB02A_EIC_EXTINT2              0
+#define PINMUX_PB02A_EIC_EXTINT2   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
+#define PORT_PB02A_EIC_EXTINT2     (1u <<  2)
+#define PIN_PA03A_EIC_EXTINT3              3  /**< \brief EIC signal: EXTINT3 on PA03 mux A */
+#define MUX_PA03A_EIC_EXTINT3              0
+#define PINMUX_PA03A_EIC_EXTINT3   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
+#define PORT_PA03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA19A_EIC_EXTINT3             19  /**< \brief EIC signal: EXTINT3 on PA19 mux A */
+#define MUX_PA19A_EIC_EXTINT3              0
+#define PINMUX_PA19A_EIC_EXTINT3   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
+#define PORT_PA19A_EIC_EXTINT3     (1u << 19)
+#define PIN_PB03A_EIC_EXTINT3             35  /**< \brief EIC signal: EXTINT3 on PB03 mux A */
+#define MUX_PB03A_EIC_EXTINT3              0
+#define PINMUX_PB03A_EIC_EXTINT3   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
+#define PORT_PB03A_EIC_EXTINT3     (1u <<  3)
+#define PIN_PA04A_EIC_EXTINT4              4  /**< \brief EIC signal: EXTINT4 on PA04 mux A */
+#define MUX_PA04A_EIC_EXTINT4              0
+#define PINMUX_PA04A_EIC_EXTINT4   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
+#define PORT_PA04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA20A_EIC_EXTINT4             20  /**< \brief EIC signal: EXTINT4 on PA20 mux A */
+#define MUX_PA20A_EIC_EXTINT4              0
+#define PINMUX_PA20A_EIC_EXTINT4   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
+#define PORT_PA20A_EIC_EXTINT4     (1u << 20)
+#define PIN_PB04A_EIC_EXTINT4             36  /**< \brief EIC signal: EXTINT4 on PB04 mux A */
+#define MUX_PB04A_EIC_EXTINT4              0
+#define PINMUX_PB04A_EIC_EXTINT4   ((PIN_PB04A_EIC_EXTINT4 << 16) | MUX_PB04A_EIC_EXTINT4)
+#define PORT_PB04A_EIC_EXTINT4     (1u <<  4)
+#define PIN_PA05A_EIC_EXTINT5              5  /**< \brief EIC signal: EXTINT5 on PA05 mux A */
+#define MUX_PA05A_EIC_EXTINT5              0
+#define PINMUX_PA05A_EIC_EXTINT5   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
+#define PORT_PA05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA21A_EIC_EXTINT5             21  /**< \brief EIC signal: EXTINT5 on PA21 mux A */
+#define MUX_PA21A_EIC_EXTINT5              0
+#define PINMUX_PA21A_EIC_EXTINT5   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
+#define PORT_PA21A_EIC_EXTINT5     (1u << 21)
+#define PIN_PB05A_EIC_EXTINT5             37  /**< \brief EIC signal: EXTINT5 on PB05 mux A */
+#define MUX_PB05A_EIC_EXTINT5              0
+#define PINMUX_PB05A_EIC_EXTINT5   ((PIN_PB05A_EIC_EXTINT5 << 16) | MUX_PB05A_EIC_EXTINT5)
+#define PORT_PB05A_EIC_EXTINT5     (1u <<  5)
+#define PIN_PA06A_EIC_EXTINT6              6  /**< \brief EIC signal: EXTINT6 on PA06 mux A */
+#define MUX_PA06A_EIC_EXTINT6              0
+#define PINMUX_PA06A_EIC_EXTINT6   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
+#define PORT_PA06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PA22A_EIC_EXTINT6             22  /**< \brief EIC signal: EXTINT6 on PA22 mux A */
+#define MUX_PA22A_EIC_EXTINT6              0
+#define PINMUX_PA22A_EIC_EXTINT6   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
+#define PORT_PA22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PB06A_EIC_EXTINT6             38  /**< \brief EIC signal: EXTINT6 on PB06 mux A */
+#define MUX_PB06A_EIC_EXTINT6              0
+#define PINMUX_PB06A_EIC_EXTINT6   ((PIN_PB06A_EIC_EXTINT6 << 16) | MUX_PB06A_EIC_EXTINT6)
+#define PORT_PB06A_EIC_EXTINT6     (1u <<  6)
+#define PIN_PB22A_EIC_EXTINT6             54  /**< \brief EIC signal: EXTINT6 on PB22 mux A */
+#define MUX_PB22A_EIC_EXTINT6              0
+#define PINMUX_PB22A_EIC_EXTINT6   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
+#define PORT_PB22A_EIC_EXTINT6     (1u << 22)
+#define PIN_PA07A_EIC_EXTINT7              7  /**< \brief EIC signal: EXTINT7 on PA07 mux A */
+#define MUX_PA07A_EIC_EXTINT7              0
+#define PINMUX_PA07A_EIC_EXTINT7   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
+#define PORT_PA07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PA23A_EIC_EXTINT7             23  /**< \brief EIC signal: EXTINT7 on PA23 mux A */
+#define MUX_PA23A_EIC_EXTINT7              0
+#define PINMUX_PA23A_EIC_EXTINT7   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
+#define PORT_PA23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PB07A_EIC_EXTINT7             39  /**< \brief EIC signal: EXTINT7 on PB07 mux A */
+#define MUX_PB07A_EIC_EXTINT7              0
+#define PINMUX_PB07A_EIC_EXTINT7   ((PIN_PB07A_EIC_EXTINT7 << 16) | MUX_PB07A_EIC_EXTINT7)
+#define PORT_PB07A_EIC_EXTINT7     (1u <<  7)
+#define PIN_PB23A_EIC_EXTINT7             55  /**< \brief EIC signal: EXTINT7 on PB23 mux A */
+#define MUX_PB23A_EIC_EXTINT7              0
+#define PINMUX_PB23A_EIC_EXTINT7   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
+#define PORT_PB23A_EIC_EXTINT7     (1u << 23)
+#define PIN_PA28A_EIC_EXTINT8             28  /**< \brief EIC signal: EXTINT8 on PA28 mux A */
+#define MUX_PA28A_EIC_EXTINT8              0
+#define PINMUX_PA28A_EIC_EXTINT8   ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8)
+#define PORT_PA28A_EIC_EXTINT8     (1u << 28)
+#define PIN_PB08A_EIC_EXTINT8             40  /**< \brief EIC signal: EXTINT8 on PB08 mux A */
+#define MUX_PB08A_EIC_EXTINT8              0
+#define PINMUX_PB08A_EIC_EXTINT8   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
+#define PORT_PB08A_EIC_EXTINT8     (1u <<  8)
+#define PIN_PA09A_EIC_EXTINT9              9  /**< \brief EIC signal: EXTINT9 on PA09 mux A */
+#define MUX_PA09A_EIC_EXTINT9              0
+#define PINMUX_PA09A_EIC_EXTINT9   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
+#define PORT_PA09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PB09A_EIC_EXTINT9             41  /**< \brief EIC signal: EXTINT9 on PB09 mux A */
+#define MUX_PB09A_EIC_EXTINT9              0
+#define PINMUX_PB09A_EIC_EXTINT9   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
+#define PORT_PB09A_EIC_EXTINT9     (1u <<  9)
+#define PIN_PA10A_EIC_EXTINT10            10  /**< \brief EIC signal: EXTINT10 on PA10 mux A */
+#define MUX_PA10A_EIC_EXTINT10             0
+#define PINMUX_PA10A_EIC_EXTINT10  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
+#define PORT_PA10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA30A_EIC_EXTINT10            30  /**< \brief EIC signal: EXTINT10 on PA30 mux A */
+#define MUX_PA30A_EIC_EXTINT10             0
+#define PINMUX_PA30A_EIC_EXTINT10  ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10)
+#define PORT_PA30A_EIC_EXTINT10    (1u << 30)
+#define PIN_PB10A_EIC_EXTINT10            42  /**< \brief EIC signal: EXTINT10 on PB10 mux A */
+#define MUX_PB10A_EIC_EXTINT10             0
+#define PINMUX_PB10A_EIC_EXTINT10  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
+#define PORT_PB10A_EIC_EXTINT10    (1u << 10)
+#define PIN_PA18A_EIC_EXTINT10            18  /**< \brief EIC signal: EXTINT10 on PA18 mux A */
+#define MUX_PA18A_EIC_EXTINT10             0
+#define PINMUX_PA18A_EIC_EXTINT10  ((PIN_PA18A_EIC_EXTINT10 << 16) | MUX_PA18A_EIC_EXTINT10)
+#define PORT_PA18A_EIC_EXTINT10    (1u << 18)
+#define PIN_PA11A_EIC_EXTINT11            11  /**< \brief EIC signal: EXTINT11 on PA11 mux A */
+#define MUX_PA11A_EIC_EXTINT11             0
+#define PINMUX_PA11A_EIC_EXTINT11  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
+#define PORT_PA11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA31A_EIC_EXTINT11            31  /**< \brief EIC signal: EXTINT11 on PA31 mux A */
+#define MUX_PA31A_EIC_EXTINT11             0
+#define PINMUX_PA31A_EIC_EXTINT11  ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11)
+#define PORT_PA31A_EIC_EXTINT11    (1u << 31)
+#define PIN_PB11A_EIC_EXTINT11            43  /**< \brief EIC signal: EXTINT11 on PB11 mux A */
+#define MUX_PB11A_EIC_EXTINT11             0
+#define PINMUX_PB11A_EIC_EXTINT11  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
+#define PORT_PB11A_EIC_EXTINT11    (1u << 11)
+#define PIN_PA12A_EIC_EXTINT12            12  /**< \brief EIC signal: EXTINT12 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT12             0
+#define PINMUX_PA12A_EIC_EXTINT12  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
+#define PORT_PA12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA24A_EIC_EXTINT12            24  /**< \brief EIC signal: EXTINT12 on PA24 mux A */
+#define MUX_PA24A_EIC_EXTINT12             0
+#define PINMUX_PA24A_EIC_EXTINT12  ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12)
+#define PORT_PA24A_EIC_EXTINT12    (1u << 24)
+#define PIN_PB12A_EIC_EXTINT12            44  /**< \brief EIC signal: EXTINT12 on PB12 mux A */
+#define MUX_PB12A_EIC_EXTINT12             0
+#define PINMUX_PB12A_EIC_EXTINT12  ((PIN_PB12A_EIC_EXTINT12 << 16) | MUX_PB12A_EIC_EXTINT12)
+#define PORT_PB12A_EIC_EXTINT12    (1u << 12)
+#define PIN_PA13A_EIC_EXTINT13            13  /**< \brief EIC signal: EXTINT13 on PA13 mux A */
+#define MUX_PA13A_EIC_EXTINT13             0
+#define PINMUX_PA13A_EIC_EXTINT13  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
+#define PORT_PA13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PA25A_EIC_EXTINT13            25  /**< \brief EIC signal: EXTINT13 on PA25 mux A */
+#define MUX_PA25A_EIC_EXTINT13             0
+#define PINMUX_PA25A_EIC_EXTINT13  ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13)
+#define PORT_PA25A_EIC_EXTINT13    (1u << 25)
+#define PIN_PB13A_EIC_EXTINT13            45  /**< \brief EIC signal: EXTINT13 on PB13 mux A */
+#define MUX_PB13A_EIC_EXTINT13             0
+#define PINMUX_PB13A_EIC_EXTINT13  ((PIN_PB13A_EIC_EXTINT13 << 16) | MUX_PB13A_EIC_EXTINT13)
+#define PORT_PB13A_EIC_EXTINT13    (1u << 13)
+#define PIN_PB14A_EIC_EXTINT14            46  /**< \brief EIC signal: EXTINT14 on PB14 mux A */
+#define MUX_PB14A_EIC_EXTINT14             0
+#define PINMUX_PB14A_EIC_EXTINT14  ((PIN_PB14A_EIC_EXTINT14 << 16) | MUX_PB14A_EIC_EXTINT14)
+#define PORT_PB14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PB30A_EIC_EXTINT14            62  /**< \brief EIC signal: EXTINT14 on PB30 mux A */
+#define MUX_PB30A_EIC_EXTINT14             0
+#define PINMUX_PB30A_EIC_EXTINT14  ((PIN_PB30A_EIC_EXTINT14 << 16) | MUX_PB30A_EIC_EXTINT14)
+#define PORT_PB30A_EIC_EXTINT14    (1u << 30)
+#define PIN_PA14A_EIC_EXTINT14            14  /**< \brief EIC signal: EXTINT14 on PA14 mux A */
+#define MUX_PA14A_EIC_EXTINT14             0
+#define PINMUX_PA14A_EIC_EXTINT14  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
+#define PORT_PA14A_EIC_EXTINT14    (1u << 14)
+#define PIN_PA15A_EIC_EXTINT15            15  /**< \brief EIC signal: EXTINT15 on PA15 mux A */
+#define MUX_PA15A_EIC_EXTINT15             0
+#define PINMUX_PA15A_EIC_EXTINT15  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
+#define PORT_PA15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PA27A_EIC_EXTINT15            27  /**< \brief EIC signal: EXTINT15 on PA27 mux A */
+#define MUX_PA27A_EIC_EXTINT15             0
+#define PINMUX_PA27A_EIC_EXTINT15  ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15)
+#define PORT_PA27A_EIC_EXTINT15    (1u << 27)
+#define PIN_PB15A_EIC_EXTINT15            47  /**< \brief EIC signal: EXTINT15 on PB15 mux A */
+#define MUX_PB15A_EIC_EXTINT15             0
+#define PINMUX_PB15A_EIC_EXTINT15  ((PIN_PB15A_EIC_EXTINT15 << 16) | MUX_PB15A_EIC_EXTINT15)
+#define PORT_PB15A_EIC_EXTINT15    (1u << 15)
+#define PIN_PB31A_EIC_EXTINT15            63  /**< \brief EIC signal: EXTINT15 on PB31 mux A */
+#define MUX_PB31A_EIC_EXTINT15             0
+#define PINMUX_PB31A_EIC_EXTINT15  ((PIN_PB31A_EIC_EXTINT15 << 16) | MUX_PB31A_EIC_EXTINT15)
+#define PORT_PB31A_EIC_EXTINT15    (1u << 31)
+#define PIN_PA12A_EIC_EXTINT17            12  /**< \brief EIC signal: EXTINT17 on PA12 mux A */
+#define MUX_PA12A_EIC_EXTINT17             0
+#define PINMUX_PA12A_EIC_EXTINT17  ((PIN_PA12A_EIC_EXTINT17 << 16) | MUX_PA12A_EIC_EXTINT17)
+#define PORT_PA12A_EIC_EXTINT17    (1u << 12)
+#define PIN_PA08A_EIC_NMI                  8  /**< \brief EIC signal: NMI on PA08 mux A */
+#define MUX_PA08A_EIC_NMI                  0
+#define PINMUX_PA08A_EIC_NMI       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
+#define PORT_PA08A_EIC_NMI         (1u <<  8)
+/* ========== PORT definition for USB peripheral ========== */
+#define PIN_PA24G_USB_DM                  24  /**< \brief USB signal: DM on PA24 mux G */
+#define MUX_PA24G_USB_DM                   6
+#define PINMUX_PA24G_USB_DM        ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM)
+#define PORT_PA24G_USB_DM          (1u << 24)
+#define PIN_PA25G_USB_DP                  25  /**< \brief USB signal: DP on PA25 mux G */
+#define MUX_PA25G_USB_DP                   6
+#define PINMUX_PA25G_USB_DP        ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP)
+#define PORT_PA25G_USB_DP          (1u << 25)
+#define PIN_PA23G_USB_SOF_1KHZ            23  /**< \brief USB signal: SOF_1KHZ on PA23 mux G */
+#define MUX_PA23G_USB_SOF_1KHZ             6
+#define PINMUX_PA23G_USB_SOF_1KHZ  ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ)
+#define PORT_PA23G_USB_SOF_1KHZ    (1u << 23)
+/* ========== PORT definition for SERCOM0 peripheral ========== */
+#define PIN_PA04D_SERCOM0_PAD0             4  /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */
+#define MUX_PA04D_SERCOM0_PAD0             3
+#define PINMUX_PA04D_SERCOM0_PAD0  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
+#define PORT_PA04D_SERCOM0_PAD0    (1u <<  4)
+#define PIN_PA08C_SERCOM0_PAD0             8  /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */
+#define MUX_PA08C_SERCOM0_PAD0             2
+#define PINMUX_PA08C_SERCOM0_PAD0  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
+#define PORT_PA08C_SERCOM0_PAD0    (1u <<  8)
+#define PIN_PA13A_SERCOM0_PAD0            13  /**< \brief SERCOM0 signal: PAD0 on PA13 mux A */
+#define MUX_PA13A_SERCOM0_PAD0             0
+#define PINMUX_PA13A_SERCOM0_PAD0  ((PIN_PA13A_SERCOM0_PAD0 << 16) | MUX_PA13A_SERCOM0_PAD0)
+#define PORT_PA13A_SERCOM0_PAD0    (1u << 13)
+#define PIN_PA05D_SERCOM0_PAD1             5  /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */
+#define MUX_PA05D_SERCOM0_PAD1             3
+#define PINMUX_PA05D_SERCOM0_PAD1  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
+#define PORT_PA05D_SERCOM0_PAD1    (1u <<  5)
+#define PIN_PA09C_SERCOM0_PAD1             9  /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */
+#define MUX_PA09C_SERCOM0_PAD1             2
+#define PINMUX_PA09C_SERCOM0_PAD1  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
+#define PORT_PA09C_SERCOM0_PAD1    (1u <<  9)
+#define PIN_PA06D_SERCOM0_PAD2             6  /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */
+#define MUX_PA06D_SERCOM0_PAD2             3
+#define PINMUX_PA06D_SERCOM0_PAD2  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
+#define PORT_PA06D_SERCOM0_PAD2    (1u <<  6)
+#define PIN_PA10C_SERCOM0_PAD2            10  /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
+#define MUX_PA10C_SERCOM0_PAD2             2
+#define PINMUX_PA10C_SERCOM0_PAD2  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
+#define PORT_PA10C_SERCOM0_PAD2    (1u << 10)
+#define PIN_PA07D_SERCOM0_PAD3             7  /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */
+#define MUX_PA07D_SERCOM0_PAD3             3
+#define PINMUX_PA07D_SERCOM0_PAD3  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
+#define PORT_PA07D_SERCOM0_PAD3    (1u <<  7)
+#define PIN_PA11C_SERCOM0_PAD3            11  /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */
+#define MUX_PA11C_SERCOM0_PAD3             2
+#define PINMUX_PA11C_SERCOM0_PAD3  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
+#define PORT_PA11C_SERCOM0_PAD3    (1u << 11)
+/* ========== PORT definition for SERCOM1 peripheral ========== */
+#define PIN_PA16C_SERCOM1_PAD0            16  /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */
+#define MUX_PA16C_SERCOM1_PAD0             2
+#define PINMUX_PA16C_SERCOM1_PAD0  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
+#define PORT_PA16C_SERCOM1_PAD0    (1u << 16)
+#define PIN_PA00D_SERCOM1_PAD0             0  /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */
+#define MUX_PA00D_SERCOM1_PAD0             3
+#define PINMUX_PA00D_SERCOM1_PAD0  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
+#define PORT_PA00D_SERCOM1_PAD0    (1u <<  0)
+#define PIN_PA17C_SERCOM1_PAD1            17  /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */
+#define MUX_PA17C_SERCOM1_PAD1             2
+#define PINMUX_PA17C_SERCOM1_PAD1  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
+#define PORT_PA17C_SERCOM1_PAD1    (1u << 17)
+#define PIN_PA01D_SERCOM1_PAD1             1  /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */
+#define MUX_PA01D_SERCOM1_PAD1             3
+#define PINMUX_PA01D_SERCOM1_PAD1  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
+#define PORT_PA01D_SERCOM1_PAD1    (1u <<  1)
+#define PIN_PA30D_SERCOM1_PAD2            30  /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */
+#define MUX_PA30D_SERCOM1_PAD2             3
+#define PINMUX_PA30D_SERCOM1_PAD2  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
+#define PORT_PA30D_SERCOM1_PAD2    (1u << 30)
+#define PIN_PA18C_SERCOM1_PAD2            18  /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */
+#define MUX_PA18C_SERCOM1_PAD2             2
+#define PINMUX_PA18C_SERCOM1_PAD2  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
+#define PORT_PA18C_SERCOM1_PAD2    (1u << 18)
+#define PIN_PA31D_SERCOM1_PAD3            31  /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */
+#define MUX_PA31D_SERCOM1_PAD3             3
+#define PINMUX_PA31D_SERCOM1_PAD3  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
+#define PORT_PA31D_SERCOM1_PAD3    (1u << 31)
+#define PIN_PA19C_SERCOM1_PAD3            19  /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */
+#define MUX_PA19C_SERCOM1_PAD3             2
+#define PINMUX_PA19C_SERCOM1_PAD3  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
+#define PORT_PA19C_SERCOM1_PAD3    (1u << 19)
+/* ========== PORT definition for SERCOM2 peripheral ========== */
+#define PIN_PA08D_SERCOM2_PAD0             8  /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */
+#define MUX_PA08D_SERCOM2_PAD0             3
+#define PINMUX_PA08D_SERCOM2_PAD0  ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0)
+#define PORT_PA08D_SERCOM2_PAD0    (1u <<  8)
+#define PIN_PA12C_SERCOM2_PAD0            12  /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */
+#define MUX_PA12C_SERCOM2_PAD0             2
+#define PINMUX_PA12C_SERCOM2_PAD0  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
+#define PORT_PA12C_SERCOM2_PAD0    (1u << 12)
+#define PIN_PA15A_SERCOM2_PAD0            15  /**< \brief SERCOM2 signal: PAD0 on PA15 mux A */
+#define MUX_PA15A_SERCOM2_PAD0             0
+#define PINMUX_PA15A_SERCOM2_PAD0  ((PIN_PA15A_SERCOM2_PAD0 << 16) | MUX_PA15A_SERCOM2_PAD0)
+#define PORT_PA15A_SERCOM2_PAD0    (1u << 15)
+#define PIN_PA09D_SERCOM2_PAD1             9  /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */
+#define MUX_PA09D_SERCOM2_PAD1             3
+#define PINMUX_PA09D_SERCOM2_PAD1  ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1)
+#define PORT_PA09D_SERCOM2_PAD1    (1u <<  9)
+#define PIN_PA13C_SERCOM2_PAD1            13  /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */
+#define MUX_PA13C_SERCOM2_PAD1             2
+#define PINMUX_PA13C_SERCOM2_PAD1  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
+#define PORT_PA13C_SERCOM2_PAD1    (1u << 13)
+#define PIN_PA10D_SERCOM2_PAD2            10  /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
+#define MUX_PA10D_SERCOM2_PAD2             3
+#define PINMUX_PA10D_SERCOM2_PAD2  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
+#define PORT_PA10D_SERCOM2_PAD2    (1u << 10)
+#define PIN_PA14C_SERCOM2_PAD2            14  /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */
+#define MUX_PA14C_SERCOM2_PAD2             2
+#define PINMUX_PA14C_SERCOM2_PAD2  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
+#define PORT_PA14C_SERCOM2_PAD2    (1u << 14)
+#define PIN_PA11D_SERCOM2_PAD3            11  /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */
+#define MUX_PA11D_SERCOM2_PAD3             3
+#define PINMUX_PA11D_SERCOM2_PAD3  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
+#define PORT_PA11D_SERCOM2_PAD3    (1u << 11)
+#define PIN_PA15C_SERCOM2_PAD3            15  /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */
+#define MUX_PA15C_SERCOM2_PAD3             2
+#define PINMUX_PA15C_SERCOM2_PAD3  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
+#define PORT_PA15C_SERCOM2_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM3 peripheral ========== */
+#define PIN_PA16D_SERCOM3_PAD0            16  /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */
+#define MUX_PA16D_SERCOM3_PAD0             3
+#define PINMUX_PA16D_SERCOM3_PAD0  ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0)
+#define PORT_PA16D_SERCOM3_PAD0    (1u << 16)
+#define PIN_PA22C_SERCOM3_PAD0            22  /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */
+#define MUX_PA22C_SERCOM3_PAD0             2
+#define PINMUX_PA22C_SERCOM3_PAD0  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
+#define PORT_PA22C_SERCOM3_PAD0    (1u << 22)
+#define PIN_PA27F_SERCOM3_PAD0            27  /**< \brief SERCOM3 signal: PAD0 on PA27 mux F */
+#define MUX_PA27F_SERCOM3_PAD0             5
+#define PINMUX_PA27F_SERCOM3_PAD0  ((PIN_PA27F_SERCOM3_PAD0 << 16) | MUX_PA27F_SERCOM3_PAD0)
+#define PORT_PA27F_SERCOM3_PAD0    (1u << 27)
+#define PIN_PA17D_SERCOM3_PAD1            17  /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */
+#define MUX_PA17D_SERCOM3_PAD1             3
+#define PINMUX_PA17D_SERCOM3_PAD1  ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1)
+#define PORT_PA17D_SERCOM3_PAD1    (1u << 17)
+#define PIN_PA23C_SERCOM3_PAD1            23  /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */
+#define MUX_PA23C_SERCOM3_PAD1             2
+#define PINMUX_PA23C_SERCOM3_PAD1  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
+#define PORT_PA23C_SERCOM3_PAD1    (1u << 23)
+#define PIN_PA28F_SERCOM3_PAD1            28  /**< \brief SERCOM3 signal: PAD1 on PA28 mux F */
+#define MUX_PA28F_SERCOM3_PAD1             5
+#define PINMUX_PA28F_SERCOM3_PAD1  ((PIN_PA28F_SERCOM3_PAD1 << 16) | MUX_PA28F_SERCOM3_PAD1)
+#define PORT_PA28F_SERCOM3_PAD1    (1u << 28)
+#define PIN_PA18D_SERCOM3_PAD2            18  /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */
+#define MUX_PA18D_SERCOM3_PAD2             3
+#define PINMUX_PA18D_SERCOM3_PAD2  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
+#define PORT_PA18D_SERCOM3_PAD2    (1u << 18)
+#define PIN_PA20D_SERCOM3_PAD2            20  /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */
+#define MUX_PA20D_SERCOM3_PAD2             3
+#define PINMUX_PA20D_SERCOM3_PAD2  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
+#define PORT_PA20D_SERCOM3_PAD2    (1u << 20)
+#define PIN_PA24C_SERCOM3_PAD2            24  /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */
+#define MUX_PA24C_SERCOM3_PAD2             2
+#define PINMUX_PA24C_SERCOM3_PAD2  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
+#define PORT_PA24C_SERCOM3_PAD2    (1u << 24)
+#define PIN_PA19D_SERCOM3_PAD3            19  /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */
+#define MUX_PA19D_SERCOM3_PAD3             3
+#define PINMUX_PA19D_SERCOM3_PAD3  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
+#define PORT_PA19D_SERCOM3_PAD3    (1u << 19)
+#define PIN_PA21D_SERCOM3_PAD3            21  /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */
+#define MUX_PA21D_SERCOM3_PAD3             3
+#define PINMUX_PA21D_SERCOM3_PAD3  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
+#define PORT_PA21D_SERCOM3_PAD3    (1u << 21)
+#define PIN_PA25C_SERCOM3_PAD3            25  /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */
+#define MUX_PA25C_SERCOM3_PAD3             2
+#define PINMUX_PA25C_SERCOM3_PAD3  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
+#define PORT_PA25C_SERCOM3_PAD3    (1u << 25)
+/* ========== PORT definition for SERCOM4 peripheral ========== */
+#define PIN_PA12D_SERCOM4_PAD0            12  /**< \brief SERCOM4 signal: PAD0 on PA12 mux D */
+#define MUX_PA12D_SERCOM4_PAD0             3
+#define PINMUX_PA12D_SERCOM4_PAD0  ((PIN_PA12D_SERCOM4_PAD0 << 16) | MUX_PA12D_SERCOM4_PAD0)
+#define PORT_PA12D_SERCOM4_PAD0    (1u << 12)
+#define PIN_PB08D_SERCOM4_PAD0            40  /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */
+#define MUX_PB08D_SERCOM4_PAD0             3
+#define PINMUX_PB08D_SERCOM4_PAD0  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
+#define PORT_PB08D_SERCOM4_PAD0    (1u <<  8)
+#define PIN_PB12C_SERCOM4_PAD0            44  /**< \brief SERCOM4 signal: PAD0 on PB12 mux C */
+#define MUX_PB12C_SERCOM4_PAD0             2
+#define PINMUX_PB12C_SERCOM4_PAD0  ((PIN_PB12C_SERCOM4_PAD0 << 16) | MUX_PB12C_SERCOM4_PAD0)
+#define PORT_PB12C_SERCOM4_PAD0    (1u << 12)
+#define PIN_PA13D_SERCOM4_PAD1            13  /**< \brief SERCOM4 signal: PAD1 on PA13 mux D */
+#define MUX_PA13D_SERCOM4_PAD1             3
+#define PINMUX_PA13D_SERCOM4_PAD1  ((PIN_PA13D_SERCOM4_PAD1 << 16) | MUX_PA13D_SERCOM4_PAD1)
+#define PORT_PA13D_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB09D_SERCOM4_PAD1            41  /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */
+#define MUX_PB09D_SERCOM4_PAD1             3
+#define PINMUX_PB09D_SERCOM4_PAD1  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
+#define PORT_PB09D_SERCOM4_PAD1    (1u <<  9)
+#define PIN_PB13C_SERCOM4_PAD1            45  /**< \brief SERCOM4 signal: PAD1 on PB13 mux C */
+#define MUX_PB13C_SERCOM4_PAD1             2
+#define PINMUX_PB13C_SERCOM4_PAD1  ((PIN_PB13C_SERCOM4_PAD1 << 16) | MUX_PB13C_SERCOM4_PAD1)
+#define PORT_PB13C_SERCOM4_PAD1    (1u << 13)
+#define PIN_PB31F_SERCOM4_PAD1            63  /**< \brief SERCOM4 signal: PAD1 on PB31 mux F */
+#define MUX_PB31F_SERCOM4_PAD1             5
+#define PINMUX_PB31F_SERCOM4_PAD1  ((PIN_PB31F_SERCOM4_PAD1 << 16) | MUX_PB31F_SERCOM4_PAD1)
+#define PORT_PB31F_SERCOM4_PAD1    (1u << 31)
+#define PIN_PA14D_SERCOM4_PAD2            14  /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */
+#define MUX_PA14D_SERCOM4_PAD2             3
+#define PINMUX_PA14D_SERCOM4_PAD2  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
+#define PORT_PA14D_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB10D_SERCOM4_PAD2            42  /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
+#define MUX_PB10D_SERCOM4_PAD2             3
+#define PINMUX_PB10D_SERCOM4_PAD2  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
+#define PORT_PB10D_SERCOM4_PAD2    (1u << 10)
+#define PIN_PB14C_SERCOM4_PAD2            46  /**< \brief SERCOM4 signal: PAD2 on PB14 mux C */
+#define MUX_PB14C_SERCOM4_PAD2             2
+#define PINMUX_PB14C_SERCOM4_PAD2  ((PIN_PB14C_SERCOM4_PAD2 << 16) | MUX_PB14C_SERCOM4_PAD2)
+#define PORT_PB14C_SERCOM4_PAD2    (1u << 14)
+#define PIN_PB30F_SERCOM4_PAD2            62  /**< \brief SERCOM4 signal: PAD2 on PB30 mux F */
+#define MUX_PB30F_SERCOM4_PAD2             5
+#define PINMUX_PB30F_SERCOM4_PAD2  ((PIN_PB30F_SERCOM4_PAD2 << 16) | MUX_PB30F_SERCOM4_PAD2)
+#define PORT_PB30F_SERCOM4_PAD2    (1u << 30)
+#define PIN_PA15D_SERCOM4_PAD3            15  /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */
+#define MUX_PA15D_SERCOM4_PAD3             3
+#define PINMUX_PA15D_SERCOM4_PAD3  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
+#define PORT_PA15D_SERCOM4_PAD3    (1u << 15)
+#define PIN_PB11D_SERCOM4_PAD3            43  /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */
+#define MUX_PB11D_SERCOM4_PAD3             3
+#define PINMUX_PB11D_SERCOM4_PAD3  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
+#define PORT_PB11D_SERCOM4_PAD3    (1u << 11)
+#define PIN_PB15C_SERCOM4_PAD3            47  /**< \brief SERCOM4 signal: PAD3 on PB15 mux C */
+#define MUX_PB15C_SERCOM4_PAD3             2
+#define PINMUX_PB15C_SERCOM4_PAD3  ((PIN_PB15C_SERCOM4_PAD3 << 16) | MUX_PB15C_SERCOM4_PAD3)
+#define PORT_PB15C_SERCOM4_PAD3    (1u << 15)
+/* ========== PORT definition for SERCOM5 peripheral ========== */
+#define PIN_PB16C_SERCOM5_PAD0            48  /**< \brief SERCOM5 signal: PAD0 on PB16 mux C */
+#define MUX_PB16C_SERCOM5_PAD0             2
+#define PINMUX_PB16C_SERCOM5_PAD0  ((PIN_PB16C_SERCOM5_PAD0 << 16) | MUX_PB16C_SERCOM5_PAD0)
+#define PORT_PB16C_SERCOM5_PAD0    (1u << 16)
+#define PIN_PA22D_SERCOM5_PAD0            22  /**< \brief SERCOM5 signal: PAD0 on PA22 mux D */
+#define MUX_PA22D_SERCOM5_PAD0             3
+#define PINMUX_PA22D_SERCOM5_PAD0  ((PIN_PA22D_SERCOM5_PAD0 << 16) | MUX_PA22D_SERCOM5_PAD0)
+#define PORT_PA22D_SERCOM5_PAD0    (1u << 22)
+#define PIN_PB02D_SERCOM5_PAD0            34  /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */
+#define MUX_PB02D_SERCOM5_PAD0             3
+#define PINMUX_PB02D_SERCOM5_PAD0  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
+#define PORT_PB02D_SERCOM5_PAD0    (1u <<  2)
+#define PIN_PB30D_SERCOM5_PAD0            62  /**< \brief SERCOM5 signal: PAD0 on PB30 mux D */
+#define MUX_PB30D_SERCOM5_PAD0             3
+#define PINMUX_PB30D_SERCOM5_PAD0  ((PIN_PB30D_SERCOM5_PAD0 << 16) | MUX_PB30D_SERCOM5_PAD0)
+#define PORT_PB30D_SERCOM5_PAD0    (1u << 30)
+#define PIN_PB17C_SERCOM5_PAD0            49  /**< \brief SERCOM5 signal: PAD0 on PB17 mux C */
+#define MUX_PB17C_SERCOM5_PAD0             2
+#define PINMUX_PB17C_SERCOM5_PAD0  ((PIN_PB17C_SERCOM5_PAD0 << 16) | MUX_PB17C_SERCOM5_PAD0)
+#define PORT_PB17C_SERCOM5_PAD0    (1u << 17)
+#define PIN_PB17C_SERCOM5_PAD1            49  /**< \brief SERCOM5 signal: PAD1 on PB17 mux C */
+#define MUX_PB17C_SERCOM5_PAD1             2
+#define PINMUX_PB17C_SERCOM5_PAD1  ((PIN_PB17C_SERCOM5_PAD1 << 16) | MUX_PB17C_SERCOM5_PAD1)
+#define PORT_PB17C_SERCOM5_PAD1    (1u << 17)
+#define PIN_PA23D_SERCOM5_PAD1            23  /**< \brief SERCOM5 signal: PAD1 on PA23 mux D */
+#define MUX_PA23D_SERCOM5_PAD1             3
+#define PINMUX_PA23D_SERCOM5_PAD1  ((PIN_PA23D_SERCOM5_PAD1 << 16) | MUX_PA23D_SERCOM5_PAD1)
+#define PORT_PA23D_SERCOM5_PAD1    (1u << 23)
+#define PIN_PB03D_SERCOM5_PAD1            35  /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */
+#define MUX_PB03D_SERCOM5_PAD1             3
+#define PINMUX_PB03D_SERCOM5_PAD1  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
+#define PORT_PB03D_SERCOM5_PAD1    (1u <<  3)
+#define PIN_PB31D_SERCOM5_PAD1            63  /**< \brief SERCOM5 signal: PAD1 on PB31 mux D */
+#define MUX_PB31D_SERCOM5_PAD1             3
+#define PINMUX_PB31D_SERCOM5_PAD1  ((PIN_PB31D_SERCOM5_PAD1 << 16) | MUX_PB31D_SERCOM5_PAD1)
+#define PORT_PB31D_SERCOM5_PAD1    (1u << 31)
+#define PIN_PB16C_SERCOM5_PAD1            48  /**< \brief SERCOM5 signal: PAD1 on PB16 mux C */
+#define MUX_PB16C_SERCOM5_PAD1             2
+#define PINMUX_PB16C_SERCOM5_PAD1  ((PIN_PB16C_SERCOM5_PAD1 << 16) | MUX_PB16C_SERCOM5_PAD1)
+#define PORT_PB16C_SERCOM5_PAD1    (1u << 16)
+#define PIN_PA24D_SERCOM5_PAD2            24  /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */
+#define MUX_PA24D_SERCOM5_PAD2             3
+#define PINMUX_PA24D_SERCOM5_PAD2  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
+#define PORT_PA24D_SERCOM5_PAD2    (1u << 24)
+#define PIN_PB00D_SERCOM5_PAD2            32  /**< \brief SERCOM5 signal: PAD2 on PB00 mux D */
+#define MUX_PB00D_SERCOM5_PAD2             3
+#define PINMUX_PB00D_SERCOM5_PAD2  ((PIN_PB00D_SERCOM5_PAD2 << 16) | MUX_PB00D_SERCOM5_PAD2)
+#define PORT_PB00D_SERCOM5_PAD2    (1u <<  0)
+#define PIN_PB22D_SERCOM5_PAD2            54  /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */
+#define MUX_PB22D_SERCOM5_PAD2             3
+#define PINMUX_PB22D_SERCOM5_PAD2  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
+#define PORT_PB22D_SERCOM5_PAD2    (1u << 22)
+#define PIN_PA20C_SERCOM5_PAD2            20  /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */
+#define MUX_PA20C_SERCOM5_PAD2             2
+#define PINMUX_PA20C_SERCOM5_PAD2  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
+#define PORT_PA20C_SERCOM5_PAD2    (1u << 20)
+#define PIN_PA25D_SERCOM5_PAD3            25  /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */
+#define MUX_PA25D_SERCOM5_PAD3             3
+#define PINMUX_PA25D_SERCOM5_PAD3  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
+#define PORT_PA25D_SERCOM5_PAD3    (1u << 25)
+#define PIN_PB01D_SERCOM5_PAD3            33  /**< \brief SERCOM5 signal: PAD3 on PB01 mux D */
+#define MUX_PB01D_SERCOM5_PAD3             3
+#define PINMUX_PB01D_SERCOM5_PAD3  ((PIN_PB01D_SERCOM5_PAD3 << 16) | MUX_PB01D_SERCOM5_PAD3)
+#define PORT_PB01D_SERCOM5_PAD3    (1u <<  1)
+#define PIN_PB23D_SERCOM5_PAD3            55  /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */
+#define MUX_PB23D_SERCOM5_PAD3             3
+#define PINMUX_PB23D_SERCOM5_PAD3  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
+#define PORT_PB23D_SERCOM5_PAD3    (1u << 23)
+#define PIN_PA21C_SERCOM5_PAD3            21  /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */
+#define MUX_PA21C_SERCOM5_PAD3             2
+#define PINMUX_PA21C_SERCOM5_PAD3  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
+#define PORT_PA21C_SERCOM5_PAD3    (1u << 21)
+/* ========== PORT definition for TCC0 peripheral ========== */
+#define PIN_PA04E_TCC0_WO0                 4  /**< \brief TCC0 signal: WO0 on PA04 mux E */
+#define MUX_PA04E_TCC0_WO0                 4
+#define PINMUX_PA04E_TCC0_WO0      ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0)
+#define PORT_PA04E_TCC0_WO0        (1u <<  4)
+#define PIN_PA08E_TCC0_WO0                 8  /**< \brief TCC0 signal: WO0 on PA08 mux E */
+#define MUX_PA08E_TCC0_WO0                 4
+#define PINMUX_PA08E_TCC0_WO0      ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0)
+#define PORT_PA08E_TCC0_WO0        (1u <<  8)
+#define PIN_PB30E_TCC0_WO0                62  /**< \brief TCC0 signal: WO0 on PB30 mux E */
+#define MUX_PB30E_TCC0_WO0                 4
+#define PINMUX_PB30E_TCC0_WO0      ((PIN_PB30E_TCC0_WO0 << 16) | MUX_PB30E_TCC0_WO0)
+#define PORT_PB30E_TCC0_WO0        (1u << 30)
+#define PIN_PA16F_TCC0_WO0                16  /**< \brief TCC0 signal: WO0 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO0                 5
+#define PINMUX_PA16F_TCC0_WO0      ((PIN_PA16F_TCC0_WO0 << 16) | MUX_PA16F_TCC0_WO0)
+#define PORT_PA16F_TCC0_WO0        (1u << 16)
+#define PIN_PA05E_TCC0_WO1                 5  /**< \brief TCC0 signal: WO1 on PA05 mux E */
+#define MUX_PA05E_TCC0_WO1                 4
+#define PINMUX_PA05E_TCC0_WO1      ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1)
+#define PORT_PA05E_TCC0_WO1        (1u <<  5)
+#define PIN_PA09E_TCC0_WO1                 9  /**< \brief TCC0 signal: WO1 on PA09 mux E */
+#define MUX_PA09E_TCC0_WO1                 4
+#define PINMUX_PA09E_TCC0_WO1      ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1)
+#define PORT_PA09E_TCC0_WO1        (1u <<  9)
+#define PIN_PB31E_TCC0_WO1                63  /**< \brief TCC0 signal: WO1 on PB31 mux E */
+#define MUX_PB31E_TCC0_WO1                 4
+#define PINMUX_PB31E_TCC0_WO1      ((PIN_PB31E_TCC0_WO1 << 16) | MUX_PB31E_TCC0_WO1)
+#define PORT_PB31E_TCC0_WO1        (1u << 31)
+#define PIN_PA17F_TCC0_WO1                17  /**< \brief TCC0 signal: WO1 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO1                 5
+#define PINMUX_PA17F_TCC0_WO1      ((PIN_PA17F_TCC0_WO1 << 16) | MUX_PA17F_TCC0_WO1)
+#define PORT_PA17F_TCC0_WO1        (1u << 17)
+#define PIN_PA10F_TCC0_WO2                10  /**< \brief TCC0 signal: WO2 on PA10 mux F */
+#define MUX_PA10F_TCC0_WO2                 5
+#define PINMUX_PA10F_TCC0_WO2      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
+#define PORT_PA10F_TCC0_WO2        (1u << 10)
+#define PIN_PA18F_TCC0_WO2                18  /**< \brief TCC0 signal: WO2 on PA18 mux F */
+#define MUX_PA18F_TCC0_WO2                 5
+#define PINMUX_PA18F_TCC0_WO2      ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2)
+#define PORT_PA18F_TCC0_WO2        (1u << 18)
+#define PIN_PA11F_TCC0_WO3                11  /**< \brief TCC0 signal: WO3 on PA11 mux F */
+#define MUX_PA11F_TCC0_WO3                 5
+#define PINMUX_PA11F_TCC0_WO3      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
+#define PORT_PA11F_TCC0_WO3        (1u << 11)
+#define PIN_PA19F_TCC0_WO3                19  /**< \brief TCC0 signal: WO3 on PA19 mux F */
+#define MUX_PA19F_TCC0_WO3                 5
+#define PINMUX_PA19F_TCC0_WO3      ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3)
+#define PORT_PA19F_TCC0_WO3        (1u << 19)
+#define PIN_PA14F_TCC0_WO4                14  /**< \brief TCC0 signal: WO4 on PA14 mux F */
+#define MUX_PA14F_TCC0_WO4                 5
+#define PINMUX_PA14F_TCC0_WO4      ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4)
+#define PORT_PA14F_TCC0_WO4        (1u << 14)
+#define PIN_PA22F_TCC0_WO4                22  /**< \brief TCC0 signal: WO4 on PA22 mux F */
+#define MUX_PA22F_TCC0_WO4                 5
+#define PINMUX_PA22F_TCC0_WO4      ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4)
+#define PORT_PA22F_TCC0_WO4        (1u << 22)
+#define PIN_PB10F_TCC0_WO4                42  /**< \brief TCC0 signal: WO4 on PB10 mux F */
+#define MUX_PB10F_TCC0_WO4                 5
+#define PINMUX_PB10F_TCC0_WO4      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
+#define PORT_PB10F_TCC0_WO4        (1u << 10)
+#define PIN_PB16F_TCC0_WO4                48  /**< \brief TCC0 signal: WO4 on PB16 mux F */
+#define MUX_PB16F_TCC0_WO4                 5
+#define PINMUX_PB16F_TCC0_WO4      ((PIN_PB16F_TCC0_WO4 << 16) | MUX_PB16F_TCC0_WO4)
+#define PORT_PB16F_TCC0_WO4        (1u << 16)
+#define PIN_PA15F_TCC0_WO5                15  /**< \brief TCC0 signal: WO5 on PA15 mux F */
+#define MUX_PA15F_TCC0_WO5                 5
+#define PINMUX_PA15F_TCC0_WO5      ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5)
+#define PORT_PA15F_TCC0_WO5        (1u << 15)
+#define PIN_PA23F_TCC0_WO5                23  /**< \brief TCC0 signal: WO5 on PA23 mux F */
+#define MUX_PA23F_TCC0_WO5                 5
+#define PINMUX_PA23F_TCC0_WO5      ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5)
+#define PORT_PA23F_TCC0_WO5        (1u << 23)
+#define PIN_PB11F_TCC0_WO5                43  /**< \brief TCC0 signal: WO5 on PB11 mux F */
+#define MUX_PB11F_TCC0_WO5                 5
+#define PINMUX_PB11F_TCC0_WO5      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
+#define PORT_PB11F_TCC0_WO5        (1u << 11)
+#define PIN_PB17F_TCC0_WO5                49  /**< \brief TCC0 signal: WO5 on PB17 mux F */
+#define MUX_PB17F_TCC0_WO5                 5
+#define PINMUX_PB17F_TCC0_WO5      ((PIN_PB17F_TCC0_WO5 << 16) | MUX_PB17F_TCC0_WO5)
+#define PORT_PB17F_TCC0_WO5        (1u << 17)
+#define PIN_PA12F_TCC0_WO6                12  /**< \brief TCC0 signal: WO6 on PA12 mux F */
+#define MUX_PA12F_TCC0_WO6                 5
+#define PINMUX_PA12F_TCC0_WO6      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
+#define PORT_PA12F_TCC0_WO6        (1u << 12)
+#define PIN_PA20F_TCC0_WO6                20  /**< \brief TCC0 signal: WO6 on PA20 mux F */
+#define MUX_PA20F_TCC0_WO6                 5
+#define PINMUX_PA20F_TCC0_WO6      ((PIN_PA20F_TCC0_WO6 << 16) | MUX_PA20F_TCC0_WO6)
+#define PORT_PA20F_TCC0_WO6        (1u << 20)
+#define PIN_PB12F_TCC0_WO6                44  /**< \brief TCC0 signal: WO6 on PB12 mux F */
+#define MUX_PB12F_TCC0_WO6                 5
+#define PINMUX_PB12F_TCC0_WO6      ((PIN_PB12F_TCC0_WO6 << 16) | MUX_PB12F_TCC0_WO6)
+#define PORT_PB12F_TCC0_WO6        (1u << 12)
+#define PIN_PA16F_TCC0_WO6                16  /**< \brief TCC0 signal: WO6 on PA16 mux F */
+#define MUX_PA16F_TCC0_WO6                 5
+#define PINMUX_PA16F_TCC0_WO6      ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6)
+#define PORT_PA16F_TCC0_WO6        (1u << 16)
+#define PIN_PA13F_TCC0_WO7                13  /**< \brief TCC0 signal: WO7 on PA13 mux F */
+#define MUX_PA13F_TCC0_WO7                 5
+#define PINMUX_PA13F_TCC0_WO7      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
+#define PORT_PA13F_TCC0_WO7        (1u << 13)
+#define PIN_PA21F_TCC0_WO7                21  /**< \brief TCC0 signal: WO7 on PA21 mux F */
+#define MUX_PA21F_TCC0_WO7                 5
+#define PINMUX_PA21F_TCC0_WO7      ((PIN_PA21F_TCC0_WO7 << 16) | MUX_PA21F_TCC0_WO7)
+#define PORT_PA21F_TCC0_WO7        (1u << 21)
+#define PIN_PB13F_TCC0_WO7                45  /**< \brief TCC0 signal: WO7 on PB13 mux F */
+#define MUX_PB13F_TCC0_WO7                 5
+#define PINMUX_PB13F_TCC0_WO7      ((PIN_PB13F_TCC0_WO7 << 16) | MUX_PB13F_TCC0_WO7)
+#define PORT_PB13F_TCC0_WO7        (1u << 13)
+#define PIN_PA17F_TCC0_WO7                17  /**< \brief TCC0 signal: WO7 on PA17 mux F */
+#define MUX_PA17F_TCC0_WO7                 5
+#define PINMUX_PA17F_TCC0_WO7      ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7)
+#define PORT_PA17F_TCC0_WO7        (1u << 17)
+/* ========== PORT definition for TCC1 peripheral ========== */
+#define PIN_PA06E_TCC1_WO0                 6  /**< \brief TCC1 signal: WO0 on PA06 mux E */
+#define MUX_PA06E_TCC1_WO0                 4
+#define PINMUX_PA06E_TCC1_WO0      ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0)
+#define PORT_PA06E_TCC1_WO0        (1u <<  6)
+#define PIN_PA10E_TCC1_WO0                10  /**< \brief TCC1 signal: WO0 on PA10 mux E */
+#define MUX_PA10E_TCC1_WO0                 4
+#define PINMUX_PA10E_TCC1_WO0      ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
+#define PORT_PA10E_TCC1_WO0        (1u << 10)
+#define PIN_PA30E_TCC1_WO0                30  /**< \brief TCC1 signal: WO0 on PA30 mux E */
+#define MUX_PA30E_TCC1_WO0                 4
+#define PINMUX_PA30E_TCC1_WO0      ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0)
+#define PORT_PA30E_TCC1_WO0        (1u << 30)
+#define PIN_PA07E_TCC1_WO1                 7  /**< \brief TCC1 signal: WO1 on PA07 mux E */
+#define MUX_PA07E_TCC1_WO1                 4
+#define PINMUX_PA07E_TCC1_WO1      ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
+#define PORT_PA07E_TCC1_WO1        (1u <<  7)
+#define PIN_PA11E_TCC1_WO1                11  /**< \brief TCC1 signal: WO1 on PA11 mux E */
+#define MUX_PA11E_TCC1_WO1                 4
+#define PINMUX_PA11E_TCC1_WO1      ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1)
+#define PORT_PA11E_TCC1_WO1        (1u << 11)
+#define PIN_PA31E_TCC1_WO1                31  /**< \brief TCC1 signal: WO1 on PA31 mux E */
+#define MUX_PA31E_TCC1_WO1                 4
+#define PINMUX_PA31E_TCC1_WO1      ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1)
+#define PORT_PA31E_TCC1_WO1        (1u << 31)
+#define PIN_PA08F_TCC1_WO2                 8  /**< \brief TCC1 signal: WO2 on PA08 mux F */
+#define MUX_PA08F_TCC1_WO2                 5
+#define PINMUX_PA08F_TCC1_WO2      ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2)
+#define PORT_PA08F_TCC1_WO2        (1u <<  8)
+#define PIN_PA24F_TCC1_WO2                24  /**< \brief TCC1 signal: WO2 on PA24 mux F */
+#define MUX_PA24F_TCC1_WO2                 5
+#define PINMUX_PA24F_TCC1_WO2      ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2)
+#define PORT_PA24F_TCC1_WO2        (1u << 24)
+#define PIN_PB30F_TCC1_WO2                62  /**< \brief TCC1 signal: WO2 on PB30 mux F */
+#define MUX_PB30F_TCC1_WO2                 5
+#define PINMUX_PB30F_TCC1_WO2      ((PIN_PB30F_TCC1_WO2 << 16) | MUX_PB30F_TCC1_WO2)
+#define PORT_PB30F_TCC1_WO2        (1u << 30)
+#define PIN_PA09F_TCC1_WO3                 9  /**< \brief TCC1 signal: WO3 on PA09 mux F */
+#define MUX_PA09F_TCC1_WO3                 5
+#define PINMUX_PA09F_TCC1_WO3      ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3)
+#define PORT_PA09F_TCC1_WO3        (1u <<  9)
+#define PIN_PA25F_TCC1_WO3                25  /**< \brief TCC1 signal: WO3 on PA25 mux F */
+#define MUX_PA25F_TCC1_WO3                 5
+#define PINMUX_PA25F_TCC1_WO3      ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3)
+#define PORT_PA25F_TCC1_WO3        (1u << 25)
+#define PIN_PB31F_TCC1_WO3                63  /**< \brief TCC1 signal: WO3 on PB31 mux F */
+#define MUX_PB31F_TCC1_WO3                 5
+#define PINMUX_PB31F_TCC1_WO3      ((PIN_PB31F_TCC1_WO3 << 16) | MUX_PB31F_TCC1_WO3)
+#define PORT_PB31F_TCC1_WO3        (1u << 31)
+/* ========== PORT definition for TCC2 peripheral ========== */
+#define PIN_PA12E_TCC2_WO0                12  /**< \brief TCC2 signal: WO0 on PA12 mux E */
+#define MUX_PA12E_TCC2_WO0                 4
+#define PINMUX_PA12E_TCC2_WO0      ((PIN_PA12E_TCC2_WO0 << 16) | MUX_PA12E_TCC2_WO0)
+#define PORT_PA12E_TCC2_WO0        (1u << 12)
+#define PIN_PA16E_TCC2_WO0                16  /**< \brief TCC2 signal: WO0 on PA16 mux E */
+#define MUX_PA16E_TCC2_WO0                 4
+#define PINMUX_PA16E_TCC2_WO0      ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0)
+#define PORT_PA16E_TCC2_WO0        (1u << 16)
+#define PIN_PA00E_TCC2_WO0                 0  /**< \brief TCC2 signal: WO0 on PA00 mux E */
+#define MUX_PA00E_TCC2_WO0                 4
+#define PINMUX_PA00E_TCC2_WO0      ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0)
+#define PORT_PA00E_TCC2_WO0        (1u <<  0)
+#define PIN_PA13E_TCC2_WO1                13  /**< \brief TCC2 signal: WO1 on PA13 mux E */
+#define MUX_PA13E_TCC2_WO1                 4
+#define PINMUX_PA13E_TCC2_WO1      ((PIN_PA13E_TCC2_WO1 << 16) | MUX_PA13E_TCC2_WO1)
+#define PORT_PA13E_TCC2_WO1        (1u << 13)
+#define PIN_PA17E_TCC2_WO1                17  /**< \brief TCC2 signal: WO1 on PA17 mux E */
+#define MUX_PA17E_TCC2_WO1                 4
+#define PINMUX_PA17E_TCC2_WO1      ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1)
+#define PORT_PA17E_TCC2_WO1        (1u << 17)
+#define PIN_PA01E_TCC2_WO1                 1  /**< \brief TCC2 signal: WO1 on PA01 mux E */
+#define MUX_PA01E_TCC2_WO1                 4
+#define PINMUX_PA01E_TCC2_WO1      ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1)
+#define PORT_PA01E_TCC2_WO1        (1u <<  1)
+/* ========== PORT definition for TC3 peripheral ========== */
+#define PIN_PA18E_TC3_WO0                 18  /**< \brief TC3 signal: WO0 on PA18 mux E */
+#define MUX_PA18E_TC3_WO0                  4
+#define PINMUX_PA18E_TC3_WO0       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
+#define PORT_PA18E_TC3_WO0         (1u << 18)
+#define PIN_PA14E_TC3_WO0                 14  /**< \brief TC3 signal: WO0 on PA14 mux E */
+#define MUX_PA14E_TC3_WO0                  4
+#define PINMUX_PA14E_TC3_WO0       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
+#define PORT_PA14E_TC3_WO0         (1u << 14)
+#define PIN_PA19E_TC3_WO1                 19  /**< \brief TC3 signal: WO1 on PA19 mux E */
+#define MUX_PA19E_TC3_WO1                  4
+#define PINMUX_PA19E_TC3_WO1       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
+#define PORT_PA19E_TC3_WO1         (1u << 19)
+#define PIN_PA15E_TC3_WO1                 15  /**< \brief TC3 signal: WO1 on PA15 mux E */
+#define MUX_PA15E_TC3_WO1                  4
+#define PINMUX_PA15E_TC3_WO1       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
+#define PORT_PA15E_TC3_WO1         (1u << 15)
+/* ========== PORT definition for TC4 peripheral ========== */
+#define PIN_PA22E_TC4_WO0                 22  /**< \brief TC4 signal: WO0 on PA22 mux E */
+#define MUX_PA22E_TC4_WO0                  4
+#define PINMUX_PA22E_TC4_WO0       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
+#define PORT_PA22E_TC4_WO0         (1u << 22)
+#define PIN_PB08E_TC4_WO0                 40  /**< \brief TC4 signal: WO0 on PB08 mux E */
+#define MUX_PB08E_TC4_WO0                  4
+#define PINMUX_PB08E_TC4_WO0       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
+#define PORT_PB08E_TC4_WO0         (1u <<  8)
+#define PIN_PB12E_TC4_WO0                 44  /**< \brief TC4 signal: WO0 on PB12 mux E */
+#define MUX_PB12E_TC4_WO0                  4
+#define PINMUX_PB12E_TC4_WO0       ((PIN_PB12E_TC4_WO0 << 16) | MUX_PB12E_TC4_WO0)
+#define PORT_PB12E_TC4_WO0         (1u << 12)
+#define PIN_PA23E_TC4_WO1                 23  /**< \brief TC4 signal: WO1 on PA23 mux E */
+#define MUX_PA23E_TC4_WO1                  4
+#define PINMUX_PA23E_TC4_WO1       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
+#define PORT_PA23E_TC4_WO1         (1u << 23)
+#define PIN_PB09E_TC4_WO1                 41  /**< \brief TC4 signal: WO1 on PB09 mux E */
+#define MUX_PB09E_TC4_WO1                  4
+#define PINMUX_PB09E_TC4_WO1       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
+#define PORT_PB09E_TC4_WO1         (1u <<  9)
+#define PIN_PB13E_TC4_WO1                 45  /**< \brief TC4 signal: WO1 on PB13 mux E */
+#define MUX_PB13E_TC4_WO1                  4
+#define PINMUX_PB13E_TC4_WO1       ((PIN_PB13E_TC4_WO1 << 16) | MUX_PB13E_TC4_WO1)
+#define PORT_PB13E_TC4_WO1         (1u << 13)
+/* ========== PORT definition for TC5 peripheral ========== */
+#define PIN_PA24E_TC5_WO0                 24  /**< \brief TC5 signal: WO0 on PA24 mux E */
+#define MUX_PA24E_TC5_WO0                  4
+#define PINMUX_PA24E_TC5_WO0       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
+#define PORT_PA24E_TC5_WO0         (1u << 24)
+#define PIN_PB10E_TC5_WO0                 42  /**< \brief TC5 signal: WO0 on PB10 mux E */
+#define MUX_PB10E_TC5_WO0                  4
+#define PINMUX_PB10E_TC5_WO0       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
+#define PORT_PB10E_TC5_WO0         (1u << 10)
+#define PIN_PB14E_TC5_WO0                 46  /**< \brief TC5 signal: WO0 on PB14 mux E */
+#define MUX_PB14E_TC5_WO0                  4
+#define PINMUX_PB14E_TC5_WO0       ((PIN_PB14E_TC5_WO0 << 16) | MUX_PB14E_TC5_WO0)
+#define PORT_PB14E_TC5_WO0         (1u << 14)
+#define PIN_PA25E_TC5_WO1                 25  /**< \brief TC5 signal: WO1 on PA25 mux E */
+#define MUX_PA25E_TC5_WO1                  4
+#define PINMUX_PA25E_TC5_WO1       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
+#define PORT_PA25E_TC5_WO1         (1u << 25)
+#define PIN_PB11E_TC5_WO1                 43  /**< \brief TC5 signal: WO1 on PB11 mux E */
+#define MUX_PB11E_TC5_WO1                  4
+#define PINMUX_PB11E_TC5_WO1       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
+#define PORT_PB11E_TC5_WO1         (1u << 11)
+#define PIN_PB15E_TC5_WO1                 47  /**< \brief TC5 signal: WO1 on PB15 mux E */
+#define MUX_PB15E_TC5_WO1                  4
+#define PINMUX_PB15E_TC5_WO1       ((PIN_PB15E_TC5_WO1 << 16) | MUX_PB15E_TC5_WO1)
+#define PORT_PB15E_TC5_WO1         (1u << 15)
+/* ========== PORT definition for TC6 peripheral ========== */
+#define PIN_PB02E_TC6_WO0                 34  /**< \brief TC6 signal: WO0 on PB02 mux E */
+#define MUX_PB02E_TC6_WO0                  4
+#define PINMUX_PB02E_TC6_WO0       ((PIN_PB02E_TC6_WO0 << 16) | MUX_PB02E_TC6_WO0)
+#define PORT_PB02E_TC6_WO0         (1u <<  2)
+#define PIN_PB16E_TC6_WO0                 48  /**< \brief TC6 signal: WO0 on PB16 mux E */
+#define MUX_PB16E_TC6_WO0                  4
+#define PINMUX_PB16E_TC6_WO0       ((PIN_PB16E_TC6_WO0 << 16) | MUX_PB16E_TC6_WO0)
+#define PORT_PB16E_TC6_WO0         (1u << 16)
+#define PIN_PB03E_TC6_WO1                 35  /**< \brief TC6 signal: WO1 on PB03 mux E */
+#define MUX_PB03E_TC6_WO1                  4
+#define PINMUX_PB03E_TC6_WO1       ((PIN_PB03E_TC6_WO1 << 16) | MUX_PB03E_TC6_WO1)
+#define PORT_PB03E_TC6_WO1         (1u <<  3)
+#define PIN_PB17E_TC6_WO1                 49  /**< \brief TC6 signal: WO1 on PB17 mux E */
+#define MUX_PB17E_TC6_WO1                  4
+#define PINMUX_PB17E_TC6_WO1       ((PIN_PB17E_TC6_WO1 << 16) | MUX_PB17E_TC6_WO1)
+#define PORT_PB17E_TC6_WO1         (1u << 17)
+/* ========== PORT definition for TC7 peripheral ========== */
+#define PIN_PA20E_TC7_WO0                 20  /**< \brief TC7 signal: WO0 on PA20 mux E */
+#define MUX_PA20E_TC7_WO0                  4
+#define PINMUX_PA20E_TC7_WO0       ((PIN_PA20E_TC7_WO0 << 16) | MUX_PA20E_TC7_WO0)
+#define PORT_PA20E_TC7_WO0         (1u << 20)
+#define PIN_PB00E_TC7_WO0                 32  /**< \brief TC7 signal: WO0 on PB00 mux E */
+#define MUX_PB00E_TC7_WO0                  4
+#define PINMUX_PB00E_TC7_WO0       ((PIN_PB00E_TC7_WO0 << 16) | MUX_PB00E_TC7_WO0)
+#define PORT_PB00E_TC7_WO0         (1u <<  0)
+#define PIN_PB22E_TC7_WO0                 54  /**< \brief TC7 signal: WO0 on PB22 mux E */
+#define MUX_PB22E_TC7_WO0                  4
+#define PINMUX_PB22E_TC7_WO0       ((PIN_PB22E_TC7_WO0 << 16) | MUX_PB22E_TC7_WO0)
+#define PORT_PB22E_TC7_WO0         (1u << 22)
+#define PIN_PA21E_TC7_WO1                 21  /**< \brief TC7 signal: WO1 on PA21 mux E */
+#define MUX_PA21E_TC7_WO1                  4
+#define PINMUX_PA21E_TC7_WO1       ((PIN_PA21E_TC7_WO1 << 16) | MUX_PA21E_TC7_WO1)
+#define PORT_PA21E_TC7_WO1         (1u << 21)
+#define PIN_PB01E_TC7_WO1                 33  /**< \brief TC7 signal: WO1 on PB01 mux E */
+#define MUX_PB01E_TC7_WO1                  4
+#define PINMUX_PB01E_TC7_WO1       ((PIN_PB01E_TC7_WO1 << 16) | MUX_PB01E_TC7_WO1)
+#define PORT_PB01E_TC7_WO1         (1u <<  1)
+#define PIN_PB23E_TC7_WO1                 55  /**< \brief TC7 signal: WO1 on PB23 mux E */
+#define MUX_PB23E_TC7_WO1                  4
+#define PINMUX_PB23E_TC7_WO1       ((PIN_PB23E_TC7_WO1 << 16) | MUX_PB23E_TC7_WO1)
+#define PORT_PB23E_TC7_WO1         (1u << 23)
+/* ========== PORT definition for ADC peripheral ========== */
+#define PIN_PA02B_ADC_AIN0                 2  /**< \brief ADC signal: AIN0 on PA02 mux B */
+#define MUX_PA02B_ADC_AIN0                 1
+#define PINMUX_PA02B_ADC_AIN0      ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0)
+#define PORT_PA02B_ADC_AIN0        (1u <<  2)
+#define PIN_PA03B_ADC_AIN1                 3  /**< \brief ADC signal: AIN1 on PA03 mux B */
+#define MUX_PA03B_ADC_AIN1                 1
+#define PINMUX_PA03B_ADC_AIN1      ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1)
+#define PORT_PA03B_ADC_AIN1        (1u <<  3)
+#define PIN_PB08B_ADC_AIN2                40  /**< \brief ADC signal: AIN2 on PB08 mux B */
+#define MUX_PB08B_ADC_AIN2                 1
+#define PINMUX_PB08B_ADC_AIN2      ((PIN_PB08B_ADC_AIN2 << 16) | MUX_PB08B_ADC_AIN2)
+#define PORT_PB08B_ADC_AIN2        (1u <<  8)
+#define PIN_PB09B_ADC_AIN3                41  /**< \brief ADC signal: AIN3 on PB09 mux B */
+#define MUX_PB09B_ADC_AIN3                 1
+#define PINMUX_PB09B_ADC_AIN3      ((PIN_PB09B_ADC_AIN3 << 16) | MUX_PB09B_ADC_AIN3)
+#define PORT_PB09B_ADC_AIN3        (1u <<  9)
+#define PIN_PA04B_ADC_AIN4                 4  /**< \brief ADC signal: AIN4 on PA04 mux B */
+#define MUX_PA04B_ADC_AIN4                 1
+#define PINMUX_PA04B_ADC_AIN4      ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4)
+#define PORT_PA04B_ADC_AIN4        (1u <<  4)
+#define PIN_PA05B_ADC_AIN5                 5  /**< \brief ADC signal: AIN5 on PA05 mux B */
+#define MUX_PA05B_ADC_AIN5                 1
+#define PINMUX_PA05B_ADC_AIN5      ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5)
+#define PORT_PA05B_ADC_AIN5        (1u <<  5)
+#define PIN_PA06B_ADC_AIN6                 6  /**< \brief ADC signal: AIN6 on PA06 mux B */
+#define MUX_PA06B_ADC_AIN6                 1
+#define PINMUX_PA06B_ADC_AIN6      ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6)
+#define PORT_PA06B_ADC_AIN6        (1u <<  6)
+#define PIN_PA07B_ADC_AIN7                 7  /**< \brief ADC signal: AIN7 on PA07 mux B */
+#define MUX_PA07B_ADC_AIN7                 1
+#define PINMUX_PA07B_ADC_AIN7      ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7)
+#define PORT_PA07B_ADC_AIN7        (1u <<  7)
+#define PIN_PB00B_ADC_AIN8                32  /**< \brief ADC signal: AIN8 on PB00 mux B */
+#define MUX_PB00B_ADC_AIN8                 1
+#define PINMUX_PB00B_ADC_AIN8      ((PIN_PB00B_ADC_AIN8 << 16) | MUX_PB00B_ADC_AIN8)
+#define PORT_PB00B_ADC_AIN8        (1u <<  0)
+#define PIN_PB01B_ADC_AIN9                33  /**< \brief ADC signal: AIN9 on PB01 mux B */
+#define MUX_PB01B_ADC_AIN9                 1
+#define PINMUX_PB01B_ADC_AIN9      ((PIN_PB01B_ADC_AIN9 << 16) | MUX_PB01B_ADC_AIN9)
+#define PORT_PB01B_ADC_AIN9        (1u <<  1)
+#define PIN_PB02B_ADC_AIN10               34  /**< \brief ADC signal: AIN10 on PB02 mux B */
+#define MUX_PB02B_ADC_AIN10                1
+#define PINMUX_PB02B_ADC_AIN10     ((PIN_PB02B_ADC_AIN10 << 16) | MUX_PB02B_ADC_AIN10)
+#define PORT_PB02B_ADC_AIN10       (1u <<  2)
+#define PIN_PB03B_ADC_AIN11               35  /**< \brief ADC signal: AIN11 on PB03 mux B */
+#define MUX_PB03B_ADC_AIN11                1
+#define PINMUX_PB03B_ADC_AIN11     ((PIN_PB03B_ADC_AIN11 << 16) | MUX_PB03B_ADC_AIN11)
+#define PORT_PB03B_ADC_AIN11       (1u <<  3)
+#define PIN_PB04B_ADC_AIN12               36  /**< \brief ADC signal: AIN12 on PB04 mux B */
+#define MUX_PB04B_ADC_AIN12                1
+#define PINMUX_PB04B_ADC_AIN12     ((PIN_PB04B_ADC_AIN12 << 16) | MUX_PB04B_ADC_AIN12)
+#define PORT_PB04B_ADC_AIN12       (1u <<  4)
+#define PIN_PB05B_ADC_AIN13               37  /**< \brief ADC signal: AIN13 on PB05 mux B */
+#define MUX_PB05B_ADC_AIN13                1
+#define PINMUX_PB05B_ADC_AIN13     ((PIN_PB05B_ADC_AIN13 << 16) | MUX_PB05B_ADC_AIN13)
+#define PORT_PB05B_ADC_AIN13       (1u <<  5)
+#define PIN_PB06B_ADC_AIN14               38  /**< \brief ADC signal: AIN14 on PB06 mux B */
+#define MUX_PB06B_ADC_AIN14                1
+#define PINMUX_PB06B_ADC_AIN14     ((PIN_PB06B_ADC_AIN14 << 16) | MUX_PB06B_ADC_AIN14)
+#define PORT_PB06B_ADC_AIN14       (1u <<  6)
+#define PIN_PB07B_ADC_AIN15               39  /**< \brief ADC signal: AIN15 on PB07 mux B */
+#define MUX_PB07B_ADC_AIN15                1
+#define PINMUX_PB07B_ADC_AIN15     ((PIN_PB07B_ADC_AIN15 << 16) | MUX_PB07B_ADC_AIN15)
+#define PORT_PB07B_ADC_AIN15       (1u <<  7)
+#define PIN_PA08B_ADC_AIN16                8  /**< \brief ADC signal: AIN16 on PA08 mux B */
+#define MUX_PA08B_ADC_AIN16                1
+#define PINMUX_PA08B_ADC_AIN16     ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16)
+#define PORT_PA08B_ADC_AIN16       (1u <<  8)
+#define PIN_PA09B_ADC_AIN17                9  /**< \brief ADC signal: AIN17 on PA09 mux B */
+#define MUX_PA09B_ADC_AIN17                1
+#define PINMUX_PA09B_ADC_AIN17     ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17)
+#define PORT_PA09B_ADC_AIN17       (1u <<  9)
+#define PIN_PA10B_ADC_AIN18               10  /**< \brief ADC signal: AIN18 on PA10 mux B */
+#define MUX_PA10B_ADC_AIN18                1
+#define PINMUX_PA10B_ADC_AIN18     ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18)
+#define PORT_PA10B_ADC_AIN18       (1u << 10)
+#define PIN_PA11B_ADC_AIN19               11  /**< \brief ADC signal: AIN19 on PA11 mux B */
+#define MUX_PA11B_ADC_AIN19                1
+#define PINMUX_PA11B_ADC_AIN19     ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19)
+#define PORT_PA11B_ADC_AIN19       (1u << 11)
+#define PIN_PA04B_ADC_VREFP                4  /**< \brief ADC signal: VREFP on PA04 mux B */
+#define MUX_PA04B_ADC_VREFP                1
+#define PINMUX_PA04B_ADC_VREFP     ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP)
+#define PORT_PA04B_ADC_VREFP       (1u <<  4)
+/* ========== PORT definition for AC peripheral ========== */
+#define PIN_PA04B_AC_AIN0                  4  /**< \brief AC signal: AIN0 on PA04 mux B */
+#define MUX_PA04B_AC_AIN0                  1
+#define PINMUX_PA04B_AC_AIN0       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
+#define PORT_PA04B_AC_AIN0         (1u <<  4)
+#define PIN_PA05B_AC_AIN1                  5  /**< \brief AC signal: AIN1 on PA05 mux B */
+#define MUX_PA05B_AC_AIN1                  1
+#define PINMUX_PA05B_AC_AIN1       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
+#define PORT_PA05B_AC_AIN1         (1u <<  5)
+#define PIN_PA06B_AC_AIN2                  6  /**< \brief AC signal: AIN2 on PA06 mux B */
+#define MUX_PA06B_AC_AIN2                  1
+#define PINMUX_PA06B_AC_AIN2       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
+#define PORT_PA06B_AC_AIN2         (1u <<  6)
+#define PIN_PA07B_AC_AIN3                  7  /**< \brief AC signal: AIN3 on PA07 mux B */
+#define MUX_PA07B_AC_AIN3                  1
+#define PINMUX_PA07B_AC_AIN3       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
+#define PORT_PA07B_AC_AIN3         (1u <<  7)
+#define PIN_PA12H_AC_CMP0                 12  /**< \brief AC signal: CMP0 on PA12 mux H */
+#define MUX_PA12H_AC_CMP0                  7
+#define PINMUX_PA12H_AC_CMP0       ((PIN_PA12H_AC_CMP0 << 16) | MUX_PA12H_AC_CMP0)
+#define PORT_PA12H_AC_CMP0         (1u << 12)
+#define PIN_PA18H_AC_CMP0                 18  /**< \brief AC signal: CMP0 on PA18 mux H */
+#define MUX_PA18H_AC_CMP0                  7
+#define PINMUX_PA18H_AC_CMP0       ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0)
+#define PORT_PA18H_AC_CMP0         (1u << 18)
+#define PIN_PA13H_AC_CMP1                 13  /**< \brief AC signal: CMP1 on PA13 mux H */
+#define MUX_PA13H_AC_CMP1                  7
+#define PINMUX_PA13H_AC_CMP1       ((PIN_PA13H_AC_CMP1 << 16) | MUX_PA13H_AC_CMP1)
+#define PORT_PA13H_AC_CMP1         (1u << 13)
+#define PIN_PA19H_AC_CMP1                 19  /**< \brief AC signal: CMP1 on PA19 mux H */
+#define MUX_PA19H_AC_CMP1                  7
+#define PINMUX_PA19H_AC_CMP1       ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1)
+#define PORT_PA19H_AC_CMP1         (1u << 19)
+/* ========== PORT definition for DAC peripheral ========== */
+#define PIN_PA02B_DAC_VOUT                 2  /**< \brief DAC signal: VOUT on PA02 mux B */
+#define MUX_PA02B_DAC_VOUT                 1
+#define PINMUX_PA02B_DAC_VOUT      ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT)
+#define PORT_PA02B_DAC_VOUT        (1u <<  2)
+#define PIN_PA03B_DAC_VREFP                3  /**< \brief DAC signal: VREFP on PA03 mux B */
+#define MUX_PA03B_DAC_VREFP                1
+#define PINMUX_PA03B_DAC_VREFP     ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP)
+#define PORT_PA03B_DAC_VREFP       (1u <<  3)
+/* ========== PORT definition for I2S peripheral ========== */
+#define PIN_PA11G_I2S_FS0                 11  /**< \brief I2S signal: FS0 on PA11 mux G */
+#define MUX_PA11G_I2S_FS0                  6
+#define PINMUX_PA11G_I2S_FS0       ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0)
+#define PORT_PA11G_I2S_FS0         (1u << 11)
+#define PIN_PA21G_I2S_FS0                 21  /**< \brief I2S signal: FS0 on PA21 mux G */
+#define MUX_PA21G_I2S_FS0                  6
+#define PINMUX_PA21G_I2S_FS0       ((PIN_PA21G_I2S_FS0 << 16) | MUX_PA21G_I2S_FS0)
+#define PORT_PA21G_I2S_FS0         (1u << 21)
+#define PIN_PB12G_I2S_FS1                 44  /**< \brief I2S signal: FS1 on PB12 mux G */
+#define MUX_PB12G_I2S_FS1                  6
+#define PINMUX_PB12G_I2S_FS1       ((PIN_PB12G_I2S_FS1 << 16) | MUX_PB12G_I2S_FS1)
+#define PORT_PB12G_I2S_FS1         (1u << 12)
+#define PIN_PA09G_I2S_MCK0                 9  /**< \brief I2S signal: MCK0 on PA09 mux G */
+#define MUX_PA09G_I2S_MCK0                 6
+#define PINMUX_PA09G_I2S_MCK0      ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0)
+#define PORT_PA09G_I2S_MCK0        (1u <<  9)
+#define PIN_PB17G_I2S_MCK0                49  /**< \brief I2S signal: MCK0 on PB17 mux G */
+#define MUX_PB17G_I2S_MCK0                 6
+#define PINMUX_PB17G_I2S_MCK0      ((PIN_PB17G_I2S_MCK0 << 16) | MUX_PB17G_I2S_MCK0)
+#define PORT_PB17G_I2S_MCK0        (1u << 17)
+#define PIN_PB10G_I2S_MCK1                42  /**< \brief I2S signal: MCK1 on PB10 mux G */
+#define MUX_PB10G_I2S_MCK1                 6
+#define PINMUX_PB10G_I2S_MCK1      ((PIN_PB10G_I2S_MCK1 << 16) | MUX_PB10G_I2S_MCK1)
+#define PORT_PB10G_I2S_MCK1        (1u << 10)
+#define PIN_PA10G_I2S_SCK0                10  /**< \brief I2S signal: SCK0 on PA10 mux G */
+#define MUX_PA10G_I2S_SCK0                 6
+#define PINMUX_PA10G_I2S_SCK0      ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0)
+#define PORT_PA10G_I2S_SCK0        (1u << 10)
+#define PIN_PA20G_I2S_SCK0                20  /**< \brief I2S signal: SCK0 on PA20 mux G */
+#define MUX_PA20G_I2S_SCK0                 6
+#define PINMUX_PA20G_I2S_SCK0      ((PIN_PA20G_I2S_SCK0 << 16) | MUX_PA20G_I2S_SCK0)
+#define PORT_PA20G_I2S_SCK0        (1u << 20)
+#define PIN_PB11G_I2S_SCK1                43  /**< \brief I2S signal: SCK1 on PB11 mux G */
+#define MUX_PB11G_I2S_SCK1                 6
+#define PINMUX_PB11G_I2S_SCK1      ((PIN_PB11G_I2S_SCK1 << 16) | MUX_PB11G_I2S_SCK1)
+#define PORT_PB11G_I2S_SCK1        (1u << 11)
+#define PIN_PA07G_I2S_SD0                  7  /**< \brief I2S signal: SD0 on PA07 mux G */
+#define MUX_PA07G_I2S_SD0                  6
+#define PINMUX_PA07G_I2S_SD0       ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0)
+#define PORT_PA07G_I2S_SD0         (1u <<  7)
+#define PIN_PA19G_I2S_SD0                 19  /**< \brief I2S signal: SD0 on PA19 mux G */
+#define MUX_PA19G_I2S_SD0                  6
+#define PINMUX_PA19G_I2S_SD0       ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0)
+#define PORT_PA19G_I2S_SD0         (1u << 19)
+#define PIN_PA08G_I2S_SD1                  8  /**< \brief I2S signal: SD1 on PA08 mux G */
+#define MUX_PA08G_I2S_SD1                  6
+#define PINMUX_PA08G_I2S_SD1       ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1)
+#define PORT_PA08G_I2S_SD1         (1u <<  8)
+#define PIN_PB16G_I2S_SD1                 48  /**< \brief I2S signal: SD1 on PB16 mux G */
+#define MUX_PB16G_I2S_SD1                  6
+#define PINMUX_PB16G_I2S_SD1       ((PIN_PB16G_I2S_SD1 << 16) | MUX_PB16G_I2S_SD1)
+#define PORT_PB16G_I2S_SD1         (1u << 16)
+
+#endif /* _SAMD21J18A_PIO_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21.h	(revision 136)
@@ -0,0 +1,60 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2014, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+#ifndef _SAMD21_
+#define _SAMD21_
+
+#if defined (__SAMD21E15A__)
+#include "samd21e15a.h"
+#elif defined (__SAMD21E16A__)
+#include "samd21e16a.h"
+#elif defined (__SAMD21E17A__)
+#include "samd21e17a.h"
+#elif defined (__SAMD21E18A__)
+#include "samd21e18a.h"
+#elif defined (__SAMD21G15A__)
+#include "samd21g15a.h"
+#elif defined (__SAMD21G16A__)
+#include "samd21g16a.h"
+#elif defined (__SAMD21G17A__)
+#include "samd21g17a.h"
+#elif defined (__SAMD21G18A__)
+#include "samd21g18a.h"
+#elif defined (__SAMD21J15A__)
+#include "samd21j15a.h"
+#elif defined (__SAMD21J16A__)
+#include "samd21j16a.h"
+#elif defined (__SAMD21J17A__)
+#include "samd21j17a.h"
+#elif defined (__SAMD21J18A__)
+#include "samd21j18a.h"
+#else
+  #error Library does not support the specified device.
+#endif
+
+#endif /* _SAMD21_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e15a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e15a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e15a.h	(revision 136)
@@ -0,0 +1,542 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21E15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21E15A_
+#define _SAMD21E15A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21E15A_definitions SAMD21E15A definitions
+ * This file defines all structures and symbols for SAMD21E15A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21E15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E15A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21E15A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21E15A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21E15A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21E15A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21E15A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21E15A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21E15A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21E15A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21E15A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21E15A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21E15A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21E15A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21E15A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21E15A Serial Communication Interface 3 (SERCOM3) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21E15A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21E15A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21E15A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21E15A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21E15A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21E15A Basic Timer Counter 5 (TC5) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21E15A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21E15A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21E15A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21E15A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21E15A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnReserved13;
+  void* pfnReserved14;
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnReserved21;
+  void* pfnReserved22;
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21E15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E15A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21E15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E15A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21E15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E15A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21E15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E15A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM_INST_NUM   4                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC_INST_NUM       3                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5 }         /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21E15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E15A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21e15a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21E15A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x8000 /* 32 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     512
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x1000 /* 4 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x1001000D
+#define PORT_GROUPS           1
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21E15A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21E15A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e16a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e16a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e16a.h	(revision 136)
@@ -0,0 +1,542 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21E16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21E16A_
+#define _SAMD21E16A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21E16A_definitions SAMD21E16A definitions
+ * This file defines all structures and symbols for SAMD21E16A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21E16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E16A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21E16A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21E16A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21E16A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21E16A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21E16A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21E16A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21E16A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21E16A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21E16A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21E16A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21E16A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21E16A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21E16A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21E16A Serial Communication Interface 3 (SERCOM3) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21E16A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21E16A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21E16A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21E16A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21E16A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21E16A Basic Timer Counter 5 (TC5) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21E16A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21E16A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21E16A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21E16A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21E16A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnReserved13;
+  void* pfnReserved14;
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnReserved21;
+  void* pfnReserved22;
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21E16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E16A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21E16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E16A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21E16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E16A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21E16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E16A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM_INST_NUM   4                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC_INST_NUM       3                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5 }         /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21E16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E16A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21e16a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21E16A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x10000 /* 64 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     1024
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x2000 /* 8 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x1001000C
+#define PORT_GROUPS           1
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21E16A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21E16A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e17a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e17a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e17a.h	(revision 136)
@@ -0,0 +1,542 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21E17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21E17A_
+#define _SAMD21E17A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21E17A_definitions SAMD21E17A definitions
+ * This file defines all structures and symbols for SAMD21E17A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21E17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E17A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21E17A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21E17A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21E17A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21E17A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21E17A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21E17A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21E17A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21E17A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21E17A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21E17A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21E17A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21E17A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21E17A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21E17A Serial Communication Interface 3 (SERCOM3) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21E17A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21E17A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21E17A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21E17A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21E17A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21E17A Basic Timer Counter 5 (TC5) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21E17A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21E17A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21E17A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21E17A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21E17A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnReserved13;
+  void* pfnReserved14;
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnReserved21;
+  void* pfnReserved22;
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21E17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E17A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21E17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E17A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21E17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E17A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21E17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E17A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM_INST_NUM   4                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC_INST_NUM       3                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5 }         /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21E17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E17A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21e17a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21E17A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x20000 /* 128 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     2048
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x4000 /* 16 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x1001000B
+#define PORT_GROUPS           1
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21E17A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21E17A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e18a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e18a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21e18a.h	(revision 136)
@@ -0,0 +1,542 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21E18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21E18A_
+#define _SAMD21E18A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21E18A_definitions SAMD21E18A definitions
+ * This file defines all structures and symbols for SAMD21E18A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21E18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E18A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21E18A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21E18A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21E18A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21E18A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21E18A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21E18A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21E18A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21E18A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21E18A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21E18A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21E18A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21E18A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21E18A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21E18A Serial Communication Interface 3 (SERCOM3) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21E18A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21E18A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21E18A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21E18A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21E18A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21E18A Basic Timer Counter 5 (TC5) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21E18A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21E18A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21E18A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21E18A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21E18A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnReserved13;
+  void* pfnReserved14;
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnReserved21;
+  void* pfnReserved22;
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21E18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E18A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21E18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E18A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21E18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E18A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21E18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E18A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM_INST_NUM   4                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC_INST_NUM       3                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5 }         /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21E18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21E18A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21e18a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21E18A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x40000 /* 256 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     4096
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x8000 /* 32 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x1001000A
+#define PORT_GROUPS           1
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21E18A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21E18A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g15a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g15a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g15a.h	(revision 136)
@@ -0,0 +1,554 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21G15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21G15A_
+#define _SAMD21G15A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21G15A_definitions SAMD21G15A definitions
+ * This file defines all structures and symbols for SAMD21G15A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21G15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G15A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21G15A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21G15A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21G15A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21G15A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21G15A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21G15A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21G15A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21G15A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21G15A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21G15A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21G15A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21G15A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21G15A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21G15A Serial Communication Interface 3 (SERCOM3) */
+  SERCOM4_IRQn             = 13, /**< 13 SAMD21G15A Serial Communication Interface 4 (SERCOM4) */
+  SERCOM5_IRQn             = 14, /**< 14 SAMD21G15A Serial Communication Interface 5 (SERCOM5) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21G15A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21G15A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21G15A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21G15A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21G15A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21G15A Basic Timer Counter 5 (TC5) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21G15A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21G15A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21G15A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21G15A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21G15A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnSERCOM4_Handler;               /* 13 Serial Communication Interface 4 */
+  void* pfnSERCOM5_Handler;               /* 14 Serial Communication Interface 5 */
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnReserved21;
+  void* pfnReserved22;
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void SERCOM4_Handler             ( void );
+void SERCOM5_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21G15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G15A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21G15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G15A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sercom4.h"
+#include "instance/sercom5.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21G15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G15A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_SERCOM4       70 /**< \brief Serial Communication Interface SERCOM (SERCOM4) */
+#define ID_SERCOM5       71 /**< \brief Serial Communication Interface SERCOM (SERCOM5) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21G15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G15A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4                       (0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5                       (0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4           ((Sercom   *)0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5           ((Sercom   *)0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SERCOM_INST_NUM   6                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC_INST_NUM       3                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5 }         /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21G15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G15A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21g15a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21G15A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x8000 /* 32 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     512
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x1000 /* 4 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x10010008
+#define PORT_GROUPS           2
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21G15A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21G15A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g16a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g16a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g16a.h	(revision 136)
@@ -0,0 +1,554 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21G16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21G16A_
+#define _SAMD21G16A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21G16A_definitions SAMD21G16A definitions
+ * This file defines all structures and symbols for SAMD21G16A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21G16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G16A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21G16A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21G16A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21G16A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21G16A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21G16A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21G16A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21G16A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21G16A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21G16A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21G16A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21G16A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21G16A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21G16A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21G16A Serial Communication Interface 3 (SERCOM3) */
+  SERCOM4_IRQn             = 13, /**< 13 SAMD21G16A Serial Communication Interface 4 (SERCOM4) */
+  SERCOM5_IRQn             = 14, /**< 14 SAMD21G16A Serial Communication Interface 5 (SERCOM5) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21G16A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21G16A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21G16A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21G16A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21G16A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21G16A Basic Timer Counter 5 (TC5) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21G16A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21G16A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21G16A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21G16A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21G16A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnSERCOM4_Handler;               /* 13 Serial Communication Interface 4 */
+  void* pfnSERCOM5_Handler;               /* 14 Serial Communication Interface 5 */
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnReserved21;
+  void* pfnReserved22;
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void SERCOM4_Handler             ( void );
+void SERCOM5_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21G16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G16A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21G16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G16A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sercom4.h"
+#include "instance/sercom5.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21G16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G16A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_SERCOM4       70 /**< \brief Serial Communication Interface SERCOM (SERCOM4) */
+#define ID_SERCOM5       71 /**< \brief Serial Communication Interface SERCOM (SERCOM5) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21G16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G16A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4                       (0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5                       (0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4           ((Sercom   *)0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5           ((Sercom   *)0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SERCOM_INST_NUM   6                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC_INST_NUM       3                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5 }         /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21G16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G16A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21g16a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21G16A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x10000 /* 64 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     1024
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x2000 /* 8 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x10010007
+#define PORT_GROUPS           2
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21G16A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21G16A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g17a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g17a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g17a.h	(revision 136)
@@ -0,0 +1,554 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21G17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21G17A_
+#define _SAMD21G17A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21G17A_definitions SAMD21G17A definitions
+ * This file defines all structures and symbols for SAMD21G17A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21G17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G17A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21G17A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21G17A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21G17A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21G17A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21G17A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21G17A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21G17A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21G17A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21G17A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21G17A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21G17A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21G17A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21G17A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21G17A Serial Communication Interface 3 (SERCOM3) */
+  SERCOM4_IRQn             = 13, /**< 13 SAMD21G17A Serial Communication Interface 4 (SERCOM4) */
+  SERCOM5_IRQn             = 14, /**< 14 SAMD21G17A Serial Communication Interface 5 (SERCOM5) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21G17A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21G17A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21G17A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21G17A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21G17A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21G17A Basic Timer Counter 5 (TC5) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21G17A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21G17A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21G17A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21G17A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21G17A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnSERCOM4_Handler;               /* 13 Serial Communication Interface 4 */
+  void* pfnSERCOM5_Handler;               /* 14 Serial Communication Interface 5 */
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnReserved21;
+  void* pfnReserved22;
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void SERCOM4_Handler             ( void );
+void SERCOM5_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21G17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G17A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21G17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G17A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sercom4.h"
+#include "instance/sercom5.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21G17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G17A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_SERCOM4       70 /**< \brief Serial Communication Interface SERCOM (SERCOM4) */
+#define ID_SERCOM5       71 /**< \brief Serial Communication Interface SERCOM (SERCOM5) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21G17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G17A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4                       (0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5                       (0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4           ((Sercom   *)0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5           ((Sercom   *)0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SERCOM_INST_NUM   6                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC_INST_NUM       3                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5 }         /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21G17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G17A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21g17a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21G17A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x20000 /* 128 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     2048
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x4000 /* 16 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x10010006
+#define PORT_GROUPS           2
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21G17A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21G17A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g18a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g18a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21g18a.h	(revision 136)
@@ -0,0 +1,554 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21G18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21G18A_
+#define _SAMD21G18A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21G18A_definitions SAMD21G18A definitions
+ * This file defines all structures and symbols for SAMD21G18A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21G18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G18A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21G18A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21G18A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21G18A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21G18A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21G18A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21G18A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21G18A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21G18A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21G18A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21G18A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21G18A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21G18A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21G18A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21G18A Serial Communication Interface 3 (SERCOM3) */
+  SERCOM4_IRQn             = 13, /**< 13 SAMD21G18A Serial Communication Interface 4 (SERCOM4) */
+  SERCOM5_IRQn             = 14, /**< 14 SAMD21G18A Serial Communication Interface 5 (SERCOM5) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21G18A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21G18A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21G18A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21G18A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21G18A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21G18A Basic Timer Counter 5 (TC5) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21G18A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21G18A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21G18A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21G18A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21G18A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnSERCOM4_Handler;               /* 13 Serial Communication Interface 4 */
+  void* pfnSERCOM5_Handler;               /* 14 Serial Communication Interface 5 */
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnReserved21;
+  void* pfnReserved22;
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void SERCOM4_Handler             ( void );
+void SERCOM5_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21G18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G18A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21G18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G18A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sercom4.h"
+#include "instance/sercom5.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21G18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G18A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_SERCOM4       70 /**< \brief Serial Communication Interface SERCOM (SERCOM4) */
+#define ID_SERCOM5       71 /**< \brief Serial Communication Interface SERCOM (SERCOM5) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21G18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G18A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4                       (0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5                       (0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4           ((Sercom   *)0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5           ((Sercom   *)0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SERCOM_INST_NUM   6                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC_INST_NUM       3                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5 }         /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21G18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21G18A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21g18a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21G18A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x40000 /* 256 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     4096
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x8000 /* 32 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x10010005
+#define PORT_GROUPS           2
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21G18A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21G18A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j15a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j15a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j15a.h	(revision 136)
@@ -0,0 +1,566 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21J15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21J15A_
+#define _SAMD21J15A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21J15A_definitions SAMD21J15A definitions
+ * This file defines all structures and symbols for SAMD21J15A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21J15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J15A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21J15A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21J15A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21J15A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21J15A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21J15A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21J15A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21J15A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21J15A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21J15A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21J15A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21J15A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21J15A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21J15A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21J15A Serial Communication Interface 3 (SERCOM3) */
+  SERCOM4_IRQn             = 13, /**< 13 SAMD21J15A Serial Communication Interface 4 (SERCOM4) */
+  SERCOM5_IRQn             = 14, /**< 14 SAMD21J15A Serial Communication Interface 5 (SERCOM5) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21J15A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21J15A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21J15A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21J15A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21J15A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21J15A Basic Timer Counter 5 (TC5) */
+  TC6_IRQn                 = 21, /**< 21 SAMD21J15A Basic Timer Counter 6 (TC6) */
+  TC7_IRQn                 = 22, /**< 22 SAMD21J15A Basic Timer Counter 7 (TC7) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21J15A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21J15A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21J15A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21J15A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21J15A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnSERCOM4_Handler;               /* 13 Serial Communication Interface 4 */
+  void* pfnSERCOM5_Handler;               /* 14 Serial Communication Interface 5 */
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnTC6_Handler;                   /* 21 Basic Timer Counter 6 */
+  void* pfnTC7_Handler;                   /* 22 Basic Timer Counter 7 */
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void SERCOM4_Handler             ( void );
+void SERCOM5_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void TC6_Handler                 ( void );
+void TC7_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21J15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J15A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21J15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J15A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sercom4.h"
+#include "instance/sercom5.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tc6.h"
+#include "instance/tc7.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21J15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J15A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_SERCOM4       70 /**< \brief Serial Communication Interface SERCOM (SERCOM4) */
+#define ID_SERCOM5       71 /**< \brief Serial Communication Interface SERCOM (SERCOM5) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_TC6           78 /**< \brief Basic Timer Counter TC (TC6) */
+#define ID_TC7           79 /**< \brief Basic Timer Counter TC (TC7) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21J15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J15A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4                       (0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5                       (0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC6                           (0x42003800U) /**< \brief (TC6) APB Base Address */
+#define TC7                           (0x42003C00U) /**< \brief (TC7) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4           ((Sercom   *)0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5           ((Sercom   *)0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SERCOM_INST_NUM   6                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC6               ((Tc       *)0x42003800U) /**< \brief (TC6) APB Base Address */
+#define TC7               ((Tc       *)0x42003C00U) /**< \brief (TC7) APB Base Address */
+#define TC_INST_NUM       5                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21J15A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J15A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21j15a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21J15A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x8000 /* 32 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     512
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x1000 /* 4 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x10010003
+#define PORT_GROUPS           2
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21J15A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21J15A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j16a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j16a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j16a.h	(revision 136)
@@ -0,0 +1,566 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21J16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21J16A_
+#define _SAMD21J16A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21J16A_definitions SAMD21J16A definitions
+ * This file defines all structures and symbols for SAMD21J16A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21J16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J16A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21J16A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21J16A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21J16A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21J16A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21J16A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21J16A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21J16A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21J16A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21J16A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21J16A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21J16A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21J16A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21J16A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21J16A Serial Communication Interface 3 (SERCOM3) */
+  SERCOM4_IRQn             = 13, /**< 13 SAMD21J16A Serial Communication Interface 4 (SERCOM4) */
+  SERCOM5_IRQn             = 14, /**< 14 SAMD21J16A Serial Communication Interface 5 (SERCOM5) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21J16A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21J16A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21J16A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21J16A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21J16A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21J16A Basic Timer Counter 5 (TC5) */
+  TC6_IRQn                 = 21, /**< 21 SAMD21J16A Basic Timer Counter 6 (TC6) */
+  TC7_IRQn                 = 22, /**< 22 SAMD21J16A Basic Timer Counter 7 (TC7) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21J16A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21J16A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21J16A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21J16A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21J16A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnSERCOM4_Handler;               /* 13 Serial Communication Interface 4 */
+  void* pfnSERCOM5_Handler;               /* 14 Serial Communication Interface 5 */
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnTC6_Handler;                   /* 21 Basic Timer Counter 6 */
+  void* pfnTC7_Handler;                   /* 22 Basic Timer Counter 7 */
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void SERCOM4_Handler             ( void );
+void SERCOM5_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void TC6_Handler                 ( void );
+void TC7_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21J16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J16A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21J16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J16A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sercom4.h"
+#include "instance/sercom5.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tc6.h"
+#include "instance/tc7.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21J16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J16A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_SERCOM4       70 /**< \brief Serial Communication Interface SERCOM (SERCOM4) */
+#define ID_SERCOM5       71 /**< \brief Serial Communication Interface SERCOM (SERCOM5) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_TC6           78 /**< \brief Basic Timer Counter TC (TC6) */
+#define ID_TC7           79 /**< \brief Basic Timer Counter TC (TC7) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21J16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J16A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4                       (0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5                       (0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC6                           (0x42003800U) /**< \brief (TC6) APB Base Address */
+#define TC7                           (0x42003C00U) /**< \brief (TC7) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4           ((Sercom   *)0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5           ((Sercom   *)0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SERCOM_INST_NUM   6                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC6               ((Tc       *)0x42003800U) /**< \brief (TC6) APB Base Address */
+#define TC7               ((Tc       *)0x42003C00U) /**< \brief (TC7) APB Base Address */
+#define TC_INST_NUM       5                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21J16A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J16A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21j16a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21J16A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x10000 /* 64 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     1024
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x2000 /* 8 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x10010002
+#define PORT_GROUPS           2
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21J16A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21J16A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j17a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j17a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j17a.h	(revision 136)
@@ -0,0 +1,566 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21J17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21J17A_
+#define _SAMD21J17A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21J17A_definitions SAMD21J17A definitions
+ * This file defines all structures and symbols for SAMD21J17A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21J17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J17A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21J17A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21J17A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21J17A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21J17A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21J17A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21J17A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21J17A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21J17A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21J17A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21J17A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21J17A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21J17A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21J17A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21J17A Serial Communication Interface 3 (SERCOM3) */
+  SERCOM4_IRQn             = 13, /**< 13 SAMD21J17A Serial Communication Interface 4 (SERCOM4) */
+  SERCOM5_IRQn             = 14, /**< 14 SAMD21J17A Serial Communication Interface 5 (SERCOM5) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21J17A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21J17A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21J17A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21J17A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21J17A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21J17A Basic Timer Counter 5 (TC5) */
+  TC6_IRQn                 = 21, /**< 21 SAMD21J17A Basic Timer Counter 6 (TC6) */
+  TC7_IRQn                 = 22, /**< 22 SAMD21J17A Basic Timer Counter 7 (TC7) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21J17A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21J17A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21J17A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21J17A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21J17A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnSERCOM4_Handler;               /* 13 Serial Communication Interface 4 */
+  void* pfnSERCOM5_Handler;               /* 14 Serial Communication Interface 5 */
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnTC6_Handler;                   /* 21 Basic Timer Counter 6 */
+  void* pfnTC7_Handler;                   /* 22 Basic Timer Counter 7 */
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void SERCOM4_Handler             ( void );
+void SERCOM5_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void TC6_Handler                 ( void );
+void TC7_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21J17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J17A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21J17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J17A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sercom4.h"
+#include "instance/sercom5.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tc6.h"
+#include "instance/tc7.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21J17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J17A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_SERCOM4       70 /**< \brief Serial Communication Interface SERCOM (SERCOM4) */
+#define ID_SERCOM5       71 /**< \brief Serial Communication Interface SERCOM (SERCOM5) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_TC6           78 /**< \brief Basic Timer Counter TC (TC6) */
+#define ID_TC7           79 /**< \brief Basic Timer Counter TC (TC7) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21J17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J17A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4                       (0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5                       (0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC6                           (0x42003800U) /**< \brief (TC6) APB Base Address */
+#define TC7                           (0x42003C00U) /**< \brief (TC7) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4           ((Sercom   *)0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5           ((Sercom   *)0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SERCOM_INST_NUM   6                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC6               ((Tc       *)0x42003800U) /**< \brief (TC6) APB Base Address */
+#define TC7               ((Tc       *)0x42003C00U) /**< \brief (TC7) APB Base Address */
+#define TC_INST_NUM       5                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21J17A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J17A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21j17a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21J17A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x20000 /* 128 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     2048
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x4000 /* 16 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x10010001
+#define PORT_GROUPS           2
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21J17A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21J17A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j18a.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j18a.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/samd21j18a.h	(revision 136)
@@ -0,0 +1,566 @@
+/**
+ * \file
+ *
+ * \brief Header file for SAMD21J18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SAMD21J18A_
+#define _SAMD21J18A_
+
+/**
+ * \ingroup SAMD21_definitions
+ * \addtogroup SAMD21J18A_definitions SAMD21J18A definitions
+ * This file defines all structures and symbols for SAMD21J18A:
+ *   - registers and bitfields
+ *   - peripheral base address
+ *   - peripheral ID
+ *   - PIO definitions
+*/
+/*@{*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
+#include <stdint.h>
+#ifndef __cplusplus
+typedef volatile const uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile const uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#else
+typedef volatile       uint32_t RoReg;   /**< Read only 32-bit register (volatile const unsigned int) */
+typedef volatile       uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
+typedef volatile       uint8_t  RoReg8;  /**< Read only  8-bit register (volatile const unsigned int) */
+#endif
+typedef volatile       uint32_t WoReg;   /**< Write only 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
+typedef volatile       uint32_t WoReg8;  /**< Write only  8-bit register (volatile unsigned int) */
+typedef volatile       uint32_t RwReg;   /**< Read-Write 32-bit register (volatile unsigned int) */
+typedef volatile       uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
+typedef volatile       uint8_t  RwReg8;  /**< Read-Write  8-bit register (volatile unsigned int) */
+#define CAST(type, value) ((type *)(value))
+#define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
+#else
+#define CAST(type, value) (value)
+#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
+#endif
+
+/* ************************************************************************** */
+/**  CMSIS DEFINITIONS FOR SAMD21J18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J18A_cmsis CMSIS Definitions */
+/*@{*/
+
+/** Interrupt Number Definition */
+typedef enum IRQn
+{
+  /******  Cortex-M0+ Processor Exceptions Numbers *******************************/
+  NonMaskableInt_IRQn      = -14, /**<  2 Non Maskable Interrupt                 */
+  HardFault_IRQn           = -13, /**<  3 Cortex-M0+ Hard Fault Interrupt        */
+  SVCall_IRQn              = -5,  /**< 11 Cortex-M0+ SV Call Interrupt           */
+  PendSV_IRQn              = -2,  /**< 14 Cortex-M0+ Pend SV Interrupt           */
+  SysTick_IRQn             = -1,  /**< 15 Cortex-M0+ System Tick Interrupt       */
+  /******  SAMD21J18A-specific Interrupt Numbers ***********************/
+  PM_IRQn                  =  0, /**<  0 SAMD21J18A Power Manager (PM) */
+  SYSCTRL_IRQn             =  1, /**<  1 SAMD21J18A System Control (SYSCTRL) */
+  WDT_IRQn                 =  2, /**<  2 SAMD21J18A Watchdog Timer (WDT) */
+  RTC_IRQn                 =  3, /**<  3 SAMD21J18A Real-Time Counter (RTC) */
+  EIC_IRQn                 =  4, /**<  4 SAMD21J18A External Interrupt Controller (EIC) */
+  NVMCTRL_IRQn             =  5, /**<  5 SAMD21J18A Non-Volatile Memory Controller (NVMCTRL) */
+  DMAC_IRQn                =  6, /**<  6 SAMD21J18A Direct Memory Access Controller (DMAC) */
+  USB_IRQn                 =  7, /**<  7 SAMD21J18A Universal Serial Bus (USB) */
+  EVSYS_IRQn               =  8, /**<  8 SAMD21J18A Event System Interface (EVSYS) */
+  SERCOM0_IRQn             =  9, /**<  9 SAMD21J18A Serial Communication Interface 0 (SERCOM0) */
+  SERCOM1_IRQn             = 10, /**< 10 SAMD21J18A Serial Communication Interface 1 (SERCOM1) */
+  SERCOM2_IRQn             = 11, /**< 11 SAMD21J18A Serial Communication Interface 2 (SERCOM2) */
+  SERCOM3_IRQn             = 12, /**< 12 SAMD21J18A Serial Communication Interface 3 (SERCOM3) */
+  SERCOM4_IRQn             = 13, /**< 13 SAMD21J18A Serial Communication Interface 4 (SERCOM4) */
+  SERCOM5_IRQn             = 14, /**< 14 SAMD21J18A Serial Communication Interface 5 (SERCOM5) */
+  TCC0_IRQn                = 15, /**< 15 SAMD21J18A Timer Counter Control 0 (TCC0) */
+  TCC1_IRQn                = 16, /**< 16 SAMD21J18A Timer Counter Control 1 (TCC1) */
+  TCC2_IRQn                = 17, /**< 17 SAMD21J18A Timer Counter Control 2 (TCC2) */
+  TC3_IRQn                 = 18, /**< 18 SAMD21J18A Basic Timer Counter 3 (TC3) */
+  TC4_IRQn                 = 19, /**< 19 SAMD21J18A Basic Timer Counter 4 (TC4) */
+  TC5_IRQn                 = 20, /**< 20 SAMD21J18A Basic Timer Counter 5 (TC5) */
+  TC6_IRQn                 = 21, /**< 21 SAMD21J18A Basic Timer Counter 6 (TC6) */
+  TC7_IRQn                 = 22, /**< 22 SAMD21J18A Basic Timer Counter 7 (TC7) */
+  ADC_IRQn                 = 23, /**< 23 SAMD21J18A Analog Digital Converter (ADC) */
+  AC_IRQn                  = 24, /**< 24 SAMD21J18A Analog Comparators (AC) */
+  DAC_IRQn                 = 25, /**< 25 SAMD21J18A Digital Analog Converter (DAC) */
+  PTC_IRQn                 = 26, /**< 26 SAMD21J18A Peripheral Touch Controller (PTC) */
+  I2S_IRQn                 = 27, /**< 27 SAMD21J18A Inter-IC Sound Interface (I2S) */
+
+  PERIPH_COUNT_IRQn        = 28  /**< Number of peripheral IDs */
+} IRQn_Type;
+
+typedef struct _DeviceVectors
+{
+  /* Stack pointer */
+  void* pvStack;
+
+  /* Cortex-M handlers */
+  void* pfnReset_Handler;
+  void* pfnNMI_Handler;
+  void* pfnHardFault_Handler;
+  void* pfnReservedM12;
+  void* pfnReservedM11;
+  void* pfnReservedM10;
+  void* pfnReservedM9;
+  void* pfnReservedM8;
+  void* pfnReservedM7;
+  void* pfnReservedM6;
+  void* pfnSVC_Handler;
+  void* pfnReservedM4;
+  void* pfnReservedM3;
+  void* pfnPendSV_Handler;
+  void* pfnSysTick_Handler;
+
+  /* Peripheral handlers */
+  void* pfnPM_Handler;                    /*  0 Power Manager */
+  void* pfnSYSCTRL_Handler;               /*  1 System Control */
+  void* pfnWDT_Handler;                   /*  2 Watchdog Timer */
+  void* pfnRTC_Handler;                   /*  3 Real-Time Counter */
+  void* pfnEIC_Handler;                   /*  4 External Interrupt Controller */
+  void* pfnNVMCTRL_Handler;               /*  5 Non-Volatile Memory Controller */
+  void* pfnDMAC_Handler;                  /*  6 Direct Memory Access Controller */
+  void* pfnUSB_Handler;                   /*  7 Universal Serial Bus */
+  void* pfnEVSYS_Handler;                 /*  8 Event System Interface */
+  void* pfnSERCOM0_Handler;               /*  9 Serial Communication Interface 0 */
+  void* pfnSERCOM1_Handler;               /* 10 Serial Communication Interface 1 */
+  void* pfnSERCOM2_Handler;               /* 11 Serial Communication Interface 2 */
+  void* pfnSERCOM3_Handler;               /* 12 Serial Communication Interface 3 */
+  void* pfnSERCOM4_Handler;               /* 13 Serial Communication Interface 4 */
+  void* pfnSERCOM5_Handler;               /* 14 Serial Communication Interface 5 */
+  void* pfnTCC0_Handler;                  /* 15 Timer Counter Control 0 */
+  void* pfnTCC1_Handler;                  /* 16 Timer Counter Control 1 */
+  void* pfnTCC2_Handler;                  /* 17 Timer Counter Control 2 */
+  void* pfnTC3_Handler;                   /* 18 Basic Timer Counter 3 */
+  void* pfnTC4_Handler;                   /* 19 Basic Timer Counter 4 */
+  void* pfnTC5_Handler;                   /* 20 Basic Timer Counter 5 */
+  void* pfnTC6_Handler;                   /* 21 Basic Timer Counter 6 */
+  void* pfnTC7_Handler;                   /* 22 Basic Timer Counter 7 */
+  void* pfnADC_Handler;                   /* 23 Analog Digital Converter */
+  void* pfnAC_Handler;                    /* 24 Analog Comparators */
+  void* pfnDAC_Handler;                   /* 25 Digital Analog Converter */
+  void* pfnPTC_Handler;                   /* 26 Peripheral Touch Controller */
+  void* pfnI2S_Handler;                   /* 27 Inter-IC Sound Interface */
+} DeviceVectors;
+
+/* Cortex-M0+ processor handlers */
+void Reset_Handler               ( void );
+void NMI_Handler                 ( void );
+void HardFault_Handler           ( void );
+void SVC_Handler                 ( void );
+void PendSV_Handler              ( void );
+void SysTick_Handler             ( void );
+
+/* Peripherals handlers */
+void PM_Handler                  ( void );
+void SYSCTRL_Handler             ( void );
+void WDT_Handler                 ( void );
+void RTC_Handler                 ( void );
+void EIC_Handler                 ( void );
+void NVMCTRL_Handler             ( void );
+void DMAC_Handler                ( void );
+void USB_Handler                 ( void );
+void EVSYS_Handler               ( void );
+void SERCOM0_Handler             ( void );
+void SERCOM1_Handler             ( void );
+void SERCOM2_Handler             ( void );
+void SERCOM3_Handler             ( void );
+void SERCOM4_Handler             ( void );
+void SERCOM5_Handler             ( void );
+void TCC0_Handler                ( void );
+void TCC1_Handler                ( void );
+void TCC2_Handler                ( void );
+void TC3_Handler                 ( void );
+void TC4_Handler                 ( void );
+void TC5_Handler                 ( void );
+void TC6_Handler                 ( void );
+void TC7_Handler                 ( void );
+void ADC_Handler                 ( void );
+void AC_Handler                  ( void );
+void DAC_Handler                 ( void );
+void PTC_Handler                 ( void );
+void I2S_Handler                 ( void );
+
+/*
+ * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
+ */
+
+#define LITTLE_ENDIAN          1        
+#define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
+#define __MPU_PRESENT          0         /*!< MPU present or not */
+#define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
+#define __VTOR_PRESENT         1         /*!< VTOR present or not */
+#define __Vendor_SysTickConfig 0         /*!< Set to 1 if different SysTick Config is used */
+
+/**
+ * \brief CMSIS includes
+ */
+
+#include <core_cm0plus.h>
+#if !defined DONT_USE_CMSIS_INIT
+#include "system_samd21.h"
+#endif /* DONT_USE_CMSIS_INIT */
+
+/*@}*/
+
+/* ************************************************************************** */
+/**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21J18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J18A_api Peripheral Software API */
+/*@{*/
+
+#include "component/ac.h"
+#include "component/adc.h"
+#include "component/dac.h"
+#include "component/dmac.h"
+#include "component/dsu.h"
+#include "component/eic.h"
+#include "component/evsys.h"
+#include "component/gclk.h"
+#include "component/i2s.h"
+#include "component/mtb.h"
+#include "component/nvmctrl.h"
+#include "component/pac.h"
+#include "component/pm.h"
+#include "component/port.h"
+#include "component/rtc.h"
+#include "component/sercom.h"
+#include "component/sysctrl.h"
+#include "component/tc.h"
+#include "component/tcc.h"
+#include "component/usb.h"
+#include "component/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  REGISTERS ACCESS DEFINITIONS FOR SAMD21J18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J18A_reg Registers Access Definitions */
+/*@{*/
+
+#include "instance/ac.h"
+#include "instance/adc.h"
+#include "instance/dac.h"
+#include "instance/dmac.h"
+#include "instance/dsu.h"
+#include "instance/eic.h"
+#include "instance/evsys.h"
+#include "instance/gclk.h"
+#include "instance/i2s.h"
+#include "instance/mtb.h"
+#include "instance/nvmctrl.h"
+#include "instance/pac0.h"
+#include "instance/pac1.h"
+#include "instance/pac2.h"
+#include "instance/pm.h"
+#include "instance/port.h"
+#include "instance/rtc.h"
+#include "instance/sercom0.h"
+#include "instance/sercom1.h"
+#include "instance/sercom2.h"
+#include "instance/sercom3.h"
+#include "instance/sercom4.h"
+#include "instance/sercom5.h"
+#include "instance/sysctrl.h"
+#include "instance/tc3.h"
+#include "instance/tc4.h"
+#include "instance/tc5.h"
+#include "instance/tc6.h"
+#include "instance/tc7.h"
+#include "instance/tcc0.h"
+#include "instance/tcc1.h"
+#include "instance/tcc2.h"
+#include "instance/usb.h"
+#include "instance/wdt.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  PERIPHERAL ID DEFINITIONS FOR SAMD21J18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J18A_id Peripheral Ids Definitions */
+/*@{*/
+
+// Peripheral instances on HPB0 bridge
+#define ID_PAC0           0 /**< \brief Peripheral Access Controller PAC (PAC0) */
+#define ID_PM             1 /**< \brief Power Manager (PM) */
+#define ID_SYSCTRL        2 /**< \brief System Control (SYSCTRL) */
+#define ID_GCLK           3 /**< \brief Generic Clock Generator (GCLK) */
+#define ID_WDT            4 /**< \brief Watchdog Timer (WDT) */
+#define ID_RTC            5 /**< \brief Real-Time Counter (RTC) */
+#define ID_EIC            6 /**< \brief External Interrupt Controller (EIC) */
+
+// Peripheral instances on HPB1 bridge
+#define ID_PAC1          32 /**< \brief Peripheral Access Controller PAC (PAC1) */
+#define ID_DSU           33 /**< \brief Device Service Unit (DSU) */
+#define ID_NVMCTRL       34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
+#define ID_PORT          35 /**< \brief Port Module (PORT) */
+#define ID_DMAC          36 /**< \brief Direct Memory Access Controller (DMAC) */
+#define ID_USB           37 /**< \brief Universal Serial Bus (USB) */
+#define ID_MTB           38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
+
+// Peripheral instances on HPB2 bridge
+#define ID_PAC2          64 /**< \brief Peripheral Access Controller PAC (PAC2) */
+#define ID_EVSYS         65 /**< \brief Event System Interface (EVSYS) */
+#define ID_SERCOM0       66 /**< \brief Serial Communication Interface SERCOM (SERCOM0) */
+#define ID_SERCOM1       67 /**< \brief Serial Communication Interface SERCOM (SERCOM1) */
+#define ID_SERCOM2       68 /**< \brief Serial Communication Interface SERCOM (SERCOM2) */
+#define ID_SERCOM3       69 /**< \brief Serial Communication Interface SERCOM (SERCOM3) */
+#define ID_SERCOM4       70 /**< \brief Serial Communication Interface SERCOM (SERCOM4) */
+#define ID_SERCOM5       71 /**< \brief Serial Communication Interface SERCOM (SERCOM5) */
+#define ID_TCC0          72 /**< \brief Timer Counter Control TCC (TCC0) */
+#define ID_TCC1          73 /**< \brief Timer Counter Control TCC (TCC1) */
+#define ID_TCC2          74 /**< \brief Timer Counter Control TCC (TCC2) */
+#define ID_TC3           75 /**< \brief Basic Timer Counter TC (TC3) */
+#define ID_TC4           76 /**< \brief Basic Timer Counter TC (TC4) */
+#define ID_TC5           77 /**< \brief Basic Timer Counter TC (TC5) */
+#define ID_TC6           78 /**< \brief Basic Timer Counter TC (TC6) */
+#define ID_TC7           79 /**< \brief Basic Timer Counter TC (TC7) */
+#define ID_ADC           80 /**< \brief Analog Digital Converter (ADC) */
+#define ID_AC            81 /**< \brief Analog Comparators (AC) */
+#define ID_DAC           82 /**< \brief Digital Analog Converter (DAC) */
+#define ID_PTC           83 /**< \brief Peripheral Touch Controller (PTC) */
+#define ID_I2S           84 /**< \brief Inter-IC Sound Interface (I2S) */
+
+#define ID_PERIPH_COUNT  85 /**< \brief Number of peripheral IDs */
+/*@}*/
+
+/* ************************************************************************** */
+/**  BASE ADDRESS DEFINITIONS FOR SAMD21J18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J18A_base Peripheral Base Address Definitions */
+/*@{*/
+
+#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
+#define AC                            (0x42004400U) /**< \brief (AC) APB Base Address */
+#define ADC                           (0x42004000U) /**< \brief (ADC) APB Base Address */
+#define DAC                           (0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DMAC                          (0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DSU                           (0x41002000U) /**< \brief (DSU) APB Base Address */
+#define EIC                           (0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EVSYS                         (0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define GCLK                          (0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define I2S                           (0x42005000U) /**< \brief (I2S) APB Base Address */
+#define MTB                           (0x41006000U) /**< \brief (MTB) APB Base Address */
+#define NVMCTRL                       (0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define PAC0                          (0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1                          (0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2                          (0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PM                            (0x40000400U) /**< \brief (PM) APB Base Address */
+#define PORT                          (0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS                    (0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define RTC                           (0x40001400U) /**< \brief (RTC) APB Base Address */
+#define SERCOM0                       (0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1                       (0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2                       (0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3                       (0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4                       (0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5                       (0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SYSCTRL                       (0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define TC3                           (0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4                           (0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5                           (0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC6                           (0x42003800U) /**< \brief (TC6) APB Base Address */
+#define TC7                           (0x42003C00U) /**< \brief (TC7) APB Base Address */
+#define TCC0                          (0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1                          (0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2                          (0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define USB                           (0x41005000U) /**< \brief (USB) APB Base Address */
+#define WDT                           (0x40001000U) /**< \brief (WDT) APB Base Address */
+#else
+#define AC                ((Ac       *)0x42004400U) /**< \brief (AC) APB Base Address */
+#define AC_INST_NUM       1                         /**< \brief (AC) Number of instances */
+#define AC_INSTS          { AC }                    /**< \brief (AC) Instances List */
+
+#define ADC               ((Adc      *)0x42004000U) /**< \brief (ADC) APB Base Address */
+#define ADC_INST_NUM      1                         /**< \brief (ADC) Number of instances */
+#define ADC_INSTS         { ADC }                   /**< \brief (ADC) Instances List */
+
+#define DAC               ((Dac      *)0x42004800U) /**< \brief (DAC) APB Base Address */
+#define DAC_INST_NUM      1                         /**< \brief (DAC) Number of instances */
+#define DAC_INSTS         { DAC }                   /**< \brief (DAC) Instances List */
+
+#define DMAC              ((Dmac     *)0x41004800U) /**< \brief (DMAC) APB Base Address */
+#define DMAC_INST_NUM     1                         /**< \brief (DMAC) Number of instances */
+#define DMAC_INSTS        { DMAC }                  /**< \brief (DMAC) Instances List */
+
+#define DSU               ((Dsu      *)0x41002000U) /**< \brief (DSU) APB Base Address */
+#define DSU_INST_NUM      1                         /**< \brief (DSU) Number of instances */
+#define DSU_INSTS         { DSU }                   /**< \brief (DSU) Instances List */
+
+#define EIC               ((Eic      *)0x40001800U) /**< \brief (EIC) APB Base Address */
+#define EIC_INST_NUM      1                         /**< \brief (EIC) Number of instances */
+#define EIC_INSTS         { EIC }                   /**< \brief (EIC) Instances List */
+
+#define EVSYS             ((Evsys    *)0x42000400U) /**< \brief (EVSYS) APB Base Address */
+#define EVSYS_INST_NUM    1                         /**< \brief (EVSYS) Number of instances */
+#define EVSYS_INSTS       { EVSYS }                 /**< \brief (EVSYS) Instances List */
+
+#define GCLK              ((Gclk     *)0x40000C00U) /**< \brief (GCLK) APB Base Address */
+#define GCLK_INST_NUM     1                         /**< \brief (GCLK) Number of instances */
+#define GCLK_INSTS        { GCLK }                  /**< \brief (GCLK) Instances List */
+
+#define I2S               ((I2s      *)0x42005000U) /**< \brief (I2S) APB Base Address */
+#define I2S_INST_NUM      1                         /**< \brief (I2S) Number of instances */
+#define I2S_INSTS         { I2S }                   /**< \brief (I2S) Instances List */
+
+#define MTB               ((Mtb      *)0x41006000U) /**< \brief (MTB) APB Base Address */
+#define MTB_INST_NUM      1                         /**< \brief (MTB) Number of instances */
+#define MTB_INSTS         { MTB }                   /**< \brief (MTB) Instances List */
+
+#define NVMCTRL           ((Nvmctrl  *)0x41004000U) /**< \brief (NVMCTRL) APB Base Address */
+#define NVMCTRL_CAL                   (0x00800000U) /**< \brief (NVMCTRL) CAL Base Address */
+#define NVMCTRL_LOCKBIT               (0x00802000U) /**< \brief (NVMCTRL) LOCKBIT Base Address */
+#define NVMCTRL_OTP1                  (0x00806000U) /**< \brief (NVMCTRL) OTP1 Base Address */
+#define NVMCTRL_OTP2                  (0x00806008U) /**< \brief (NVMCTRL) OTP2 Base Address */
+#define NVMCTRL_OTP4                  (0x00806020U) /**< \brief (NVMCTRL) OTP4 Base Address */
+#define NVMCTRL_TEMP_LOG              (0x00806030U) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
+#define NVMCTRL_USER                  (0x00804000U) /**< \brief (NVMCTRL) USER Base Address */
+#define NVMCTRL_INST_NUM  1                         /**< \brief (NVMCTRL) Number of instances */
+#define NVMCTRL_INSTS     { NVMCTRL }               /**< \brief (NVMCTRL) Instances List */
+
+#define PAC0              ((Pac      *)0x40000000U) /**< \brief (PAC0) APB Base Address */
+#define PAC1              ((Pac      *)0x41000000U) /**< \brief (PAC1) APB Base Address */
+#define PAC2              ((Pac      *)0x42000000U) /**< \brief (PAC2) APB Base Address */
+#define PAC_INST_NUM      3                         /**< \brief (PAC) Number of instances */
+#define PAC_INSTS         { PAC0, PAC1, PAC2 }      /**< \brief (PAC) Instances List */
+
+#define PM                ((Pm       *)0x40000400U) /**< \brief (PM) APB Base Address */
+#define PM_INST_NUM       1                         /**< \brief (PM) Number of instances */
+#define PM_INSTS          { PM }                    /**< \brief (PM) Instances List */
+
+#define PORT              ((Port     *)0x41004400U) /**< \brief (PORT) APB Base Address */
+#define PORT_IOBUS        ((Port     *)0x60000000U) /**< \brief (PORT) IOBUS Base Address */
+#define PORT_INST_NUM     1                         /**< \brief (PORT) Number of instances */
+#define PORT_INSTS        { PORT }                  /**< \brief (PORT) Instances List */
+
+#define PTC_GCLK_ID       34
+#define PTC_INST_NUM      1                         /**< \brief (PTC) Number of instances */
+#define PTC_INSTS         { PTC }                   /**< \brief (PTC) Instances List */
+
+#define RTC               ((Rtc      *)0x40001400U) /**< \brief (RTC) APB Base Address */
+#define RTC_INST_NUM      1                         /**< \brief (RTC) Number of instances */
+#define RTC_INSTS         { RTC }                   /**< \brief (RTC) Instances List */
+
+#define SERCOM0           ((Sercom   *)0x42000800U) /**< \brief (SERCOM0) APB Base Address */
+#define SERCOM1           ((Sercom   *)0x42000C00U) /**< \brief (SERCOM1) APB Base Address */
+#define SERCOM2           ((Sercom   *)0x42001000U) /**< \brief (SERCOM2) APB Base Address */
+#define SERCOM3           ((Sercom   *)0x42001400U) /**< \brief (SERCOM3) APB Base Address */
+#define SERCOM4           ((Sercom   *)0x42001800U) /**< \brief (SERCOM4) APB Base Address */
+#define SERCOM5           ((Sercom   *)0x42001C00U) /**< \brief (SERCOM5) APB Base Address */
+#define SERCOM_INST_NUM   6                         /**< \brief (SERCOM) Number of instances */
+#define SERCOM_INSTS      { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SERCOM) Instances List */
+
+#define SYSCTRL           ((Sysctrl  *)0x40000800U) /**< \brief (SYSCTRL) APB Base Address */
+#define SYSCTRL_INST_NUM  1                         /**< \brief (SYSCTRL) Number of instances */
+#define SYSCTRL_INSTS     { SYSCTRL }               /**< \brief (SYSCTRL) Instances List */
+
+#define TC3               ((Tc       *)0x42002C00U) /**< \brief (TC3) APB Base Address */
+#define TC4               ((Tc       *)0x42003000U) /**< \brief (TC4) APB Base Address */
+#define TC5               ((Tc       *)0x42003400U) /**< \brief (TC5) APB Base Address */
+#define TC6               ((Tc       *)0x42003800U) /**< \brief (TC6) APB Base Address */
+#define TC7               ((Tc       *)0x42003C00U) /**< \brief (TC7) APB Base Address */
+#define TC_INST_NUM       5                         /**< \brief (TC) Number of instances */
+#define TC_INSTS          { TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances List */
+
+#define TCC0              ((Tcc      *)0x42002000U) /**< \brief (TCC0) APB Base Address */
+#define TCC1              ((Tcc      *)0x42002400U) /**< \brief (TCC1) APB Base Address */
+#define TCC2              ((Tcc      *)0x42002800U) /**< \brief (TCC2) APB Base Address */
+#define TCC_INST_NUM      3                         /**< \brief (TCC) Number of instances */
+#define TCC_INSTS         { TCC0, TCC1, TCC2 }      /**< \brief (TCC) Instances List */
+
+#define USB               ((Usb      *)0x41005000U) /**< \brief (USB) APB Base Address */
+#define USB_INST_NUM      1                         /**< \brief (USB) Number of instances */
+#define USB_INSTS         { USB }                   /**< \brief (USB) Instances List */
+
+#define WDT               ((Wdt      *)0x40001000U) /**< \brief (WDT) APB Base Address */
+#define WDT_INST_NUM      1                         /**< \brief (WDT) Number of instances */
+#define WDT_INSTS         { WDT }                   /**< \brief (WDT) Instances List */
+
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
+/*@}*/
+
+/* ************************************************************************** */
+/**  PORT DEFINITIONS FOR SAMD21J18A */
+/* ************************************************************************** */
+/** \defgroup SAMD21J18A_port PORT Definitions */
+/*@{*/
+
+#include "pio/samd21j18a.h"
+/*@}*/
+
+/* ************************************************************************** */
+/**  MEMORY MAPPING DEFINITIONS FOR SAMD21J18A */
+/* ************************************************************************** */
+
+#define FLASH_SIZE            0x40000 /* 256 kB */
+#define FLASH_PAGE_SIZE       64
+#define FLASH_NB_OF_PAGES     4096
+#define FLASH_USER_PAGE_SIZE  64
+#define HMCRAMC0_SIZE         0x8000 /* 32 kB */
+#define FLASH_ADDR            (0x00000000U) /**< FLASH base address */
+#define FLASH_USER_PAGE_ADDR  (0x00800000U) /**< FLASH_USER_PAGE base address */
+#define HMCRAMC0_ADDR         (0x20000000U) /**< HMCRAMC0 base address */
+
+#define DSU_DID_RESETVALUE    0x10010000
+#define PORT_GROUPS           2
+
+/* ************************************************************************** */
+/**  ELECTRICAL DEFINITIONS FOR SAMD21J18A */
+/* ************************************************************************** */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+#endif /* SAMD21J18A_H */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/system_samd21.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/system_samd21.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/system_samd21.h	(revision 136)
@@ -0,0 +1,62 @@
+/**
+ * \file
+ *
+ * \brief Low-level initialization functions called upon chip startup
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _SYSTEM_SAMD21_H_INCLUDED_
+#define _SYSTEM_SAMD21_H_INCLUDED_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+extern uint32_t SystemCoreClock;   /*!< System Clock Frequency (Core Clock)  */
+
+void SystemInit(void);
+void SystemCoreClockUpdate(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_SAMD21_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e15a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e15a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e15a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21E15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00008000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00001000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x400;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e15a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e15a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e15a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21E15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00001000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x400;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e16a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e16a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e16a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21E16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00010000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00002000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x800;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e16a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e16a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e16a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21E16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00002000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x800;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e17a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e17a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e17a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21E17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e17a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e17a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e17a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21E17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e18a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e18a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e18a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21E18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e18a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e18a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21e18a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21E18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g15a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g15a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g15a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00008000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00001000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x400;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g15a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g15a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g15a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21G15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00001000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x400;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g16a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g16a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g16a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00010000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00002000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x800;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g16a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g16a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g16a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21G16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00002000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x800;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g17a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g17a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g17a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g17a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g17a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g17a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21G17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g18a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g18a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g18a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g18a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g18a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21g18a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21G18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j15a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j15a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j15a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21J15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00008000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00001000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x400;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j15a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j15a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j15a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21J15A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00001000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x400;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j16a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j16a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j16a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21J16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00010000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00002000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x800;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j16a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j16a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j16a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21J16A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00002000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x800;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j17a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j17a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j17a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21J17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j17a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j17a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j17a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21J17A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j18a_flash.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j18a_flash.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j18a_flash.ld	(revision 136)
@@ -0,0 +1,157 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21J18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom    (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j18a_sram.ld
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j18a_sram.ld	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/samd21j18a_sram.ld	(revision 136)
@@ -0,0 +1,156 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal SRAM on the SAMD21J18A
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  ram    (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > ram
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > ram
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _end = . ;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/startup_samd21.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/startup_samd21.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/as_gcc/startup_samd21.c	(revision 136)
@@ -0,0 +1,201 @@
+/**
+ * \file
+ *
+ * \brief gcc starttup file for SAMD21
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "samd21.h"
+
+/* Initialize segments */
+extern uint32_t _sfixed;
+extern uint32_t _efixed;
+extern uint32_t _etext;
+extern uint32_t _srelocate;
+extern uint32_t _erelocate;
+extern uint32_t _szero;
+extern uint32_t _ezero;
+extern uint32_t _sstack;
+extern uint32_t _estack;
+
+/** \cond DOXYGEN_SHOULD_SKIP_THIS */
+int main(void);
+/** \endcond */
+
+void __libc_init_array(void);
+
+/* Default empty handler */
+void Dummy_Handler(void);
+
+/* Cortex-M0+ core handlers */
+void NMI_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void HardFault_Handler       ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SVC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void PendSV_Handler          ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SysTick_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+
+/* Peripherals handlers */
+void PM_Handler              ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SYSCTRL_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void WDT_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void RTC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void EIC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void NVMCTRL_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void DMAC_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void USB_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void EVSYS_Handler           ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM0_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM1_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM2_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM3_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM4_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void SERCOM5_Handler         ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC0_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC1_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TCC2_Handler            ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC3_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC4_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC5_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC6_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void TC7_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void ADC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void AC_Handler              ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void DAC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void PTC_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+void I2S_Handler             ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
+
+/* Exception Table */
+__attribute__ ((section(".vectors")))
+const DeviceVectors exception_table = {
+
+        /* Configure Initial Stack Pointer, using linker-generated symbols */
+        (void*) (&_estack),
+
+        (void*) Reset_Handler,
+        (void*) NMI_Handler,
+        (void*) HardFault_Handler,
+        (void*) (0UL), /* Reserved */
+        (void*) (0UL), /* Reserved */
+        (void*) (0UL), /* Reserved */
+        (void*) (0UL), /* Reserved */
+        (void*) (0UL), /* Reserved */
+        (void*) (0UL), /* Reserved */
+        (void*) (0UL), /* Reserved */
+        (void*) SVC_Handler,
+        (void*) (0UL), /* Reserved */
+        (void*) (0UL), /* Reserved */
+        (void*) PendSV_Handler,
+        (void*) SysTick_Handler,
+
+        /* Configurable interrupts */
+        (void*) PM_Handler,             /*  0 Power Manager */
+        (void*) SYSCTRL_Handler,        /*  1 System Control */
+        (void*) WDT_Handler,            /*  2 Watchdog Timer */
+        (void*) RTC_Handler,            /*  3 Real-Time Counter */
+        (void*) EIC_Handler,            /*  4 External Interrupt Controller */
+        (void*) NVMCTRL_Handler,        /*  5 Non-Volatile Memory Controller */
+        (void*) DMAC_Handler,           /*  6 Direct Memory Access Controller */
+        (void*) USB_Handler,            /*  7 Universal Serial Bus */
+        (void*) EVSYS_Handler,          /*  8 Event System Interface */
+        (void*) SERCOM0_Handler,        /*  9 Serial Communication Interface 0 */
+        (void*) SERCOM1_Handler,        /* 10 Serial Communication Interface 1 */
+        (void*) SERCOM2_Handler,        /* 11 Serial Communication Interface 2 */
+        (void*) SERCOM3_Handler,        /* 12 Serial Communication Interface 3 */
+        (void*) SERCOM4_Handler,        /* 13 Serial Communication Interface 4 */
+        (void*) SERCOM5_Handler,        /* 14 Serial Communication Interface 5 */
+        (void*) TCC0_Handler,           /* 15 Timer Counter Control 0 */
+        (void*) TCC1_Handler,           /* 16 Timer Counter Control 1 */
+        (void*) TCC2_Handler,           /* 17 Timer Counter Control 2 */
+        (void*) TC3_Handler,            /* 18 Basic Timer Counter 0 */
+        (void*) TC4_Handler,            /* 19 Basic Timer Counter 1 */
+        (void*) TC5_Handler,            /* 20 Basic Timer Counter 2 */
+        (void*) TC6_Handler,            /* 21 Basic Timer Counter 3 */
+        (void*) TC7_Handler,            /* 22 Basic Timer Counter 4 */
+        (void*) ADC_Handler,            /* 23 Analog Digital Converter */
+        (void*) AC_Handler,             /* 24 Analog Comparators */
+        (void*) DAC_Handler,            /* 25 Digital Analog Converter */
+        (void*) PTC_Handler,            /* 26 Peripheral Touch Controller */
+        (void*) I2S_Handler             /* 27 Inter-IC Sound Interface */
+};
+
+/**
+ * \brief This is the code that gets called on processor reset.
+ * To initialize the device, and call the main() routine.
+ */
+void Reset_Handler(void)
+{
+        uint32_t *pSrc, *pDest;
+
+        /* Initialize the relocate segment */
+        pSrc = &_etext;
+        pDest = &_srelocate;
+
+        if (pSrc != pDest) {
+                for (; pDest < &_erelocate;) {
+                        *pDest++ = *pSrc++;
+                }
+        }
+
+        /* Clear the zero segment */
+        for (pDest = &_szero; pDest < &_ezero;) {
+                *pDest++ = 0;
+        }
+
+        /* Set the vector table base address */
+        pSrc = (uint32_t *) & _sfixed;
+        SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
+
+        /* Initialize the C library */
+        __libc_init_array();
+
+        /* Branch to main function */
+        main();
+
+        /* Infinite loop */
+        while (1);
+}
+
+/**
+ * \brief Default interrupt handler for unused IRQs.
+ */
+void Dummy_Handler(void)
+{
+        while (1) {
+        }
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/system_samd21.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/system_samd21.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/source/system_samd21.c	(revision 136)
@@ -0,0 +1,78 @@
+/**
+ * \file
+ *
+ * \brief Low-level initialization functions called upon chip startup.
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "samd21.h"
+
+/**
+ * Initial system clock frequency. The System RC Oscillator (RCSYS) provides
+ *  the source for the main clock at chip startup.
+ */
+#define __SYSTEM_CLOCK    (1000000)
+
+uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/
+
+/**
+ * Initialize the system
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+void SystemInit(void)
+{
+	// Keep the default device state after reset
+	SystemCoreClock = __SYSTEM_CLOCK;
+	return;
+}
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock
+ *         retrieved from cpu registers.
+ */
+void SystemCoreClockUpdate(void)
+{
+	// Not implemented
+	SystemCoreClock = __SYSTEM_CLOCK;
+	return;
+}
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samg.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samg.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samg.h	(revision 136)
@@ -0,0 +1,48 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2014, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+#ifndef _SAMG_INCLUDED_
+#define _SAMG_INCLUDED_
+
+#if defined (__SAMG51G18__)
+#include "samg51/include/samg51.h"
+#elif defined (__SAMG51N18__)
+#include "samg51/include/samg51.h"
+#elif defined (__SAMG53G19__)
+#include "samg53/include/samg53.h"
+#elif defined (__SAMG53N19__)
+#include "samg53/include/samg53.h"
+#elif defined (__SAMG54G19__)
+#include "samg54/include/samg54.h"
+#elif defined (__SAMG54J19__)
+#include "samg54/include/samg54.h"
+#elif defined (__SAMG54N19__)
+#include "samg54/include/samg54.h"
+#endif
+
+#endif /* _SAMG_INCLUDED_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/saml.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/saml.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/saml.h	(revision 136)
@@ -0,0 +1,52 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2014, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+#ifndef _SAML_INCLUDED_
+#define _SAML_INCLUDED_
+
+#if defined (__SAML21E15A__)
+#include "saml21/include/saml21.h"
+#elif defined (__SAML21E16A__)
+#include "saml21/include/saml21.h"
+#elif defined (__SAML21E17A__)
+#include "saml21/include/saml21.h"
+#elif defined (__SAML21G16A__)
+#include "saml21/include/saml21.h"
+#elif defined (__SAML21G17A__)
+#include "saml21/include/saml21.h"
+#elif defined (__SAML21G18A__)
+#include "saml21/include/saml21.h"
+#elif defined (__SAML21J16A__)
+#include "saml21/include/saml21.h"
+#elif defined (__SAML21J17A__)
+#include "saml21/include/saml21.h"
+#elif defined (__SAML21J18A__)
+#include "saml21/include/saml21.h"
+#endif
+
+#endif /* _SAML_INCLUDED_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samr.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samr.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samr.h	(revision 136)
@@ -0,0 +1,46 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2014, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+#ifndef _SAMR_INCLUDED_
+#define _SAMR_INCLUDED_
+
+#if defined (__SAMR21E16A__)
+#include "samr21/include/samr21.h"
+#elif defined (__SAMR21E17A__)
+#include "samr21/include/samr21.h"
+#elif defined (__SAMR21E18A__)
+#include "samr21/include/samr21.h"
+#elif defined (__SAMR21G16A__)
+#include "samr21/include/samr21.h"
+#elif defined (__SAMR21G17A__)
+#include "samr21/include/samr21.h"
+#elif defined (__SAMR21G18A__)
+#include "samr21/include/samr21.h"
+#endif
+
+#endif /* _SAMR_INCLUDED_ */
Index: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/wisc.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/wisc.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/wisc.h	(revision 136)
@@ -0,0 +1,36 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2014, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+#ifndef _WISC_INCLUDED_
+#define _WISC_INCLUDED_
+
+#if defined (__WISC35D3NA__)
+#include "wisc35/include/wisc35.h"
+#endif
+
+#endif /* _WISC_INCLUDED_ */
Index: rtos_arduino/trunk/arduino_lib/libraries/Audio/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Audio/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Audio/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Audio Library for Arduino =
+
+The Audio library enables an Arduino Due board to play back .wav files from a storage device like an SD card.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/Audio
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Audio/examples/SimpleAudioPlayer/SimpleAudioPlayer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Audio/examples/SimpleAudioPlayer/SimpleAudioPlayer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Audio/examples/SimpleAudioPlayer/SimpleAudioPlayer.ino	(revision 136)
@@ -0,0 +1,84 @@
+/*
+  Simple Audio Player
+
+ Demonstrates the use of the Audio library for the Arduino Due
+
+ Hardware required :
+ * Arduino shield with a SD card on CS4
+ * A sound file named "test.wav" in the root directory of the SD card
+ * An audio amplifier to connect to the DAC0 and ground
+ * A speaker to connect to the audio amplifier
+
+ Original by Massimo Banzi September 20, 2012
+ Modified by Scott Fitzgerald October 19, 2012
+
+ This example code is in the public domain
+
+ http://arduino.cc/en/Tutorial/SimpleAudioPlayer
+
+*/
+
+#include <SD.h>
+#include <SPI.h>
+#include <Audio.h>
+
+void setup()
+{
+  // debug output at 9600 baud
+  Serial.begin(9600);
+
+  // setup SD-card
+  Serial.print("Initializing SD card...");
+  if (!SD.begin(4)) {
+    Serial.println(" failed!");
+    return;
+  }
+  Serial.println(" done.");
+  // hi-speed SPI transfers
+  SPI.setClockDivider(4);
+
+  // 44100Khz stereo => 88200 sample rate
+  // 100 mSec of prebuffering.
+  Audio.begin(88200, 100);
+}
+
+void loop()
+{
+  int count = 0;
+
+  // open wave file from sdcard
+  File myFile = SD.open("test.wav");
+  if (!myFile) {
+    // if the file didn't open, print an error and stop
+    Serial.println("error opening test.wav");
+    while (true);
+  }
+
+  const int S = 1024; // Number of samples to read in block
+  short buffer[S];
+
+  Serial.print("Playing");
+  // until the file is not finished
+  while (myFile.available()) {
+    // read from the file into buffer
+    myFile.read(buffer, sizeof(buffer));
+
+    // Prepare samples
+    int volume = 1024;
+    Audio.prepare(buffer, S, volume);
+    // Feed samples to audio
+    Audio.write(buffer, S);
+
+    // Every 100 block print a '.'
+    count++;
+    if (count == 100) {
+      Serial.print(".");
+      count = 0;
+    }
+  }
+  myFile.close();
+
+  Serial.println("End of file. Thank you for listening!");
+  while (true) ;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Audio/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Audio/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Audio/keywords.txt	(revision 136)
@@ -0,0 +1,21 @@
+#######################################
+# Syntax Coloring Map For Audio
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+Audio	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+prepare	KEYWORD2
+write	KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Audio/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Audio/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Audio/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Audio
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Allows playing audio files from an SD card. For Arduino DUE only.
+paragraph=With this library you can use the Arduino Due DAC outputs to play audio files.<br />The audio files must be in the raw .wav format.
+category=Signal Input/Output
+url=http://arduino.cc/en/Reference/Audio
+architectures=sam
Index: rtos_arduino/trunk/arduino_lib/libraries/Audio/src/Audio.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Audio/src/Audio.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Audio/src/Audio.cpp	(revision 136)
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2012 by Cristian Maglie <c.maglie@arduino.cc>
+ * Audio library for Arduino Due.
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of either the GNU General Public License version 2
+ * or the GNU Lesser General Public License version 2.1, both as
+ * published by the Free Software Foundation.
+ */
+
+#include "Audio.h"
+
+void AudioClass::begin(uint32_t sampleRate, uint32_t msPreBuffer) {
+	// Allocate a buffer to keep msPreBuffer milliseconds of audio
+	bufferSize = msPreBuffer * sampleRate / 1000;
+	if (bufferSize < 1024)
+		bufferSize = 1024;
+	buffer = (uint32_t *) malloc(bufferSize * sizeof(uint32_t));
+	half = buffer + bufferSize / 2;
+	last = buffer + bufferSize;
+
+	// Buffering starts from the beginning
+	running = buffer;
+	next = buffer;
+
+	// Start DAC
+	dac->begin(VARIANT_MCK / sampleRate);
+	dac->setOnTransmitEnd_CB(onTransmitEnd, this);
+}
+
+void AudioClass::end() {
+	dac->end();
+	free( buffer);
+}
+
+void AudioClass::prepare(int16_t *buffer, int S, int volume){
+    uint16_t *ubuffer = (uint16_t*) buffer;
+    for (int i=0; i<S; i++) {
+        // set volume amplitude (signed multiply)
+        buffer[i] = buffer[i] * volume / 1024;
+        // convert from signed 16 bit to unsigned 12 bit for DAC.
+        ubuffer[i] += 0x8000;
+        ubuffer[i] >>= 4;
+    }
+}
+
+size_t AudioClass::write(const uint32_t *data, size_t size) {
+	const uint32_t TAG = 0x10000000;
+	int i;
+	for (i = 0; i < size; i++) {
+		*next = data[i] | TAG;
+		next++;
+
+		if (next == half || next == last) {
+			enqueue();
+			while (next == running)
+				;
+		}
+	}
+
+	return i;
+}
+
+void AudioClass::enqueue() {
+	if (!dac->canQueue()) {
+		// DMA queue full
+		return;
+	}
+
+	if (next == half) {
+		// Enqueue the first half
+		dac->queueBuffer(buffer, bufferSize / 2);
+	} else {
+		// Enqueue the second half
+		dac->queueBuffer(half, bufferSize / 2);
+		next = buffer; // wrap around
+	}
+}
+
+void AudioClass::onTransmitEnd(void *_me) {
+	AudioClass *me = reinterpret_cast<AudioClass *> (_me);
+	if (me->running == me->buffer)
+		me->running = me->half;
+	else
+		me->running = me->buffer;
+}
+
+AudioClass Audio(DAC);
Index: rtos_arduino/trunk/arduino_lib/libraries/Audio/src/Audio.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Audio/src/Audio.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Audio/src/Audio.h	(revision 136)
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2012 by Cristian Maglie <c.maglie@arduino.cc>
+ * Audio library for Arduino Due.
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of either the GNU General Public License version 2
+ * or the GNU Lesser General Public License version 2.1, both as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef AUDIO_H
+#define AUDIO_H
+
+#include "Arduino.h"
+#include "Print.h"
+#include "DAC.h"
+
+class AudioClass : public Print {
+public:
+	AudioClass(DACClass &_dac) : dac(&_dac) { };
+	void prepare(int16_t *buffer, int S, int volume);
+	void begin(uint32_t sampleRate, uint32_t msPreBuffer);
+	void end();
+
+	virtual size_t write(uint8_t c)                         { /* not implemented */ };
+	virtual size_t write(const uint8_t *data, size_t size)  { return write(reinterpret_cast<const uint32_t*>(data), size/4) * 4; };
+	virtual size_t write(const uint16_t *data, size_t size) { return write(reinterpret_cast<const uint32_t*>(data), size/2) * 2; };
+	virtual size_t write(const int16_t *data, size_t size)  { return write(reinterpret_cast<const uint32_t*>(data), size/2) * 2; };
+	virtual size_t write(const uint32_t *data, size_t size);
+
+	void debug() {
+//		Serial1.print(running-buffer, DEC);
+//		Serial1.print(" ");
+//		Serial1.print(current-buffer, DEC);
+//		Serial1.print(" ");
+//		Serial1.print(next-buffer, DEC);
+//		Serial1.print(" ");
+//		Serial1.println(last-buffer, DEC);
+	}
+private:
+	void enqueue();
+	static void onTransmitEnd(void *me);
+	uint32_t bufferSize;
+	uint32_t *buffer;
+	uint32_t *half;
+	uint32_t *last;
+	uint32_t *volatile running;
+	uint32_t *volatile next;
+
+	uint32_t *cook(const uint32_t *buffer, size_t size);
+
+	DACClass *dac;
+};
+
+extern AudioClass Audio;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Audio/src/DAC.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Audio/src/DAC.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Audio/src/DAC.cpp	(revision 136)
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2012 by Cristian Maglie <c.maglie@arduino.cc>
+ * DAC library for Arduino Due.
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of either the GNU General Public License version 2
+ * or the GNU Lesser General Public License version 2.1, both as
+ * published by the Free Software Foundation.
+ */
+
+#include <DAC.h>
+
+void DACClass::begin(uint32_t period) {
+	// Enable clock for DAC
+	pmc_enable_periph_clk(dacId);
+
+	dacc_reset(dac);
+
+	// Set transfer mode to double word
+	dacc_set_transfer_mode(dac, 1);
+
+	// Power save:
+	// sleep mode  - 0 (disabled)
+	// fast wakeup - 0 (disabled)
+	dacc_set_power_save(dac, 0, 0);
+
+	// DAC refresh/startup timings:
+	// refresh        - 0x08 (1024*8 dacc clocks)
+	// max speed mode -    0 (disabled)
+	// startup time   - 0x10 (1024 dacc clocks)
+	dacc_set_timing(dac, 0x08, 0, DACC_MR_STARTUP_1024);
+
+	// Flexible channel selection with tags
+	dacc_enable_flexible_selection(dac);
+
+	// Set up analog current
+	dacc_set_analog_control(dac,
+			DACC_ACR_IBCTLCH0(0x02) |
+			DACC_ACR_IBCTLCH1(0x02) |
+			DACC_ACR_IBCTLDACCORE(0x01));
+
+	// Enable output channels
+	dacc_enable_channel(dac, 0);
+	dacc_enable_channel(dac, 1);
+
+	// Configure Timer Counter to trigger DAC
+	// --------------------------------------
+	pmc_enable_periph_clk(ID_TC1);
+	TC_Configure(TC0, 1,
+		TC_CMR_TCCLKS_TIMER_CLOCK2 |  // Clock at MCR/8
+		TC_CMR_WAVE |                 // Waveform mode
+		TC_CMR_WAVSEL_UP_RC |         // Counter running up and reset when equals to RC
+		TC_CMR_ACPA_SET | TC_CMR_ACPC_CLEAR);
+	const uint32_t TC = period / 8;
+	TC_SetRA(TC0, 1, TC / 2);
+	TC_SetRC(TC0, 1, TC);
+	TC_Start(TC0, 1);
+
+	// Configure clock source for DAC (2 = TC0 Output Chan. 1)
+	dacc_set_trigger(dac, 2);
+
+	// Configure pins
+	PIO_Configure(g_APinDescription[DAC0].pPort,
+			g_APinDescription[DAC0].ulPinType,
+			g_APinDescription[DAC0].ulPin,
+			g_APinDescription[DAC0].ulPinConfiguration);
+	PIO_Configure(g_APinDescription[DAC1].pPort,
+			g_APinDescription[DAC1].ulPinType,
+			g_APinDescription[DAC1].ulPin,
+			g_APinDescription[DAC1].ulPinConfiguration);
+
+	// Enable interrupt controller for DAC
+	dacc_disable_interrupt(dac, 0xFFFFFFFF);
+	NVIC_DisableIRQ(isrId);
+	NVIC_ClearPendingIRQ(isrId);
+	NVIC_SetPriority(isrId, 0);
+	NVIC_EnableIRQ(isrId);
+}
+
+void DACClass::end() {
+	TC_Stop(TC0, 1);
+	NVIC_DisableIRQ(isrId);
+	dacc_disable_channel(dac, 0);
+	dacc_disable_channel(dac, 1);
+}
+
+bool DACClass::canQueue() {
+	return (dac->DACC_TNCR == 0);
+}
+
+size_t DACClass::queueBuffer(const uint32_t *buffer, size_t size) {
+	// Try the first PDC buffer
+	if ((dac->DACC_TCR == 0) && (dac->DACC_TNCR == 0)) {
+		dac->DACC_TPR = (uint32_t) buffer;
+		dac->DACC_TCR = size;
+		dac->DACC_PTCR = DACC_PTCR_TXTEN;
+		if (cb)
+			dacc_enable_interrupt(dac, DACC_IER_ENDTX);
+		return size;
+	}
+
+	// Try the second PDC buffer
+	if (dac->DACC_TNCR == 0) {
+		dac->DACC_TNPR = (uint32_t) buffer;
+		dac->DACC_TNCR = size;
+		dac->DACC_PTCR = DACC_PTCR_TXTEN;
+		if (cb)
+			dacc_enable_interrupt(dac, DACC_IER_ENDTX);
+		return size;
+	}
+
+	// PDC buffers full, try again later...
+	return 0;
+}
+
+void DACClass::setOnTransmitEnd_CB(OnTransmitEnd_CB _cb, void *_data) {
+	cb = _cb;
+	cbData = _data;
+	if (!cb)
+		dacc_disable_interrupt(dac, DACC_IDR_ENDTX);
+}
+
+void DACClass::onService() {
+	uint32_t sr = dac->DACC_ISR;
+	if (sr & DACC_ISR_ENDTX) {
+		// There is a free slot, enqueue data
+		dacc_disable_interrupt(dac, DACC_IDR_ENDTX);
+		if (cb)
+			cb(cbData);
+	}
+}
+
+DACClass DAC(DACC_INTERFACE, DACC_INTERFACE_ID, DACC_ISR_ID);
+
+void DACC_ISR_HANDLER(void) {
+	DAC.onService();
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Audio/src/DAC.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Audio/src/DAC.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Audio/src/DAC.h	(revision 136)
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2012 by Cristian Maglie <c.maglie@arduino.cc>
+ * DAC library for Arduino Due.
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of either the GNU General Public License version 2
+ * or the GNU Lesser General Public License version 2.1, both as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef DAC_INCLUDED
+#define DAC_INCLUDED
+
+#include "Arduino.h"
+
+typedef void (*OnTransmitEnd_CB)(void *data);
+
+class DACClass
+{
+public:
+	DACClass(Dacc *_dac, uint32_t _dacId, IRQn_Type _isrId) :
+		dac(_dac), dacId(_dacId), isrId(_isrId), cb(NULL) { };
+	void begin(uint32_t period);
+	void end();
+	bool canQueue();
+	size_t queueBuffer(const uint32_t *buffer, size_t size);
+	uint32_t *getCurrentQueuePointer();
+	void setOnTransmitEnd_CB(OnTransmitEnd_CB _cb, void *data);
+	void onService();
+
+	void enableInterrupts()  { NVIC_EnableIRQ(isrId); };
+	void disableInterrupts() { NVIC_DisableIRQ(isrId); };
+
+private:
+	Dacc *dac;
+	uint32_t dacId;
+	IRQn_Type isrId;
+	OnTransmitEnd_CB cb;
+	void *cbData;
+};
+
+extern DACClass DAC;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Bridge Library for Arduino =
+
+The Bridge library simplifies communication between the ATmega32U4 and the AR9331.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/YunBridgeLibrary
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Bridge/Bridge.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Bridge/Bridge.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Bridge/Bridge.ino	(revision 136)
@@ -0,0 +1,187 @@
+/*
+  Arduino Y炭n Bridge example
+
+ This example for the Arduino Y炭n shows how to use the
+ Bridge library to access the digital and analog pins
+ on the board through REST calls. It demonstrates how
+ you can create your own API when using REST style
+ calls through the browser.
+
+ Possible commands created in this shetch:
+
+ * "/arduino/digital/13"     -> digitalRead(13)
+ * "/arduino/digital/13/1"   -> digitalWrite(13, HIGH)
+ * "/arduino/analog/2/123"   -> analogWrite(2, 123)
+ * "/arduino/analog/2"       -> analogRead(2)
+ * "/arduino/mode/13/input"  -> pinMode(13, INPUT)
+ * "/arduino/mode/13/output" -> pinMode(13, OUTPUT)
+
+ This example code is part of the public domain
+
+ http://arduino.cc/en/Tutorial/Bridge
+
+ */
+
+#include <Bridge.h>
+#include <YunServer.h>
+#include <YunClient.h>
+
+// Listen to the default port 5555, the Y炭n webserver
+// will forward there all the HTTP requests you send
+YunServer server;
+
+void setup() {
+  // Bridge startup
+  pinMode(13, OUTPUT);
+  digitalWrite(13, LOW);
+  Bridge.begin();
+  digitalWrite(13, HIGH);
+
+  // Listen for incoming connection only from localhost
+  // (no one from the external network could connect)
+  server.listenOnLocalhost();
+  server.begin();
+}
+
+void loop() {
+  // Get clients coming from server
+  YunClient client = server.accept();
+
+  // There is a new client?
+  if (client) {
+    // Process request
+    process(client);
+
+    // Close connection and free resources.
+    client.stop();
+  }
+
+  delay(50); // Poll every 50ms
+}
+
+void process(YunClient client) {
+  // read the command
+  String command = client.readStringUntil('/');
+
+  // is "digital" command?
+  if (command == "digital") {
+    digitalCommand(client);
+  }
+
+  // is "analog" command?
+  if (command == "analog") {
+    analogCommand(client);
+  }
+
+  // is "mode" command?
+  if (command == "mode") {
+    modeCommand(client);
+  }
+}
+
+void digitalCommand(YunClient client) {
+  int pin, value;
+
+  // Read pin number
+  pin = client.parseInt();
+
+  // If the next character is a '/' it means we have an URL
+  // with a value like: "/digital/13/1"
+  if (client.read() == '/') {
+    value = client.parseInt();
+    digitalWrite(pin, value);
+  }
+  else {
+    value = digitalRead(pin);
+  }
+
+  // Send feedback to client
+  client.print(F("Pin D"));
+  client.print(pin);
+  client.print(F(" set to "));
+  client.println(value);
+
+  // Update datastore key with the current pin value
+  String key = "D";
+  key += pin;
+  Bridge.put(key, String(value));
+}
+
+void analogCommand(YunClient client) {
+  int pin, value;
+
+  // Read pin number
+  pin = client.parseInt();
+
+  // If the next character is a '/' it means we have an URL
+  // with a value like: "/analog/5/120"
+  if (client.read() == '/') {
+    // Read value and execute command
+    value = client.parseInt();
+    analogWrite(pin, value);
+
+    // Send feedback to client
+    client.print(F("Pin D"));
+    client.print(pin);
+    client.print(F(" set to analog "));
+    client.println(value);
+
+    // Update datastore key with the current pin value
+    String key = "D";
+    key += pin;
+    Bridge.put(key, String(value));
+  }
+  else {
+    // Read analog pin
+    value = analogRead(pin);
+
+    // Send feedback to client
+    client.print(F("Pin A"));
+    client.print(pin);
+    client.print(F(" reads analog "));
+    client.println(value);
+
+    // Update datastore key with the current pin value
+    String key = "A";
+    key += pin;
+    Bridge.put(key, String(value));
+  }
+}
+
+void modeCommand(YunClient client) {
+  int pin;
+
+  // Read pin number
+  pin = client.parseInt();
+
+  // If the next character is not a '/' we have a malformed URL
+  if (client.read() != '/') {
+    client.println(F("error"));
+    return;
+  }
+
+  String mode = client.readStringUntil('\r');
+
+  if (mode == "input") {
+    pinMode(pin, INPUT);
+    // Send feedback to client
+    client.print(F("Pin D"));
+    client.print(pin);
+    client.print(F(" configured as INPUT!"));
+    return;
+  }
+
+  if (mode == "output") {
+    pinMode(pin, OUTPUT);
+    // Send feedback to client
+    client.print(F("Pin D"));
+    client.print(pin);
+    client.print(F(" configured as OUTPUT!"));
+    return;
+  }
+
+  client.print(F("error: invalid mode "));
+  client.print(mode);
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ConsoleAsciiTable/ConsoleAsciiTable.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ConsoleAsciiTable/ConsoleAsciiTable.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ConsoleAsciiTable/ConsoleAsciiTable.ino	(revision 136)
@@ -0,0 +1,95 @@
+/*
+  ASCII table
+
+ Prints out byte values in all possible formats:
+ * as raw binary values
+ * as ASCII-encoded decimal, hex, octal, and binary values
+
+ For more on ASCII, see http://www.asciitable.com and http://en.wikipedia.org/wiki/ASCII
+
+ The circuit:  No external hardware needed.
+
+ created 2006
+ by Nicholas Zambetti
+ http://www.zambetti.com
+ modified 9 Apr 2012
+ by Tom Igoe
+ modified 22 May 2013
+ by Cristian Maglie
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/ConsoleAsciiTable
+
+ */
+
+#include <Console.h>
+
+void setup() {
+  //Initialize Console and wait for port to open:
+  Bridge.begin();
+  Console.begin();
+
+  // Uncomment the following line to enable buffering:
+  // - better transmission speed and efficiency
+  // - needs to call Console.flush() to ensure that all
+  //   transmitted data is sent
+
+  //Console.buffer(64);
+
+  while (!Console) {
+    ; // wait for Console port to connect.
+  }
+
+  // prints title with ending line break
+  Console.println("ASCII Table ~ Character Map");
+}
+
+// first visible ASCIIcharacter '!' is number 33:
+int thisByte = 33;
+// you can also write ASCII characters in single quotes.
+// for example. '!' is the same as 33, so you could also use this:
+//int thisByte = '!';
+
+void loop() {
+  // prints value unaltered, i.e. the raw binary version of the
+  // byte. The Console monitor interprets all bytes as
+  // ASCII, so 33, the first number,  will show up as '!'
+  Console.write(thisByte);
+
+  Console.print(", dec: ");
+  // prints value as string as an ASCII-encoded decimal (base 10).
+  // Decimal is the  default format for Console.print() and Console.println(),
+  // so no modifier is needed:
+  Console.print(thisByte);
+  // But you can declare the modifier for decimal if you want to.
+  //this also works if you uncomment it:
+
+  // Console.print(thisByte, DEC);
+
+  Console.print(", hex: ");
+  // prints value as string in hexadecimal (base 16):
+  Console.print(thisByte, HEX);
+
+  Console.print(", oct: ");
+  // prints value as string in octal (base 8);
+  Console.print(thisByte, OCT);
+
+  Console.print(", bin: ");
+  // prints value as string in binary (base 2)
+  // also prints ending line break:
+  Console.println(thisByte, BIN);
+
+  // if printed last visible character '~' or 126, stop:
+  if (thisByte == 126) {    // you could also use if (thisByte == '~') {
+    // ensure the latest bit of data is sent
+    Console.flush();
+
+    // This loop loops forever and does nothing
+    while (true) {
+      continue;
+    }
+  }
+  // go on to the next character
+  thisByte++;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ConsolePixel/ConsolePixel.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ConsolePixel/ConsolePixel.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ConsolePixel/ConsolePixel.ino	(revision 136)
@@ -0,0 +1,64 @@
+/*
+  Console Pixel
+
+ An example of using the Arduino board to receive data from the
+ Console on the Arduino Y炭n.  In this case, the Arduino boards turns on an LED when
+ it receives the character 'H', and turns off the LED when it
+ receives the character 'L'.
+
+ To see the Console, pick your Y炭n's name and IP address in the Port menu
+ then open the Port Monitor. You can also see it by opening a terminal window
+ and typing
+ ssh root@ yourYunsName.local 'telnet localhost 6571'
+ then pressing enter. When prompted for the password, enter it.
+
+
+ The circuit:
+ * LED connected from digital pin 13 to ground
+
+ created 2006
+ by David A. Mellis
+ modified 25 Jun 2013
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/ConsolePixel
+
+ */
+
+#include <Console.h>
+
+const int ledPin = 13; // the pin that the LED is attached to
+char incomingByte;      // a variable to read incoming Console data into
+
+void setup() {
+  Bridge.begin();   // Initialize Bridge
+  Console.begin();  // Initialize Console
+
+  // Wait for the Console port to connect
+  while (!Console);
+
+  Console.println("type H or L to turn pin 13 on or off");
+
+  // initialize the LED pin as an output:
+  pinMode(ledPin, OUTPUT);
+}
+
+void loop() {
+  // see if there's incoming Console data:
+  if (Console.available() > 0) {
+    // read the oldest byte in the Console buffer:
+    incomingByte = Console.read();
+    Console.println(incomingByte);
+    // if it's a capital H (ASCII 72), turn on the LED:
+    if (incomingByte == 'H') {
+      digitalWrite(ledPin, HIGH);
+    }
+    // if it's an L (ASCII 76) turn off the LED:
+    if (incomingByte == 'L') {
+      digitalWrite(ledPin, LOW);
+    }
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ConsoleRead/ConsoleRead.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ConsoleRead/ConsoleRead.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ConsoleRead/ConsoleRead.ino	(revision 136)
@@ -0,0 +1,61 @@
+/*
+  Console Read example
+
+ Read data coming from bridge using the Console.read() function
+ and store it in a string.
+
+ To see the Console, pick your Y炭n's name and IP address in the Port menu
+ then open the Port Monitor. You can also see it by opening a terminal window
+ and typing:
+ ssh root@ yourYunsName.local 'telnet localhost 6571'
+ then pressing enter. When prompted for the password, enter it.
+
+ created 13 Jun 2013
+ by Angelo Scialabba
+ modified 16 June 2013
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/ConsoleRead
+
+ */
+
+#include <Console.h>
+
+String name;
+
+void setup() {
+  // Initialize Console and wait for port to open:
+  Bridge.begin();
+  Console.begin();
+
+  // Wait for Console port to connect
+  while (!Console);
+
+  Console.println("Hi, what's your name?");
+}
+
+void loop() {
+  if (Console.available() > 0) {
+    char c = Console.read(); // read the next char received
+    // look for the newline character, this is the last character in the string
+    if (c == '\n') {
+      //print text with the name received
+      Console.print("Hi ");
+      Console.print(name);
+      Console.println("! Nice to meet you!");
+      Console.println();
+      // Ask again for name and clear the old name
+      Console.println("Hi, what's your name?");
+      name = "";  // clear the name string
+    }
+    else {  	 // if the buffer is empty Cosole.read() returns -1
+      name += c; // append the read char from Console to the name string
+    }
+  } else {
+    delay(100);
+  }
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Datalogger/Datalogger.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Datalogger/Datalogger.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Datalogger/Datalogger.ino	(revision 136)
@@ -0,0 +1,101 @@
+/*
+  SD card datalogger
+
+ This example shows how to log data from three analog sensors
+ to an SD card mounted on the Arduino Y炭n using the Bridge library.
+
+ The circuit:
+ * analog sensors on analog pins 0, 1 and 2
+ * SD card attached to SD card slot of the Arduino Y炭n
+
+ Prepare your SD card creating an empty folder in the SD root
+ named "arduino". This will ensure that the Y炭n will create a link
+ to the SD to the "/mnt/sd" path.
+
+ You can remove the SD card while the Linux and the
+ sketch are running but be careful not to remove it while
+ the system is writing to it.
+
+ created  24 Nov 2010
+ modified 9 Apr 2012
+ by Tom Igoe
+ adapted to the Y炭n Bridge library 20 Jun 2013
+ by Federico Vanzati
+ modified  21 Jun 2013
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/YunDatalogger
+
+ */
+
+#include <FileIO.h>
+
+void setup() {
+  // Initialize the Bridge and the Serial
+  Bridge.begin();
+  Serial.begin(9600);
+  FileSystem.begin();
+
+  while (!Serial); // wait for Serial port to connect.
+  Serial.println("Filesystem datalogger\n");
+}
+
+
+void loop () {
+  // make a string that start with a timestamp for assembling the data to log:
+  String dataString;
+  dataString += getTimeStamp();
+  dataString += " = ";
+
+  // read three sensors and append to the string:
+  for (int analogPin = 0; analogPin < 3; analogPin++) {
+    int sensor = analogRead(analogPin);
+    dataString += String(sensor);
+    if (analogPin < 2) {
+      dataString += ",";  // separate the values with a comma
+    }
+  }
+
+  // open the file. note that only one file can be open at a time,
+  // so you have to close this one before opening another.
+  // The FileSystem card is mounted at the following "/mnt/FileSystema1"
+  File dataFile = FileSystem.open("/mnt/sd/datalog.txt", FILE_APPEND);
+
+  // if the file is available, write to it:
+  if (dataFile) {
+    dataFile.println(dataString);
+    dataFile.close();
+    // print to the serial port too:
+    Serial.println(dataString);
+  }
+  // if the file isn't open, pop up an error:
+  else {
+    Serial.println("error opening datalog.txt");
+  }
+
+  delay(15000);
+
+}
+
+// This function return a string with the time stamp
+String getTimeStamp() {
+  String result;
+  Process time;
+  // date is a command line utility to get the date and the time
+  // in different formats depending on the additional parameter
+  time.begin("date");
+  time.addParameter("+%D-%T");  // parameters: D for the complete date mm/dd/yy
+  //             T for the time hh:mm:ss
+  time.run();  // run the command
+
+  // read the output of the command
+  while (time.available() > 0) {
+    char c = time.read();
+    if (c != '\n')
+      result += c;
+  }
+
+  return result;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/FileWriteScript/FileWriteScript.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/FileWriteScript/FileWriteScript.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/FileWriteScript/FileWriteScript.ino	(revision 136)
@@ -0,0 +1,84 @@
+/*
+  Write to file using FileIO classes.
+
+ This sketch demonstrate how to write file into the Y炭n filesystem.
+ A shell script file is created in /tmp, and it is executed afterwards.
+
+ created 7 June 2010
+ by Cristian Maglie
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/FileWriteScript
+
+ */
+
+#include <FileIO.h>
+
+void setup() {
+  // Setup Bridge (needed every time we communicate with the Arduino Y炭n)
+  Bridge.begin();
+  // Initialize the Serial
+  Serial.begin(9600);
+
+  while (!Serial); // wait for Serial port to connect.
+  Serial.println("File Write Script example\n\n");
+
+  // Setup File IO
+  FileSystem.begin();
+
+  // Upload script used to gain network statistics
+  uploadScript();
+}
+
+void loop() {
+  // Run stats script every 5 secs.
+  runScript();
+  delay(5000);
+}
+
+// this function creates a file into the linux processor that contains a shell script
+// to check the network traffic of the WiFi interface
+void uploadScript() {
+  // Write our shell script in /tmp
+  // Using /tmp stores the script in RAM this way we can preserve
+  // the limited amount of FLASH erase/write cycles
+  File script = FileSystem.open("/tmp/wlan-stats.sh", FILE_WRITE);
+  // Shell script header
+  script.print("#!/bin/sh\n");
+  // shell commands:
+  // ifconfig: is a command line utility for controlling the network interfaces.
+  //           wlan0 is the interface we want to query
+  // grep: search inside the output of the ifconfig command the "RX bytes" keyword
+  //       and extract the line that contains it
+  script.print("ifconfig wlan0 | grep 'RX bytes'\n");
+  script.close();  // close the file
+
+  // Make the script executable
+  Process chmod;
+  chmod.begin("chmod");      // chmod: change mode
+  chmod.addParameter("+x");  // x stays for executable
+  chmod.addParameter("/tmp/wlan-stats.sh");  // path to the file to make it executable
+  chmod.run();
+}
+
+
+// this function run the script and read the output data
+void runScript() {
+  // Run the script and show results on the Serial
+  Process myscript;
+  myscript.begin("/tmp/wlan-stats.sh");
+  myscript.run();
+
+  String output = "";
+
+  // read the output of the script
+  while (myscript.available()) {
+    output += (char)myscript.read();
+  }
+  // remove the blank spaces at the beginning and the ending of the string
+  output.trim();
+  Serial.println(output);
+  Serial.flush();
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/HttpClient/HttpClient.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/HttpClient/HttpClient.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/HttpClient/HttpClient.ino	(revision 136)
@@ -0,0 +1,53 @@
+/*
+  Y炭n HTTP Client
+
+ This example for the Arduino Y炭n shows how create a basic
+ HTTP client that connects to the internet and downloads
+ content. In this case, you'll connect to the Arduino
+ website and download a version of the logo as ASCII text.
+
+ created by Tom igoe
+ May 2013
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/HttpClient
+
+ */
+
+#include <Bridge.h>
+#include <HttpClient.h>
+
+void setup() {
+  // Bridge takes about two seconds to start up
+  // it can be helpful to use the on-board LED
+  // as an indicator for when it has initialized
+  pinMode(13, OUTPUT);
+  digitalWrite(13, LOW);
+  Bridge.begin();
+  digitalWrite(13, HIGH);
+
+  Serial.begin(9600);
+
+  while (!Serial); // wait for a serial connection
+}
+
+void loop() {
+  // Initialize the client library
+  HttpClient client;
+
+  // Make a HTTP request:
+  client.get("http://arduino.cc/asciilogo.txt");
+
+  // if there are incoming bytes available
+  // from the server, read them and print them:
+  while (client.available()) {
+    char c = client.read();
+    Serial.print(c);
+  }
+  Serial.flush();
+
+  delay(5000);
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/MailboxReadMessage/MailboxReadMessage.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/MailboxReadMessage/MailboxReadMessage.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/MailboxReadMessage/MailboxReadMessage.ino	(revision 136)
@@ -0,0 +1,60 @@
+/*
+  Read Messages from the Mailbox
+
+ This example for the Arduino Y炭n shows how to
+ read the messages queue, called Mailbox, using the
+ Bridge library.
+ The messages can be sent to the queue through REST calls.
+ Appen the message in the URL after the keyword "/mailbox".
+ Example
+
+ "/mailbox/hello"
+
+ created 3 Feb 2014
+ by Federico Vanzati & Federico Fissore
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/MailboxReadMessage
+
+ */
+
+#include <Mailbox.h>
+
+void setup() {
+  pinMode(13, OUTPUT);
+  digitalWrite(13, LOW);
+  // Initialize Bridge and Mailbox
+  Bridge.begin();
+  Mailbox.begin();
+  digitalWrite(13, HIGH);
+
+  // Initialize Serial
+  Serial.begin(9600);
+
+  // Wait until a Serial Monitor is connected.
+  while (!Serial);
+
+  Serial.println("Mailbox Read Message\n");
+  Serial.println("The Mailbox is checked every 10 seconds. The incoming messages will be shown below.\n");
+}
+
+void loop() {
+  String message;
+
+  // if there is a message in the Mailbox
+  if (Mailbox.messageAvailable())
+  {
+    // read all the messages present in the queue
+    while (Mailbox.messageAvailable())
+    {
+      Mailbox.readMessage(message);
+      Serial.println(message);
+    }
+
+    Serial.println("Waiting 10 seconds before checking the Mailbox again");
+  }
+
+  // wait 10 seconds
+  delay(10000);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Process/Process.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Process/Process.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Process/Process.ino	(revision 136)
@@ -0,0 +1,72 @@
+/*
+  Running process using Process class.
+
+ This sketch demonstrate how to run linux processes
+ using an Arduino Y炭n.
+
+ created 5 Jun 2013
+ by Cristian Maglie
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/Process
+
+ */
+
+#include <Process.h>
+
+void setup() {
+  // Initialize Bridge
+  Bridge.begin();
+
+  // Initialize Serial
+  Serial.begin(9600);
+
+  // Wait until a Serial Monitor is connected.
+  while (!Serial);
+
+  // run various example processes
+  runCurl();
+  runCpuInfo();
+}
+
+void loop() {
+  // Do nothing here.
+}
+
+void runCurl() {
+  // Launch "curl" command and get Arduino ascii art logo from the network
+  // curl is command line program for transferring data using different internet protocols
+  Process p;		// Create a process and call it "p"
+  p.begin("curl");	// Process that launch the "curl" command
+  p.addParameter("http://arduino.cc/asciilogo.txt"); // Add the URL parameter to "curl"
+  p.run();		// Run the process and wait for its termination
+
+  // Print arduino logo over the Serial
+  // A process output can be read with the stream methods
+  while (p.available() > 0) {
+    char c = p.read();
+    Serial.print(c);
+  }
+  // Ensure the last bit of data is sent.
+  Serial.flush();
+}
+
+void runCpuInfo() {
+  // Launch "cat /proc/cpuinfo" command (shows info on Atheros CPU)
+  // cat is a command line utility that shows the content of a file
+  Process p;		// Create a process and call it "p"
+  p.begin("cat");	// Process that launch the "cat" command
+  p.addParameter("/proc/cpuinfo"); // Add the cpuifo file path as parameter to cut
+  p.run();		// Run the process and wait for its termination
+
+  // Print command output on the Serial.
+  // A process output can be read with the stream methods
+  while (p.available() > 0) {
+    char c = p.read();
+    Serial.print(c);
+  }
+  // Ensure the last bit of data is sent.
+  Serial.flush();
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ShellCommands/ShellCommands.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ShellCommands/ShellCommands.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/ShellCommands/ShellCommands.ino	(revision 136)
@@ -0,0 +1,55 @@
+/*
+  Running shell commands using Process class.
+
+ This sketch demonstrate how to run linux shell commands
+ using an Arduino Y炭n. It runs the wifiCheck script on the Linux side
+ of the Y炭n, then uses grep to get just the signal strength line.
+ Then it uses parseInt() to read the wifi signal strength as an integer,
+ and finally uses that number to fade an LED using analogWrite().
+
+ The circuit:
+ * Arduino Y炭n with LED connected to pin 9
+
+ created 12 Jun 2013
+ by Cristian Maglie
+ modified 25 June 2013
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/ShellCommands
+
+ */
+
+#include <Process.h>
+
+void setup() {
+  Bridge.begin();	// Initialize the Bridge
+  Serial.begin(9600);	// Initialize the Serial
+
+  // Wait until a Serial Monitor is connected.
+  while (!Serial);
+}
+
+void loop() {
+  Process p;
+  // This command line runs the WifiStatus script, (/usr/bin/pretty-wifi-info.lua), then
+  // sends the result to the grep command to look for a line containing the word
+  // "Signal:"  the result is passed to this sketch:
+  p.runShellCommand("/usr/bin/pretty-wifi-info.lua | grep Signal");
+
+  // do nothing until the process finishes, so you get the whole output:
+  while (p.running());
+
+  // Read command output. runShellCommand() should have passed "Signal: xx&":
+  while (p.available()) {
+    int result = p.parseInt();			// look for an integer
+    int signal = map(result, 0, 100, 0, 255);	// map result from 0-100 range to 0-255
+    analogWrite(9, signal);			// set the brightness of LED on pin 9
+    Serial.println(result);			// print the number as well
+  }
+  delay(5000);  // wait 5 seconds before you do it again
+}
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/inputOutput/inputOutput.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/inputOutput/inputOutput.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/inputOutput/inputOutput.ino	(revision 136)
@@ -0,0 +1,132 @@
+/*
+  Input Output
+
+ Demonstrates how to create a sketch that sends and receives all standard
+ spacebrew data types, and a custom data type. Every time data is 
+ received it is output to the Serial monitor.
+
+ Make sure that your Y炭n is connected to the internet for this example
+ to function properly.
+ 
+ The circuit:
+ - No circuit required
+ 
+ created 2013
+ by Julio Terra
+ 
+ This example code is in the public domain.
+ 
+ More information about Spacebrew is available at: 
+ http://spacebrew.cc/
+ 
+ */
+
+#include <Bridge.h>
+#include <SpacebrewYun.h>
+
+// create a variable of type SpacebrewYun and initialize it with the constructor
+SpacebrewYun sb = SpacebrewYun("aYun", "Arduino Yun spacebrew test");
+
+// create variables to manage interval between each time we send a string
+long last = 0;
+int interval = 2000;
+
+int counter = 0;
+
+void setup() { 
+
+	// start the serial port
+	Serial.begin(57600);
+
+	// for debugging, wait until a serial console is connected
+	delay(4000);
+	while (!Serial) { ; }
+
+	// start-up the bridge
+	Bridge.begin();
+
+	// configure the spacebrew object to print status messages to serial
+	sb.verbose(true);
+
+	// configure the spacebrew publisher and subscriber
+	sb.addPublish("string test", "string");
+	sb.addPublish("range test", "range");
+	sb.addPublish("boolean test", "boolean");
+	sb.addPublish("custom test", "crazy");
+	sb.addSubscribe("string test", "string");
+	sb.addSubscribe("range test", "range");
+	sb.addSubscribe("boolean test", "boolean");
+	sb.addSubscribe("custom test", "crazy");
+
+	// register the string message handler method 
+	sb.onRangeMessage(handleRange);
+	sb.onStringMessage(handleString);
+	sb.onBooleanMessage(handleBoolean);
+	sb.onCustomMessage(handleCustom);
+
+	// connect to cloud spacebrew server at "sandbox.spacebrew.cc"
+	sb.connect("sandbox.spacebrew.cc"); 
+	// we give some time to arduino to connect to sandbox, otherwise the first sb.monitor(); call will give an error
+	delay(1000);
+} 
+
+
+void loop() { 
+	// monitor spacebrew connection for new data
+	sb.monitor();
+
+	// connected to spacebrew then send a string every 2 seconds
+	if ( sb.connected() ) {
+
+		// check if it is time to send a new message
+		if ( (millis() - last) > interval ) {
+			String test_str_msg = "testing, testing, ";
+			test_str_msg += counter;
+			counter ++;
+
+			sb.send("string test", test_str_msg);
+			sb.send("range test", 500);
+			sb.send("boolean test", true);
+			sb.send("custom test", "youre loco");
+
+			last = millis();
+
+		}
+	}
+	delay(1000);
+} 
+
+// define handler methods, all standard data type handlers take two appropriate arguments
+
+void handleRange (String route, int value) {
+	Serial.print("Range msg ");
+	Serial.print(route);
+	Serial.print(", value ");
+	Serial.println(value);
+}
+
+void handleString (String route, String value) {
+	Serial.print("String msg ");
+	Serial.print(route);
+	Serial.print(", value ");
+	Serial.println(value);
+}
+
+void handleBoolean (String route, boolean value) {
+	Serial.print("Boolen msg ");
+	Serial.print(route);
+	Serial.print(", value ");
+	Serial.println(value ? "true" : "false");
+}
+
+// custom data type handlers takes three String arguments
+
+void handleCustom (String route, String value, String type) {
+	Serial.print("Custom msg ");
+	Serial.print(route);
+	Serial.print(" of type ");
+	Serial.print(type);
+	Serial.print(", value ");
+	Serial.println(value);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/spacebrewBoolean/spacebrewBoolean.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/spacebrewBoolean/spacebrewBoolean.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/spacebrewBoolean/spacebrewBoolean.ino	(revision 136)
@@ -0,0 +1,89 @@
+/*
+  Spacebrew Boolean
+ 
+ Demonstrates how to create a sketch that sends and receives a
+ boolean value to and from Spacebrew. Every time the buttton is 
+ pressed (or other digital input component) a spacebrew message 
+ is sent. The sketch also accepts analog range messages from 
+ other Spacebrew apps.
+
+ Make sure that your Y炭n is connected to the internet for this example
+ to function properly.
+ 
+ The circuit:
+ - Button connected to Y炭n, using the Arduino's internal pullup resistor.
+ 
+ created 2013
+ by Julio Terra
+ 
+ This example code is in the public domain.
+ 
+ More information about Spacebrew is available at: 
+ http://spacebrew.cc/
+ 
+ */
+
+#include <Bridge.h>
+#include <SpacebrewYun.h>
+
+// create a variable of type SpacebrewYun and initialize it with the constructor
+SpacebrewYun sb = SpacebrewYun("spacebrewYun Boolean", "Boolean sender and receiver");
+
+// variable that holds the last potentiometer value
+int last_value = 0;
+
+// create variables to manage interval between each time we send a string
+void setup() { 
+
+	// start the serial port
+	Serial.begin(57600);
+
+	// for debugging, wait until a serial console is connected
+	delay(4000);
+	while (!Serial) { ; }
+
+	// start-up the bridge
+	Bridge.begin();
+
+	// configure the spacebrew object to print status messages to serial
+	sb.verbose(true);
+
+	// configure the spacebrew publisher and subscriber
+	sb.addPublish("physical button", "boolean");
+	sb.addSubscribe("virtual button", "boolean");
+
+	// register the string message handler method 
+	sb.onBooleanMessage(handleBoolean);
+
+	// connect to cloud spacebrew server at "sandbox.spacebrew.cc"
+	sb.connect("sandbox.spacebrew.cc"); 
+
+	pinMode(3, INPUT);
+	digitalWrite(3, HIGH);
+} 
+
+
+void loop() { 
+	// monitor spacebrew connection for new data
+	sb.monitor();
+
+	// connected to spacebrew then send a new value whenever the pot value changes
+	if ( sb.connected() ) {
+		int cur_value = digitalRead(3);
+		if ( last_value != cur_value ) {
+			if (cur_value == HIGH) sb.send("physical button", false);
+			else sb.send("physical button", true);
+			last_value = cur_value;
+		}
+	}
+} 
+
+// handler method that is called whenever a new string message is received 
+void handleBoolean (String route, boolean value) {
+	// print the message that was received
+	Serial.print("From ");
+	Serial.print(route);
+	Serial.print(", received msg: ");
+	Serial.println(value ? "true" : "false");
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/spacebrewRange/spacebrewRange.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/spacebrewRange/spacebrewRange.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/spacebrewRange/spacebrewRange.ino	(revision 136)
@@ -0,0 +1,86 @@
+/*
+  Spacebrew Range
+ 
+ Demonstrates how to create a sketch that sends and receives analog
+ range value to and from Spacebrew. Every time the state of the 
+ potentiometer (or other analog input component) change a spacebrew
+ message is sent. The sketch also accepts analog range messages from 
+ other Spacebrew apps.
+
+ Make sure that your Y炭n is connected to the internet for this example
+ to function properly.
+ 
+ The circuit:
+ - Potentiometer connected to Y炭n. Middle pin connected to analog pin A0,
+   other pins connected to 5v and GND pins.
+ 
+ created 2013
+ by Julio Terra
+ 
+ This example code is in the public domain.
+ 
+ More information about Spacebrew is available at: 
+ http://spacebrew.cc/
+ 
+ */
+
+#include <Bridge.h>
+#include <SpacebrewYun.h>
+
+// create a variable of type SpacebrewYun and initialize it with the constructor
+SpacebrewYun sb = SpacebrewYun("spacebrewYun Range", "Range sender and receiver");
+
+// variable that holds the last potentiometer value
+int last_value = 0;
+
+// create variables to manage interval between each time we send a string
+void setup() { 
+
+	// start the serial port
+	Serial.begin(57600);
+
+	// for debugging, wait until a serial console is connected
+	delay(4000);
+	while (!Serial) { ; }
+
+	// start-up the bridge
+	Bridge.begin();
+
+	// configure the spacebrew object to print status messages to serial
+	sb.verbose(true);
+
+	// configure the spacebrew publisher and subscriber
+	sb.addPublish("physical pot", "range");
+	sb.addSubscribe("virtual pot", "range");
+
+	// register the string message handler method 
+	sb.onRangeMessage(handleRange);
+
+	// connect to cloud spacebrew server at "sandbox.spacebrew.cc"
+	sb.connect("sandbox.spacebrew.cc"); 
+} 
+
+
+void loop() { 
+	// monitor spacebrew connection for new data
+	sb.monitor();
+
+	// connected to spacebrew then send a new value whenever the pot value changes
+	if ( sb.connected() ) {
+		int cur_value = analogRead(A0);
+		if ( last_value != cur_value ) {
+			sb.send("physical pot", cur_value);
+			last_value = cur_value;
+		}
+	}
+} 
+
+// handler method that is called whenever a new string message is received 
+void handleRange (String route, int value) {
+	// print the message that was received
+	Serial.print("From ");
+	Serial.print(route);
+	Serial.print(", received msg: ");
+	Serial.println(value);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/spacebrewString/spacebrewString.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/spacebrewString/spacebrewString.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/SpacebrewYun/spacebrewString/spacebrewString.ino	(revision 136)
@@ -0,0 +1,84 @@
+/*
+  Spacebrew String
+ 
+ Demonstrates how to create a sketch that sends and receives strings
+ to and from Spacebrew. Every time string data is received it 
+ is output to the Serial monitor.
+
+ Make sure that your Y炭n is connected to the internet for this example
+ to function properly.
+ 
+ The circuit:
+ - No circuit required
+ 
+ created 2013
+ by Julio Terra
+ 
+ This example code is in the public domain.
+ 
+ More information about Spacebrew is available at: 
+ http://spacebrew.cc/
+ 
+ */
+
+#include <Bridge.h>
+#include <SpacebrewYun.h>
+
+// create a variable of type SpacebrewYun and initialize it with the constructor
+SpacebrewYun sb = SpacebrewYun("spacebrewYun Strings", "String sender and receiver");
+
+// create variables to manage interval between each time we send a string
+long last_time = 0;
+int interval = 2000;
+
+void setup() { 
+
+	// start the serial port
+	Serial.begin(57600);
+
+	// for debugging, wait until a serial console is connected
+	delay(4000);
+	while (!Serial) { ; }
+
+	// start-up the bridge
+	Bridge.begin();
+
+	// configure the spacebrew object to print status messages to serial
+	sb.verbose(true);
+
+	// configure the spacebrew publisher and subscriber
+	sb.addPublish("speak", "string");
+	sb.addSubscribe("listen", "string");
+
+	// register the string message handler method 
+	sb.onStringMessage(handleString);
+
+	// connect to cloud spacebrew server at "sandbox.spacebrew.cc"
+	sb.connect("sandbox.spacebrew.cc"); 
+} 
+
+
+void loop() { 
+	// monitor spacebrew connection for new data
+	sb.monitor();
+
+	// connected to spacebrew then send a string every 2 seconds
+	if ( sb.connected() ) {
+
+		// check if it is time to send a new message
+		if ( (millis() - last_time) > interval ) {
+			sb.send("speak", "is anybody out there?");
+			last_time = millis();
+		}
+	}
+} 
+
+// handler method that is called whenever a new string message is received 
+void handleString (String route, String value) {
+	// print the message that was received
+	Serial.print("From ");
+	Serial.print(route);
+	Serial.print(", received msg: ");
+	Serial.println(value);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/GetYahooWeatherReport/GetYahooWeatherReport.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/GetYahooWeatherReport/GetYahooWeatherReport.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/GetYahooWeatherReport/GetYahooWeatherReport.ino	(revision 136)
@@ -0,0 +1,115 @@
+/*
+  GetYahooWeatherReport
+  
+  Demonstrates making a request to the Yahoo! Weather API using Temboo from an Arduino Y炭n.
+
+  Check out the latest Arduino & Temboo examples and support docs at http://www.temboo.com/arduino
+  
+  A Temboo account and application key are necessary to run all Temboo examples. 
+  If you don't already have one, you can register for a free Temboo account at 
+  http://www.temboo.com
+  
+  This example assumes basic familiarity with Arduino sketches, and that your Y炭n is connected
+  to the Internet.
+
+  Looking for another API to use with your Arduino Y炭n? We've got over 100 in our Library!
+  
+  This example code is in the public domain.
+*/
+
+#include <Bridge.h>
+#include <Temboo.h>
+#include "TembooAccount.h" // contains Temboo account information
+                           // as described in the footer comment below
+
+
+// the address for which a weather forecast will be retrieved
+String ADDRESS_FOR_FORECAST = "104 Franklin St., New York NY 10013";
+
+int numRuns = 1;   // execution count, so that this doesn't run forever
+int maxRuns = 10;  // max number of times the Yahoo WeatherByAddress Choreo should be run
+
+
+void setup() {
+  Serial.begin(9600);
+    
+  // for debugging, wait until a serial console is connected
+  delay(4000);
+  while(!Serial);
+  Bridge.begin();
+
+}
+
+void loop()
+{
+  // while we haven't reached the max number of runs...
+  if (numRuns <= maxRuns) {
+      
+    // print status
+    Serial.println("Running GetWeatherByAddress - Run #" + String(numRuns++) + "...");
+
+    // create a TembooChoreo object to send a Choreo request to Temboo
+    TembooChoreo GetWeatherByAddressChoreo;
+    
+    // invoke the Temboo client
+    GetWeatherByAddressChoreo.begin();
+
+    // add your temboo account info
+    GetWeatherByAddressChoreo.setAccountName(TEMBOO_ACCOUNT);
+    GetWeatherByAddressChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    GetWeatherByAddressChoreo.setAppKey(TEMBOO_APP_KEY);
+    
+    // set the name of the choreo we want to run
+    GetWeatherByAddressChoreo.setChoreo("/Library/Yahoo/Weather/GetWeatherByAddress");
+    
+    // set choreo inputs; in this case, the address for which to retrieve weather data
+    // the Temboo client provides standardized calls to 100+ cloud APIs
+    GetWeatherByAddressChoreo.addInput("Address", ADDRESS_FOR_FORECAST);
+
+    // add an output filter to extract the name of the city.
+    GetWeatherByAddressChoreo.addOutputFilter("city", "/rss/channel/yweather:location/@city", "Response");
+    
+    // add an output filter to extract the current temperature
+    GetWeatherByAddressChoreo.addOutputFilter("temperature", "/rss/channel/item/yweather:condition/@temp", "Response");
+
+    // add an output filter to extract the date and time of the last report.
+    GetWeatherByAddressChoreo.addOutputFilter("date", "/rss/channel/item/yweather:condition/@date", "Response");
+
+    // run the choreo 
+    GetWeatherByAddressChoreo.run();
+        
+    // when the choreo results are available, print them to the serial monitor
+    while(GetWeatherByAddressChoreo.available()) {
+          
+      char c = GetWeatherByAddressChoreo.read();    
+      Serial.print(c);
+    }
+    GetWeatherByAddressChoreo.close();
+
+  }
+
+  Serial.println("Waiting...");
+  Serial.println("");
+  delay(30000); // wait 30 seconds between GetWeatherByAddress calls
+}
+
+/*
+  IMPORTANT NOTE: TembooAccount.h:
+
+  TembooAccount.h is a file referenced by this sketch that contains your Temboo account information.
+  You'll need to edit the placeholder version of TembooAccount.h included with this example sketch,
+  by inserting your own Temboo account name and app key information. The contents of the file should
+  look like:
+
+  #define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+  #define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+  #define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+  You can find your Temboo App Key information on the Temboo website, 
+  under My Account > Application Keys
+
+  The same TembooAccount.h file settings can be used for all Temboo SDK sketches.
+
+  Keeping your account information in a separate file means you can share the main .ino file without worrying 
+  that you forgot to delete your credentials.
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/GetYahooWeatherReport/TembooAccount.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/GetYahooWeatherReport/TembooAccount.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/GetYahooWeatherReport/TembooAccount.h	(revision 136)
@@ -0,0 +1,4 @@
+#define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+#define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+#define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ReadATweet/ReadATweet.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ReadATweet/ReadATweet.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ReadATweet/ReadATweet.ino	(revision 136)
@@ -0,0 +1,173 @@
+/*
+  ReadATweet
+
+  Demonstrates retrieving the most recent Tweet from a user's home timeline 
+  using Temboo from an Arduino Y炭n.
+
+  Check out the latest Arduino & Temboo examples and support docs at http://www.temboo.com/arduino
+
+  A Temboo account and application key are necessary to run all Temboo examples. 
+  If you don't already have one, you can register for a free Temboo account at 
+  http://www.temboo.com
+
+  In order to run this sketch, you'll need to register an application using
+  the Twitter dev console at https://dev.twitter.com. After creating the 
+  app, you'll find OAuth credentials for that application under the "OAuth Tool" tab. 
+  Substitute these values for the placeholders below. 
+
+  This example assumes basic familiarity with Arduino sketches, and that your Y炭n
+  is connected to the Internet.
+
+  Want to use another social API with your Arduino Y炭n? We've got Facebook,
+  Google+, Instagram, Tumblr and more in our Library!
+  
+  This example code is in the public domain.
+*/
+
+#include <Bridge.h>
+#include <Temboo.h>
+#include "TembooAccount.h" // contains Temboo account information
+                           // as described in the footer comment below
+
+/*** SUBSTITUTE YOUR VALUES BELOW: ***/
+
+// Note that for additional security and reusability, you could
+// use #define statements to specify these values in a .h file.
+const String TWITTER_ACCESS_TOKEN = "your-twitter-access-token";
+const String TWITTER_ACCESS_TOKEN_SECRET = "your-twitter-access-token-secret";
+const String TWITTER_CONSUMER_KEY = "your-twitter-consumer-key";
+const String TWITTER_CONSUMER_SECRET = "your-twitter-consumer-secret";
+
+int numRuns = 1;   // execution count, so this doesn't run forever
+int maxRuns = 10;   // the max number of times the Twitter HomeTimeline Choreo should run
+
+void setup() {
+  Serial.begin(9600);
+  
+  // For debugging, wait until a serial console is connected.
+  delay(4000);
+  while(!Serial);
+  Bridge.begin();
+}
+void loop()
+{
+  // while we haven't reached the max number of runs...
+  if (numRuns <= maxRuns) {
+    Serial.println("Running ReadATweet - Run #" + String(numRuns++));
+    
+    TembooChoreo HomeTimelineChoreo;
+
+    // invoke the Temboo client.
+    // NOTE that the client must be reinvoked, and repopulated with
+    // appropriate arguments, each time its run() method is called.
+    HomeTimelineChoreo.begin();
+    
+    // set Temboo account credentials
+    HomeTimelineChoreo.setAccountName(TEMBOO_ACCOUNT);
+    HomeTimelineChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    HomeTimelineChoreo.setAppKey(TEMBOO_APP_KEY);
+
+    // tell the Temboo client which Choreo to run (Twitter > Timelines > HomeTimeline)
+    HomeTimelineChoreo.setChoreo("/Library/Twitter/Timelines/HomeTimeline");
+    
+    
+    // set the required choreo inputs
+    // see https://www.temboo.com/library/Library/Twitter/Timelines/HomeTimeline/
+    // for complete details about the inputs for this Choreo
+
+    HomeTimelineChoreo.addInput("Count", "1"); // the max number of Tweets to return from each request
+    HomeTimelineChoreo.addInput("AccessToken", TWITTER_ACCESS_TOKEN);
+    HomeTimelineChoreo.addInput("AccessTokenSecret", TWITTER_ACCESS_TOKEN_SECRET);
+    HomeTimelineChoreo.addInput("ConsumerKey", TWITTER_CONSUMER_KEY);    
+    HomeTimelineChoreo.addInput("ConsumerSecret", TWITTER_CONSUMER_SECRET);
+
+    // next, we'll define two output filters that let us specify the 
+    // elements of the response from Twitter that we want to receive.
+    // see the examples at http://www.temboo.com/arduino
+    // for more on using output filters
+   
+    // we want the text of the tweet
+    HomeTimelineChoreo.addOutputFilter("tweet", "/[1]/text", "Response");
+    
+    // and the name of the author
+    HomeTimelineChoreo.addOutputFilter("author", "/[1]/user/screen_name", "Response");
+
+
+    // tell the Process to run and wait for the results. The 
+    // return code will tell us whether the Temboo client 
+    // was able to send our request to the Temboo servers
+    unsigned int returnCode = HomeTimelineChoreo.run();
+    
+   // a response code of 0 means success; print the API response
+    if(returnCode == 0) {
+      
+      String author; // a String to hold the tweet author's name
+      String tweet; // a String to hold the text of the tweet
+
+
+      // choreo outputs are returned as key/value pairs, delimited with 
+      // newlines and record/field terminator characters, for example:
+      // Name1\n\x1F
+      // Value1\n\x1E
+      // Name2\n\x1F
+      // Value2\n\x1E      
+      
+      // see the examples at http://www.temboo.com/arduino for more details
+      // we can read this format into separate variables, as follows:
+      
+      while(HomeTimelineChoreo.available()) {
+        // read the name of the output item
+        String name = HomeTimelineChoreo.readStringUntil('\x1F');
+        name.trim();
+
+        // read the value of the output item
+        String data = HomeTimelineChoreo.readStringUntil('\x1E');
+        data.trim();
+
+        // assign the value to the appropriate String
+        if (name == "tweet") {
+          tweet = data;
+        } else if (name == "author") {
+          author = data;
+        }
+      }
+     
+      Serial.println("@" + author + " - " + tweet);
+    
+    } else {
+      // there was an error
+      // print the raw output from the choreo
+      while(HomeTimelineChoreo.available()) {
+        char c = HomeTimelineChoreo.read();
+        Serial.print(c);
+      }
+    }
+
+    HomeTimelineChoreo.close();
+
+  }
+
+  Serial.println("Waiting...");
+  delay(90000); // wait 90 seconds between HomeTimeline calls
+}
+
+/*
+  IMPORTANT NOTE: TembooAccount.h:
+
+  TembooAccount.h is a file referenced by this sketch that contains your Temboo account information.
+  You'll need to edit the placeholder version of TembooAccount.h included with this example sketch,
+  by inserting your own Temboo account name and app key information. The contents of the file should
+  look like:
+
+  #define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+  #define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+  #define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+  You can find your Temboo App Key information on the Temboo website, 
+  under My Account > Application Keys
+
+  The same TembooAccount.h file settings can be used for all Temboo SDK sketches.
+
+  Keeping your account information in a separate file means you can share the main .ino file without worrying 
+  that you forgot to delete your credentials.
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ReadATweet/TembooAccount.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ReadATweet/TembooAccount.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ReadATweet/TembooAccount.h	(revision 136)
@@ -0,0 +1,4 @@
+#define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+#define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+#define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendATweet/SendATweet.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendATweet/SendATweet.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendATweet/SendATweet.ino	(revision 136)
@@ -0,0 +1,138 @@
+/*
+  SendATweet
+
+  Demonstrates sending a tweet via a Twitter account using Temboo from an Arduino Y炭n.
+
+  Check out the latest Arduino & Temboo examples and support docs at http://www.temboo.com/arduino
+
+  A Temboo account and application key are necessary to run all Temboo examples. 
+  If you don't already have one, you can register for a free Temboo account at 
+  http://www.temboo.com
+
+  In order to run this sketch, you'll need to register an application using
+  the Twitter dev console at https://dev.twitter.com. Note that since this 
+  sketch creates a new tweet, your application will need to be configured with
+  read+write permissions. After creating the app, you'll find OAuth credentials 
+  for that application under the "OAuth Tool" tab. Substitute these values for 
+  the placeholders below. 
+
+  This example assumes basic familiarity with Arduino sketches, and that your Y炭n is connected
+  to the Internet.
+
+  Want to use another social API with your Arduino Y炭n? We've got Facebook,
+  Google+, Instagram, Tumblr and more in our Library!
+  
+  This example code is in the public domain.
+*/
+
+#include <Bridge.h>
+#include <Temboo.h>
+#include "TembooAccount.h" // contains Temboo account information
+                           // as described in the footer comment below
+
+
+/*** SUBSTITUTE YOUR VALUES BELOW: ***/
+
+// Note that for additional security and reusability, you could
+// use #define statements to specify these values in a .h file.
+const String TWITTER_ACCESS_TOKEN = "your-twitter-access-token";
+const String TWITTER_ACCESS_TOKEN_SECRET = "your-twitter-access-token-secret";
+const String TWITTER_CONSUMER_KEY = "your-twitter-consumer-key";
+const String TWITTER_CONSUMER_SECRET = "your-twitter-consumer-secret";
+
+int numRuns = 1;   // execution count, so this sketch doesn't run forever
+int maxRuns = 3;  // the max number of times the Twitter Update Choreo should run
+
+void setup() {
+  Serial.begin(9600);
+
+  // for debugging, wait until a serial console is connected
+  delay(4000);
+  while(!Serial);
+
+  Bridge.begin();
+}
+
+void loop()
+{
+  // only try to send the tweet if we haven't already sent it successfully
+  if (numRuns <= maxRuns) {
+
+    Serial.println("Running SendATweet - Run #" + String(numRuns++) + "...");
+  
+    // define the text of the tweet we want to send
+    String tweetText("My Arduino Yun has been running for " + String(millis()) + " milliseconds.");
+
+    
+    TembooChoreo StatusesUpdateChoreo;
+
+    // invoke the Temboo client
+    // NOTE that the client must be reinvoked, and repopulated with
+    // appropriate arguments, each time its run() method is called.
+    StatusesUpdateChoreo.begin();
+    
+    // set Temboo account credentials
+    StatusesUpdateChoreo.setAccountName(TEMBOO_ACCOUNT);
+    StatusesUpdateChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    StatusesUpdateChoreo.setAppKey(TEMBOO_APP_KEY);
+
+    // identify the Temboo Library choreo to run (Twitter > Tweets > StatusesUpdate)
+    StatusesUpdateChoreo.setChoreo("/Library/Twitter/Tweets/StatusesUpdate");
+
+    // set the required choreo inputs
+    // see https://www.temboo.com/library/Library/Twitter/Tweets/StatusesUpdate/ 
+    // for complete details about the inputs for this Choreo
+ 
+    // add the Twitter account information
+    StatusesUpdateChoreo.addInput("AccessToken", TWITTER_ACCESS_TOKEN);
+    StatusesUpdateChoreo.addInput("AccessTokenSecret", TWITTER_ACCESS_TOKEN_SECRET);
+    StatusesUpdateChoreo.addInput("ConsumerKey", TWITTER_CONSUMER_KEY);    
+    StatusesUpdateChoreo.addInput("ConsumerSecret", TWITTER_CONSUMER_SECRET);
+
+    // and the tweet we want to send
+    StatusesUpdateChoreo.addInput("StatusUpdate", tweetText);
+
+    // tell the Process to run and wait for the results. The 
+    // return code (returnCode) will tell us whether the Temboo client 
+    // was able to send our request to the Temboo servers
+    unsigned int returnCode = StatusesUpdateChoreo.run();
+
+    // a return code of zero (0) means everything worked
+    if (returnCode == 0) {
+        Serial.println("Success! Tweet sent!");
+    } else {
+      // a non-zero return code means there was an error
+      // read and print the error message
+      while (StatusesUpdateChoreo.available()) {
+        char c = StatusesUpdateChoreo.read();
+        Serial.print(c);
+      }
+    } 
+    StatusesUpdateChoreo.close();
+
+    // do nothing for the next 90 seconds
+    Serial.println("Waiting...");
+    delay(90000);
+  }
+}
+
+/*
+  IMPORTANT NOTE: TembooAccount.h:
+
+  TembooAccount.h is a file referenced by this sketch that contains your Temboo account information.
+  You'll need to edit the placeholder version of TembooAccount.h included with this example sketch,
+  by inserting your own Temboo account name and app key information. The contents of the file should
+  look like:
+
+  #define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+  #define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+  #define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+  You can find your Temboo App Key information on the Temboo website, 
+  under My Account > Application Keys
+
+  The same TembooAccount.h file settings can be used for all Temboo SDK sketches.
+
+  Keeping your account information in a separate file means you can share the main .ino file without worrying 
+  that you forgot to delete your credentials.
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendATweet/TembooAccount.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendATweet/TembooAccount.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendATweet/TembooAccount.h	(revision 136)
@@ -0,0 +1,4 @@
+#define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+#define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+#define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnEmail/SendAnEmail.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnEmail/SendAnEmail.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnEmail/SendAnEmail.ino	(revision 136)
@@ -0,0 +1,137 @@
+/*
+  SendAnEmail
+
+  Demonstrates sending an email via a Google Gmail account using Temboo from an Arduino Y炭n.
+
+  Check out the latest Arduino & Temboo examples and support docs at http://www.temboo.com/arduino
+
+  A Temboo account and application key are necessary to run all Temboo examples. 
+  If you don't already have one, you can register for a free Temboo account at 
+  http://www.temboo.com
+
+  Since this sketch uses Gmail to send the email, you'll also need a valid 
+  Google Gmail account. The sketch needs the username and password you use 
+  to log into your Gmail account - substitute the placeholders below for these values.
+
+  This example assumes basic familiarity with Arduino sketches, and that your Y炭n is connected
+  to the Internet.
+  
+  Looking for another API to use with your Arduino Y炭n? We've got over 100 in our Library!
+
+  This example code is in the public domain.
+*/
+
+#include <Bridge.h>
+#include <Temboo.h>
+#include "TembooAccount.h" // contains Temboo account information
+                           // as described in the footer comment below
+
+/*** SUBSTITUTE YOUR VALUES BELOW: ***/
+
+// Note that for additional security and reusability, you could
+// use #define statements to specify these values in a .h file.
+
+// your Gmail username, formatted as a complete email address, eg "bob.smith@gmail.com"
+const String GMAIL_USER_NAME = "xxxxxxxxxx";
+
+// your Gmail password
+const String GMAIL_PASSWORD = "xxxxxxxxxx";
+
+// the email address you want to send the email to, eg "jane.doe@temboo.com"
+const String TO_EMAIL_ADDRESS = "xxxxxxxxxx";
+
+// a flag to indicate whether we've tried to send the email yet or not
+boolean attempted = false; 
+
+void setup() {
+  Serial.begin(9600);
+
+  // for debugging, wait until a serial console is connected
+  delay(4000);
+  while(!Serial);
+
+  Bridge.begin();
+}
+
+void loop()
+{
+  // only try to send the email if we haven't already tried
+  if (!attempted) {
+
+    Serial.println("Running SendAnEmail...");
+  
+    TembooChoreo SendEmailChoreo;
+
+    // invoke the Temboo client
+    // NOTE that the client must be reinvoked, and repopulated with
+    // appropriate arguments, each time its run() method is called.
+    SendEmailChoreo.begin();
+    
+    // set Temboo account credentials
+    SendEmailChoreo.setAccountName(TEMBOO_ACCOUNT);
+    SendEmailChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    SendEmailChoreo.setAppKey(TEMBOO_APP_KEY);
+
+    // identify the Temboo Library choreo to run (Google > Gmail > SendEmail)
+    SendEmailChoreo.setChoreo("/Library/Google/Gmail/SendEmail");
+ 
+
+    // set the required choreo inputs
+    // see https://www.temboo.com/library/Library/Google/Gmail/SendEmail/ 
+    // for complete details about the inputs for this Choreo
+
+    // the first input is your Gmail email address.     
+    SendEmailChoreo.addInput("Username", GMAIL_USER_NAME);
+    // next is your Gmail password.
+    SendEmailChoreo.addInput("Password", GMAIL_PASSWORD);
+    // who to send the email to
+    SendEmailChoreo.addInput("ToAddress", TO_EMAIL_ADDRESS);
+    // then a subject line
+    SendEmailChoreo.addInput("Subject", "ALERT: Greenhouse Temperature");
+
+     // next comes the message body, the main content of the email   
+    SendEmailChoreo.addInput("MessageBody", "Hey! The greenhouse is too cold!");
+
+    // tell the Choreo to run and wait for the results. The 
+    // return code (returnCode) will tell us whether the Temboo client 
+    // was able to send our request to the Temboo servers
+    unsigned int returnCode = SendEmailChoreo.run();
+
+    // a return code of zero (0) means everything worked
+    if (returnCode == 0) {
+        Serial.println("Success! Email sent!");
+    } else {
+      // a non-zero return code means there was an error
+      // read and print the error message
+      while (SendEmailChoreo.available()) {
+        char c = SendEmailChoreo.read();
+        Serial.print(c);
+      }
+    } 
+    SendEmailChoreo.close();
+    
+    // set the flag showing we've tried
+    attempted = true;
+  }
+}
+
+/*
+  IMPORTANT NOTE: TembooAccount.h:
+
+  TembooAccount.h is a file referenced by this sketch that contains your Temboo account information.
+  You'll need to edit the placeholder version of TembooAccount.h included with this example sketch,
+  by inserting your own Temboo account name and app key information. The contents of the file should
+  look like:
+
+  #define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+  #define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+  #define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+  You can find your Temboo App Key information on the Temboo website, 
+  under My Account > Application Keys
+
+  The same TembooAccount.h file settings can be used for all Temboo SDK sketches.
+
+  Keeping your account information in a separate file means you can share the main .ino file without worrying 
+  that you forgot to delete your credentials.
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnEmail/TembooAccount.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnEmail/TembooAccount.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnEmail/TembooAccount.h	(revision 136)
@@ -0,0 +1,4 @@
+#define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+#define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+#define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnSMS/SendAnSMS.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnSMS/SendAnSMS.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnSMS/SendAnSMS.ino	(revision 136)
@@ -0,0 +1,154 @@
+/*
+  SendAnSMS
+
+  Demonstrates sending an SMS via Twilio using Temboo from an Arduino Y炭n.
+
+  Check out the latest Arduino & Temboo examples and support docs at http://www.temboo.com/arduino
+
+  A Temboo account and application key are necessary to run all Temboo examples. 
+  If you don't already have one, you can register for a free Temboo account at 
+  http://www.temboo.com
+
+  Since this sketch uses Twilio to send the SMS, you'll also need a valid 
+  Twilio account. You can create one for free at https://www.twilio.com.
+ 
+  The sketch needs your Twilio phone number, along with
+  the Account SID and Auth Token you get when you register with Twilio.
+  Make sure to use the Account SID and Auth Token from your Twilio Dashboard 
+  (not your test credentials from the Dev Tools panel).
+
+  Also note that if you're using a free Twilio account, you'll need to verify 
+  the phone number to which messages are being sent by going to twilio.com and following
+  the instructions under the "Numbers > Verified Caller IDs" tab (this restriction
+  doesn't apply if you have a paid Twilio account).
+  
+  This example assumes basic familiarity with Arduino sketches, and that your Y炭n is connected
+  to the Internet.
+
+  Looking for another API to use with your Arduino Y炭n? We've got over 100 in our Library!
+  
+  This example code is in the public domain.
+*/
+
+#include <Bridge.h>
+#include <Temboo.h>
+#include "TembooAccount.h" // contains Temboo account information
+                           // as described in the footer comment below
+
+
+
+/*** SUBSTITUTE YOUR VALUES BELOW: ***/
+
+// Note that for additional security and reusability, you could
+// use #define statements to specify these values in a .h file.
+
+// the Account SID from your Twilio account
+const String TWILIO_ACCOUNT_SID = "xxxxxxxxxx";
+
+// the Auth Token from your Twilio account
+const String TWILIO_AUTH_TOKEN = "xxxxxxxxxx";
+
+// your Twilio phone number, e.g., "+1 555-222-1212"
+const String TWILIO_NUMBER = "xxxxxxxxxx";
+
+// the number to which the SMS should be sent, e.g., "+1 555-222-1212"
+const String RECIPIENT_NUMBER = "xxxxxxxxxx";
+
+// a flag to indicate whether we've attempted to send the SMS yet or not
+boolean attempted = false; 
+
+void setup() {
+  Serial.begin(9600);
+
+  // for debugging, wait until a serial console is connected
+  delay(4000);
+  while(!Serial);
+
+  Bridge.begin();
+}
+
+void loop()
+{
+  // only try to send the SMS if we haven't already sent it successfully
+  if (!attempted) {
+
+    Serial.println("Running SendAnSMS...");
+    
+    // we need a Process object to send a Choreo request to Temboo
+    TembooChoreo SendSMSChoreo;
+
+    // invoke the Temboo client
+    // NOTE that the client must be reinvoked and repopulated with
+    // appropriate arguments each time its run() method is called.
+    SendSMSChoreo.begin();
+    
+    // set Temboo account credentials
+    SendSMSChoreo.setAccountName(TEMBOO_ACCOUNT);
+    SendSMSChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    SendSMSChoreo.setAppKey(TEMBOO_APP_KEY);
+
+    // identify the Temboo Library choreo to run (Twilio > SMSMessages > SendSMS)
+    SendSMSChoreo.setChoreo("/Library/Twilio/SMSMessages/SendSMS");
+
+    // set the required choreo inputs
+    // see https://www.temboo.com/library/Library/Twilio/SMSMessages/SendSMS/ 
+    // for complete details about the inputs for this Choreo
+
+    // the first input is a your AccountSID
+    SendSMSChoreo.addInput("AccountSID", TWILIO_ACCOUNT_SID);
+    
+    // next is your Auth Token
+    SendSMSChoreo.addInput("AuthToken", TWILIO_AUTH_TOKEN);
+ 
+    // next is your Twilio phone number
+    SendSMSChoreo.addInput("From", TWILIO_NUMBER);
+    
+    // next, what number to send the SMS to
+    SendSMSChoreo.addInput("To", RECIPIENT_NUMBER);
+
+    // finally, the text of the message to send
+    SendSMSChoreo.addInput("Body", "Hey, there! This is a message from your Arduino Yun!");
+    
+    // tell the Process to run and wait for the results. The 
+    // return code (returnCode) will tell us whether the Temboo client 
+    // was able to send our request to the Temboo servers
+    unsigned int returnCode = SendSMSChoreo.run();
+
+    // a return code of zero (0) means everything worked
+    if (returnCode == 0) {
+        Serial.println("Success! SMS sent!");
+    } else {
+      // a non-zero return code means there was an error
+      // read and print the error message
+      while (SendSMSChoreo.available()) {
+        char c = SendSMSChoreo.read();
+        Serial.print(c);
+      }
+    } 
+    SendSMSChoreo.close();
+    
+    // set the flag indicatine we've tried once.
+    attempted=true;
+  }
+}
+
+/*
+  IMPORTANT NOTE: TembooAccount.h:
+
+  TembooAccount.h is a file referenced by this sketch that contains your Temboo account information.
+  You'll need to edit the placeholder version of TembooAccount.h included with this example sketch,
+  by inserting your own Temboo account name and app key information. The contents of the file should
+  look like:
+
+  #define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+  #define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+  #define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+  You can find your Temboo App Key information on the Temboo website, 
+  under My Account > Application Keys
+
+  The same TembooAccount.h file settings can be used for all Temboo SDK sketches.
+
+  Keeping your account information in a separate file means you can share the main .ino file without worrying 
+  that you forgot to delete your credentials.
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnSMS/TembooAccount.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnSMS/TembooAccount.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendAnSMS/TembooAccount.h	(revision 136)
@@ -0,0 +1,5 @@
+#define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+#define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+#define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendDataToGoogleSpreadsheet/SendDataToGoogleSpreadsheet.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendDataToGoogleSpreadsheet/SendDataToGoogleSpreadsheet.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendDataToGoogleSpreadsheet/SendDataToGoogleSpreadsheet.ino	(revision 136)
@@ -0,0 +1,178 @@
+/*
+  SendDataToGoogleSpreadsheet
+
+  Demonstrates appending a row of data to a Google spreadsheet using Temboo from an Arduino Y炭n.
+
+  Check out the latest Arduino & Temboo examples and support docs at http://www.temboo.com/arduino
+
+  A Temboo account and application key are necessary to run all Temboo examples. 
+  If you don't already have one, you can register for a free Temboo account at 
+  http://www.temboo.com
+
+  Since this sketch uses a Google spreadsheet, you'll also need a 
+  Google account: substitute the placeholders below for your Google account values.
+
+  This example assumes basic familiarity with Arduino sketches, and that your 
+  Y炭n is connected to the Internet.
+
+  The columns in your spreadsheet must have labels for the Choreo to
+  work properly. It doesn't matter what the column labels actually are,
+  but there must be text in the first row of each column. This example
+  assumes there are two columns. The first column is the time (in milliseconds)
+  that the row was appended, and the second column is a sensor value.
+  In other words, your spreadsheet should look like:
+  
+  Time  |  Sensor Value  |     
+  ------+-----------------
+        |                |
+  
+  NOTE that the first time you run this sketch, you may receive a warning from
+  Google, prompting you to authorize access from a 3rd party system.
+  
+  Looking for another API to use with your Arduino Y炭n? We've got over 100 in our Library!
+
+  This example code is in the public domain.
+
+*/
+
+#include <Bridge.h>
+#include <Temboo.h>
+#include "TembooAccount.h" // contains Temboo account information, 
+                           // as described in the footer comment below
+
+
+/*** SUBSTITUTE YOUR VALUES BELOW: ***/
+
+// Note that for additional security and reusability, you could
+// use #define statements to specify these values in a .h file.
+
+const String GOOGLE_USERNAME = "your-google-username";
+const String GOOGLE_PASSWORD = "your-google-password";
+
+// the title of the spreadsheet you want to send data to
+// (Note that this must actually be the title of a Google spreadsheet
+// that exists in your Google Drive/Docs account, and is configured
+// as described above.)
+const String SPREADSHEET_TITLE = "your-spreadsheet-title";
+
+const unsigned long RUN_INTERVAL_MILLIS = 60000; // how often to run the Choreo (in milliseconds)
+
+// the last time we ran the Choreo 
+// (initialized to 60 seconds ago so the
+// Choreo is run immediately when we start up)
+unsigned long lastRun = (unsigned long)-60000;
+
+void setup() {
+  
+  // for debugging, wait until a serial console is connected
+  Serial.begin(9600);
+  delay(4000);
+  while(!Serial);
+
+  Serial.print("Initializing the bridge...");
+  Bridge.begin();
+  Serial.println("Done");
+}
+
+void loop()
+{
+  // get the number of milliseconds this sketch has been running
+  unsigned long now = millis();
+
+  // run again if it's been 60 seconds since we last ran
+  if (now - lastRun >= RUN_INTERVAL_MILLIS) {
+
+    // remember 'now' as the last time we ran the choreo
+    lastRun = now;
+    
+    Serial.println("Getting sensor value...");
+
+    // get the value we want to append to our spreadsheet
+    unsigned long sensorValue = getSensorValue();
+
+    Serial.println("Appending value to spreadsheet...");
+
+    // we need a Process object to send a Choreo request to Temboo
+    TembooChoreo AppendRowChoreo;
+
+    // invoke the Temboo client
+    // NOTE that the client must be reinvoked and repopulated with
+    // appropriate arguments each time its run() method is called.
+    AppendRowChoreo.begin();
+    
+    // set Temboo account credentials
+    AppendRowChoreo.setAccountName(TEMBOO_ACCOUNT);
+    AppendRowChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    AppendRowChoreo.setAppKey(TEMBOO_APP_KEY);
+    
+    // identify the Temboo Library choreo to run (Google > Spreadsheets > AppendRow)
+    AppendRowChoreo.setChoreo("/Library/Google/Spreadsheets/AppendRow");
+    
+    // set the required Choreo inputs
+    // see https://www.temboo.com/library/Library/Google/Spreadsheets/AppendRow/ 
+    // for complete details about the inputs for this Choreo
+    
+    // your Google username (usually your email address)
+    AppendRowChoreo.addInput("Username", GOOGLE_USERNAME);
+
+    // your Google account password
+    AppendRowChoreo.addInput("Password", GOOGLE_PASSWORD);
+
+    // the title of the spreadsheet you want to append to
+    // NOTE: substitute your own value, retaining the "SpreadsheetTitle:" prefix.
+    AppendRowChoreo.addInput("SpreadsheetTitle", SPREADSHEET_TITLE);
+
+    // convert the time and sensor values to a comma separated string
+    String rowData(now);
+    rowData += ",";
+    rowData += sensorValue;
+
+    // add the RowData input item
+    AppendRowChoreo.addInput("RowData", rowData);
+
+    // run the Choreo and wait for the results
+    // The return code (returnCode) will indicate success or failure 
+    unsigned int returnCode = AppendRowChoreo.run();
+
+    // return code of zero (0) means success
+    if (returnCode == 0) {
+      Serial.println("Success! Appended " + rowData);
+      Serial.println("");
+    } else {
+      // return code of anything other than zero means failure  
+      // read and display any error messages
+      while (AppendRowChoreo.available()) {
+        char c = AppendRowChoreo.read();
+        Serial.print(c);
+      }
+    }
+
+    AppendRowChoreo.close();
+  }
+}
+
+// this function simulates reading the value of a sensor 
+unsigned long getSensorValue() {
+  return analogRead(A0);
+}
+
+/*
+  IMPORTANT NOTE: TembooAccount.h:
+
+  TembooAccount.h is a file referenced by this sketch that contains your Temboo account information.
+  You'll need to edit the placeholder version of TembooAccount.h included with this example sketch,
+  by inserting your own Temboo account name and app key information. The contents of the file should
+  look like:
+
+  #define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+  #define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+  #define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+  You can find your Temboo App Key information on the Temboo website, 
+  under My Account > Application Keys
+
+  The same TembooAccount.h file settings can be used for all Temboo SDK sketches.
+
+  Keeping your account information in a separate file means you can share the main .ino file without worrying 
+  that you forgot to delete your credentials.
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendDataToGoogleSpreadsheet/TembooAccount.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendDataToGoogleSpreadsheet/TembooAccount.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/SendDataToGoogleSpreadsheet/TembooAccount.h	(revision 136)
@@ -0,0 +1,5 @@
+#define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+#define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+#define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ToxicFacilitiesSearch/TembooAccount.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ToxicFacilitiesSearch/TembooAccount.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ToxicFacilitiesSearch/TembooAccount.h	(revision 136)
@@ -0,0 +1,5 @@
+#define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+#define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+#define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ToxicFacilitiesSearch/ToxicFacilitiesSearch.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ToxicFacilitiesSearch/ToxicFacilitiesSearch.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/ToxicFacilitiesSearch/ToxicFacilitiesSearch.ino	(revision 136)
@@ -0,0 +1,171 @@
+/*
+  ToxicFacilitiesSearch
+  
+  Demonstrates making a request to the Envirofacts API using Temboo from an Arduino Y炭n.
+  This example retrieves the names and addresses of EPA-regulated facilities in the 
+  Toxins Release Inventory (TRI) database within a given zip code.
+  
+  Check out the latest Arduino & Temboo examples and support docs at http://www.temboo.com/arduino
+
+  A Temboo account and application key are necessary to run all Temboo examples. 
+  If you don't already have one, you can register for a free Temboo account at 
+  http://www.temboo.com
+  
+  This example assumes basic familiarity with Arduino sketches, and that your Y炭n is connected
+  to the Internet.
+
+  Looking for another API to use with your Arduino Y炭n? We've got over 100 in our Library!
+  
+  This example code is in the public domain.
+*/
+
+#include <Bridge.h>
+#include <Temboo.h>
+#include "TembooAccount.h" // contains Temboo account information
+                           // as described in the footer comment below
+
+// the zip code to search for toxin-emitting facilities
+String US_ZIP_CODE = "11215";
+
+int numRuns = 1;   // execution count, so that this doesn't run forever
+int maxRuns = 10;  // max number of times the Envirofacts FacilitiesSearch Choreo should be run
+
+void setup() {
+  Serial.begin(9600);
+    
+  // for debugging, wait until a serial console is connected
+  delay(4000);
+  while(!Serial);
+  Bridge.begin();
+}
+
+void loop()
+{
+  // while we haven't reached the max number of runs...
+  if (numRuns <= maxRuns) {
+      
+    // print status
+    Serial.println("Running ToxicFacilitiesSearch - Run #" + String(numRuns++) + "...");
+
+    // we need a Process object to send a Choreo request to Temboo
+    TembooChoreo FacilitiesSearchByZipChoreo;
+
+    // invoke the Temboo client
+    // NOTE that the client must be reinvoked and repopulated with
+    // appropriate arguments each time its run() method is called.
+    FacilitiesSearchByZipChoreo.begin();
+        
+    // set Temboo account credentials
+    FacilitiesSearchByZipChoreo.setAccountName(TEMBOO_ACCOUNT);
+    FacilitiesSearchByZipChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    FacilitiesSearchByZipChoreo.setAppKey(TEMBOO_APP_KEY);
+  
+    // identify the Temboo Library choreo to run (EnviroFacts > Toxins > FacilitiesSearchByZip)
+    FacilitiesSearchByZipChoreo.setChoreo("/Library/EnviroFacts/Toxins/FacilitiesSearchByZip");
+        
+    // set choreo inputs; in this case, the US zip code for which to retrieve toxin release data
+    // the Temboo client provides standardized calls to 100+ cloud APIs
+    FacilitiesSearchByZipChoreo.addInput("Zip", US_ZIP_CODE);
+    
+    // specify two output filters, to help simplify the Envirofacts API results.
+    // see the tutorials on using Temboo SDK output filters at http://www.temboo.com/arduino
+    FacilitiesSearchByZipChoreo.addOutputFilter("fac", "FACILITY_NAME", "Response");
+
+    FacilitiesSearchByZipChoreo.addOutputFilter("addr", "STREET_ADDRESS", "Response");
+
+    // run the choreo 
+    unsigned int returnCode = FacilitiesSearchByZipChoreo.run();
+    if (returnCode == 0) {
+      String facilities;
+      String addresses;
+
+      // when the choreo results are available, process them.
+      // the output filters we specified will return comma delimited
+      // lists containing the name and street address of the facilities
+      // located in the specified zip code.
+      while(FacilitiesSearchByZipChoreo.available()) {
+        String name = FacilitiesSearchByZipChoreo.readStringUntil('\x1F');
+        name.trim();
+
+        String data = FacilitiesSearchByZipChoreo.readStringUntil('\x1E');
+        data.trim();
+
+        if (name == "fac") {
+          facilities = data;
+        } else if (name == "addr") {
+          addresses = data;
+        }
+      }
+      FacilitiesSearchByZipChoreo.close();
+      
+      // parse the comma delimited lists of facilities to join the 
+      // name with the address and print it to the serial monitor
+      if (facilities.length() > 0) {
+        int i = -1;
+        int facilityStart = 0;
+        int addressStart = 0;
+        String facility;
+        String address;
+        do {
+          i = facilities.indexOf(',', facilityStart);
+          if (i >= 0) {
+            facility = facilities.substring(facilityStart, i);
+            facilityStart = i + 1;
+          }
+
+          i = addresses.indexOf(',', addressStart);
+          if (i >= 0) {
+            address = addresses.substring(addressStart, i);
+            addressStart = i + 1;
+          }
+          
+          if (i >= 0) {
+            printResult(facility, address);
+          }
+
+        }while (i >= 0);
+        facility = facilities.substring(facilityStart);
+        address = addresses.substring(addressStart);
+        printResult(facility, address);
+      } else {
+        Serial.println("No facilities found in zip code " + US_ZIP_CODE);
+      }
+    } else {
+      while(FacilitiesSearchByZipChoreo.available()) {
+        char c = FacilitiesSearchByZipChoreo.read();
+        Serial.print(c);
+      }
+    }
+  }
+  Serial.println("Waiting...");
+  Serial.println("");
+  delay(30000); // wait 30 seconds between calls
+}
+
+// a simple utility function, to output the facility name and address in the serial monitor.
+void printResult(String facility, String address) {
+  Serial.print(facility);
+  Serial.print(" - ");
+  Serial.println(address);
+}
+
+/*
+  IMPORTANT NOTE: TembooAccount.h:
+
+  TembooAccount.h is a file referenced by this sketch that contains your Temboo account information.
+  You'll need to edit the placeholder version of TembooAccount.h included with this example sketch,
+  by inserting your own Temboo account name and app key information. The contents of the file should
+  look like:
+
+  #define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+  #define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+  #define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+  You can find your Temboo App Key information on the Temboo website, 
+  under My Account > Application Keys
+
+  The same TembooAccount.h file settings can be used for all Temboo SDK sketches.
+
+  Keeping your account information in a separate file means you can share the main .ino file without worrying 
+  that you forgot to delete your credentials.
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UpdateFacebookStatus/TembooAccount.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UpdateFacebookStatus/TembooAccount.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UpdateFacebookStatus/TembooAccount.h	(revision 136)
@@ -0,0 +1,5 @@
+#define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+#define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+#define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UpdateFacebookStatus/UpdateFacebookStatus.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UpdateFacebookStatus/UpdateFacebookStatus.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UpdateFacebookStatus/UpdateFacebookStatus.ino	(revision 136)
@@ -0,0 +1,132 @@
+/*
+  UpdateFacebookStatus
+
+  Demonstrates sending a Facebook status update using Temboo from an Arduino Y炭n.
+
+  Check out the latest Arduino & Temboo examples and support docs at http://www.temboo.com/arduino
+  
+  A Temboo account and application key are necessary to run all Temboo examples. 
+  If you don't already have one, you can register for a free Temboo account at 
+  http://www.temboo.com
+
+  In order to run this sketch, you'll need to register an application using
+  the Facebook dev console at https://developers.facebook.com/apps -- after creating
+  the app, log in to Temboo and visit https://www.temboo.com/library/Library/Facebook/Publishing/SetStatus/
+  to use our OAuth Wizard (or OAuth Choreos) to obtain a Facebook access token.
+  Substitute your access token for the placeholder value of FACEBOOK_ACCESS_TOKEN below.
+
+  This example assumes basic familiarity with Arduino sketches, and that your Y炭n
+  is connected to the Internet.
+  
+  Want to use another social API with your Arduino Y炭n? We've got Twitter, Google+,
+  Instagram, Tumblr and more in our Library!
+
+  This example code is in the public domain. 
+*/
+
+#include <Bridge.h>
+#include <Temboo.h>
+#include "TembooAccount.h" // contains Temboo account information, 
+                           // as described in the footer comment below
+
+/*** SUBSTITUTE YOUR VALUES BELOW: ***/
+
+// Note that for additional security and reusability, you could
+// use a #define statement to specify this value in a .h file.
+
+// the Facebook Access Token, which can be obtained using the Temboo OAuth Wizard or Choreos
+const String FACEBOOK_ACCESS_TOKEN = "xxxxxxxxxx";
+
+
+int numRuns = 1;   // execution count, so this sketch doesn't run forever
+int maxRuns = 10;  // the max number of times the Facebook SetStatus Choreo should run
+
+void setup() {
+  Serial.begin(9600);
+  
+  // For debugging, wait until a serial console is connected.
+  delay(4000);
+  while(!Serial);
+  Bridge.begin();
+}
+
+void loop() {
+  // while we haven't reached the max number of runs...
+  if (numRuns <= maxRuns) {
+
+    // print status
+    Serial.println("Running UpdateFacebookStatus - Run #" + String(numRuns++) + "...");
+    
+    // Define the status message we want to post on Facebook; since Facebook
+    // doesn't allow duplicate status messages, we'll include a changing value.
+    String statusMsg = "My Arduino Yun has been running for " + String(millis()) + " milliseconds!";
+
+    // define the Process that will be used to call the "temboo" client                
+    TembooChoreo SetStatusChoreo;
+
+    // invoke the Temboo client
+    // NOTE that the client must be reinvoked and repopulated with
+    // appropriate arguments each time its run() method is called.
+    SetStatusChoreo.begin();
+    
+    // set Temboo account credentials
+    SetStatusChoreo.setAccountName(TEMBOO_ACCOUNT);
+    SetStatusChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    SetStatusChoreo.setAppKey(TEMBOO_APP_KEY);
+
+    // tell the Temboo client which Choreo to run (Facebook > Publishing > SetStatus)
+    SetStatusChoreo.setChoreo("/Library/Facebook/Publishing/SetStatus");
+
+    // set the required choreo inputs
+    // see  https://www.temboo.com/library/Library/Facebook/Publishing/SetStatus/
+    // for complete details about the inputs for this Choreo
+    
+    SetStatusChoreo.addInput("AccessToken", FACEBOOK_ACCESS_TOKEN);    
+    SetStatusChoreo.addInput("Message", statusMsg);
+
+
+    // tell the Process to run and wait for the results. The 
+    // return code (returnCode) will tell us whether the Temboo client 
+    // was able to send our request to the Temboo servers
+    unsigned int returnCode = SetStatusChoreo.run();
+    
+    // print the response code and API response.
+    Serial.println("Response code: " + String(returnCode));
+
+    // note that in this case, we're just printing the raw response from Facebook.
+    // see the examples on using Temboo SDK output filters at http://www.temboo.com/arduino
+    // for information on how to filter this data    
+    while(SetStatusChoreo.available()) {
+      char c = SetStatusChoreo.read();
+      Serial.print(c);
+    }
+
+    SetStatusChoreo.close();
+  }
+
+  Serial.println("Waiting...");
+  Serial.println("");
+
+  delay(30000); // wait 30 seconds between SetStatus calls  
+}
+
+/*
+  IMPORTANT NOTE: TembooAccount.h:
+
+  TembooAccount.h is a file referenced by this sketch that contains your Temboo account information.
+  You'll need to edit the placeholder version of TembooAccount.h included with this example sketch,
+  by inserting your own Temboo account name and app key information. The contents of the file should
+  look like:
+
+  #define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+  #define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+  #define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+  You can find your Temboo App Key information on the Temboo website, 
+  under My Account > Application Keys
+
+  The same TembooAccount.h file settings can be used for all Temboo SDK sketches.
+
+  Keeping your account information in a separate file means you can share the main .ino file without worrying 
+  that you forgot to delete your credentials.
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UploadToDropbox/TembooAccount.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UploadToDropbox/TembooAccount.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UploadToDropbox/TembooAccount.h	(revision 136)
@@ -0,0 +1,5 @@
+#define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+#define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+#define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UploadToDropbox/UploadToDropbox.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UploadToDropbox/UploadToDropbox.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/Temboo/UploadToDropbox/UploadToDropbox.ino	(revision 136)
@@ -0,0 +1,208 @@
+/*
+  UploadToDropbox
+  
+  Demonstrates uploading a file to a Dropbox account using Temboo from an Arduino Y炭n.
+  
+  Check out the latest Arduino & Temboo examples and support docs at http://www.temboo.com/arduino
+
+  A Temboo account and application key are necessary to run all Temboo examples. 
+  If you don't already have one, you can register for a free Temboo account at 
+  http://www.temboo.com
+
+  You'll also need a valid Dropbox app and accompanying OAuth credentials. 
+  To create a Dropbox app, visit https://www.dropbox.com/developers/apps and 
+  do the following:
+  
+  1. Create a "Dropbox API app"
+  2. Select "Files and datastores"
+  3. Select "Yes - my app only needs access to the files it creates."
+  
+  Once you've created your app, follow the instructions at 
+  https://www.temboo.com/library/Library/Dropbox/OAuth/ to run the Initialize and Finalize
+  OAuth Choreos. These Choreos complete the OAuth handshake and retrieve your Dropbox OAuth access tokens.
+
+  This example assumes basic familiarity with Arduino sketches, and that your Y炭n is connected
+  to the Internet.
+
+  Looking for another API to use with your Arduino Y炭n? We've got over 100 in our Library!
+  
+  This example code is in the public domain.
+*/
+
+#include <Bridge.h>
+#include <Temboo.h>
+#include "TembooAccount.h" // contains Temboo account information
+                           // as described in the footer comment below
+
+
+/*** SUBSTITUTE YOUR VALUES BELOW: ***/
+
+// Note that for additional security and reusability, you could
+// use #define statements to specify these values in a .h file.
+
+// your Dropbox app key, available on the Dropbox developer console after registering an app
+const String DROPBOX_APP_KEY = "xxxxxxxxxx";
+
+// your Dropbox app secret, available on the Dropbox developer console after registering an app 
+const String DROPBOX_APP_SECRET = "xxxxxxxxxx";
+
+// your Dropbox access token, which is returned by the FinalizeOAuth Choreo
+const String DROPBOX_ACCESS_TOKEN = "xxxxxxxxxx";
+
+// your Dropbox access token secret, which is returned by the FinalizeOAuth Choreo
+const String DROPBOX_ACCESS_TOKEN_SECRET = "xxxxxxxxxx";
+
+
+boolean success = false; // a flag to indicate whether we've uploaded the file yet
+
+void setup() {
+  Serial.begin(9600);
+  
+  // For debugging, wait until a serial console is connected.
+  delay(4000);
+  while(!Serial);
+  Bridge.begin();
+}
+
+void loop()
+{
+  // only try to upload the file if we haven't already done so
+  if (!success) {
+    
+    Serial.println("Base64 encoding data to upload...");
+    
+    // base64 encode the data to upload
+    String base64EncodedData = base64Encode("Hello, Arduino!");
+
+
+    Serial.println("Uploading data to Dropbox...");
+
+    // we need a Process object to send a Choreo request to Temboo    
+    TembooChoreo UploadFileChoreo;
+
+    // invoke the Temboo client
+    // NOTE that the client must be reinvoked and repopulated with
+    // appropriate arguments each time its run() method is called.
+    UploadFileChoreo.begin();
+    
+    // set Temboo account credentials
+    UploadFileChoreo.setAccountName(TEMBOO_ACCOUNT);
+    UploadFileChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    UploadFileChoreo.setAppKey(TEMBOO_APP_KEY);
+
+    // identify the Temboo Library choreo to run (Dropbox > FilesAndMetadata > UploadFile)
+    UploadFileChoreo.setChoreo("/Library/Dropbox/FilesAndMetadata/UploadFile");
+    
+    // set the required choreo inputs
+    // see https://www.temboo.com/library/Library/Dropbox/FilesAndMetadata/UploadFile/
+    // for complete details about the inputs for this Choreo
+
+    // first specify the name of the file to create/update on Dropbox
+    UploadFileChoreo.addInput("FileName", "ArduinoTest.txt");
+
+    // next, the root folder on Dropbox relative to which the file path is specified.
+    // to work with the Dropbox app you created earlier, this should be left as "sandbox"
+    // if your Dropbox app has full access to your files, specify "dropbox"
+    UploadFileChoreo.addInput("Root","sandbox");
+
+    // next, the Base64 encoded file data to upload
+    UploadFileChoreo.addInput("FileContents", base64EncodedData);
+   
+    // finally, the Dropbox OAuth credentials defined above
+    UploadFileChoreo.addInput("AppSecret", DROPBOX_APP_SECRET);
+    UploadFileChoreo.addInput("AccessToken", DROPBOX_ACCESS_TOKEN);
+    UploadFileChoreo.addInput("AccessTokenSecret", DROPBOX_ACCESS_TOKEN_SECRET);
+    UploadFileChoreo.addInput("AppKey", DROPBOX_APP_KEY);
+
+    // tell the Process to run and wait for the results. The 
+    // return code (returnCode) will tell us whether the Temboo client 
+    // was able to send our request to the Temboo servers
+    unsigned int returnCode = UploadFileChoreo.run();
+
+    // a return code of zero (0) means everything worked
+    if (returnCode == 0) {
+        Serial.println("Success! File uploaded!");
+        success = true;
+    } else {
+      // a non-zero return code means there was an error
+      Serial.println("Uh-oh! Something went wrong!");
+    }
+    
+    // print out the full response to the serial monitor in all
+    // cases, just for debugging
+    while (UploadFileChoreo.available()) {
+      char c = UploadFileChoreo.read();
+      Serial.print(c);
+    }
+    UploadFileChoreo.close();
+
+    Serial.println("Waiting...");
+  }
+
+  delay(30000); // wait 30 seconds between upload attempts
+}
+
+
+/*
+  A utility function to Base64 encode the specified string
+  by calling a Temboo Utilities Choreo.
+*/
+String base64Encode(String toEncode) {
+  
+    // we need a Process object to send a Choreo request to Temboo
+    TembooChoreo Base64EncodeChoreo;
+
+    // invoke the Temboo client
+    Base64EncodeChoreo.begin();
+    
+    // set Temboo account credentials
+    Base64EncodeChoreo.setAccountName(TEMBOO_ACCOUNT);
+    Base64EncodeChoreo.setAppKeyName(TEMBOO_APP_KEY_NAME);
+    Base64EncodeChoreo.setAppKey(TEMBOO_APP_KEY);
+
+    // identify the Temboo Library choreo to run (Utilities > Encoding > Base64Encode)
+    Base64EncodeChoreo.setChoreo("/Library/Utilities/Encoding/Base64Encode");
+ 
+     // set choreo inputs
+    Base64EncodeChoreo.addInput("Text", toEncode);
+    
+    // run the choreo
+    Base64EncodeChoreo.run();
+    
+    // read in the choreo results, and return the "Base64EncodedText" output value.
+    // see http://www.temboo.com/arduino for more details on using choreo outputs.
+    while(Base64EncodeChoreo.available()) {
+      // read the name of the output item
+      String name = Base64EncodeChoreo.readStringUntil('\x1F');
+      name.trim();
+
+      // read the value of the output item
+      String data = Base64EncodeChoreo.readStringUntil('\x1E');
+      data.trim();
+
+      if(name == "Base64EncodedText") {
+        return data;
+      }
+    }
+}
+
+/*
+  IMPORTANT NOTE: TembooAccount.h:
+
+  TembooAccount.h is a file referenced by this sketch that contains your Temboo account information.
+  You'll need to edit the placeholder version of TembooAccount.h included with this example sketch,
+  by inserting your own Temboo account name and app key information. The contents of the file should
+  look like:
+
+  #define TEMBOO_ACCOUNT "myTembooAccountName"  // your Temboo account name 
+  #define TEMBOO_APP_KEY_NAME "myFirstApp"  // your Temboo app key name
+  #define TEMBOO_APP_KEY  "xxx-xxx-xxx-xx-xxx"  // your Temboo app key
+
+  You can find your Temboo App Key information on the Temboo website, 
+  under My Account > Application Keys
+
+  The same TembooAccount.h file settings can be used for all Temboo SDK sketches.
+
+  Keeping your account information in a separate file means you can share the main .ino file without worrying 
+  that you forgot to delete your credentials.
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TemperatureWebPanel/TemperatureWebPanel.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TemperatureWebPanel/TemperatureWebPanel.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TemperatureWebPanel/TemperatureWebPanel.ino	(revision 136)
@@ -0,0 +1,125 @@
+/*
+  Temperature web interface
+
+ This example shows how to serve data from an analog input
+ via the Arduino Y炭n's built-in webserver using the Bridge library.
+
+ The circuit:
+ * TMP36 temperature sensor on analog pin A1
+ * SD card attached to SD card slot of the Arduino Y炭n
+
+ This sketch must be uploaded via wifi. REST API must be set to "open".
+
+ Prepare your SD card with an empty folder in the SD root
+ named "arduino" and a subfolder of that named "www".
+ This will ensure that the Y炭n will create a link
+ to the SD to the "/mnt/sd" path.
+
+ In this sketch folder is a basic webpage and a copy of zepto.js, a
+ minimized version of jQuery.  When you upload your sketch, these files
+ will be placed in the /arduino/www/TemperatureWebPanel folder on your SD card.
+
+ You can then go to http://arduino.local/sd/TemperatureWebPanel
+ to see the output of this sketch.
+
+ You can remove the SD card while the Linux and the
+ sketch are running but be careful not to remove it while
+ the system is writing to it.
+
+ created  6 July 2013
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/TemperatureWebPanel
+
+ */
+
+#include <Bridge.h>
+#include <YunServer.h>
+#include <YunClient.h>
+
+// Listen on default port 5555, the webserver on the Y炭n
+// will forward there all the HTTP requests for us.
+YunServer server;
+String startString;
+long hits = 0;
+
+void setup() {
+  Serial.begin(9600);
+
+  // Bridge startup
+  pinMode(13, OUTPUT);
+  digitalWrite(13, LOW);
+  Bridge.begin();
+  digitalWrite(13, HIGH);
+
+  // using A0 and A2 as vcc and gnd for the TMP36 sensor:
+  pinMode(A0, OUTPUT);
+  pinMode(A2, OUTPUT);
+  digitalWrite(A0, HIGH);
+  digitalWrite(A2, LOW);
+
+  // Listen for incoming connection only from localhost
+  // (no one from the external network could connect)
+  server.listenOnLocalhost();
+  server.begin();
+
+  // get the time that this sketch started:
+  Process startTime;
+  startTime.runShellCommand("date");
+  while (startTime.available()) {
+    char c = startTime.read();
+    startString += c;
+  }
+}
+
+void loop() {
+  // Get clients coming from server
+  YunClient client = server.accept();
+
+  // There is a new client?
+  if (client) {
+    // read the command
+    String command = client.readString();
+    command.trim();        //kill whitespace
+    Serial.println(command);
+    // is "temperature" command?
+    if (command == "temperature") {
+
+      // get the time from the server:
+      Process time;
+      time.runShellCommand("date");
+      String timeString = "";
+      while (time.available()) {
+        char c = time.read();
+        timeString += c;
+      }
+      Serial.println(timeString);
+      int sensorValue = analogRead(A1);
+      // convert the reading to millivolts:
+      float voltage = sensorValue *  (5000 / 1024);
+      // convert the millivolts to temperature celsius:
+      float temperature = (voltage - 500) / 10;
+      // print the temperature:
+      client.print("Current time on the Y炭n: ");
+      client.println(timeString);
+      client.print("<br>Current temperature: ");
+      client.print(temperature);
+      client.print(" degrees C");
+      client.print("<br>This sketch has been running since ");
+      client.print(startString);
+      client.print("<br>Hits so far: ");
+      client.print(hits);
+    }
+
+    // Close connection and free resources.
+    client.stop();
+    hits++;
+  }
+
+  delay(50); // Poll every 50ms
+}
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TemperatureWebPanel/www/index.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TemperatureWebPanel/www/index.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TemperatureWebPanel/www/index.html	(revision 136)
@@ -0,0 +1,16 @@
+<!DOCTYPE html>
+<html>
+	<head>
+	<script type="text/javascript" src="zepto.min.js"></script>
+	  <script type="text/javascript">
+	   	function refresh() {
+		  	$('#content').load('/arduino/temperature');
+	  	}
+</script>
+
+	</head>
+	<body onload="setInterval(refresh, 2000);">
+		<span id="content">0</span>
+	</body>
+</html>
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TemperatureWebPanel/www/zepto.min.js
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TemperatureWebPanel/www/zepto.min.js	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TemperatureWebPanel/www/zepto.min.js	(revision 136)
@@ -0,0 +1,2 @@
+/* Zepto v1.0-1-ga3cab6c - polyfill zepto detect event ajax form fx - zeptojs.com/license */
+(function(a){String.prototype.trim===a&&(String.prototype.trim=function(){return this.replace(/^\s+|\s+$/g,"")}),Array.prototype.reduce===a&&(Array.prototype.reduce=function(b){if(this===void 0||this===null)throw new TypeError;var c=Object(this),d=c.length>>>0,e=0,f;if(typeof b!="function")throw new TypeError;if(d==0&&arguments.length==1)throw new TypeError;if(arguments.length>=2)f=arguments[1];else do{if(e in c){f=c[e++];break}if(++e>=d)throw new TypeError}while(!0);while(e<d)e in c&&(f=b.call(a,f,c[e],e,c)),e++;return f})})();var Zepto=function(){function E(a){return a==null?String(a):y[z.call(a)]||"object"}function F(a){return E(a)=="function"}function G(a){return a!=null&&a==a.window}function H(a){return a!=null&&a.nodeType==a.DOCUMENT_NODE}function I(a){return E(a)=="object"}function J(a){return I(a)&&!G(a)&&a.__proto__==Object.prototype}function K(a){return a instanceof Array}function L(a){return typeof a.length=="number"}function M(a){return g.call(a,function(a){return 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Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TimeCheck/TimeCheck.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TimeCheck/TimeCheck.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/TimeCheck/TimeCheck.ino	(revision 136)
@@ -0,0 +1,82 @@
+/*
+  Time Check
+
+ Gets the time from Linux via Bridge then parses out hours,
+ minutes and seconds for the Arduino using an Arduino Y炭n.
+
+ created  27 May 2013
+ modified 21 June 2013
+ By Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/TimeCheck
+
+ */
+
+
+#include <Process.h>
+
+Process date;                 // process used to get the date
+int hours, minutes, seconds;  // for the results
+int lastSecond = -1;          // need an impossible value for comparison
+
+void setup() {
+  Bridge.begin();        // initialize Bridge
+  Serial.begin(9600);    // initialize serial
+
+  while (!Serial);              // wait for Serial Monitor to open
+  Serial.println("Time Check");  // Title of sketch
+
+  // run an initial date process. Should return:
+  // hh:mm:ss :
+  if (!date.running()) {
+    date.begin("date");
+    date.addParameter("+%T");
+    date.run();
+  }
+}
+
+void loop() {
+
+  if (lastSecond != seconds) { // if a second has passed
+    // print the time:
+    if (hours <= 9) Serial.print("0");    // adjust for 0-9
+    Serial.print(hours);
+    Serial.print(":");
+    if (minutes <= 9) Serial.print("0");  // adjust for 0-9
+    Serial.print(minutes);
+    Serial.print(":");
+    if (seconds <= 9) Serial.print("0");  // adjust for 0-9
+    Serial.println(seconds);
+
+    // restart the date process:
+    if (!date.running()) {
+      date.begin("date");
+      date.addParameter("+%T");
+      date.run();
+    }
+  }
+
+  //if there's a result from the date process, parse it:
+  while (date.available() > 0) {
+    // get the result of the date process (should be hh:mm:ss):
+    String timeString = date.readString();
+
+    // find the colons:
+    int firstColon = timeString.indexOf(":");
+    int secondColon = timeString.lastIndexOf(":");
+
+    // get the substrings for hour, minute second:
+    String hourString = timeString.substring(0, firstColon);
+    String minString = timeString.substring(firstColon + 1, secondColon);
+    String secString = timeString.substring(secondColon + 1);
+
+    // convert to ints,saving the previous second:
+    hours = hourString.toInt();
+    minutes = minString.toInt();
+    lastSecond = seconds;          // save to do a time comparison
+    seconds = secString.toInt();
+  }
+
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/WiFiStatus/WiFiStatus.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/WiFiStatus/WiFiStatus.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/WiFiStatus/WiFiStatus.ino	(revision 136)
@@ -0,0 +1,52 @@
+/*
+  WiFi Status
+
+ This sketch runs a script called "pretty-wifi-info.lua"
+ installed on your Y炭n in folder /usr/bin.
+ It prints information about the status of your wifi connection.
+
+ It uses Serial to print, so you need to connect your Y炭n to your
+ computer using a USB cable and select the appropriate port from
+ the Port menu
+
+ created  18 June 2013
+ By Federico Fissore
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/YunWiFiStatus
+
+ */
+
+#include <Process.h>
+
+void setup() {
+  Serial.begin(9600);  // initialize serial communication
+  while (!Serial);     // do nothing until the serial monitor is opened
+
+  Serial.println("Starting bridge...\n");
+  pinMode(13, OUTPUT);
+  digitalWrite(13, LOW);
+  Bridge.begin();  // make contact with the linux processor
+  digitalWrite(13, HIGH);  // Led on pin 13 turns on when the bridge is ready
+
+  delay(2000);  // wait 2 seconds
+}
+
+void loop() {
+  Process wifiCheck;  // initialize a new process
+
+  wifiCheck.runShellCommand("/usr/bin/pretty-wifi-info.lua");  // command you want to run
+
+  // while there's any characters coming back from the
+  // process, print them to the serial monitor:
+  while (wifiCheck.available() > 0) {
+    char c = wifiCheck.read();
+    Serial.print(c);
+  }
+
+  Serial.println();
+
+  delay(5000);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/YunSerialTerminal/YunSerialTerminal.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/YunSerialTerminal/YunSerialTerminal.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/examples/YunSerialTerminal/YunSerialTerminal.ino	(revision 136)
@@ -0,0 +1,87 @@
+/*
+  Arduino Y炭n USB-to-Serial
+
+ Allows you to use the Y炭n's 32U4 processor as a
+ serial terminal for the Linux side on the Y炭n.
+
+ Upload this to an Arduino Y炭n via serial (not WiFi) then open
+ the serial monitor at 115200 to see the boot process of Linux.
+ You can also use the serial monitor as a basic command line
+ interface for Linux using this sketch.
+
+ From the serial monitor the following commands can be issued:
+
+ '~' followed by '0' -> Set the UART speed to 57600 baud
+ '~' followed by '1' -> Set the UART speed to 115200 baud
+ '~' followed by '2' -> Set the UART speed to 250000 baud
+ '~' followed by '3' -> Set the UART speed to 500000 baud
+ '~' followed by '~' -> Sends the bridge's shutdown command to
+                        obtain the console.
+
+ The circuit:
+ * Arduino Y炭n
+
+ created March 2013
+ by Massimo Banzi
+ modified by Cristian Maglie
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/YunSerialTerminal
+
+ */
+
+
+long linuxBaud = 250000;
+const int handshake =  7;      // the number of the HANDSHAKE pin
+
+void setup() {
+  Serial.begin(115200);      // open serial connection via USB-Serial
+  Serial1.begin(linuxBaud);  // open serial connection to Linux
+  pinMode(handshake, OUTPUT);
+  digitalWrite(handshake, LOW);
+}
+
+boolean commandMode = false;
+
+void loop() {
+  // copy from USB-CDC to UART
+  int c = Serial.read();              // read from USB-CDC
+  if (c != -1) {                      // got anything?
+    if (commandMode == false) {       // if we aren't in command mode...
+      if (c == '~') {                 //    Tilde '~' key pressed?
+        commandMode = true;           //       enter in command mode
+      } else {
+        Serial1.write(c);             //    otherwise write char to UART
+      }
+    } else {                          // if we are in command mode...
+      if (c == '0') {                 //     '0' key pressed?
+        Serial1.begin(57600);         //        set speed to 57600
+        Serial.println("Speed set to 57600");
+      } else if (c == '1') {          //     '1' key pressed?
+        Serial1.begin(115200);        //        set speed to 115200
+        Serial.println("Speed set to 115200");
+      } else if (c == '2') {          //     '2' key pressed?
+        Serial1.begin(250000);        //        set speed to 250000
+        Serial.println("Speed set to 250000");
+      } else if (c == '3') {          //     '3' key pressed?
+        Serial1.begin(500000);        //        set speed to 500000
+        Serial.println("Speed set to 500000");
+      } else if (c == '~') {          //     '~` key pressed?
+                                      //        send "bridge shutdown" command
+        Serial1.write((uint8_t *)"\xff\0\0\x05XXXXX\x7f\xf9", 11);
+        Serial.println("Sending bridge's shutdown command");
+      } else {                        //     any other key pressed?
+        Serial1.write('~');           //        write '~' to UART
+        Serial1.write(c);             //        write char to UART
+      }
+      commandMode = false;            //     in all cases exit from command mode
+    }
+  }
+
+  // copy from UART to USB-CDC
+  c = Serial1.read();                 // read from UART
+  if (c != -1) {                      // got anything?
+    Serial.write(c);                  //    write to USB-CDC
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/keywords.txt	(revision 136)
@@ -0,0 +1,87 @@
+#######################################
+# Syntax Coloring Map For Bridge
+#######################################
+
+#######################################
+# Class (KEYWORD3)
+#######################################
+
+Bridge	KEYWORD3
+FileIO	KEYWORD3
+FileSystem	KEYWORD3
+Console	KEYWORD3
+Process	KEYWORD3
+Mailbox	KEYWORD3
+HttpClient	KEYWORD3
+YunServer	KEYWORD3
+YunClient	KEYWORD3
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+# methods names in commond
+begin	KEYWORD2
+end	KEYWORD2
+available	KEYWORD2
+read	KEYWORD2
+peek	KEYWORD2
+write	KEYWORD2
+flush	KEYWORD2
+bool	KEYWORD2
+
+# Bridge Class
+transfer	KEYWORD2
+put	KEYWORD2
+get	KEYWORD2
+
+# Console Class
+buffer	KEYWORD2
+noBuffer	KEYWORD2
+connected	KEYWORD2
+
+# FileIO Class
+File	KEYWORD2
+seek	KEYWORD2
+position	KEYWORD2
+size	KEYWORD2
+close	KEYWORD2
+name	KEYWORD2
+isDirectory	KEYWORD2
+openNextFile	KEYWORD2
+rewindDirectory	KEYWORD2
+
+# Process Class
+addParameter	KEYWORD2
+runAsynchronously	KEYWORD2
+run	KEYWORD2
+running	KEYWORD2
+exitValue	KEYWORD2
+runShellCommand	KEYWORD2
+runShellCommandAsynchronously	KEYWORD2
+
+# Mailbox Class
+readMessage	KEYWORD2
+writeMessage	KEYWORD2
+writeJSON	KEYWORD2
+message Available	KEYWORD2
+
+# HttpClient Class
+getAsynchronously	KEYWORD2
+ready	KEYWORD2
+getResult	KEYWORD2
+
+# YunServer Class
+accept	KEYWORD2
+stop	KEYWORD2
+connect	KEYWORD2
+connected	KEYWORD2
+
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
+FILE_READ	LITERAL1
+FILE_WRITE	LITERAL1
+FILE_APPEND	LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Bridge
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Enables the communication between the Linux processor and the AVR. For Arduino Y炭n and TRE only.
+paragraph=The Bridge library feature: access to the shared storage, run and manage linux processes, open a remote console, access to the linux file system, including the SD card, enstablish http clients or servers.
+category=Communication
+url=http://arduino.cc/en/Reference/YunBridgeLibrary
+architectures=*
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Bridge.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Bridge.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Bridge.cpp	(revision 136)
@@ -0,0 +1,248 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include "Bridge.h"
+
+BridgeClass::BridgeClass(Stream &_stream) :
+  index(0), stream(_stream), started(false), max_retries(0) {
+  // Empty
+}
+
+void BridgeClass::begin() {
+  if (started)
+    return;
+  started = true;
+
+  // Wait for U-boot to finish startup
+  do {
+    dropAll();
+    delay(1000);
+  } while (stream.available() > 0);
+
+  while (true) {
+    // Bridge interrupt:
+    // - Ask the bridge to close itself
+    uint8_t quit_cmd[] = {'X', 'X', 'X', 'X', 'X'};
+    max_retries = 1;
+    transfer(quit_cmd, 5);
+
+    // Bridge startup:
+    // - If the bridge is not running starts it safely
+    stream.print(CTRL_C);
+    delay(250);
+    stream.print(F("\n"));
+    delay(250);
+    stream.print(F("\n"));
+    delay(500);
+    // Wait for OpenWRT message
+    // "Press enter to activate console"
+    stream.print(F("run-bridge\n"));
+    delay(500);
+    dropAll();
+
+    // Reset the brigde to check if it is running
+    uint8_t cmd[] = {'X', 'X', '1', '0', '0'};
+    uint8_t res[4];
+    max_retries = 50;
+    uint16_t l = transfer(cmd, 5, res, 4);
+    if (l == TRANSFER_TIMEOUT) {
+      // Bridge didn't start...
+      // Maybe the board is starting-up?
+
+      // Wait and retry
+      delay(1000);
+      continue;
+    }
+    if (res[0] != 0)
+      while (true);
+
+    // Detect bridge version
+    if (l == 4) {
+      bridgeVersion = (res[1]-'0')*100 + (res[2]-'0')*10 + (res[3]-'0');
+    } else {
+      // Bridge v1.0.0 didn't send any version info
+      bridgeVersion = 100;
+    }
+
+    max_retries = 50;
+    return;
+  }
+}
+
+void BridgeClass::put(const char *key, const char *value) {
+  // TODO: do it in a more efficient way
+  String cmd = "D";
+  cmd += key;
+  cmd += "\xFE";
+  cmd += value;
+  transfer((uint8_t*)cmd.c_str(), cmd.length());
+}
+
+unsigned int BridgeClass::get(const char *key, uint8_t *value, unsigned int maxlen) {
+  uint8_t cmd[] = {'d'};
+  unsigned int l = transfer(cmd, 1, (uint8_t *)key, strlen(key), value, maxlen);
+  if (l < maxlen)
+    value[l] = 0; // Zero-terminate string
+  return l;
+}
+
+#if defined(ARDUINO_ARCH_AVR)
+// AVR use an optimized implementation of CRC
+#include <util/crc16.h>
+#else
+// Generic implementation for non-AVR architectures
+uint16_t _crc_ccitt_update(uint16_t crc, uint8_t data)
+{
+  data ^= crc & 0xff;
+  data ^= data << 4;
+  return ((((uint16_t)data << 8) | ((crc >> 8) & 0xff)) ^
+          (uint8_t)(data >> 4) ^
+          ((uint16_t)data << 3));
+}
+#endif
+
+void BridgeClass::crcUpdate(uint8_t c) {
+  CRC = _crc_ccitt_update(CRC, c);
+}
+
+void BridgeClass::crcReset() {
+  CRC = 0xFFFF;
+}
+
+void BridgeClass::crcWrite() {
+  stream.write((char)(CRC >> 8));
+  stream.write((char)(CRC & 0xFF));
+}
+
+bool BridgeClass::crcCheck(uint16_t _CRC) {
+  return CRC == _CRC;
+}
+
+uint16_t BridgeClass::transfer(const uint8_t *buff1, uint16_t len1,
+                               const uint8_t *buff2, uint16_t len2,
+                               const uint8_t *buff3, uint16_t len3,
+                               uint8_t *rxbuff, uint16_t rxlen)
+{
+  uint16_t len = len1 + len2 + len3;
+  uint8_t retries = 0;
+  for ( ; retries < max_retries; retries++, delay(100), dropAll() /* Delay for retransmission */) {
+    // Send packet
+    crcReset();
+    stream.write((char)0xFF);                // Start of packet (0xFF)
+    crcUpdate(0xFF);
+    stream.write((char)index);               // Message index
+    crcUpdate(index);
+    stream.write((char)((len >> 8) & 0xFF)); // Message length (hi)
+    crcUpdate((len >> 8) & 0xFF);
+    stream.write((char)(len & 0xFF));        // Message length (lo)
+    crcUpdate(len & 0xFF);
+    for (uint16_t i = 0; i < len1; i++) { // Payload
+      stream.write((char)buff1[i]);
+      crcUpdate(buff1[i]);
+    }
+    for (uint16_t i = 0; i < len2; i++) { // Payload
+      stream.write((char)buff2[i]);
+      crcUpdate(buff2[i]);
+    }
+    for (uint16_t i = 0; i < len3; i++) { // Payload
+      stream.write((char)buff3[i]);
+      crcUpdate(buff3[i]);
+    }
+    crcWrite();                     // CRC
+
+    // Wait for ACK in 100ms
+    if (timedRead(100) != 0xFF)
+      continue;
+    crcReset();
+    crcUpdate(0xFF);
+
+    // Check packet index
+    if (timedRead(5) != index)
+      continue;
+    crcUpdate(index);
+
+    // Recv len
+    int lh = timedRead(10);
+    if (lh < 0)
+      continue;
+    crcUpdate(lh);
+    int ll = timedRead(10);
+    if (ll < 0)
+      continue;
+    crcUpdate(ll);
+    uint16_t l = lh;
+    l <<= 8;
+    l += ll;
+
+    // Recv data
+    for (uint16_t i = 0; i < l; i++) {
+      int c = timedRead(5);
+      if (c < 0)
+        continue;
+      // Cut received data if rxbuffer is too small
+      if (i < rxlen)
+        rxbuff[i] = c;
+      crcUpdate(c);
+    }
+
+    // Check CRC
+    int crc_hi = timedRead(5);
+    if (crc_hi < 0)
+      continue;
+    int crc_lo = timedRead(5);
+    if (crc_lo < 0)
+      continue;
+    if (!crcCheck((crc_hi << 8) + crc_lo))
+      continue;
+
+    // Increase index
+    index++;
+
+    // Return bytes received
+    if (l > rxlen)
+      return rxlen;
+    return l;
+  }
+
+  // Max retries exceeded
+  return TRANSFER_TIMEOUT;
+}
+
+int BridgeClass::timedRead(unsigned int timeout) {
+  int c;
+  unsigned long _startMillis = millis();
+  do {
+    c = stream.read();
+    if (c >= 0) return c;
+  } while (millis() - _startMillis < timeout);
+  return -1;     // -1 indicates timeout
+}
+
+void BridgeClass::dropAll() {
+  while (stream.available() > 0) {
+    stream.read();
+  }
+}
+
+// Bridge instance
+#ifdef __AVR_ATmega32U4__
+// Leonardo variants (where HardwareSerial is Serial1)
+SerialBridgeClass Bridge(Serial1);
+#else
+SerialBridgeClass Bridge(Serial);
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Bridge.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Bridge.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Bridge.h	(revision 136)
@@ -0,0 +1,113 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef BRIDGE_H_
+#define BRIDGE_H_
+
+#include <Arduino.h>
+#include <Stream.h>
+
+class BridgeClass {
+  public:
+    BridgeClass(Stream &_stream);
+    void begin();
+
+    // Methods to handle key/value datastore
+    void put(const char *key, const char *value);
+    void put(const String &key, const String &value)
+    {
+      put(key.c_str(), value.c_str());
+    }
+    unsigned int get(const char *key, uint8_t *buff, unsigned int size);
+    unsigned int get(const char *key, char *value, unsigned int maxlen)
+    {
+      return get(key, reinterpret_cast<uint8_t *>(value), maxlen);
+    }
+
+    // Trasnfer a frame (with error correction and response)
+    uint16_t transfer(const uint8_t *buff1, uint16_t len1,
+                      const uint8_t *buff2, uint16_t len2,
+                      const uint8_t *buff3, uint16_t len3,
+                      uint8_t *rxbuff, uint16_t rxlen);
+    // multiple inline versions of the same function to allow efficient frame concatenation
+    uint16_t transfer(const uint8_t *buff1, uint16_t len1)
+    {
+      return transfer(buff1, len1, NULL, 0);
+    }
+    uint16_t transfer(const uint8_t *buff1, uint16_t len1,
+                      uint8_t *rxbuff, uint16_t rxlen)
+    {
+      return transfer(buff1, len1, NULL, 0, rxbuff, rxlen);
+    }
+    uint16_t transfer(const uint8_t *buff1, uint16_t len1,
+                      const uint8_t *buff2, uint16_t len2,
+                      uint8_t *rxbuff, uint16_t rxlen)
+    {
+      return transfer(buff1, len1, buff2, len2, NULL, 0, rxbuff, rxlen);
+    }
+
+    uint16_t getBridgeVersion()
+    {
+      return bridgeVersion;
+    }
+
+    static const int TRANSFER_TIMEOUT = 0xFFFF;
+
+  private:
+    uint8_t index;
+    int timedRead(unsigned int timeout);
+    void dropAll();
+    uint16_t bridgeVersion;
+
+  private:
+    void crcUpdate(uint8_t c);
+    void crcReset();
+    void crcWrite();
+    bool crcCheck(uint16_t _CRC);
+    uint16_t CRC;
+
+  private:
+    static const char CTRL_C = 3;
+    Stream &stream;
+    bool started;
+    uint8_t max_retries;
+};
+
+// This subclass uses a serial port Stream
+class SerialBridgeClass : public BridgeClass {
+  public:
+    SerialBridgeClass(HardwareSerial &_serial)
+      : BridgeClass(_serial), serial(_serial) {
+      // Empty
+    }
+
+    void begin(unsigned long baudrate = 250000) {
+      serial.begin(baudrate);
+      BridgeClass::begin();
+    }
+
+  private:
+    HardwareSerial &serial;
+};
+
+extern SerialBridgeClass Bridge;
+
+#endif /* BRIDGE_H_ */
+
+#include <Console.h>
+#include <Process.h>
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Console.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Console.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Console.cpp	(revision 136)
@@ -0,0 +1,153 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include <Console.h>
+
+// Default constructor uses global Bridge instance
+ConsoleClass::ConsoleClass() :
+  bridge(Bridge), inBuffered(0), inReadPos(0), inBuffer(NULL),
+  autoFlush(true)
+{
+  // Empty
+}
+
+// Constructor with a user provided BridgeClass instance
+ConsoleClass::ConsoleClass(BridgeClass &_b) :
+  bridge(_b), inBuffered(0), inReadPos(0), inBuffer(NULL),
+  autoFlush(true)
+{
+  // Empty
+}
+
+ConsoleClass::~ConsoleClass() {
+  end();
+}
+
+size_t ConsoleClass::write(uint8_t c) {
+  if (autoFlush) {
+    uint8_t tmp[] = { 'P', c };
+    bridge.transfer(tmp, 2);
+    return 1;
+  } else {
+    outBuffer[outBuffered++] = c;
+    if (outBuffered == outBufferSize)
+      flush();
+  }
+}
+
+size_t ConsoleClass::write(const uint8_t *buff, size_t size) {
+  if (autoFlush) {
+    // TODO: do it in a more efficient way
+    uint8_t *tmp = new uint8_t[size + 1];
+    tmp[0] = 'P';
+    memcpy(tmp + 1, buff, size);
+    bridge.transfer(tmp, size + 1);
+    delete[] tmp;
+    return size;
+  } else {
+    while (size > 0) {
+      outBuffer[outBuffered++] = *buff++;
+      size--;
+      if (outBuffered == outBufferSize)
+        flush();
+    }
+  }
+}
+
+void ConsoleClass::flush() {
+  if (autoFlush)
+    return;
+
+  bridge.transfer(outBuffer, outBuffered);
+  outBuffered = 1;
+}
+
+void ConsoleClass::noBuffer() {
+  if (autoFlush)
+    return;
+  delete[] outBuffer;
+  autoFlush = true;
+}
+
+void ConsoleClass::buffer(uint8_t size) {
+  noBuffer();
+  if (size == 0)
+    return;
+  outBuffer = new uint8_t[size + 1];
+  outBuffer[0] = 'P'; // WRITE tag
+  outBufferSize = size + 1;
+  outBuffered = 1;
+  autoFlush = false;
+}
+
+bool ConsoleClass::connected() {
+  uint8_t tmp = 'a';
+  bridge.transfer(&tmp, 1, &tmp, 1);
+  return tmp == 1;
+}
+
+int ConsoleClass::available() {
+  // Look if there is new data available
+  doBuffer();
+  return inBuffered;
+}
+
+int ConsoleClass::read() {
+  doBuffer();
+  if (inBuffered == 0)
+    return -1; // no chars available
+  else {
+    inBuffered--;
+    return inBuffer[inReadPos++];
+  }
+}
+
+int ConsoleClass::peek() {
+  doBuffer();
+  if (inBuffered == 0)
+    return -1; // no chars available
+  else
+    return inBuffer[inReadPos];
+}
+
+void ConsoleClass::doBuffer() {
+  // If there are already char in buffer exit
+  if (inBuffered > 0)
+    return;
+
+  // Try to buffer up to 32 characters
+  inReadPos = 0;
+  uint8_t tmp[] = { 'p', BUFFER_SIZE };
+  inBuffered = bridge.transfer(tmp, 2, inBuffer, BUFFER_SIZE);
+}
+
+void ConsoleClass::begin() {
+  bridge.begin();
+  end();
+  inBuffer = new uint8_t[BUFFER_SIZE];
+}
+
+void ConsoleClass::end() {
+  noBuffer();
+  if (inBuffer) {
+    delete[] inBuffer;
+    inBuffer = NULL;
+  }
+}
+
+ConsoleClass Console;
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Console.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Console.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Console.h	(revision 136)
@@ -0,0 +1,71 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef CONSOLE_H_
+#define CONSOLE_H_
+
+#include <Bridge.h>
+
+class ConsoleClass : public Stream {
+  public:
+    // Default constructor uses global Bridge instance
+    ConsoleClass();
+    // Constructor with a user provided BridgeClass instance
+    ConsoleClass(BridgeClass &_b);
+    ~ConsoleClass();
+
+    void begin();
+    void end();
+
+    void buffer(uint8_t size);
+    void noBuffer();
+
+    bool connected();
+
+    // Stream methods
+    // (read from console socket)
+    int available();
+    int read();
+    int peek();
+    // (write to console socket)
+    size_t write(uint8_t);
+    size_t write(const uint8_t *buffer, size_t size);
+    void flush();
+
+    operator bool () {
+      return connected();
+    }
+
+  private:
+    BridgeClass &bridge;
+
+    void doBuffer();
+    uint8_t inBuffered;
+    uint8_t inReadPos;
+    static const int BUFFER_SIZE = 32;
+    uint8_t *inBuffer;
+
+    bool autoFlush;
+    uint8_t outBuffered;
+    uint8_t outBufferSize;
+    uint8_t *outBuffer;
+};
+
+extern ConsoleClass Console;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/FileIO.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/FileIO.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/FileIO.cpp	(revision 136)
@@ -0,0 +1,280 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include <FileIO.h>
+
+
+
+File::File(BridgeClass &b) : mode(255), bridge(b) {
+  // Empty
+}
+
+File::File(const char *_filename, uint8_t _mode, BridgeClass &b) : mode(_mode), bridge(b) {
+  filename = _filename;
+  char modes[] = {'r', 'w', 'a'};
+  uint8_t cmd[] = {'F', modes[mode]};
+  uint8_t res[2];
+  dirPosition = 1;
+  bridge.transfer(cmd, 2, (uint8_t*)filename.c_str(), filename.length(), res, 2);
+  if (res[0] != 0) { // res[0] contains error code
+    mode = 255; // In case of error keep the file closed
+    return;
+  }
+  handle = res[1];
+  buffered = 0;
+}
+
+File::operator bool() {
+  return (mode != 255);
+}
+
+File::~File() {
+  close();
+}
+
+size_t File::write(uint8_t c) {
+  return write(&c, 1);
+}
+
+size_t File::write(const uint8_t *buf, size_t size) {
+  if (mode == 255)
+    return -1;
+  uint8_t cmd[] = {'g', handle};
+  uint8_t res[1];
+  bridge.transfer(cmd, 2, buf, size, res, 1);
+  if (res[0] != 0) // res[0] contains error code
+    return -res[0];
+  return size;
+}
+
+int File::read() {
+  doBuffer();
+  if (buffered == 0)
+    return -1; // no chars available
+  else {
+    buffered--;
+    return buffer[readPos++];
+  }
+}
+
+int File::peek() {
+  doBuffer();
+  if (buffered == 0)
+    return -1; // no chars available
+  else
+    return buffer[readPos];
+}
+
+boolean File::seek(uint32_t position) {
+  uint8_t cmd[] = {
+    's',
+    handle,
+    (position >> 24) & 0xFF,
+    (position >> 16) & 0xFF,
+    (position >> 8) & 0xFF,
+    position & 0xFF
+  };
+  uint8_t res[1];
+  bridge.transfer(cmd, 6, res, 1);
+  if (res[0] == 0) {
+    // If seek succeed then flush buffers
+    buffered = 0;
+    return true;
+  }
+  return false;
+}
+
+uint32_t File::position() {
+  uint8_t cmd[] = {'S', handle};
+  uint8_t res[5];
+  bridge.transfer(cmd, 2, res, 5);
+  //err = res[0]; // res[0] contains error code
+  uint32_t pos = res[1] << 24;
+  pos += res[2] << 16;
+  pos += res[3] << 8;
+  pos += res[4];
+  return pos - buffered;
+}
+
+void File::doBuffer() {
+  // If there are already char in buffer exit
+  if (buffered > 0)
+    return;
+
+  // Try to buffer up to BUFFER_SIZE characters
+  readPos = 0;
+  uint8_t cmd[] = {'G', handle, BUFFER_SIZE - 1};
+  buffered = bridge.transfer(cmd, 3, buffer, BUFFER_SIZE);
+  //err = buff[0]; // First byte is error code
+  if (BridgeClass::TRANSFER_TIMEOUT == buffered || 0 == buffered) {
+    // transfer failed to retrieve any data
+    buffered = 0;
+  } else {
+    // transfer retrieved at least one byte of data so skip the error code character
+    readPos++;
+    buffered--;
+  }
+}
+
+int File::available() {
+  // Look if there is new data available
+  doBuffer();
+  return buffered;
+}
+
+void File::flush() {
+}
+
+int File::read(void *buff, uint16_t nbyte) {
+  uint16_t n = 0;
+  uint8_t *p = reinterpret_cast<uint8_t *>(buff);
+  while (n < nbyte) {
+    if (buffered == 0) {
+      doBuffer();
+      if (buffered == 0)
+        break;
+    }
+    *p++ = buffer[readPos++];
+    buffered--;
+    n++;
+  }
+  return n;
+}
+
+uint32_t File::size() {
+  if (bridge.getBridgeVersion() < 101)
+	return 0;
+  uint8_t cmd[] = {'t', handle};
+  uint8_t buff[5];
+  bridge.transfer(cmd, 2, buff, 5);
+  //err = res[0]; // First byte is error code
+  uint32_t res;
+  res  = ((uint32_t)buff[1]) << 24;
+  res |= ((uint32_t)buff[2]) << 16;
+  res |= ((uint32_t)buff[3]) << 8;
+  res |= ((uint32_t)buff[4]);
+  return res;
+}
+
+void File::close() {
+  if (mode == 255)
+    return;
+  uint8_t cmd[] = {'f', handle};
+  bridge.transfer(cmd, 2);
+  mode = 255;
+}
+
+const char *File::name() {
+  return filename.c_str();
+}
+
+
+boolean File::isDirectory() {
+  uint8_t res[1];
+  uint8_t lenght;
+  uint8_t cmd[] = {'i'};
+  if (mode != 255)
+    return 0;
+
+  bridge.transfer(cmd, 1, (uint8_t *)filename.c_str(), filename.length(), res, 1);
+  return res[0];
+}
+
+
+File File::openNextFile(uint8_t mode) {
+  Process awk;
+  char tmp;
+  String command;
+  String filepath;
+  if (dirPosition == 0xFFFF) return File();
+
+  command = "ls ";
+  command += filename;
+  command += " | awk 'NR==";
+  command += dirPosition;
+  command += "'";
+
+  awk.runShellCommand(command);
+
+  while (awk.running());
+
+  command = "";
+
+  while (awk.available()) {
+    tmp = awk.read();
+    if (tmp != '\n') command += tmp;
+  }
+  if (command.length() == 0)
+    return File();
+  dirPosition++;
+  filepath = filename + "/" + command;
+  return File(filepath.c_str(), mode);
+
+}
+
+void File::rewindDirectory(void) {
+  dirPosition = 1;
+}
+
+
+
+
+
+
+boolean FileSystemClass::begin() {
+  return true;
+}
+
+File FileSystemClass::open(const char *filename, uint8_t mode) {
+  return File(filename, mode);
+}
+
+boolean FileSystemClass::exists(const char *filepath) {
+  Process ls;
+  ls.begin("ls");
+  ls.addParameter(filepath);
+  int res = ls.run();
+  return (res == 0);
+}
+
+boolean FileSystemClass::mkdir(const char *filepath) {
+  Process mk;
+  mk.begin("mkdir");
+  mk.addParameter("-p");
+  mk.addParameter(filepath);
+  int res = mk.run();
+  return (res == 0);
+}
+
+boolean FileSystemClass::remove(const char *filepath) {
+  Process rm;
+  rm.begin("rm");
+  rm.addParameter(filepath);
+  int res = rm.run();
+  return (res == 0);
+}
+
+boolean FileSystemClass::rmdir(const char *filepath) {
+  Process rm;
+  rm.begin("rmdir");
+  rm.addParameter(filepath);
+  int res = rm.run();
+  return (res == 0);
+}
+
+FileSystemClass FileSystem;
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/FileIO.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/FileIO.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/FileIO.h	(revision 136)
@@ -0,0 +1,103 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef __FILEIO_H__
+#define __FILEIO_H__
+
+#include <Process.h>
+
+#define FILE_READ 0
+#define FILE_WRITE 1
+#define FILE_APPEND 2
+
+class File : public Stream {
+
+  public:
+    File(BridgeClass &b = Bridge);
+    File(const char *_filename, uint8_t _mode, BridgeClass &b = Bridge);
+    ~File();
+
+    virtual size_t write(uint8_t);
+    virtual size_t write(const uint8_t *buf, size_t size);
+    virtual int read();
+    virtual int peek();
+    virtual int available();
+    virtual void flush();
+    int read(void *buf, uint16_t nbyte);
+    boolean seek(uint32_t pos);
+    uint32_t position();
+    uint32_t size();
+    void close();
+    operator bool();
+    const char * name();
+    boolean isDirectory();
+    File openNextFile(uint8_t mode = FILE_READ);
+    void rewindDirectory(void);
+
+    //using Print::write;
+
+  private:
+    void doBuffer();
+    uint8_t buffered;
+    uint8_t readPos;
+    uint16_t dirPosition;
+    static const int BUFFER_SIZE = 64;
+    uint8_t buffer[BUFFER_SIZE];
+
+
+  private:
+    BridgeClass &bridge;
+    String filename;
+    uint8_t mode;
+    uint8_t handle;
+
+};
+
+class FileSystemClass {
+  public:
+    FileSystemClass() : bridge(Bridge) { }
+    FileSystemClass(BridgeClass &_b) : bridge(_b) { }
+
+    boolean begin();
+
+    // Open the specified file/directory with the supplied mode (e.g. read or
+    // write, etc). Returns a File object for interacting with the file.
+    // Note that currently only one file can be open at a time.
+    File open(const char *filename, uint8_t mode = FILE_READ);
+
+    // Methods to determine if the requested file path exists.
+    boolean exists(const char *filepath);
+
+    // Create the requested directory hierarchy--if intermediate directories
+    // do not exist they will be created.
+    boolean mkdir(const char *filepath);
+
+    // Delete the file.
+    boolean remove(const char *filepath);
+
+    boolean rmdir(const char *filepath);
+
+  private:
+    friend class File;
+
+    BridgeClass &bridge;
+};
+
+extern FileSystemClass FileSystem;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/HttpClient.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/HttpClient.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/HttpClient.cpp	(revision 136)
@@ -0,0 +1,132 @@
+/*
+  Copyright (c) 2013-2014 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include "HttpClient.h"
+
+HttpClient::HttpClient() :
+  insecure(false) {
+  // Empty
+}
+
+unsigned int HttpClient::get(String &url) {
+  begin("curl");
+  if (insecure) {
+    addParameter("-k");
+  }
+  addHeader();
+  addParameter(url);
+  return run();
+}
+
+unsigned int HttpClient::get(const char *url) {
+  begin("curl");
+  if (insecure) {
+    addParameter("-k");
+  }
+  addHeader();
+  addParameter(url);
+  return run();
+}
+
+void HttpClient::getAsynchronously(String &url) {
+  begin("curl");
+  if (insecure) {
+    addParameter("-k");
+  }
+  addHeader();
+  addParameter(url);
+  runAsynchronously();
+}
+
+void HttpClient::getAsynchronously(const char *url) {
+  begin("curl");
+  if (insecure) {
+    addParameter("-k");
+  }
+  addHeader();
+  addParameter(url);
+  runAsynchronously();
+}
+
+unsigned int HttpClient::post(String &url, String &data) {
+    return post(url.c_str(), data.c_str());
+}
+
+unsigned int HttpClient::post(const char *url, const char *data) {
+  begin("curl");
+  if (insecure) {
+    addParameter("-k");
+  }
+  addParameter("--request");
+  addParameter("POST");
+  addParameter("--data");
+  addParameter(data);
+  addHeader();
+  addParameter(url);
+  return run();
+}
+
+void HttpClient::postAsynchronously(String &url, String &data) {
+  postAsynchronously(url.c_str(), data.c_str());
+}
+
+void HttpClient::postAsynchronously(const char *url, const char *data) {
+  begin("curl");
+  if (insecure) {
+    addParameter("-k");
+  }
+  addParameter("--request");
+  addParameter("POST");
+  addParameter("--data");
+  addParameter(data);
+  addHeader();
+  addParameter(url);
+  runAsynchronously();
+}
+
+boolean HttpClient::ready() {
+  return !running();
+}
+
+unsigned int HttpClient::getResult() {
+  return exitValue();
+}
+
+void HttpClient::noCheckSSL() {
+  insecure = true;
+}
+
+void HttpClient::checkSSL() {
+  insecure = false;
+}
+
+void HttpClient::setHeader(String &header) {
+  this->header = header;
+}
+
+void HttpClient::setHeader(const char * header) {
+  this->header = String(header);
+}
+
+void HttpClient::addHeader() {
+  if (header.length() > 0) {
+    addParameter("--header");
+    addParameter(header);
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/HttpClient.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/HttpClient.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/HttpClient.h	(revision 136)
@@ -0,0 +1,51 @@
+/*
+  Copyright (c) 2013-2014 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef HTTPCLIENT_H_
+#define HTTPCLIENT_H_
+
+#include <Process.h>
+
+class HttpClient : public Process {
+  public:
+    HttpClient();
+
+    unsigned int get(String &url);
+    unsigned int get(const char * url);
+    void getAsynchronously(String &url);
+    void getAsynchronously(const char * url);
+    unsigned int post(String &url, String &data);
+    unsigned int post(const char * url, const char * data);
+    void postAsynchronously(String &url, String &data);
+    void postAsynchronously(const char * url, const char * data);
+    void setHeader(String &header);
+    void setHeader(const char * header);
+    boolean ready();
+    unsigned int getResult();
+    void noCheckSSL();
+    void checkSSL();
+
+  private:
+    boolean insecure;
+
+  private:
+    void addHeader();
+    String header;
+};
+
+#endif /* HTTPCLIENT_H_ */
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Mailbox.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Mailbox.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Mailbox.cpp	(revision 136)
@@ -0,0 +1,56 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include <Mailbox.h>
+
+unsigned int MailboxClass::readMessage(uint8_t *buff, unsigned int size) {
+  uint8_t tmp[] = { 'm' };
+  return bridge.transfer(tmp, 1, buff, size);
+}
+
+void MailboxClass::readMessage(String &str, unsigned int maxLength) {
+  uint8_t tmp[] = { 'm' };
+  // XXX: Is there a better way to create the string?
+  uint8_t buff[maxLength + 1];
+  int l = bridge.transfer(tmp, 1, buff, maxLength);
+  buff[l] = 0;
+  str = (const char *)buff;
+}
+
+void MailboxClass::writeMessage(const uint8_t *buff, unsigned int size) {
+  uint8_t cmd[] = {'M'};
+  bridge.transfer(cmd, 1, buff, size, NULL, 0);
+}
+
+void MailboxClass::writeMessage(const String& str) {
+  writeMessage((uint8_t*) str.c_str(), str.length());
+}
+
+void MailboxClass::writeJSON(const String& str) {
+  uint8_t cmd[] = {'J'};
+  bridge.transfer(cmd, 1, (uint8_t*) str.c_str(), str.length(), NULL, 0);
+}
+
+unsigned int MailboxClass::messageAvailable() {
+  uint8_t tmp[] = {'n'};
+  uint8_t res[2];
+  bridge.transfer(tmp, 1, res, 2);
+  return (res[0] << 8) + res[1];
+}
+
+MailboxClass Mailbox(Bridge);
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Mailbox.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Mailbox.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Mailbox.h	(revision 136)
@@ -0,0 +1,53 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef _MAILBOX_CLASS_H_INCLUDED_
+#define _MAILBOX_CLASS_H_INCLUDED_
+
+#include <Bridge.h>
+
+class MailboxClass {
+  public:
+    MailboxClass(BridgeClass &b = Bridge) : bridge(b) { }
+
+    void begin() { }
+    void end() { }
+
+    // Receive a message and store it inside a buffer
+    unsigned int readMessage(uint8_t *buffer, unsigned int size);
+    // Receive a message and store it inside a String
+    void readMessage(String &str, unsigned int maxLength = 128);
+
+    // Send a message
+    void writeMessage(const uint8_t *buffer, unsigned int size);
+    // Send a message
+    void writeMessage(const String& str);
+    // Send a JSON message
+    void writeJSON(const String& str);
+
+    // Return the size of the next available message, 0 if there are
+    // no messages in queue.
+    unsigned int messageAvailable();
+
+  private:
+    BridgeClass &bridge;
+};
+
+extern MailboxClass Mailbox;
+
+#endif // _MAILBOX_CLASS_H_INCLUDED_
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Process.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Process.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Process.cpp	(revision 136)
@@ -0,0 +1,142 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include <Process.h>
+
+Process::~Process() {
+  close();
+}
+
+size_t Process::write(uint8_t c) {
+  uint8_t cmd[] = {'I', handle, c};
+  bridge.transfer(cmd, 3);
+  return 1;
+}
+
+void Process::flush() {
+}
+
+int Process::available() {
+  // Look if there is new data available
+  doBuffer();
+  return buffered;
+}
+
+int Process::read() {
+  doBuffer();
+  if (buffered == 0)
+    return -1; // no chars available
+  else {
+    buffered--;
+    return buffer[readPos++];
+  }
+}
+
+int Process::peek() {
+  doBuffer();
+  if (buffered == 0)
+    return -1; // no chars available
+  else
+    return buffer[readPos];
+}
+
+void Process::doBuffer() {
+  // If there are already char in buffer exit
+  if (buffered > 0)
+    return;
+
+  // Try to buffer up to 32 characters
+  readPos = 0;
+  uint8_t cmd[] = {'O', handle, sizeof(buffer)};
+  buffered = bridge.transfer(cmd, 3, buffer, sizeof(buffer));
+}
+
+void Process::begin(const String &command) {
+  close();
+  cmdline = new String(command);
+}
+
+void Process::addParameter(const String &param) {
+  *cmdline += "\xFE";
+  *cmdline += param;
+}
+
+void Process::runAsynchronously() {
+  uint8_t cmd[] = {'R'};
+  uint8_t res[2];
+  bridge.transfer(cmd, 1, (uint8_t*)cmdline->c_str(), cmdline->length(), res, 2);
+  handle = res[1];
+
+  delete cmdline;
+  cmdline = NULL;
+
+  if (res[0] == 0) // res[0] contains error code
+    started = true;
+}
+
+boolean Process::running() {
+  uint8_t cmd[] = {'r', handle};
+  uint8_t res[1];
+  bridge.transfer(cmd, 2, res, 1);
+  return (res[0] == 1);
+}
+
+unsigned int Process::exitValue() {
+  uint8_t cmd[] = {'W', handle};
+  uint8_t res[2];
+  bridge.transfer(cmd, 2, res, 2);
+  return (res[0] << 8) + res[1];
+}
+
+unsigned int Process::run() {
+  runAsynchronously();
+  while (running())
+    delay(100);
+  return exitValue();
+}
+
+void Process::close() {
+  if (started) {
+    uint8_t cmd[] = {'w', handle};
+    bridge.transfer(cmd, 2);
+  }
+  started = false;
+}
+
+unsigned int Process::runShellCommand(const String &command) {
+  runShellCommandAsynchronously(command);
+  while (running())
+    delay(100);
+  return exitValue();
+}
+
+void Process::runShellCommandAsynchronously(const String &command) {
+  begin("/bin/ash");
+  addParameter("-c");
+  addParameter(command);
+  runAsynchronously();
+}
+
+// This method is currently unused
+//static unsigned int __commandOutputAvailable(uint8_t handle) {
+//  uint8_t cmd[] = {'o', handle};
+//  uint8_t res[1];
+//  Bridge.transfer(cmd, 2, res, 1);
+//  return res[0];
+//}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Process.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Process.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/Process.h	(revision 136)
@@ -0,0 +1,71 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef PROCESS_H_
+#define PROCESS_H_
+
+#include <Bridge.h>
+
+class Process : public Stream {
+  public:
+    // Constructor with a user provided BridgeClass instance
+    Process(BridgeClass &_b = Bridge) :
+      bridge(_b), started(false), buffered(0), readPos(0) { }
+    ~Process();
+
+    void begin(const String &command);
+    void addParameter(const String &param);
+    unsigned int run();
+    void runAsynchronously();
+    boolean running();
+    unsigned int exitValue();
+    void close();
+
+    unsigned int runShellCommand(const String &command);
+    void runShellCommandAsynchronously(const String &command);
+
+    operator bool () {
+      return started;
+    }
+
+    // Stream methods
+    // (read from process stdout)
+    int available();
+    int read();
+    int peek();
+    // (write to process stdin)
+    size_t write(uint8_t);
+    void flush();
+    // TODO: add optimized function for block write
+
+  private:
+    BridgeClass &bridge;
+    unsigned int handle;
+    String *cmdline;
+    boolean started;
+
+  private:
+    void doBuffer();
+    uint8_t buffered;
+    uint8_t readPos;
+    static const int BUFFER_SIZE = 64;
+    uint8_t buffer[BUFFER_SIZE];
+
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunClient.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunClient.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunClient.cpp	(revision 136)
@@ -0,0 +1,167 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include <YunClient.h>
+
+YunClient::YunClient(int _h, BridgeClass &_b) :
+  bridge(_b), handle(_h), opened(true), buffered(0) {
+}
+
+YunClient::YunClient(BridgeClass &_b) :
+  bridge(_b), handle(0), opened(false), buffered(0) {
+}
+
+YunClient::~YunClient() {
+}
+
+YunClient& YunClient::operator=(const YunClient &_x) {
+  opened = _x.opened;
+  handle = _x.handle;
+  return *this;
+}
+
+void YunClient::stop() {
+  if (opened) {
+    uint8_t cmd[] = {'j', handle};
+    bridge.transfer(cmd, 2);
+  }
+  opened = false;
+}
+
+void YunClient::doBuffer() {
+  // If there are already char in buffer exit
+  if (buffered > 0)
+    return;
+
+  // Try to buffer up to 32 characters
+  readPos = 0;
+  uint8_t cmd[] = {'K', handle, sizeof(buffer)};
+  buffered = bridge.transfer(cmd, 3, buffer, sizeof(buffer));
+}
+
+int YunClient::available() {
+  // Look if there is new data available
+  doBuffer();
+  return buffered;
+}
+
+int YunClient::read() {
+  doBuffer();
+  if (buffered == 0)
+    return -1; // no chars available
+  else {
+    buffered--;
+    return buffer[readPos++];
+  }
+}
+
+int YunClient::read(uint8_t *buff, size_t size) {
+  int readed = 0;
+  do {
+    if (buffered == 0) {
+      doBuffer();
+      if (buffered == 0)
+        return readed;
+    }
+    buff[readed++] = buffer[readPos++];
+    buffered--;
+  } while (readed < size);
+  return readed;
+}
+
+int YunClient::peek() {
+  doBuffer();
+  if (buffered == 0)
+    return -1; // no chars available
+  else
+    return buffer[readPos];
+}
+
+size_t YunClient::write(uint8_t c) {
+  if (!opened)
+    return 0;
+  uint8_t cmd[] = {'l', handle, c};
+  bridge.transfer(cmd, 3);
+  return 1;
+}
+
+size_t YunClient::write(const uint8_t *buf, size_t size) {
+  if (!opened)
+    return 0;
+  uint8_t cmd[] = {'l', handle};
+  bridge.transfer(cmd, 2, buf, size, NULL, 0);
+  return size;
+}
+
+void YunClient::flush() {
+}
+
+uint8_t YunClient::connected() {
+  if (!opened)
+    return false;
+  uint8_t cmd[] = {'L', handle};
+  uint8_t res[1];
+  bridge.transfer(cmd, 2, res, 1);
+  return (res[0] == 1);
+}
+
+int YunClient::connect(IPAddress ip, uint16_t port) {
+  String address;
+  address.reserve(18);
+  address += ip[0];
+  address += '.';
+  address += ip[1];
+  address += '.';
+  address += ip[2];
+  address += '.';
+  address += ip[3];
+  return connect(address.c_str(), port);
+}
+
+int YunClient::connect(const char *host, uint16_t port) {
+  uint8_t tmp[] = {
+    'C',
+    (port >> 8) & 0xFF,
+    port & 0xFF
+  };
+  uint8_t res[1];
+  int l = bridge.transfer(tmp, 3, (const uint8_t *)host, strlen(host), res, 1);
+  if (l == 0)
+    return 0;
+  handle = res[0];
+
+  // wait for connection
+  uint8_t tmp2[] = { 'c', handle };
+  uint8_t res2[1];
+  while (true) {
+    bridge.transfer(tmp2, 2, res2, 1);
+    if (res2[0] == 0)
+      break;
+    delay(1);
+  }
+  opened = true;
+
+  // check for successful connection
+  if (connected())
+    return 1;
+
+  stop();
+  handle = 0;
+  return 0;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunClient.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunClient.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunClient.h	(revision 136)
@@ -0,0 +1,70 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef _YUN_CLIENT_H_
+#define _YUN_CLIENT_H_
+
+#include <Bridge.h>
+#include <Client.h>
+
+class YunClient : public Client {
+  public:
+    // Constructor with a user provided BridgeClass instance
+    YunClient(int _h, BridgeClass &_b = Bridge);
+    YunClient(BridgeClass &_b = Bridge);
+    ~YunClient();
+
+    // Stream methods
+    // (read message)
+    virtual int available();
+    virtual int read();
+    virtual int read(uint8_t *buf, size_t size);
+    virtual int peek();
+    // (write response)
+    virtual size_t write(uint8_t);
+    virtual size_t write(const uint8_t *buf, size_t size);
+    virtual void flush();
+    // TODO: add optimized function for block write
+
+    virtual operator bool () {
+      return opened;
+    }
+
+    YunClient& operator=(const YunClient &_x);
+
+    virtual void stop();
+    virtual uint8_t connected();
+
+    virtual int connect(IPAddress ip, uint16_t port);
+    virtual int connect(const char *host, uint16_t port);
+
+  private:
+    BridgeClass &bridge;
+    unsigned int handle;
+    boolean opened;
+
+  private:
+    void doBuffer();
+    uint8_t buffered;
+    uint8_t readPos;
+    static const int BUFFER_SIZE = 64;
+    uint8_t buffer[BUFFER_SIZE];
+
+};
+
+#endif // _YUN_CLIENT_H_
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunServer.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunServer.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunServer.cpp	(revision 136)
@@ -0,0 +1,54 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include <YunServer.h>
+#include <YunClient.h>
+
+YunServer::YunServer(uint16_t _p, BridgeClass &_b) :
+  bridge(_b), port(_p), listening(false), useLocalhost(false) {
+}
+
+void YunServer::begin() {
+  uint8_t tmp[] = {
+    'N',
+    (port >> 8) & 0xFF,
+    port & 0xFF
+  };
+  uint8_t res[1];
+  String address = F("127.0.0.1");
+  if (!useLocalhost)
+    address = F("0.0.0.0");
+  bridge.transfer(tmp, 3, (const uint8_t *)address.c_str(), address.length(), res, 1);
+  listening = (res[0] == 1);
+}
+
+YunClient YunServer::accept() {
+  uint8_t cmd[] = {'k'};
+  uint8_t res[1];
+  unsigned int l = bridge.transfer(cmd, 1, res, 1);
+  if (l == 0)
+    return YunClient();
+  return YunClient(res[0]);
+}
+
+size_t YunServer::write(uint8_t c) {
+  uint8_t cmd[] = { 'b', c };
+  bridge.transfer(cmd, 2);
+  return 1;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunServer.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunServer.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Bridge/src/YunServer.h	(revision 136)
@@ -0,0 +1,51 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef _YUN_SERVER_H_
+#define _YUN_SERVER_H_
+
+#include <Bridge.h>
+#include <Server.h>
+
+class YunClient;
+
+class YunServer : public Server {
+  public:
+    // Constructor with a user provided BridgeClass instance
+    YunServer(uint16_t port = 5555, BridgeClass &_b = Bridge);
+
+    void begin();
+    YunClient accept();
+
+    virtual size_t write(uint8_t c);
+
+    void listenOnLocalhost()   {
+      useLocalhost = true;
+    }
+    void noListenOnLocalhost() {
+      useLocalhost = false;
+    }
+
+  private:
+    uint16_t port;
+    bool listening;
+    bool useLocalhost;
+    BridgeClass &bridge;
+};
+
+#endif // _YUN_SERVER_H_
Index: rtos_arduino/trunk/arduino_lib/libraries/Ciao/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ciao/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ciao/README.adoc	(revision 136)
@@ -0,0 +1,26 @@
+= Ciao Library for Arduino =
+
+The Ciao Library allows you to send and receive data outside the microcontroller, 
+through a serial communication, in a simple and intuitive way.
+
+For more information about this library please visit us at:
+
+http://labs.arduino.org/Ciao
+
+== License ==
+
+Copyright (c) Arduino srl. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Ciao/examples/CiaoArduinoXMPP/CiaoArduinoXMPP.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ciao/examples/CiaoArduinoXMPP/CiaoArduinoXMPP.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ciao/examples/CiaoArduinoXMPP/CiaoArduinoXMPP.ino	(revision 136)
@@ -0,0 +1,43 @@
+/*
+  Arduino Ciao example
+  
+ This sketch uses ciao xmpp connector. It sends back âhello worldâ message to the xmpp client when receives âciaoâ from it. 
+  
+ Be sure to set the xmpp client in the "USER" field used to receive the response by MCU.
+
+ Possible commands to send from the xmpp client:
+ * "ciao"               -> random answers in 5 different languages
+ 
+ created September 2015
+ by andrea[at]arduino[dot]org
+ 
+ 
+  NOTE: be sure to activate and configure xmpp connector on Linino OS
+       http://labs.arduino.org/Ciao
+   
+ */
+ 
+#include <Ciao.h>
+
+String USER="user@domain";
+String mess[5]={"Hi, I am MCU :-P","hallo , ik ben MCU :-P","bonjour, je suis MCU :-P","Ciao, io sono MCU :-P","Kon'nichiwa, watashi wa MCU yo :-P" };
+
+void setup() {
+  Ciao.begin(); 
+}
+
+void loop() {
+    
+  CiaoData data = Ciao.read("xmpp");  
+  
+  if(!data.isEmpty()){
+    String id = data.get(0);
+    String sender = data.get(1);
+    String message = data.get(2);
+    
+    message.toLowerCase();
+    if(message == "ciao" )
+      Ciao.write("xmpp", USER,mess[random(0,5)]);
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ciao/examples/CiaoBluemixMQTT/CiaoBluemixMQTT.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ciao/examples/CiaoBluemixMQTT/CiaoBluemixMQTT.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ciao/examples/CiaoBluemixMQTT/CiaoBluemixMQTT.ino	(revision 136)
@@ -0,0 +1,46 @@
+/*
+  Arduino Ciao example
+  
+ This sketch uses Ciao mqtt connector. Sketch sends via MQTT brightness and temperature information that will be shown graphically in the blueMix IBM system.
+ Upload your sketch an than connect to the webpage:  
+ https://quickstart.internetofthings.ibmcloud.com/#/device/BlueMixTest902345/sensor/
+ 
+  NOTE: be sure to activate and configure mqtt connector on Linino OS.
+       http://labs.arduino.org/Ciao
+
+ created September 2015
+ by andrea[at]arduino[dot]org
+   
+ */
+
+#include <Ciao.h>
+
+int ctrl=0;
+void setup()
+{
+  Ciao.begin();  //Start the serial connection with the computer
+                       //to view the result open the serial monitor 
+  pinMode(9,OUTPUT);
+}
+ 
+void loop()                     // run over and over again
+{
+   //getting the voltage reading from the temperature sensor
+   int readingTemp = analogRead(A0);   
+   // converting readingTemp to voltage
+   float voltage = readingTemp * 4.56;
+   voltage /= 1024; 
+   // now print out the temperature
+   float temperatureC = (voltage - 0.5) * 100 ; 
+   int readingLum = analogRead(A2);
+
+   analogWrite(9,map(readingLum,0,1023,0,255)); 
+   
+   if (ctrl>=10){
+     Ciao.write("mqtt","iot-2/evt/status/fmt/json","{\"d\": {\"temperature\":"+String(temperatureC)+",\"luminosity\":"+String(readingLum)+"}}");
+     ctrl=0;
+   }
+   ctrl++;
+   delay(100);
+ 
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Ciao/examples/CiaoCommandXMPP/CiaoCommandXMPP.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ciao/examples/CiaoCommandXMPP/CiaoCommandXMPP.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ciao/examples/CiaoCommandXMPP/CiaoCommandXMPP.ino	(revision 136)
@@ -0,0 +1,152 @@
+/*
+
+ This sketch uses the xmpp connector to receive command for the MCU from a xmpp client.
+
+ Possible commands to send from the xmpp client:
+
+ * "digital/PIN"        -> to read a digital PIN
+ * "digital/PIN/VALUE"  -> to write a digital PIN (VALUE: 1/0)
+ * "analog/PIN/VALUE"   -> to write in a PWM PIN(VALUE range: 0 - 255);
+ * "analog/PIN"         -> to read a analog PIN
+ * "servo/PIN/VALUE"	-> to write angle in a SERVO PIN(VALUE range: 0 - 180);
+ * "mode/PIN/VALUE"     -> to set the PIN mode (VALUE: input / output)
+ * "led on"             -> turn on led 13
+ * "led off"            -> turn off led 13
+ * "ciao"               -> random answers in 5 different languages
+ 
+ NOTE: be sure to activate and configure xmpp connector on Linino OS
+       http://labs.arduino.org/Ciao
+   
+ created September 2015
+ by andrea[at]arduino[dot]org
+ 
+ */
+ 
+#include <Ciao.h>
+#include <Servo.h>
+
+Servo servo;
+
+void setup() {
+
+  Ciao.begin();
+}
+
+void loop() {
+
+  CiaoData data = Ciao.read("xmpp");   
+  if(!data.isEmpty()){  
+    String id = data.get(0);
+    String sender = data.get(1);
+    String message = data.get(2);
+    
+    message.toUpperCase();
+    
+    if(message == "LED ON"){
+      digitalWrite(13,HIGH);
+      Ciao.writeResponse("xmpp",id,"Led D13 ON");
+    }
+    
+    else if(message == "LED OFF"){
+      digitalWrite(13,LOW);
+      Ciao.writeResponse("xmpp",id,"Led D13 OFF");     
+    }       
+    else{
+      String command[3];
+          
+      splitString(message,"/",command,3);
+      execute(command,id);
+    }
+  }
+}
+
+void execute(String cmd[], String id) {
+
+  if (cmd[0] == "DIGITAL") {
+    digitalCommand(cmd,id);
+  }
+  else if (cmd[0] == "ANALOG") {
+    analogCommand(cmd,id);
+  }
+  else if (cmd[0] == "SERVO") {
+    servoCommand(cmd,id);
+  }
+  else if (cmd[0] == "MODE") {
+    setMode(cmd,id);
+  }
+  else
+    Ciao.writeResponse("xmpp",id,"sorry, i don't understand :(");
+}
+
+void servoCommand(String cmd[], String id){
+   int pin, value;
+  
+  pin = (cmd[1]).toInt();
+  
+  if (cmd[2] != "-1") {
+    value = (cmd[2]).toInt();
+    if(value <= 180 && value >=0){
+      servo.attach(pin);
+      servo.write(value);
+      Ciao.writeResponse("xmpp",id,"Servo D"+String(pin)+" set to "+String(value)+" degrees");
+    }
+    else
+      Ciao.writeResponse("xmpp",id,"Invalid angle value");
+  }
+  else
+    Ciao.writeResponse("xmpp",id,"Invalid command");  
+}
+
+void digitalCommand(String cmd[], String id) {
+  int pin, value;
+  
+  pin = (cmd[1]).toInt();
+  
+  if (cmd[2] != "-1") {
+    value = (cmd[2]).toInt();
+    digitalWrite(pin, value);
+    if (value == 1)
+      Ciao.writeResponse("xmpp",id,"Pin D"+String(pin)+" ON");
+    else if(value == 0)
+      Ciao.writeResponse("xmpp",id,"Pin D"+String(pin)+" OFF");   
+  }
+  else if (cmd[2] == "-1") {
+    value = digitalRead(pin);
+    Ciao.writeResponse("xmpp",id,"D"+String(pin)+" value = "+String(value));
+  }
+}
+
+void analogCommand(String cmd[], String id) {
+  int pin, value;
+
+  pin = (cmd[1]).toInt();
+  
+  if (cmd[2] != "-1") {
+    value =(cmd[2]).toInt();
+    analogWrite(pin, value);
+    Ciao.writeResponse("xmpp",id,"D"+String(pin)+" set to analog");
+  }
+  else if (cmd[2] == "-1") {
+    value = analogRead(pin);
+    Ciao.writeResponse("xmpp",id,"A"+String(pin)+" value = "+String(value));
+  }
+}
+
+void setMode(String cmd[], String id) {
+  int pin;
+
+  pin = (cmd[1]).toInt();
+  
+  if (cmd[2] == "INPUT") {
+    pinMode(pin, INPUT);
+    Ciao.writeResponse("xmpp",id," pin D"+String(pin)+" set in INPUT mode");
+    return;
+  }
+
+  if (cmd[2] == "OUTPUT") {
+    pinMode(pin, OUTPUT);
+    Ciao.writeResponse("xmpp",id," pin D"+String(pin)+" set in OUTPUT mode");
+    return;
+  }
+  Ciao.writeResponse("xmpp",id,"invalid mode");
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Ciao/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ciao/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ciao/keywords.txt	(revision 136)
@@ -0,0 +1,23 @@
+#######################################
+# Syntax Coloring Map For Bridge
+#######################################
+
+#######################################
+# Class (KEYWORD3)
+#######################################
+
+Ciao	KEYWORD3
+CiaoData	KEYWORD3
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+# methods names in commond
+begin	KEYWORD2
+writeResponse	KEYWORD2
+available	KEYWORD2
+read	KEYWORD2
+write	KEYWORD2
+bool	KEYWORD2
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ciao/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ciao/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ciao/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Ciao
+version=1.0
+author=Arduino srl
+maintainer=Arduino srl<info@arduino.org>
+sentence=Enables the communication between the Linux processor and the AVR. For Arduino Y炭n, Y炭n Mini and Linino One.
+paragraph=
+category=Communication
+url=http://labs.arduino.org/Ciao
+architectures=*
Index: rtos_arduino/trunk/arduino_lib/libraries/Ciao/src/Ciao.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ciao/src/Ciao.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ciao/src/Ciao.cpp	(revision 136)
@@ -0,0 +1,163 @@
+/*
+****************************************************************************
+* Copyright (c) 2015 Arduino srl. All right reserved.
+*
+* File : Ciao.cpp
+* Date : 2015/09/17
+* Revision : 0.0.1 $
+* Author: andrea[at]arduino[dot]org
+*
+****************************************************************************
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include "Ciao.h"
+
+CiaoClass::CiaoClass(Stream &_stream) :
+  stream(_stream), started(false) {
+  // Empty
+}
+
+void CiaoClass::begin() {
+	
+	String start;
+	String stop;
+
+  // Wait for U-boot to finish startup
+	do {
+		dropAll();
+		delay(1000);
+	}while (stream.available() > 0);
+
+	stream.println("ciao;r;status");					//check the bridge python status	
+	String status = stream.readStringUntil(END_TX_CHAR);
+	if(status == "1;running"){						
+		do{												//kill a istance of the bridge.py
+			stream.println("ciao;w;quit");
+			stop = stream.readStringUntil(END_TX_CHAR);
+			delay(3000);
+		}while(stop != "1;done");
+    }
+	do{ 
+		stream.print(F("run-ciao\n"));				//start bridge python
+		stream.readStringUntil(END_TX_CHAR);
+		delay(3000);
+		stream.println("ciao;r;status");				//check if bridge python is running
+		start = stream.readStringUntil(END_TX_CHAR);
+	}while (start != "1;running");
+}
+
+CiaoData CiaoClass::read( String connector) {
+	
+	CiaoData data;
+	stream.println(connector + ";r");					// send read request 
+	String message = stream.readStringUntil(END_TX_CHAR);
+	data = parse(message, ";");
+	return data;
+}
+
+void CiaoClass::write(String connector, String param1, String param2 , String param3 ) {
+
+	CiaoData data;
+	if (param1 != ""){
+		stream.print(connector+";w;");
+		stream.print(param1);
+	}
+	if (param2 != ""){
+		stream.print(DATA_SPLIT_CHAR);
+		stream.print(param2);
+	}
+	if (param3 != ""){
+		stream.print(DATA_SPLIT_CHAR);
+		stream.print(param3);
+	}
+	stream.println();
+	String mess_receive = stream.readStringUntil(END_TX_CHAR);
+	data = parse(mess_receive, ";");
+	
+}
+
+void CiaoClass::writeResponse( String connector, String id, String param1, String param2 , String param3) {
+
+	CiaoData data;
+	if(id.length()> ID_SIZE_TX){
+		if (param1 != ""){
+			stream.print(connector+";wr;");
+			stream.print(id+";");
+			stream.print(param1);
+		}
+		if (param2 != ""){
+			stream.print(DATA_SPLIT_CHAR);
+			stream.print(param2);
+		}
+		if (param3 != ""){
+			stream.print(DATA_SPLIT_CHAR);
+			stream.print(param3);
+		}
+		stream.println();
+		String mess_receive = stream.readStringUntil(END_TX_CHAR);
+		data = parse(mess_receive, ";");
+	}
+}
+
+CiaoData CiaoClass::parse(String message, String split){
+	String status;
+	CiaoData data;
+	int statusIndex = message.indexOf(split);
+	int messIndex = message.indexOf(split, statusIndex+1);
+	status = message.substring(0, statusIndex);				//message status (0: no message; 1:data ready; -1:error)
+
+	if(status == ID_READY && message.substring(statusIndex+1, messIndex) != "done"){
+		data.msg_split[0]=message.substring(statusIndex+1, messIndex);
+		data.parseMessage(message.substring(messIndex+1));	//parsing data received
+	}
+	else{
+		data.msg_split[0] = status;
+		data.msg_split[2] = message.substring(statusIndex+1, messIndex);
+	}
+	return data;
+}
+
+void CiaoClass::dropAll() {
+  while (stream.available() > 0) {
+    stream.read();
+  }
+}
+
+//fuction to split command (ex: digital/13/1)
+void splitString(String command, String split, String msg[], int size){		
+	  
+	for(int a=0;a< size ;a++)		//initialize array element to -1
+		msg[a]= ID_ERROR;
+	char buf[command.length()+1];
+	command.toCharArray(buf, command.length()+1);
+	char* array;
+	const char splt[1]= {split.charAt(0)};
+	int i=0;
+	array = strtok (buf,splt);
+	while (array != NULL){  
+		msg[i]=String(array);
+		array = strtok (NULL, splt);
+		i++; 
+	}
+}
+
+// Ciao instance
+#ifdef __AVR_ATmega32U4__
+// Leonardo variants (where HardwareSerial is Serial1)
+SerialCiaoClass Ciao(Serial1);
+#else
+SerialCiaoClass Ciao(Serial);
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ciao/src/Ciao.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ciao/src/Ciao.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ciao/src/Ciao.h	(revision 136)
@@ -0,0 +1,69 @@
+/*
+****************************************************************************
+* Copyright (c) 2015 Arduino srl. All right reserved.
+*
+* File : Ciao.h
+* Date : 2015/09/17
+* Revision : 0.0.1 $
+* Author: andrea[at]arduino[dot]org
+*
+****************************************************************************
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef BRIDGE_H_
+#define BRIDGE_H_
+
+#include <Arduino.h>
+#include <CiaoData.h>
+#include <Stream.h>
+
+class CiaoClass {
+	public:
+		CiaoClass(Stream &_stream);
+		void begin();
+		CiaoData read(String);
+		void write( String protocol, String param1, String param2 = "", String param3 = "");
+		void writeResponse( String protocol, String id, String param1="", String param2 = "", String param3 = "");
+		CiaoData parse(String, String);
+
+	private:
+		void dropAll();
+		Stream &stream;
+		bool started;
+};
+
+// This subclass uses a serial port Stream
+class SerialCiaoClass : public CiaoClass {
+	public:
+		SerialCiaoClass(HardwareSerial &_serial)
+			: CiaoClass(_serial), serial(_serial) {
+			// Empty
+		}
+		void begin( unsigned long baudrate = 250000) {
+			serial.begin(baudrate);
+			CiaoClass::begin();
+		}
+
+	private:
+		HardwareSerial &serial;
+};
+
+void splitString(String, String, String[], int size);
+
+extern SerialCiaoClass Ciao;
+
+#endif /* BRIDGE_H_ */
Index: rtos_arduino/trunk/arduino_lib/libraries/Ciao/src/CiaoData.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ciao/src/CiaoData.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ciao/src/CiaoData.h	(revision 136)
@@ -0,0 +1,68 @@
+/*
+****************************************************************************
+* Copyright (c) 2015 Arduino srl. All right reserved.
+*
+* File : CiaoData.h
+* Date : 2015/09/17
+* Revision : 0.0.1 $
+* Author: andrea[at]arduino[dot]org
+*
+****************************************************************************
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include <Arduino.h>
+
+#define ID_ERROR		String(-1)
+#define ID_EMPTY		String(0)
+#define ID_READY		String(1)
+#define END_TX_CHAR		(char)4
+#define DATA_SPLIT_CHAR	(char)30
+#define ID_SIZE_TX		25
+
+class CiaoData {
+	public:
+		
+		String get(int index){
+			return msg_split[index];
+		}
+		
+		void parseMessage(String command){
+			int statusIndex = command.indexOf(DATA_SPLIT_CHAR);
+			msg_split[1] = command.substring(0, statusIndex);
+			msg_split[2] = command.substring(statusIndex+1);
+		}
+  
+		bool isError(){		//check for an error in data received
+			if(get(0) == ID_ERROR)
+				return true;
+			else
+				return false;			
+		}
+		
+		bool isEmpty(){		//check if data received is empty
+			if(get(0) == ID_EMPTY)
+				return true;
+			else
+				return false;	
+		}
+		
+	public:
+		String msg_split[3];
+		
+};
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/ESP8266.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/ESP8266.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/ESP8266.cpp	(revision 136)
@@ -0,0 +1,769 @@
+/**
+ * @file ESP8266.cpp
+ * @brief The implementation of class ESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.02
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "ESP8266.h"
+
+#define LOG_OUTPUT_DEBUG            (1)
+#define LOG_OUTPUT_DEBUG_PREFIX     (1)
+
+#define logDebug(arg)\
+    do {\
+        if (LOG_OUTPUT_DEBUG)\
+        {\
+            if (LOG_OUTPUT_DEBUG_PREFIX)\
+            {\
+                Serial.print("[LOG Debug: ");\
+                Serial.print((const char*)__FILE__);\
+                Serial.print(",");\
+                Serial.print((unsigned int)__LINE__);\
+                Serial.print(",");\
+                Serial.print((const char*)__FUNCTION__);\
+                Serial.print("] ");\
+            }\
+            Serial.print(arg);\
+        }\
+    } while(0)
+
+#ifdef ESP8266_USE_SOFTWARE_SERIAL
+ESP8266::begin(SoftwareSerial &uart, uint32_t baud)
+{
+    m_puart = &uart;
+    m_baud = baud;
+    m_puart->begin(baud);
+    rx_empty();            
+}
+#else
+void ESP8266::begin(HardwareSerial &uart, uint32_t baud)
+{
+    m_puart = &uart;
+    m_baud = baud;
+    m_puart->begin(baud);
+    rx_empty();        
+}
+#endif
+
+bool ESP8266::kick(void)
+{
+    return eAT();
+}
+
+bool ESP8266::restart(void)
+{
+    unsigned long start;
+    if (eATRST()) {
+        m_puart->end();
+        delay(2000);
+        m_puart->begin(m_baud);
+        start = millis();
+        while (millis() - start < 3000) {
+            if (eAT()) {
+                delay(1500); /* Waiting for stable */
+                return true;
+            }
+            delay(100);
+        }
+    }
+    return false;
+}
+
+String ESP8266::getVersion(void)
+{
+    String version;
+    eATGMR(version);
+    return version;
+}
+
+bool ESP8266::setOprToStation(void)
+{
+    uint8_t mode;
+    if (!qATCWMODE(&mode)) {
+        return false;
+    }
+    if (mode == 1) {
+        return true;
+    } else {
+        if (sATCWMODE(1) && restart()) {
+            return true;
+        } else {
+            return false;
+        }
+    }
+}
+
+bool ESP8266::setOprToSoftAP(void)
+{
+    uint8_t mode;
+    if (!qATCWMODE(&mode)) {
+        return false;
+    }
+    if (mode == 2) {
+        return true;
+    } else {
+        if (sATCWMODE(2) && restart()) {
+            return true;
+        } else {
+            return false;
+        }
+    }
+}
+
+bool ESP8266::setOprToStationSoftAP(void)
+{
+    uint8_t mode;
+    if (!qATCWMODE(&mode)) {
+        return false;
+    }
+    if (mode == 3) {
+        return true;
+    } else {
+        if (sATCWMODE(3) && restart()) {
+            return true;
+        } else {
+            return false;
+        }
+    }
+}
+
+String ESP8266::getAPList(void)
+{
+    String list;
+    eATCWLAP(list);
+    return list;
+}
+
+bool ESP8266::joinAP(String ssid, String pwd)
+{
+    return sATCWJAP(ssid, pwd);
+}
+
+bool ESP8266::leaveAP(void)
+{
+    return eATCWQAP();
+}
+
+bool ESP8266::setSoftAPParam(String ssid, String pwd, uint8_t chl, uint8_t ecn)
+{
+    return sATCWSAP(ssid, pwd, chl, ecn);
+}
+
+String ESP8266::getJoinedDeviceIP(void)
+{
+    String list;
+    eATCWLIF(list);
+    return list;
+}
+
+String ESP8266::getIPStatus(void)
+{
+    String list;
+    eATCIPSTATUS(list);
+    return list;
+}
+
+String ESP8266::getLocalIP(void)
+{
+    String list;
+    eATCIFSR(list);
+    return list;
+}
+
+bool ESP8266::enableMUX(void)
+{
+    return sATCIPMUX(1);
+}
+
+bool ESP8266::disableMUX(void)
+{
+    return sATCIPMUX(0);
+}
+
+bool ESP8266::createTCP(String addr, uint32_t port)
+{
+    return sATCIPSTARTSingle("TCP", addr, port);
+}
+
+bool ESP8266::releaseTCP(void)
+{
+    return eATCIPCLOSESingle();
+}
+
+bool ESP8266::registerUDP(String addr, uint32_t port)
+{
+    return sATCIPSTARTSingle("UDP", addr, port);
+}
+
+bool ESP8266::unregisterUDP(void)
+{
+    return eATCIPCLOSESingle();
+}
+
+bool ESP8266::createTCP(uint8_t mux_id, String addr, uint32_t port)
+{
+    return sATCIPSTARTMultiple(mux_id, "TCP", addr, port);
+}
+
+bool ESP8266::releaseTCP(uint8_t mux_id)
+{
+    return sATCIPCLOSEMulitple(mux_id);
+}
+
+bool ESP8266::registerUDP(uint8_t mux_id, String addr, uint32_t port)
+{
+    return sATCIPSTARTMultiple(mux_id, "UDP", addr, port);
+}
+
+bool ESP8266::unregisterUDP(uint8_t mux_id)
+{
+    return sATCIPCLOSEMulitple(mux_id);
+}
+
+bool ESP8266::setTCPServerTimeout(uint32_t timeout)
+{
+    return sATCIPSTO(timeout);
+}
+
+bool ESP8266::startTCPServer(uint32_t port)
+{
+    if (sATCIPSERVER(1, port)) {
+        return true;
+    }
+    return false;
+}
+
+bool ESP8266::stopTCPServer(void)
+{
+    sATCIPSERVER(0);
+    restart();
+    return false;
+}
+
+bool ESP8266::startServer(uint32_t port)
+{
+    return startTCPServer(port);
+}
+
+bool ESP8266::stopServer(void)
+{
+    return stopTCPServer();
+}
+
+bool ESP8266::send(const uint8_t *buffer, uint32_t len)
+{
+    return sATCIPSENDSingle(buffer, len);
+}
+
+bool ESP8266::send(uint8_t mux_id, const uint8_t *buffer, uint32_t len)
+{
+    return sATCIPSENDMultiple(mux_id, buffer, len);
+}
+
+bool ESP8266::send(String &str)
+{
+    return sATCIPSENDSingle(str);
+}
+
+bool ESP8266::send(uint8_t mux_id, String &str)
+{
+    return sATCIPSENDMultiple(mux_id, str);
+}
+
+uint32_t ESP8266::recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout)
+{
+    return recvPkg(buffer, buffer_size, NULL, timeout, NULL);
+}
+
+uint32_t ESP8266::recv(uint8_t mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout)
+{
+    uint8_t id;
+    uint32_t ret;
+    ret = recvPkg(buffer, buffer_size, NULL, timeout, &id);
+    if (ret > 0 && id == mux_id) {
+        return ret;
+    }
+    return 0;
+}
+
+uint32_t ESP8266::recv(uint8_t *coming_mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout)
+{
+    return recvPkg(buffer, buffer_size, NULL, timeout, coming_mux_id);
+}
+
+/*----------------------------------------------------------------------------*/
+/* +IPD,<id>,<len>:<data> */
+/* +IPD,<len>:<data> */
+
+uint32_t ESP8266::recvPkg(uint8_t *buffer, uint32_t buffer_size, uint32_t *data_len, uint32_t timeout, uint8_t *coming_mux_id)
+{
+    String data;
+    char a;
+    int32_t index_PIPDcomma = -1;
+    int32_t index_colon = -1; /* : */
+    int32_t index_comma = -1; /* , */
+    int32_t len = -1;
+    int8_t id = -1;
+    bool has_data = false;
+    uint32_t ret;
+    unsigned long start;
+    uint32_t i;
+    
+    if (buffer == NULL) {
+        return 0;
+    }
+    
+    start = millis();
+    while (millis() - start < timeout) {
+        if(m_puart->available() > 0) {
+            a = m_puart->read();
+            data += a;
+        }else{
+            delay(1);
+        }
+        
+        index_PIPDcomma = data.indexOf("+IPD,");
+        if (index_PIPDcomma != -1) {
+            index_colon = data.indexOf(':', index_PIPDcomma + 5);
+            if (index_colon != -1) {
+                index_comma = data.indexOf(',', index_PIPDcomma + 5);
+                /* +IPD,id,len:data */
+                if (index_comma != -1 && index_comma < index_colon) { 
+                    id = data.substring(index_PIPDcomma + 5, index_comma).toInt();
+                    if (id < 0 || id > 4) {
+                        return 0;
+                    }
+                    len = data.substring(index_comma + 1, index_colon).toInt();
+                    if (len <= 0) {
+                        return 0;
+                    }
+                } else { /* +IPD,len:data */
+                    len = data.substring(index_PIPDcomma + 5, index_colon).toInt();
+                    if (len <= 0) {
+                        return 0;
+                    }
+                }
+                has_data = true;
+                break;
+            }
+        }
+    }
+    
+    if (has_data) {
+        i = 0;
+        ret = len > buffer_size ? buffer_size : len;
+        start = millis();
+        while (millis() - start < 3000) {
+            while(m_puart->available() > 0 && i < ret) {
+                a = m_puart->read();
+                buffer[i++] = a;
+            }
+            if (i == ret) {
+                rx_empty();
+                if (data_len) {
+                    *data_len = len;    
+                }
+                if (index_comma != -1 && coming_mux_id) {
+                    *coming_mux_id = id;
+                }
+                return ret;
+            }
+            delay(1);
+        }
+    }
+    return 0;
+}
+
+void ESP8266::rx_empty(void) 
+{
+    while(m_puart->available() > 0) {
+        m_puart->read();
+    }
+}
+
+String ESP8266::recvString(String target, uint32_t timeout)
+{
+    String data;
+    char a;
+    unsigned long start = millis();
+    while (millis() - start < timeout) {
+        while(m_puart->available() > 0) {
+            a = m_puart->read();
+            if(a == '\0') continue;
+            data += a;
+        }
+        if (data.indexOf(target) != -1) {
+            break;
+        }
+        delay(1);
+    }
+    return data;
+}
+
+String ESP8266::recvString(String target1, String target2, uint32_t timeout)
+{
+    String data;
+    char a;
+    unsigned long start = millis();
+    while (millis() - start < timeout) {
+        while(m_puart->available() > 0) {
+            a = m_puart->read();
+			if(a == '\0') continue;
+            data += a;
+        }
+        if (data.indexOf(target1) != -1) {
+            break;
+        } else if (data.indexOf(target2) != -1) {
+            break;
+        }
+        delay(1);
+    }
+    return data;
+}
+
+String ESP8266::recvString(String target1, String target2, String target3, uint32_t timeout)
+{
+    String data;
+    char a;
+    unsigned long start = millis();
+    while (millis() - start < timeout) {
+        while(m_puart->available() > 0) {
+            a = m_puart->read();
+            if(a == '\0') continue;
+            data += a;
+        }
+        if (data.indexOf(target1) != -1) {
+            break;
+        } else if (data.indexOf(target2) != -1) {
+            break;
+        } else if (data.indexOf(target3) != -1) {
+            break;
+        }
+        delay(1);
+    }
+    return data;
+}
+
+bool ESP8266::recvFind(String target, uint32_t timeout)
+{
+    String data_tmp;
+    data_tmp = recvString(target, timeout);
+    if (data_tmp.indexOf(target) != -1) {
+        return true;
+    }
+    return false;
+}
+
+bool ESP8266::recvFindAndFilter(String target, String begin, String end, String &data, uint32_t timeout)
+{
+    String data_tmp;
+    data_tmp = recvString(target, timeout);
+    if (data_tmp.indexOf(target) != -1) {
+        int32_t index1 = data_tmp.indexOf(begin);
+        int32_t index2 = data_tmp.indexOf(end);
+        if (index1 != -1 && index2 != -1) {
+            index1 += begin.length();
+            data = data_tmp.substring(index1, index2);
+            return true;
+        }
+    }
+    data = "";
+    return false;
+}
+
+bool ESP8266::eAT(void)
+{
+    rx_empty();
+    m_puart->println("AT");
+    return recvFind("OK");
+}
+
+bool ESP8266::eATRST(void) 
+{
+    rx_empty();
+    m_puart->println("AT+RST");
+    return recvFind("OK");
+}
+
+bool ESP8266::eATGMR(String &version)
+{
+    rx_empty();
+    m_puart->println("AT+GMR");
+    return recvFindAndFilter("OK", "\r\r\n", "\r\nOK", version); 
+}
+
+bool ESP8266::qATCWMODE(uint8_t *mode) 
+{
+    String str_mode;
+    bool ret;
+    if (!mode) {
+        return false;
+    }
+    rx_empty();
+    m_puart->println("AT+CWMODE?");
+    ret = recvFindAndFilter("OK", "+CWMODE:", "\r\n\r\nOK", str_mode); 
+    if (ret) {
+        *mode = (uint8_t)str_mode.toInt();
+        return true;
+    } else {
+        return false;
+    }
+}
+
+bool ESP8266::sATCWMODE(uint8_t mode)
+{
+    String data;
+    rx_empty();
+    m_puart->print("AT+CWMODE=");
+    m_puart->println(mode);
+    
+    data = recvString("OK", "no change");
+    if (data.indexOf("OK") != -1 || data.indexOf("no change") != -1) {
+        return true;
+    }
+    return false;
+}
+
+bool ESP8266::sATCWJAP(String ssid, String pwd)
+{
+    String data;
+    rx_empty();
+    m_puart->print("AT+CWJAP=\"");
+    m_puart->print(ssid);
+    m_puart->print("\",\"");
+    m_puart->print(pwd);
+    m_puart->println("\"");
+    
+    data = recvString("OK", "FAIL", 10000);
+    if (data.indexOf("OK") != -1) {
+        return true;
+    }
+    return false;
+}
+
+bool ESP8266::eATCWLAP(String &list)
+{
+    String data;
+    rx_empty();
+    m_puart->println("AT+CWLAP");
+    return recvFindAndFilter("OK", "\r\r\n", "\r\n\r\nOK", list, 10000);
+}
+
+bool ESP8266::eATCWQAP(void)
+{
+    String data;
+    rx_empty();
+    m_puart->println("AT+CWQAP");
+    return recvFind("OK");
+}
+
+bool ESP8266::sATCWSAP(String ssid, String pwd, uint8_t chl, uint8_t ecn)
+{
+    String data;
+    rx_empty();
+    m_puart->print("AT+CWSAP=\"");
+    m_puart->print(ssid);
+    m_puart->print("\",\"");
+    m_puart->print(pwd);
+    m_puart->print("\",");
+    m_puart->print(chl);
+    m_puart->print(",");
+    m_puart->println(ecn);
+    
+    data = recvString("OK", "ERROR", 5000);
+    if (data.indexOf("OK") != -1) {
+        return true;
+    }
+    return false;
+}
+
+bool ESP8266::eATCWLIF(String &list)
+{
+    String data;
+    rx_empty();
+    m_puart->println("AT+CWLIF");
+    return recvFindAndFilter("OK", "\r\r\n", "\r\n\r\nOK", list);
+}
+bool ESP8266::eATCIPSTATUS(String &list)
+{
+    String data;
+    delay(100);
+    rx_empty();
+    m_puart->println("AT+CIPSTATUS");
+    return recvFindAndFilter("OK", "\r\r\n", "\r\n\r\nOK", list);
+}
+bool ESP8266::sATCIPSTARTSingle(String type, String addr, uint32_t port)
+{
+    String data;
+    rx_empty();
+    m_puart->print("AT+CIPSTART=\"");
+    m_puart->print(type);
+    m_puart->print("\",\"");
+    m_puart->print(addr);
+    m_puart->print("\",");
+    m_puart->println(port);
+    
+    data = recvString("OK", "ERROR", "ALREADY CONNECT", 10000);
+    if (data.indexOf("OK") != -1 || data.indexOf("ALREADY CONNECT") != -1) {
+        return true;
+    }
+    return false;
+}
+bool ESP8266::sATCIPSTARTMultiple(uint8_t mux_id, String type, String addr, uint32_t port)
+{
+    String data;
+    rx_empty();
+    m_puart->print("AT+CIPSTART=");
+    m_puart->print(mux_id);
+    m_puart->print(",\"");
+    m_puart->print(type);
+    m_puart->print("\",\"");
+    m_puart->print(addr);
+    m_puart->print("\",");
+    m_puart->println(port);
+    
+    data = recvString("OK", "ERROR", "ALREADY CONNECT", 10000);
+    if (data.indexOf("OK") != -1 || data.indexOf("ALREADY CONNECT") != -1) {
+        return true;
+    }
+    return false;
+}
+bool ESP8266::sATCIPSENDSingle(const uint8_t *buffer, uint32_t len)
+{
+    rx_empty();
+    m_puart->print("AT+CIPSEND=");
+    m_puart->println(len);
+    if (recvFind(">", 5000)) {
+        rx_empty();
+        for (uint32_t i = 0; i < len; i++) {
+            m_puart->write(buffer[i]);
+        }
+        return recvFind("SEND OK", 10000);
+    }
+    return false;
+}
+bool ESP8266::sATCIPSENDMultiple(uint8_t mux_id, const uint8_t *buffer, uint32_t len)
+{
+    rx_empty();
+    m_puart->print("AT+CIPSEND=");
+    m_puart->print(mux_id);
+    m_puart->print(",");
+    m_puart->println(len);
+    if (recvFind(">", 5000)) {
+        rx_empty();
+        for (uint32_t i = 0; i < len; i++) {
+            m_puart->write(buffer[i]);
+        }
+        return recvFind("SEND OK", 10000);
+    }
+    return false;
+}
+bool ESP8266::sATCIPSENDSingle(String &str)
+{
+    rx_empty();
+    m_puart->print("AT+CIPSEND=");
+    m_puart->println(str.length());
+    if (recvFind(">", 5000)) {
+        rx_empty();
+        for (uint32_t i = 0; i < str.length(); i++) {
+            m_puart->write(str.charAt(i));
+        }
+        return recvFind("SEND OK", 10000);
+    }
+    return false;
+}
+bool ESP8266::sATCIPSENDMultiple(uint8_t mux_id, String &str)
+{
+    rx_empty();
+    m_puart->print("AT+CIPSEND=");
+    m_puart->print(mux_id);
+    m_puart->print(",");
+    m_puart->println(str.length());
+    if (recvFind(">", 5000)) {
+        rx_empty();
+        for (uint32_t i = 0; i < str.length(); i++) {
+            m_puart->write(str.charAt(i));
+        }
+        return recvFind("SEND OK", 10000);
+    }
+    return false;
+}
+bool ESP8266::sATCIPCLOSEMulitple(uint8_t mux_id)
+{
+    String data;
+    rx_empty();
+    m_puart->print("AT+CIPCLOSE=");
+    m_puart->println(mux_id);
+    
+    data = recvString("OK", "link is not", 5000);
+    if (data.indexOf("OK") != -1 || data.indexOf("link is not") != -1) {
+        return true;
+    }
+    return false;
+}
+bool ESP8266::eATCIPCLOSESingle(void)
+{
+    rx_empty();
+    m_puart->println("AT+CIPCLOSE");
+    return recvFind("OK", 5000);
+}
+bool ESP8266::eATCIFSR(String &list)
+{
+    rx_empty();
+    m_puart->println("AT+CIFSR");
+    return recvFindAndFilter("OK", "\r\r\n", "\r\n\r\nOK", list);
+}
+bool ESP8266::sATCIPMUX(uint8_t mode)
+{
+    String data;
+    rx_empty();
+    m_puart->print("AT+CIPMUX=");
+    m_puart->println(mode);
+    
+    data = recvString("OK", "Link is builded");
+    if (data.indexOf("OK") != -1) {
+        return true;
+    }
+    return false;
+}
+bool ESP8266::sATCIPSERVER(uint8_t mode, uint32_t port)
+{
+    String data;
+    if (mode) {
+        rx_empty();
+        m_puart->print("AT+CIPSERVER=1,");
+        m_puart->println(port);
+        
+        data = recvString("OK", "no change");
+        if (data.indexOf("OK") != -1 || data.indexOf("no change") != -1) {
+            return true;
+        }
+        return false;
+    } else {
+        rx_empty();
+        m_puart->println("AT+CIPSERVER=0");
+        return recvFind("\r\r\n");
+    }
+}
+bool ESP8266::sATCIPSTO(uint32_t timeout)
+{
+    rx_empty();
+    m_puart->print("AT+CIPSTO=");
+    m_puart->println(timeout);
+    return recvFind("OK");
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/ESP8266.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/ESP8266.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/ESP8266.h	(revision 136)
@@ -0,0 +1,490 @@
+/**
+ * @file ESP8266.h
+ * @brief The definition of class ESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.02
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef __ESP8266_H__
+#define __ESP8266_H__
+
+#include "Arduino.h"
+
+
+//#define ESP8266_USE_SOFTWARE_SERIAL
+
+
+#ifdef ESP8266_USE_SOFTWARE_SERIAL
+#include "SoftwareSerial.h"
+#endif
+
+
+/**
+ * Provide an easy-to-use way to manipulate ESP8266. 
+ */
+class ESP8266 {
+ public:
+
+#ifdef ESP8266_USE_SOFTWARE_SERIAL
+    /*
+     * Constuctor. 
+     *
+     * @param uart - an reference of SoftwareSerial object. 
+     * @param baud - the buad rate to communicate with ESP8266(default:115200). 
+     *
+     * @warning parameter baud depends on the AT firmware. 115200 is an common value. 
+     */
+    void begin(SoftwareSerial &uart, uint32_t baud = 115200);
+#else /* HardwareSerial */
+    /*
+     * Constuctor. 
+     *
+     * @param uart - an reference of HardwareSerial object. 
+     * @param baud - the buad rate to communicate with ESP8266(default:115200). 
+     *
+     * @warning parameter baud depends on the AT firmware. 115200 is an common value. 
+     */
+    void begin(HardwareSerial &uart, uint32_t baud = 115200);
+#endif
+    
+    
+    /** 
+     * Verify ESP8266 whether live or not. 
+     *
+     * Actually, this method will send command "AT" to ESP8266 and waiting for "OK". 
+     * 
+     * @retval true - alive.
+     * @retval false - dead.
+     */
+    bool kick(void);
+    
+    /**
+     * Restart ESP8266 by "AT+RST". 
+     *
+     * This method will take 3 seconds or more. 
+     *
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool restart(void);
+    
+    /**
+     * Get the version of AT Command Set. 
+     * 
+     * @return the string of version. 
+     */
+    String getVersion(void);
+    
+    /**
+     * Set operation mode to staion. 
+     * 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool setOprToStation(void);
+    
+    /**
+     * Set operation mode to softap. 
+     * 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool setOprToSoftAP(void);
+    
+    /**
+     * Set operation mode to station + softap. 
+     * 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool setOprToStationSoftAP(void);
+    
+    /**
+     * Search available AP list and return it.
+     * 
+     * @return the list of available APs. 
+     * @note This method will occupy a lot of memeory(hundreds of Bytes to a couple of KBytes). 
+     *  Do not call this method unless you must and ensure that your board has enough memery left.
+     */
+    String getAPList(void);
+    
+    /**
+     * Join in AP. 
+     *
+     * @param ssid - SSID of AP to join in. 
+     * @param pwd - Password of AP to join in. 
+     * @retval true - success.
+     * @retval false - failure.
+     * @note This method will take a couple of seconds. 
+     */
+    bool joinAP(String ssid, String pwd);
+    
+    /**
+     * Leave AP joined before. 
+     *
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool leaveAP(void);
+    
+    /**
+     * Set SoftAP parameters. 
+     * 
+     * @param ssid - SSID of SoftAP. 
+     * @param pwd - PASSWORD of SoftAP. 
+     * @param chl - the channel (1 - 13, default: 7). 
+     * @param ecn - the way of encrypstion (0 - OPEN, 1 - WEP, 
+     *  2 - WPA_PSK, 3 - WPA2_PSK, 4 - WPA_WPA2_PSK, default: 4). 
+     * @note This method should not be called when station mode. 
+     */
+    bool setSoftAPParam(String ssid, String pwd, uint8_t chl = 7, uint8_t ecn = 4);
+    
+    /**
+     * Get the IP list of devices connected to SoftAP. 
+     * 
+     * @return the list of IP.
+     * @note This method should not be called when station mode. 
+     */
+    String getJoinedDeviceIP(void);
+    
+    /**
+     * Get the current status of connection(UDP and TCP). 
+     * 
+     * @return the status. 
+     */
+    String getIPStatus(void);
+    
+    /**
+     * Get the IP address of ESP8266. 
+     *
+     * @return the IP list. 
+     */
+    String getLocalIP(void);
+    
+    /**
+     * Enable IP MUX(multiple connection mode). 
+     *
+     * In multiple connection mode, a couple of TCP and UDP communication can be builded. 
+     * They can be distinguished by the identifier of TCP or UDP named mux_id. 
+     * 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool enableMUX(void);
+    
+    /**
+     * Disable IP MUX(single connection mode). 
+     *
+     * In single connection mode, only one TCP or UDP communication can be builded. 
+     * 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool disableMUX(void);
+    
+    
+    /**
+     * Create TCP connection in single mode. 
+     * 
+     * @param addr - the IP or domain name of the target host. 
+     * @param port - the port number of the target host. 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool createTCP(String addr, uint32_t port);
+    
+    /**
+     * Release TCP connection in single mode. 
+     * 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool releaseTCP(void);
+    
+    /**
+     * Register UDP port number in single mode.
+     * 
+     * @param addr - the IP or domain name of the target host. 
+     * @param port - the port number of the target host. 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool registerUDP(String addr, uint32_t port);
+    
+    /**
+     * Unregister UDP port number in single mode. 
+     * 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool unregisterUDP(void);
+  
+    /**
+     * Create TCP connection in multiple mode. 
+     * 
+     * @param mux_id - the identifier of this TCP(available value: 0 - 4). 
+     * @param addr - the IP or domain name of the target host. 
+     * @param port - the port number of the target host. 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool createTCP(uint8_t mux_id, String addr, uint32_t port);
+    
+    /**
+     * Release TCP connection in multiple mode. 
+     * 
+     * @param mux_id - the identifier of this TCP(available value: 0 - 4). 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool releaseTCP(uint8_t mux_id);
+    
+    /**
+     * Register UDP port number in multiple mode.
+     * 
+     * @param mux_id - the identifier of this TCP(available value: 0 - 4). 
+     * @param addr - the IP or domain name of the target host. 
+     * @param port - the port number of the target host. 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool registerUDP(uint8_t mux_id, String addr, uint32_t port);
+    
+    /**
+     * Unregister UDP port number in multiple mode. 
+     * 
+     * @param mux_id - the identifier of this TCP(available value: 0 - 4). 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool unregisterUDP(uint8_t mux_id);
+
+
+    /**
+     * Set the timeout of TCP Server. 
+     * 
+     * @param timeout - the duration for timeout by second(0 ~ 28800, default:180). 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool setTCPServerTimeout(uint32_t timeout = 180);
+    
+    /**
+     * Start TCP Server(Only in multiple mode). 
+     * 
+     * After started, user should call method: getIPStatus to know the status of TCP connections. 
+     * The methods of receiving data can be called for user's any purpose. After communication, 
+     * release the TCP connection is needed by calling method: releaseTCP with mux_id. 
+     *
+     * @param port - the port number to listen(default: 333).
+     * @retval true - success.
+     * @retval false - failure.
+     *
+     * @see String getIPStatus(void);
+     * @see uint32_t recv(uint8_t *coming_mux_id, uint8_t *buffer, uint32_t len, uint32_t timeout);
+     * @see bool releaseTCP(uint8_t mux_id);
+     */
+    bool startTCPServer(uint32_t port = 333);
+
+    /**
+     * Stop TCP Server(Only in multiple mode). 
+     * 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool stopTCPServer(void);
+    
+    /**
+     * Start Server(Only in multiple mode). 
+     * 
+     * @param port - the port number to listen(default: 333).
+     * @retval true - success.
+     * @retval false - failure.
+     *
+     * @see String getIPStatus(void);
+     * @see uint32_t recv(uint8_t *coming_mux_id, uint8_t *buffer, uint32_t len, uint32_t timeout);
+     */
+    bool startServer(uint32_t port = 333);
+
+    /**
+     * Stop Server(Only in multiple mode). 
+     * 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool stopServer(void);
+
+    /**
+     * Send data based on TCP or UDP builded already in single mode. 
+     * 
+     * @param buffer - the buffer of data to send. 
+     * @param len - the length of data to send. 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool send(const uint8_t *buffer, uint32_t len);
+            
+    /**
+     * Send data based on one of TCP or UDP builded already in multiple mode. 
+     * 
+     * @param mux_id - the identifier of this TCP(available value: 0 - 4). 
+     * @param buffer - the buffer of data to send. 
+     * @param len - the length of data to send. 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool send(uint8_t mux_id, const uint8_t *buffer, uint32_t len);
+
+    /**
+     * Send data based on TCP or UDP builded already in single mode. 
+     * 
+     * @param str - String to send. 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool send(String &str);
+    
+    /**
+     * Send data based on one of TCP or UDP builded already in multiple mode. 
+     * 
+     * @param mux_id - the identifier of this TCP(available value: 0 - 4). 
+     * @param str - String to send. 
+     * @retval true - success.
+     * @retval false - failure.
+     */
+    bool send(uint8_t mux_id, String &str);
+    
+    /**
+     * Receive data from TCP or UDP builded already in single mode. 
+     *
+     * @param buffer - the buffer for storing data. 
+     * @param buffer_size - the length of the buffer. 
+     * @param timeout - the time waiting data. 
+     * @return the length of data received actually. 
+     */
+    uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout = 1000);
+    
+    /**
+     * Receive data from one of TCP or UDP builded already in multiple mode. 
+     *
+     * @param mux_id - the identifier of this TCP(available value: 0 - 4). 
+     * @param buffer - the buffer for storing data. 
+     * @param buffer_size - the length of the buffer. 
+     * @param timeout - the time waiting data. 
+     * @return the length of data received actually. 
+     */
+    uint32_t recv(uint8_t mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout = 1000);
+    
+    /**
+     * Receive data from all of TCP or UDP builded already in multiple mode. 
+     *
+     * After return, coming_mux_id store the id of TCP or UDP from which data coming. 
+     * User should read the value of coming_mux_id and decide what next to do. 
+     * 
+     * @param coming_mux_id - the identifier of TCP or UDP. 
+     * @param buffer - the buffer for storing data. 
+     * @param buffer_size - the length of the buffer. 
+     * @param timeout - the time waiting data. 
+     * @return the length of data received actually. 
+     */
+    uint32_t recv(uint8_t *coming_mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout = 1000);
+
+ private:
+
+    /* 
+     * Empty the buffer or UART RX.
+     */
+    void rx_empty(void);
+ 
+    /* 
+     * Recvive data from uart. Return all received data if target found or timeout. 
+     */
+    String recvString(String target, uint32_t timeout = 1000);
+    
+    /* 
+     * Recvive data from uart. Return all received data if one of target1 and target2 found or timeout. 
+     */
+    String recvString(String target1, String target2, uint32_t timeout = 1000);
+    
+    /* 
+     * Recvive data from uart. Return all received data if one of target1, target2 and target3 found or timeout. 
+     */
+    String recvString(String target1, String target2, String target3, uint32_t timeout = 1000);
+    
+    /* 
+     * Recvive data from uart and search first target. Return true if target found, false for timeout.
+     */
+    bool recvFind(String target, uint32_t timeout = 1000);
+    
+    /* 
+     * Recvive data from uart and search first target and cut out the substring between begin and end(excluding begin and end self). 
+     * Return true if target found, false for timeout.
+     */
+    bool recvFindAndFilter(String target, String begin, String end, String &data, uint32_t timeout = 1000);
+    
+    /*
+     * Receive a package from uart. 
+     *
+     * @param buffer - the buffer storing data. 
+     * @param buffer_size - guess what!
+     * @param data_len - the length of data actually received(maybe more than buffer_size, the remained data will be abandoned).
+     * @param timeout - the duration waitting data comming.
+     * @param coming_mux_id - in single connection mode, should be NULL and not NULL in multiple. 
+     */
+    uint32_t recvPkg(uint8_t *buffer, uint32_t buffer_size, uint32_t *data_len, uint32_t timeout, uint8_t *coming_mux_id);
+    
+    
+    bool eAT(void);
+    bool eATRST(void);
+    bool eATGMR(String &version);
+    
+    bool qATCWMODE(uint8_t *mode);
+    bool sATCWMODE(uint8_t mode);
+    bool sATCWJAP(String ssid, String pwd);
+    bool eATCWLAP(String &list);
+    bool eATCWQAP(void);
+    bool sATCWSAP(String ssid, String pwd, uint8_t chl, uint8_t ecn);
+    bool eATCWLIF(String &list);
+    
+    bool eATCIPSTATUS(String &list);
+    bool sATCIPSTARTSingle(String type, String addr, uint32_t port);
+    bool sATCIPSTARTMultiple(uint8_t mux_id, String type, String addr, uint32_t port);
+    bool sATCIPSENDSingle(const uint8_t *buffer, uint32_t len);
+    bool sATCIPSENDMultiple(uint8_t mux_id, const uint8_t *buffer, uint32_t len);
+    bool sATCIPSENDSingle(String &str);
+    bool sATCIPSENDMultiple(uint8_t mux_id, String &str);    
+    bool sATCIPCLOSEMulitple(uint8_t mux_id);
+    bool eATCIPCLOSESingle(void);
+    bool eATCIFSR(String &list);
+    bool sATCIPMUX(uint8_t mode);
+    bool sATCIPSERVER(uint8_t mode, uint32_t port = 333);
+    bool sATCIPSTO(uint32_t timeout);
+    
+    /*
+     * +IPD,len:data
+     * +IPD,id,len:data
+     */
+    
+#ifdef ESP8266_USE_SOFTWARE_SERIAL
+    SoftwareSerial *m_puart; /* The UART to communicate with ESP8266 */
+#else
+    HardwareSerial *m_puart; /* The UART to communicate with ESP8266 */
+#endif
+    uint32_t m_baud;
+};
+
+#endif /* #ifndef __ESP8266_H__ */
+
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/README.md
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/README.md	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/README.md	(revision 136)
@@ -0,0 +1,179 @@
+@mainpage
+
+# WeeESP8266
+
+An ESP8266 library for Arduino providing an easy-to-use way to manipulate ESP8266.
+
+# Source 
+
+Source can be download at <https://github.com/itead/ITEADLIB_Arduino_WeeESP8266>.
+
+You can clone it by:
+
+    git clone https://github.com/itead/ITEADLIB_Arduino_WeeESP8266.git
+
+# Documentation
+
+Online API documentation can be reached at <http://docs.iteadstudio.com/ITEADLIB_Arduino_WeeESP8266/index.html>.
+
+Offline API documentation can be found under directory 
+[doc](https://github.com/itead/ITEADLIB_Arduino_WeeESP8266/tree/master/doc).
+
+# How to get started
+
+On the home page of API documentation, the tabs of Examples, Classes and Modules 
+will be useful for Arduino lovers. 
+
+# API List
+
+    bool 	kick (void) : Verify ESP8266 whether live or not.
+     
+    bool 	restart (void) : Restart ESP8266 by "AT+RST".
+     
+    String 	getVersion (void) : Get the version of AT Command Set.
+     
+    bool 	setOprToStation (void) : Set operation mode to staion.
+     
+    bool 	setOprToSoftAP (void) : Set operation mode to softap.
+     
+    bool 	setOprToStationSoftAP (void) : Set operation mode to station + softap.
+     
+    String 	getAPList (void) : Search available AP list and return it.
+     
+    bool 	joinAP (String ssid, String pwd) : Join in AP. 
+     
+    bool 	leaveAP (void) : Leave AP joined before. 
+     
+    bool 	setSoftAPParam (String ssid, String pwd, uint8_t chl=7, uint8_t ecn=4) : Set SoftAP parameters. 
+     
+    String 	getJoinedDeviceIP (void) : Get the IP list of devices connected to SoftAP. 
+     
+    String 	getIPStatus (void) : Get the current status of connection(UDP and TCP). 
+     
+    String 	getLocalIP (void) : Get the IP address of ESP8266. 
+     
+    bool 	enableMUX (void) : Enable IP MUX(multiple connection mode). 
+     
+    bool 	disableMUX (void) : Disable IP MUX(single connection mode). 
+     
+    bool 	createTCP (String addr, uint32_t port) : Create TCP connection in single mode. 
+     
+    bool 	releaseTCP (void) : Release TCP connection in single mode. 
+     
+    bool 	registerUDP (String addr, uint32_t port) : Register UDP port number in single mode. 
+     
+    bool 	unregisterUDP (void) : Unregister UDP port number in single mode. 
+     
+    bool 	createTCP (uint8_t mux_id, String addr, uint32_t port) : Create TCP connection in multiple mode. 
+     
+    bool 	releaseTCP (uint8_t mux_id) : Release TCP connection in multiple mode. 
+     
+    bool 	registerUDP (uint8_t mux_id, String addr, uint32_t port) : Register UDP port number in multiple mode. 
+     
+    bool 	unregisterUDP (uint8_t mux_id) : Unregister UDP port number in multiple mode. 
+     
+    bool 	setTCPServerTimeout (uint32_t timeout=180) : Set the timeout of TCP Server. 
+    
+    bool 	startServer (uint32_t port=333) ï¼ Start Server(Only in multiple mode).
+
+    bool 	stopServer (void) : Stop Server(Only in multiple mode).
+ 
+    bool 	startTCPServer (uint32_t port=333) : Start TCP Server(Only in multiple mode). 
+     
+    bool 	stopTCPServer (void) : Stop TCP Server(Only in multiple mode). 
+     
+    bool 	send (const uint8_t *buffer, uint32_t len) : Send data based on TCP or UDP builded already in single mode. 
+     
+    bool 	send (uint8_t mux_id, const uint8_t *buffer, uint32_t len) : Send data based on one of TCP or UDP builded already in multiple mode. 
+     
+    uint32_t 	recv (uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000) : Receive data from TCP or UDP builded already in single mode. 
+     
+    uint32_t 	recv (uint8_t mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000) : Receive data from one of TCP or UDP builded already in multiple mode. 
+     
+    uint32_t 	recv (uint8_t *coming_mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000) : Receive data from all of TCP or UDP builded already in multiple mode. 
+
+
+# Mainboard Requires
+
+  - RAM: not less than 2KBytes
+  - Serial: one serial (HardwareSerial or SoftwareSerial) at least 
+
+# Suppported Mainboards
+  
+  - Arduino UNO and its derivatives
+  - Arduino MEGA and its derivatives
+  - [Iteaduino UNO](http://imall.iteadstudio.com/im130312001.html)
+  - [WBoard Pro](http://imall.iteadstudio.com/im141125005.html)
+
+# Using SoftwareSerial
+
+If you want to use SoftwareSerial to communicate with ESP8266, you need to modify
+the line in file `ESP8266.h`: 
+
+    //#define ESP8266_USE_SOFTWARE_SERIAL
+
+After modification, it should be:
+
+    #define ESP8266_USE_SOFTWARE_SERIAL
+
+
+# Hardware Connection
+
+WeeESP8266 library only needs an uart for hardware connection. All communications 
+are done via uart. In each example, you must specify the uart used by mainboard 
+to communicate with ESP8266 flashed AT firmware.
+
+## MEGA and WBoard Pro
+
+For MEGA and WBoard Pro, `Serial1` will be used if you create an object (named wifi) 
+of class ESP8266 in your code like this:
+
+    #include "ESP8266.h"
+    ESP8266 wifi(Serial1);
+
+The connection should be like these:
+
+    ESP8266_TX->RX1(D19)
+    ESP8266_RX->TX1(D18)
+    ESP8266_CH_PD->3.3V
+    ESP8266_VCC->3.3V
+    ESP8266_GND->GND
+
+## UNO
+
+To use SoftwareSerial, `mySerial` will be used if you create an object (named wifi)
+of class ESP8266 in your code like this:
+
+    #include "ESP8266.h"
+    #include <SoftwareSerial.h>
+    
+    SoftwareSerial mySerial(3, 2); /* RX:D3, TX:D2 */
+    ESP8266 wifi(mySerial);
+
+The connection should be like these:
+
+    ESP8266_TX->RX(D3)
+    ESP8266_RX->TX(D2)
+    ESP8266_CH_PD->3.3V
+    ESP8266_VCC->3.3V
+    ESP8266_GND->GND
+    
+# Attention
+
+The size of data from ESP8266 is too big for arduino sometimes, so the library can't
+receive the whole buffer because the size of the hardware serial buffer which is 
+defined in HardwareSerial.h is too small.
+
+Open the file from `\arduino\hardware\arduino\avr\cores\arduino\HardwareSerial.h`. 
+See the follow line in the HardwareSerial.h file.
+
+    #define SERIAL_BUFFER_SIZE 64
+
+The default size of the buffer is 64. Change it into a bigger number, like 256 or more.
+
+
+-------------------------------------------------------------------------------
+
+# The End!
+
+-------------------------------------------------------------------------------
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_connect_wi_fi_8ino-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_connect_wi_fi_8ino-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_connect_wi_fi_8ino-example.html	(revision 136)
@@ -0,0 +1,99 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: ConnectWiFi.ino</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">ConnectWiFi.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The ConnectWiFi demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.03</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"><div class="line"></div>
+<div class="line"><span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"></div>
+<div class="line"><a name="_a0"></a><a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"></div>
+<div class="line"><span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    Serial.begin(9600);</div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"></div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;FW Version: &quot;</span>);</div>
+<div class="line">    Serial.println(wifi.<a name="a1"></a><a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line">    </div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a2"></a><a class="code" href="class_e_s_p8266.html#a572c6f855d70078fdbff9ac2c4b1ce99">setOprToStation</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"></div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a3"></a><a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);       </div>
+<div class="line">        Serial.println(wifi.<a name="a4"></a><a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line">}</div>
+<div class="line"></div>
+<div class="line"><span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">}</div>
+<div class="line"></div>
+</div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_connect_wi_fi_8ino_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_connect_wi_fi_8ino_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_connect_wi_fi_8ino_source.html	(revision 136)
@@ -0,0 +1,107 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: examples/ConnectWiFi/ConnectWiFi.ino Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+<div id="nav-path" class="navpath">
+  <ul>
+<li class="navelem"><a class="el" href="dir_d28a4824dc47e487b107a5db32ef43c4.html">examples</a></li><li class="navelem"><a class="el" href="dir_8d6221cc4158f181d53b350a968e25f7.html">ConnectWiFi</a></li>  </ul>
+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">ConnectWiFi.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;</div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;<span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;</div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;</div>
+<div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;<span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;{</div>
+<div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;    Serial.begin(9600);</div>
+<div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;</div>
+<div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;    Serial.print(<span class="stringliteral">&quot;FW Version: &quot;</span>);</div>
+<div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;    Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;    </div>
+<div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;    </div>
+<div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a572c6f855d70078fdbff9ac2c4b1ce99">setOprToStation</a>()) {</div>
+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;    }</div>
+<div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;</div>
+<div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);       </div>
+<div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;        Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());</div>
+<div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;    }</div>
+<div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;    </div>
+<div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;}</div>
+<div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;</div>
+<div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;<span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;{</div>
+<div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;}</div>
+<div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;</div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="_e_s_p8266_8h_html"><div class="ttname"><a href="_e_s_p8266_8h.html">ESP8266.h</a></div><div class="ttdoc">The definition of class ESP8266. </div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a572c6f855d70078fdbff9ac2c4b1ce99"><div class="ttname"><a href="class_e_s_p8266.html#a572c6f855d70078fdbff9ac2c4b1ce99">ESP8266::setOprToStation</a></div><div class="ttdeci">bool setOprToStation(void)</div><div class="ttdoc">Set operation mode to staion. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00087">ESP8266.cpp:87</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8cpp.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8cpp.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8cpp.html	(revision 136)
@@ -0,0 +1,76 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: ESP8266.cpp File Reference</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
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+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
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+  <div id="navrow2" class="tabs2">
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+      <li><a href="files.html"><span>File&#160;List</span></a></li>
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+<div class="header">
+  <div class="headertitle">
+<div class="title">ESP8266.cpp File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>The implementation of class <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>.  
+<a href="#details">More...</a></p>
+<div class="textblock"><code>#include &quot;<a class="el" href="_e_s_p8266_8h_source.html">ESP8266.h</a>&quot;</code><br />
+</div>
+<p><a href="_e_s_p8266_8cpp_source.html">Go to the source code of this file.</a></p>
+<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
+<div class="textblock"><p>The implementation of class <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>. </p>
+<dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. </dd></dl>
+
+<p>Definition in file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+</div></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8cpp_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8cpp_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8cpp_source.html	(revision 136)
@@ -0,0 +1,798 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: ESP8266.cpp Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
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+<div class="header">
+  <div class="headertitle">
+<div class="title">ESP8266.cpp</div>  </div>
+</div><!--header-->
+<div class="contents">
+<a href="_e_s_p8266_8cpp.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
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+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="preprocessor">#define logDebug(arg)\</span></div>
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+<div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;<span class="preprocessor">        if (LOG_OUTPUT_DEBUG)\</span></div>
+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;<span class="preprocessor">        {\</span></div>
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+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;<span class="preprocessor">                Serial.print(&quot;] &quot;);\</span></div>
+<div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;<span class="preprocessor">            }\</span></div>
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+<div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;{</div>
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+<div class="line"><a name="l00060"></a><span class="lineno">   60</span>&#160;    <span class="keywordflow">return</span> eAT();</div>
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+<div class="line"><a name="l00270"></a><span class="lineno">  270</span>&#160;</div>
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+<div class="line"><a name="l00286"></a><span class="lineno">  286</span>&#160;</div>
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+<div class="line"><a name="l00291"></a><span class="lineno">  291</span>&#160;</div>
+<div class="line"><a name="l00292"></a><span class="lineno">  292</span>&#160;<span class="comment">/*----------------------------------------------------------------------------*/</span></div>
+<div class="line"><a name="l00293"></a><span class="lineno">  293</span>&#160;</div>
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+<div class="line"><a name="l00299"></a><span class="lineno">  299</span>&#160;    int32_t index_colon = -1; <span class="comment">/* : */</span></div>
+<div class="line"><a name="l00300"></a><span class="lineno">  300</span>&#160;    int32_t index_comma = -1; <span class="comment">/* , */</span></div>
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+<div class="line"><a name="l00379"></a><span class="lineno">  379</span>&#160;            }</div>
+<div class="line"><a name="l00380"></a><span class="lineno">  380</span>&#160;        }</div>
+<div class="line"><a name="l00381"></a><span class="lineno">  381</span>&#160;    }</div>
+<div class="line"><a name="l00382"></a><span class="lineno">  382</span>&#160;    <span class="comment">//logDebug(&quot;end recv pkg&quot;);</span></div>
+<div class="line"><a name="l00383"></a><span class="lineno">  383</span>&#160;    <span class="keywordflow">return</span> 0;</div>
+<div class="line"><a name="l00384"></a><span class="lineno">  384</span>&#160;}</div>
+<div class="line"><a name="l00385"></a><span class="lineno">  385</span>&#160;</div>
+<div class="line"><a name="l00386"></a><span class="lineno">  386</span>&#160;<span class="keywordtype">void</span> ESP8266::rx_empty(<span class="keywordtype">void</span>) </div>
+<div class="line"><a name="l00387"></a><span class="lineno">  387</span>&#160;{</div>
+<div class="line"><a name="l00388"></a><span class="lineno">  388</span>&#160;    <span class="keywordflow">while</span>(m_puart-&gt;available() &gt; 0) {</div>
+<div class="line"><a name="l00389"></a><span class="lineno">  389</span>&#160;        m_puart-&gt;read();</div>
+<div class="line"><a name="l00390"></a><span class="lineno">  390</span>&#160;    }</div>
+<div class="line"><a name="l00391"></a><span class="lineno">  391</span>&#160;}</div>
+<div class="line"><a name="l00392"></a><span class="lineno">  392</span>&#160;</div>
+<div class="line"><a name="l00393"></a><span class="lineno">  393</span>&#160;String ESP8266::recvString(String target, uint32_t timeout)</div>
+<div class="line"><a name="l00394"></a><span class="lineno">  394</span>&#160;{</div>
+<div class="line"><a name="l00395"></a><span class="lineno">  395</span>&#160;    String data;</div>
+<div class="line"><a name="l00396"></a><span class="lineno">  396</span>&#160;    <span class="keywordtype">char</span> a;</div>
+<div class="line"><a name="l00397"></a><span class="lineno">  397</span>&#160;    <span class="keywordtype">unsigned</span> <span class="keywordtype">long</span> start = millis();</div>
+<div class="line"><a name="l00398"></a><span class="lineno">  398</span>&#160;    <span class="keywordflow">while</span> (millis() - start &lt; timeout) {</div>
+<div class="line"><a name="l00399"></a><span class="lineno">  399</span>&#160;        <span class="keywordflow">while</span>(m_puart-&gt;available() &gt; 0) {</div>
+<div class="line"><a name="l00400"></a><span class="lineno">  400</span>&#160;            a = m_puart-&gt;read();</div>
+<div class="line"><a name="l00401"></a><span class="lineno">  401</span>&#160;            <span class="keywordflow">if</span>(a == <span class="charliteral">&#39;\0&#39;</span>) <span class="keywordflow">continue</span>;</div>
+<div class="line"><a name="l00402"></a><span class="lineno">  402</span>&#160;            data += a;</div>
+<div class="line"><a name="l00403"></a><span class="lineno">  403</span>&#160;        }</div>
+<div class="line"><a name="l00404"></a><span class="lineno">  404</span>&#160;        <span class="keywordflow">if</span> (data.indexOf(target) != -1) {</div>
+<div class="line"><a name="l00405"></a><span class="lineno">  405</span>&#160;            <span class="keywordflow">break</span>;</div>
+<div class="line"><a name="l00406"></a><span class="lineno">  406</span>&#160;        }   </div>
+<div class="line"><a name="l00407"></a><span class="lineno">  407</span>&#160;    }</div>
+<div class="line"><a name="l00408"></a><span class="lineno">  408</span>&#160;    <span class="keywordflow">return</span> data;</div>
+<div class="line"><a name="l00409"></a><span class="lineno">  409</span>&#160;}</div>
+<div class="line"><a name="l00410"></a><span class="lineno">  410</span>&#160;</div>
+<div class="line"><a name="l00411"></a><span class="lineno">  411</span>&#160;String ESP8266::recvString(String target1, String target2, uint32_t timeout)</div>
+<div class="line"><a name="l00412"></a><span class="lineno">  412</span>&#160;{</div>
+<div class="line"><a name="l00413"></a><span class="lineno">  413</span>&#160;    String data;</div>
+<div class="line"><a name="l00414"></a><span class="lineno">  414</span>&#160;    <span class="keywordtype">char</span> a;</div>
+<div class="line"><a name="l00415"></a><span class="lineno">  415</span>&#160;    <span class="keywordtype">unsigned</span> <span class="keywordtype">long</span> start = millis();</div>
+<div class="line"><a name="l00416"></a><span class="lineno">  416</span>&#160;    <span class="keywordflow">while</span> (millis() - start &lt; timeout) {</div>
+<div class="line"><a name="l00417"></a><span class="lineno">  417</span>&#160;        <span class="keywordflow">while</span>(m_puart-&gt;available() &gt; 0) {</div>
+<div class="line"><a name="l00418"></a><span class="lineno">  418</span>&#160;            a = m_puart-&gt;read();</div>
+<div class="line"><a name="l00419"></a><span class="lineno">  419</span>&#160;            <span class="keywordflow">if</span>(a == <span class="charliteral">&#39;\0&#39;</span>) <span class="keywordflow">continue</span>;</div>
+<div class="line"><a name="l00420"></a><span class="lineno">  420</span>&#160;            data += a;</div>
+<div class="line"><a name="l00421"></a><span class="lineno">  421</span>&#160;        }</div>
+<div class="line"><a name="l00422"></a><span class="lineno">  422</span>&#160;        <span class="keywordflow">if</span> (data.indexOf(target1) != -1) {</div>
+<div class="line"><a name="l00423"></a><span class="lineno">  423</span>&#160;            <span class="keywordflow">break</span>;</div>
+<div class="line"><a name="l00424"></a><span class="lineno">  424</span>&#160;        } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (data.indexOf(target2) != -1) {</div>
+<div class="line"><a name="l00425"></a><span class="lineno">  425</span>&#160;            <span class="keywordflow">break</span>;</div>
+<div class="line"><a name="l00426"></a><span class="lineno">  426</span>&#160;        }</div>
+<div class="line"><a name="l00427"></a><span class="lineno">  427</span>&#160;    }</div>
+<div class="line"><a name="l00428"></a><span class="lineno">  428</span>&#160;    <span class="keywordflow">return</span> data;</div>
+<div class="line"><a name="l00429"></a><span class="lineno">  429</span>&#160;}</div>
+<div class="line"><a name="l00430"></a><span class="lineno">  430</span>&#160;</div>
+<div class="line"><a name="l00431"></a><span class="lineno">  431</span>&#160;String ESP8266::recvString(String target1, String target2, String target3, uint32_t timeout)</div>
+<div class="line"><a name="l00432"></a><span class="lineno">  432</span>&#160;{</div>
+<div class="line"><a name="l00433"></a><span class="lineno">  433</span>&#160;    String data;</div>
+<div class="line"><a name="l00434"></a><span class="lineno">  434</span>&#160;    <span class="keywordtype">char</span> a;</div>
+<div class="line"><a name="l00435"></a><span class="lineno">  435</span>&#160;    <span class="keywordtype">unsigned</span> <span class="keywordtype">long</span> start = millis();</div>
+<div class="line"><a name="l00436"></a><span class="lineno">  436</span>&#160;    <span class="keywordflow">while</span> (millis() - start &lt; timeout) {</div>
+<div class="line"><a name="l00437"></a><span class="lineno">  437</span>&#160;        <span class="keywordflow">while</span>(m_puart-&gt;available() &gt; 0) {</div>
+<div class="line"><a name="l00438"></a><span class="lineno">  438</span>&#160;            a = m_puart-&gt;read();</div>
+<div class="line"><a name="l00439"></a><span class="lineno">  439</span>&#160;            <span class="keywordflow">if</span>(a == <span class="charliteral">&#39;\0&#39;</span>) <span class="keywordflow">continue</span>;</div>
+<div class="line"><a name="l00440"></a><span class="lineno">  440</span>&#160;            data += a;</div>
+<div class="line"><a name="l00441"></a><span class="lineno">  441</span>&#160;        }</div>
+<div class="line"><a name="l00442"></a><span class="lineno">  442</span>&#160;        <span class="keywordflow">if</span> (data.indexOf(target1) != -1) {</div>
+<div class="line"><a name="l00443"></a><span class="lineno">  443</span>&#160;            <span class="keywordflow">break</span>;</div>
+<div class="line"><a name="l00444"></a><span class="lineno">  444</span>&#160;        } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (data.indexOf(target2) != -1) {</div>
+<div class="line"><a name="l00445"></a><span class="lineno">  445</span>&#160;            <span class="keywordflow">break</span>;</div>
+<div class="line"><a name="l00446"></a><span class="lineno">  446</span>&#160;        } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (data.indexOf(target3) != -1) {</div>
+<div class="line"><a name="l00447"></a><span class="lineno">  447</span>&#160;            <span class="keywordflow">break</span>;</div>
+<div class="line"><a name="l00448"></a><span class="lineno">  448</span>&#160;        }</div>
+<div class="line"><a name="l00449"></a><span class="lineno">  449</span>&#160;    }</div>
+<div class="line"><a name="l00450"></a><span class="lineno">  450</span>&#160;    <span class="keywordflow">return</span> data;</div>
+<div class="line"><a name="l00451"></a><span class="lineno">  451</span>&#160;}</div>
+<div class="line"><a name="l00452"></a><span class="lineno">  452</span>&#160;</div>
+<div class="line"><a name="l00453"></a><span class="lineno">  453</span>&#160;<span class="keywordtype">bool</span> ESP8266::recvFind(String target, uint32_t timeout)</div>
+<div class="line"><a name="l00454"></a><span class="lineno">  454</span>&#160;{</div>
+<div class="line"><a name="l00455"></a><span class="lineno">  455</span>&#160;    String data_tmp;</div>
+<div class="line"><a name="l00456"></a><span class="lineno">  456</span>&#160;    data_tmp = recvString(target, timeout);</div>
+<div class="line"><a name="l00457"></a><span class="lineno">  457</span>&#160;    <span class="keywordflow">if</span> (data_tmp.indexOf(target) != -1) {</div>
+<div class="line"><a name="l00458"></a><span class="lineno">  458</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00459"></a><span class="lineno">  459</span>&#160;    }</div>
+<div class="line"><a name="l00460"></a><span class="lineno">  460</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00461"></a><span class="lineno">  461</span>&#160;}</div>
+<div class="line"><a name="l00462"></a><span class="lineno">  462</span>&#160;</div>
+<div class="line"><a name="l00463"></a><span class="lineno">  463</span>&#160;<span class="keywordtype">bool</span> ESP8266::recvFindAndFilter(String target, String begin, String end, String &amp;data, uint32_t timeout)</div>
+<div class="line"><a name="l00464"></a><span class="lineno">  464</span>&#160;{</div>
+<div class="line"><a name="l00465"></a><span class="lineno">  465</span>&#160;    String data_tmp;</div>
+<div class="line"><a name="l00466"></a><span class="lineno">  466</span>&#160;    data_tmp = recvString(target, timeout);</div>
+<div class="line"><a name="l00467"></a><span class="lineno">  467</span>&#160;    <span class="keywordflow">if</span> (data_tmp.indexOf(target) != -1) {</div>
+<div class="line"><a name="l00468"></a><span class="lineno">  468</span>&#160;        int32_t index1 = data_tmp.indexOf(begin);</div>
+<div class="line"><a name="l00469"></a><span class="lineno">  469</span>&#160;        int32_t index2 = data_tmp.indexOf(end);</div>
+<div class="line"><a name="l00470"></a><span class="lineno">  470</span>&#160;        <span class="keywordflow">if</span> (index1 != -1 &amp;&amp; index2 != -1) {</div>
+<div class="line"><a name="l00471"></a><span class="lineno">  471</span>&#160;            index1 += begin.length();</div>
+<div class="line"><a name="l00472"></a><span class="lineno">  472</span>&#160;            data = data_tmp.substring(index1, index2);</div>
+<div class="line"><a name="l00473"></a><span class="lineno">  473</span>&#160;            <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00474"></a><span class="lineno">  474</span>&#160;        }</div>
+<div class="line"><a name="l00475"></a><span class="lineno">  475</span>&#160;    }</div>
+<div class="line"><a name="l00476"></a><span class="lineno">  476</span>&#160;    data = <span class="stringliteral">&quot;&quot;</span>;</div>
+<div class="line"><a name="l00477"></a><span class="lineno">  477</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00478"></a><span class="lineno">  478</span>&#160;}</div>
+<div class="line"><a name="l00479"></a><span class="lineno">  479</span>&#160;</div>
+<div class="line"><a name="l00480"></a><span class="lineno">  480</span>&#160;<span class="keywordtype">bool</span> ESP8266::eAT(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00481"></a><span class="lineno">  481</span>&#160;{</div>
+<div class="line"><a name="l00482"></a><span class="lineno">  482</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00483"></a><span class="lineno">  483</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT&quot;</span>);</div>
+<div class="line"><a name="l00484"></a><span class="lineno">  484</span>&#160;    <span class="keywordflow">return</span> recvFind(<span class="stringliteral">&quot;OK&quot;</span>);</div>
+<div class="line"><a name="l00485"></a><span class="lineno">  485</span>&#160;}</div>
+<div class="line"><a name="l00486"></a><span class="lineno">  486</span>&#160;</div>
+<div class="line"><a name="l00487"></a><span class="lineno">  487</span>&#160;<span class="keywordtype">bool</span> ESP8266::eATRST(<span class="keywordtype">void</span>) </div>
+<div class="line"><a name="l00488"></a><span class="lineno">  488</span>&#160;{</div>
+<div class="line"><a name="l00489"></a><span class="lineno">  489</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00490"></a><span class="lineno">  490</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT+RST&quot;</span>);</div>
+<div class="line"><a name="l00491"></a><span class="lineno">  491</span>&#160;    <span class="keywordflow">return</span> recvFind(<span class="stringliteral">&quot;OK&quot;</span>);</div>
+<div class="line"><a name="l00492"></a><span class="lineno">  492</span>&#160;}</div>
+<div class="line"><a name="l00493"></a><span class="lineno">  493</span>&#160;</div>
+<div class="line"><a name="l00494"></a><span class="lineno">  494</span>&#160;<span class="keywordtype">bool</span> ESP8266::eATGMR(String &amp;version)</div>
+<div class="line"><a name="l00495"></a><span class="lineno">  495</span>&#160;{</div>
+<div class="line"><a name="l00496"></a><span class="lineno">  496</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00497"></a><span class="lineno">  497</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT+GMR&quot;</span>);</div>
+<div class="line"><a name="l00498"></a><span class="lineno">  498</span>&#160;    <span class="keywordflow">return</span> recvFindAndFilter(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;\r\r\n&quot;</span>, <span class="stringliteral">&quot;\r\n\r\nOK&quot;</span>, version); </div>
+<div class="line"><a name="l00499"></a><span class="lineno">  499</span>&#160;}</div>
+<div class="line"><a name="l00500"></a><span class="lineno">  500</span>&#160;</div>
+<div class="line"><a name="l00501"></a><span class="lineno">  501</span>&#160;<span class="keywordtype">bool</span> ESP8266::qATCWMODE(uint8_t *mode) </div>
+<div class="line"><a name="l00502"></a><span class="lineno">  502</span>&#160;{</div>
+<div class="line"><a name="l00503"></a><span class="lineno">  503</span>&#160;    String str_mode;</div>
+<div class="line"><a name="l00504"></a><span class="lineno">  504</span>&#160;    <span class="keywordtype">bool</span> ret;</div>
+<div class="line"><a name="l00505"></a><span class="lineno">  505</span>&#160;    <span class="keywordflow">if</span> (!mode) {</div>
+<div class="line"><a name="l00506"></a><span class="lineno">  506</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00507"></a><span class="lineno">  507</span>&#160;    }</div>
+<div class="line"><a name="l00508"></a><span class="lineno">  508</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00509"></a><span class="lineno">  509</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT+CWMODE?&quot;</span>);</div>
+<div class="line"><a name="l00510"></a><span class="lineno">  510</span>&#160;    ret = recvFindAndFilter(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;+CWMODE:&quot;</span>, <span class="stringliteral">&quot;\r\n\r\nOK&quot;</span>, str_mode); </div>
+<div class="line"><a name="l00511"></a><span class="lineno">  511</span>&#160;    <span class="keywordflow">if</span> (ret) {</div>
+<div class="line"><a name="l00512"></a><span class="lineno">  512</span>&#160;        *mode = (uint8_t)str_mode.toInt();</div>
+<div class="line"><a name="l00513"></a><span class="lineno">  513</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00514"></a><span class="lineno">  514</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00515"></a><span class="lineno">  515</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00516"></a><span class="lineno">  516</span>&#160;    }</div>
+<div class="line"><a name="l00517"></a><span class="lineno">  517</span>&#160;}</div>
+<div class="line"><a name="l00518"></a><span class="lineno">  518</span>&#160;</div>
+<div class="line"><a name="l00519"></a><span class="lineno">  519</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCWMODE(uint8_t mode)</div>
+<div class="line"><a name="l00520"></a><span class="lineno">  520</span>&#160;{</div>
+<div class="line"><a name="l00521"></a><span class="lineno">  521</span>&#160;    String data;</div>
+<div class="line"><a name="l00522"></a><span class="lineno">  522</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00523"></a><span class="lineno">  523</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CWMODE=&quot;</span>);</div>
+<div class="line"><a name="l00524"></a><span class="lineno">  524</span>&#160;    m_puart-&gt;println(mode);</div>
+<div class="line"><a name="l00525"></a><span class="lineno">  525</span>&#160;    </div>
+<div class="line"><a name="l00526"></a><span class="lineno">  526</span>&#160;    data = recvString(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;no change&quot;</span>);</div>
+<div class="line"><a name="l00527"></a><span class="lineno">  527</span>&#160;    <span class="keywordflow">if</span> (data.indexOf(<span class="stringliteral">&quot;OK&quot;</span>) != -1 || data.indexOf(<span class="stringliteral">&quot;no change&quot;</span>) != -1) {</div>
+<div class="line"><a name="l00528"></a><span class="lineno">  528</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00529"></a><span class="lineno">  529</span>&#160;    }</div>
+<div class="line"><a name="l00530"></a><span class="lineno">  530</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00531"></a><span class="lineno">  531</span>&#160;}</div>
+<div class="line"><a name="l00532"></a><span class="lineno">  532</span>&#160;</div>
+<div class="line"><a name="l00533"></a><span class="lineno">  533</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCWJAP(String ssid, String pwd)</div>
+<div class="line"><a name="l00534"></a><span class="lineno">  534</span>&#160;{</div>
+<div class="line"><a name="l00535"></a><span class="lineno">  535</span>&#160;    String data;</div>
+<div class="line"><a name="l00536"></a><span class="lineno">  536</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00537"></a><span class="lineno">  537</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CWJAP=\&quot;&quot;</span>);</div>
+<div class="line"><a name="l00538"></a><span class="lineno">  538</span>&#160;    m_puart-&gt;print(ssid);</div>
+<div class="line"><a name="l00539"></a><span class="lineno">  539</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;\&quot;,\&quot;&quot;</span>);</div>
+<div class="line"><a name="l00540"></a><span class="lineno">  540</span>&#160;    m_puart-&gt;print(pwd);</div>
+<div class="line"><a name="l00541"></a><span class="lineno">  541</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;\&quot;&quot;</span>);</div>
+<div class="line"><a name="l00542"></a><span class="lineno">  542</span>&#160;    </div>
+<div class="line"><a name="l00543"></a><span class="lineno">  543</span>&#160;    data = recvString(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;FAIL&quot;</span>, 10000);</div>
+<div class="line"><a name="l00544"></a><span class="lineno">  544</span>&#160;    <span class="keywordflow">if</span> (data.indexOf(<span class="stringliteral">&quot;OK&quot;</span>) != -1) {</div>
+<div class="line"><a name="l00545"></a><span class="lineno">  545</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00546"></a><span class="lineno">  546</span>&#160;    }</div>
+<div class="line"><a name="l00547"></a><span class="lineno">  547</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00548"></a><span class="lineno">  548</span>&#160;}</div>
+<div class="line"><a name="l00549"></a><span class="lineno">  549</span>&#160;</div>
+<div class="line"><a name="l00550"></a><span class="lineno">  550</span>&#160;<span class="keywordtype">bool</span> ESP8266::eATCWLAP(String &amp;list)</div>
+<div class="line"><a name="l00551"></a><span class="lineno">  551</span>&#160;{</div>
+<div class="line"><a name="l00552"></a><span class="lineno">  552</span>&#160;    String data;</div>
+<div class="line"><a name="l00553"></a><span class="lineno">  553</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00554"></a><span class="lineno">  554</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT+CWLAP&quot;</span>);</div>
+<div class="line"><a name="l00555"></a><span class="lineno">  555</span>&#160;    <span class="keywordflow">return</span> recvFindAndFilter(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;\r\r\n&quot;</span>, <span class="stringliteral">&quot;\r\n\r\nOK&quot;</span>, list, 10000);</div>
+<div class="line"><a name="l00556"></a><span class="lineno">  556</span>&#160;}</div>
+<div class="line"><a name="l00557"></a><span class="lineno">  557</span>&#160;</div>
+<div class="line"><a name="l00558"></a><span class="lineno">  558</span>&#160;<span class="keywordtype">bool</span> ESP8266::eATCWQAP(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00559"></a><span class="lineno">  559</span>&#160;{</div>
+<div class="line"><a name="l00560"></a><span class="lineno">  560</span>&#160;    String data;</div>
+<div class="line"><a name="l00561"></a><span class="lineno">  561</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00562"></a><span class="lineno">  562</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT+CWQAP&quot;</span>);</div>
+<div class="line"><a name="l00563"></a><span class="lineno">  563</span>&#160;    <span class="keywordflow">return</span> recvFind(<span class="stringliteral">&quot;OK&quot;</span>);</div>
+<div class="line"><a name="l00564"></a><span class="lineno">  564</span>&#160;}</div>
+<div class="line"><a name="l00565"></a><span class="lineno">  565</span>&#160;</div>
+<div class="line"><a name="l00566"></a><span class="lineno">  566</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCWSAP(String ssid, String pwd, uint8_t chl, uint8_t ecn)</div>
+<div class="line"><a name="l00567"></a><span class="lineno">  567</span>&#160;{</div>
+<div class="line"><a name="l00568"></a><span class="lineno">  568</span>&#160;    String data;</div>
+<div class="line"><a name="l00569"></a><span class="lineno">  569</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00570"></a><span class="lineno">  570</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CWSAP=\&quot;&quot;</span>);</div>
+<div class="line"><a name="l00571"></a><span class="lineno">  571</span>&#160;    m_puart-&gt;print(ssid);</div>
+<div class="line"><a name="l00572"></a><span class="lineno">  572</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;\&quot;,\&quot;&quot;</span>);</div>
+<div class="line"><a name="l00573"></a><span class="lineno">  573</span>&#160;    m_puart-&gt;print(pwd);</div>
+<div class="line"><a name="l00574"></a><span class="lineno">  574</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;\&quot;,&quot;</span>);</div>
+<div class="line"><a name="l00575"></a><span class="lineno">  575</span>&#160;    m_puart-&gt;print(chl);</div>
+<div class="line"><a name="l00576"></a><span class="lineno">  576</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;,&quot;</span>);</div>
+<div class="line"><a name="l00577"></a><span class="lineno">  577</span>&#160;    m_puart-&gt;println(ecn);</div>
+<div class="line"><a name="l00578"></a><span class="lineno">  578</span>&#160;    </div>
+<div class="line"><a name="l00579"></a><span class="lineno">  579</span>&#160;    data = recvString(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;ERROR&quot;</span>, 5000);</div>
+<div class="line"><a name="l00580"></a><span class="lineno">  580</span>&#160;    <span class="keywordflow">if</span> (data.indexOf(<span class="stringliteral">&quot;OK&quot;</span>) != -1) {</div>
+<div class="line"><a name="l00581"></a><span class="lineno">  581</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00582"></a><span class="lineno">  582</span>&#160;    }</div>
+<div class="line"><a name="l00583"></a><span class="lineno">  583</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00584"></a><span class="lineno">  584</span>&#160;}</div>
+<div class="line"><a name="l00585"></a><span class="lineno">  585</span>&#160;</div>
+<div class="line"><a name="l00586"></a><span class="lineno">  586</span>&#160;<span class="keywordtype">bool</span> ESP8266::eATCWLIF(String &amp;list)</div>
+<div class="line"><a name="l00587"></a><span class="lineno">  587</span>&#160;{</div>
+<div class="line"><a name="l00588"></a><span class="lineno">  588</span>&#160;    String data;</div>
+<div class="line"><a name="l00589"></a><span class="lineno">  589</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00590"></a><span class="lineno">  590</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT+CWLIF&quot;</span>);</div>
+<div class="line"><a name="l00591"></a><span class="lineno">  591</span>&#160;    <span class="keywordflow">return</span> recvFindAndFilter(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;\r\r\n&quot;</span>, <span class="stringliteral">&quot;\r\n\r\nOK&quot;</span>, list);</div>
+<div class="line"><a name="l00592"></a><span class="lineno">  592</span>&#160;}</div>
+<div class="line"><a name="l00593"></a><span class="lineno">  593</span>&#160;<span class="keywordtype">bool</span> ESP8266::eATCIPSTATUS(String &amp;list)</div>
+<div class="line"><a name="l00594"></a><span class="lineno">  594</span>&#160;{</div>
+<div class="line"><a name="l00595"></a><span class="lineno">  595</span>&#160;    String data;</div>
+<div class="line"><a name="l00596"></a><span class="lineno">  596</span>&#160;    delay(100);</div>
+<div class="line"><a name="l00597"></a><span class="lineno">  597</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00598"></a><span class="lineno">  598</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT+CIPSTATUS&quot;</span>);</div>
+<div class="line"><a name="l00599"></a><span class="lineno">  599</span>&#160;    <span class="keywordflow">return</span> recvFindAndFilter(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;\r\r\n&quot;</span>, <span class="stringliteral">&quot;\r\n\r\nOK&quot;</span>, list);</div>
+<div class="line"><a name="l00600"></a><span class="lineno">  600</span>&#160;}</div>
+<div class="line"><a name="l00601"></a><span class="lineno">  601</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCIPSTARTSingle(String type, String addr, uint32_t port)</div>
+<div class="line"><a name="l00602"></a><span class="lineno">  602</span>&#160;{</div>
+<div class="line"><a name="l00603"></a><span class="lineno">  603</span>&#160;    String data;</div>
+<div class="line"><a name="l00604"></a><span class="lineno">  604</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00605"></a><span class="lineno">  605</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CIPSTART=\&quot;&quot;</span>);</div>
+<div class="line"><a name="l00606"></a><span class="lineno">  606</span>&#160;    m_puart-&gt;print(type);</div>
+<div class="line"><a name="l00607"></a><span class="lineno">  607</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;\&quot;,\&quot;&quot;</span>);</div>
+<div class="line"><a name="l00608"></a><span class="lineno">  608</span>&#160;    m_puart-&gt;print(addr);</div>
+<div class="line"><a name="l00609"></a><span class="lineno">  609</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;\&quot;,&quot;</span>);</div>
+<div class="line"><a name="l00610"></a><span class="lineno">  610</span>&#160;    m_puart-&gt;println(port);</div>
+<div class="line"><a name="l00611"></a><span class="lineno">  611</span>&#160;    </div>
+<div class="line"><a name="l00612"></a><span class="lineno">  612</span>&#160;    data = recvString(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;ERROR&quot;</span>, <span class="stringliteral">&quot;ALREADY CONNECT&quot;</span>, 10000);</div>
+<div class="line"><a name="l00613"></a><span class="lineno">  613</span>&#160;    <span class="keywordflow">if</span> (data.indexOf(<span class="stringliteral">&quot;OK&quot;</span>) != -1 || data.indexOf(<span class="stringliteral">&quot;ALREADY CONNECT&quot;</span>) != -1) {</div>
+<div class="line"><a name="l00614"></a><span class="lineno">  614</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00615"></a><span class="lineno">  615</span>&#160;    }</div>
+<div class="line"><a name="l00616"></a><span class="lineno">  616</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00617"></a><span class="lineno">  617</span>&#160;}</div>
+<div class="line"><a name="l00618"></a><span class="lineno">  618</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCIPSTARTMultiple(uint8_t mux_id, String type, String addr, uint32_t port)</div>
+<div class="line"><a name="l00619"></a><span class="lineno">  619</span>&#160;{</div>
+<div class="line"><a name="l00620"></a><span class="lineno">  620</span>&#160;    String data;</div>
+<div class="line"><a name="l00621"></a><span class="lineno">  621</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00622"></a><span class="lineno">  622</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CIPSTART=&quot;</span>);</div>
+<div class="line"><a name="l00623"></a><span class="lineno">  623</span>&#160;    m_puart-&gt;print(mux_id);</div>
+<div class="line"><a name="l00624"></a><span class="lineno">  624</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;,\&quot;&quot;</span>);</div>
+<div class="line"><a name="l00625"></a><span class="lineno">  625</span>&#160;    m_puart-&gt;print(type);</div>
+<div class="line"><a name="l00626"></a><span class="lineno">  626</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;\&quot;,\&quot;&quot;</span>);</div>
+<div class="line"><a name="l00627"></a><span class="lineno">  627</span>&#160;    m_puart-&gt;print(addr);</div>
+<div class="line"><a name="l00628"></a><span class="lineno">  628</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;\&quot;,&quot;</span>);</div>
+<div class="line"><a name="l00629"></a><span class="lineno">  629</span>&#160;    m_puart-&gt;println(port);</div>
+<div class="line"><a name="l00630"></a><span class="lineno">  630</span>&#160;    </div>
+<div class="line"><a name="l00631"></a><span class="lineno">  631</span>&#160;    data = recvString(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;ERROR&quot;</span>, <span class="stringliteral">&quot;ALREADY CONNECT&quot;</span>, 10000);</div>
+<div class="line"><a name="l00632"></a><span class="lineno">  632</span>&#160;    <span class="keywordflow">if</span> (data.indexOf(<span class="stringliteral">&quot;OK&quot;</span>) != -1 || data.indexOf(<span class="stringliteral">&quot;ALREADY CONNECT&quot;</span>) != -1) {</div>
+<div class="line"><a name="l00633"></a><span class="lineno">  633</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00634"></a><span class="lineno">  634</span>&#160;    }</div>
+<div class="line"><a name="l00635"></a><span class="lineno">  635</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00636"></a><span class="lineno">  636</span>&#160;}</div>
+<div class="line"><a name="l00637"></a><span class="lineno">  637</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCIPSENDSingle(<span class="keyword">const</span> uint8_t *buffer, uint32_t len)</div>
+<div class="line"><a name="l00638"></a><span class="lineno">  638</span>&#160;{</div>
+<div class="line"><a name="l00639"></a><span class="lineno">  639</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00640"></a><span class="lineno">  640</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CIPSEND=&quot;</span>);</div>
+<div class="line"><a name="l00641"></a><span class="lineno">  641</span>&#160;    m_puart-&gt;println(len);</div>
+<div class="line"><a name="l00642"></a><span class="lineno">  642</span>&#160;    <span class="keywordflow">if</span> (recvFind(<span class="stringliteral">&quot;&gt;&quot;</span>, 5000)) {</div>
+<div class="line"><a name="l00643"></a><span class="lineno">  643</span>&#160;        rx_empty();</div>
+<div class="line"><a name="l00644"></a><span class="lineno">  644</span>&#160;        <span class="keywordflow">for</span> (uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line"><a name="l00645"></a><span class="lineno">  645</span>&#160;            m_puart-&gt;write(buffer[i]);</div>
+<div class="line"><a name="l00646"></a><span class="lineno">  646</span>&#160;        }</div>
+<div class="line"><a name="l00647"></a><span class="lineno">  647</span>&#160;        <span class="keywordflow">return</span> recvFind(<span class="stringliteral">&quot;SEND OK&quot;</span>, 10000);</div>
+<div class="line"><a name="l00648"></a><span class="lineno">  648</span>&#160;    }</div>
+<div class="line"><a name="l00649"></a><span class="lineno">  649</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00650"></a><span class="lineno">  650</span>&#160;}</div>
+<div class="line"><a name="l00651"></a><span class="lineno">  651</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCIPSENDMultiple(uint8_t mux_id, <span class="keyword">const</span> uint8_t *buffer, uint32_t len)</div>
+<div class="line"><a name="l00652"></a><span class="lineno">  652</span>&#160;{</div>
+<div class="line"><a name="l00653"></a><span class="lineno">  653</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00654"></a><span class="lineno">  654</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CIPSEND=&quot;</span>);</div>
+<div class="line"><a name="l00655"></a><span class="lineno">  655</span>&#160;    m_puart-&gt;print(mux_id);</div>
+<div class="line"><a name="l00656"></a><span class="lineno">  656</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;,&quot;</span>);</div>
+<div class="line"><a name="l00657"></a><span class="lineno">  657</span>&#160;    m_puart-&gt;println(len);</div>
+<div class="line"><a name="l00658"></a><span class="lineno">  658</span>&#160;    <span class="keywordflow">if</span> (recvFind(<span class="stringliteral">&quot;&gt;&quot;</span>, 5000)) {</div>
+<div class="line"><a name="l00659"></a><span class="lineno">  659</span>&#160;        rx_empty();</div>
+<div class="line"><a name="l00660"></a><span class="lineno">  660</span>&#160;        <span class="keywordflow">for</span> (uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line"><a name="l00661"></a><span class="lineno">  661</span>&#160;            m_puart-&gt;write(buffer[i]);</div>
+<div class="line"><a name="l00662"></a><span class="lineno">  662</span>&#160;        }</div>
+<div class="line"><a name="l00663"></a><span class="lineno">  663</span>&#160;        <span class="keywordflow">return</span> recvFind(<span class="stringliteral">&quot;SEND OK&quot;</span>, 10000);</div>
+<div class="line"><a name="l00664"></a><span class="lineno">  664</span>&#160;    }</div>
+<div class="line"><a name="l00665"></a><span class="lineno">  665</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00666"></a><span class="lineno">  666</span>&#160;}</div>
+<div class="line"><a name="l00667"></a><span class="lineno">  667</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCIPCLOSEMulitple(uint8_t mux_id)</div>
+<div class="line"><a name="l00668"></a><span class="lineno">  668</span>&#160;{</div>
+<div class="line"><a name="l00669"></a><span class="lineno">  669</span>&#160;    String data;</div>
+<div class="line"><a name="l00670"></a><span class="lineno">  670</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00671"></a><span class="lineno">  671</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CIPCLOSE=&quot;</span>);</div>
+<div class="line"><a name="l00672"></a><span class="lineno">  672</span>&#160;    m_puart-&gt;println(mux_id);</div>
+<div class="line"><a name="l00673"></a><span class="lineno">  673</span>&#160;    </div>
+<div class="line"><a name="l00674"></a><span class="lineno">  674</span>&#160;    data = recvString(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;link is not&quot;</span>, 5000);</div>
+<div class="line"><a name="l00675"></a><span class="lineno">  675</span>&#160;    <span class="keywordflow">if</span> (data.indexOf(<span class="stringliteral">&quot;OK&quot;</span>) != -1 || data.indexOf(<span class="stringliteral">&quot;link is not&quot;</span>) != -1) {</div>
+<div class="line"><a name="l00676"></a><span class="lineno">  676</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00677"></a><span class="lineno">  677</span>&#160;    }</div>
+<div class="line"><a name="l00678"></a><span class="lineno">  678</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00679"></a><span class="lineno">  679</span>&#160;}</div>
+<div class="line"><a name="l00680"></a><span class="lineno">  680</span>&#160;<span class="keywordtype">bool</span> ESP8266::eATCIPCLOSESingle(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00681"></a><span class="lineno">  681</span>&#160;{</div>
+<div class="line"><a name="l00682"></a><span class="lineno">  682</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00683"></a><span class="lineno">  683</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT+CIPCLOSE&quot;</span>);</div>
+<div class="line"><a name="l00684"></a><span class="lineno">  684</span>&#160;    <span class="keywordflow">return</span> recvFind(<span class="stringliteral">&quot;OK&quot;</span>, 5000);</div>
+<div class="line"><a name="l00685"></a><span class="lineno">  685</span>&#160;}</div>
+<div class="line"><a name="l00686"></a><span class="lineno">  686</span>&#160;<span class="keywordtype">bool</span> ESP8266::eATCIFSR(String &amp;list)</div>
+<div class="line"><a name="l00687"></a><span class="lineno">  687</span>&#160;{</div>
+<div class="line"><a name="l00688"></a><span class="lineno">  688</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00689"></a><span class="lineno">  689</span>&#160;    m_puart-&gt;println(<span class="stringliteral">&quot;AT+CIFSR&quot;</span>);</div>
+<div class="line"><a name="l00690"></a><span class="lineno">  690</span>&#160;    <span class="keywordflow">return</span> recvFindAndFilter(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;\r\r\n&quot;</span>, <span class="stringliteral">&quot;\r\n\r\nOK&quot;</span>, list);</div>
+<div class="line"><a name="l00691"></a><span class="lineno">  691</span>&#160;}</div>
+<div class="line"><a name="l00692"></a><span class="lineno">  692</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCIPMUX(uint8_t mode)</div>
+<div class="line"><a name="l00693"></a><span class="lineno">  693</span>&#160;{</div>
+<div class="line"><a name="l00694"></a><span class="lineno">  694</span>&#160;    String data;</div>
+<div class="line"><a name="l00695"></a><span class="lineno">  695</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00696"></a><span class="lineno">  696</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CIPMUX=&quot;</span>);</div>
+<div class="line"><a name="l00697"></a><span class="lineno">  697</span>&#160;    m_puart-&gt;println(mode);</div>
+<div class="line"><a name="l00698"></a><span class="lineno">  698</span>&#160;    </div>
+<div class="line"><a name="l00699"></a><span class="lineno">  699</span>&#160;    data = recvString(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;Link is builded&quot;</span>);</div>
+<div class="line"><a name="l00700"></a><span class="lineno">  700</span>&#160;    <span class="keywordflow">if</span> (data.indexOf(<span class="stringliteral">&quot;OK&quot;</span>) != -1) {</div>
+<div class="line"><a name="l00701"></a><span class="lineno">  701</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00702"></a><span class="lineno">  702</span>&#160;    }</div>
+<div class="line"><a name="l00703"></a><span class="lineno">  703</span>&#160;    <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00704"></a><span class="lineno">  704</span>&#160;}</div>
+<div class="line"><a name="l00705"></a><span class="lineno">  705</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCIPSERVER(uint8_t mode, uint32_t port)</div>
+<div class="line"><a name="l00706"></a><span class="lineno">  706</span>&#160;{</div>
+<div class="line"><a name="l00707"></a><span class="lineno">  707</span>&#160;    String data;</div>
+<div class="line"><a name="l00708"></a><span class="lineno">  708</span>&#160;    <span class="keywordflow">if</span> (mode) {</div>
+<div class="line"><a name="l00709"></a><span class="lineno">  709</span>&#160;        rx_empty();</div>
+<div class="line"><a name="l00710"></a><span class="lineno">  710</span>&#160;        m_puart-&gt;print(<span class="stringliteral">&quot;AT+CIPSERVER=1,&quot;</span>);</div>
+<div class="line"><a name="l00711"></a><span class="lineno">  711</span>&#160;        m_puart-&gt;println(port);</div>
+<div class="line"><a name="l00712"></a><span class="lineno">  712</span>&#160;        </div>
+<div class="line"><a name="l00713"></a><span class="lineno">  713</span>&#160;        data = recvString(<span class="stringliteral">&quot;OK&quot;</span>, <span class="stringliteral">&quot;no change&quot;</span>);</div>
+<div class="line"><a name="l00714"></a><span class="lineno">  714</span>&#160;        <span class="keywordflow">if</span> (data.indexOf(<span class="stringliteral">&quot;OK&quot;</span>) != -1 || data.indexOf(<span class="stringliteral">&quot;no change&quot;</span>) != -1) {</div>
+<div class="line"><a name="l00715"></a><span class="lineno">  715</span>&#160;            <span class="keywordflow">return</span> <span class="keyword">true</span>;</div>
+<div class="line"><a name="l00716"></a><span class="lineno">  716</span>&#160;        }</div>
+<div class="line"><a name="l00717"></a><span class="lineno">  717</span>&#160;        <span class="keywordflow">return</span> <span class="keyword">false</span>;</div>
+<div class="line"><a name="l00718"></a><span class="lineno">  718</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00719"></a><span class="lineno">  719</span>&#160;        rx_empty();</div>
+<div class="line"><a name="l00720"></a><span class="lineno">  720</span>&#160;        m_puart-&gt;println(<span class="stringliteral">&quot;AT+CIPSERVER=0&quot;</span>);</div>
+<div class="line"><a name="l00721"></a><span class="lineno">  721</span>&#160;        <span class="keywordflow">return</span> recvFind(<span class="stringliteral">&quot;\r\r\n&quot;</span>);</div>
+<div class="line"><a name="l00722"></a><span class="lineno">  722</span>&#160;    }</div>
+<div class="line"><a name="l00723"></a><span class="lineno">  723</span>&#160;}</div>
+<div class="line"><a name="l00724"></a><span class="lineno">  724</span>&#160;<span class="keywordtype">bool</span> ESP8266::sATCIPSTO(uint32_t timeout)</div>
+<div class="line"><a name="l00725"></a><span class="lineno">  725</span>&#160;{</div>
+<div class="line"><a name="l00726"></a><span class="lineno">  726</span>&#160;    rx_empty();</div>
+<div class="line"><a name="l00727"></a><span class="lineno">  727</span>&#160;    m_puart-&gt;print(<span class="stringliteral">&quot;AT+CIPSTO=&quot;</span>);</div>
+<div class="line"><a name="l00728"></a><span class="lineno">  728</span>&#160;    m_puart-&gt;println(timeout);</div>
+<div class="line"><a name="l00729"></a><span class="lineno">  729</span>&#160;    <span class="keywordflow">return</span> recvFind(<span class="stringliteral">&quot;OK&quot;</span>);</div>
+<div class="line"><a name="l00730"></a><span class="lineno">  730</span>&#160;}</div>
+<div class="line"><a name="l00731"></a><span class="lineno">  731</span>&#160;</div>
+<div class="ttc" id="class_e_s_p8266_html_a6ba21b921a7afc79a36d0e41c20d59bc"><div class="ttname"><a href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266::send</a></div><div class="ttdeci">bool send(const uint8_t *buffer, uint32_t len)</div><div class="ttdoc">Send data based on TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00261">ESP8266.cpp:261</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac15ce9df69dc566c37b3fa2c3c869337"><div class="ttname"><a href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">ESP8266::releaseTCP</a></div><div class="ttdeci">bool releaseTCP(void)</div><div class="ttdoc">Release TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00196">ESP8266.cpp:196</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8ce40bd14556bcfb5d4c521047fc821"><div class="ttname"><a href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266::recv</a></div><div class="ttdeci">uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</div><div class="ttdoc">Receive data from TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00271">ESP8266.cpp:271</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a16963a076b80906563d2269c0cd52007"><div class="ttname"><a href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">ESP8266::enableMUX</a></div><div class="ttdeci">bool enableMUX(void)</div><div class="ttdoc">Enable IP MUX(multiple connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00181">ESP8266.cpp:181</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a247706884d60e85c8983bb65de26d346"><div class="ttname"><a href="class_e_s_p8266.html#a247706884d60e85c8983bb65de26d346">ESP8266::setOprToSoftAP</a></div><div class="ttdeci">bool setOprToSoftAP(void)</div><div class="ttdoc">Set operation mode to softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00104">ESP8266.cpp:104</a></div></div>
+<div class="ttc" id="_e_s_p8266_8h_html"><div class="ttname"><a href="_e_s_p8266_8h.html">ESP8266.h</a></div><div class="ttdoc">The definition of class ESP8266. </div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac179183a46b218609a481747bcfd5a61"><div class="ttname"><a href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266::setOprToStationSoftAP</a></div><div class="ttdeci">bool setOprToStationSoftAP(void)</div><div class="ttdoc">Set operation mode to station + softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00121">ESP8266.cpp:121</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa927b7b8aaef163011015c22da1f07e2"><div class="ttname"><a href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">ESP8266::createTCP</a></div><div class="ttdeci">bool createTCP(String addr, uint32_t port)</div><div class="ttdoc">Create TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00191">ESP8266.cpp:191</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa355332a78aa5f2b58cb11b0daa05cf5"><div class="ttname"><a href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">ESP8266::unregisterUDP</a></div><div class="ttdeci">bool unregisterUDP(void)</div><div class="ttdoc">Unregister UDP port number in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00206">ESP8266.cpp:206</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a88d9a6b130b6c278fd6cd2e6cda816d7"><div class="ttname"><a href="class_e_s_p8266.html#a88d9a6b130b6c278fd6cd2e6cda816d7">ESP8266::startServer</a></div><div class="ttdeci">bool startServer(uint32_t port=333)</div><div class="ttdoc">Start Server(Only in multiple mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00251">ESP8266.cpp:251</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa5355dce05aa59b92ce9f7ea76d86eef"><div class="ttname"><a href="class_e_s_p8266.html#aa5355dce05aa59b92ce9f7ea76d86eef">ESP8266::stopTCPServer</a></div><div class="ttdeci">bool stopTCPServer(void)</div><div class="ttdoc">Stop TCP Server(Only in multiple mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00244">ESP8266.cpp:244</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af272f2f57b7b99434e257f06c276acfc"><div class="ttname"><a href="class_e_s_p8266.html#af272f2f57b7b99434e257f06c276acfc">ESP8266::stopServer</a></div><div class="ttdeci">bool stopServer(void)</div><div class="ttdoc">Stop Server(Only in multiple mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00256">ESP8266.cpp:256</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a2bc64145329ea45018e956b97ced030a"><div class="ttname"><a href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">ESP8266::disableMUX</a></div><div class="ttdeci">bool disableMUX(void)</div><div class="ttdoc">Disable IP MUX(single connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00186">ESP8266.cpp:186</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a04b61a01af4ee5e8820c9de79b4b3c39"><div class="ttname"><a href="class_e_s_p8266.html#a04b61a01af4ee5e8820c9de79b4b3c39">ESP8266::restart</a></div><div class="ttdeci">bool restart(void)</div><div class="ttdoc">Restart ESP8266 by "AT+RST". </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00063">ESP8266.cpp:63</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a5ed71947606435c3b03b73efdaf810a5"><div class="ttname"><a href="class_e_s_p8266.html#a5ed71947606435c3b03b73efdaf810a5">ESP8266::kick</a></div><div class="ttdeci">bool kick(void)</div><div class="ttdoc">Verify ESP8266 whether live or not. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00058">ESP8266.cpp:58</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8d3305a28d862c0cf353d0d758b96d4"><div class="ttname"><a href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">ESP8266::registerUDP</a></div><div class="ttdeci">bool registerUDP(String addr, uint32_t port)</div><div class="ttdoc">Register UDP port number in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00201">ESP8266.cpp:201</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aeda29748e0d28efa9d82c9c7fab1859b"><div class="ttname"><a href="class_e_s_p8266.html#aeda29748e0d28efa9d82c9c7fab1859b">ESP8266::leaveAP</a></div><div class="ttdeci">bool leaveAP(void)</div><div class="ttdoc">Leave AP joined before. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00150">ESP8266.cpp:150</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a71f76c76d23fc66c26f1c7b357f58ac2"><div class="ttname"><a href="class_e_s_p8266.html#a71f76c76d23fc66c26f1c7b357f58ac2">ESP8266::setTCPServerTimeout</a></div><div class="ttdeci">bool setTCPServerTimeout(uint32_t timeout=180)</div><div class="ttdoc">Set the timeout of TCP Server. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00231">ESP8266.cpp:231</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a22a7768a76709c8d8f0b9809158b7ec9"><div class="ttname"><a href="class_e_s_p8266.html#a22a7768a76709c8d8f0b9809158b7ec9">ESP8266::startTCPServer</a></div><div class="ttdeci">bool startTCPServer(uint32_t port=333)</div><div class="ttdoc">Start TCP Server(Only in multiple mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00236">ESP8266.cpp:236</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aacce786dc0ef289cd37a48642d2efef1"><div class="ttname"><a href="class_e_s_p8266.html#aacce786dc0ef289cd37a48642d2efef1">ESP8266::setSoftAPParam</a></div><div class="ttdeci">bool setSoftAPParam(String ssid, String pwd, uint8_t chl=7, uint8_t ecn=4)</div><div class="ttdoc">Set SoftAP parameters. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00155">ESP8266.cpp:155</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a572c6f855d70078fdbff9ac2c4b1ce99"><div class="ttname"><a href="class_e_s_p8266.html#a572c6f855d70078fdbff9ac2c4b1ce99">ESP8266::setOprToStation</a></div><div class="ttdeci">bool setOprToStation(void)</div><div class="ttdoc">Set operation mode to staion. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00087">ESP8266.cpp:87</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af0cafe8a994349e81e75a35af9645a76"><div class="ttname"><a href="class_e_s_p8266.html#af0cafe8a994349e81e75a35af9645a76">ESP8266::getAPList</a></div><div class="ttdeci">String getAPList(void)</div><div class="ttdoc">Search available AP list and return it. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00138">ESP8266.cpp:138</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ad273286fbb8627a612249a232d53ca22"><div class="ttname"><a href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">ESP8266::getIPStatus</a></div><div class="ttdeci">String getIPStatus(void)</div><div class="ttdoc">Get the current status of connection(UDP and TCP). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00167">ESP8266.cpp:167</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a10c82a5196a8f349720a9c9ba7209a6e"><div class="ttname"><a href="class_e_s_p8266.html#a10c82a5196a8f349720a9c9ba7209a6e">ESP8266::getJoinedDeviceIP</a></div><div class="ttdeci">String getJoinedDeviceIP(void)</div><div class="ttdoc">Get the IP list of devices connected to SoftAP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00160">ESP8266.cpp:160</a></div></div>
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8h.html
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+<p>The definition of class <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>.  
+<a href="#details">More...</a></p>
+<div class="textblock"><code>#include &quot;Arduino.h&quot;</code><br />
+</div>
+<p><a href="_e_s_p8266_8h_source.html">Go to the source code of this file.</a></p>
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+Classes</h2></td></tr>
+<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td></tr>
+<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Provide an easy-to-use way to manipulate <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>.  <a href="class_e_s_p8266.html#details">More...</a><br /></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
+<div class="textblock"><p>The definition of class <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>. </p>
+<dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. </dd></dl>
+
+<p>Definition in file <a class="el" href="_e_s_p8266_8h_source.html">ESP8266.h</a>.</p>
+</div></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8h_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8h_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_e_s_p8266_8h_source.html	(revision 136)
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+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
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+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
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+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
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+<div class="header">
+  <div class="headertitle">
+<div class="title">ESP8266.h</div>  </div>
+</div><!--header-->
+<div class="contents">
+<a href="_e_s_p8266_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;<span class="preprocessor">#ifndef __ESP8266_H__</span></div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;<span class="preprocessor">#define __ESP8266_H__</span></div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;</div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="preprocessor">#include &quot;Arduino.h&quot;</span></div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;</div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;</div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<span class="comment">//#define ESP8266_USE_SOFTWARE_SERIAL</span></div>
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+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;</div>
+<div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;<span class="preprocessor">#ifdef ESP8266_USE_SOFTWARE_SERIAL</span></div>
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+<div class="line"><a name="l00038"></a><span class="lineno"><a class="line" href="class_e_s_p8266.html">   38</a></span>&#160;<span class="keyword">class </span><a class="code" href="class_e_s_p8266.html">ESP8266</a> {</div>
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+<div class="ttc" id="class_e_s_p8266_html_a6ba21b921a7afc79a36d0e41c20d59bc"><div class="ttname"><a href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266::send</a></div><div class="ttdeci">bool send(const uint8_t *buffer, uint32_t len)</div><div class="ttdoc">Send data based on TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00261">ESP8266.cpp:261</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac15ce9df69dc566c37b3fa2c3c869337"><div class="ttname"><a href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">ESP8266::releaseTCP</a></div><div class="ttdeci">bool releaseTCP(void)</div><div class="ttdoc">Release TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00196">ESP8266.cpp:196</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8ce40bd14556bcfb5d4c521047fc821"><div class="ttname"><a href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266::recv</a></div><div class="ttdeci">uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</div><div class="ttdoc">Receive data from TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00271">ESP8266.cpp:271</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a16963a076b80906563d2269c0cd52007"><div class="ttname"><a href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">ESP8266::enableMUX</a></div><div class="ttdeci">bool enableMUX(void)</div><div class="ttdoc">Enable IP MUX(multiple connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00181">ESP8266.cpp:181</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a247706884d60e85c8983bb65de26d346"><div class="ttname"><a href="class_e_s_p8266.html#a247706884d60e85c8983bb65de26d346">ESP8266::setOprToSoftAP</a></div><div class="ttdeci">bool setOprToSoftAP(void)</div><div class="ttdoc">Set operation mode to softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00104">ESP8266.cpp:104</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac179183a46b218609a481747bcfd5a61"><div class="ttname"><a href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266::setOprToStationSoftAP</a></div><div class="ttdeci">bool setOprToStationSoftAP(void)</div><div class="ttdoc">Set operation mode to station + softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00121">ESP8266.cpp:121</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa927b7b8aaef163011015c22da1f07e2"><div class="ttname"><a href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">ESP8266::createTCP</a></div><div class="ttdeci">bool createTCP(String addr, uint32_t port)</div><div class="ttdoc">Create TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00191">ESP8266.cpp:191</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa355332a78aa5f2b58cb11b0daa05cf5"><div class="ttname"><a href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">ESP8266::unregisterUDP</a></div><div class="ttdeci">bool unregisterUDP(void)</div><div class="ttdoc">Unregister UDP port number in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00206">ESP8266.cpp:206</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a88d9a6b130b6c278fd6cd2e6cda816d7"><div class="ttname"><a href="class_e_s_p8266.html#a88d9a6b130b6c278fd6cd2e6cda816d7">ESP8266::startServer</a></div><div class="ttdeci">bool startServer(uint32_t port=333)</div><div class="ttdoc">Start Server(Only in multiple mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00251">ESP8266.cpp:251</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa5355dce05aa59b92ce9f7ea76d86eef"><div class="ttname"><a href="class_e_s_p8266.html#aa5355dce05aa59b92ce9f7ea76d86eef">ESP8266::stopTCPServer</a></div><div class="ttdeci">bool stopTCPServer(void)</div><div class="ttdoc">Stop TCP Server(Only in multiple mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00244">ESP8266.cpp:244</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af272f2f57b7b99434e257f06c276acfc"><div class="ttname"><a href="class_e_s_p8266.html#af272f2f57b7b99434e257f06c276acfc">ESP8266::stopServer</a></div><div class="ttdeci">bool stopServer(void)</div><div class="ttdoc">Stop Server(Only in multiple mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00256">ESP8266.cpp:256</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a2bc64145329ea45018e956b97ced030a"><div class="ttname"><a href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">ESP8266::disableMUX</a></div><div class="ttdeci">bool disableMUX(void)</div><div class="ttdoc">Disable IP MUX(single connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00186">ESP8266.cpp:186</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a04b61a01af4ee5e8820c9de79b4b3c39"><div class="ttname"><a href="class_e_s_p8266.html#a04b61a01af4ee5e8820c9de79b4b3c39">ESP8266::restart</a></div><div class="ttdeci">bool restart(void)</div><div class="ttdoc">Restart ESP8266 by "AT+RST". </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00063">ESP8266.cpp:63</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a5ed71947606435c3b03b73efdaf810a5"><div class="ttname"><a href="class_e_s_p8266.html#a5ed71947606435c3b03b73efdaf810a5">ESP8266::kick</a></div><div class="ttdeci">bool kick(void)</div><div class="ttdoc">Verify ESP8266 whether live or not. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00058">ESP8266.cpp:58</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8d3305a28d862c0cf353d0d758b96d4"><div class="ttname"><a href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">ESP8266::registerUDP</a></div><div class="ttdeci">bool registerUDP(String addr, uint32_t port)</div><div class="ttdoc">Register UDP port number in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00201">ESP8266.cpp:201</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aeda29748e0d28efa9d82c9c7fab1859b"><div class="ttname"><a href="class_e_s_p8266.html#aeda29748e0d28efa9d82c9c7fab1859b">ESP8266::leaveAP</a></div><div class="ttdeci">bool leaveAP(void)</div><div class="ttdoc">Leave AP joined before. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00150">ESP8266.cpp:150</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a71f76c76d23fc66c26f1c7b357f58ac2"><div class="ttname"><a href="class_e_s_p8266.html#a71f76c76d23fc66c26f1c7b357f58ac2">ESP8266::setTCPServerTimeout</a></div><div class="ttdeci">bool setTCPServerTimeout(uint32_t timeout=180)</div><div class="ttdoc">Set the timeout of TCP Server. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00231">ESP8266.cpp:231</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a22a7768a76709c8d8f0b9809158b7ec9"><div class="ttname"><a href="class_e_s_p8266.html#a22a7768a76709c8d8f0b9809158b7ec9">ESP8266::startTCPServer</a></div><div class="ttdeci">bool startTCPServer(uint32_t port=333)</div><div class="ttdoc">Start TCP Server(Only in multiple mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00236">ESP8266.cpp:236</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aacce786dc0ef289cd37a48642d2efef1"><div class="ttname"><a href="class_e_s_p8266.html#aacce786dc0ef289cd37a48642d2efef1">ESP8266::setSoftAPParam</a></div><div class="ttdeci">bool setSoftAPParam(String ssid, String pwd, uint8_t chl=7, uint8_t ecn=4)</div><div class="ttdoc">Set SoftAP parameters. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00155">ESP8266.cpp:155</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a572c6f855d70078fdbff9ac2c4b1ce99"><div class="ttname"><a href="class_e_s_p8266.html#a572c6f855d70078fdbff9ac2c4b1ce99">ESP8266::setOprToStation</a></div><div class="ttdeci">bool setOprToStation(void)</div><div class="ttdoc">Set operation mode to staion. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00087">ESP8266.cpp:87</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af0cafe8a994349e81e75a35af9645a76"><div class="ttname"><a href="class_e_s_p8266.html#af0cafe8a994349e81e75a35af9645a76">ESP8266::getAPList</a></div><div class="ttdeci">String getAPList(void)</div><div class="ttdoc">Search available AP list and return it. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00138">ESP8266.cpp:138</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ad273286fbb8627a612249a232d53ca22"><div class="ttname"><a href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">ESP8266::getIPStatus</a></div><div class="ttdeci">String getIPStatus(void)</div><div class="ttdoc">Get the current status of connection(UDP and TCP). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00167">ESP8266.cpp:167</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a10c82a5196a8f349720a9c9ba7209a6e"><div class="ttname"><a href="class_e_s_p8266.html#a10c82a5196a8f349720a9c9ba7209a6e">ESP8266::getJoinedDeviceIP</a></div><div class="ttdeci">String getJoinedDeviceIP(void)</div><div class="ttdoc">Get the IP list of devices connected to SoftAP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00160">ESP8266.cpp:160</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_h_t_t_p_g_e_t_8ino-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_h_t_t_p_g_e_t_8ino-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_h_t_t_p_g_e_t_8ino-example.html	(revision 136)
@@ -0,0 +1,135 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: HTTPGET.ino</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">HTTPGET.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The HTTPGET demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.03</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"><div class="line"></div>
+<div class="line"><span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_NAME   &quot;www.baidu.com&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_PORT   (80)</span></div>
+<div class="line"></div>
+<div class="line"><a name="_a0"></a><a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"></div>
+<div class="line"><span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    Serial.begin(9600);</div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"></div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line">    Serial.println(wifi.<a name="a1"></a><a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line"></div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a2"></a><a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"></div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a3"></a><a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line"></div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;IP:&quot;</span>);</div>
+<div class="line">        Serial.println( wifi.<a name="a4"></a><a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a5"></a><a class="code" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">disableMUX</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;single ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;single err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    uint8_t buffer[1024] = {0};</div>
+<div class="line"></div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a6"></a><a class="code" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a>(HOST_NAME, HOST_PORT)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;create tcp ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;create tcp err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"></div>
+<div class="line">    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;GET / HTTP/1.1\r\nHost: www.baidu.com\r\nConnection: close\r\n\r\n&quot;</span>;</div>
+<div class="line">    wifi.<a name="a7"></a><a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>((<span class="keyword">const</span> uint8_t*)hello, strlen(hello));</div>
+<div class="line"></div>
+<div class="line">    uint32_t len = wifi.<a name="a8"></a><a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(buffer, <span class="keyword">sizeof</span>(buffer), 10000);</div>
+<div class="line">    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Received:[&quot;</span>);</div>
+<div class="line">        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line">            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line">        }</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"></div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a9"></a><a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;release tcp ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;release tcp err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">while</span>(1);</div>
+<div class="line">    </div>
+<div class="line">}</div>
+<div class="line">     </div>
+</div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_h_t_t_p_g_e_t_8ino_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_h_t_t_p_g_e_t_8ino_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_h_t_t_p_g_e_t_8ino_source.html	(revision 136)
@@ -0,0 +1,148 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: examples/HTTPGET/HTTPGET.ino Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+<div id="nav-path" class="navpath">
+  <ul>
+<li class="navelem"><a class="el" href="dir_d28a4824dc47e487b107a5db32ef43c4.html">examples</a></li><li class="navelem"><a class="el" href="dir_e77b6112596a040608ac3c23911cc719.html">HTTPGET</a></li>  </ul>
+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">HTTPGET.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;</div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;<span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="preprocessor">#define HOST_NAME   &quot;www.baidu.com&quot;</span></div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<span class="preprocessor">#define HOST_PORT   (80)</span></div>
+<div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;</div>
+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;<a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;</div>
+<div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;<span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;{</div>
+<div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;    Serial.begin(9600);</div>
+<div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;</div>
+<div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;    Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;</div>
+<div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;    }</div>
+<div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;</div>
+<div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;</div>
+<div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;        Serial.print(<span class="stringliteral">&quot;IP:&quot;</span>);</div>
+<div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;        Serial.println( wifi.<a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
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+<div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;    </div>
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+<div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;        Serial.print(<span class="stringliteral">&quot;single ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;    } <span class="keywordflow">else</span> {</div>
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+<div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160; </div>
+<div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;<span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;{</div>
+<div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;    uint8_t buffer[1024] = {0};</div>
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+<div class="line"><a name="l00067"></a><span class="lineno">   67</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a>(HOST_NAME, HOST_PORT)) {</div>
+<div class="line"><a name="l00068"></a><span class="lineno">   68</span>&#160;        Serial.print(<span class="stringliteral">&quot;create tcp ok\r\n&quot;</span>);</div>
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+<div class="line"><a name="l00072"></a><span class="lineno">   72</span>&#160;</div>
+<div class="line"><a name="l00073"></a><span class="lineno">   73</span>&#160;    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;GET / HTTP/1.1\r\nHost: www.baidu.com\r\nConnection: close\r\n\r\n&quot;</span>;</div>
+<div class="line"><a name="l00074"></a><span class="lineno">   74</span>&#160;    wifi.<a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>((<span class="keyword">const</span> uint8_t*)hello, strlen(hello));</div>
+<div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;</div>
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+<div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;</div>
+<div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>()) {</div>
+<div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;        Serial.print(<span class="stringliteral">&quot;release tcp ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;        Serial.print(<span class="stringliteral">&quot;release tcp err\r\n&quot;</span>);</div>
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+<div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;    </div>
+<div class="line"><a name="l00091"></a><span class="lineno">   91</span>&#160;    <span class="keywordflow">while</span>(1);</div>
+<div class="line"><a name="l00092"></a><span class="lineno">   92</span>&#160;    </div>
+<div class="line"><a name="l00093"></a><span class="lineno">   93</span>&#160;}</div>
+<div class="line"><a name="l00094"></a><span class="lineno">   94</span>&#160;     </div>
+<div class="ttc" id="class_e_s_p8266_html_a6ba21b921a7afc79a36d0e41c20d59bc"><div class="ttname"><a href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266::send</a></div><div class="ttdeci">bool send(const uint8_t *buffer, uint32_t len)</div><div class="ttdoc">Send data based on TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00261">ESP8266.cpp:261</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac15ce9df69dc566c37b3fa2c3c869337"><div class="ttname"><a href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">ESP8266::releaseTCP</a></div><div class="ttdeci">bool releaseTCP(void)</div><div class="ttdoc">Release TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00196">ESP8266.cpp:196</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8ce40bd14556bcfb5d4c521047fc821"><div class="ttname"><a href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266::recv</a></div><div class="ttdeci">uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</div><div class="ttdoc">Receive data from TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00271">ESP8266.cpp:271</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="_e_s_p8266_8h_html"><div class="ttname"><a href="_e_s_p8266_8h.html">ESP8266.h</a></div><div class="ttdoc">The definition of class ESP8266. </div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac179183a46b218609a481747bcfd5a61"><div class="ttname"><a href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266::setOprToStationSoftAP</a></div><div class="ttdeci">bool setOprToStationSoftAP(void)</div><div class="ttdoc">Set operation mode to station + softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00121">ESP8266.cpp:121</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa927b7b8aaef163011015c22da1f07e2"><div class="ttname"><a href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">ESP8266::createTCP</a></div><div class="ttdeci">bool createTCP(String addr, uint32_t port)</div><div class="ttdoc">Create TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00191">ESP8266.cpp:191</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a2bc64145329ea45018e956b97ced030a"><div class="ttname"><a href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">ESP8266::disableMUX</a></div><div class="ttdeci">bool disableMUX(void)</div><div class="ttdoc">Disable IP MUX(single connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00186">ESP8266.cpp:186</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_r_e_a_d_m_e_8md_source.html
===================================================================
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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: README.md Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
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+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
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+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">README.md</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;@mainpage</div>
+<div class="line"><a name="l00002"></a><span class="lineno">    2</span>&#160;</div>
+<div class="line"><a name="l00003"></a><span class="lineno">    3</span>&#160;<span class="preprocessor"># WeeESP8266</span></div>
+<div class="line"><a name="l00004"></a><span class="lineno">    4</span>&#160;</div>
+<div class="line"><a name="l00005"></a><span class="lineno">    5</span>&#160;An <a class="code" href="class_e_s_p8266.html">ESP8266</a> library <span class="keywordflow">for</span> Arduino providing an easy-to-use way to manipulate <a class="code" href="class_e_s_p8266.html">ESP8266</a>.</div>
+<div class="line"><a name="l00006"></a><span class="lineno">    6</span>&#160;</div>
+<div class="line"><a name="l00007"></a><span class="lineno">    7</span>&#160;# Source </div>
+<div class="line"><a name="l00008"></a><span class="lineno">    8</span>&#160;</div>
+<div class="line"><a name="l00009"></a><span class="lineno">    9</span>&#160;Source can be download at &lt;https:<span class="comment">//github.com/itead/ITEADLIB_Arduino_WeeESP8266&gt;.</span></div>
+<div class="line"><a name="l00010"></a><span class="lineno">   10</span>&#160;</div>
+<div class="line"><a name="l00011"></a><span class="lineno">   11</span>&#160;You can clone it by:</div>
+<div class="line"><a name="l00012"></a><span class="lineno">   12</span>&#160;</div>
+<div class="line"><a name="l00013"></a><span class="lineno">   13</span>&#160;    git clone https:<span class="comment">//github.com/itead/ITEADLIB_Arduino_WeeESP8266.git</span></div>
+<div class="line"><a name="l00014"></a><span class="lineno">   14</span>&#160;</div>
+<div class="line"><a name="l00015"></a><span class="lineno">   15</span>&#160;<span class="preprocessor"># Documentation</span></div>
+<div class="line"><a name="l00016"></a><span class="lineno">   16</span>&#160;</div>
+<div class="line"><a name="l00017"></a><span class="lineno">   17</span>&#160;Online API documentation can be reached at &lt;http:<span class="comment">//docs.iteadstudio.com/ITEADLIB_Arduino_WeeESP8266/index.html&gt;.</span></div>
+<div class="line"><a name="l00018"></a><span class="lineno">   18</span>&#160;</div>
+<div class="line"><a name="l00019"></a><span class="lineno">   19</span>&#160;Offline API documentation can be found under directory </div>
+<div class="line"><a name="l00020"></a><span class="lineno">   20</span>&#160;[doc](https:<span class="comment">//github.com/itead/ITEADLIB_Arduino_WeeESP8266/tree/master/doc).</span></div>
+<div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;</div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;<span class="preprocessor"># How to get started</span></div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;</div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;On the home page of API documentation, the tabs of Examples, Classes and Modules </div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;will be useful <span class="keywordflow">for</span> Arduino lovers. </div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;</div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<span class="preprocessor"># API List</span></div>
+<div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;</div>
+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;    <span class="keywordtype">bool</span>    kick (<span class="keywordtype">void</span>) : Verify <a class="code" href="class_e_s_p8266.html">ESP8266</a> whether live or not.</div>
+<div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;     </div>
+<div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;    bool    restart (void) : Restart <a class="code" href="class_e_s_p8266.html">ESP8266</a> by <span class="stringliteral">&quot;AT+RST&quot;</span>.</div>
+<div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;     </div>
+<div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;    String  getVersion (void) : Get the version of AT Command Set.</div>
+<div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;     </div>
+<div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;    bool    setOprToStation (void) : Set operation mode to staion.</div>
+<div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;     </div>
+<div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;    bool    setOprToSoftAP (void) : Set operation mode to softap.</div>
+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;     </div>
+<div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;    bool    setOprToStationSoftAP (void) : Set operation mode to station + softap.</div>
+<div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;     </div>
+<div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;    String  getAPList (void) : Search available AP list and return it.</div>
+<div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;     </div>
+<div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;    bool    joinAP (String ssid, String pwd) : Join in AP. </div>
+<div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;     </div>
+<div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;    bool    leaveAP (void) : Leave AP joined before. </div>
+<div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;     </div>
+<div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;    bool    setSoftAPParam (String ssid, String pwd, uint8_t chl=7, uint8_t ecn=4) : Set SoftAP parameters. </div>
+<div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;     </div>
+<div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;    String  getJoinedDeviceIP (void) : Get the IP list of devices connected to SoftAP. </div>
+<div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;     </div>
+<div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;    String  getIPStatus (void) : Get the current status of connection(UDP and TCP). </div>
+<div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;     </div>
+<div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;    String  getLocalIP (void) : Get the IP address of <a class="code" href="class_e_s_p8266.html">ESP8266</a>. </div>
+<div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;     </div>
+<div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;    bool    enableMUX (void) : Enable IP MUX(multiple connection mode). </div>
+<div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;     </div>
+<div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;    bool    disableMUX (void) : Disable IP MUX(single connection mode). </div>
+<div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;     </div>
+<div class="line"><a name="l00059"></a><span class="lineno">   59</span>&#160;    bool    createTCP (String addr, uint32_t port) : Create TCP connection in single mode. </div>
+<div class="line"><a name="l00060"></a><span class="lineno">   60</span>&#160;     </div>
+<div class="line"><a name="l00061"></a><span class="lineno">   61</span>&#160;    bool    releaseTCP (void) : Release TCP connection in single mode. </div>
+<div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160;     </div>
+<div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;    bool    registerUDP (String addr, uint32_t port) : Register UDP port number in single mode. </div>
+<div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;     </div>
+<div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;    bool    unregisterUDP (void) : Unregister UDP port number in single mode. </div>
+<div class="line"><a name="l00066"></a><span class="lineno">   66</span>&#160;     </div>
+<div class="line"><a name="l00067"></a><span class="lineno">   67</span>&#160;    bool    createTCP (uint8_t mux_id, String addr, uint32_t port) : Create TCP connection in multiple mode. </div>
+<div class="line"><a name="l00068"></a><span class="lineno">   68</span>&#160;     </div>
+<div class="line"><a name="l00069"></a><span class="lineno">   69</span>&#160;    bool    releaseTCP (uint8_t mux_id) : Release TCP connection in multiple mode. </div>
+<div class="line"><a name="l00070"></a><span class="lineno">   70</span>&#160;     </div>
+<div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160;    bool    registerUDP (uint8_t mux_id, String addr, uint32_t port) : Register UDP port number in multiple mode. </div>
+<div class="line"><a name="l00072"></a><span class="lineno">   72</span>&#160;     </div>
+<div class="line"><a name="l00073"></a><span class="lineno">   73</span>&#160;    bool    unregisterUDP (uint8_t mux_id) : Unregister UDP port number in multiple mode. </div>
+<div class="line"><a name="l00074"></a><span class="lineno">   74</span>&#160;     </div>
+<div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;    bool    setTCPServerTimeout (uint32_t timeout=180) : Set the timeout of TCP Server. </div>
+<div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;    </div>
+<div class="line"><a name="l00077"></a><span class="lineno">   77</span>&#160;    bool    startServer (uint32_t port=333) ï¼ Start Server(Only in multiple mode).</div>
+<div class="line"><a name="l00078"></a><span class="lineno">   78</span>&#160;</div>
+<div class="line"><a name="l00079"></a><span class="lineno">   79</span>&#160;    bool    stopServer (void) : Stop Server(Only in multiple mode).</div>
+<div class="line"><a name="l00080"></a><span class="lineno">   80</span>&#160; </div>
+<div class="line"><a name="l00081"></a><span class="lineno">   81</span>&#160;    bool    startTCPServer (uint32_t port=333) : Start TCP Server(Only in multiple mode). </div>
+<div class="line"><a name="l00082"></a><span class="lineno">   82</span>&#160;     </div>
+<div class="line"><a name="l00083"></a><span class="lineno">   83</span>&#160;    bool    stopTCPServer (void) : Stop TCP Server(Only in multiple mode). </div>
+<div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;     </div>
+<div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;    bool    send (const uint8_t *buffer, uint32_t len) : Send data based on TCP or UDP builded already in single mode. </div>
+<div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;     </div>
+<div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;    bool    send (uint8_t mux_id, const uint8_t *buffer, uint32_t len) : Send data based on one of TCP or UDP builded already in multiple mode. </div>
+<div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;     </div>
+<div class="line"><a name="l00089"></a><span class="lineno">   89</span>&#160;    uint32_t    recv (uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000) : Receive data from TCP or UDP builded already in single mode. </div>
+<div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;     </div>
+<div class="line"><a name="l00091"></a><span class="lineno">   91</span>&#160;    uint32_t    recv (uint8_t mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000) : Receive data from one of TCP or UDP builded already in multiple mode. </div>
+<div class="line"><a name="l00092"></a><span class="lineno">   92</span>&#160;     </div>
+<div class="line"><a name="l00093"></a><span class="lineno">   93</span>&#160;    uint32_t    recv (uint8_t *coming_mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000) : Receive data from all of TCP or UDP builded already in multiple mode. </div>
+<div class="line"><a name="l00094"></a><span class="lineno">   94</span>&#160;</div>
+<div class="line"><a name="l00095"></a><span class="lineno">   95</span>&#160;</div>
+<div class="line"><a name="l00096"></a><span class="lineno">   96</span>&#160;# Mainboard Requires</div>
+<div class="line"><a name="l00097"></a><span class="lineno">   97</span>&#160;</div>
+<div class="line"><a name="l00098"></a><span class="lineno">   98</span>&#160;  - RAM: not less than 2KBytes</div>
+<div class="line"><a name="l00099"></a><span class="lineno">   99</span>&#160;  - Serial: one serial (HardwareSerial or SoftwareSerial) at least </div>
+<div class="line"><a name="l00100"></a><span class="lineno">  100</span>&#160;</div>
+<div class="line"><a name="l00101"></a><span class="lineno">  101</span>&#160;# Suppported Mainboards</div>
+<div class="line"><a name="l00102"></a><span class="lineno">  102</span>&#160;  </div>
+<div class="line"><a name="l00103"></a><span class="lineno">  103</span>&#160;  - Arduino UNO and its derivatives</div>
+<div class="line"><a name="l00104"></a><span class="lineno">  104</span>&#160;  - Arduino MEGA and its derivatives</div>
+<div class="line"><a name="l00105"></a><span class="lineno">  105</span>&#160;  - [Iteaduino UNO](http:<span class="comment">//imall.iteadstudio.com/im130312001.html)</span></div>
+<div class="line"><a name="l00106"></a><span class="lineno">  106</span>&#160;  - [WBoard Pro](http:<span class="comment">//imall.iteadstudio.com/im141125005.html)</span></div>
+<div class="line"><a name="l00107"></a><span class="lineno">  107</span>&#160;</div>
+<div class="line"><a name="l00108"></a><span class="lineno">  108</span>&#160;# Using SoftwareSerial</div>
+<div class="line"><a name="l00109"></a><span class="lineno">  109</span>&#160;</div>
+<div class="line"><a name="l00110"></a><span class="lineno">  110</span>&#160;If you want to use SoftwareSerial to communicate with <a class="code" href="class_e_s_p8266.html">ESP8266</a>, you need to modify</div>
+<div class="line"><a name="l00111"></a><span class="lineno">  111</span>&#160;the line in file `<a class="code" href="class_e_s_p8266.html">ESP8266</a>.h`: </div>
+<div class="line"><a name="l00112"></a><span class="lineno">  112</span>&#160;</div>
+<div class="line"><a name="l00113"></a><span class="lineno">  113</span>&#160;    <span class="comment">//#define ESP8266_USE_SOFTWARE_SERIAL</span></div>
+<div class="line"><a name="l00114"></a><span class="lineno">  114</span>&#160;</div>
+<div class="line"><a name="l00115"></a><span class="lineno">  115</span>&#160;After modification, it should be:</div>
+<div class="line"><a name="l00116"></a><span class="lineno">  116</span>&#160;</div>
+<div class="line"><a name="l00117"></a><span class="lineno">  117</span>&#160;    #define ESP8266_USE_SOFTWARE_SERIAL</div>
+<div class="line"><a name="l00118"></a><span class="lineno">  118</span>&#160;</div>
+<div class="line"><a name="l00119"></a><span class="lineno">  119</span>&#160;</div>
+<div class="line"><a name="l00120"></a><span class="lineno">  120</span>&#160;# Hardware Connection</div>
+<div class="line"><a name="l00121"></a><span class="lineno">  121</span>&#160;</div>
+<div class="line"><a name="l00122"></a><span class="lineno">  122</span>&#160;WeeESP8266 library only needs an uart for hardware connection. All communications </div>
+<div class="line"><a name="l00123"></a><span class="lineno">  123</span>&#160;are done via uart. In each example, you must specify the uart used by mainboard </div>
+<div class="line"><a name="l00124"></a><span class="lineno">  124</span>&#160;to communicate with <a class="code" href="class_e_s_p8266.html">ESP8266</a> flashed AT firmware.</div>
+<div class="line"><a name="l00125"></a><span class="lineno">  125</span>&#160;</div>
+<div class="line"><a name="l00126"></a><span class="lineno">  126</span>&#160;## MEGA and WBoard Pro</div>
+<div class="line"><a name="l00127"></a><span class="lineno">  127</span>&#160;</div>
+<div class="line"><a name="l00128"></a><span class="lineno">  128</span>&#160;For MEGA and WBoard Pro, `Serial1` will be used if you create an object (named wifi) </div>
+<div class="line"><a name="l00129"></a><span class="lineno">  129</span>&#160;of class <a class="code" href="class_e_s_p8266.html">ESP8266</a> in your code like this:</div>
+<div class="line"><a name="l00130"></a><span class="lineno">  130</span>&#160;</div>
+<div class="line"><a name="l00131"></a><span class="lineno">  131</span>&#160;    #include <span class="stringliteral">&quot;ESP8266.h&quot;</span></div>
+<div class="line"><a name="l00132"></a><span class="lineno">  132</span>&#160;    <a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"><a name="l00133"></a><span class="lineno">  133</span>&#160;</div>
+<div class="line"><a name="l00134"></a><span class="lineno">  134</span>&#160;The connection should be like these:</div>
+<div class="line"><a name="l00135"></a><span class="lineno">  135</span>&#160;</div>
+<div class="line"><a name="l00136"></a><span class="lineno">  136</span>&#160;    ESP8266_TX-&gt;RX1(D19)</div>
+<div class="line"><a name="l00137"></a><span class="lineno">  137</span>&#160;    ESP8266_RX-&gt;TX1(D18)</div>
+<div class="line"><a name="l00138"></a><span class="lineno">  138</span>&#160;    ESP8266_CH_PD-&gt;3.3V</div>
+<div class="line"><a name="l00139"></a><span class="lineno">  139</span>&#160;    ESP8266_VCC-&gt;3.3V</div>
+<div class="line"><a name="l00140"></a><span class="lineno">  140</span>&#160;    ESP8266_GND-&gt;GND</div>
+<div class="line"><a name="l00141"></a><span class="lineno">  141</span>&#160;</div>
+<div class="line"><a name="l00142"></a><span class="lineno">  142</span>&#160;<span class="preprocessor">## UNO</span></div>
+<div class="line"><a name="l00143"></a><span class="lineno">  143</span>&#160;</div>
+<div class="line"><a name="l00144"></a><span class="lineno">  144</span>&#160;To use SoftwareSerial, `mySerial` will be used <span class="keywordflow">if</span> you create an object (named wifi)</div>
+<div class="line"><a name="l00145"></a><span class="lineno">  145</span>&#160;of <span class="keyword">class </span><a class="code" href="class_e_s_p8266.html">ESP8266</a> in your code like this:</div>
+<div class="line"><a name="l00146"></a><span class="lineno">  146</span>&#160;</div>
+<div class="line"><a name="l00147"></a><span class="lineno">  147</span>&#160;<span class="preprocessor">    #include &quot;ESP8266.h&quot;</span></div>
+<div class="line"><a name="l00148"></a><span class="lineno">  148</span>&#160;<span class="preprocessor">    #include &lt;SoftwareSerial.h&gt;</span></div>
+<div class="line"><a name="l00149"></a><span class="lineno">  149</span>&#160;    </div>
+<div class="line"><a name="l00150"></a><span class="lineno">  150</span>&#160;    SoftwareSerial mySerial(3, 2); <span class="comment">/* RX:D3, TX:D2 */</span></div>
+<div class="line"><a name="l00151"></a><span class="lineno">  151</span>&#160;    <a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(mySerial);</div>
+<div class="line"><a name="l00152"></a><span class="lineno">  152</span>&#160;</div>
+<div class="line"><a name="l00153"></a><span class="lineno">  153</span>&#160;The connection should be like these:</div>
+<div class="line"><a name="l00154"></a><span class="lineno">  154</span>&#160;</div>
+<div class="line"><a name="l00155"></a><span class="lineno">  155</span>&#160;    ESP8266_TX-&gt;RX(D3)</div>
+<div class="line"><a name="l00156"></a><span class="lineno">  156</span>&#160;    ESP8266_RX-&gt;TX(D2)</div>
+<div class="line"><a name="l00157"></a><span class="lineno">  157</span>&#160;    ESP8266_CH_PD-&gt;3.3V</div>
+<div class="line"><a name="l00158"></a><span class="lineno">  158</span>&#160;    ESP8266_VCC-&gt;3.3V</div>
+<div class="line"><a name="l00159"></a><span class="lineno">  159</span>&#160;    ESP8266_GND-&gt;GND</div>
+<div class="line"><a name="l00160"></a><span class="lineno">  160</span>&#160;    </div>
+<div class="line"><a name="l00161"></a><span class="lineno">  161</span>&#160;<span class="preprocessor"># Attention</span></div>
+<div class="line"><a name="l00162"></a><span class="lineno">  162</span>&#160;</div>
+<div class="line"><a name="l00163"></a><span class="lineno">  163</span>&#160;The size of data from <a class="code" href="class_e_s_p8266.html">ESP8266</a> is too big for arduino sometimes, so the library can&#39;t</div>
+<div class="line"><a name="l00164"></a><span class="lineno">  164</span>&#160;receive the whole buffer because the size of the hardware serial buffer which is </div>
+<div class="line"><a name="l00165"></a><span class="lineno">  165</span>&#160;defined in HardwareSerial.h is too small.</div>
+<div class="line"><a name="l00166"></a><span class="lineno">  166</span>&#160;</div>
+<div class="line"><a name="l00167"></a><span class="lineno">  167</span>&#160;Open the file from `\arduino\hardware\arduino\avr\cores\arduino\HardwareSerial.h`. </div>
+<div class="line"><a name="l00168"></a><span class="lineno">  168</span>&#160;See the follow line in the HardwareSerial.h file.</div>
+<div class="line"><a name="l00169"></a><span class="lineno">  169</span>&#160;</div>
+<div class="line"><a name="l00170"></a><span class="lineno">  170</span>&#160;<span class="preprocessor">    #define SERIAL_BUFFER_SIZE 64</span></div>
+<div class="line"><a name="l00171"></a><span class="lineno">  171</span>&#160;</div>
+<div class="line"><a name="l00172"></a><span class="lineno">  172</span>&#160;The default size of the buffer is 64. Change it into a bigger number, like 256 or more.</div>
+<div class="line"><a name="l00173"></a><span class="lineno">  173</span>&#160;</div>
+<div class="line"><a name="l00174"></a><span class="lineno">  174</span>&#160;</div>
+<div class="line"><a name="l00175"></a><span class="lineno">  175</span>&#160;-------------------------------------------------------------------------------</div>
+<div class="line"><a name="l00176"></a><span class="lineno">  176</span>&#160;</div>
+<div class="line"><a name="l00177"></a><span class="lineno">  177</span>&#160;<span class="preprocessor"># The End!</span></div>
+<div class="line"><a name="l00178"></a><span class="lineno">  178</span>&#160;</div>
+<div class="line"><a name="l00179"></a><span class="lineno">  179</span>&#160;-------------------------------------------------------------------------------</div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
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+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_multiple_8cpp-example.html
===================================================================
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+  <div class="headertitle">
+<div class="title">TCPClientMultiple.cpp</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The TCPClientMultiple demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"></div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:26:27 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_multiple_8ino-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_multiple_8ino-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_multiple_8ino-example.html	(revision 136)
@@ -0,0 +1,152 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: TCPClientMultiple.ino</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPClientMultiple.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The TCPClientMultiple demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"><div class="line"></div>
+<div class="line"><span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_PORT   (8090)</span></div>
+<div class="line"></div>
+<div class="line"><a name="_a0"></a><a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"></div>
+<div class="line"><span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    Serial.begin(9600);</div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"></div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;FW Version: &quot;</span>);</div>
+<div class="line">    Serial.println(wifi.<a name="a1"></a><a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line">    </div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a2"></a><a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"></div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a3"></a><a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);       </div>
+<div class="line">        Serial.println(wifi.<a name="a4"></a><a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a5"></a><a class="code" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">enableMUX</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;multiple ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;multiple err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line">}</div>
+<div class="line"></div>
+<div class="line"><span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    uint8_t buffer[128] = {0};</div>
+<div class="line">    <span class="keyword">static</span> uint8_t mux_id = 0;</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a6"></a><a class="code" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a>(mux_id, HOST_NAME, HOST_PORT)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;create tcp &quot;</span>);</div>
+<div class="line">        Serial.print(mux_id);</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot; ok&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;create tcp &quot;</span>);</div>
+<div class="line">        Serial.print(mux_id);</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot; err&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"></div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;Hello, this is client!&quot;</span>;</div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a7"></a><a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>(mux_id, (<span class="keyword">const</span> uint8_t*)hello, strlen(hello))) {</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot;send ok&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot;send err&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    uint32_t len = wifi.<a name="a8"></a><a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(mux_id, buffer, <span class="keyword">sizeof</span>(buffer), 10000);</div>
+<div class="line">    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Received:[&quot;</span>);</div>
+<div class="line">        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line">            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line">        }</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"> </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a9"></a><a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>(mux_id)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;release tcp &quot;</span>);</div>
+<div class="line">        Serial.print(mux_id);</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot; ok&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;release tcp &quot;</span>);</div>
+<div class="line">        Serial.print(mux_id);</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot; err&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">  </div>
+<div class="line">    delay(3000);</div>
+<div class="line">    mux_id++;</div>
+<div class="line">    <span class="keywordflow">if</span> (mux_id &gt;= 5) {</div>
+<div class="line">        mux_id = 0;</div>
+<div class="line">    }</div>
+<div class="line">}</div>
+<div class="line"></div>
+</div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_multiple_8ino_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_multiple_8ino_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_multiple_8ino_source.html	(revision 136)
@@ -0,0 +1,165 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: examples/TCPClientMultiple/TCPClientMultiple.ino Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+<div id="nav-path" class="navpath">
+  <ul>
+<li class="navelem"><a class="el" href="dir_d28a4824dc47e487b107a5db32ef43c4.html">examples</a></li><li class="navelem"><a class="el" href="dir_f7dc4f4aec738992f977d5b3021cb4e4.html">TCPClientMultiple</a></li>  </ul>
+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPClientMultiple.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;</div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;<span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;<span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="preprocessor">#define HOST_PORT   (8090)</span></div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;</div>
+<div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;<a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;</div>
+<div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;<span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;{</div>
+<div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;    Serial.begin(9600);</div>
+<div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;</div>
+<div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;    Serial.print(<span class="stringliteral">&quot;FW Version: &quot;</span>);</div>
+<div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;    Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;    </div>
+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;    </div>
+<div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;    }</div>
+<div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;</div>
+<div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);       </div>
+<div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;        Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());</div>
+<div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;    }</div>
+<div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;    </div>
+<div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">enableMUX</a>()) {</div>
+<div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;        Serial.print(<span class="stringliteral">&quot;multiple ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;        Serial.print(<span class="stringliteral">&quot;multiple err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;    }</div>
+<div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;    </div>
+<div class="line"><a name="l00059"></a><span class="lineno">   59</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line"><a name="l00060"></a><span class="lineno">   60</span>&#160;}</div>
+<div class="line"><a name="l00061"></a><span class="lineno">   61</span>&#160;</div>
+<div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160;<span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;{</div>
+<div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;    uint8_t buffer[128] = {0};</div>
+<div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;    <span class="keyword">static</span> uint8_t mux_id = 0;</div>
+<div class="line"><a name="l00066"></a><span class="lineno">   66</span>&#160;    </div>
+<div class="line"><a name="l00067"></a><span class="lineno">   67</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a>(mux_id, HOST_NAME, HOST_PORT)) {</div>
+<div class="line"><a name="l00068"></a><span class="lineno">   68</span>&#160;        Serial.print(<span class="stringliteral">&quot;create tcp &quot;</span>);</div>
+<div class="line"><a name="l00069"></a><span class="lineno">   69</span>&#160;        Serial.print(mux_id);</div>
+<div class="line"><a name="l00070"></a><span class="lineno">   70</span>&#160;        Serial.println(<span class="stringliteral">&quot; ok&quot;</span>);</div>
+<div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00072"></a><span class="lineno">   72</span>&#160;        Serial.print(<span class="stringliteral">&quot;create tcp &quot;</span>);</div>
+<div class="line"><a name="l00073"></a><span class="lineno">   73</span>&#160;        Serial.print(mux_id);</div>
+<div class="line"><a name="l00074"></a><span class="lineno">   74</span>&#160;        Serial.println(<span class="stringliteral">&quot; err&quot;</span>);</div>
+<div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;    }</div>
+<div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;</div>
+<div class="line"><a name="l00077"></a><span class="lineno">   77</span>&#160;    </div>
+<div class="line"><a name="l00078"></a><span class="lineno">   78</span>&#160;    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;Hello, this is client!&quot;</span>;</div>
+<div class="line"><a name="l00079"></a><span class="lineno">   79</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>(mux_id, (<span class="keyword">const</span> uint8_t*)hello, strlen(hello))) {</div>
+<div class="line"><a name="l00080"></a><span class="lineno">   80</span>&#160;        Serial.println(<span class="stringliteral">&quot;send ok&quot;</span>);</div>
+<div class="line"><a name="l00081"></a><span class="lineno">   81</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00082"></a><span class="lineno">   82</span>&#160;        Serial.println(<span class="stringliteral">&quot;send err&quot;</span>);</div>
+<div class="line"><a name="l00083"></a><span class="lineno">   83</span>&#160;    }</div>
+<div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;    </div>
+<div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;    uint32_t len = wifi.<a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(mux_id, buffer, <span class="keyword">sizeof</span>(buffer), 10000);</div>
+<div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;        Serial.print(<span class="stringliteral">&quot;Received:[&quot;</span>);</div>
+<div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line"><a name="l00089"></a><span class="lineno">   89</span>&#160;            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;        }</div>
+<div class="line"><a name="l00091"></a><span class="lineno">   91</span>&#160;        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line"><a name="l00092"></a><span class="lineno">   92</span>&#160;    }</div>
+<div class="line"><a name="l00093"></a><span class="lineno">   93</span>&#160; </div>
+<div class="line"><a name="l00094"></a><span class="lineno">   94</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>(mux_id)) {</div>
+<div class="line"><a name="l00095"></a><span class="lineno">   95</span>&#160;        Serial.print(<span class="stringliteral">&quot;release tcp &quot;</span>);</div>
+<div class="line"><a name="l00096"></a><span class="lineno">   96</span>&#160;        Serial.print(mux_id);</div>
+<div class="line"><a name="l00097"></a><span class="lineno">   97</span>&#160;        Serial.println(<span class="stringliteral">&quot; ok&quot;</span>);</div>
+<div class="line"><a name="l00098"></a><span class="lineno">   98</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00099"></a><span class="lineno">   99</span>&#160;        Serial.print(<span class="stringliteral">&quot;release tcp &quot;</span>);</div>
+<div class="line"><a name="l00100"></a><span class="lineno">  100</span>&#160;        Serial.print(mux_id);</div>
+<div class="line"><a name="l00101"></a><span class="lineno">  101</span>&#160;        Serial.println(<span class="stringliteral">&quot; err&quot;</span>);</div>
+<div class="line"><a name="l00102"></a><span class="lineno">  102</span>&#160;    }</div>
+<div class="line"><a name="l00103"></a><span class="lineno">  103</span>&#160;  </div>
+<div class="line"><a name="l00104"></a><span class="lineno">  104</span>&#160;    delay(3000);</div>
+<div class="line"><a name="l00105"></a><span class="lineno">  105</span>&#160;    mux_id++;</div>
+<div class="line"><a name="l00106"></a><span class="lineno">  106</span>&#160;    <span class="keywordflow">if</span> (mux_id &gt;= 5) {</div>
+<div class="line"><a name="l00107"></a><span class="lineno">  107</span>&#160;        mux_id = 0;</div>
+<div class="line"><a name="l00108"></a><span class="lineno">  108</span>&#160;    }</div>
+<div class="line"><a name="l00109"></a><span class="lineno">  109</span>&#160;}</div>
+<div class="line"><a name="l00110"></a><span class="lineno">  110</span>&#160;</div>
+<div class="ttc" id="class_e_s_p8266_html_a6ba21b921a7afc79a36d0e41c20d59bc"><div class="ttname"><a href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266::send</a></div><div class="ttdeci">bool send(const uint8_t *buffer, uint32_t len)</div><div class="ttdoc">Send data based on TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00261">ESP8266.cpp:261</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac15ce9df69dc566c37b3fa2c3c869337"><div class="ttname"><a href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">ESP8266::releaseTCP</a></div><div class="ttdeci">bool releaseTCP(void)</div><div class="ttdoc">Release TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00196">ESP8266.cpp:196</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8ce40bd14556bcfb5d4c521047fc821"><div class="ttname"><a href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266::recv</a></div><div class="ttdeci">uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</div><div class="ttdoc">Receive data from TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00271">ESP8266.cpp:271</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a16963a076b80906563d2269c0cd52007"><div class="ttname"><a href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">ESP8266::enableMUX</a></div><div class="ttdeci">bool enableMUX(void)</div><div class="ttdoc">Enable IP MUX(multiple connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00181">ESP8266.cpp:181</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="_e_s_p8266_8h_html"><div class="ttname"><a href="_e_s_p8266_8h.html">ESP8266.h</a></div><div class="ttdoc">The definition of class ESP8266. </div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac179183a46b218609a481747bcfd5a61"><div class="ttname"><a href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266::setOprToStationSoftAP</a></div><div class="ttdeci">bool setOprToStationSoftAP(void)</div><div class="ttdoc">Set operation mode to station + softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00121">ESP8266.cpp:121</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa927b7b8aaef163011015c22da1f07e2"><div class="ttname"><a href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">ESP8266::createTCP</a></div><div class="ttdeci">bool createTCP(String addr, uint32_t port)</div><div class="ttdoc">Create TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00191">ESP8266.cpp:191</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_8cpp-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_8cpp-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_8cpp-example.html	(revision 136)
@@ -0,0 +1,62 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: TCPClientSingle.cpp</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="modules.html"><span>Modules</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPClientSingle.cpp</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The TCPClientSingle demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"></div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:26:27 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_8ino-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_8ino-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_8ino-example.html	(revision 136)
@@ -0,0 +1,132 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: TCPClientSingle.ino</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPClientSingle.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The TCPClientSingle demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"><div class="line"></div>
+<div class="line"><span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_PORT   (8090)</span></div>
+<div class="line"></div>
+<div class="line"><a name="_a0"></a><a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"></div>
+<div class="line"><span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    Serial.begin(9600);</div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line">    Serial.println(wifi.<a name="a1"></a><a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line">      </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a2"></a><a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"> </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a3"></a><a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;IP:&quot;</span>);</div>
+<div class="line">        Serial.println( wifi.<a name="a4"></a><a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a5"></a><a class="code" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">disableMUX</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;single ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;single err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    uint8_t buffer[128] = {0};</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a6"></a><a class="code" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a>(HOST_NAME, HOST_PORT)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;create tcp ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;create tcp err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;Hello, this is client!&quot;</span>;</div>
+<div class="line">    wifi.<a name="a7"></a><a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>((<span class="keyword">const</span> uint8_t*)hello, strlen(hello));</div>
+<div class="line">    </div>
+<div class="line">    uint32_t len = wifi.<a name="a8"></a><a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(buffer, <span class="keyword">sizeof</span>(buffer), 10000);</div>
+<div class="line">    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Received:[&quot;</span>);</div>
+<div class="line">        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line">            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line">        }</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a9"></a><a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;release tcp ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;release tcp err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    delay(5000);</div>
+<div class="line">}</div>
+<div class="line">     </div>
+</div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_8ino_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_8ino_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_8ino_source.html	(revision 136)
@@ -0,0 +1,145 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: examples/TCPClientSingle/TCPClientSingle.ino Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+<div id="nav-path" class="navpath">
+  <ul>
+<li class="navelem"><a class="el" href="dir_d28a4824dc47e487b107a5db32ef43c4.html">examples</a></li><li class="navelem"><a class="el" href="dir_8897193998642bcd5bfc513741e45982.html">TCPClientSingle</a></li>  </ul>
+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPClientSingle.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;</div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;<span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;<span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="preprocessor">#define HOST_PORT   (8090)</span></div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;</div>
+<div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;<a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;</div>
+<div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;<span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;{</div>
+<div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;    Serial.begin(9600);</div>
+<div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;    </div>
+<div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;    Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;      </div>
+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;    }</div>
+<div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160; </div>
+<div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;        Serial.print(<span class="stringliteral">&quot;IP:&quot;</span>);</div>
+<div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;        Serial.println( wifi.<a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;    }</div>
+<div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;    </div>
+<div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">disableMUX</a>()) {</div>
+<div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;        Serial.print(<span class="stringliteral">&quot;single ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;        Serial.print(<span class="stringliteral">&quot;single err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;    }</div>
+<div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;    </div>
+<div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line"><a name="l00059"></a><span class="lineno">   59</span>&#160;}</div>
+<div class="line"><a name="l00060"></a><span class="lineno">   60</span>&#160; </div>
+<div class="line"><a name="l00061"></a><span class="lineno">   61</span>&#160;<span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160;{</div>
+<div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;    uint8_t buffer[128] = {0};</div>
+<div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;    </div>
+<div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a>(HOST_NAME, HOST_PORT)) {</div>
+<div class="line"><a name="l00066"></a><span class="lineno">   66</span>&#160;        Serial.print(<span class="stringliteral">&quot;create tcp ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00067"></a><span class="lineno">   67</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00068"></a><span class="lineno">   68</span>&#160;        Serial.print(<span class="stringliteral">&quot;create tcp err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00069"></a><span class="lineno">   69</span>&#160;    }</div>
+<div class="line"><a name="l00070"></a><span class="lineno">   70</span>&#160;    </div>
+<div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160;    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;Hello, this is client!&quot;</span>;</div>
+<div class="line"><a name="l00072"></a><span class="lineno">   72</span>&#160;    wifi.<a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>((<span class="keyword">const</span> uint8_t*)hello, strlen(hello));</div>
+<div class="line"><a name="l00073"></a><span class="lineno">   73</span>&#160;    </div>
+<div class="line"><a name="l00074"></a><span class="lineno">   74</span>&#160;    uint32_t len = wifi.<a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(buffer, <span class="keyword">sizeof</span>(buffer), 10000);</div>
+<div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;        Serial.print(<span class="stringliteral">&quot;Received:[&quot;</span>);</div>
+<div class="line"><a name="l00077"></a><span class="lineno">   77</span>&#160;        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line"><a name="l00078"></a><span class="lineno">   78</span>&#160;            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line"><a name="l00079"></a><span class="lineno">   79</span>&#160;        }</div>
+<div class="line"><a name="l00080"></a><span class="lineno">   80</span>&#160;        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line"><a name="l00081"></a><span class="lineno">   81</span>&#160;    }</div>
+<div class="line"><a name="l00082"></a><span class="lineno">   82</span>&#160;    </div>
+<div class="line"><a name="l00083"></a><span class="lineno">   83</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>()) {</div>
+<div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;        Serial.print(<span class="stringliteral">&quot;release tcp ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;        Serial.print(<span class="stringliteral">&quot;release tcp err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;    }</div>
+<div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;    delay(5000);</div>
+<div class="line"><a name="l00089"></a><span class="lineno">   89</span>&#160;}</div>
+<div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;     </div>
+<div class="ttc" id="class_e_s_p8266_html_a6ba21b921a7afc79a36d0e41c20d59bc"><div class="ttname"><a href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266::send</a></div><div class="ttdeci">bool send(const uint8_t *buffer, uint32_t len)</div><div class="ttdoc">Send data based on TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00261">ESP8266.cpp:261</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac15ce9df69dc566c37b3fa2c3c869337"><div class="ttname"><a href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">ESP8266::releaseTCP</a></div><div class="ttdeci">bool releaseTCP(void)</div><div class="ttdoc">Release TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00196">ESP8266.cpp:196</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8ce40bd14556bcfb5d4c521047fc821"><div class="ttname"><a href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266::recv</a></div><div class="ttdeci">uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</div><div class="ttdoc">Receive data from TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00271">ESP8266.cpp:271</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="_e_s_p8266_8h_html"><div class="ttname"><a href="_e_s_p8266_8h.html">ESP8266.h</a></div><div class="ttdoc">The definition of class ESP8266. </div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac179183a46b218609a481747bcfd5a61"><div class="ttname"><a href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266::setOprToStationSoftAP</a></div><div class="ttdeci">bool setOprToStationSoftAP(void)</div><div class="ttdoc">Set operation mode to station + softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00121">ESP8266.cpp:121</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa927b7b8aaef163011015c22da1f07e2"><div class="ttname"><a href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">ESP8266::createTCP</a></div><div class="ttdeci">bool createTCP(String addr, uint32_t port)</div><div class="ttdoc">Create TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00191">ESP8266.cpp:191</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a2bc64145329ea45018e956b97ced030a"><div class="ttname"><a href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">ESP8266::disableMUX</a></div><div class="ttdeci">bool disableMUX(void)</div><div class="ttdoc">Disable IP MUX(single connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00186">ESP8266.cpp:186</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_u_n_o_8ino-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_u_n_o_8ino-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_u_n_o_8ino-example.html	(revision 136)
@@ -0,0 +1,134 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: TCPClientSingleUNO.ino</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPClientSingleUNO.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The TCPClientSingleUNO demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.03</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"><div class="line"></div>
+<div class="line"><span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"><span class="preprocessor">#include &lt;SoftwareSerial.h&gt;</span></div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_PORT   (8090)</span></div>
+<div class="line"></div>
+<div class="line">SoftwareSerial mySerial(3, 2); <span class="comment">/* RX:D3, TX:D2 */</span></div>
+<div class="line"><a name="_a0"></a><a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(mySerial);</div>
+<div class="line"></div>
+<div class="line"><span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    Serial.begin(9600);</div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line">    Serial.println(wifi.<a name="a1"></a><a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line">      </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a2"></a><a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"> </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a3"></a><a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;IP:&quot;</span>);</div>
+<div class="line">        Serial.println( wifi.<a name="a4"></a><a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a5"></a><a class="code" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">disableMUX</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;single ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;single err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    uint8_t buffer[128] = {0};</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a6"></a><a class="code" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a>(HOST_NAME, HOST_PORT)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;create tcp ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;create tcp err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;Hello, this is client!&quot;</span>;</div>
+<div class="line">    wifi.<a name="a7"></a><a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>((<span class="keyword">const</span> uint8_t*)hello, strlen(hello));</div>
+<div class="line">    </div>
+<div class="line">    uint32_t len = wifi.<a name="a8"></a><a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(buffer, <span class="keyword">sizeof</span>(buffer), 10000);</div>
+<div class="line">    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Received:[&quot;</span>);</div>
+<div class="line">        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line">            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line">        }</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a9"></a><a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;release tcp ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;release tcp err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    delay(5000);</div>
+<div class="line">}</div>
+<div class="line">     </div>
+</div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_u_n_o_8ino_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_u_n_o_8ino_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_client_single_u_n_o_8ino_source.html	(revision 136)
@@ -0,0 +1,147 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: examples/TCPClientSingleUNO/TCPClientSingleUNO.ino Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+<div id="nav-path" class="navpath">
+  <ul>
+<li class="navelem"><a class="el" href="dir_d28a4824dc47e487b107a5db32ef43c4.html">examples</a></li><li class="navelem"><a class="el" href="dir_7baf3e2c0fad72d16e1aad0d74b4aab1.html">TCPClientSingleUNO</a></li>  </ul>
+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPClientSingleUNO.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;<span class="preprocessor">#include &lt;SoftwareSerial.h&gt;</span></div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;</div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;<span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<span class="preprocessor">#define HOST_PORT   (8090)</span></div>
+<div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;</div>
+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;SoftwareSerial mySerial(3, 2); <span class="comment">/* RX:D3, TX:D2 */</span></div>
+<div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;<a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(mySerial);</div>
+<div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;</div>
+<div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;<span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;{</div>
+<div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;    Serial.begin(9600);</div>
+<div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;    </div>
+<div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;    Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;      </div>
+<div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;    }</div>
+<div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160; </div>
+<div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;        Serial.print(<span class="stringliteral">&quot;IP:&quot;</span>);</div>
+<div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;        Serial.println( wifi.<a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;    }</div>
+<div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;    </div>
+<div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">disableMUX</a>()) {</div>
+<div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;        Serial.print(<span class="stringliteral">&quot;single ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;        Serial.print(<span class="stringliteral">&quot;single err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;    }</div>
+<div class="line"><a name="l00059"></a><span class="lineno">   59</span>&#160;    </div>
+<div class="line"><a name="l00060"></a><span class="lineno">   60</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line"><a name="l00061"></a><span class="lineno">   61</span>&#160;}</div>
+<div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160; </div>
+<div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;<span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;{</div>
+<div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;    uint8_t buffer[128] = {0};</div>
+<div class="line"><a name="l00066"></a><span class="lineno">   66</span>&#160;    </div>
+<div class="line"><a name="l00067"></a><span class="lineno">   67</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a>(HOST_NAME, HOST_PORT)) {</div>
+<div class="line"><a name="l00068"></a><span class="lineno">   68</span>&#160;        Serial.print(<span class="stringliteral">&quot;create tcp ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00069"></a><span class="lineno">   69</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00070"></a><span class="lineno">   70</span>&#160;        Serial.print(<span class="stringliteral">&quot;create tcp err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160;    }</div>
+<div class="line"><a name="l00072"></a><span class="lineno">   72</span>&#160;    </div>
+<div class="line"><a name="l00073"></a><span class="lineno">   73</span>&#160;    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;Hello, this is client!&quot;</span>;</div>
+<div class="line"><a name="l00074"></a><span class="lineno">   74</span>&#160;    wifi.<a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>((<span class="keyword">const</span> uint8_t*)hello, strlen(hello));</div>
+<div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;    </div>
+<div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;    uint32_t len = wifi.<a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(buffer, <span class="keyword">sizeof</span>(buffer), 10000);</div>
+<div class="line"><a name="l00077"></a><span class="lineno">   77</span>&#160;    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line"><a name="l00078"></a><span class="lineno">   78</span>&#160;        Serial.print(<span class="stringliteral">&quot;Received:[&quot;</span>);</div>
+<div class="line"><a name="l00079"></a><span class="lineno">   79</span>&#160;        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line"><a name="l00080"></a><span class="lineno">   80</span>&#160;            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line"><a name="l00081"></a><span class="lineno">   81</span>&#160;        }</div>
+<div class="line"><a name="l00082"></a><span class="lineno">   82</span>&#160;        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line"><a name="l00083"></a><span class="lineno">   83</span>&#160;    }</div>
+<div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;    </div>
+<div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>()) {</div>
+<div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;        Serial.print(<span class="stringliteral">&quot;release tcp ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;        Serial.print(<span class="stringliteral">&quot;release tcp err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00089"></a><span class="lineno">   89</span>&#160;    }</div>
+<div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;    delay(5000);</div>
+<div class="line"><a name="l00091"></a><span class="lineno">   91</span>&#160;}</div>
+<div class="line"><a name="l00092"></a><span class="lineno">   92</span>&#160;     </div>
+<div class="ttc" id="class_e_s_p8266_html_a6ba21b921a7afc79a36d0e41c20d59bc"><div class="ttname"><a href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266::send</a></div><div class="ttdeci">bool send(const uint8_t *buffer, uint32_t len)</div><div class="ttdoc">Send data based on TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00261">ESP8266.cpp:261</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac15ce9df69dc566c37b3fa2c3c869337"><div class="ttname"><a href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">ESP8266::releaseTCP</a></div><div class="ttdeci">bool releaseTCP(void)</div><div class="ttdoc">Release TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00196">ESP8266.cpp:196</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8ce40bd14556bcfb5d4c521047fc821"><div class="ttname"><a href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266::recv</a></div><div class="ttdeci">uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</div><div class="ttdoc">Receive data from TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00271">ESP8266.cpp:271</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="_e_s_p8266_8h_html"><div class="ttname"><a href="_e_s_p8266_8h.html">ESP8266.h</a></div><div class="ttdoc">The definition of class ESP8266. </div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac179183a46b218609a481747bcfd5a61"><div class="ttname"><a href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266::setOprToStationSoftAP</a></div><div class="ttdeci">bool setOprToStationSoftAP(void)</div><div class="ttdoc">Set operation mode to station + softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00121">ESP8266.cpp:121</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa927b7b8aaef163011015c22da1f07e2"><div class="ttname"><a href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">ESP8266::createTCP</a></div><div class="ttdeci">bool createTCP(String addr, uint32_t port)</div><div class="ttdoc">Create TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00191">ESP8266.cpp:191</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a2bc64145329ea45018e956b97ced030a"><div class="ttname"><a href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">ESP8266::disableMUX</a></div><div class="ttdeci">bool disableMUX(void)</div><div class="ttdoc">Disable IP MUX(single connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00186">ESP8266.cpp:186</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_server_8cpp-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_server_8cpp-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_server_8cpp-example.html	(revision 136)
@@ -0,0 +1,62 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: TCPServer.cpp</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="modules.html"><span>Modules</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPServer.cpp</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The TCPServer demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"></div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:26:27 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_server_8ino-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_server_8ino-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_server_8ino-example.html	(revision 136)
@@ -0,0 +1,152 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: TCPServer.ino</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPServer.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The TCPServer demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"><div class="line"></div>
+<div class="line"><span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"></div>
+<div class="line"><a name="_a0"></a><a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"></div>
+<div class="line"><span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    Serial.begin(9600);</div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line">    Serial.println(wifi.<a name="a1"></a><a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line">      </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a2"></a><a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"> </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a3"></a><a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);</div>
+<div class="line">        Serial.println(wifi.<a name="a4"></a><a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());    </div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a5"></a><a class="code" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">enableMUX</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;multiple ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;multiple err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a6"></a><a class="code" href="class_e_s_p8266.html#a22a7768a76709c8d8f0b9809158b7ec9">startTCPServer</a>(8090)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;start tcp server ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;start tcp server err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a7"></a><a class="code" href="class_e_s_p8266.html#a71f76c76d23fc66c26f1c7b357f58ac2">setTCPServerTimeout</a>(10)) { </div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;set tcp server timout 10 seconds\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;set tcp server timout err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    uint8_t buffer[128] = {0};</div>
+<div class="line">    uint8_t mux_id;</div>
+<div class="line">    uint32_t len = wifi.<a name="a8"></a><a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(&amp;mux_id, buffer, <span class="keyword">sizeof</span>(buffer), 100);</div>
+<div class="line">    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Status:[&quot;</span>);</div>
+<div class="line">        Serial.print(wifi.<a name="a9"></a><a class="code" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">getIPStatus</a>().c_str());</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot;]&quot;</span>);</div>
+<div class="line">        </div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Received from :&quot;</span>);</div>
+<div class="line">        Serial.print(mux_id);</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;[&quot;</span>);</div>
+<div class="line">        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line">            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line">        }</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line">        </div>
+<div class="line">        <span class="keywordflow">if</span>(wifi.<a name="a10"></a><a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>(mux_id, buffer, len)) {</div>
+<div class="line">            Serial.print(<span class="stringliteral">&quot;send back ok\r\n&quot;</span>);</div>
+<div class="line">        } <span class="keywordflow">else</span> {</div>
+<div class="line">            Serial.print(<span class="stringliteral">&quot;send back err\r\n&quot;</span>);</div>
+<div class="line">        }</div>
+<div class="line">        </div>
+<div class="line">        <span class="keywordflow">if</span> (wifi.<a name="a11"></a><a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>(mux_id)) {</div>
+<div class="line">            Serial.print(<span class="stringliteral">&quot;release tcp &quot;</span>);</div>
+<div class="line">            Serial.print(mux_id);</div>
+<div class="line">            Serial.println(<span class="stringliteral">&quot; ok&quot;</span>);</div>
+<div class="line">        } <span class="keywordflow">else</span> {</div>
+<div class="line">            Serial.print(<span class="stringliteral">&quot;release tcp&quot;</span>);</div>
+<div class="line">            Serial.print(mux_id);</div>
+<div class="line">            Serial.println(<span class="stringliteral">&quot; err&quot;</span>);</div>
+<div class="line">        }</div>
+<div class="line">        </div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Status:[&quot;</span>);</div>
+<div class="line">        Serial.print(wifi.<a class="code" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">getIPStatus</a>().c_str());</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot;]&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">}</div>
+<div class="line">        </div>
+</div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_server_8ino_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_server_8ino_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_t_c_p_server_8ino_source.html	(revision 136)
@@ -0,0 +1,167 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: examples/TCPServer/TCPServer.ino Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+<div id="nav-path" class="navpath">
+  <ul>
+<li class="navelem"><a class="el" href="dir_d28a4824dc47e487b107a5db32ef43c4.html">examples</a></li><li class="navelem"><a class="el" href="dir_d2ed1861e8b23cc7f6c17b3a49969805.html">TCPServer</a></li>  </ul>
+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPServer.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;</div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;<span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;</div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;</div>
+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;<span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;{</div>
+<div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;    Serial.begin(9600);</div>
+<div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;    </div>
+<div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;    Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;      </div>
+<div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;    }</div>
+<div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160; </div>
+<div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);</div>
+<div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;        Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());    </div>
+<div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;    }</div>
+<div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;    </div>
+<div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">enableMUX</a>()) {</div>
+<div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;        Serial.print(<span class="stringliteral">&quot;multiple ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;        Serial.print(<span class="stringliteral">&quot;multiple err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;    }</div>
+<div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;    </div>
+<div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a22a7768a76709c8d8f0b9809158b7ec9">startTCPServer</a>(8090)) {</div>
+<div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;        Serial.print(<span class="stringliteral">&quot;start tcp server ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00059"></a><span class="lineno">   59</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00060"></a><span class="lineno">   60</span>&#160;        Serial.print(<span class="stringliteral">&quot;start tcp server err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00061"></a><span class="lineno">   61</span>&#160;    }</div>
+<div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160;    </div>
+<div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a71f76c76d23fc66c26f1c7b357f58ac2">setTCPServerTimeout</a>(10)) { </div>
+<div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;        Serial.print(<span class="stringliteral">&quot;set tcp server timout 10 seconds\r\n&quot;</span>);</div>
+<div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00066"></a><span class="lineno">   66</span>&#160;        Serial.print(<span class="stringliteral">&quot;set tcp server timout err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00067"></a><span class="lineno">   67</span>&#160;    }</div>
+<div class="line"><a name="l00068"></a><span class="lineno">   68</span>&#160;    </div>
+<div class="line"><a name="l00069"></a><span class="lineno">   69</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line"><a name="l00070"></a><span class="lineno">   70</span>&#160;}</div>
+<div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160; </div>
+<div class="line"><a name="l00072"></a><span class="lineno">   72</span>&#160;<span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00073"></a><span class="lineno">   73</span>&#160;{</div>
+<div class="line"><a name="l00074"></a><span class="lineno">   74</span>&#160;    uint8_t buffer[128] = {0};</div>
+<div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;    uint8_t mux_id;</div>
+<div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;    uint32_t len = wifi.<a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(&amp;mux_id, buffer, <span class="keyword">sizeof</span>(buffer), 100);</div>
+<div class="line"><a name="l00077"></a><span class="lineno">   77</span>&#160;    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line"><a name="l00078"></a><span class="lineno">   78</span>&#160;        Serial.print(<span class="stringliteral">&quot;Status:[&quot;</span>);</div>
+<div class="line"><a name="l00079"></a><span class="lineno">   79</span>&#160;        Serial.print(wifi.<a class="code" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">getIPStatus</a>().c_str());</div>
+<div class="line"><a name="l00080"></a><span class="lineno">   80</span>&#160;        Serial.println(<span class="stringliteral">&quot;]&quot;</span>);</div>
+<div class="line"><a name="l00081"></a><span class="lineno">   81</span>&#160;        </div>
+<div class="line"><a name="l00082"></a><span class="lineno">   82</span>&#160;        Serial.print(<span class="stringliteral">&quot;Received from :&quot;</span>);</div>
+<div class="line"><a name="l00083"></a><span class="lineno">   83</span>&#160;        Serial.print(mux_id);</div>
+<div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;        Serial.print(<span class="stringliteral">&quot;[&quot;</span>);</div>
+<div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;        }</div>
+<div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line"><a name="l00089"></a><span class="lineno">   89</span>&#160;        </div>
+<div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;        <span class="keywordflow">if</span>(wifi.<a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>(mux_id, buffer, len)) {</div>
+<div class="line"><a name="l00091"></a><span class="lineno">   91</span>&#160;            Serial.print(<span class="stringliteral">&quot;send back ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00092"></a><span class="lineno">   92</span>&#160;        } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00093"></a><span class="lineno">   93</span>&#160;            Serial.print(<span class="stringliteral">&quot;send back err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00094"></a><span class="lineno">   94</span>&#160;        }</div>
+<div class="line"><a name="l00095"></a><span class="lineno">   95</span>&#160;        </div>
+<div class="line"><a name="l00096"></a><span class="lineno">   96</span>&#160;        <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>(mux_id)) {</div>
+<div class="line"><a name="l00097"></a><span class="lineno">   97</span>&#160;            Serial.print(<span class="stringliteral">&quot;release tcp &quot;</span>);</div>
+<div class="line"><a name="l00098"></a><span class="lineno">   98</span>&#160;            Serial.print(mux_id);</div>
+<div class="line"><a name="l00099"></a><span class="lineno">   99</span>&#160;            Serial.println(<span class="stringliteral">&quot; ok&quot;</span>);</div>
+<div class="line"><a name="l00100"></a><span class="lineno">  100</span>&#160;        } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00101"></a><span class="lineno">  101</span>&#160;            Serial.print(<span class="stringliteral">&quot;release tcp&quot;</span>);</div>
+<div class="line"><a name="l00102"></a><span class="lineno">  102</span>&#160;            Serial.print(mux_id);</div>
+<div class="line"><a name="l00103"></a><span class="lineno">  103</span>&#160;            Serial.println(<span class="stringliteral">&quot; err&quot;</span>);</div>
+<div class="line"><a name="l00104"></a><span class="lineno">  104</span>&#160;        }</div>
+<div class="line"><a name="l00105"></a><span class="lineno">  105</span>&#160;        </div>
+<div class="line"><a name="l00106"></a><span class="lineno">  106</span>&#160;        Serial.print(<span class="stringliteral">&quot;Status:[&quot;</span>);</div>
+<div class="line"><a name="l00107"></a><span class="lineno">  107</span>&#160;        Serial.print(wifi.<a class="code" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">getIPStatus</a>().c_str());</div>
+<div class="line"><a name="l00108"></a><span class="lineno">  108</span>&#160;        Serial.println(<span class="stringliteral">&quot;]&quot;</span>);</div>
+<div class="line"><a name="l00109"></a><span class="lineno">  109</span>&#160;    }</div>
+<div class="line"><a name="l00110"></a><span class="lineno">  110</span>&#160;}</div>
+<div class="line"><a name="l00111"></a><span class="lineno">  111</span>&#160;        </div>
+<div class="ttc" id="class_e_s_p8266_html_a6ba21b921a7afc79a36d0e41c20d59bc"><div class="ttname"><a href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266::send</a></div><div class="ttdeci">bool send(const uint8_t *buffer, uint32_t len)</div><div class="ttdoc">Send data based on TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00261">ESP8266.cpp:261</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac15ce9df69dc566c37b3fa2c3c869337"><div class="ttname"><a href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">ESP8266::releaseTCP</a></div><div class="ttdeci">bool releaseTCP(void)</div><div class="ttdoc">Release TCP connection in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00196">ESP8266.cpp:196</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8ce40bd14556bcfb5d4c521047fc821"><div class="ttname"><a href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266::recv</a></div><div class="ttdeci">uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</div><div class="ttdoc">Receive data from TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00271">ESP8266.cpp:271</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a16963a076b80906563d2269c0cd52007"><div class="ttname"><a href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">ESP8266::enableMUX</a></div><div class="ttdeci">bool enableMUX(void)</div><div class="ttdoc">Enable IP MUX(multiple connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00181">ESP8266.cpp:181</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="_e_s_p8266_8h_html"><div class="ttname"><a href="_e_s_p8266_8h.html">ESP8266.h</a></div><div class="ttdoc">The definition of class ESP8266. </div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac179183a46b218609a481747bcfd5a61"><div class="ttname"><a href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266::setOprToStationSoftAP</a></div><div class="ttdeci">bool setOprToStationSoftAP(void)</div><div class="ttdoc">Set operation mode to station + softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00121">ESP8266.cpp:121</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a71f76c76d23fc66c26f1c7b357f58ac2"><div class="ttname"><a href="class_e_s_p8266.html#a71f76c76d23fc66c26f1c7b357f58ac2">ESP8266::setTCPServerTimeout</a></div><div class="ttdeci">bool setTCPServerTimeout(uint32_t timeout=180)</div><div class="ttdoc">Set the timeout of TCP Server. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00231">ESP8266.cpp:231</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a22a7768a76709c8d8f0b9809158b7ec9"><div class="ttname"><a href="class_e_s_p8266.html#a22a7768a76709c8d8f0b9809158b7ec9">ESP8266::startTCPServer</a></div><div class="ttdeci">bool startTCPServer(uint32_t port=333)</div><div class="ttdoc">Start TCP Server(Only in multiple mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00236">ESP8266.cpp:236</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_ad273286fbb8627a612249a232d53ca22"><div class="ttname"><a href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">ESP8266::getIPStatus</a></div><div class="ttdeci">String getIPStatus(void)</div><div class="ttdoc">Get the current status of connection(UDP and TCP). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00167">ESP8266.cpp:167</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_multiple_8cpp-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_multiple_8cpp-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_multiple_8cpp-example.html	(revision 136)
@@ -0,0 +1,62 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: UDPClientMultiple.cpp</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="modules.html"><span>Modules</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">UDPClientMultiple.cpp</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The UDPClientMultiple demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"></div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:26:27 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_multiple_8ino-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_multiple_8ino-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_multiple_8ino-example.html	(revision 136)
@@ -0,0 +1,145 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: UDPClientMultiple.ino</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">UDPClientMultiple.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The UDPClientMultiple demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"><div class="line"></div>
+<div class="line"><span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_PORT   (5416)</span></div>
+<div class="line"></div>
+<div class="line"><a name="_a0"></a><a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    Serial.begin(9600);</div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line">    Serial.println(wifi.<a name="a1"></a><a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line">      </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a2"></a><a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"> </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a3"></a><a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);</div>
+<div class="line">        Serial.println(wifi.<a name="a4"></a><a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a5"></a><a class="code" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">enableMUX</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;multiple ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;multiple err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    uint8_t buffer[128] = {0};</div>
+<div class="line">    <span class="keyword">static</span> uint8_t mux_id = 0;</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a6"></a><a class="code" href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">registerUDP</a>(mux_id, HOST_NAME, HOST_PORT)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;register udp &quot;</span>);</div>
+<div class="line">        Serial.print(mux_id);</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot; ok&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;register udp &quot;</span>);</div>
+<div class="line">        Serial.print(mux_id);</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot; err&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;Hello, this is client!&quot;</span>;</div>
+<div class="line">    wifi.<a name="a7"></a><a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>(mux_id, (<span class="keyword">const</span> uint8_t*)hello, strlen(hello));</div>
+<div class="line">    </div>
+<div class="line">    uint32_t len = wifi.<a name="a8"></a><a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(mux_id, buffer, <span class="keyword">sizeof</span>(buffer), 10000);</div>
+<div class="line">    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Received:[&quot;</span>);</div>
+<div class="line">        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line">            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line">        }</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a9"></a><a class="code" href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">unregisterUDP</a>(mux_id)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;unregister udp &quot;</span>);</div>
+<div class="line">        Serial.print(mux_id);</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot; ok&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;unregister udp &quot;</span>);</div>
+<div class="line">        Serial.print(mux_id);</div>
+<div class="line">        Serial.println(<span class="stringliteral">&quot; err&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    delay(5000);</div>
+<div class="line">    mux_id++;</div>
+<div class="line">    <span class="keywordflow">if</span> (mux_id &gt;= 5) {</div>
+<div class="line">        mux_id = 0;</div>
+<div class="line">    }</div>
+<div class="line">}</div>
+<div class="line">            </div>
+</div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_multiple_8ino_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_multiple_8ino_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_multiple_8ino_source.html	(revision 136)
@@ -0,0 +1,158 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: examples/UDPClientMultiple/UDPClientMultiple.ino Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
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+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
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+      <li><a href="files.html"><span>File&#160;List</span></a></li>
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+<div id="nav-path" class="navpath">
+  <ul>
+<li class="navelem"><a class="el" href="dir_d28a4824dc47e487b107a5db32ef43c4.html">examples</a></li><li class="navelem"><a class="el" href="dir_5890e445ff7904d5f0f55dc78452c21e.html">UDPClientMultiple</a></li>  </ul>
+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">UDPClientMultiple.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;</div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;<span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<span class="preprocessor">#define HOST_PORT   (5416)</span></div>
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+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;<a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
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+<div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;<span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;{</div>
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+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;      </div>
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+<div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);</div>
+<div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;        Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;    } <span class="keywordflow">else</span> {</div>
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+<div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;    }</div>
+<div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;    </div>
+<div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">enableMUX</a>()) {</div>
+<div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;        Serial.print(<span class="stringliteral">&quot;multiple ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;        Serial.print(<span class="stringliteral">&quot;multiple err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;    }</div>
+<div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;    </div>
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+<div class="line"><a name="l00061"></a><span class="lineno">   61</span>&#160; </div>
+<div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160;<span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;{</div>
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+<div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160;    } <span class="keywordflow">else</span> {</div>
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+<div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;    }</div>
+<div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;    </div>
+<div class="line"><a name="l00077"></a><span class="lineno">   77</span>&#160;    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;Hello, this is client!&quot;</span>;</div>
+<div class="line"><a name="l00078"></a><span class="lineno">   78</span>&#160;    wifi.<a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>(mux_id, (<span class="keyword">const</span> uint8_t*)hello, strlen(hello));</div>
+<div class="line"><a name="l00079"></a><span class="lineno">   79</span>&#160;    </div>
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+<div class="line"><a name="l00081"></a><span class="lineno">   81</span>&#160;    <span class="keywordflow">if</span> (len &gt; 0) {</div>
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+<div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;        }</div>
+<div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;    }</div>
+<div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;    </div>
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+<div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;        Serial.print(<span class="stringliteral">&quot;unregister udp &quot;</span>);</div>
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+<div class="line"><a name="l00093"></a><span class="lineno">   93</span>&#160;    } <span class="keywordflow">else</span> {</div>
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+<div class="line"><a name="l00102"></a><span class="lineno">  102</span>&#160;    }</div>
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+<div class="ttc" id="class_e_s_p8266_html_a6ba21b921a7afc79a36d0e41c20d59bc"><div class="ttname"><a href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266::send</a></div><div class="ttdeci">bool send(const uint8_t *buffer, uint32_t len)</div><div class="ttdoc">Send data based on TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00261">ESP8266.cpp:261</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8ce40bd14556bcfb5d4c521047fc821"><div class="ttname"><a href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266::recv</a></div><div class="ttdeci">uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</div><div class="ttdoc">Receive data from TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00271">ESP8266.cpp:271</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a16963a076b80906563d2269c0cd52007"><div class="ttname"><a href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">ESP8266::enableMUX</a></div><div class="ttdeci">bool enableMUX(void)</div><div class="ttdoc">Enable IP MUX(multiple connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00181">ESP8266.cpp:181</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="_e_s_p8266_8h_html"><div class="ttname"><a href="_e_s_p8266_8h.html">ESP8266.h</a></div><div class="ttdoc">The definition of class ESP8266. </div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac179183a46b218609a481747bcfd5a61"><div class="ttname"><a href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266::setOprToStationSoftAP</a></div><div class="ttdeci">bool setOprToStationSoftAP(void)</div><div class="ttdoc">Set operation mode to station + softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00121">ESP8266.cpp:121</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa355332a78aa5f2b58cb11b0daa05cf5"><div class="ttname"><a href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">ESP8266::unregisterUDP</a></div><div class="ttdeci">bool unregisterUDP(void)</div><div class="ttdoc">Unregister UDP port number in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00206">ESP8266.cpp:206</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8d3305a28d862c0cf353d0d758b96d4"><div class="ttname"><a href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">ESP8266::registerUDP</a></div><div class="ttdeci">bool registerUDP(String addr, uint32_t port)</div><div class="ttdoc">Register UDP port number in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00201">ESP8266.cpp:201</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
+<!-- start footer part -->
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+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
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+</a> 1.8.7
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_single_8cpp-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_single_8cpp-example.html	(revision 136)
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+   </div>
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+<div class="title">UDPClientSingle.cpp</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The UDPClientSingle demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"></div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:26:27 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_single_8ino-example.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_single_8ino-example.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_single_8ino-example.html	(revision 136)
@@ -0,0 +1,132 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: UDPClientSingle.ino</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">UDPClientSingle.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<p>The UDPClientSingle demo of library WeeESP8266.</p><dl class="section author"><dt>Author</dt><dd>Wu Pengfei<a href="#" onclick="location.href='mai'+'lto:'+'pen'+'gf'+'ei.'+'wu'+'@it'+'ea'+'d.c'+'c'; return false;">pengf<span style="display: none;">.nosp@m.</span>ei.w<span style="display: none;">.nosp@m.</span>u@ite<span style="display: none;">.nosp@m.</span>ad.c<span style="display: none;">.nosp@m.</span>c</a> </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>2015.02</dd></dl>
+<dl class="section user"><dt>Copyright:</dt><dd>Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. <br />
+<br />
+This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. <br />
+<br />
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</dd></dl>
+<div class="fragment"><div class="line"></div>
+<div class="line"><span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><span class="preprocessor">#define HOST_PORT   (5416)</span></div>
+<div class="line"></div>
+<div class="line"><a name="_a0"></a><a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    Serial.begin(9600);  </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line">    Serial.println(wifi.<a name="a1"></a><a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line">      </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a2"></a><a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line"> </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a3"></a><a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);</div>
+<div class="line">        Serial.println(wifi.<a name="a4"></a><a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a5"></a><a class="code" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">disableMUX</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;single ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;single err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">    uint8_t buffer[128] = {0};</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a6"></a><a class="code" href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">registerUDP</a>(HOST_NAME, HOST_PORT)) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;register udp ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;register udp err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordtype">char</span> *hello = <span class="stringliteral">&quot;Hello, this is client!&quot;</span>;</div>
+<div class="line">    wifi.<a name="a7"></a><a class="code" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>((<span class="keyword">const</span> uint8_t*)hello, strlen(hello));</div>
+<div class="line">    </div>
+<div class="line">    uint32_t len = wifi.<a name="a8"></a><a class="code" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(buffer, <span class="keyword">sizeof</span>(buffer), 10000);</div>
+<div class="line">    <span class="keywordflow">if</span> (len &gt; 0) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;Received:[&quot;</span>);</div>
+<div class="line">        <span class="keywordflow">for</span>(uint32_t i = 0; i &lt; len; i++) {</div>
+<div class="line">            Serial.print((<span class="keywordtype">char</span>)buffer[i]);</div>
+<div class="line">        }</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    </div>
+<div class="line">    <span class="keywordflow">if</span> (wifi.<a name="a9"></a><a class="code" href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">unregisterUDP</a>()) {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;unregister udp ok\r\n&quot;</span>);</div>
+<div class="line">    } <span class="keywordflow">else</span> {</div>
+<div class="line">        Serial.print(<span class="stringliteral">&quot;unregister udp err\r\n&quot;</span>);</div>
+<div class="line">    }</div>
+<div class="line">    delay(5000);</div>
+<div class="line">}</div>
+<div class="line">          </div>
+</div><!-- fragment --> </div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_single_8ino_source.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_single_8ino_source.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/_u_d_p_client_single_8ino_source.html	(revision 136)
@@ -0,0 +1,145 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: examples/UDPClientSingle/UDPClientSingle.ino Source File</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+<div id="nav-path" class="navpath">
+  <ul>
+<li class="navelem"><a class="el" href="dir_d28a4824dc47e487b107a5db32ef43c4.html">examples</a></li><li class="navelem"><a class="el" href="dir_db2b6df4be8fe245a288f3ee89789028.html">UDPClientSingle</a></li>  </ul>
+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">UDPClientSingle.ino</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div>
+<div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_e_s_p8266_8h.html">ESP8266.h</a>&quot;</span></div>
+<div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;</div>
+<div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="preprocessor">#define SSID        &quot;ITEAD&quot;</span></div>
+<div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;<span class="preprocessor">#define PASSWORD    &quot;12345678&quot;</span></div>
+<div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="preprocessor">#define HOST_NAME   &quot;172.16.5.12&quot;</span></div>
+<div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<span class="preprocessor">#define HOST_PORT   (5416)</span></div>
+<div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;</div>
+<div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;<a class="code" href="class_e_s_p8266.html">ESP8266</a> wifi(Serial1);</div>
+<div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160; </div>
+<div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;<span class="keywordtype">void</span> setup(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;{</div>
+<div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;    Serial.begin(9600);  </div>
+<div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup begin\r\n&quot;</span>);</div>
+<div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;    </div>
+<div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;    Serial.print(<span class="stringliteral">&quot;FW Version:&quot;</span>);</div>
+<div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;    Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>().c_str());</div>
+<div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;      </div>
+<div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>()) {</div>
+<div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;        Serial.print(<span class="stringliteral">&quot;to station + softap err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;    }</div>
+<div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160; </div>
+<div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(SSID, PASSWORD)) {</div>
+<div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP success\r\n&quot;</span>);</div>
+<div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;        Serial.print(<span class="stringliteral">&quot;IP: &quot;</span>);</div>
+<div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;        Serial.println(wifi.<a class="code" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>().c_str());       </div>
+<div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;        Serial.print(<span class="stringliteral">&quot;Join AP failure\r\n&quot;</span>);</div>
+<div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;    }</div>
+<div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;    </div>
+<div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">disableMUX</a>()) {</div>
+<div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;        Serial.print(<span class="stringliteral">&quot;single ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;        Serial.print(<span class="stringliteral">&quot;single err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;    }</div>
+<div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;    </div>
+<div class="line"><a name="l00059"></a><span class="lineno">   59</span>&#160;    Serial.print(<span class="stringliteral">&quot;setup end\r\n&quot;</span>);</div>
+<div class="line"><a name="l00060"></a><span class="lineno">   60</span>&#160;}</div>
+<div class="line"><a name="l00061"></a><span class="lineno">   61</span>&#160; </div>
+<div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160;<span class="keywordtype">void</span> loop(<span class="keywordtype">void</span>)</div>
+<div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;{</div>
+<div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;    uint8_t buffer[128] = {0};</div>
+<div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;    </div>
+<div class="line"><a name="l00066"></a><span class="lineno">   66</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">registerUDP</a>(HOST_NAME, HOST_PORT)) {</div>
+<div class="line"><a name="l00067"></a><span class="lineno">   67</span>&#160;        Serial.print(<span class="stringliteral">&quot;register udp ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00068"></a><span class="lineno">   68</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00069"></a><span class="lineno">   69</span>&#160;        Serial.print(<span class="stringliteral">&quot;register udp err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00070"></a><span class="lineno">   70</span>&#160;    }</div>
+<div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160;    </div>
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+<div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;    <span class="keywordflow">if</span> (len &gt; 0) {</div>
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+<div class="line"><a name="l00080"></a><span class="lineno">   80</span>&#160;        }</div>
+<div class="line"><a name="l00081"></a><span class="lineno">   81</span>&#160;        Serial.print(<span class="stringliteral">&quot;]\r\n&quot;</span>);</div>
+<div class="line"><a name="l00082"></a><span class="lineno">   82</span>&#160;    }</div>
+<div class="line"><a name="l00083"></a><span class="lineno">   83</span>&#160;    </div>
+<div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;    <span class="keywordflow">if</span> (wifi.<a class="code" href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">unregisterUDP</a>()) {</div>
+<div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;        Serial.print(<span class="stringliteral">&quot;unregister udp ok\r\n&quot;</span>);</div>
+<div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;    } <span class="keywordflow">else</span> {</div>
+<div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;        Serial.print(<span class="stringliteral">&quot;unregister udp err\r\n&quot;</span>);</div>
+<div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;    }</div>
+<div class="line"><a name="l00089"></a><span class="lineno">   89</span>&#160;    delay(5000);</div>
+<div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;}</div>
+<div class="line"><a name="l00091"></a><span class="lineno">   91</span>&#160;          </div>
+<div class="ttc" id="class_e_s_p8266_html_a6ba21b921a7afc79a36d0e41c20d59bc"><div class="ttname"><a href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266::send</a></div><div class="ttdeci">bool send(const uint8_t *buffer, uint32_t len)</div><div class="ttdoc">Send data based on TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00261">ESP8266.cpp:261</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a4e2d8a0637b437d4b03209cebfa5b750"><div class="ttname"><a href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266::getVersion</a></div><div class="ttdeci">String getVersion(void)</div><div class="ttdoc">Get the version of AT Command Set. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00080">ESP8266.cpp:80</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8ce40bd14556bcfb5d4c521047fc821"><div class="ttname"><a href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266::recv</a></div><div class="ttdeci">uint32_t recv(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</div><div class="ttdoc">Receive data from TCP or UDP builded already in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00271">ESP8266.cpp:271</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a20819d4dabf19fed6e3dcb3fd04ee49d"><div class="ttname"><a href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266::getLocalIP</a></div><div class="ttdeci">String getLocalIP(void)</div><div class="ttdoc">Get the IP address of ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00174">ESP8266.cpp:174</a></div></div>
+<div class="ttc" id="_e_s_p8266_8h_html"><div class="ttname"><a href="_e_s_p8266_8h.html">ESP8266.h</a></div><div class="ttdoc">The definition of class ESP8266. </div></div>
+<div class="ttc" id="class_e_s_p8266_html_ac179183a46b218609a481747bcfd5a61"><div class="ttname"><a href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266::setOprToStationSoftAP</a></div><div class="ttdeci">bool setOprToStationSoftAP(void)</div><div class="ttdoc">Set operation mode to station + softap. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00121">ESP8266.cpp:121</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_aa355332a78aa5f2b58cb11b0daa05cf5"><div class="ttname"><a href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">ESP8266::unregisterUDP</a></div><div class="ttdeci">bool unregisterUDP(void)</div><div class="ttdoc">Unregister UDP port number in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00206">ESP8266.cpp:206</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a2bc64145329ea45018e956b97ced030a"><div class="ttname"><a href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">ESP8266::disableMUX</a></div><div class="ttdeci">bool disableMUX(void)</div><div class="ttdoc">Disable IP MUX(single connection mode). </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00186">ESP8266.cpp:186</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_a300535b4b5f001b74058ebcc694a749f"><div class="ttname"><a href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266::joinAP</a></div><div class="ttdeci">bool joinAP(String ssid, String pwd)</div><div class="ttdoc">Join in AP. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00145">ESP8266.cpp:145</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html_af8d3305a28d862c0cf353d0d758b96d4"><div class="ttname"><a href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">ESP8266::registerUDP</a></div><div class="ttdeci">bool registerUDP(String addr, uint32_t port)</div><div class="ttdoc">Register UDP port number in single mode. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8cpp_source.html#l00201">ESP8266.cpp:201</a></div></div>
+<div class="ttc" id="class_e_s_p8266_html"><div class="ttname"><a href="class_e_s_p8266.html">ESP8266</a></div><div class="ttdoc">Provide an easy-to-use way to manipulate ESP8266. </div><div class="ttdef"><b>Definition:</b> <a href="_e_s_p8266_8h_source.html#l00038">ESP8266.h:38</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/annotated.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/annotated.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/annotated.html	(revision 136)
@@ -0,0 +1,66 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: Class List</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li class="current"><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li class="current"><a href="annotated.html"><span>Class&#160;List</span></a></li>
+      <li><a href="classes.html"><span>Class&#160;Index</span></a></li>
+      <li><a href="functions.html"><span>Class&#160;Members</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">Class List</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock">Here are the classes, structs, unions and interfaces with brief descriptions:</div><div class="directory">
+<table class="directory">
+<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span class="icona"><span class="icon">C</span></span><a class="el" href="class_e_s_p8266.html" target="_self">ESP8266</a></td><td class="desc">Provide an easy-to-use way to manipulate <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> </td></tr>
+</table>
+</div><!-- directory -->
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/class_e_s_p8266-members.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/class_e_s_p8266-members.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/class_e_s_p8266-members.html	(revision 136)
@@ -0,0 +1,97 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: Member List</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li class="current"><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="annotated.html"><span>Class&#160;List</span></a></li>
+      <li><a href="classes.html"><span>Class&#160;Index</span></a></li>
+      <li><a href="functions.html"><span>Class&#160;Members</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">ESP8266 Member List</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>This is the complete list of members for <a class="el" href="class_e_s_p8266.html">ESP8266</a>, including all inherited members.</p>
+<table class="directory">
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a>(String addr, uint32_t port)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#a73d18b488d7f426a62e62b947f297b0d">createTCP</a>(uint8_t mux_id, String addr, uint32_t port)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">disableMUX</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">enableMUX</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#af0cafe8a994349e81e75a35af9645a76">getAPList</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">getIPStatus</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a10c82a5196a8f349720a9c9ba7209a6e">getJoinedDeviceIP</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a>(String ssid, String pwd)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a5ed71947606435c3b03b73efdaf810a5">kick</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#aeda29748e0d28efa9d82c9c7fab1859b">leaveAP</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a>(uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#a0d6429057e090be1a6f4da91eff92d82">recv</a>(uint8_t mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a7d68591021e6ddc6919cb5865827856f">recv</a>(uint8_t *coming_mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">registerUDP</a>(String addr, uint32_t port)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#af70a0a7c963c6411948622d802b31b2d">registerUDP</a>(uint8_t mux_id, String addr, uint32_t port)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a96fd1a01f8f52dd80ae7f7a267005300">releaseTCP</a>(uint8_t mux_id)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#a04b61a01af4ee5e8820c9de79b4b3c39">restart</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a>(const uint8_t *buffer, uint32_t len)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#afb7d7b4e281d4c4699a33e1d086e6d54">send</a>(uint8_t mux_id, const uint8_t *buffer, uint32_t len)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a247706884d60e85c8983bb65de26d346">setOprToSoftAP</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#a572c6f855d70078fdbff9ac2c4b1ce99">setOprToStation</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#aacce786dc0ef289cd37a48642d2efef1">setSoftAPParam</a>(String ssid, String pwd, uint8_t chl=7, uint8_t ecn=4)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a71f76c76d23fc66c26f1c7b357f58ac2">setTCPServerTimeout</a>(uint32_t timeout=180)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#a88d9a6b130b6c278fd6cd2e6cda816d7">startServer</a>(uint32_t port=333)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a22a7768a76709c8d8f0b9809158b7ec9">startTCPServer</a>(uint32_t port=333)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#af272f2f57b7b99434e257f06c276acfc">stopServer</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#aa5355dce05aa59b92ce9f7ea76d86eef">stopTCPServer</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr><td class="entry"><a class="el" href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">unregisterUDP</a>(void)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+  <tr class="even"><td class="entry"><a class="el" href="class_e_s_p8266.html#a0a48619ad157fd2bd9c7f2e9c151f9b3">unregisterUDP</a>(uint8_t mux_id)</td><td class="entry"><a class="el" href="class_e_s_p8266.html">ESP8266</a></td><td class="entry"></td></tr>
+</table></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/class_e_s_p8266.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/class_e_s_p8266.html	(revision 136)
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+<html xmlns="http://www.w3.org/1999/xhtml">
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+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: ESP8266 Class Reference</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
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+<script type="text/javascript" src="dynsections.js"></script>
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+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li class="current"><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="annotated.html"><span>Class&#160;List</span></a></li>
+      <li><a href="classes.html"><span>Class&#160;Index</span></a></li>
+      <li><a href="functions.html"><span>Class&#160;Members</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="summary">
+<a href="#pub-methods">Public Member Functions</a> &#124;
+<a href="class_e_s_p8266-members.html">List of all members</a>  </div>
+  <div class="headertitle">
+<div class="title">ESP8266 Class Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Provide an easy-to-use way to manipulate <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>.  
+ <a href="class_e_s_p8266.html#details">More...</a></p>
+
+<p><code>#include &lt;<a class="el" href="_e_s_p8266_8h_source.html">ESP8266.h</a>&gt;</code></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-methods"></a>
+Public Member Functions</h2></td></tr>
+<tr class="memitem:a5ed71947606435c3b03b73efdaf810a5"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a5ed71947606435c3b03b73efdaf810a5">kick</a> (void)</td></tr>
+<tr class="memdesc:a5ed71947606435c3b03b73efdaf810a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Verify <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> whether live or not.  <a href="#a5ed71947606435c3b03b73efdaf810a5">More...</a><br /></td></tr>
+<tr class="separator:a5ed71947606435c3b03b73efdaf810a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a04b61a01af4ee5e8820c9de79b4b3c39"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a04b61a01af4ee5e8820c9de79b4b3c39">restart</a> (void)</td></tr>
+<tr class="memdesc:a04b61a01af4ee5e8820c9de79b4b3c39"><td class="mdescLeft">&#160;</td><td class="mdescRight">Restart <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> by "AT+RST".  <a href="#a04b61a01af4ee5e8820c9de79b4b3c39">More...</a><br /></td></tr>
+<tr class="separator:a04b61a01af4ee5e8820c9de79b4b3c39"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a4e2d8a0637b437d4b03209cebfa5b750"><td class="memItemLeft" align="right" valign="top">String&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">getVersion</a> (void)</td></tr>
+<tr class="memdesc:a4e2d8a0637b437d4b03209cebfa5b750"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the version of AT Command Set.  <a href="#a4e2d8a0637b437d4b03209cebfa5b750">More...</a><br /></td></tr>
+<tr class="separator:a4e2d8a0637b437d4b03209cebfa5b750"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a572c6f855d70078fdbff9ac2c4b1ce99"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a572c6f855d70078fdbff9ac2c4b1ce99">setOprToStation</a> (void)</td></tr>
+<tr class="memdesc:a572c6f855d70078fdbff9ac2c4b1ce99"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set operation mode to staion.  <a href="#a572c6f855d70078fdbff9ac2c4b1ce99">More...</a><br /></td></tr>
+<tr class="separator:a572c6f855d70078fdbff9ac2c4b1ce99"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a247706884d60e85c8983bb65de26d346"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a247706884d60e85c8983bb65de26d346">setOprToSoftAP</a> (void)</td></tr>
+<tr class="memdesc:a247706884d60e85c8983bb65de26d346"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set operation mode to softap.  <a href="#a247706884d60e85c8983bb65de26d346">More...</a><br /></td></tr>
+<tr class="separator:a247706884d60e85c8983bb65de26d346"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ac179183a46b218609a481747bcfd5a61"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">setOprToStationSoftAP</a> (void)</td></tr>
+<tr class="memdesc:ac179183a46b218609a481747bcfd5a61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set operation mode to station + softap.  <a href="#ac179183a46b218609a481747bcfd5a61">More...</a><br /></td></tr>
+<tr class="separator:ac179183a46b218609a481747bcfd5a61"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af0cafe8a994349e81e75a35af9645a76"><td class="memItemLeft" align="right" valign="top">String&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#af0cafe8a994349e81e75a35af9645a76">getAPList</a> (void)</td></tr>
+<tr class="memdesc:af0cafe8a994349e81e75a35af9645a76"><td class="mdescLeft">&#160;</td><td class="mdescRight">Search available AP list and return it.  <a href="#af0cafe8a994349e81e75a35af9645a76">More...</a><br /></td></tr>
+<tr class="separator:af0cafe8a994349e81e75a35af9645a76"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a300535b4b5f001b74058ebcc694a749f"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">joinAP</a> (String ssid, String pwd)</td></tr>
+<tr class="memdesc:a300535b4b5f001b74058ebcc694a749f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Join in AP.  <a href="#a300535b4b5f001b74058ebcc694a749f">More...</a><br /></td></tr>
+<tr class="separator:a300535b4b5f001b74058ebcc694a749f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aeda29748e0d28efa9d82c9c7fab1859b"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#aeda29748e0d28efa9d82c9c7fab1859b">leaveAP</a> (void)</td></tr>
+<tr class="memdesc:aeda29748e0d28efa9d82c9c7fab1859b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Leave AP joined before.  <a href="#aeda29748e0d28efa9d82c9c7fab1859b">More...</a><br /></td></tr>
+<tr class="separator:aeda29748e0d28efa9d82c9c7fab1859b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aacce786dc0ef289cd37a48642d2efef1"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#aacce786dc0ef289cd37a48642d2efef1">setSoftAPParam</a> (String ssid, String pwd, uint8_t chl=7, uint8_t ecn=4)</td></tr>
+<tr class="memdesc:aacce786dc0ef289cd37a48642d2efef1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set SoftAP parameters.  <a href="#aacce786dc0ef289cd37a48642d2efef1">More...</a><br /></td></tr>
+<tr class="separator:aacce786dc0ef289cd37a48642d2efef1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a10c82a5196a8f349720a9c9ba7209a6e"><td class="memItemLeft" align="right" valign="top">String&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a10c82a5196a8f349720a9c9ba7209a6e">getJoinedDeviceIP</a> (void)</td></tr>
+<tr class="memdesc:a10c82a5196a8f349720a9c9ba7209a6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the IP list of devices connected to SoftAP.  <a href="#a10c82a5196a8f349720a9c9ba7209a6e">More...</a><br /></td></tr>
+<tr class="separator:a10c82a5196a8f349720a9c9ba7209a6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ad273286fbb8627a612249a232d53ca22"><td class="memItemLeft" align="right" valign="top">String&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">getIPStatus</a> (void)</td></tr>
+<tr class="memdesc:ad273286fbb8627a612249a232d53ca22"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the current status of connection(UDP and TCP).  <a href="#ad273286fbb8627a612249a232d53ca22">More...</a><br /></td></tr>
+<tr class="separator:ad273286fbb8627a612249a232d53ca22"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a20819d4dabf19fed6e3dcb3fd04ee49d"><td class="memItemLeft" align="right" valign="top">String&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">getLocalIP</a> (void)</td></tr>
+<tr class="memdesc:a20819d4dabf19fed6e3dcb3fd04ee49d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the IP address of <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>.  <a href="#a20819d4dabf19fed6e3dcb3fd04ee49d">More...</a><br /></td></tr>
+<tr class="separator:a20819d4dabf19fed6e3dcb3fd04ee49d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a16963a076b80906563d2269c0cd52007"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">enableMUX</a> (void)</td></tr>
+<tr class="memdesc:a16963a076b80906563d2269c0cd52007"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable IP MUX(multiple connection mode).  <a href="#a16963a076b80906563d2269c0cd52007">More...</a><br /></td></tr>
+<tr class="separator:a16963a076b80906563d2269c0cd52007"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a2bc64145329ea45018e956b97ced030a"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">disableMUX</a> (void)</td></tr>
+<tr class="memdesc:a2bc64145329ea45018e956b97ced030a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable IP MUX(single connection mode).  <a href="#a2bc64145329ea45018e956b97ced030a">More...</a><br /></td></tr>
+<tr class="separator:a2bc64145329ea45018e956b97ced030a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aa927b7b8aaef163011015c22da1f07e2"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">createTCP</a> (String addr, uint32_t port)</td></tr>
+<tr class="memdesc:aa927b7b8aaef163011015c22da1f07e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create TCP connection in single mode.  <a href="#aa927b7b8aaef163011015c22da1f07e2">More...</a><br /></td></tr>
+<tr class="separator:aa927b7b8aaef163011015c22da1f07e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ac15ce9df69dc566c37b3fa2c3c869337"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">releaseTCP</a> (void)</td></tr>
+<tr class="memdesc:ac15ce9df69dc566c37b3fa2c3c869337"><td class="mdescLeft">&#160;</td><td class="mdescRight">Release TCP connection in single mode.  <a href="#ac15ce9df69dc566c37b3fa2c3c869337">More...</a><br /></td></tr>
+<tr class="separator:ac15ce9df69dc566c37b3fa2c3c869337"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af8d3305a28d862c0cf353d0d758b96d4"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">registerUDP</a> (String addr, uint32_t port)</td></tr>
+<tr class="memdesc:af8d3305a28d862c0cf353d0d758b96d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Register UDP port number in single mode.  <a href="#af8d3305a28d862c0cf353d0d758b96d4">More...</a><br /></td></tr>
+<tr class="separator:af8d3305a28d862c0cf353d0d758b96d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aa355332a78aa5f2b58cb11b0daa05cf5"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">unregisterUDP</a> (void)</td></tr>
+<tr class="memdesc:aa355332a78aa5f2b58cb11b0daa05cf5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unregister UDP port number in single mode.  <a href="#aa355332a78aa5f2b58cb11b0daa05cf5">More...</a><br /></td></tr>
+<tr class="separator:aa355332a78aa5f2b58cb11b0daa05cf5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a73d18b488d7f426a62e62b947f297b0d"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a73d18b488d7f426a62e62b947f297b0d">createTCP</a> (uint8_t mux_id, String addr, uint32_t port)</td></tr>
+<tr class="memdesc:a73d18b488d7f426a62e62b947f297b0d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create TCP connection in multiple mode.  <a href="#a73d18b488d7f426a62e62b947f297b0d">More...</a><br /></td></tr>
+<tr class="separator:a73d18b488d7f426a62e62b947f297b0d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a96fd1a01f8f52dd80ae7f7a267005300"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a96fd1a01f8f52dd80ae7f7a267005300">releaseTCP</a> (uint8_t mux_id)</td></tr>
+<tr class="memdesc:a96fd1a01f8f52dd80ae7f7a267005300"><td class="mdescLeft">&#160;</td><td class="mdescRight">Release TCP connection in multiple mode.  <a href="#a96fd1a01f8f52dd80ae7f7a267005300">More...</a><br /></td></tr>
+<tr class="separator:a96fd1a01f8f52dd80ae7f7a267005300"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af70a0a7c963c6411948622d802b31b2d"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#af70a0a7c963c6411948622d802b31b2d">registerUDP</a> (uint8_t mux_id, String addr, uint32_t port)</td></tr>
+<tr class="memdesc:af70a0a7c963c6411948622d802b31b2d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Register UDP port number in multiple mode.  <a href="#af70a0a7c963c6411948622d802b31b2d">More...</a><br /></td></tr>
+<tr class="separator:af70a0a7c963c6411948622d802b31b2d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a0a48619ad157fd2bd9c7f2e9c151f9b3"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a0a48619ad157fd2bd9c7f2e9c151f9b3">unregisterUDP</a> (uint8_t mux_id)</td></tr>
+<tr class="memdesc:a0a48619ad157fd2bd9c7f2e9c151f9b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unregister UDP port number in multiple mode.  <a href="#a0a48619ad157fd2bd9c7f2e9c151f9b3">More...</a><br /></td></tr>
+<tr class="separator:a0a48619ad157fd2bd9c7f2e9c151f9b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a71f76c76d23fc66c26f1c7b357f58ac2"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a71f76c76d23fc66c26f1c7b357f58ac2">setTCPServerTimeout</a> (uint32_t timeout=180)</td></tr>
+<tr class="memdesc:a71f76c76d23fc66c26f1c7b357f58ac2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the timeout of TCP Server.  <a href="#a71f76c76d23fc66c26f1c7b357f58ac2">More...</a><br /></td></tr>
+<tr class="separator:a71f76c76d23fc66c26f1c7b357f58ac2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a22a7768a76709c8d8f0b9809158b7ec9"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a22a7768a76709c8d8f0b9809158b7ec9">startTCPServer</a> (uint32_t port=333)</td></tr>
+<tr class="memdesc:a22a7768a76709c8d8f0b9809158b7ec9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start TCP Server(Only in multiple mode).  <a href="#a22a7768a76709c8d8f0b9809158b7ec9">More...</a><br /></td></tr>
+<tr class="separator:a22a7768a76709c8d8f0b9809158b7ec9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aa5355dce05aa59b92ce9f7ea76d86eef"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#aa5355dce05aa59b92ce9f7ea76d86eef">stopTCPServer</a> (void)</td></tr>
+<tr class="memdesc:aa5355dce05aa59b92ce9f7ea76d86eef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop TCP Server(Only in multiple mode).  <a href="#aa5355dce05aa59b92ce9f7ea76d86eef">More...</a><br /></td></tr>
+<tr class="separator:aa5355dce05aa59b92ce9f7ea76d86eef"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a88d9a6b130b6c278fd6cd2e6cda816d7"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a88d9a6b130b6c278fd6cd2e6cda816d7">startServer</a> (uint32_t port=333)</td></tr>
+<tr class="memdesc:a88d9a6b130b6c278fd6cd2e6cda816d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start Server(Only in multiple mode).  <a href="#a88d9a6b130b6c278fd6cd2e6cda816d7">More...</a><br /></td></tr>
+<tr class="separator:a88d9a6b130b6c278fd6cd2e6cda816d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af272f2f57b7b99434e257f06c276acfc"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#af272f2f57b7b99434e257f06c276acfc">stopServer</a> (void)</td></tr>
+<tr class="memdesc:af272f2f57b7b99434e257f06c276acfc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop Server(Only in multiple mode).  <a href="#af272f2f57b7b99434e257f06c276acfc">More...</a><br /></td></tr>
+<tr class="separator:af272f2f57b7b99434e257f06c276acfc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a6ba21b921a7afc79a36d0e41c20d59bc"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">send</a> (const uint8_t *buffer, uint32_t len)</td></tr>
+<tr class="memdesc:a6ba21b921a7afc79a36d0e41c20d59bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send data based on TCP or UDP builded already in single mode.  <a href="#a6ba21b921a7afc79a36d0e41c20d59bc">More...</a><br /></td></tr>
+<tr class="separator:a6ba21b921a7afc79a36d0e41c20d59bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:afb7d7b4e281d4c4699a33e1d086e6d54"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#afb7d7b4e281d4c4699a33e1d086e6d54">send</a> (uint8_t mux_id, const uint8_t *buffer, uint32_t len)</td></tr>
+<tr class="memdesc:afb7d7b4e281d4c4699a33e1d086e6d54"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send data based on one of TCP or UDP builded already in multiple mode.  <a href="#afb7d7b4e281d4c4699a33e1d086e6d54">More...</a><br /></td></tr>
+<tr class="separator:afb7d7b4e281d4c4699a33e1d086e6d54"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af8ce40bd14556bcfb5d4c521047fc821"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">recv</a> (uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</td></tr>
+<tr class="memdesc:af8ce40bd14556bcfb5d4c521047fc821"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive data from TCP or UDP builded already in single mode.  <a href="#af8ce40bd14556bcfb5d4c521047fc821">More...</a><br /></td></tr>
+<tr class="separator:af8ce40bd14556bcfb5d4c521047fc821"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a0d6429057e090be1a6f4da91eff92d82"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a0d6429057e090be1a6f4da91eff92d82">recv</a> (uint8_t mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</td></tr>
+<tr class="memdesc:a0d6429057e090be1a6f4da91eff92d82"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive data from one of TCP or UDP builded already in multiple mode.  <a href="#a0d6429057e090be1a6f4da91eff92d82">More...</a><br /></td></tr>
+<tr class="separator:a0d6429057e090be1a6f4da91eff92d82"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a7d68591021e6ddc6919cb5865827856f"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="class_e_s_p8266.html#a7d68591021e6ddc6919cb5865827856f">recv</a> (uint8_t *coming_mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000)</td></tr>
+<tr class="memdesc:a7d68591021e6ddc6919cb5865827856f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive data from all of TCP or UDP builded already in multiple mode.  <a href="#a7d68591021e6ddc6919cb5865827856f">More...</a><br /></td></tr>
+<tr class="separator:a7d68591021e6ddc6919cb5865827856f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
+<div class="textblock"><p>Provide an easy-to-use way to manipulate <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>. </p>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_connect_wi_fi_8ino-example.html#_a0">ConnectWiFi.ino</a>, <a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#_a0">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_multiple_8ino-example.html#_a0">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#_a0">TCPClientSingle.ino</a>, <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#_a0">TCPClientSingleUNO.ino</a>, <a class="el" href="_t_c_p_server_8ino-example.html#_a0">TCPServer.ino</a>, <a class="el" href="_u_d_p_client_multiple_8ino-example.html#_a0">UDPClientMultiple.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#_a0">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8h_source.html#l00038">38</a> of file <a class="el" href="_e_s_p8266_8h_source.html">ESP8266.h</a>.</p>
+</div><h2 class="groupheader">Member Function Documentation</h2>
+<a class="anchor" id="aa927b7b8aaef163011015c22da1f07e2"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::createTCP </td>
+          <td>(</td>
+          <td class="paramtype">String&#160;</td>
+          <td class="paramname"><em>addr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Create TCP connection in single mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">addr</td><td>- the IP or domain name of the target host. </td></tr>
+    <tr><td class="paramname">port</td><td>- the port number of the target host. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#a6">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_multiple_8ino-example.html#a6">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#a6">TCPClientSingle.ino</a>, and <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#a6">TCPClientSingleUNO.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00191">191</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a73d18b488d7f426a62e62b947f297b0d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::createTCP </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>mux_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">String&#160;</td>
+          <td class="paramname"><em>addr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Create TCP connection in multiple mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mux_id</td><td>- the identifier of this TCP(available value: 0 - 4). </td></tr>
+    <tr><td class="paramname">addr</td><td>- the IP or domain name of the target host. </td></tr>
+    <tr><td class="paramname">port</td><td>- the port number of the target host. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00211">211</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a2bc64145329ea45018e956b97ced030a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::disableMUX </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Disable IP MUX(single connection mode). </p>
+<p>In single connection mode, only one TCP or UDP communication can be builded.</p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#a5">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#a5">TCPClientSingle.ino</a>, <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#a5">TCPClientSingleUNO.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#a5">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00186">186</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a16963a076b80906563d2269c0cd52007"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::enableMUX </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Enable IP MUX(multiple connection mode). </p>
+<p>In multiple connection mode, a couple of TCP and UDP communication can be builded. They can be distinguished by the identifier of TCP or UDP named mux_id.</p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_t_c_p_client_multiple_8ino-example.html#a5">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_server_8ino-example.html#a5">TCPServer.ino</a>, and <a class="el" href="_u_d_p_client_multiple_8ino-example.html#a5">UDPClientMultiple.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00181">181</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="af0cafe8a994349e81e75a35af9645a76"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">String ESP8266::getAPList </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Search available AP list and return it. </p>
+<dl class="section return"><dt>Returns</dt><dd>the list of available APs. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>This method will occupy a lot of memeory(hundreds of Bytes to a couple of KBytes). Do not call this method unless you must and ensure that your board has enough memery left. </dd></dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00138">138</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="ad273286fbb8627a612249a232d53ca22"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">String ESP8266::getIPStatus </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get the current status of connection(UDP and TCP). </p>
+<dl class="section return"><dt>Returns</dt><dd>the status. </dd></dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_t_c_p_server_8ino-example.html#a9">TCPServer.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00167">167</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a10c82a5196a8f349720a9c9ba7209a6e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">String ESP8266::getJoinedDeviceIP </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get the IP list of devices connected to SoftAP. </p>
+<dl class="section return"><dt>Returns</dt><dd>the list of IP. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>This method should not be called when station mode. </dd></dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00160">160</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a20819d4dabf19fed6e3dcb3fd04ee49d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">String ESP8266::getLocalIP </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get the IP address of <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>. </p>
+<dl class="section return"><dt>Returns</dt><dd>the IP list. </dd></dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_connect_wi_fi_8ino-example.html#a4">ConnectWiFi.ino</a>, <a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#a4">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_multiple_8ino-example.html#a4">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#a4">TCPClientSingle.ino</a>, <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#a4">TCPClientSingleUNO.ino</a>, <a class="el" href="_t_c_p_server_8ino-example.html#a4">TCPServer.ino</a>, <a class="el" href="_u_d_p_client_multiple_8ino-example.html#a4">UDPClientMultiple.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#a4">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00174">174</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a4e2d8a0637b437d4b03209cebfa5b750"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">String ESP8266::getVersion </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get the version of AT Command Set. </p>
+<dl class="section return"><dt>Returns</dt><dd>the string of version. </dd></dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_connect_wi_fi_8ino-example.html#a1">ConnectWiFi.ino</a>, <a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#a1">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_multiple_8ino-example.html#a1">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#a1">TCPClientSingle.ino</a>, <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#a1">TCPClientSingleUNO.ino</a>, <a class="el" href="_t_c_p_server_8ino-example.html#a1">TCPServer.ino</a>, <a class="el" href="_u_d_p_client_multiple_8ino-example.html#a1">UDPClientMultiple.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#a1">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00080">80</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a300535b4b5f001b74058ebcc694a749f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::joinAP </td>
+          <td>(</td>
+          <td class="paramtype">String&#160;</td>
+          <td class="paramname"><em>ssid</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">String&#160;</td>
+          <td class="paramname"><em>pwd</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Join in AP. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">ssid</td><td>- SSID of AP to join in. </td></tr>
+    <tr><td class="paramname">pwd</td><td>- Password of AP to join in. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section note"><dt>Note</dt><dd>This method will take a couple of seconds. </dd></dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_connect_wi_fi_8ino-example.html#a3">ConnectWiFi.ino</a>, <a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#a3">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_multiple_8ino-example.html#a3">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#a3">TCPClientSingle.ino</a>, <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#a3">TCPClientSingleUNO.ino</a>, <a class="el" href="_t_c_p_server_8ino-example.html#a3">TCPServer.ino</a>, <a class="el" href="_u_d_p_client_multiple_8ino-example.html#a3">UDPClientMultiple.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#a3">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00145">145</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a5ed71947606435c3b03b73efdaf810a5"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::kick </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Verify <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> whether live or not. </p>
+<p>Actually, this method will send command "AT" to <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> and waiting for "OK".</p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- alive. </td></tr>
+    <tr><td class="paramname">false</td><td>- dead. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00058">58</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="aeda29748e0d28efa9d82c9c7fab1859b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::leaveAP </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Leave AP joined before. </p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00150">150</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="af8ce40bd14556bcfb5d4c521047fc821"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">uint32_t ESP8266::recv </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>buffer</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>buffer_size</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>timeout</em> = <code>1000</code>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Receive data from TCP or UDP builded already in single mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">buffer</td><td>- the buffer for storing data. </td></tr>
+    <tr><td class="paramname">buffer_size</td><td>- the length of the buffer. </td></tr>
+    <tr><td class="paramname">timeout</td><td>- the time waiting data. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>the length of data received actually. </dd></dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#a8">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_multiple_8ino-example.html#a8">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#a8">TCPClientSingle.ino</a>, <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#a8">TCPClientSingleUNO.ino</a>, <a class="el" href="_t_c_p_server_8ino-example.html#a8">TCPServer.ino</a>, <a class="el" href="_u_d_p_client_multiple_8ino-example.html#a8">UDPClientMultiple.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#a8">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00271">271</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a0d6429057e090be1a6f4da91eff92d82"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">uint32_t ESP8266::recv </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>mux_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>buffer</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>buffer_size</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>timeout</em> = <code>1000</code>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Receive data from one of TCP or UDP builded already in multiple mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mux_id</td><td>- the identifier of this TCP(available value: 0 - 4). </td></tr>
+    <tr><td class="paramname">buffer</td><td>- the buffer for storing data. </td></tr>
+    <tr><td class="paramname">buffer_size</td><td>- the length of the buffer. </td></tr>
+    <tr><td class="paramname">timeout</td><td>- the time waiting data. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>the length of data received actually. </dd></dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00276">276</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a7d68591021e6ddc6919cb5865827856f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">uint32_t ESP8266::recv </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>coming_mux_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>buffer</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>buffer_size</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>timeout</em> = <code>1000</code>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Receive data from all of TCP or UDP builded already in multiple mode. </p>
+<p>After return, coming_mux_id store the id of TCP or UDP from which data coming. User should read the value of coming_mux_id and decide what next to do.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">coming_mux_id</td><td>- the identifier of TCP or UDP. </td></tr>
+    <tr><td class="paramname">buffer</td><td>- the buffer for storing data. </td></tr>
+    <tr><td class="paramname">buffer_size</td><td>- the length of the buffer. </td></tr>
+    <tr><td class="paramname">timeout</td><td>- the time waiting data. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>the length of data received actually. </dd></dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00287">287</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="af8d3305a28d862c0cf353d0d758b96d4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::registerUDP </td>
+          <td>(</td>
+          <td class="paramtype">String&#160;</td>
+          <td class="paramname"><em>addr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Register UDP port number in single mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">addr</td><td>- the IP or domain name of the target host. </td></tr>
+    <tr><td class="paramname">port</td><td>- the port number of the target host. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_u_d_p_client_multiple_8ino-example.html#a6">UDPClientMultiple.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#a6">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00201">201</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="af70a0a7c963c6411948622d802b31b2d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::registerUDP </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>mux_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">String&#160;</td>
+          <td class="paramname"><em>addr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Register UDP port number in multiple mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mux_id</td><td>- the identifier of this TCP(available value: 0 - 4). </td></tr>
+    <tr><td class="paramname">addr</td><td>- the IP or domain name of the target host. </td></tr>
+    <tr><td class="paramname">port</td><td>- the port number of the target host. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00221">221</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="ac15ce9df69dc566c37b3fa2c3c869337"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::releaseTCP </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Release TCP connection in single mode. </p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#a9">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_multiple_8ino-example.html#a9">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#a9">TCPClientSingle.ino</a>, <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#a9">TCPClientSingleUNO.ino</a>, and <a class="el" href="_t_c_p_server_8ino-example.html#a11">TCPServer.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00196">196</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a96fd1a01f8f52dd80ae7f7a267005300"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::releaseTCP </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>mux_id</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Release TCP connection in multiple mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mux_id</td><td>- the identifier of this TCP(available value: 0 - 4). </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00216">216</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a04b61a01af4ee5e8820c9de79b4b3c39"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::restart </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Restart <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> by "AT+RST". </p>
+<p>This method will take 3 seconds or more.</p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00063">63</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a6ba21b921a7afc79a36d0e41c20d59bc"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::send </td>
+          <td>(</td>
+          <td class="paramtype">const uint8_t *&#160;</td>
+          <td class="paramname"><em>buffer</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Send data based on TCP or UDP builded already in single mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">buffer</td><td>- the buffer of data to send. </td></tr>
+    <tr><td class="paramname">len</td><td>- the length of data to send. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#a7">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_multiple_8ino-example.html#a7">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#a7">TCPClientSingle.ino</a>, <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#a7">TCPClientSingleUNO.ino</a>, <a class="el" href="_t_c_p_server_8ino-example.html#a10">TCPServer.ino</a>, <a class="el" href="_u_d_p_client_multiple_8ino-example.html#a7">UDPClientMultiple.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#a7">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00261">261</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="afb7d7b4e281d4c4699a33e1d086e6d54"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::send </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>mux_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint8_t *&#160;</td>
+          <td class="paramname"><em>buffer</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Send data based on one of TCP or UDP builded already in multiple mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mux_id</td><td>- the identifier of this TCP(available value: 0 - 4). </td></tr>
+    <tr><td class="paramname">buffer</td><td>- the buffer of data to send. </td></tr>
+    <tr><td class="paramname">len</td><td>- the length of data to send. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00266">266</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a247706884d60e85c8983bb65de26d346"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::setOprToSoftAP </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Set operation mode to softap. </p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00104">104</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a572c6f855d70078fdbff9ac2c4b1ce99"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::setOprToStation </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Set operation mode to staion. </p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_connect_wi_fi_8ino-example.html#a2">ConnectWiFi.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00087">87</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="ac179183a46b218609a481747bcfd5a61"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::setOprToStationSoftAP </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Set operation mode to station + softap. </p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_h_t_t_p_g_e_t_8ino-example.html#a2">HTTPGET.ino</a>, <a class="el" href="_t_c_p_client_multiple_8ino-example.html#a2">TCPClientMultiple.ino</a>, <a class="el" href="_t_c_p_client_single_8ino-example.html#a2">TCPClientSingle.ino</a>, <a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html#a2">TCPClientSingleUNO.ino</a>, <a class="el" href="_t_c_p_server_8ino-example.html#a2">TCPServer.ino</a>, <a class="el" href="_u_d_p_client_multiple_8ino-example.html#a2">UDPClientMultiple.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#a2">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00121">121</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="aacce786dc0ef289cd37a48642d2efef1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::setSoftAPParam </td>
+          <td>(</td>
+          <td class="paramtype">String&#160;</td>
+          <td class="paramname"><em>ssid</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">String&#160;</td>
+          <td class="paramname"><em>pwd</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>chl</em> = <code>7</code>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>ecn</em> = <code>4</code>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Set SoftAP parameters. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">ssid</td><td>- SSID of SoftAP. </td></tr>
+    <tr><td class="paramname">pwd</td><td>- PASSWORD of SoftAP. </td></tr>
+    <tr><td class="paramname">chl</td><td>- the channel (1 - 13, default: 7). </td></tr>
+    <tr><td class="paramname">ecn</td><td>- the way of encrypstion (0 - OPEN, 1 - WEP, 2 - WPA_PSK, 3 - WPA2_PSK, 4 - WPA_WPA2_PSK, default: 4). </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section note"><dt>Note</dt><dd>This method should not be called when station mode. </dd></dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00155">155</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a71f76c76d23fc66c26f1c7b357f58ac2"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::setTCPServerTimeout </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>timeout</em> = <code>180</code></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Set the timeout of TCP Server. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">timeout</td><td>- the duration for timeout by second(0 ~ 28800, default:180). </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_t_c_p_server_8ino-example.html#a7">TCPServer.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00231">231</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a88d9a6b130b6c278fd6cd2e6cda816d7"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::startServer </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>port</em> = <code>333</code></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Start Server(Only in multiple mode). </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">port</td><td>- the port number to listen(default: 333). </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure.</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section see"><dt>See also</dt><dd>String <a class="el" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22" title="Get the current status of connection(UDP and TCP). ">getIPStatus(void)</a>; </dd>
+<dd>
+uint32_t <a class="el" href="class_e_s_p8266.html#a7d68591021e6ddc6919cb5865827856f" title="Receive data from all of TCP or UDP builded already in multiple mode. ">recv(uint8_t *coming_mux_id, uint8_t *buffer, uint32_t len, uint32_t timeout)</a>; </dd></dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00251">251</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a22a7768a76709c8d8f0b9809158b7ec9"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::startTCPServer </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>port</em> = <code>333</code></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Start TCP Server(Only in multiple mode). </p>
+<p>After started, user should call method: getIPStatus to know the status of TCP connections. The methods of receiving data can be called for user's any purpose. After communication, release the TCP connection is needed by calling method: releaseTCP with mux_id.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">port</td><td>- the port number to listen(default: 333). </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure.</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section see"><dt>See also</dt><dd>String <a class="el" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22" title="Get the current status of connection(UDP and TCP). ">getIPStatus(void)</a>; </dd>
+<dd>
+uint32_t <a class="el" href="class_e_s_p8266.html#a7d68591021e6ddc6919cb5865827856f" title="Receive data from all of TCP or UDP builded already in multiple mode. ">recv(uint8_t *coming_mux_id, uint8_t *buffer, uint32_t len, uint32_t timeout)</a>; </dd>
+<dd>
+bool <a class="el" href="class_e_s_p8266.html#a96fd1a01f8f52dd80ae7f7a267005300" title="Release TCP connection in multiple mode. ">releaseTCP(uint8_t mux_id)</a>; </dd></dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_t_c_p_server_8ino-example.html#a6">TCPServer.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00236">236</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="af272f2f57b7b99434e257f06c276acfc"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::stopServer </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Stop Server(Only in multiple mode). </p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00256">256</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="aa5355dce05aa59b92ce9f7ea76d86eef"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::stopTCPServer </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Stop TCP Server(Only in multiple mode). </p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00244">244</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="aa355332a78aa5f2b58cb11b0daa05cf5"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::unregisterUDP </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Unregister UDP port number in single mode. </p>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl><dt><b>Examples: </b></dt><dd><a class="el" href="_u_d_p_client_multiple_8ino-example.html#a9">UDPClientMultiple.ino</a>, and <a class="el" href="_u_d_p_client_single_8ino-example.html#a9">UDPClientSingle.ino</a>.</dd>
+</dl>
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00206">206</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a0a48619ad157fd2bd9c7f2e9c151f9b3"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">bool ESP8266::unregisterUDP </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>mux_id</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Unregister UDP port number in multiple mode. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mux_id</td><td>- the identifier of this TCP(available value: 0 - 4). </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">true</td><td>- success. </td></tr>
+    <tr><td class="paramname">false</td><td>- failure. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+<p>Definition at line <a class="el" href="_e_s_p8266_8cpp_source.html#l00226">226</a> of file <a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a>.</p>
+
+</div>
+</div>
+<hr/>The documentation for this class was generated from the following files:<ul>
+<li><a class="el" href="_e_s_p8266_8h_source.html">ESP8266.h</a></li>
+<li><a class="el" href="_e_s_p8266_8cpp_source.html">ESP8266.cpp</a></li>
+</ul>
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+<!-- start footer part -->
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+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/classes.html
===================================================================
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+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
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+   </div>
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+      <li class="current"><a href="classes.html"><span>Class&#160;Index</span></a></li>
+      <li><a href="functions.html"><span>Class&#160;Members</span></a></li>
+    </ul>
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+<div class="header">
+  <div class="headertitle">
+<div class="title">Class Index</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="qindex"><a class="qindex" href="#letter_E">E</a></div>
+<table style="margin: 10px; white-space: nowrap;" align="center" width="95%" border="0" cellspacing="0" cellpadding="0">
+<tr><td rowspan="2" valign="bottom"><a name="letter_E"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">&#160;&#160;E&#160;&#160;</div></td></tr></table>
+</td><td></td></tr>
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+<div class="header">
+  <div class="headertitle">
+<div class="title">UDPClientMultiple Directory Reference</div>  </div>
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+<table class="memberdecls">
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+<tr class="memitem:_u_d_p_client_multiple_8ino"><td class="memItemLeft" align="right" valign="top">file &#160;</td><td class="memItemRight" valign="bottom"><b>UDPClientMultiple.ino</b> <a href="_u_d_p_client_multiple_8ino_source.html">[code]</a></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
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+  <td style="padding-left: 0.5em;">
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+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
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+<div class="header">
+  <div class="headertitle">
+<div class="title">TCPClientSingle Directory Reference</div>  </div>
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+	background-color: #FBFCFE;
+	border: 1px solid #BFD9F2;
+}
+
+div.line {
+	font-family: monospace, fixed;
+        font-size: 13px;
+	min-height: 13px;
+	line-height: 1.0;
+	text-wrap: unrestricted;
+	white-space: -moz-pre-wrap; /* Moz */
+	white-space: -pre-wrap;     /* Opera 4-6 */
+	white-space: -o-pre-wrap;   /* Opera 7 */
+	white-space: pre-wrap;      /* CSS3  */
+	word-wrap: break-word;      /* IE 5.5+ */
+	text-indent: -53px;
+	padding-left: 53px;
+	padding-bottom: 0px;
+	margin: 0px;
+	-webkit-transition-property: background-color, box-shadow;
+	-webkit-transition-duration: 0.5s;
+	-moz-transition-property: background-color, box-shadow;
+	-moz-transition-duration: 0.5s;
+	-ms-transition-property: background-color, box-shadow;
+	-ms-transition-duration: 0.5s;
+	-o-transition-property: background-color, box-shadow;
+	-o-transition-duration: 0.5s;
+	transition-property: background-color, box-shadow;
+	transition-duration: 0.5s;
+}
+
+div.line.glow {
+	background-color: cyan;
+	box-shadow: 0 0 10px cyan;
+}
+
+
+span.lineno {
+	padding-right: 4px;
+	text-align: right;
+	border-right: 2px solid #0F0;
+	background-color: #E8E8E8;
+        white-space: pre;
+}
+span.lineno a {
+	background-color: #D8D8D8;
+}
+
+span.lineno a:hover {
+	background-color: #C8C8C8;
+}
+
+div.ah {
+	background-color: black;
+	font-weight: bold;
+	color: #ffffff;
+	margin-bottom: 3px;
+	margin-top: 3px;
+	padding: 0.2em;
+	border: solid thin #333;
+	border-radius: 0.5em;
+	-webkit-border-radius: .5em;
+	-moz-border-radius: .5em;
+	box-shadow: 2px 2px 3px #999;
+	-webkit-box-shadow: 2px 2px 3px #999;
+	-moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px;
+	background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444));
+	background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000);
+}
+
+div.groupHeader {
+	margin-left: 16px;
+	margin-top: 12px;
+	font-weight: bold;
+}
+
+div.groupText {
+	margin-left: 16px;
+	font-style: italic;
+}
+
+body {
+	background-color: white;
+	color: black;
+        margin: 0;
+}
+
+div.contents {
+	margin-top: 10px;
+	margin-left: 12px;
+	margin-right: 8px;
+}
+
+td.indexkey {
+	background-color: #EAF2FB;
+	font-weight: bold;
+	border: 1px solid #BFD9F2;
+	margin: 2px 0px 2px 0;
+	padding: 2px 10px;
+        white-space: nowrap;
+        vertical-align: top;
+}
+
+td.indexvalue {
+	background-color: #EAF2FB;
+	border: 1px solid #BFD9F2;
+	padding: 2px 10px;
+	margin: 2px 0px;
+}
+
+tr.memlist {
+	background-color: #ECF4FB;
+}
+
+p.formulaDsp {
+	text-align: center;
+}
+
+img.formulaDsp {
+	
+}
+
+img.formulaInl {
+	vertical-align: middle;
+}
+
+div.center {
+	text-align: center;
+        margin-top: 0px;
+        margin-bottom: 0px;
+        padding: 0px;
+}
+
+div.center img {
+	border: 0px;
+}
+
+address.footer {
+	text-align: right;
+	padding-right: 12px;
+}
+
+img.footer {
+	border: 0px;
+	vertical-align: middle;
+}
+
+/* @group Code Colorization */
+
+span.keyword {
+	color: #008000
+}
+
+span.keywordtype {
+	color: #604020
+}
+
+span.keywordflow {
+	color: #e08000
+}
+
+span.comment {
+	color: #800000
+}
+
+span.preprocessor {
+	color: #806020
+}
+
+span.stringliteral {
+	color: #002080
+}
+
+span.charliteral {
+	color: #008080
+}
+
+span.vhdldigit { 
+	color: #ff00ff 
+}
+
+span.vhdlchar { 
+	color: #000000 
+}
+
+span.vhdlkeyword { 
+	color: #700070 
+}
+
+span.vhdllogic { 
+	color: #ff0000 
+}
+
+blockquote {
+        background-color: #F6F9FD;
+        border-left: 2px solid #92BEEA;
+        margin: 0 24px 0 4px;
+        padding: 0 12px 0 16px;
+}
+
+/* @end */
+
+/*
+.search {
+	color: #003399;
+	font-weight: bold;
+}
+
+form.search {
+	margin-bottom: 0px;
+	margin-top: 0px;
+}
+
+input.search {
+	font-size: 75%;
+	color: #000080;
+	font-weight: normal;
+	background-color: #e8eef2;
+}
+*/
+
+td.tiny {
+	font-size: 75%;
+}
+
+.dirtab {
+	padding: 4px;
+	border-collapse: collapse;
+	border: 1px solid #9AC3EB;
+}
+
+th.dirtab {
+	background: #EAF2FB;
+	font-weight: bold;
+}
+
+hr {
+	height: 0px;
+	border: none;
+	border-top: 1px solid #3083D7;
+}
+
+hr.footer {
+	height: 1px;
+}
+
+/* @group Member Descriptions */
+
+table.memberdecls {
+	border-spacing: 0px;
+	padding: 0px;
+}
+
+.memberdecls td, .fieldtable tr {
+	-webkit-transition-property: background-color, box-shadow;
+	-webkit-transition-duration: 0.5s;
+	-moz-transition-property: background-color, box-shadow;
+	-moz-transition-duration: 0.5s;
+	-ms-transition-property: background-color, box-shadow;
+	-ms-transition-duration: 0.5s;
+	-o-transition-property: background-color, box-shadow;
+	-o-transition-duration: 0.5s;
+	transition-property: background-color, box-shadow;
+	transition-duration: 0.5s;
+}
+
+.memberdecls td.glow, .fieldtable tr.glow {
+	background-color: cyan;
+	box-shadow: 0 0 15px cyan;
+}
+
+.mdescLeft, .mdescRight,
+.memItemLeft, .memItemRight,
+.memTemplItemLeft, .memTemplItemRight, .memTemplParams {
+	background-color: #F8FBFD;
+	border: none;
+	margin: 4px;
+	padding: 1px 0 0 8px;
+}
+
+.mdescLeft, .mdescRight {
+	padding: 0px 8px 4px 8px;
+	color: #555;
+}
+
+.memSeparator {
+        border-bottom: 1px solid #DEE4F0;
+        line-height: 1px;
+        margin: 0px;
+        padding: 0px;
+}
+
+.memItemLeft, .memTemplItemLeft {
+        white-space: nowrap;
+}
+
+.memItemRight {
+	width: 100%;
+}
+
+.memTemplParams {
+	color: #287ED3;
+        white-space: nowrap;
+	font-size: 80%;
+}
+
+/* @end */
+
+/* @group Member Details */
+
+/* Styles for detailed member documentation */
+
+.memtemplate {
+	font-size: 80%;
+	color: #287ED3;
+	font-weight: normal;
+	margin-left: 9px;
+}
+
+.memnav {
+	background-color: #EAF2FB;
+	border: 1px solid #9AC3EB;
+	text-align: center;
+	margin: 2px;
+	margin-right: 15px;
+	padding: 2px;
+}
+
+.mempage {
+	width: 100%;
+}
+
+.memitem {
+	padding: 0;
+	margin-bottom: 10px;
+	margin-right: 5px;
+        -webkit-transition: box-shadow 0.5s linear;
+        -moz-transition: box-shadow 0.5s linear;
+        -ms-transition: box-shadow 0.5s linear;
+        -o-transition: box-shadow 0.5s linear;
+        transition: box-shadow 0.5s linear;
+        display: table !important;
+        width: 100%;
+}
+
+.memitem.glow {
+         box-shadow: 0 0 15px cyan;
+}
+
+.memname {
+        font-weight: bold;
+        margin-left: 6px;
+}
+
+.memname td {
+	vertical-align: bottom;
+}
+
+.memproto, dl.reflist dt {
+        border-top: 1px solid #A0C6EC;
+        border-left: 1px solid #A0C6EC;
+        border-right: 1px solid #A0C6EC;
+        padding: 6px 0px 6px 0px;
+        color: #164676;
+        font-weight: bold;
+        text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9);
+        background-image:url('nav_f.png');
+        background-repeat:repeat-x;
+        background-color: #E0ECF9;
+        /* opera specific markup */
+        box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15);
+        border-top-right-radius: 4px;
+        border-top-left-radius: 4px;
+        /* firefox specific markup */
+        -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px;
+        -moz-border-radius-topright: 4px;
+        -moz-border-radius-topleft: 4px;
+        /* webkit specific markup */
+        -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15);
+        -webkit-border-top-right-radius: 4px;
+        -webkit-border-top-left-radius: 4px;
+
+}
+
+.memdoc, dl.reflist dd {
+        border-bottom: 1px solid #A0C6EC;      
+        border-left: 1px solid #A0C6EC;      
+        border-right: 1px solid #A0C6EC; 
+        padding: 6px 10px 2px 10px;
+        background-color: #FBFCFE;
+        border-top-width: 0;
+        background-image:url('nav_g.png');
+        background-repeat:repeat-x;
+        background-color: #FFFFFF;
+        /* opera specific markup */
+        border-bottom-left-radius: 4px;
+        border-bottom-right-radius: 4px;
+        box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15);
+        /* firefox specific markup */
+        -moz-border-radius-bottomleft: 4px;
+        -moz-border-radius-bottomright: 4px;
+        -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px;
+        /* webkit specific markup */
+        -webkit-border-bottom-left-radius: 4px;
+        -webkit-border-bottom-right-radius: 4px;
+        -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15);
+}
+
+dl.reflist dt {
+        padding: 5px;
+}
+
+dl.reflist dd {
+        margin: 0px 0px 10px 0px;
+        padding: 5px;
+}
+
+.paramkey {
+	text-align: right;
+}
+
+.paramtype {
+	white-space: nowrap;
+}
+
+.paramname {
+	color: #602020;
+	white-space: nowrap;
+}
+.paramname em {
+	font-style: normal;
+}
+.paramname code {
+        line-height: 14px;
+}
+
+.params, .retval, .exception, .tparams {
+        margin-left: 0px;
+        padding-left: 0px;
+}       
+
+.params .paramname, .retval .paramname {
+        font-weight: bold;
+        vertical-align: top;
+}
+        
+.params .paramtype {
+        font-style: italic;
+        vertical-align: top;
+}       
+        
+.params .paramdir {
+        font-family: "courier new",courier,monospace;
+        vertical-align: top;
+}
+
+table.mlabels {
+	border-spacing: 0px;
+}
+
+td.mlabels-left {
+	width: 100%;
+	padding: 0px;
+}
+
+td.mlabels-right {
+	vertical-align: bottom;
+	padding: 0px;
+	white-space: nowrap;
+}
+
+span.mlabels {
+        margin-left: 8px;
+}
+
+span.mlabel {
+        background-color: #63A2E1;
+        border-top:1px solid #3F8DDA;
+        border-left:1px solid #3F8DDA;
+        border-right:1px solid #BFD9F2;
+        border-bottom:1px solid #BFD9F2;
+	text-shadow: none;
+	color: white;
+	margin-right: 4px;
+	padding: 2px 3px;
+	border-radius: 3px;
+	font-size: 7pt;
+	white-space: nowrap;
+	vertical-align: middle;
+}
+
+
+
+/* @end */
+
+/* these are for tree view inside a (index) page */
+
+div.directory {
+        margin: 10px 0px;
+        border-top: 1px solid #92BEEA;
+        border-bottom: 1px solid #92BEEA;
+        width: 100%;
+}
+
+.directory table {
+        border-collapse:collapse;
+}
+
+.directory td {
+        margin: 0px;
+        padding: 0px;
+	vertical-align: top;
+}
+
+.directory td.entry {
+        white-space: nowrap;
+        padding-right: 6px;
+	padding-top: 3px;
+}
+
+.directory td.entry a {
+        outline:none;
+}
+
+.directory td.entry a img {
+        border: none;
+}
+
+.directory td.desc {
+        width: 100%;
+        padding-left: 6px;
+	padding-right: 6px;
+	padding-top: 3px;
+	border-left: 1px solid rgba(0,0,0,0.05);
+}
+
+.directory tr.even {
+	padding-left: 6px;
+	background-color: #F6F9FD;
+}
+
+.directory img {
+	vertical-align: -30%;
+}
+
+.directory .levels {
+        white-space: nowrap;
+        width: 100%;
+        text-align: right;
+        font-size: 9pt;
+}
+
+.directory .levels span {
+        cursor: pointer;
+        padding-left: 2px;
+        padding-right: 2px;
+	color: #236EB9;
+}
+
+.arrow {
+    color: #92BEEA;
+    -webkit-user-select: none;
+    -khtml-user-select: none;
+    -moz-user-select: none;
+    -ms-user-select: none;
+    user-select: none;
+    cursor: pointer;
+    font-size: 80%;
+    display: inline-block;
+    width: 16px;
+    height: 22px;
+}
+
+.icon {
+    font-family: Arial, Helvetica;
+    font-weight: bold;
+    font-size: 12px;
+    height: 14px;
+    width: 16px;
+    display: inline-block;
+    background-color: #63A2E1;
+    color: white;
+    text-align: center;
+    border-radius: 4px;
+    margin-left: 2px;
+    margin-right: 2px;
+}
+
+.icona {
+    width: 24px;
+    height: 22px;
+    display: inline-block;
+}
+
+.iconfopen {
+    width: 24px;
+    height: 18px;
+    margin-bottom: 4px;
+    background-image:url('ftv2folderopen.png');
+    background-position: 0px -4px;
+    background-repeat: repeat-y;
+    vertical-align:top;
+    display: inline-block;
+}
+
+.iconfclosed {
+    width: 24px;
+    height: 18px;
+    margin-bottom: 4px;
+    background-image:url('ftv2folderclosed.png');
+    background-position: 0px -4px;
+    background-repeat: repeat-y;
+    vertical-align:top;
+    display: inline-block;
+}
+
+.icondoc {
+    width: 24px;
+    height: 18px;
+    margin-bottom: 4px;
+    background-image:url('ftv2doc.png');
+    background-position: 0px -4px;
+    background-repeat: repeat-y;
+    vertical-align:top;
+    display: inline-block;
+}
+
+table.directory {
+    font: 400 14px Roboto,sans-serif;
+}
+
+/* @end */
+
+div.dynheader {
+        margin-top: 8px;
+	-webkit-touch-callout: none;
+	-webkit-user-select: none;
+	-khtml-user-select: none;
+	-moz-user-select: none;
+	-ms-user-select: none;
+	user-select: none;
+}
+
+address {
+	font-style: normal;
+	color: #195086;
+}
+
+table.doxtable {
+	border-collapse:collapse;
+        margin-top: 4px;
+        margin-bottom: 4px;
+}
+
+table.doxtable td, table.doxtable th {
+	border: 1px solid #1B548D;
+	padding: 3px 7px 2px;
+}
+
+table.doxtable th {
+	background-color: #2065AA;
+	color: #FFFFFF;
+	font-size: 110%;
+	padding-bottom: 4px;
+	padding-top: 5px;
+}
+
+table.fieldtable {
+        /*width: 100%;*/
+        margin-bottom: 10px;
+        border: 1px solid #A0C6EC;
+        border-spacing: 0px;
+        -moz-border-radius: 4px;
+        -webkit-border-radius: 4px;
+        border-radius: 4px;
+        -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px;
+        -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15);
+        box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15);
+}
+
+.fieldtable td, .fieldtable th {
+        padding: 3px 7px 2px;
+}
+
+.fieldtable td.fieldtype, .fieldtable td.fieldname {
+        white-space: nowrap;
+        border-right: 1px solid #A0C6EC;
+        border-bottom: 1px solid #A0C6EC;
+        vertical-align: top;
+}
+
+.fieldtable td.fieldname {
+        padding-top: 3px;
+}
+
+.fieldtable td.fielddoc {
+        border-bottom: 1px solid #A0C6EC;
+        /*width: 100%;*/
+}
+
+.fieldtable td.fielddoc p:first-child {
+        margin-top: 0px;
+}       
+        
+.fieldtable td.fielddoc p:last-child {
+        margin-bottom: 2px;
+}
+
+.fieldtable tr:last-child td {
+        border-bottom: none;
+}
+
+.fieldtable th {
+        background-image:url('nav_f.png');
+        background-repeat:repeat-x;
+        background-color: #E0ECF9;
+        font-size: 90%;
+        color: #164676;
+        padding-bottom: 4px;
+        padding-top: 5px;
+        text-align:left;
+        -moz-border-radius-topleft: 4px;
+        -moz-border-radius-topright: 4px;
+        -webkit-border-top-left-radius: 4px;
+        -webkit-border-top-right-radius: 4px;
+        border-top-left-radius: 4px;
+        border-top-right-radius: 4px;
+        border-bottom: 1px solid #A0C6EC;
+}
+
+
+.tabsearch {
+	top: 0px;
+	left: 10px;
+	height: 36px;
+	background-image: url('tab_b.png');
+	z-index: 101;
+	overflow: hidden;
+	font-size: 13px;
+}
+
+.navpath ul
+{
+	font-size: 11px;
+	background-image:url('tab_b.png');
+	background-repeat:repeat-x;
+	background-position: 0 -5px;
+	height:30px;
+	line-height:30px;
+	color:#7EB2E6;
+	border:solid 1px #BCD7F2;
+	overflow:hidden;
+	margin:0px;
+	padding:0px;
+}
+
+.navpath li
+{
+	list-style-type:none;
+	float:left;
+	padding-left:10px;
+	padding-right:15px;
+	background-image:url('bc_s.png');
+	background-repeat:no-repeat;
+	background-position:right;
+	color:#1F63A6;
+}
+
+.navpath li.navelem a
+{
+	height:32px;
+	display:block;
+	text-decoration: none;
+	outline: none;
+	color: #184C80;
+	font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif;
+	text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9);
+	text-decoration: none;        
+}
+
+.navpath li.navelem a:hover
+{
+	color:#579BDE;
+}
+
+.navpath li.footer
+{
+        list-style-type:none;
+        float:right;
+        padding-left:10px;
+        padding-right:15px;
+        background-image:none;
+        background-repeat:no-repeat;
+        background-position:right;
+        color:#1F63A6;
+        font-size: 8pt;
+}
+
+
+div.summary
+{
+	float: right;
+	font-size: 8pt;
+	padding-right: 5px;
+	width: 50%;
+	text-align: right;
+}       
+
+div.summary a
+{
+	white-space: nowrap;
+}
+
+div.ingroups
+{
+	font-size: 8pt;
+	width: 50%;
+	text-align: left;
+}
+
+div.ingroups a
+{
+	white-space: nowrap;
+}
+
+div.header
+{
+        background-image:url('nav_h.png');
+        background-repeat:repeat-x;
+	background-color: #F8FBFD;
+	margin:  0px;
+	border-bottom: 1px solid #BFD9F2;
+}
+
+div.headertitle
+{
+	padding: 5px 5px 5px 10px;
+}
+
+dl
+{
+        padding: 0 0 0 10px;
+}
+
+/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */
+dl.section
+{
+	margin-left: 0px;
+	padding-left: 0px;
+}
+
+dl.note
+{
+        margin-left:-7px;
+        padding-left: 3px;
+        border-left:4px solid;
+        border-color: #D0C000;
+}
+
+dl.warning, dl.attention
+{
+        margin-left:-7px;
+        padding-left: 3px;
+        border-left:4px solid;
+        border-color: #FF0000;
+}
+
+dl.pre, dl.post, dl.invariant
+{
+        margin-left:-7px;
+        padding-left: 3px;
+        border-left:4px solid;
+        border-color: #00D000;
+}
+
+dl.deprecated
+{
+        margin-left:-7px;
+        padding-left: 3px;
+        border-left:4px solid;
+        border-color: #505050;
+}
+
+dl.todo
+{
+        margin-left:-7px;
+        padding-left: 3px;
+        border-left:4px solid;
+        border-color: #00C0E0;
+}
+
+dl.test
+{
+        margin-left:-7px;
+        padding-left: 3px;
+        border-left:4px solid;
+        border-color: #3030E0;
+}
+
+dl.bug
+{
+        margin-left:-7px;
+        padding-left: 3px;
+        border-left:4px solid;
+        border-color: #C08050;
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+</a> 1.8.7
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/examples.html
===================================================================
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li class="current"><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">Examples</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock">Here is a list of all examples:</div><ul>
+<li><a class="el" href="_connect_wi_fi_8ino-example.html">ConnectWiFi.ino</a></li>
+
+<li><a class="el" href="_h_t_t_p_g_e_t_8ino-example.html">HTTPGET.ino</a></li>
+
+<li><a class="el" href="_t_c_p_client_multiple_8ino-example.html">TCPClientMultiple.ino</a></li>
+
+<li><a class="el" href="_t_c_p_client_single_8ino-example.html">TCPClientSingle.ino</a></li>
+
+<li><a class="el" href="_t_c_p_client_single_u_n_o_8ino-example.html">TCPClientSingleUNO.ino</a></li>
+
+<li><a class="el" href="_t_c_p_server_8ino-example.html">TCPServer.ino</a></li>
+
+<li><a class="el" href="_u_d_p_client_multiple_8ino-example.html">UDPClientMultiple.ino</a></li>
+
+<li><a class="el" href="_u_d_p_client_single_8ino-example.html">UDPClientSingle.ino</a></li>
+
+</ul>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/files.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/files.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/files.html	(revision 136)
@@ -0,0 +1,83 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: File List</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li class="current"><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li class="current"><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">File List</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock">Here is a list of all documented files with brief descriptions:</div><div class="directory">
+<div class="levels">[detail level <span onclick="javascript:toggleLevel(1);">1</span><span onclick="javascript:toggleLevel(2);">2</span><span onclick="javascript:toggleLevel(3);">3</span>]</div><table class="directory">
+<tr id="row_0_" class="even"><td class="entry"><span style="width:0px;display:inline-block;">&#160;</span><span id="arr_0_" class="arrow" onclick="toggleFolder('0_')">&#9660;</span><span id="img_0_" class="iconfopen" onclick="toggleFolder('0_')">&#160;</span><a class="el" href="dir_d28a4824dc47e487b107a5db32ef43c4.html" target="_self">examples</a></td><td class="desc"></td></tr>
+<tr id="row_0_0_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span id="arr_0_0_" class="arrow" onclick="toggleFolder('0_0_')">&#9660;</span><span id="img_0_0_" class="iconfopen" onclick="toggleFolder('0_0_')">&#160;</span><a class="el" href="dir_8d6221cc4158f181d53b350a968e25f7.html" target="_self">ConnectWiFi</a></td><td class="desc"></td></tr>
+<tr id="row_0_0_0_" class="even"><td class="entry"><span style="width:48px;display:inline-block;">&#160;</span><a href="_connect_wi_fi_8ino_source.html"><span class="icondoc"></span></a><b>ConnectWiFi.ino</b></td><td class="desc"></td></tr>
+<tr id="row_0_1_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span id="arr_0_1_" class="arrow" onclick="toggleFolder('0_1_')">&#9660;</span><span id="img_0_1_" class="iconfopen" onclick="toggleFolder('0_1_')">&#160;</span><a class="el" href="dir_e77b6112596a040608ac3c23911cc719.html" target="_self">HTTPGET</a></td><td class="desc"></td></tr>
+<tr id="row_0_1_0_" class="even"><td class="entry"><span style="width:48px;display:inline-block;">&#160;</span><a href="_h_t_t_p_g_e_t_8ino_source.html"><span class="icondoc"></span></a><b>HTTPGET.ino</b></td><td class="desc"></td></tr>
+<tr id="row_0_2_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span id="arr_0_2_" class="arrow" onclick="toggleFolder('0_2_')">&#9660;</span><span id="img_0_2_" class="iconfopen" onclick="toggleFolder('0_2_')">&#160;</span><a class="el" href="dir_f7dc4f4aec738992f977d5b3021cb4e4.html" target="_self">TCPClientMultiple</a></td><td class="desc"></td></tr>
+<tr id="row_0_2_0_" class="even"><td class="entry"><span style="width:48px;display:inline-block;">&#160;</span><a href="_t_c_p_client_multiple_8ino_source.html"><span class="icondoc"></span></a><b>TCPClientMultiple.ino</b></td><td class="desc"></td></tr>
+<tr id="row_0_3_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span id="arr_0_3_" class="arrow" onclick="toggleFolder('0_3_')">&#9660;</span><span id="img_0_3_" class="iconfopen" onclick="toggleFolder('0_3_')">&#160;</span><a class="el" href="dir_8897193998642bcd5bfc513741e45982.html" target="_self">TCPClientSingle</a></td><td class="desc"></td></tr>
+<tr id="row_0_3_0_" class="even"><td class="entry"><span style="width:48px;display:inline-block;">&#160;</span><a href="_t_c_p_client_single_8ino_source.html"><span class="icondoc"></span></a><b>TCPClientSingle.ino</b></td><td class="desc"></td></tr>
+<tr id="row_0_4_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span id="arr_0_4_" class="arrow" onclick="toggleFolder('0_4_')">&#9660;</span><span id="img_0_4_" class="iconfopen" onclick="toggleFolder('0_4_')">&#160;</span><a class="el" href="dir_7baf3e2c0fad72d16e1aad0d74b4aab1.html" target="_self">TCPClientSingleUNO</a></td><td class="desc"></td></tr>
+<tr id="row_0_4_0_" class="even"><td class="entry"><span style="width:48px;display:inline-block;">&#160;</span><a href="_t_c_p_client_single_u_n_o_8ino_source.html"><span class="icondoc"></span></a><b>TCPClientSingleUNO.ino</b></td><td class="desc"></td></tr>
+<tr id="row_0_5_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span id="arr_0_5_" class="arrow" onclick="toggleFolder('0_5_')">&#9660;</span><span id="img_0_5_" class="iconfopen" onclick="toggleFolder('0_5_')">&#160;</span><a class="el" href="dir_d2ed1861e8b23cc7f6c17b3a49969805.html" target="_self">TCPServer</a></td><td class="desc"></td></tr>
+<tr id="row_0_5_0_" class="even"><td class="entry"><span style="width:48px;display:inline-block;">&#160;</span><a href="_t_c_p_server_8ino_source.html"><span class="icondoc"></span></a><b>TCPServer.ino</b></td><td class="desc"></td></tr>
+<tr id="row_0_6_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span id="arr_0_6_" class="arrow" onclick="toggleFolder('0_6_')">&#9660;</span><span id="img_0_6_" class="iconfopen" onclick="toggleFolder('0_6_')">&#160;</span><a class="el" href="dir_5890e445ff7904d5f0f55dc78452c21e.html" target="_self">UDPClientMultiple</a></td><td class="desc"></td></tr>
+<tr id="row_0_6_0_" class="even"><td class="entry"><span style="width:48px;display:inline-block;">&#160;</span><a href="_u_d_p_client_multiple_8ino_source.html"><span class="icondoc"></span></a><b>UDPClientMultiple.ino</b></td><td class="desc"></td></tr>
+<tr id="row_0_7_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span id="arr_0_7_" class="arrow" onclick="toggleFolder('0_7_')">&#9660;</span><span id="img_0_7_" class="iconfopen" onclick="toggleFolder('0_7_')">&#160;</span><a class="el" href="dir_db2b6df4be8fe245a288f3ee89789028.html" target="_self">UDPClientSingle</a></td><td class="desc"></td></tr>
+<tr id="row_0_7_0_" class="even"><td class="entry"><span style="width:48px;display:inline-block;">&#160;</span><a href="_u_d_p_client_single_8ino_source.html"><span class="icondoc"></span></a><b>UDPClientSingle.ino</b></td><td class="desc"></td></tr>
+<tr id="row_1_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><a href="doxygen_8h_source.html"><span class="icondoc"></span></a><a class="el" href="doxygen_8h.html" target="_self">doxygen.h</a></td><td class="desc">Define modules in API doc </td></tr>
+<tr id="row_2_" class="even"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><a href="_e_s_p8266_8cpp_source.html"><span class="icondoc"></span></a><a class="el" href="_e_s_p8266_8cpp.html" target="_self">ESP8266.cpp</a></td><td class="desc">The implementation of class <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> </td></tr>
+<tr id="row_3_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><a href="_e_s_p8266_8h_source.html"><span class="icondoc"></span></a><a class="el" href="_e_s_p8266_8h.html" target="_self">ESP8266.h</a></td><td class="desc">The definition of class <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> </td></tr>
+</table>
+</div><!-- directory -->
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/functions.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/functions.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/functions.html	(revision 136)
@@ -0,0 +1,195 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: Class Members</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li class="current"><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="annotated.html"><span>Class&#160;List</span></a></li>
+      <li><a href="classes.html"><span>Class&#160;Index</span></a></li>
+      <li class="current"><a href="functions.html"><span>Class&#160;Members</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li class="current"><a href="functions.html"><span>All</span></a></li>
+      <li><a href="functions_func.html"><span>Functions</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li><a href="#index_c"><span>c</span></a></li>
+      <li><a href="#index_d"><span>d</span></a></li>
+      <li><a href="#index_e"><span>e</span></a></li>
+      <li><a href="#index_g"><span>g</span></a></li>
+      <li><a href="#index_j"><span>j</span></a></li>
+      <li><a href="#index_k"><span>k</span></a></li>
+      <li><a href="#index_l"><span>l</span></a></li>
+      <li><a href="#index_r"><span>r</span></a></li>
+      <li><a href="#index_s"><span>s</span></a></li>
+      <li class="current"><a href="#index_u"><span>u</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="contents">
+<div class="textblock">Here is a list of all documented class members with links to the class documentation for each member:</div>
+
+<h3><a class="anchor" id="index_c"></a>- c -</h3><ul>
+<li>createTCP()
+: <a class="el" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_d"></a>- d -</h3><ul>
+<li>disableMUX()
+: <a class="el" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_e"></a>- e -</h3><ul>
+<li>enableMUX()
+: <a class="el" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_g"></a>- g -</h3><ul>
+<li>getAPList()
+: <a class="el" href="class_e_s_p8266.html#af0cafe8a994349e81e75a35af9645a76">ESP8266</a>
+</li>
+<li>getIPStatus()
+: <a class="el" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">ESP8266</a>
+</li>
+<li>getJoinedDeviceIP()
+: <a class="el" href="class_e_s_p8266.html#a10c82a5196a8f349720a9c9ba7209a6e">ESP8266</a>
+</li>
+<li>getLocalIP()
+: <a class="el" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266</a>
+</li>
+<li>getVersion()
+: <a class="el" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_j"></a>- j -</h3><ul>
+<li>joinAP()
+: <a class="el" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_k"></a>- k -</h3><ul>
+<li>kick()
+: <a class="el" href="class_e_s_p8266.html#a5ed71947606435c3b03b73efdaf810a5">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_l"></a>- l -</h3><ul>
+<li>leaveAP()
+: <a class="el" href="class_e_s_p8266.html#aeda29748e0d28efa9d82c9c7fab1859b">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_r"></a>- r -</h3><ul>
+<li>recv()
+: <a class="el" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266</a>
+</li>
+<li>registerUDP()
+: <a class="el" href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">ESP8266</a>
+</li>
+<li>releaseTCP()
+: <a class="el" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">ESP8266</a>
+</li>
+<li>restart()
+: <a class="el" href="class_e_s_p8266.html#a04b61a01af4ee5e8820c9de79b4b3c39">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_s"></a>- s -</h3><ul>
+<li>send()
+: <a class="el" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266</a>
+</li>
+<li>setOprToSoftAP()
+: <a class="el" href="class_e_s_p8266.html#a247706884d60e85c8983bb65de26d346">ESP8266</a>
+</li>
+<li>setOprToStation()
+: <a class="el" href="class_e_s_p8266.html#a572c6f855d70078fdbff9ac2c4b1ce99">ESP8266</a>
+</li>
+<li>setOprToStationSoftAP()
+: <a class="el" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266</a>
+</li>
+<li>setSoftAPParam()
+: <a class="el" href="class_e_s_p8266.html#aacce786dc0ef289cd37a48642d2efef1">ESP8266</a>
+</li>
+<li>setTCPServerTimeout()
+: <a class="el" href="class_e_s_p8266.html#a71f76c76d23fc66c26f1c7b357f58ac2">ESP8266</a>
+</li>
+<li>startServer()
+: <a class="el" href="class_e_s_p8266.html#a88d9a6b130b6c278fd6cd2e6cda816d7">ESP8266</a>
+</li>
+<li>startTCPServer()
+: <a class="el" href="class_e_s_p8266.html#a22a7768a76709c8d8f0b9809158b7ec9">ESP8266</a>
+</li>
+<li>stopServer()
+: <a class="el" href="class_e_s_p8266.html#af272f2f57b7b99434e257f06c276acfc">ESP8266</a>
+</li>
+<li>stopTCPServer()
+: <a class="el" href="class_e_s_p8266.html#aa5355dce05aa59b92ce9f7ea76d86eef">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_u"></a>- u -</h3><ul>
+<li>unregisterUDP()
+: <a class="el" href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">ESP8266</a>
+</li>
+</ul>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/functions_func.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/functions_func.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/functions_func.html	(revision 136)
@@ -0,0 +1,195 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: Class Members - Functions</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li class="current"><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="annotated.html"><span>Class&#160;List</span></a></li>
+      <li><a href="classes.html"><span>Class&#160;Index</span></a></li>
+      <li class="current"><a href="functions.html"><span>Class&#160;Members</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li><a href="functions.html"><span>All</span></a></li>
+      <li class="current"><a href="functions_func.html"><span>Functions</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li><a href="#index_c"><span>c</span></a></li>
+      <li><a href="#index_d"><span>d</span></a></li>
+      <li><a href="#index_e"><span>e</span></a></li>
+      <li><a href="#index_g"><span>g</span></a></li>
+      <li><a href="#index_j"><span>j</span></a></li>
+      <li><a href="#index_k"><span>k</span></a></li>
+      <li><a href="#index_l"><span>l</span></a></li>
+      <li><a href="#index_r"><span>r</span></a></li>
+      <li><a href="#index_s"><span>s</span></a></li>
+      <li class="current"><a href="#index_u"><span>u</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="contents">
+&#160;
+
+<h3><a class="anchor" id="index_c"></a>- c -</h3><ul>
+<li>createTCP()
+: <a class="el" href="class_e_s_p8266.html#aa927b7b8aaef163011015c22da1f07e2">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_d"></a>- d -</h3><ul>
+<li>disableMUX()
+: <a class="el" href="class_e_s_p8266.html#a2bc64145329ea45018e956b97ced030a">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_e"></a>- e -</h3><ul>
+<li>enableMUX()
+: <a class="el" href="class_e_s_p8266.html#a16963a076b80906563d2269c0cd52007">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_g"></a>- g -</h3><ul>
+<li>getAPList()
+: <a class="el" href="class_e_s_p8266.html#af0cafe8a994349e81e75a35af9645a76">ESP8266</a>
+</li>
+<li>getIPStatus()
+: <a class="el" href="class_e_s_p8266.html#ad273286fbb8627a612249a232d53ca22">ESP8266</a>
+</li>
+<li>getJoinedDeviceIP()
+: <a class="el" href="class_e_s_p8266.html#a10c82a5196a8f349720a9c9ba7209a6e">ESP8266</a>
+</li>
+<li>getLocalIP()
+: <a class="el" href="class_e_s_p8266.html#a20819d4dabf19fed6e3dcb3fd04ee49d">ESP8266</a>
+</li>
+<li>getVersion()
+: <a class="el" href="class_e_s_p8266.html#a4e2d8a0637b437d4b03209cebfa5b750">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_j"></a>- j -</h3><ul>
+<li>joinAP()
+: <a class="el" href="class_e_s_p8266.html#a300535b4b5f001b74058ebcc694a749f">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_k"></a>- k -</h3><ul>
+<li>kick()
+: <a class="el" href="class_e_s_p8266.html#a5ed71947606435c3b03b73efdaf810a5">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_l"></a>- l -</h3><ul>
+<li>leaveAP()
+: <a class="el" href="class_e_s_p8266.html#aeda29748e0d28efa9d82c9c7fab1859b">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_r"></a>- r -</h3><ul>
+<li>recv()
+: <a class="el" href="class_e_s_p8266.html#af8ce40bd14556bcfb5d4c521047fc821">ESP8266</a>
+</li>
+<li>registerUDP()
+: <a class="el" href="class_e_s_p8266.html#af8d3305a28d862c0cf353d0d758b96d4">ESP8266</a>
+</li>
+<li>releaseTCP()
+: <a class="el" href="class_e_s_p8266.html#ac15ce9df69dc566c37b3fa2c3c869337">ESP8266</a>
+</li>
+<li>restart()
+: <a class="el" href="class_e_s_p8266.html#a04b61a01af4ee5e8820c9de79b4b3c39">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_s"></a>- s -</h3><ul>
+<li>send()
+: <a class="el" href="class_e_s_p8266.html#a6ba21b921a7afc79a36d0e41c20d59bc">ESP8266</a>
+</li>
+<li>setOprToSoftAP()
+: <a class="el" href="class_e_s_p8266.html#a247706884d60e85c8983bb65de26d346">ESP8266</a>
+</li>
+<li>setOprToStation()
+: <a class="el" href="class_e_s_p8266.html#a572c6f855d70078fdbff9ac2c4b1ce99">ESP8266</a>
+</li>
+<li>setOprToStationSoftAP()
+: <a class="el" href="class_e_s_p8266.html#ac179183a46b218609a481747bcfd5a61">ESP8266</a>
+</li>
+<li>setSoftAPParam()
+: <a class="el" href="class_e_s_p8266.html#aacce786dc0ef289cd37a48642d2efef1">ESP8266</a>
+</li>
+<li>setTCPServerTimeout()
+: <a class="el" href="class_e_s_p8266.html#a71f76c76d23fc66c26f1c7b357f58ac2">ESP8266</a>
+</li>
+<li>startServer()
+: <a class="el" href="class_e_s_p8266.html#a88d9a6b130b6c278fd6cd2e6cda816d7">ESP8266</a>
+</li>
+<li>startTCPServer()
+: <a class="el" href="class_e_s_p8266.html#a22a7768a76709c8d8f0b9809158b7ec9">ESP8266</a>
+</li>
+<li>stopServer()
+: <a class="el" href="class_e_s_p8266.html#af272f2f57b7b99434e257f06c276acfc">ESP8266</a>
+</li>
+<li>stopTCPServer()
+: <a class="el" href="class_e_s_p8266.html#aa5355dce05aa59b92ce9f7ea76d86eef">ESP8266</a>
+</li>
+</ul>
+
+
+<h3><a class="anchor" id="index_u"></a>- u -</h3><ul>
+<li>unregisterUDP()
+: <a class="el" href="class_e_s_p8266.html#aa355332a78aa5f2b58cb11b0daa05cf5">ESP8266</a>
+</li>
+</ul>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___error.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___error.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___error.html	(revision 136)
@@ -0,0 +1,59 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: Error</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="modules.html"><span>Modules</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">Error</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Constants of error types.  
+<a href="#details">More...</a></p>
+<p>Constants of error types. </p>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:27:06 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___io_tgo.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___io_tgo.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___io_tgo.html	(revision 136)
@@ -0,0 +1,59 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: IoTgo</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="modules.html"><span>Modules</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">IoTgo</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Just like a http proxy in charge of communication between local device and IoTgo platform(server).  
+<a href="#details">More...</a></p>
+<p>Just like a http proxy in charge of communication between local device and IoTgo platform(server). </p>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:27:06 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___light.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___light.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___light.html	(revision 136)
@@ -0,0 +1,59 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: Light</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="modules.html"><span>Modules</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">Light</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Light device of IoTgo platform.  
+<a href="#details">More...</a></p>
+<p>Light device of IoTgo platform. </p>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:27:06 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___net_interface.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___net_interface.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___net_interface.html	(revision 136)
@@ -0,0 +1,59 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: NetInterface</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="modules.html"><span>Modules</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">NetInterface</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Provides unified interface accessing internet.  
+<a href="#details">More...</a></p>
+<p>Provides unified interface accessing internet. </p>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:27:06 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___switch.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___switch.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___switch.html	(revision 136)
@@ -0,0 +1,59 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.7"/>
+<title>API: Switch</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
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+<!-- Generated by Doxygen 1.8.7 -->
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
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+  <div class="headertitle">
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+
+<p>Switch device of IoTgo platform.  
+<a href="#details">More...</a></p>
+<p>Switch device of IoTgo platform. </p>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:27:06 for API by &#160;<a href="http://www.doxygen.org/index.html">
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___t_h_sensor.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___t_h_sensor.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___t_h_sensor.html	(revision 136)
@@ -0,0 +1,59 @@
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+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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+<title>API: THSensor</title>
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+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.7 -->
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+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="modules.html"><span>Modules</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
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+    </ul>
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+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">THSensor</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>THSensor device of IoTgo platform.  
+<a href="#details">More...</a></p>
+<p>THSensor device of IoTgo platform. </p>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:27:06 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
+</a> 1.8.7
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___t_h_sensor_interface.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___t_h_sensor_interface.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/group___t_h_sensor_interface.html	(revision 136)
@@ -0,0 +1,59 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
+      <li><a href="modules.html"><span>Modules</span></a></li>
+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">THSensorInterface</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Provides unified interface to read data from Temp &amp; Humidity Sensors.  
+<a href="#details">More...</a></p>
+<p>Provides unified interface to read data from Temp &amp; Humidity Sensors. </p>
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:27:06 for API by &#160;<a href="http://www.doxygen.org/index.html">
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+</a> 1.8.7
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.hhc
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.hhk
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.hhk	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.hhk	(revision 136)
@@ -0,0 +1,65 @@
+<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML//EN">
+<HTML><HEAD></HEAD><BODY>
+<OBJECT type="text/site properties">
+<param name="FrameName" value="right">
+</OBJECT>
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+</UL>
+</BODY>
+</HTML>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.hhp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.hhp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.hhp	(revision 136)
@@ -0,0 +1,85 @@
+[OPTIONS]
+Compiled file=../API.chm
+Compatibility=1.1
+Full-text search=Yes
+Contents file=index.hhc
+Default Window=main
+Default topic=index.html
+Index file=index.hhk
+Language=0x409 English (United States)
+Title=API
+
+[WINDOWS]
+main="API","index.hhc","index.hhk","index.html","index.html",,,,,0x23520,,0x10387e,,,,,,,,0
+
+[FILES]
+_connect_wi_fi_8ino-example.html
+_h_t_t_p_g_e_t_8ino-example.html
+_t_c_p_client_multiple_8ino-example.html
+_t_c_p_client_single_8ino-example.html
+_t_c_p_client_single_u_n_o_8ino-example.html
+_t_c_p_server_8ino-example.html
+_u_d_p_client_multiple_8ino-example.html
+_u_d_p_client_single_8ino-example.html
+doxygen_8h_source.html
+_e_s_p8266_8cpp_source.html
+_e_s_p8266_8h_source.html
+_connect_wi_fi_8ino_source.html
+_h_t_t_p_g_e_t_8ino_source.html
+_t_c_p_client_multiple_8ino_source.html
+_t_c_p_client_single_8ino_source.html
+_t_c_p_client_single_u_n_o_8ino_source.html
+_t_c_p_server_8ino_source.html
+_u_d_p_client_multiple_8ino_source.html
+_u_d_p_client_single_8ino_source.html
+_r_e_a_d_m_e_8md_source.html
+doxygen_8h.html
+_e_s_p8266_8cpp.html
+_e_s_p8266_8h.html
+md__r_e_a_d_m_e.html
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+class_e_s_p8266-members.html
+dir_8d6221cc4158f181d53b350a968e25f7.html
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+files.html
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.html
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.html	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/index.html	(revision 136)
@@ -0,0 +1,173 @@
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+  <td id="projectlogo"><img alt="Logo" src="ITEAD-logo.JPG"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">API
+   </div>
+   <div id="projectbrief">For Arduino developers</div>
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+<!-- end header part -->
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+      <li class="current"><a href="index.html"><span>Main&#160;Page</span></a></li>
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+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
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+<div class="header">
+  <div class="headertitle">
+<div class="title">API Documentation</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><h1>WeeESP8266</h1>
+<p>An <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> library for Arduino providing an easy-to-use way to manipulate <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>.</p>
+<h1>Source</h1>
+<p>Source can be download at <a href="https://github.com/itead/ITEADLIB_Arduino_WeeESP8266">https://github.com/itead/ITEADLIB_Arduino_WeeESP8266</a>.</p>
+<p>You can clone it by: </p><pre class="fragment">git clone https://github.com/itead/ITEADLIB_Arduino_WeeESP8266.git
+</pre><h1>Documentation</h1>
+<p>Online API documentation can be reached at <a href="http://docs.iteadstudio.com/ITEADLIB_Arduino_WeeESP8266/index.html">http://docs.iteadstudio.com/ITEADLIB_Arduino_WeeESP8266/index.html</a>.</p>
+<p>Offline API documentation can be found under directory <a href="https://github.com/itead/ITEADLIB_Arduino_WeeESP8266/tree/master/doc">doc</a>.</p>
+<h1>How to get started</h1>
+<p>On the home page of API documentation, the tabs of Examples, Classes and Modules will be useful for Arduino lovers.</p>
+<h1>API List</h1>
+<pre class="fragment">bool    kick (void) : Verify ESP8266 whether live or not.
+
+bool    restart (void) : Restart ESP8266 by "AT+RST".
+
+String  getVersion (void) : Get the version of AT Command Set.
+
+bool    setOprToStation (void) : Set operation mode to staion.
+
+bool    setOprToSoftAP (void) : Set operation mode to softap.
+
+bool    setOprToStationSoftAP (void) : Set operation mode to station + softap.
+
+String  getAPList (void) : Search available AP list and return it.
+
+bool    joinAP (String ssid, String pwd) : Join in AP. 
+
+bool    leaveAP (void) : Leave AP joined before. 
+
+bool    setSoftAPParam (String ssid, String pwd, uint8_t chl=7, uint8_t ecn=4) : Set SoftAP parameters. 
+
+String  getJoinedDeviceIP (void) : Get the IP list of devices connected to SoftAP. 
+
+String  getIPStatus (void) : Get the current status of connection(UDP and TCP). 
+
+String  getLocalIP (void) : Get the IP address of ESP8266. 
+
+bool    enableMUX (void) : Enable IP MUX(multiple connection mode). 
+
+bool    disableMUX (void) : Disable IP MUX(single connection mode). 
+
+bool    createTCP (String addr, uint32_t port) : Create TCP connection in single mode. 
+
+bool    releaseTCP (void) : Release TCP connection in single mode. 
+
+bool    registerUDP (String addr, uint32_t port) : Register UDP port number in single mode. 
+
+bool    unregisterUDP (void) : Unregister UDP port number in single mode. 
+
+bool    createTCP (uint8_t mux_id, String addr, uint32_t port) : Create TCP connection in multiple mode. 
+
+bool    releaseTCP (uint8_t mux_id) : Release TCP connection in multiple mode. 
+
+bool    registerUDP (uint8_t mux_id, String addr, uint32_t port) : Register UDP port number in multiple mode. 
+
+bool    unregisterUDP (uint8_t mux_id) : Unregister UDP port number in multiple mode. 
+
+bool    setTCPServerTimeout (uint32_t timeout=180) : Set the timeout of TCP Server. 
+
+bool    startServer (uint32_t port=333) ï¼ Start Server(Only in multiple mode).
+
+bool    stopServer (void) : Stop Server(Only in multiple mode).
+
+bool    startTCPServer (uint32_t port=333) : Start TCP Server(Only in multiple mode). 
+
+bool    stopTCPServer (void) : Stop TCP Server(Only in multiple mode). 
+
+bool    send (const uint8_t *buffer, uint32_t len) : Send data based on TCP or UDP builded already in single mode. 
+
+bool    send (uint8_t mux_id, const uint8_t *buffer, uint32_t len) : Send data based on one of TCP or UDP builded already in multiple mode. 
+
+uint32_t    recv (uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000) : Receive data from TCP or UDP builded already in single mode. 
+
+uint32_t    recv (uint8_t mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000) : Receive data from one of TCP or UDP builded already in multiple mode. 
+
+uint32_t    recv (uint8_t *coming_mux_id, uint8_t *buffer, uint32_t buffer_size, uint32_t timeout=1000) : Receive data from all of TCP or UDP builded already in multiple mode. 
+</pre><h1>Mainboard Requires</h1>
+<ul>
+<li>RAM: not less than 2KBytes</li>
+<li>Serial: one serial (HardwareSerial or SoftwareSerial) at least</li>
+</ul>
+<h1>Suppported Mainboards</h1>
+<ul>
+<li>Arduino UNO and its derivatives</li>
+<li>Arduino MEGA and its derivatives</li>
+<li><a href="http://imall.iteadstudio.com/im130312001.html">Iteaduino UNO</a></li>
+<li><a href="http://imall.iteadstudio.com/im141125005.html">WBoard Pro</a></li>
+</ul>
+<h1>Using SoftwareSerial</h1>
+<p>If you want to use SoftwareSerial to communicate with <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a>, you need to modify the line in file <code><a class="el" href="_e_s_p8266_8h.html" title="The definition of class ESP8266. ">ESP8266.h</a></code>: </p><pre class="fragment">//#define ESP8266_USE_SOFTWARE_SERIAL
+</pre><p>After modification, it should be: </p><pre class="fragment">#define ESP8266_USE_SOFTWARE_SERIAL
+</pre><h1>Hardware Connection</h1>
+<p>WeeESP8266 library only needs an uart for hardware connection. All communications are done via uart. In each example, you must specify the uart used by mainboard to communicate with <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> flashed AT firmware.</p>
+<h2>MEGA and WBoard Pro</h2>
+<p>For MEGA and WBoard Pro, <code>Serial1</code> will be used if you create an object (named wifi) of class <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> in your code like this: </p><pre class="fragment">#include "ESP8266.h"
+ESP8266 wifi(Serial1);
+</pre><p>The connection should be like these: </p><pre class="fragment">ESP8266_TX-&gt;RX1(D19)
+ESP8266_RX-&gt;TX1(D18)
+ESP8266_CH_PD-&gt;3.3V
+ESP8266_VCC-&gt;3.3V
+ESP8266_GND-&gt;GND
+</pre><h2>UNO</h2>
+<p>To use SoftwareSerial, <code>mySerial</code> will be used if you create an object (named wifi) of class <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> in your code like this: </p><pre class="fragment">#include "ESP8266.h"
+#include &lt;SoftwareSerial.h&gt;
+
+SoftwareSerial mySerial(3, 2); /* RX:D3, TX:D2 */
+ESP8266 wifi(mySerial);
+</pre><p>The connection should be like these: </p><pre class="fragment">ESP8266_TX-&gt;RX(D3)
+ESP8266_RX-&gt;TX(D2)
+ESP8266_CH_PD-&gt;3.3V
+ESP8266_VCC-&gt;3.3V
+ESP8266_GND-&gt;GND
+</pre><h1>Attention</h1>
+<p>The size of data from <a class="el" href="class_e_s_p8266.html" title="Provide an easy-to-use way to manipulate ESP8266. ">ESP8266</a> is too big for arduino sometimes, so the library can't receive the whole buffer because the size of the hardware serial buffer which is defined in HardwareSerial.h is too small.</p>
+<p>Open the file from <code>\arduino\hardware\arduino\avr\cores\arduino\HardwareSerial.h</code>. See the follow line in the HardwareSerial.h file. </p><pre class="fragment">#define SERIAL_BUFFER_SIZE 64
+</pre><p>The default size of the buffer is 64. Change it into a bigger number, like 256 or more.</p>
+<hr/>
+<h1>The End!</h1>
+<hr/>
+ </div></div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
+<img class="footer" src="doxygen.png" alt="doxygen"/>
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+</small></address>
+</body>
+</html>
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/jquery.js
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--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/jquery.js	(revision 136)
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"+bA[bB]+" ")){bz+=bA[bB]+" "}}bx.className=b.trim(bz)}}}}return this},removeClass:function(bz){var bA,bw,bv,by,bx,bB,e;if(b.isFunction(bz)){return this.each(function(bC){b(this).removeClass(bz.call(this,bC,this.className))})}if((bz&&typeof bz==="string")||bz===L){bA=(bz||"").split(af);for(bw=0,bv=this.length;bw<bv;bw++){by=this[bw];if(by.nodeType===1&&by.className){if(bz){bx=(" "+by.className+" ").replace(aP," ");for(bB=0,e=bA.length;bB<e;bB++){bx=bx.replace(" "+bA[bB]+" "," ")}by.className=b.trim(bx)}else{by.className=""}}}}return this},toggleClass:function(bx,bv){var bw=typeof bx,e=typeof bv==="boolean";if(b.isFunction(bx)){return this.each(function(by){b(this).toggleClass(bx.call(this,by,this.className,bv),bv)})}return this.each(function(){if(bw==="string"){var bA,bz=0,by=b(this),bB=bv,bC=bx.split(af);while((bA=bC[bz++])){bB=e?bB:!by.hasClass(bA);by[bB?"addClass":"removeClass"](bA)}}else{if(bw==="undefined"||bw==="boolean"){if(this.className){b._data(this,"__className__",this.className)}this.className=this.className||bx===false?"":b._data(this,"__className__")||""}}})},hasClass:function(e){var bx=" "+e+" ",bw=0,bv=this.length;for(;bw<bv;bw++){if(this[bw].nodeType===1&&(" "+this[bw].className+" ").replace(aP," ").indexOf(bx)>-1){return true}}return false},val:function(bx){var e,bv,by,bw=this[0];if(!arguments.length){if(bw){e=b.valHooks[bw.nodeName.toLowerCase()]||b.valHooks[bw.type];if(e&&"get" in e&&(bv=e.get(bw,"value"))!==L){return bv}bv=bw.value;return typeof bv==="string"?bv.replace(aU,""):bv==null?"":bv}return}by=b.isFunction(bx);return this.each(function(bA){var bz=b(this),bB;if(this.nodeType!==1){return}if(by){bB=bx.call(this,bA,bz.val())}else{bB=bx}if(bB==null){bB=""}else{if(typeof bB==="number"){bB+=""}else{if(b.isArray(bB)){bB=b.map(bB,function(bC){return bC==null?"":bC+""})}}}e=b.valHooks[this.nodeName.toLowerCase()]||b.valHooks[this.type];if(!e||!("set" in e)||e.set(this,bB,"value")===L){this.value=bB}})}});b.extend({valHooks:{option:{get:function(e){var bv=e.attributes.value;return !bv||bv.specified?e.value:e.text}},select:{get:function(e){var bA,bv,bz,bx,by=e.selectedIndex,bB=[],bC=e.options,bw=e.type==="select-one";if(by<0){return null}bv=bw?by:0;bz=bw?by+1:bC.length;for(;bv<bz;bv++){bx=bC[bv];if(bx.selected&&(b.support.optDisabled?!bx.disabled:bx.getAttribute("disabled")===null)&&(!bx.parentNode.disabled||!b.nodeName(bx.parentNode,"optgroup"))){bA=b(bx).val();if(bw){return bA}bB.push(bA)}}if(bw&&!bB.length&&bC.length){return b(bC[by]).val()}return bB},set:function(bv,bw){var e=b.makeArray(bw);b(bv).find("option").each(function(){this.selected=b.inArray(b(this).val(),e)>=0});if(!e.length){bv.selectedIndex=-1}return e}}},attrFn:{val:true,css:true,html:true,text:true,data:true,width:true,height:true,offset:true},attr:function(bA,bx,bB,bz){var bw,e,by,bv=bA.nodeType;
+if(!bA||bv===3||bv===8||bv===2){return}if(bz&&bx in b.attrFn){return b(bA)[bx](bB)}if(typeof bA.getAttribute==="undefined"){return b.prop(bA,bx,bB)}by=bv!==1||!b.isXMLDoc(bA);if(by){bx=bx.toLowerCase();e=b.attrHooks[bx]||(ao.test(bx)?aY:be)}if(bB!==L){if(bB===null){b.removeAttr(bA,bx);return}else{if(e&&"set" in e&&by&&(bw=e.set(bA,bB,bx))!==L){return bw}else{bA.setAttribute(bx,""+bB);return bB}}}else{if(e&&"get" in e&&by&&(bw=e.get(bA,bx))!==null){return bw}else{bw=bA.getAttribute(bx);return bw===null?L:bw}}},removeAttr:function(bx,bz){var by,bA,bv,e,bw=0;if(bz&&bx.nodeType===1){bA=bz.toLowerCase().split(af);e=bA.length;for(;bw<e;bw++){bv=bA[bw];if(bv){by=b.propFix[bv]||bv;b.attr(bx,bv,"");bx.removeAttribute(F?bv:by);if(ao.test(bv)&&by in bx){bx[by]=false}}}}},attrHooks:{type:{set:function(e,bv){if(g.test(e.nodeName)&&e.parentNode){b.error("type property can't be changed")}else{if(!b.support.radioValue&&bv==="radio"&&b.nodeName(e,"input")){var bw=e.value;e.setAttribute("type",bv);if(bw){e.value=bw}return bv}}}},value:{get:function(bv,e){if(be&&b.nodeName(bv,"button")){return be.get(bv,e)}return e in bv?bv.value:null},set:function(bv,bw,e){if(be&&b.nodeName(bv,"button")){return be.set(bv,bw,e)}bv.value=bw}}},propFix:{tabindex:"tabIndex",readonly:"readOnly","for":"htmlFor","class":"className",maxlength:"maxLength",cellspacing:"cellSpacing",cellpadding:"cellPadding",rowspan:"rowSpan",colspan:"colSpan",usemap:"useMap",frameborder:"frameBorder",contenteditable:"contentEditable"},prop:function(bz,bx,bA){var bw,e,by,bv=bz.nodeType;if(!bz||bv===3||bv===8||bv===2){return}by=bv!==1||!b.isXMLDoc(bz);if(by){bx=b.propFix[bx]||bx;e=b.propHooks[bx]}if(bA!==L){if(e&&"set" in e&&(bw=e.set(bz,bA,bx))!==L){return bw}else{return(bz[bx]=bA)}}else{if(e&&"get" in e&&(bw=e.get(bz,bx))!==null){return bw}else{return bz[bx]}}},propHooks:{tabIndex:{get:function(bv){var e=bv.getAttributeNode("tabindex");return e&&e.specified?parseInt(e.value,10):D.test(bv.nodeName)||l.test(bv.nodeName)&&bv.href?0:L}}}});b.attrHooks.tabindex=b.propHooks.tabIndex;aY={get:function(bv,e){var bx,bw=b.prop(bv,e);return bw===true||typeof bw!=="boolean"&&(bx=bv.getAttributeNode(e))&&bx.nodeValue!==false?e.toLowerCase():L},set:function(bv,bx,e){var bw;if(bx===false){b.removeAttr(bv,e)}else{bw=b.propFix[e]||e;if(bw in bv){bv[bw]=true}bv.setAttribute(e,e.toLowerCase())}return e}};if(!F){aF={name:true,id:true};be=b.valHooks.button={get:function(bw,bv){var e;e=bw.getAttributeNode(bv);return e&&(aF[bv]?e.nodeValue!=="":e.specified)?e.nodeValue:L},set:function(bw,bx,bv){var e=bw.getAttributeNode(bv);if(!e){e=av.createAttribute(bv);bw.setAttributeNode(e)}return(e.nodeValue=bx+"")}};b.attrHooks.tabindex.set=be.set;b.each(["width","height"],function(bv,e){b.attrHooks[e]=b.extend(b.attrHooks[e],{set:function(bw,bx){if(bx===""){bw.setAttribute(e,"auto");return bx}}})});b.attrHooks.contenteditable={get:be.get,set:function(bv,bw,e){if(bw===""){bw="false"}be.set(bv,bw,e)}}}if(!b.support.hrefNormalized){b.each(["href","src","width","height"],function(bv,e){b.attrHooks[e]=b.extend(b.attrHooks[e],{get:function(bx){var bw=bx.getAttribute(e,2);return bw===null?L:bw}})})}if(!b.support.style){b.attrHooks.style={get:function(e){return e.style.cssText.toLowerCase()||L},set:function(e,bv){return(e.style.cssText=""+bv)}}}if(!b.support.optSelected){b.propHooks.selected=b.extend(b.propHooks.selected,{get:function(bv){var e=bv.parentNode;if(e){e.selectedIndex;if(e.parentNode){e.parentNode.selectedIndex}}return null}})}if(!b.support.enctype){b.propFix.enctype="encoding"}if(!b.support.checkOn){b.each(["radio","checkbox"],function(){b.valHooks[this]={get:function(e){return e.getAttribute("value")===null?"on":e.value}}})}b.each(["radio","checkbox"],function(){b.valHooks[this]=b.extend(b.valHooks[this],{set:function(e,bv){if(b.isArray(bv)){return(e.checked=b.inArray(b(e).val(),bv)>=0)}}})});var bd=/^(?:textarea|input|select)$/i,n=/^([^\.]*)?(?:\.(.+))?$/,J=/\bhover(\.\S+)?\b/,aO=/^key/,bf=/^(?:mouse|contextmenu)|click/,T=/^(?:focusinfocus|focusoutblur)$/,U=/^(\w*)(?:#([\w\-]+))?(?:\.([\w\-]+))?$/,Y=function(e){var bv=U.exec(e);if(bv){bv[1]=(bv[1]||"").toLowerCase();bv[3]=bv[3]&&new RegExp("(?:^|\\s)"+bv[3]+"(?:\\s|$)")}return bv},j=function(bw,e){var bv=bw.attributes||{};return((!e[1]||bw.nodeName.toLowerCase()===e[1])&&(!e[2]||(bv.id||{}).value===e[2])&&(!e[3]||e[3].test((bv["class"]||{}).value)))},bt=function(e){return b.event.special.hover?e:e.replace(J,"mouseenter$1 mouseleave$1")};b.event={add:function(bx,bC,bJ,bA,by){var bD,bB,bK,bI,bH,bF,e,bG,bv,bz,bw,bE;if(bx.nodeType===3||bx.nodeType===8||!bC||!bJ||!(bD=b._data(bx))){return}if(bJ.handler){bv=bJ;bJ=bv.handler}if(!bJ.guid){bJ.guid=b.guid++}bK=bD.events;if(!bK){bD.events=bK={}}bB=bD.handle;if(!bB){bD.handle=bB=function(bL){return typeof b!=="undefined"&&(!bL||b.event.triggered!==bL.type)?b.event.dispatch.apply(bB.elem,arguments):L};bB.elem=bx}bC=b.trim(bt(bC)).split(" ");for(bI=0;bI<bC.length;bI++){bH=n.exec(bC[bI])||[];bF=bH[1];e=(bH[2]||"").split(".").sort();bE=b.event.special[bF]||{};bF=(by?bE.delegateType:bE.bindType)||bF;bE=b.event.special[bF]||{};bG=b.extend({type:bF,origType:bH[1],data:bA,handler:bJ,guid:bJ.guid,selector:by,quick:Y(by),namespace:e.join(".")},bv);bw=bK[bF];if(!bw){bw=bK[bF]=[];bw.delegateCount=0;if(!bE.setup||bE.setup.call(bx,bA,e,bB)===false){if(bx.addEventListener){bx.addEventListener(bF,bB,false)}else{if(bx.attachEvent){bx.attachEvent("on"+bF,bB)}}}}if(bE.add){bE.add.call(bx,bG);if(!bG.handler.guid){bG.handler.guid=bJ.guid}}if(by){bw.splice(bw.delegateCount++,0,bG)}else{bw.push(bG)}b.event.global[bF]=true}bx=null},global:{},remove:function(bJ,bE,bv,bH,bB){var bI=b.hasData(bJ)&&b._data(bJ),bF,bx,bz,bL,bC,bA,bG,bw,by,bK,bD,e;if(!bI||!(bw=bI.events)){return}bE=b.trim(bt(bE||"")).split(" ");for(bF=0;bF<bE.length;bF++){bx=n.exec(bE[bF])||[];bz=bL=bx[1];bC=bx[2];if(!bz){for(bz in bw){b.event.remove(bJ,bz+bE[bF],bv,bH,true)}continue}by=b.event.special[bz]||{};bz=(bH?by.delegateType:by.bindType)||bz;bD=bw[bz]||[];bA=bD.length;bC=bC?new RegExp("(^|\\.)"+bC.split(".").sort().join("\\.(?:.*\\.)?")+"(\\.|$)"):null;for(bG=0;bG<bD.length;bG++){e=bD[bG];if((bB||bL===e.origType)&&(!bv||bv.guid===e.guid)&&(!bC||bC.test(e.namespace))&&(!bH||bH===e.selector||bH==="**"&&e.selector)){bD.splice(bG--,1);if(e.selector){bD.delegateCount--}if(by.remove){by.remove.call(bJ,e)}}}if(bD.length===0&&bA!==bD.length){if(!by.teardown||by.teardown.call(bJ,bC)===false){b.removeEvent(bJ,bz,bI.handle)}delete bw[bz]}}if(b.isEmptyObject(bw)){bK=bI.handle;if(bK){bK.elem=null}b.removeData(bJ,["events","handle"],true)}},customEvent:{getData:true,setData:true,changeData:true},trigger:function(bv,bD,bA,bJ){if(bA&&(bA.nodeType===3||bA.nodeType===8)){return}var bG=bv.type||bv,bx=[],e,bw,bC,bH,bz,by,bF,bE,bB,bI;if(T.test(bG+b.event.triggered)){return}if(bG.indexOf("!")>=0){bG=bG.slice(0,-1);bw=true}if(bG.indexOf(".")>=0){bx=bG.split(".");bG=bx.shift();bx.sort()}if((!bA||b.event.customEvent[bG])&&!b.event.global[bG]){return}bv=typeof bv==="object"?bv[b.expando]?bv:new b.Event(bG,bv):new b.Event(bG);bv.type=bG;bv.isTrigger=true;bv.exclusive=bw;bv.namespace=bx.join(".");bv.namespace_re=bv.namespace?new RegExp("(^|\\.)"+bx.join("\\.(?:.*\\.)?")+"(\\.|$)"):null;by=bG.indexOf(":")<0?"on"+bG:"";if(!bA){e=b.cache;for(bC in e){if(e[bC].events&&e[bC].events[bG]){b.event.trigger(bv,bD,e[bC].handle.elem,true)}}return}bv.result=L;if(!bv.target){bv.target=bA}bD=bD!=null?b.makeArray(bD):[];bD.unshift(bv);bF=b.event.special[bG]||{};if(bF.trigger&&bF.trigger.apply(bA,bD)===false){return}bB=[[bA,bF.bindType||bG]];if(!bJ&&!bF.noBubble&&!b.isWindow(bA)){bI=bF.delegateType||bG;bH=T.test(bI+bG)?bA:bA.parentNode;bz=null;for(;bH;bH=bH.parentNode){bB.push([bH,bI]);bz=bH}if(bz&&bz===bA.ownerDocument){bB.push([bz.defaultView||bz.parentWindow||bb,bI])}}for(bC=0;bC<bB.length&&!bv.isPropagationStopped();bC++){bH=bB[bC][0];bv.type=bB[bC][1];bE=(b._data(bH,"events")||{})[bv.type]&&b._data(bH,"handle");if(bE){bE.apply(bH,bD)}bE=by&&bH[by];if(bE&&b.acceptData(bH)&&bE.apply(bH,bD)===false){bv.preventDefault()}}bv.type=bG;if(!bJ&&!bv.isDefaultPrevented()){if((!bF._default||bF._default.apply(bA.ownerDocument,bD)===false)&&!(bG==="click"&&b.nodeName(bA,"a"))&&b.acceptData(bA)){if(by&&bA[bG]&&((bG!=="focus"&&bG!=="blur")||bv.target.offsetWidth!==0)&&!b.isWindow(bA)){bz=bA[by];if(bz){bA[by]=null}b.event.triggered=bG;bA[bG]();b.event.triggered=L;if(bz){bA[by]=bz}}}}return bv.result},dispatch:function(e){e=b.event.fix(e||bb.event);var bz=((b._data(this,"events")||{})[e.type]||[]),bA=bz.delegateCount,bG=[].slice.call(arguments,0),by=!e.exclusive&&!e.namespace,bH=[],bC,bB,bK,bx,bF,bE,bv,bD,bI,bw,bJ;bG[0]=e;e.delegateTarget=this;if(bA&&!e.target.disabled&&!(e.button&&e.type==="click")){bx=b(this);bx.context=this.ownerDocument||this;for(bK=e.target;bK!=this;bK=bK.parentNode||this){bE={};bD=[];bx[0]=bK;for(bC=0;bC<bA;bC++){bI=bz[bC];bw=bI.selector;if(bE[bw]===L){bE[bw]=(bI.quick?j(bK,bI.quick):bx.is(bw))}if(bE[bw]){bD.push(bI)}}if(bD.length){bH.push({elem:bK,matches:bD})}}}if(bz.length>bA){bH.push({elem:this,matches:bz.slice(bA)})}for(bC=0;bC<bH.length&&!e.isPropagationStopped();bC++){bv=bH[bC];e.currentTarget=bv.elem;for(bB=0;bB<bv.matches.length&&!e.isImmediatePropagationStopped();bB++){bI=bv.matches[bB];if(by||(!e.namespace&&!bI.namespace)||e.namespace_re&&e.namespace_re.test(bI.namespace)){e.data=bI.data;e.handleObj=bI;bF=((b.event.special[bI.origType]||{}).handle||bI.handler).apply(bv.elem,bG);if(bF!==L){e.result=bF;if(bF===false){e.preventDefault();e.stopPropagation()}}}}}return e.result},props:"attrChange attrName relatedNode srcElement altKey bubbles cancelable ctrlKey currentTarget eventPhase metaKey relatedTarget shiftKey target timeStamp view which".split(" "),fixHooks:{},keyHooks:{props:"char charCode key keyCode".split(" "),filter:function(bv,e){if(bv.which==null){bv.which=e.charCode!=null?e.charCode:e.keyCode}return bv}},mouseHooks:{props:"button buttons clientX clientY fromElement offsetX offsetY pageX pageY screenX screenY toElement".split(" "),filter:function(bx,bw){var by,bz,e,bv=bw.button,bA=bw.fromElement;if(bx.pageX==null&&bw.clientX!=null){by=bx.target.ownerDocument||av;bz=by.documentElement;e=by.body;bx.pageX=bw.clientX+(bz&&bz.scrollLeft||e&&e.scrollLeft||0)-(bz&&bz.clientLeft||e&&e.clientLeft||0);bx.pageY=bw.clientY+(bz&&bz.scrollTop||e&&e.scrollTop||0)-(bz&&bz.clientTop||e&&e.clientTop||0)}if(!bx.relatedTarget&&bA){bx.relatedTarget=bA===bx.target?bw.toElement:bA}if(!bx.which&&bv!==L){bx.which=(bv&1?1:(bv&2?3:(bv&4?2:0)))}return bx}},fix:function(bw){if(bw[b.expando]){return bw}var bv,bz,e=bw,bx=b.event.fixHooks[bw.type]||{},by=bx.props?this.props.concat(bx.props):this.props;bw=b.Event(e);for(bv=by.length;bv;){bz=by[--bv];bw[bz]=e[bz]}if(!bw.target){bw.target=e.srcElement||av}if(bw.target.nodeType===3){bw.target=bw.target.parentNode}if(bw.metaKey===L){bw.metaKey=bw.ctrlKey}return bx.filter?bx.filter(bw,e):bw},special:{ready:{setup:b.bindReady},load:{noBubble:true},focus:{delegateType:"focusin"},blur:{delegateType:"focusout"},beforeunload:{setup:function(bw,bv,e){if(b.isWindow(this)){this.onbeforeunload=e}},teardown:function(bv,e){if(this.onbeforeunload===e){this.onbeforeunload=null}}}},simulate:function(bw,by,bx,bv){var bz=b.extend(new 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+ *  Copyright 2011, The Dojo Foundation
+ *  Released under the MIT, BSD, and GPL Licenses.
+ *  More information: http://sizzlejs.com/
+ */
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/modules.html
===================================================================
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+  <div class="headertitle">
+<div class="title">Modules</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock">Here is a list of all modules:</div><div class="directory">
+<table class="directory">
+<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><a class="el" href="group___io_tgo.html" target="_self">IoTgo</a></td><td class="desc">Just like a http proxy in charge of communication between local device and IoTgo platform(server) </td></tr>
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+<tr id="row_5_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><a class="el" href="group___error.html" target="_self">Error</a></td><td class="desc">Constants of error types </td></tr>
+<tr id="row_6_" class="even"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><a class="el" href="group___net_interface.html" target="_self">NetInterface</a></td><td class="desc">Provides unified interface accessing internet </td></tr>
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+</div><!-- directory -->
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Wed Feb 11 2015 13:27:06 for API by &#160;<a href="http://www.doxygen.org/index.html">
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+</a> 1.8.7
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/pages.html
===================================================================
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+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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+  <td style="padding-left: 0.5em;">
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+      <li><a href="annotated.html"><span>Classes</span></a></li>
+      <li><a href="files.html"><span>Files</span></a></li>
+      <li><a href="examples.html"><span>Examples</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="header">
+  <div class="headertitle">
+<div class="title">Related Pages</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock">Here is a list of all related documentation pages:</div><div class="directory">
+<table class="directory">
+<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><a class="el" href="md__r_e_a_d_m_e.html" target="_self">README</a></td><td class="desc"></td></tr>
+</table>
+</div><!-- directory -->
+</div><!-- contents -->
+<!-- start footer part -->
+<hr class="footer"/><address class="footer"><small>
+Generated on Tue Mar 17 2015 10:34:17 for API by &#160;<a href="http://www.doxygen.org/index.html">
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+</a> 1.8.7
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doc/API-html/tabs.css
===================================================================
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Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doxygen.doxy
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+# the documentation of the scope in which they are defined (i.e. file,
+# namespace, or group documentation), provided this scope is documented. If set
+# to NO, structs, classes, and unions are shown on a separate page (for HTML and
+# Man pages) or section (for LaTeX and RTF).
+# The default value is: NO.
+
+INLINE_SIMPLE_STRUCTS  = NO
+
+# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or
+# enum is documented as struct, union, or enum with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically be
+# useful for C code in case the coding convention dictates that all compound
+# types are typedef'ed and only the typedef is referenced, never the tag name.
+# The default value is: NO.
+
+TYPEDEF_HIDES_STRUCT   = NO
+
+# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This
+# cache is used to resolve symbols given their name and scope. Since this can be
+# an expensive process and often the same symbol appears multiple times in the
+# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small
+# doxygen will become slower. If the cache is too large, memory is wasted. The
+# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range
+# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536
+# symbols. At the end of a run doxygen will report the cache usage and suggest
+# the optimal cache size from a speed point of view.
+# Minimum value: 0, maximum value: 9, default value: 0.
+
+LOOKUP_CACHE_SIZE      = 0
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+
+# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
+# documentation are documented, even if no documentation was available. Private
+# class members and static file members will be hidden unless the
+# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES.
+# Note: This will also disable the warnings about undocumented members that are
+# normally produced when WARNINGS is set to YES.
+# The default value is: NO.
+
+EXTRACT_ALL            = NO
+
+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class will
+# be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PRIVATE        = NO
+
+# If the EXTRACT_PACKAGE tag is set to YES all members with package or internal
+# scope will be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PACKAGE        = NO
+
+# If the EXTRACT_STATIC tag is set to YES all static members of a file will be
+# included in the documentation.
+# The default value is: NO.
+
+EXTRACT_STATIC         = NO
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) defined
+# locally in source files will be included in the documentation. If set to NO
+# only classes defined in header files are included. Does not have any effect
+# for Java sources.
+# The default value is: YES.
+
+EXTRACT_LOCAL_CLASSES  = NO
+
+# This flag is only useful for Objective-C code. When set to YES local methods,
+# which are defined in the implementation section but not in the interface are
+# included in the documentation. If set to NO only methods in the interface are
+# included.
+# The default value is: NO.
+
+EXTRACT_LOCAL_METHODS  = NO
+
+# If this flag is set to YES, the members of anonymous namespaces will be
+# extracted and appear in the documentation as a namespace called
+# 'anonymous_namespace{file}', where file will be replaced with the base name of
+# the file that contains the anonymous namespace. By default anonymous namespace
+# are hidden.
+# The default value is: NO.
+
+EXTRACT_ANON_NSPACES   = NO
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all
+# undocumented members inside documented classes or files. If set to NO these
+# members will be included in the various overviews, but no documentation
+# section is generated. This option has no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_MEMBERS     = YES
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy. If set
+# to NO these classes will be included in the various overviews. This option has
+# no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_CLASSES     = YES
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend
+# (class|struct|union) declarations. If set to NO these declarations will be
+# included in the documentation.
+# The default value is: NO.
+
+HIDE_FRIEND_COMPOUNDS  = NO
+
+# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any
+# documentation blocks found inside the body of a function. If set to NO these
+# blocks will be appended to the function's detailed documentation block.
+# The default value is: NO.
+
+HIDE_IN_BODY_DOCS      = YES
+
+# The INTERNAL_DOCS tag determines if documentation that is typed after a
+# \internal command is included. If the tag is set to NO then the documentation
+# will be excluded. Set it to YES to include the internal documentation.
+# The default value is: NO.
+
+INTERNAL_DOCS          = NO
+
+# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file
+# names in lower-case letters. If set to YES upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows
+# and Mac users are advised to set this option to NO.
+# The default value is: system dependent.
+
+CASE_SENSE_NAMES       = NO
+
+# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with
+# their full class and namespace scopes in the documentation. If set to YES the
+# scope will be hidden.
+# The default value is: NO.
+
+HIDE_SCOPE_NAMES       = NO
+
+# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of
+# the files that are included by a file in the documentation of that file.
+# The default value is: YES.
+
+SHOW_INCLUDE_FILES     = YES
+
+# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each
+# grouped member an include statement to the documentation, telling the reader
+# which file to include in order to use the member.
+# The default value is: NO.
+
+SHOW_GROUPED_MEMB_INC  = NO
+
+# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include
+# files with double quotes in the documentation rather than with sharp brackets.
+# The default value is: NO.
+
+FORCE_LOCAL_INCLUDES   = NO
+
+# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the
+# documentation for inline members.
+# The default value is: YES.
+
+INLINE_INFO            = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the
+# (detailed) documentation of file and class members alphabetically by member
+# name. If set to NO the members will appear in declaration order.
+# The default value is: YES.
+
+SORT_MEMBER_DOCS       = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief
+# descriptions of file, namespace and class members alphabetically by member
+# name. If set to NO the members will appear in declaration order. Note that
+# this will also influence the order of the classes in the class list.
+# The default value is: NO.
+
+SORT_BRIEF_DOCS        = NO
+
+# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the
+# (brief and detailed) documentation of class members so that constructors and
+# destructors are listed first. If set to NO the constructors will appear in the
+# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS.
+# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief
+# member documentation.
+# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting
+# detailed member documentation.
+# The default value is: NO.
+
+SORT_MEMBERS_CTORS_1ST = NO
+
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy
+# of group names into alphabetical order. If set to NO the group names will
+# appear in their defined order.
+# The default value is: NO.
+
+SORT_GROUP_NAMES       = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by
+# fully-qualified names, including namespaces. If set to NO, the class list will
+# be sorted only by class name, not including the namespace part.
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the alphabetical
+# list.
+# The default value is: NO.
+
+SORT_BY_SCOPE_NAME     = NO
+
+# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper
+# type resolution of all parameters of a function it will reject a match between
+# the prototype and the implementation of a member function even if there is
+# only one candidate or it is obvious which candidate to choose by doing a
+# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still
+# accept a match between prototype and implementation in such cases.
+# The default value is: NO.
+
+STRICT_PROTO_MATCHING  = NO
+
+# The GENERATE_TODOLIST tag can be used to enable ( YES) or disable ( NO) the
+# todo list. This list is created by putting \todo commands in the
+# documentation.
+# The default value is: YES.
+
+GENERATE_TODOLIST      = YES
+
+# The GENERATE_TESTLIST tag can be used to enable ( YES) or disable ( NO) the
+# test list. This list is created by putting \test commands in the
+# documentation.
+# The default value is: YES.
+
+GENERATE_TESTLIST      = YES
+
+# The GENERATE_BUGLIST tag can be used to enable ( YES) or disable ( NO) the bug
+# list. This list is created by putting \bug commands in the documentation.
+# The default value is: YES.
+
+GENERATE_BUGLIST       = YES
+
+# The GENERATE_DEPRECATEDLIST tag can be used to enable ( YES) or disable ( NO)
+# the deprecated list. This list is created by putting \deprecated commands in
+# the documentation.
+# The default value is: YES.
+
+GENERATE_DEPRECATEDLIST= YES
+
+# The ENABLED_SECTIONS tag can be used to enable conditional documentation
+# sections, marked by \if <section_label> ... \endif and \cond <section_label>
+# ... \endcond blocks.
+
+ENABLED_SECTIONS       = 
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the
+# initial value of a variable or macro / define can have for it to appear in the
+# documentation. If the initializer consists of more lines than specified here
+# it will be hidden. Use a value of 0 to hide initializers completely. The
+# appearance of the value of individual variables and macros / defines can be
+# controlled using \showinitializer or \hideinitializer command in the
+# documentation regardless of this setting.
+# Minimum value: 0, maximum value: 10000, default value: 30.
+
+MAX_INITIALIZER_LINES  = 30
+
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at
+# the bottom of the documentation of classes and structs. If set to YES the list
+# will mention the files that were used to generate the documentation.
+# The default value is: YES.
+
+SHOW_USED_FILES        = YES
+
+# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This
+# will remove the Files entry from the Quick Index and from the Folder Tree View
+# (if specified).
+# The default value is: YES.
+
+SHOW_FILES             = YES
+
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces
+# page. This will remove the Namespaces entry from the Quick Index and from the
+# Folder Tree View (if specified).
+# The default value is: YES.
+
+SHOW_NAMESPACES        = YES
+
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from
+# the version control system). Doxygen will invoke the program by executing (via
+# popen()) the command command input-file, where command is the value of the
+# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided
+# by doxygen. Whatever the program writes to standard output is used as the file
+# version. For an example see the documentation.
+
+FILE_VERSION_FILTER    = 
+
+# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed
+# by doxygen. The layout file controls the global structure of the generated
+# output files in an output format independent way. To create the layout file
+# that represents doxygen's defaults, run doxygen with the -l option. You can
+# optionally specify a file name after the option, if omitted DoxygenLayout.xml
+# will be used as the name of the layout file.
+#
+# Note that if you run doxygen from a directory containing a file called
+# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
+# tag is left empty.
+
+LAYOUT_FILE            = 
+
+# The CITE_BIB_FILES tag can be used to specify one or more bib files containing
+# the reference definitions. This must be a list of .bib files. The .bib
+# extension is automatically appended if omitted. This requires the bibtex tool
+# to be installed. See also http://en.wikipedia.org/wiki/BibTeX for more info.
+# For LaTeX the style of the bibliography can be controlled using
+# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the
+# search path. Do not use file names with spaces, bibtex cannot handle them. See
+# also \cite for info how to create references.
+
+CITE_BIB_FILES         = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated to
+# standard output by doxygen. If QUIET is set to YES this implies that the
+# messages are off.
+# The default value is: NO.
+
+QUIET                  = NO
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated to standard error ( stderr) by doxygen. If WARNINGS is set to YES
+# this implies that the warnings are on.
+#
+# Tip: Turn warnings on while writing the documentation.
+# The default value is: YES.
+
+WARNINGS               = YES
+
+# If the WARN_IF_UNDOCUMENTED tag is set to YES, then doxygen will generate
+# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag
+# will automatically be disabled.
+# The default value is: YES.
+
+WARN_IF_UNDOCUMENTED   = YES
+
+# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some parameters
+# in a documented function, or documenting parameters that don't exist or using
+# markup commands wrongly.
+# The default value is: YES.
+
+WARN_IF_DOC_ERROR      = YES
+
+# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that
+# are documented, but have no documentation for their parameters or return
+# value. If set to NO doxygen will only warn about wrong or incomplete parameter
+# documentation, but not about the absence of documentation.
+# The default value is: NO.
+
+WARN_NO_PARAMDOC       = NO
+
+# The WARN_FORMAT tag determines the format of the warning messages that doxygen
+# can produce. The string should contain the $file, $line, and $text tags, which
+# will be replaced by the file and line number from which the warning originated
+# and the warning text. Optionally the format may contain $version, which will
+# be replaced by the version of the file (if it could be obtained via
+# FILE_VERSION_FILTER)
+# The default value is: $file:$line: $text.
+
+WARN_FORMAT            = "$file:$line: $text"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning and error
+# messages should be written. If left blank the output is written to standard
+# error (stderr).
+
+WARN_LOGFILE           = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag is used to specify the files and/or directories that contain
+# documented source files. You may enter file names like myfile.cpp or
+# directories like /usr/src/myproject. Separate the files or directories with
+# spaces.
+# Note: If this tag is empty the current directory is searched.
+
+INPUT                  = .
+
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
+# libiconv (or the iconv built into libc) for the transcoding. See the libiconv
+# documentation (see: http://www.gnu.org/software/libiconv) for the list of
+# possible encodings.
+# The default value is: UTF-8.
+
+INPUT_ENCODING         = UTF-8
+
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and
+# *.h) to filter out the source-files in the directories. If left blank the
+# following patterns are tested:*.c, *.cc, *.cxx, *.cpp, *.c++, *.java, *.ii,
+# *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, *.hh, *.hxx, *.hpp,
+# *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, *.m, *.markdown,
+# *.md, *.mm, *.dox, *.py, *.f90, *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf,
+# *.qsf, *.as and *.js.
+
+FILE_PATTERNS          = *.c \
+                         *.cc \
+                         *.cxx \
+                         *.cpp \
+                         *.c++ \
+                         *.java \
+                         *.ii \
+                         *.ixx \
+                         *.ipp \
+                         *.i++ \
+                         *.inl \
+                         *.idl \
+                         *.ddl \
+                         *.odl \
+                         *.h \
+                         *.hh \
+                         *.hxx \
+                         *.hpp \
+                         *.h++ \
+                         *.cs \
+                         *.d \
+                         *.php \
+                         *.php4 \
+                         *.php5 \
+                         *.phtml \
+                         *.inc \
+                         *.m \
+                         *.markdown \
+                         *.md \
+                         *.mm \
+                         *.dox \
+                         *.py \
+                         *.f90 \
+                         *.f \
+                         *.for \
+                         *.tcl \
+                         *.vhd \
+                         *.vhdl \
+                         *.ucf \
+                         *.qsf \
+                         *.as \
+                         *.js \
+                         *.ino \
+                         *.ino
+
+# The RECURSIVE tag can be used to specify whether or not subdirectories should
+# be searched for input files as well.
+# The default value is: NO.
+
+RECURSIVE              = YES
+
+# The EXCLUDE tag can be used to specify files and/or directories that should be
+# excluded from the INPUT source files. This way you can easily exclude a
+# subdirectory from a directory tree whose root is specified with the INPUT tag.
+#
+# Note that relative paths are relative to the directory from which doxygen is
+# run.
+
+EXCLUDE                = 
+
+# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or
+# directories that are symbolic links (a Unix file system feature) are excluded
+# from the input.
+# The default value is: NO.
+
+EXCLUDE_SYMLINKS       = NO
+
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories.
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories for example use the pattern */test/*
+
+EXCLUDE_PATTERNS       = 
+
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the
+# output. The symbol name can be a fully qualified name, a word, or if the
+# wildcard * is used, a substring. Examples: ANamespace, AClass,
+# AClass::ANamespace, ANamespace::*Test
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories use the pattern */test/*
+
+EXCLUDE_SYMBOLS        = 
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or directories
+# that contain example code fragments that are included (see the \include
+# command).
+
+EXAMPLE_PATH           = examples
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
+# *.h) to filter out the source-files in the directories. If left blank all
+# files are included.
+
+EXAMPLE_PATTERNS       = *
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude commands
+# irrespective of the value of the RECURSIVE tag.
+# The default value is: NO.
+
+EXAMPLE_RECURSIVE      = NO
+
+# The IMAGE_PATH tag can be used to specify one or more files or directories
+# that contain images that are to be included in the documentation (see the
+# \image command).
+
+IMAGE_PATH             = 
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command:
+#
+# <filter> <input-file>
+#
+# where <filter> is the value of the INPUT_FILTER tag, and <input-file> is the
+# name of an input file. Doxygen will then use the output that the filter
+# program writes to standard output. If FILTER_PATTERNS is specified, this tag
+# will be ignored.
+#
+# Note that the filter must not add or remove lines; it is applied before the
+# code is scanned, but not when the output code is generated. If lines are added
+# or removed, the anchors will not be placed correctly.
+
+INPUT_FILTER           = 
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis. Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match. The filters are a list of the form: pattern=filter
+# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how
+# filters are used. If the FILTER_PATTERNS tag is empty or if none of the
+# patterns match the file name, INPUT_FILTER is applied.
+
+FILTER_PATTERNS        = 
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER ) will also be used to filter the input files that are used for
+# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES).
+# The default value is: NO.
+
+FILTER_SOURCE_FILES    = NO
+
+# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file
+# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and
+# it is also possible to disable source filtering for a specific pattern using
+# *.ext= (so without naming a filter).
+# This tag requires that the tag FILTER_SOURCE_FILES is set to YES.
+
+FILTER_SOURCE_PATTERNS = 
+
+# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that
+# is part of the input, its contents will be placed on the main page
+# (index.html). This can be useful if you have a project on for instance GitHub
+# and want to reuse the introduction page also for the doxygen output.
+
+USE_MDFILE_AS_MAINPAGE = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will be
+# generated. Documented entities will be cross-referenced with these sources.
+#
+# Note: To get rid of all source code in the generated output, make sure that
+# also VERBATIM_HEADERS is set to NO.
+# The default value is: NO.
+
+SOURCE_BROWSER         = YES
+
+# Setting the INLINE_SOURCES tag to YES will include the body of functions,
+# classes and enums directly into the documentation.
+# The default value is: NO.
+
+INLINE_SOURCES         = NO
+
+# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any
+# special comment blocks from generated source code fragments. Normal C, C++ and
+# Fortran comments will always remain visible.
+# The default value is: YES.
+
+STRIP_CODE_COMMENTS    = YES
+
+# If the REFERENCED_BY_RELATION tag is set to YES then for each documented
+# function all documented functions referencing it will be listed.
+# The default value is: NO.
+
+REFERENCED_BY_RELATION = NO
+
+# If the REFERENCES_RELATION tag is set to YES then for each documented function
+# all documented entities called/used by that function will be listed.
+# The default value is: NO.
+
+REFERENCES_RELATION    = NO
+
+# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set
+# to YES, then the hyperlinks from functions in REFERENCES_RELATION and
+# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will
+# link to the documentation.
+# The default value is: YES.
+
+REFERENCES_LINK_SOURCE = YES
+
+# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the
+# source code will show a tooltip with additional information such as prototype,
+# brief description and links to the definition and documentation. Since this
+# will make the HTML file larger and loading of large files a bit slower, you
+# can opt to disable this feature.
+# The default value is: YES.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+SOURCE_TOOLTIPS        = YES
+
+# If the USE_HTAGS tag is set to YES then the references to source code will
+# point to the HTML generated by the htags(1) tool instead of doxygen built-in
+# source browser. The htags tool is part of GNU's global source tagging system
+# (see http://www.gnu.org/software/global/global.html). You will need version
+# 4.8.6 or higher.
+#
+# To use it do the following:
+# - Install the latest version of global
+# - Enable SOURCE_BROWSER and USE_HTAGS in the config file
+# - Make sure the INPUT points to the root of the source tree
+# - Run doxygen as normal
+#
+# Doxygen will invoke htags (and that will in turn invoke gtags), so these
+# tools must be available from the command line (i.e. in the search path).
+#
+# The result: instead of the source browser generated by doxygen, the links to
+# source code will now point to the output of htags.
+# The default value is: NO.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+USE_HTAGS              = NO
+
+# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a
+# verbatim copy of the header file for each class for which an include is
+# specified. Set to NO to disable this.
+# See also: Section \class.
+# The default value is: YES.
+
+VERBATIM_HEADERS       = YES
+
+# If the CLANG_ASSISTED_PARSING tag is set to YES, then doxygen will use the
+# clang parser (see: http://clang.llvm.org/) for more accurate parsing at the
+# cost of reduced performance. This can be particularly helpful with template
+# rich C++ code for which doxygen's built-in parser lacks the necessary type
+# information.
+# Note: The availability of this option depends on whether or not doxygen was
+# compiled with the --with-libclang option.
+# The default value is: NO.
+
+CLANG_ASSISTED_PARSING = NO
+
+# If clang assisted parsing is enabled you can provide the compiler with command
+# line options that you would normally use when invoking the compiler. Note that
+# the include paths will already be set by doxygen for the files and directories
+# specified with INPUT and INCLUDE_PATH.
+# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES.
+
+CLANG_OPTIONS          = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all
+# compounds will be generated. Enable this if the project contains a lot of
+# classes, structs, unions or interfaces.
+# The default value is: YES.
+
+ALPHABETICAL_INDEX     = YES
+
+# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in
+# which the alphabetical index list will be split.
+# Minimum value: 1, maximum value: 20, default value: 5.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
+
+COLS_IN_ALPHA_INDEX    = 5
+
+# In case all classes in a project start with a common prefix, all classes will
+# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag
+# can be used to specify a prefix (or a list of prefixes) that should be ignored
+# while generating the index headers.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
+
+IGNORE_PREFIX          = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES doxygen will generate HTML output
+# The default value is: YES.
+
+GENERATE_HTML          = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_OUTPUT            = API-html
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each
+# generated HTML page (for example: .htm, .php, .asp).
+# The default value is: .html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FILE_EXTENSION    = .html
+
+# The HTML_HEADER tag can be used to specify a user-defined HTML header file for
+# each generated HTML page. If the tag is left blank doxygen will generate a
+# standard header.
+#
+# To get valid HTML the header file that includes any scripts and style sheets
+# that doxygen needs, which is dependent on the configuration options used (e.g.
+# the setting GENERATE_TREEVIEW). It is highly recommended to start with a
+# default header using
+# doxygen -w html new_header.html new_footer.html new_stylesheet.css
+# YourConfigFile
+# and then modify the file new_header.html. See also section "Doxygen usage"
+# for information on how to generate the default header that doxygen normally
+# uses.
+# Note: The header is subject to change so you typically have to regenerate the
+# default header when upgrading to a newer version of doxygen. For a description
+# of the possible markers and block names see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_HEADER            = 
+
+# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each
+# generated HTML page. If the tag is left blank doxygen will generate a standard
+# footer. See HTML_HEADER for more information on how to generate a default
+# footer and what special commands can be used inside the footer. See also
+# section "Doxygen usage" for information on how to generate the default footer
+# that doxygen normally uses.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FOOTER            = 
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style
+# sheet that is used by each HTML page. It can be used to fine-tune the look of
+# the HTML output. If left blank doxygen will generate a default style sheet.
+# See also section "Doxygen usage" for information on how to generate the style
+# sheet that doxygen normally uses.
+# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as
+# it is more robust and this tag (HTML_STYLESHEET) will in the future become
+# obsolete.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_STYLESHEET        = 
+
+# The HTML_EXTRA_STYLESHEET tag can be used to specify an additional user-
+# defined cascading style sheet that is included after the standard style sheets
+# created by doxygen. Using this option one can overrule certain style aspects.
+# This is preferred over using HTML_STYLESHEET since it does not replace the
+# standard style sheet and is therefor more robust against future updates.
+# Doxygen will copy the style sheet file to the output directory. For an example
+# see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_STYLESHEET  = 
+
+# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the HTML output directory. Note
+# that these files will be copied to the base HTML output directory. Use the
+# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these
+# files. In the HTML_STYLESHEET file, use the file name only. Also note that the
+# files will be copied as-is; there are no commands or markers available.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_FILES       = 
+
+# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen
+# will adjust the colors in the stylesheet and background images according to
+# this color. Hue is specified as an angle on a colorwheel, see
+# http://en.wikipedia.org/wiki/Hue for more information. For instance the value
+# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300
+# purple, and 360 is red again.
+# Minimum value: 0, maximum value: 359, default value: 220.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_HUE    = 210
+
+# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors
+# in the HTML output. For a value of 0 the output will use grayscales only. A
+# value of 255 will produce the most vivid colors.
+# Minimum value: 0, maximum value: 255, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_SAT    = 173
+
+# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the
+# luminance component of the colors in the HTML output. Values below 100
+# gradually make the output lighter, whereas values above 100 make the output
+# darker. The value divided by 100 is the actual gamma applied, so 80 represents
+# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not
+# change the gamma.
+# Minimum value: 40, maximum value: 240, default value: 80.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_GAMMA  = 72
+
+# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML
+# page will contain the date and time when the page was generated. Setting this
+# to NO can help when comparing the output of multiple runs.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_TIMESTAMP         = YES
+
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_DYNAMIC_SECTIONS  = NO
+
+# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries
+# shown in the various tree structured indices initially; the user can expand
+# and collapse entries dynamically later on. Doxygen will expand the tree to
+# such a level that at most the specified number of entries are visible (unless
+# a fully collapsed tree already exceeds this amount). So setting the number of
+# entries 1 will produce a full collapsed tree by default. 0 is a special value
+# representing an infinite number of entries and will result in a full expanded
+# tree by default.
+# Minimum value: 0, maximum value: 9999, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_INDEX_NUM_ENTRIES = 100
+
+# If the GENERATE_DOCSET tag is set to YES, additional index files will be
+# generated that can be used as input for Apple's Xcode 3 integrated development
+# environment (see: http://developer.apple.com/tools/xcode/), introduced with
+# OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a
+# Makefile in the HTML output directory. Running make will produce the docset in
+# that directory and running make install will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at
+# startup. See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html
+# for more information.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_DOCSET        = NO
+
+# This tag determines the name of the docset feed. A documentation feed provides
+# an umbrella under which multiple documentation sets from a single provider
+# (such as a company or product suite) can be grouped.
+# The default value is: Doxygen generated docs.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_FEEDNAME        = "Doxygen generated docs"
+
+# This tag specifies a string that should uniquely identify the documentation
+# set bundle. This should be a reverse domain-name style string, e.g.
+# com.mycompany.MyDocSet. Doxygen will append .docset to the name.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_BUNDLE_ID       = org.doxygen.Project
+
+# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify
+# the documentation publisher. This should be a reverse domain-name style
+# string, e.g. com.mycompany.MyDocSet.documentation.
+# The default value is: org.doxygen.Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_ID    = org.doxygen.Publisher
+
+# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher.
+# The default value is: Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_NAME  = Publisher
+
+# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three
+# additional HTML index files: index.hhp, index.hhc, and index.hhk. The
+# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop
+# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on
+# Windows.
+#
+# The HTML Help Workshop contains a compiler that can convert all HTML output
+# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML
+# files are now used as the Windows 98 help format, and will replace the old
+# Windows help format (.hlp) on all Windows platforms in the future. Compressed
+# HTML files also contain an index, a table of contents, and you can search for
+# words in the documentation. The HTML workshop also contains a viewer for
+# compressed HTML files.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_HTMLHELP      = YES
+
+# The CHM_FILE tag can be used to specify the file name of the resulting .chm
+# file. You can add a path in front of the file if the result should not be
+# written to the html output directory.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_FILE               = ../API.chm
+
+# The HHC_LOCATION tag can be used to specify the location (absolute path
+# including file name) of the HTML help compiler ( hhc.exe). If non-empty
+# doxygen will try to run the HTML help compiler on the generated index.hhp.
+# The file has to be specified with full path.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+HHC_LOCATION           = "C:/Program Files/HTML Help Workshop/hhc.exe"
+
+# The GENERATE_CHI flag controls if a separate .chi index file is generated (
+# YES) or that it should be included in the master .chm file ( NO).
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+GENERATE_CHI           = NO
+
+# The CHM_INDEX_ENCODING is used to encode HtmlHelp index ( hhk), content ( hhc)
+# and project file content.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_INDEX_ENCODING     = 
+
+# The BINARY_TOC flag controls whether a binary table of contents is generated (
+# YES) or a normal table of contents ( NO) in the .chm file. Furthermore it
+# enables the Previous and Next buttons.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+BINARY_TOC             = NO
+
+# The TOC_EXPAND flag can be set to YES to add extra items for group members to
+# the table of contents of the HTML help documentation and to the tree view.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+TOC_EXPAND             = NO
+
+# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and
+# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that
+# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help
+# (.qch) of the generated HTML documentation.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_QHP           = NO
+
+# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify
+# the file name of the resulting .qch file. The path specified is relative to
+# the HTML output folder.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QCH_FILE               = 
+
+# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help
+# Project output. For more information please see Qt Help Project / Namespace
+# (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#namespace).
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_NAMESPACE          = org.doxygen.Project
+
+# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt
+# Help Project output. For more information please see Qt Help Project / Virtual
+# Folders (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#virtual-
+# folders).
+# The default value is: doc.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_VIRTUAL_FOLDER     = doc
+
+# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom
+# filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
+# filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_NAME   = 
+
+# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the
+# custom filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
+# filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_ATTRS  = 
+
+# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
+# project's filter section matches. Qt Help Project / Filter Attributes (see:
+# http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_SECT_FILTER_ATTRS  = 
+
+# The QHG_LOCATION tag can be used to specify the location of Qt's
+# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the
+# generated .qhp file.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHG_LOCATION           = 
+
+# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be
+# generated, together with the HTML files, they form an Eclipse help plugin. To
+# install this plugin and make it available under the help contents menu in
+# Eclipse, the contents of the directory containing the HTML and XML files needs
+# to be copied into the plugins directory of eclipse. The name of the directory
+# within the plugins directory should be the same as the ECLIPSE_DOC_ID value.
+# After copying Eclipse needs to be restarted before the help appears.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_ECLIPSEHELP   = NO
+
+# A unique identifier for the Eclipse help plugin. When installing the plugin
+# the directory name containing the HTML and XML files should also have this
+# name. Each documentation set should have its own identifier.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES.
+
+ECLIPSE_DOC_ID         = org.doxygen.Project
+
+# If you want full control over the layout of the generated HTML pages it might
+# be necessary to disable the index and replace it with your own. The
+# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top
+# of each HTML page. A value of NO enables the index and the value YES disables
+# it. Since the tabs in the index contain the same information as the navigation
+# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+DISABLE_INDEX          = NO
+
+# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
+# structure should be generated to display hierarchical information. If the tag
+# value is set to YES, a side panel will be generated containing a tree-like
+# index structure (just like the one that is generated for HTML Help). For this
+# to work a browser that supports JavaScript, DHTML, CSS and frames is required
+# (i.e. any modern browser). Windows users are probably better off using the
+# HTML help feature. Via custom stylesheets (see HTML_EXTRA_STYLESHEET) one can
+# further fine-tune the look of the index. As an example, the default style
+# sheet generated by doxygen has an example that shows how to put an image at
+# the root of the tree instead of the PROJECT_NAME. Since the tree basically has
+# the same information as the tab index, you could consider setting
+# DISABLE_INDEX to YES when enabling this option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_TREEVIEW      = NO
+
+# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
+# doxygen will group on one line in the generated HTML documentation.
+#
+# Note that a value of 0 will completely suppress the enum values from appearing
+# in the overview section.
+# Minimum value: 0, maximum value: 20, default value: 4.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+ENUM_VALUES_PER_LINE   = 4
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used
+# to set the initial width (in pixels) of the frame in which the tree is shown.
+# Minimum value: 0, maximum value: 1500, default value: 250.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+TREEVIEW_WIDTH         = 250
+
+# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open links to
+# external symbols imported via tag files in a separate window.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+EXT_LINKS_IN_WINDOW    = NO
+
+# Use this tag to change the font size of LaTeX formulas included as images in
+# the HTML documentation. When you change the font size after a successful
+# doxygen run you need to manually remove any form_*.png images from the HTML
+# output directory to force them to be regenerated.
+# Minimum value: 8, maximum value: 50, default value: 10.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FORMULA_FONTSIZE       = 10
+
+# Use the FORMULA_TRANPARENT tag to determine whether or not the images
+# generated for formulas are transparent PNGs. Transparent PNGs are not
+# supported properly for IE 6.0, but are supported on all modern browsers.
+#
+# Note that when changing this option you need to delete any form_*.png files in
+# the HTML output directory before the changes have effect.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FORMULA_TRANSPARENT    = YES
+
+# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see
+# http://www.mathjax.org) which uses client side Javascript for the rendering
+# instead of using prerendered bitmaps. Use this if you do not have LaTeX
+# installed or if you want to formulas look prettier in the HTML output. When
+# enabled you may also need to install MathJax separately and configure the path
+# to it using the MATHJAX_RELPATH option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+USE_MATHJAX            = NO
+
+# When MathJax is enabled you can set the default output format to be used for
+# the MathJax output. See the MathJax site (see:
+# http://docs.mathjax.org/en/latest/output.html) for more details.
+# Possible values are: HTML-CSS (which is slower, but has the best
+# compatibility), NativeMML (i.e. MathML) and SVG.
+# The default value is: HTML-CSS.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_FORMAT         = HTML-CSS
+
+# When MathJax is enabled you need to specify the location relative to the HTML
+# output directory using the MATHJAX_RELPATH option. The destination directory
+# should contain the MathJax.js script. For instance, if the mathjax directory
+# is located at the same level as the HTML output directory, then
+# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax
+# Content Delivery Network so you can quickly see the result without installing
+# MathJax. However, it is strongly recommended to install a local copy of
+# MathJax from http://www.mathjax.org before deployment.
+# The default value is: http://cdn.mathjax.org/mathjax/latest.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_RELPATH        = http://cdn.mathjax.org/mathjax/latest
+
+# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+# extension names that should be enabled during MathJax rendering. For example
+# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_EXTENSIONS     = 
+
+# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces
+# of code that will be used on startup of the MathJax code. See the MathJax site
+# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an
+# example see the documentation.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_CODEFILE       = 
+
+# When the SEARCHENGINE tag is enabled doxygen will generate a search box for
+# the HTML output. The underlying search engine uses javascript and DHTML and
+# should work on any modern browser. Note that when using HTML help
+# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET)
+# there is already a search function so this one should typically be disabled.
+# For large projects the javascript based search engine can be slow, then
+# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to
+# search using the keyboard; to jump to the search box use <access key> + S
+# (what the <access key> is depends on the OS and browser, but it is typically
+# <CTRL>, <ALT>/<option>, or both). Inside the search box use the <cursor down
+# key> to jump into the search results window, the results can be navigated
+# using the <cursor keys>. Press <Enter> to select an item or <escape> to cancel
+# the search. The filter options can be selected when the cursor is inside the
+# search box by pressing <Shift>+<cursor down>. Also here use the <cursor keys>
+# to select a filter and <Enter> or <escape> to activate or cancel the filter
+# option.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+SEARCHENGINE           = NO
+
+# When the SERVER_BASED_SEARCH tag is enabled the search engine will be
+# implemented using a web server instead of a web client using Javascript. There
+# are two flavors of web server based searching depending on the EXTERNAL_SEARCH
+# setting. When disabled, doxygen will generate a PHP script for searching and
+# an index file used by the script. When EXTERNAL_SEARCH is enabled the indexing
+# and searching needs to be provided by external tools. See the section
+# "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SERVER_BASED_SEARCH    = NO
+
+# When EXTERNAL_SEARCH tag is enabled doxygen will no longer generate the PHP
+# script for searching. Instead the search results are written to an XML file
+# which needs to be processed by an external indexer. Doxygen will invoke an
+# external search engine pointed to by the SEARCHENGINE_URL option to obtain the
+# search results.
+#
+# Doxygen ships with an example indexer ( doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: http://xapian.org/).
+#
+# See the section "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH        = NO
+
+# The SEARCHENGINE_URL should point to a search engine hosted by a web server
+# which will return the search results when EXTERNAL_SEARCH is enabled.
+#
+# Doxygen ships with an example indexer ( doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: http://xapian.org/). See the section "External Indexing and
+# Searching" for details.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHENGINE_URL       = 
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the unindexed
+# search data is written to a file for indexing by an external tool. With the
+# SEARCHDATA_FILE tag the name of this file can be specified.
+# The default file is: searchdata.xml.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHDATA_FILE        = searchdata.xml
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the
+# EXTERNAL_SEARCH_ID tag can be used as an identifier for the project. This is
+# useful in combination with EXTRA_SEARCH_MAPPINGS to search through multiple
+# projects and redirect the results back to the right project.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH_ID     = 
+
+# The EXTRA_SEARCH_MAPPINGS tag can be used to enable searching through doxygen
+# projects other than the one defined by this configuration file, but that are
+# all added to the same external search index. Each project needs to have a
+# unique id set via EXTERNAL_SEARCH_ID. The search mapping then maps the id of
+# to a relative location where the documentation can be found. The format is:
+# EXTRA_SEARCH_MAPPINGS = tagname1=loc1 tagname2=loc2 ...
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTRA_SEARCH_MAPPINGS  = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES doxygen will generate LaTeX output.
+# The default value is: YES.
+
+GENERATE_LATEX         = NO
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_OUTPUT           = latex
+
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
+# invoked.
+#
+# Note that when enabling USE_PDFLATEX this option is only used for generating
+# bitmaps for formulas in the HTML output, but not in the Makefile that is
+# written to the output directory.
+# The default file is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_CMD_NAME         = latex
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to generate
+# index for LaTeX.
+# The default file is: makeindex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+MAKEINDEX_CMD_NAME     = makeindex
+
+# If the COMPACT_LATEX tag is set to YES doxygen generates more compact LaTeX
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+COMPACT_LATEX          = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used by the
+# printer.
+# Possible values are: a4 (210 x 297 mm), letter (8.5 x 11 inches), legal (8.5 x
+# 14 inches) and executive (7.25 x 10.5 inches).
+# The default value is: a4.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PAPER_TYPE             = a4
+
+# The EXTRA_PACKAGES tag can be used to specify one or more LaTeX package names
+# that should be included in the LaTeX output. To get the times font for
+# instance you can specify
+# EXTRA_PACKAGES=times
+# If left blank no extra packages will be included.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+EXTRA_PACKAGES         = 
+
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the
+# generated LaTeX document. The header should contain everything until the first
+# chapter. If it is left blank doxygen will generate a standard header. See
+# section "Doxygen usage" for information on how to let doxygen write the
+# default header to a separate file.
+#
+# Note: Only use a user-defined header if you know what you are doing! The
+# following commands have a special meaning inside the header: $title,
+# $datetime, $date, $doxygenversion, $projectname, $projectnumber. Doxygen will
+# replace them by respectively the title of the page, the current date and time,
+# only the current date, the version number of doxygen, the project name (see
+# PROJECT_NAME), or the project number (see PROJECT_NUMBER).
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HEADER           = 
+
+# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the
+# generated LaTeX document. The footer should contain everything after the last
+# chapter. If it is left blank doxygen will generate a standard footer.
+#
+# Note: Only use a user-defined footer if you know what you are doing!
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_FOOTER           = 
+
+# The LATEX_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the LATEX_OUTPUT output
+# directory. Note that the files will be copied as-is; there are no commands or
+# markers available.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_EXTRA_FILES      = 
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated is
+# prepared for conversion to PDF (using ps2pdf or pdflatex). The PDF file will
+# contain links (just like the HTML output) instead of page references. This
+# makes the output suitable for online browsing using a PDF viewer.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PDF_HYPERLINKS         = YES
+
+# If the LATEX_PDFLATEX tag is set to YES, doxygen will use pdflatex to generate
+# the PDF file directly from the LaTeX files. Set this option to YES to get a
+# higher quality PDF documentation.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+USE_PDFLATEX           = YES
+
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \batchmode
+# command to the generated LaTeX files. This will instruct LaTeX to keep running
+# if errors occur, instead of asking the user for help. This option is also used
+# when generating formulas in HTML.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BATCHMODE        = NO
+
+# If the LATEX_HIDE_INDICES tag is set to YES then doxygen will not include the
+# index chapters (such as File Index, Compound Index, etc.) in the output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HIDE_INDICES     = NO
+
+# If the LATEX_SOURCE_CODE tag is set to YES then doxygen will include source
+# code with syntax highlighting in the LaTeX output.
+#
+# Note that which sources are shown also depends on other settings such as
+# SOURCE_BROWSER.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_SOURCE_CODE      = NO
+
+# The LATEX_BIB_STYLE tag can be used to specify the style to use for the
+# bibliography, e.g. plainnat, or ieeetr. See
+# http://en.wikipedia.org/wiki/BibTeX and \cite for more info.
+# The default value is: plain.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BIB_STYLE        = plain
+
+#---------------------------------------------------------------------------
+# Configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES doxygen will generate RTF output. The
+# RTF output is optimized for Word 97 and may not look too pretty with other RTF
+# readers/editors.
+# The default value is: NO.
+
+GENERATE_RTF           = NO
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: rtf.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_OUTPUT             = rtf
+
+# If the COMPACT_RTF tag is set to YES doxygen generates more compact RTF
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+COMPACT_RTF            = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated will
+# contain hyperlink fields. The RTF file will contain links (just like the HTML
+# output) instead of page references. This makes the output suitable for online
+# browsing using Word or some other Word compatible readers that support those
+# fields.
+#
+# Note: WordPad (write) and others do not support links.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_HYPERLINKS         = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's config
+# file, i.e. a series of assignments. You only have to provide replacements,
+# missing definitions are set to their default value.
+#
+# See also section "Doxygen usage" for information on how to generate the
+# default style sheet that doxygen normally uses.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_STYLESHEET_FILE    = 
+
+# Set optional variables used in the generation of an RTF document. Syntax is
+# similar to doxygen's config file. A template extensions file can be generated
+# using doxygen -e rtf extensionFile.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_EXTENSIONS_FILE    = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES doxygen will generate man pages for
+# classes and files.
+# The default value is: NO.
+
+GENERATE_MAN           = NO
+
+# The MAN_OUTPUT tag is used to specify where the man pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it. A directory man3 will be created inside the directory specified by
+# MAN_OUTPUT.
+# The default directory is: man.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_OUTPUT             = man
+
+# The MAN_EXTENSION tag determines the extension that is added to the generated
+# man pages. In case the manual section does not start with a number, the number
+# 3 is prepended. The dot (.) at the beginning of the MAN_EXTENSION tag is
+# optional.
+# The default value is: .3.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_EXTENSION          = .3
+
+# The MAN_SUBDIR tag determines the name of the directory created within
+# MAN_OUTPUT in which the man pages are placed. If defaults to man followed by
+# MAN_EXTENSION with the initial . removed.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_SUBDIR             = 
+
+# If the MAN_LINKS tag is set to YES and doxygen generates man output, then it
+# will generate one additional man file for each entity documented in the real
+# man page(s). These additional files only source the real man page, but without
+# them the man command would be unable to find the correct page.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_LINKS              = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the XML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_XML tag is set to YES doxygen will generate an XML file that
+# captures the structure of the code including all documentation.
+# The default value is: NO.
+
+GENERATE_XML           = NO
+
+# The XML_OUTPUT tag is used to specify where the XML pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: xml.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_OUTPUT             = xml
+
+# If the XML_PROGRAMLISTING tag is set to YES doxygen will dump the program
+# listings (including syntax highlighting and cross-referencing information) to
+# the XML output. Note that enabling this will significantly increase the size
+# of the XML output.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_PROGRAMLISTING     = YES
+
+#---------------------------------------------------------------------------
+# Configuration options related to the DOCBOOK output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_DOCBOOK tag is set to YES doxygen will generate Docbook files
+# that can be used to generate PDF.
+# The default value is: NO.
+
+GENERATE_DOCBOOK       = NO
+
+# The DOCBOOK_OUTPUT tag is used to specify where the Docbook pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be put in
+# front of it.
+# The default directory is: docbook.
+# This tag requires that the tag GENERATE_DOCBOOK is set to YES.
+
+DOCBOOK_OUTPUT         = docbook
+
+#---------------------------------------------------------------------------
+# Configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_AUTOGEN_DEF tag is set to YES doxygen will generate an AutoGen
+# Definitions (see http://autogen.sf.net) file that captures the structure of
+# the code including all documentation. Note that this feature is still
+# experimental and incomplete at the moment.
+# The default value is: NO.
+
+GENERATE_AUTOGEN_DEF   = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_PERLMOD tag is set to YES doxygen will generate a Perl module
+# file that captures the structure of the code including all documentation.
+#
+# Note that this feature is still experimental and incomplete at the moment.
+# The default value is: NO.
+
+GENERATE_PERLMOD       = NO
+
+# If the PERLMOD_LATEX tag is set to YES doxygen will generate the necessary
+# Makefile rules, Perl scripts and LaTeX code to be able to generate PDF and DVI
+# output from the Perl module output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_LATEX          = NO
+
+# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be nicely
+# formatted so it can be parsed by a human reader. This is useful if you want to
+# understand what is going on. On the other hand, if this tag is set to NO the
+# size of the Perl module output will be much smaller and Perl will parse it
+# just the same.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_PRETTY         = YES
+
+# The names of the make variables in the generated doxyrules.make file are
+# prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. This is useful
+# so different doxyrules.make files included by the same Makefile don't
+# overwrite each other's variables.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_MAKEVAR_PREFIX = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES doxygen will evaluate all
+# C-preprocessor directives found in the sources and include files.
+# The default value is: YES.
+
+ENABLE_PREPROCESSING   = YES
+
+# If the MACRO_EXPANSION tag is set to YES doxygen will expand all macro names
+# in the source code. If set to NO only conditional compilation will be
+# performed. Macro expansion can be done in a controlled way by setting
+# EXPAND_ONLY_PREDEF to YES.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+MACRO_EXPANSION        = NO
+
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES then
+# the macro expansion is limited to the macros specified with the PREDEFINED and
+# EXPAND_AS_DEFINED tags.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+EXPAND_ONLY_PREDEF     = NO
+
+# If the SEARCH_INCLUDES tag is set to YES the includes files in the
+# INCLUDE_PATH will be searched if a #include is found.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+SEARCH_INCLUDES        = YES
+
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by the
+# preprocessor.
+# This tag requires that the tag SEARCH_INCLUDES is set to YES.
+
+INCLUDE_PATH           = 
+
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will be
+# used.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+INCLUDE_FILE_PATTERNS  = 
+
+# The PREDEFINED tag can be used to specify one or more macro names that are
+# defined before the preprocessor is started (similar to the -D option of e.g.
+# gcc). The argument of the tag is a list of macros of the form: name or
+# name=definition (no spaces). If the definition and the "=" are omitted, "=1"
+# is assumed. To prevent a macro definition from being undefined via #undef or
+# recursively expanded use the := operator instead of the = operator.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+PREDEFINED             = __cplusplus
+
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
+# tag can be used to specify a list of macro names that should be expanded. The
+# macro definition that is found in the sources will be used. Use the PREDEFINED
+# tag if you want to use a different macro definition that overrules the
+# definition found in the source code.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+EXPAND_AS_DEFINED      = 
+
+# If the SKIP_FUNCTION_MACROS tag is set to YES then doxygen's preprocessor will
+# remove all references to function-like macros that are alone on a line, have
+# an all uppercase name, and do not end with a semicolon. Such function macros
+# are typically used for boiler-plate code, and will confuse the parser if not
+# removed.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+SKIP_FUNCTION_MACROS   = YES
+
+#---------------------------------------------------------------------------
+# Configuration options related to external references
+#---------------------------------------------------------------------------
+
+# The TAGFILES tag can be used to specify one or more tag files. For each tag
+# file the location of the external documentation should be added. The format of
+# a tag file without this location is as follows:
+# TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+# TAGFILES = file1=loc1 "file2 = loc2" ...
+# where loc1 and loc2 can be relative or absolute paths or URLs. See the
+# section "Linking to external documentation" for more information about the use
+# of tag files.
+# Note: Each tag file must have a unique name (where the name does NOT include
+# the path). If a tag file is not located in the directory in which doxygen is
+# run, you must also specify the path to the tagfile here.
+
+TAGFILES               = 
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create a
+# tag file that is based on the input files it reads. See section "Linking to
+# external documentation" for more information about the usage of tag files.
+
+GENERATE_TAGFILE       = 
+
+# If the ALLEXTERNALS tag is set to YES all external class will be listed in the
+# class index. If set to NO only the inherited external classes will be listed.
+# The default value is: NO.
+
+ALLEXTERNALS           = NO
+
+# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed in
+# the modules index. If set to NO, only the current project's groups will be
+# listed.
+# The default value is: YES.
+
+EXTERNAL_GROUPS        = YES
+
+# If the EXTERNAL_PAGES tag is set to YES all external pages will be listed in
+# the related pages index. If set to NO, only the current project's pages will
+# be listed.
+# The default value is: YES.
+
+EXTERNAL_PAGES         = YES
+
+# The PERL_PATH should be the absolute path and name of the perl script
+# interpreter (i.e. the result of 'which perl').
+# The default file (with absolute path) is: /usr/bin/perl.
+
+PERL_PATH              = /usr/bin/perl
+
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+
+# If the CLASS_DIAGRAMS tag is set to YES doxygen will generate a class diagram
+# (in HTML and LaTeX) for classes with base or super classes. Setting the tag to
+# NO turns the diagrams off. Note that this option also works with HAVE_DOT
+# disabled, but it is recommended to install and use dot, since it yields more
+# powerful graphs.
+# The default value is: YES.
+
+CLASS_DIAGRAMS         = YES
+
+# You can define message sequence charts within doxygen comments using the \msc
+# command. Doxygen will then run the mscgen tool (see:
+# http://www.mcternan.me.uk/mscgen/)) to produce the chart and insert it in the
+# documentation. The MSCGEN_PATH tag allows you to specify the directory where
+# the mscgen tool resides. If left empty the tool is assumed to be found in the
+# default search path.
+
+MSCGEN_PATH            = 
+
+# You can include diagrams made with dia in doxygen documentation. Doxygen will
+# then run dia to produce the diagram and insert it in the documentation. The
+# DIA_PATH tag allows you to specify the directory where the dia binary resides.
+# If left empty dia is assumed to be found in the default search path.
+
+DIA_PATH               = 
+
+# If set to YES, the inheritance and collaboration graphs will hide inheritance
+# and usage relations if the target is undocumented or is not a class.
+# The default value is: YES.
+
+HIDE_UNDOC_RELATIONS   = YES
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz (see:
+# http://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent
+# Bell Labs. The other options in this section have no effect if this option is
+# set to NO
+# The default value is: NO.
+
+HAVE_DOT               = NO
+
+# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is allowed
+# to run in parallel. When set to 0 doxygen will base this on the number of
+# processors available in the system. You can set it explicitly to a value
+# larger than 0 to get control over the balance between CPU load and processing
+# speed.
+# Minimum value: 0, maximum value: 32, default value: 0.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_NUM_THREADS        = 0
+
+# When you want a differently looking font n the dot files that doxygen
+# generates you can specify the font name using DOT_FONTNAME. You need to make
+# sure dot is able to find the font, which can be done by putting it in a
+# standard location or by setting the DOTFONTPATH environment variable or by
+# setting DOT_FONTPATH to the directory containing the font.
+# The default value is: Helvetica.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTNAME           = Helvetica
+
+# The DOT_FONTSIZE tag can be used to set the size (in points) of the font of
+# dot graphs.
+# Minimum value: 4, maximum value: 24, default value: 10.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTSIZE           = 10
+
+# By default doxygen will tell dot to use the default font as specified with
+# DOT_FONTNAME. If you specify a different font using DOT_FONTNAME you can set
+# the path where dot can find it using this tag.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTPATH           = 
+
+# If the CLASS_GRAPH tag is set to YES then doxygen will generate a graph for
+# each documented class showing the direct and indirect inheritance relations.
+# Setting this tag to YES will force the CLASS_DIAGRAMS tag to NO.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CLASS_GRAPH            = YES
+
+# If the COLLABORATION_GRAPH tag is set to YES then doxygen will generate a
+# graph for each documented class showing the direct and indirect implementation
+# dependencies (inheritance, containment, and class references variables) of the
+# class with other documented classes.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+COLLABORATION_GRAPH    = YES
+
+# If the GROUP_GRAPHS tag is set to YES then doxygen will generate a graph for
+# groups, showing the direct groups dependencies.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GROUP_GRAPHS           = YES
+
+# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling
+# Language.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+UML_LOOK               = NO
+
+# If the UML_LOOK tag is enabled, the fields and methods are shown inside the
+# class node. If there are many fields or methods and many nodes the graph may
+# become too big to be useful. The UML_LIMIT_NUM_FIELDS threshold limits the
+# number of items for each type to make the size more manageable. Set this to 0
+# for no limit. Note that the threshold may be exceeded by 50% before the limit
+# is enforced. So when you set the threshold to 10, up to 15 fields may appear,
+# but if the number exceeds 15, the total amount of fields shown is limited to
+# 10.
+# Minimum value: 0, maximum value: 100, default value: 10.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+UML_LIMIT_NUM_FIELDS   = 10
+
+# If the TEMPLATE_RELATIONS tag is set to YES then the inheritance and
+# collaboration graphs will show the relations between templates and their
+# instances.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+TEMPLATE_RELATIONS     = NO
+
+# If the INCLUDE_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are set to
+# YES then doxygen will generate a graph for each documented file showing the
+# direct and indirect include dependencies of the file with other documented
+# files.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INCLUDE_GRAPH          = YES
+
+# If the INCLUDED_BY_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are
+# set to YES then doxygen will generate a graph for each documented file showing
+# the direct and indirect include dependencies of the file with other documented
+# files.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INCLUDED_BY_GRAPH      = YES
+
+# If the CALL_GRAPH tag is set to YES then doxygen will generate a call
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable call graphs for selected
+# functions only using the \callgraph command.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CALL_GRAPH             = NO
+
+# If the CALLER_GRAPH tag is set to YES then doxygen will generate a caller
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable caller graphs for selected
+# functions only using the \callergraph command.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CALLER_GRAPH           = NO
+
+# If the GRAPHICAL_HIERARCHY tag is set to YES then doxygen will graphical
+# hierarchy of all classes instead of a textual one.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GRAPHICAL_HIERARCHY    = YES
+
+# If the DIRECTORY_GRAPH tag is set to YES then doxygen will show the
+# dependencies a directory has on other directories in a graphical way. The
+# dependency relations are determined by the #include relations between the
+# files in the directories.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DIRECTORY_GRAPH        = YES
+
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
+# generated by dot.
+# Note: If you choose svg you need to set HTML_FILE_EXTENSION to xhtml in order
+# to make the SVG files visible in IE 9+ (other browsers do not have this
+# requirement).
+# Possible values are: png, jpg, gif and svg.
+# The default value is: png.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_IMAGE_FORMAT       = png
+
+# If DOT_IMAGE_FORMAT is set to svg, then this option can be set to YES to
+# enable generation of interactive SVG images that allow zooming and panning.
+#
+# Note that this requires a modern browser other than Internet Explorer. Tested
+# and working are Firefox, Chrome, Safari, and Opera.
+# Note: For IE 9+ you need to set HTML_FILE_EXTENSION to xhtml in order to make
+# the SVG files visible. Older versions of IE do not have SVG support.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INTERACTIVE_SVG        = NO
+
+# The DOT_PATH tag can be used to specify the path where the dot tool can be
+# found. If left blank, it is assumed the dot tool can be found in the path.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_PATH               = 
+
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the \dotfile
+# command).
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOTFILE_DIRS           = 
+
+# The MSCFILE_DIRS tag can be used to specify one or more directories that
+# contain msc files that are included in the documentation (see the \mscfile
+# command).
+
+MSCFILE_DIRS           = 
+
+# The DIAFILE_DIRS tag can be used to specify one or more directories that
+# contain dia files that are included in the documentation (see the \diafile
+# command).
+
+DIAFILE_DIRS           = 
+
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of nodes
+# that will be shown in the graph. If the number of nodes in a graph becomes
+# larger than this value, doxygen will truncate the graph, which is visualized
+# by representing a node as a red box. Note that doxygen if the number of direct
+# children of the root node in a graph is already larger than
+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note that
+# the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
+# Minimum value: 0, maximum value: 10000, default value: 50.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_GRAPH_MAX_NODES    = 50
+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the graphs
+# generated by dot. A depth value of 3 means that only nodes reachable from the
+# root by following a path via at most 3 edges will be shown. Nodes that lay
+# further from the root node will be omitted. Note that setting this option to 1
+# or 2 may greatly reduce the computation time needed for large code bases. Also
+# note that the size of a graph can be further restricted by
+# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
+# Minimum value: 0, maximum value: 1000, default value: 0.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+MAX_DOT_GRAPH_DEPTH    = 0
+
+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
+# background. This is disabled by default, because dot on Windows does not seem
+# to support this out of the box.
+#
+# Warning: Depending on the platform used, enabling this option may lead to
+# badly anti-aliased labels on the edges of a graph (i.e. they become hard to
+# read).
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_TRANSPARENT        = NO
+
+# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10) support
+# this, this feature is disabled by default.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_MULTI_TARGETS      = NO
+
+# If the GENERATE_LEGEND tag is set to YES doxygen will generate a legend page
+# explaining the meaning of the various boxes and arrows in the dot generated
+# graphs.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GENERATE_LEGEND        = YES
+
+# If the DOT_CLEANUP tag is set to YES doxygen will remove the intermediate dot
+# files that are used to generate the various graphs.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_CLEANUP            = YES
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doxygen.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doxygen.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/doxygen.h	(revision 136)
@@ -0,0 +1,21 @@
+/**
+ * @file doxygen.h
+ *
+ * Define modules in API doc. 
+ * 
+ * @author  Wu Pengfei (email:<pengfei.wu@itead.cc>)
+ * @date    2014/11/20
+ * @copyright 
+ * Copyright (C) 2013-2014 ITEAD Intelligent Systems Co., Ltd. \n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef __IOTGO_DOXYGEN_H__
+#define __IOTGO_DOXYGEN_H__
+
+
+
+#endif /* #ifndef __IOTGO_DOXYGEN_H__ */
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/ConnectWiFi/ConnectWiFi.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/ConnectWiFi/ConnectWiFi.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/ConnectWiFi/ConnectWiFi.ino	(revision 136)
@@ -0,0 +1,57 @@
+/**
+ * @example ConnectWiFi.ino
+ * @brief The ConnectWiFi demo of library WeeESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.03
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "ESP8266.h"
+
+#define SSID        "ITEAD"
+#define PASSWORD    "12345678"
+
+ESP8266 wifi(Serial1);
+
+void setup(void)
+{
+    Serial.begin(9600);
+    Serial.print("setup begin\r\n");
+
+    Serial.print("FW Version: ");
+    Serial.println(wifi.getVersion().c_str());
+    
+    
+    if (wifi.setOprToStation()) {
+        Serial.print("to station ok\r\n");
+    } else {
+        Serial.print("to station err\r\n");
+    }
+
+    if (wifi.joinAP(SSID, PASSWORD)) {
+        Serial.print("Join AP success\r\n");
+        Serial.print("IP: ");       
+        Serial.println(wifi.getLocalIP().c_str());
+    } else {
+        Serial.print("Join AP failure\r\n");
+    }
+    
+    Serial.print("setup end\r\n");
+}
+
+void loop(void)
+{
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/HTTPGET/HTTPGET.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/HTTPGET/HTTPGET.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/HTTPGET/HTTPGET.ino	(revision 136)
@@ -0,0 +1,94 @@
+/**
+ * @example HTTPGET.ino
+ * @brief The HTTPGET demo of library WeeESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.03
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "ESP8266.h"
+
+#define SSID        "ITEAD"
+#define PASSWORD    "12345678"
+#define HOST_NAME   "www.baidu.com"
+#define HOST_PORT   (80)
+
+ESP8266 wifi(Serial1);
+
+void setup(void)
+{
+    Serial.begin(9600);
+    Serial.print("setup begin\r\n");
+
+    Serial.print("FW Version:");
+    Serial.println(wifi.getVersion().c_str());
+
+    if (wifi.setOprToStationSoftAP()) {
+        Serial.print("to station + softap ok\r\n");
+    } else {
+        Serial.print("to station + softap err\r\n");
+    }
+
+    if (wifi.joinAP(SSID, PASSWORD)) {
+        Serial.print("Join AP success\r\n");
+
+        Serial.print("IP:");
+        Serial.println( wifi.getLocalIP().c_str());       
+    } else {
+        Serial.print("Join AP failure\r\n");
+    }
+    
+    if (wifi.disableMUX()) {
+        Serial.print("single ok\r\n");
+    } else {
+        Serial.print("single err\r\n");
+    }
+    
+    Serial.print("setup end\r\n");
+}
+ 
+void loop(void)
+{
+    uint8_t buffer[1024] = {0};
+
+    if (wifi.createTCP(HOST_NAME, HOST_PORT)) {
+        Serial.print("create tcp ok\r\n");
+    } else {
+        Serial.print("create tcp err\r\n");
+    }
+
+    char *hello = "GET / HTTP/1.1\r\nHost: www.baidu.com\r\nConnection: close\r\n\r\n";
+    wifi.send((const uint8_t*)hello, strlen(hello));
+
+    uint32_t len = wifi.recv(buffer, sizeof(buffer), 10000);
+    if (len > 0) {
+        Serial.print("Received:[");
+        for(uint32_t i = 0; i < len; i++) {
+            Serial.print((char)buffer[i]);
+        }
+        Serial.print("]\r\n");
+    }
+
+    if (wifi.releaseTCP()) {
+        Serial.print("release tcp ok\r\n");
+    } else {
+        Serial.print("release tcp err\r\n");
+    }
+    
+    while(1);
+    
+}
+     
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPClientMultiple/TCPClientMultiple.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPClientMultiple/TCPClientMultiple.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPClientMultiple/TCPClientMultiple.ino	(revision 136)
@@ -0,0 +1,110 @@
+/**
+ * @example TCPClientMultiple.ino
+ * @brief The TCPClientMultiple demo of library WeeESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.02
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "ESP8266.h"
+
+#define SSID        "ITEAD"
+#define PASSWORD    "12345678"
+#define HOST_NAME   "172.16.5.12"
+#define HOST_PORT   (8090)
+
+ESP8266 wifi(Serial1);
+
+void setup(void)
+{
+    Serial.begin(9600);
+    Serial.print("setup begin\r\n");
+
+    Serial.print("FW Version: ");
+    Serial.println(wifi.getVersion().c_str());
+    
+    
+    if (wifi.setOprToStationSoftAP()) {
+        Serial.print("to station + softap ok\r\n");
+    } else {
+        Serial.print("to station + softap err\r\n");
+    }
+
+    if (wifi.joinAP(SSID, PASSWORD)) {
+        Serial.print("Join AP success\r\n");
+        Serial.print("IP: ");       
+        Serial.println(wifi.getLocalIP().c_str());
+    } else {
+        Serial.print("Join AP failure\r\n");
+    }
+    
+    if (wifi.enableMUX()) {
+        Serial.print("multiple ok\r\n");
+    } else {
+        Serial.print("multiple err\r\n");
+    }
+    
+    Serial.print("setup end\r\n");
+}
+
+void loop(void)
+{
+    uint8_t buffer[128] = {0};
+    static uint8_t mux_id = 0;
+    
+    if (wifi.createTCP(mux_id, HOST_NAME, HOST_PORT)) {
+        Serial.print("create tcp ");
+        Serial.print(mux_id);
+        Serial.println(" ok");
+    } else {
+        Serial.print("create tcp ");
+        Serial.print(mux_id);
+        Serial.println(" err");
+    }
+
+    
+    char *hello = "Hello, this is client!";
+    if (wifi.send(mux_id, (const uint8_t*)hello, strlen(hello))) {
+        Serial.println("send ok");
+    } else {
+        Serial.println("send err");
+    }
+    
+    uint32_t len = wifi.recv(mux_id, buffer, sizeof(buffer), 10000);
+    if (len > 0) {
+        Serial.print("Received:[");
+        for(uint32_t i = 0; i < len; i++) {
+            Serial.print((char)buffer[i]);
+        }
+        Serial.print("]\r\n");
+    }
+ 
+    if (wifi.releaseTCP(mux_id)) {
+        Serial.print("release tcp ");
+        Serial.print(mux_id);
+        Serial.println(" ok");
+    } else {
+        Serial.print("release tcp ");
+        Serial.print(mux_id);
+        Serial.println(" err");
+    }
+  
+    delay(3000);
+    mux_id++;
+    if (mux_id >= 5) {
+        mux_id = 0;
+    }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPClientSingle/TCPClientSingle.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPClientSingle/TCPClientSingle.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPClientSingle/TCPClientSingle.ino	(revision 136)
@@ -0,0 +1,90 @@
+/**
+ * @example TCPClientSingle.ino
+ * @brief The TCPClientSingle demo of library WeeESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.02
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "ESP8266.h"
+
+#define SSID        "ITEAD"
+#define PASSWORD    "12345678"
+#define HOST_NAME   "172.16.5.12"
+#define HOST_PORT   (8090)
+
+ESP8266 wifi(Serial1);
+
+void setup(void)
+{
+    Serial.begin(9600);
+    Serial.print("setup begin\r\n");
+    
+    Serial.print("FW Version:");
+    Serial.println(wifi.getVersion().c_str());
+      
+    if (wifi.setOprToStationSoftAP()) {
+        Serial.print("to station + softap ok\r\n");
+    } else {
+        Serial.print("to station + softap err\r\n");
+    }
+ 
+    if (wifi.joinAP(SSID, PASSWORD)) {
+        Serial.print("Join AP success\r\n");
+        Serial.print("IP:");
+        Serial.println( wifi.getLocalIP().c_str());       
+    } else {
+        Serial.print("Join AP failure\r\n");
+    }
+    
+    if (wifi.disableMUX()) {
+        Serial.print("single ok\r\n");
+    } else {
+        Serial.print("single err\r\n");
+    }
+    
+    Serial.print("setup end\r\n");
+}
+ 
+void loop(void)
+{
+    uint8_t buffer[128] = {0};
+    
+    if (wifi.createTCP(HOST_NAME, HOST_PORT)) {
+        Serial.print("create tcp ok\r\n");
+    } else {
+        Serial.print("create tcp err\r\n");
+    }
+    
+    char *hello = "Hello, this is client!";
+    wifi.send((const uint8_t*)hello, strlen(hello));
+    
+    uint32_t len = wifi.recv(buffer, sizeof(buffer), 10000);
+    if (len > 0) {
+        Serial.print("Received:[");
+        for(uint32_t i = 0; i < len; i++) {
+            Serial.print((char)buffer[i]);
+        }
+        Serial.print("]\r\n");
+    }
+    
+    if (wifi.releaseTCP()) {
+        Serial.print("release tcp ok\r\n");
+    } else {
+        Serial.print("release tcp err\r\n");
+    }
+    delay(5000);
+}
+     
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPClientSingleUNO/TCPClientSingleUNO.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPClientSingleUNO/TCPClientSingleUNO.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPClientSingleUNO/TCPClientSingleUNO.ino	(revision 136)
@@ -0,0 +1,92 @@
+/**
+ * @example TCPClientSingleUNO.ino
+ * @brief The TCPClientSingleUNO demo of library WeeESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.03
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "ESP8266.h"
+#include <SoftwareSerial.h>
+
+#define SSID        "ITEAD"
+#define PASSWORD    "12345678"
+#define HOST_NAME   "172.16.5.12"
+#define HOST_PORT   (8090)
+
+SoftwareSerial mySerial(3, 2); /* RX:D3, TX:D2 */
+ESP8266 wifi(mySerial);
+
+void setup(void)
+{
+    Serial.begin(9600);
+    Serial.print("setup begin\r\n");
+    
+    Serial.print("FW Version:");
+    Serial.println(wifi.getVersion().c_str());
+      
+    if (wifi.setOprToStationSoftAP()) {
+        Serial.print("to station + softap ok\r\n");
+    } else {
+        Serial.print("to station + softap err\r\n");
+    }
+ 
+    if (wifi.joinAP(SSID, PASSWORD)) {
+        Serial.print("Join AP success\r\n");
+        Serial.print("IP:");
+        Serial.println( wifi.getLocalIP().c_str());       
+    } else {
+        Serial.print("Join AP failure\r\n");
+    }
+    
+    if (wifi.disableMUX()) {
+        Serial.print("single ok\r\n");
+    } else {
+        Serial.print("single err\r\n");
+    }
+    
+    Serial.print("setup end\r\n");
+}
+ 
+void loop(void)
+{
+    uint8_t buffer[128] = {0};
+    
+    if (wifi.createTCP(HOST_NAME, HOST_PORT)) {
+        Serial.print("create tcp ok\r\n");
+    } else {
+        Serial.print("create tcp err\r\n");
+    }
+    
+    char *hello = "Hello, this is client!";
+    wifi.send((const uint8_t*)hello, strlen(hello));
+    
+    uint32_t len = wifi.recv(buffer, sizeof(buffer), 10000);
+    if (len > 0) {
+        Serial.print("Received:[");
+        for(uint32_t i = 0; i < len; i++) {
+            Serial.print((char)buffer[i]);
+        }
+        Serial.print("]\r\n");
+    }
+    
+    if (wifi.releaseTCP()) {
+        Serial.print("release tcp ok\r\n");
+    } else {
+        Serial.print("release tcp err\r\n");
+    }
+    delay(5000);
+}
+     
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPServer/TCPServer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPServer/TCPServer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/TCPServer/TCPServer.ino	(revision 136)
@@ -0,0 +1,111 @@
+/**
+ * @example TCPServer.ino
+ * @brief The TCPServer demo of library WeeESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.02
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "ESP8266.h"
+
+#define SSID        "ITEAD"
+#define PASSWORD    "12345678"
+
+ESP8266 wifi(Serial1);
+
+void setup(void)
+{
+    Serial.begin(9600);
+    Serial.print("setup begin\r\n");
+    
+    Serial.print("FW Version:");
+    Serial.println(wifi.getVersion().c_str());
+      
+    if (wifi.setOprToStationSoftAP()) {
+        Serial.print("to station + softap ok\r\n");
+    } else {
+        Serial.print("to station + softap err\r\n");
+    }
+ 
+    if (wifi.joinAP(SSID, PASSWORD)) {
+        Serial.print("Join AP success\r\n");
+        Serial.print("IP: ");
+        Serial.println(wifi.getLocalIP().c_str());    
+    } else {
+        Serial.print("Join AP failure\r\n");
+    }
+    
+    if (wifi.enableMUX()) {
+        Serial.print("multiple ok\r\n");
+    } else {
+        Serial.print("multiple err\r\n");
+    }
+    
+    if (wifi.startTCPServer(8090)) {
+        Serial.print("start tcp server ok\r\n");
+    } else {
+        Serial.print("start tcp server err\r\n");
+    }
+    
+    if (wifi.setTCPServerTimeout(10)) { 
+        Serial.print("set tcp server timout 10 seconds\r\n");
+    } else {
+        Serial.print("set tcp server timout err\r\n");
+    }
+    
+    Serial.print("setup end\r\n");
+}
+ 
+void loop(void)
+{
+    uint8_t buffer[128] = {0};
+    uint8_t mux_id;
+    uint32_t len = wifi.recv(&mux_id, buffer, sizeof(buffer), 100);
+    if (len > 0) {
+        Serial.print("Status:[");
+        Serial.print(wifi.getIPStatus().c_str());
+        Serial.println("]");
+        
+        Serial.print("Received from :");
+        Serial.print(mux_id);
+        Serial.print("[");
+        for(uint32_t i = 0; i < len; i++) {
+            Serial.print((char)buffer[i]);
+        }
+        Serial.print("]\r\n");
+        
+        if(wifi.send(mux_id, buffer, len)) {
+            Serial.print("send back ok\r\n");
+        } else {
+            Serial.print("send back err\r\n");
+        }
+        
+        if (wifi.releaseTCP(mux_id)) {
+            Serial.print("release tcp ");
+            Serial.print(mux_id);
+            Serial.println(" ok");
+        } else {
+            Serial.print("release tcp");
+            Serial.print(mux_id);
+            Serial.println(" err");
+        }
+        
+        Serial.print("Status:[");
+        Serial.print(wifi.getIPStatus().c_str());
+        Serial.println("]");
+    }
+}
+        
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/UDPClientMultiple/UDPClientMultiple.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/UDPClientMultiple/UDPClientMultiple.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/UDPClientMultiple/UDPClientMultiple.ino	(revision 136)
@@ -0,0 +1,104 @@
+/**
+ * @example UDPClientMultiple.ino
+ * @brief The UDPClientMultiple demo of library WeeESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.02
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "ESP8266.h"
+
+#define SSID        "ITEAD"
+#define PASSWORD    "12345678"
+#define HOST_NAME   "172.16.5.12"
+#define HOST_PORT   (5416)
+
+ESP8266 wifi(Serial1);
+ 
+void setup(void)
+{
+    Serial.begin(9600);
+    Serial.print("setup begin\r\n");
+    
+    Serial.print("FW Version:");
+    Serial.println(wifi.getVersion().c_str());
+      
+    if (wifi.setOprToStationSoftAP()) {
+        Serial.print("to station + softap ok\r\n");
+    } else {
+        Serial.print("to station + softap err\r\n");
+    }
+ 
+    if (wifi.joinAP(SSID, PASSWORD)) {
+        Serial.print("Join AP success\r\n");
+        Serial.print("IP: ");
+        Serial.println(wifi.getLocalIP().c_str());       
+    } else {
+        Serial.print("Join AP failure\r\n");
+    }
+    
+    if (wifi.enableMUX()) {
+        Serial.print("multiple ok\r\n");
+    } else {
+        Serial.print("multiple err\r\n");
+    }
+    
+    Serial.print("setup end\r\n");
+}
+ 
+void loop(void)
+{
+    uint8_t buffer[128] = {0};
+    static uint8_t mux_id = 0;
+    
+    if (wifi.registerUDP(mux_id, HOST_NAME, HOST_PORT)) {
+        Serial.print("register udp ");
+        Serial.print(mux_id);
+        Serial.println(" ok");
+    } else {
+        Serial.print("register udp ");
+        Serial.print(mux_id);
+        Serial.println(" err");
+    }
+    
+    char *hello = "Hello, this is client!";
+    wifi.send(mux_id, (const uint8_t*)hello, strlen(hello));
+    
+    uint32_t len = wifi.recv(mux_id, buffer, sizeof(buffer), 10000);
+    if (len > 0) {
+        Serial.print("Received:[");
+        for(uint32_t i = 0; i < len; i++) {
+            Serial.print((char)buffer[i]);
+        }
+        Serial.print("]\r\n");
+    }
+    
+    if (wifi.unregisterUDP(mux_id)) {
+        Serial.print("unregister udp ");
+        Serial.print(mux_id);
+        Serial.println(" ok");
+    } else {
+        Serial.print("unregister udp ");
+        Serial.print(mux_id);
+        Serial.println(" err");
+    }
+    delay(5000);
+    mux_id++;
+    if (mux_id >= 5) {
+        mux_id = 0;
+    }
+}
+            
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/UDPClientSingle/UDPClientSingle.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/UDPClientSingle/UDPClientSingle.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/examples/UDPClientSingle/UDPClientSingle.ino	(revision 136)
@@ -0,0 +1,91 @@
+/**
+ * @example UDPClientSingle.ino
+ * @brief The UDPClientSingle demo of library WeeESP8266. 
+ * @author Wu Pengfei<pengfei.wu@itead.cc> 
+ * @date 2015.02
+ * 
+ * @par Copyright:
+ * Copyright (c) 2015 ITEAD Intelligent Systems Co., Ltd. \n\n
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version. \n\n
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "ESP8266.h"
+
+#define SSID        "ITEAD"
+#define PASSWORD    "12345678"
+#define HOST_NAME   "172.16.5.12"
+#define HOST_PORT   (5416)
+
+ESP8266 wifi(Serial1);
+ 
+void setup(void)
+{
+    Serial.begin(9600);  
+    Serial.print("setup begin\r\n");
+    
+    Serial.print("FW Version:");
+    Serial.println(wifi.getVersion().c_str());
+      
+    if (wifi.setOprToStationSoftAP()) {
+        Serial.print("to station + softap ok\r\n");
+    } else {
+        Serial.print("to station + softap err\r\n");
+    }
+ 
+    if (wifi.joinAP(SSID, PASSWORD)) {
+        Serial.print("Join AP success\r\n");
+        Serial.print("IP: ");
+        Serial.println(wifi.getLocalIP().c_str());       
+    } else {
+        Serial.print("Join AP failure\r\n");
+    }
+    
+    if (wifi.disableMUX()) {
+        Serial.print("single ok\r\n");
+    } else {
+        Serial.print("single err\r\n");
+    }
+    
+    Serial.print("setup end\r\n");
+}
+ 
+void loop(void)
+{
+    uint8_t buffer[128] = {0};
+    
+    if (wifi.registerUDP(HOST_NAME, HOST_PORT)) {
+        Serial.print("register udp ok\r\n");
+    } else {
+        Serial.print("register udp err\r\n");
+    }
+    
+    char *hello = "Hello, this is client!";
+    wifi.send((const uint8_t*)hello, strlen(hello));
+    
+    uint32_t len = wifi.recv(buffer, sizeof(buffer), 10000);
+    if (len > 0) {
+        Serial.print("Received:[");
+        for(uint32_t i = 0; i < len; i++) {
+            Serial.print((char)buffer[i]);
+        }
+        Serial.print("]\r\n");
+    }
+    
+    if (wifi.unregisterUDP()) {
+        Serial.print("unregister udp ok\r\n");
+    } else {
+        Serial.print("unregister udp err\r\n");
+    }
+    delay(5000);
+}
+          
Index: rtos_arduino/trunk/arduino_lib/libraries/ESP8266/library.json
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/ESP8266/library.json	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/ESP8266/library.json	(revision 136)
@@ -0,0 +1,13 @@
+{
+  "name": "ESP8266",
+  "keywords": "wifi, wi-fi, http, web, server, client",
+  "description": "ESP8266 offers a complete and self-contained Wi-Fi networking solution, allowing it to either host the application or to offload all Wi-Fi networking functions from another application processor",
+  "repository":
+  {
+    "type": "git",
+    "url": "https://github.com/itead/ITEADLIB_Arduino_WeeESP8266.git"
+  },
+  "exclude": "doc",
+  "frameworks": "arduino",
+  "platforms": "atmelavr"
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Esplora Library for Arduino =
+
+The library offers easy access to the data from the onboard Esplora's sensors, and provides the ability to change the state of the outputs.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/EsploraLibrary
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraAccelerometer/EsploraAccelerometer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraAccelerometer/EsploraAccelerometer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraAccelerometer/EsploraAccelerometer.ino	(revision 136)
@@ -0,0 +1,38 @@
+/*
+  Esplora Accelerometer
+
+ This  sketch shows you how to read the values from the accelerometer.
+ To see it in action, open the serial monitor and tilt the board. You'll see
+ the accelerometer values for each axis change when you tilt the board
+ on that axis.
+
+ Created on 22 Dec 2012
+ by Tom Igoe
+
+ This example is in the public domain.
+ */
+
+#include <Esplora.h>
+
+void setup()
+{
+  Serial.begin(9600);        // initialize serial communications with your computer
+}
+
+void loop()
+{
+  int xAxis = Esplora.readAccelerometer(X_AXIS);    // read the X axis
+  int yAxis = Esplora.readAccelerometer(Y_AXIS);    // read the Y axis
+  int zAxis = Esplora.readAccelerometer(Z_AXIS);    // read the Z axis
+
+  Serial.print("x: ");      // print the label for X
+  Serial.print(xAxis);      // print the value for the X axis
+  Serial.print("\ty: ");    // print a tab character, then the label for Y
+  Serial.print(yAxis);      // print the value for the Y axis
+  Serial.print("\tz: ");    // print a tab character, then the label for Z
+  Serial.println(zAxis);    // print the value for the Z axis
+
+  delay(500);              // wait half a second (500 milliseconds)
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraBlink/EsploraBlink.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraBlink/EsploraBlink.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraBlink/EsploraBlink.ino	(revision 136)
@@ -0,0 +1,42 @@
+
+/*
+  Esplora Blink
+
+ This  sketch blinks the Esplora's RGB LED. It goes through
+ all three primary colors (red, green, blue), then it
+ combines them for secondary colors(yellow, cyan, magenta), then
+ it turns on all the colors for white.
+ For best results cover the LED with a piece of white paper to see the colors.
+
+ Created on 22 Dec 2012
+ by Tom Igoe
+
+ This example is in the public domain.
+ */
+
+#include <Esplora.h>
+
+
+void setup() {
+  // There's nothing to set up for this sketch
+}
+
+void loop() {
+  Esplora.writeRGB(255, 0, 0);  // make the LED red
+  delay(1000);                  // wait 1 second
+  Esplora.writeRGB(0, 255, 0);  // make the LED green
+  delay(1000);                  // wait 1 second
+  Esplora.writeRGB(0, 0, 255);  // make the LED blue
+  delay(1000);                  // wait 1 second
+  Esplora.writeRGB(255, 255, 0); // make the LED yellow
+  delay(1000);                  // wait 1 second
+  Esplora.writeRGB(0, 255, 255); // make the LED cyan
+  delay(1000);                  // wait 1 second
+  Esplora.writeRGB(255, 0, 255); // make the LED magenta
+  delay(1000);                  // wait 1 second
+  Esplora.writeRGB(255, 255, 255); // make the LED white
+  delay(1000);                  // wait 1 second
+
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraJoystickMouse/EsploraJoystickMouse.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraJoystickMouse/EsploraJoystickMouse.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraJoystickMouse/EsploraJoystickMouse.ino	(revision 136)
@@ -0,0 +1,60 @@
+/*
+  Esplora Joystick Mouse
+
+ This  sketch shows you how to read the joystick and use it to control the movement
+ of the cursor on your computer.  You're making your Esplora into a mouse!
+
+ WARNING: this sketch will take over your mouse movement. If you lose control
+ of your mouse do the following:
+ 1) unplug the Esplora.
+ 2) open the EsploraBlink sketch
+ 3) hold the reset button down while plugging your Esplora back in
+ 4) while holding reset, click "Upload"
+ 5) when you see the message "Done compiling", release the reset button.
+
+ This will stop your Esplora from controlling your mouse while you upload a sketch
+ that doesn't take control of the mouse.
+
+ Created on 22 Dec 2012
+ by Tom Igoe
+ Updated 8 March 2014
+ by Scott Fitzgerald
+ 
+ http://arduino.cc/en/Reference/EsploraReadJoystickSwitch
+
+ This example is in the public domain.
+ */
+
+#include <Esplora.h>
+
+void setup()
+{
+  Serial.begin(9600);       // initialize serial communication with your computer
+  Mouse.begin();            // take control of the mouse
+}
+
+void loop()
+{
+  int xValue = Esplora.readJoystickX();        // read the joystick's X position
+  int yValue = Esplora.readJoystickY();        // read the joystick's Y position
+  int button = Esplora.readJoystickSwitch();   // read the joystick pushbutton
+  Serial.print("Joystick X: ");                // print a label for the X value
+  Serial.print(xValue);                        // print the X value
+  Serial.print("\tY: ");                       // print a tab character and a label for the Y value
+  Serial.print(yValue);                        // print the Y value
+  Serial.print("\tButton: ");                  // print a tab character and a label for the button
+  Serial.print(button);                        // print the button value
+
+  int mouseX = map(xValue, -512, 512, 10, -10);  // map the X value to a range of movement for the mouse X
+  int mouseY = map(yValue, -512, 512, -10, 10);  // map the Y value to a range of movement for the mouse Y
+  Mouse.move(mouseX, mouseY, 0);                 // move the mouse
+
+  if (button == 0) {                           // if the joystick button is pressed
+    Mouse.press();                             // send a mouse click
+  } else {
+    Mouse.release();                           // if it's not pressed, release the mouse button 
+  }
+
+  delay(10);                                  // a short delay before moving again
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraLedShow/EsploraLedShow.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraLedShow/EsploraLedShow.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraLedShow/EsploraLedShow.ino	(revision 136)
@@ -0,0 +1,42 @@
+/*
+  Esplora LED Show
+
+  Makes the RGB LED bright and glow as the joystick or the
+  slider are moved.
+
+  Created on 22 november 2012
+  By Enrico Gueli <enrico.gueli@gmail.com>
+  Modified 22 Dec 2012
+  by Tom Igoe
+*/
+#include <Esplora.h>
+
+void setup() {
+  // initialize the serial communication:
+  Serial.begin(9600);
+}
+
+void loop() {
+  // read the sensors into variables:
+  int xAxis = Esplora.readJoystickX();
+  int yAxis = Esplora.readJoystickY();
+  int slider = Esplora.readSlider();
+
+  // convert the sensor readings to light levels:
+  byte red   = map(xAxis, -512, 512, 0, 255);
+  byte green = map(yAxis, -512, 512, 0, 255);
+  byte blue  = slider / 4;
+
+  // print the light levels:
+  Serial.print(red);
+  Serial.print(' ');
+  Serial.print(green);
+  Serial.print(' ');
+  Serial.println(blue);
+
+  // write the light levels to the LED.
+  Esplora.writeRGB(red, green, blue);
+
+  // add a delay to keep the LED from flickering:
+  delay(10);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraLedShow2/EsploraLedShow2.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraLedShow2/EsploraLedShow2.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraLedShow2/EsploraLedShow2.ino	(revision 136)
@@ -0,0 +1,55 @@
+/*
+  Esplora Led/Microphone
+
+  This simple sketch reads the microphone, light sensor, and slider.
+  Then it uses those readings to set the brightness of red, green and blue
+  channels of the RGB LED. The red channel will change with the loudness
+  "heared" by the microphone, the green channel changes as the
+  amount of light in the room and the blue channel will change
+  with the position of the slider.
+
+  Created on 22 november 2012
+  By Enrico Gueli <enrico.gueli@gmail.com>
+  Modified 24 Nov 2012
+  by Tom Igoe
+*/
+
+#include <Esplora.h>
+
+void setup() {
+  // initialize the serial communication:
+  Serial.begin(9600);
+}
+
+int lowLight = 400;   // the light sensor reading when it's covered
+int highLight = 1023; // the maximum light sensor reading
+int minGreen = 0;     // minimum brightness of the green LED
+int maxGreen = 100;   // maximum brightness of the green LED
+
+void loop() {
+  // read the sensors into variables:
+  int mic = Esplora.readMicrophone();
+  int light = Esplora.readLightSensor();
+  int slider = Esplora.readSlider();
+
+  // convert the sensor readings to light levels:
+  byte red   = constrain(mic, 0, 255);
+  byte green = constrain(
+                 map(light, lowLight, highLight, minGreen, maxGreen),
+                 0, 255);
+  byte blue  = slider / 4;
+
+  // print the light levels (to see what's going on):
+  Serial.print(red);
+  Serial.print(' ');
+  Serial.print(green);
+  Serial.print(' ');
+  Serial.println(blue);
+
+  // write the light levels to the LED.
+  // note that the green value is always 0:
+  Esplora.writeRGB(red, green, blue);
+
+  // add a delay to keep the LED from flickering:
+  delay(10);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraLightCalibrator/EsploraLightCalibrator.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraLightCalibrator/EsploraLightCalibrator.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraLightCalibrator/EsploraLightCalibrator.ino	(revision 136)
@@ -0,0 +1,91 @@
+/*
+  Esplora Led calibration
+
+ This  sketch shows you how to read and calibrate the light sensor.
+ Because light levels vary from one location to another, you need to calibrate the
+ sensor for each location. To do this, you read the sensor for a few seconds,
+ and save the highest and lowest readings as maximum and minimum.
+ Then, when you're using the sensor's reading (for example, to set the brightness
+ of the LED), you map the sensor's reading to a range between the minimum
+ and the maximum.
+
+ Created on 22 Dec 2012
+ by Tom Igoe
+
+ This example is in the public domain.
+ */
+
+#include <Esplora.h>
+
+// variables:
+int lightMin = 1023;        // minimum sensor value
+int lightMax = 0;           // maximum sensor value
+boolean calibrated = false;  // whether the sensor's been calibrated yet
+
+void setup() {
+  // initialize the serial communication:
+  Serial.begin(9600);
+
+  // print an intial message
+  Serial.println("To calibrate the light sensor, press and hold Switch 1");
+}
+
+void loop() {
+  // if switch 1 is pressed, go to the calibration function again:
+  if (Esplora.readButton(1) == LOW) {
+    calibrate();
+  }
+  // read the sensor into a variable:
+  int light = Esplora.readLightSensor();
+
+  // map the light level to a brightness level for the LED
+  // using the calibration min and max:
+  int brightness = map(light, lightMin, lightMax, 0, 255);
+  // limit the brightness to a range from 0 to 255:
+  brightness = constrain(brightness, 0, 255);
+  // write the brightness to the blue LED.
+  Esplora.writeBlue(brightness);
+
+  // if the calibration's been done, show the sensor and brightness
+  // levels in the serial monitor:
+  if (calibrated == true) {
+    // print the light sensor levels and the LED levels (to see what's going on):
+    Serial.print("light sensor level: ");
+    Serial.print(light);
+    Serial.print(" blue brightness: ");
+    Serial.println(brightness);
+  }
+  // add a delay to keep the LED from flickering:
+  delay(10);
+}
+
+void calibrate() {
+  // tell the user what do to using the serial monitor:
+  Serial.println("While holding switch 1, shine a light on the light sensor, then cover it.");
+
+  // calibrate while switch 1 is pressed:
+  while (Esplora.readButton(1) == LOW) {
+    // read the sensor value:
+    int light  = Esplora.readLightSensor();
+
+    // record the maximum sensor value:
+    if (light > lightMax) {
+      lightMax = light;
+    }
+
+    // record the minimum sensor value:
+    if (light < lightMin) {
+      lightMin = light;
+    }
+    // note that you're calibrated, for future reference:
+    calibrated = true;
+  }
+}
+
+
+
+
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraMusic/EsploraMusic.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraMusic/EsploraMusic.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraMusic/EsploraMusic.ino	(revision 136)
@@ -0,0 +1,53 @@
+/*
+  Esplora Music
+
+  This sketch turns the Esplora in a simple musical instrument.
+  Press the Switch 1 and move the slider to see how it works.
+
+  Created on 22 november 2012
+  By Enrico Gueli <enrico.gueli@gmail.com>
+  modified 22 Dec 2012
+  by Tom Igoe
+*/
+
+
+#include <Esplora.h>
+
+// these are the frequencies for the notes from middle C
+// to one octave above middle C:
+const int note[] = {
+  262, // C
+  277, // C#
+  294, // D
+  311, // D#
+  330, // E
+  349, // F
+  370, // F#
+  392, // G
+  415, // G#
+  440, // A
+  466, // A#
+  494, // B
+  523  // C next octave
+};
+
+void setup() {
+}
+
+void loop() {
+  // read the button labeled SWITCH_DOWN. If it's low,
+  // then play a note:
+  if (Esplora.readButton(SWITCH_DOWN) == LOW) {
+    int slider = Esplora.readSlider();
+
+    // use map() to map the slider's range to the
+    // range of notes you have:
+    byte thisNote = map(slider, 0, 1023, 0, 13);
+    // play the note corresponding to the slider's position:
+    Esplora.tone(note[thisNote]);
+  }
+  else {
+    // if the button isn't pressed, turn the note off:
+    Esplora.noTone();
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraSoundSensor/EsploraSoundSensor.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraSoundSensor/EsploraSoundSensor.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraSoundSensor/EsploraSoundSensor.ino	(revision 136)
@@ -0,0 +1,41 @@
+/*
+  Esplora Sound Sensor
+
+ This  sketch shows you how to read  the microphone sensor. The microphone
+will range from 0 (total silence) to 1023 (really loud).
+ When you're using the sensor's reading (for example, to set the brightness
+ of the LED), you map the sensor's reading to a range between the minimum
+ and the maximum.
+
+ Created on 22 Dec 2012
+ by Tom Igoe
+
+ This example is in the public domain.
+ */
+
+#include <Esplora.h>
+
+void setup() {
+  // initialize the serial communication:
+  Serial.begin(9600);
+}
+
+void loop() {
+  // read the sensor into a variable:
+  int loudness = Esplora.readMicrophone();
+
+  // map the sound level to a brightness level for the LED:
+  int brightness = map(loudness, 0, 1023, 0, 255);
+  // write the brightness to the green LED:
+  Esplora.writeGreen(brightness);
+
+
+  // print the microphone levels and the LED levels (to see what's going on):
+  Serial.print("sound level: ");
+  Serial.print(loudness);
+  Serial.print(" Green brightness: ");
+  Serial.println(brightness);
+  // add a delay to keep the LED from flickering:
+  delay(10);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraTemperatureSensor/EsploraTemperatureSensor.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraTemperatureSensor/EsploraTemperatureSensor.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Beginners/EsploraTemperatureSensor/EsploraTemperatureSensor.ino	(revision 136)
@@ -0,0 +1,37 @@
+/*
+  Esplora Temperature Sensor
+
+ This  sketch shows you how to read the Esplora's temperature sensor
+ You can read the temperature sensor in Farhenheit or Celsius.
+
+ Created on 22 Dec 2012
+ by Tom Igoe
+
+ This example is in the public domain.
+ */
+#include <Esplora.h>
+
+void setup()
+{
+  Serial.begin(9600);      // initialize serial communications with your computer
+}
+
+void loop()
+{
+  // read the temperature sensor in Celsius, then Fahrenheit:
+  int celsius = Esplora.readTemperature(DEGREES_C);
+  int fahrenheit = Esplora.readTemperature(DEGREES_F);
+
+  // print the results:
+  Serial.print("Temperature is: ");
+  Serial.print(celsius);
+  Serial.print(" degrees Celsius, or ");
+  Serial.print(fahrenheit);
+  Serial.println(" degrees Fahrenheit.");
+  Serial.println("     Fahrenheit = (9/5 * Celsius) + 32");
+
+  // wait a second before reading again:
+  delay(1000);
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraKart/EsploraKart.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraKart/EsploraKart.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraKart/EsploraKart.ino	(revision 136)
@@ -0,0 +1,125 @@
+/*
+  Esplora Kart
+
+  This sketch turns the Esplora into a PC game pad.
+
+  It uses the both the analog joystick and the four switches.
+  By moving the joystick in a direction or by pressing a switch,
+  the PC will "see" that a key is pressed. If the PC is running
+  a game that has keyboard input, the Esplora can control it.
+
+  The default configuration is suitable for SuperTuxKart, an
+  open-source racing game. It can be downloaded from
+  http://supertuxkart.sourceforge.net/ .
+
+  Created on 22 november 2012
+  By Enrico Gueli <enrico.gueli@gmail.com>
+*/
+
+
+#include <Esplora.h>
+
+/*
+  You're going to handle eight different buttons. You'll use arrays,
+  which are ordered lists of variables with a fixed size. Each array
+  has an index (counting from 0) to keep track of the position
+  you're reading in the array, and each position can contain a number.
+
+  This code uses three different arrays: one for the buttons you'll read;
+  a second to hold the current states of those buttons; and a third to hold
+  the keystrokes associated with each button.
+ */
+
+/*
+  This array holds the last sensed state of each of the buttons
+  you're reading.
+  Later in the code, you'll read the button states, and compare them
+  to the previous states that are stored in this array. If the two
+  states are different, it means that the button was either
+  pressed or released.
+ */
+boolean buttonStates[8];
+
+/*
+  This array holds the names of the buttons being read.
+  Later in the sketch, you'll use these names with
+  the method Esplora.readButton(x), where x
+  is one of these buttons.
+ */
+const byte buttons[] = {
+  JOYSTICK_DOWN,
+  JOYSTICK_LEFT,
+  JOYSTICK_UP,
+  JOYSTICK_RIGHT,
+  SWITCH_RIGHT, // fire
+  SWITCH_LEFT, // bend
+  SWITCH_UP, // nitro
+  SWITCH_DOWN, // look back
+};
+
+/*
+  This array tells what keystroke to send to the PC when a
+  button is pressed.
+  If you look at this array and the above one, you can see that
+  the "cursor down" keystroke is sent when the joystick is moved
+  down, the "cursor up" keystroke when the joystick is moved up
+  and so on.
+*/
+const char keystrokes[] = {
+  KEY_DOWN_ARROW,
+  KEY_LEFT_ARROW,
+  KEY_UP_ARROW,
+  KEY_RIGHT_ARROW,
+  ' ',
+  'V',
+  'N',
+  'B'
+};
+
+/*
+  This is code is run only at startup, to initialize the
+  virtual USB keyboard.
+*/
+void setup() {
+  Keyboard.begin();
+}
+
+/*
+  After setup() is finished, this code is run continuously.
+  Here we continuously check if something happened with the
+  buttons.
+*/
+void loop() {
+
+  // Iterate through all the buttons:
+  for (byte thisButton = 0; thisButton < 8; thisButton++) {
+    boolean lastState = buttonStates[thisButton];
+    boolean newState = Esplora.readButton(buttons[thisButton]);
+    if (lastState != newState) { // Something changed!
+      /*
+        The Keyboard library allows you to "press" and "release" the
+        keys as two distinct actions. These actions can be
+        linked to the buttons we're handling.
+       */
+      if (newState == PRESSED) {
+        Keyboard.press(keystrokes[thisButton]);
+      }
+      else if (newState == RELEASED) {
+        Keyboard.release(keystrokes[thisButton]);
+      }
+    }
+
+    // Store the new button state, so you can sense a difference later:
+    buttonStates[thisButton] = newState;
+  }
+
+  /*
+    Wait a little bit (50ms) between a check and another.
+    When a mechanical switch is pressed or released, the
+    contacts may bounce very rapidly. If the check is done too
+    fast, these bounces may be confused as multiple presses and
+    may lead to unexpected behaviour.
+   */
+  delay(50);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraPong/EsploraPong.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraPong/EsploraPong.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraPong/EsploraPong.ino	(revision 136)
@@ -0,0 +1,44 @@
+/*
+  Esplora Pong
+
+ This  sketch connects serially to a Processing sketch to control a Pong game.
+ It sends the position of the slider and the states of three pushbuttons to the
+ Processing sketch serially, separated by commas. The Processing sketch uses that
+ data to control the graphics in the sketch.
+
+ The slider sets a paddle's height
+ Switch 1 is resets the game
+ Switch 2 resets the ball to the center
+ Switch 3 reverses the players
+
+ You can play this game with one or two Esploras.
+
+ Created on 22 Dec 2012
+ by Tom Igoe
+
+ This example is in the public domain.
+ */
+
+#include <Esplora.h>
+
+void setup() {
+  Serial.begin(9600);     // initialize serial communication
+}
+
+void loop() {
+  // read the slider and three of the buttons
+  int slider = Esplora.readSlider();
+  int resetButton = Esplora.readButton(SWITCH_1);
+  int serveButton = Esplora.readButton(SWITCH_3);
+  int switchPlayerButton = Esplora.readButton(SWITCH_4);
+
+  Serial.print(slider);                // print the slider value
+  Serial.print(",");                   // add a comma
+  Serial.print(resetButton);           // print the reset button value
+  Serial.print(",");                   // add another comma
+  Serial.print(serveButton);           // print the serve button value
+  Serial.print(",");                   // add another comma
+  Serial.println(switchPlayerButton);  // print the last button with a newline
+  delay(10);                           // delay before sending the next set
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraRemote/EsploraRemote.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraRemote/EsploraRemote.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraRemote/EsploraRemote.ino	(revision 136)
@@ -0,0 +1,116 @@
+/*
+  Esplora Remote
+
+ This sketch allows to test all the Esplora's peripherals.
+ It is also used with the ProcessingStart sketch (for Processing).
+
+ When uploaded, you can open the Serial monitor and write one of
+ the following commands (without quotes) to get an answer:
+
+ "D": prints the current value of all sensors, separated by a comma.
+ See the dumpInputs() function below to get the meaning of
+ each value.
+
+ "Rxxx"
+ "Gxxx"
+ "Bxxx": set the color of the RGB led. For example, write "R255"
+ to turn on the red to full brightness, "G128" to turn
+ the green to half brightness, or "G0" to turn off
+ the green channel.
+
+ "Txxxx": play a tone with the buzzer. The number is the
+ frequency, e.g. "T440" plays the central A note.
+ Write "T0" to turn off the buzzer.
+
+
+ Created on 22 november 2012
+ By Enrico Gueli <enrico.gueli@gmail.com>
+ Modified 23 Dec 2012
+ by Tom Igoe
+ */
+
+#include <Esplora.h>
+
+void setup() {
+  while (!Serial); // needed for Leonardo-based board like Esplora
+  Serial.begin(9600);
+}
+
+void loop() {
+  if (Serial.available())
+    parseCommand();
+}
+
+/*
+ * This function reads a character from the serial line and
+ * decide what to do next. The "what to do" part is given by
+ * function it calls (e.g. dumpInputs(), setRed() and so on).
+ */
+void parseCommand() {
+  char cmd = Serial.read();
+  switch (cmd) {
+    case 'D':
+      dumpInputs();
+      break;
+    case 'R':
+      setRed();
+      break;
+    case 'G':
+      setGreen();
+      break;
+    case 'B':
+      setBlue();
+      break;
+    case 'T':
+      setTone();
+      break;
+  }
+}
+
+void dumpInputs() {
+  Serial.print(Esplora.readButton(SWITCH_1));
+  Serial.print(',');
+  Serial.print(Esplora.readButton(SWITCH_2));
+  Serial.print(',');
+  Serial.print(Esplora.readButton(SWITCH_3));
+  Serial.print(',');
+  Serial.print(Esplora.readButton(SWITCH_4));
+  Serial.print(',');
+  Serial.print(Esplora.readSlider());
+  Serial.print(',');
+  Serial.print(Esplora.readLightSensor());
+  Serial.print(',');
+  Serial.print(Esplora.readTemperature(DEGREES_C));
+  Serial.print(',');
+  Serial.print(Esplora.readMicrophone());
+  Serial.print(',');
+  Serial.print(Esplora.readJoystickSwitch());
+  Serial.print(',');
+  Serial.print(Esplora.readJoystickX());
+  Serial.print(',');
+  Serial.print(Esplora.readJoystickY());
+  Serial.print(',');
+  Serial.print(Esplora.readAccelerometer(X_AXIS));
+  Serial.print(',');
+  Serial.print(Esplora.readAccelerometer(Y_AXIS));
+  Serial.print(',');
+  Serial.print(Esplora.readAccelerometer(Z_AXIS));
+  Serial.println();
+}
+
+void setRed() {
+  Esplora.writeRed(Serial.parseInt());
+}
+
+void setGreen() {
+  Esplora.writeGreen(Serial.parseInt());
+}
+
+void setBlue() {
+  Esplora.writeBlue(Serial.parseInt());
+}
+
+void setTone() {
+  Esplora.tone(Serial.parseInt());
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraTable/EsploraTable.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraTable/EsploraTable.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/examples/Experts/EsploraTable/EsploraTable.ino	(revision 136)
@@ -0,0 +1,213 @@
+/*
+  Esplora Table
+
+  Acts like a keyboard that prints sensor
+  data in a table-like text, row by row.
+
+  At startup, it does nothing. It waits for you to open a
+  spreadsheet (e.g. Google Drive spreadsheet) so it can write
+  data. By pressing Switch 1, it starts printing the table
+  headers and the first row of data. It waits a bit, then it
+  will print another row, and so on.
+
+  The amount of time between each row is determined by the slider.
+  If put to full left, the sketch will wait 10 seconds; at
+  full right position, it will wait 5 minutes. An intermediate
+  position will make the sketch wait for some time in-between.
+
+  Clicking the Switch 1 at any time will stop the logging.
+
+  The color LED shows what the sketch is doing:
+  blue  = idle, waiting for you to press Switch 1 to start logging
+  green = active; will print soon
+  red   = printing data to the PC
+
+  Created on 22 november 2012
+  By Enrico Gueli <enrico.gueli@gmail.com>
+  modified 24 Nov 2012
+  by Tom Igoe
+*/
+
+#include <Esplora.h>
+
+/*
+ * this variable tells if the data-logging is currently active.
+ */
+boolean active = false;
+
+/*
+ * this variable holds the time in the future when the sketch
+ * will "sample" the data (sampling is the act of reading some
+ * input at a known time). This variable is checked continuously
+ * against millis() to know when it's time to sample.
+ */
+unsigned long nextSampleAt = 0;
+
+/*
+ * This variable just holds the millis() value at the time the
+ * logging was activated. This is needed to enter the correct
+ * value in the "Time" column in the printed table.
+ */
+unsigned long startedAt = 0;
+
+
+/*
+ * when the "active" variable is set to true, the same is done
+ * with this variable. This is needed because the code that does
+ * the "just-after-activation" stuff is run some time later than
+ * the code that says "be active now".
+ */
+boolean justActivated = false;
+
+
+/*
+ * this variable holds the last sensed status of the switch press
+ * button. If the code sees a difference between the value of
+ * this variable and the current status of the switch, it means
+ * that the button was either pressed or released.
+ */
+boolean lastStartBtn = HIGH;
+
+/*
+ * Initialization code. The virtual USB keyboard must be
+ * initialized; the Serial class is needed just for debugging.
+ */
+void setup() {
+  Keyboard.begin();
+  Serial.begin(9600);
+}
+
+/*
+ * This code is run continuously.
+ */
+void loop() {
+  /*
+   * note: we don't use Arduino's delay() here, because we can't
+   * normally do anything while delaying. Our own version lets us
+   * check for button presses often enough to not miss any event.
+   */
+  activeDelay(50);
+
+  /*
+   * the justActivated variable may be set to true in the
+   * checkSwitchPress() function. Here we check its status to
+   * print the table headers and configure what's needed to.
+   */
+  if (justActivated == true) {
+    justActivated = false; // do this just once
+    printHeaders();
+    // do next sampling ASAP
+    nextSampleAt = startedAt = millis();
+  }
+
+  if (active == true) {
+    if (nextSampleAt < millis()) {
+      // it's time to sample!
+      int slider = Esplora.readSlider();
+      // the row below maps the slider position to a range between
+      // 10 and 290 seconds.
+      int sampleInterval = map(slider, 0, 1023, 10, 290);
+      nextSampleAt = millis() + sampleInterval * 1000;
+
+      logAndPrint();
+    }
+
+    // let the RGB led blink green once per second, for 200ms.
+    unsigned int ms = millis() % 1000;
+    if (ms < 200)
+      Esplora.writeGreen(50);
+    else
+      Esplora.writeGreen(0);
+
+    Esplora.writeBlue(0);
+  }
+  else
+    // while not active, keep a reassuring blue color coming
+    // from the Esplora...
+    Esplora.writeBlue(20);
+
+}
+
+/*
+ * Print the table headers.
+ */
+void printHeaders() {
+  Keyboard.print("Time");
+  Keyboard.write(KEY_TAB);
+  activeDelay(300); // Some spreadsheets are slow, e.g. Google
+  // Drive that wants to save every edit.
+  Keyboard.print("Accel X");
+  Keyboard.write(KEY_TAB);
+  activeDelay(300);
+  Keyboard.print("Accel Y");
+  Keyboard.write(KEY_TAB);
+  activeDelay(300);
+  Keyboard.print("Accel Z");
+  Keyboard.println();
+  activeDelay(300);
+}
+
+void logAndPrint() {
+  // do all the samplings at once, because keystrokes have delays
+  unsigned long timeSecs = (millis() - startedAt) / 1000;
+  int xAxis = Esplora.readAccelerometer(X_AXIS);
+  int yAxis = Esplora.readAccelerometer(Y_AXIS);
+  int zAxis = Esplora.readAccelerometer(Z_AXIS);
+
+  Esplora.writeRed(100);
+
+  Keyboard.print(timeSecs);
+  Keyboard.write(KEY_TAB);
+  activeDelay(300);
+  Keyboard.print(xAxis);
+  Keyboard.write(KEY_TAB);
+  activeDelay(300);
+  Keyboard.print(yAxis);
+  Keyboard.write(KEY_TAB);
+  activeDelay(300);
+  Keyboard.print(zAxis);
+  Keyboard.println();
+  activeDelay(300);
+  Keyboard.write(KEY_HOME);
+
+  Esplora.writeRed(0);
+}
+
+/**
+ * Similar to delay(), but allows the program to do something else
+ * in the meanwhile. In particular, it calls checkSwitchPress().
+ * Note 1: it may wait longer than the specified amount, not less;
+ * Note 2: beware of data synchronization issues, e.g. if the
+ * activeDelay() function alters some variables used by the
+ * caller of this function.
+ */
+void activeDelay(unsigned long amount) {
+  unsigned long at = millis() + amount;
+  while (millis() < at) {
+    checkSwitchPress();
+  }
+}
+
+/*
+ * This function reads the status of the switch; if it sees that
+ * it was pressed, toggles the status of the "active" variable.
+ * If it's set to true, also the justActivated variable is set to
+ * true, so the loop() function above can do the right things.
+ * This function should be called as often as possible and do as
+ * little as possible, because it can be called while another
+ * function is running.
+ */
+void checkSwitchPress() {
+  boolean startBtn = Esplora.readButton(SWITCH_DOWN);
+
+  if (startBtn != lastStartBtn) {
+    if (startBtn == HIGH) { // button released
+      active = !active;
+      if (active)
+        justActivated = true;
+    }
+
+    lastStartBtn = startBtn;
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/keywords.txt	(revision 136)
@@ -0,0 +1,72 @@
+#######################################
+# Syntax Coloring Map For Esplora
+####################################### 
+# Class
+#######################################
+
+Esplora	KEYWORD3
+
+#######################################
+# Methods and Functions 
+#######################################	
+
+begin	KEYWORD2
+readSlider	KEYWORD2
+readLightSensor	KEYWORD2
+readTemperature	KEYWORD2
+readMicrophone	KEYWORD2
+readJoystickSwitch	KEYWORD2
+readJoystickButton	KEYWORD2
+readJoystickX	KEYWORD2
+readJoystickY	KEYWORD2
+readAccelerometer	KEYWORD2
+readButton	KEYWORD2
+writeRGB	KEYWORD2
+writeRed	KEYWORD2
+writeGreen	KEYWORD2
+writeBlue	KEYWORD2
+readRed	KEYWORD2
+readGreen	KEYWORD2
+readBlue	KEYWORD2
+readTinkerkitInput     KEYWORD2
+readTinkerkitInputA     KEYWORD2
+readTinkerkitInputB     KEYWORD2
+tone	KEYWORD2
+noTone	KEYWORD2
+
+
+#######################################
+# Constants
+#######################################
+ 
+JOYSTICK_BASE	LITERAL1
+MAX_CHANNELS	LITERAL1
+CH_SWITCH_1	LITERAL1
+CH_SWITCH_2	LITERAL1
+CH_SWITCH_3	LITERAL1
+CH_SWITCH_4	LITERAL1
+CH_SLIDER	LITERAL1
+CH_LIGHT	LITERAL1
+CH_TEMPERATURE	LITERAL1
+CH_MIC	LITERAL1
+CH_JOYSTICK_SW	LITERAL1
+CH_JOYSTICK_X	LITERAL1
+CH_JOYSTICK_Y	LITERAL1
+SWITCH_1	LITERAL1
+SWITCH_2	LITERAL1
+SWITCH_3	LITERAL1
+SWITCH_4	LITERAL1
+SWITCH_DOWN	LITERAL1
+SWITCH_LEFT	LITERAL1
+SWITCH_UP	LITERAL1
+SWITCH_RIGHT	LITERAL1
+JOYSTICK_DOWN	LITERAL1
+JOYSTICK_LEFT	LITERAL1
+JOYSTICK_UP	LITERAL1
+PRESSED	LITERAL1
+RELEASED	LITERAL1
+DEGREES_C	LITERAL1
+DEGREES_F	LITERAL1
+X_AXIS	LITERAL1
+Y_AXIS	LITERAL1
+Z_AXIS	LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Esplora
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Grants easy access to the various sensors and actuators of the Esplora. For Arduino Esplora only.
+paragraph=The sensors available on the board are:2-Axis analog joystick with center push-button,4 push-buttons,microphone, light sensor, temperature sensor, 3-axis accelerometer, 2 TinkerKit input connectors.</br>The actuators available on the board are: bright RGB LED, piezo buzzer, 2 TinkerKit output connectors.
+category=Device Control
+url=http://arduino.cc/en/Reference/EsploraLibrary
+architectures=avr
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/src/Esplora.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/src/Esplora.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/src/Esplora.cpp	(revision 136)
@@ -0,0 +1,184 @@
+/*
+  Esplora.cpp - Arduino Esplora board library
+  Written by Enrico Gueli
+  Copyright (c) 2012 Arduino(TM)  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+
+#include "Esplora.h"
+
+_Esplora Esplora;
+
+/*
+ * The following constants tell, for each accelerometer
+ * axis, which values are returned when the axis measures
+ * zero acceleration.
+ */
+const int ACCEL_ZERO_X = 320;
+const int ACCEL_ZERO_Y = 330;
+const int ACCEL_ZERO_Z = 310;
+
+const byte MUX_ADDR_PINS[] = { A0, A1, A2, A3 };
+const byte MUX_COM_PIN = A4;
+
+const int JOYSTICK_DEAD_ZONE = 100;
+
+const byte RED_PIN    = 5;
+const byte BLUE_PIN   = 9;
+const byte GREEN_PIN  = 10;
+
+const byte BUZZER_PIN = 6;
+
+// non-multiplexer Esplora pins: 
+// Accelerometer: x-A5, y-A7, z-A6
+// External outputs: D3, D11
+// Buzzer: A8
+// RGB Led: red-D5, green-D10/A11, blue-D9/A10
+// Led 13: D13
+
+const byte ACCEL_X_PIN = A5;
+const byte ACCEL_Y_PIN = A11;
+const byte ACCEL_Z_PIN = A6;
+
+const byte LED_PIN     = 13;
+
+_Esplora::_Esplora() {
+  for (byte p=0; p<4; p++) {
+    pinMode(MUX_ADDR_PINS[p], OUTPUT);
+  }
+  pinMode(RED_PIN, OUTPUT);
+  pinMode(GREEN_PIN, OUTPUT);
+  pinMode(BLUE_PIN, OUTPUT);
+}
+
+unsigned int _Esplora::readChannel(byte channel) {
+  digitalWrite(MUX_ADDR_PINS[0], (channel & 1) ? HIGH : LOW);
+  digitalWrite(MUX_ADDR_PINS[1], (channel & 2) ? HIGH : LOW);
+  digitalWrite(MUX_ADDR_PINS[2], (channel & 4) ? HIGH : LOW);
+  digitalWrite(MUX_ADDR_PINS[3], (channel & 8) ? HIGH : LOW);
+  // workaround to cope with lack of pullup resistor on joystick switch
+  if (channel == CH_JOYSTICK_SW) {
+    pinMode(MUX_COM_PIN, INPUT_PULLUP); 
+    unsigned int joystickSwitchState = (digitalRead(MUX_COM_PIN) == HIGH) ? 1023 : 0;
+    digitalWrite(MUX_COM_PIN, LOW);
+    return joystickSwitchState;
+  }
+  else
+    return analogRead(MUX_COM_PIN);
+}
+
+boolean _Esplora::joyLowHalf(byte joyCh) {
+  return (readChannel(joyCh) < 512 - JOYSTICK_DEAD_ZONE)
+    ? LOW : HIGH;
+}
+
+boolean _Esplora::joyHighHalf(byte joyCh) {
+  return (readChannel(joyCh) > 512 + JOYSTICK_DEAD_ZONE)
+    ? LOW : HIGH;
+}
+
+boolean _Esplora::readButton(byte ch) {
+  if (ch >= SWITCH_1 && ch <= SWITCH_4) {
+    ch--;
+  }
+  
+  switch(ch) {
+  case JOYSTICK_RIGHT:
+    return joyLowHalf(CH_JOYSTICK_X);
+  case JOYSTICK_LEFT:
+    return joyHighHalf(CH_JOYSTICK_X);
+  case JOYSTICK_UP:
+    return joyLowHalf(CH_JOYSTICK_Y);
+  case JOYSTICK_DOWN:
+    return joyHighHalf(CH_JOYSTICK_Y);
+  }
+    
+  unsigned int val = readChannel(ch);
+  return (val > 512) ? HIGH : LOW;
+}
+
+boolean _Esplora::readJoystickButton() {
+ if (readChannel(CH_JOYSTICK_SW) == 1023) {
+  return HIGH;
+ } else if (readChannel(CH_JOYSTICK_SW) == 0) {
+  return LOW;
+ }
+}
+
+
+void _Esplora::writeRGB(byte r, byte g, byte b) {
+  writeRed(r);
+  writeGreen(g);
+  writeBlue(b);
+}
+
+#define RGB_FUNC(name, pin, lastVar) \
+void _Esplora::write##name(byte val) { \
+  if (val == lastVar) \
+    return; \
+  analogWrite(pin, val);  \
+  lastVar = val; \
+  delay(5); \
+} \
+\
+byte _Esplora::read##name() { \
+  return lastVar; \
+}
+  
+RGB_FUNC(Red,   RED_PIN,   lastRed)
+RGB_FUNC(Green, GREEN_PIN, lastGreen)
+RGB_FUNC(Blue,  BLUE_PIN,  lastBlue)
+
+void _Esplora::tone(unsigned int freq) {
+  if (freq > 0)
+    ::tone(BUZZER_PIN, freq);
+  else
+    ::noTone(BUZZER_PIN);
+}
+
+void _Esplora::tone(unsigned int freq, unsigned long duration) {
+  if (freq > 0)
+    ::tone(BUZZER_PIN, freq, duration);
+  else
+    ::noTone(BUZZER_PIN);
+}
+
+void _Esplora::noTone() {
+  ::noTone(BUZZER_PIN);
+}
+
+int _Esplora::readTemperature(const byte scale) {
+  long rawT = readChannel(CH_TEMPERATURE);
+  if (scale == DEGREES_C) {
+    return (int)((rawT * 500 / 1024) - 50);
+  }
+  else if (scale == DEGREES_F) {
+    return (int)((rawT * 450 / 512 ) - 58);
+  }
+  else {
+    return readTemperature(DEGREES_C);
+  }
+}
+
+int _Esplora::readAccelerometer(const byte axis) {
+  switch (axis) {
+    case X_AXIS: return analogRead(ACCEL_X_PIN) - ACCEL_ZERO_X;
+    case Y_AXIS: return analogRead(ACCEL_Y_PIN) - ACCEL_ZERO_Y;
+    case Z_AXIS: return analogRead(ACCEL_Z_PIN) - ACCEL_ZERO_Z;
+    default: return 0;
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Esplora/src/Esplora.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Esplora/src/Esplora.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Esplora/src/Esplora.h	(revision 136)
@@ -0,0 +1,177 @@
+/*
+  Esplora.h - Arduino Esplora board library
+  Written by Enrico Gueli
+  Copyright (c) 2012 Arduino(TM)  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef ESPLORA_H_
+#define ESPLORA_H_
+
+#include <Arduino.h>
+
+/*
+ * The following constants are used internally by the Esplora
+ * library code.
+ */
+
+const byte JOYSTICK_BASE  = 16; // it's a "virtual" channel: its ID won't conflict with real ones
+
+const byte MAX_CHANNELS   = 13;
+
+const byte CH_SWITCH_1    = 0;
+const byte CH_SWITCH_2    = 1;
+const byte CH_SWITCH_3    = 2;
+const byte CH_SWITCH_4    = 3;
+const byte CH_SLIDER      = 4;
+const byte CH_LIGHT       = 5;
+const byte CH_TEMPERATURE = 6;
+const byte CH_MIC         = 7;
+const byte CH_TINKERKIT_A = 8;
+const byte CH_TINKERKIT_B = 9;
+const byte CH_JOYSTICK_SW = 10;
+const byte CH_JOYSTICK_X  = 11;
+const byte CH_JOYSTICK_Y  = 12;
+
+/*
+ * The following constants can be used with the readButton()
+ * method.
+ */
+
+const byte SWITCH_1       = 1;
+const byte SWITCH_2       = 2;
+const byte SWITCH_3       = 3;
+const byte SWITCH_4       = 4;
+
+const byte SWITCH_DOWN  = SWITCH_1;
+const byte SWITCH_LEFT  = SWITCH_2;
+const byte SWITCH_UP    = SWITCH_3;
+const byte SWITCH_RIGHT = SWITCH_4;
+
+const byte JOYSTICK_DOWN  = JOYSTICK_BASE;
+const byte JOYSTICK_LEFT  = JOYSTICK_BASE+1;
+const byte JOYSTICK_UP    = JOYSTICK_BASE+2;
+const byte JOYSTICK_RIGHT = JOYSTICK_BASE+3;
+
+/*
+ * These constants can be use for comparison with the value returned
+ * by the readButton() method.
+ */
+const boolean PRESSED   = LOW;
+const boolean RELEASED  = HIGH;
+
+/*
+ * The following constants can be used with the readTemperature()
+ * method to specify the desired scale.
+ */
+const byte DEGREES_C = 0;
+const byte DEGREES_F = 1;
+
+/*
+ * The following constants can be used with the readAccelerometer()
+ * method to specify the desired axis to return.
+ */
+const byte X_AXIS = 0;
+const byte Y_AXIS = 1;
+const byte Z_AXIS = 2;
+
+
+class _Esplora {
+private:
+  byte lastRed;
+  byte lastGreen;
+  byte lastBlue;
+
+  unsigned int readChannel(byte channel);    
+  
+  boolean joyLowHalf(byte joyCh);
+  boolean joyHighHalf(byte joyCh);
+    
+public:
+  _Esplora();
+  
+  /*
+   * Returns a number corresponding to the position of the
+   * linear potentiometer. 0 means full right, 1023 means
+   * full left.
+   */
+  inline unsigned int readSlider() { return readChannel(CH_SLIDER); }
+
+  /*
+   * Returns a number corresponding to the amount of ambient
+   * light sensed by the light sensor.
+   */
+  inline unsigned int readLightSensor() { return readChannel(CH_LIGHT); }
+
+  /*
+   * Returns the current ambient temperature, expressed either in Celsius
+   * or Fahreneit scale.
+   */
+  int readTemperature(const byte scale);
+
+  /*
+   * Returns a number corresponding to the amount of ambient noise.
+   */
+  inline unsigned int readMicrophone() { return readChannel(CH_MIC); }
+  
+  inline unsigned int readJoystickSwitch() { return readChannel(CH_JOYSTICK_SW); }
+
+  inline int readJoystickX() { 
+    return readChannel(CH_JOYSTICK_X) - 512;
+  }
+  inline int readJoystickY() {
+    return readChannel(CH_JOYSTICK_Y) - 512;
+  }
+
+  int readAccelerometer(const byte axis);
+  
+  /*
+   * Reads the current state of a button. It will return
+   * LOW if the button is pressed, and HIGH otherwise.
+   */
+  boolean readButton(byte channel);
+
+  boolean readJoystickButton();
+  
+  void writeRGB(byte red, byte green, byte blue);
+  void writeRed(byte red);
+  void writeGreen(byte green);
+  void writeBlue(byte blue);
+
+  byte readRed();
+  byte readGreen();
+  byte readBlue();
+  
+  void tone(unsigned int freq);
+  void tone(unsigned int freq, unsigned long duration);
+  void noTone();
+  
+  inline unsigned int readTinkerkitInput(byte whichInput) {
+    return readChannel(whichInput + CH_TINKERKIT_A);
+  }
+  inline unsigned int readTinkerkitInputA() {
+    return readChannel(CH_TINKERKIT_A);
+  }
+  inline unsigned int readTinkerkitInputB() {
+    return readChannel(CH_TINKERKIT_B);
+  }
+};
+
+
+
+extern _Esplora Esplora;
+
+#endif // ESPLORA_H_
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/AdvancedChatServer/AdvancedChatServer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/AdvancedChatServer/AdvancedChatServer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/AdvancedChatServer/AdvancedChatServer.ino	(revision 136)
@@ -0,0 +1,108 @@
+/*
+ Advanced Chat Server
+
+ A more advanced server that distributes any incoming messages 
+ to all connected clients but the client the message comes from.
+ To use telnet to  your device's IP address and type.
+ You can see the client's input in the serial monitor as well.
+ Using an Arduino Wiznet Ethernet shield.
+
+ Circuit:
+ * Ethernet shield attached to pins 10, 11, 12, 13
+ * Analog inputs attached to pins A0 through A5 (optional)
+
+ created 18 Dec 2009
+ by David A. Mellis
+ modified 9 Apr 2012
+ by Tom Igoe
+ redesigned to make use of operator== 25 Nov 2013
+ by Norbert Truchsess
+
+ */
+
+#include <SPI.h>
+#include <Ethernet2.h>
+
+// Enter a MAC address and IP address for your controller below.
+// The IP address will be dependent on your local network.
+// gateway and subnet are optional:
+byte mac[] = { 
+  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
+IPAddress ip(192,168,1, 177);
+IPAddress gateway(192,168,1, 1);
+IPAddress subnet(255, 255, 0, 0);
+
+
+// telnet defaults to port 23
+EthernetServer server(23);
+
+EthernetClient clients[4];
+
+void setup() {
+  // initialize the ethernet device
+  Ethernet.begin(mac, ip, gateway, subnet);
+  // start listening for clients
+  server.begin();
+ // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+   while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  Serial.print("Chat server address:");
+  Serial.println(Ethernet.localIP());
+}
+
+void loop() {
+  // wait for a new client:
+  EthernetClient client = server.available();
+
+  // when the client sends the first byte, say hello:
+  if (client) {
+
+    boolean newClient = true;
+    for (byte i=0;i<4;i++) {
+      //check whether this client refers to the same socket as one of the existing instances:
+      if (clients[i]==client) {
+        newClient = false;
+        break;
+      }
+    }
+
+    if (newClient) {
+      //check which of the existing clients can be overridden:
+      for (byte i=0;i<4;i++) {
+        if (!clients[i] && clients[i]!=client) {
+          clients[i] = client;
+          // clead out the input buffer:
+          client.flush();
+          Serial.println("We have a new client");
+          client.print("Hello, client number: ");
+          client.print(i);
+          client.println();
+          break;
+        }
+      }
+    }
+
+    if (client.available() > 0) {
+      // read the bytes incoming from the client:
+      char thisChar = client.read();
+      // echo the bytes back to all other connected clients:
+      for (byte i=0;i<4;i++) {
+        if (clients[i] && (clients[i]!=client)) {
+          clients[i].write(thisChar);
+        }
+      }
+      // echo the bytes to the server as well:
+      Serial.write(thisChar);
+    }
+  }
+  for (byte i=0;i<4;i++) {
+    if (!(clients[i].connected())) {
+      // client.stop() invalidates the internal socket-descriptor, so next use of == will allways return false;
+      clients[i].stop();
+    }
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/BarometricPressureWebServer/BarometricPressureWebServer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/BarometricPressureWebServer/BarometricPressureWebServer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/BarometricPressureWebServer/BarometricPressureWebServer.ino	(revision 136)
@@ -0,0 +1,223 @@
+/*
+  SCP1000 Barometric Pressure Sensor Display
+
+ Serves the output of a Barometric Pressure Sensor as a web page.
+ Uses the SPI library. For details on the sensor, see:
+ http://www.sparkfun.com/commerce/product_info.php?products_id=8161
+ http://www.vti.fi/en/support/obsolete_products/pressure_sensors/
+
+ This sketch adapted from Nathan Seidle's SCP1000 example for PIC:
+ http://www.sparkfun.com/datasheets/Sensors/SCP1000-Testing.zip
+
+ Circuit:
+ SCP1000 sensor attached to pins 6,7, and 11 - 13:
+ DRDY: pin 6
+ CSB: pin 7
+ MOSI: pin 11
+ MISO: pin 12
+ SCK: pin 13
+
+ created 31 July 2010
+ by Tom Igoe
+ */
+
+#include <Ethernet2.h>
+// the sensor communicates using SPI, so include the library:
+#include <SPI.h>
+
+
+// assign a MAC address for the ethernet controller.
+// fill in your address here:
+byte mac[] = {
+  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED
+};
+// assign an IP address for the controller:
+IPAddress ip(192, 168, 1, 20);
+IPAddress gateway(192, 168, 1, 1);
+IPAddress subnet(255, 255, 255, 0);
+
+
+// Initialize the Ethernet server library
+// with the IP address and port you want to use
+// (port 80 is default for HTTP):
+EthernetServer server(80);
+
+
+//Sensor's memory register addresses:
+const int PRESSURE = 0x1F;      //3 most significant bits of pressure
+const int PRESSURE_LSB = 0x20;  //16 least significant bits of pressure
+const int TEMPERATURE = 0x21;   //16 bit temperature reading
+
+// pins used for the connection with the sensor
+// the others you need are controlled by the SPI library):
+const int dataReadyPin = 6;
+const int chipSelectPin = 7;
+
+float temperature = 0.0;
+long pressure = 0;
+long lastReadingTime = 0;
+
+void setup() {
+  // start the SPI library:
+  SPI.begin();
+
+  // start the Ethernet connection and the server:
+  Ethernet.begin(mac, ip);
+  server.begin();
+
+  // initalize the  data ready and chip select pins:
+  pinMode(dataReadyPin, INPUT);
+  pinMode(chipSelectPin, OUTPUT);
+
+  Serial.begin(9600);
+
+  //Configure SCP1000 for low noise configuration:
+  writeRegister(0x02, 0x2D);
+  writeRegister(0x01, 0x03);
+  writeRegister(0x03, 0x02);
+
+  // give the sensor and Ethernet shield time to set up:
+  delay(1000);
+
+  //Set the sensor to high resolution mode tp start readings:
+  writeRegister(0x03, 0x0A);
+
+}
+
+void loop() {
+  // check for a reading no more than once a second.
+  if (millis() - lastReadingTime > 1000) {
+    // if there's a reading ready, read it:
+    // don't do anything until the data ready pin is high:
+    if (digitalRead(dataReadyPin) == HIGH) {
+      getData();
+      // timestamp the last time you got a reading:
+      lastReadingTime = millis();
+    }
+  }
+
+  // listen for incoming Ethernet connections:
+  listenForEthernetClients();
+}
+
+
+void getData() {
+  Serial.println("Getting reading");
+  //Read the temperature data
+  int tempData = readRegister(0x21, 2);
+
+  // convert the temperature to celsius and display it:
+  temperature = (float)tempData / 20.0;
+
+  //Read the pressure data highest 3 bits:
+  byte  pressureDataHigh = readRegister(0x1F, 1);
+  pressureDataHigh &= 0b00000111; //you only needs bits 2 to 0
+
+  //Read the pressure data lower 16 bits:
+  unsigned int pressureDataLow = readRegister(0x20, 2);
+  //combine the two parts into one 19-bit number:
+  pressure = ((pressureDataHigh << 16) | pressureDataLow) / 4;
+
+  Serial.print("Temperature: ");
+  Serial.print(temperature);
+  Serial.println(" degrees C");
+  Serial.print("Pressure: " + String(pressure));
+  Serial.println(" Pa");
+}
+
+void listenForEthernetClients() {
+  // listen for incoming clients
+  EthernetClient client = server.available();
+  if (client) {
+    Serial.println("Got a client");
+    // an http request ends with a blank line
+    boolean currentLineIsBlank = true;
+    while (client.connected()) {
+      if (client.available()) {
+        char c = client.read();
+        // if you've gotten to the end of the line (received a newline
+        // character) and the line is blank, the http request has ended,
+        // so you can send a reply
+        if (c == '\n' && currentLineIsBlank) {
+          // send a standard http response header
+          client.println("HTTP/1.1 200 OK");
+          client.println("Content-Type: text/html");
+          client.println();
+          // print the current readings, in HTML format:
+          client.print("Temperature: ");
+          client.print(temperature);
+          client.print(" degrees C");
+          client.println("<br />");
+          client.print("Pressure: " + String(pressure));
+          client.print(" Pa");
+          client.println("<br />");
+          break;
+        }
+        if (c == '\n') {
+          // you're starting a new line
+          currentLineIsBlank = true;
+        }
+        else if (c != '\r') {
+          // you've gotten a character on the current line
+          currentLineIsBlank = false;
+        }
+      }
+    }
+    // give the web browser time to receive the data
+    delay(1);
+    // close the connection:
+    client.stop();
+  }
+}
+
+
+//Send a write command to SCP1000
+void writeRegister(byte registerName, byte registerValue) {
+  // SCP1000 expects the register name in the upper 6 bits
+  // of the byte:
+  registerName <<= 2;
+  // command (read or write) goes in the lower two bits:
+  registerName |= 0b00000010; //Write command
+
+  // take the chip select low to select the device:
+  digitalWrite(chipSelectPin, LOW);
+
+  SPI.transfer(registerName); //Send register location
+  SPI.transfer(registerValue); //Send value to record into register
+
+  // take the chip select high to de-select:
+  digitalWrite(chipSelectPin, HIGH);
+}
+
+
+//Read register from the SCP1000:
+unsigned int readRegister(byte registerName, int numBytes) {
+  byte inByte = 0;           // incoming from  the SPI read
+  unsigned int result = 0;   // result to return
+
+  // SCP1000 expects the register name in the upper 6 bits
+  // of the byte:
+  registerName <<=  2;
+  // command (read or write) goes in the lower two bits:
+  registerName &= 0b11111100; //Read command
+
+  // take the chip select low to select the device:
+  digitalWrite(chipSelectPin, LOW);
+  // send the device the register you want to read:
+  int command = SPI.transfer(registerName);
+  // send a value of 0 to read the first byte returned:
+  inByte = SPI.transfer(0x00);
+
+  result = inByte;
+  // if there's more than one byte returned,
+  // shift the first byte then get the second byte:
+  if (numBytes > 1) {
+    result = inByte << 8;
+    inByte = SPI.transfer(0x00);
+    result = result | inByte;
+  }
+  // take the chip select high to de-select:
+  digitalWrite(chipSelectPin, HIGH);
+  // return the result:
+  return(result);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/ChatServer/ChatServer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/ChatServer/ChatServer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/ChatServer/ChatServer.ino	(revision 136)
@@ -0,0 +1,80 @@
+/*
+ Chat  Server
+
+ A simple server that distributes any incoming messages to all
+ connected clients.  To use telnet to  your device's IP address and type.
+ You can see the client's input in the serial monitor as well.
+ Using an Arduino Wiznet Ethernet shield.
+
+ Circuit:
+ * Ethernet shield attached to pins 10, 11, 12, 13
+ * Analog inputs attached to pins A0 through A5 (optional)
+
+ created 18 Dec 2009
+ by David A. Mellis
+ modified 9 Apr 2012
+ by Tom Igoe
+
+ */
+
+#include <SPI.h>
+#include <Ethernet2.h>
+
+// Enter a MAC address and IP address for your controller below.
+// The IP address will be dependent on your local network.
+// gateway and subnet are optional:
+byte mac[] = {
+  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED
+};
+IPAddress ip(192, 168, 1, 177);
+IPAddress gateway(192, 168, 1, 1);
+IPAddress subnet(255, 255, 0, 0);
+
+
+// telnet defaults to port 23
+EthernetServer server(23);
+boolean alreadyConnected = false; // whether or not the client was connected previously
+
+void setup() {
+  // initialize the ethernet device
+  Ethernet.begin(mac, ip, gateway, subnet);
+  // start listening for clients
+  server.begin();
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  Serial.print("Chat server address:");
+  Serial.println(Ethernet.localIP());
+}
+
+void loop() {
+  // wait for a new client:
+  EthernetClient client = server.available();
+
+  // when the client sends the first byte, say hello:
+  if (client) {
+    if (!alreadyConnected) {
+      // clead out the input buffer:
+      client.flush();
+      Serial.println("We have a new client");
+      client.println("Hello, client!");
+      alreadyConnected = true;
+    }
+
+    if (client.available() > 0) {
+      // read the bytes incoming from the client:
+      char thisChar = client.read();
+      // echo the bytes back to the client:
+      server.write(thisChar);
+      // echo the bytes to the server as well:
+      Serial.write(thisChar);
+    }
+  }
+}
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/DhcpAddressPrinter/DhcpAddressPrinter.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/DhcpAddressPrinter/DhcpAddressPrinter.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/DhcpAddressPrinter/DhcpAddressPrinter.ino	(revision 136)
@@ -0,0 +1,60 @@
+/*
+  DHCP-based IP printer
+
+ This sketch uses the DHCP extensions to the Ethernet library
+ to get an IP address via DHCP and print the address obtained.
+ using an Arduino Wiznet Ethernet shield.
+
+ Circuit:
+ * Ethernet shield attached to pins 10, 11, 12, 13
+
+ created 12 April 2011
+ modified 9 Apr 2012
+ by Tom Igoe
+
+ */
+
+#include <SPI.h>
+#include <Ethernet2.h>
+
+// Enter a MAC address for your controller below.
+// Newer Ethernet shields have a MAC address printed on a sticker on the shield
+byte mac[] = {
+  0x00, 0xAA, 0xBB, 0xCC, 0xDE, 0x02
+};
+
+// Initialize the Ethernet client library
+// with the IP address and port of the server
+// that you want to connect to (port 80 is default for HTTP):
+EthernetClient client;
+
+void setup() {
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  // this check is only needed on the Leonardo:
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  // start the Ethernet connection:
+  if (Ethernet.begin(mac) == 0) {
+    Serial.println("Failed to configure Ethernet using DHCP");
+    // no point in carrying on, so do nothing forevermore:
+    for (;;)
+      ;
+  }
+  // print your local IP address:
+  Serial.print("My IP address: ");
+  for (byte thisByte = 0; thisByte < 4; thisByte++) {
+    // print the value of each byte of the IP address:
+    Serial.print(Ethernet.localIP()[thisByte], DEC);
+    Serial.print(".");
+  }
+  Serial.println();
+}
+
+void loop() {
+
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/DhcpChatServer/DhcpChatServer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/DhcpChatServer/DhcpChatServer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/DhcpChatServer/DhcpChatServer.ino	(revision 136)
@@ -0,0 +1,88 @@
+/*
+ DHCP Chat  Server
+
+ A simple server that distributes any incoming messages to all
+ connected clients.  To use telnet to  your device's IP address and type.
+ You can see the client's input in the serial monitor as well.
+ Using an Arduino Wiznet Ethernet shield.
+
+ THis version attempts to get an IP address using DHCP
+
+ Circuit:
+ * Ethernet shield attached to pins 10, 11, 12, 13
+
+ created 21 May 2011
+ modified 9 Apr 2012
+ by Tom Igoe
+ Based on ChatServer example by David A. Mellis
+
+ */
+
+#include <SPI.h>
+#include <Ethernet2.h>
+
+// Enter a MAC address and IP address for your controller below.
+// The IP address will be dependent on your local network.
+// gateway and subnet are optional:
+byte mac[] = {
+  0x00, 0xAA, 0xBB, 0xCC, 0xDE, 0x02
+};
+IPAddress ip(192, 168, 1, 177);
+IPAddress gateway(192, 168, 1, 1);
+IPAddress subnet(255, 255, 0, 0);
+
+// telnet defaults to port 23
+EthernetServer server(23);
+boolean gotAMessage = false; // whether or not you got a message from the client yet
+
+void setup() {
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  // this check is only needed on the Leonardo:
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  // start the Ethernet connection:
+  Serial.println("Trying to get an IP address using DHCP");
+  if (Ethernet.begin(mac) == 0) {
+    Serial.println("Failed to configure Ethernet using DHCP");
+    // initialize the ethernet device not using DHCP:
+    Ethernet.begin(mac, ip, gateway, subnet);
+  }
+  // print your local IP address:
+  Serial.print("My IP address: ");
+  ip = Ethernet.localIP();
+  for (byte thisByte = 0; thisByte < 4; thisByte++) {
+    // print the value of each byte of the IP address:
+    Serial.print(ip[thisByte], DEC);
+    Serial.print(".");
+  }
+  Serial.println();
+  // start listening for clients
+  server.begin();
+
+}
+
+void loop() {
+  // wait for a new client:
+  EthernetClient client = server.available();
+
+  // when the client sends the first byte, say hello:
+  if (client) {
+    if (!gotAMessage) {
+      Serial.println("We have a new client");
+      client.println("Hello, client!");
+      gotAMessage = true;
+    }
+
+    // read the bytes incoming from the client:
+    char thisChar = client.read();
+    // echo the bytes back to the client:
+    server.write(thisChar);
+    // echo the bytes to the server as well:
+    Serial.print(thisChar);
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/TelnetClient/TelnetClient.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/TelnetClient/TelnetClient.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/TelnetClient/TelnetClient.ino	(revision 136)
@@ -0,0 +1,94 @@
+/*
+  Telnet client
+
+ This sketch connects to a a telnet server (http://www.google.com)
+ using an Arduino Wiznet Ethernet shield.  You'll need a telnet server
+ to test this with.
+ Processing's ChatServer example (part of the network library) works well,
+ running on port 10002. It can be found as part of the examples
+ in the Processing application, available at
+ http://processing.org/
+
+ Circuit:
+ * Ethernet shield attached to pins 10, 11, 12, 13
+
+ created 14 Sep 2010
+ modified 9 Apr 2012
+ by Tom Igoe
+
+ */
+
+#include <SPI.h>
+#include <Ethernet2.h>
+
+// Enter a MAC address and IP address for your controller below.
+// The IP address will be dependent on your local network:
+byte mac[] = {
+  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED
+};
+IPAddress ip(192, 168, 1, 177);
+
+// Enter the IP address of the server you're connecting to:
+IPAddress server(1, 1, 1, 1);
+
+// Initialize the Ethernet client library
+// with the IP address and port of the server
+// that you want to connect to (port 23 is default for telnet;
+// if you're using Processing's ChatServer, use  port 10002):
+EthernetClient client;
+
+void setup() {
+  // start the Ethernet connection:
+  Ethernet.begin(mac, ip);
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  // give the Ethernet shield a second to initialize:
+  delay(1000);
+  Serial.println("connecting...");
+
+  // if you get a connection, report back via serial:
+  if (client.connect(server, 10002)) {
+    Serial.println("connected");
+  }
+  else {
+    // if you didn't get a connection to the server:
+    Serial.println("connection failed");
+  }
+}
+
+void loop()
+{
+  // if there are incoming bytes available
+  // from the server, read them and print them:
+  if (client.available()) {
+    char c = client.read();
+    Serial.print(c);
+  }
+
+  // as long as there are bytes in the serial queue,
+  // read them and send them out the socket if it's open:
+  while (Serial.available() > 0) {
+    char inChar = Serial.read();
+    if (client.connected()) {
+      client.print(inChar);
+    }
+  }
+
+  // if the server's disconnected, stop the client:
+  if (!client.connected()) {
+    Serial.println();
+    Serial.println("disconnecting.");
+    client.stop();
+    // do nothing:
+    while (true);
+  }
+}
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/UDPSendReceiveString/UDPSendReceiveString.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/UDPSendReceiveString/UDPSendReceiveString.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/UDPSendReceiveString/UDPSendReceiveString.ino	(revision 136)
@@ -0,0 +1,119 @@
+/*
+  UDPSendReceive.pde:
+ This sketch receives UDP message strings, prints them to the serial port
+ and sends an "acknowledge" string back to the sender
+
+ A Processing sketch is included at the end of file that can be used to send
+ and received messages for testing with a computer.
+
+ created 21 Aug 2010
+ by Michael Margolis
+
+ This code is in the public domain.
+ */
+
+
+#include <SPI.h>         // needed for Arduino versions later than 0018
+#include <Ethernet2.h>
+#include <EthernetUdp2.h>         // UDP library from: bjoern@cs.stanford.edu 12/30/2008
+
+
+// Enter a MAC address and IP address for your controller below.
+// The IP address will be dependent on your local network:
+byte mac[] = {
+  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED
+};
+IPAddress ip(192, 168, 1, 177);
+
+unsigned int localPort = 8888;      // local port to listen on
+
+// buffers for receiving and sending data
+char packetBuffer[UDP_TX_PACKET_MAX_SIZE]; //buffer to hold incoming packet,
+char  ReplyBuffer[] = "acknowledged";       // a string to send back
+
+// An EthernetUDP instance to let us send and receive packets over UDP
+EthernetUDP Udp;
+
+void setup() {
+  // start the Ethernet and UDP:
+  Ethernet.begin(mac, ip);
+  Udp.begin(localPort);
+
+  Serial.begin(9600);
+}
+
+void loop() {
+  // if there's data available, read a packet
+  int packetSize = Udp.parsePacket();
+  if (packetSize)
+  {
+    Serial.print("Received packet of size ");
+    Serial.println(packetSize);
+    Serial.print("From ");
+    IPAddress remote = Udp.remoteIP();
+    for (int i = 0; i < 4; i++)
+    {
+      Serial.print(remote[i], DEC);
+      if (i < 3)
+      {
+        Serial.print(".");
+      }
+    }
+    Serial.print(", port ");
+    Serial.println(Udp.remotePort());
+
+    // read the packet into packetBufffer
+    Udp.read(packetBuffer, UDP_TX_PACKET_MAX_SIZE);
+    Serial.println("Contents:");
+    Serial.println(packetBuffer);
+
+    // send a reply, to the IP address and port that sent us the packet we received
+    Udp.beginPacket(Udp.remoteIP(), Udp.remotePort());
+    Udp.write(ReplyBuffer);
+    Udp.endPacket();
+  }
+  delay(10);
+}
+
+
+/*
+  Processing sketch to run with this example
+ =====================================================
+
+ // Processing UDP example to send and receive string data from Arduino
+ // press any key to send the "Hello Arduino" message
+
+
+ import hypermedia.net.*;
+
+ UDP udp;  // define the UDP object
+
+
+ void setup() {
+ udp = new UDP( this, 6000 );  // create a new datagram connection on port 6000
+ //udp.log( true ); 		// <-- printout the connection activity
+ udp.listen( true );           // and wait for incoming message
+ }
+
+ void draw()
+ {
+ }
+
+ void keyPressed() {
+ String ip       = "192.168.1.177";	// the remote IP address
+ int port        = 8888;		// the destination port
+
+ udp.send("Hello World", ip, port );   // the message to send
+
+ }
+
+ void receive( byte[] data ) { 			// <-- default handler
+ //void receive( byte[] data, String ip, int port ) {	// <-- extended handler
+
+ for(int i=0; i < data.length; i++)
+ print(char(data[i]));
+ println();
+ }
+ */
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/UdpNtpClient/UdpNtpClient.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/UdpNtpClient/UdpNtpClient.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/UdpNtpClient/UdpNtpClient.ino	(revision 136)
@@ -0,0 +1,142 @@
+/*
+
+ Udp NTP Client
+
+ Get the time from a Network Time Protocol (NTP) time server
+ Demonstrates use of UDP sendPacket and ReceivePacket
+ For more on NTP time servers and the messages needed to communicate with them,
+ see http://en.wikipedia.org/wiki/Network_Time_Protocol
+
+ created 4 Sep 2010
+ by Michael Margolis
+ modified 9 Apr 2012
+ by Tom Igoe
+
+ This code is in the public domain.
+
+ */
+
+#include <SPI.h>
+#include <Ethernet2.h>
+#include <EthernetUdp2.h>
+
+// Enter a MAC address for your controller below.
+// Newer Ethernet shields have a MAC address printed on a sticker on the shield
+byte mac[] = {
+  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED
+};
+
+unsigned int localPort = 8888;       // local port to listen for UDP packets
+
+char timeServer[] = "time.nist.gov"; // time.nist.gov NTP server
+
+const int NTP_PACKET_SIZE = 48; // NTP time stamp is in the first 48 bytes of the message
+
+byte packetBuffer[ NTP_PACKET_SIZE]; //buffer to hold incoming and outgoing packets
+
+// A UDP instance to let us send and receive packets over UDP
+EthernetUDP Udp;
+
+void setup()
+{
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  // start Ethernet and UDP
+  if (Ethernet.begin(mac) == 0) {
+    Serial.println("Failed to configure Ethernet using DHCP");
+    // no point in carrying on, so do nothing forevermore:
+    for (;;)
+      ;
+  }
+  Udp.begin(localPort);
+}
+
+void loop()
+{
+  sendNTPpacket(timeServer); // send an NTP packet to a time server
+
+  // wait to see if a reply is available
+  delay(1000);
+  if ( Udp.parsePacket() ) {
+    // We've received a packet, read the data from it
+    Udp.read(packetBuffer, NTP_PACKET_SIZE); // read the packet into the buffer
+
+    //the timestamp starts at byte 40 of the received packet and is four bytes,
+    // or two words, long. First, esxtract the two words:
+
+    unsigned long highWord = word(packetBuffer[40], packetBuffer[41]);
+    unsigned long lowWord = word(packetBuffer[42], packetBuffer[43]);
+    // combine the four bytes (two words) into a long integer
+    // this is NTP time (seconds since Jan 1 1900):
+    unsigned long secsSince1900 = highWord << 16 | lowWord;
+    Serial.print("Seconds since Jan 1 1900 = " );
+    Serial.println(secsSince1900);
+
+    // now convert NTP time into everyday time:
+    Serial.print("Unix time = ");
+    // Unix time starts on Jan 1 1970. In seconds, that's 2208988800:
+    const unsigned long seventyYears = 2208988800UL;
+    // subtract seventy years:
+    unsigned long epoch = secsSince1900 - seventyYears;
+    // print Unix time:
+    Serial.println(epoch);
+
+
+    // print the hour, minute and second:
+    Serial.print("The UTC time is ");       // UTC is the time at Greenwich Meridian (GMT)
+    Serial.print((epoch  % 86400L) / 3600); // print the hour (86400 equals secs per day)
+    Serial.print(':');
+    if ( ((epoch % 3600) / 60) < 10 ) {
+      // In the first 10 minutes of each hour, we'll want a leading '0'
+      Serial.print('0');
+    }
+    Serial.print((epoch  % 3600) / 60); // print the minute (3600 equals secs per minute)
+    Serial.print(':');
+    if ( (epoch % 60) < 10 ) {
+      // In the first 10 seconds of each minute, we'll want a leading '0'
+      Serial.print('0');
+    }
+    Serial.println(epoch % 60); // print the second
+  }
+  // wait ten seconds before asking for the time again
+  delay(10000);
+}
+
+// send an NTP request to the time server at the given address
+unsigned long sendNTPpacket(char* address)
+{
+  // set all bytes in the buffer to 0
+  memset(packetBuffer, 0, NTP_PACKET_SIZE);
+  // Initialize values needed to form NTP request
+  // (see URL above for details on the packets)
+  packetBuffer[0] = 0b11100011;   // LI, Version, Mode
+  packetBuffer[1] = 0;     // Stratum, or type of clock
+  packetBuffer[2] = 6;     // Polling Interval
+  packetBuffer[3] = 0xEC;  // Peer Clock Precision
+  // 8 bytes of zero for Root Delay & Root Dispersion
+  packetBuffer[12]  = 49;
+  packetBuffer[13]  = 0x4E;
+  packetBuffer[14]  = 49;
+  packetBuffer[15]  = 52;
+
+  // all NTP fields have been given values, now
+  // you can send a packet requesting a timestamp:
+  Udp.beginPacket(address, 123); //NTP requests are to port 123
+  Udp.write(packetBuffer, NTP_PACKET_SIZE);
+  Udp.endPacket();
+}
+
+
+
+
+
+
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/WebClient/WebClient.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/WebClient/WebClient.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/WebClient/WebClient.ino	(revision 136)
@@ -0,0 +1,88 @@
+/*
+  Web client
+
+ This sketch connects to a website (http://www.google.com)
+ using an Arduino Wiznet Ethernet shield.
+
+ Circuit:
+ * Ethernet shield attached to pins 10, 11, 12, 13
+
+ created 18 Dec 2009
+ by David A. Mellis
+ modified 9 Apr 2012
+ by Tom Igoe, based on work by Adrian McEwen
+
+ */
+
+#include <SPI.h>
+#include <Ethernet2.h>
+
+// Enter a MAC address for your controller below.
+// Newer Ethernet shields have a MAC address printed on a sticker on the shield
+byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
+// if you don't want to use DNS (and reduce your sketch size)
+// use the numeric IP instead of the name for the server:
+//IPAddress server(74,125,232,128);  // numeric IP for Google (no DNS)
+char server[] = "www.google.com";    // name address for Google (using DNS)
+
+// Set the static IP address to use if the DHCP fails to assign
+IPAddress ip(192, 168, 0, 177);
+
+// Initialize the Ethernet client library
+// with the IP address and port of the server
+// that you want to connect to (port 80 is default for HTTP):
+EthernetClient client;
+
+void setup() {
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  // start the Ethernet connection:
+  if (Ethernet.begin(mac) == 0) {
+    Serial.println("Failed to configure Ethernet using DHCP");
+    // no point in carrying on, so do nothing forevermore:
+    // try to congifure using IP address instead of DHCP:
+    Ethernet.begin(mac, ip);
+  }
+  // give the Ethernet shield a second to initialize:
+  delay(1000);
+  Serial.println("connecting...");
+
+  // if you get a connection, report back via serial:
+  if (client.connect(server, 80)) {
+    Serial.println("connected");
+    // Make a HTTP request:
+    client.println("GET /search?q=arduino HTTP/1.1");
+    client.println("Host: www.google.com");
+    client.println("Connection: close");
+    client.println();
+  }
+  else {
+    // kf you didn't get a connection to the server:
+    Serial.println("connection failed");
+  }
+}
+
+void loop()
+{
+  // if there are incoming bytes available
+  // from the server, read them and print them:
+  if (client.available()) {
+    char c = client.read();
+    Serial.print(c);
+  }
+
+  // if the server's disconnected, stop the client:
+  if (!client.connected()) {
+    Serial.println();
+    Serial.println("disconnecting.");
+    client.stop();
+
+    // do nothing forevermore:
+    while (true);
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/WebClientRepeating/WebClientRepeating.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/WebClientRepeating/WebClientRepeating.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/WebClientRepeating/WebClientRepeating.ino	(revision 136)
@@ -0,0 +1,108 @@
+/*
+  Repeating Web client
+
+ This sketch connects to a a web server and makes a request
+ using a Wiznet Ethernet shield. You can use the Arduino Ethernet shield, or
+ the Adafruit Ethernet shield, either one will work, as long as it's got
+ a Wiznet Ethernet module on board.
+
+ This example uses DNS, by assigning the Ethernet client with a MAC address,
+ IP address, and DNS address.
+
+ Circuit:
+ * Ethernet shield attached to pins 10, 11, 12, 13
+
+ created 19 Apr 2012
+ by Tom Igoe
+ modified 21 Jan 2014
+ by Federico Vanzati
+
+ http://arduino.cc/en/Tutorial/WebClientRepeating
+ This code is in the public domain.
+
+ */
+
+#include <SPI.h>
+#include <Ethernet2.h>
+
+// assign a MAC address for the ethernet controller.
+// fill in your address here:
+byte mac[] = {
+  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED
+};
+// fill in an available IP address on your network here,
+// for manual configuration:
+IPAddress ip(192, 168, 1, 177);
+
+// fill in your Domain Name Server address here:
+IPAddress myDns(1, 1, 1, 1);
+
+// initialize the library instance:
+EthernetClient client;
+
+char server[] = "www.arduino.cc";
+//IPAddress server(64,131,82,241);
+
+unsigned long lastConnectionTime = 0;             // last time you connected to the server, in milliseconds
+const unsigned long postingInterval = 10L * 1000L; // delay between updates, in milliseconds
+// the "L" is needed to use long type numbers
+
+void setup() {
+  // start serial port:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  // give the ethernet module time to boot up:
+  delay(1000);
+  // start the Ethernet connection using a fixed IP address and DNS server:
+  Ethernet.begin(mac, ip, myDns);
+  // print the Ethernet board/shield's IP address:
+  Serial.print("My IP address: ");
+  Serial.println(Ethernet.localIP());
+}
+
+void loop() {
+  // if there's incoming data from the net connection.
+  // send it out the serial port.  This is for debugging
+  // purposes only:
+  if (client.available()) {
+    char c = client.read();
+    Serial.write(c);
+  }
+
+  // if ten seconds have passed since your last connection,
+  // then connect again and send data:
+  if (millis() - lastConnectionTime > postingInterval) {
+    httpRequest();
+  }
+
+}
+
+// this method makes a HTTP connection to the server:
+void httpRequest() {
+  // close any connection before send a new request.
+  // This will free the socket on the WiFi shield
+  client.stop();
+
+  // if there's a successful connection:
+  if (client.connect(server, 80)) {
+    Serial.println("connecting...");
+    // send the HTTP PUT request:
+    client.println("GET /latest.txt HTTP/1.1");
+    client.println("Host: www.arduino.cc");
+    client.println("User-Agent: arduino-ethernet");
+    client.println("Connection: close");
+    client.println();
+
+    // note the time that the connection was made:
+    lastConnectionTime = millis();
+  }
+  else {
+    // if you couldn't make a connection:
+    Serial.println("connection failed");
+  }
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/WebServer/WebServer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/WebServer/WebServer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/examples/WebServer/WebServer.ino	(revision 136)
@@ -0,0 +1,101 @@
+/*
+  Web Server
+
+ A simple web server that shows the value of the analog input pins.
+ using an Arduino Wiznet Ethernet shield.
+
+ Circuit:
+ * Ethernet shield attached to pins 10, 11, 12, 13
+ * Analog inputs attached to pins A0 through A5 (optional)
+
+ created 18 Dec 2009
+ by David A. Mellis
+ modified 9 Apr 2012
+ by Tom Igoe
+
+ */
+
+#include <SPI.h>
+#include <Ethernet2.h>
+
+// Enter a MAC address and IP address for your controller below.
+// The IP address will be dependent on your local network:
+byte mac[] = {
+  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED
+};
+IPAddress ip(192, 168, 1, 177);
+
+// Initialize the Ethernet server library
+// with the IP address and port you want to use
+// (port 80 is default for HTTP):
+EthernetServer server(80);
+
+void setup() {
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  // start the Ethernet connection and the server:
+  Ethernet.begin(mac, ip);
+  server.begin();
+  Serial.print("server is at ");
+  Serial.println(Ethernet.localIP());
+}
+
+
+void loop() {
+  // listen for incoming clients
+  EthernetClient client = server.available();
+  if (client) {
+    Serial.println("new client");
+    // an http request ends with a blank line
+    boolean currentLineIsBlank = true;
+    while (client.connected()) {
+      if (client.available()) {
+        char c = client.read();
+        Serial.write(c);
+        // if you've gotten to the end of the line (received a newline
+        // character) and the line is blank, the http request has ended,
+        // so you can send a reply
+        if (c == '\n' && currentLineIsBlank) {
+          // send a standard http response header
+          client.println("HTTP/1.1 200 OK");
+          client.println("Content-Type: text/html");
+          client.println("Connection: close");  // the connection will be closed after completion of the response
+          client.println("Refresh: 5");  // refresh the page automatically every 5 sec
+          client.println();
+          client.println("<!DOCTYPE HTML>");
+          client.println("<html>");
+          // output the value of each analog input pin
+          for (int analogChannel = 0; analogChannel < 6; analogChannel++) {
+            int sensorReading = analogRead(analogChannel);
+            client.print("analog input ");
+            client.print(analogChannel);
+            client.print(" is ");
+            client.print(sensorReading);
+            client.println("<br />");
+          }
+          client.println("</html>");
+          break;
+        }
+        if (c == '\n') {
+          // you're starting a new line
+          currentLineIsBlank = true;
+        }
+        else if (c != '\r') {
+          // you've gotten a character on the current line
+          currentLineIsBlank = false;
+        }
+      }
+    }
+    // give the web browser time to receive the data
+    delay(1);
+    // close the connection:
+    client.stop();
+    Serial.println("client disconnected");
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/keywords.txt	(revision 136)
@@ -0,0 +1,38 @@
+#######################################
+# Syntax Coloring Map For Ethernet
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+Ethernet2	KEYWORD1
+EthernetClient	KEYWORD1
+EthernetServer	KEYWORD1
+IPAddress	KEYWORD1
+EthernetUdp2	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+status	KEYWORD2
+connect	KEYWORD2
+write	KEYWORD2
+available	KEYWORD2
+read	KEYWORD2
+peek	KEYWORD2
+flush	KEYWORD2
+stop	KEYWORD2
+connected	KEYWORD2
+begin	KEYWORD2
+beginPacket	KEYWORD2
+endPacket	KEYWORD2
+parsePacket	KEYWORD2
+remoteIP	KEYWORD2
+remotePort	KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/library.properties	(revision 136)
@@ -0,0 +1,8 @@
+name=Ethernet2
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Enables network connection (local and Internet) using the Arduino Ethernet board or shield. For all Arduino boards.
+paragraph=With this library you can use the Arduino Ethernet (shield or board) to connect to Internet. The library provides both Client and server functionalities. The library permits you to connect to a local network also with DHCP and to resolve DNS.
+url=http://arduino.cc/en/Reference/Ethernet
+architectures=*
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dhcp.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dhcp.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dhcp.cpp	(revision 136)
@@ -0,0 +1,497 @@
+// DHCP Library v0.3 - April 25, 2009
+// Author: Jordan Terrell - blog.jordanterrell.com
+
+#include "utility/w5500.h"
+
+#include <string.h>
+#include <stdlib.h>
+#include "Dhcp.h"
+#include "Arduino.h"
+#include "utility/util.h"
+
+int DhcpClass::beginWithDHCP(uint8_t *mac, unsigned long timeout, unsigned long responseTimeout)
+{
+    _dhcpLeaseTime=0;
+    _dhcpT1=0;
+    _dhcpT2=0;
+    _lastCheck=0;
+    _timeout = timeout;
+    _responseTimeout = responseTimeout;
+
+    // zero out _dhcpMacAddr
+    memset(_dhcpMacAddr, 0, 6); 
+    reset_DHCP_lease();
+
+    memcpy((void*)_dhcpMacAddr, (void*)mac, 6);
+    _dhcp_state = STATE_DHCP_START;
+    return request_DHCP_lease();
+}
+
+void DhcpClass::reset_DHCP_lease(){
+    // zero out _dhcpSubnetMask, _dhcpGatewayIp, _dhcpLocalIp, _dhcpDhcpServerIp, _dhcpDnsServerIp
+    memset(_dhcpLocalIp, 0, 20);
+}
+
+//return:0 on error, 1 if request is sent and response is received
+int DhcpClass::request_DHCP_lease(){
+    
+    uint8_t messageType = 0;
+  
+    
+  
+    // Pick an initial transaction ID
+    _dhcpTransactionId = random(1UL, 2000UL);
+    _dhcpInitialTransactionId = _dhcpTransactionId;
+
+    _dhcpUdpSocket.stop();
+    if (_dhcpUdpSocket.begin(DHCP_CLIENT_PORT) == 0)
+    {
+      // Couldn't get a socket
+      return 0;
+    }
+    
+    presend_DHCP();
+    
+    int result = 0;
+    
+    unsigned long startTime = millis();
+    
+    while(_dhcp_state != STATE_DHCP_LEASED)
+    {
+        if(_dhcp_state == STATE_DHCP_START)
+        {
+            //Serial.println("DHCP_START");
+			_dhcpTransactionId++;
+            
+            send_DHCP_MESSAGE(DHCP_DISCOVER, ((millis() - startTime) / 1000));
+            _dhcp_state = STATE_DHCP_DISCOVER;
+        }
+        else if(_dhcp_state == STATE_DHCP_REREQUEST){
+            _dhcpTransactionId++;
+            send_DHCP_MESSAGE(DHCP_REQUEST, ((millis() - startTime)/1000));
+            _dhcp_state = STATE_DHCP_REQUEST;
+        }
+        else if(_dhcp_state == STATE_DHCP_DISCOVER)
+        {
+            uint32_t respId;
+			
+            messageType = parseDHCPResponse(_responseTimeout, respId);
+            if(messageType == DHCP_OFFER)
+            {
+                
+				// We'll use the transaction ID that the offer came with,
+                // rather than the one we were up to
+                _dhcpTransactionId = respId;
+                send_DHCP_MESSAGE(DHCP_REQUEST, ((millis() - startTime) / 1000));
+                _dhcp_state = STATE_DHCP_REQUEST;
+            }
+        }
+        else if(_dhcp_state == STATE_DHCP_REQUEST)
+        {
+            uint32_t respId;
+            messageType = parseDHCPResponse(_responseTimeout, respId);
+            if(messageType == DHCP_ACK)
+            {
+                _dhcp_state = STATE_DHCP_LEASED;
+                result = 1;
+                //use default lease time if we didn't get it
+                if(_dhcpLeaseTime == 0){
+                    _dhcpLeaseTime = DEFAULT_LEASE;
+                }
+                //calculate T1 & T2 if we didn't get it
+                if(_dhcpT1 == 0){
+                    //T1 should be 50% of _dhcpLeaseTime
+                    _dhcpT1 = _dhcpLeaseTime >> 1;
+                }
+                if(_dhcpT2 == 0){
+                    //T2 should be 87.5% (7/8ths) of _dhcpLeaseTime
+                    _dhcpT2 = _dhcpT1 << 1;
+                }
+                _renewInSec = _dhcpT1;
+                _rebindInSec = _dhcpT2;
+            }
+            else if(messageType == DHCP_NAK)
+                _dhcp_state = STATE_DHCP_START;
+        }
+        
+        if(messageType == 255)
+        {
+            messageType = 0;
+            _dhcp_state = STATE_DHCP_START;
+        }
+        
+        if(result != 1 && ((millis() - startTime) > _timeout))
+            break;
+    }
+    
+    // We're done with the socket now
+    _dhcpUdpSocket.stop();
+    _dhcpTransactionId++;
+
+    return result;
+}
+
+void DhcpClass::presend_DHCP()
+{
+}
+
+void DhcpClass::send_DHCP_MESSAGE(uint8_t messageType, uint16_t secondsElapsed)
+{
+    uint8_t buffer[32];
+    memset(buffer, 0, 32);
+    IPAddress dest_addr( 255, 255, 255, 255 ); // Broadcast address
+
+    if (-1 == _dhcpUdpSocket.beginPacket(dest_addr, DHCP_SERVER_PORT))
+    {
+        // FIXME Need to return errors
+        return;
+    }
+
+    buffer[0] = DHCP_BOOTREQUEST;   // op
+    buffer[1] = DHCP_HTYPE10MB;     // htype
+    buffer[2] = DHCP_HLENETHERNET;  // hlen
+    buffer[3] = DHCP_HOPS;          // hops
+
+    // xid
+    unsigned long xid = htonl(_dhcpTransactionId);
+    memcpy(buffer + 4, &(xid), 4);
+
+    // 8, 9 - seconds elapsed
+    buffer[8] = ((secondsElapsed & 0xff00) >> 8);
+    buffer[9] = (secondsElapsed & 0x00ff);
+
+    // flags
+    unsigned short flags = htons(DHCP_FLAGSBROADCAST);
+    memcpy(buffer + 10, &(flags), 2);
+
+    // ciaddr: already zeroed
+    // yiaddr: already zeroed
+    // siaddr: already zeroed
+    // giaddr: already zeroed
+
+    //put data in w5500 transmit buffer
+    _dhcpUdpSocket.write(buffer, 28);
+
+    memset(buffer, 0, 32); // clear local buffer
+
+    memcpy(buffer, _dhcpMacAddr, 6); // chaddr
+
+    //put data in w5500 transmit buffer
+    _dhcpUdpSocket.write(buffer, 16);
+
+    memset(buffer, 0, 32); // clear local buffer
+
+    // leave zeroed out for sname && file
+    // put in w5500 transmit buffer x 6 (192 bytes)
+  
+    for(int i = 0; i < 6; i++) {
+        _dhcpUdpSocket.write(buffer, 32);
+    }
+  
+    // OPT - Magic Cookie
+    buffer[0] = (uint8_t)((MAGIC_COOKIE >> 24)& 0xFF);
+    buffer[1] = (uint8_t)((MAGIC_COOKIE >> 16)& 0xFF);
+    buffer[2] = (uint8_t)((MAGIC_COOKIE >> 8)& 0xFF);
+    buffer[3] = (uint8_t)(MAGIC_COOKIE& 0xFF);
+
+    // OPT - message type
+    buffer[4] = dhcpMessageType;
+    buffer[5] = 0x01;
+    buffer[6] = messageType; //DHCP_REQUEST;
+
+    // OPT - client identifier
+    buffer[7] = dhcpClientIdentifier;
+    buffer[8] = 0x07;
+    buffer[9] = 0x01;
+    memcpy(buffer + 10, _dhcpMacAddr, 6);
+
+    // OPT - host name
+    buffer[16] = hostName;
+    buffer[17] = strlen(HOST_NAME) + 6; // length of hostname + last 3 bytes of mac address
+    strcpy((char*)&(buffer[18]), HOST_NAME);
+
+    printByte((char*)&(buffer[24]), _dhcpMacAddr[3]);
+    printByte((char*)&(buffer[26]), _dhcpMacAddr[4]);
+    printByte((char*)&(buffer[28]), _dhcpMacAddr[5]);
+
+    //put data in w5500 transmit buffer
+    _dhcpUdpSocket.write(buffer, 30);
+
+    if(messageType == DHCP_REQUEST)
+    {
+        buffer[0] = dhcpRequestedIPaddr;
+        buffer[1] = 0x04;
+        buffer[2] = _dhcpLocalIp[0];
+        buffer[3] = _dhcpLocalIp[1];
+        buffer[4] = _dhcpLocalIp[2];
+        buffer[5] = _dhcpLocalIp[3];
+
+        buffer[6] = dhcpServerIdentifier;
+        buffer[7] = 0x04;
+        buffer[8] = _dhcpDhcpServerIp[0];
+        buffer[9] = _dhcpDhcpServerIp[1];
+        buffer[10] = _dhcpDhcpServerIp[2];
+        buffer[11] = _dhcpDhcpServerIp[3];
+
+        //put data in w5500 transmit buffer
+        _dhcpUdpSocket.write(buffer, 12);
+    }
+    
+    buffer[0] = dhcpParamRequest;
+    buffer[1] = 0x06;
+    buffer[2] = subnetMask;
+    buffer[3] = routersOnSubnet;
+    buffer[4] = dns;
+    buffer[5] = domainName;
+    buffer[6] = dhcpT1value;
+    buffer[7] = dhcpT2value;
+    buffer[8] = endOption;
+    
+    //put data in w5500 transmit buffer
+    _dhcpUdpSocket.write(buffer, 9);
+
+    _dhcpUdpSocket.endPacket();
+}
+
+uint8_t DhcpClass::parseDHCPResponse(unsigned long responseTimeout, uint32_t& transactionId)
+{
+    uint8_t type = 0;
+    uint8_t opt_len = 0;
+	
+    unsigned long startTime = millis();
+    
+	
+	
+    while(_dhcpUdpSocket.parsePacket() <= 0)
+    {
+        if((millis() - startTime) > responseTimeout)
+        {
+            
+			return 255;
+        }
+        delay(50);
+    }
+	
+    // start reading in the packet
+    RIP_MSG_FIXED fixedMsg;
+    _dhcpUdpSocket.read((uint8_t*)&fixedMsg, sizeof(RIP_MSG_FIXED));
+  
+    if(fixedMsg.op == DHCP_BOOTREPLY && _dhcpUdpSocket.remotePort() == DHCP_SERVER_PORT)
+    {
+        transactionId = ntohl(fixedMsg.xid);
+        if(memcmp(fixedMsg.chaddr, _dhcpMacAddr, 6) != 0 || (transactionId < _dhcpInitialTransactionId) || (transactionId > _dhcpTransactionId))
+        {
+            // Need to read the rest of the packet here regardless
+            _dhcpUdpSocket.flush();
+            return 0;
+        }
+
+        memcpy(_dhcpLocalIp, fixedMsg.yiaddr, 4);
+
+        // Skip to the option part
+        // Doing this a byte at a time so we don't have to put a big buffer
+        // on the stack (as we don't have lots of memory lying around)
+        for (int i =0; i < (240 - (int)sizeof(RIP_MSG_FIXED)); i++)
+        {
+            _dhcpUdpSocket.read(); // we don't care about the returned byte
+        }
+
+        while (_dhcpUdpSocket.available() > 0) 
+        {
+            switch (_dhcpUdpSocket.read()) 
+            {
+                case endOption :
+                    
+					break;
+                    
+                case padOption :
+					 
+                    break;
+                
+                case dhcpMessageType :
+					 
+                    opt_len = _dhcpUdpSocket.read();
+                    type = _dhcpUdpSocket.read();
+                    break;
+                
+                case subnetMask :
+                    
+					opt_len = _dhcpUdpSocket.read();
+                    _dhcpUdpSocket.read(_dhcpSubnetMask, 4);
+                    break;
+                
+                case routersOnSubnet :
+                    
+					opt_len = _dhcpUdpSocket.read();
+                    _dhcpUdpSocket.read(_dhcpGatewayIp, 4);
+                    for (int i = 0; i < opt_len-4; i++)
+                    {
+                        _dhcpUdpSocket.read();
+                    }
+                    break;
+                
+                case dns :
+                    
+					opt_len = _dhcpUdpSocket.read();
+                    _dhcpUdpSocket.read(_dhcpDnsServerIp, 4);
+                    for (int i = 0; i < opt_len-4; i++)
+                    {
+                        _dhcpUdpSocket.read();
+                    }
+                    break;
+                
+                case dhcpServerIdentifier :
+                    
+					opt_len = _dhcpUdpSocket.read();
+                    if(((_dhcpDhcpServerIp[0] == 0) && (_dhcpDhcpServerIp[1] == 0) && (_dhcpDhcpServerIp[2] == 0) && (_dhcpDhcpServerIp[3] == 0))  || (IPAddress(_dhcpDhcpServerIp) == _dhcpUdpSocket.remoteIP())) 
+                    {
+                        _dhcpUdpSocket.read(_dhcpDhcpServerIp, sizeof(_dhcpDhcpServerIp));
+                    }
+                    else
+                    {
+                        // Skip over the rest of this option
+                        while (opt_len--)
+                        {
+                            _dhcpUdpSocket.read();
+                        }
+                    }
+                    break;
+
+                case dhcpT1value : 
+                    
+					opt_len = _dhcpUdpSocket.read();
+                    _dhcpUdpSocket.read((uint8_t*)&_dhcpT1, sizeof(_dhcpT1));
+                    _dhcpT1 = ntohl(_dhcpT1);
+                    break;
+
+                case dhcpT2value : 
+                    
+					opt_len = _dhcpUdpSocket.read();
+                    _dhcpUdpSocket.read((uint8_t*)&_dhcpT2, sizeof(_dhcpT2));
+                    _dhcpT2 = ntohl(_dhcpT2);
+                    break;
+
+                case dhcpIPaddrLeaseTime :
+                    
+					opt_len = _dhcpUdpSocket.read();
+                    _dhcpUdpSocket.read((uint8_t*)&_dhcpLeaseTime, sizeof(_dhcpLeaseTime));
+                    _dhcpLeaseTime = ntohl(_dhcpLeaseTime);
+                    _renewInSec = _dhcpLeaseTime;
+                    break;
+
+                default :
+                    
+					opt_len = _dhcpUdpSocket.read();
+                    // Skip over the rest of this option
+                    while (opt_len--)
+                    {
+                        _dhcpUdpSocket.read();
+                    }
+                    break;
+            }
+        }
+    }
+
+    // Need to skip to end of the packet regardless here
+    _dhcpUdpSocket.flush();
+
+    return type;
+}
+
+
+/*
+    returns:
+    0/DHCP_CHECK_NONE: nothing happened
+    1/DHCP_CHECK_RENEW_FAIL: renew failed
+    2/DHCP_CHECK_RENEW_OK: renew success
+    3/DHCP_CHECK_REBIND_FAIL: rebind fail
+    4/DHCP_CHECK_REBIND_OK: rebind success
+*/
+int DhcpClass::checkLease(){
+    //this uses a signed / unsigned trick to deal with millis overflow
+    unsigned long now = millis();
+    signed long snow = (long)now;
+    int rc=DHCP_CHECK_NONE;
+    if (_lastCheck != 0){
+        signed long factor;
+        //calc how many ms past the timeout we are
+        factor = snow - (long)_secTimeout;
+        //if on or passed the timeout, reduce the counters
+        if ( factor >= 0 ){
+            //next timeout should be now plus 1000 ms minus parts of second in factor
+            _secTimeout = snow + 1000 - factor % 1000;
+            //how many seconds late are we, minimum 1
+            factor = factor / 1000 +1;
+            
+            //reduce the counters by that mouch
+            //if we can assume that the cycle time (factor) is fairly constant
+            //and if the remainder is less than cycle time * 2 
+            //do it early instead of late
+            if(_renewInSec < factor*2 )
+                _renewInSec = 0;
+            else
+                _renewInSec -= factor;
+            
+            if(_rebindInSec < factor*2 )
+                _rebindInSec = 0;
+            else
+                _rebindInSec -= factor;
+        }
+
+        //if we have a lease but should renew, do it
+        if (_dhcp_state == STATE_DHCP_LEASED && _renewInSec <=0){
+            _dhcp_state = STATE_DHCP_REREQUEST;
+            rc = 1 + request_DHCP_lease();
+        }
+
+        //if we have a lease or is renewing but should bind, do it
+        if( (_dhcp_state == STATE_DHCP_LEASED || _dhcp_state == STATE_DHCP_START) && _rebindInSec <=0){
+            //this should basically restart completely
+            _dhcp_state = STATE_DHCP_START;
+            reset_DHCP_lease();
+            rc = 3 + request_DHCP_lease();
+        }
+    }
+    else{
+        _secTimeout = snow + 1000;
+    }
+
+    _lastCheck = now;
+    return rc;
+}
+
+IPAddress DhcpClass::getLocalIp()
+{
+    return IPAddress(_dhcpLocalIp);
+}
+
+IPAddress DhcpClass::getSubnetMask()
+{
+    return IPAddress(_dhcpSubnetMask);
+}
+
+IPAddress DhcpClass::getGatewayIp()
+{
+    return IPAddress(_dhcpGatewayIp);
+}
+
+IPAddress DhcpClass::getDhcpServerIp()
+{
+    return IPAddress(_dhcpDhcpServerIp);
+}
+
+IPAddress DhcpClass::getDnsServerIp()
+{
+    return IPAddress(_dhcpDnsServerIp);
+}
+
+void DhcpClass::printByte(char * buf, uint8_t n ) {
+  char *str = &buf[1];
+  buf[0]='0';
+  do {
+    unsigned long m = n;
+    n /= 16;
+    char c = m - 16 * n;
+    *str-- = c < 10 ? c + '0' : c + 'A' - 10;
+  } while(n);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dhcp.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dhcp.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dhcp.h	(revision 136)
@@ -0,0 +1,178 @@
+// DHCP Library v0.3 - April 25, 2009
+// Author: Jordan Terrell - blog.jordanterrell.com
+
+#ifndef Dhcp_h
+#define Dhcp_h
+
+#include "EthernetUdp2.h"
+
+/* DHCP state machine. */
+#define STATE_DHCP_START 0
+#define	STATE_DHCP_DISCOVER	1
+#define	STATE_DHCP_REQUEST	2
+#define	STATE_DHCP_LEASED	3
+#define	STATE_DHCP_REREQUEST	4
+#define	STATE_DHCP_RELEASE	5
+
+#define DHCP_FLAGSBROADCAST	0x8000
+
+/* UDP port numbers for DHCP */
+#define	DHCP_SERVER_PORT	67	/* from server to client */
+#define DHCP_CLIENT_PORT	68	/* from client to server */
+
+/* DHCP message OP code */
+#define DHCP_BOOTREQUEST	1
+#define DHCP_BOOTREPLY		2
+
+/* DHCP message type */
+#define	DHCP_DISCOVER		1
+#define DHCP_OFFER		  2
+#define	DHCP_REQUEST		3
+#define	DHCP_DECLINE		4
+#define	DHCP_ACK		    5
+#define DHCP_NAK		    6
+#define	DHCP_RELEASE		7
+#define DHCP_INFORM		  8
+
+#define DHCP_HTYPE10MB		1
+#define DHCP_HTYPE100MB		2
+
+#define DHCP_HLENETHERNET	6
+#define DHCP_HOPS		0
+#define DHCP_SECS		0
+
+#define MAGIC_COOKIE		0x63825363
+#define MAX_DHCP_OPT	16
+
+#define HOST_NAME "WIZnet"
+#define DEFAULT_LEASE	(900) //default lease time in seconds
+
+#define DHCP_CHECK_NONE         (0)
+#define DHCP_CHECK_RENEW_FAIL   (1)
+#define DHCP_CHECK_RENEW_OK     (2)
+#define DHCP_CHECK_REBIND_FAIL  (3)
+#define DHCP_CHECK_REBIND_OK    (4)
+
+enum
+{
+	padOption		=	0,
+	subnetMask		=	1,
+	timerOffset		=	2,
+	routersOnSubnet		=	3,
+	/* timeServer		=	4,
+	nameServer		=	5,*/
+	dns			=	6,
+	/*logServer		=	7,
+	cookieServer		=	8,
+	lprServer		=	9,
+	impressServer		=	10,
+	resourceLocationServer	=	11,*/
+	hostName		=	12,
+	/*bootFileSize		=	13,
+	meritDumpFile		=	14,*/
+	domainName		=	15,
+	/*swapServer		=	16,
+	rootPath		=	17,
+	extentionsPath		=	18,
+	IPforwarding		=	19,
+	nonLocalSourceRouting	=	20,
+	policyFilter		=	21,
+	maxDgramReasmSize	=	22,
+	defaultIPTTL		=	23,
+	pathMTUagingTimeout	=	24,
+	pathMTUplateauTable	=	25,
+	ifMTU			=	26,
+	allSubnetsLocal		=	27,
+	broadcastAddr		=	28,
+	performMaskDiscovery	=	29,
+	maskSupplier		=	30,
+	performRouterDiscovery	=	31,
+	routerSolicitationAddr	=	32,
+	staticRoute		=	33,
+	trailerEncapsulation	=	34,
+	arpCacheTimeout		=	35,
+	ethernetEncapsulation	=	36,
+	tcpDefaultTTL		=	37,
+	tcpKeepaliveInterval	=	38,
+	tcpKeepaliveGarbage	=	39,
+	nisDomainName		=	40,
+	nisServers		=	41,
+	ntpServers		=	42,
+	vendorSpecificInfo	=	43,
+	netBIOSnameServer	=	44,
+	netBIOSdgramDistServer	=	45,
+	netBIOSnodeType		=	46,
+	netBIOSscope		=	47,
+	xFontServer		=	48,
+	xDisplayManager		=	49,*/
+	dhcpRequestedIPaddr	=	50,
+	dhcpIPaddrLeaseTime	=	51,
+	/*dhcpOptionOverload	=	52,*/
+	dhcpMessageType		=	53,
+	dhcpServerIdentifier	=	54,
+	dhcpParamRequest	=	55,
+	/*dhcpMsg			=	56,
+	dhcpMaxMsgSize		=	57,*/
+	dhcpT1value		=	58,
+	dhcpT2value		=	59,
+	/*dhcpClassIdentifier	=	60,*/
+	dhcpClientIdentifier	=	61,
+	endOption		=	255
+};
+
+typedef struct _RIP_MSG_FIXED
+{
+	uint8_t  op; 
+	uint8_t  htype; 
+	uint8_t  hlen;
+	uint8_t  hops;
+	uint32_t xid;
+	uint16_t secs;
+	uint16_t flags;
+	uint8_t  ciaddr[4];
+	uint8_t  yiaddr[4];
+	uint8_t  siaddr[4];
+	uint8_t  giaddr[4];
+	uint8_t  chaddr[6];
+}RIP_MSG_FIXED;
+
+class DhcpClass {
+
+private:
+  uint32_t _dhcpInitialTransactionId;
+  uint32_t _dhcpTransactionId;
+  uint8_t  _dhcpMacAddr[6];
+  uint8_t  _dhcpLocalIp[4];
+  uint8_t  _dhcpSubnetMask[4];
+  uint8_t  _dhcpGatewayIp[4];
+  uint8_t  _dhcpDhcpServerIp[4];
+  uint8_t  _dhcpDnsServerIp[4];
+  uint32_t _dhcpLeaseTime;
+  uint32_t _dhcpT1, _dhcpT2;
+  signed long _renewInSec;
+  signed long _rebindInSec;
+  signed long _lastCheck;
+  unsigned long _timeout;
+  unsigned long _responseTimeout;
+  unsigned long _secTimeout;
+  uint8_t _dhcp_state;
+  EthernetUDP _dhcpUdpSocket;
+  int request_DHCP_lease();
+  void reset_DHCP_lease();
+  void presend_DHCP();
+  void send_DHCP_MESSAGE(uint8_t, uint16_t);
+  void printByte(char *, uint8_t);
+  
+  uint8_t parseDHCPResponse(unsigned long responseTimeout, uint32_t& transactionId);
+public:
+  IPAddress getLocalIp();
+  IPAddress getSubnetMask();
+  IPAddress getGatewayIp();
+  IPAddress getDhcpServerIp();
+  IPAddress getDnsServerIp();
+  
+  int beginWithDHCP(uint8_t *, unsigned long timeout = 60000, unsigned long responseTimeout = 5000);  
+  int checkLease();
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dns.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dns.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dns.cpp	(revision 136)
@@ -0,0 +1,423 @@
+// Arduino DNS client for WizNet5100-based Ethernet shield
+// (c) Copyright 2009-2010 MCQN Ltd.
+// Released under Apache License, version 2.0
+
+#include "utility/w5500.h"
+#include "EthernetUdp2.h"
+#include "utility/util.h"
+
+#include "Dns.h"
+#include <string.h>
+//#include <stdlib.h>
+#include "Arduino.h"
+
+
+#define SOCKET_NONE	255
+// Various flags and header field values for a DNS message
+#define UDP_HEADER_SIZE	8
+#define DNS_HEADER_SIZE	12
+#define TTL_SIZE        4
+#define QUERY_FLAG               (0)
+#define RESPONSE_FLAG            (1<<15)
+#define QUERY_RESPONSE_MASK      (1<<15)
+#define OPCODE_STANDARD_QUERY    (0)
+#define OPCODE_INVERSE_QUERY     (1<<11)
+#define OPCODE_STATUS_REQUEST    (2<<11)
+#define OPCODE_MASK              (15<<11)
+#define AUTHORITATIVE_FLAG       (1<<10)
+#define TRUNCATION_FLAG          (1<<9)
+#define RECURSION_DESIRED_FLAG   (1<<8)
+#define RECURSION_AVAILABLE_FLAG (1<<7)
+#define RESP_NO_ERROR            (0)
+#define RESP_FORMAT_ERROR        (1)
+#define RESP_SERVER_FAILURE      (2)
+#define RESP_NAME_ERROR          (3)
+#define RESP_NOT_IMPLEMENTED     (4)
+#define RESP_REFUSED             (5)
+#define RESP_MASK                (15)
+#define TYPE_A                   (0x0001)
+#define CLASS_IN                 (0x0001)
+#define LABEL_COMPRESSION_MASK   (0xC0)
+// Port number that DNS servers listen on
+#define DNS_PORT        53
+
+// Possible return codes from ProcessResponse
+#define SUCCESS          1
+#define TIMED_OUT        -1
+#define INVALID_SERVER   -2
+#define TRUNCATED        -3
+#define INVALID_RESPONSE -4
+
+void DNSClient::begin(const IPAddress& aDNSServer)
+{
+    iDNSServer = aDNSServer;
+    iRequestId = 0;
+}
+
+
+int DNSClient::inet_aton(const char* aIPAddrString, IPAddress& aResult)
+{
+    // See if we've been given a valid IP address
+    const char* p =aIPAddrString;
+    while (*p &&
+           ( (*p == '.') || (*p >= '0') || (*p <= '9') ))
+    {
+        p++;
+    }
+
+    if (*p == '\0')
+    {
+        // It's looking promising, we haven't found any invalid characters
+        p = aIPAddrString;
+        int segment =0;
+        int segmentValue =0;
+        while (*p && (segment < 4))
+        {
+            if (*p == '.')
+            {
+                // We've reached the end of a segment
+                if (segmentValue > 255)
+                {
+                    // You can't have IP address segments that don't fit in a byte
+                    return 0;
+                }
+                else
+                {
+                    aResult[segment] = (byte)segmentValue;
+                    segment++;
+                    segmentValue = 0;
+                }
+            }
+            else
+            {
+                // Next digit
+                segmentValue = (segmentValue*10)+(*p - '0');
+            }
+            p++;
+        }
+        // We've reached the end of address, but there'll still be the last
+        // segment to deal with
+        if ((segmentValue > 255) || (segment > 3))
+        {
+            // You can't have IP address segments that don't fit in a byte,
+            // or more than four segments
+            return 0;
+        }
+        else
+        {
+            aResult[segment] = (byte)segmentValue;
+            return 1;
+        }
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+int DNSClient::getHostByName(const char* aHostname, IPAddress& aResult)
+{
+    int ret =0;
+
+    // See if it's a numeric IP address
+    if (inet_aton(aHostname, aResult))
+    {
+        // It is, our work here is done
+        return 1;
+    }
+
+    // Check we've got a valid DNS server to use
+    if (iDNSServer == INADDR_NONE)
+    {
+        return INVALID_SERVER;
+    }
+	
+    // Find a socket to use
+    if (iUdp.begin(1024+(millis() & 0xF)) == 1)
+    {
+        // Try up to three times
+        int retries = 0;
+//        while ((retries < 3) && (ret <= 0))
+        {
+            // Send DNS request
+            ret = iUdp.beginPacket(iDNSServer, DNS_PORT);
+            if (ret != 0)
+            {
+                // Now output the request data
+                ret = BuildRequest(aHostname);
+                if (ret != 0)
+                {
+                    // And finally send the request
+                    ret = iUdp.endPacket();
+                    if (ret != 0)
+                    {
+                        // Now wait for a response
+                        int wait_retries = 0;
+                        ret = TIMED_OUT;
+                        while ((wait_retries < 3) && (ret == TIMED_OUT))
+                        {
+                            ret = ProcessResponse(5000, aResult);
+                            wait_retries++;
+                        }
+                    }
+                }
+            }
+            retries++;
+        }
+
+        // We're done with the socket now
+        iUdp.stop();
+    }
+
+    return ret;
+}
+
+uint16_t DNSClient::BuildRequest(const char* aName)
+{
+    // Build header
+    //                                    1  1  1  1  1  1
+    //      0  1  2  3  4  5  6  7  8  9  0  1  2  3  4  5
+    //    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
+    //    |                      ID                       |
+    //    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
+    //    |QR|   Opcode  |AA|TC|RD|RA|   Z    |   RCODE   |
+    //    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
+    //    |                    QDCOUNT                    |
+    //    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
+    //    |                    ANCOUNT                    |
+    //    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
+    //    |                    NSCOUNT                    |
+    //    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
+    //    |                    ARCOUNT                    |
+    //    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
+    // As we only support one request at a time at present, we can simplify
+    // some of this header
+    iRequestId = millis(); // generate a random ID
+    uint16_t twoByteBuffer;
+
+    // FIXME We should also check that there's enough space available to write to, rather
+    // FIXME than assume there's enough space (as the code does at present)
+    iUdp.write((uint8_t*)&iRequestId, sizeof(iRequestId));
+
+    twoByteBuffer = htons(QUERY_FLAG | OPCODE_STANDARD_QUERY | RECURSION_DESIRED_FLAG);
+    iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer));
+
+    twoByteBuffer = htons(1);  // One question record
+    iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer));
+
+    twoByteBuffer = 0;  // Zero answer records
+    iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer));
+
+    iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer));
+    // and zero additional records
+    iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer));
+
+    // Build question
+    const char* start =aName;
+    const char* end =start;
+    uint8_t len;
+    // Run through the name being requested
+    while (*end)
+    {
+        // Find out how long this section of the name is
+        end = start;
+        while (*end && (*end != '.') )
+        {
+            end++;
+        }
+
+        if (end-start > 0)
+        {
+            // Write out the size of this section
+            len = end-start;
+            iUdp.write(&len, sizeof(len));
+            // And then write out the section
+            iUdp.write((uint8_t*)start, end-start);
+        }
+        start = end+1;
+    }
+
+    // We've got to the end of the question name, so
+    // terminate it with a zero-length section
+    len = 0;
+    iUdp.write(&len, sizeof(len));
+    // Finally the type and class of question
+    twoByteBuffer = htons(TYPE_A);
+    iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer));
+
+    twoByteBuffer = htons(CLASS_IN);  // Internet class of question
+    iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer));
+    // Success!  Everything buffered okay
+    return 1;
+}
+
+
+uint16_t DNSClient::ProcessResponse(uint16_t aTimeout, IPAddress& aAddress)
+{
+    uint32_t startTime = millis();
+
+    // Wait for a response packet
+    while(iUdp.parsePacket() <= 0)
+    {
+        if((millis() - startTime) > aTimeout)
+            return TIMED_OUT;
+        delay(50);
+    }
+
+    // We've had a reply!
+    // Read the UDP header
+    uint8_t header[DNS_HEADER_SIZE]; // Enough space to reuse for the DNS header
+    // Check that it's a response from the right server and the right port
+    if ( (iDNSServer != iUdp.remoteIP()) || 
+        (iUdp.remotePort() != DNS_PORT) )
+    {
+        // It's not from who we expected
+        return INVALID_SERVER;
+    }
+
+    // Read through the rest of the response
+    if (iUdp.available() < DNS_HEADER_SIZE)
+    {
+        return TRUNCATED;
+    }
+    iUdp.read(header, DNS_HEADER_SIZE);
+
+    uint16_t header_flags = htons(*((uint16_t*)&header[2]));
+    // Check that it's a response to this request
+    if ( ( iRequestId != (*((uint16_t*)&header[0])) ) ||
+        ((header_flags & QUERY_RESPONSE_MASK) != (uint16_t)RESPONSE_FLAG) )
+    {
+        // Mark the entire packet as read
+        iUdp.flush();
+        return INVALID_RESPONSE;
+    }
+    // Check for any errors in the response (or in our request)
+    // although we don't do anything to get round these
+    if ( (header_flags & TRUNCATION_FLAG) || (header_flags & RESP_MASK) )
+    {
+        // Mark the entire packet as read
+        iUdp.flush();
+        return -5; //INVALID_RESPONSE;
+    }
+
+    // And make sure we've got (at least) one answer
+    uint16_t answerCount = htons(*((uint16_t*)&header[6]));
+    if (answerCount == 0 )
+    {
+        // Mark the entire packet as read
+        iUdp.flush();
+        return -6; //INVALID_RESPONSE;
+    }
+
+    // Skip over any questions
+    for (uint16_t i =0; i < htons(*((uint16_t*)&header[4])); i++)
+    {
+        // Skip over the name
+        uint8_t len;
+        do
+        {
+            iUdp.read(&len, sizeof(len));
+            if (len > 0)
+            {
+                // Don't need to actually read the data out for the string, just
+                // advance ptr to beyond it
+                while(len--)
+                {
+                    iUdp.read(); // we don't care about the returned byte
+                }
+            }
+        } while (len != 0);
+
+        // Now jump over the type and class
+        for (int i =0; i < 4; i++)
+        {
+            iUdp.read(); // we don't care about the returned byte
+        }
+    }
+
+    // Now we're up to the bit we're interested in, the answer
+    // There might be more than one answer (although we'll just use the first
+    // type A answer) and some authority and additional resource records but
+    // we're going to ignore all of them.
+
+    for (uint16_t i =0; i < answerCount; i++)
+    {
+        // Skip the name
+        uint8_t len;
+        do
+        {
+            iUdp.read(&len, sizeof(len));
+            if ((len & LABEL_COMPRESSION_MASK) == 0)
+            {
+                // It's just a normal label
+                if (len > 0)
+                {
+                    // And it's got a length
+                    // Don't need to actually read the data out for the string,
+                    // just advance ptr to beyond it
+                    while(len--)
+                    {
+                        iUdp.read(); // we don't care about the returned byte
+                    }
+                }
+            }
+            else
+            {
+                // This is a pointer to a somewhere else in the message for the
+                // rest of the name.  We don't care about the name, and RFC1035
+                // says that a name is either a sequence of labels ended with a
+                // 0 length octet or a pointer or a sequence of labels ending in
+                // a pointer.  Either way, when we get here we're at the end of
+                // the name
+                // Skip over the pointer
+                iUdp.read(); // we don't care about the returned byte
+                // And set len so that we drop out of the name loop
+                len = 0;
+            }
+        } while (len != 0);
+
+        // Check the type and class
+        uint16_t answerType;
+        uint16_t answerClass;
+        iUdp.read((uint8_t*)&answerType, sizeof(answerType));
+        iUdp.read((uint8_t*)&answerClass, sizeof(answerClass));
+
+        // Ignore the Time-To-Live as we don't do any caching
+        for (int i =0; i < TTL_SIZE; i++)
+        {
+            iUdp.read(); // we don't care about the returned byte
+        }
+
+        // And read out the length of this answer
+        // Don't need header_flags anymore, so we can reuse it here
+        iUdp.read((uint8_t*)&header_flags, sizeof(header_flags));
+
+        if ( (htons(answerType) == TYPE_A) && (htons(answerClass) == CLASS_IN) )
+        {
+            if (htons(header_flags) != 4)
+            {
+                // It's a weird size
+                // Mark the entire packet as read
+                iUdp.flush();
+                return -9;//INVALID_RESPONSE;
+            }
+            iUdp.read(aAddress.raw_address(), 4);
+            return SUCCESS;
+        }
+        else
+        {
+            // This isn't an answer type we're after, move onto the next one
+            for (uint16_t i =0; i < htons(header_flags); i++)
+            {
+                iUdp.read(); // we don't care about the returned byte
+            }
+        }
+    }
+
+    // Mark the entire packet as read
+    iUdp.flush();
+
+    // If we get here then we haven't found an answer
+    return -10;//INVALID_RESPONSE;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dns.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dns.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Dns.h	(revision 136)
@@ -0,0 +1,41 @@
+// Arduino DNS client for WizNet5100-based Ethernet shield
+// (c) Copyright 2009-2010 MCQN Ltd.
+// Released under Apache License, version 2.0
+
+#ifndef DNSClient_h
+#define DNSClient_h
+
+#include <EthernetUdp2.h>
+
+class DNSClient
+{
+public:
+    // ctor
+    void begin(const IPAddress& aDNSServer);
+
+    /** Convert a numeric IP address string into a four-byte IP address.
+        @param aIPAddrString IP address to convert
+        @param aResult IPAddress structure to store the returned IP address
+        @result 1 if aIPAddrString was successfully converted to an IP address,
+                else error code
+    */
+    int inet_aton(const char *aIPAddrString, IPAddress& aResult);
+
+    /** Resolve the given hostname to an IP address.
+        @param aHostname Name to be resolved
+        @param aResult IPAddress structure to store the returned IP address
+        @result 1 if aIPAddrString was successfully converted to an IP address,
+                else error code
+    */
+    int getHostByName(const char* aHostname, IPAddress& aResult);
+
+protected:
+    uint16_t BuildRequest(const char* aName);
+    uint16_t ProcessResponse(uint16_t aTimeout, IPAddress& aAddress);
+
+    IPAddress iDNSServer;
+    uint16_t iRequestId;
+    EthernetUDP iUdp;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Ethernet2.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Ethernet2.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Ethernet2.cpp	(revision 136)
@@ -0,0 +1,189 @@
+/*
+ modified 12 Aug 2013
+ by Soohwan Kim (suhwan@wiznet.co.kr)
+
+- 10 Apr. 2015
+ Added support for Arduino Ethernet Shield 2
+ by Arduino.org team
+
+ */
+ 
+#include "Ethernet2.h"
+#include "Dhcp.h"
+
+// XXX: don't make assumptions about the value of MAX_SOCK_NUM.
+uint8_t EthernetClass::_state[MAX_SOCK_NUM] = { 0, };
+uint16_t EthernetClass::_server_port[MAX_SOCK_NUM] = { 0, };
+
+
+
+#if defined(WIZ550io_WITH_MACADDRESS)
+int EthernetClass::begin(void)
+{
+  byte mac_address[6] ={0,};
+  _dhcp = new DhcpClass();
+
+  // Initialise the basic info
+  w5500.init();
+  w5500.setIPAddress(IPAddress(0,0,0,0).raw_address());
+  w5500.getMACAddress(mac_address);
+  
+  // Now try to get our config info from a DHCP server
+  int ret = _dhcp->beginWithDHCP(mac_address);
+  if(ret == 1)
+  {
+    // We've successfully found a DHCP server and got our configuration info, so set things
+    // accordingly
+    w5500.setIPAddress(_dhcp->getLocalIp().raw_address());
+    w5500.setGatewayIp(_dhcp->getGatewayIp().raw_address());
+    w5500.setSubnetMask(_dhcp->getSubnetMask().raw_address());
+    _dnsServerAddress = _dhcp->getDnsServerIp();
+  }
+
+  return ret;
+}
+
+void EthernetClass::begin(IPAddress local_ip)
+{
+  // Assume the DNS server will be the machine on the same network as the local IP
+  // but with last octet being '1'
+  IPAddress dns_server = local_ip;
+  dns_server[3] = 1;
+  begin(local_ip, dns_server);
+}
+
+void EthernetClass::begin(IPAddress local_ip, IPAddress dns_server)
+{
+  // Assume the gateway will be the machine on the same network as the local IP
+  // but with last octet being '1'
+  IPAddress gateway = local_ip;
+  gateway[3] = 1;
+  begin(local_ip, dns_server, gateway);
+}
+
+void EthernetClass::begin(IPAddress local_ip, IPAddress dns_server, IPAddress gateway)
+{
+  IPAddress subnet(255, 255, 255, 0);
+  begin(local_ip, dns_server, gateway, subnet);
+}
+
+void EthernetClass::begin(IPAddress local_ip, IPAddress dns_server, IPAddress gateway, IPAddress subnet)
+{
+  w5500.init();
+  w5500.setIPAddress(local_ip.raw_address());
+  w5500.setGatewayIp(gateway.raw_address());
+  w5500.setSubnetMask(subnet.raw_address());
+  _dnsServerAddress = dns_server;
+}
+#else
+int EthernetClass::begin(uint8_t *mac_address)
+{
+  _dhcp = new DhcpClass();
+  // Initialise the basic info
+  w5500.init();
+  w5500.setMACAddress(mac_address);
+  w5500.setIPAddress(IPAddress(0,0,0,0).raw_address());
+
+  // Now try to get our config info from a DHCP server
+  int ret = _dhcp->beginWithDHCP(mac_address);
+  if(ret == 1)
+  {
+    // We've successfully found a DHCP server and got our configuration info, so set things
+    // accordingly
+    w5500.setIPAddress(_dhcp->getLocalIp().raw_address());
+    w5500.setGatewayIp(_dhcp->getGatewayIp().raw_address());
+    w5500.setSubnetMask(_dhcp->getSubnetMask().raw_address());
+    _dnsServerAddress = _dhcp->getDnsServerIp();
+  }
+
+  return ret;
+}
+
+void EthernetClass::begin(uint8_t *mac_address, IPAddress local_ip)
+{
+  // Assume the DNS server will be the machine on the same network as the local IP
+  // but with last octet being '1'
+  IPAddress dns_server = local_ip;
+  dns_server[3] = 1;
+  begin(mac_address, local_ip, dns_server);
+}
+
+void EthernetClass::begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server)
+{
+  // Assume the gateway will be the machine on the same network as the local IP
+  // but with last octet being '1'
+  IPAddress gateway = local_ip;
+  gateway[3] = 1;
+  begin(mac_address, local_ip, dns_server, gateway);
+}
+
+void EthernetClass::begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server, IPAddress gateway)
+{
+  IPAddress subnet(255, 255, 255, 0);
+  begin(mac_address, local_ip, dns_server, gateway, subnet);
+}
+
+void EthernetClass::begin(uint8_t *mac, IPAddress local_ip, IPAddress dns_server, IPAddress gateway, IPAddress subnet)
+{
+  w5500.init();
+  w5500.setMACAddress(mac);
+  w5500.setIPAddress(local_ip.raw_address());
+  w5500.setGatewayIp(gateway.raw_address());
+  w5500.setSubnetMask(subnet.raw_address());
+  _dnsServerAddress = dns_server;
+}
+
+#endif
+
+int EthernetClass::maintain(){
+  int rc = DHCP_CHECK_NONE;
+  if(_dhcp != NULL){
+    //we have a pointer to dhcp, use it
+    rc = _dhcp->checkLease();
+    switch ( rc ){
+      case DHCP_CHECK_NONE:
+        //nothing done
+        break;
+      case DHCP_CHECK_RENEW_OK:
+      case DHCP_CHECK_REBIND_OK:
+        //we might have got a new IP.
+        w5500.setIPAddress(_dhcp->getLocalIp().raw_address());
+        w5500.setGatewayIp(_dhcp->getGatewayIp().raw_address());
+        w5500.setSubnetMask(_dhcp->getSubnetMask().raw_address());
+        _dnsServerAddress = _dhcp->getDnsServerIp();
+        break;
+      default:
+        //this is actually a error, it will retry though
+        break;
+    }
+  }
+  return rc;
+}
+
+IPAddress EthernetClass::localIP()
+{
+  IPAddress ret;
+  w5500.getIPAddress(ret.raw_address());
+  return ret;
+}
+
+IPAddress EthernetClass::subnetMask()
+{
+  IPAddress ret;
+  w5500.getSubnetMask(ret.raw_address());
+  return ret;
+}
+
+IPAddress EthernetClass::gatewayIP()
+{
+  IPAddress ret;
+  w5500.getGatewayIp(ret.raw_address());
+  return ret;
+}
+
+IPAddress EthernetClass::dnsServerIP()
+{
+  return _dnsServerAddress;
+}
+
+EthernetClass Ethernet;
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Ethernet2.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Ethernet2.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Ethernet2.h	(revision 136)
@@ -0,0 +1,65 @@
+/*
+ modified 12 Aug 2013
+ by Soohwan Kim (suhwan@wiznet.co.kr)
+
+ - 10 Apr. 2015
+ Added support for Arduino Ethernet Shield 2
+ by Arduino.org team
+ 
+ */
+#ifndef ethernet_h
+#define ethernet_h
+
+#include <inttypes.h>
+#include "utility/w5500.h"
+#include "IPAddress.h"
+#include "EthernetClient.h"
+#include "EthernetServer.h"
+#include "Dhcp.h"
+
+
+
+class EthernetClass {
+private:
+  IPAddress _dnsServerAddress;
+  DhcpClass* _dhcp;
+public:
+  static uint8_t _state[MAX_SOCK_NUM];
+  static uint16_t _server_port[MAX_SOCK_NUM];
+
+#if defined(WIZ550io_WITH_MACADDRESS)
+  // Initialize function when use the ioShield serise (included WIZ550io)
+  // WIZ550io has a MAC address which is written after reset.
+  // Default IP, Gateway and subnet address are also writen.
+  // so, It needs some initial time. please refer WIZ550io Datasheet in details.
+  int begin(void);
+  void begin(IPAddress local_ip);
+  void begin(IPAddress local_ip, IPAddress dns_server);
+  void begin(IPAddress local_ip, IPAddress dns_server, IPAddress gateway);
+  void begin(IPAddress local_ip, IPAddress dns_server, IPAddress gateway, IPAddress subnet);
+#else
+  // Initialize the Ethernet shield to use the provided MAC address and gain the rest of the
+  // configuration through DHCP.
+  // Returns 0 if the DHCP configuration failed, and 1 if it succeeded
+  int begin(uint8_t *mac_address);
+  void begin(uint8_t *mac_address, IPAddress local_ip);
+  void begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server);
+  void begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server, IPAddress gateway);
+  void begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server, IPAddress gateway, IPAddress subnet);
+
+#endif
+  
+  int maintain();
+
+  IPAddress localIP();
+  IPAddress subnetMask();
+  IPAddress gatewayIP();
+  IPAddress dnsServerIP();
+
+  friend class EthernetClient;
+  friend class EthernetServer;
+};
+
+extern EthernetClass Ethernet;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetClient.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetClient.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetClient.cpp	(revision 136)
@@ -0,0 +1,168 @@
+#include "utility/w5500.h"
+#include "utility/socket.h"
+
+extern "C" {
+  #include "string.h"
+}
+
+#include "Arduino.h"
+
+#include "Ethernet2.h"
+#include "EthernetClient.h"
+#include "EthernetServer.h"
+#include "Dns.h"
+
+uint16_t EthernetClient::_srcport = 1024;
+
+EthernetClient::EthernetClient() : _sock(MAX_SOCK_NUM) {
+}
+
+EthernetClient::EthernetClient(uint8_t sock) : _sock(sock) {
+}
+
+int EthernetClient::connect(const char* host, uint16_t port) {
+  // Look up the host first
+  int ret = 0;
+  DNSClient dns;
+  IPAddress remote_addr;
+
+  dns.begin(Ethernet.dnsServerIP());
+  ret = dns.getHostByName(host, remote_addr);
+  if (ret == 1) {
+    return connect(remote_addr, port);
+  } else {
+    return ret;
+  }
+}
+
+int EthernetClient::connect(IPAddress ip, uint16_t port) {
+  if (_sock != MAX_SOCK_NUM)
+    return 0;
+
+  for (int i = 0; i < MAX_SOCK_NUM; i++) {
+    uint8_t s = w5500.readSnSR(i);
+    if (s == SnSR::CLOSED || s == SnSR::FIN_WAIT || s == SnSR::CLOSE_WAIT) {
+      _sock = i;
+      break;
+    }
+  }
+
+  if (_sock == MAX_SOCK_NUM)
+    return 0;
+
+  _srcport++;
+  if (_srcport == 0) _srcport = 1024;
+  socket(_sock, SnMR::TCP, _srcport, 0);
+
+  if (!::connect(_sock, rawIPAddress(ip), port)) {
+    _sock = MAX_SOCK_NUM;
+    return 0;
+  }
+
+  while (status() != SnSR::ESTABLISHED) {
+    delay(1);
+    if (status() == SnSR::CLOSED) {
+      _sock = MAX_SOCK_NUM;
+      return 0;
+    }
+  }
+
+  return 1;
+}
+
+size_t EthernetClient::write(uint8_t b) {
+  return write(&b, 1);
+}
+
+size_t EthernetClient::write(const uint8_t *buf, size_t size) {
+  if (_sock == MAX_SOCK_NUM) {
+    setWriteError();
+    return 0;
+  }
+  if (!send(_sock, buf, size)) {
+    setWriteError();
+    return 0;
+  }
+  return size;
+}
+
+int EthernetClient::available() {
+  if (_sock != MAX_SOCK_NUM)
+    return w5500.getRXReceivedSize(_sock);
+  return 0;
+}
+
+int EthernetClient::read() {
+  uint8_t b;
+  if ( recv(_sock, &b, 1) > 0 )
+  {
+    // recv worked
+    return b;
+  }
+  else
+  {
+    // No data available
+    return -1;
+  }
+}
+
+int EthernetClient::read(uint8_t *buf, size_t size) {
+  return recv(_sock, buf, size);
+}
+
+int EthernetClient::peek() {
+  uint8_t b;
+  // Unlike recv, peek doesn't check to see if there's any data available, so we must
+  if (!available())
+    return -1;
+  ::peek(_sock, &b);
+  return b;
+}
+
+void EthernetClient::flush() {
+  ::flush(_sock);
+}
+
+void EthernetClient::stop() {
+  if (_sock == MAX_SOCK_NUM)
+    return;
+
+  // attempt to close the connection gracefully (send a FIN to other side)
+  disconnect(_sock);
+  unsigned long start = millis();
+
+  // wait a second for the connection to close
+  while (status() != SnSR::CLOSED && millis() - start < 1000)
+    delay(1);
+
+  // if it hasn't closed, close it forcefully
+  if (status() != SnSR::CLOSED)
+    close(_sock);
+
+  EthernetClass::_server_port[_sock] = 0;
+  _sock = MAX_SOCK_NUM;
+}
+
+uint8_t EthernetClient::connected() {
+  if (_sock == MAX_SOCK_NUM) return 0;
+  
+  uint8_t s = status();
+  return !(s == SnSR::LISTEN || s == SnSR::CLOSED || s == SnSR::FIN_WAIT ||
+    (s == SnSR::CLOSE_WAIT && !available()));
+}
+
+uint8_t EthernetClient::status() {
+  if (_sock == MAX_SOCK_NUM) return SnSR::CLOSED;
+  return w5500.readSnSR(_sock);
+}
+
+// the next function allows us to use the client returned by
+// EthernetServer::available() as the condition in an if-statement.
+
+EthernetClient::operator bool() {
+  return _sock != MAX_SOCK_NUM;
+}
+
+bool EthernetClient::operator==(const EthernetClient& rhs) {
+  return _sock == rhs._sock && _sock != MAX_SOCK_NUM && rhs._sock != MAX_SOCK_NUM;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetClient.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetClient.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetClient.h	(revision 136)
@@ -0,0 +1,39 @@
+#ifndef ethernetclient_h
+#define ethernetclient_h
+#include "Arduino.h"	
+#include "Print.h"
+#include "Client.h"
+#include "IPAddress.h"
+
+class EthernetClient : public Client {
+
+public:
+  EthernetClient();
+  EthernetClient(uint8_t sock);
+
+  uint8_t status();
+  virtual int connect(IPAddress ip, uint16_t port);
+  virtual int connect(const char *host, uint16_t port);
+  virtual size_t write(uint8_t);
+  virtual size_t write(const uint8_t *buf, size_t size);
+  virtual int available();
+  virtual int read();
+  virtual int read(uint8_t *buf, size_t size);
+  virtual int peek();
+  virtual void flush();
+  virtual void stop();
+  virtual uint8_t connected();
+  virtual operator bool();
+  virtual bool operator==(const EthernetClient&);
+  virtual bool operator!=(const EthernetClient& rhs) { return !this->operator==(rhs); };
+
+  friend class EthernetServer;
+  
+  using Print::write;
+
+private:
+  static uint16_t _srcport;
+  uint8_t _sock;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetServer.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetServer.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetServer.cpp	(revision 136)
@@ -0,0 +1,91 @@
+#include "utility/w5500.h"
+#include "utility/socket.h"
+extern "C" {
+#include "string.h"
+}
+
+#include "Ethernet2.h"
+#include "EthernetClient.h"
+#include "EthernetServer.h"
+
+EthernetServer::EthernetServer(uint16_t port)
+{
+  _port = port;
+}
+
+void EthernetServer::begin()
+{
+  for (int sock = 0; sock < MAX_SOCK_NUM; sock++) {
+    EthernetClient client(sock);
+    if (client.status() == SnSR::CLOSED) {
+      socket(sock, SnMR::TCP, _port, 0);
+      listen(sock);
+      EthernetClass::_server_port[sock] = _port;
+      break;
+    }
+  }  
+}
+
+void EthernetServer::accept()
+{
+  int listening = 0;
+
+  for (int sock = 0; sock < MAX_SOCK_NUM; sock++) {
+    EthernetClient client(sock);
+
+    if (EthernetClass::_server_port[sock] == _port) {
+      if (client.status() == SnSR::LISTEN) {
+        listening = 1;
+      } 
+      else if (client.status() == SnSR::CLOSE_WAIT && !client.available()) {
+        client.stop();
+      }
+    } 
+  }
+
+  if (!listening) {
+    begin();
+  }
+}
+
+EthernetClient EthernetServer::available()
+{
+  accept();
+
+  for (int sock = 0; sock < MAX_SOCK_NUM; sock++) {
+    EthernetClient client(sock);
+    if (EthernetClass::_server_port[sock] == _port &&
+        (client.status() == SnSR::ESTABLISHED ||
+         client.status() == SnSR::CLOSE_WAIT)) {
+      if (client.available()) {
+        // XXX: don't always pick the lowest numbered socket.
+        return client;
+      }
+    }
+  }
+
+  return EthernetClient(MAX_SOCK_NUM);
+}
+
+size_t EthernetServer::write(uint8_t b) 
+{
+  return write(&b, 1);
+}
+
+size_t EthernetServer::write(const uint8_t *buffer, size_t size) 
+{
+  size_t n = 0;
+  
+  accept();
+
+  for (int sock = 0; sock < MAX_SOCK_NUM; sock++) {
+    EthernetClient client(sock);
+
+    if (EthernetClass::_server_port[sock] == _port &&
+      client.status() == SnSR::ESTABLISHED) {
+      n += client.write(buffer, size);
+    }
+  }
+  
+  return n;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetServer.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetServer.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetServer.h	(revision 136)
@@ -0,0 +1,22 @@
+#ifndef ethernetserver_h
+#define ethernetserver_h
+
+#include "Server.h"
+
+class EthernetClient;
+
+class EthernetServer : 
+public Server {
+private:
+  uint16_t _port;
+  void accept();
+public:
+  EthernetServer(uint16_t);
+  EthernetClient available();
+  virtual void begin();
+  virtual size_t write(uint8_t);
+  virtual size_t write(const uint8_t *buf, size_t size);
+  using Print::write;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetUdp2.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetUdp2.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetUdp2.cpp	(revision 136)
@@ -0,0 +1,222 @@
+/*
+ *  Udp.cpp: Library to send/receive UDP packets with the Arduino ethernet shield.
+ *  This version only offers minimal wrapping of socket.c/socket.h
+ *  Drop Udp.h/.cpp into the Ethernet library directory at hardware/libraries/Ethernet/ 
+ *
+ * MIT License:
+ * Copyright (c) 2008 Bjoern Hartmann
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ * 
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * bjoern@cs.stanford.edu 12/30/2008
+ *
+ * - 10 Apr. 2015
+ * Added support for Arduino Ethernet Shield 2
+ * by Arduino.org team
+ */
+
+#include "utility/w5500.h"
+#include "utility/socket.h"
+#include "Ethernet2.h"
+#include "Udp.h"
+#include "Dns.h"
+
+/* Constructor */
+EthernetUDP::EthernetUDP() : _sock(MAX_SOCK_NUM) {}
+
+/* Start EthernetUDP socket, listening at local port PORT */
+uint8_t EthernetUDP::begin(uint16_t port) {
+  if (_sock != MAX_SOCK_NUM)
+    return 0;
+
+  for (int i = 0; i < MAX_SOCK_NUM; i++) {
+    uint8_t s = w5500.readSnSR(i);
+    if (s == SnSR::CLOSED || s == SnSR::FIN_WAIT) {
+      _sock = i;
+      break;
+    }
+  }
+
+  if (_sock == MAX_SOCK_NUM)
+    return 0;
+
+  _port = port;
+  _remaining = 0;
+  socket(_sock, SnMR::UDP, _port, 0);
+
+  return 1;
+}
+
+/* return number of bytes available in the current packet,
+   will return zero if parsePacket hasn't been called yet */
+int EthernetUDP::available() {
+  return _remaining;
+}
+
+/* Release any resources being used by this EthernetUDP instance */
+void EthernetUDP::stop()
+{
+  if (_sock == MAX_SOCK_NUM)
+    return;
+
+  close(_sock);
+
+  EthernetClass::_server_port[_sock] = 0;
+  _sock = MAX_SOCK_NUM;
+}
+
+int EthernetUDP::beginPacket(const char *host, uint16_t port)
+{
+  // Look up the host first
+  int ret = 0;
+  DNSClient dns;
+  IPAddress remote_addr;
+
+  dns.begin(Ethernet.dnsServerIP());
+  ret = dns.getHostByName(host, remote_addr);
+  if (ret == 1) {
+    return beginPacket(remote_addr, port);
+  } else {
+    return ret;
+  }
+}
+
+int EthernetUDP::beginPacket(IPAddress ip, uint16_t port)
+{
+  _offset = 0;
+  return startUDP(_sock, rawIPAddress(ip), port);
+}
+
+int EthernetUDP::endPacket()
+{
+  return sendUDP(_sock);
+}
+
+size_t EthernetUDP::write(uint8_t byte)
+{
+  return write(&byte, 1);
+}
+
+size_t EthernetUDP::write(const uint8_t *buffer, size_t size)
+{
+  uint16_t bytes_written = bufferData(_sock, _offset, buffer, size);
+  _offset += bytes_written;
+  return bytes_written;
+}
+
+int EthernetUDP::parsePacket()
+{
+  // discard any remaining bytes in the last packet
+  flush();
+
+  if (w5500.getRXReceivedSize(_sock) > 0)
+  {
+    //HACK - hand-parse the UDP packet using TCP recv method
+    uint8_t tmpBuf[8];
+    int ret =0; 
+    //read 8 header bytes and get IP and port from it
+    ret = recv(_sock,tmpBuf,8);
+    if (ret > 0)
+    {
+      _remoteIP = tmpBuf;
+      _remotePort = tmpBuf[4];
+      _remotePort = (_remotePort << 8) + tmpBuf[5];
+      _remaining = tmpBuf[6];
+      _remaining = (_remaining << 8) + tmpBuf[7];
+
+      // When we get here, any remaining bytes are the data
+      ret = _remaining;
+    }
+    return ret;
+  }
+  // There aren't any packets available
+  return 0;
+}
+
+int EthernetUDP::read()
+{
+  uint8_t byte;
+
+  if ((_remaining > 0) && (recv(_sock, &byte, 1) > 0))
+  {
+    // We read things without any problems
+    _remaining--;
+    return byte;
+  }
+
+  // If we get here, there's no data available
+  return -1;
+}
+
+int EthernetUDP::read(unsigned char* buffer, size_t len)
+{
+
+  if (_remaining > 0)
+  {
+
+    int got;
+
+    if (_remaining <= len)
+    {
+      // data should fit in the buffer
+      got = recv(_sock, buffer, _remaining);
+    }
+    else
+    {
+      // too much data for the buffer, 
+      // grab as much as will fit
+      got = recv(_sock, buffer, len);
+    }
+
+    if (got > 0)
+    {
+      _remaining -= got;
+      return got;
+    }
+
+  }
+
+  // If we get here, there's no data available or recv failed
+  return -1;
+
+}
+
+int EthernetUDP::peek()
+{
+  uint8_t b;
+  // Unlike recv, peek doesn't check to see if there's any data available, so we must.
+  // If the user hasn't called parsePacket yet then return nothing otherwise they
+  // may get the UDP header
+  if (!_remaining)
+    return -1;
+  ::peek(_sock, &b);
+  return b;
+}
+
+void EthernetUDP::flush()
+{
+  // could this fail (loop endlessly) if _remaining > 0 and recv in read fails?
+  // should only occur if recv fails after telling us the data is there, lets
+  // hope the w5500 always behaves :)
+
+  while (_remaining)
+  {
+    read();
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetUdp2.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetUdp2.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/EthernetUdp2.h	(revision 136)
@@ -0,0 +1,105 @@
+/*
+ *  Udp.cpp: Library to send/receive UDP packets with the Arduino ethernet shield.
+ *  This version only offers minimal wrapping of socket.c/socket.h
+ *  Drop Udp.h/.cpp into the Ethernet library directory at hardware/libraries/Ethernet/ 
+ *
+ * NOTE: UDP is fast, but has some important limitations (thanks to Warren Gray for mentioning these)
+ * 1) UDP does not guarantee the order in which assembled UDP packets are received. This
+ * might not happen often in practice, but in larger network topologies, a UDP
+ * packet can be received out of sequence. 
+ * 2) UDP does not guard against lost packets - so packets *can* disappear without the sender being
+ * aware of it. Again, this may not be a concern in practice on small local networks.
+ * For more information, see http://www.cafeaulait.org/course/week12/35.html
+ *
+ * MIT License:
+ * Copyright (c) 2008 Bjoern Hartmann
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ * 
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * bjoern@cs.stanford.edu 12/30/2008
+ *
+ * - 10 Apr. 2015
+ * Added support for Arduino Ethernet Shield 2
+ * by Arduino.org team
+ *
+ */
+ 
+
+#ifndef ethernetudp_h
+#define ethernetudp_h
+
+#include <Udp.h>
+
+#define UDP_TX_PACKET_MAX_SIZE 24
+
+class EthernetUDP : public UDP {
+private:
+  uint8_t _sock;  // socket ID for Wiz5100
+  uint16_t _port; // local port to listen on
+  IPAddress _remoteIP; // remote IP address for the incoming packet whilst it's being processed
+  uint16_t _remotePort; // remote port for the incoming packet whilst it's being processed
+  uint16_t _offset; // offset into the packet being sent
+  uint16_t _remaining; // remaining bytes of incoming packet yet to be processed
+
+public:
+  EthernetUDP();  // Constructor
+  virtual uint8_t begin(uint16_t);	// initialize, start listening on specified port. Returns 1 if successful, 0 if there are no sockets available to use
+  virtual void stop();  // Finish with the UDP socket
+
+  // Sending UDP packets
+  
+  // Start building up a packet to send to the remote host specific in ip and port
+  // Returns 1 if successful, 0 if there was a problem with the supplied IP address or port
+  virtual int beginPacket(IPAddress ip, uint16_t port);
+  // Start building up a packet to send to the remote host specific in host and port
+  // Returns 1 if successful, 0 if there was a problem resolving the hostname or port
+  virtual int beginPacket(const char *host, uint16_t port);
+  // Finish off this packet and send it
+  // Returns 1 if the packet was sent successfully, 0 if there was an error
+  virtual int endPacket();
+  // Write a single byte into the packet
+  virtual size_t write(uint8_t);
+  // Write size bytes from buffer into the packet
+  virtual size_t write(const uint8_t *buffer, size_t size);
+  
+  using Print::write;
+
+  // Start processing the next available incoming packet
+  // Returns the size of the packet in bytes, or 0 if no packets are available
+  virtual int parsePacket();
+  // Number of bytes remaining in the current packet
+  virtual int available();
+  // Read a single byte from the current packet
+  virtual int read();
+  // Read up to len bytes from the current packet and place them into buffer
+  // Returns the number of bytes read, or 0 if none are available
+  virtual int read(unsigned char* buffer, size_t len);
+  // Read up to len characters from the current packet and place them into buffer
+  // Returns the number of characters read, or 0 if none are available
+  virtual int read(char* buffer, size_t len) { return read((unsigned char*)buffer, len); };
+  // Return the next byte from the current packet without moving on to the next byte
+  virtual int peek();
+  virtual void flush();	// Finish reading the current packet
+
+  // Return the IP address of the host who sent the current incoming packet
+  virtual IPAddress remoteIP() { return _remoteIP; };
+  // Return the port of the host who sent the current incoming packet
+  virtual uint16_t remotePort() { return _remotePort; };
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Twitter.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Twitter.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Twitter.cpp	(revision 136)
@@ -0,0 +1,91 @@
+/*
+  Twitter.cpp - Arduino library to Post messages to Twitter using OAuth.
+  Copyright (c) NeoCat 2010-2011. All right reserved.
+  
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+ */
+
+// ver1.2 - Use <string.h>
+// ver1.3 - Support IDE 1.0
+
+#include <string.h>
+#include "Twitter.h"
+
+#define LIB_DOMAIN "arduino-tweet.appspot.com"
+
+#if defined(ARDUINO) && ARDUINO < 100
+static uint8_t server[] = {0,0,0,0}; // IP address of LIB_DOMAIN
+Twitter::Twitter(const char *token) : client(server, 80), token(token)
+{
+}
+#else
+Twitter::Twitter(const char *token) : token(token)
+{
+}
+#endif
+
+bool Twitter::post(const char *msg)
+{
+#if defined(ARDUINO) && ARDUINO < 100
+	DNSError err = EthernetDNS.resolveHostName(LIB_DOMAIN, server);
+	if (err != DNSSuccess) {
+		return false;
+	}
+#endif
+	parseStatus = 0;
+	statusCode = 0;
+#if defined(ARDUINO) && ARDUINO < 100
+	if (client.connect()) {
+#else
+	if (client.connect(LIB_DOMAIN, 80)) {
+#endif
+		client.println("POST http://" LIB_DOMAIN "/update HTTP/1.0");
+		client.print("Content-Length: ");
+		client.println(strlen(msg)+strlen(token)+14);
+		client.println();
+		client.print("token=");
+		client.print(token);
+		client.print("&status=");
+		client.println(msg);
+	} else {
+		return false;
+	}
+	return true;
+}
+
+bool Twitter::checkStatus(Print *debug)
+{
+	if (!client.connected()) {
+		if (debug)
+			while(client.available())
+				debug->print((char)client.read());
+		client.flush();
+		client.stop();
+		return false;
+	}
+	if (!client.available())
+		return true;
+	char c = client.read();
+	if (debug)
+		debug->print(c);
+	switch(parseStatus) {
+	case 0:
+		if (c == ' ') parseStatus++; break;  // skip "HTTP/1.1 "
+	case 1:
+		if (c >= '0' && c <= '9') {
+			statusCode *= 10;
+			statusCode += c - '0';
+		} else {
+			parseStatus++;
+		}
+	}
+	return true;
+}
+
+int Twitter::wait(Print *debug)
+{
+	while (checkStatus(debug));
+	return statusCode;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Twitter.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Twitter.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/Twitter.h	(revision 136)
@@ -0,0 +1,46 @@
+/*
+  Twitter.cpp - Arduino library to Post messages to Twitter using OAuth.
+  Copyright (c) NeoCat 2010-2011. All right reserved.
+  
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
+ */
+
+// ver1.2 - Use <Udp.h> to support IDE 0019 or later
+// ver1.3 - Support IDE 1.0
+
+#ifndef TWITTER_H
+#define TWITTER_H
+
+#include <inttypes.h>
+#include <avr/pgmspace.h>
+#if defined(ARDUINO) && ARDUINO > 18   // Arduino 0019 or later
+#include <SPI.h>
+#endif
+#include <Ethernet2.h>
+#if defined(ARDUINO) && ARDUINO < 100  // earlier than Arduino 1.0
+#include <EthernetDNS.h>
+#endif
+
+class Twitter
+{
+private:
+	uint8_t parseStatus;
+	int statusCode;
+	const char *token;
+#if defined(ARDUINO) && ARDUINO < 100
+	Client client;
+#else
+	EthernetClient client;
+#endif
+public:
+	Twitter(const char *user_and_passwd);
+	
+	bool post(const char *msg);
+	bool checkStatus(Print *debug = NULL);
+	int  wait(Print *debug = NULL);
+	int  status(void) { return statusCode; }
+};
+
+#endif	//TWITTER_H
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/util.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/util.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/util.h	(revision 136)
@@ -0,0 +1,13 @@
+#ifndef UTIL_H
+#define UTIL_H
+
+#define htons(x) ( ((x)<<8) | (((x)>>8)&0xFF) )
+#define ntohs(x) htons(x)
+
+#define htonl(x) ( ((x)<<24 & 0xFF000000UL) | \
+                   ((x)<< 8 & 0x00FF0000UL) | \
+                   ((x)>> 8 & 0x0000FF00UL) | \
+                   ((x)>>24 & 0x000000FFUL) )
+#define ntohl(x) htonl(x)
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/socket.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/socket.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/socket.cpp	(revision 136)
@@ -0,0 +1,412 @@
+ /*
+ * - 10 Apr. 2015
+ * Added support for Arduino Ethernet Shield 2
+ * by Arduino.org team
+ */
+ 
+#include "utility/w5500.h"
+#include "utility/socket.h"
+
+static uint16_t local_port;
+
+/**
+ * @brief	This Socket function initialize the channel in perticular mode, and set the port and wait for w5500 done it.
+ * @return 	1 for success else 0.
+ */
+uint8_t socket(SOCKET s, uint8_t protocol, uint16_t port, uint8_t flag)
+{
+  if ((protocol == SnMR::TCP) || (protocol == SnMR::UDP) || (protocol == SnMR::IPRAW) || (protocol == SnMR::MACRAW) || (protocol == SnMR::PPPOE))
+  {
+    close(s);
+    w5500.writeSnMR(s, protocol | flag);
+    if (port != 0) {
+      w5500.writeSnPORT(s, port);
+    } 
+    else {
+      local_port++; // if don't set the source port, set local_port number.
+      w5500.writeSnPORT(s, local_port);
+    }
+
+    w5500.execCmdSn(s, Sock_OPEN);
+    
+    return 1;
+  }
+
+  return 0;
+}
+
+
+/**
+ * @brief	This function close the socket and parameter is "s" which represent the socket number
+ */
+void close(SOCKET s)
+{
+  w5500.execCmdSn(s, Sock_CLOSE);
+  w5500.writeSnIR(s, 0xFF);
+}
+
+
+/**
+ * @brief	This function established  the connection for the channel in passive (server) mode. This function waits for the request from the peer.
+ * @return	1 for success else 0.
+ */
+uint8_t listen(SOCKET s)
+{
+  if (w5500.readSnSR(s) != SnSR::INIT)
+    return 0;
+  w5500.execCmdSn(s, Sock_LISTEN);
+  return 1;
+}
+
+
+/**
+ * @brief	This function established  the connection for the channel in Active (client) mode. 
+ * 		This function waits for the untill the connection is established.
+ * 		
+ * @return	1 for success else 0.
+ */
+uint8_t connect(SOCKET s, uint8_t * addr, uint16_t port)
+{
+  if 
+    (
+  ((addr[0] == 0xFF) && (addr[1] == 0xFF) && (addr[2] == 0xFF) && (addr[3] == 0xFF)) ||
+    ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && (addr[3] == 0x00)) ||
+    (port == 0x00) 
+    ) 
+    return 0;
+
+  // set destination IP
+  w5500.writeSnDIPR(s, addr);
+  w5500.writeSnDPORT(s, port);
+  w5500.execCmdSn(s, Sock_CONNECT);
+
+  return 1;
+}
+
+
+
+/**
+ * @brief	This function used for disconnect the socket and parameter is "s" which represent the socket number
+ * @return	1 for success else 0.
+ */
+void disconnect(SOCKET s)
+{
+  w5500.execCmdSn(s, Sock_DISCON);
+}
+
+
+/**
+ * @brief	This function used to send the data in TCP mode
+ * @return	1 for success else 0.
+ */
+uint16_t send(SOCKET s, const uint8_t * buf, uint16_t len)
+{
+  uint8_t status=0;
+  uint16_t ret=0;
+  uint16_t freesize=0;
+
+  if (len > w5500.SSIZE) 
+    ret = w5500.SSIZE; // check size not to exceed MAX size.
+  else 
+    ret = len;
+
+  // if freebuf is available, start.
+  do 
+  {
+    freesize = w5500.getTXFreeSize(s);
+    status = w5500.readSnSR(s);
+    if ((status != SnSR::ESTABLISHED) && (status != SnSR::CLOSE_WAIT))
+    {
+      ret = 0; 
+      break;
+    }
+  } 
+  while (freesize < ret);
+
+  // copy data
+  w5500.send_data_processing(s, (uint8_t *)buf, ret);
+  w5500.execCmdSn(s, Sock_SEND);
+
+  /* +2008.01 bj */
+  while ( (w5500.readSnIR(s) & SnIR::SEND_OK) != SnIR::SEND_OK ) 
+  {
+    /* m2008.01 [bj] : reduce code */
+    if ( w5500.readSnSR(s) == SnSR::CLOSED )
+    {
+      close(s);
+      return 0;
+    }
+  }
+  /* +2008.01 bj */
+  w5500.writeSnIR(s, SnIR::SEND_OK);
+  return ret;
+}
+
+
+/**
+ * @brief	This function is an application I/F function which is used to receive the data in TCP mode.
+ * 		It continues to wait for data as much as the application wants to receive.
+ * 		
+ * @return	received data size for success else -1.
+ */
+int16_t recv(SOCKET s, uint8_t *buf, int16_t len)
+{
+  // Check how much data is available
+  int16_t ret = w5500.getRXReceivedSize(s);
+  if ( ret == 0 )
+  {
+    // No data available.
+    uint8_t status = w5500.readSnSR(s);
+    if ( status == SnSR::LISTEN || status == SnSR::CLOSED || status == SnSR::CLOSE_WAIT )
+    {
+      // The remote end has closed its side of the connection, so this is the eof state
+      ret = 0;
+    }
+    else
+    {
+      // The connection is still up, but there's no data waiting to be read
+      ret = -1;
+    }
+  }
+  else if (ret > len)
+  {
+    ret = len;
+  }
+
+  if ( ret > 0 )
+  {
+    w5500.recv_data_processing(s, buf, ret);
+    w5500.execCmdSn(s, Sock_RECV);
+  }
+  return ret;
+}
+
+
+/**
+ * @brief	Returns the first byte in the receive queue (no checking)
+ * 		
+ * @return
+ */
+uint16_t peek(SOCKET s, uint8_t *buf)
+{
+  w5500.recv_data_processing(s, buf, 1, 1);
+
+  return 1;
+}
+
+
+/**
+ * @brief	This function is an application I/F function which is used to send the data for other then TCP mode. 
+ * 		Unlike TCP transmission, The peer's destination address and the port is needed.
+ * 		
+ * @return	This function return send data size for success else -1.
+ */
+uint16_t sendto(SOCKET s, const uint8_t *buf, uint16_t len, uint8_t *addr, uint16_t port)
+{
+  uint16_t ret=0;
+
+  if (len > w5500.SSIZE) ret = w5500.SSIZE; // check size not to exceed MAX size.
+  else ret = len;
+
+  if
+    (
+  ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && (addr[3] == 0x00)) ||
+    ((port == 0x00)) ||(ret == 0)
+    ) 
+  {
+    /* +2008.01 [bj] : added return value */
+    ret = 0;
+  }
+  else
+  {
+    w5500.writeSnDIPR(s, addr);
+    w5500.writeSnDPORT(s, port);
+
+    // copy data
+    w5500.send_data_processing(s, (uint8_t *)buf, ret);
+    w5500.execCmdSn(s, Sock_SEND);
+
+    /* +2008.01 bj */
+    while ( (w5500.readSnIR(s) & SnIR::SEND_OK) != SnIR::SEND_OK ) 
+    {
+      if (w5500.readSnIR(s) & SnIR::TIMEOUT)
+      {
+        /* +2008.01 [bj]: clear interrupt */
+        w5500.writeSnIR(s, (SnIR::SEND_OK | SnIR::TIMEOUT)); /* clear SEND_OK & TIMEOUT */
+        return 0;
+      }
+    }
+
+    /* +2008.01 bj */
+    w5500.writeSnIR(s, SnIR::SEND_OK);
+  }
+  return ret;
+}
+
+
+/**
+ * @brief	This function is an application I/F function which is used to receive the data in other then
+ * 	TCP mode. This function is used to receive UDP, IP_RAW and MAC_RAW mode, and handle the header as well. 
+ * 	
+ * @return	This function return received data size for success else -1.
+ */
+uint16_t recvfrom(SOCKET s, uint8_t *buf, uint16_t len, uint8_t *addr, uint16_t *port)
+{
+  uint8_t head[8];
+  uint16_t data_len=0;
+  uint16_t ptr=0;
+
+  if ( len > 0 )
+  {
+    ptr = w5500.readSnRX_RD(s);
+    switch (w5500.readSnMR(s) & 0x07)
+    {
+    case SnMR::UDP :
+      w5500.read_data(s, ptr, head, 0x08);
+      ptr += 8;
+      // read peer's IP address, port number.
+      addr[0] = head[0];
+      addr[1] = head[1];
+      addr[2] = head[2];
+      addr[3] = head[3];
+      *port = head[4];
+      *port = (*port << 8) + head[5];
+      data_len = head[6];
+      data_len = (data_len << 8) + head[7];
+
+      w5500.read_data(s, ptr, buf, data_len); // data copy.
+      ptr += data_len;
+
+      w5500.writeSnRX_RD(s, ptr);
+      break;
+
+    case SnMR::IPRAW :
+      w5500.read_data(s, ptr, head, 0x06);
+      ptr += 6;
+
+      addr[0] = head[0];
+      addr[1] = head[1];
+      addr[2] = head[2];
+      addr[3] = head[3];
+      data_len = head[4];
+      data_len = (data_len << 8) + head[5];
+
+      w5500.read_data(s, ptr, buf, data_len); // data copy.
+      ptr += data_len;
+
+      w5500.writeSnRX_RD(s, ptr);
+      break;
+
+    case SnMR::MACRAW:
+      w5500.read_data(s, ptr, head, 2);
+      ptr+=2;
+      data_len = head[0];
+      data_len = (data_len<<8) + head[1] - 2;
+
+      w5500.read_data(s, ptr, buf, data_len);
+      ptr += data_len;
+      w5500.writeSnRX_RD(s, ptr);
+      break;
+
+    default :
+      break;
+    }
+    w5500.execCmdSn(s, Sock_RECV);
+  }
+  return data_len;
+}
+
+/**
+ * @brief	Wait for buffered transmission to complete.
+ */
+void flush(SOCKET s) {
+  // TODO
+}
+
+uint16_t igmpsend(SOCKET s, const uint8_t * buf, uint16_t len)
+{
+  uint8_t status=0;
+  uint16_t ret=0;
+
+  if (len > w5500.SSIZE) 
+    ret = w5500.SSIZE; // check size not to exceed MAX size.
+  else 
+    ret = len;
+
+  if (ret == 0)
+    return 0;
+
+  w5500.send_data_processing(s, (uint8_t *)buf, ret);
+  w5500.execCmdSn(s, Sock_SEND);
+
+  while ( (w5500.readSnIR(s) & SnIR::SEND_OK) != SnIR::SEND_OK ) 
+  {
+    status = w5500.readSnSR(s);
+    if (w5500.readSnIR(s) & SnIR::TIMEOUT)
+    {
+      /* in case of igmp, if send fails, then socket closed */
+      /* if you want change, remove this code. */
+      close(s);
+      return 0;
+    }
+  }
+
+  w5500.writeSnIR(s, SnIR::SEND_OK);
+  return ret;
+}
+
+uint16_t bufferData(SOCKET s, uint16_t offset, const uint8_t* buf, uint16_t len)
+{
+  uint16_t ret =0;
+  if (len > w5500.getTXFreeSize(s))
+  {
+    ret = w5500.getTXFreeSize(s); // check size not to exceed MAX size.
+  }
+  else
+  {
+    ret = len;
+  }
+  w5500.send_data_processing_offset(s, offset, buf, ret);
+  return ret;
+}
+
+int startUDP(SOCKET s, uint8_t* addr, uint16_t port)
+{
+  if
+    (
+     ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && (addr[3] == 0x00)) ||
+     ((port == 0x00))
+    ) 
+  {
+    return 0;
+  }
+  else
+  {
+    w5500.writeSnDIPR(s, addr);
+    w5500.writeSnDPORT(s, port);
+    return 1;
+  }
+}
+
+int sendUDP(SOCKET s)
+{
+  w5500.execCmdSn(s, Sock_SEND);
+		
+  /* +2008.01 bj */
+  while ( (w5500.readSnIR(s) & SnIR::SEND_OK) != SnIR::SEND_OK ) 
+  {
+    if (w5500.readSnIR(s) & SnIR::TIMEOUT)
+    {
+      /* +2008.01 [bj]: clear interrupt */
+      w5500.writeSnIR(s, (SnIR::SEND_OK|SnIR::TIMEOUT));
+      return 0;
+    }
+  }
+
+  /* +2008.01 bj */	
+  w5500.writeSnIR(s, SnIR::SEND_OK);
+
+  /* Sent ok */
+  return 1;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/socket.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/socket.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/socket.h	(revision 136)
@@ -0,0 +1,48 @@
+ /*
+ * - 10 Apr. 2015
+ * Added support for Arduino Ethernet Shield 2
+ * by Arduino.org team
+ */
+ 
+#ifndef	_SOCKET_H_
+#define	_SOCKET_H_
+
+#include "utility/w5500.h"
+
+extern uint8_t socket(SOCKET s, uint8_t protocol, uint16_t port, uint8_t flag); // Opens a socket(TCP or UDP or IP_RAW mode)
+extern void close(SOCKET s); // Close socket
+extern uint8_t connect(SOCKET s, uint8_t * addr, uint16_t port); // Establish TCP connection (Active connection)
+extern void disconnect(SOCKET s); // disconnect the connection
+extern uint8_t listen(SOCKET s);	// Establish TCP connection (Passive connection)
+extern uint16_t send(SOCKET s, const uint8_t * buf, uint16_t len); // Send data (TCP)
+extern int16_t recv(SOCKET s, uint8_t * buf, int16_t len);	// Receive data (TCP)
+extern uint16_t peek(SOCKET s, uint8_t *buf);
+extern uint16_t sendto(SOCKET s, const uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t port); // Send data (UDP/IP RAW)
+extern uint16_t recvfrom(SOCKET s, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port); // Receive data (UDP/IP RAW)
+extern void flush(SOCKET s); // Wait for transmission to complete
+
+extern uint16_t igmpsend(SOCKET s, const uint8_t * buf, uint16_t len);
+
+// Functions to allow buffered UDP send (i.e. where the UDP datagram is built up over a
+// number of calls before being sent
+/*
+  @brief This function sets up a UDP datagram, the data for which will be provided by one
+  or more calls to bufferData and then finally sent with sendUDP.
+  @return 1 if the datagram was successfully set up, or 0 if there was an error
+*/
+extern int startUDP(SOCKET s, uint8_t* addr, uint16_t port);
+/*
+  @brief This function copies up to len bytes of data from buf into a UDP datagram to be
+  sent later by sendUDP.  Allows datagrams to be built up from a series of bufferData calls.
+  @return Number of bytes successfully buffered
+*/
+uint16_t bufferData(SOCKET s, uint16_t offset, const uint8_t* buf, uint16_t len);
+/*
+  @brief Send a UDP datagram built up from a sequence of startUDP followed by one or more
+  calls to bufferData.
+  @return 1 if the datagram was successfully sent, or 0 if there was an error
+*/
+int sendUDP(SOCKET s);
+
+#endif
+/* _SOCKET_H_ */
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/util.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/util.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/util.h	(revision 136)
@@ -0,0 +1,14 @@
+#ifndef UTIL_H
+#define UTIL_H
+
+#define htons(x) ( ((x)<< 8 & 0xFF00) | \
+                   ((x)>> 8 & 0x00FF) )
+#define ntohs(x) htons(x)
+
+#define htonl(x) ( ((x)<<24 & 0xFF000000UL) | \
+                   ((x)<< 8 & 0x00FF0000UL) | \
+                   ((x)>> 8 & 0x0000FF00UL) | \
+                   ((x)>>24 & 0x000000FFUL) )
+#define ntohl(x) htonl(x)
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/w5500.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/w5500.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/w5500.cpp	(revision 136)
@@ -0,0 +1,247 @@
+/*
+ * Copyright (c) 2010 by WIZnet <support@wiznet.co.kr>
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of either the GNU General Public License version 2
+ * or the GNU Lesser General Public License version 2.1, both as
+ * published by the Free Software Foundation.
+ *
+ * - 10 Apr. 2015
+ * Added support for Arduino Ethernet Shield 2
+ * by Arduino.org team
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include "Arduino.h"
+
+#include "utility/w5500.h"
+//#if defined(W5500_ETHERNET_SHIELD)
+
+// W5500 controller instance
+W5500Class w5500;
+
+#define SPI_CS 10
+#define slaveSelectPin 10
+
+void W5500Class::init(void)
+{
+    delay(1000);
+#if defined(ARDUINO_ARCH_AVR) || defined(ARDUINO_ARCH_SAMD)
+    initSS();
+    SPI.begin();
+/*#elif defined(ARDUINO_ARCH_SAMD)
+	pinMode (slaveSelectPin, OUTPUT);
+	digitalWrite(slaveSelectPin, HIGH);
+	SPI.begin();
+	//SPI.setClockDivider(2);
+	//SPI.setDataMode(SPI_MODE0);	*/
+#else
+  SPI.begin(SPI_CS);
+  // Set clock to 4Mhz (w5500 should support up to about 14Mhz)
+//  SPI.setClockDivider(SPI_CS, 21);
+//  SPI.setClockDivider(SPI_CS, 6); // 14 Mhz, ok  
+//  SPI.setClockDivider(SPI_CS, 3); // 28 Mhz, ok 
+  SPI.setClockDivider(SPI_CS, 2); // 42 Mhz, ok 
+  SPI.setDataMode(SPI_CS, SPI_MODE0);
+#endif
+    for (int i=0; i<MAX_SOCK_NUM; i++) {
+        uint8_t cntl_byte = (0x0C + (i<<5));
+        write( 0x1E, cntl_byte, 2); //0x1E - Sn_RXBUF_SIZE
+        write( 0x1F, cntl_byte, 2); //0x1F - Sn_TXBUF_SIZE
+    }
+}
+
+uint16_t W5500Class::getTXFreeSize(SOCKET s)
+{
+    uint16_t val=0, val1=0;
+    do {
+        val1 = readSnTX_FSR(s);
+        if (val1 != 0)
+            val = readSnTX_FSR(s);
+    } 
+    while (val != val1);
+    return val;
+}
+
+uint16_t W5500Class::getRXReceivedSize(SOCKET s)
+{
+    uint16_t val=0,val1=0;
+    do {
+        val1 = readSnRX_RSR(s);
+        if (val1 != 0)
+            val = readSnRX_RSR(s);
+    } 
+    while (val != val1);
+    return val;
+}
+
+void W5500Class::send_data_processing(SOCKET s, const uint8_t *data, uint16_t len)
+{
+  // This is same as having no offset in a call to send_data_processing_offset
+  send_data_processing_offset(s, 0, data, len);
+
+}
+
+void W5500Class::send_data_processing_offset(SOCKET s, uint16_t data_offset, const uint8_t *data, uint16_t len)
+{
+
+    uint16_t ptr = readSnTX_WR(s);
+    uint8_t cntl_byte = (0x14+(s<<5));
+    ptr += data_offset;
+    write(ptr, cntl_byte, data, len);
+    ptr += len;
+    writeSnTX_WR(s, ptr);
+    
+}
+
+void W5500Class::recv_data_processing(SOCKET s, uint8_t *data, uint16_t len, uint8_t peek)
+{
+    uint16_t ptr;
+    ptr = readSnRX_RD(s);
+
+    read_data(s, ptr, data, len);
+    if (!peek)
+    {
+        ptr += len;
+        writeSnRX_RD(s, ptr);
+    }
+}
+
+void W5500Class::read_data(SOCKET s, volatile uint16_t src, volatile uint8_t *dst, uint16_t len)
+{
+    uint8_t cntl_byte = (0x18+(s<<5));
+    read((uint16_t)src , cntl_byte, (uint8_t *)dst, len);
+}
+
+uint8_t W5500Class::write(uint16_t _addr, uint8_t _cb, uint8_t _data)
+{
+#if defined(ARDUINO_ARCH_AVR)|| defined(ARDUINO_ARCH_SAMD)
+    setSS();  
+	//SerialUSB.println("dentro avr");
+    SPI.transfer(_addr >> 8);
+    SPI.transfer(_addr & 0xFF);
+    SPI.transfer(_cb);
+    SPI.transfer(_data);
+    resetSS();
+/*#elif defined(ARDUINO_ARCH_SAMD)
+	digitalWrite(slaveSelectPin, LOW);
+	//SerialUSB.println("dentro samd");
+    SPI.transfer(_addr >> 8);
+    SPI.transfer(_addr & 0xFF);
+    SPI.transfer(_cb);
+    SPI.transfer(_data);
+    digitalWrite(slaveSelectPin, HIGH);*/
+#else
+  SPI.transfer(SPI_CS, _addr >> 8, SPI_CONTINUE);
+  SPI.transfer(SPI_CS, _addr & 0xFF, SPI_CONTINUE);
+  SPI.transfer(SPI_CS, _cb, SPI_CONTINUE);
+  SPI.transfer(SPI_CS, _data);
+#endif    
+    return 1;
+}
+
+uint16_t W5500Class::write(uint16_t _addr, uint8_t _cb, const uint8_t *_buf, uint16_t _len)
+{
+#if defined(ARDUINO_ARCH_AVR)|| defined(ARDUINO_ARCH_SAMD)
+    setSS();
+    SPI.transfer(_addr >> 8);
+    SPI.transfer(_addr & 0xFF);
+    SPI.transfer(_cb);
+    for (uint16_t i=0; i<_len; i++){
+        SPI.transfer(_buf[i]);
+    }
+    resetSS();
+/*#elif defined(ARDUINO_ARCH_SAMD)
+	digitalWrite(slaveSelectPin, LOW);
+	SPI.transfer(_addr >> 8);
+    SPI.transfer(_addr & 0xFF);
+    SPI.transfer(_cb);
+    for (uint16_t i=0; i<_len; i++){
+        SPI.transfer(_buf[i]);
+    }
+    digitalWrite(slaveSelectPin, HIGH);*/
+#else
+  uint16_t i;
+  SPI.transfer(SPI_CS, _addr >> 8, SPI_CONTINUE);
+  SPI.transfer(SPI_CS, _addr & 0xFF, SPI_CONTINUE);
+  SPI.transfer(SPI_CS, _cb, SPI_CONTINUE);
+    for (i=0; i<_len-1; i++){
+	SPI.transfer(SPI_CS, _buf[i], SPI_CONTINUE);
+  }
+	SPI.transfer(SPI_CS, _buf[i]);
+
+#endif    
+    return _len;
+}
+
+uint8_t W5500Class::read(uint16_t _addr, uint8_t _cb)
+{
+#if defined(ARDUINO_ARCH_AVR) || defined(ARDUINO_ARCH_SAMD)
+    setSS();
+    SPI.transfer(_addr >> 8);
+    SPI.transfer(_addr & 0xFF);
+    SPI.transfer(_cb);
+    uint8_t _data = SPI.transfer(0);
+    resetSS();
+/*#elif defined(ARDUINO_ARCH_SAMD)
+	digitalWrite(slaveSelectPin, LOW);
+    SPI.transfer(_addr >> 8);
+    SPI.transfer(_addr & 0xFF);
+    SPI.transfer(_cb);
+    uint8_t _data = SPI.transfer(0);
+    digitalWrite(slaveSelectPin, HIGH);*/
+
+#else
+    SPI.transfer(SPI_CS, _addr >> 8, SPI_CONTINUE);
+    SPI.transfer(SPI_CS, _addr & 0xFF, SPI_CONTINUE);
+    SPI.transfer(SPI_CS, _cb, SPI_CONTINUE);
+    uint8_t _data = SPI.transfer(SPI_CS, 0);
+#endif    
+    return _data;
+}
+
+uint16_t W5500Class::read(uint16_t _addr, uint8_t _cb, uint8_t *_buf, uint16_t _len)
+{ 
+#if defined(ARDUINO_ARCH_AVR) || defined(ARDUINO_ARCH_SAMD)
+    setSS();
+    SPI.transfer(_addr >> 8);
+    SPI.transfer(_addr & 0xFF);
+    SPI.transfer(_cb);
+    for (uint16_t i=0; i<_len; i++){
+        _buf[i] = SPI.transfer(0);
+    }
+    resetSS();
+/*#elif defined(ARDUINO_ARCH_SAMD)
+	digitalWrite(slaveSelectPin, LOW);	
+    SPI.transfer(_addr >> 8);
+    SPI.transfer(_addr & 0xFF);
+    SPI.transfer(_cb);
+    for (uint16_t i=0; i<_len; i++){
+        _buf[i] = SPI.transfer(0);
+    }
+    digitalWrite(slaveSelectPin, HIGH);*/
+
+#else
+  	uint16_t i;
+    SPI.transfer(SPI_CS, _addr >> 8, SPI_CONTINUE);
+    SPI.transfer(SPI_CS, _addr & 0xFF, SPI_CONTINUE);
+    SPI.transfer(SPI_CS, _cb, SPI_CONTINUE);
+  for (i=0; i<_len-1; i++){
+    _buf[i] = SPI.transfer(SPI_CS, 0, SPI_CONTINUE);
+  }
+    _buf[_len-1] = SPI.transfer(SPI_CS, 0);
+	    
+
+#endif    
+    return _len;
+}
+
+void W5500Class::execCmdSn(SOCKET s, SockCMD _cmd) {
+    // Send command to socket
+    writeSnCR(s, _cmd);
+    // Wait for command to complete
+    while (readSnCR(s))
+    ;
+}
+//#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/w5500.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/w5500.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/w5500.h	(revision 136)
@@ -0,0 +1,437 @@
+/*
+* Copyright (c) 2010 by WIZnet <support@wiznet.co.kr>
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of either the GNU General Public License version 2
+ * or the GNU Lesser General Public License version 2.1, both as
+ * published by the Free Software Foundation.
+ *
+ * - 10 Apr. 2015
+ * Added support for Arduino Ethernet Shield 2
+ * by Arduino.org team
+ */
+
+#ifndef	W5500_H_INCLUDED
+#define	W5500_H_INCLUDED
+
+#define MAX_SOCK_NUM 8
+
+#include <SPI.h>
+
+typedef uint8_t SOCKET;
+/*
+class MR {
+public:
+  static const uint8_t RST   = 0x80;
+  static const uint8_t PB    = 0x10;
+  static const uint8_t PPPOE = 0x08;
+  static const uint8_t LB    = 0x04;
+  static const uint8_t AI    = 0x02;
+  static const uint8_t IND   = 0x01;
+};
+*/
+/*
+class IR {
+public:
+  static const uint8_t CONFLICT = 0x80;
+  static const uint8_t UNREACH  = 0x40;
+  static const uint8_t PPPoE    = 0x20;
+  static const uint8_t SOCK0    = 0x01;
+  static const uint8_t SOCK1    = 0x02;
+  static const uint8_t SOCK2    = 0x04;
+  static const uint8_t SOCK3    = 0x08;
+  static inline uint8_t SOCK(SOCKET ch) { return (0x01 << ch); };
+};
+*/
+
+class SnMR {
+public:
+  static const uint8_t CLOSE  = 0x00;
+  static const uint8_t TCP    = 0x01;
+  static const uint8_t UDP    = 0x02;
+  static const uint8_t IPRAW  = 0x03;
+  static const uint8_t MACRAW = 0x04;
+  static const uint8_t PPPOE  = 0x05;
+  static const uint8_t ND     = 0x20;
+  static const uint8_t MULTI  = 0x80;
+};
+
+enum SockCMD {
+  Sock_OPEN      = 0x01,
+  Sock_LISTEN    = 0x02,
+  Sock_CONNECT   = 0x04,
+  Sock_DISCON    = 0x08,
+  Sock_CLOSE     = 0x10,
+  Sock_SEND      = 0x20,
+  Sock_SEND_MAC  = 0x21,
+  Sock_SEND_KEEP = 0x22,
+  Sock_RECV      = 0x40
+};
+
+/*class SnCmd {
+public:
+  static const uint8_t OPEN      = 0x01;
+  static const uint8_t LISTEN    = 0x02;
+  static const uint8_t CONNECT   = 0x04;
+  static const uint8_t DISCON    = 0x08;
+  static const uint8_t CLOSE     = 0x10;
+  static const uint8_t SEND      = 0x20;
+  static const uint8_t SEND_MAC  = 0x21;
+  static const uint8_t SEND_KEEP = 0x22;
+  static const uint8_t RECV      = 0x40;
+};
+*/
+
+class SnIR {
+public:
+  static const uint8_t SEND_OK = 0x10;
+  static const uint8_t TIMEOUT = 0x08;
+  static const uint8_t RECV    = 0x04;
+  static const uint8_t DISCON  = 0x02;
+  static const uint8_t CON     = 0x01;
+};
+
+class SnSR {
+public:
+  static const uint8_t CLOSED      = 0x00;
+  static const uint8_t INIT        = 0x13;
+  static const uint8_t LISTEN      = 0x14;
+  static const uint8_t SYNSENT     = 0x15;
+  static const uint8_t SYNRECV     = 0x16;
+  static const uint8_t ESTABLISHED = 0x17;
+  static const uint8_t FIN_WAIT    = 0x18;
+  static const uint8_t CLOSING     = 0x1A;
+  static const uint8_t TIME_WAIT   = 0x1B;
+  static const uint8_t CLOSE_WAIT  = 0x1C;
+  static const uint8_t LAST_ACK    = 0x1D;
+  static const uint8_t UDP         = 0x22;
+  static const uint8_t IPRAW       = 0x32;
+  static const uint8_t MACRAW      = 0x42;
+  static const uint8_t PPPOE       = 0x5F;
+};
+
+class IPPROTO {
+public:
+  static const uint8_t IP   = 0;
+  static const uint8_t ICMP = 1;
+  static const uint8_t IGMP = 2;
+  static const uint8_t GGP  = 3;
+  static const uint8_t TCP  = 6;
+  static const uint8_t PUP  = 12;
+  static const uint8_t UDP  = 17;
+  static const uint8_t IDP  = 22;
+  static const uint8_t ND   = 77;
+  static const uint8_t RAW  = 255;
+};
+
+class W5500Class {
+
+public:
+  void init();
+
+  /**
+   * @brief	This function is being used for copy the data form Receive buffer of the chip to application buffer.
+   * 
+   * It calculate the actual physical address where one has to read
+   * the data from Receive buffer. Here also take care of the condition while it exceed
+   * the Rx memory uper-bound of socket.
+   */
+  void read_data(SOCKET s, volatile uint16_t  src, volatile uint8_t * dst, uint16_t len);
+  
+  /**
+   * @brief	 This function is being called by send() and sendto() function also. 
+   * 
+   * This function read the Tx write pointer register and after copy the data in buffer update the Tx write pointer
+   * register. User should read upper byte first and lower byte later to get proper value.
+   */
+  void send_data_processing(SOCKET s, const uint8_t *data, uint16_t len);
+  /**
+   * @brief A copy of send_data_processing that uses the provided ptr for the
+   *        write offset.  Only needed for the "streaming" UDP API, where
+   *        a single UDP packet is built up over a number of calls to
+   *        send_data_processing_ptr, because TX_WR doesn't seem to get updated
+   *        correctly in those scenarios
+   * @param ptr value to use in place of TX_WR.  If 0, then the value is read
+   *        in from TX_WR
+   * @return New value for ptr, to be used in the next call
+   */
+  // FIXME Update documentation
+  void send_data_processing_offset(SOCKET s, uint16_t data_offset, const uint8_t *data, uint16_t len);
+
+  /**
+   * @brief	This function is being called by recv() also.
+   * 
+   * This function read the Rx read pointer register
+   * and after copy the data from receive buffer update the Rx write pointer register.
+   * User should read upper byte first and lower byte later to get proper value.
+   */
+  void recv_data_processing(SOCKET s, uint8_t *data, uint16_t len, uint8_t peek = 0);
+
+  inline void setGatewayIp(uint8_t *_addr);
+  inline void getGatewayIp(uint8_t *_addr);
+
+  inline void setSubnetMask(uint8_t *_addr);
+  inline void getSubnetMask(uint8_t *_addr);
+
+  inline void setMACAddress(uint8_t * addr);
+  inline void getMACAddress(uint8_t * addr);
+
+  inline void setIPAddress(uint8_t * addr);
+  inline void getIPAddress(uint8_t * addr);
+
+  inline void setRetransmissionTime(uint16_t timeout);
+  inline void setRetransmissionCount(uint8_t _retry);
+
+  inline void setPHYCFGR(uint8_t _val);
+  inline uint8_t getPHYCFGR();
+
+  void execCmdSn(SOCKET s, SockCMD _cmd);
+  
+  uint16_t getTXFreeSize(SOCKET s);
+  uint16_t getRXReceivedSize(SOCKET s);
+  
+
+  // W5500 Registers
+  // ---------------
+private:
+  static uint8_t  write(uint16_t _addr, uint8_t _cb, uint8_t _data);
+  static uint16_t write(uint16_t _addr, uint8_t _cb, const uint8_t *buf, uint16_t len);
+  static uint8_t  read(uint16_t _addr, uint8_t _cb );
+  static uint16_t read(uint16_t _addr, uint8_t _cb, uint8_t *buf, uint16_t len);
+  
+#define __GP_REGISTER8(name, address)             \
+  static inline void write##name(uint8_t _data) { \
+    write(address, 0x04, _data);                  \
+  }                                               \
+  static inline uint8_t read##name() {            \
+    return read(address, 0x00);                   \
+  }
+#define __GP_REGISTER16(name, address)            \
+  static void write##name(uint16_t _data) {       \
+    write(address,  0x04, _data >> 8);            \
+    write(address+1, 0x04, _data & 0xFF);         \
+  }                                               \
+  static uint16_t read##name() {                  \
+    uint16_t res = read(address, 0x00);           \
+    res = (res << 8) + read(address + 1, 0x00);   \
+    return res;                                   \
+  }
+#define __GP_REGISTER_N(name, address, size)      \
+  static uint16_t write##name(uint8_t *_buff) {   \
+    return write(address, 0x04, _buff, size);     \
+  }                                               \
+  static uint16_t read##name(uint8_t *_buff) {    \
+    return read(address, 0x00, _buff, size);      \
+  }
+
+public:
+  __GP_REGISTER8 (MR,     0x0000);    // Mode
+  __GP_REGISTER_N(GAR,    0x0001, 4); // Gateway IP address
+  __GP_REGISTER_N(SUBR,   0x0005, 4); // Subnet mask address
+  __GP_REGISTER_N(SHAR,   0x0009, 6); // Source MAC address
+  __GP_REGISTER_N(SIPR,   0x000F, 4); // Source IP address
+  __GP_REGISTER8 (IR,     0x0015);    // Interrupt
+  __GP_REGISTER8 (IMR,    0x0016);    // Interrupt Mask
+  __GP_REGISTER16(RTR,    0x0019);    // Timeout address
+  __GP_REGISTER8 (RCR,    0x001B);    // Retry count
+  __GP_REGISTER_N(UIPR,   0x0028, 4); // Unreachable IP address in UDP mode
+  __GP_REGISTER16(UPORT,  0x002C);    // Unreachable Port address in UDP mode
+  __GP_REGISTER8 (PHYCFGR,     0x002E);    // PHY Configuration register, default value: 0b 1011 1xxx
+
+  
+#undef __GP_REGISTER8
+#undef __GP_REGISTER16
+#undef __GP_REGISTER_N
+
+  // W5500 Socket registers
+  // ----------------------
+private:
+  static inline uint8_t readSn(SOCKET _s, uint16_t _addr);
+  static inline uint8_t writeSn(SOCKET _s, uint16_t _addr, uint8_t _data);
+  static inline uint16_t readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len);
+  static inline uint16_t writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len);
+
+  //static const uint16_t CH_BASE = 0x0000;
+  //static const uint16_t CH_SIZE = 0x0000;
+
+#define __SOCKET_REGISTER8(name, address)                    \
+  static inline void write##name(SOCKET _s, uint8_t _data) { \
+    writeSn(_s, address, _data);                             \
+  }                                                          \
+  static inline uint8_t read##name(SOCKET _s) {              \
+    return readSn(_s, address);                              \
+  }
+#if defined(REL_GR_KURUMI) || defined(REL_GR_KURUMI_PROTOTYPE)  
+#define __SOCKET_REGISTER16(name, address)                   \
+  static void write##name(SOCKET _s, uint16_t _data) {       \
+    writeSn(_s, address,   _data >> 8);                      \
+    writeSn(_s, address+1, _data & 0xFF);                    \
+  }                                                          \
+  static uint16_t read##name(SOCKET _s) {                    \
+    uint16_t res = readSn(_s, address);                      \
+    uint16_t res2 = readSn(_s,address + 1);                  \
+    res = res << 8;                                          \
+    res2 = res2 & 0xFF;                                      \
+    res = res | res2;                                        \
+    return res;                                              \
+  }
+#else
+#define __SOCKET_REGISTER16(name, address)                   \
+  static void write##name(SOCKET _s, uint16_t _data) {       \
+    writeSn(_s, address,   _data >> 8);                      \
+    writeSn(_s, address+1, _data & 0xFF);                    \
+  }                                                          \
+  static uint16_t read##name(SOCKET _s) {                    \
+    uint16_t res = readSn(_s, address);                      \
+    res = (res << 8) + readSn(_s, address + 1);              \
+    return res;                                              \
+  }
+#endif  
+#define __SOCKET_REGISTER_N(name, address, size)             \
+  static uint16_t write##name(SOCKET _s, uint8_t *_buff) {   \
+    return writeSn(_s, address, _buff, size);                \
+  }                                                          \
+  static uint16_t read##name(SOCKET _s, uint8_t *_buff) {    \
+    return readSn(_s, address, _buff, size);                 \
+  }
+  
+public:
+  __SOCKET_REGISTER8(SnMR,        0x0000)        // Mode
+  __SOCKET_REGISTER8(SnCR,        0x0001)        // Command
+  __SOCKET_REGISTER8(SnIR,        0x0002)        // Interrupt
+  __SOCKET_REGISTER8(SnSR,        0x0003)        // Status
+  __SOCKET_REGISTER16(SnPORT,     0x0004)        // Source Port
+  __SOCKET_REGISTER_N(SnDHAR,     0x0006, 6)     // Destination Hardw Addr
+  __SOCKET_REGISTER_N(SnDIPR,     0x000C, 4)     // Destination IP Addr
+  __SOCKET_REGISTER16(SnDPORT,    0x0010)        // Destination Port
+  __SOCKET_REGISTER16(SnMSSR,     0x0012)        // Max Segment Size
+  __SOCKET_REGISTER8(SnPROTO,     0x0014)        // Protocol in IP RAW Mode
+  __SOCKET_REGISTER8(SnTOS,       0x0015)        // IP TOS
+  __SOCKET_REGISTER8(SnTTL,       0x0016)        // IP TTL
+  __SOCKET_REGISTER16(SnTX_FSR,   0x0020)        // TX Free Size
+  __SOCKET_REGISTER16(SnTX_RD,    0x0022)        // TX Read Pointer
+  __SOCKET_REGISTER16(SnTX_WR,    0x0024)        // TX Write Pointer
+  __SOCKET_REGISTER16(SnRX_RSR,   0x0026)        // RX Free Size
+  __SOCKET_REGISTER16(SnRX_RD,    0x0028)        // RX Read Pointer
+  __SOCKET_REGISTER16(SnRX_WR,    0x002A)        // RX Write Pointer (supported?)
+  
+#undef __SOCKET_REGISTER8
+#undef __SOCKET_REGISTER16
+#undef __SOCKET_REGISTER_N
+
+
+private:
+  static const uint8_t  RST = 7; // Reset BIT
+  static const int SOCKETS = 8;
+
+public:
+  static const uint16_t SSIZE = 2048; // Max Tx buffer size
+private:
+  static const uint16_t RSIZE = 2048; // Max Rx buffer size
+
+private:
+#if defined(ARDUINO_ARCH_AVR)
+#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1284P__)
+  inline static void initSS()    { DDRB  |=  _BV(4); };
+  inline static void setSS()     { PORTB &= ~_BV(4); };
+  inline static void resetSS()   { PORTB |=  _BV(4); };
+#elif defined(__AVR_ATmega32U4__)
+  inline static void initSS()    { DDRB  |=  _BV(6); };
+  inline static void setSS()     { PORTB &= ~_BV(6); };
+  inline static void resetSS()   { PORTB |=  _BV(6); }; 
+#elif defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB162__)
+  inline static void initSS()    { DDRB  |=  _BV(0); };
+  inline static void setSS()     { PORTB &= ~_BV(0); };
+  inline static void resetSS()   { PORTB |=  _BV(0); }; 
+#elif defined(REL_GR_KURUMI) || defined(REL_GR_KURUMI_PROTOTYPE)
+  inline static void initSS()    { pinMode(SS, OUTPUT); 
+                                   digitalWrite(SS, HIGH); };
+  inline static void setSS()     { digitalWrite(SS, LOW); };
+  inline static void resetSS()   { digitalWrite(SS, HIGH); };
+#else
+  inline static void initSS()    { DDRB  |=  _BV(2); };
+  inline static void setSS()     { PORTB &= ~_BV(2); };
+  inline static void resetSS()   { PORTB |=  _BV(2); };
+#endif
+#elif defined(ARDUINO_ARCH_SAMD) 
+  inline static void initSS()    { PORT->Group[g_APinDescription[10].ulPort].PINCFG[g_APinDescription[10].ulPin].reg&=~(uint8_t)(PORT_PINCFG_INEN) ;
+								   PORT->Group[g_APinDescription[10].ulPort].DIRSET.reg = (uint32_t)(1<<g_APinDescription[10].ulPin) ;
+								   PORT->Group[g_APinDescription[10].ulPort].PINCFG[g_APinDescription[10].ulPin].reg=(uint8_t)(PORT_PINCFG_PULLEN) ;
+                                   PORT->Group[g_APinDescription[10].ulPort].OUTSET.reg = (1ul << g_APinDescription[10].ulPin) ; };
+  inline static void setSS()     { PORT->Group[g_APinDescription[10].ulPort].OUTCLR.reg = (1ul << g_APinDescription[10].ulPin) ; };
+  inline static void resetSS()   { PORT->Group[g_APinDescription[10].ulPort].OUTSET.reg = (1ul << g_APinDescription[10].ulPin) ; };
+#endif // ARDUINO_ARCH_AVR
+};
+
+extern W5500Class w5500;
+
+uint8_t W5500Class::readSn(SOCKET _s, uint16_t _addr) {
+    uint8_t cntl_byte = (_s<<5)+0x08;
+    return read(_addr, cntl_byte);
+}
+
+uint8_t W5500Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t _data) {
+    uint8_t cntl_byte = (_s<<5)+0x0C;
+    return write(_addr, cntl_byte, _data);
+}
+
+uint16_t W5500Class::readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) {
+    uint8_t cntl_byte = (_s<<5)+0x08;
+    return read(_addr, cntl_byte, _buf, _len );
+}
+
+uint16_t W5500Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) {
+    uint8_t cntl_byte = (_s<<5)+0x0C;
+    return write(_addr, cntl_byte, _buf, _len);
+}
+
+void W5500Class::getGatewayIp(uint8_t *_addr) {
+  readGAR(_addr);
+}
+
+void W5500Class::setGatewayIp(uint8_t *_addr) {
+  writeGAR(_addr);
+}
+
+void W5500Class::getSubnetMask(uint8_t *_addr) {
+  readSUBR(_addr);
+}
+
+void W5500Class::setSubnetMask(uint8_t *_addr) {
+  writeSUBR(_addr);
+}
+
+void W5500Class::getMACAddress(uint8_t *_addr) {
+  readSHAR(_addr);
+}
+
+void W5500Class::setMACAddress(uint8_t *_addr) {
+  writeSHAR(_addr);
+}
+
+void W5500Class::getIPAddress(uint8_t *_addr) {
+  readSIPR(_addr);
+}
+
+void W5500Class::setIPAddress(uint8_t *_addr) {
+  writeSIPR(_addr);
+}
+
+void W5500Class::setRetransmissionTime(uint16_t _timeout) {
+  writeRTR(_timeout);
+}
+
+void W5500Class::setRetransmissionCount(uint8_t _retry) {
+  writeRCR(_retry);
+}
+
+void W5500Class::setPHYCFGR(uint8_t _val) {
+  writePHYCFGR(_val);
+}
+
+uint8_t W5500Class::getPHYCFGR() {
+//  readPHYCFGR();
+  return read(0x002E, 0x00);
+}
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Firmata Library for Arduino =
+
+The Firmata library implements the Firmata protocol for communicating with software on the host computer. This allows you to write custom firmware without having to create your own protocol and objects for the programming environment that you are using. 
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/Firmata
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/AllInputsFirmata/AllInputsFirmata.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/AllInputsFirmata/AllInputsFirmata.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/AllInputsFirmata/AllInputsFirmata.ino	(revision 136)
@@ -0,0 +1,90 @@
+/*
+ * Firmata is a generic protocol for communicating with microcontrollers
+ * from software on a host computer. It is intended to work with
+ * any host computer software package.
+ *
+ * To download a host software package, please clink on the following link
+ * to open the download page in your default browser.
+ *
+ * http://firmata.org/wiki/Download
+ */
+
+/*
+ * This firmware reads all inputs and sends them as fast as it can.  It was
+ * inspired by the ease-of-use of the Arduino2Max program.
+ *
+ * This example code is in the public domain.
+ */
+#include <Firmata.h>
+
+byte pin;
+
+int analogValue;
+int previousAnalogValues[TOTAL_ANALOG_PINS];
+
+byte portStatus[TOTAL_PORTS];	// each bit: 1=pin is digital input, 0=other/ignore
+byte previousPINs[TOTAL_PORTS];
+
+/* timer variables */
+unsigned long currentMillis;     // store the current value from millis()
+unsigned long previousMillis;    // for comparison with currentMillis
+/* make sure that the FTDI buffer doesn't go over 60 bytes, otherwise you
+   get long, random delays.  So only read analogs every 20ms or so */
+int samplingInterval = 19;      // how often to run the main loop (in ms)
+
+void sendPort(byte portNumber, byte portValue)
+{
+  portValue = portValue & portStatus[portNumber];
+  if (previousPINs[portNumber] != portValue) {
+    Firmata.sendDigitalPort(portNumber, portValue);
+    previousPINs[portNumber] = portValue;
+  }
+}
+
+void setup()
+{
+  byte i, port, status;
+
+  Firmata.setFirmwareVersion(0, 1);
+
+  for (pin = 0; pin < TOTAL_PINS; pin++) {
+    if IS_PIN_DIGITAL(pin) pinMode(PIN_TO_DIGITAL(pin), INPUT);
+  }
+
+  for (port = 0; port < TOTAL_PORTS; port++) {
+    status = 0;
+    for (i = 0; i < 8; i++) {
+      if (IS_PIN_DIGITAL(port * 8 + i)) status |= (1 << i);
+    }
+    portStatus[port] = status;
+  }
+
+  Firmata.begin(57600);
+}
+
+void loop()
+{
+  byte i;
+
+  for (i = 0; i < TOTAL_PORTS; i++) {
+    sendPort(i, readPort(i, 0xff));
+  }
+  /* make sure that the FTDI buffer doesn't go over 60 bytes, otherwise you
+     get long, random delays.  So only read analogs every 20ms or so */
+  currentMillis = millis();
+  if (currentMillis - previousMillis > samplingInterval) {
+    previousMillis += samplingInterval;
+    while (Firmata.available()) {
+      Firmata.processInput();
+    }
+    for (pin = 0; pin < TOTAL_ANALOG_PINS; pin++) {
+      analogValue = analogRead(pin);
+      if (analogValue != previousAnalogValues[pin]) {
+        Firmata.sendAnalog(pin, analogValue);
+        previousAnalogValues[pin] = analogValue;
+      }
+    }
+  }
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/AnalogFirmata/AnalogFirmata.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/AnalogFirmata/AnalogFirmata.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/AnalogFirmata/AnalogFirmata.ino	(revision 136)
@@ -0,0 +1,94 @@
+/*
+ * Firmata is a generic protocol for communicating with microcontrollers
+ * from software on a host computer. It is intended to work with
+ * any host computer software package.
+ *
+ * To download a host software package, please clink on the following link
+ * to open the download page in your default browser.
+ *
+ * http://firmata.org/wiki/Download
+ */
+
+/* This firmware supports as many analog ports as possible, all analog inputs,
+ * four PWM outputs, and two with servo support.
+ *
+ * This example code is in the public domain.
+ */
+#include <Servo.h>
+#include <Firmata.h>
+
+/*==============================================================================
+ * GLOBAL VARIABLES
+ *============================================================================*/
+
+/* servos */
+Servo servo9, servo10; // one instance per pin
+/* analog inputs */
+int analogInputsToReport = 0; // bitwise array to store pin reporting
+int analogPin = 0; // counter for reading analog pins
+/* timer variables */
+unsigned long currentMillis;     // store the current value from millis()
+unsigned long previousMillis;    // for comparison with currentMillis
+
+
+/*==============================================================================
+ * FUNCTIONS
+ *============================================================================*/
+
+void analogWriteCallback(byte pin, int value)
+{
+  switch (pin) {
+    case 9: servo9.write(value); break;
+    case 10: servo10.write(value); break;
+    case 3:
+    case 5:
+    case 6:
+    case 11: // PWM pins
+      analogWrite(pin, value);
+      break;
+  }
+}
+// -----------------------------------------------------------------------------
+// sets bits in a bit array (int) to toggle the reporting of the analogIns
+void reportAnalogCallback(byte pin, int value)
+{
+  if (value == 0) {
+    analogInputsToReport = analogInputsToReport &~ (1 << pin);
+  }
+  else { // everything but 0 enables reporting of that pin
+    analogInputsToReport = analogInputsToReport | (1 << pin);
+  }
+  // TODO: save status to EEPROM here, if changed
+}
+
+/*==============================================================================
+ * SETUP()
+ *============================================================================*/
+void setup()
+{
+  Firmata.setFirmwareVersion(0, 2);
+  Firmata.attach(ANALOG_MESSAGE, analogWriteCallback);
+  Firmata.attach(REPORT_ANALOG, reportAnalogCallback);
+
+  servo9.attach(9);
+  servo10.attach(10);
+  Firmata.begin(57600);
+}
+
+/*==============================================================================
+ * LOOP()
+ *============================================================================*/
+void loop()
+{
+  while (Firmata.available())
+    Firmata.processInput();
+  currentMillis = millis();
+  if (currentMillis - previousMillis > 20) {
+    previousMillis += 20;                   // run this every 20ms
+    for (analogPin = 0; analogPin < TOTAL_ANALOG_PINS; analogPin++) {
+      if ( analogInputsToReport & (1 << analogPin) )
+        Firmata.sendAnalog(analogPin, analogRead(analogPin));
+    }
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/EchoString/EchoString.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/EchoString/EchoString.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/EchoString/EchoString.ino	(revision 136)
@@ -0,0 +1,44 @@
+/*
+ * Firmata is a generic protocol for communicating with microcontrollers
+ * from software on a host computer. It is intended to work with
+ * any host computer software package.
+ *
+ * To download a host software package, please clink on the following link
+ * to open the download page in your default browser.
+ *
+ * http://firmata.org/wiki/Download
+ */
+
+/* This sketch accepts strings and raw sysex messages and echos them back.
+ *
+ * This example code is in the public domain.
+ */
+#include <Firmata.h>
+
+void stringCallback(char *myString)
+{
+  Firmata.sendString(myString);
+}
+
+
+void sysexCallback(byte command, byte argc, byte*argv)
+{
+  Firmata.sendSysex(command, argc, argv);
+}
+
+void setup()
+{
+  Firmata.setFirmwareVersion(0, 1);
+  Firmata.attach(STRING_DATA, stringCallback);
+  Firmata.attach(START_SYSEX, sysexCallback);
+  Firmata.begin(57600);
+}
+
+void loop()
+{
+  while (Firmata.available()) {
+    Firmata.processInput();
+  }
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/OldStandardFirmata/LICENSE.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/OldStandardFirmata/LICENSE.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/OldStandardFirmata/LICENSE.txt	(revision 136)
@@ -0,0 +1,466 @@
+
+		  GNU LESSER GENERAL PUBLIC LICENSE
+		       Version 2.1, February 1999
+
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Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/OldStandardFirmata/OldStandardFirmata.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/OldStandardFirmata/OldStandardFirmata.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/OldStandardFirmata/OldStandardFirmata.ino	(revision 136)
@@ -0,0 +1,239 @@
+/*
+ * Firmata is a generic protocol for communicating with microcontrollers
+ * from software on a host computer. It is intended to work with
+ * any host computer software package.
+ *
+ * To download a host software package, please clink on the following link
+ * to open the download page in your default browser.
+ *
+ * http://firmata.org/wiki/Download
+ */
+
+/*
+  Copyright (C) 2006-2008 Hans-Christoph Steiner.  All rights reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  See file LICENSE.txt for further informations on licensing terms.
+ */
+
+/*
+ * This is an old version of StandardFirmata (v2.0).  It is kept here because
+ * its the last version that works on an ATMEGA8 chip.  Also, it can be used
+ * for host software that has not been updated to a newer version of the
+ * protocol.  It also uses the old baud rate of 115200 rather than 57600.
+ */
+
+#include <EEPROM.h>
+#include <Firmata.h>
+
+/*==============================================================================
+ * GLOBAL VARIABLES
+ *============================================================================*/
+
+/* analog inputs */
+int analogInputsToReport = 0; // bitwise array to store pin reporting
+int analogPin = 0; // counter for reading analog pins
+
+/* digital pins */
+byte reportPINs[TOTAL_PORTS];   // PIN == input port
+byte previousPINs[TOTAL_PORTS]; // PIN == input port
+byte pinStatus[TOTAL_PINS]; // store pin status, default OUTPUT
+byte portStatus[TOTAL_PORTS];
+
+/* timer variables */
+unsigned long currentMillis;     // store the current value from millis()
+unsigned long previousMillis;    // for comparison with currentMillis
+
+
+/*==============================================================================
+ * FUNCTIONS
+ *============================================================================*/
+
+void outputPort(byte portNumber, byte portValue)
+{
+  portValue = portValue &~ portStatus[portNumber];
+  if (previousPINs[portNumber] != portValue) {
+    Firmata.sendDigitalPort(portNumber, portValue);
+    previousPINs[portNumber] = portValue;
+    Firmata.sendDigitalPort(portNumber, portValue);
+  }
+}
+
+/* -----------------------------------------------------------------------------
+ * check all the active digital inputs for change of state, then add any events
+ * to the Serial output queue using Serial.print() */
+void checkDigitalInputs(void)
+{
+  byte i, tmp;
+  for (i = 0; i < TOTAL_PORTS; i++) {
+    if (reportPINs[i]) {
+      switch (i) {
+        case 0: outputPort(0, PIND &~ B00000011); break; // ignore Rx/Tx 0/1
+        case 1: outputPort(1, PINB); break;
+        case 2: outputPort(2, PINC); break;
+      }
+    }
+  }
+}
+
+// -----------------------------------------------------------------------------
+/* sets the pin mode to the correct state and sets the relevant bits in the
+ * two bit-arrays that track Digital I/O and PWM status
+ */
+void setPinModeCallback(byte pin, int mode) {
+  byte port = 0;
+  byte offset = 0;
+
+  if (pin < 8) {
+    port = 0;
+    offset = 0;
+  } else if (pin < 14) {
+    port = 1;
+    offset = 8;
+  } else if (pin < 22) {
+    port = 2;
+    offset = 14;
+  }
+
+  if (pin > 1) { // ignore RxTx (pins 0 and 1)
+    pinStatus[pin] = mode;
+    switch (mode) {
+      case INPUT:
+        pinMode(pin, INPUT);
+        portStatus[port] = portStatus[port] &~ (1 << (pin - offset));
+        break;
+      case OUTPUT:
+        digitalWrite(pin, LOW); // disable PWM
+      case PWM:
+        pinMode(pin, OUTPUT);
+        portStatus[port] = portStatus[port] | (1 << (pin - offset));
+        break;
+        //case ANALOG: // TODO figure this out
+      default:
+        Firmata.sendString("");
+    }
+    // TODO: save status to EEPROM here, if changed
+  }
+}
+
+void analogWriteCallback(byte pin, int value)
+{
+  setPinModeCallback(pin, PWM);
+  analogWrite(pin, value);
+}
+
+void digitalWriteCallback(byte port, int value)
+{
+  switch (port) {
+    case 0: // pins 2-7 (don't change Rx/Tx, pins 0 and 1)
+      // 0xFF03 == B1111111100000011    0x03 == B00000011
+      PORTD = (value &~ 0xFF03) | (PORTD & 0x03);
+      break;
+    case 1: // pins 8-13 (14,15 are disabled for the crystal)
+      PORTB = (byte)value;
+      break;
+    case 2: // analog pins used as digital
+      PORTC = (byte)value;
+      break;
+  }
+}
+
+// -----------------------------------------------------------------------------
+/* sets bits in a bit array (int) to toggle the reporting of the analogIns
+ */
+//void FirmataClass::setAnalogPinReporting(byte pin, byte state) {
+//}
+void reportAnalogCallback(byte pin, int value)
+{
+  if (value == 0) {
+    analogInputsToReport = analogInputsToReport &~ (1 << pin);
+  }
+  else { // everything but 0 enables reporting of that pin
+    analogInputsToReport = analogInputsToReport | (1 << pin);
+  }
+  // TODO: save status to EEPROM here, if changed
+}
+
+void reportDigitalCallback(byte port, int value)
+{
+  reportPINs[port] = (byte)value;
+  if (port == 2) // turn off analog reporting when used as digital
+    analogInputsToReport = 0;
+}
+
+/*==============================================================================
+ * SETUP()
+ *============================================================================*/
+void setup()
+{
+  byte i;
+
+  Firmata.setFirmwareVersion(2, 0);
+
+  Firmata.attach(ANALOG_MESSAGE, analogWriteCallback);
+  Firmata.attach(DIGITAL_MESSAGE, digitalWriteCallback);
+  Firmata.attach(REPORT_ANALOG, reportAnalogCallback);
+  Firmata.attach(REPORT_DIGITAL, reportDigitalCallback);
+  Firmata.attach(SET_PIN_MODE, setPinModeCallback);
+
+  portStatus[0] = B00000011;  // ignore Tx/RX pins
+  portStatus[1] = B11000000;  // ignore 14/15 pins
+  portStatus[2] = B00000000;
+
+  //    for(i=0; i<TOTAL_PINS; ++i) { // TODO make this work with analogs
+  for (i = 0; i < 14; ++i) {
+    setPinModeCallback(i, OUTPUT);
+  }
+  // set all outputs to 0 to make sure internal pull-up resistors are off
+  PORTB = 0; // pins 8-15
+  PORTC = 0; // analog port
+  PORTD = 0; // pins 0-7
+
+  // TODO rethink the init, perhaps it should report analog on default
+  for (i = 0; i < TOTAL_PORTS; ++i) {
+    reportPINs[i] = false;
+  }
+  // TODO: load state from EEPROM here
+
+  /* send digital inputs here, if enabled, to set the initial state on the
+   * host computer, since once in the loop(), this firmware will only send
+   * digital data on change. */
+  if (reportPINs[0]) outputPort(0, PIND &~ B00000011); // ignore Rx/Tx 0/1
+  if (reportPINs[1]) outputPort(1, PINB);
+  if (reportPINs[2]) outputPort(2, PINC);
+
+  Firmata.begin(115200);
+}
+
+/*==============================================================================
+ * LOOP()
+ *============================================================================*/
+void loop()
+{
+  /* DIGITALREAD - as fast as possible, check for changes and output them to the
+   * FTDI buffer using Serial.print()  */
+  checkDigitalInputs();
+  currentMillis = millis();
+  if (currentMillis - previousMillis > 20) {
+    previousMillis += 20;     // run this every 20ms
+    /* SERIALREAD - Serial.read() uses a 128 byte circular buffer, so handle
+     * all serialReads at once, i.e. empty the buffer */
+    while (Firmata.available())
+      Firmata.processInput();
+    /* SEND FTDI WRITE BUFFER - make sure that the FTDI buffer doesn't go over
+     * 60 bytes. use a timer to sending an event character every 4 ms to
+     * trigger the buffer to dump. */
+
+    /* ANALOGREAD - right after the event character, do all of the
+     * analogReads().  These only need to be done every 4ms. */
+    for (analogPin = 0; analogPin < TOTAL_ANALOG_PINS; analogPin++) {
+      if ( analogInputsToReport & (1 << analogPin) ) {
+        Firmata.sendAnalog(analogPin, analogRead(analogPin));
+      }
+    }
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/ServoFirmata/ServoFirmata.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/ServoFirmata/ServoFirmata.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/ServoFirmata/ServoFirmata.ino	(revision 136)
@@ -0,0 +1,53 @@
+/*
+ * Firmata is a generic protocol for communicating with microcontrollers
+ * from software on a host computer. It is intended to work with
+ * any host computer software package.
+ *
+ * To download a host software package, please clink on the following link
+ * to open the download page in your default browser.
+ *
+ * http://firmata.org/wiki/Download
+ */
+
+/* This firmware supports as many servos as possible using the Servo library
+ * included in Arduino 0017
+ *
+ * TODO add message to configure minPulse/maxPulse/degrees
+ *
+ * This example code is in the public domain.
+ */
+
+#include <Servo.h>
+#include <Firmata.h>
+
+Servo servos[MAX_SERVOS];
+
+void analogWriteCallback(byte pin, int value)
+{
+  if (IS_PIN_SERVO(pin)) {
+    servos[PIN_TO_SERVO(pin)].write(value);
+  }
+}
+
+void setup()
+{
+  byte pin;
+
+  Firmata.setFirmwareVersion(0, 2);
+  Firmata.attach(ANALOG_MESSAGE, analogWriteCallback);
+
+  for (pin = 0; pin < TOTAL_PINS; pin++) {
+    if (IS_PIN_SERVO(pin)) {
+      servos[PIN_TO_SERVO(pin)].attach(PIN_TO_DIGITAL(pin));
+    }
+  }
+
+  Firmata.begin(57600);
+}
+
+void loop()
+{
+  while (Firmata.available())
+    Firmata.processInput();
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/SimpleAnalogFirmata/SimpleAnalogFirmata.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/SimpleAnalogFirmata/SimpleAnalogFirmata.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/SimpleAnalogFirmata/SimpleAnalogFirmata.ino	(revision 136)
@@ -0,0 +1,46 @@
+/*
+ * Firmata is a generic protocol for communicating with microcontrollers
+ * from software on a host computer. It is intended to work with
+ * any host computer software package.
+ *
+ * To download a host software package, please clink on the following link
+ * to open the download page in your default browser.
+ *
+ * http://firmata.org/wiki/Download
+ */
+
+/* Supports as many analog inputs and analog PWM outputs as possible.
+ *
+ * This example code is in the public domain.
+ */
+#include <Firmata.h>
+
+byte analogPin = 0;
+
+void analogWriteCallback(byte pin, int value)
+{
+  if (IS_PIN_PWM(pin)) {
+    pinMode(PIN_TO_DIGITAL(pin), OUTPUT);
+    analogWrite(PIN_TO_PWM(pin), value);
+  }
+}
+
+void setup()
+{
+  Firmata.setFirmwareVersion(0, 1);
+  Firmata.attach(ANALOG_MESSAGE, analogWriteCallback);
+  Firmata.begin(57600);
+}
+
+void loop()
+{
+  while (Firmata.available()) {
+    Firmata.processInput();
+  }
+  // do one analogRead per loop, so if PC is sending a lot of
+  // analog write messages, we will only delay 1 analogRead
+  Firmata.sendAnalog(analogPin, analogRead(analogPin));
+  analogPin = analogPin + 1;
+  if (analogPin >= TOTAL_ANALOG_PINS) analogPin = 0;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/SimpleDigitalFirmata/SimpleDigitalFirmata.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/SimpleDigitalFirmata/SimpleDigitalFirmata.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/SimpleDigitalFirmata/SimpleDigitalFirmata.ino	(revision 136)
@@ -0,0 +1,72 @@
+/*
+ * Firmata is a generic protocol for communicating with microcontrollers
+ * from software on a host computer. It is intended to work with
+ * any host computer software package.
+ *
+ * To download a host software package, please clink on the following link
+ * to open the download page in your default browser.
+ *
+ * http://firmata.org/wiki/Download
+ */
+
+/* Supports as many digital inputs and outputs as possible.
+ *
+ * This example code is in the public domain.
+ */
+#include <Firmata.h>
+
+byte previousPIN[TOTAL_PORTS];  // PIN means PORT for input
+byte previousPORT[TOTAL_PORTS];
+
+void outputPort(byte portNumber, byte portValue)
+{
+  // only send the data when it changes, otherwise you get too many messages!
+  if (previousPIN[portNumber] != portValue) {
+    Firmata.sendDigitalPort(portNumber, portValue);
+    previousPIN[portNumber] = portValue;
+  }
+}
+
+void setPinModeCallback(byte pin, int mode) {
+  if (IS_PIN_DIGITAL(pin)) {
+    pinMode(PIN_TO_DIGITAL(pin), mode);
+  }
+}
+
+void digitalWriteCallback(byte port, int value)
+{
+  byte i;
+  byte currentPinValue, previousPinValue;
+
+  if (port < TOTAL_PORTS && value != previousPORT[port]) {
+    for (i = 0; i < 8; i++) {
+      currentPinValue = (byte) value & (1 << i);
+      previousPinValue = previousPORT[port] & (1 << i);
+      if (currentPinValue != previousPinValue) {
+        digitalWrite(i + (port * 8), currentPinValue);
+      }
+    }
+    previousPORT[port] = value;
+  }
+}
+
+void setup()
+{
+  Firmata.setFirmwareVersion(0, 1);
+  Firmata.attach(DIGITAL_MESSAGE, digitalWriteCallback);
+  Firmata.attach(SET_PIN_MODE, setPinModeCallback);
+  Firmata.begin(57600);
+}
+
+void loop()
+{
+  byte i;
+
+  for (i = 0; i < TOTAL_PORTS; i++) {
+    outputPort(i, readPort(i, 0xff));
+  }
+
+  while (Firmata.available()) {
+    Firmata.processInput();
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/StandardFirmata/LICENSE.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/StandardFirmata/LICENSE.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/StandardFirmata/LICENSE.txt	(revision 136)
@@ -0,0 +1,466 @@
+
+		  GNU LESSER GENERAL PUBLIC LICENSE
+		       Version 2.1, February 1999
+
+ Copyright (C) 1991, 1999 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+[This is the first released version of the Lesser GPL.  It also counts
+ as the successor of the GNU Library Public License, version 2, hence
+ the version number 2.1.]
+
+			    Preamble
+
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+
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+can use it too, but we suggest you first think carefully about whether
+this license or the ordinary General Public License is the better
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+
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Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/StandardFirmata/StandardFirmata.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/StandardFirmata/StandardFirmata.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/examples/StandardFirmata/StandardFirmata.ino	(revision 136)
@@ -0,0 +1,640 @@
+/*
+ * Firmata is a generic protocol for communicating with microcontrollers
+ * from software on a host computer. It is intended to work with
+ * any host computer software package.
+ *
+ * To download a host software package, please clink on the following link
+ * to open the download page in your default browser.
+ *
+ * http://firmata.org/wiki/Download
+ */
+
+/*
+  Copyright (C) 2006-2008 Hans-Christoph Steiner.  All rights reserved.
+  Copyright (C) 2010-2011 Paul Stoffregen.  All rights reserved.
+  Copyright (C) 2009 Shigeru Kobayashi.  All rights reserved.
+  Copyright (C) 2009-2011 Jeff Hoefs.  All rights reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  See file LICENSE.txt for further informations on licensing terms.
+
+  formatted using the GNU C formatting and indenting
+*/
+
+/*
+ * TODO: use Program Control to load stored profiles from EEPROM
+ */
+
+#include <Servo.h>
+#include <Wire.h>
+#include <Firmata.h>
+
+// move the following defines to Firmata.h?
+#define I2C_WRITE B00000000
+#define I2C_READ B00001000
+#define I2C_READ_CONTINUOUSLY B00010000
+#define I2C_STOP_READING B00011000
+#define I2C_READ_WRITE_MODE_MASK B00011000
+#define I2C_10BIT_ADDRESS_MODE_MASK B00100000
+
+#define MAX_QUERIES 8
+#define MINIMUM_SAMPLING_INTERVAL 10
+
+#define REGISTER_NOT_SPECIFIED -1
+
+/*==============================================================================
+ * GLOBAL VARIABLES
+ *============================================================================*/
+
+/* analog inputs */
+int analogInputsToReport = 0; // bitwise array to store pin reporting
+
+/* digital input ports */
+byte reportPINs[TOTAL_PORTS];       // 1 = report this port, 0 = silence
+byte previousPINs[TOTAL_PORTS];     // previous 8 bits sent
+
+/* pins configuration */
+byte pinConfig[TOTAL_PINS];         // configuration of every pin
+byte portConfigInputs[TOTAL_PORTS]; // each bit: 1 = pin in INPUT, 0 = anything else
+int pinState[TOTAL_PINS];           // any value that has been written
+
+/* timer variables */
+unsigned long currentMillis;        // store the current value from millis()
+unsigned long previousMillis;       // for comparison with currentMillis
+int samplingInterval = 19;          // how often to run the main loop (in ms)
+
+/* i2c data */
+struct i2c_device_info {
+  byte addr;
+  byte reg;
+  byte bytes;
+};
+
+/* for i2c read continuous more */
+i2c_device_info query[MAX_QUERIES];
+
+byte i2cRxData[32];
+boolean isI2CEnabled = false;
+signed char queryIndex = -1;
+unsigned int i2cReadDelayTime = 0;  // default delay time between i2c read request and Wire.requestFrom()
+
+Servo servos[MAX_SERVOS];
+/*==============================================================================
+ * FUNCTIONS
+ *============================================================================*/
+
+void readAndReportData(byte address, int theRegister, byte numBytes) {
+  // allow I2C requests that don't require a register read
+  // for example, some devices using an interrupt pin to signify new data available
+  // do not always require the register read so upon interrupt you call Wire.requestFrom()
+  if (theRegister != REGISTER_NOT_SPECIFIED) {
+    Wire.beginTransmission(address);
+#if ARDUINO >= 100
+    Wire.write((byte)theRegister);
+#else
+    Wire.send((byte)theRegister);
+#endif
+    Wire.endTransmission();
+    // do not set a value of 0
+    if (i2cReadDelayTime > 0) {
+      // delay is necessary for some devices such as WiiNunchuck
+      delayMicroseconds(i2cReadDelayTime);
+    }
+  } else {
+    theRegister = 0;  // fill the register with a dummy value
+  }
+
+  Wire.requestFrom(address, numBytes);  // all bytes are returned in requestFrom
+
+  // check to be sure correct number of bytes were returned by slave
+  if (numBytes == Wire.available()) {
+    i2cRxData[0] = address;
+    i2cRxData[1] = theRegister;
+    for (int i = 0; i < numBytes; i++) {
+#if ARDUINO >= 100
+      i2cRxData[2 + i] = Wire.read();
+#else
+      i2cRxData[2 + i] = Wire.receive();
+#endif
+    }
+  }
+  else {
+    if (numBytes > Wire.available()) {
+      Firmata.sendString("I2C Read Error: Too many bytes received");
+    } else {
+      Firmata.sendString("I2C Read Error: Too few bytes received");
+    }
+  }
+
+  // send slave address, register and received bytes
+  Firmata.sendSysex(SYSEX_I2C_REPLY, numBytes + 2, i2cRxData);
+}
+
+void outputPort(byte portNumber, byte portValue, byte forceSend)
+{
+  // pins not configured as INPUT are cleared to zeros
+  portValue = portValue & portConfigInputs[portNumber];
+  // only send if the value is different than previously sent
+  if (forceSend || previousPINs[portNumber] != portValue) {
+    Firmata.sendDigitalPort(portNumber, portValue);
+    previousPINs[portNumber] = portValue;
+  }
+}
+
+/* -----------------------------------------------------------------------------
+ * check all the active digital inputs for change of state, then add any events
+ * to the Serial output queue using Serial.print() */
+void checkDigitalInputs(void)
+{
+  /* Using non-looping code allows constants to be given to readPort().
+   * The compiler will apply substantial optimizations if the inputs
+   * to readPort() are compile-time constants. */
+  if (TOTAL_PORTS > 0 && reportPINs[0]) outputPort(0, readPort(0, portConfigInputs[0]), false);
+  if (TOTAL_PORTS > 1 && reportPINs[1]) outputPort(1, readPort(1, portConfigInputs[1]), false);
+  if (TOTAL_PORTS > 2 && reportPINs[2]) outputPort(2, readPort(2, portConfigInputs[2]), false);
+  if (TOTAL_PORTS > 3 && reportPINs[3]) outputPort(3, readPort(3, portConfigInputs[3]), false);
+  if (TOTAL_PORTS > 4 && reportPINs[4]) outputPort(4, readPort(4, portConfigInputs[4]), false);
+  if (TOTAL_PORTS > 5 && reportPINs[5]) outputPort(5, readPort(5, portConfigInputs[5]), false);
+  if (TOTAL_PORTS > 6 && reportPINs[6]) outputPort(6, readPort(6, portConfigInputs[6]), false);
+  if (TOTAL_PORTS > 7 && reportPINs[7]) outputPort(7, readPort(7, portConfigInputs[7]), false);
+  if (TOTAL_PORTS > 8 && reportPINs[8]) outputPort(8, readPort(8, portConfigInputs[8]), false);
+  if (TOTAL_PORTS > 9 && reportPINs[9]) outputPort(9, readPort(9, portConfigInputs[9]), false);
+  if (TOTAL_PORTS > 10 && reportPINs[10]) outputPort(10, readPort(10, portConfigInputs[10]), false);
+  if (TOTAL_PORTS > 11 && reportPINs[11]) outputPort(11, readPort(11, portConfigInputs[11]), false);
+  if (TOTAL_PORTS > 12 && reportPINs[12]) outputPort(12, readPort(12, portConfigInputs[12]), false);
+  if (TOTAL_PORTS > 13 && reportPINs[13]) outputPort(13, readPort(13, portConfigInputs[13]), false);
+  if (TOTAL_PORTS > 14 && reportPINs[14]) outputPort(14, readPort(14, portConfigInputs[14]), false);
+  if (TOTAL_PORTS > 15 && reportPINs[15]) outputPort(15, readPort(15, portConfigInputs[15]), false);
+}
+
+// -----------------------------------------------------------------------------
+/* sets the pin mode to the correct state and sets the relevant bits in the
+ * two bit-arrays that track Digital I/O and PWM status
+ */
+void setPinModeCallback(byte pin, int mode)
+{
+  if (pinConfig[pin] == I2C && isI2CEnabled && mode != I2C) {
+    // disable i2c so pins can be used for other functions
+    // the following if statements should reconfigure the pins properly
+    disableI2CPins();
+  }
+  if (IS_PIN_SERVO(pin) && mode != SERVO && servos[PIN_TO_SERVO(pin)].attached()) {
+    servos[PIN_TO_SERVO(pin)].detach();
+  }
+  if (IS_PIN_ANALOG(pin)) {
+    reportAnalogCallback(PIN_TO_ANALOG(pin), mode == ANALOG ? 1 : 0); // turn on/off reporting
+  }
+  if (IS_PIN_DIGITAL(pin)) {
+    if (mode == INPUT) {
+      portConfigInputs[pin / 8] |= (1 << (pin & 7));
+    } else {
+      portConfigInputs[pin / 8] &= ~(1 << (pin & 7));
+    }
+  }
+  pinState[pin] = 0;
+  switch (mode) {
+    case ANALOG:
+      if (IS_PIN_ANALOG(pin)) {
+        if (IS_PIN_DIGITAL(pin)) {
+          pinMode(PIN_TO_DIGITAL(pin), INPUT); // disable output driver
+          digitalWrite(PIN_TO_DIGITAL(pin), LOW); // disable internal pull-ups
+        }
+        pinConfig[pin] = ANALOG;
+      }
+      break;
+    case INPUT:
+      if (IS_PIN_DIGITAL(pin)) {
+        pinMode(PIN_TO_DIGITAL(pin), INPUT); // disable output driver
+        digitalWrite(PIN_TO_DIGITAL(pin), LOW); // disable internal pull-ups
+        pinConfig[pin] = INPUT;
+      }
+      break;
+    case OUTPUT:
+      if (IS_PIN_DIGITAL(pin)) {
+        digitalWrite(PIN_TO_DIGITAL(pin), LOW); // disable PWM
+        pinMode(PIN_TO_DIGITAL(pin), OUTPUT);
+        pinConfig[pin] = OUTPUT;
+      }
+      break;
+    case PWM:
+      if (IS_PIN_PWM(pin)) {
+        pinMode(PIN_TO_PWM(pin), OUTPUT);
+        analogWrite(PIN_TO_PWM(pin), 0);
+        pinConfig[pin] = PWM;
+      }
+      break;
+    case SERVO:
+      if (IS_PIN_SERVO(pin)) {
+        pinConfig[pin] = SERVO;
+        if (!servos[PIN_TO_SERVO(pin)].attached()) {
+          servos[PIN_TO_SERVO(pin)].attach(PIN_TO_DIGITAL(pin));
+        }
+      }
+      break;
+    case I2C:
+      if (IS_PIN_I2C(pin)) {
+        // mark the pin as i2c
+        // the user must call I2C_CONFIG to enable I2C for a device
+        pinConfig[pin] = I2C;
+      }
+      break;
+    default:
+      Firmata.sendString("Unknown pin mode"); // TODO: put error msgs in EEPROM
+  }
+  // TODO: save status to EEPROM here, if changed
+}
+
+void analogWriteCallback(byte pin, int value)
+{
+  if (pin < TOTAL_PINS) {
+    switch (pinConfig[pin]) {
+      case SERVO:
+        if (IS_PIN_SERVO(pin))
+          servos[PIN_TO_SERVO(pin)].write(value);
+        pinState[pin] = value;
+        break;
+      case PWM:
+        if (IS_PIN_PWM(pin))
+          analogWrite(PIN_TO_PWM(pin), value);
+        pinState[pin] = value;
+        break;
+    }
+  }
+}
+
+void digitalWriteCallback(byte port, int value)
+{
+  byte pin, lastPin, mask = 1, pinWriteMask = 0;
+
+  if (port < TOTAL_PORTS) {
+    // create a mask of the pins on this port that are writable.
+    lastPin = port * 8 + 8;
+    if (lastPin > TOTAL_PINS) lastPin = TOTAL_PINS;
+    for (pin = port * 8; pin < lastPin; pin++) {
+      // do not disturb non-digital pins (eg, Rx & Tx)
+      if (IS_PIN_DIGITAL(pin)) {
+        // only write to OUTPUT and INPUT (enables pullup)
+        // do not touch pins in PWM, ANALOG, SERVO or other modes
+        if (pinConfig[pin] == OUTPUT || pinConfig[pin] == INPUT) {
+          pinWriteMask |= mask;
+          pinState[pin] = ((byte)value & mask) ? 1 : 0;
+        }
+      }
+      mask = mask << 1;
+    }
+    writePort(port, (byte)value, pinWriteMask);
+  }
+}
+
+
+// -----------------------------------------------------------------------------
+/* sets bits in a bit array (int) to toggle the reporting of the analogIns
+ */
+//void FirmataClass::setAnalogPinReporting(byte pin, byte state) {
+//}
+void reportAnalogCallback(byte analogPin, int value)
+{
+  if (analogPin < TOTAL_ANALOG_PINS) {
+    if (value == 0) {
+      analogInputsToReport = analogInputsToReport &~ (1 << analogPin);
+    } else {
+      analogInputsToReport = analogInputsToReport | (1 << analogPin);
+    }
+  }
+  // TODO: save status to EEPROM here, if changed
+}
+
+void reportDigitalCallback(byte port, int value)
+{
+  if (port < TOTAL_PORTS) {
+    reportPINs[port] = (byte)value;
+  }
+  // do not disable analog reporting on these 8 pins, to allow some
+  // pins used for digital, others analog.  Instead, allow both types
+  // of reporting to be enabled, but check if the pin is configured
+  // as analog when sampling the analog inputs.  Likewise, while
+  // scanning digital pins, portConfigInputs will mask off values from any
+  // pins configured as analog
+}
+
+/*==============================================================================
+ * SYSEX-BASED commands
+ *============================================================================*/
+
+void sysexCallback(byte command, byte argc, byte *argv)
+{
+  byte mode;
+  byte slaveAddress;
+  byte slaveRegister;
+  byte data;
+  unsigned int delayTime;
+
+  switch (command) {
+    case I2C_REQUEST:
+      mode = argv[1] & I2C_READ_WRITE_MODE_MASK;
+      if (argv[1] & I2C_10BIT_ADDRESS_MODE_MASK) {
+        Firmata.sendString("10-bit addressing mode is not yet supported");
+        return;
+      }
+      else {
+        slaveAddress = argv[0];
+      }
+
+      switch (mode) {
+        case I2C_WRITE:
+          Wire.beginTransmission(slaveAddress);
+          for (byte i = 2; i < argc; i += 2) {
+            data = argv[i] + (argv[i + 1] << 7);
+#if ARDUINO >= 100
+            Wire.write(data);
+#else
+            Wire.send(data);
+#endif
+          }
+          Wire.endTransmission();
+          delayMicroseconds(70);
+          break;
+        case I2C_READ:
+          if (argc == 6) {
+            // a slave register is specified
+            slaveRegister = argv[2] + (argv[3] << 7);
+            data = argv[4] + (argv[5] << 7);  // bytes to read
+            readAndReportData(slaveAddress, (int)slaveRegister, data);
+          }
+          else {
+            // a slave register is NOT specified
+            data = argv[2] + (argv[3] << 7);  // bytes to read
+            readAndReportData(slaveAddress, (int)REGISTER_NOT_SPECIFIED, data);
+          }
+          break;
+        case I2C_READ_CONTINUOUSLY:
+          if ((queryIndex + 1) >= MAX_QUERIES) {
+            // too many queries, just ignore
+            Firmata.sendString("too many queries");
+            break;
+          }
+          queryIndex++;
+          query[queryIndex].addr = slaveAddress;
+          query[queryIndex].reg = argv[2] + (argv[3] << 7);
+          query[queryIndex].bytes = argv[4] + (argv[5] << 7);
+          break;
+        case I2C_STOP_READING:
+          byte queryIndexToSkip;
+          // if read continuous mode is enabled for only 1 i2c device, disable
+          // read continuous reporting for that device
+          if (queryIndex <= 0) {
+            queryIndex = -1;
+          } else {
+            // if read continuous mode is enabled for multiple devices,
+            // determine which device to stop reading and remove it's data from
+            // the array, shifiting other array data to fill the space
+            for (byte i = 0; i < queryIndex + 1; i++) {
+              if (query[i].addr = slaveAddress) {
+                queryIndexToSkip = i;
+                break;
+              }
+            }
+
+            for (byte i = queryIndexToSkip; i < queryIndex + 1; i++) {
+              if (i < MAX_QUERIES) {
+                query[i].addr = query[i + 1].addr;
+                query[i].reg = query[i + 1].addr;
+                query[i].bytes = query[i + 1].bytes;
+              }
+            }
+            queryIndex--;
+          }
+          break;
+        default:
+          break;
+      }
+      break;
+    case I2C_CONFIG:
+      delayTime = (argv[0] + (argv[1] << 7));
+
+      if (delayTime > 0) {
+        i2cReadDelayTime = delayTime;
+      }
+
+      if (!isI2CEnabled) {
+        enableI2CPins();
+      }
+
+      break;
+    case SERVO_CONFIG:
+      if (argc > 4) {
+        // these vars are here for clarity, they'll optimized away by the compiler
+        byte pin = argv[0];
+        int minPulse = argv[1] + (argv[2] << 7);
+        int maxPulse = argv[3] + (argv[4] << 7);
+
+        if (IS_PIN_SERVO(pin)) {
+          if (servos[PIN_TO_SERVO(pin)].attached())
+            servos[PIN_TO_SERVO(pin)].detach();
+          servos[PIN_TO_SERVO(pin)].attach(PIN_TO_DIGITAL(pin), minPulse, maxPulse);
+          setPinModeCallback(pin, SERVO);
+        }
+      }
+      break;
+    case SAMPLING_INTERVAL:
+      if (argc > 1) {
+        samplingInterval = argv[0] + (argv[1] << 7);
+        if (samplingInterval < MINIMUM_SAMPLING_INTERVAL) {
+          samplingInterval = MINIMUM_SAMPLING_INTERVAL;
+        }
+      } else {
+        //Firmata.sendString("Not enough data");
+      }
+      break;
+    case EXTENDED_ANALOG:
+      if (argc > 1) {
+        int val = argv[1];
+        if (argc > 2) val |= (argv[2] << 7);
+        if (argc > 3) val |= (argv[3] << 14);
+        analogWriteCallback(argv[0], val);
+      }
+      break;
+    case CAPABILITY_QUERY:
+      Firmata.write(START_SYSEX);
+      Firmata.write(CAPABILITY_RESPONSE);
+      for (byte pin = 0; pin < TOTAL_PINS; pin++) {
+        if (IS_PIN_DIGITAL(pin)) {
+          Firmata.write((byte)INPUT);
+          Firmata.write(1);
+          Firmata.write((byte)OUTPUT);
+          Firmata.write(1);
+        }
+        if (IS_PIN_ANALOG(pin)) {
+          Firmata.write(ANALOG);
+          Firmata.write(10);
+        }
+        if (IS_PIN_PWM(pin)) {
+          Firmata.write(PWM);
+          Firmata.write(8);
+        }
+        if (IS_PIN_SERVO(pin)) {
+          Firmata.write(SERVO);
+          Firmata.write(14);
+        }
+        if (IS_PIN_I2C(pin)) {
+          Firmata.write(I2C);
+          Firmata.write(1);  // to do: determine appropriate value
+        }
+        Firmata.write(127);
+      }
+      Firmata.write(END_SYSEX);
+      break;
+    case PIN_STATE_QUERY:
+      if (argc > 0) {
+        byte pin = argv[0];
+        Firmata.write(START_SYSEX);
+        Firmata.write(PIN_STATE_RESPONSE);
+        Firmata.write(pin);
+        if (pin < TOTAL_PINS) {
+          Firmata.write((byte)pinConfig[pin]);
+          Firmata.write((byte)pinState[pin] & 0x7F);
+          if (pinState[pin] & 0xFF80) Firmata.write((byte)(pinState[pin] >> 7) & 0x7F);
+          if (pinState[pin] & 0xC000) Firmata.write((byte)(pinState[pin] >> 14) & 0x7F);
+        }
+        Firmata.write(END_SYSEX);
+      }
+      break;
+    case ANALOG_MAPPING_QUERY:
+      Firmata.write(START_SYSEX);
+      Firmata.write(ANALOG_MAPPING_RESPONSE);
+      for (byte pin = 0; pin < TOTAL_PINS; pin++) {
+        Firmata.write(IS_PIN_ANALOG(pin) ? PIN_TO_ANALOG(pin) : 127);
+      }
+      Firmata.write(END_SYSEX);
+      break;
+  }
+}
+
+void enableI2CPins()
+{
+  byte i;
+  // is there a faster way to do this? would probaby require importing
+  // Arduino.h to get SCL and SDA pins
+  for (i = 0; i < TOTAL_PINS; i++) {
+    if (IS_PIN_I2C(i)) {
+      // mark pins as i2c so they are ignore in non i2c data requests
+      setPinModeCallback(i, I2C);
+    }
+  }
+
+  isI2CEnabled = true;
+
+  // is there enough time before the first I2C request to call this here?
+  Wire.begin();
+}
+
+/* disable the i2c pins so they can be used for other functions */
+void disableI2CPins() {
+  isI2CEnabled = false;
+  // disable read continuous mode for all devices
+  queryIndex = -1;
+  // uncomment the following if or when the end() method is added to Wire library
+  // Wire.end();
+}
+
+/*==============================================================================
+ * SETUP()
+ *============================================================================*/
+
+void systemResetCallback()
+{
+  // initialize a defalt state
+  // TODO: option to load config from EEPROM instead of default
+  if (isI2CEnabled) {
+    disableI2CPins();
+  }
+  for (byte i = 0; i < TOTAL_PORTS; i++) {
+    reportPINs[i] = false;      // by default, reporting off
+    portConfigInputs[i] = 0;	// until activated
+    previousPINs[i] = 0;
+  }
+  // pins with analog capability default to analog input
+  // otherwise, pins default to digital output
+  for (byte i = 0; i < TOTAL_PINS; i++) {
+    if (IS_PIN_ANALOG(i)) {
+      // turns off pullup, configures everything
+      setPinModeCallback(i, ANALOG);
+    } else {
+      // sets the output to 0, configures portConfigInputs
+      setPinModeCallback(i, OUTPUT);
+    }
+  }
+  // by default, do not report any analog inputs
+  analogInputsToReport = 0;
+
+  /* send digital inputs to set the initial state on the host computer,
+   * since once in the loop(), this firmware will only send on change */
+  /*
+  TODO: this can never execute, since no pins default to digital input
+        but it will be needed when/if we support EEPROM stored config
+  for (byte i=0; i < TOTAL_PORTS; i++) {
+    outputPort(i, readPort(i, portConfigInputs[i]), true);
+  }
+  */
+}
+
+void setup()
+{
+  Firmata.setFirmwareVersion(FIRMATA_MAJOR_VERSION, FIRMATA_MINOR_VERSION);
+
+  Firmata.attach(ANALOG_MESSAGE, analogWriteCallback);
+  Firmata.attach(DIGITAL_MESSAGE, digitalWriteCallback);
+  Firmata.attach(REPORT_ANALOG, reportAnalogCallback);
+  Firmata.attach(REPORT_DIGITAL, reportDigitalCallback);
+  Firmata.attach(SET_PIN_MODE, setPinModeCallback);
+  Firmata.attach(START_SYSEX, sysexCallback);
+  Firmata.attach(SYSTEM_RESET, systemResetCallback);
+
+  Firmata.begin(57600);
+  systemResetCallback();  // reset to default config
+}
+
+/*==============================================================================
+ * LOOP()
+ *============================================================================*/
+void loop()
+{
+  byte pin, analogPin;
+
+  /* DIGITALREAD - as fast as possible, check for changes and output them to the
+   * FTDI buffer using Serial.print()  */
+  checkDigitalInputs();
+
+  /* SERIALREAD - processing incoming messagse as soon as possible, while still
+   * checking digital inputs.  */
+  while (Firmata.available())
+    Firmata.processInput();
+
+  /* SEND FTDI WRITE BUFFER - make sure that the FTDI buffer doesn't go over
+   * 60 bytes. use a timer to sending an event character every 4 ms to
+   * trigger the buffer to dump. */
+
+  currentMillis = millis();
+  if (currentMillis - previousMillis > samplingInterval) {
+    previousMillis += samplingInterval;
+    /* ANALOGREAD - do all analogReads() at the configured sampling interval */
+    for (pin = 0; pin < TOTAL_PINS; pin++) {
+      if (IS_PIN_ANALOG(pin) && pinConfig[pin] == ANALOG) {
+        analogPin = PIN_TO_ANALOG(pin);
+        if (analogInputsToReport & (1 << analogPin)) {
+          Firmata.sendAnalog(analogPin, analogRead(analogPin));
+        }
+      }
+    }
+    // report i2c data for all device with read continuous mode enabled
+    if (queryIndex > -1) {
+      for (byte i = 0; i < queryIndex + 1; i++) {
+        readAndReportData(query[i].addr, query[i].reg, query[i].bytes);
+      }
+    }
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/extras/LICENSE.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/extras/LICENSE.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/extras/LICENSE.txt	(revision 136)
@@ -0,0 +1,466 @@
+
+		  GNU LESSER GENERAL PUBLIC LICENSE
+		       Version 2.1, February 1999
+
+ Copyright (C) 1991, 1999 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+[This is the first released version of the Lesser GPL.  It also counts
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Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/extras/readme.md
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/extras/readme.md	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/extras/readme.md	(revision 136)
@@ -0,0 +1,71 @@
+#Firmata
+
+Firmata is a protocol for communicating with microcontrollers from software on a host computer. The [protocol](http://firmata.org/wiki/Protocol) can be implemented in firmware on any microcontroller architecture as well as software on any host computer software package. The arduino repository described here is a Firmata library for Arduino and Arduino-compatible devices. See the [firmata wiki](http://firmata.org/wiki/Main_Page) for additional informataion. If you would like to contribute to Firmata, please see the [Contributing](#contributing) section below.
+
+##Usage
+
+There are two main models of usage of Firmata. In one model, the author of the Arduino sketch uses the various methods provided by the Firmata library to selectively send and receive data between the Arduino device and the software running on the host computer. For example, a user can send analog data to the host using ``` Firmata.sendAnalog(analogPin, analogRead(analogPin)) ``` or send data packed in a string using ``` Firmata.sendString(stringToSend) ```. See File -> Examples -> Firmata -> AnalogFirmata & EchoString respectively for examples.
+
+The second and more common model is to load a general purpose sketch called StandardFirmata on the Arduino board and then use the host computer exclusively to interact with the Arduino board. StandardFirmata is located in the Arduino IDE in File -> Examples -> Firmata.
+
+##Firmata Client Libraries
+Most of the time you will be interacting with arduino with a client library on the host computers. Several Firmata client libraries have been implemented in a variety of popular programming languages:
+
+* procesing
+  * [https://github.com/firmata/processing]
+  * [http://funnel.cc]
+* python
+  * [https://github.com/firmata/pyduino]
+  * [https://github.com/lupeke/python-firmata]
+  * [https://github.com/tino/pyFirmata]
+* perl
+  * [https://github.com/ntruchsess/perl-firmata]
+  * [https://github.com/rcaputo/rx-firmata]
+* ruby 
+  * [https://github.com/hardbap/firmata]
+  * [https://github.com/PlasticLizard/rufinol]
+  * [http://funnel.cc]
+* clojure
+  * [https://github.com/nakkaya/clodiuno]
+* javascript 
+  * [https://github.com/jgautier/firmata]
+  * [http://breakoutjs.com]
+  * [https://github.com/rwldrn/johnny-five]
+* java 
+  * [https://github.com/4ntoine/Firmata]
+  * [https://github.com/shigeodayo/Javarduino]
+* .NET
+  * [http://www.imagitronics.org/projects/firmatanet/]
+* Flash/AS3
+  * [http://funnel.cc]
+  * [http://code.google.com/p/as3glue/]
+* PHP
+  * [https://bitbucket.org/ThomasWeinert/carica-firmata]
+
+Note: The above libraries may support various versions of the Firmata protocol and therefore may not support all features of the latest Firmata spec nor all arduino and arduino-compatible boards. Refer to the respective projects for details.
+
+
+<a name="contributing" />
+##Contributing
+
+If you discover a bug or would like to propose a new feature, please open a new [issue](https://github.com/firmata/arduino/issues?sort=created&state=open). Due to the limited memory of standard Arduino boards we cannot add every requested feature to StandardFirmata. Requests to add new features to StandardFirmata will be evaluated by the Firmata developers. However it is still possible to add new features to other Firmata implementations (Firmata is a protocol whereas StandardFirmata is just one of many possible implementations).
+
+To contribute, fork this respository and create a new topic branch for the bug, feature or other existing issue you are addressing. Submit the pull request against the *dev* branch.
+
+If you would like to contribute but don't have a specific bugfix or new feature to contribute, you can take on an existing issue, see issues labeled "pull-request-encouraged". Add a comment to the issue to express your intent to begin work and/or to get any additional information about the issue.
+
+You must thorougly test your contributed code. In your pull request, describe tests performed to ensure that no existing code is broken and that any changes maintain backwards compatibility with the existing api. Test on multiple Arduino board variants if possible. We hope to enable some form of automated (or at least semi-automated) testing in the future, but for now any tests will need to be executed manually by the contributor and reviewsers.
+
+Maintain the existing code style:
+
+- Indentation is 2 spaces
+- Use spaces instead of tabs
+- Use camel case for both private and public properties and methods
+- Document functions (specific doc style is TBD... for now just be sure to document)
+- Insert first block bracket on line following the function definition:
+
+<pre>void someFunction()
+{
+  // do something
+}
+</pre>
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/keywords.txt	(revision 136)
@@ -0,0 +1,62 @@
+#######################################
+# Syntax Coloring Map For Firmata
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+Firmata	KEYWORD1
+callbackFunction	KEYWORD1
+systemResetCallbackFunction	KEYWORD1
+stringCallbackFunction	KEYWORD1
+sysexCallbackFunction	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+begin	KEYWORD2
+begin	KEYWORD2
+printVersion	KEYWORD2
+blinkVersion	KEYWORD2
+printFirmwareVersion	KEYWORD2
+setFirmwareVersion	KEYWORD2
+setFirmwareNameAndVersion	KEYWORD2
+available	KEYWORD2
+processInput	KEYWORD2
+sendAnalog	KEYWORD2
+sendDigital	KEYWORD2
+sendDigitalPortPair	KEYWORD2
+sendDigitalPort	KEYWORD2
+sendString	KEYWORD2
+sendString	KEYWORD2
+sendSysex	KEYWORD2
+attach	KEYWORD2
+detach	KEYWORD2
+flush	KEYWORD2
+
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
+MAX_DATA_BYTES	LITERAL1
+
+DIGITAL_MESSAGE	LITERAL1
+ANALOG_MESSAGE	LITERAL1
+REPORT_ANALOG	LITERAL1
+REPORT_DIGITAL	LITERAL1
+REPORT_VERSION	LITERAL1
+SET_PIN_MODE	LITERAL1
+SYSTEM_RESET	LITERAL1
+
+START_SYSEX	LITERAL1
+END_SYSEX	LITERAL1
+
+PWM	LITERAL1
+
+TOTAL_ANALOG_PINS	LITERAL1
+TOTAL_DIGITAL_PINS	LITERAL1
+TOTAL_PORTS			LITERAL1
+ANALOG_PORT			LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Firmata
+version=2.3.6
+author=Firmata Developers
+maintainer=Firmata Developers <firmata-devel@lists.sourceforge.net>
+sentence=Enables the communication with computer apps using a standard serial protocol. For all Arduino boards.
+paragraph=The Firmata library implements the Firmata protocol for communicating with software on the host computer. This allows you to write custom firmware without having to create your own protocol and objects for the programming environment that you are using.
+category=Device Control
+url=http://firmata.org
+architectures=*
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/src/Boards.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/src/Boards.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/src/Boards.h	(revision 136)
@@ -0,0 +1,425 @@
+/* Boards.h - Hardware Abstraction Layer for Firmata library */
+
+#ifndef Firmata_Boards_h
+#define Firmata_Boards_h
+
+#include <inttypes.h>
+
+#if defined(ARDUINO) && ARDUINO >= 100
+#include "Arduino.h"	// for digitalRead, digitalWrite, etc
+#else
+#include "WProgram.h"
+#endif
+
+// Normally Servo.h must be included before Firmata.h (which then includes
+// this file).  If Servo.h wasn't included, this allows the code to still
+// compile, but without support for any Servos.  Hopefully that's what the
+// user intended by not including Servo.h
+#ifndef MAX_SERVOS
+#define MAX_SERVOS 0
+#endif
+
+/*
+    Firmata Hardware Abstraction Layer
+
+Firmata is built on top of the hardware abstraction functions of Arduino,
+specifically digitalWrite, digitalRead, analogWrite, analogRead, and 
+pinMode.  While these functions offer simple integer pin numbers, Firmata
+needs more information than is provided by Arduino.  This file provides
+all other hardware specific details.  To make Firmata support a new board,
+only this file should require editing.
+
+The key concept is every "pin" implemented by Firmata may be mapped to
+any pin as implemented by Arduino.  Usually a simple 1-to-1 mapping is
+best, but such mapping should not be assumed.  This hardware abstraction
+layer allows Firmata to implement any number of pins which map onto the
+Arduino implemented pins in almost any arbitrary way.
+
+
+General Constants:
+
+These constants provide basic information Firmata requires.
+
+TOTAL_PINS: The total number of pins Firmata implemented by Firmata.
+    Usually this will match the number of pins the Arduino functions
+    implement, including any pins pins capable of analog or digital.
+    However, Firmata may implement any number of pins.  For example,
+    on Arduino Mini with 8 analog inputs, 6 of these may be used
+    for digital functions, and 2 are analog only.  On such boards,
+    Firmata can implement more pins than Arduino's pinMode()
+    function, in order to accommodate those special pins.  The
+    Firmata protocol supports a maximum of 128 pins, so this
+    constant must not exceed 128.
+
+TOTAL_ANALOG_PINS: The total number of analog input pins implemented.
+    The Firmata protocol allows up to 16 analog inputs, accessed
+    using offsets 0 to 15.  Because Firmata presents the analog
+    inputs using different offsets than the actual pin numbers
+    (a legacy of Arduino's analogRead function, and the way the
+    analog input capable pins are physically labeled on all
+    Arduino boards), the total number of analog input signals
+    must be specified.  16 is the maximum.
+
+VERSION_BLINK_PIN: When Firmata starts up, it will blink the version
+    number.  This constant is the Arduino pin number where a
+    LED is connected.
+
+
+Pin Mapping Macros:
+
+These macros provide the mapping between pins as implemented by
+Firmata protocol and the actual pin numbers used by the Arduino
+functions.  Even though such mappings are often simple, pin
+numbers received by Firmata protocol should always be used as
+input to these macros, and the result of the macro should be
+used with with any Arduino function.
+
+When Firmata is extended to support a new pin mode or feature,
+a pair of macros should be added and used for all hardware
+access.  For simple 1:1 mapping, these macros add no actual
+overhead, yet their consistent use allows source code which
+uses them consistently to be easily adapted to all other boards
+with different requirements.
+
+IS_PIN_XXXX(pin): The IS_PIN macros resolve to true or non-zero
+    if a pin as implemented by Firmata corresponds to a pin
+    that actually implements the named feature.
+
+PIN_TO_XXXX(pin): The PIN_TO macros translate pin numbers as
+    implemented by Firmata to the pin numbers needed as inputs
+    to the Arduino functions.  The corresponding IS_PIN macro
+    should always be tested before using a PIN_TO macro, so
+    these macros only need to handle valid Firmata pin
+    numbers for the named feature.
+
+
+Port Access Inline Funtions:
+
+For efficiency, Firmata protocol provides access to digital
+input and output pins grouped by 8 bit ports.  When these
+groups of 8 correspond to actual 8 bit ports as implemented
+by the hardware, these inline functions can provide high
+speed direct port access.  Otherwise, a default implementation
+using 8 calls to digitalWrite or digitalRead is used.
+
+When porting Firmata to a new board, it is recommended to
+use the default functions first and focus only on the constants
+and macros above.  When those are working, if optimized port
+access is desired, these inline functions may be extended.
+The recommended approach defines a symbol indicating which
+optimization to use, and then conditional complication is
+used within these functions.
+
+readPort(port, bitmask):  Read an 8 bit port, returning the value.
+   port:    The port number, Firmata pins port*8 to port*8+7
+   bitmask: The actual pins to read, indicated by 1 bits.
+
+writePort(port, value, bitmask):  Write an 8 bit port.
+   port:    The port number, Firmata pins port*8 to port*8+7
+   value:   The 8 bit value to write
+   bitmask: The actual pins to write, indicated by 1 bits.
+*/
+
+/*==============================================================================
+ * Board Specific Configuration
+ *============================================================================*/
+
+#ifndef digitalPinHasPWM
+#define digitalPinHasPWM(p)     IS_PIN_DIGITAL(p)
+#endif
+
+// Arduino Duemilanove, Diecimila, and NG
+#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__)
+#if defined(NUM_ANALOG_INPUTS) && NUM_ANALOG_INPUTS == 6
+#define TOTAL_ANALOG_PINS       6
+#define TOTAL_PINS              20 // 14 digital + 6 analog
+#else
+#define TOTAL_ANALOG_PINS       8
+#define TOTAL_PINS              22 // 14 digital + 8 analog
+#endif
+#define VERSION_BLINK_PIN       13
+#define IS_PIN_DIGITAL(p)       ((p) >= 2 && (p) <= 19)
+#define IS_PIN_ANALOG(p)        ((p) >= 14 && (p) < 14 + TOTAL_ANALOG_PINS)
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         (IS_PIN_DIGITAL(p) && (p) - 2 < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 18 || (p) == 19)
+#define IS_PIN_SPI(p)           ((p) == SS || (p) == MOSI || (p) == MISO || (p) == SCK)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        ((p) - 14)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         ((p) - 2)
+#define ARDUINO_PINOUT_OPTIMIZE 1
+
+
+// Wiring (and board)
+#elif defined(WIRING)
+#define VERSION_BLINK_PIN       WLED
+#define IS_PIN_DIGITAL(p)       ((p) >= 0 && (p) < TOTAL_PINS)
+#define IS_PIN_ANALOG(p)        ((p) >= FIRST_ANALOG_PIN && (p) < (FIRST_ANALOG_PIN+TOTAL_ANALOG_PINS))
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         ((p) >= 0 && (p) < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == SDA || (p) == SCL)
+#define IS_PIN_SPI(p)           ((p) == SS || (p) == MOSI || (p) == MISO || (p) == SCK)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        ((p) - FIRST_ANALOG_PIN)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         (p) 
+
+
+// old Arduinos
+#elif defined(__AVR_ATmega8__)
+#define TOTAL_ANALOG_PINS       6
+#define TOTAL_PINS              20 // 14 digital + 6 analog
+#define VERSION_BLINK_PIN       13
+#define IS_PIN_DIGITAL(p)       ((p) >= 2 && (p) <= 19)
+#define IS_PIN_ANALOG(p)        ((p) >= 14 && (p) <= 19)
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         (IS_PIN_DIGITAL(p) && (p) - 2 < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 18 || (p) == 19)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        ((p) - 14)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         ((p) - 2)
+#define ARDUINO_PINOUT_OPTIMIZE 1
+
+
+// Arduino Mega
+#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+#define TOTAL_ANALOG_PINS       16
+#define TOTAL_PINS              70 // 54 digital + 16 analog
+#define VERSION_BLINK_PIN       13
+#define IS_PIN_DIGITAL(p)       ((p) >= 2 && (p) < TOTAL_PINS)
+#define IS_PIN_ANALOG(p)        ((p) >= 54 && (p) < TOTAL_PINS)
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         ((p) >= 2 && (p) - 2 < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 20 || (p) == 21)
+#define IS_PIN_SPI(p)           ((p) == SS || (p) == MOSI || (p) == MISO || (p) == SCK)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        ((p) - 54)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         ((p) - 2)
+
+
+// Arduino DUE
+#elif defined(__SAM3X8E__)
+#define TOTAL_ANALOG_PINS       12
+#define TOTAL_PINS              66 // 54 digital + 12 analog
+#define VERSION_BLINK_PIN       13
+#define IS_PIN_DIGITAL(p)       ((p) >= 2 && (p) < TOTAL_PINS)
+#define IS_PIN_ANALOG(p)        ((p) >= 54 && (p) < TOTAL_PINS)
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         ((p) >= 2 && (p) - 2 < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 20 || (p) == 21) // 70 71
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        ((p) - 54)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         ((p) - 2)
+
+
+// Teensy 1.0
+#elif defined(__AVR_AT90USB162__)
+#define TOTAL_ANALOG_PINS       0
+#define TOTAL_PINS              21 // 21 digital + no analog
+#define VERSION_BLINK_PIN       6
+#define IS_PIN_DIGITAL(p)       ((p) >= 0 && (p) < TOTAL_PINS)
+#define IS_PIN_ANALOG(p)        (0)
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         ((p) >= 0 && (p) < MAX_SERVOS)
+#define IS_PIN_I2C(p)           (0)
+#define IS_PIN_SPI(p)           ((p) == SS || (p) == MOSI || (p) == MISO || (p) == SCK)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        (0)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         (p)
+
+
+// Teensy 2.0
+#elif defined(__AVR_ATmega32U4__) && defined(CORE_TEENSY)
+#define TOTAL_ANALOG_PINS       12
+#define TOTAL_PINS              25 // 11 digital + 12 analog
+#define VERSION_BLINK_PIN       11
+#define IS_PIN_DIGITAL(p)       ((p) >= 0 && (p) < TOTAL_PINS)
+#define IS_PIN_ANALOG(p)        ((p) >= 11 && (p) <= 22)
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         ((p) >= 0 && (p) < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 5 || (p) == 6)
+#define IS_PIN_SPI(p)           ((p) == SS || (p) == MOSI || (p) == MISO || (p) == SCK)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        (((p)<22)?21-(p):11)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         (p)
+
+
+// Teensy 3.0
+#elif defined(__MK20DX128__)
+#define TOTAL_ANALOG_PINS       14
+#define TOTAL_PINS              38 // 24 digital + 10 analog-digital + 4 analog
+#define VERSION_BLINK_PIN       13
+#define IS_PIN_DIGITAL(p)       ((p) >= 0 && (p) <= 34)
+#define IS_PIN_ANALOG(p)        (((p) >= 14 && (p) <= 23) || ((p) >= 34 && (p) <= 38))
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         ((p) >= 0 && (p) < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 18 || (p) == 19)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        (((p)<=23)?(p)-14:(p)-24)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         (p) 
+
+
+// Teensy++ 1.0 and 2.0
+#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
+#define TOTAL_ANALOG_PINS       8
+#define TOTAL_PINS              46 // 38 digital + 8 analog
+#define VERSION_BLINK_PIN       6
+#define IS_PIN_DIGITAL(p)       ((p) >= 0 && (p) < TOTAL_PINS)
+#define IS_PIN_ANALOG(p)        ((p) >= 38 && (p) < TOTAL_PINS)
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         ((p) >= 0 && (p) < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 0 || (p) == 1)
+#define IS_PIN_SPI(p)           ((p) == SS || (p) == MOSI || (p) == MISO || (p) == SCK)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        ((p) - 38)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         (p)
+
+
+// Leonardo
+#elif defined(__AVR_ATmega32U4__)
+#define TOTAL_ANALOG_PINS       12
+#define TOTAL_PINS              30 // 14 digital + 12 analog + 4 SPI (D14-D17 on ISP header)
+#define VERSION_BLINK_PIN       13
+#define IS_PIN_DIGITAL(p)       ((p) >= 0 && (p) < TOTAL_PINS)
+#define IS_PIN_ANALOG(p)        ((p) >= 18 && (p) < TOTAL_PINS)
+#define IS_PIN_PWM(p)           ((p) == 3 || (p) == 5 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 11 || (p) == 13)
+#define IS_PIN_SERVO(p)         ((p) >= 0 && (p) < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 2 || (p) == 3)
+#define IS_PIN_SPI(p)           ((p) == SS || (p) == MOSI || (p) == MISO || (p) == SCK)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        (p) - 18
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         (p)  
+
+
+// Sanguino
+#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
+#define TOTAL_ANALOG_PINS       8
+#define TOTAL_PINS              32 // 24 digital + 8 analog
+#define VERSION_BLINK_PIN       0
+#define IS_PIN_DIGITAL(p)       ((p) >= 2 && (p) < TOTAL_PINS)
+#define IS_PIN_ANALOG(p)        ((p) >= 24 && (p) < TOTAL_PINS)
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         ((p) >= 0 && (p) < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 16 || (p) == 17)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        ((p) - 24)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         ((p) - 2)
+
+
+// Illuminato
+#elif defined(__AVR_ATmega645__)
+#define TOTAL_ANALOG_PINS       6
+#define TOTAL_PINS              42 // 36 digital + 6 analog
+#define VERSION_BLINK_PIN       13
+#define IS_PIN_DIGITAL(p)       ((p) >= 2 && (p) < TOTAL_PINS)
+#define IS_PIN_ANALOG(p)        ((p) >= 36 && (p) < TOTAL_PINS)
+#define IS_PIN_PWM(p)           digitalPinHasPWM(p)
+#define IS_PIN_SERVO(p)         ((p) >= 0 && (p) < MAX_SERVOS)
+#define IS_PIN_I2C(p)           ((p) == 4 || (p) == 5)
+#define PIN_TO_DIGITAL(p)       (p)
+#define PIN_TO_ANALOG(p)        ((p) - 36)
+#define PIN_TO_PWM(p)           PIN_TO_DIGITAL(p)
+#define PIN_TO_SERVO(p)         ((p) - 2)
+
+
+// anything else
+#else
+#error "Please edit Boards.h with a hardware abstraction for this board"
+#endif
+
+// as long this is not defined for all boards:
+#ifndef IS_PIN_SPI(p)
+#define IS_PIN_SPI(p)           0
+#endif
+
+/*==============================================================================
+ * readPort() - Read an 8 bit port
+ *============================================================================*/
+
+static inline unsigned char readPort(byte, byte) __attribute__((always_inline, unused));
+static inline unsigned char readPort(byte port, byte bitmask)
+{
+#if defined(ARDUINO_PINOUT_OPTIMIZE)
+	if (port == 0) return (PIND & 0xFC) & bitmask; // ignore Rx/Tx 0/1
+	if (port == 1) return ((PINB & 0x3F) | ((PINC & 0x03) << 6)) & bitmask;
+	if (port == 2) return ((PINC & 0x3C) >> 2) & bitmask;
+	return 0;
+#else
+	unsigned char out=0, pin=port*8;
+	if (IS_PIN_DIGITAL(pin+0) && (bitmask & 0x01) && digitalRead(PIN_TO_DIGITAL(pin+0))) out |= 0x01;
+	if (IS_PIN_DIGITAL(pin+1) && (bitmask & 0x02) && digitalRead(PIN_TO_DIGITAL(pin+1))) out |= 0x02;
+	if (IS_PIN_DIGITAL(pin+2) && (bitmask & 0x04) && digitalRead(PIN_TO_DIGITAL(pin+2))) out |= 0x04;
+	if (IS_PIN_DIGITAL(pin+3) && (bitmask & 0x08) && digitalRead(PIN_TO_DIGITAL(pin+3))) out |= 0x08;
+	if (IS_PIN_DIGITAL(pin+4) && (bitmask & 0x10) && digitalRead(PIN_TO_DIGITAL(pin+4))) out |= 0x10;
+	if (IS_PIN_DIGITAL(pin+5) && (bitmask & 0x20) && digitalRead(PIN_TO_DIGITAL(pin+5))) out |= 0x20;
+	if (IS_PIN_DIGITAL(pin+6) && (bitmask & 0x40) && digitalRead(PIN_TO_DIGITAL(pin+6))) out |= 0x40;
+	if (IS_PIN_DIGITAL(pin+7) && (bitmask & 0x80) && digitalRead(PIN_TO_DIGITAL(pin+7))) out |= 0x80;
+	return out;
+#endif
+}
+
+/*==============================================================================
+ * writePort() - Write an 8 bit port, only touch pins specified by a bitmask
+ *============================================================================*/
+
+static inline unsigned char writePort(byte, byte, byte) __attribute__((always_inline, unused));
+static inline unsigned char writePort(byte port, byte value, byte bitmask)
+{
+#if defined(ARDUINO_PINOUT_OPTIMIZE)
+	if (port == 0) {
+		bitmask = bitmask & 0xFC;  // do not touch Tx & Rx pins
+		byte valD = value & bitmask;
+		byte maskD = ~bitmask;
+		cli();
+		PORTD = (PORTD & maskD) | valD;
+		sei();
+	} else if (port == 1) {
+		byte valB = (value & bitmask) & 0x3F;
+		byte valC = (value & bitmask) >> 6;
+		byte maskB = ~(bitmask & 0x3F);
+		byte maskC = ~((bitmask & 0xC0) >> 6);
+		cli();
+		PORTB = (PORTB & maskB) | valB;
+		PORTC = (PORTC & maskC) | valC;
+		sei();
+	} else if (port == 2) {
+		bitmask = bitmask & 0x0F;
+		byte valC = (value & bitmask) << 2;
+		byte maskC = ~(bitmask << 2);
+		cli();
+		PORTC = (PORTC & maskC) | valC;
+		sei();
+	}
+#else
+	byte pin=port*8;
+	if ((bitmask & 0x01)) digitalWrite(PIN_TO_DIGITAL(pin+0), (value & 0x01));
+	if ((bitmask & 0x02)) digitalWrite(PIN_TO_DIGITAL(pin+1), (value & 0x02));
+	if ((bitmask & 0x04)) digitalWrite(PIN_TO_DIGITAL(pin+2), (value & 0x04));
+	if ((bitmask & 0x08)) digitalWrite(PIN_TO_DIGITAL(pin+3), (value & 0x08));
+	if ((bitmask & 0x10)) digitalWrite(PIN_TO_DIGITAL(pin+4), (value & 0x10));
+	if ((bitmask & 0x20)) digitalWrite(PIN_TO_DIGITAL(pin+5), (value & 0x20));
+	if ((bitmask & 0x40)) digitalWrite(PIN_TO_DIGITAL(pin+6), (value & 0x40));
+	if ((bitmask & 0x80)) digitalWrite(PIN_TO_DIGITAL(pin+7), (value & 0x80));
+#endif
+}
+
+
+
+
+#ifndef TOTAL_PORTS
+#define TOTAL_PORTS             ((TOTAL_PINS + 7) / 8)
+#endif
+
+
+#endif /* Firmata_Boards_h */
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/src/Firmata.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/src/Firmata.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/src/Firmata.cpp	(revision 136)
@@ -0,0 +1,463 @@
+/*
+  Firmata.cpp - Firmata library
+  Copyright (C) 2006-2008 Hans-Christoph Steiner.  All rights reserved.
+ 
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  See file LICENSE.txt for further informations on licensing terms.
+*/
+
+//******************************************************************************
+//* Includes
+//******************************************************************************
+
+#include "Firmata.h"
+#include "HardwareSerial.h"
+
+extern "C" {
+#include <string.h>
+#include <stdlib.h>
+}
+
+//******************************************************************************
+//* Support Functions
+//******************************************************************************
+
+void FirmataClass::sendValueAsTwo7bitBytes(int value)
+{
+  FirmataSerial->write(value & B01111111); // LSB
+  FirmataSerial->write(value >> 7 & B01111111); // MSB
+}
+
+void FirmataClass::startSysex(void)
+{
+  FirmataSerial->write(START_SYSEX);
+}
+
+void FirmataClass::endSysex(void)
+{
+  FirmataSerial->write(END_SYSEX);
+}
+
+//******************************************************************************
+//* Constructors
+//******************************************************************************
+
+FirmataClass::FirmataClass()
+{
+  firmwareVersionCount = 0;
+  firmwareVersionVector = 0;
+  systemReset();
+}
+
+//******************************************************************************
+//* Public Methods
+//******************************************************************************
+
+/* begin method with default serial bitrate */
+void FirmataClass::begin(void)
+{
+  begin(57600);
+}
+
+/* begin method for overriding default serial bitrate */
+void FirmataClass::begin(long speed)
+{
+  Serial.begin(speed);
+  FirmataSerial = &Serial;
+  blinkVersion();
+  printVersion();
+  printFirmwareVersion();
+}
+
+/* begin method for overriding default stream */
+void FirmataClass::begin(Stream &s)
+{
+  FirmataSerial = &s;
+  // do not call blinkVersion() here because some hardware such as the
+  // Ethernet shield use pin 13
+  printVersion();
+  printFirmwareVersion();
+}
+
+// output the protocol version message to the serial port
+void FirmataClass::printVersion(void) {
+  FirmataSerial->write(REPORT_VERSION);
+  FirmataSerial->write(FIRMATA_MAJOR_VERSION);
+  FirmataSerial->write(FIRMATA_MINOR_VERSION);
+}
+
+void FirmataClass::blinkVersion(void)
+{
+  // flash the pin with the protocol version
+  pinMode(VERSION_BLINK_PIN,OUTPUT);
+  strobeBlinkPin(FIRMATA_MAJOR_VERSION, 40, 210);
+  delay(250);
+  strobeBlinkPin(FIRMATA_MINOR_VERSION, 40, 210);
+  delay(125);
+}
+
+void FirmataClass::printFirmwareVersion(void)
+{
+  byte i;
+
+  if(firmwareVersionCount) { // make sure that the name has been set before reporting
+    startSysex();
+    FirmataSerial->write(REPORT_FIRMWARE);
+    FirmataSerial->write(firmwareVersionVector[0]); // major version number
+    FirmataSerial->write(firmwareVersionVector[1]); // minor version number
+    for(i=2; i<firmwareVersionCount; ++i) {
+      sendValueAsTwo7bitBytes(firmwareVersionVector[i]);
+    }
+    endSysex();
+  }
+}
+
+void FirmataClass::setFirmwareNameAndVersion(const char *name, byte major, byte minor)
+{
+  const char *filename;
+  char *extension;
+
+  // parse out ".cpp" and "applet/" that comes from using __FILE__
+  extension = strstr(name, ".cpp");
+  filename = strrchr(name, '/') + 1; //points to slash, +1 gets to start of filename
+  // add two bytes for version numbers
+  if(extension && filename) {
+    firmwareVersionCount = extension - filename + 2;
+  } else {
+    firmwareVersionCount = strlen(name) + 2;
+    filename = name;
+  }
+
+  free(firmwareVersionVector);
+
+  firmwareVersionVector = (byte *) malloc(firmwareVersionCount);
+  firmwareVersionVector[firmwareVersionCount] = 0;
+  firmwareVersionVector[0] = major;
+  firmwareVersionVector[1] = minor;
+  strncpy((char*)firmwareVersionVector + 2, filename, firmwareVersionCount - 2);
+  // alas, no snprintf on Arduino
+  //    snprintf(firmwareVersionVector, MAX_DATA_BYTES, "%c%c%s", 
+  //             (char)major, (char)minor, firmwareVersionVector);
+}
+
+// this method is only used for unit testing
+// void FirmataClass::unsetFirmwareVersion()
+// {
+//   firmwareVersionCount = 0;
+//   free(firmwareVersionVector); 
+//   firmwareVersionVector = 0;
+// }
+ 
+//------------------------------------------------------------------------------
+// Serial Receive Handling
+
+int FirmataClass::available(void)
+{
+  return FirmataSerial->available();
+}
+
+
+void FirmataClass::processSysexMessage(void)
+{
+  switch(storedInputData[0]) { //first byte in buffer is command
+  case REPORT_FIRMWARE:
+    printFirmwareVersion();
+    break;
+  case STRING_DATA:
+    if(currentStringCallback) {
+      byte bufferLength = (sysexBytesRead - 1) / 2;
+      char *buffer = (char*)malloc(bufferLength * sizeof(char));
+      byte i = 1;
+      byte j = 0;
+      while(j < bufferLength) {
+        buffer[j] = (char)storedInputData[i];
+        i++;
+        buffer[j] += (char)(storedInputData[i] << 7);
+        i++;
+        j++;
+      }
+      (*currentStringCallback)(buffer);
+    }
+    break;
+  default:
+    if(currentSysexCallback)
+      (*currentSysexCallback)(storedInputData[0], sysexBytesRead - 1, storedInputData + 1);
+  }
+}
+
+void FirmataClass::processInput(void)
+{
+  int inputData = FirmataSerial->read(); // this is 'int' to handle -1 when no data
+  int command;
+    
+  // TODO make sure it handles -1 properly
+  
+  if (parsingSysex) {
+    if(inputData == END_SYSEX) {
+      //stop sysex byte      
+      parsingSysex = false;
+      //fire off handler function
+      processSysexMessage();
+    } else {
+      //normal data byte - add to buffer
+      storedInputData[sysexBytesRead] = inputData;
+      sysexBytesRead++;
+    }
+  } else if( (waitForData > 0) && (inputData < 128) ) {  
+    waitForData--;
+    storedInputData[waitForData] = inputData;
+    if( (waitForData==0) && executeMultiByteCommand ) { // got the whole message
+      switch(executeMultiByteCommand) {
+      case ANALOG_MESSAGE:
+        if(currentAnalogCallback) {
+          (*currentAnalogCallback)(multiByteChannel,
+                                   (storedInputData[0] << 7)
+                                   + storedInputData[1]);
+        }
+        break;
+      case DIGITAL_MESSAGE:
+        if(currentDigitalCallback) {
+          (*currentDigitalCallback)(multiByteChannel,
+                                    (storedInputData[0] << 7)
+                                    + storedInputData[1]);
+        }
+        break;
+      case SET_PIN_MODE:
+        if(currentPinModeCallback)
+          (*currentPinModeCallback)(storedInputData[1], storedInputData[0]);
+        break;
+      case REPORT_ANALOG:
+        if(currentReportAnalogCallback)
+          (*currentReportAnalogCallback)(multiByteChannel,storedInputData[0]);
+        break;
+      case REPORT_DIGITAL:
+        if(currentReportDigitalCallback)
+          (*currentReportDigitalCallback)(multiByteChannel,storedInputData[0]);
+        break;
+      }
+      executeMultiByteCommand = 0;
+    }	
+  } else {
+    // remove channel info from command byte if less than 0xF0
+    if(inputData < 0xF0) {
+      command = inputData & 0xF0;
+      multiByteChannel = inputData & 0x0F;
+    } else {
+      command = inputData;
+      // commands in the 0xF* range don't use channel data
+    }
+    switch (command) {
+    case ANALOG_MESSAGE:
+    case DIGITAL_MESSAGE:
+    case SET_PIN_MODE:
+      waitForData = 2; // two data bytes needed
+      executeMultiByteCommand = command;
+      break;
+    case REPORT_ANALOG:
+    case REPORT_DIGITAL:
+      waitForData = 1; // two data bytes needed
+      executeMultiByteCommand = command;
+      break;
+    case START_SYSEX:
+      parsingSysex = true;
+      sysexBytesRead = 0;
+      break;
+    case SYSTEM_RESET:
+      systemReset();
+      break;
+    case REPORT_VERSION:
+      Firmata.printVersion();
+      break;
+    }
+  }
+}
+
+//------------------------------------------------------------------------------
+// Serial Send Handling
+
+// send an analog message
+void FirmataClass::sendAnalog(byte pin, int value) 
+{
+  // pin can only be 0-15, so chop higher bits
+  FirmataSerial->write(ANALOG_MESSAGE | (pin & 0xF));
+  sendValueAsTwo7bitBytes(value);
+}
+
+// send a single digital pin in a digital message
+void FirmataClass::sendDigital(byte pin, int value) 
+{
+  /* TODO add single pin digital messages to the protocol, this needs to
+   * track the last digital data sent so that it can be sure to change just
+   * one bit in the packet.  This is complicated by the fact that the
+   * numbering of the pins will probably differ on Arduino, Wiring, and
+   * other boards.  The DIGITAL_MESSAGE sends 14 bits at a time, but it is
+   * probably easier to send 8 bit ports for any board with more than 14
+   * digital pins.
+   */
+
+  // TODO: the digital message should not be sent on the serial port every
+  // time sendDigital() is called.  Instead, it should add it to an int
+  // which will be sent on a schedule.  If a pin changes more than once
+  // before the digital message is sent on the serial port, it should send a
+  // digital message for each change.
+
+  //    if(value == 0)
+  //        sendDigitalPortPair();
+}
+
+
+// send 14-bits in a single digital message (protocol v1)
+// send an 8-bit port in a single digital message (protocol v2)
+void FirmataClass::sendDigitalPort(byte portNumber, int portData)
+{
+  FirmataSerial->write(DIGITAL_MESSAGE | (portNumber & 0xF));
+  FirmataSerial->write((byte)portData % 128); // Tx bits 0-6
+  FirmataSerial->write(portData >> 7);  // Tx bits 7-13
+}
+
+
+void FirmataClass::sendSysex(byte command, byte bytec, byte* bytev) 
+{
+  byte i;
+  startSysex();
+  FirmataSerial->write(command);
+  for(i=0; i<bytec; i++) {
+    sendValueAsTwo7bitBytes(bytev[i]);        
+  }
+  endSysex();
+}
+
+void FirmataClass::sendString(byte command, const char* string) 
+{
+  sendSysex(command, strlen(string), (byte *)string);
+}
+
+
+// send a string as the protocol string type
+void FirmataClass::sendString(const char* string) 
+{
+  sendString(STRING_DATA, string);
+}
+
+// expose the write method
+void FirmataClass::write(byte c)
+{
+  FirmataSerial->write(c);
+}
+
+
+// Internal Actions/////////////////////////////////////////////////////////////
+
+// generic callbacks
+void FirmataClass::attach(byte command, callbackFunction newFunction)
+{
+  switch(command) {
+  case ANALOG_MESSAGE: currentAnalogCallback = newFunction; break;
+  case DIGITAL_MESSAGE: currentDigitalCallback = newFunction; break;
+  case REPORT_ANALOG: currentReportAnalogCallback = newFunction; break;
+  case REPORT_DIGITAL: currentReportDigitalCallback = newFunction; break;
+  case SET_PIN_MODE: currentPinModeCallback = newFunction; break;
+  }
+}
+
+void FirmataClass::attach(byte command, systemResetCallbackFunction newFunction)
+{
+  switch(command) {
+  case SYSTEM_RESET: currentSystemResetCallback = newFunction; break;
+  }
+}
+
+void FirmataClass::attach(byte command, stringCallbackFunction newFunction)
+{
+  switch(command) {
+  case STRING_DATA: currentStringCallback = newFunction; break;
+  }
+}
+
+void FirmataClass::attach(byte command, sysexCallbackFunction newFunction)
+{
+  currentSysexCallback = newFunction;
+}
+
+void FirmataClass::detach(byte command)
+{
+  switch(command) {
+  case SYSTEM_RESET: currentSystemResetCallback = NULL; break;
+  case STRING_DATA: currentStringCallback = NULL; break;
+  case START_SYSEX: currentSysexCallback = NULL; break;
+  default:
+    attach(command, (callbackFunction)NULL);
+  }
+}
+
+// sysex callbacks
+/*
+ * this is too complicated for analogReceive, but maybe for Sysex?
+ void FirmataClass::attachSysex(sysexFunction newFunction)
+ {
+ byte i;
+ byte tmpCount = analogReceiveFunctionCount;
+ analogReceiveFunction* tmpArray = analogReceiveFunctionArray;
+ analogReceiveFunctionCount++;
+ analogReceiveFunctionArray = (analogReceiveFunction*) calloc(analogReceiveFunctionCount, sizeof(analogReceiveFunction));
+ for(i = 0; i < tmpCount; i++) {
+ analogReceiveFunctionArray[i] = tmpArray[i];
+ }
+ analogReceiveFunctionArray[tmpCount] = newFunction;
+ free(tmpArray);
+ }
+*/
+
+//******************************************************************************
+//* Private Methods
+//******************************************************************************
+
+
+
+// resets the system state upon a SYSTEM_RESET message from the host software
+void FirmataClass::systemReset(void)
+{
+  byte i;
+
+  waitForData = 0; // this flag says the next serial input will be data
+  executeMultiByteCommand = 0; // execute this after getting multi-byte data
+  multiByteChannel = 0; // channel data for multiByteCommands
+
+  for(i=0; i<MAX_DATA_BYTES; i++) {
+    storedInputData[i] = 0;
+  }
+
+  parsingSysex = false;
+  sysexBytesRead = 0;
+
+  if(currentSystemResetCallback)
+    (*currentSystemResetCallback)();
+
+  //flush(); //TODO uncomment when Firmata is a subclass of HardwareSerial
+}
+
+
+
+// =============================================================================
+// used for flashing the pin for the version number
+void FirmataClass::strobeBlinkPin(int count, int onInterval, int offInterval) 
+{
+  byte i;
+  pinMode(VERSION_BLINK_PIN, OUTPUT);
+  for(i=0; i<count; i++) {
+    delay(offInterval);
+    digitalWrite(VERSION_BLINK_PIN, HIGH);
+    delay(onInterval);
+    digitalWrite(VERSION_BLINK_PIN, LOW);
+  }
+}
+
+
+// make one instance for the user to use
+FirmataClass Firmata;
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Firmata/src/Firmata.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Firmata/src/Firmata.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Firmata/src/Firmata.h	(revision 136)
@@ -0,0 +1,165 @@
+/*
+  Firmata.h - Firmata library
+  Copyright (C) 2006-2008 Hans-Christoph Steiner.  All rights reserved.
+ 
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  See file LICENSE.txt for further informations on licensing terms.
+*/
+
+#ifndef Firmata_h
+#define Firmata_h
+
+#include "Boards.h"  /* Hardware Abstraction Layer + Wiring/Arduino */
+
+/* Version numbers for the protocol.  The protocol is still changing, so these
+ * version numbers are important.  This number can be queried so that host
+ * software can test whether it will be compatible with the currently
+ * installed firmware. */
+#define FIRMATA_MAJOR_VERSION   2 // for non-compatible changes
+#define FIRMATA_MINOR_VERSION   3 // for backwards compatible changes
+#define FIRMATA_BUGFIX_VERSION  6 // for bugfix releases
+
+#define MAX_DATA_BYTES 32 // max number of data bytes in non-Sysex messages
+
+// message command bytes (128-255/0x80-0xFF)
+#define DIGITAL_MESSAGE         0x90 // send data for a digital pin
+#define ANALOG_MESSAGE          0xE0 // send data for an analog pin (or PWM)
+#define REPORT_ANALOG           0xC0 // enable analog input by pin #
+#define REPORT_DIGITAL          0xD0 // enable digital input by port pair
+//
+#define SET_PIN_MODE            0xF4 // set a pin to INPUT/OUTPUT/PWM/etc
+//
+#define REPORT_VERSION          0xF9 // report protocol version
+#define SYSTEM_RESET            0xFF // reset from MIDI
+//
+#define START_SYSEX             0xF0 // start a MIDI Sysex message
+#define END_SYSEX               0xF7 // end a MIDI Sysex message
+
+// extended command set using sysex (0-127/0x00-0x7F)
+/* 0x00-0x0F reserved for user-defined commands */
+#define SERVO_CONFIG            0x70 // set max angle, minPulse, maxPulse, freq
+#define STRING_DATA             0x71 // a string message with 14-bits per char
+#define SHIFT_DATA              0x75 // a bitstream to/from a shift register
+#define I2C_REQUEST             0x76 // send an I2C read/write request
+#define I2C_REPLY               0x77 // a reply to an I2C read request
+#define I2C_CONFIG              0x78 // config I2C settings such as delay times and power pins
+#define EXTENDED_ANALOG         0x6F // analog write (PWM, Servo, etc) to any pin
+#define PIN_STATE_QUERY         0x6D // ask for a pin's current mode and value
+#define PIN_STATE_RESPONSE      0x6E // reply with pin's current mode and value
+#define CAPABILITY_QUERY        0x6B // ask for supported modes and resolution of all pins
+#define CAPABILITY_RESPONSE     0x6C // reply with supported modes and resolution
+#define ANALOG_MAPPING_QUERY    0x69 // ask for mapping of analog to pin numbers
+#define ANALOG_MAPPING_RESPONSE 0x6A // reply with mapping info
+#define REPORT_FIRMWARE         0x79 // report name and version of the firmware
+#define SAMPLING_INTERVAL       0x7A // set the poll rate of the main loop
+#define SYSEX_NON_REALTIME      0x7E // MIDI Reserved for non-realtime messages
+#define SYSEX_REALTIME          0x7F // MIDI Reserved for realtime messages
+// these are DEPRECATED to make the naming more consistent
+#define FIRMATA_STRING          0x71 // same as STRING_DATA
+#define SYSEX_I2C_REQUEST       0x76 // same as I2C_REQUEST
+#define SYSEX_I2C_REPLY         0x77 // same as I2C_REPLY
+#define SYSEX_SAMPLING_INTERVAL 0x7A // same as SAMPLING_INTERVAL
+
+// pin modes
+//#define INPUT                 0x00 // defined in wiring.h
+//#define OUTPUT                0x01 // defined in wiring.h
+#define ANALOG                  0x02 // analog pin in analogInput mode
+#define PWM                     0x03 // digital pin in PWM output mode
+#define SERVO                   0x04 // digital pin in Servo output mode
+#define SHIFT                   0x05 // shiftIn/shiftOut mode
+#define I2C                     0x06 // pin included in I2C setup
+#define TOTAL_PIN_MODES         7
+
+extern "C" {
+// callback function types
+    typedef void (*callbackFunction)(byte, int);
+    typedef void (*systemResetCallbackFunction)(void);
+    typedef void (*stringCallbackFunction)(char*);
+    typedef void (*sysexCallbackFunction)(byte command, byte argc, byte*argv);
+}
+
+
+// TODO make it a subclass of a generic Serial/Stream base class
+class FirmataClass
+{
+public:
+    FirmataClass();
+/* Arduino constructors */
+    void begin();
+    void begin(long);
+    void begin(Stream &s);
+/* querying functions */
+    void printVersion(void);
+    void blinkVersion(void);
+    void printFirmwareVersion(void);
+  //void setFirmwareVersion(byte major, byte minor);  // see macro below
+    void setFirmwareNameAndVersion(const char *name, byte major, byte minor);
+    //void unsetFirmwareVersion(); // only used for unit test
+/* serial receive handling */
+    int available(void);
+    void processInput(void);
+/* serial send handling */
+    void sendAnalog(byte pin, int value);
+    void sendDigital(byte pin, int value); // TODO implement this
+    void sendDigitalPort(byte portNumber, int portData);
+    void sendString(const char* string);
+    void sendString(byte command, const char* string);
+    void sendSysex(byte command, byte bytec, byte* bytev);
+    void write(byte c);
+/* attach & detach callback functions to messages */
+    void attach(byte command, callbackFunction newFunction);
+    void attach(byte command, systemResetCallbackFunction newFunction);
+    void attach(byte command, stringCallbackFunction newFunction);
+    void attach(byte command, sysexCallbackFunction newFunction);
+    void detach(byte command);
+
+private:
+    Stream *FirmataSerial;
+/* firmware name and version */
+    byte firmwareVersionCount;
+    byte *firmwareVersionVector;
+/* input message handling */
+    byte waitForData; // this flag says the next serial input will be data
+    byte executeMultiByteCommand; // execute this after getting multi-byte data
+    byte multiByteChannel; // channel data for multiByteCommands
+    byte storedInputData[MAX_DATA_BYTES]; // multi-byte data
+/* sysex */
+    boolean parsingSysex;
+    int sysexBytesRead;
+/* callback functions */
+    callbackFunction currentAnalogCallback;
+    callbackFunction currentDigitalCallback;
+    callbackFunction currentReportAnalogCallback;
+    callbackFunction currentReportDigitalCallback;
+    callbackFunction currentPinModeCallback;
+    systemResetCallbackFunction currentSystemResetCallback;
+    stringCallbackFunction currentStringCallback;
+    sysexCallbackFunction currentSysexCallback;
+
+/* private methods ------------------------------ */
+    void processSysexMessage(void);
+    void systemReset(void);
+    void strobeBlinkPin(int count, int onInterval, int offInterval);
+    void sendValueAsTwo7bitBytes(int value);
+    void startSysex(void);
+    void endSysex(void);
+};
+
+extern FirmataClass Firmata;
+
+/*==============================================================================
+ * MACROS
+ *============================================================================*/
+
+/* shortcut for setFirmwareNameAndVersion() that uses __FILE__ to set the
+ * firmware name.  It needs to be a macro so that __FILE__ is included in the
+ * firmware source file rather than the library source file.
+ */
+#define setFirmwareVersion(x, y)   setFirmwareNameAndVersion(__FILE__, x, y)
+
+#endif /* Firmata_h */
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= GSM Library for Arduino =
+
+With the Arduino GSM Shield, this library enables an Arduino board to do most of the operations you can do with a GSM phone: place and receive voice calls, send and receive SMS, and connect to the internet over a GPRS network. 
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/GSM
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/GPRS_Position/GPRS_Position.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/GPRS_Position/GPRS_Position.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/GPRS_Position/GPRS_Position.ino	(revision 136)
@@ -0,0 +1,67 @@
+/*
+ GPRS_Position
+
+ A simple Sketch that shows the Longitude  and Latitude
+ using a GSM shield.
+
+ Circuit: 
+ GSM shield attached
+
+ Notes: 
+ You have to change the apn, login and password.
+ If your SIM has PIN you have to set 
+ 
+ created 3 Apr. 2015
+ by Arduino.org team (http://arduino.org)
+ */
+
+// Library include
+#include <GSM.h>
+// SIM and Network constant
+#define PINNUMBER  ""         // if present, insert Your PIN here
+#define apn "internet.wind"   // change the apn
+//#define apn "ibox.tim.it"
+//#define apn "unico.tim.it"
+//#define apn "wap.tim"
+#define login ""              // insert your login
+#define password ""           // isnert your password
+
+// initialize the library instance
+GSM gsmAccess;            // GSM access: include a 'true' parameter for debug enabled
+GPRS gprsAccess;          // GPRS access
+GSMClient client;         // Client service for TCP connection
+GSM2 gprsPosition;        // GPRS Posistioning system
+
+
+
+void setup() {
+  // put your setup code here, to run once:
+  Serial.begin(9600);
+  
+  // start GSM shield
+ 
+  Serial.println(" ");
+  Serial.print("Connecting GSM network...");
+  if (gsmAccess.begin(PINNUMBER) != GSM_READY)
+  {
+    Serial.println("Error !");
+    while (true);
+  }
+  Serial.println("Ok !");
+  Serial.println("Setting APN...");
+  gprsAccess.attachGPRS(apn, login, password);
+  Serial.print("APN :");
+  Serial.println(apn);
+  Serial.print("Login :");
+  Serial.println(login);
+  Serial.print("Password :");
+  Serial.println(password);
+}
+
+void loop() {
+  // put your main code here, to run repeatedly:
+  
+  Serial.print("Position: ");
+  Serial.println(gprsPosition.getPosition());
+
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/GsmWebClient/GsmWebClient.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/GsmWebClient/GsmWebClient.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/GsmWebClient/GsmWebClient.ino	(revision 136)
@@ -0,0 +1,109 @@
+/*
+  Web client
+
+ This sketch connects to a website through a GSM shield. Specifically,
+ this example downloads the URL "http://arduino.cc/asciilogo.txt" and
+ prints it to the Serial monitor.
+
+ Circuit:
+ * GSM shield attached to an Arduino
+ * SIM card with a data plan
+
+ created 8 Mar 2012
+ by Tom Igoe
+
+ http://arduino.cc/en/Tutorial/GSMExamplesWebClient
+
+ */
+
+// libraries
+#include <GSM.h>
+
+// PIN Number
+#define PINNUMBER ""
+
+// APN data
+#define GPRS_APN       "GPRS_APN" // replace your GPRS APN
+#define GPRS_LOGIN     "login"    // replace with your GPRS login
+#define GPRS_PASSWORD  "password" // replace with your GPRS password
+
+// initialize the library instance
+GSMClient client;
+GPRS gprs;
+GSM gsmAccess;
+
+// URL, path & port (for example: arduino.cc)
+char server[] = "arduino.cc";
+char path[] = "/asciilogo.txt";
+int port = 80; // port 80 is the default for HTTP
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.println("Starting Arduino web client.");
+  // connection state
+  boolean notConnected = true;
+
+  // After starting the modem with GSM.begin()
+  // attach the shield to the GPRS network with the APN, login and password
+  while (notConnected)
+  {
+    if ((gsmAccess.begin(PINNUMBER) == GSM_READY) &
+        (gprs.attachGPRS(GPRS_APN, GPRS_LOGIN, GPRS_PASSWORD) == GPRS_READY))
+      notConnected = false;
+    else
+    {
+      Serial.println("Not connected");
+      delay(1000);
+    }
+  }
+
+  Serial.println("connecting...");
+
+  // if you get a connection, report back via serial:
+  if (client.connect(server, port))
+  {
+    Serial.println("connected");
+    // Make a HTTP request:
+    client.print("GET ");
+    client.print(path);
+    client.println(" HTTP/1.1");
+    client.print("Host: ");
+    client.println(server);
+    client.println("Connection: close");
+    client.println();
+  }
+  else
+  {
+    // if you didn't get a connection to the server:
+    Serial.println("connection failed");
+  }
+}
+
+void loop()
+{
+  // if there are incoming bytes available
+  // from the server, read them and print them:
+  if (client.available())
+  {
+    char c = client.read();
+    Serial.print(c);
+  }
+
+  // if the server's disconnected, stop the client:
+  if (!client.available() && !client.connected())
+  {
+    Serial.println();
+    Serial.println("disconnecting.");
+    client.stop();
+
+    // do nothing forevermore:
+    for (;;)
+      ;
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/GsmWebServer/GsmWebServer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/GsmWebServer/GsmWebServer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/GsmWebServer/GsmWebServer.ino	(revision 136)
@@ -0,0 +1,118 @@
+/*
+ GSM Web Server
+
+ A simple web server that shows the value of the analog input pins.
+ using a GSM shield.
+
+ Circuit:
+ * GSM shield attached
+ * Analog inputs attached to pins A0 through A5 (optional)
+
+ created 8 Mar 2012
+ by Tom Igoe
+ */
+
+// libraries
+#include <GSM.h>
+
+// PIN Number
+#define PINNUMBER ""
+
+// APN data
+#define GPRS_APN       "GPRS_APN" // replace your GPRS APN
+#define GPRS_LOGIN     "login"    // replace with your GPRS login
+#define GPRS_PASSWORD  "password" // replace with your GPRS password
+
+
+// initialize the library instance
+GPRS gprs;
+GSM gsmAccess;     // include a 'true' parameter for debug enabled
+GSMServer server(80); // port 80 (http default)
+
+// timeout
+const unsigned long __TIMEOUT__ = 10 * 1000;
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  // connection state
+  boolean notConnected = true;
+
+  // Start GSM shield
+  // If your SIM has PIN, pass it as a parameter of begin() in quotes
+  while (notConnected)
+  {
+    if ((gsmAccess.begin(PINNUMBER) == GSM_READY) &
+        (gprs.attachGPRS(GPRS_APN, GPRS_LOGIN, GPRS_PASSWORD) == GPRS_READY))
+      notConnected = false;
+    else
+    {
+      Serial.println("Not connected");
+      delay(1000);
+    }
+  }
+
+  Serial.println("Connected to GPRS network");
+
+  // start server
+  server.begin();
+
+  //Get IP.
+  IPAddress LocalIP = gprs.getIPAddress();
+  Serial.println("Server IP address=");
+  Serial.println(LocalIP);
+}
+
+void loop() {
+
+
+  // listen for incoming clients
+  GSMClient client = server.available();
+
+
+
+  if (client)
+  {
+    while (client.connected())
+    {
+      if (client.available())
+      {
+        Serial.println("Receiving request!");
+        bool sendResponse = false;
+        while (char c = client.read()) {
+          if (c == '\n') sendResponse = true;
+        }
+
+        // if you've gotten to the end of the line (received a newline
+        // character)
+        if (sendResponse)
+        {
+          // send a standard http response header
+          client.println("HTTP/1.1 200 OK");
+          client.println("Content-Type: text/html");
+          client.println();
+          client.println("<html>");
+          // output the value of each analog input pin
+          for (int analogChannel = 0; analogChannel < 6; analogChannel++) {
+            client.print("analog input ");
+            client.print(analogChannel);
+            client.print(" is ");
+            client.print(analogRead(analogChannel));
+            client.println("<br />");
+          }
+          client.println("</html>");
+          //necessary delay
+          delay(1000);
+          client.stop();
+        }
+      }
+    }
+  }
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/MakeVoiceCall/MakeVoiceCall.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/MakeVoiceCall/MakeVoiceCall.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/MakeVoiceCall/MakeVoiceCall.ino	(revision 136)
@@ -0,0 +1,116 @@
+/*
+ Make Voice Call
+
+ This sketch, for the Arduino GSM shield, puts a voice call to
+ a remote phone number that you enter through the serial monitor.
+ To make it work, open the serial monitor, and when you see the
+ READY message, type a phone number. Make sure the serial monitor
+ is set to send a just newline when you press return.
+
+ Circuit:
+ * GSM shield
+ * Voice circuit.
+ With no voice circuit the call will send nor receive any sound
+
+
+ created Mar 2012
+ by Javier Zorzano
+
+ This example is in the public domain.
+ */
+
+// libraries
+#include <GSM.h>
+
+// PIN Number
+#define PINNUMBER ""
+
+// initialize the library instance
+GSM gsmAccess; // include a 'true' parameter for debug enabled
+GSMVoiceCall vcs;
+
+String remoteNumber = "";  // the number you will call
+char charbuffer[20];
+
+void setup()
+{
+
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.println("Make Voice Call");
+
+  // connection state
+  boolean notConnected = true;
+
+  // Start GSM shield
+  // If your SIM has PIN, pass it as a parameter of begin() in quotes
+  while (notConnected)
+  {
+    if (gsmAccess.begin(PINNUMBER) == GSM_READY)
+      notConnected = false;
+    else
+    {
+      Serial.println("Not connected");
+      delay(1000);
+    }
+  }
+
+  Serial.println("GSM initialized.");
+  Serial.println("Enter phone number to call.");
+
+}
+
+void loop()
+{
+
+  // add any incoming characters to the String:
+  while (Serial.available() > 0)
+  {
+    char inChar = Serial.read();
+    // if it's a newline, that means you should make the call:
+    if (inChar == '\n')
+    {
+      // make sure the phone number is not too long:
+      if (remoteNumber.length() < 20)
+      {
+        // let the user know you're calling:
+        Serial.print("Calling to : ");
+        Serial.println(remoteNumber);
+        Serial.println();
+
+        // Call the remote number
+        remoteNumber.toCharArray(charbuffer, 20);
+
+
+        // Check if the receiving end has picked up the call
+        if (vcs.voiceCall(charbuffer))
+        {
+          Serial.println("Call Established. Enter line to end");
+          // Wait for some input from the line
+          while (Serial.read() != '\n' && (vcs.getvoiceCallStatus() == TALKING));
+          // And hang up
+          vcs.hangCall();
+        }
+        Serial.println("Call Finished");
+        remoteNumber = "";
+        Serial.println("Enter phone number to call.");
+      }
+      else
+      {
+        Serial.println("That's too long for a phone number. I'm forgetting it");
+        remoteNumber = "";
+      }
+    }
+    else
+    {
+      // add the latest character to the message to send:
+      if (inChar != '\r')
+        remoteNumber += inChar;
+    }
+  }
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/ReceiveSMS/ReceiveSMS.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/ReceiveSMS/ReceiveSMS.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/ReceiveSMS/ReceiveSMS.ino	(revision 136)
@@ -0,0 +1,98 @@
+/*
+ SMS receiver
+
+ This sketch, for the Arduino GSM shield, waits for a SMS message
+ and displays it through the Serial port.
+
+ Circuit:
+ * GSM shield attached to and Arduino
+ * SIM card that can receive SMS messages
+
+ created 25 Feb 2012
+ by Javier Zorzano / TD
+
+ This example is in the public domain.
+
+ http://arduino.cc/en/Tutorial/GSMExamplesReceiveSMS
+
+*/
+
+// include the GSM library
+#include <GSM.h>
+
+// PIN Number for the SIM
+#define PINNUMBER ""
+
+// initialize the library instances
+GSM gsmAccess;
+GSM_SMS sms;
+
+// Array to hold the number a SMS is retreived from
+char senderNumber[20];
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.println("SMS Messages Receiver");
+
+  // connection state
+  boolean notConnected = true;
+
+  // Start GSM connection
+  while (notConnected)
+  {
+    if (gsmAccess.begin(PINNUMBER) == GSM_READY)
+      notConnected = false;
+    else
+    {
+      Serial.println("Not connected");
+      delay(1000);
+    }
+  }
+
+  Serial.println("GSM initialized");
+  Serial.println("Waiting for messages");
+}
+
+void loop()
+{
+  char c;
+
+  // If there are any SMSs available()
+  if (sms.available())
+  {
+    Serial.println("Message received from:");
+
+    // Get remote number
+    sms.remoteNumber(senderNumber, 20);
+    Serial.println(senderNumber);
+
+    // An example of message disposal
+    // Any messages starting with # should be discarded
+    if (sms.peek() == '#')
+    {
+      Serial.println("Discarded SMS");
+      sms.flush();
+    }
+
+    // Read message bytes and print them
+    while (c = sms.read())
+      Serial.print(c);
+
+    Serial.println("\nEND OF MESSAGE");
+
+    // Delete message from modem memory
+    sms.flush();
+    Serial.println("MESSAGE DELETED");
+  }
+
+  delay(1000);
+
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/ReceiveVoiceCall/ReceiveVoiceCall.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/ReceiveVoiceCall/ReceiveVoiceCall.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/ReceiveVoiceCall/ReceiveVoiceCall.ino	(revision 136)
@@ -0,0 +1,105 @@
+/*
+ Receive Voice Call
+
+ This sketch, for the Arduino GSM shield, receives voice calls,
+ displays the calling number, waits a few seconds then hangs up.
+
+ Circuit:
+ * GSM shield
+ * Voice circuit. Refer to to the GSM shield getting started guide
+   at http://arduino.cc/en/Guide/ArduinoGSMShield#toc11
+ * SIM card that can accept voice calls
+
+ With no voice circuit the call will connect, but will not send or receive sound
+
+ created Mar 2012
+ by Javier Zorzano
+
+ This example is in the public domain.
+
+ http://arduino.cc/en/Tutorial/GSMExamplesReceiveVoiceCall
+
+ */
+
+// Include the GSM library
+#include <GSM.h>
+
+// PIN Number
+#define PINNUMBER ""
+
+// initialize the library instance
+GSM gsmAccess;
+GSMVoiceCall vcs;
+
+// Array to hold the number for the incoming call
+char numtel[20];
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.println("Receive Voice Call");
+
+  // connection state
+  boolean notConnected = true;
+
+  // Start GSM shield
+  // If your SIM has PIN, pass it as a parameter of begin() in quotes
+  while (notConnected)
+  {
+    if (gsmAccess.begin(PINNUMBER) == GSM_READY)
+      notConnected = false;
+    else
+    {
+      Serial.println("Not connected");
+      delay(1000);
+    }
+  }
+
+  // This makes sure the modem correctly reports incoming events
+  vcs.hangCall();
+
+  Serial.println("Waiting for a call");
+}
+
+void loop()
+{
+  // Check the status of the voice call
+  switch (vcs.getvoiceCallStatus())
+  {
+    case IDLE_CALL: // Nothing is happening
+
+      break;
+
+    case RECEIVINGCALL: // Yes! Someone is calling us
+
+      Serial.println("RECEIVING CALL");
+
+      // Retrieve the calling number
+      vcs.retrieveCallingNumber(numtel, 20);
+
+      // Print the calling number
+      Serial.print("Number:");
+      Serial.println(numtel);
+
+      // Answer the call, establish the call
+      vcs.answerCall();
+      break;
+
+    case TALKING:  // In this case the call would be established
+
+      Serial.println("TALKING. Press enter to hang up.");
+      while (Serial.read() != '\n')
+        delay(100);
+      vcs.hangCall();
+      Serial.println("Hanging up and waiting for the next call.");
+      break;
+  }
+  delay(1000);
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/ReceiveVoiceCallGSM2/ReceiveVoiceCallGSM2.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/ReceiveVoiceCallGSM2/ReceiveVoiceCallGSM2.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/ReceiveVoiceCallGSM2/ReceiveVoiceCallGSM2.ino	(revision 136)
@@ -0,0 +1,123 @@
+/*
+ Receive Voice Call
+
+ This sketch, for the Arduino GSM shield, receives voice calls,
+ displays the calling number, waits a few seconds then hangs up.
+
+ Circuit:
+ * GSM shield
+ * Voice circuit. Refer to to the GSM shield getting started guide
+   at http://arduino.cc/en/Guide/ArduinoGSMShield#toc11
+ * SIM card that can accept voice calls
+
+ With no voice circuit the call will connect, but will not send or receive sound
+
+ created Mar 2012
+ by Javier Zorzano
+
+ This example is in the public domain.
+
+ http://arduino.cc/en/Tutorial/GSMExamplesReceiveVoiceCall
+
+ 
+ Added Arduino GSM Shield 2 features
+ modified Apr 2015
+ by Arduino.org team (http://arduino.org) 
+ */
+
+// Include the GSM library
+#include <GSM.h>
+
+// PIN Number
+#define PINNUMBER ""
+
+// initialize the library instance
+GSM gsmAccess;
+GSM2 gsmAccessV2;
+GSMVoiceCall vcs;
+
+#define number_len 20    // define incoming call number lenght
+
+// Array to hold the number for the incoming call
+char number[number_len];
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.println("Receive Voice Call");
+
+  // connection state
+  boolean notConnected = true;
+
+  // Start GSM shield
+  // If your SIM has PIN, pass it as a parameter of begin() in quotes
+  while (notConnected)
+  {
+    if (gsmAccess.begin(PINNUMBER) == GSM_READY)
+      notConnected = false;
+    else
+    {
+      Serial.println("Not connected");
+      delay(1000);
+    }
+  }
+
+  // This makes sure the modem correctly reports incoming events
+  vcs.hangCall();
+  gsmAccessV2.muteControl(0);  //not allowed by the module
+  gsmAccessV2.CommandEcho(1);  // set echo
+  gsmAccessV2.speakerMode(1);  //set speaker mode
+  gsmAccessV2.speakerLoudness(3); //set speaker loudness
+  gsmAccessV2.swapAudioChannel(1); //set audio channel
+ gsmAccessV2.microphoneGainLevel(1,13); //set microphone gain level
+ gsmAccessV2.ringerSoundLevel(20);  //set ring sound level
+ gsmAccessV2.alertSoundMode(0);   //set alert sound mode (sound)
+ gsmAccessV2.loudSpeakerVolumeLevel(20); //set loudspeaker volume level
+ 
+  Serial.println("Waiting for a call");
+}
+
+void loop()
+{
+  // Check the status of the voice call
+  switch (vcs.getvoiceCallStatus())
+  {
+    case IDLE_CALL: // Nothing is happening
+
+      break;
+
+    case RECEIVINGCALL: // Yes! Someone is calling us
+      
+      Serial.println("RECEIVING CALL");
+      
+      
+      // Retrieve the calling number
+      vcs.retrieveCallingNumber(number, number_len);
+
+      // Print the calling number
+      Serial.print("Number:");
+      Serial.println(number);
+      Serial.println("Press a to answer");
+      while(Serial.read() !='a');
+      // Answer the call, establish the call
+      vcs.answerCall();
+      break;
+
+    case TALKING:  // In this case the call would be established
+
+      Serial.println("TALKING. Press h to hang up.");
+      while (Serial.read() != 'h')
+        delay(100);
+      vcs.hangCall();
+      Serial.println("Hanging up and waiting for the next call.");
+      break;
+  }
+  delay(1000);
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/SendSMS/SendSMS.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/SendSMS/SendSMS.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/SendSMS/SendSMS.ino	(revision 136)
@@ -0,0 +1,110 @@
+/*
+ SMS sender
+
+ This sketch, for the Arduino GSM shield,sends an SMS message
+ you enter in the serial monitor. Connect your Arduino with the
+ GSM shield and SIM card, open the serial monitor, and wait for
+ the "READY" message to appear in the monitor. Next, type a
+ message to send and press "return". Make sure the serial
+ monitor is set to send a newline when you press return.
+
+ Circuit:
+ * GSM shield
+ * SIM card that can send SMS
+
+ created 25 Feb 2012
+ by Tom Igoe
+
+ This example is in the public domain.
+
+ http://arduino.cc/en/Tutorial/GSMExamplesSendSMS
+
+ */
+
+// Include the GSM library
+#include <GSM.h>
+
+#define PINNUMBER ""
+
+// initialize the library instance
+GSM gsmAccess;
+GSM_SMS sms;
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.println("SMS Messages Sender");
+
+  // connection state
+  boolean notConnected = true;
+
+  // Start GSM shield
+  // If your SIM has PIN, pass it as a parameter of begin() in quotes
+  while (notConnected)
+  {
+    if (gsmAccess.begin(PINNUMBER) == GSM_READY)
+      notConnected = false;
+    else
+    {
+      Serial.println("Not connected");
+      delay(1000);
+    }
+  }
+
+  Serial.println("GSM initialized");
+}
+
+void loop()
+{
+
+  Serial.print("Enter a mobile number: ");
+  char remoteNum[20];  // telephone number to send sms
+  readSerial(remoteNum);
+  Serial.println(remoteNum);
+
+  // sms text
+  Serial.print("Now, enter SMS content: ");
+  char txtMsg[200];
+  readSerial(txtMsg);
+  Serial.println("SENDING");
+  Serial.println();
+  Serial.println("Message:");
+  Serial.println(txtMsg);
+
+  // send the message
+  sms.beginSMS(remoteNum);
+  sms.print(txtMsg);
+  sms.endSMS();
+  Serial.println("\nCOMPLETE!\n");
+}
+
+/*
+  Read input serial
+ */
+int readSerial(char result[])
+{
+  int i = 0;
+  while (1)
+  {
+    while (Serial.available() > 0)
+    {
+      char inChar = Serial.read();
+      if (inChar == '\n')
+      {
+        result[i] = '\0';
+        Serial.flush();
+        return 0;
+      }
+      if (inChar != '\r')
+      {
+        result[i] = inChar;
+        i++;
+      }
+    }
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/BandManagement/BandManagement.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/BandManagement/BandManagement.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/BandManagement/BandManagement.ino	(revision 136)
@@ -0,0 +1,120 @@
+/*
+ Band Management
+
+ This sketch, for the Arduino GSM shield, checks the band
+ currently configured in the modem and allows you to change
+ it.
+
+ Please check http://www.worldtimezone.com/gsm.html
+ Usual configurations:
+ Europe, Africa, Middle East: E-GSM(900)+DCS(1800)
+ USA, Canada, South America: GSM(850)+PCS(1900)
+ Mexico: PCS(1900)
+ Brazil: GSM(850)+E-GSM(900)+DCS(1800)+PCS(1900)
+
+
+ Circuit:
+ * GSM shield
+
+ created 12 June 2012
+ by Javier Zorzano, Scott Fitzgerald
+
+ This example is in the public domain.
+ */
+
+// libraries
+#include <GSM.h>
+
+// initialize the library instance
+GSMBand band;
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  // Beginning the band manager restarts the modem
+  Serial.println("Restarting modem...");
+  band.begin();
+  Serial.println("Modem restarted.");
+
+};
+
+
+void loop()
+{
+  // Get current band
+  String bandName = band.getBand(); // Get and print band name
+  Serial.print("Current band:");
+  Serial.println(bandName);
+  Serial.println("Want to change the band youâre on?");
+  String newBandName;
+  newBandName = askUser();
+  // Tell the user what we are about to doâ¦
+  Serial.print("\nConfiguring band ");
+  Serial.println(newBandName);
+  // Change the band
+  boolean operationSuccess;
+  operationSuccess = band.setBand(newBandName);
+  // Tell the user if the operation was OK
+  if (operationSuccess)
+  {
+    Serial.println("Success");
+  }
+  else
+  {
+    Serial.println("Error while changing band");
+  }
+
+  if (operationSuccess)
+  {
+    while (true);
+  }
+}
+
+// This function offers the user different options
+// through the Serial interface
+// The user selects one
+String askUser()
+{
+  String newBand;
+  Serial.println("Select band:");
+  // Print the different options
+  Serial.println("1 : E-GSM(900)");
+  Serial.println("2 : DCS(1800)");
+  Serial.println("3 : PCS(1900)");
+  Serial.println("4 : E-GSM(900)+DCS(1800) ex: Europe");
+  Serial.println("5 : GSM(850)+PCS(1900) Ex: USA, South Am.");
+  Serial.println("6 : GSM(850)+E-GSM(900)+DCS(1800)+PCS(1900)");
+
+  // Empty the incoming buffer
+  while (Serial.available())
+    Serial.read();
+
+  // Wait for an answer, just look at the first character
+  while (!Serial.available());
+  char c = Serial.read();
+  if (c == '1')
+    newBand = GSM_MODE_EGSM;
+  else if (c == '2')
+    newBand = GSM_MODE_DCS;
+  else if (c == '3')
+    newBand = GSM_MODE_PCS;
+  else if (c == '4')
+    newBand = GSM_MODE_EGSM_DCS;
+  else if (c == '5')
+    newBand = GSM_MODE_GSM850_PCS;
+  else if (c == '6')
+    newBand = GSM_MODE_GSM850_EGSM_DCS_PCS;
+  else
+    newBand = "GSM_MODE_UNDEFINED";
+  return newBand;
+}
+
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/GsmScanNetworks/GsmScanNetworks.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/GsmScanNetworks/GsmScanNetworks.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/GsmScanNetworks/GsmScanNetworks.ino	(revision 136)
@@ -0,0 +1,95 @@
+/*
+
+ GSM Scan Networks
+
+ This example prints out the IMEI number of the modem,
+ then checks to see if it's connected to a carrier. If so,
+ it prints the phone number associated with the card.
+ Then it scans for nearby networks and prints out their signal strengths.
+
+ Circuit:
+ * GSM shield
+ * SIM card
+
+ Created 8 Mar 2012
+ by Tom Igoe, implemented by Javier Carazo
+ Modified 4 Feb 2013
+ by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/GSMToolsGsmScanNetworks
+
+ This example code is part of the public domain
+ */
+
+// libraries
+#include <GSM.h>
+
+// PIN Number
+#define PINNUMBER ""
+
+// initialize the library instance
+GSM gsmAccess;     // include a 'true' parameter to enable debugging
+GSMScanner scannerNetworks;
+GSMModem modemTest;
+
+// Save data variables
+String IMEI = "";
+
+// serial monitor result messages
+String errortext = "ERROR";
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.println("GSM networks scanner");
+  scannerNetworks.begin();
+
+  // connection state
+  boolean notConnected = true;
+
+  // Start GSM shield
+  // If your SIM has PIN, pass it as a parameter of begin() in quotes
+  while (notConnected)
+  {
+    if (gsmAccess.begin(PINNUMBER) == GSM_READY)
+      notConnected = false;
+    else
+    {
+      Serial.println("Not connected");
+      delay(1000);
+    }
+  }
+
+  // get modem parameters
+  // IMEI, modem unique identifier
+  Serial.print("Modem IMEI: ");
+  IMEI = modemTest.getIMEI();
+  IMEI.replace("\n", "");
+  if (IMEI != NULL)
+    Serial.println(IMEI);
+}
+
+void loop()
+{
+  // scan for existing networks, displays a list of networks
+  Serial.println("Scanning available networks. May take some seconds.");
+  Serial.println(scannerNetworks.readNetworks());
+
+  // currently connected carrier
+  Serial.print("Current carrier: ");
+  Serial.println(scannerNetworks.getCurrentCarrier());
+
+  // returns strength and ber
+  // signal strength in 0-31 scale. 31 means power > 51dBm
+  // BER is the Bit Error Rate. 0-7 scale. 99=not detectable
+  Serial.print("Signal Strength: ");
+  Serial.print(scannerNetworks.getSignalStrength());
+  Serial.println(" [0-31]");
+
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/PinManagement/PinManagement.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/PinManagement/PinManagement.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/PinManagement/PinManagement.ino	(revision 136)
@@ -0,0 +1,168 @@
+/*
+
+ This example enables you to change or remove the PIN number of
+ a SIM card inserted into a GSM shield.
+
+ Circuit:
+ * GSM shield
+ * SIM card
+
+ Created 12 Jun 2012
+ by David del Peral
+
+ This example code is part of the public domain
+
+ http://arduino.cc/en/Tutorial/GSMToolsPinManagement
+
+ */
+
+// libraries
+#include <GSM.h>
+
+// pin manager object
+GSMPIN PINManager;
+
+// save input in serial by user
+String user_input = "";
+
+// authenticated with PIN code
+boolean auth = false;
+
+// serial monitor result messages
+String oktext = "OK";
+String errortext = "ERROR";
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.println("Change PIN example\n");
+  PINManager.begin();
+
+  // check if the SIM have pin lock
+  while (!auth) {
+    int pin_query = PINManager.isPIN();
+    if (pin_query == 1)
+    {
+      // if SIM is locked, enter PIN code
+      Serial.print("Enter PIN code: ");
+      user_input = readSerial();
+      // check PIN code
+      if (PINManager.checkPIN(user_input) == 0)
+      {
+        auth = true;
+        PINManager.setPINUsed(true);
+        Serial.println(oktext);
+      }
+      else
+      {
+        // if PIN code was incorrected
+        Serial.println("Incorrect PIN. Remember that you have 3 opportunities.");
+      }
+    }
+    else if (pin_query == -1)
+    {
+      // PIN code is locked, user must enter PUK code
+      Serial.println("PIN locked. Enter PUK code: ");
+      String puk = readSerial();
+      Serial.print("Now, enter a new PIN code: ");
+      user_input = readSerial();
+      // check PUK code
+      if (PINManager.checkPUK(puk, user_input) == 0)
+      {
+        auth = true;
+        PINManager.setPINUsed(true);
+        Serial.println(oktext);
+      }
+      else
+      {
+        // if PUK o the new PIN are incorrect
+        Serial.println("Incorrect PUK or invalid new PIN. Try again!.");
+      }
+    }
+    else if (pin_query == -2)
+    {
+      // the worst case, PIN and PUK are locked
+      Serial.println("PIN & PUK locked. Use PIN2/PUK2 in a mobile phone.");
+      while (true);
+    }
+    else
+    {
+      // SIM does not requires authetication
+      Serial.println("No pin necessary.");
+      auth = true;
+    }
+  }
+
+  // start GSM shield
+  Serial.print("Checking register in GSM network...");
+  if (PINManager.checkReg() == 0)
+    Serial.println(oktext);
+  // if you are connect by roaming
+  else if (PINManager.checkReg() == 1)
+    Serial.println("ROAMING " + oktext);
+  else
+  {
+    // error connection
+    Serial.println(errortext);
+    while (true);
+  }
+}
+
+void loop()
+{
+  // Function loop implements pin management user menu
+  // Only if you SIM use pin lock, you can change PIN code
+  // user_op variables save user option
+
+  Serial.println("Choose an option:\n1 - On/Off PIN.");
+  if (PINManager.getPINUsed())
+    Serial.println("2 - Change PIN.");
+  String user_op = readSerial();
+  if (user_op == "1")
+  {
+    Serial.println("Enter your PIN code:");
+    user_input = readSerial();
+    // activate/deactivate PIN lock
+    PINManager.switchPIN(user_input);
+  }
+  else if (user_op == "2" & PINManager.getPINUsed())
+  {
+    Serial.println("Enter your actual PIN code:");
+    String oldPIN = readSerial();
+    Serial.println("Now, enter your new PIN code:");
+    String newPIN = readSerial();
+    // change PIN
+    PINManager.changePIN(oldPIN, newPIN);
+  }
+  else
+  {
+    Serial.println("Incorrect option. Try again!.");
+  }
+  delay(1000);
+}
+
+/*
+  Read input serial
+ */
+String readSerial()
+{
+  String text = "";
+  while (1)
+  {
+    while (Serial.available() > 0)
+    {
+      char inChar = Serial.read();
+      if (inChar == '\n')
+      {
+        return text;
+      }
+      if (inChar != '\r')
+        text += inChar;
+    }
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/TestGPRS/TestGPRS.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/TestGPRS/TestGPRS.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/TestGPRS/TestGPRS.ino	(revision 136)
@@ -0,0 +1,204 @@
+/*
+
+ This sketch test the GSM shield's ability to connect to a
+ GPERS network. It asks for APN information through the
+ serial monitor and tries to connect to arduino.cc.
+
+ Circuit:
+ * GSM shield attached
+ * SIM card with data plan
+
+ Created 18 Jun 2012
+ by David del Peral
+
+ This example code is part of the public domain
+
+ http://arduino.cc/en/Tutorial/GSMToolsTestGPRS
+
+ */
+
+// libraries
+#include <GSM.h>
+
+// PIN Number
+#define PINNUMBER ""
+
+// initialize the library instance
+GSM gsmAccess;        // GSM access: include a 'true' parameter for debug enabled
+GPRS gprsAccess;  // GPRS access
+GSMClient client;  // Client service for TCP connection
+
+// messages for serial monitor response
+String oktext = "OK";
+String errortext = "ERROR";
+
+// URL and path (for example: arduino.cc)
+char url[] = "arduino.cc";
+char urlproxy[] = "http://arduino.cc";
+char path[] = "/";
+
+// variable for save response obtained
+String response = "";
+
+// use a proxy
+boolean use_proxy = false;
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+}
+
+void loop()
+{
+  use_proxy = false;
+
+  // start GSM shield
+  // if your SIM has PIN, pass it as a parameter of begin() in quotes
+  Serial.print("Connecting GSM network...");
+  if (gsmAccess.begin(PINNUMBER) != GSM_READY)
+  {
+    Serial.println(errortext);
+    while (true);
+  }
+  Serial.println(oktext);
+
+  // read APN introduced by user
+  char apn[50];
+  Serial.print("Enter your APN: ");
+  readSerial(apn);
+  Serial.println(apn);
+
+  // Read APN login introduced by user
+  char login[50];
+  Serial.print("Now, enter your login: ");
+  readSerial(login);
+  Serial.println(login);
+
+  // read APN password introduced by user
+  char password[20];
+  Serial.print("Finally, enter your password: ");
+  readSerial(password);
+
+  // attach GPRS
+  Serial.println("Attaching to GPRS with your APN...");
+  if (gprsAccess.attachGPRS(apn, login, password) != GPRS_READY)
+  {
+    Serial.println(errortext);
+  }
+  else {
+
+    Serial.println(oktext);
+
+    // read proxy introduced by user
+    char proxy[100];
+    Serial.print("If your carrier uses a proxy, enter it, if not press enter: ");
+    readSerial(proxy);
+    Serial.println(proxy);
+
+    // if user introduced a proxy, asks him for proxy port
+    int pport;
+    if (proxy[0] != '\0') {
+      // read proxy port introduced by user
+      char proxyport[10];
+      Serial.print("Enter the proxy port: ");
+      readSerial(proxyport);
+      // cast proxy port introduced to integer
+      pport = (int) proxyport;
+      use_proxy = true;
+      Serial.println(proxyport);
+    }
+
+    // connection with arduino.cc and realize HTTP request
+    Serial.print("Connecting and sending GET request to arduino.cc...");
+    int res_connect;
+
+    // if use a proxy, connect with it
+    if (use_proxy)
+      res_connect = client.connect(proxy, pport);
+    else
+      res_connect = client.connect(url, 80);
+
+    if (res_connect)
+    {
+      // make a HTTP 1.0 GET request (client sends the request)
+      client.print("GET ");
+
+      // if use a proxy, the path is arduino.cc URL
+      if (use_proxy)
+        client.print(urlproxy);
+      else
+        client.print(path);
+
+      client.println(" HTTP/1.0");
+      client.println();
+      Serial.println(oktext);
+    }
+    else
+    {
+      // if you didn't get a connection to the server
+      Serial.println(errortext);
+    }
+    Serial.print("Receiving response...");
+
+    boolean test = true;
+    while (test)
+    {
+      // if there are incoming bytes available
+      // from the server, read and check them
+      if (client.available())
+      {
+        char c = client.read();
+        response += c;
+
+        // cast response obtained from string to char array
+        char responsechar[response.length() + 1];
+        response.toCharArray(responsechar, response.length() + 1);
+
+        // if response includes a "200 OK" substring
+        if (strstr(responsechar, "200 OK") != NULL) {
+          Serial.println(oktext);
+          Serial.println("TEST COMPLETE!");
+          test = false;
+        }
+      }
+
+      // if the server's disconnected, stop the client:
+      if (!client.connected())
+      {
+        Serial.println();
+        Serial.println("disconnecting.");
+        client.stop();
+        test = false;
+      }
+    }
+  }
+}
+
+/*
+  Read input serial
+ */
+int readSerial(char result[])
+{
+  int i = 0;
+  while (1)
+  {
+    while (Serial.available() > 0)
+    {
+      char inChar = Serial.read();
+      if (inChar == '\n')
+      {
+        result[i] = '\0';
+        return 0;
+      }
+      if (inChar != '\r')
+      {
+        result[i] = inChar;
+        i++;
+      }
+    }
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/TestModem/TestModem.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/TestModem/TestModem.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/TestModem/TestModem.ino	(revision 136)
@@ -0,0 +1,77 @@
+/*
+
+ This example tests to see if the modem of the
+ GSM shield is working correctly. You do not need
+ a SIM card for this example.
+
+ Circuit:
+ * GSM shield attached
+
+ Created 12 Jun 2012
+ by David del Peral
+ modified 21 Nov 2012
+ by Tom Igoe
+
+ http://arduino.cc/en/Tutorial/GSMToolsTestModem
+
+ This sample code is part of the public domain
+
+ */
+
+// libraries
+#include <GSM.h>
+
+// modem verification object
+GSMModem modem;
+
+// IMEI variable
+String IMEI = "";
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  // start modem test (reset and check response)
+  Serial.print("Starting modem test...");
+  if (modem.begin())
+    Serial.println("modem.begin() succeeded");
+  else
+    Serial.println("ERROR, no modem answer.");
+}
+
+void loop()
+{
+  // get modem IMEI
+  Serial.print("Checking IMEI...");
+  IMEI = modem.getIMEI();
+
+  // check IMEI response
+  if (IMEI != NULL)
+  {
+    // show IMEI in serial monitor
+    Serial.println("Modem's IMEI: " + IMEI);
+    // reset modem to check booting:
+    Serial.print("Resetting modem...");
+    modem.begin();
+    // get and check IMEI one more time
+    if (modem.getIMEI() != NULL)
+    {
+      Serial.println("Modem is functoning properly");
+    }
+    else
+    {
+      Serial.println("Error: getIMEI() failed after modem.begin()");
+    }
+  }
+  else
+  {
+    Serial.println("Error: Could not get IMEI");
+  }
+  // do nothing:
+  while (true);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/TestWebServer/TestWebServer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/TestWebServer/TestWebServer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/examples/Tools/TestWebServer/TestWebServer.ino	(revision 136)
@@ -0,0 +1,85 @@
+/*
+  Basic Web Server
+
+ A simple web server that replies with nothing, but prints the client's request
+ and the server IP address.
+
+ Circuit:
+ * GSM shield attached
+
+ created
+ by David Cuartielles
+ modified 21 Nov 2012
+ by Tom Igoe
+
+ http://arduino.cc/en/Tutorial/GSMToolsTestWebServer
+
+ This example code is part of the public domain
+ */
+#include <GSM.h>
+
+// PIN Number
+#define PINNUMBER ""
+
+// APN data
+#define GPRS_APN       "GPRS_APN" // replace your GPRS APN
+#define GPRS_LOGIN     "login"    // replace with your GPRS login
+#define GPRS_PASSWORD  "password" // replace with your GPRS password
+
+
+// initialize the library instance
+GPRS gprs;
+GSM gsmAccess;     // include a 'true' parameter for debug enabled
+GSMServer server(80); // port 80 (http default)
+
+// timeout
+const unsigned long __TIMEOUT__ = 10 * 1000;
+
+void setup()
+{
+  // initialize serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.println("starting,..");
+  // connection state
+  boolean connected = true;
+
+  // Start GSM shield
+  // If your SIM has PIN, pass it as a parameter of begin() in quotes
+  while (!connected)
+  {
+    if ((gsmAccess.begin(PINNUMBER) == GSM_READY) &
+        (gprs.attachGPRS(GPRS_APN, GPRS_LOGIN, GPRS_PASSWORD) == GPRS_READY))
+      connected = true;
+    else
+    {
+      Serial.println("Not connected");
+      delay(1000);
+    }
+  }
+
+  Serial.println("Connected to GPRS network");
+
+  // start server
+  server.begin();
+
+  //Get IP.
+  IPAddress LocalIP = gprs.getIPAddress();
+  Serial.println("Server IP address=");
+  Serial.println(LocalIP);
+}
+
+void loop() {
+  GSMClient client = server.available();
+
+  if (client) {
+    if (client.available()) {
+      Serial.write(client.read());
+    }
+  }
+
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/extras/License.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/extras/License.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/extras/License.txt	(revision 136)
@@ -0,0 +1,166 @@
+GNU LESSER GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+  This version of the GNU Lesser General Public License incorporates
+the terms and conditions of version 3 of the GNU General Public
+License, supplemented by the additional permissions listed below.
+
+  0. Additional Definitions.
+
+  As used herein, "this License" refers to version 3 of the GNU Lesser
+General Public License, and the "GNU GPL" refers to version 3 of the GNU
+General Public License.
+
+  "The Library" refers to a covered work governed by this License,
+other than an Application or a Combined Work as defined below.
+
+  An "Application" is any work that makes use of an interface provided
+by the Library, but which is not otherwise based on the Library.
+Defining a subclass of a class defined by the Library is deemed a mode
+of using an interface provided by the Library.
+
+  A "Combined Work" is a work produced by combining or linking an
+Application with the Library.  The particular version of the Library
+with which the Combined Work was made is also called the "Linked
+Version".
+
+  The "Minimal Corresponding Source" for a Combined Work means the
+Corresponding Source for the Combined Work, excluding any source code
+for portions of the Combined Work that, considered in isolation, are
+based on the Application, and not on the Linked Version.
+
+  The "Corresponding Application Code" for a Combined Work means the
+object code and/or source code for the Application, including any data
+and utility programs needed for reproducing the Combined Work from the
+Application, but excluding the System Libraries of the Combined Work.
+
+  1. Exception to Section 3 of the GNU GPL.
+
+  You may convey a covered work under sections 3 and 4 of this License
+without being bound by section 3 of the GNU GPL.
+
+  2. Conveying Modified Versions.
+
+  If you modify a copy of the Library, and, in your modifications, a
+facility refers to a function or data to be supplied by an Application
+that uses the facility (other than as an argument passed when the
+facility is invoked), then you may convey a copy of the modified
+version:
+
+   a) under this License, provided that you make a good faith effort to
+   ensure that, in the event an Application does not supply the
+   function or data, the facility still operates, and performs
+   whatever part of its purpose remains meaningful, or
+
+   b) under the GNU GPL, with none of the additional permissions of
+   this License applicable to that copy.
+
+  3. Object Code Incorporating Material from Library Header Files.
+
+  The object code form of an Application may incorporate material from
+a header file that is part of the Library.  You may convey such object
+code under terms of your choice, provided that, if the incorporated
+material is not limited to numerical parameters, data structure
+layouts and accessors, or small macros, inline functions and templates
+(ten or fewer lines in length), you do both of the following:
+
+   a) Give prominent notice with each copy of the object code that the
+   Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the object code with a copy of the GNU GPL and this license
+   document.
+
+  4. Combined Works.
+
+  You may convey a Combined Work under terms of your choice that,
+taken together, effectively do not restrict modification of the
+portions of the Library contained in the Combined Work and reverse
+engineering for debugging such modifications, if you also do each of
+the following:
+
+   a) Give prominent notice with each copy of the Combined Work that
+   the Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the Combined Work with a copy of the GNU GPL and this license
+   document.
+
+   c) For a Combined Work that displays copyright notices during
+   execution, include the copyright notice for the Library among
+   these notices, as well as a reference directing the user to the
+   copies of the GNU GPL and this license document.
+
+   d) Do one of the following:
+
+       0) Convey the Minimal Corresponding Source under the terms of this
+       License, and the Corresponding Application Code in a form
+       suitable for, and under terms that permit, the user to
+       recombine or relink the Application with a modified version of
+       the Linked Version to produce a modified Combined Work, in the
+       manner specified by section 6 of the GNU GPL for conveying
+       Corresponding Source.
+
+       1) Use a suitable shared library mechanism for linking with the
+       Library.  A suitable mechanism is one that (a) uses at run time
+       a copy of the Library already present on the user's computer
+       system, and (b) will operate properly with a modified version
+       of the Library that is interface-compatible with the Linked
+       Version.
+
+   e) Provide Installation Information, but only if you would otherwise
+   be required to provide such information under section 6 of the
+   GNU GPL, and only to the extent that such information is
+   necessary to install and execute a modified version of the
+   Combined Work produced by recombining or relinking the
+   Application with a modified version of the Linked Version. (If
+   you use option 4d0, the Installation Information must accompany
+   the Minimal Corresponding Source and Corresponding Application
+   Code. If you use option 4d1, you must provide the Installation
+   Information in the manner specified by section 6 of the GNU GPL
+   for conveying Corresponding Source.)
+
+  5. Combined Libraries.
+
+  You may place library facilities that are a work based on the
+Library side by side in a single library together with other library
+facilities that are not Applications and are not covered by this
+License, and convey such a combined library under terms of your
+choice, if you do both of the following:
+
+   a) Accompany the combined library with a copy of the same work based
+   on the Library, uncombined with any other library facilities,
+   conveyed under the terms of this License.
+
+   b) Give prominent notice with the combined library that part of it
+   is a work based on the Library, and explaining where to find the
+   accompanying uncombined form of the same work.
+
+  6. Revised Versions of the GNU Lesser General Public License.
+
+  The Free Software Foundation may publish revised and/or new versions
+of the GNU Lesser General Public License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+
+  Each version is given a distinguishing version number. If the
+Library as you received it specifies that a certain numbered version
+of the GNU Lesser General Public License "or any later version"
+applies to it, you have the option of following the terms and
+conditions either of that published version or of any later version
+published by the Free Software Foundation. If the Library as you
+received it does not specify a version number of the GNU Lesser
+General Public License, you may choose any version of the GNU Lesser
+General Public License ever published by the Free Software Foundation.
+
+  If the Library as you received it specifies that a proxy can decide
+whether future versions of the GNU Lesser General Public License shall
+apply, that proxy's public statement of acceptance of any version is
+permanent authorization for you to choose that version for the
+Library.
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/keywords.txt	(revision 136)
@@ -0,0 +1,84 @@
+#######################################
+# Syntax Coloring Map For GSM
+####################################### 
+# Class
+#######################################
+
+GSM	KEYWORD3
+GSMVoiceCall	KEYWORD3
+GSM_SMS	KEYWORD3
+GPRS	KEYWORD3
+GSMClient	KEYWORD3
+GSMServer	KEYWORD3
+GSMModem	KEYWORD3
+GSMScanner	KEYWORD3
+GSMPIN	KEYWORD3
+GSMBand KEYWORD3
+GSM2	KEYWORD3
+
+#######################################
+# Methods and Functions 
+#######################################	
+
+begin	KEYWORD2
+shutdown	KEYWORD2
+gatVoiceCallStatus	KEYWORD2
+ready	KEYWORD2
+voiceCall	KEYWORD2
+answerCall	KEYWORD2
+hangCall	KEYWORD2
+retrieveCallingNumber	KEYWORD2
+beginSMS	KEYWORD2
+endSMS	KEYWORD2
+remoteNumber	KEYWORD2
+attachGPRS	KEYWORD2
+begnWrite	KEYWORD2
+endWrite	KEYWORD2
+getIMEI	KEYWORD2
+getCurrentCarrier	KEYWORD2
+getSignalStrength	KEYWORD2
+readNetworks	KEYWORD2
+isPIN	KEYWORD2
+checkPIN	KEYWORD2
+checkPUK	KEYWORD2
+changePIN	KEYWORD2
+switchPIN	KEYWORD2
+checkReg	KEYWORD2
+getPINUsed	KEYWORD2
+setPINUsed	KEYWORD2
+getBand		KEYWORD2
+setBand		KEYWORD2
+getvoiceCallStatus	KEYWORD2
+getPosition	KEYWORD2
+swapAudioChannel	KEYWORD2
+microphoneGainLevel	KEYWORD2
+muteControl	KEYWORD2
+loudSpeakerVolumeLevel	KEYWORD2
+ringerSoundLevel	KEYWORD2
+alertSoundMode	KEYWORD2
+speakerLoudness	KEYWORD2
+speakerMode	KEYWORD2
+CommandEcho	KEYWORD2
+
+
+#######################################
+# Constants
+#######################################
+ 
+ERROR	LITERAL1
+IDLE	LITERAL1
+CONNECTING	LITERAL1
+GSM_READY	LITERAL1
+GPRS_READY	LITERAL1
+TRANSPARENT_CONNECTED	LITERAL1
+IDLE_CALL	LITERAL1
+CALLING	LITERAL1
+RECEIVINGCALL	LITERAL1
+TALKING	LITERAL1
+GSM_MODE_UNDEFINED	LITERAL1
+GSM_MODE_EGSM	LITERAL1
+GSM_MODE_DCS	LITERAL1
+GSM_MODE_PCS	LITERAL1
+GSM_MODE_EGSM_DCS	LITERAL1
+GSM_MODE_GSM850_PCS	LITERAL1
+GSM_MODE_GSM850_EGSM_DCS_PCS	LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=GSM
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Enables GSM/GRPS network connection using the Arduino GSM Shield. For all Arduino boards BUT Arduino DUE.
+paragraph=Use this library to make/receive voice calls, to send and receive SMS with the Quectel M10 GSM module.</br>This library also allows you to connect to internet through the GPRS networks. You can either use web Clients and Servers.</br>
+category=Communication
+url=http://arduino.cc/en/Reference/GSM
+architectures=avr
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/DEFAULT.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/DEFAULT.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/DEFAULT.h	(revision 136)
@@ -0,0 +1,24 @@
+/*
+This file is part of GSM3ShieldV2 library developed by Arduino.org (http://arduino.org).
+
+    GSM3ShieldV2 library is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    GSM3ShieldV2 library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with GSM3ShieldV2 library.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#define DEFAULT_AlertSoundMode 0
+#define DEFAULT_RingerSoundLevel 10
+#define DEFAULT_Channel 1
+#define DEFAULT_MicrophoneGainLevel 10
+#define DEFAULT_LoudSpeakerVolumeLevel 30
+#define DEFAULT_muteControl 0
+#define DEFAULT_speakerMode 1
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM.h	(revision 136)
@@ -0,0 +1,81 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+
+
+Added support for Arduino GSM Shield 2
+Modified Apr. 2015
+by Arduino.org team (http://arduino.org)
+
+*/
+#ifndef _GSM3SIMPLIFIERFILE_
+#define _GSM3SIMPLIFIERFILE_
+
+// This file simplifies the use of the GSM3 library
+// First we include everything. 
+
+#include <GSM3CircularBuffer.h>
+#include <GSM3MobileCellManagement.h>
+#include <GSM3MobileClientService.h>
+#include <GSM3MobileNetworkRegistry.h>
+#include <GSM3MobileServerService.h>
+#include <GSM3ShieldV1AccessProvider.h>
+#include <GSM3ShieldV1BandManagement.h>
+#include <GSM3ShieldV1ClientProvider.h>
+#include <GSM3ShieldV1DataNetworkProvider.h>
+#include <GSM3ShieldV1ModemVerification.h>
+#include <GSM3ShieldV1CellManagement.h>
+#include <GSM3ShieldV1PinManagement.h>
+#include <GSM3ShieldV1ScanNetworks.h>
+#include <GSM3SMSService.h>
+#include <GSM3VoiceCallService.h>
+
+#include <GSM3ShieldV2.h>
+
+#define GSM GSM3ShieldV1AccessProvider
+#define GPRS GSM3ShieldV1DataNetworkProvider
+#define GSMClient GSM3MobileClientService
+#define GSMServer GSM3MobileServerService
+#define GSMVoiceCall GSM3VoiceCallService
+#define GSM_SMS GSM3SMSService
+
+#define GSMPIN GSM3ShieldV1PinManagement
+#define GSMModem GSM3ShieldV1ModemVerification
+#define GSMCell GSM3ShieldV1CellManagement
+#define GSMCell GSM3CellManagement
+#define GSMBand GSM3ShieldV1BandManagement
+#define GSMScanner GSM3ShieldV1ScanNetworks
+
+
+//#define GPRSPosition GSM3ShieldV2
+#define GSM2 GSM3ShieldV2
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3CircularBuffer.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3CircularBuffer.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3CircularBuffer.cpp	(revision 136)
@@ -0,0 +1,319 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3CircularBuffer.h>
+#include <Arduino.h>
+
+GSM3CircularBuffer::GSM3CircularBuffer(GSM3CircularBufferManager* mgr)
+{
+	head=0;
+	tail=0;
+	cbm=mgr;
+}
+
+int GSM3CircularBuffer::write(char c)
+{
+	byte aux=(tail+1)& __BUFFERMASK__;
+	if(aux!=head)
+	{
+		theBuffer[tail]=c;
+		// Lets put an extra zero at the end, so we can
+		// read chains as we like.
+		// This is not exactly perfect, we are always 1+ behind the head
+		theBuffer[aux]=0;
+		tail=aux;
+		return 1;
+	}
+	return 0;
+}
+
+char GSM3CircularBuffer::read()
+{
+	char res;
+	if(head!=tail)
+	{
+		res=theBuffer[head];
+		head=(head+1)& __BUFFERMASK__;
+		//if(cbm)
+		//	cbm->spaceAvailable();
+		return res;
+	}	
+	else
+	{
+		return 0;
+	}
+}
+
+char GSM3CircularBuffer::peek(int increment)
+{
+	char res;
+	byte num_aux;
+	
+	if (tail>head) num_aux = tail-head;
+	else num_aux = 128 - head + tail;
+	
+	if(increment < num_aux)
+	{
+		res=theBuffer[head];
+		return res;
+	}	
+	else
+	{
+		return 0;
+	}
+}
+
+void GSM3CircularBufferManager::spaceAvailable(){return;};
+
+void GSM3CircularBuffer::flush()
+{
+	head=tail;
+}
+
+char* GSM3CircularBuffer::nextString()
+{
+	while(head!=tail)
+	{
+		head=(head+1) & __BUFFERMASK__;
+		if(theBuffer[head]==0)
+		{
+			head=(head+1) & __BUFFERMASK__;
+			return (char*)theBuffer+head;
+		}
+	}
+	return 0;
+}
+
+
+bool GSM3CircularBuffer::locate(const char* reference)
+{
+
+	return locate(reference, head, tail, 0, 0);
+}
+
+bool GSM3CircularBuffer::chopUntil(const char* reference, bool movetotheend, bool usehead)
+{
+	byte from, to;
+
+	if(locate(reference, head, tail, &from, &to))
+	{
+		if(usehead)
+		{
+			if(movetotheend)
+				head=(to+1) & __BUFFERMASK__;
+			else
+				head=from;
+		}
+		else
+		{
+			if(movetotheend)
+				tail=(to+1) & __BUFFERMASK__;
+			else
+				tail=from;
+		}
+		return true;
+	}
+	else
+	{
+		return false;
+	}
+}
+
+bool GSM3CircularBuffer::locate(const char* reference, byte thishead, byte thistail, byte* from, byte* to)
+{
+	int refcursor=0;
+	bool into=false;
+	byte b2, binit;
+	bool possible=1;
+	
+	if(reference[0]==0)
+		return true;
+		
+	for(byte b1=thishead; b1!=thistail;b1=(b1+1)& __BUFFERMASK__)
+	{
+		possible = 1;
+		b2 = b1;
+		while (possible&&(b2!=thistail))
+		{	
+			if(theBuffer[b2]==reference[refcursor])
+			{
+				if(!into)	
+					binit=b2;
+				into=true;
+				refcursor++;
+				if(reference[refcursor]==0)
+				{
+					if(from) 
+						*from=binit;
+					if(to)	
+						*to=b2;
+					return true;
+				}
+			}
+			else if (into==true)
+			{
+				possible = 0;
+				into=false;
+				refcursor=0;
+			}
+			b2=(b2+1)& __BUFFERMASK__;
+		}
+	}
+	return false;
+}
+
+bool GSM3CircularBuffer::extractSubstring(const char* from, const char* to, char* buffer, int bufsize)
+{
+	byte t1;
+	byte h2;
+	byte b;
+	int i;
+	
+//DEBUG
+//Serial.println("Beginning extractSubstring");
+//Serial.print("head,tail=");Serial.print(int(head));Serial.print(",");Serial.println(int(tail));
+	
+	if(!locate(from, head, tail, 0, &t1))
+		return false;
+		
+//DEBUG
+//Serial.println("Located chain from.");
+
+	t1++; //To point the next.
+	if(!locate(to, t1, tail, &h2, 0))
+		return false;
+		
+//DEBUG		
+//Serial.println("Located chain to.");
+/*Serial.print("t1=");Serial.println(int(t1));
+Serial.print("h2=");Serial.println(int(h2));*/
+
+
+	for(i=0,b=t1;i<bufsize, b!=((h2) & __BUFFERMASK__); i++, b=(b+1)& __BUFFERMASK__)
+		buffer[i]=theBuffer[b];
+	buffer[i]=0;
+
+//DEBUG		
+//Serial.println("");
+//Serial.println("Finishing extractSubstring");	
+	
+	return true;	
+}
+
+int GSM3CircularBuffer::readInt()
+{
+	int res=0;
+	byte c;
+	bool anyfound=false;
+	bool negative=false;
+	for(byte b=head + 1; b!=tail; b=(b+1)& __BUFFERMASK__)
+	{
+		c=theBuffer[b];
+		if((c==' ' )&&(!anyfound))
+		{
+		} else if((c=='-' )&&(!anyfound))
+		{
+			negative=true;
+			anyfound=true;  // Don't admit blanks after -
+		} else if((c>='0')&&(c<='9'))
+		{
+			anyfound=true;
+			res=(res*10)+(int)c-48;
+		}
+		else
+			{
+				if(negative)
+					res=(-1)*res;
+				return res;
+			}
+	}
+	if(negative)
+		res=(-1)*res;
+	return res;
+}
+
+void GSM3CircularBuffer::debugBuffer()
+{
+	byte h1=head;
+	byte t1=tail;
+	Serial.println();
+	Serial.print(h1);
+	Serial.print(" ");
+	Serial.print(t1);
+	Serial.print('>');
+	for(byte b=h1; b!=t1; b=(b+1)& __BUFFERMASK__)
+		printCharDebug(theBuffer[b]);
+	Serial.println();
+}
+
+void GSM3CircularBuffer::printCharDebug(uint8_t c)
+{
+	if((c>31)&&(c<127))
+		Serial.print((char)c);
+	else
+	{
+		Serial.print('%');
+		Serial.print(c);
+		Serial.print('%');
+	}
+}
+
+bool GSM3CircularBuffer::retrieveBuffer(char* buffer, int bufsize, int& SizeWritten)
+{
+	byte b;
+	int i;
+	
+	/*for(i=0,b=head;i<bufsize, b!=tail; i++, b=(b+1)& __BUFFERMASK__)
+		{
+			buffer[i]=theBuffer[b];
+		}
+	buffer[i]=0;
+	SizeWritten = i;*/
+	b=head;
+	for(i=0;i<bufsize; i++)
+		{
+			if (b!=tail)
+				{
+					buffer[i]=theBuffer[b];
+					buffer[i+1]=0;
+					b=(b+1)& __BUFFERMASK__;
+					SizeWritten = i + 1;
+				}
+		}
+	
+	
+	return true;	
+}
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3CircularBuffer.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3CircularBuffer.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3CircularBuffer.h	(revision 136)
@@ -0,0 +1,205 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_CIRCULARBUFFER__
+#define __GSM3_CIRCULARBUFFER__
+
+
+#include <inttypes.h>
+#include <stddef.h>
+
+#ifndef byte
+#define byte uint8_t
+#endif
+
+// These values have to be interrelated
+// To-Do: may we have just one? (BUFFERMASK)
+#define __BUFFERSIZE__ 128
+#define __BUFFERMASK__ 0x7F
+
+class GSM3CircularBufferManager
+{
+	public:
+	
+		/** If there is spaceAvailable in the buffer, lets send a XON
+		 */
+		virtual void spaceAvailable();		
+};
+
+class GSM3CircularBuffer
+{
+	private:
+		// Buffer pointers. 
+		// head=tail means buffer empty
+		// tail=head-1 means buffer full
+		// tail=head+1 means just one char (pointed by head)
+		// REMEMBER. head can be moved only by the main program
+		// REMEMBER. tail can be moved only by the other thread (interrupts)
+		// REMEMBER. head and tail can move only FORWARD
+		volatile byte head; // First written one
+		volatile byte tail; // Last written one. 
+		
+		GSM3CircularBufferManager* cbm; // Circular buffer manager
+		
+		// The buffer
+		volatile byte theBuffer[__BUFFERSIZE__];
+		
+		/** Checks if a substring exists in the buffer
+			@param reference	Substring
+			@param thishead		Head
+			@param thistail		Tail
+			@param from			Initial byte position
+			@param to			Final byte position
+			@return true if exists, in otherwise return false
+		 */
+		bool locate(const char* reference, byte thishead, byte thistail, byte* from=0, byte* to=0);
+		
+	public:
+	
+		/** Constructor
+			@param mgr			Circular buffer manager
+		 */
+		GSM3CircularBuffer(GSM3CircularBufferManager* mgr=0);
+		
+		// TO-DO.Check if this formule runs too at the buffer limit
+		
+		/** Get available bytes in circular buffer
+			@return available bytes
+		 */
+		inline byte availableBytes(){ return ((head-(tail+1))&__BUFFERMASK__);};
+		
+		/** Stored bytes in circular buffer
+			@return stored bytes
+		 */
+		inline byte storedBytes(){ return ((tail-head)&__BUFFERMASK__);};
+
+		/** Write a character in circular buffer
+			@param c			Character
+			@return 1 if successful
+		 */
+		int write(char c);
+		
+		/** Returns a character and moves the pointer
+			@return character
+		 */
+		char read();
+		
+		/** Returns a character but does not move the pointer.
+			@param increment	Increment
+			@return character
+		 */
+		char peek(int increment);
+		
+		/** Returns a pointer to the head of the buffer
+			@return buffer with pointer in head
+		*/
+		inline char* firstString(){return (char*)theBuffer+head;};
+		
+		/** Go forward one string
+			@return buffer with one string advance
+		 */
+		char* nextString();
+		
+		/** Flush circular buffer
+		 */
+		void flush();
+		
+		/** Get tail
+			@return tail
+		 */
+		inline byte getTail(){return tail;};
+		
+		/** Get head
+			@return head
+		 */
+		inline byte getHead(){return head;};
+		
+		// Only can be executed from the interrupt!
+		/** Delete circular buffer to the end
+			@param from			Initial byte position
+		 */
+		inline void deleteToTheEnd(byte from){tail=from;};
+		
+		/** Checks if a substring exists in the buffer
+			move=0, dont move, =1,put head at the beginning of the string, =2, put head at the end
+			@param reference
+			@return true if exists, in otherwise return false
+		 */
+		bool locate(const char* reference);
+		
+		/** Locates reference. If found, moves head (or tail) to the beginning (or end)
+			@param reference
+			@param movetotheend
+			@param head
+			@return true if successful
+		 */
+		bool chopUntil(const char* reference, bool movetotheend, bool head=true);
+		
+		/** Reads an integer from the head. Stops with first non blank, non number character
+			@return integer from the head
+		 */
+		int readInt();
+		
+		// Caveat: copies the first bytes until buffer is full
+		
+		/** Extract a substring from circular buffer
+			@param from			Initial byte position
+			@param to			Final byte position
+			@param buffer		Buffer for copy substring
+			@param bufsize		Buffer size
+			@return true if successful, false if substring does not exists
+		 */
+		bool extractSubstring(const char* from, const char* to, char* buffer, int bufsize);
+		
+		/** Retrieve all the contents of buffer from head to tail
+			@param buffer
+			@param bufsize
+			@param SizeWritten
+			@return true if successful
+		 */
+		bool retrieveBuffer(char* buffer, int bufsize, int& SizeWritten);
+		
+		/** Debug function to print the buffer after receiving data from the modem.
+		 */
+		void debugBuffer();
+		
+		/** Utility: dump character if printable, else, put in %x%
+			@param c			Character
+		 */
+		static void printCharDebug(uint8_t c);
+		
+		
+};
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3IO.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3IO.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3IO.h	(revision 136)
@@ -0,0 +1,26 @@
+#ifdef TTOPEN_V1
+	#define __POWERPIN__ 5
+	#define __RESETPIN__ 6
+#else
+	#define __RESETPIN__ 7
+#endif
+
+#if defined(__AVR_ATmega328P__) 
+	#ifdef TTOPEN_V1
+		#define __TXPIN__ 3
+		#define __RXPIN__ 4
+		#define __RXINT__ 3
+	#else
+		#define __TXPIN__ 3
+		#define __RXPIN__ 2
+		#define __RXINT__ 3
+	#endif
+#elif defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1280__)
+	#define __TXPIN__ 3
+	#define __RXPIN__ 10
+	#define __RXINT__ 4
+#elif defined(__AVR_ATmega32U4__)
+	#define __TXPIN__ 3
+	#define __RXPIN__ 8
+	#define __RXINT__ 3
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileAccessProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileAccessProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileAccessProvider.cpp	(revision 136)
@@ -0,0 +1,3 @@
+#include <GSM3MobileAccessProvider.h>
+
+GSM3MobileAccessProvider* theGSM3MobileAccessProvider;
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileAccessProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileAccessProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileAccessProvider.h	(revision 136)
@@ -0,0 +1,73 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILEACCESSPROVIDER_
+#define _GSM3MOBILEACCESSPROVIDER_
+
+enum GSM3_NetworkStatus_t { ERROR, IDLE, CONNECTING, GSM_READY, GPRS_READY, TRANSPARENT_CONNECTED, OFF};
+
+class GSM3MobileAccessProvider
+{
+	public:
+		// Access functions
+		//Configuration functions.
+		/** Establish GSM connection
+			@param pin			PIN code
+			@param restart		Determines if hardware restart
+			@param synchronous	Determines sync mode
+			@return If synchronous, GSM3_NetworkStatus_t. If asynchronous, returns 0.
+		 */
+		virtual inline GSM3_NetworkStatus_t begin(char* pin=0,bool restart=true, bool synchronous=true)=0;
+		
+		/** Check network access status
+			@return 1 if Alive, 0 if down
+		*/
+		virtual inline int isAccessAlive()=0;
+		
+		/** Shutdown the modem (power off really)
+			@return true if successful
+		 */
+		virtual inline bool shutdown()=0;
+		
+		/** Secure shutdown the modem (power off really)
+			@return always true
+		 */
+		virtual inline bool secureShutdown()=0;
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		virtual int ready()=0;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileCellManagement.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileCellManagement.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileCellManagement.cpp	(revision 136)
@@ -0,0 +1,1 @@
+#include <GSM3MobileCellManagement.h>
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileCellManagement.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileCellManagement.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileCellManagement.h	(revision 136)
@@ -0,0 +1,53 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILECELLMANAGEMENT_
+#define _GSM3MOBILECELLMANAGEMENT_
+
+#include <Arduino.h>
+
+class GSM3MobileCellManagement
+{
+	public:
+		
+		virtual inline int getLocation() {return 0;};
+		
+		virtual inline int getICCID() {return 0;};
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		virtual int ready()=0;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientProvider.cpp	(revision 136)
@@ -0,0 +1,3 @@
+#include <GSM3MobileClientProvider.h>
+
+GSM3MobileClientProvider* theGSM3MobileClientProvider;
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientProvider.h	(revision 136)
@@ -0,0 +1,156 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_MOBILECLIENTPROVIDER__
+#define __GSM3_MOBILECLIENTPROVIDER__
+
+#include <Arduino.h>
+#include <IPAddress.h>
+
+class GSM3MobileClientProvider
+{
+	protected:
+
+		uint8_t sockets;
+
+	public:
+
+		/** Constructor */
+		GSM3MobileClientProvider(){};
+		
+		/** Minimum socket
+			@return socket
+		 */
+		virtual inline int minSocket()=0;
+		
+		/** Maximum socket
+			@return socket
+		 */
+		virtual inline int maxSocket()=0;
+
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		*/
+		virtual int ready()=0;
+		
+		/** Get status socket client
+			@param socket		Socket
+			@return 1 if connected
+		 */
+		virtual bool getStatusSocketClient(uint8_t socket)=0;
+
+		// Socket management
+		
+		/** Get socket
+			@param socket		Socket
+			@return socket
+		 */
+		virtual int getSocket(int socket=-1)=0;
+		
+		/** Release socket
+			@param socket		Socket
+		 */
+		virtual void releaseSocket(int socket)=0;
+
+		// Client socket functions
+		
+		/** Connect to a server via TCP connection
+			@param server		Server name or IP address in a String
+			@param port			Port
+			@param id_socket	Socket
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		virtual int connectTCPClient(const char* server, int port, int id_socket)=0;
+		
+		/** Connect to a server (by IP address) via TCP connection
+			@param add			IP address in IPAddress format
+			@param port			Port
+			@param id_socket	Socket
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		virtual int connectTCPClient(IPAddress add, int port, int id_socket)=0;
+		
+		/** Begin writing through a socket
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		virtual void beginWriteSocket(bool client1Server0, int id_socket)=0;
+		
+		/** Write through a socket. MUST go after beginWriteSocket()
+			@param c 				character to be written
+		 */
+		virtual void writeSocket(uint8_t c)=0;
+		
+		/** Write through a socket. MUST go after beginWriteSocket()
+			@param buf				characters to be written (final 0 will not be written)
+		 */
+		virtual void writeSocket(const char* buf)=0;
+		
+		/** Finish current writing
+		 */	
+		virtual void endWriteSocket()=0;
+		
+		/** Check if there are data to be read in socket.
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Local socket number
+			@return 0 if command running, 1 if there are data available, 4 if no data, otherwise error
+		 */
+		virtual int availableSocket(bool client, int id_socket)=0;
+		
+		/** Read data (get a character) available in socket
+			@return character
+		 */
+		virtual int readSocket()=0;
+		
+		/** Flush socket
+		 */
+		virtual void flushSocket()=0;
+		
+		/** Get a character but will not advance the buffer head
+			@return character
+		 */
+		virtual int peekSocket()=0;
+		
+		/** Close a socket
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Socket
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		virtual int disconnectTCP(bool client1Server0, int idsocket)=0;
+
+};
+
+extern GSM3MobileClientProvider* theGSM3MobileClientProvider;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientService.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientService.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientService.cpp	(revision 136)
@@ -0,0 +1,260 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3MobileClientService.h>
+#include <GSM3MobileClientProvider.h>
+#include <Arduino.h>
+
+// While there is only a shield (ShieldV1) we will include it by default
+#include <GSM3ShieldV1ClientProvider.h>
+GSM3ShieldV1ClientProvider theShieldV1ClientProvider;
+
+
+#define GSM3MOBILECLIENTSERVICE_CLIENT 0x01 // 1: This side is Client. 0: This side is Server
+#define GSM3MOBILECLIENTSERVICE_WRITING 0x02 // 1: TRUE 0: FALSE
+#define GSM3MOBILECLIENTSERVICE_SYNCH 0x04 // 1: TRUE, compatible with other clients 0: FALSE
+
+#define __TOUTBEGINWRITE__ 10000
+
+
+GSM3MobileClientService::GSM3MobileClientService(bool synch)
+{
+	flags = GSM3MOBILECLIENTSERVICE_CLIENT;
+	if(synch)
+		flags |= GSM3MOBILECLIENTSERVICE_SYNCH;
+	mySocket=255;
+}
+
+GSM3MobileClientService::GSM3MobileClientService(int socket, bool synch)
+{
+	// We are creating a socket on an existing, occupied one.
+	flags=0;
+	if(synch)
+		flags |= GSM3MOBILECLIENTSERVICE_SYNCH;
+	mySocket=socket;
+	theGSM3MobileClientProvider->getSocket(socket);
+	
+}
+
+// Returns 0 if last command is still executing
+// 1 if success
+// >1 if error 
+int GSM3MobileClientService::ready()
+{	
+	return theGSM3MobileClientProvider->ready();
+}
+
+int GSM3MobileClientService::connect(IPAddress add, uint16_t port) 
+{
+	if(theGSM3MobileClientProvider==0)
+		return 2;
+		
+	// TODO: ask for the socket id
+	mySocket=theGSM3MobileClientProvider->getSocket();
+
+	if(mySocket<0)
+		return 2;
+	
+	int res=theGSM3MobileClientProvider->connectTCPClient(add, port, mySocket);
+	if(flags & GSM3MOBILECLIENTSERVICE_SYNCH)
+		res=waitForAnswer();
+	
+	return res;
+};
+
+int GSM3MobileClientService::connect(const char *host, uint16_t port)
+{
+
+	if(theGSM3MobileClientProvider==0)
+		return 2;		
+	// TODO: ask for the socket id
+	mySocket=theGSM3MobileClientProvider->getSocket();
+
+	if(mySocket<0)
+		return 2;
+	
+	int res=theGSM3MobileClientProvider->connectTCPClient(host, port, mySocket);
+	if(flags & GSM3MOBILECLIENTSERVICE_SYNCH)
+		res=waitForAnswer();
+		
+	return res;
+}
+
+int GSM3MobileClientService::waitForAnswer()
+{
+	unsigned long m;
+	m=millis();
+	int res;
+	
+	while(((millis()-m)< __TOUTBEGINWRITE__ )&&(ready()==0)) 
+		delay(100);
+	
+	res=ready();
+
+	// If we get something different from a 1, we are having a problem
+	if(res!=1)
+		res=0;
+
+	return res;
+}
+
+void GSM3MobileClientService::beginWrite(bool sync)
+{
+	flags |= GSM3MOBILECLIENTSERVICE_WRITING;
+	theGSM3MobileClientProvider->beginWriteSocket(flags & GSM3MOBILECLIENTSERVICE_CLIENT, mySocket);
+	if(sync)
+		waitForAnswer();
+}
+
+size_t GSM3MobileClientService::write(uint8_t c)
+{	
+	if(!(flags & GSM3MOBILECLIENTSERVICE_WRITING))
+		beginWrite(true);
+	theGSM3MobileClientProvider->writeSocket(c);
+	return 1;
+}
+
+size_t GSM3MobileClientService::write(const uint8_t* buf)
+{
+	if(!(flags & GSM3MOBILECLIENTSERVICE_WRITING))
+		beginWrite(true);
+	theGSM3MobileClientProvider->writeSocket((const char*)(buf));
+	return strlen((const char*)buf);
+}
+
+size_t GSM3MobileClientService::write(const uint8_t* buf, size_t sz)
+{
+	if(!(flags & GSM3MOBILECLIENTSERVICE_WRITING))
+		beginWrite(true);
+	for(int i=0;i<sz;i++)
+		theGSM3MobileClientProvider->writeSocket(buf[i]);
+	return sz;
+}
+
+void GSM3MobileClientService::endWrite(bool sync)
+{
+	flags ^= GSM3MOBILECLIENTSERVICE_WRITING;
+	theGSM3MobileClientProvider->endWriteSocket();
+	if(sync)
+		waitForAnswer();
+}
+
+uint8_t GSM3MobileClientService::connected()
+{
+	if(mySocket==255)
+		return 0;
+	return theGSM3MobileClientProvider->getStatusSocketClient(mySocket);	 
+}
+
+GSM3MobileClientService::operator bool()
+{
+	return connected()==1;
+};
+
+int GSM3MobileClientService::available()
+{
+	int res;
+
+	// Even if not connected, we are looking for available data
+	
+	if(flags & GSM3MOBILECLIENTSERVICE_WRITING)
+		endWrite(true);
+
+	res=theGSM3MobileClientProvider->availableSocket(flags & GSM3MOBILECLIENTSERVICE_CLIENT,mySocket);
+	if(flags & GSM3MOBILECLIENTSERVICE_SYNCH)
+		res=waitForAnswer();
+
+	return res;
+}
+
+int GSM3MobileClientService::read(uint8_t *buf, size_t size)
+{
+	int i;
+	uint8_t c;
+	
+	for(i=0;i<size;i++)
+	{
+		c=read();
+		if(c==0)
+			break;
+		buf[i]=c;
+	}
+	
+	return i;
+/* This is the old implementation, testing a simpler one
+	int res;
+	// If we were writing, just stop doing it.
+	if(flags & GSM3MOBILECLIENTSERVICE_WRITING)
+		endWrite(true);
+	res=theGSM3MobileClientProvider->readSocket(flags & GSM3MOBILECLIENTSERVICE_CLIENT, (char *)(buf), size, mySocket);
+
+	return res;
+*/
+}
+
+int GSM3MobileClientService::read()
+{
+	if(flags & GSM3MOBILECLIENTSERVICE_WRITING)
+		endWrite(true);
+	int c=theGSM3MobileClientProvider->readSocket();
+	return c;
+}
+
+int GSM3MobileClientService::peek()
+{
+	if(flags & GSM3MOBILECLIENTSERVICE_WRITING)
+		endWrite(true);
+	return theGSM3MobileClientProvider->peekSocket(/*mySocket, false*/);
+}
+
+void GSM3MobileClientService::flush()
+{
+	if(flags & GSM3MOBILECLIENTSERVICE_WRITING)
+		endWrite(true);
+	theGSM3MobileClientProvider->flushSocket(/*mySocket*/);
+	if(flags & GSM3MOBILECLIENTSERVICE_SYNCH)
+		waitForAnswer();
+
+}
+
+void GSM3MobileClientService::stop()
+{
+	if(flags & GSM3MOBILECLIENTSERVICE_WRITING)
+		endWrite(true);
+	theGSM3MobileClientProvider->disconnectTCP(flags & GSM3MOBILECLIENTSERVICE_CLIENT, mySocket);
+	theGSM3MobileClientProvider->releaseSocket(mySocket);
+	mySocket = 0;
+	if(flags & GSM3MOBILECLIENTSERVICE_SYNCH)
+		waitForAnswer();
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientService.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientService.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileClientService.h	(revision 136)
@@ -0,0 +1,162 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILECLIENTSERVICE_
+#define _GSM3MOBILECLIENTSERVICE_
+
+#include <GSM3MobileNetworkProvider.h>
+#include <Client.h>
+
+
+class GSM3MobileClientService : public Client
+{
+	private:
+	
+		uint8_t mySocket;
+		uint8_t flags;
+		
+		/** Blocks waiting for an answer
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int waitForAnswer();
+
+	public:
+	
+		/** Constructor
+			@param synch		Sync mode
+		 */
+		GSM3MobileClientService(bool synch=true);
+		
+		/** Constructor
+			@param socket		Socket
+			@param synch		Sync mode
+		 */
+		GSM3MobileClientService(int socket, bool synch);
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		*/
+		int ready();
+		
+		// we take this function out as IPAddress is complex to bring to
+		// version 1.
+		/** Connect to server by IP address
+			@param (IPAddress)
+			@param (uint16_t)
+			@return returns 0 if last command is still executing, 1 success, 2 if there are no resources
+		 */
+		inline int connect(IPAddress, uint16_t);
+
+		/** Connect to server by hostname
+			@param host			Hostname
+			@param port			Port
+			@return returns 0 if last command is still executing, 1 success, 2 if there are no resources
+		 */
+		int connect(const char *host, uint16_t port);
+		
+		/** Initialize write in request
+			@param sync			Sync mode
+		 */
+		void beginWrite(bool sync=false);
+		
+		/** Write a character in request
+			@param c			Character
+			@return size
+		 */
+		size_t write(uint8_t c);
+		
+		/** Write a characters buffer in request
+			@param buf			Buffer
+			@return buffer size
+		 */
+		size_t write(const uint8_t *buf);
+		
+		/** Write a characters buffer with size in request
+			@param (uint8_t*)	Buffer
+			@param (size_t)		Buffer size
+			@return buffer size
+		 */
+		size_t write(const uint8_t*, size_t);
+		
+		/** Finish write request
+			@param sync			Sync mode
+		 */
+		void endWrite(bool sync=false);
+		
+		/** Check if connected to server
+			@return 1 if connected
+		 */
+		uint8_t connected();
+		
+		operator bool();
+		
+		/** Read from response buffer and copy size specified to buffer
+			@param buf			Buffer		
+			@param size			Buffer size
+			@return bytes read
+		 */
+		int read(uint8_t *buf, size_t size);
+		
+		/** Read a character from response buffer
+			@return character
+		 */
+		int read();
+		
+		/** Check if exists a response available
+			@return 1 if exists, 0 if not exists
+		 */
+		int available();
+		
+		/** Read a character from response buffer but does not move the pointer.
+			@return character
+		 */
+		int peek();
+		
+		/** Flush response buffer
+		 */
+		void flush();
+		
+		/** Stop client
+		 */
+		void stop();
+		
+		/** Get socket
+			@return socket
+		 */
+		inline int getSocket(){return (int)mySocket;};
+
+		
+};
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileDataNetworkProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileDataNetworkProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileDataNetworkProvider.cpp	(revision 136)
@@ -0,0 +1,3 @@
+#include <GSM3MobileDataNetworkProvider.h>
+
+// GSM3MobileDataNetworkProvider* theGSM3MobileDataNetworkProvider;
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileDataNetworkProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileDataNetworkProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileDataNetworkProvider.h	(revision 136)
@@ -0,0 +1,62 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILEDATANETWORKPROVIDER_
+#define _GSM3MOBILEDATANETWORKPROVIDER_
+
+#include <GSM3MobileAccessProvider.h>
+
+// This class is not really useful, but serves as a guideline for programmers
+// We keep it but it should never be linked
+class GSM3MobileDataNetworkProvider
+{
+	public:
+		
+		/** Attach to GPRS/GSM network
+			@param networkId 	APN GPRS
+			@param user			Username
+			@param pass			Password
+			@return connection status
+		 */
+		virtual GSM3_NetworkStatus_t networkAttach(char* networId, char* user, char* pass)=0;
+		
+		/** Detach GPRS/GSM network
+			@return connection status
+		 */
+		virtual GSM3_NetworkStatus_t networkDetach()=0;
+				
+};
+
+extern GSM3MobileDataNetworkProvider* theGSM3MobileDataNetworkProvider;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileMockupProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileMockupProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileMockupProvider.cpp	(revision 136)
@@ -0,0 +1,192 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3MobileNetworkProvider.h>
+#include <GSM3MobileMockupProvider.h>
+#include <inttypes.h>
+#include <HardwareSerial.h>
+#include <Arduino.h>
+
+
+GSM3MobileMockupProvider::GSM3MobileMockupProvider()
+{
+	lineStatus=IDLE;
+	msgExample="Hello#World";
+	msgIndex=0;
+};
+
+int GSM3MobileMockupProvider::begin(char* pin)
+{
+	Serial.println("GSM3MobileMockupProvider::begin()");
+	return 0;
+};
+
+int GSM3MobileMockupProvider::ready()
+{
+	Serial.println("GSM3MobileMockupProvider::ready()");
+	return 1;
+};
+
+int GSM3MobileMockupProvider::beginSMS(const char* number)
+{
+	Serial.println("SM3MobileMockupProvider::beginSMS()");
+	return 0;
+};
+
+void GSM3MobileMockupProvider::writeSMS(char c)
+{
+	Serial.print(c);
+};
+
+int GSM3MobileMockupProvider::endSMS()
+{
+	Serial.println("GSM3MobileMockupProvider::endSMS()");
+};
+
+int GSM3MobileMockupProvider::availableSMS()
+{
+	Serial.println("GSM3MobileMockupProvider::availableSMS()");
+	return 120;
+};
+
+int GSM3MobileMockupProvider::peek()
+{
+	return (int)'H';
+};
+
+int GSM3MobileMockupProvider::remoteSMSNumber(char* number, int nlength)
+{
+	if(nlength>=13)
+		strcpy(number, "+34630538546");
+	return 12;
+};
+
+
+void GSM3MobileMockupProvider::flushSMS()
+{
+	Serial.println("GSM3MobileMockupProvider::flushSMS()");
+};
+
+int GSM3MobileMockupProvider::readSMS()
+{
+	if(msgExample[msgIndex]==0)
+	{
+		msgIndex=0;
+		return 0;
+	}
+	else
+	{
+		msgIndex++;
+		return msgExample[msgIndex-1];
+	};
+};
+
+int GSM3MobileMockupProvider::connectTCPClient(const char* server, int port, int id_socket)
+{
+	Serial.println("GSM3MobileMockupProvider::connectTCPClient()");
+	Serial.print(server);Serial.print(":");Serial.print(port);Serial.print("-");Serial.println(id_socket);
+}
+
+void GSM3MobileMockupProvider::writeSocket(const uint8_t *buf, size_t size, int id_socket)
+{
+	int i;
+	for(i=0;i<size;i++)
+		Serial.print(buf[i]);
+}
+/* I'm taking this off. We'll reply from the NetworkProvider
+uint8_t GSM3MobileMockupProvider::getStatus(uint8_t socket)
+{
+    if((socket>=minSocket())&&(socket<=maxSocket()))
+		return 1;
+	else
+		return 0;
+};
+*/
+
+int GSM3MobileMockupProvider::readSocket(uint8_t *buf, size_t size, int idsocket)
+{
+	int i;
+	int l=strlen(msgExample);
+	for(i=0;(i<size)&&(i<l);i++)
+		buf[i]=msgExample[i];
+	buf[i]=0;
+	return i;
+}
+
+int GSM3MobileMockupProvider::availableSocket(int idsocket)
+{
+	return 1;
+};
+
+int GSM3MobileMockupProvider::readSocket(int idsocket, bool advance)
+{
+	char c;
+	if(msgExample[msgIndex]==0)
+	{
+		msgIndex=0;
+		return 0;
+	}
+	else
+	{
+		c=msgExample[msgIndex];
+		if(advance)
+			msgIndex++;
+	};
+	return c;
+};
+
+void GSM3MobileMockupProvider::flushSocket(int idsocket)
+{
+	while(readSocket(idsocket));
+};
+
+int GSM3MobileMockupProvider::disconnectTCP(int idsocket)
+{
+	Serial.println("GSM3MobileMockupProvider::disconnectTCP()");
+	return 1;
+};
+
+int GSM3MobileMockupProvider::connectTCPServer(int port, char* localIP, int* localIPlength)
+{
+	Serial.println("GSM3MobileMockupProvider::connectTCPServer()");
+	if((localIP!=0)&&(*localIPlength>12))
+		strcpy("192.168.1.1", localIP);
+	return 1;
+};
+
+bool GSM3MobileMockupProvider::getSocketModemStatus(uint8_t s)
+{
+	// Feeling lazy
+	return true;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileMockupProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileMockupProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileMockupProvider.h	(revision 136)
@@ -0,0 +1,255 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILEMOCKUPPROVIDER_
+#define _GSM3MOBILEMOCKUPPROVIDER_
+
+#include <GSM3MobileNetworkProvider.h>
+#include <GSM3MobileVoiceProvider.h>
+		
+class GSM3MobileMockupProvider: public GSM3MobileNetworkProvider
+{				
+	private:
+		// Introducing this status is quite "heavy". But something like this should
+		// be added to ShieldV1. Or not. 
+		// Note, in ShieldV1 there is no "RECEIVINGSMS" status.
+		enum GSM3_modemlinest_e { IDLE, WAITINGANSWER, SENDINGSMS};
+		GSM3_modemlinest_e lineStatus;
+		char* msgExample;
+		int msgIndex;
+		
+	public:
+	
+		/** Minimum socket
+			@return 1
+		 */
+		inline int minSocket(){return 1;};
+		
+		/** Maximum socket
+			@return 8
+		 */
+		inline int maxSocket(){return 8;};
+
+		/** Constructor */
+		GSM3MobileMockupProvider();
+		
+		/** Get network status
+			@return network status
+		 */
+		inline GSM3_NetworkStatus_t getStatus(){return ERROR;};
+		
+		/** Get voice call status
+			@return call status
+		 */
+		inline GSM3_voiceCall_st getvoiceCallStatus(){return IDLE_CALL;};
+		
+		/** Get last command status
+			@return Returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int ready();
+		inline void closeCommand(int code){};
+		
+		//Configuration functions.
+		
+		/** Begin connection
+			@param pin			PIN code
+			@return 
+		 */
+		int begin(char* pin=0);
+		
+		/** Check if is modem alive
+			@return 0
+		 */
+		inline int isModemAlive(){return 0;};
+		
+		/** Shutdown the modem (power off really)
+			@return true if successful
+		 */
+		inline bool shutdown(){return false;};
+		
+		//Call functions
+		
+		/** Launch a voice call
+			@param number	 	Phone number to be called
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		 */
+		inline int voiceCall(const char* number){return 0;};
+		
+		/** Answer a voice call
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		 */
+		inline int answerCall(){return 0;};
+		
+		/** Hang a voice call
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		 */
+		inline int hangCall(){return 0;};
+		
+		/** Retrieve phone number of caller
+			@param buffer		Buffer for copy phone number
+			@param bufsize		Buffer size
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		 */
+		inline int retrieveCallingNumber(char* buffer, int*& bufsize){return 0;};
+		
+		// SMS functions
+		
+		/** Begin a SMS to send it
+			@param number		Destination
+			@return error command if it exists
+		 */
+		int beginSMS(const char* number);
+		
+		/** End SMS
+			@return error command if it exists
+		 */
+		int endSMS();
+		
+		/** Check if SMS available and prepare it to be read
+			@return error command if it exists
+		 */
+		int availableSMS();
+		
+		/** Read a byte but do not advance the buffer header (circular buffer)
+			@return character
+		 */
+		int peek();
+		
+		/** Delete the SMS from Modem memory and proccess answer
+		 */
+		void flushSMS();
+		
+		/** Read sender number phone
+			@param number		Buffer for save number phone
+			@param nlength		Buffer length
+			@return 1 success, >1 error
+		 */
+		int remoteSMSNumber(char* number, int nlength); 
+		
+		/** Read one char for SMS buffer (advance circular buffer)
+			@return character
+		 */
+		int readSMS();
+		
+		/** Write a SMS character by character
+			@param c			Character
+		 */
+		void writeSMS(char c);
+		
+		// Socket functions
+		
+		/** Connect to a remote TCP server
+			@param server		String with IP or server name
+			@param port 		Remote port number
+			@param id_socket	Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		*/
+		int connectTCPClient(const char* server, int port, int id_socket);
+		
+		// Attention to parameter rewriting in ShieldV1
+		/** Write buffer information into a socket
+			@param buf			Buffer
+			@param size			Buffer size
+			@param idsocket		Socket
+		 */
+		void writeSocket(const uint8_t *buf, size_t size, int idsocket);
+		
+		// ShieldV1 will have two reading mechanisms:
+		// Mechanism 1: Call AT+QIRD for size bytes. Put them in the circular buffer,
+		// fill buf. Take care to xon/xoff effect, as we may copy just a part of the 
+		// incoming bytes.
+		/** Read socket and put information in a buffer
+			@param buf			Buffer
+			@param size			Buffer size
+			@param idsocket		Socket
+			@return
+		 */
+		int readSocket(uint8_t *buf, size_t size, int idsocket);
+		
+		// Mechanism 2 in ShieldV1:
+		// When called "available()" or "read()" reuse readSocket code to execute 
+		// QIRD SYNCHRONOUSLY. Ask the modem for 1500 bytes but do not copy them anywhere, 
+		// leave data in the circular buffer. Put buffer head at the start of received data.
+		// Peek() will get a character but will not advance the buffer head.
+		// Read() will get one character. XON/XOFF will take care of buffer filling
+		// If Read() gets to the end of the QIRD response, execute again QIRD SYNCHRONOUSLY 
+		// If the user executes flush(), execute read() until there is nothing more to read()
+		// (the modem gives no way to empty the socket of incoming data)
+		
+		/** Check if there are data to be read in socket.
+			@param idsocket	Local socket number
+			@return 0 if command running, 1 if there are data available, 4 if no data, otherwise error
+		*/
+		int availableSocket(int idsocket);
+		
+		/** Read data (get a character) available in socket
+			@param idsocket		Socket
+			@param advance		Determines if advance the buffer head
+			@return character
+		 */
+		int readSocket(int idsocket, bool advance=true);
+		
+		/** Flush socket
+			@param idsocket		Socket
+		 */
+		void flushSocket(int idsocket);
+		
+		// This is the same in ShieldV1
+		/** Close a socket
+			@param idsocket			Socket
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		int disconnectTCP(int idsocket);
+		
+		// TCP Server. Attention. Changing the int*&. We'll receive a buffer for the IP
+		// If the pointer ins NULL just forget it
+		// I think that opening a server does not occupy a socket. Is that true?
+		/** Establish a TCP connection
+			@param port				Port
+			@param localIP			IP address
+			@param localIPlength	IP address size in characters
+			@return	command error if exists
+		 */
+		int connectTCPServer(int port, char* localIP, int* localIPlength);
+		
+		// Modem sockets status. Return TRUE if the modem thinks the socket is occupied.
+		// This should be detected through an unrequisited response
+		/** Get modem status
+			@param s			Socket
+			@return modem status (true if connected)
+		 */
+		bool getSocketModemStatus(uint8_t s);
+
+
+};
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkProvider.cpp	(revision 136)
@@ -0,0 +1,71 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3MobileNetworkProvider.h>
+
+GSM3MobileNetworkProvider* theProvider;
+
+GSM3MobileNetworkProvider::GSM3MobileNetworkProvider()
+{
+	socketsAsServer=0x0000;
+};
+
+
+int GSM3MobileNetworkProvider::getNewOccupiedSocketAsServer()
+{
+	int i;
+	for(i=minSocketAsServer(); i<=maxSocketAsServer(); i++)
+	{
+		if ((!(socketsAsServer&(0x0001<<i))) && getSocketAsServerModemStatus(i))
+		{
+			socketsAsServer|=((0x0001)<<i);	
+			//Serial.print("New occupied=");Serial.println(i);
+			return i;
+		}
+	}
+	//Serial.println("No new occupied");
+	return -1;
+}
+
+
+bool GSM3MobileNetworkProvider::getStatusSocketAsServer(uint8_t socket)
+{
+	if(socketsAsServer&(0x0001<<socket))
+		return 1;
+	else
+		return 0;
+};
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkProvider.h	(revision 136)
@@ -0,0 +1,136 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILENETWORKPROVIDER_
+#define _GSM3MOBILENETWORKPROVIDER_
+
+#include <GSM3MobileAccessProvider.h>
+#include <inttypes.h>
+#include <stddef.h>
+#include <IPAddress.h>
+		
+class GSM3MobileNetworkProvider 
+{
+	private:
+	
+		/** Restart hardware
+			@return 1 if successful
+		 */
+		int HWrestart();
+		
+		uint16_t socketsAsServer; // Server socket
+		
+		/** Get modem status
+			@param s			Socket
+			@return modem status (true if connected)
+		 */
+		virtual inline bool getSocketAsServerModemStatus(int s){return false;};
+		
+	public:
+		
+		/** minSocketAsServer
+			@return 0
+		 */
+		virtual inline int minSocketAsServer(){return 0;};
+		
+		/** maxSocketAsServer
+			@return 0
+		 */
+		virtual inline int maxSocketAsServer(){return 0;};
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		virtual int ready()=0;
+		
+		/** Constructor */
+		GSM3MobileNetworkProvider();
+		
+		/** Get network status
+			@return network status
+		 */
+		virtual inline GSM3_NetworkStatus_t getStatus(){return ERROR;};
+		
+		/** Get socket client status
+			@param socket		Socket
+			@return 1 if connected, 0 otherwise
+		 */
+		bool getStatusSocketClient(uint8_t socket);
+
+		/** Close a AT command
+			@param code			Close code
+		 */
+		virtual inline void closeCommand(int code){};
+		
+		/** Establish a TCP connection
+			@param port				Port
+			@param localIP			IP address
+			@param localIPlength	IP address size in characters
+			@return	command error if exists
+		 */
+		virtual inline int connectTCPServer(int port, char* localIP, int localIPlength){return 0;};
+		
+		/** Get local IP address
+			@param LocalIP			Buffer for save IP address
+			@param LocalIPlength	Buffer size
+		 */
+		virtual inline int getIP(char* LocalIP, int LocalIPlength){return 0;};
+			
+		/** Get new occupied socket
+			@return -1 if no new socket has been occupied
+		 */
+		int getNewOccupiedSocketAsServer();
+		
+		/** Get socket status as server
+			@param socket			Socket to get status
+			@return socket status
+		 */
+		bool getStatusSocketAsServer(uint8_t socket);
+		
+		/** Close a socket
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		int disconnectTCP(bool client1Server0, int idsocket){return 1;};
+		
+		/** Release socket
+			@param socket		Socket
+		 */
+		void releaseSocket(int socket){};
+
+};
+
+extern GSM3MobileNetworkProvider* theProvider;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkRegistry.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkRegistry.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkRegistry.cpp	(revision 136)
@@ -0,0 +1,51 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3MobileNetworkRegistry.h>
+
+GSM3MobileNetworkRegistry::GSM3MobileNetworkRegistry()
+{
+	theProvider=0;
+};
+
+void GSM3MobileNetworkRegistry::registerMobileNetworkProvider(GSM3MobileNetworkProvider* provider)
+{
+	theProvider=provider;
+}
+
+GSM3MobileNetworkProvider* GSM3MobileNetworkRegistry::getMobileNetworkProvider()
+{
+	return theProvider;
+}
+
+GSM3MobileNetworkRegistry theMobileNetworkRegistry;
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkRegistry.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkRegistry.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileNetworkRegistry.h	(revision 136)
@@ -0,0 +1,63 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILENETWORKREGISTRY_
+#define _GSM3MOBILENETWORKREGISTRY_
+#include <GSM3MobileNetworkProvider.h>
+
+class GSM3MobileNetworkRegistry
+{
+	private:
+		
+		GSM3MobileNetworkProvider* theProvider; // Network provider
+
+	public:
+	
+		/** Constructor */
+		GSM3MobileNetworkRegistry();
+		
+		/** Register in mobile network provider
+			@param provider			Provider
+		 */
+		void registerMobileNetworkProvider(GSM3MobileNetworkProvider* provider);
+			
+		/** Returns network provider object pointer
+			@return mobile network provider
+		 */
+		GSM3MobileNetworkProvider* getMobileNetworkProvider();
+	
+};
+
+extern GSM3MobileNetworkRegistry theMobileNetworkRegistry;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileSMSProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileSMSProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileSMSProvider.cpp	(revision 136)
@@ -0,0 +1,3 @@
+#include <GSM3MobileSMSProvider.h>
+
+GSM3MobileSMSProvider* theGSM3SMSProvider;
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileSMSProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileSMSProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileSMSProvider.h	(revision 136)
@@ -0,0 +1,91 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILESMSPROVIDER_
+#define _GSM3MOBILESMSPROVIDER_
+
+class GSM3MobileSMSProvider
+{
+	public:
+		
+		/** Begin a SMS to send it
+			@param to			Destination
+			@return error command if it exists
+		 */
+		virtual inline int beginSMS(const char* to){return 0;};
+		
+		/** Write a SMS character by character
+			@param c			Character
+		 */
+		virtual inline void writeSMS(const char c){};
+		
+		/** End SMS
+			@return error command if it exists
+		 */
+		virtual inline int endSMS(){return 0;};
+		
+		/** Check if SMS available and prepare it to be read
+			@return number of bytes in a received SMS
+		 */
+		virtual inline int availableSMS(){return 0;};
+		
+		/** Read a byte but do not advance the buffer header (circular buffer)
+			@return character
+		 */
+		virtual inline int peekSMS(){return 0;};
+		
+		/** Delete the SMS from Modem memory and proccess answer
+		 */
+		virtual inline void flushSMS(){return;};
+		
+		/** Read sender number phone
+			@param number		Buffer for save number phone
+			@param nlength		Buffer length
+			@return 1 success, >1 error
+		 */
+		virtual inline int remoteSMSNumber(char* number, int nlength){return 0;}; 
+		
+		/** Read one char for SMS buffer (advance circular buffer)
+			@return character
+		 */
+		virtual inline int readSMS(){return 0;};
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		virtual int ready()=0;
+};
+
+extern GSM3MobileSMSProvider* theGSM3SMSProvider;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerProvider.cpp	(revision 136)
@@ -0,0 +1,5 @@
+ #include <GSM3MobileServerProvider.h>
+ 
+ GSM3MobileServerProvider* theGSM3MobileServerProvider;
+ 
+ 
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerProvider.h	(revision 136)
@@ -0,0 +1,95 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_MOBILESERVERPROVIDER__
+#define __GSM3_MOBILESERVERPROVIDER__
+
+
+#include <GSM3MobileAccessProvider.h>
+#include <inttypes.h>
+#include <stddef.h>
+		
+
+class GSM3MobileServerProvider
+{	
+		/** Get socket status
+			@param s			Socket
+			@return modem status (true if connected)
+		 */
+		virtual bool getSocketAsServerModemStatus(int s)=0;
+		
+	public:
+		
+		/** minSocketAsServer
+			@return socket
+		 */
+		virtual int minSocketAsServer()=0;
+		
+		/** maxSocketAsServer
+			@return socket
+		 */
+		virtual int maxSocketAsServer()=0;
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		virtual int ready()=0;
+		
+		/** Constructor */
+		GSM3MobileServerProvider(){};
+						
+		/** Connect server to TCP port
+			@param port			TCP port
+			@return	command error if exists
+		 */
+		virtual  int connectTCPServer(int port)=0;
+		//virtual  int getIP(char* LocalIP, int LocalIPlength)=0;
+				
+		/** Get new occupied socket as server
+			@return return -1 if no new socket has been occupied
+		 */
+		virtual int getNewOccupiedSocketAsServer()=0;
+		
+		/** Get socket status
+			@param socket		Socket
+			@return socket status (true if connected)
+		 */
+		virtual bool getStatusSocketAsServer(uint8_t socket)=0;
+		
+		// virtual int disconnectTCP(bool client1Server0, int idsocket)=0;
+
+};
+
+extern GSM3MobileServerProvider* theGSM3MobileServerProvider;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerService.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerService.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerService.cpp	(revision 136)
@@ -0,0 +1,159 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3MobileServerService.h>
+#include <GSM3MobileServerProvider.h>
+#include <GSM3MobileClientProvider.h>
+
+
+#define __TOUTSERVER__ 10000
+#define BUFFERSIZETWEET 100
+
+#define GSM3MOBILESERVERSERVICE_SYNCH 0x01 // 1: TRUE, compatible with other clients 0: FALSE
+
+// While there is only a shield (ShieldV1) we will include it by default
+#include <GSM3ShieldV1ServerProvider.h>
+GSM3ShieldV1ServerProvider theShieldV1ServerProvider;
+
+
+GSM3MobileServerService::GSM3MobileServerService(uint8_t port, bool synch)
+{
+	mySocket=0;
+	_port=port;
+	flags = 0;
+	
+	// If synchronous
+	if(synch)
+		flags |= GSM3MOBILESERVERSERVICE_SYNCH;
+}
+
+// Returns 0 if last command is still executing
+// 1 if success
+// >1 if error 
+int GSM3MobileServerService::ready()
+{	
+	return theGSM3MobileServerProvider->ready();
+}
+
+void GSM3MobileServerService::begin()
+{	
+	if(theGSM3MobileServerProvider==0)
+		return;
+	theGSM3MobileServerProvider->connectTCPServer(_port);
+	
+	if(flags & GSM3MOBILESERVERSERVICE_SYNCH)
+		waitForAnswer();
+}
+
+GSM3MobileClientService GSM3MobileServerService::available(bool synch)
+{	
+	int newSocket;
+	// In case we are debugging, we'll need to force a look at the buffer
+	ready();
+	
+	newSocket=theGSM3MobileServerProvider->getNewOccupiedSocketAsServer();
+	
+	// Instatiate new client. If we are synch, the client is synchronous/blocking
+	GSM3MobileClientService client((uint8_t)(newSocket), (flags & GSM3MOBILESERVERSERVICE_SYNCH));
+
+	return client;
+}
+
+size_t GSM3MobileServerService::write(uint8_t c)
+{
+// Adapt to the new, lean implementation	
+//	theGSM3MobileServerProvider->writeSocket(c);
+	return 1;
+}
+
+void GSM3MobileServerService::beginWrite()
+{
+// Adapt to the new, lean implementation
+//	theGSM3MobileServerProvider->beginWriteSocket(local1Remote0, mySocket);
+}
+
+size_t GSM3MobileServerService::write(const uint8_t* buf)
+{
+// Adapt to the new, lean implementation
+//	theGSM3MobileServerProvider->writeSocket((const char*)(buf));
+	return strlen((const char*)buf);
+}
+
+size_t GSM3MobileServerService::write(const uint8_t* buf, size_t sz)
+{
+// Adapt to the new, lean implementation
+//	theGSM3MobileServerProvider->writeSocket((const char*)(buf));
+}
+
+void GSM3MobileServerService::endWrite()
+{
+// Adapt to the new, lean implementation
+//	theGSM3MobileServerProvider->endWriteSocket();
+}
+
+void GSM3MobileServerService::stop()
+{
+	
+	// Review, should be the server?
+	theGSM3MobileClientProvider->disconnectTCP(local1Remote0, mySocket);
+	if(flags & GSM3MOBILESERVERSERVICE_SYNCH)
+		waitForAnswer();
+	theGSM3MobileClientProvider->releaseSocket(mySocket);
+	mySocket = -1;
+}
+
+
+/*int GSM3MobileServerService::getIP(char* LocalIP, int LocalIPlength)
+{
+	return theGSM3MobileServerProvider->getIP(LocalIP, LocalIPlength);
+}*/
+
+int GSM3MobileServerService::waitForAnswer()
+{
+	unsigned long m;
+	m=millis();
+	int res;
+	
+	while(((millis()-m)< __TOUTSERVER__ )&&(ready()==0)) 
+		delay(10);
+	
+	res=ready();
+
+	// If we get something different from a 1, we are having a problem
+	if(res!=1)
+		res=0;
+
+	return res;
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerService.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerService.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileServerService.h	(revision 136)
@@ -0,0 +1,124 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILESERVERSERVICE_
+#define _GSM3MOBILESERVERSERVICE_
+
+#include <GSM3MobileNetworkProvider.h>
+#include <GSM3MobileClientService.h>
+#include <Server.h>
+
+class GSM3MobileServerService : public Server
+{
+	private:
+	
+		uint8_t _port; // Port
+		uint8_t mySocket; // Actual socket
+		uint8_t flags;
+		bool local1Remote0;
+	
+		/** Internal utility, used in synchronous calls
+			@return operation result, 1 if success, 0 otherwise
+		 */
+		int waitForAnswer();
+
+	public:
+		
+		/** Constructor
+			@param port			Port
+			@param synch		True if the server acts synchronously
+		 */
+		GSM3MobileServerService(uint8_t port, bool synch=true);
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int ready();
+		
+		/** Initialize server
+		 */
+		void begin();
+		
+		/** Check if there is an incoming client request
+		  @param synch			If true, the returned client is synchronous or
+								blocking.
+		  @return Client if successful, else error
+		*/
+		GSM3MobileClientService available(bool synch=true);
+		
+		// Just to keep in line with Ethernet.
+		// Write to every open socket...
+		//void write(uint8_t);
+		//void write(const uint8_t *buf, size_t size);
+		
+		/** Begin write in socket
+		 */
+		void beginWrite();
+		
+		/** Write character in socket
+			@param c			Character
+			@return size
+		 */
+		size_t write(uint8_t c);
+		
+		/** Write buffer in socket
+			@param buf			Buffer
+			@return size
+		 */
+		size_t write(const uint8_t *buf);
+		
+		/** Write buffer in socket with size
+			@param buf			Buffer		
+			@param sz			Buffer size
+			@return size
+		 */
+		size_t write(const uint8_t *buf, size_t sz);
+		
+		/** End write in socket
+		 */
+		void endWrite();
+
+		/** Stop server
+		 */
+		void stop();
+		
+		// we take this function out as IPAddress is complex to bring to
+		// version 1.
+		// inline int connect(IPAddress ip, uint16_t port){return 0;};
+		// Returns 2 if there are no resources
+		//int getIP(char* LocalIP, int LocalIPlength);
+		
+};
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileVoiceProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileVoiceProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileVoiceProvider.cpp	(revision 136)
@@ -0,0 +1,4 @@
+#include <GSM3MobileVoiceProvider.h>
+
+
+GSM3MobileVoiceProvider* theGSM3MobileVoiceProvider;
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileVoiceProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileVoiceProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3MobileVoiceProvider.h	(revision 136)
@@ -0,0 +1,90 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3MOBILEVOICEPROVIDER_
+#define _GSM3MOBILEVOICEPROVIDER_
+
+enum GSM3_voiceCall_st { IDLE_CALL, CALLING, RECEIVINGCALL, TALKING};
+
+class GSM3MobileVoiceProvider
+{
+	public:
+		
+		/** Initialize the object relating it to the general infrastructure
+			@param
+			@return void
+		*/
+		virtual void initialize(){};
+		
+		/** Launch a voice call
+			@param number	 	Phone number to be called
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		*/
+		virtual int voiceCall(const char* number)=0;
+		
+		/** Answer a voice call
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		*/
+		virtual int answerCall()=0;
+		
+		/** Hang a voice call
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		*/
+		virtual int hangCall()=0;
+		
+		/** Retrieve phone number of caller
+			@param buffer		Buffer for copy phone number
+			@param bufsize		Buffer size
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		*/
+		virtual int retrieveCallingNumber(char* buffer, int bufsize)=0;
+
+		/** Returns voice call status
+			@return voice call status
+		*/
+		virtual GSM3_voiceCall_st getvoiceCallStatus()=0;
+		
+		/**	Set voice call status
+			@param status		New status for voice call
+		*/
+		virtual void setvoiceCallStatus(GSM3_voiceCall_st status)=0;
+
+		/** Get last command status
+			@return Returns 0 if last command is still executing, 1 success, >1 error
+		*/
+		virtual int ready()=0;
+};
+
+extern GSM3MobileVoiceProvider* theGSM3MobileVoiceProvider;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SMSService.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SMSService.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SMSService.cpp	(revision 136)
@@ -0,0 +1,126 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3SMSService.h>
+#include <GSM3MobileNetworkProvider.h>
+#include <Arduino.h>
+
+// While there is only a shield (ShieldV1) we will include it by default
+#include <GSM3ShieldV1SMSProvider.h>
+GSM3ShieldV1SMSProvider theShieldV1SMSProvider;
+
+#define GSM3SMSSERVICE_SYNCH 0x01 // 1: synchronous 0: asynchronous
+#define __TOUT__ 10000
+
+
+GSM3SMSService::GSM3SMSService(bool synch)
+{
+	if(synch)
+		flags |= GSM3SMSSERVICE_SYNCH;
+}
+
+// Returns 0 if last command is still executing
+// 1 if success
+// >1 if error 
+int GSM3SMSService::ready()
+{	
+	return theGSM3SMSProvider->ready();
+}
+
+int GSM3SMSService::beginSMS(const char *number)
+{	
+	return waitForAnswerIfNeeded(theGSM3SMSProvider->beginSMS(number));
+};
+
+int GSM3SMSService::endSMS()
+{
+	return waitForAnswerIfNeeded(theGSM3SMSProvider->endSMS());
+};
+
+size_t GSM3SMSService::write(uint8_t c)
+{
+	theGSM3SMSProvider->writeSMS(c);
+	return 1;
+}
+
+void GSM3SMSService::flush()
+{		
+	theGSM3SMSProvider->flushSMS();
+	waitForAnswerIfNeeded(1);
+};
+
+int GSM3SMSService::available()
+{
+	return waitForAnswerIfNeeded(theGSM3SMSProvider->availableSMS());
+};
+
+int GSM3SMSService::remoteNumber(char* number, int nlength)
+{
+	return theGSM3SMSProvider->remoteSMSNumber(number, nlength);
+
+}
+
+int GSM3SMSService::read()
+{
+	return theGSM3SMSProvider->readSMS();
+};
+int GSM3SMSService::peek()
+{		
+	return theGSM3SMSProvider->peekSMS();
+};
+
+int GSM3SMSService::waitForAnswerIfNeeded(int returnvalue)
+{
+	// If synchronous
+	if(flags & GSM3SMSSERVICE_SYNCH )
+	{
+		unsigned long m;
+		m=millis();
+		// Wait for __TOUT__
+		while(((millis()-m)< __TOUT__ )&&(ready()==0)) 
+			delay(100);
+		// If everything was OK, return 1
+		// else (timeout or error codes) return 0;
+		if(ready()==1)
+			return 1;
+		else
+			return 0;
+	}
+	// If not synchronous just kick ahead the coming result
+	return ready();
+}
+
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SMSService.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SMSService.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SMSService.h	(revision 136)
@@ -0,0 +1,110 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3SMSSERVICE_
+#define _GSM3SMSSERVICE_
+
+#include <GSM3MobileSMSProvider.h>
+#include <Stream.h>
+
+class GSM3SMSService : public Stream 
+{
+	private:
+	
+		uint8_t flags;
+		
+		/** Makes synchronous the functions, if needed
+			@param returnvalue	Return value
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int waitForAnswerIfNeeded(int returnvalue);
+		
+	public:
+	
+		/** Constructor
+			@param synch		Determines sync mode
+		 */
+		GSM3SMSService(bool synch=true);
+		
+		/** Write a character in SMS message
+			@param c			Character
+			@return size
+		 */
+		size_t write(uint8_t c);
+		
+		/** Begin a SMS to send it
+			@param to			Destination
+			@return error command if it exists
+		 */
+		int beginSMS(const char* to);
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int ready();
+		
+		/** End SMS
+			@return error command if it exists
+		 */
+		int endSMS();
+		
+		/** Check if SMS available and prepare it to be read
+			@return number of bytes in a received SMS
+		 */
+		int available();
+		
+		/** Read sender number phone
+			@param number		Buffer for save number phone
+			@param nlength		Buffer length
+			@return 1 success, >1 error
+		 */
+		int remoteNumber(char* number, int nlength); 
+		
+		/** Read one char for SMS buffer (advance circular buffer)
+			@return byte
+		 */
+		int read();
+		
+		/** Read a byte but do not advance the buffer header (circular buffer)
+			@return byte
+		 */
+		int peek();
+		
+		/** Delete the SMS from Modem memory and proccess answer
+		 */
+		void flush();
+
+};
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1.cpp	(revision 136)
@@ -0,0 +1,96 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3ShieldV1.h>
+#include <HardwareSerial.h>
+#include <Arduino.h>
+
+#define __RESETPIN__ 7
+#define __TOUTLOCALCOMS__ 500
+#define __TOUTSHUTDOWN__ 5000
+#define __TOUTMODEMCONFIGURATION__ 5000//equivalent to 30000 because of time in interrupt routine.
+#define __TOUTAT__ 1000
+#define __TOUTSMS__ 7000
+#define __TOUTCALL__ 15000
+#define __TOUTGPRS__ 10000
+#define __NCLIENTS_MAX__ 3
+
+//Constructor.
+GSM3ShieldV1::GSM3ShieldV1(bool db) 
+{
+	theGSM3ShieldV1ModemCore.setCommandCounter(1);
+	socketsAccepted=0;
+	theGSM3ShieldV1ModemCore.registerUMProvider(this);
+	theProvider=this;
+}
+
+//Response management.
+void GSM3ShieldV1::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+		case NONE:
+			theGSM3ShieldV1ModemCore.gss.cb.deleteToTheEnd(from);
+			break;
+
+	}
+}
+
+//Function for 2 sec delay inside an interruption.
+void GSM3ShieldV1::delayInsideInterrupt2seg()
+{
+	for (int k=0;k<40;k++)  theGSM3ShieldV1ModemCore.gss.tunedDelay(50000); 
+} 
+
+///////////////////////////////////////////////////////UNSOLICITED RESULT CODE (URC) FUNCTIONS///////////////////////////////////////////////////////////////////
+
+//URC recognize.
+bool GSM3ShieldV1::recognizeUnsolicitedEvent(byte oldTail)
+{
+
+int nlength;
+char auxLocate [15];
+	//POWER DOWN.
+	prepareAuxLocate(PSTR("POWER DOWN"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		theGSM3ShieldV1ModemCore.gss.cb.flush();
+		return true;
+	}
+	
+	
+	return false;
+}
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1.h	(revision 136)
@@ -0,0 +1,137 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_SHIELDV1__
+#define __GSM3_SHIELDV1__
+
+#include <GSM3MobileNetworkProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+#include <GSM3ShieldV1BaseProvider.h>
+#include <Arduino.h>
+
+
+class GSM3ShieldV1 : public GSM3MobileNetworkProvider, public GSM3ShieldV1BaseProvider
+{
+	// General code, for modem management
+	private:
+
+		/** Delay inside an interrupt (2 seconds)
+		 */
+		void delayInsideInterrupt2seg(); 
+		
+	// Code for SMS Service
+	private:
+
+
+		long commandMillis;
+		bool commandSent;
+		
+		const char* pinConfig;		//PIN.
+		char* accessPoint;			//APN.					
+		char* userName;				//User.
+		char* passw;				//Password.
+		const char* remoteID;		//Server.
+		
+		char* dataSocket;			//Data socket.
+		int local_Port;				//Local Port.
+		char* local_IP;				//Local IP.
+		int local_IP_Length;		//Local IP length.
+				
+		
+		int socketDataSize; 		//Size of socket data to be read.
+		int socketDataSizeWritten;  //Number of socket data written in buffer not to overflow the buffer
+				
+		int socketsAccepted;		//Status for remote clients accepted of closed.
+			
+	public:
+	
+		/** Constructor **/
+		GSM3ShieldV1(bool debug=false);
+
+		/** Manages modem response
+			@param from 		Initial byte of buffer
+			@param to 			Final byte of buffer
+		 */
+		void manageResponse(byte from, byte to);
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		*/
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+		
+		/** Parse modem response
+			@param rsp			Returns true if expected response exists
+			@param string1		Substring expected in response
+			@param string2		Second substring expected in response
+			@return true if parsed successful
+		*/
+		bool genericParse_rsp2(bool& rsp, char* string1, char* string2);
+		
+		/** Recognize URC
+			@param oldTail		
+			@return true if successful
+		*/		
+		bool recognizeUnsolicitedEvent(byte oldTail);
+		
+		/** Receive answer
+			@return true if successful
+		*/		
+		bool answerReceived();
+		
+		/** Receive socket
+			@param id_socket	Socket ID
+			@return true if successful
+		*/		
+		bool socketReceived(int id_socket);
+		
+		/** Update active ID sockets
+			@param active		Active sockets
+			@param ID			Id for update
+		*/		
+		void update_activeIDsockets (bool active, int ID);
+		
+		/** Assign ID to socket
+			@param ID			Id to assign to socket
+			@return true if successful
+		*/		
+		bool assignIDsocket (int& ID);
+		
+		/** Close data socket
+			@return true if successful
+		*/		
+		bool closedDataSocket(); //Flag closed current data socket. 
+		
+		//bool writeIncomingCalls(char* bufferForCallerId) If isn't zero, doesn't wait calls
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1AccessProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1AccessProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1AccessProvider.cpp	(revision 136)
@@ -0,0 +1,323 @@
+#include <GSM3ShieldV1AccessProvider.h>
+#include <Arduino.h>
+#include "GSM3IO.h"
+
+#define __TOUTSHUTDOWN__ 5000
+#define __TOUTMODEMCONFIGURATION__ 5000//equivalent to 30000 because of time in interrupt routine.
+#define __TOUTAT__ 1000
+
+const char _command_AT[] PROGMEM = "AT";
+const char _command_CGREG[] PROGMEM = "AT+CGREG?";
+
+
+GSM3ShieldV1AccessProvider::GSM3ShieldV1AccessProvider(bool debug)
+{
+	theGSM3ShieldV1ModemCore.setDebug(debug);
+
+}
+
+void GSM3ShieldV1AccessProvider::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+		case MODEMCONFIG:
+			ModemConfigurationContinue();
+			break;
+		case ALIVETEST:
+			isModemAliveContinue();
+			break;
+	}
+}
+
+///////////////////////////////////////////////////////CONFIGURATION FUNCTIONS///////////////////////////////////////////////////////////////////
+
+// Begin
+// Restart or start the modem
+// May be synchronous
+GSM3_NetworkStatus_t GSM3ShieldV1AccessProvider::begin(char* pin, bool restart, bool synchronous)
+{	
+	pinMode(__RESETPIN__, OUTPUT);
+
+	#ifdef TTOPEN_V1
+	pinMode(__POWERPIN__, OUTPUT);
+	digitalWrite(__POWERPIN__, HIGH);
+	#endif
+
+	// If asked for modem restart, restart
+	if (restart) 
+		HWrestart();
+	else 
+ 		HWstart();
+  
+	theGSM3ShieldV1ModemCore.gss.begin(9600);
+	// Launch modem configuration commands
+	ModemConfiguration(pin);
+	// If synchronous, wait till ModemConfiguration is over
+	if(synchronous)
+	{
+		// if we shorten this delay, the command fails
+		while(ready()==0) 
+			delay(1000); 
+	}
+	return getStatus();
+}
+
+//HWrestart.
+int GSM3ShieldV1AccessProvider::HWrestart()
+{
+	#ifdef TTOPEN_V1
+	digitalWrite(__POWERPIN__, HIGH);
+	delay(1000);
+	#endif
+	
+	theGSM3ShieldV1ModemCore.setStatus(IDLE);
+	digitalWrite(__RESETPIN__, HIGH);
+	delay(12000);
+	digitalWrite(__RESETPIN__, LOW);
+	delay(1000);
+	return 1; //configandwait(pin);
+}
+
+//HWrestart.
+int GSM3ShieldV1AccessProvider::HWstart()
+{
+
+	theGSM3ShieldV1ModemCore.setStatus(IDLE);
+	digitalWrite(__RESETPIN__, HIGH);
+	delay(2000);
+	digitalWrite(__RESETPIN__, LOW);
+	//delay(1000);
+
+	return 1; //configandwait(pin);
+}
+
+//Initial configuration main function.
+int GSM3ShieldV1AccessProvider::ModemConfiguration(char* pin)
+{
+	theGSM3ShieldV1ModemCore.setPhoneNumber(pin);
+	theGSM3ShieldV1ModemCore.openCommand(this,MODEMCONFIG);
+	theGSM3ShieldV1ModemCore.setStatus(CONNECTING);
+	ModemConfigurationContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Initial configuration continue function.
+void GSM3ShieldV1AccessProvider::ModemConfigurationContinue()
+{
+	bool resp;
+
+	// 1: Send AT
+	// 2: Wait AT OK and SetPin or CGREG
+	// 3: Wait Pin OK and CGREG
+	// 4: Wait CGREG and Flow SW control or CGREG
+	// 5: Wait IFC OK and SMS Text Mode
+	// 6: Wait SMS text Mode OK and Calling line identification
+	// 7: Wait Calling Line Id OK and Echo off
+	// 8: Wait for OK and COLP command for connecting line identification.
+	// 9: Wait for OK.
+	int ct=theGSM3ShieldV1ModemCore.getCommandCounter();
+	if(ct==1)
+	{
+		// Launch AT	
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		theGSM3ShieldV1ModemCore.genericCommand_rq(_command_AT);
+	}
+	else if(ct==2)
+	{
+		// Wait for AT - OK.
+	   if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	   {
+			if(resp)
+			{ 
+				// OK received
+				if(theGSM3ShieldV1ModemCore.getPhoneNumber() && (theGSM3ShieldV1ModemCore.getPhoneNumber()[0]!=0)) 
+					{
+						theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+CPIN="), false);
+						theGSM3ShieldV1ModemCore.setCommandCounter(3);
+						theGSM3ShieldV1ModemCore.genericCommand_rqc(theGSM3ShieldV1ModemCore.getPhoneNumber());
+					}
+				else 
+					{
+						//DEBUG	
+						//Serial.println("AT+CGREG?");	
+						theGSM3ShieldV1ModemCore.setCommandCounter(4);
+						theGSM3ShieldV1ModemCore.takeMilliseconds();
+						theGSM3ShieldV1ModemCore.genericCommand_rq(_command_CGREG);
+					}
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+	}
+	else if(ct==3)
+	{
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			if(resp)
+			{
+				theGSM3ShieldV1ModemCore.setCommandCounter(4);
+				theGSM3ShieldV1ModemCore.takeMilliseconds();
+				theGSM3ShieldV1ModemCore.delayInsideInterrupt(2000);
+				theGSM3ShieldV1ModemCore.genericCommand_rq(_command_CGREG);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+	    }
+	}
+	else if(ct==4)
+	{
+		char auxLocate1 [12];
+		char auxLocate2 [12];
+		prepareAuxLocate(PSTR("+CGREG: 0,1"), auxLocate1);
+		prepareAuxLocate(PSTR("+CGREG: 0,5"), auxLocate2);
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp, auxLocate1, auxLocate2))
+		{
+			if(resp)
+			{
+				theGSM3ShieldV1ModemCore.setCommandCounter(5);
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+IFC=1,1"));
+			}
+			else
+			{
+				// If not, launch command again
+				if(theGSM3ShieldV1ModemCore.takeMilliseconds() > __TOUTMODEMCONFIGURATION__)
+				{
+					theGSM3ShieldV1ModemCore.closeCommand(3);
+				}
+				else 
+				{
+					theGSM3ShieldV1ModemCore.delayInsideInterrupt(2000);
+					theGSM3ShieldV1ModemCore.genericCommand_rq(_command_CGREG);
+				}
+			}
+		}	
+	}
+	else if(ct==5)
+	{
+		// 5: Wait IFC OK
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			//Delay for SW flow control being active.
+			theGSM3ShieldV1ModemCore.delayInsideInterrupt(2000);
+			// 9: SMS Text Mode
+			theGSM3ShieldV1ModemCore.setCommandCounter(6);
+			theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+CMGF=1"));
+		}
+	}
+	else if(ct==6)
+	{
+		// 6: Wait SMS text Mode OK
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			//Calling line identification
+			theGSM3ShieldV1ModemCore.setCommandCounter(7);			
+			theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+CLIP=1"));
+		}
+	}
+	else if(ct==7)
+	{
+		// 7: Wait Calling Line Id OK
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			// Echo off
+			theGSM3ShieldV1ModemCore.setCommandCounter(8);			
+			theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("ATE0"));
+		}
+	}
+	else if(ct==8)
+	{
+		// 8: Wait ATEO OK, send COLP
+		// In Arduino Mega, attention, take away the COLP step
+		// It looks as we can only have 8 steps
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			theGSM3ShieldV1ModemCore.setCommandCounter(9);
+			theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+COLP=1"));
+		}
+	}
+	else if(ct==9)
+	{
+		// 9: Wait ATCOLP OK
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			if (resp) 
+				{
+					theGSM3ShieldV1ModemCore.setStatus(GSM_READY);
+					theGSM3ShieldV1ModemCore.closeCommand(1);
+				}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+ 	}
+}
+
+//Alive Test main function.
+int GSM3ShieldV1AccessProvider::isAccessAlive()
+{
+	theGSM3ShieldV1ModemCore.setCommandError(0);
+	theGSM3ShieldV1ModemCore.setCommandCounter(1);
+	theGSM3ShieldV1ModemCore.openCommand(this,ALIVETEST);
+	isModemAliveContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Alive Test continue function.
+void GSM3ShieldV1AccessProvider::isModemAliveContinue()
+{
+bool rsp;
+switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:
+		theGSM3ShieldV1ModemCore.genericCommand_rq(_command_AT);
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+      break;
+	case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(rsp))
+		{
+			if (rsp) theGSM3ShieldV1ModemCore.closeCommand(1);
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+      break;
+	}
+}
+
+//Shutdown.
+bool GSM3ShieldV1AccessProvider::shutdown()
+{
+	unsigned long m;
+	bool resp;
+	char auxLocate [18];
+	
+	// It makes no sense to have an asynchronous shutdown
+	pinMode(__RESETPIN__, OUTPUT);
+	digitalWrite(__RESETPIN__, HIGH);
+	delay(1500);
+	digitalWrite(__RESETPIN__, LOW);
+	theGSM3ShieldV1ModemCore.setStatus(IDLE);
+	theGSM3ShieldV1ModemCore.gss.close();
+	
+	m=millis();
+	prepareAuxLocate(PSTR("POWER DOWN"), auxLocate);
+	while((millis()-m) < __TOUTSHUTDOWN__)
+	{
+		delay(1);
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp, auxLocate))
+			return resp;
+	}
+	return false;
+}
+
+//Secure shutdown.
+bool GSM3ShieldV1AccessProvider::secureShutdown()
+{
+	// It makes no sense to have an asynchronous shutdown
+	pinMode(__RESETPIN__, OUTPUT);
+	digitalWrite(__RESETPIN__, HIGH);
+	delay(900);
+	digitalWrite(__RESETPIN__, LOW);
+	theGSM3ShieldV1ModemCore.setStatus(OFF);
+	theGSM3ShieldV1ModemCore.gss.close();
+
+#ifdef TTOPEN_V1
+	_delay_ms(12000);
+	digitalWrite(__POWERPIN__, LOW);
+#endif
+	
+	return true;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1AccessProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1AccessProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1AccessProvider.h	(revision 136)
@@ -0,0 +1,121 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3SHIELDV1ACCESSPROVIDER_
+#define _GSM3SHIELDV1ACCESSPROVIDER_
+
+#include <GSM3MobileAccessProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+#include <GSM3ShieldV1BaseProvider.h>
+
+class GSM3ShieldV1AccessProvider : public GSM3MobileAccessProvider, public GSM3ShieldV1BaseProvider
+{
+	private:
+
+		/** Initialize main modem configuration
+			@param pin			PIN code
+			@return command error if exists
+		 */
+		int ModemConfiguration(char* pin);
+		
+		/** Continue to modem configuration function
+		 */
+		void ModemConfigurationContinue();
+		
+		/** Continue to check if modem alive function
+		 */
+		void isModemAliveContinue();
+		
+
+	public:
+	
+		/** Constructor
+			@param debug		Determines debug mode
+		 */
+		
+		GSM3ShieldV1AccessProvider(bool debug=false);
+		
+		/** Start the GSM/GPRS modem, attaching to the GSM network
+			@param pin 			SIM PIN number (4 digits in a string, example: "1234"). If 
+								NULL the SIM has no configured PIN.
+			@param restart		Restart the modem. Default is TRUE. The modem receives
+								a signal through the Ctrl/D7 pin. If it is shut down, it will
+								start-up. If it is running, it will restart. Takes up to 10 
+								seconds
+			@param synchronous	If TRUE the call only returns after the Start is complete 
+								or fails. If FALSE the call will return inmediately. You have
+								to call repeatedly ready() until you get a result. Default is TRUE.
+			@return If synchronous, GSM3_NetworkStatus_t. If asynchronous, returns 0.
+		*/
+		GSM3_NetworkStatus_t begin(char* pin=0,bool restart=true, bool synchronous=true);
+		
+		/** Check network access status
+			@return 1 if Alive, 0 if down
+		*/
+		int isAccessAlive();
+		
+		/** Shutdown the modem (power off really)
+			@return true if successful
+		*/
+		bool shutdown();
+		
+		/** Secure shutdown the modem (power off really)
+			@return true if successful
+		 */
+		bool secureShutdown();
+		
+		/** Returns 0 if last command is still executing
+			@return 1 if success, >1 if error 
+		*/
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+		
+		/** Returns modem status
+			@return modem network status 
+		*/
+		inline GSM3_NetworkStatus_t getStatus(){return theGSM3ShieldV1ModemCore.getStatus();};
+
+		void manageResponse(byte from, byte to);
+
+		/** Restart the modem (will shut down if running)
+			@return 1 if success, >1 if error 
+		*/		
+		int HWrestart();
+		
+		/** Start the modem (will not shut down if running)
+			@return 1 if success, >1 if error 
+		*/		
+		int HWstart();
+
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BandManagement.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BandManagement.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BandManagement.cpp	(revision 136)
@@ -0,0 +1,67 @@
+#include <GSM3ShieldV1BandManagement.h>
+
+GSM3ShieldV1BandManagement::GSM3ShieldV1BandManagement(bool trace): modem(trace)
+{
+	quectelStrings[UNDEFINED]="";
+	quectelStrings[EGSM_MODE]="\"EGSM_MODE\"";
+	quectelStrings[DCS_MODE]="\"DCS_MODE\"";
+	quectelStrings[PCS_MODE]="\"PCS_MODE\"";
+	quectelStrings[EGSM_DCS_MODE]="\"EGSM_DCS_MODE\"";
+	quectelStrings[GSM850_PCS_MODE]="\"GSM850_PCS_MODE\"";
+	quectelStrings[GSM850_EGSM_DCS_PCS_MODE]="\"GSM850_EGSM_DCS_PCS_MODE\"";	
+}
+
+GSM3_NetworkStatus_t GSM3ShieldV1BandManagement::begin()
+{
+	// check modem response
+	modem.begin();
+
+	// reset hardware
+	modem.restartModem();
+
+	return IDLE;
+}
+
+String GSM3ShieldV1BandManagement::getBand()
+{
+  String modemResponse=modem.writeModemCommand("AT+QBAND?", 2000);
+	
+  for(GSM3GSMBand i=GSM850_EGSM_DCS_PCS_MODE;i>UNDEFINED;i=(GSM3GSMBand)((int)i-1))
+  {
+    if(modemResponse.indexOf(quectelStrings[i])>=0)
+      return quectelStrings[i];
+  }
+
+  Serial.print("Unrecognized modem answer:");
+  Serial.println(modemResponse);
+  
+  return "";
+}
+
+bool GSM3ShieldV1BandManagement::setBand(String band)
+{
+	String command;
+	String modemResponse;
+	bool found=false;
+
+	command="AT+QBAND=";
+	for(GSM3GSMBand i=EGSM_MODE;((i<=GSM850_EGSM_DCS_PCS_MODE)&&(!found));i=(GSM3GSMBand)((int)i+1))
+	{
+		String aux=quectelStrings[i];
+		if(aux.indexOf(band)>=0)
+		{
+		    command+=aux;
+			found=true;
+		}
+	}
+	
+	if(!found)
+		return false;
+	// Quad-band takes an awful lot of time
+    modemResponse=modem.writeModemCommand(command, 15000);
+	
+	if(modemResponse.indexOf("QBAND")>=0)
+      return true;
+	else
+		return false;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BandManagement.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BandManagement.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BandManagement.h	(revision 136)
@@ -0,0 +1,96 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3SHIELDV1BANDMANAGEMENT__
+#define __GSM3SHIELDV1BANDMANAGEMENT__
+
+// This class executes band management functions for the ShieldV1
+#include <GSM3ShieldV1DirectModemProvider.h>
+
+#define NUMBEROFBANDS 7
+#define GSM_MODE_UNDEFINED "UNDEFINED"
+#define GSM_MODE_EGSM "EGSM_MODE"
+#define GSM_MODE_DCS "DCS_MODE"
+#define GSM_MODE_PCS "PCS_MODE"
+#define GSM_MODE_EGSM_DCS "EGSM_DCS_MODE"
+#define GSM_MODE_GSM850_PCS "GSM850_PCS_MODE"
+#define GSM_MODE_GSM850_EGSM_DCS_PCS "GSM850_EGSM_DCS_PCS_MODE"
+
+typedef enum GSM3GSMBand {UNDEFINED, EGSM_MODE, DCS_MODE, PCS_MODE, EGSM_DCS_MODE, GSM850_PCS_MODE, GSM850_EGSM_DCS_PCS_MODE};
+
+// 
+// These are the bands and scopes:
+//
+//	E-GSM(900)
+//  DCS(1800)
+//  PCS(1900)
+//	E-GSM(900)+DCS(1800) ex: Europe
+//	GSM(850)+PCS(1900) Ex: USA, South Am.
+//	GSM(850)+E-GSM(900)+DCS(1800)+PCS(1900)
+
+class GSM3ShieldV1BandManagement
+{
+	private:
+	
+		GSM3ShieldV1DirectModemProvider modem; // Direct access to modem
+		
+		char* quectelStrings[NUMBEROFBANDS];// = {"\"EGSM_MODE\"", "\"DCS_MODE\"", "\"PCS_MODE\"",
+								//"\"EGSM_DCS_MODE\"", "\"GSM850_PCS_MODE\"", 
+								//"\"GSM850_EGSM_DCS_PCS_MODE\""};
+
+
+	public:
+	
+		/** Constructor
+			@param trace		If true, dumps all AT dialogue to Serial
+		 */
+		GSM3ShieldV1BandManagement(bool trace=false);
+		
+		/** Forces modem hardware restart, so we begin from scratch
+			@return always returns IDLE status
+		 */
+		GSM3_NetworkStatus_t begin();
+
+		/** Get current modem work band 
+			@return current modem work band
+		 */		
+		String getBand();
+
+		/** Changes the modem operating band 
+			@param band			Desired new band
+			@return true if success, false otherwise
+		 */			
+		bool setBand(String band);
+			
+};
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BaseProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BaseProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BaseProvider.cpp	(revision 136)
@@ -0,0 +1,27 @@
+#include <GSM3ShieldV1BaseProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+#include <Arduino.h>
+
+// Returns 0 if last command is still executing
+// 1 if success
+// >1 if error 
+int GSM3ShieldV1BaseProvider::ready() 
+{
+	theGSM3ShieldV1ModemCore.manageReceivedData();
+
+	return theGSM3ShieldV1ModemCore.getCommandError();
+};
+
+void GSM3ShieldV1BaseProvider::prepareAuxLocate(PGM_P str, char auxLocate[])
+{
+	int i=0;
+	char c;
+
+	do
+	{	
+		c=pgm_read_byte_near(str + i); 
+		auxLocate[i]=c;
+		i++;
+	} while (c!=0);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BaseProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BaseProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1BaseProvider.h	(revision 136)
@@ -0,0 +1,73 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3SHIELDV1BASEPROVIDER_
+#define _GSM3SHIELDV1BASEPROVIDER_
+
+#include <GSM3SoftSerial.h>
+
+enum GSM3_commandType_e { XON, NONE, MODEMCONFIG, ALIVETEST, BEGINSMS, ENDSMS, AVAILABLESMS, FLUSHSMS,
+	VOICECALL, ANSWERCALL, HANGCALL, RETRIEVECALLINGNUMBER, 
+	ATTACHGPRS, DETACHGPRS, CONNECTTCPCLIENT, DISCONNECTTCP, BEGINWRITESOCKET, ENDWRITESOCKET, 
+	AVAILABLESOCKET, FLUSHSOCKET, CONNECTSERVER, GETIP, GETCONNECTSTATUS, GETLOCATION, GETICCID}; 
+
+class GSM3ShieldV1BaseProvider
+{
+	public:
+
+	/** Get last command status
+		@return Returns 0 if last command is still executing, 1 success, >1 error
+	*/
+	int ready();
+
+	/** This function locates strings from PROGMEM in the buffer
+		@param str			PROGMEN
+		@param auxLocate	Buffer where to locate strings
+	*/
+	void prepareAuxLocate(PGM_P str, char auxLocate[]);
+
+	/** Manages modem response
+		@param from 		Initial byte of buffer
+		@param to 			Final byte of buffer
+	*/
+	virtual void manageResponse(byte from, byte to);
+	
+	/** Recognize URC
+		@param from		
+		@return true if successful (default: false)
+	*/		
+	virtual bool recognizeUnsolicitedEvent(byte from){return false;};
+
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1CellManagement.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1CellManagement.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1CellManagement.cpp	(revision 136)
@@ -0,0 +1,168 @@
+#include <GSM3ShieldV1CellManagement.h>
+
+GSM3ShieldV1CellManagement::GSM3ShieldV1CellManagement()
+{
+}
+
+bool GSM3ShieldV1CellManagement::parseQCCID_available(bool& rsp)
+{
+	char c;
+	bool iccidFound = false;
+	int i = 0;
+	
+	while(((c = theGSM3ShieldV1ModemCore.theBuffer().read()) != 0) & (i < 19))
+	{
+		if((c < 58) & (c > 47))
+			iccidFound = true;
+		
+		if(iccidFound)
+		{
+			bufferICCID[i] = c;
+			i++;
+		}
+	}
+	bufferICCID[i]=0;
+	
+	return true;
+}			
+
+bool GSM3ShieldV1CellManagement::parseQENG_available(bool& rsp)
+{
+	char c;
+	char location[50] = "";
+	int i = 0;
+	
+	if (!(theGSM3ShieldV1ModemCore.theBuffer().chopUntil("+QENG: ", true)))
+		rsp = false;
+	else 
+		rsp = true;
+	
+	if (!(theGSM3ShieldV1ModemCore.theBuffer().chopUntil("+QENG:", true)))
+		rsp = false;
+	else 
+		rsp = true;
+	
+	while(((c = theGSM3ShieldV1ModemCore.theBuffer().read()) != 0) & (i < 50))
+	{
+		location[i] = c;
+		i++;
+	}
+	location[i]=0;
+	
+	char* res_tok = strtok(location, ",");
+	res_tok=strtok(NULL, ",");
+	strcpy(countryCode, res_tok);
+	res_tok=strtok(NULL, ",");
+	strcpy(networkCode, res_tok);
+	res_tok=strtok(NULL, ",");
+	strcpy(locationArea, res_tok);
+	res_tok=strtok(NULL, ",");
+	strcpy(cellId, res_tok);
+	
+	return true;
+}			
+
+int GSM3ShieldV1CellManagement::getLocation(char *country, char *network, char *area, char *cell)
+{
+	if((theGSM3ShieldV1ModemCore.getStatus() != GSM_READY) && (theGSM3ShieldV1ModemCore.getStatus() != GPRS_READY))
+		return 2;
+	
+	countryCode=country;
+	networkCode=network;
+	locationArea=area;
+	cellId=cell;
+	
+	theGSM3ShieldV1ModemCore.openCommand(this,GETLOCATION);
+	getLocationContinue();
+	
+	unsigned long timeOut = millis();
+	while(((millis() - timeOut) < 5000) & (ready() == 0));
+
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+void GSM3ShieldV1CellManagement::getLocationContinue()
+{
+	bool resp;
+	
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:
+		theGSM3ShieldV1ModemCore.gss.tunedDelay(3000);
+		delay(3000);
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QENG=1"), false);
+		theGSM3ShieldV1ModemCore.print("\r");
+		break;
+	case 2:
+		if (theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			theGSM3ShieldV1ModemCore.gss.tunedDelay(3000);
+			delay(3000);
+			theGSM3ShieldV1ModemCore.setCommandCounter(3);
+			theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QENG?"), false);
+			theGSM3ShieldV1ModemCore.print("\r");
+		}
+		else theGSM3ShieldV1ModemCore.closeCommand(1);
+		break;
+	case 3:
+		if (resp)
+		{
+			parseQENG_available(resp);
+			theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+		else theGSM3ShieldV1ModemCore.closeCommand(2);
+		break;
+	}
+}
+
+int GSM3ShieldV1CellManagement::getICCID(char *iccid)
+{
+	if((theGSM3ShieldV1ModemCore.getStatus() != GSM_READY) && (theGSM3ShieldV1ModemCore.getStatus() != GPRS_READY))
+		return 2;
+	
+	bufferICCID=iccid;
+	theGSM3ShieldV1ModemCore.openCommand(this,GETICCID);
+	getICCIDContinue();
+	
+	unsigned long timeOut = millis();
+	while(((millis() - timeOut) < 5000) & (ready() == 0));
+		
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+void GSM3ShieldV1CellManagement::getICCIDContinue()
+{
+	bool resp;
+	
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QCCID"), false);
+		theGSM3ShieldV1ModemCore.print("\r");
+		break;
+	case 2:
+		if (theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			parseQCCID_available(resp);
+			theGSM3ShieldV1ModemCore.closeCommand(2);
+		}
+		else theGSM3ShieldV1ModemCore.closeCommand(1);
+		break;
+	}
+}
+
+void GSM3ShieldV1CellManagement::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+		case NONE:
+			theGSM3ShieldV1ModemCore.gss.cb.deleteToTheEnd(from);
+			break;
+		case GETLOCATION:
+			getLocationContinue();
+			break;
+		case GETICCID:
+			getICCIDContinue();
+			break;
+	}
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1CellManagement.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1CellManagement.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1CellManagement.h	(revision 136)
@@ -0,0 +1,92 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_SHIELDV1CELLMANAGEMENT__
+#define __GSM3_SHIELDV1CELLMANAGEMENT__
+
+#include <GSM3ShieldV1ModemCore.h>
+#include <GSM3MobileCellManagement.h>
+#include <GSM3ShieldV1CellManagement.h>
+
+class GSM3ShieldV1CellManagement : public GSM3MobileCellManagement, public GSM3ShieldV1BaseProvider
+{		
+	public:
+	
+		/** Constructor
+		*/
+		GSM3ShieldV1CellManagement();
+
+		/** Manages modem response
+			@param from 		Initial byte of buffer
+			@param to 			Final byte of buffer
+		 */
+		void manageResponse(byte from, byte to);
+		
+		/** getLocation
+		 @return current cell location
+		*/		
+		int getLocation(char *country, char *network, char *area, char *cell);
+		
+		/** getICCID
+		*/
+		int getICCID(char *iccid);
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+
+	private:	
+	
+		char *countryCode;
+		char *networkCode;
+		char *locationArea;
+		char *cellId;
+		
+		char *bufferICCID;
+	
+		/** Continue to getLocation function
+		 */
+		void getLocationContinue();
+		
+		/** Continue to getICCID function
+		 */
+		void getICCIDContinue();
+		
+		bool parseQENG_available(bool& rsp);
+		
+		bool parseQCCID_available(bool& rsp);
+		
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ClientProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ClientProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ClientProvider.cpp	(revision 136)
@@ -0,0 +1,294 @@
+#include <GSM3ShieldV1ClientProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+
+GSM3ShieldV1ClientProvider::GSM3ShieldV1ClientProvider()
+{
+	theGSM3MobileClientProvider=this;
+};
+
+//Response management.
+void GSM3ShieldV1ClientProvider::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+		case NONE:
+			theGSM3ShieldV1ModemCore.gss.cb.deleteToTheEnd(from);
+			break;
+		case CONNECTTCPCLIENT:
+			connectTCPClientContinue();
+			break;
+		case FLUSHSOCKET:
+			flushSocketContinue();
+			break;	
+	}
+}
+
+//Connect TCP main function.
+int GSM3ShieldV1ClientProvider::connectTCPClient(const char* server, int port, int id_socket)
+{
+	theGSM3ShieldV1ModemCore.setPort(port);		
+	idSocket = id_socket;
+	
+	theGSM3ShieldV1ModemCore.setPhoneNumber((char*)server);
+	theGSM3ShieldV1ModemCore.openCommand(this,CONNECTTCPCLIENT);
+	theGSM3ShieldV1ModemCore.registerUMProvider(this);
+	connectTCPClientContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();	
+}
+
+int GSM3ShieldV1ClientProvider::connectTCPClient(IPAddress add, int port, int id_socket)
+{
+	remoteIP=add;
+	theGSM3ShieldV1ModemCore.setPhoneNumber(0);
+	return connectTCPClient(0, port, id_socket);
+}
+
+//Connect TCP continue function.
+void GSM3ShieldV1ClientProvider::connectTCPClientContinue()
+{
+	bool resp;
+	// 0: Dot or DNS notation activation
+	// 1: Disable SW flow control 
+	// 2: Waiting for IFC OK
+	// 3: Start-up TCP connection "AT+QIOPEN"
+	// 4: Wait for connection OK
+	// 5: Wait for CONNECT
+
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIDNSIP="), false);
+		if ((theGSM3ShieldV1ModemCore.getPhoneNumber()!=0)&&
+			((*(theGSM3ShieldV1ModemCore.getPhoneNumber())<'0')||((*(theGSM3ShieldV1ModemCore.getPhoneNumber())>'9'))))
+		{
+			theGSM3ShieldV1ModemCore.print('1');
+			theGSM3ShieldV1ModemCore.print('\r');
+		}
+		else 
+		{
+			theGSM3ShieldV1ModemCore.print('0');
+			theGSM3ShieldV1ModemCore.print('\r');
+		}
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			//Response received
+			if(resp)
+			{				
+				// AT+QIOPEN
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIOPEN="),false);
+				theGSM3ShieldV1ModemCore.print("\"TCP\",\"");
+				if(theGSM3ShieldV1ModemCore.getPhoneNumber()!=0)
+				{
+					theGSM3ShieldV1ModemCore.print(theGSM3ShieldV1ModemCore.getPhoneNumber());
+				}
+				else
+				{
+					remoteIP.printTo(theGSM3ShieldV1ModemCore);
+				}
+				theGSM3ShieldV1ModemCore.print('"');
+				theGSM3ShieldV1ModemCore.print(',');
+				theGSM3ShieldV1ModemCore.print(theGSM3ShieldV1ModemCore.getPort());
+				theGSM3ShieldV1ModemCore.print('\r');
+				theGSM3ShieldV1ModemCore.setCommandCounter(3);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;
+	
+	case 3:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			// Response received
+			if(resp)
+			{
+				// OK Received
+				// Great. Go for the next step
+				theGSM3ShieldV1ModemCore.setCommandCounter(4);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;
+	case 4:
+		char auxLocate [12];
+		prepareAuxLocate(PSTR("CONNECT\r\n"), auxLocate);
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp,auxLocate))
+	    {
+			// Response received
+			if(resp)
+			{
+				// Received CONNECT OK
+				// Great. We're done
+				theGSM3ShieldV1ModemCore.setStatus(TRANSPARENT_CONNECTED);
+				theGSM3ShieldV1ModemCore.theBuffer().chopUntil(auxLocate, true);
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			}
+			else 
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+		}		
+		break;
+		
+	}
+}
+
+//Disconnect TCP main function.
+int GSM3ShieldV1ClientProvider::disconnectTCP(bool client1Server0, int id_socket)
+{		
+	// id Socket does not really mean anything, in this case we have
+	// only one socket running
+	theGSM3ShieldV1ModemCore.openCommand(this,DISCONNECTTCP);
+	
+	// If we are not closed, launch the command
+//[ZZ]	if(theGSM3ShieldV1ModemCore.getStatus()==TRANSPARENT_CONNECTED)
+//	{
+		delay(1000);
+		theGSM3ShieldV1ModemCore.print("+++");
+		delay(1000);
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QICLOSE"));
+		theGSM3ShieldV1ModemCore.setStatus(GPRS_READY);
+//	}
+	// Looks like it runs everytime, so we simply flush to death and go on
+	do
+	{
+		// Empty the local buffer, and tell the modem to XON
+		// If meanwhile we receive a DISCONNECT we should detect it as URC.
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+		// Give some time for the buffer to refill
+		delay(100);
+		theGSM3ShieldV1ModemCore.closeCommand(1);
+	}while(theGSM3ShieldV1ModemCore.theBuffer().storedBytes()>0);
+
+	theGSM3ShieldV1ModemCore.unRegisterUMProvider(this);
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+
+//Write socket first chain main function.
+void GSM3ShieldV1ClientProvider::beginWriteSocket(bool client1Server0, int id_socket)
+{
+}
+
+
+//Write socket next chain function.
+void GSM3ShieldV1ClientProvider::writeSocket(const char* buf)
+{
+	if(theGSM3ShieldV1ModemCore.getStatus()==TRANSPARENT_CONNECTED)
+		theGSM3ShieldV1ModemCore.print(buf);
+}
+
+//Write socket character function.
+void GSM3ShieldV1ClientProvider::writeSocket(uint8_t c)
+{
+	if(theGSM3ShieldV1ModemCore.getStatus()==TRANSPARENT_CONNECTED)
+		theGSM3ShieldV1ModemCore.print((char)c);
+}
+
+//Write socket last chain main function.
+void GSM3ShieldV1ClientProvider::endWriteSocket()
+{		
+}
+
+
+//Available socket main function.
+int GSM3ShieldV1ClientProvider::availableSocket(bool client1Server0, int id_socket)
+{
+		
+	if(!(theGSM3ShieldV1ModemCore.getStatus()==TRANSPARENT_CONNECTED))
+		theGSM3ShieldV1ModemCore.closeCommand(4);
+		
+	if(theGSM3ShieldV1ModemCore.theBuffer().storedBytes())
+		theGSM3ShieldV1ModemCore.closeCommand(1);
+	else
+		theGSM3ShieldV1ModemCore.closeCommand(4);
+		
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+int GSM3ShieldV1ClientProvider::readSocket()
+{
+	char charSocket;
+		
+	if(theGSM3ShieldV1ModemCore.theBuffer().availableBytes()==0)
+	{
+		return 0;
+	}
+	
+	charSocket = theGSM3ShieldV1ModemCore.theBuffer().read(); 
+	
+	if(theGSM3ShieldV1ModemCore.theBuffer().availableBytes()==100)
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+
+	return charSocket;
+
+}
+
+//Read socket main function.
+int GSM3ShieldV1ClientProvider::peekSocket()
+{
+	return theGSM3ShieldV1ModemCore.theBuffer().peek(0); 
+}
+
+
+//Flush SMS main function.
+void GSM3ShieldV1ClientProvider::flushSocket()
+{
+	theGSM3ShieldV1ModemCore.openCommand(this,FLUSHSOCKET);
+
+	flushSocketContinue();
+}
+
+//Send SMS continue function.
+void GSM3ShieldV1ClientProvider::flushSocketContinue()
+{
+	// If we have incomed data
+	if(theGSM3ShieldV1ModemCore.theBuffer().storedBytes()>0)
+	{
+		// Empty the local buffer, and tell the modem to XON
+		// If meanwhile we receive a DISCONNECT we should detect it as URC.
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+	}
+	else 
+	{
+		//We're done		
+		theGSM3ShieldV1ModemCore.closeCommand(1);
+	}
+}
+
+// URC recognize.
+// Yes, we recognize "closes" in client mode
+bool GSM3ShieldV1ClientProvider::recognizeUnsolicitedEvent(byte oldTail)
+{
+	char auxLocate [12];
+	prepareAuxLocate(PSTR("CLOSED"), auxLocate);
+
+	if((theGSM3ShieldV1ModemCore.getStatus()==TRANSPARENT_CONNECTED) & theGSM3ShieldV1ModemCore.theBuffer().chopUntil(auxLocate, false, false))
+	{
+		theGSM3ShieldV1ModemCore.setStatus(GPRS_READY);
+		theGSM3ShieldV1ModemCore.unRegisterUMProvider(this);
+		return true;
+	}
+		
+	return false;
+}
+
+int GSM3ShieldV1ClientProvider::getSocket(int socket)
+{
+	return 0;
+}
+
+void GSM3ShieldV1ClientProvider::releaseSocket(int socket)
+{
+
+}
+
+bool GSM3ShieldV1ClientProvider::getStatusSocketClient(uint8_t socket)
+{
+	return (theGSM3ShieldV1ModemCore.getStatus()==TRANSPARENT_CONNECTED);
+
+};
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ClientProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ClientProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ClientProvider.h	(revision 136)
@@ -0,0 +1,181 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_SHIELDV1CLIENTPROVIDER__
+#define __GSM3_SHIELDV1CLIENTPROVIDER__
+
+#include <GSM3MobileClientProvider.h>
+#include <GSM3ShieldV1BaseProvider.h>
+
+class GSM3ShieldV1ClientProvider : public GSM3MobileClientProvider,  public GSM3ShieldV1BaseProvider
+{
+	private:
+	
+		int remotePort;				//Current operation remote port.
+		IPAddress remoteIP;        	// Remote IP address
+		int idSocket;				// Remote ID socket.
+
+
+		/** Continue to connect TCP client function
+		 */
+		void connectTCPClientContinue();
+		
+		/** Continue to available socket function
+		 */
+		void availableSocketContinue();
+		
+		/** Continue to flush socket function
+		 */
+		void flushSocketContinue();
+		
+	public:
+	
+		/** Constructor */
+		GSM3ShieldV1ClientProvider();
+		
+		/** minSocket
+			@return 0
+		 */
+		int minSocket(){return 0;};
+		
+		/** maxSocket
+			@return 0
+		 */
+		int maxSocket(){return 0;};
+		
+		/** Connect to a remote TCP server
+			@param server		String with IP or server name
+			@param port 		Remote port number
+			@param id_socket	Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		int connectTCPClient(const char* server, int port, int id_socket);
+		
+		/** Connect to a remote TCP server
+			@param add			Remote IP address
+			@param port 		Remote port number
+			@param id_socket	Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		int connectTCPClient(IPAddress add, int port, int id_socket);
+
+		/** Begin writing through a socket
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		void beginWriteSocket(bool client1Server0, int id_socket);
+
+		/** Write through a socket. MUST go after beginWriteSocket()
+			@param buf				characters to be written (final 0 will not be written)
+		 */
+		void writeSocket(const char* buf);
+
+		/** Write through a socket. MUST go after beginWriteSocket()
+			@param c 				character to be written
+		 */		
+		void writeSocket(uint8_t c);
+		
+		/** Finish current writing
+		 */	
+		void endWriteSocket();
+		
+		/** Check if there are data to be read in socket.
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Local socket number
+			@return 0 if command running, 1 if there are data available, 4 if no data, otherwise error
+		 */
+		int availableSocket(bool client, int id_socket); // With "available" and "readSocket" ask the modem for 1500 bytes.
+		
+		/** Read data (get a character) available in socket
+			@return character
+		 */
+		int readSocket(); //If Read() gets to the end of the QIRD response, execute again QIRD SYNCHRONOUSLY 
+		
+		/** Flush socket
+		 */
+		void flushSocket();
+		
+		/** Get a character but will not advance the buffer head
+			@return character
+		 */
+		int peekSocket();
+
+		/** Close a socket
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Socket
+			@return 0 if command running, 1 if success, otherwise error
+		 */
+		int disconnectTCP(bool client1Server0, int id_socket);
+		
+		/** Recognize unsolicited event
+			@param oldTail		
+			@return true if successful
+		 */
+		bool recognizeUnsolicitedEvent(byte from);
+		
+		/** Manages modem response
+			@param from 		Initial byte position
+			@param to 			Final byte position
+		 */
+		void manageResponse(byte from, byte to);
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+		
+		// Client socket management, just to be compatible
+		// with the Multi option
+		
+		/** Get socket
+			@param socket		Socket		
+			@return socket
+		 */
+		int getSocket(int socket=-1);
+		
+		/** Release socket
+			@param socket		Socket
+		 */
+		void releaseSocket(int socket);
+		
+		/** Get socket client status
+			@param socket		Socket
+			@return 1 if connected, 0 otherwise
+		 */
+		bool getStatusSocketClient(uint8_t socket);
+		
+};
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DataNetworkProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DataNetworkProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DataNetworkProvider.cpp	(revision 136)
@@ -0,0 +1,365 @@
+#include <GSM3ShieldV1DataNetworkProvider.h>
+#include <Arduino.h>
+
+const char _command_CGATT[] PROGMEM = "AT+CGATT=";
+const char _command_SEPARATOR[] PROGMEM = "\",\"";
+
+//Attach GPRS main function.	
+GSM3_NetworkStatus_t GSM3ShieldV1DataNetworkProvider::attachGPRS(char* apn, char* user_name, char* password, bool synchronous)
+{					
+	user = user_name;
+	passwd = password;
+	// A sad use of byte reuse
+	theGSM3ShieldV1ModemCore.setPhoneNumber(apn);
+
+	theGSM3ShieldV1ModemCore.openCommand(this,ATTACHGPRS);
+	theGSM3ShieldV1ModemCore.setStatus(CONNECTING);
+
+	attachGPRSContinue();
+
+	// If synchronous, wait till attach is over, or not.
+	if(synchronous)
+	{
+		// if we shorten this delay, the command fails
+		while(ready()==0) 
+			delay(100); 
+	}
+
+	return theGSM3ShieldV1ModemCore.getStatus();	
+}
+
+//Atthach GPRS continue function.
+void GSM3ShieldV1DataNetworkProvider::attachGPRSContinue()
+{
+	bool resp;
+	// 1: Attach to GPRS service "AT+CGATT=1"
+	// 2: Wait attach OK and Set the context 0 as FGCNT "AT+QIFGCNT=0"
+	// 3: Wait context OK and Set bearer type as GPRS, APN, user name and pasword "AT+QICSGP=1..."
+	// 4: Wait bearer OK and Enable the function of MUXIP "AT+QIMUX=1" 
+	// 5: Wait for disable MUXIP OK and Set the session mode as non transparent "AT+QIMODE=0"
+	// 6: Wait for session mode OK and Enable notification when data received "AT+QINDI=1"
+	// 8: Wait domain name OK and Register the TCP/IP stack "AT+QIREGAPP"
+	// 9: Wait for Register OK and Activate FGCNT "AT+QIACT"
+	// 10: Wait for activate OK
+	
+	int ct=theGSM3ShieldV1ModemCore.getCommandCounter();
+	if(ct==1)
+	{
+		//AT+CGATT	
+		theGSM3ShieldV1ModemCore.genericCommand_rq(_command_CGATT,false);
+		theGSM3ShieldV1ModemCore.print(1);
+		theGSM3ShieldV1ModemCore.print('\r');
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+	}
+	else if(ct==2)
+	{
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			if(resp)
+			{
+				//AT+QIFGCNT
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIFGCNT=0"));
+				theGSM3ShieldV1ModemCore.setCommandCounter(3);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+	}
+	else if(ct==3)
+	{
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			if(resp)
+			{
+				// Great. Go for the next step
+				//DEBUG
+				//Serial.println("AT+QICSGP.");	
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QICSGP=1,\""),false);
+				theGSM3ShieldV1ModemCore.print(theGSM3ShieldV1ModemCore.getPhoneNumber());
+				theGSM3ShieldV1ModemCore.genericCommand_rq(_command_SEPARATOR,false);
+				theGSM3ShieldV1ModemCore.print(user);
+				theGSM3ShieldV1ModemCore.genericCommand_rq(_command_SEPARATOR,false);
+				theGSM3ShieldV1ModemCore.print(passwd);
+				theGSM3ShieldV1ModemCore.print("\"\r");
+				theGSM3ShieldV1ModemCore.setCommandCounter(4);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+	}
+	else if(ct==4)
+	{
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			if(resp)
+			{
+				// AT+QIMUX=1 for multisocket
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIMUX=0"));
+				theGSM3ShieldV1ModemCore.setCommandCounter(5);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+	}
+	else if(ct==5)
+	{
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			if(resp)
+			{
+				//AT+QIMODE=0 for multisocket
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIMODE=1"));
+				theGSM3ShieldV1ModemCore.setCommandCounter(6);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+	}
+	else if(ct==6)
+	{
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			if(resp)
+			{
+				// AT+QINDI=1
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QINDI=1"));
+				theGSM3ShieldV1ModemCore.setCommandCounter(8);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+	}
+	else if(ct==8)
+	{
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			if(resp)
+			{
+				// AT+QIREGAPP
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIREGAPP"));
+				theGSM3ShieldV1ModemCore.setCommandCounter(9);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+	}
+	else if(ct==9)
+	{
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			if(resp)
+			{
+				// AT+QIACT	
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIACT"));
+				theGSM3ShieldV1ModemCore.setCommandCounter(10);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+	}
+	else if(ct==10)
+	{
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			if (resp) 
+				{
+					theGSM3ShieldV1ModemCore.setStatus(GPRS_READY);
+					theGSM3ShieldV1ModemCore.closeCommand(1);
+				}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+	}
+}
+
+//Detach GPRS main function.
+GSM3_NetworkStatus_t GSM3ShieldV1DataNetworkProvider::detachGPRS(bool synchronous)
+{
+	theGSM3ShieldV1ModemCore.openCommand(this,DETACHGPRS);
+	theGSM3ShieldV1ModemCore.setStatus(CONNECTING);
+	detachGPRSContinue();
+	
+	if(synchronous)
+	{
+		while(ready()==0) 
+			delay(1); 
+	}
+	
+	return theGSM3ShieldV1ModemCore.getStatus();
+}
+
+void GSM3ShieldV1DataNetworkProvider::detachGPRSContinue()
+{
+	bool resp;
+	// 1: Detach to GPRS service "AT+CGATT=0"
+	// 2: Wait dettach +PDP DEACT 
+	// 3: Wait for OK
+
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		//AT+CGATT=0
+		theGSM3ShieldV1ModemCore.genericCommand_rq(_command_CGATT,false);
+		theGSM3ShieldV1ModemCore.print(0);
+		theGSM3ShieldV1ModemCore.print('\r');
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		char auxLocate[12];
+		prepareAuxLocate(PSTR("+PDP DEACT"), auxLocate);
+		if(theGSM3ShieldV1ModemCore.theBuffer().locate(auxLocate))
+	    {
+			if(resp)
+			{
+				// Received +PDP DEACT;				
+				theGSM3ShieldV1ModemCore.setCommandCounter(3);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;
+	case 3:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			// OK received
+			if (resp) 
+				{
+					theGSM3ShieldV1ModemCore.setStatus(GSM_READY);
+					theGSM3ShieldV1ModemCore.closeCommand(1);
+				}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}		
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+		break;	
+	}
+}
+
+//QILOCIP parse.
+bool GSM3ShieldV1DataNetworkProvider::parseQILOCIP_rsp(char* LocalIP, int LocalIPlength, bool& rsp)
+{
+	if (!(theGSM3ShieldV1ModemCore.theBuffer().extractSubstring("\r\n","\r\n", LocalIP, LocalIPlength)))
+		rsp = false;
+	else 
+		rsp = true;
+	return true;
+}
+
+//Get IP main function.
+int GSM3ShieldV1DataNetworkProvider::getIP(char* LocalIP, int LocalIPlength)
+{
+	theGSM3ShieldV1ModemCore.setPhoneNumber(LocalIP);
+	theGSM3ShieldV1ModemCore.setPort(LocalIPlength);
+	theGSM3ShieldV1ModemCore.openCommand(this,GETIP);
+	getIPContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+void GSM3ShieldV1DataNetworkProvider::getIPContinue()
+{
+
+	bool resp;
+	// 1: Read Local IP "AT+QILOCIP"
+	// 2: Waiting for IP.
+
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		//AT+QILOCIP
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QILOCIP"));
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(parseQILOCIP_rsp(theGSM3ShieldV1ModemCore.getPhoneNumber(), theGSM3ShieldV1ModemCore.getPort(), resp))
+	    {
+			if (resp) 
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			else 
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+		break;	
+	}
+}
+
+//Get IP with IPAddress object
+IPAddress GSM3ShieldV1DataNetworkProvider::getIPAddress() {
+	char ip_temp[15]="";
+	getIP(ip_temp, 15);
+	unsigned long m=millis();
+
+	while((millis()-m)<10*1000 && (!ready())){
+		// wait for a response from the modem:
+		delay(100);
+	} 
+	IPAddress ip;
+	inet_aton(ip_temp, ip);
+	return ip;
+}
+
+int GSM3ShieldV1DataNetworkProvider::inet_aton(const char* aIPAddrString, IPAddress& aResult)
+{
+    // See if we've been given a valid IP address
+    const char* p =aIPAddrString;
+    while (*p &&
+           ( (*p == '.') || (*p >= '0') || (*p <= '9') ))
+    {
+        p++;
+    }
+
+    if (*p == '\0')
+    {
+        // It's looking promising, we haven't found any invalid characters
+        p = aIPAddrString;
+        int segment =0;
+        int segmentValue =0;
+        while (*p && (segment < 4))
+        {
+            if (*p == '.')
+            {
+                // We've reached the end of a segment
+                if (segmentValue > 255)
+                {
+                    // You can't have IP address segments that don't fit in a byte
+                    return 0;
+                }
+                else
+                {
+                    aResult[segment] = (byte)segmentValue;
+                    segment++;
+                    segmentValue = 0;
+                }
+            }
+            else
+            {
+                // Next digit
+                segmentValue = (segmentValue*10)+(*p - '0');
+            }
+            p++;
+        }
+        // We've reached the end of address, but there'll still be the last
+        // segment to deal with
+        if ((segmentValue > 255) || (segment > 3))
+        {
+            // You can't have IP address segments that don't fit in a byte,
+            // or more than four segments
+            return 0;
+        }
+        else
+        {
+            aResult[segment] = (byte)segmentValue;
+            return 1;
+        }
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+//Response management.
+void GSM3ShieldV1DataNetworkProvider::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+		case ATTACHGPRS:
+			attachGPRSContinue();
+			break;	
+		case DETACHGPRS:
+			detachGPRSContinue();
+			break;
+		case GETIP:
+			getIPContinue();
+			break;		
+	}
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DataNetworkProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DataNetworkProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DataNetworkProvider.h	(revision 136)
@@ -0,0 +1,140 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3SHIELDV1DATANETWORKPROVIDER_
+#define _GSM3SHIELDV1DATANETWORKPROVIDER_
+
+#include <GSM3MobileDataNetworkProvider.h>
+#include <GSM3ShieldV1BaseProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+#include <IPAddress.h>
+
+class GSM3ShieldV1DataNetworkProvider : public GSM3MobileDataNetworkProvider, public GSM3ShieldV1BaseProvider
+{
+	private:
+	
+		char* user; // Username for GPRS
+		char* passwd; // Password for GPRS
+	
+		/** Continue to attach GPRS function
+		 */
+		void attachGPRSContinue();
+		
+		/** Continue to detach GPRS function
+		 */
+		void detachGPRSContinue();
+		
+		/** Parse QILOCIP response
+			@param LocalIP			Buffer for save local IP address
+			@param LocalIPlength	Buffer size
+			@param rsp				Returns true if expected response exists
+			@return true if command executed correctly
+		 */
+		bool parseQILOCIP_rsp(char* LocalIP, int LocalIPlength, bool& rsp);
+		
+		/** Continue to get IP function
+		 */
+		void getIPContinue();
+		
+		/** Implementation of inet_aton standard function
+			@param aIPAddrString	IP address in characters buffer
+			@param aResult			IP address in IPAddress format
+			@return 1 if the address is successfully converted, or 0 if the conversion failed
+		 */
+		int inet_aton(const char* aIPAddrString, IPAddress& aResult);
+	
+	public:
+	
+		/** Attach to GPRS/GSM network
+			@param networkId 	APN GPRS
+			@param user			Username
+			@param pass			Password
+			@return connection status
+		 */
+		GSM3_NetworkStatus_t networkAttach(char* networkId, char* user, char* pass)
+		{
+			return attachGPRS(networkId, user, pass);
+		};
+		
+		/** Detach GPRS/GSM network
+			@return connection status
+		 */
+		GSM3_NetworkStatus_t networkDetach(){ return detachGPRS();};
+		
+		/** Attach to GPRS service
+			@param apn			APN GPRS
+			@param user_name	Username
+			@param password		Password
+			@param synchronous	Sync mode
+			@return connection status
+		 */
+		GSM3_NetworkStatus_t attachGPRS(char* apn, char* user_name, char* password, bool synchronous=true);
+		
+		/** Detach GPRS service
+			@param synchronous	Sync mode
+			@return connection status
+		 */
+		GSM3_NetworkStatus_t detachGPRS(bool synchronous=true);
+		
+		/** Returns 0 if last command is still executing
+			@return 1 if success, >1 if error 
+		 */
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+		
+		/** Get network status (connection)
+			@return status
+		 */
+		inline GSM3_NetworkStatus_t getStatus(){return theGSM3ShieldV1ModemCore.getStatus();};
+
+		/** Get actual assigned IP address
+			@param LocalIP			Buffer for copy IP address
+			@param LocalIPlength	Buffer length
+			@return command error if exists
+		 */
+		int getIP(char* LocalIP, int LocalIPlength);
+		
+		/** Get actual assigned IP address in IPAddress format
+			@return IP address in IPAddress format
+		 */
+		IPAddress getIPAddress();
+		
+		/** Manages modem response
+			@param from 		Initial byte of buffer
+			@param to 			Final byte of buffer
+		 */
+		void manageResponse(byte from, byte to);
+
+
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DirectModemProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DirectModemProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DirectModemProvider.cpp	(revision 136)
@@ -0,0 +1,143 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3ShieldV1DirectModemProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+#include <HardwareSerial.h>
+#include <Arduino.h>
+
+#define __RESETPIN__ 7
+
+//Constructor
+GSM3ShieldV1DirectModemProvider::GSM3ShieldV1DirectModemProvider(bool t)
+{
+	trace=t;
+};
+
+void GSM3ShieldV1DirectModemProvider::begin()
+{
+	theGSM3ShieldV1ModemCore.gss.begin(9600);
+}
+
+void GSM3ShieldV1DirectModemProvider::restartModem()
+{
+	pinMode(__RESETPIN__, OUTPUT);
+	digitalWrite(__RESETPIN__, HIGH);
+	delay(12000);
+	digitalWrite(__RESETPIN__, LOW);
+	delay(1000);
+
+}
+
+//To enable the debug process
+void GSM3ShieldV1DirectModemProvider::connect()
+{
+        theGSM3ShieldV1ModemCore.registerActiveProvider(this);
+}
+
+//To disable the debug process
+void GSM3ShieldV1DirectModemProvider::disconnect()
+{
+        theGSM3ShieldV1ModemCore.registerActiveProvider(0);
+}
+
+//Write to the modem by means of SoftSerial
+size_t GSM3ShieldV1DirectModemProvider::write(uint8_t c)
+{	
+        theGSM3ShieldV1ModemCore.write(c);
+}
+
+//Detect if data to be read
+int/*bool*/ GSM3ShieldV1DirectModemProvider::available()
+{
+	if (theGSM3ShieldV1ModemCore.gss.cb.peek(1)) return 1;
+	else return 0;
+} 
+
+//Read data
+int/*char*/ GSM3ShieldV1DirectModemProvider::read()
+{
+	int dataRead;
+	dataRead = theGSM3ShieldV1ModemCore.gss.cb.read();
+	//In case last char in xof mode.
+	if (!(theGSM3ShieldV1ModemCore.gss.cb.peek(0))) {
+			theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+			delay(100);
+		}
+	return dataRead;
+} 
+
+//Peek data
+int/*char*/ GSM3ShieldV1DirectModemProvider::peek()
+{
+	return theGSM3ShieldV1ModemCore.gss.cb.peek(0);
+} 
+
+//Flush data
+void GSM3ShieldV1DirectModemProvider::flush()
+{
+	return theGSM3ShieldV1ModemCore.gss.cb.flush();
+}
+
+String GSM3ShieldV1DirectModemProvider::writeModemCommand(String ATcommand, int responseDelay)
+{
+
+  if(trace)
+	Serial.println(ATcommand);
+	
+  // Flush other texts
+  flush();
+  
+  //Enter debug mode.
+  connect();
+  //Send the AT command.
+  println(ATcommand);
+
+  delay(responseDelay);
+
+  //Get response data from modem.
+  String result = "";
+  if(trace)
+	theGSM3ShieldV1ModemCore.gss.cb.debugBuffer();
+
+  while (available())
+  {
+    char c = read();
+    result += c;
+  }
+  if(trace)
+	Serial.println(result);
+  //Leave the debug mode.
+  disconnect();
+  return result;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DirectModemProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DirectModemProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1DirectModemProvider.h	(revision 136)
@@ -0,0 +1,118 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+
+#ifndef __GSM3DIRECTMODEMPROVIDER__
+#define __GSM3DIRECTMODEMPROVIDER__
+
+#include <GSM3SoftSerial.h>
+#include <GSM3MobileNetworkProvider.h>
+#include <GSM3ShieldV1BaseProvider.h>
+#include <Stream.h>
+#include <Arduino.h>
+
+class GSM3ShieldV1DirectModemProvider : public GSM3ShieldV1BaseProvider, public Stream
+{			
+		private:
+			
+			bool trace;
+			
+        public:
+			
+			/** Constructor
+				@param trace if true, dumps all AT dialogue to Serial
+			*/
+			GSM3ShieldV1DirectModemProvider(bool trace=false);
+			
+			/**
+			 */
+			void begin();
+			
+			/**
+			 */
+			void restartModem();
+			
+			/** Enable the debug process.
+			 */
+			void connect();
+			
+			/** Disable the debug process.
+			 */
+			void disconnect();
+			
+			/** Debug write to modem by means of SoftSerial.
+				@param c			Character
+				@return size
+			 */
+			size_t write(uint8_t c);
+			
+			/** Check for incoming bytes in buffer
+				@return
+			 */
+			int available();
+			
+			/** Read from circular buffer
+				@return character
+			 */
+			int read();
+			
+			/** Read from circular buffer, but do not delete it
+				@return character
+			 */
+			int peek();
+			
+			/** Empty circular buffer
+			 */
+			void flush();
+			
+			/** Manages modem response
+				@param from 		Initial byte of buffer
+				@param to 			Final byte of buffer
+			 */
+			void manageResponse(byte from, byte to){};
+			
+			/** Recognize unsolicited event
+				@param from		
+				@return true if successful
+			 */
+			bool recognizeUnsolicitedEvent(byte from){return false;};
+			
+			/** Send AT command to modem
+				@param command		AT command
+				@param delay		Time to wait for response
+				@return response from modem
+			 */
+			String writeModemCommand(String command, int delay);
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemCore.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemCore.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemCore.cpp	(revision 136)
@@ -0,0 +1,198 @@
+#include <GSM3ShieldV1ModemCore.h>
+#include <Arduino.h>
+
+GSM3ShieldV1ModemCore theGSM3ShieldV1ModemCore;
+
+char* __ok__="OK";
+
+GSM3ShieldV1ModemCore::GSM3ShieldV1ModemCore() : gss()
+{
+	gss.registerMgr(this);
+	_dataInBufferFrom=0;
+	_dataInBufferTo=0;
+	commandError=1;
+	commandCounter=0;
+	ongoingCommand=NONE;
+	takeMilliseconds();
+	
+	for(int i=0;i<UMPROVIDERS;i++)
+		UMProvider[i]=0;
+}
+
+void GSM3ShieldV1ModemCore::registerUMProvider(GSM3ShieldV1BaseProvider* provider)
+{
+	for(int i=0;i<UMPROVIDERS;i++)
+	{
+		if(UMProvider[i]==0)
+		{
+			UMProvider[i]=provider;
+			break;
+		}
+
+	}
+
+}
+
+void GSM3ShieldV1ModemCore::unRegisterUMProvider(GSM3ShieldV1BaseProvider* provider)
+{
+	for(int i=0;i<UMPROVIDERS;i++)
+	{
+		if(UMProvider[i]==provider)
+		{
+			UMProvider[i]=0;
+			break;
+		}
+	}
+}
+
+
+//Response parse.
+bool GSM3ShieldV1ModemCore::genericParse_rsp(bool& rsp, char* string, char* string2)
+{
+	if((string==0) && (string2==0))
+		string=__ok__;
+	
+	rsp=theBuffer().locate(string);
+	
+	if((!rsp)&&(string2!=0))
+		rsp=theBuffer().locate(string2);
+		
+	return true;
+}
+
+void GSM3ShieldV1ModemCore::closeCommand(int code)
+{
+	// If we were configuring the modem,
+	// and there's been an error
+	// we don't know exactly where we are
+	if((code!=1)&&(theGSM3ShieldV1ModemCore.getOngoingCommand()==MODEMCONFIG))
+		theGSM3ShieldV1ModemCore.setStatus(ERROR);
+
+	setCommandError(code);
+	ongoingCommand=NONE;
+	activeProvider=0;
+	commandCounter=1;
+}
+
+//Generic command (stored in flash).
+void GSM3ShieldV1ModemCore::genericCommand_rq(PGM_P str, bool addCR)
+{
+	theBuffer().flush();
+	writePGM(str, addCR);
+}
+
+//Generic command (const string).
+void GSM3ShieldV1ModemCore::genericCommand_rqc(const char* str, bool addCR)
+{
+	theBuffer().flush();
+	print(str);
+	if(addCR)
+		print("\r");
+}
+
+// If we are not debugging, lets manage data in interrupt time
+// but if we are not, just take note.
+void GSM3ShieldV1ModemCore::manageMsg(byte from, byte to)
+{
+	if(_debug)
+	{
+		_dataInBufferFrom=from;
+		_dataInBufferTo=to;
+	}
+	else
+	{
+		manageMsgNow(from, to);
+	}
+}
+
+void GSM3ShieldV1ModemCore::manageReceivedData()
+{
+	if(_debug)
+	{
+/*		Serial.print(theBuffer().getHead());
+		Serial.print(" ");
+		Serial.println(theBuffer().getTail());*/
+		if(_dataInBufferFrom != _dataInBufferTo)
+		{
+			theBuffer().debugBuffer();
+			manageMsgNow(_dataInBufferFrom, _dataInBufferTo);
+			_dataInBufferFrom=0;
+			_dataInBufferTo=0;
+		}
+	}
+	else
+	{
+		// Just debugging the non debugging
+//		Serial.println();
+//		Serial.print("Com:");
+//		Serial.print(ongoingCommand);
+//		Serial.print("   Step:");
+//		Serial.print(commandCounter);
+	}
+}
+
+//Select between URC or response.
+void GSM3ShieldV1ModemCore::manageMsgNow(byte from, byte to)
+{
+	bool recognized=false;
+	
+	for(int i=0;(i<UMPROVIDERS)&&(!recognized);i++)
+	{
+		if(UMProvider[i])
+			recognized=UMProvider[i]->recognizeUnsolicitedEvent(from);
+	}
+	if((!recognized)&&(activeProvider))
+		activeProvider->manageResponse(from, to);
+}
+
+
+void GSM3ShieldV1ModemCore::openCommand(GSM3ShieldV1BaseProvider* provider, GSM3_commandType_e c)
+{	
+	activeProvider=provider;
+	commandError=0;
+	commandCounter=1;
+	ongoingCommand=c;
+	_dataInBufferFrom=0;
+	_dataInBufferTo=0;
+
+};
+
+size_t GSM3ShieldV1ModemCore::writePGM(PGM_P str, bool CR)
+{
+	int i=0;
+	char c;
+	
+	do
+	{	
+		c=pgm_read_byte_near(str + i); 
+		if(c!=0)
+			write(c);
+		i++;
+	} while (c!=0);
+	if(CR)
+		print("\r");
+		
+	return 1;
+}
+
+size_t GSM3ShieldV1ModemCore::write(uint8_t c)
+{
+	if(_debug)
+		GSM3CircularBuffer::printCharDebug(c);
+	return gss.write(c);
+}
+
+unsigned long GSM3ShieldV1ModemCore::takeMilliseconds()
+{
+	unsigned long now=millis();
+	unsigned long delta;
+	delta=now-milliseconds;
+	milliseconds=now;
+	return delta;
+}
+
+void GSM3ShieldV1ModemCore::delayInsideInterrupt(unsigned long milliseconds)
+{
+	for (unsigned long k=0;k<milliseconds;k++)  
+		theGSM3ShieldV1ModemCore.gss.tunedDelay(1000); 
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemCore.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemCore.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemCore.h	(revision 136)
@@ -0,0 +1,254 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+
+#ifndef __GSM3_SHIELDV1MODEMCORE__
+#define __GSM3_SHIELDV1MODEMCORE__
+
+#include <GSM3SoftSerial.h>
+#include <GSM3ShieldV1BaseProvider.h>
+#include <GSM3MobileAccessProvider.h>
+#include <Print.h>
+
+#define UMPROVIDERS 3
+
+class GSM3ShieldV1ModemCore : public GSM3SoftSerialMgr, public Print
+{
+	private:
+		
+		// Phone number, used when calling, sending SMS and reading calling numbers
+		// Also PIN in modem configuration
+		// Also APN
+		// Also remote server
+		char* phoneNumber;	
+		
+		// Working port. Port used in the ongoing command, while opening a server
+		// Also for IP address length
+		int port;
+
+		// 0 = ongoing
+		// 1 = OK
+		// 2 = Error. Incorrect state
+		// 3 = Unexpected modem message
+		// 4 = OK but not available data. 
+		uint8_t commandError;
+
+		// Counts the steps by the command
+		uint8_t commandCounter;
+		
+		// Presently ongoing command
+		GSM3_commandType_e ongoingCommand;
+		
+		// Enable/disable debug
+		bool _debug;
+		byte _dataInBufferFrom;
+		byte _dataInBufferTo;
+		
+		// This is the modem (known) status
+		GSM3_NetworkStatus_t _status;
+		
+		GSM3ShieldV1BaseProvider* UMProvider[UMPROVIDERS];
+		GSM3ShieldV1BaseProvider* activeProvider;
+		
+		// Private function for anage message
+		void manageMsgNow(byte from, byte to);
+		
+		unsigned long milliseconds;
+
+	public:
+	
+		/** Constructor */
+		GSM3ShieldV1ModemCore();
+		
+		GSM3SoftSerial gss; // Direct access to modem
+		
+		/** Get phone number
+			@return phone number
+		 */
+		char *getPhoneNumber(){return phoneNumber;};
+		
+		/** Establish a new phone number
+			@param n			Phone number
+		 */
+		void setPhoneNumber(char *n){phoneNumber=n;};
+
+		/** Get port used
+			@return port
+		 */
+		int getPort(){return port;};
+		
+		/** Establish a new port for use
+			@param p			Port
+		 */
+		void setPort(int p){port=p;};
+
+		/** Get command error
+			@return command error
+		 */
+		uint8_t getCommandError(){return commandError;};
+		
+		/** Establish a command error
+			@param n			Command error
+		 */
+		void setCommandError(uint8_t n){commandError=n;};
+		
+		/** Get command counter
+			@return command counter
+		 */
+		uint8_t getCommandCounter(){return commandCounter;};
+		
+		/** Set command counter
+			@param c			Initial value
+		 */
+		void setCommandCounter(uint8_t c){commandCounter=c;};
+
+		/** Get ongoing command
+			@return command
+		 */
+		GSM3_commandType_e getOngoingCommand(){return ongoingCommand;};
+		
+		/** Set ongoing command
+			@param c			 New ongoing command
+		 */
+		void setOngoingCommand(GSM3_commandType_e c){ongoingCommand=c;};
+		
+		/** Open command
+			@param activeProvider	Active provider
+			@param c				Command for open
+		 */
+		void openCommand(GSM3ShieldV1BaseProvider* activeProvider, GSM3_commandType_e c);
+		
+		/** Close command
+			@param code			Close code
+		 */
+		void closeCommand(int code);
+
+		// These functions allow writing to the SoftwareSerial
+		// If debug is set, dump to the console
+		
+		/** Write a character in serial
+			@param c			Character
+			@return size
+		 */
+		size_t write(uint8_t c);
+		
+		/** Write PGM
+			@param str			Buffer for write
+			@param CR			Carriadge return adding automatically
+			@return size
+		 */
+		virtual size_t writePGM(PGM_P str, bool CR=true);
+		
+		/** Establish debug mode
+			@param db			Boolean that indicates debug on or off
+		 */
+		void setDebug(bool db){_debug=db;};
+		
+		/** Generic response parser
+			@param rsp			Returns true if expected response exists
+			@param string		Substring expected in response
+			@param string2		Second substring expected in response
+			@return true if parsed correctly
+		 */		
+		bool genericParse_rsp(bool& rsp, char* string=0, char* string2=0);
+		
+		/** Generates a generic AT command request from PROGMEM buffer
+			@param str			Buffer with AT command
+			@param addCR		Carriadge return adding automatically
+		 */
+		void genericCommand_rq(PGM_P str, bool addCR=true);
+
+		/** Generates a generic AT command request from a simple char buffer
+			@param str			Buffer with AT command
+			@param addCR		Carriadge return adding automatically
+		 */
+		void genericCommand_rqc(const char* str, bool addCR=true);		
+		
+		/** Returns the circular buffer
+			@return circular buffer
+		 */
+		inline GSM3CircularBuffer& theBuffer(){return gss.cb;};
+
+		/** Establish a new network status
+			@param status		Network status
+		 */
+		inline void setStatus(GSM3_NetworkStatus_t status) { _status = status; };
+		
+		/** Returns actual network status
+			@return network status
+		 */
+		inline GSM3_NetworkStatus_t getStatus() { return _status; };
+		
+		/** Register provider as willing to receive unsolicited messages
+			@param provider	Pointer to provider able to receive unsolicited messages
+		*/
+		void registerUMProvider(GSM3ShieldV1BaseProvider* provider);		
+	
+		/** unegister provider as willing to receive unsolicited messages
+			@param provider	Pointer to provider able to receive unsolicited messages
+		*/
+		void unRegisterUMProvider(GSM3ShieldV1BaseProvider* provider);		
+
+		
+		/** Register a provider as "dialoguing" talking in facto with the modem
+			@param provider	Pointer to provider receiving responses
+		*/
+		void registerActiveProvider(GSM3ShieldV1BaseProvider* provider){activeProvider=provider;};
+		
+		/** Needed to manage the SoftSerial. Receives the call when received data
+			If _debugging, no code is called
+		@param from Starting byte to read
+		@param to Last byte to read
+		*/
+		void manageMsg(byte from, byte to);
+		
+		/** If _debugging, this call is assumed to be made out of interrupts
+			Prints incoming info and calls manageMsgNow
+		*/
+		void manageReceivedData();
+
+		/** Chronometer. Measure milliseconds from last call
+			@return milliseconds from las time function was called
+		*/		
+		unsigned long takeMilliseconds();
+		
+		/** Delay for interrupts
+			@param milliseconds		Delay time in milliseconds
+		 */
+		void delayInsideInterrupt(unsigned long milliseconds);
+
+};
+
+extern GSM3ShieldV1ModemCore theGSM3ShieldV1ModemCore;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemVerification.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemVerification.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemVerification.cpp	(revision 136)
@@ -0,0 +1,73 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+
+#include <GSM3ShieldV1ModemVerification.h>
+
+// constructor
+GSM3ShieldV1ModemVerification::GSM3ShieldV1ModemVerification()
+{
+};
+
+// reset the modem for direct access
+int GSM3ShieldV1ModemVerification::begin()
+{
+	int result=0;
+	String modemResponse;
+	
+	// check modem response
+	modemAccess.begin();
+
+	// reset hardware
+	modemAccess.restartModem();
+
+	modemResponse=modemAccess.writeModemCommand("AT", 1000);
+	if(modemResponse.indexOf("OK")>=0)
+		result=1;
+	modemResponse=modemAccess.writeModemCommand("ATE0", 1000);
+	return result;
+}
+
+// get IMEI
+String GSM3ShieldV1ModemVerification::getIMEI()
+{
+	String number(NULL);
+	// AT command for obtain IMEI
+	String modemResponse = modemAccess.writeModemCommand("AT+GSN", 2000);
+	// Parse and check response
+	char res_to_compare[modemResponse.length()];
+	modemResponse.toCharArray(res_to_compare, modemResponse.length());
+	if(strstr(res_to_compare,"OK") != NULL)
+		number = modemResponse.substring(1, 17);
+	return number;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemVerification.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemVerification.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ModemVerification.h	(revision 136)
@@ -0,0 +1,64 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3SHIELDV1MODEMVERIFICATION_
+#define _GSM3SHIELDV1MODEMVERIFICATION_
+
+#include <GSM3ShieldV1AccessProvider.h>
+#include <GSM3ShieldV1DirectModemProvider.h>
+
+class GSM3ShieldV1ModemVerification
+{
+
+	private:
+		
+		GSM3ShieldV1DirectModemProvider modemAccess;
+		GSM3ShieldV1AccessProvider gsm; // Access provider to GSM/GPRS network
+		
+	public:
+
+		/** Constructor */
+		GSM3ShieldV1ModemVerification();
+	
+		/** Check modem response and restart it
+		 */
+		int begin();
+		
+		/** Obtain modem IMEI (command AT)
+			@return modem IMEI number
+		 */
+		String getIMEI();
+		
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiClientProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiClientProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiClientProvider.cpp	(revision 136)
@@ -0,0 +1,583 @@
+#include <GSM3ShieldV1MultiClientProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+
+const char _command_MultiQISRVC[] PROGMEM = "AT+QISRVC=";
+
+#define __TOUTFLUSH__ 10000
+
+GSM3ShieldV1MultiClientProvider::GSM3ShieldV1MultiClientProvider()
+{
+	theGSM3MobileClientProvider=this;
+	theGSM3ShieldV1ModemCore.registerUMProvider(this);
+};
+
+//Response management.
+void GSM3ShieldV1MultiClientProvider::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+		case XON:
+			if (flagReadingSocket) 
+				{
+//					flagReadingSocket = 0;
+					fullBufferSocket = (theGSM3ShieldV1ModemCore.theBuffer().availableBytes()<3);
+				}
+			else theGSM3ShieldV1ModemCore.setOngoingCommand(NONE);
+			break;
+		case NONE:
+			theGSM3ShieldV1ModemCore.gss.cb.deleteToTheEnd(from);
+			break;
+		case CONNECTTCPCLIENT:
+			connectTCPClientContinue();
+			break;
+		case DISCONNECTTCP:
+			disconnectTCPContinue();
+			break;	
+	 	case BEGINWRITESOCKET:
+			beginWriteSocketContinue();
+			break;
+		case ENDWRITESOCKET:
+			endWriteSocketContinue();
+			break;	
+		case AVAILABLESOCKET:
+			availableSocketContinue();
+			break;	
+		case FLUSHSOCKET:
+			fullBufferSocket = (theGSM3ShieldV1ModemCore.theBuffer().availableBytes()<3);
+			flushSocketContinue();
+			break;	
+	}
+}
+
+//Connect TCP main function.
+int GSM3ShieldV1MultiClientProvider::connectTCPClient(const char* server, int port, int id_socket)
+{
+	theGSM3ShieldV1ModemCore.setPort(port);		
+	idSocket = id_socket;
+	
+	theGSM3ShieldV1ModemCore.setPhoneNumber((char*)server);
+	theGSM3ShieldV1ModemCore.openCommand(this,CONNECTTCPCLIENT);
+	connectTCPClientContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();	
+}
+
+int GSM3ShieldV1MultiClientProvider::connectTCPClient(IPAddress add, int port, int id_socket)
+{
+	remoteIP=add;
+	theGSM3ShieldV1ModemCore.setPhoneNumber(0);
+	return connectTCPClient(0, port, id_socket);
+}
+
+//Connect TCP continue function.
+void GSM3ShieldV1MultiClientProvider::connectTCPClientContinue()
+{
+	bool resp;
+	// 0: Dot or DNS notation activation
+	// 1: Disable SW flow control 
+	// 2: Waiting for IFC OK
+	// 3: Start-up TCP connection "AT+QIOPEN"
+	// 4: Wait for connection OK
+	// 5: Wait for CONNECT
+
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIDNSIP="), false);
+		if ((theGSM3ShieldV1ModemCore.getPhoneNumber()!=0)&&
+			((*(theGSM3ShieldV1ModemCore.getPhoneNumber())<'0')||((*(theGSM3ShieldV1ModemCore.getPhoneNumber())>'9'))))
+		{
+			theGSM3ShieldV1ModemCore.print('1');
+			theGSM3ShieldV1ModemCore.print('\r');
+		}
+		else 
+		{
+			theGSM3ShieldV1ModemCore.print('0');
+			theGSM3ShieldV1ModemCore.print('\r');
+		}
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			//Response received
+			if(resp)
+			{				
+				// AT+QIOPEN
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIOPEN="),false);
+				theGSM3ShieldV1ModemCore.print(idSocket);
+				theGSM3ShieldV1ModemCore.print(",\"TCP\",\"");
+				if(theGSM3ShieldV1ModemCore.getPhoneNumber()!=0)
+				{
+					theGSM3ShieldV1ModemCore.print(theGSM3ShieldV1ModemCore.getPhoneNumber());
+				}
+				else
+				{
+					remoteIP.printTo(theGSM3ShieldV1ModemCore);
+				}
+				theGSM3ShieldV1ModemCore.print('"');
+				theGSM3ShieldV1ModemCore.print(',');
+				theGSM3ShieldV1ModemCore.print(theGSM3ShieldV1ModemCore.getPort());
+				theGSM3ShieldV1ModemCore.print('\r');
+				theGSM3ShieldV1ModemCore.setCommandCounter(3);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;
+	
+	case 3:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			// Response received
+			if(resp)
+			{
+				// OK Received
+				// Great. Go for the next step
+				theGSM3ShieldV1ModemCore.setCommandCounter(4);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;
+	case 4:
+		char auxLocate [12];
+		prepareAuxLocate(PSTR("CONNECT OK"), auxLocate);
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp,auxLocate))
+	    {
+			// Response received
+			if(resp)
+			{
+				// Received CONNECT OK
+				// Great. We're done
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			}
+			else 
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+		}		
+		break;
+		
+	}
+}
+
+//Disconnect TCP main function.
+int GSM3ShieldV1MultiClientProvider::disconnectTCP(bool client1Server0, int id_socket)
+{		
+	idSocket = id_socket;
+	
+	// First of all, we will flush the socket synchronously
+	unsigned long m;
+	m=millis();
+	flushSocket();
+	while(((millis()-m)< __TOUTFLUSH__ )&&(ready()==0)) 
+		delay(10);
+		
+	// Could not flush the communications... strange
+	if(ready()==0)
+	{
+		theGSM3ShieldV1ModemCore.setCommandError(2);
+		return theGSM3ShieldV1ModemCore.getCommandError();
+	}
+		
+	// Set up the command
+	client1_server0 = client1Server0;
+	flagReadingSocket=0;
+	theGSM3ShieldV1ModemCore.openCommand(this,DISCONNECTTCP);
+	disconnectTCPContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Disconnect TCP continue function
+void GSM3ShieldV1MultiClientProvider::disconnectTCPContinue()
+{
+	bool resp;
+	// 1: Send AT+QISRVC
+	// 2: "AT+QICLOSE"
+	// 3: Wait for OK
+	
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		theGSM3ShieldV1ModemCore.genericCommand_rq(_command_MultiQISRVC, false);
+		if (client1_server0) theGSM3ShieldV1ModemCore.print('1');
+		else theGSM3ShieldV1ModemCore.print('2');
+		theGSM3ShieldV1ModemCore.print('\r');
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		// Parse response to QISRVC
+		theGSM3ShieldV1ModemCore.genericParse_rsp(resp);
+		if(resp)
+		{
+			// Send QICLOSE command
+			theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QICLOSE="),false);
+			theGSM3ShieldV1ModemCore.print(idSocket);
+			theGSM3ShieldV1ModemCore.print('\r');
+			theGSM3ShieldV1ModemCore.setCommandCounter(3);
+		}
+		else 
+			theGSM3ShieldV1ModemCore.closeCommand(3);
+		break;
+	case 3:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {		
+			theGSM3ShieldV1ModemCore.setCommandCounter(0);
+			if (resp) 
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			else 
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;
+	}
+}
+
+//Write socket first chain main function.
+void GSM3ShieldV1MultiClientProvider::beginWriteSocket(bool client1Server0, int id_socket)
+{
+	idSocket = id_socket;	
+	client1_server0 = client1Server0;
+	theGSM3ShieldV1ModemCore.openCommand(this,BEGINWRITESOCKET);
+	beginWriteSocketContinue();
+}
+
+//Write socket first chain continue function.
+void GSM3ShieldV1MultiClientProvider::beginWriteSocketContinue()
+{
+	bool resp;
+	// 1: Send AT+QISRVC
+	// 2: Send AT+QISEND
+	// 3: wait for > and Write text
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		// AT+QISRVC
+		theGSM3ShieldV1ModemCore.genericCommand_rq(_command_MultiQISRVC, false);
+		if (client1_server0) 
+			theGSM3ShieldV1ModemCore.print('1');
+		else 
+			theGSM3ShieldV1ModemCore.print('2');
+		theGSM3ShieldV1ModemCore.print('\r');
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+    case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			// Response received
+			if(resp)
+			{
+				// AT+QISEND
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QISEND="), false);
+				theGSM3ShieldV1ModemCore.print(idSocket);
+				theGSM3ShieldV1ModemCore.print('\r');
+				theGSM3ShieldV1ModemCore.setCommandCounter(3);
+			}
+			else
+			{
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+			}
+		}	
+		break;
+	case 3:
+		char aux[2];
+		aux[0]='>';
+		aux[1]=0;
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp, aux))
+		{
+			if(resp)
+			{
+				// Received ">"
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			}
+			else
+			{
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+			}
+		}
+		break;
+	}
+}
+
+//Write socket next chain function.
+void GSM3ShieldV1MultiClientProvider::writeSocket(const char* buf)
+{
+	theGSM3ShieldV1ModemCore.print(buf);
+}
+
+//Write socket character function.
+void GSM3ShieldV1MultiClientProvider::writeSocket(char c)
+{
+	theGSM3ShieldV1ModemCore.print(c);
+}
+
+//Write socket last chain main function.
+void GSM3ShieldV1MultiClientProvider::endWriteSocket()
+{		
+	theGSM3ShieldV1ModemCore.openCommand(this,ENDWRITESOCKET);
+	endWriteSocketContinue();
+}
+
+//Write socket last chain continue function.
+void GSM3ShieldV1MultiClientProvider::endWriteSocketContinue()
+{
+	bool resp;
+	// 1: Write text (ctrl-Z)
+	// 2: Wait for OK
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		theGSM3ShieldV1ModemCore.write(26); // Ctrl-Z
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			// OK received
+			if (resp) theGSM3ShieldV1ModemCore.closeCommand(1);
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+		break;
+	}
+}
+
+//Available socket main function.
+int GSM3ShieldV1MultiClientProvider::availableSocket(bool client1Server0, int id_socket)
+{
+	if(flagReadingSocket==1)
+	{
+		theGSM3ShieldV1ModemCore.setCommandError(1);
+		return 1;
+	}
+	client1_server0 = client1Server0;
+	idSocket = id_socket;	
+	theGSM3ShieldV1ModemCore.openCommand(this,AVAILABLESOCKET);
+	availableSocketContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Available socket continue function.
+void GSM3ShieldV1MultiClientProvider::availableSocketContinue()
+{
+	bool resp;
+	// 1: AT+QIRD
+	// 2: Wait for OK and Next necessary AT+QIRD
+
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QIRD=0,"),false);
+		if (client1_server0) 
+			theGSM3ShieldV1ModemCore.print('1');
+		else 
+			theGSM3ShieldV1ModemCore.print('2');
+		theGSM3ShieldV1ModemCore.print(',');
+		theGSM3ShieldV1ModemCore.print(idSocket);
+		theGSM3ShieldV1ModemCore.print(",1500");
+		// theGSM3ShieldV1ModemCore.print(",120");
+		theGSM3ShieldV1ModemCore.print('\r');
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(parseQIRD_head(resp))
+		{
+			if (!resp)
+			{
+				theGSM3ShieldV1ModemCore.closeCommand(4);
+			}
+			else 
+			{
+				flagReadingSocket=1;
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			}
+		}
+		else 
+		{
+			theGSM3ShieldV1ModemCore.closeCommand(3);	
+		}
+		break;
+	}
+}
+	
+//Read Socket Parse head.
+bool GSM3ShieldV1MultiClientProvider::parseQIRD_head(bool& rsp)
+{
+	char _qird [8];
+	prepareAuxLocate(PSTR("+QIRD:"), _qird);
+	fullBufferSocket = (theGSM3ShieldV1ModemCore.theBuffer().availableBytes()<3);
+	if(theGSM3ShieldV1ModemCore.theBuffer().locate(_qird)) 
+	{		
+		theGSM3ShieldV1ModemCore.theBuffer().chopUntil(_qird, true);
+		// Saving more memory, reuse _qird
+		_qird[0]='\n';
+		_qird[1]=0;
+		theGSM3ShieldV1ModemCore.theBuffer().chopUntil(_qird, true);
+		rsp = true;			
+		return true;
+	}
+	else if(theGSM3ShieldV1ModemCore.theBuffer().locate("OK")) 
+	{
+		rsp = false;
+		return true;
+	}
+	else
+	{
+		rsp = false;
+		return false;
+	}
+}
+/*		
+//Read socket main function.
+int GSM3ShieldV1MultiClientProvider::readSocket()
+{
+	char charSocket;
+	charSocket = theGSM3ShieldV1ModemCore.theBuffer().read(); 
+	//Case buffer not full
+	if (!fullBufferSocket)
+	{	
+		//The last part of the buffer after data is CRLFOKCRLF
+		if (theGSM3ShieldV1ModemCore.theBuffer().availableBytes()==125)
+		{
+			//Start again availableSocket function.
+			flagReadingSocket=0;
+			theGSM3ShieldV1ModemCore.openCommand(this,AVAILABLESOCKET);
+			availableSocketContinue();					
+		}
+	}
+	else if (theGSM3ShieldV1ModemCore.theBuffer().availableBytes()==127)
+	{
+		// The buffer is full, no more action is possible until we have read()
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		flagReadingSocket = 1;
+		theGSM3ShieldV1ModemCore.openCommand(this,XON);
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+		//A small delay to assure data received after xon.
+		delay(10);
+	}
+	//To distinguish the case no more available data in socket.			
+	if (ready()==1)	
+		return charSocket;
+	else 
+		return 0;
+}	
+*/
+int GSM3ShieldV1MultiClientProvider::readSocket()
+{
+	char charSocket;
+	
+	if(theGSM3ShieldV1ModemCore.theBuffer().availableBytes()==0)
+	{
+		Serial.println();Serial.println("*");
+		return 0;
+	}
+		
+	charSocket = theGSM3ShieldV1ModemCore.theBuffer().read(); 
+	//Case buffer not full
+	if (!fullBufferSocket)
+	{	
+		//The last part of the buffer after data is CRLFOKCRLF
+		if (theGSM3ShieldV1ModemCore.theBuffer().availableBytes()==125)
+		{
+			//Start again availableSocket function.
+			flagReadingSocket=0;
+			theGSM3ShieldV1ModemCore.openCommand(this,AVAILABLESOCKET);
+			availableSocketContinue();					
+		}
+	}
+	else if (theGSM3ShieldV1ModemCore.theBuffer().availableBytes()>=100)
+	{
+		// The buffer was full, we have to let the data flow again
+		// theGSM3ShieldV1ModemCore.theBuffer().flush();
+		flagReadingSocket = 1;
+		theGSM3ShieldV1ModemCore.openCommand(this,XON);
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+		//A small delay to assure data received after xon.
+		delay(100);
+		if(theGSM3ShieldV1ModemCore.theBuffer().availableBytes() >=6)
+			fullBufferSocket=false;
+	}
+
+	return charSocket;
+
+}
+
+//Read socket main function.
+int GSM3ShieldV1MultiClientProvider::peekSocket()
+{
+	return theGSM3ShieldV1ModemCore.theBuffer().peek(0); 
+}
+
+
+//Flush SMS main function.
+void GSM3ShieldV1MultiClientProvider::flushSocket()
+{
+	flagReadingSocket=0;
+	theGSM3ShieldV1ModemCore.openCommand(this,FLUSHSOCKET);
+	flushSocketContinue();
+}
+
+//Send SMS continue function.
+void GSM3ShieldV1MultiClientProvider::flushSocketContinue()
+{
+	bool resp;
+	// 1: Deleting SMS
+	// 2: wait for OK
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:
+		//DEBUG
+		//Serial.println("Flushing Socket.");	
+			theGSM3ShieldV1ModemCore.theBuffer().flush();
+			if (fullBufferSocket) 
+				{
+					//Serial.println("Buffer flushed.");
+					theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+				}
+			else 
+				{
+					//Serial.println("Socket flushed completely.");
+					theGSM3ShieldV1ModemCore.closeCommand(1);
+				}
+		break;
+	}
+}
+
+//URC recognize.
+// Momentarily, we will not recognize "closes" in client mode
+bool GSM3ShieldV1MultiClientProvider::recognizeUnsolicitedEvent(byte oldTail)
+{
+	return false;
+}
+
+int GSM3ShieldV1MultiClientProvider::getSocket(int socket)
+{
+	if(socket==-1)
+	{
+		int i;
+		for(i=minSocket(); i<=maxSocket(); i++)
+		{
+			if (!(sockets&(0x0001<<i)))
+			{
+				sockets|=((0x0001)<<i);
+				return i;
+			}	
+		}
+	}
+	else
+	{
+		if (!(sockets&(0x0001<<socket)))
+		{
+			sockets|=((0x0001)<<socket);
+			return socket;
+		}	
+	}
+	return -1;
+}
+
+void GSM3ShieldV1MultiClientProvider::releaseSocket(int socket)
+{
+	if (sockets&((0x0001)<<socket))
+		sockets^=((0x0001)<<socket);
+}
+
+bool GSM3ShieldV1MultiClientProvider::getStatusSocketClient(uint8_t socket)
+{
+	if(socket>8)
+		return 0;
+	if(sockets&(0x0001<<socket))
+		return 1;
+	else
+		return 0;
+};
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiClientProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiClientProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiClientProvider.h	(revision 136)
@@ -0,0 +1,202 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_SHIELDV1CLIENTPROVIDER__
+#define __GSM3_SHIELDV1CLIENTPROVIDER__
+
+#include <GSM3MobileClientProvider.h>
+#include <GSM3ShieldV1BaseProvider.h>
+
+class GSM3ShieldV1MultiClientProvider : public GSM3MobileClientProvider,  public GSM3ShieldV1BaseProvider
+{
+	private:
+	
+		int remotePort;		// Current operation remote port
+		int idSocket; 		// Remote ID socket
+		IPAddress remoteIP; // Remote IP address
+		
+		uint16_t sockets;
+
+		/** Continue to connect TCP client function
+		 */
+		void connectTCPClientContinue();
+		
+		/** Continue to disconnect TCP client function
+		 */
+		void disconnectTCPContinue();
+		
+		/** Continue to begin socket for write function
+		 */
+		void beginWriteSocketContinue();
+		
+		/** Continue to end write socket function
+		 */
+		void endWriteSocketContinue();
+		
+		/** Continue to available socket function
+		 */
+		void availableSocketContinue();
+		
+		/** Continue to flush socket function
+		 */
+		void flushSocketContinue();
+		
+		// GATHER!
+		bool flagReadingSocket; //In case socket data being read, update fullBufferSocket in the next buffer.
+		bool fullBufferSocket;	//To detect if the socket data being read needs another buffer.
+		bool client1_server0;	//1 Client, 0 Server.
+		
+		/** Parse QIRD response
+			@param rsp		Returns true if expected response exists
+			@return true if command executed correctly
+		 */
+		bool parseQIRD_head(bool& rsp); 
+
+	public:
+	
+		/** Constructor */
+		GSM3ShieldV1MultiClientProvider();
+		
+		/** Minimum socket
+			@return 0
+		 */
+		int minSocket(){return 0;};
+		
+		/** Maximum socket
+			@return 5
+		 */
+		int maxSocket(){return 5;};
+		
+		/** Connect to a remote TCP server
+			@param server		String with IP or server name
+			@param port 		Remote port number
+			@param id_socket	Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		*/
+		int connectTCPClient(const char* server, int port, int id_socket);
+		
+		/** Connect to a remote TCP server
+			@param add			Remote IP address
+			@param port 		Remote port number
+			@param id_socket	Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		*/
+		int connectTCPClient(IPAddress add, int port, int id_socket);
+
+		/** Begin writing through a socket
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		*/
+		void beginWriteSocket(bool client1Server0, int id_socket);
+
+		/** Write through a socket. MUST go after beginWriteSocket()
+			@param buf			characters to be written (final 0 will not be written)
+		*/
+		void writeSocket(const char* buf);
+
+		/** Write through a socket. MUST go after beginWriteSocket()
+			@param c character to be written
+		*/		
+		void writeSocket(char c);
+		
+		/** Finish current writing
+		*/	
+		void endWriteSocket();
+		
+		/** Check if there are data to be read in socket.
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Local socket number
+			@return 0 if command running, 1 if there are data available, 4 if no data, otherwise error
+		*/
+		int availableSocket(bool client, int id_socket); // With "available" and "readSocket" ask the modem for 1500 bytes.
+		
+		/** Read a character from socket
+			@return socket
+		 */
+		int readSocket(); //If Read() gets to the end of the QIRD response, execute again QIRD SYNCHRONOUSLY 
+		
+		/** Flush socket
+		 */
+		void flushSocket();
+		
+		/** Get a character but will not advance the buffer head
+			@return character
+		 */
+		int peekSocket();
+
+		/** Close a socket
+			@param client1Server0	1 if modem acts as client, 0 if acts as server
+			@param id_socket		Local socket number
+			@return 0 if command running, 1 if success, otherwise error
+		*/
+		int disconnectTCP(bool client1Server0, int id_socket);
+		
+		/** Recognize unsolicited event
+			@param from		
+			@return true if successful
+		*/		
+		bool recognizeUnsolicitedEvent(byte from);
+	
+		/** Manages modem response
+			@param from 		Initial byte of buffer
+			@param to 			Final byte of buffer
+		 */
+		void manageResponse(byte from, byte to);
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		*/
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+		
+		/** Get client socket
+			@param socket		
+			@return	socket
+		 */
+		int getSocket(int socket=-1);
+		
+		/** Release socket
+			@param socket		Socket for release
+		 */
+		void releaseSocket(int socket);
+		
+		/** Get socket client status
+			@param socket		Socket
+			@return socket client status
+		 */
+		bool getStatusSocketClient(uint8_t socket);
+		
+};
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiServerProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiServerProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiServerProvider.cpp	(revision 136)
@@ -0,0 +1,357 @@
+#include <GSM3ShieldV1MultiServerProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+#include <Arduino.h>
+
+#define __NCLIENTS_MAX__ 3
+
+const char _command_QILOCIP[] PROGMEM = "AT+QILOCIP";
+
+GSM3ShieldV1MultiServerProvider::GSM3ShieldV1MultiServerProvider()
+{
+	theGSM3MobileServerProvider=this;
+	socketsAsServer=0;
+	socketsAccepted=0;
+	theGSM3ShieldV1ModemCore.registerUMProvider(this);
+};
+
+//Response management.
+void GSM3ShieldV1MultiServerProvider::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+		case NONE:
+			theGSM3ShieldV1ModemCore.gss.cb.deleteToTheEnd(from);
+			break;
+		case CONNECTSERVER:
+			connectTCPServerContinue();
+			break;	
+		case GETIP:
+			getIPContinue();
+			break;
+	}
+}
+
+//Connect Server main function.
+int GSM3ShieldV1MultiServerProvider::connectTCPServer(int port)
+{
+	// We forget about LocalIP as it has no real use, the modem does whatever it likes
+	theGSM3ShieldV1ModemCore.setPort(port);			
+	theGSM3ShieldV1ModemCore.openCommand(this,CONNECTSERVER);
+	connectTCPServerContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Connect Server continue function.
+void GSM3ShieldV1MultiServerProvider::connectTCPServerContinue()
+{
+
+	bool resp;
+	// 1: Read Local IP "AT+QILOCIP"
+	// 2: Waiting for IP and Set local port "AT+QILPORT"
+	// 3: Waiting for QILPOR OK andConfigure as server "AT+QISERVER"
+	// 4: Wait for SERVER OK
+
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		//"AT+QILOCIP."
+		theGSM3ShieldV1ModemCore.genericCommand_rq(_command_QILOCIP);
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		//Not IP storing but the command is necessary.
+		//if(parseQILOCIP_rsp(local_IP, local_IP_Length, resp))
+		// This awful trick saves some RAM bytes
+		char aux[3];
+		aux[0]='\r';aux[1]='\n';aux[2]=0;
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp, aux))
+	    {
+			//Response received
+			if(resp)
+			{
+				// Great. Go for the next step
+				// AT+QILPORT
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QILPORT=\"TCP\","),false);
+				theGSM3ShieldV1ModemCore.print(	theGSM3ShieldV1ModemCore.getPort());
+				theGSM3ShieldV1ModemCore.print('\r');
+				theGSM3ShieldV1ModemCore.setCommandCounter(3);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;	
+	case 3:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			// Response received
+			if(resp)
+			{
+				// OK received
+				// Great. Go for the next step
+				// AT+QISERVER
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QISERVER=0,"),false);
+				theGSM3ShieldV1ModemCore.print(__NCLIENTS_MAX__);
+				theGSM3ShieldV1ModemCore.print('\r');
+				theGSM3ShieldV1ModemCore.setCommandCounter(4);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;	
+	case 4:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			// Response received
+			// OK received, kathapoon, chessespoon
+			if (resp) theGSM3ShieldV1ModemCore.closeCommand(1);
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}		
+		break;	
+	}
+}
+
+//QILOCIP parse.
+bool GSM3ShieldV1MultiServerProvider::parseQILOCIP_rsp(char* LocalIP, int LocalIPlength, bool& rsp)
+{
+	if (!(theGSM3ShieldV1ModemCore.theBuffer().extractSubstring("\r\n","\r\n", LocalIP, LocalIPlength)))
+		rsp = false;
+	else 
+		rsp = true;
+	return true;
+}
+
+//Get IP main function.
+int GSM3ShieldV1MultiServerProvider::getIP(char* LocalIP, int LocalIPlength)
+{
+	theGSM3ShieldV1ModemCore.setPhoneNumber(LocalIP);
+	theGSM3ShieldV1ModemCore.setPort(LocalIPlength);
+	theGSM3ShieldV1ModemCore.openCommand(this,GETIP);
+	getIPContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+void GSM3ShieldV1MultiServerProvider::getIPContinue()
+{
+
+	bool resp;
+	// 1: Read Local IP "AT+QILOCIP"
+	// 2: Waiting for IP.
+
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		//AT+QILOCIP
+		theGSM3ShieldV1ModemCore.genericCommand_rq(_command_QILOCIP);
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(parseQILOCIP_rsp(theGSM3ShieldV1ModemCore.getPhoneNumber(), theGSM3ShieldV1ModemCore.getPort(), resp))
+	    {
+			if (resp) 
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			else 
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;	
+	}
+}
+
+bool GSM3ShieldV1MultiServerProvider::getSocketAsServerModemStatus(int s)
+{
+	if (socketsAccepted&(0x0001<<s)) 
+		return true;
+	else return false;
+}
+
+
+//URC recognize.
+bool GSM3ShieldV1MultiServerProvider::recognizeUnsolicitedEvent(byte oldTail)
+{
+
+	int nlength;
+	char auxLocate [15];
+	
+	
+	//REMOTE SOCKET CLOSED.
+	prepareAuxLocate(PSTR("0, CLOSED\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		releaseSocket(0);
+		socketsAccepted &= ~(0x0001);
+		//Serial.println("JCR_DB REMOTE CLOSED");
+	}
+	
+	//REMOTE SOCKET CLOSED.
+	
+	prepareAuxLocate(PSTR("1, CLOSED\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		releaseSocket(1);
+		socketsAccepted &= ~(0x0002);
+	}
+	
+	//REMOTE SOCKET CLOSED.
+	prepareAuxLocate(PSTR("2, CLOSED\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		releaseSocket(2);
+		socketsAccepted &= ~(0x0004);
+	}
+	
+	//REMOTE SOCKET CLOSED.
+	prepareAuxLocate(PSTR("3, CLOSED\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		releaseSocket(3);
+		socketsAccepted &= ~(0x0008);
+	}
+	
+	//REMOTE SOCKET CLOSED.
+	prepareAuxLocate(PSTR("4, CLOSED\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		releaseSocket(4);
+		socketsAccepted &= ~(0x0010);
+	}
+	
+	//REMOTE SOCKET CLOSED.
+	prepareAuxLocate(PSTR("5, CLOSED\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		releaseSocket(5);
+		socketsAccepted &= ~(0x0020);
+	}
+	
+	//REMOTE SOCKET CLOSED.
+	prepareAuxLocate(PSTR("6, CLOSED\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		releaseSocket(6);
+		socketsAccepted &= ~(0x0040);
+	}
+	
+	//REMOTE SOCKET CLOSED.
+	prepareAuxLocate(PSTR("7, CLOSED\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		releaseSocket(7);
+		socketsAccepted &= ~(0x0080);
+	}
+	
+	//REMOTE SOCKET ACCEPTED.
+	prepareAuxLocate(PSTR("0, REMOTE IP"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.gss.cb.flush();
+		socketsAccepted |= (0x0001);
+		return true;
+	}
+	
+	//REMOTE SOCKET ACCEPTED.
+	prepareAuxLocate(PSTR("1, REMOTE IP"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.gss.cb.flush();
+		socketsAccepted |= (0x0002);
+		return true;
+	}
+	
+	//REMOTE SOCKET ACCEPTED.
+	prepareAuxLocate(PSTR("2, REMOTE IP"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.gss.cb.flush();
+		socketsAccepted |= (0x0004);
+		return true;
+	}
+	
+	//REMOTE SOCKET ACCEPTED.
+	prepareAuxLocate(PSTR("3, REMOTE IP"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.gss.cb.flush();
+		socketsAccepted |= (0x0008);
+		return true;
+	}
+	
+	//REMOTE SOCKET ACCEPTED.
+	prepareAuxLocate(PSTR("4, REMOTE IP"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.gss.cb.flush();
+		socketsAccepted |= (0x0010);
+		return true;
+	}
+	
+	//REMOTE SOCKET ACCEPTED.
+	prepareAuxLocate(PSTR("5, REMOTE IP"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.gss.cb.flush();
+		socketsAccepted |= (0x0020);
+		return true;
+	}
+	
+	//REMOTE SOCKET ACCEPTED.
+	prepareAuxLocate(PSTR("6, REMOTE IP"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.gss.cb.flush();
+		socketsAccepted |= (0x0040);
+		return true;
+	}
+	
+	//REMOTE SOCKET ACCEPTED.
+	prepareAuxLocate(PSTR("7, REMOTE IP"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.gss.cb.flush();
+		socketsAccepted |= (0x0080);
+		return true;
+	}
+	
+	
+	return false;
+}
+
+bool GSM3ShieldV1MultiServerProvider::getStatusSocketAsServer(uint8_t socket)
+{
+	if(socketsAsServer&(0x0001<<socket))
+		return 1;
+	else
+		return 0;
+};
+
+void GSM3ShieldV1MultiServerProvider::releaseSocket(int socket)
+{
+	if (socketsAsServer&((0x0001)<<socket))
+		socketsAsServer^=((0x0001)<<socket);
+}
+
+int GSM3ShieldV1MultiServerProvider::getNewOccupiedSocketAsServer()
+{
+	int i;
+	ready();
+	for(i=minSocketAsServer(); i<=maxSocketAsServer(); i++)
+	{
+		if ((!(socketsAsServer&(0x0001<<i))) && getSocketAsServerModemStatus(i))
+		{
+			socketsAsServer|=((0x0001)<<i);	
+			return i;
+		}
+	}
+	// No new occupied
+	return -1;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiServerProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiServerProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1MultiServerProvider.h	(revision 136)
@@ -0,0 +1,136 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_SHIELDV1SERVERPROVIDER__
+#define __GSM3_SHIELDV1SERVERPROVIDER__
+
+#include <GSM3MobileServerProvider.h>
+#include <GSM3ShieldV1BaseProvider.h>
+
+class GSM3ShieldV1MultiServerProvider : public GSM3MobileServerProvider,  public GSM3ShieldV1BaseProvider
+{
+	private:
+		
+		// Used sockets
+		uint8_t socketsAsServer;
+		uint8_t socketsAccepted;
+
+		/** Continue to connect TCP server function
+		 */
+		void connectTCPServerContinue();
+
+		/** Continue to get IP function
+		 */
+		void getIPContinue();
+		
+		/** Release socket
+			@param socket		Socket
+		 */
+		void releaseSocket(int socket);
+		
+		/** Parse QILOCIP response
+			@param LocalIP			Buffer for save local IP address
+			@param LocalIPlength	Buffer size
+			@param rsp				Returns if expected response exists
+			@return true if command executed correctly
+		 */
+		bool parseQILOCIP_rsp(char* LocalIP, int LocalIPlength, bool& rsp);
+		
+	public:
+	
+		/** Constructor */
+		GSM3ShieldV1MultiServerProvider();
+		
+		/** minSocketAsServer
+			@return 0
+		 */
+		int minSocketAsServer(){return 0;};
+		
+		/** maxSocketAsServer
+			@return 0
+		 */
+		int maxSocketAsServer(){return 4;};
+		
+		/** Get modem status
+			@param s
+			@return modem status (true if connected)
+		 */
+		bool getSocketAsServerModemStatus(int s);
+		
+		/** Get new occupied socket as server
+			@return command error if exists
+		 */
+		int getNewOccupiedSocketAsServer();
+
+		/** Connect server to TCP port
+			@param port			TCP port
+			@return	command error if exists
+		 */
+		int connectTCPServer(int port);
+		
+		/** Get server IP address
+			@param LocalIP			Buffer for copy IP address
+			@param LocalIPlength	Length of buffer
+			@return command error if exists
+		 */
+		int getIP(char* LocalIP, int LocalIPlength);
+		
+//		int disconnectTCP(bool client1Server0, int id_socket);
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+		
+		/** Get socket status as server
+			@param socket		Socket to get status
+			@return socket status
+		 */
+		bool getStatusSocketAsServer(uint8_t socket);
+		
+		/** Manages modem response
+			@param from 		Initial byte of buffer
+			@param to 			Final byte of buffer
+		 */
+		void manageResponse(byte from, byte to);
+		
+		/** Recognize unsolicited event
+			@param oldTail		
+			@return true if successful
+		 */		
+		bool recognizeUnsolicitedEvent(byte oldTail);
+
+	
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1PinManagement.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1PinManagement.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1PinManagement.cpp	(revision 136)
@@ -0,0 +1,201 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+
+#include <GSM3ShieldV1PinManagement.h>
+
+// constructor
+GSM3ShieldV1PinManagement::GSM3ShieldV1PinManagement()
+{
+};
+
+// reset the modem for direct access
+void GSM3ShieldV1PinManagement::begin()
+{
+	// reset hardware
+	gsm.HWrestart();
+
+	pin_used = false;
+	
+	// check modem response
+	modemAccess.writeModemCommand("AT", 1000);
+	modemAccess.writeModemCommand("ATE0", 1000);
+}
+
+/*
+  Check PIN status
+*/
+int GSM3ShieldV1PinManagement::isPIN()
+{
+  String res = modemAccess.writeModemCommand("AT+CPIN?",1000);
+  // Check response
+  char res_to_compare[res.length()];
+  res.toCharArray(res_to_compare, res.length());
+  if(strstr(res_to_compare, "READY") != NULL)
+    return 0;
+  else if(strstr(res_to_compare, "SIM PIN") != NULL)
+    return 1; 
+  else if(strstr(res_to_compare, "SIM PUK") != NULL)
+    return -1;
+  else
+    return -2;
+}
+
+/*
+  Check PIN code
+*/
+int GSM3ShieldV1PinManagement::checkPIN(String pin)
+{
+  String res = modemAccess.writeModemCommand("AT+CPIN=" + pin,1000);
+  // check response
+  char res_to_compare[res.length()];
+  res.toCharArray(res_to_compare, res.length());
+  if(strstr(res_to_compare, "OK") == NULL)
+    return -1;
+  else
+    return 0;
+}
+
+/*
+  Check PUK code
+*/
+int GSM3ShieldV1PinManagement::checkPUK(String puk, String pin)
+{
+  String res = modemAccess.writeModemCommand("AT+CPIN=\"" + puk + "\",\"" + pin + "\"",1000);
+  // check response
+  char res_to_compare[res.length()];
+  res.toCharArray(res_to_compare, res.length());
+  if(strstr(res_to_compare, "OK") == NULL)
+    return -1;
+  else
+    return 0;
+}
+
+/*
+  Change PIN code
+*/
+void GSM3ShieldV1PinManagement::changePIN(String old, String pin)
+{
+  String res = modemAccess.writeModemCommand("AT+CPWD=\"SC\",\"" + old + "\",\"" + pin + "\"",2000);
+  Serial.println(res);
+  // check response
+  char res_to_compare[res.length()];
+  res.toCharArray(res_to_compare, res.length());
+  if(strstr(res_to_compare, "OK") != NULL)
+    Serial.println("Pin changed succesfully.");
+  else
+    Serial.println("ERROR");
+}
+
+/*
+  Switch PIN status
+*/
+void GSM3ShieldV1PinManagement::switchPIN(String pin)
+{
+  String res = modemAccess.writeModemCommand("AT+CLCK=\"SC\",2",1000);
+  // check response
+  char res_to_compare[res.length()];
+  res.toCharArray(res_to_compare, res.length());
+  if(strstr(res_to_compare, "0") != NULL)
+  {
+    res = modemAccess.writeModemCommand("AT+CLCK=\"SC\",1,\"" + pin + "\"",1000);
+    // check response
+    char res_to_compare[res.length()];
+    res.toCharArray(res_to_compare, res.length());
+    if(strstr(res_to_compare, "OK") == NULL)
+    {
+      Serial.println("ERROR");
+      pin_used = false;
+    }
+    else
+    {
+      Serial.println("OK. PIN lock on.");
+      pin_used = true;
+    }
+  }
+  else if(strstr(res_to_compare, "1") != NULL)
+  {
+    res = modemAccess.writeModemCommand("AT+CLCK=\"SC\",0,\"" + pin + "\"",1000);
+    // check response
+    char res_to_compare[res.length()];
+    res.toCharArray(res_to_compare, res.length());
+    if(strstr(res_to_compare, "OK") == NULL)
+    {
+      Serial.println("ERROR");
+      pin_used = true;
+    }
+    else
+    {
+      Serial.println("OK. PIN lock off.");
+      pin_used = false;
+    }
+  }
+  else
+  {
+    Serial.println("ERROR");
+  }
+}
+
+/*
+  Check registrer
+*/
+int GSM3ShieldV1PinManagement::checkReg()
+{
+  delay(5000);
+  String res = modemAccess.writeModemCommand("AT+CREG?",1000);
+  // check response
+  char res_to_compare[res.length()];
+  res.toCharArray(res_to_compare, res.length());
+  if(strstr(res_to_compare, "1") != NULL)
+    return 0;
+  else if(strstr(res_to_compare, "5") != NULL)
+    return 1;
+  else
+    return -1; 
+}
+
+/*
+  Return if PIN lock is used
+*/
+bool GSM3ShieldV1PinManagement::getPINUsed()
+{
+	return pin_used;
+}
+
+/*
+  Set if PIN lock is used
+*/
+void GSM3ShieldV1PinManagement::setPINUsed(bool used)
+{
+	pin_used = used;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1PinManagement.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1PinManagement.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1PinManagement.h	(revision 136)
@@ -0,0 +1,103 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3SHIELDV1PINMANAGEMENT_
+#define _GSM3SHIELDV1PINMANAGEMENT_
+
+#include <GSM3ShieldV1AccessProvider.h>
+#include <GSM3ShieldV1DirectModemProvider.h>
+
+class GSM3ShieldV1PinManagement
+{
+
+	private:
+	
+		GSM3ShieldV1AccessProvider gsm; // GSM access required for network register with PIN code     
+		GSM3ShieldV1DirectModemProvider modemAccess; 
+		bool pin_used; // determines if pin lock is activated 
+		
+	public:
+
+		/** Constructor */
+		GSM3ShieldV1PinManagement();
+		
+		/** Check modem response and restart it
+		 */
+		void begin();
+	
+		/** Check if PIN lock or PUK lock is activated
+			@return 0 if PIN lock is off, 1 if PIN lock is on, -1 if PUK lock is on, -2 if error exists
+		 */
+		int isPIN();
+		
+		/** Check if PIN code is correct and valid
+			@param pin			PIN code
+			@return 0 if is correct, -1 if is incorrect
+		 */
+		int checkPIN(String pin);
+		
+		/** Check if PUK code is correct and establish new PIN code
+			@param puk			PUK code
+			@param pin			New PIN code
+			@return 0 if successful, otherwise return -1
+		 */
+		int checkPUK(String puk, String pin);
+		
+		/** Change PIN code
+			@param old			Old PIN code
+			@param pin			New PIN code
+		 */
+		void changePIN(String old, String pin);
+		
+		/** Change PIN lock status
+			@param pin			PIN code
+		 */
+		void switchPIN(String pin);
+		
+		/** Check if modem was registered in GSM/GPRS network
+			@return 0 if modem was registered, 1 if modem was registered in roaming, -1 if error exists
+		 */
+		int checkReg();
+		
+		/** Return if PIN lock is used
+			@return true if PIN lock is used, otherwise, return false
+		 */
+		bool getPINUsed();
+		
+		/** Set PIN lock status
+			@param used			New PIN lock status
+		 */
+		void setPINUsed(bool used);
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1SMSProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1SMSProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1SMSProvider.cpp	(revision 136)
@@ -0,0 +1,294 @@
+#include <GSM3ShieldV1SMSProvider.h>
+#include <Arduino.h>
+	
+GSM3ShieldV1SMSProvider::GSM3ShieldV1SMSProvider()
+{
+	theGSM3SMSProvider=this;
+};
+
+//Send SMS begin function.
+int GSM3ShieldV1SMSProvider::beginSMS(const char* to)
+{
+	if((theGSM3ShieldV1ModemCore.getStatus() != GSM_READY)&&(theGSM3ShieldV1ModemCore.getStatus() != GPRS_READY))
+	  return 2;
+
+	theGSM3ShieldV1ModemCore.setPhoneNumber((char*)to);
+	theGSM3ShieldV1ModemCore.openCommand(this,BEGINSMS);
+	beginSMSContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Send SMS continue function.
+void GSM3ShieldV1SMSProvider::beginSMSContinue()
+{
+	bool resp;
+	// 1: Send AT
+	// 2: wait for > and write text
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+CMGS=\""), false);
+		theGSM3ShieldV1ModemCore.print(theGSM3ShieldV1ModemCore.getPhoneNumber());
+		theGSM3ShieldV1ModemCore.print("\"\r");
+		break;
+	case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp, ">"))
+		{
+			if (resp) theGSM3ShieldV1ModemCore.closeCommand(1);
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+		break;
+	}
+}
+
+//Send SMS write function.
+void GSM3ShieldV1SMSProvider::writeSMS(char c)
+{
+	theGSM3ShieldV1ModemCore.write(c);
+}
+
+//Send SMS begin function.
+int GSM3ShieldV1SMSProvider::endSMS()
+{
+	theGSM3ShieldV1ModemCore.openCommand(this,ENDSMS);
+	endSMSContinue();
+	while(ready()==0) delay(100);
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Send SMS continue function.
+void GSM3ShieldV1SMSProvider::endSMSContinue()
+{
+	bool resp;
+	// 1: Send #26
+	// 2: wait for OK
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		theGSM3ShieldV1ModemCore.write(26);
+		theGSM3ShieldV1ModemCore.print("\r");
+		break;
+	case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			if (resp) 
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			else 
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+		break;
+	}
+}
+
+//Available SMS main function.
+int GSM3ShieldV1SMSProvider::availableSMS()
+{
+	flagReadingSMS = 0;
+	theGSM3ShieldV1ModemCore.openCommand(this,AVAILABLESMS);
+	availableSMSContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Available SMS continue function.
+void GSM3ShieldV1SMSProvider::availableSMSContinue()
+{
+	// 1:  AT+CMGL="REC UNREAD",1
+	// 2: Receive +CMGL: _id_ ... READ","_numero_" ... \n_mensaje_\nOK
+	// 3: Send AT+CMGD= _id_
+	// 4: Receive OK
+	// 5: Remaining SMS text in case full buffer.
+	// This implementation really does not care much if the modem aswers trash to CMGL
+	bool resp;
+	//int msglength_aux;
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:	
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+CMGL=\"REC UNREAD\",1"));
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(parseCMGL_available(resp))
+			{
+				if (!resp) theGSM3ShieldV1ModemCore.closeCommand(4);
+				else theGSM3ShieldV1ModemCore.closeCommand(1);
+			}
+		break;
+	}
+	  
+}	
+		
+//SMS available parse.
+bool GSM3ShieldV1SMSProvider::parseCMGL_available(bool& rsp)
+{
+	fullBufferSMS = (theGSM3ShieldV1ModemCore.theBuffer().availableBytes()<=4);
+	if (!(theGSM3ShieldV1ModemCore.theBuffer().chopUntil("+CMGL:", true)))
+		rsp = false;
+	else 
+		rsp = true;
+	idSMS=theGSM3ShieldV1ModemCore.theBuffer().readInt();
+
+	//If there are 2 SMS in buffer, response is ...CRLFCRLF+CMGL
+	twoSMSinBuffer = theGSM3ShieldV1ModemCore.theBuffer().locate("\r\n\r\n+");
+
+	checkSecondBuffer = 0;
+	
+	return true;
+}
+
+//remoteNumber SMS function.
+int GSM3ShieldV1SMSProvider::remoteSMSNumber(char* number, int nlength)
+{
+	theGSM3ShieldV1ModemCore.theBuffer().extractSubstring("READ\",\"", "\"", number, nlength);	
+	
+	return 1;
+}
+
+//remoteNumber SMS function.
+int GSM3ShieldV1SMSProvider::readSMS()
+{
+	char charSMS;
+	//First char.
+	if (!flagReadingSMS) 
+	{
+		flagReadingSMS = 1;
+		theGSM3ShieldV1ModemCore.theBuffer().chopUntil("\n", true);
+	}
+	charSMS = theGSM3ShieldV1ModemCore.theBuffer().read(); 
+	
+	//Second Buffer.
+	if (checkSecondBuffer)
+	{
+		checkSecondBuffer = 0;
+		twoSMSinBuffer = theGSM3ShieldV1ModemCore.theBuffer().locate("\r\n\r\n+");
+	}
+
+	//Case the last char in buffer.
+	if ((!twoSMSinBuffer)&&fullBufferSMS&&(theGSM3ShieldV1ModemCore.theBuffer().availableBytes()==127))
+	{
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		fullBufferSMS = 0;
+		checkSecondBuffer = 1;
+		theGSM3ShieldV1ModemCore.openCommand(this,XON);
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+		delay(10);
+		
+		return charSMS;
+	}
+	//Case two SMS in buffer
+	else if (twoSMSinBuffer)
+	{
+		if (theGSM3ShieldV1ModemCore.theBuffer().locate("\r\n\r\n+")) 
+		{
+					return charSMS;
+		}
+		else 
+		{
+			theGSM3ShieldV1ModemCore.theBuffer().flush();
+			theGSM3ShieldV1ModemCore.openCommand(this,XON);
+			theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+			delay(10);
+			return 0;
+		}
+	}
+	//Case 1 SMS and buffer not full
+	else if (!fullBufferSMS)
+	{
+		if (theGSM3ShieldV1ModemCore.theBuffer().locate("\r\n\r\nOK")) 
+		{
+			return charSMS;
+		}
+		else 
+		{
+			theGSM3ShieldV1ModemCore.theBuffer().flush();
+			theGSM3ShieldV1ModemCore.openCommand(this,XON);
+			theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+			delay(10);
+			return 0;
+		}
+	}
+	//Case to read all the chars in buffer to the end.
+	else 
+	{
+		return charSMS;		
+	}
+}	
+
+//Read socket main function.
+int GSM3ShieldV1SMSProvider::peekSMS()
+{
+	if (!flagReadingSMS) 
+	{
+		flagReadingSMS = 1;
+		theGSM3ShieldV1ModemCore.theBuffer().chopUntil("\n", true);
+	}
+
+	return theGSM3ShieldV1ModemCore.theBuffer().peek(0); 
+}
+	
+//Flush SMS main function.
+void GSM3ShieldV1SMSProvider::flushSMS()
+{
+
+	//With this, sms data can fill up to 2x128+5x128 bytes.
+	for (int aux = 0;aux<5;aux++)
+	{
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+		delay(10);
+	}
+		
+	theGSM3ShieldV1ModemCore.openCommand(this,FLUSHSMS);
+	flushSMSContinue();
+}
+
+//Send SMS continue function.
+void GSM3ShieldV1SMSProvider::flushSMSContinue()
+{
+	bool resp;
+	// 1: Deleting SMS
+	// 2: wait for OK
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+CMGD="), false);
+		theGSM3ShieldV1ModemCore.print(idSMS);
+		theGSM3ShieldV1ModemCore.print("\r");
+		break;
+	case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+			if (resp) theGSM3ShieldV1ModemCore.closeCommand(1);
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+		break;
+	}
+}
+
+void GSM3ShieldV1SMSProvider::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+/*		case XON:
+			if (flagReadingSocket) 
+				{
+//					flagReadingSocket = 0;
+					fullBufferSocket = (theGSM3ShieldV1ModemCore.theBuffer().availableBytes()<3);
+				}
+			else theGSM3ShieldV1ModemCore.openCommand(this,NONE);
+			break;
+*/		case NONE:
+			theGSM3ShieldV1ModemCore.gss.cb.deleteToTheEnd(from);
+			break;
+		case BEGINSMS:
+			beginSMSContinue();
+			break;
+		case ENDSMS:
+			endSMSContinue();
+			break;
+		case AVAILABLESMS:
+			availableSMSContinue();
+			break;
+		case FLUSHSMS:
+			flushSMSContinue();
+			break;
+	}
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1SMSProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1SMSProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1SMSProvider.h	(revision 136)
@@ -0,0 +1,130 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_SHIELDV1SMSPROVIDER__
+#define __GSM3_SHIELDV1SMSPROVIDER__
+
+#include <GSM3ShieldV1ModemCore.h>
+#include <GSM3MobileSMSProvider.h>
+#include <GSM3ShieldV1SMSProvider.h>
+
+
+class GSM3ShieldV1SMSProvider : public GSM3MobileSMSProvider, public GSM3ShieldV1BaseProvider
+{		
+	public:
+		GSM3ShieldV1SMSProvider();
+	
+		/** Manages modem response
+			@param from 		Initial byte of buffer
+			@param to 			Final byte of buffer
+		 */
+		void manageResponse(byte from, byte to);
+	
+		/** Begin a SMS to send it
+			@param to			Destination
+			@return error command if it exists
+		 */
+		inline int beginSMS(const char* to);
+		
+		/** Write a SMS character by character
+			@param c			Character
+		 */
+		inline void writeSMS(char c);
+		
+		/** End SMS
+			@return error command if it exists
+		 */
+		inline int endSMS();
+		
+		/** Check if SMS available and prepare it to be read
+			@return number of bytes in a received SMS
+		 */
+		int availableSMS();
+		
+		/** Read a byte but do not advance the buffer header (circular buffer)
+			@return character
+		 */
+		int peekSMS();
+		
+		/** Delete the SMS from Modem memory and proccess answer
+		 */
+		void flushSMS();
+		
+		/** Read sender number phone
+			@param number		Buffer for save number phone
+			@param nlength		Buffer length
+			@return 1 success, >1 error
+		 */
+		int remoteSMSNumber(char* number, int nlength); //Before reading the SMS, read the phone number.
+		
+		/** Read one char for SMS buffer (advance circular buffer)
+			@return character
+		 */
+		int readSMS();
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+
+	private:	
+	
+		int idSMS; // Id from current SMS being read.
+		bool flagReadingSMS; // To detect first SMS char if not yet reading.
+		bool fullBufferSMS; // To detect if the SMS being read needs another buffer. 
+		bool twoSMSinBuffer; // To detect if the buffer has more than 1 SMS.
+		bool checkSecondBuffer; // Pending to detect if the second buffer has more than 1 SMS.
+
+		/** Continue to begin SMS function
+		 */
+		void beginSMSContinue();
+		
+		/** Continue to end SMS function
+		 */
+		void endSMSContinue();
+		
+		/** Continue to available SMS function
+		 */
+		void availableSMSContinue();
+		
+		/** Continue to flush SMS function
+		 */
+		void flushSMSContinue();
+		
+		/** Parse CMGL response
+			@param rsp			Returns true if expected response exists
+			@return	true if command executed correctly
+		 */
+		bool parseCMGL_available(bool& rsp);
+};
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ScanNetworks.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ScanNetworks.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ScanNetworks.cpp	(revision 136)
@@ -0,0 +1,126 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+
+#include <GSM3ShieldV1ScanNetworks.h>
+
+GSM3ShieldV1ScanNetworks::GSM3ShieldV1ScanNetworks(bool trace): modem(trace)
+{	
+}
+
+GSM3_NetworkStatus_t GSM3ShieldV1ScanNetworks::begin()
+{
+	modem.begin();
+	modem.restartModem();
+	// check modem response
+	modem.writeModemCommand("AT", 1000);
+	modem.writeModemCommand("ATE0", 1000);
+	return IDLE;
+}
+
+String GSM3ShieldV1ScanNetworks::getCurrentCarrier()
+{
+	String modemResponse = modem.writeModemCommand("AT+COPS?", 2000);
+	
+	// Parse and check response
+	char res_to_split[modemResponse.length()];
+	modemResponse.toCharArray(res_to_split, modemResponse.length());
+	if(strstr(res_to_split,"ERROR") == NULL){
+		// Tokenizer
+		char *ptr_token;
+		ptr_token = strtok(res_to_split, "\"");
+		ptr_token = strtok(NULL, "\"");
+		String final_result = ptr_token;
+		return final_result;
+	}else{
+		return String(NULL);
+	}
+}
+
+String GSM3ShieldV1ScanNetworks::getSignalStrength()
+{
+	String modemResponse = modem.writeModemCommand("AT+CSQ", 2000);
+	char res_to_split[modemResponse.length()];
+	modemResponse.toCharArray(res_to_split, modemResponse.length());
+	if((strstr(res_to_split,"ERROR") == NULL) | (strstr(res_to_split,"99") == NULL)){
+		// Tokenizer
+		char *ptr_token;
+		ptr_token = strtok(res_to_split, ":");
+		ptr_token = strtok(NULL, ":");
+		ptr_token = strtok(ptr_token, ",");
+		String final_result = ptr_token;
+		final_result.trim();
+		return final_result;
+	}else{
+		return String(NULL);
+	}
+}
+
+String GSM3ShieldV1ScanNetworks::readNetworks()
+{
+	String modemResponse = modem.writeModemCommand("AT+COPS=?",20000);
+	String result;
+	bool inQuotes=false;
+	int quoteCounter=0;
+	for(unsigned int i=0; i<modemResponse.length();i++)
+	{
+		if(modemResponse[i]=='"')
+		{
+			if(!inQuotes)
+			{
+				inQuotes=true;
+				quoteCounter++;
+				if(quoteCounter==1)
+					result+="> ";
+			}
+			else
+			{
+				inQuotes=false;
+				if(quoteCounter==3)
+					quoteCounter=0;
+				if(quoteCounter==1)
+					result+="\n";
+				
+			}
+		}
+		else
+		{
+			if(inQuotes&&(quoteCounter==1))
+			{
+				result+=modemResponse[i];
+			}
+		}
+	}
+	return result;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ScanNetworks.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ScanNetworks.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ScanNetworks.h	(revision 136)
@@ -0,0 +1,75 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3SHIELDV1SCANNETWORKS__
+#define __GSM3SHIELDV1SCANNETWORKS__
+
+// This class executes band management functions for the ShieldV1
+#include <GSM3ShieldV1AccessProvider.h>
+#include <GSM3ShieldV1DirectModemProvider.h>
+
+class GSM3ShieldV1ScanNetworks
+{
+	private:
+		GSM3ShieldV1DirectModemProvider modem;
+				
+	public:
+	
+		/** Constructor
+			@param trace		if true, dumps all AT dialogue to Serial
+			@return - 
+		*/
+		GSM3ShieldV1ScanNetworks(bool trace=false);
+		
+		/** begin (forces modem hardware restart, so we begin from scratch)
+			@return Always returns IDLE status
+		*/
+		GSM3_NetworkStatus_t begin();
+
+		/**	Read current carrier
+			@return Current carrier
+		 */
+		String getCurrentCarrier();
+		
+		/** Obtain signal strength
+			@return Signal Strength
+		 */
+		String getSignalStrength();
+		
+		/** Search available carriers
+			@return A string with list of networks available
+		 */
+		String readNetworks();
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ServerProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ServerProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ServerProvider.cpp	(revision 136)
@@ -0,0 +1,205 @@
+#include <GSM3ShieldV1ServerProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+#include <Arduino.h>
+
+GSM3ShieldV1ServerProvider::GSM3ShieldV1ServerProvider()
+{
+	theGSM3MobileServerProvider=this;
+};
+
+//Response management.
+void GSM3ShieldV1ServerProvider::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+		case NONE:
+			theGSM3ShieldV1ModemCore.gss.cb.deleteToTheEnd(from);
+			break;
+		case CONNECTSERVER:
+			connectTCPServerContinue();
+			break;	
+		/*case GETIP:
+			getIPContinue();
+			break;*/
+	}
+}
+
+//Connect Server main function.
+int GSM3ShieldV1ServerProvider::connectTCPServer(int port)
+{
+	// We forget about LocalIP as it has no real use, the modem does whatever it likes
+	theGSM3ShieldV1ModemCore.setPort(port);			
+	theGSM3ShieldV1ModemCore.openCommand(this,CONNECTSERVER);
+	// From this moment on we wait for a call
+	connectTCPServerContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Connect Server continue function.
+void GSM3ShieldV1ServerProvider::connectTCPServerContinue()
+{
+
+	bool resp;
+	// 1: Read Local IP "AT+QILOCIP"
+	// 2: Waiting for IP and Set local port "AT+QILPORT"
+	// 3: Waiting for QILPOR OK andConfigure as server "AT+QISERVER"
+	// 4: Wait for SERVER OK
+
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		//"AT+QILOCIP."
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QILOCIP"));
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		//Not IP storing but the command is necessary.
+		//if(parseQILOCIP_rsp(local_IP, local_IP_Length, resp))
+		// This awful trick saves some RAM bytes
+		char aux[3];
+		aux[0]='\r';aux[1]='\n';aux[2]=0;
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp, aux))
+	    {
+			//Response received
+			if(resp)
+			{
+				// Great. Go for the next step
+				// AT+QILPORT
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QILPORT=\"TCP\","),false);
+				theGSM3ShieldV1ModemCore.print(	theGSM3ShieldV1ModemCore.getPort());
+				theGSM3ShieldV1ModemCore.print('\r');
+				theGSM3ShieldV1ModemCore.setCommandCounter(3);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;	
+	case 3:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			// Response received
+			if(resp)
+			{
+				// OK received
+				// Great. Go for the next step
+				// AT+QISERVER
+				theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+QISERVER"),true);
+				theGSM3ShieldV1ModemCore.setCommandCounter(4);
+			}
+			else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}	
+		break;	
+	case 4:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+	    {
+			// Response received
+			// OK received, kathapoon, chessespoon
+			if (resp) 
+			{
+				theGSM3ShieldV1ModemCore.registerUMProvider(this);
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			}
+			else 
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+		}		
+		break;	
+	}
+}
+
+//QILOCIP parse.
+/*bool GSM3ShieldV1ServerProvider::parseQILOCIP_rsp(char* LocalIP, int LocalIPlength, bool& rsp)
+{
+	if (!(theGSM3ShieldV1ModemCore.theBuffer().extractSubstring("\r\n","\r\n", LocalIP, LocalIPlength)))
+		rsp = false;
+	else 
+		rsp = true;
+	return true;
+}
+
+//Get IP main function.
+int GSM3ShieldV1ServerProvider::getIP(char* LocalIP, int LocalIPlength)
+{
+	theGSM3ShieldV1ModemCore.setPhoneNumber(LocalIP);
+	theGSM3ShieldV1ModemCore.setPort(LocalIPlength);
+	theGSM3ShieldV1ModemCore.openCommand(this,GETIP);
+	getIPContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+void GSM3ShieldV1ServerProvider::getIPContinue()
+{
+
+	bool resp;
+	// 1: Read Local IP "AT+QILOCIP"
+	// 2: Waiting for IP.
+
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+	case 1:
+		//AT+QILOCIP
+		theGSM3ShieldV1ModemCore.genericCommand_rq(_command_MonoQILOCIP);
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(parseQILOCIP_rsp(theGSM3ShieldV1ModemCore.getPhoneNumber(), theGSM3ShieldV1ModemCore.getPort(), resp))
+	    {
+			if (resp) 
+				theGSM3ShieldV1ModemCore.closeCommand(1);
+			else 
+				theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+		break;	
+	}
+}*/
+
+bool GSM3ShieldV1ServerProvider::getSocketAsServerModemStatus(int s)
+{
+	if(theGSM3ShieldV1ModemCore.getStatus()==TRANSPARENT_CONNECTED)
+		return true;
+	else 
+		return false;
+}
+
+
+//URC recognize.
+bool GSM3ShieldV1ServerProvider::recognizeUnsolicitedEvent(byte oldTail)
+{
+
+	int nlength;
+	char auxLocate [15];
+	
+	//REMOTE SOCKET CLOSED.
+	prepareAuxLocate(PSTR("CLOSED\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.setStatus(GPRS_READY);
+	}
+	
+	
+	//REMOTE SOCKET ACCEPTED.
+	prepareAuxLocate(PSTR("CONNECT\r\n"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.gss.cb.locate(auxLocate))
+	{
+		//To detect remote socket closed for example inside socket data.
+		theGSM3ShieldV1ModemCore.theBuffer().chopUntil(auxLocate, true);
+		theGSM3ShieldV1ModemCore.gss.spaceAvailable();
+		theGSM3ShieldV1ModemCore.setStatus(TRANSPARENT_CONNECTED);
+		return true;
+	}
+	
+	return false;
+}
+
+bool GSM3ShieldV1ServerProvider::getStatusSocketAsServer(uint8_t socket)
+{
+	return(theGSM3ShieldV1ModemCore.getStatus()==TRANSPARENT_CONNECTED);
+};
+
+void GSM3ShieldV1ServerProvider::releaseSocket(int socket)
+{
+}
+
+int GSM3ShieldV1ServerProvider::getNewOccupiedSocketAsServer()
+{
+	return 0;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ServerProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ServerProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1ServerProvider.h	(revision 136)
@@ -0,0 +1,126 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_SHIELDV1SERVERPROVIDER__
+#define __GSM3_SHIELDV1SERVERPROVIDER__
+
+#include <GSM3MobileServerProvider.h>
+#include <GSM3ShieldV1BaseProvider.h>
+
+class GSM3ShieldV1ServerProvider : public GSM3MobileServerProvider,  public GSM3ShieldV1BaseProvider
+{
+	private:
+		
+		/** Continue to connect to server with TCP protocol function
+		 */
+		void connectTCPServerContinue();
+		
+		/** Continue to get IP address function
+		 */
+		//void getIPContinue();
+		
+		/** Parse QILOCIP response
+			@param LocalIP			Buffer for save local IP address
+			@param LocalIPlength	Buffer size
+			@param rsp				Returns if expected response exists
+			@return true if command executed correctly
+		 */
+		//bool parseQILOCIP_rsp(char* LocalIP, int LocalIPlength, bool& rsp);
+		
+		/** Release socket
+			@param socket		Socket
+		 */
+		void releaseSocket(int socket);
+
+	public:
+	
+		/** Constructor */
+		GSM3ShieldV1ServerProvider();
+		
+		/** minSocketAsServer
+			@return 0
+		 */
+		int minSocketAsServer(){return 0;};
+		
+		/** maxSocketAsServer
+			@return 0
+		 */
+		int maxSocketAsServer(){return 0;};
+		
+		/** Get modem status
+			@param s			Socket
+			@return modem status (true if connected)
+		 */
+		bool getSocketAsServerModemStatus(int s);
+		
+		/** Get new occupied socket as server
+			@return return -1 if no new socket has been occupied
+		 */
+		int getNewOccupiedSocketAsServer();
+
+		/** Connect server to TCP port
+			@param port			TCP port
+			@return	command error if exists
+		 */
+		int connectTCPServer(int port);
+		
+		//int getIP(char* LocalIP, int LocalIPlength);
+//		int disconnectTCP(bool client1Server0, int id_socket);
+		
+		/** Get last command status
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+		
+		/** Get socket status as server
+			@param socket		Socket to get status
+			@return socket status
+		 */
+		bool getStatusSocketAsServer(uint8_t socket);
+		
+		/** Manages modem response
+			@param from 		Initial byte of buffer
+			@param to 			Final byte of buffer
+		 */
+		void manageResponse(byte from, byte to);
+		
+		/** Recognize unsolicited event
+			@param oldTail		
+			@return true if successful
+		 */
+		bool recognizeUnsolicitedEvent(byte oldTail);
+
+	
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1VoiceProvider.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1VoiceProvider.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1VoiceProvider.cpp	(revision 136)
@@ -0,0 +1,215 @@
+#include <GSM3ShieldV1VoiceProvider.h>
+#include <Arduino.h>
+
+GSM3ShieldV1VoiceProvider::GSM3ShieldV1VoiceProvider()
+ {
+	phonelength=0;
+	theGSM3MobileVoiceProvider=this;
+ }
+ 
+ void GSM3ShieldV1VoiceProvider::initialize()
+ {
+ 	theGSM3ShieldV1ModemCore.registerUMProvider(this);
+ }
+ 
+//Voice Call main function.
+int GSM3ShieldV1VoiceProvider::voiceCall(const char* to)
+{
+	theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("ATD"),false);
+	theGSM3ShieldV1ModemCore.print(to);
+	theGSM3ShieldV1ModemCore.print(";\r");
+	setvoiceCallStatus(CALLING);
+	return 1;
+}
+
+//Retrieve calling number main function.
+int GSM3ShieldV1VoiceProvider::retrieveCallingNumber (char* buffer, int bufsize)
+{
+	theGSM3ShieldV1ModemCore.setPhoneNumber(buffer);
+	phonelength = bufsize;
+	theGSM3ShieldV1ModemCore.setCommandError(0);
+	theGSM3ShieldV1ModemCore.setCommandCounter(1);
+	theGSM3ShieldV1ModemCore.openCommand(this,RETRIEVECALLINGNUMBER);
+	retrieveCallingNumberContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Retrieve calling number Continue function.
+void GSM3ShieldV1VoiceProvider::retrieveCallingNumberContinue()
+{
+	// 1:  AT+CLCC
+	// 2: Receive +CLCC: 1,1,4,0,0,"num",129,""
+	// This implementation really does not care much if the modem aswers trash to CMGL
+	bool resp;
+	//int msglength_aux;
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:	
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("AT+CLCC"));
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(parseCLCC(theGSM3ShieldV1ModemCore.getPhoneNumber(), phonelength))
+		{
+			theGSM3ShieldV1ModemCore.closeCommand(1);
+		}
+		break;
+	}	
+}	
+
+//CLCC parse.	
+bool GSM3ShieldV1VoiceProvider::parseCLCC(char* number, int nlength)
+{
+	theGSM3ShieldV1ModemCore.theBuffer().extractSubstring("+CLCC: 1,1,4,0,0,\"","\"", number, nlength);
+	theGSM3ShieldV1ModemCore.theBuffer().flush();
+	return true;
+}	
+
+//Answer Call main function.
+int GSM3ShieldV1VoiceProvider::answerCall()
+{
+	theGSM3ShieldV1ModemCore.setCommandError(0);
+	theGSM3ShieldV1ModemCore.setCommandCounter(1);
+	theGSM3ShieldV1ModemCore.openCommand(this,ANSWERCALL);
+	answerCallContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Answer Call continue function.
+void GSM3ShieldV1VoiceProvider::answerCallContinue()
+{
+	// 1: ATA
+	// 2: Waiting for OK
+	
+	// This implementation really does not care much if the modem aswers trash to CMGL
+	bool resp;
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:
+		// ATA ;
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("ATA"));
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		   {
+			   setvoiceCallStatus(TALKING);
+			   if (resp) theGSM3ShieldV1ModemCore.closeCommand(1);
+			   else theGSM3ShieldV1ModemCore.closeCommand(3);
+			}
+		break;
+	}
+}
+		
+//Hang Call main function.		
+int GSM3ShieldV1VoiceProvider::hangCall()
+{
+	theGSM3ShieldV1ModemCore.setCommandError(0);
+	theGSM3ShieldV1ModemCore.setCommandCounter(1);
+	theGSM3ShieldV1ModemCore.openCommand(this,HANGCALL);
+	hangCallContinue();
+	return theGSM3ShieldV1ModemCore.getCommandError();
+}
+
+//Hang Call continue function.
+void GSM3ShieldV1VoiceProvider::hangCallContinue()
+{
+	// 1: ATH
+	// 2: Waiting for OK
+	
+	bool resp;
+	switch (theGSM3ShieldV1ModemCore.getCommandCounter()) {
+    case 1:
+		//ATH
+		theGSM3ShieldV1ModemCore.genericCommand_rq(PSTR("ATH"));
+		theGSM3ShieldV1ModemCore.setCommandCounter(2);
+		break;
+	case 2:
+		if(theGSM3ShieldV1ModemCore.genericParse_rsp(resp))
+		{
+		   setvoiceCallStatus(IDLE_CALL);
+		   if (resp) theGSM3ShieldV1ModemCore.closeCommand(1);
+		   else theGSM3ShieldV1ModemCore.closeCommand(3);
+		}
+		break;
+	}
+}		
+
+//Response management.
+void GSM3ShieldV1VoiceProvider::manageResponse(byte from, byte to)
+{
+	switch(theGSM3ShieldV1ModemCore.getOngoingCommand())
+	{
+		case ANSWERCALL:
+			answerCallContinue();
+			break;
+		case HANGCALL:
+			hangCallContinue();
+			break;
+		case RETRIEVECALLINGNUMBER:
+			retrieveCallingNumberContinue();
+			break;	
+
+	}
+}
+
+//URC recognize.
+bool GSM3ShieldV1VoiceProvider::recognizeUnsolicitedEvent(byte oldTail)
+{
+
+	int nlength;
+	char auxLocate [15];
+	//RING.
+	prepareAuxLocate(PSTR("RING"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.theBuffer().locate(auxLocate))
+	{
+		// RING
+		setvoiceCallStatus(RECEIVINGCALL);
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		return true;
+	}
+	
+	//CALL ACEPTED.
+	prepareAuxLocate(PSTR("+COLP:"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.theBuffer().locate(auxLocate))
+	{
+		//DEBUG
+		//Serial.println("Call Accepted.");
+		setvoiceCallStatus(TALKING);
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		return true;
+	}	
+	
+	//NO CARRIER.
+	prepareAuxLocate(PSTR("NO CARRIER"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.theBuffer().locate(auxLocate))
+	{
+		//DEBUG
+		//Serial.println("NO CARRIER received.");
+		setvoiceCallStatus(IDLE_CALL);
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		return true;
+	}
+	
+	//BUSY.
+	prepareAuxLocate(PSTR("BUSY"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.theBuffer().locate(auxLocate))
+	{
+		//DEBUG	
+		//Serial.println("BUSY received.");
+		setvoiceCallStatus(IDLE_CALL);
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		return true;
+	}	
+	
+	//CALL RECEPTION.
+	prepareAuxLocate(PSTR("+CLIP:"), auxLocate);
+	if(theGSM3ShieldV1ModemCore.theBuffer().locate(auxLocate))
+	{
+		theGSM3ShieldV1ModemCore.theBuffer().flush();
+		setvoiceCallStatus(RECEIVINGCALL);
+		return true;
+	}
+	
+	return false;
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1VoiceProvider.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1VoiceProvider.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV1VoiceProvider.h	(revision 136)
@@ -0,0 +1,137 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+
+#ifndef _GSM3SHIELDV1VOICEPROVIDER_
+#define _GSM3SHIELDV1VOICEPROVIDER_
+
+#include <GSM3MobileVoiceProvider.h>
+#include <GSM3ShieldV1ModemCore.h>
+#include <GSM3ShieldV1BaseProvider.h>
+
+class GSM3ShieldV1VoiceProvider : public GSM3MobileVoiceProvider, public GSM3ShieldV1BaseProvider
+{
+	public:
+		
+		/** Constructor */
+		GSM3ShieldV1VoiceProvider();
+		
+		/** initilizer, links with modem provider */
+		void initialize();
+
+		
+		/** Manages modem response
+			@param from 		Initial byte of buffer
+			@param to 			Final byte of buffer
+		 */
+		void manageResponse(byte from, byte to);
+
+		//Call functions.
+		
+		/** Launch a voice call
+			@param number	 	Phone number to be called
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		 */
+		int voiceCall(const char* number);
+		
+		/** Answer a voice call
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		 */
+		int answerCall();
+		
+		/** Hang a voice call
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		 */
+		int hangCall();
+		
+		/** Retrieve phone number of caller
+			@param buffer		Buffer for copy phone number
+			@param bufsize		Buffer size
+			@return If asynchronous, returns 0. If synchronous, 1 if success, other if error
+		 */
+		int retrieveCallingNumber(char* buffer, int bufsize);
+		
+		/** Get last command status
+			@return Returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int ready(){return GSM3ShieldV1BaseProvider::ready();};
+		
+		/** Recognize URC
+			@param oldTail		
+			@return true if successful
+		 */		
+		bool recognizeUnsolicitedEvent(byte oldTail);
+		
+		/** Returns voice call status
+			@return voice call status
+		 */
+		GSM3_voiceCall_st getvoiceCallStatus(){ready(); return _voiceCallstatus;};
+		
+		/**	Set voice call status
+			@param status		New status for voice call
+		 */
+		void setvoiceCallStatus(GSM3_voiceCall_st status) { _voiceCallstatus = status; };
+
+		
+	private:
+		
+		int phonelength; // Phone number length
+		
+		GSM3_voiceCall_st _voiceCallstatus; // The voiceCall status
+
+		/** Continue to voice call function
+		 */
+		void voiceCallContinue();
+		
+		/** Continue to answer call function
+		 */
+		void answerCallContinue();
+		
+		/** Continue to hang call function
+		 */
+		void hangCallContinue();
+		
+		/** Continue to retrieve calling number function
+		 */
+		void retrieveCallingNumberContinue();
+		
+		/** Parse CLCC response from buffer
+			@param number		Number initial for extract substring of response
+			@param nlength		Substring length
+			@return true if successful
+		 */
+		bool parseCLCC(char* number, int nlength);
+
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV2.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV2.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV2.cpp	(revision 136)
@@ -0,0 +1,255 @@
+/*
+This file is part of GSM3ShieldV2 library developed by Arduino.org (http://arduino.org).
+
+    GSM3ShieldV2 library is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    GSM3ShieldV2 library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with GSM3ShieldV2 library.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <GSM3ShieldV1ModemVerification.h>
+#include <GSM3ShieldV2.h>
+
+
+// constructor
+GSM3ShieldV2::GSM3ShieldV2(bool db)
+{
+	 debug=db;
+}
+
+GSM3ShieldV2::GSM3ShieldV2()
+{
+}	
+
+// get position (longitude and latitude)
+String GSM3ShieldV2::getPosition()
+{
+	String Result = "";
+	String number;
+	// AT command for obtain the current Location
+	String modemResponse = modemAccess.writeModemCommand("AT+QCELLLOC=1", 1000);
+	// Parse and check response
+	char res_to_compare[modemResponse.length()];
+	modemResponse.toCharArray(res_to_compare, modemResponse.length());
+	if(strstr(res_to_compare,"OK") == NULL)
+	{	
+		if(debug==true) Serial.println(modemResponse);
+		Result =" Position not lock ";
+	}
+	else
+	{
+		if(debug==true) Serial.println(modemResponse);
+		Result = modemResponse.substring(12, 33);
+		
+	}
+	return Result;	
+}
+// set speaker loudness (this command have not effect. Refer to Quectel M10 datasheet for further informaions  )
+String GSM3ShieldV2::speakerLoudness(int level) 				// set the speaker Volume
+	                                           					// 0: Low speaker volume
+                                           						// 1: Low speaker volume
+                                           						// 2: Medium speaker volume
+                                            					// 3: High speaker volume
+{
+	String Result ="", modemResponse;
+	// Send the AT command for set the speaker volume
+	switch(level) 
+		{
+		case	0: 
+				modemResponse = modemAccess.writeModemCommand("ATL0",300);	// set low volume
+				break;
+		
+		case	1: 
+				modemResponse = modemAccess.writeModemCommand("ATL1",300);	// set low volume
+				break;
+		
+		case	2: 
+				modemResponse = modemAccess.writeModemCommand("ATL2",300);	// set medium volume
+				break;
+		
+		case	3: 
+				modemResponse = modemAccess.writeModemCommand("ATL3",300);	// set High volume
+				break;
+		}		
+
+	char res_to_compare[modemResponse.length()];
+	modemResponse.toCharArray(res_to_compare, modemResponse.length());
+	if(strstr(res_to_compare,"OK") == NULL)
+	{	
+		Result =" Error !";
+		if(debug==true) Serial.println(Result);
+	}
+	else
+	{
+		Result = modemResponse.substring(1, 45);
+		if(debug==true) Serial.println(Result);
+		return Result;
+	}	
+}
+// set speaker mode    
+String GSM3ShieldV2::speakerMode(int mode)       				// Set the speaker on mode
+                                            					// 0: Speaker is always off
+                                            					// 1: Speaker is on until TA inform TE that carrier has been detected
+                                            					// 2: Speaker is always on when TA is off-hook
+{
+	int spkMode=0;
+	char Mode[2],command[5];
+	
+	Mode[1]='\0';
+	command[4]='\0';
+
+	spkMode=mode;
+	if((spkMode < 0) || (spkMode > 2)) spkMode=DEFAULT_speakerMode;
+	strcpy(command,"ATM");
+	itoa(spkMode,Mode,10);
+	strcat(command,Mode);
+	String modemResponse=modemAccess.writeModemCommand(command,300);
+	if(debug==true) Serial.println(modemResponse);
+
+	return modemResponse;
+
+}
+// set alert sound mode
+String GSM3ShieldV2::alertSoundMode(int mode)					// silent the alert sound
+        														// 0: Normal mode
+        														// 1: Silent mode
+{
+	int soundMode=0;
+	char Mode[2],command[10];
+	
+	Mode[1]='\0';
+	command[9]='\0';
+
+	soundMode=mode;
+	if((soundMode < 0) || (soundMode > 1)) soundMode=DEFAULT_AlertSoundMode;
+	strcpy(command,"AT+CALM=");
+	itoa(soundMode,Mode,10);
+	strcat(command,Mode);
+	String modemResponse=modemAccess.writeModemCommand(command,300);
+	if(debug==true) Serial.println(modemResponse);
+
+	return modemResponse;
+}
+// set ringer sound level
+String GSM3ShieldV2::ringerSoundLevel(int level)				// Set the ringer volume (0-100)
+{
+	char command[12], lev[4];
+	int ringLevel=level;
+	if((ringLevel < 0) || (ringLevel > 100)) ringLevel=DEFAULT_RingerSoundLevel;
+
+	command[11]='\0';
+	lev[3]='\0';
+	strcpy(command,"AT+CRSL=");
+	itoa(ringLevel,lev,10);
+	strcat(command,lev);
+	String modemResponse=modemAccess.writeModemCommand(command,300);
+	if(debug==true) Serial.println(modemResponse);
+	return modemResponse;	
+
+	
+}
+// set lodspeaker volume level
+String GSM3ShieldV2::loudSpeakerVolumeLevel(int level)			// Set the Speaker volume (0-100)
+{
+	char command[12], lev[4];
+	int speakerLevel=level;
+	if((speakerLevel < 0) || (speakerLevel > 100)) speakerLevel=DEFAULT_LoudSpeakerVolumeLevel;
+
+	command[11]='\0';
+	lev[3]='\0';
+	strcpy(command,"AT+CLVL=");
+	itoa(speakerLevel,lev,10);
+	strcat(command,lev);
+	String modemResponse=modemAccess.writeModemCommand(command,300);
+	if(debug==true) Serial.println(modemResponse);
+	return modemResponse;	
+}
+// set mute control
+String GSM3ShieldV2::muteControl(int mode)						// switch on or off mute
+        														// 0: Mute off
+        														// 1: Mute on
+{
+	char command[10], mod[2];
+	int muteCtrl=mode;
+	if((muteCtrl < 0) || (muteCtrl > 1)) muteCtrl=DEFAULT_muteControl;  //operazione non permessa
+
+	command[9]='\0';
+	mod[1]='\0';
+	strcpy(command,"AT+CMUT=");
+	itoa(muteCtrl,mod,10);
+	strcat(command,mod);
+	String modemResponse=modemAccess.writeModemCommand(command,300);
+	if(debug==true) Serial.println(modemResponse);
+	return modemResponse;
+}
+// set microphone gain
+String GSM3ShieldV2::microphoneGainLevel(int channel, int gain)	// Set the microphone channel and level
+        														// Channel:
+        														//			0: Normal Microphone
+        														//			1: Headset Microphone
+        														//			2: Loudspeaker Microphone
+        														// Gain: (0-15)
+{
+	char chn[2], gn[3],command[13];
+
+	chn[1]='\0';
+	gn[2]='\0';
+	command[12]='\0';
+
+	if((channel < 0) || (channel > 2)) itoa(DEFAULT_Channel,chn,10);
+	else itoa(channel,chn,10);
+
+	if((gain < 0) || (gain > 15)) itoa(DEFAULT_MicrophoneGainLevel,gn,10);
+	else itoa(gain,gn,10);
+
+	strcpy(command,"AT+QMIC=");
+	strcat(command,chn);
+	strcat(command,",");
+	strcat(command,gn);
+	String modemResponse=modemAccess.writeModemCommand(command,300);
+	if(debug==true) Serial.println(modemResponse);
+	return modemResponse;
+	
+}
+// set audio channel
+String GSM3ShieldV2::swapAudioChannel(int channel)				// Set the audio channel
+        														// 0: Normal audio channel
+        														// 1: headset audio channel
+        														// 2: Loudspeaker audio chanel
+{
+	 char chn[2], command[12];
+
+	 chn[1]='\0';
+	 command[11]='\0';
+
+	 if((channel < 0) || (channel > 2)) itoa(DEFAULT_Channel,chn,10);
+	 else itoa(channel,chn,10);
+	 strcpy(command,"AT+QAUDCH=");
+	 strcat(command,chn);
+	 String modemResponse=modemAccess.writeModemCommand(command,300);
+	 if(debug==true) Serial.println(modemResponse);
+	 return modemResponse;
+}
+// set the module echo mode (Refer Quectel M10 datasheet for further informaions)
+void GSM3ShieldV2::CommandEcho(int value)
+{
+	switch(value)
+	{
+		case 0: modemAccess.writeModemCommand("ATE0",300);
+				break;
+
+		case 1: modemAccess.writeModemCommand("ATE1",300);		
+				break;
+
+		default:
+				break;
+	}
+}						
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV2.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV2.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3ShieldV2.h	(revision 136)
@@ -0,0 +1,89 @@
+/*
+This file is part of GSM3ShieldV2 library developed by Arduino.org (http://arduino.org).
+
+    GSM3ShieldV2 library is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    GSM3ShieldV2 library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with GSM3ShieldV2 library.  If not, see <http://www.gnu.org/licenses/>.
+*/
+    
+#ifndef _GSM3SHIELDV2_
+#define _GSM3SHIELDV2_
+
+#include <GSM3ShieldV1AccessProvider.h>
+#include <GSM3ShieldV1DirectModemProvider.h>
+#include <GSM.h>
+#include <Arduino.h>
+#include <stdlib.h>
+#include <string.h>
+#include <DEFAULT.h>
+#include <GSM3ShieldV1ModemCore.h>
+
+class GSM3ShieldV2
+{
+
+	private:
+		
+		GSM3ShieldV1DirectModemProvider modemAccess;
+		GSM3ShieldV1AccessProvider gsm; // Access provider to GSM/GPRS network
+		
+	public:
+
+		/** Constructor */
+		GSM3ShieldV2();
+        GSM3ShieldV2(bool db);
+
+        bool debug=false;
+		
+        String getPosition(); 									// Get Current Location
+    
+        // Aded for voice call debug
+        String speakerLoudness(int level); 					// set the speaker Volume
+                                            					// 0: Low speaker volume
+                                           						// 1: Low speaker volume
+                                           						// 2: Medium speaker volume
+                                            					// 3: High speaker volume
+    
+        String speakerMode(int mode);       					// Set the speaker on mode
+                                            					// 0: Speaker is always off
+                                            					// 1: Speaker is on until TA inform TE that carrier has been detected
+                                            					// 2: Speaker is always on when TA is off-hook
+    
+        String alertSoundMode(int mode);						// silent the alert sound
+        														// 0: Normal mode
+        														// 1: Silent mode
+
+        String ringerSoundLevel(int level);						// Set the ringer volume (0-100)
+
+        String loudSpeakerVolumeLevel(int level);				// Set the Speaker volume (0-100)
+
+        String muteControl(int mode);							// switch on or off mute
+        														// 0: Mute off
+        														// 1: Mute on
+
+        String microphoneGainLevel(int channel, int gain);		// Set the microphone channel and level
+        														// Channel:
+        														//			0: Normal Microphone
+        														//			1: Headset Microphone
+        														//			2: Loudspeaker Microphone
+        														// Gain: (0-15)
+
+        String swapAudioChannel(int channel);					// Set the audio channel
+        														// 0: Normal audio channel
+        														// 1: headset audio channel
+        														// 2: Loudspeaker audio chanel
+
+       void CommandEcho(int value);                             // 0: command echo OFF 
+                                                                // 1: command echo ON    
+
+};
+
+#endif;
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SoftSerial.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SoftSerial.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SoftSerial.cpp	(revision 136)
@@ -0,0 +1,524 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include "GSM3SoftSerial.h"
+#include "GSM3IO.h"
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include "pins_arduino.h"
+#include <HardwareSerial.h>
+#include <Arduino.h>
+
+#define __XON__ 0x11
+#define __XOFF__ 0x13
+
+#define _GSMSOFTSERIALFLAGS_ESCAPED_ 0x01
+#define _GSMSOFTSERIALFLAGS_SENTXOFF_ 0x02
+
+//
+// Lookup table
+//
+#define __PARAGRAPHGUARD__ 50
+typedef struct _DELAY_TABLE
+{
+  long baud;
+  unsigned short rx_delay_centering;
+  unsigned short rx_delay_intrabit;
+  unsigned short rx_delay_stopbit;
+  unsigned short tx_delay;
+} DELAY_TABLE;
+
+#if F_CPU == 16000000
+
+static const DELAY_TABLE PROGMEM table[] = 
+{
+  //  baud    rxcenter   rxintra    rxstop    tx
+  { 115200,   1,         17,        17,       12,    },
+  { 57600,    10,        37,        37,       33,    },
+  { 38400,    25,        57,        57,       54,    },
+  { 31250,    31,        70,        70,       68,    },
+  { 28800,    34,        77,        77,       74,    },
+  { 19200,    54,        117,       117,      114,   },
+  { 14400,    74,        156,       156,      153,   },
+  { 9600,     114,       236,       236,      233,   },
+  { 4800,     233,       474,       474,      471,   },
+  { 2400,     471,       950,       950,      947,   },
+  { 1200,     947,       1902,      1902,     1899,  },
+  { 300,      3804,      7617,      7617,     7614,  },
+};
+
+const int XMIT_START_ADJUSTMENT = 5;
+
+#elif F_CPU == 8000000
+
+static const DELAY_TABLE table[] PROGMEM = 
+{
+  //  baud    rxcenter    rxintra    rxstop  tx
+  { 115200,   1,          5,         5,      3,      },
+  { 57600,    1,          15,        15,     13,     },
+  { 38400,    2,          25,        26,     23,     },
+  { 31250,    7,          32,        33,     29,     },
+  { 28800,    11,         35,        35,     32,     },
+  { 19200,    20,         55,        55,     52,     },
+  { 14400,    30,         75,        75,     72,     },
+  { 9600,     50,         114,       114,    112,    },
+  { 4800,     110,        233,       233,    230,    },
+  { 2400,     229,        472,       472,    469,    },
+  { 1200,     467,        948,       948,    945,    },
+  { 300,      1895,       3805,      3805,   3802,   },
+};
+
+const int XMIT_START_ADJUSTMENT = 4;
+
+#elif F_CPU == 20000000
+
+// 20MHz support courtesy of the good people at macegr.com.
+// Thanks, Garrett!
+
+static const DELAY_TABLE PROGMEM table[] =
+{
+  //  baud    rxcenter    rxintra    rxstop  tx
+  { 115200,   3,          21,        21,     18,     },
+  { 57600,    20,         43,        43,     41,     },
+  { 38400,    37,         73,        73,     70,     },
+  { 31250,    45,         89,        89,     88,     },
+  { 28800,    46,         98,        98,     95,     },
+  { 19200,    71,         148,       148,    145,    },
+  { 14400,    96,         197,       197,    194,    },
+  { 9600,     146,        297,       297,    294,    },
+  { 4800,     296,        595,       595,    592,    },
+  { 2400,     592,        1189,      1189,   1186,   },
+  { 1200,     1187,       2379,      2379,   2376,   },
+  { 300,      4759,       9523,      9523,   9520,   },
+};
+
+const int XMIT_START_ADJUSTMENT = 6;
+
+#else
+
+#error This version of GSM3SoftSerial supports only 20, 16 and 8MHz processors
+
+#endif
+
+GSM3SoftSerial* GSM3SoftSerial::_activeObject=0;
+
+GSM3SoftSerial::GSM3SoftSerial():
+	_rx_delay_centering(0),
+	_rx_delay_intrabit(0),
+	_rx_delay_stopbit(0),
+	_tx_delay(0),
+	cb(this)
+{
+	setTX();
+	setRX();
+	//comStatus=0;
+	//waitingAnswer=false;
+}
+
+int GSM3SoftSerial::begin(long speed)
+{
+  _rx_delay_centering = _rx_delay_intrabit = _rx_delay_stopbit = _tx_delay = 0;
+
+  for (unsigned i=0; i<sizeof(table)/sizeof(table[0]); ++i)
+  {
+    long baud = pgm_read_dword(&table[i].baud);
+    if (baud == speed)
+    {
+      _rx_delay_centering = pgm_read_word(&table[i].rx_delay_centering);
+      _rx_delay_intrabit = pgm_read_word(&table[i].rx_delay_intrabit);
+      _rx_delay_stopbit = pgm_read_word(&table[i].rx_delay_stopbit);
+      _tx_delay = pgm_read_word(&table[i].tx_delay);
+      break;
+    }
+  }
+  
+  if (_rx_delay_stopbit)
+  {
+    if (digitalPinToPCICR(__RXPIN__))
+    {
+      *digitalPinToPCICR(__RXPIN__) |= _BV(digitalPinToPCICRbit(__RXPIN__));
+      *digitalPinToPCMSK(__RXPIN__) |= _BV(digitalPinToPCMSKbit(__RXPIN__));
+    }
+    tunedDelay(_tx_delay); // if we were low this establishes the end
+  }
+  
+  _activeObject=this;
+
+}
+
+void GSM3SoftSerial::close()
+ {
+	_activeObject=0;
+ }
+
+size_t GSM3SoftSerial::write(uint8_t c)
+{
+	if (_tx_delay == 0)
+		return 0;
+
+	// Characters to be escaped under XON/XOFF control with Quectel
+	if(c==0x11)
+	{
+		this->finalWrite(0x77);
+		return this->finalWrite(0xEE);
+	}
+
+	if(c==0x13)
+	{
+		this->finalWrite(0x77);
+		return this->finalWrite(0xEC);
+	}
+
+	if(c==0x77)
+	{
+		this->finalWrite(0x77);
+		return this->finalWrite(0x88);
+	}
+	
+	return this->finalWrite(c);
+}
+
+size_t GSM3SoftSerial::finalWrite(uint8_t c)
+{
+	
+	uint8_t oldSREG = SREG;
+	cli();  // turn off interrupts for a clean txmit
+
+	// Write the start bit
+	tx_pin_write(LOW);
+	tunedDelay(_tx_delay + XMIT_START_ADJUSTMENT);
+
+	// Write each of the 8 bits
+	for (byte mask = 0x01; mask; mask <<= 1)
+	{
+		if (c & mask) // choose bit
+			tx_pin_write(HIGH); // send 1
+		else
+			tx_pin_write(LOW); // send 0
+		tunedDelay(_tx_delay);
+	}
+
+	tx_pin_write(HIGH); // restore pin to natural state
+	
+	SREG = oldSREG; // turn interrupts back on
+	tunedDelay(_tx_delay);
+				
+	return 1;
+}
+
+/*inline*/ void GSM3SoftSerial::tunedDelay(uint16_t delay) { 
+  uint8_t tmp=0;
+
+  asm volatile("sbiw    %0, 0x01 \n\t"
+    "ldi %1, 0xFF \n\t"
+    "cpi %A0, 0xFF \n\t"
+    "cpc %B0, %1 \n\t"
+    "brne .-10 \n\t"
+    : "+r" (delay), "+a" (tmp)
+    : "0" (delay)
+    );
+}
+
+void GSM3SoftSerial::tx_pin_write(uint8_t pin_state)
+{
+  // Direct port manipulation is faster than digitalWrite/Read
+  if (pin_state == LOW)
+    *_transmitPortRegister &= ~_transmitBitMask;
+  else
+    *_transmitPortRegister |= _transmitBitMask;
+}
+
+void GSM3SoftSerial::setTX()
+{
+  pinMode(__TXPIN__, OUTPUT);
+  digitalWrite(__TXPIN__, HIGH);
+  // For digital port direct manipulation
+  _transmitBitMask = digitalPinToBitMask(__TXPIN__);
+  uint8_t port = digitalPinToPort(__TXPIN__);
+  _transmitPortRegister = portOutputRegister(port);
+}
+
+void GSM3SoftSerial::setRX()
+{
+  pinMode(__RXPIN__, INPUT);
+  digitalWrite(__RXPIN__, HIGH);  // pullup for normal logic!
+  // For digital port direct manipulation
+  _receiveBitMask = digitalPinToBitMask(__RXPIN__);
+  uint8_t port = digitalPinToPort(__RXPIN__);
+  _receivePortRegister = portInputRegister(port);
+
+#ifdef  __AVR_ATmega32U4__
+//#define __RXINT__ 1
+  attachInterrupt(__RXINT__, GSM3SoftSerial::handle_interrupt, FALLING);
+#endif
+	// This line comes from the High Middle Ages...
+	// attachInterrupt(__RXINT__, GSM3SoftSerial::handle_interrupt, FALLING);
+}
+
+void GSM3SoftSerial::handle_interrupt()
+{
+	if(_activeObject)
+		_activeObject->recv();
+}
+
+uint8_t GSM3SoftSerial::rx_pin_read()
+{
+  // Digital port manipulation
+  return *_receivePortRegister & _receiveBitMask;
+}
+
+void GSM3SoftSerial::recv()
+{
+
+#if GCC_VERSION < 40302
+// Work-around for avr-gcc 4.3.0 OSX version bug
+// Preserve the registers that the compiler misses
+// (courtesy of Arduino forum user *etracer*)
+  asm volatile(
+    "push r18 \n\t"
+    "push r19 \n\t"
+    "push r20 \n\t"
+    "push r21 \n\t"
+    "push r22 \n\t"
+    "push r23 \n\t"
+    "push r26 \n\t"
+    "push r27 \n\t"
+    ::);
+#endif  
+
+  bool firstByte=true;
+  byte thisHead;
+  
+  uint8_t d = 0;
+  bool morebytes=false;
+  //bool fullbuffer=(cb.availableBytes()<3);
+  bool fullbuffer;
+  bool capturado_fullbuffer = 0;
+  int i;
+  byte oldTail;
+
+  // If RX line is high, then we don't see any start bit
+  // so interrupt is probably not for us
+  if (!rx_pin_read())
+  {
+	do
+	{
+		oldTail=cb.getTail();
+		// Wait approximately 1/2 of a bit width to "center" the sample
+		tunedDelay(_rx_delay_centering);
+		
+		fullbuffer=(cb.availableBytes()<6);
+
+		
+		if(fullbuffer&&(!capturado_fullbuffer))
+			tx_pin_write(LOW);
+
+		
+		// Read each of the 8 bits
+		for (uint8_t i=0x1; i; i <<= 1)
+		{
+			tunedDelay(_rx_delay_intrabit);
+			uint8_t noti = ~i;
+			if (rx_pin_read())
+				d |= i;
+			else // else clause added to ensure function timing is ~balanced
+				d &= noti;
+			
+			if(fullbuffer&&(!capturado_fullbuffer))
+			{
+			  if((uint8_t)__XOFF__ & i)
+				tx_pin_write(HIGH);
+			  else
+				tx_pin_write(LOW);
+			}
+		}
+
+		if(fullbuffer&&(!capturado_fullbuffer))
+		{
+			tunedDelay(_rx_delay_intrabit);
+			tx_pin_write(HIGH);	
+		}
+		
+		// So, we know the buffer is full, and we have sent a XOFF
+		if (fullbuffer) 
+		{
+			capturado_fullbuffer =1;
+			_flags |=_GSMSOFTSERIALFLAGS_SENTXOFF_;
+		}
+
+
+		// skip the stop bit
+		if (!fullbuffer) tunedDelay(_rx_delay_stopbit);
+		
+		if(keepThisChar(&d))
+		{
+			cb.write(d);
+			if(firstByte)
+			{
+				firstByte=false;
+				thisHead=cb.getTail();
+			}
+		}
+		
+		
+		// This part is new. It is used to detect the end of a "paragraph"
+		// Caveat: the old fashion would let processor a bit of time between bytes, 
+		// that here is lost
+		// This active waiting avoids drifting
+		morebytes=false;
+		// TO-DO. This PARAGRAPHGUARD is empyric. We should test it for every speed
+		for(i=0;i<__PARAGRAPHGUARD__;i++)
+		{	
+			tunedDelay(1);
+			if(!rx_pin_read())
+			{
+				morebytes=true;
+				break;
+			}
+		}
+	}while(morebytes);
+	// If we find a line feed, we are at the end of a paragraph
+	// check!
+	
+	if (fullbuffer)
+	{
+		// And... go handle it!
+		if(mgr)
+			mgr->manageMsg(thisHead, cb.getTail());
+	}
+	else if(d==10)
+	{
+		// And... go handle it!
+		if(mgr)
+			mgr->manageMsg(thisHead, cb.getTail());
+	}
+	else if (d==32)
+	{
+		// And... go handle it!
+		if(mgr)
+			mgr->manageMsg(thisHead, cb.getTail());
+	}
+  }
+
+#if GCC_VERSION < 40302
+// Work-around for avr-gcc 4.3.0 OSX version bug
+// Restore the registers that the compiler misses
+  asm volatile(
+    "pop r27 \n\t"
+    "pop r26 \n\t"
+    "pop r23 \n\t"
+    "pop r22 \n\t"
+    "pop r21 \n\t"
+    "pop r20 \n\t"
+    "pop r19 \n\t"
+    "pop r18 \n\t"
+    ::);
+#endif
+}
+
+bool GSM3SoftSerial::keepThisChar(uint8_t* c)
+{
+	// Horrible things for Quectel XON/XOFF
+	// 255 is the answer to a XOFF
+	// It comes just once
+	if((*c==255)&&(_flags & _GSMSOFTSERIALFLAGS_SENTXOFF_))
+	{
+		_flags ^= _GSMSOFTSERIALFLAGS_SENTXOFF_;
+		return false;
+	}
+
+	// 0x77, w, is the escape character
+	if(*c==0x77)
+	{
+		_flags |= _GSMSOFTSERIALFLAGS_ESCAPED_;
+		return false;
+	}
+	
+	// and these are the escaped codes
+	if(_flags & _GSMSOFTSERIALFLAGS_ESCAPED_)
+	{
+		if(*c==0xEE)
+			*c=0x11;
+		else if(*c==0xEC)
+			*c=0x13;
+		else if(*c==0x88)
+			*c=0x77;
+			
+		_flags ^= _GSMSOFTSERIALFLAGS_ESCAPED_;
+		return true;
+	}
+	
+	return true;
+}
+
+void GSM3SoftSerial::spaceAvailable()
+{
+	// If there is spaceAvailable in the buffer, lets send a XON
+	finalWrite((byte)__XON__);
+}
+
+
+// This is here to avoid problems with Arduino compiler
+void GSM3SoftSerialMgr::manageMsg(byte from, byte to){};
+
+//#define PCINT1_vect _VECTOR(2)
+//#undef PCINT1_vect
+
+#if defined(PCINT0_vect)
+ISR(PCINT0_vect)
+{
+  GSM3SoftSerial::handle_interrupt();
+}
+#endif
+
+#if defined(PCINT1_vect)
+ISR(PCINT1_vect)
+{
+  GSM3SoftSerial::handle_interrupt();
+}
+#endif
+
+#if defined(PCINT2_vect)
+ISR(PCINT2_vect)
+{
+  GSM3SoftSerial::handle_interrupt();
+}
+#endif
+
+#if defined(PCINT3_vect)
+ISR(PCINT3_vect)
+{
+  GSM3SoftSerial::handle_interrupt();
+}
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SoftSerial.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SoftSerial.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3SoftSerial.h	(revision 136)
@@ -0,0 +1,174 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef __GSM3_SOFTSERIAL__
+#define __GSM3_SOFTSERIAL__
+
+// An adaptation of NewSoftSerial for Modem Shields
+// Assumes directly that Serial is attached to Pins 2 and 3, not inverse
+// We are implementing it because NewSoftSerial does not deal correctly with floods
+// of data
+#include "GSM3CircularBuffer.h"
+#include <avr/pgmspace.h>
+
+/*
+#define _COMSTATUS_ANSWERRECEIVED_ 0x100
+#define _COMSTATUS_SMSRECEIVED_ 0x80
+#define _COMSTATUS_CALLRECEIVED_ 0x40
+
+// PLEASE, when accessing the sockets use "for" and >> (bitwise operator)
+#define _COMSTATUS_SOCKET6RECEIVED_ 0x20
+#define _COMSTATUS_SOCKET5RECEIVED_ 0x10
+#define _COMSTATUS_SOCKET4RECEIVED_ 0x08
+#define _COMSTATUS_SOCKET3RECEIVED_ 0x04
+#define _COMSTATUS_SOCKET2RECEIVED_ 0x02
+#define _COMSTATUS_SOCKET1RECEIVED_ 0x01
+
+#define __CALLTABLEMASK__ 0x3
+*/
+
+class GSM3SoftSerialMgr
+{
+	public:
+	
+		/** Manages soft serial message
+			@param from			Initial byte
+			@param to			Final byte
+		 */
+		virtual void manageMsg(byte from, byte to);
+};
+
+// This class manages software serial communications
+// Changing it so it doesn't know about modems or whatever
+
+class GSM3SoftSerial : public GSM3CircularBufferManager
+{
+	private:
+	
+		uint8_t _receiveBitMask;
+		volatile uint8_t *_receivePortRegister;
+		uint8_t _transmitBitMask;
+		volatile uint8_t *_transmitPortRegister;
+	  
+		static GSM3SoftSerial* _activeObject;
+		GSM3SoftSerialMgr* mgr;
+	  
+		uint16_t _rx_delay_centering;
+		uint16_t _rx_delay_intrabit;
+		uint16_t _rx_delay_stopbit;
+		uint16_t _tx_delay;
+		uint8_t _flags;
+	  
+		/** Write in tx_pin
+			@param pin_state		Pin state
+		 */
+		void tx_pin_write(uint8_t pin_state);
+		
+		/** Set transmission
+		 */
+		void setTX();
+		
+		/** Set receiver
+		 */
+		void setRX();
+		
+		/** Receive
+		 */
+		void recv();
+		
+		/** Read from rx_pin
+			@return receive bit mask
+		 */
+		uint8_t rx_pin_read();
+		
+		void setComsReceived();
+		
+		/** Write a character in serial connection, final action after escaping
+			@param c			Character
+			@return	1 if succesful, 0 if transmission delay = 0
+		 */
+		virtual size_t finalWrite(uint8_t);
+
+		/** Decide, attending to escapes, if the received character should we
+		    kept, forgotten, or changed
+			@param c			Character, may be changed
+			@return	1 if shall be kept, 0 if forgotten
+		 */
+		bool keepThisChar(uint8_t* c);
+		  
+		// Checks the buffer for well-known events. 
+		//bool recognizeUnsolicitedEvent(byte oldTail);
+	  
+	  public:
+	  
+		/** Tuned delay in microcontroller
+			@param delay		Time to delay
+		 */
+		static /*inline */void tunedDelay(uint16_t delay);
+		
+		GSM3CircularBuffer cb; // Circular buffer
+		
+		/** Register serial manager
+			@param manager		Serial manager
+		 */
+		inline void registerMgr(GSM3SoftSerialMgr* manager){mgr=manager;};
+		
+		/** If there is spaceAvailable in the buffer, lets send a XON
+		 */
+		void spaceAvailable();
+		
+		/** Write a character in serial connection
+			@param c			Character
+			@return	1 if succesful, 0 if transmission delay = 0
+		 */
+		virtual size_t write(uint8_t);
+		
+		/** Constructor */
+		GSM3SoftSerial();
+		
+		/** Establish serial connection
+			@param speed		Baudrate
+			@return
+		 */
+		int begin(long speed);
+		
+		/** Manage interruptions
+		 */
+		static inline void handle_interrupt();
+		
+		/** Close serial connection
+		 */
+		void close();
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3VoiceCallService.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3VoiceCallService.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3VoiceCallService.cpp	(revision 136)
@@ -0,0 +1,144 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#include <GSM3VoiceCallService.h>
+#include <Arduino.h>
+
+#include <GSM3ShieldV1VoiceProvider.h>
+GSM3ShieldV1VoiceProvider theShieldV1VoiceProvider;
+
+// While there is only a shield (ShieldV1) we will include it by default
+
+#define GSM3VOICECALLSERVICE_SYNCH 0x01 // 1: synchronous 0: asynchronous
+#define __TOUT__ 10000
+
+
+
+
+GSM3VoiceCallService::GSM3VoiceCallService(bool synch)
+{
+	if(synch)
+		flags |= GSM3VOICECALLSERVICE_SYNCH;
+	theGSM3MobileVoiceProvider->initialize();
+}
+
+GSM3_voiceCall_st GSM3VoiceCallService::getvoiceCallStatus()
+{
+	if(theGSM3MobileVoiceProvider==0)
+		return IDLE_CALL;
+	
+	return theGSM3MobileVoiceProvider->getvoiceCallStatus();
+}
+
+int GSM3VoiceCallService::ready()
+{
+	if(theGSM3MobileVoiceProvider==0)
+		return 0;
+	
+	return theGSM3MobileVoiceProvider->ready();
+}
+
+int GSM3VoiceCallService::voiceCall(const char* to, unsigned long timeout)
+{
+	if(theGSM3MobileVoiceProvider==0)
+		return 0;
+		
+	if(flags & GSM3VOICECALLSERVICE_SYNCH )
+	{
+		theGSM3MobileVoiceProvider->voiceCall(to);
+		unsigned long m;
+		m=millis();
+		// Wait an answer for timeout
+		while(((millis()-m)< timeout )&&(getvoiceCallStatus()==CALLING))
+			delay(100);
+		
+		if(getvoiceCallStatus()==TALKING)
+			return 1;
+		else
+			return 0;
+	}
+	else
+	{ 
+		return theGSM3MobileVoiceProvider->voiceCall(to);
+	}
+		
+}
+
+int GSM3VoiceCallService::answerCall()
+{
+	if(theGSM3MobileVoiceProvider==0)
+		return 0;
+	
+	return waitForAnswerIfNeeded(theGSM3MobileVoiceProvider->answerCall());
+}
+
+int GSM3VoiceCallService::hangCall()
+{
+	if(theGSM3MobileVoiceProvider==0)
+		return 0;
+	
+	return waitForAnswerIfNeeded(theGSM3MobileVoiceProvider->hangCall());
+}
+
+int GSM3VoiceCallService::retrieveCallingNumber(char* buffer, int bufsize)
+{
+	if(theGSM3MobileVoiceProvider==0)
+		return 0;
+	
+	return waitForAnswerIfNeeded(theGSM3MobileVoiceProvider->retrieveCallingNumber(buffer, bufsize));
+}
+
+int GSM3VoiceCallService::waitForAnswerIfNeeded(int returnvalue)
+{
+	// If synchronous
+	if(flags & GSM3VOICECALLSERVICE_SYNCH )
+	{
+		unsigned long m;
+		m=millis();
+		// Wait for __TOUT__
+		while(((millis()-m)< __TOUT__ )&&(ready()==0)) 
+			delay(100);
+		// If everything was OK, return 1
+		// else (timeout or error codes) return 0;
+		if(ready()==1)
+			return 1;
+		else
+			return 0;
+	}
+	// If not synchronous just kick ahead the coming result
+	return ready();
+}
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3VoiceCallService.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3VoiceCallService.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/GSM/src/GSM3VoiceCallService.h	(revision 136)
@@ -0,0 +1,102 @@
+/*
+This file is part of the GSM3 communications library for Arduino
+-- Multi-transport communications platform
+-- Fully asynchronous
+-- Includes code for the Arduino-Telefonica GSM/GPRS Shield V1
+-- Voice calls
+-- SMS
+-- TCP/IP connections
+-- HTTP basic clients
+
+This library has been developed by Telefónica Digital - PDI -
+- Physical Internet Lab, as part as its collaboration with
+Arduino and the Open Hardware Community. 
+
+September-December 2012
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+The latest version of this library can always be found at
+https://github.com/BlueVia/Official-Arduino
+*/
+#ifndef _GSM3VOICECALLSERVICE_
+#define _GSM3VOICECALLSERVICE_
+
+#include <GSM3MobileNetworkProvider.h>
+#include <GSM3MobileVoiceProvider.h>
+
+class GSM3VoiceCallService
+{
+	private:
+		uint8_t flags;
+		
+		/** Make synchronous the functions, if needed
+			@param returnvalue	Return value
+			@return returns 0 if last command is still executing, 1 success, >1 error
+		 */
+		int waitForAnswerIfNeeded(int returnvalue);
+		
+	public:
+		/** Service creation
+			@param synch		If true, the service calls are synchronois
+		*/
+		GSM3VoiceCallService(bool synch=true);
+
+		/** Voice call status
+			@return Status of the voice call, as described in GSM3MobileVoiceProvider.h
+		          { IDLE_CALL, CALLING, RECEIVINGCALL, TALKING};
+		*/
+		GSM3_voiceCall_st getvoiceCallStatus();
+
+		/** Get last command status
+			@return Returns 0 if last command is still executing, 1 success, >1 error
+		*/
+		int ready();
+		
+		/** Place a voice call. If asynchronous, returns while ringing. If synchronous
+			returns if the call is stablished or cancelled.
+			@param to			Receiver number. Country extension can be used or not.
+								Char buffer should not be released or used until command is over
+			@param timeout		In millisecods. Time ringing before closing the call. 
+								Only used in synchronous mode.
+								If zero, ring undefinitely
+			@return In asynchronous mode returns 0 if last command is still executing, 1 success, >1 error
+					In synchronous mode returns 1 if the call is placed, 0 if not.
+		*/		
+		int voiceCall(const char* to, unsigned long timeout=30000);
+		
+		/** Accept an incoming voice call
+			@return In asynchronous mode returns 0 if last command is still executing, 1 success, >1 error
+					In synchronous mode returns 1 if the call is answered, 0 if not.
+		*/		
+		int answerCall();
+		
+		/** Hang a stablished call or an incoming ring
+			@return In asynchronous mode returns 0 if last command is still executing, 1 success, >1 error
+					In synchronous mode returns 1 if the call is answered, 0 if not.
+		*/		
+		int hangCall();
+
+		/** Retrieve the calling number, put it in buffer
+			@param buffer		pointer to the buffer memory
+			@param bufsize		size of available memory area, at least should be 10 characters
+			@return In asynchronous mode returns 0 if last command is still executing, 1 success, >1 error
+					In synchronous mode returns 1 if the number is correcty taken 0 if not
+		*/		
+		int retrieveCallingNumber(char* buffer, int bufsize);
+};
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Liquid Crystal Library for Arduino =
+
+This library allows an Arduino board to control LiquidCrystal displays (LCDs) based on the Hitachi HD44780 (or a compatible) chipset, which is found on most text-based LCDs.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/LiquidCrystal
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Autoscroll/Autoscroll.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Autoscroll/Autoscroll.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Autoscroll/Autoscroll.ino	(revision 136)
@@ -0,0 +1,74 @@
+/*
+  LiquidCrystal Library - Autoscroll
+
+ Demonstrates the use a 16x2 LCD display.  The LiquidCrystal
+ library works with all LCD displays that are compatible with the
+ Hitachi HD44780 driver. There are many of them out there, and you
+ can usually tell them by the 16-pin interface.
+
+ This sketch demonstrates the use of the autoscroll()
+ and noAutoscroll() functions to make new text scroll or not.
+
+ The circuit:
+ * LCD RS pin to digital pin 12
+ * LCD Enable pin to digital pin 11
+ * LCD D4 pin to digital pin 5
+ * LCD D5 pin to digital pin 4
+ * LCD D6 pin to digital pin 3
+ * LCD D7 pin to digital pin 2
+ * LCD R/W pin to ground
+ * 10K resistor:
+ * ends to +5V and ground
+ * wiper to LCD VO pin (pin 3)
+
+ Library originally added 18 Apr 2008
+ by David A. Mellis
+ library modified 5 Jul 2009
+ by Limor Fried (http://www.ladyada.net)
+ example added 9 Jul 2009
+ by Tom Igoe
+ modified 22 Nov 2010
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/LiquidCrystalAutoscroll
+
+ */
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+void setup() {
+  // set up the LCD's number of columns and rows:
+  lcd.begin(16, 2);
+}
+
+void loop() {
+  // set the cursor to (0,0):
+  lcd.setCursor(0, 0);
+  // print from 0 to 9:
+  for (int thisChar = 0; thisChar < 10; thisChar++) {
+    lcd.print(thisChar);
+    delay(500);
+  }
+
+  // set the cursor to (16,1):
+  lcd.setCursor(16, 1);
+  // set the display to automatically scroll:
+  lcd.autoscroll();
+  // print from 0 to 9:
+  for (int thisChar = 0; thisChar < 10; thisChar++) {
+    lcd.print(thisChar);
+    delay(500);
+  }
+  // turn off automatic scrolling
+  lcd.noAutoscroll();
+
+  // clear screen for the next loop:
+  lcd.clear();
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Blink/Blink.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Blink/Blink.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Blink/Blink.ino	(revision 136)
@@ -0,0 +1,61 @@
+/*
+  LiquidCrystal Library - Blink
+
+ Demonstrates the use a 16x2 LCD display.  The LiquidCrystal
+ library works with all LCD displays that are compatible with the
+ Hitachi HD44780 driver. There are many of them out there, and you
+ can usually tell them by the 16-pin interface.
+
+ This sketch prints "Hello World!" to the LCD and makes the
+ cursor block blink.
+
+ The circuit:
+ * LCD RS pin to digital pin 12
+ * LCD Enable pin to digital pin 11
+ * LCD D4 pin to digital pin 5
+ * LCD D5 pin to digital pin 4
+ * LCD D6 pin to digital pin 3
+ * LCD D7 pin to digital pin 2
+ * LCD R/W pin to ground
+ * 10K resistor:
+   * ends to +5V and ground
+   * wiper to LCD VO pin (pin 3)
+
+ Library originally added 18 Apr 2008
+ by David A. Mellis
+ library modified 5 Jul 2009
+ by Limor Fried (http://www.ladyada.net)
+ example added 9 Jul 2009
+ by Tom Igoe
+ modified 22 Nov 2010
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/LiquidCrystalBlink
+
+ */
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+void setup() {
+  // set up the LCD's number of columns and rows:
+  lcd.begin(16, 2);
+  // Print a message to the LCD.
+  lcd.print("hello, world!");
+}
+
+void loop() {
+  // Turn off the blinking cursor:
+  lcd.noBlink();
+  delay(3000);
+  // Turn on the blinking cursor:
+  lcd.blink();
+  delay(3000);
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Cursor/Cursor.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Cursor/Cursor.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Cursor/Cursor.ino	(revision 136)
@@ -0,0 +1,61 @@
+/*
+  LiquidCrystal Library - Cursor
+
+ Demonstrates the use a 16x2 LCD display.  The LiquidCrystal
+ library works with all LCD displays that are compatible with the
+ Hitachi HD44780 driver. There are many of them out there, and you
+ can usually tell them by the 16-pin interface.
+
+ This sketch prints "Hello World!" to the LCD and
+ uses the cursor()  and noCursor() methods to turn
+ on and off the cursor.
+
+ The circuit:
+ * LCD RS pin to digital pin 12
+ * LCD Enable pin to digital pin 11
+ * LCD D4 pin to digital pin 5
+ * LCD D5 pin to digital pin 4
+ * LCD D6 pin to digital pin 3
+ * LCD D7 pin to digital pin 2
+ * LCD R/W pin to ground
+ * 10K resistor:
+ * ends to +5V and ground
+ * wiper to LCD VO pin (pin 3)
+
+ Library originally added 18 Apr 2008
+ by David A. Mellis
+ library modified 5 Jul 2009
+ by Limor Fried (http://www.ladyada.net)
+ example added 9 Jul 2009
+ by Tom Igoe
+ modified 22 Nov 2010
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/LiquidCrystalCursor
+
+ */
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+void setup() {
+  // set up the LCD's number of columns and rows:
+  lcd.begin(16, 2);
+  // Print a message to the LCD.
+  lcd.print("hello, world!");
+}
+
+void loop() {
+  // Turn off the cursor:
+  lcd.noCursor();
+  delay(500);
+  // Turn on the cursor:
+  lcd.cursor();
+  delay(500);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/CustomCharacter/CustomCharacter.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/CustomCharacter/CustomCharacter.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/CustomCharacter/CustomCharacter.ino	(revision 136)
@@ -0,0 +1,140 @@
+/*
+  LiquidCrystal Library - Custom Characters
+
+ Demonstrates how to add custom characters on an LCD  display.
+ The LiquidCrystal library works with all LCD displays that are
+ compatible with the  Hitachi HD44780 driver. There are many of
+ them out there, and you can usually tell them by the 16-pin interface.
+
+ This sketch prints "I <heart> Arduino!" and a little dancing man
+ to the LCD.
+
+  The circuit:
+ * LCD RS pin to digital pin 12
+ * LCD Enable pin to digital pin 11
+ * LCD D4 pin to digital pin 5
+ * LCD D5 pin to digital pin 4
+ * LCD D6 pin to digital pin 3
+ * LCD D7 pin to digital pin 2
+ * LCD R/W pin to ground
+ * 10K potentiometer:
+ * ends to +5V and ground
+ * wiper to LCD VO pin (pin 3)
+ * 10K poterntiometer on pin A0
+ 
+ created 21 Mar 2011
+ by Tom Igoe
+ modified 11 Nov 2013
+ by Scott Fitzgerald
+ 
+ Based on Adafruit's example at
+ https://github.com/adafruit/SPI_VFD/blob/master/examples/createChar/createChar.pde
+
+ This example code is in the public domain.
+ http://www.arduino.cc/en/Tutorial/LiquidCrystal
+
+ Also useful:
+ http://icontexto.com/charactercreator/
+
+ */
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+// make some custom characters:
+byte heart[8] = {
+  0b00000,
+  0b01010,
+  0b11111,
+  0b11111,
+  0b11111,
+  0b01110,
+  0b00100,
+  0b00000
+};
+
+byte smiley[8] = {
+  0b00000,
+  0b00000,
+  0b01010,
+  0b00000,
+  0b00000,
+  0b10001,
+  0b01110,
+  0b00000
+};
+
+byte frownie[8] = {
+  0b00000,
+  0b00000,
+  0b01010,
+  0b00000,
+  0b00000,
+  0b00000,
+  0b01110,
+  0b10001
+};
+
+byte armsDown[8] = {
+  0b00100,
+  0b01010,
+  0b00100,
+  0b00100,
+  0b01110,
+  0b10101,
+  0b00100,
+  0b01010
+};
+
+byte armsUp[8] = {
+  0b00100,
+  0b01010,
+  0b00100,
+  0b10101,
+  0b01110,
+  0b00100,
+  0b00100,
+  0b01010
+};
+
+void setup() {
+  // initialize LCD and set up the number of columns and rows: 
+  lcd.begin(16, 2);
+  
+  // create a new character
+  lcd.createChar(0, heart);
+  // create a new character
+  lcd.createChar(1, smiley);
+  // create a new character
+  lcd.createChar(2, frownie);
+  // create a new character
+  lcd.createChar(3, armsDown);
+  // create a new character
+  lcd.createChar(4, armsUp);
+
+  // Print a message to the lcd.
+  lcd.print("I "); 
+  lcd.write(byte(0)); // when calling lcd.write() '0' must be cast as a byte
+  lcd.print(" Arduino! ");
+  lcd.write((byte) 1);
+
+}
+
+void loop() {
+  // read the potentiometer on A0:
+  int sensorReading = analogRead(A0);
+  // map the result to 200 - 1000:
+  int delayTime = map(sensorReading, 0, 1023, 200, 1000);
+  // set the cursor to the bottom row, 5th position:
+  lcd.setCursor(4, 1);
+  // draw the little man, arms down:
+  lcd.write(3);
+  delay(delayTime);
+  lcd.setCursor(4, 1);
+  // draw him arms up:
+  lcd.write(4);
+  delay(delayTime);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Display/Display.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Display/Display.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Display/Display.ino	(revision 136)
@@ -0,0 +1,61 @@
+/*
+  LiquidCrystal Library - display() and noDisplay()
+
+ Demonstrates the use a 16x2 LCD display.  The LiquidCrystal
+ library works with all LCD displays that are compatible with the
+ Hitachi HD44780 driver. There are many of them out there, and you
+ can usually tell them by the 16-pin interface.
+
+ This sketch prints "Hello World!" to the LCD and uses the
+ display() and noDisplay() functions to turn on and off
+ the display.
+
+ The circuit:
+ * LCD RS pin to digital pin 12
+ * LCD Enable pin to digital pin 11
+ * LCD D4 pin to digital pin 5
+ * LCD D5 pin to digital pin 4
+ * LCD D6 pin to digital pin 3
+ * LCD D7 pin to digital pin 2
+ * LCD R/W pin to ground
+ * 10K resistor:
+ * ends to +5V and ground
+ * wiper to LCD VO pin (pin 3)
+
+ Library originally added 18 Apr 2008
+ by David A. Mellis
+ library modified 5 Jul 2009
+ by Limor Fried (http://www.ladyada.net)
+ example added 9 Jul 2009
+ by Tom Igoe
+ modified 22 Nov 2010
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/LiquidCrystalDisplay
+
+ */
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+void setup() {
+  // set up the LCD's number of columns and rows:
+  lcd.begin(16, 2);
+  // Print a message to the LCD.
+  lcd.print("hello, world!");
+}
+
+void loop() {
+  // Turn off the display:
+  lcd.noDisplay();
+  delay(500);
+  // Turn on the display:
+  lcd.display();
+  delay(500);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/HelloWorld/HelloWorld.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/HelloWorld/HelloWorld.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/HelloWorld/HelloWorld.ino	(revision 136)
@@ -0,0 +1,60 @@
+/*
+  LiquidCrystal Library - Hello World
+
+ Demonstrates the use a 16x2 LCD display.  The LiquidCrystal
+ library works with all LCD displays that are compatible with the
+ Hitachi HD44780 driver. There are many of them out there, and you
+ can usually tell them by the 16-pin interface.
+
+ This sketch prints "Hello World!" to the LCD
+ and shows the time.
+
+  The circuit:
+ * LCD RS pin to digital pin 12
+ * LCD Enable pin to digital pin 11
+ * LCD D4 pin to digital pin 5
+ * LCD D5 pin to digital pin 4
+ * LCD D6 pin to digital pin 3
+ * LCD D7 pin to digital pin 2
+ * LCD R/W pin to ground
+ * LCD VSS pin to ground
+ * LCD VCC pin to 5V
+ * 10K resistor:
+ * ends to +5V and ground
+ * wiper to LCD VO pin (pin 3)
+
+ Library originally added 18 Apr 2008
+ by David A. Mellis
+ library modified 5 Jul 2009
+ by Limor Fried (http://www.ladyada.net)
+ example added 9 Jul 2009
+ by Tom Igoe
+ modified 22 Nov 2010
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://www.arduino.cc/en/Tutorial/LiquidCrystal
+ */
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+void setup() {
+  // set up the LCD's number of columns and rows:
+  lcd.begin(16, 2);
+  // Print a message to the LCD.
+  lcd.print("hello, world!");
+}
+
+void loop() {
+  // set the cursor to column 0, line 1
+  // (note: line 1 is the second row, since counting begins with 0):
+  lcd.setCursor(0, 1);
+  // print the number of seconds since reset:
+  lcd.print(millis() / 1000);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Scroll/Scroll.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Scroll/Scroll.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/Scroll/Scroll.ino	(revision 136)
@@ -0,0 +1,86 @@
+/*
+  LiquidCrystal Library - scrollDisplayLeft() and scrollDisplayRight()
+
+ Demonstrates the use a 16x2 LCD display.  The LiquidCrystal
+ library works with all LCD displays that are compatible with the
+ Hitachi HD44780 driver. There are many of them out there, and you
+ can usually tell them by the 16-pin interface.
+
+ This sketch prints "Hello World!" to the LCD and uses the
+ scrollDisplayLeft() and scrollDisplayRight() methods to scroll
+ the text.
+
+  The circuit:
+ * LCD RS pin to digital pin 12
+ * LCD Enable pin to digital pin 11
+ * LCD D4 pin to digital pin 5
+ * LCD D5 pin to digital pin 4
+ * LCD D6 pin to digital pin 3
+ * LCD D7 pin to digital pin 2
+ * LCD R/W pin to ground
+ * 10K resistor:
+ * ends to +5V and ground
+ * wiper to LCD VO pin (pin 3)
+
+ Library originally added 18 Apr 2008
+ by David A. Mellis
+ library modified 5 Jul 2009
+ by Limor Fried (http://www.ladyada.net)
+ example added 9 Jul 2009
+ by Tom Igoe
+ modified 22 Nov 2010
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/LiquidCrystalScroll
+
+ */
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+void setup() {
+  // set up the LCD's number of columns and rows:
+  lcd.begin(16, 2);
+  // Print a message to the LCD.
+  lcd.print("hello, world!");
+  delay(1000);
+}
+
+void loop() {
+  // scroll 13 positions (string length) to the left
+  // to move it offscreen left:
+  for (int positionCounter = 0; positionCounter < 13; positionCounter++) {
+    // scroll one position left:
+    lcd.scrollDisplayLeft();
+    // wait a bit:
+    delay(150);
+  }
+
+  // scroll 29 positions (string length + display length) to the right
+  // to move it offscreen right:
+  for (int positionCounter = 0; positionCounter < 29; positionCounter++) {
+    // scroll one position right:
+    lcd.scrollDisplayRight();
+    // wait a bit:
+    delay(150);
+  }
+
+  // scroll 16 positions (display length + string length) to the left
+  // to move it back to center:
+  for (int positionCounter = 0; positionCounter < 16; positionCounter++) {
+    // scroll one position left:
+    lcd.scrollDisplayLeft();
+    // wait a bit:
+    delay(150);
+  }
+
+  // delay at the end of the full loop:
+  delay(1000);
+
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/SerialDisplay/SerialDisplay.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/SerialDisplay/SerialDisplay.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/SerialDisplay/SerialDisplay.ino	(revision 136)
@@ -0,0 +1,65 @@
+/*
+  LiquidCrystal Library - Serial Input
+
+ Demonstrates the use a 16x2 LCD display.  The LiquidCrystal
+ library works with all LCD displays that are compatible with the
+ Hitachi HD44780 driver. There are many of them out there, and you
+ can usually tell them by the 16-pin interface.
+
+ This sketch displays text sent over the serial port
+ (e.g. from the Serial Monitor) on an attached LCD.
+
+ The circuit:
+ * LCD RS pin to digital pin 12
+ * LCD Enable pin to digital pin 11
+ * LCD D4 pin to digital pin 5
+ * LCD D5 pin to digital pin 4
+ * LCD D6 pin to digital pin 3
+ * LCD D7 pin to digital pin 2
+ * LCD R/W pin to ground
+ * 10K resistor:
+ * ends to +5V and ground
+ * wiper to LCD VO pin (pin 3)
+
+ Library originally added 18 Apr 2008
+ by David A. Mellis
+ library modified 5 Jul 2009
+ by Limor Fried (http://www.ladyada.net)
+ example added 9 Jul 2009
+ by Tom Igoe
+ modified 22 Nov 2010
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/LiquidCrystalSerial
+ */
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+void setup() {
+  // set up the LCD's number of columns and rows:
+  lcd.begin(16, 2);
+  // initialize the serial communications:
+  Serial.begin(9600);
+}
+
+void loop()
+{
+  // when characters arrive over the serial port...
+  if (Serial.available()) {
+    // wait a bit for the entire message to arrive
+    delay(100);
+    // clear the screen
+    lcd.clear();
+    // read all the available characters
+    while (Serial.available() > 0) {
+      // display each character to the LCD
+      lcd.write(Serial.read());
+    }
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/TextDirection/TextDirection.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/TextDirection/TextDirection.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/TextDirection/TextDirection.ino	(revision 136)
@@ -0,0 +1,86 @@
+/*
+LiquidCrystal Library - TextDirection
+
+Demonstrates the use a 16x2 LCD display.  The LiquidCrystal
+library works with all LCD displays that are compatible with the
+Hitachi HD44780 driver. There are many of them out there, and you
+can usually tell them by the 16-pin interface.
+
+This sketch demonstrates how to use leftToRight() and rightToLeft()
+to move the cursor.
+
+The circuit:
+* LCD RS pin to digital pin 12
+* LCD Enable pin to digital pin 11
+* LCD D4 pin to digital pin 5
+* LCD D5 pin to digital pin 4
+* LCD D6 pin to digital pin 3
+* LCD D7 pin to digital pin 2
+* LCD R/W pin to ground
+* 10K resistor:
+* ends to +5V and ground
+* wiper to LCD VO pin (pin 3)
+
+Library originally added 18 Apr 2008
+by David A. Mellis
+library modified 5 Jul 2009
+by Limor Fried (http://www.ladyada.net)
+example added 9 Jul 2009
+by Tom Igoe
+modified 22 Nov 2010
+by Tom Igoe
+
+This example code is in the public domain.
+
+http://arduino.cc/en/Tutorial/LiquidCrystalTextDirection
+
+*/
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+int thisChar = 'a';
+
+void setup() {
+  // set up the LCD's number of columns and rows:
+  lcd.begin(16, 2);
+  // turn on the cursor:
+  lcd.cursor();
+}
+
+void loop() {
+  // reverse directions at 'm':
+  if (thisChar == 'm') {
+    // go right for the next letter
+    lcd.rightToLeft();
+  }
+  // reverse again at 's':
+  if (thisChar == 's') {
+    // go left for the next letter
+    lcd.leftToRight();
+  }
+  // reset at 'z':
+  if (thisChar > 'z') {
+    // go to (0,0):
+    lcd.home();
+    // start again at 0
+    thisChar = 'a';
+  }
+  // print the character
+  lcd.write(thisChar);
+  // wait a second:
+  delay(1000);
+  // increment the letter:
+  thisChar++;
+}
+
+
+
+
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/setCursor/setCursor.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/setCursor/setCursor.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/examples/setCursor/setCursor.ino	(revision 136)
@@ -0,0 +1,72 @@
+/*
+  LiquidCrystal Library - setCursor
+
+ Demonstrates the use a 16x2 LCD display.  The LiquidCrystal
+ library works with all LCD displays that are compatible with the
+ Hitachi HD44780 driver. There are many of them out there, and you
+ can usually tell them by the 16-pin interface.
+
+ This sketch prints to all the positions of the LCD using the
+ setCursor(0 method:
+
+  The circuit:
+ * LCD RS pin to digital pin 12
+ * LCD Enable pin to digital pin 11
+ * LCD D4 pin to digital pin 5
+ * LCD D5 pin to digital pin 4
+ * LCD D6 pin to digital pin 3
+ * LCD D7 pin to digital pin 2
+ * LCD R/W pin to ground
+ * 10K resistor:
+ * ends to +5V and ground
+ * wiper to LCD VO pin (pin 3)
+
+ Library originally added 18 Apr 2008
+ by David A. Mellis
+ library modified 5 Jul 2009
+ by Limor Fried (http://www.ladyada.net)
+ example added 9 Jul 2009
+ by Tom Igoe
+ modified 22 Nov 2010
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/LiquidCrystalSetCursor
+
+ */
+
+// include the library code:
+#include <LiquidCrystal.h>
+
+// these constants won't change.  But you can change the size of
+// your LCD using them:
+const int numRows = 2;
+const int numCols = 16;
+
+// initialize the library with the numbers of the interface pins
+LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
+
+void setup() {
+  // set up the LCD's number of columns and rows:
+  lcd.begin(numCols, numRows);
+}
+
+void loop() {
+  // loop from ASCII 'a' to ASCII 'z':
+  for (int thisLetter = 'a'; thisLetter <= 'z'; thisLetter++) {
+    // loop over the columns:
+    for (int thisCol = 0; thisCol < numRows; thisCol++) {
+      // loop over the rows:
+      for (int thisRow = 0; thisRow < numCols; thisRow++) {
+        // set the cursor position:
+        lcd.setCursor(thisCol, thisRow);
+        // print the letter:
+        lcd.write(thisLetter);
+        delay(200);
+      }
+    }
+  }
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/keywords.txt	(revision 136)
@@ -0,0 +1,38 @@
+#######################################
+# Syntax Coloring Map For LiquidCrystal
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+LiquidCrystal	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+begin	KEYWORD2
+clear	KEYWORD2
+home	KEYWORD2
+print	KEYWORD2
+setCursor	KEYWORD2
+cursor	KEYWORD2
+noCursor	KEYWORD2
+blink	KEYWORD2
+noBlink	KEYWORD2
+display	KEYWORD2
+noDisplay	KEYWORD2
+autoscroll	KEYWORD2
+noAutoscroll	KEYWORD2
+leftToRight	KEYWORD2
+rightToLeft	KEYWORD2
+scrollDisplayLeft	KEYWORD2
+scrollDisplayRight	KEYWORD2
+createChar	KEYWORD2
+setRowOffsets	KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=LiquidCrystal
+version=1.0
+author=Arduino, Adafruit
+maintainer=Arduino <info@arduino.cc>
+sentence=Allows communication with alphanumerical liquid crystal displays (LCDs). For all Arduino boards.
+paragraph=This library allows an Arduino board to control LiquidCrystal displays (LCDs) based on the Hitachi HD44780 (or a compatible) chipset, which is found on most text-based LCDs. The library works with in either 4 or 8 bit mode (i.e. using 4 or 8 data lines in addition to the rs, enable, and, optionally, the rw control lines).
+category=Display
+url=http://arduino.cc/en/Reference/LiquidCrystal
+architectures=*
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/src/LiquidCrystal.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/src/LiquidCrystal.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/src/LiquidCrystal.cpp	(revision 136)
@@ -0,0 +1,322 @@
+#include "LiquidCrystal.h"
+
+#include <stdio.h>
+#include <string.h>
+#include <inttypes.h>
+#include "Arduino.h"
+
+// When the display powers up, it is configured as follows:
+//
+// 1. Display clear
+// 2. Function set: 
+//    DL = 1; 8-bit interface data 
+//    N = 0; 1-line display 
+//    F = 0; 5x8 dot character font 
+// 3. Display on/off control: 
+//    D = 0; Display off 
+//    C = 0; Cursor off 
+//    B = 0; Blinking off 
+// 4. Entry mode set: 
+//    I/D = 1; Increment by 1 
+//    S = 0; No shift 
+//
+// Note, however, that resetting the Arduino doesn't reset the LCD, so we
+// can't assume that its in that state when a sketch starts (and the
+// LiquidCrystal constructor is called).
+
+LiquidCrystal::LiquidCrystal(uint8_t rs, uint8_t rw, uint8_t enable,
+			     uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3,
+			     uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7)
+{
+  init(0, rs, rw, enable, d0, d1, d2, d3, d4, d5, d6, d7);
+}
+
+LiquidCrystal::LiquidCrystal(uint8_t rs, uint8_t enable,
+			     uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3,
+			     uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7)
+{
+  init(0, rs, 255, enable, d0, d1, d2, d3, d4, d5, d6, d7);
+}
+
+LiquidCrystal::LiquidCrystal(uint8_t rs, uint8_t rw, uint8_t enable,
+			     uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3)
+{
+  init(1, rs, rw, enable, d0, d1, d2, d3, 0, 0, 0, 0);
+}
+
+LiquidCrystal::LiquidCrystal(uint8_t rs,  uint8_t enable,
+			     uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3)
+{
+  init(1, rs, 255, enable, d0, d1, d2, d3, 0, 0, 0, 0);
+}
+
+void LiquidCrystal::init(uint8_t fourbitmode, uint8_t rs, uint8_t rw, uint8_t enable,
+			 uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3,
+			 uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7)
+{
+  _rs_pin = rs;
+  _rw_pin = rw;
+  _enable_pin = enable;
+  
+  _data_pins[0] = d0;
+  _data_pins[1] = d1;
+  _data_pins[2] = d2;
+  _data_pins[3] = d3; 
+  _data_pins[4] = d4;
+  _data_pins[5] = d5;
+  _data_pins[6] = d6;
+  _data_pins[7] = d7; 
+
+  pinMode(_rs_pin, OUTPUT);
+  // we can save 1 pin by not using RW. Indicate by passing 255 instead of pin#
+  if (_rw_pin != 255) { 
+    pinMode(_rw_pin, OUTPUT);
+  }
+  pinMode(_enable_pin, OUTPUT);
+  
+  if (fourbitmode)
+    _displayfunction = LCD_4BITMODE | LCD_1LINE | LCD_5x8DOTS;
+  else 
+    _displayfunction = LCD_8BITMODE | LCD_1LINE | LCD_5x8DOTS;
+  
+  begin(16, 1);  
+}
+
+void LiquidCrystal::begin(uint8_t cols, uint8_t lines, uint8_t dotsize) {
+  if (lines > 1) {
+    _displayfunction |= LCD_2LINE;
+  }
+  _numlines = lines;
+
+  setRowOffsets(0x00, 0x40, 0x00 + cols, 0x40 + cols);  
+
+  // for some 1 line displays you can select a 10 pixel high font
+  if ((dotsize != LCD_5x8DOTS) && (lines == 1)) {
+    _displayfunction |= LCD_5x10DOTS;
+  }
+
+  // SEE PAGE 45/46 FOR INITIALIZATION SPECIFICATION!
+  // according to datasheet, we need at least 40ms after power rises above 2.7V
+  // before sending commands. Arduino can turn on way before 4.5V so we'll wait 50
+  delayMicroseconds(50000); 
+  // Now we pull both RS and R/W low to begin commands
+  digitalWrite(_rs_pin, LOW);
+  digitalWrite(_enable_pin, LOW);
+  if (_rw_pin != 255) { 
+    digitalWrite(_rw_pin, LOW);
+  }
+  
+  //put the LCD into 4 bit or 8 bit mode
+  if (! (_displayfunction & LCD_8BITMODE)) {
+    // this is according to the hitachi HD44780 datasheet
+    // figure 24, pg 46
+
+    // we start in 8bit mode, try to set 4 bit mode
+    write4bits(0x03);
+    delayMicroseconds(4500); // wait min 4.1ms
+
+    // second try
+    write4bits(0x03);
+    delayMicroseconds(4500); // wait min 4.1ms
+    
+    // third go!
+    write4bits(0x03); 
+    delayMicroseconds(150);
+
+    // finally, set to 4-bit interface
+    write4bits(0x02); 
+  } else {
+    // this is according to the hitachi HD44780 datasheet
+    // page 45 figure 23
+
+    // Send function set command sequence
+    command(LCD_FUNCTIONSET | _displayfunction);
+    delayMicroseconds(4500);  // wait more than 4.1ms
+
+    // second try
+    command(LCD_FUNCTIONSET | _displayfunction);
+    delayMicroseconds(150);
+
+    // third go
+    command(LCD_FUNCTIONSET | _displayfunction);
+  }
+
+  // finally, set # lines, font size, etc.
+  command(LCD_FUNCTIONSET | _displayfunction);  
+
+  // turn the display on with no cursor or blinking default
+  _displaycontrol = LCD_DISPLAYON | LCD_CURSOROFF | LCD_BLINKOFF;  
+  display();
+
+  // clear it off
+  clear();
+
+  // Initialize to default text direction (for romance languages)
+  _displaymode = LCD_ENTRYLEFT | LCD_ENTRYSHIFTDECREMENT;
+  // set the entry mode
+  command(LCD_ENTRYMODESET | _displaymode);
+
+}
+
+void LiquidCrystal::setRowOffsets(int row0, int row1, int row2, int row3)
+{
+	_row_offsets[0] = row0;
+	_row_offsets[1] = row1;
+	_row_offsets[2] = row2;
+	_row_offsets[3] = row3;
+}
+
+/********** high level commands, for the user! */
+void LiquidCrystal::clear()
+{
+  command(LCD_CLEARDISPLAY);  // clear display, set cursor position to zero
+  delayMicroseconds(2000);  // this command takes a long time!
+}
+
+void LiquidCrystal::home()
+{
+  command(LCD_RETURNHOME);  // set cursor position to zero
+  delayMicroseconds(2000);  // this command takes a long time!
+}
+
+void LiquidCrystal::setCursor(uint8_t col, uint8_t row)
+{
+  const size_t max_lines = sizeof(_row_offsets) / sizeof(*_row_offsets);
+  if ( row >= max_lines ) {
+    row = max_lines - 1;    // we count rows starting w/0
+  }
+  if ( row >= _numlines ) {
+    row = _numlines - 1;    // we count rows starting w/0
+  }
+  
+  command(LCD_SETDDRAMADDR | (col + _row_offsets[row]));
+}
+
+// Turn the display on/off (quickly)
+void LiquidCrystal::noDisplay() {
+  _displaycontrol &= ~LCD_DISPLAYON;
+  command(LCD_DISPLAYCONTROL | _displaycontrol);
+}
+void LiquidCrystal::display() {
+  _displaycontrol |= LCD_DISPLAYON;
+  command(LCD_DISPLAYCONTROL | _displaycontrol);
+}
+
+// Turns the underline cursor on/off
+void LiquidCrystal::noCursor() {
+  _displaycontrol &= ~LCD_CURSORON;
+  command(LCD_DISPLAYCONTROL | _displaycontrol);
+}
+void LiquidCrystal::cursor() {
+  _displaycontrol |= LCD_CURSORON;
+  command(LCD_DISPLAYCONTROL | _displaycontrol);
+}
+
+// Turn on and off the blinking cursor
+void LiquidCrystal::noBlink() {
+  _displaycontrol &= ~LCD_BLINKON;
+  command(LCD_DISPLAYCONTROL | _displaycontrol);
+}
+void LiquidCrystal::blink() {
+  _displaycontrol |= LCD_BLINKON;
+  command(LCD_DISPLAYCONTROL | _displaycontrol);
+}
+
+// These commands scroll the display without changing the RAM
+void LiquidCrystal::scrollDisplayLeft(void) {
+  command(LCD_CURSORSHIFT | LCD_DISPLAYMOVE | LCD_MOVELEFT);
+}
+void LiquidCrystal::scrollDisplayRight(void) {
+  command(LCD_CURSORSHIFT | LCD_DISPLAYMOVE | LCD_MOVERIGHT);
+}
+
+// This is for text that flows Left to Right
+void LiquidCrystal::leftToRight(void) {
+  _displaymode |= LCD_ENTRYLEFT;
+  command(LCD_ENTRYMODESET | _displaymode);
+}
+
+// This is for text that flows Right to Left
+void LiquidCrystal::rightToLeft(void) {
+  _displaymode &= ~LCD_ENTRYLEFT;
+  command(LCD_ENTRYMODESET | _displaymode);
+}
+
+// This will 'right justify' text from the cursor
+void LiquidCrystal::autoscroll(void) {
+  _displaymode |= LCD_ENTRYSHIFTINCREMENT;
+  command(LCD_ENTRYMODESET | _displaymode);
+}
+
+// This will 'left justify' text from the cursor
+void LiquidCrystal::noAutoscroll(void) {
+  _displaymode &= ~LCD_ENTRYSHIFTINCREMENT;
+  command(LCD_ENTRYMODESET | _displaymode);
+}
+
+// Allows us to fill the first 8 CGRAM locations
+// with custom characters
+void LiquidCrystal::createChar(uint8_t location, uint8_t charmap[]) {
+  location &= 0x7; // we only have 8 locations 0-7
+  command(LCD_SETCGRAMADDR | (location << 3));
+  for (int i=0; i<8; i++) {
+    write(charmap[i]);
+  }
+}
+
+/*********** mid level commands, for sending data/cmds */
+
+inline void LiquidCrystal::command(uint8_t value) {
+  send(value, LOW);
+}
+
+inline size_t LiquidCrystal::write(uint8_t value) {
+  send(value, HIGH);
+  return 1; // assume sucess
+}
+
+/************ low level data pushing commands **********/
+
+// write either command or data, with automatic 4/8-bit selection
+void LiquidCrystal::send(uint8_t value, uint8_t mode) {
+  digitalWrite(_rs_pin, mode);
+
+  // if there is a RW pin indicated, set it low to Write
+  if (_rw_pin != 255) { 
+    digitalWrite(_rw_pin, LOW);
+  }
+  
+  if (_displayfunction & LCD_8BITMODE) {
+    write8bits(value); 
+  } else {
+    write4bits(value>>4);
+    write4bits(value);
+  }
+}
+
+void LiquidCrystal::pulseEnable(void) {
+  digitalWrite(_enable_pin, LOW);
+  delayMicroseconds(1);    
+  digitalWrite(_enable_pin, HIGH);
+  delayMicroseconds(1);    // enable pulse must be >450ns
+  digitalWrite(_enable_pin, LOW);
+  delayMicroseconds(100);   // commands need > 37us to settle
+}
+
+void LiquidCrystal::write4bits(uint8_t value) {
+  for (int i = 0; i < 4; i++) {
+    pinMode(_data_pins[i], OUTPUT);
+    digitalWrite(_data_pins[i], (value >> i) & 0x01);
+  }
+
+  pulseEnable();
+}
+
+void LiquidCrystal::write8bits(uint8_t value) {
+  for (int i = 0; i < 8; i++) {
+    pinMode(_data_pins[i], OUTPUT);
+    digitalWrite(_data_pins[i], (value >> i) & 0x01);
+  }
+  
+  pulseEnable();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/src/LiquidCrystal.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/src/LiquidCrystal.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/LiquidCrystal/src/LiquidCrystal.h	(revision 136)
@@ -0,0 +1,108 @@
+#ifndef LiquidCrystal_h
+#define LiquidCrystal_h
+
+#include <inttypes.h>
+#include "Print.h"
+
+// commands
+#define LCD_CLEARDISPLAY 0x01
+#define LCD_RETURNHOME 0x02
+#define LCD_ENTRYMODESET 0x04
+#define LCD_DISPLAYCONTROL 0x08
+#define LCD_CURSORSHIFT 0x10
+#define LCD_FUNCTIONSET 0x20
+#define LCD_SETCGRAMADDR 0x40
+#define LCD_SETDDRAMADDR 0x80
+
+// flags for display entry mode
+#define LCD_ENTRYRIGHT 0x00
+#define LCD_ENTRYLEFT 0x02
+#define LCD_ENTRYSHIFTINCREMENT 0x01
+#define LCD_ENTRYSHIFTDECREMENT 0x00
+
+// flags for display on/off control
+#define LCD_DISPLAYON 0x04
+#define LCD_DISPLAYOFF 0x00
+#define LCD_CURSORON 0x02
+#define LCD_CURSOROFF 0x00
+#define LCD_BLINKON 0x01
+#define LCD_BLINKOFF 0x00
+
+// flags for display/cursor shift
+#define LCD_DISPLAYMOVE 0x08
+#define LCD_CURSORMOVE 0x00
+#define LCD_MOVERIGHT 0x04
+#define LCD_MOVELEFT 0x00
+
+// flags for function set
+#define LCD_8BITMODE 0x10
+#define LCD_4BITMODE 0x00
+#define LCD_2LINE 0x08
+#define LCD_1LINE 0x00
+#define LCD_5x10DOTS 0x04
+#define LCD_5x8DOTS 0x00
+
+class LiquidCrystal : public Print {
+public:
+  LiquidCrystal(uint8_t rs, uint8_t enable,
+		uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3,
+		uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7);
+  LiquidCrystal(uint8_t rs, uint8_t rw, uint8_t enable,
+		uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3,
+		uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7);
+  LiquidCrystal(uint8_t rs, uint8_t rw, uint8_t enable,
+		uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3);
+  LiquidCrystal(uint8_t rs, uint8_t enable,
+		uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3);
+
+  void init(uint8_t fourbitmode, uint8_t rs, uint8_t rw, uint8_t enable,
+	    uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3,
+	    uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7);
+    
+  void begin(uint8_t cols, uint8_t rows, uint8_t charsize = LCD_5x8DOTS);
+
+  void clear();
+  void home();
+
+  void noDisplay();
+  void display();
+  void noBlink();
+  void blink();
+  void noCursor();
+  void cursor();
+  void scrollDisplayLeft();
+  void scrollDisplayRight();
+  void leftToRight();
+  void rightToLeft();
+  void autoscroll();
+  void noAutoscroll();
+
+  void setRowOffsets(int row1, int row2, int row3, int row4);
+  void createChar(uint8_t, uint8_t[]);
+  void setCursor(uint8_t, uint8_t); 
+  virtual size_t write(uint8_t);
+  void command(uint8_t);
+  
+  using Print::write;
+private:
+  void send(uint8_t, uint8_t);
+  void write4bits(uint8_t);
+  void write8bits(uint8_t);
+  void pulseEnable();
+
+  uint8_t _rs_pin; // LOW: command.  HIGH: character.
+  uint8_t _rw_pin; // LOW: write to LCD.  HIGH: read from LCD.
+  uint8_t _enable_pin; // activated by a HIGH pulse.
+  uint8_t _data_pins[8];
+
+  uint8_t _displayfunction;
+  uint8_t _displaycontrol;
+  uint8_t _displaymode;
+
+  uint8_t _initialized;
+
+  uint8_t _numlines;
+  uint8_t _row_offsets[4];
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Accelerometer/Accelerometer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Accelerometer/Accelerometer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Accelerometer/Accelerometer.ino	(revision 136)
@@ -0,0 +1,145 @@
+/****************************************************************************
+* Copyright (C) 2011 - 2014 Bosch Sensortec GmbH
+*
+* Accelerometer.ino
+* Date: 2014/09/09
+* Revision: 3.0 $
+*
+* Usage:        Example code to stream Accelerometer data
+*
+****************************************************************************
+/***************************************************************************
+* License:
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+*   Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+*
+*   Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+*
+*   Neither the name of the copyright holder nor the names of the
+*   contributors may be used to endorse or promote products derived from
+*   this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
+* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+*
+* The information provided is believed to be accurate and reliable.
+* The copyright holder assumes no responsibility for the consequences of use
+* of such information nor for any infringement of patents or
+* other rights of third parties which may result from its use.
+* No license is granted by implication or otherwise under any patent or
+* patent rights of the copyright holder.
+*/
+
+#include "NAxisMotion.h"        //Contains the bridge code between the API and the Arduino Environment
+#include <Wire.h>
+
+NAxisMotion mySensor;                 //Object that for the sensor
+unsigned long lastStreamTime = 0;     //To store the last streamed time stamp
+const int streamPeriod = 40;          //To stream at 25Hz without using additional timers (time period(ms) =1000/frequency(Hz))
+bool updateSensorData = true;         //Flag to update the sensor data. Default is true to perform the first read before the first stream
+
+void setup() //This code is executed once
+{
+  //Peripheral Initialization
+  Serial.begin(115200);           //Initialize the Serial Port to view information on the Serial Monitor
+  I2C.begin();                    //Initialize I2C communication to the let the library communicate with the sensor. 
+  //Sensor Initialization
+  mySensor.initSensor();          //The I2C Address can be changed here inside this function in the library
+  mySensor.setOperationMode(OPERATION_MODE_NDOF);   //Can be configured to other operation modes as desired
+  mySensor.setUpdateMode(MANUAL);	//The default is AUTO. Changing to manual requires calling the relevant update functions prior to calling the read functions
+  //Setting to MANUAL requires lesser reads to the sensor
+  mySensor.updateAccelConfig();
+  updateSensorData = true;
+  Serial.println();
+  Serial.println("Default accelerometer configuration settings...");
+  Serial.print("Range: ");
+  Serial.println(mySensor.readAccelRange());
+  Serial.print("Bandwidth: ");
+  Serial.println(mySensor.readAccelBandwidth());
+  Serial.print("Power Mode: ");
+  Serial.println(mySensor.readAccelPowerMode());
+  Serial.println("Streaming in ...");	//Countdown
+  Serial.print("3...");
+  delay(1000);	//Wait for a second
+  Serial.print("2...");
+  delay(1000);	//Wait for a second
+  Serial.println("1...");
+  delay(1000);	//Wait for a second
+}
+
+void loop() //This code is looped forever
+{
+  if (updateSensorData)  //Keep the updating of data as a separate task
+  {
+    mySensor.updateAccel();        //Update the Accelerometer data
+    mySensor.updateLinearAccel();  //Update the Linear Acceleration data
+    mySensor.updateGravAccel();    //Update the Gravity Acceleration data
+    mySensor.updateCalibStatus();  //Update the Calibration Status
+    updateSensorData = false;
+  }
+  if ((millis() - lastStreamTime) >= streamPeriod)
+  {
+    lastStreamTime = millis();
+
+    Serial.print("Time: ");
+    Serial.print(lastStreamTime);
+    Serial.print("ms ");
+
+    Serial.print("      aX: ");
+    Serial.print(mySensor.readAccelX()); //Accelerometer X-Axis data
+    Serial.print("m/s2 ");
+
+    Serial.print(" aY: ");
+    Serial.print(mySensor.readAccelY());  //Accelerometer Y-Axis data
+    Serial.print("m/s2 ");
+
+    Serial.print(" aZ: ");
+    Serial.print(mySensor.readAccelZ());  //Accelerometer Z-Axis data
+    Serial.print("m/s2 ");
+
+    Serial.print("      lX: ");
+    Serial.print(mySensor.readLinearAccelX()); //Linear Acceleration X-Axis data
+    Serial.print("m/s2 ");
+
+    Serial.print(" lY: ");
+    Serial.print(mySensor.readLinearAccelY());  //Linear Acceleration Y-Axis data
+    Serial.print("m/s2 ");
+
+    Serial.print(" lZ: ");
+    Serial.print(mySensor.readLinearAccelZ());  //Linear Acceleration Z-Axis data
+    Serial.print("m/s2 ");
+
+    Serial.print("      gX: ");
+    Serial.print(mySensor.readGravAccelX()); //Gravity Acceleration X-Axis data
+    Serial.print("m/s2 ");
+
+    Serial.print(" gY: ");
+    Serial.print(mySensor.readGravAccelY());  //Gravity Acceleration Y-Axis data
+    Serial.print("m/s2 ");
+
+    Serial.print(" gZ: ");
+    Serial.print(mySensor.readGravAccelZ());  //Gravity Acceleration Z-Axis data
+    Serial.print("m/s2 ");
+
+    Serial.print("      C: ");
+    Serial.print(mySensor.readAccelCalibStatus());  //Accelerometer Calibration Status (0 - 3)
+
+    Serial.println();
+
+    updateSensorData = true;
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/BareMinimum/BareMinimum.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/BareMinimum/BareMinimum.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/BareMinimum/BareMinimum.ino	(revision 136)
@@ -0,0 +1,64 @@
+/****************************************************************************
+* Copyright (C) 2011 - 2014 Bosch Sensortec GmbH
+*
+* BareMinimum.ino
+* Date: 2014/08/25
+* Revision: 2.1 $
+*
+* Usage:        Example code to describe the Bare Minimum
+*
+****************************************************************************
+/***************************************************************************
+* License:
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+*   Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+*
+*   Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+*
+*   Neither the name of the copyright holder nor the names of the
+*   contributors may be used to endorse or promote products derived from
+*   this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
+* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+*
+* The information provided is believed to be accurate and reliable.
+* The copyright holder assumes no responsibility for the consequences of use
+* of such information nor for any infringement of patents or
+* other rights of third parties which may result from its use.
+* No license is granted by implication or otherwise under any patent or
+* patent rights of the copyright holder.
+*/
+
+#include "NAxisMotion.h"        //Contains the bridge code between the API and the Arduino Environment
+#include <Wire.h>
+
+NAxisMotion mySensor;           //Object that for the sensor
+
+void setup() //This code is executed once
+{
+  //Peripheral Initialization
+  I2C.begin();                    //Initialize I2C communication to the let the library communicate with the sensor.
+  //Sensor Initialization
+  mySensor.initSensor();          //The I2C Address can be changed here inside this function in the library
+  mySensor.setOperationMode(OPERATION_MODE_NDOF);   //Can be configured to other operation modes as desired
+}
+
+void loop() //This code is looped forever
+{
+  //Blank
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Euler/Euler.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Euler/Euler.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Euler/Euler.ino	(revision 136)
@@ -0,0 +1,104 @@
+/****************************************************************************
+* Copyright (C) 2011 - 2014 Bosch Sensortec GmbH
+*
+* Euler.ino
+* Date: 2014/09/09
+* Revision: 3.0 $
+*
+* Usage:        Example code to stream Euler data
+*
+****************************************************************************
+/***************************************************************************
+* License:
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+*   Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+*
+*   Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+*
+*   Neither the name of the copyright holder nor the names of the 
+*   contributors may be used to endorse or promote products derived from 
+*   this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
+* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+* 
+* The information provided is believed to be accurate and reliable.
+* The copyright holder assumes no responsibility for the consequences of use
+* of such information nor for any infringement of patents or
+* other rights of third parties which may result from its use.
+* No license is granted by implication or otherwise under any patent or
+* patent rights of the copyright holder. 
+*/
+
+#include "NAxisMotion.h"        //Contains the bridge code between the API and the Arduino Environment
+#include <Wire.h>
+
+NAxisMotion mySensor;         //Object that for the sensor 
+unsigned long lastStreamTime = 0;     //To store the last streamed time stamp
+const int streamPeriod = 20;          //To stream at 50Hz without using additional timers (time period(ms) =1000/frequency(Hz))
+
+void setup() //This code is executed once
+{    
+  //Peripheral Initialization
+  Serial.begin(115200);           //Initialize the Serial Port to view information on the Serial Monitor
+  I2C.begin();                    //Initialize I2C communication to the let the library communicate with the sensor.
+  //Sensor Initialization
+  mySensor.initSensor();          //The I2C Address can be changed here inside this function in the library
+  mySensor.setOperationMode(OPERATION_MODE_NDOF);   //Can be configured to other operation modes as desired
+  mySensor.setUpdateMode(MANUAL);	//The default is AUTO. Changing to MANUAL requires calling the relevant update functions prior to calling the read functions
+  //Setting to MANUAL requires fewer reads to the sensor  
+}
+
+void loop() //This code is looped forever
+{
+  if ((millis() - lastStreamTime) >= streamPeriod)
+  {
+    lastStreamTime = millis();    
+    mySensor.updateEuler();        //Update the Euler data into the structure of the object
+    mySensor.updateCalibStatus();  //Update the Calibration Status
+
+    Serial.print("Time: ");
+    Serial.print(lastStreamTime);
+    Serial.print("ms ");
+
+    Serial.print(" H: ");
+    Serial.print(mySensor.readEulerHeading()); //Heading data
+    Serial.print("deg ");
+
+    Serial.print(" R: ");
+    Serial.print(mySensor.readEulerRoll()); //Roll data
+    Serial.print("deg");
+
+    Serial.print(" P: ");
+    Serial.print(mySensor.readEulerPitch()); //Pitch data
+    Serial.print("deg ");
+    
+    Serial.print(" A: ");
+    Serial.print(mySensor.readAccelCalibStatus());  //Accelerometer Calibration Status (0 - 3)
+	
+    Serial.print(" M: ");
+    Serial.print(mySensor.readMagCalibStatus());    //Magnetometer Calibration Status (0 - 3)
+	
+    Serial.print(" G: ");
+    Serial.print(mySensor.readGyroCalibStatus());   //Gyroscope Calibration Status (0 - 3)
+	
+    Serial.print(" S: ");
+    Serial.print(mySensor.readSystemCalibStatus());   //System Calibration Status (0 - 3)
+
+    Serial.println();
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Keywords.txt	(revision 136)
@@ -0,0 +1,116 @@
+#######################################
+#        NAxisMotion Keywords     	  #
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+NAxisMotion	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+NAxisMotion	KEYWORD2
+initSensor	KEYWORD2
+resetSensor	KEYWORD2
+setOperationMode	KEYWORD2
+setPowerMode	KEYWORD2
+updateAccel	KEYWORD2
+updateMag	KEYWORD2
+updateGyro	KEYWORD2
+updateQuat	KEYWORD2
+updateEuler	KEYWORD2
+updateLinearAccel	KEYWORD2
+updateGravAccel	KEYWORD2
+updateCalibStatus	KEYWORD2
+writeAccelConfig	KEYWORD2
+updateAccelConfig	KEYWORD2
+accelInterrupts	KEYWORD2
+resetInterrupt	KEYWORD2
+enableAnyMotion	KEYWORD2
+disableAnyMotion	KEYWORD2
+enableSlowNoMotion	KEYWORD2
+disableSlowNoMotion	KEYWORD2
+setUpdateMode	KEYWORD2
+readAccelX	KEYWORD2
+readAccelY	KEYWORD2
+readAccelZ	KEYWORD2
+readGyroX	KEYWORD2
+readGyroY	KEYWORD2
+readGyroZ	KEYWORD2
+readMagX	KEYWORD2
+readMagY	KEYWORD2
+readMagZ	KEYWORD2
+readQuatW	KEYWORD2
+readQuatX	KEYWORD2
+readQuatY	KEYWORD2
+readQuatZ	KEYWORD2
+readEulerHeading	KEYWORD2
+readEulerRoll	KEYWORD2
+readEulerPitch	KEYWORD2
+readLinearAccelX	KEYWORD2
+readLinearAccelY	KEYWORD2
+readLinearAccelZ	KEYWORD2
+readGravAccelX	KEYWORD2
+readGravAccelY	KEYWORD2
+readGravAccelZ	KEYWORD2
+readAccelCalibStatus	KEYWORD2
+readGyroCalibStatus	KEYWORD2
+readMagCalibStatus	KEYWORD2
+readSystemCalibStatus	KEYWORD2
+readAccelRange	KEYWORD2
+readAccelBandwidth	KEYWORD2
+readAccelPowerMode	KEYWORD2
+
+#######################################
+# Constants and Variables (LITERAL1)
+#######################################
+
+RESET_PIN	LITERAL1
+INT_PIN	LITERAL1
+INT_PIN_UNO	LITERAL1
+
+OPERATION_MODE_CONFIG	LITERAL1
+OPERATION_MODE_ACCONLY	LITERAL1
+OPERATION_MODE_MAGONLY	LITERAL1
+OPERATION_MODE_GYRONLY	LITERAL1
+OPERATION_MODE_ACCMAG	LITERAL1
+OPERATION_MODE_ACCGYRO	LITERAL1
+OPERATION_MODE_MAGGYRO	LITERAL1
+OPERATION_MODE_AMG	LITERAL1
+OPERATION_MODE_IMUPLUS	LITERAL1
+OPERATION_MODE_COMPASS	LITERAL1
+OPERATION_MODE_M4G	LITERAL1
+OPERATION_MODE_NDOF_FMC_OFF	LITERAL1
+OPERATION_MODE_NDOF	LITERAL1
+POWER_MODE_NORMAL	LITERAL1
+POWER_MODE_LOWPOWER	LITERAL1
+POWER_MODE_SUSPEND	LITERAL1
+ACCEL_RANGE_2G	LITERAL1
+ACCEL_RANGE_4G	LITERAL1
+ACCEL_RANGE_8G	LITERAL1
+ACCEL_RANGE_16G	LITERAL1
+ACCEL_BW_7_81HZ	LITERAL1
+ACCEL_BW_15_63HZ	LITERAL1
+ACCEL_BW_31_25HZ	LITERAL1
+ACCEL_BW_62_5HZ	LITERAL1
+ACCEL_BW_125HZ	LITERAL1
+ACCEL_BW_250HZ	LITERAL1
+ACCEL_BW_500HZ	LITERAL1
+ACCEL_BW_1000HZ	LITERAL1
+ACCEL_NORMAL	LITERAL1
+ACCEL_SUSPEND	LITERAL1
+ACCEL_LOWPOWER_1	LITERAL1
+ACCEL_STANDBY	LITERAL1
+ACCEL_LOWPOWER_2	LITERAL1
+ACCEL_DEEPSUSPEND	LITERAL1
+
+ENABLE	LITERAL1
+DISABLE	LITERAL1
+NO_MOTION	LITERAL1
+SLOW_MOTION	LITERAL1
+I2C	LITERAL1
+MANUAL	LITERAL1
+AUTO	LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/LICENSE.md
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/LICENSE.md	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/LICENSE.md	(revision 136)
@@ -0,0 +1,39 @@
+Copyright (C) 2011 - 2014 Bosch Sensortec GmbH
+
+NAxisMotion Library
+Date: 2014/09/12
+Usage:Library and example code for the BNO055
+
+License:
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+
+Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+
+Neither the name of the copyright holder nor the names of the
+contributors may be used to endorse or promote products derived from
+this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+
+The information provided is believed to be accurate and reliable.
+The copyright holder assumes no responsibility for the consequences of use
+of such information nor for any infringement of patents or
+other rights of third parties which may result from its use.
+No license is granted by implication or otherwise under any patent or
+patent rights of the copyright holder.
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Motion/Motion.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Motion/Motion.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/Motion/Motion.ino	(revision 136)
@@ -0,0 +1,112 @@
+/****************************************************************************
+* Copyright (C) 2011 - 2014 Bosch Sensortec GmbH
+*
+* Motion.ino
+* Date: 2014/09/09
+* Revision: 2.0 $
+*
+* Usage:        Example code of a game to demonstrate the Any motion 
+*                  and No motion Interrupt features
+*
+****************************************************************************
+/***************************************************************************
+* License:
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+*   Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+*
+*   Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+*
+*   Neither the name of the copyright holder nor the names of the
+*   contributors may be used to endorse or promote products derived from
+*   this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
+* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+*
+* The information provided is believed to be accurate and reliable.
+* The copyright holder assumes no responsibility for the consequences of use
+* of such information nor for any infringement of patents or
+* other rights of third parties which may result from its use.
+* No license is granted by implication or otherwise under any patent or
+* patent rights of the copyright holder.
+*/
+
+#include "NAxisMotion.h"        //Contains the bridge code between the API and the Arduino Environment
+#include <Wire.h>
+
+NAxisMotion mySensor;   //Object that for the sensor
+bool intDetected = false;       //Flag to indicate if an interrupt was detected
+int threshold = 5;              //At a Range of 4g, the threshold is set at 39.05mg or 0.3830m/s2. This Range is the default for NDOF Mode
+int duration = 1;               //At a filter Bandwidth of 62.5Hz, the duration is 8ms. This Bandwidth is the default for NDOF Mode
+bool anyMotion = true;          //To know which interrupt was triggered
+
+void setup() //This code is executed once
+{
+  //Peripheral Initialization
+  Serial.begin(115200);           //Initialize the Serial Port to view information on the Serial Monitor
+  I2C.begin();                    //Initialize I2C communication to the let the library communicate with the sensor.
+  //Sensor Initialization
+  Serial.println("Please wait. Initialization in process.");
+  mySensor.initSensor();          //The I2C Address can be changed here inside this function in the library
+  mySensor.setOperationMode(OPERATION_MODE_NDOF);   //Can be configured to other operation modes as desired
+  mySensor.setUpdateMode(MANUAL);	//The default is AUTO. Changing to manual requires calling the relevant update functions prior to calling the read functions
+  //Setting to MANUAL  requires lesser reads to the sensor
+
+  attachInterrupt(INT_PIN, motionISR, RISING);  //Attach the interrupt to the Interrupt Service Routine for a Rising Edge. Change the interrupt pin depending on the board
+
+  //Setup the initial interrupt to trigger at No Motion
+  mySensor.resetInterrupt();
+  mySensor.enableSlowNoMotion(threshold, duration, NO_MOTION);
+  anyMotion = false;
+  mySensor.accelInterrupts(ENABLE, ENABLE, ENABLE);  //Accelerometer interrupts can be triggered from all 3 axes
+  Serial.println("This is a game to test how steady you can move an object with one hand. \nKeep the device on a table and mark 2 points.");
+  Serial.println("Move the Device from one place to another without triggering the Any Motion Interrupt.\n\n");
+  delay(1000); //Delay for the player(s) to read
+  Serial.println("Move the device around and then place it at one position.\nChange the threshold and duration to increase the difficulty level.");
+  Serial.println("Have fun!\n\n"); 
+}
+
+void loop() //This code is looped forever
+{
+  if (intDetected)
+  {
+    if (anyMotion)
+    {
+      Serial.println("You moved!! Try again. Keep the Device at one place.\n");
+      intDetected = false;
+      mySensor.resetInterrupt();          //Reset the interrupt line
+      mySensor.disableAnyMotion();        //Disable the Any motion interrupt
+      mySensor.enableSlowNoMotion(threshold, duration, NO_MOTION);  //Enable the No motion interrupt (can also use the Slow motion instead)
+      anyMotion = false;
+    }
+    else
+    {
+      Serial.println("Device is not moving. You may start again.\n\n\n");
+      intDetected = false;
+      mySensor.resetInterrupt();          //Reset the interrupt line
+      mySensor.disableSlowNoMotion();     //Disable the Slow or No motion interrupt
+      mySensor.enableAnyMotion(threshold, duration);   //Enable the Any motion interrupt
+      anyMotion = true;
+    }
+  }
+}
+
+//Interrupt Service Routine when the sensor triggers an Interrupt
+void motionISR()
+{
+  intDetected = true;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/NAxisMotion.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/NAxisMotion.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/NAxisMotion.cpp	(revision 136)
@@ -0,0 +1,1000 @@
+/****************************************************************************
+* Copyright (C) 2011 - 2014 Bosch Sensortec GmbH
+*
+* NAxisMotion.cpp
+* Date: 2015/02/10
+* Revision: 3.0 $
+*
+* Usage:        Source file of the C++ Wrapper for the BNO055 Sensor API
+*
+****************************************************************************
+*
+* Added Arduino M0/M0 Pro support
+*
+* Date: 07/27/2015
+*
+* Modified by: Arduino.org development Team.
+*
+****************************************************************************
+/***************************************************************************
+* License:
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+*   Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+*
+*   Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+*
+*   Neither the name of the copyright holder nor the names of the 
+*   contributors may be used to endorse or promote products derived from 
+*   this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
+* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+* 
+* The information provided is believed to be accurate and reliable.
+* The copyright holder assumes no responsibility for the consequences of use
+* of such information nor for any infringement of patents or
+* other rights of third parties which may result from its use.
+* No license is granted by implication or otherwise under any patent or
+* patent rights of the copyright holder. 
+*/
+#include "NAxisMotion.h"
+//Function Definitions
+/*******************************************************************************************
+*Description: Constructor of the class with the default initialization
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/
+NAxisMotion::NAxisMotion()
+{
+	//Blank
+}
+
+/*******************************************************************************************
+*Description: Function with the bare minimum initialization
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::initSensor(unsigned int address)
+{	
+	//Initialize the GPIO peripheral
+	pinMode(INT_PIN, INPUT_PULLUP);		//Configure Interrupt pin
+	pinMode(RESET_PIN, OUTPUT);			//Configure Reset pin
+	
+	//Power on the BNO055
+	resetSensor(address);
+}
+
+/*******************************************************************************************
+*Description: This function is used to reset the BNO055
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::resetSensor(unsigned int address)
+{
+	//Reset sequence
+	digitalWrite(RESET_PIN, LOW);		//Set the Reset pin LOW
+	delay(RESET_PERIOD);				//Hold it for a while
+	digitalWrite(RESET_PIN, HIGH);		//Set the Reset pin HIGH
+	delay(INIT_PERIOD);					//Pause for a while to let the sensor initialize completely (Anything >500ms should be fine)
+	//Initialization sequence
+	//Link the function pointers for communication (late-binding)
+	myBNO.bus_read = BNO055_I2C_bus_read;
+	myBNO.bus_write = BNO055_I2C_bus_write;
+	myBNO.delay_msec = _delay;
+	
+	//Set the I2C address here !!! ADDR1 is the default address
+	//myBNO.dev_addr = BNO055_I2C_ADDR1;
+	myBNO.dev_addr = address; 
+	//myBNO.dev_addr = BNO055_I2C_ADDR2;
+	
+	//Initialize the BNO055 structure to hold the device information
+	bno055_init(&myBNO);
+	
+	//Post initialization delay
+	delay(POST_INIT_PERIOD);
+	
+	//To set the output data format to the Android style
+	bno055_set_data_output_format(ANDROID);
+	
+	//Set the default data update mode to auto
+	dataUpdateMode = AUTO;	
+}
+
+/*******************************************************************************************
+*Description: This function is used to set the operation mode of the BNO055
+*Input Parameters:
+*	byte operationMode: To assign which operation mode the device has to
+*				---------------------------------------------------
+*				Constant Definition			Constant Value	Comment
+*				---------------------------------------------------
+*				OPERATION_MODE_CONFIG		0x00			Configuration Mode 
+*																(Transient Mode)
+*				OPERATION_MODE_ACCONLY		0x01			Accelerometer only
+*				OPERATION_MODE_MAGONLY		0x02			Magnetometer only
+*				OPERATION_MODE_GYRONLY		0x03			Gyroscope only
+*				OPERATION_MODE_ACCMAG		0x04			Accelerometer and Magnetometer only
+*				OPERATION_MODE_ACCGYRO		0x05			Accelerometer and Gyroscope only
+*				OPERATION_MODE_MAGGYRO		0x06			Magnetometer and Gyroscope only
+*				OPERATION_MODE_AMG			0x07			Accelerometer, Magnetometer and 
+*																Gyroscope (without fusion)
+*				OPERATION_MODE_IMUPLUS		0x08			Inertial Measurement Unit 
+*																(Accelerometer and Gyroscope 
+*																	Sensor Fusion Mode)
+*				OPERATION_MODE_COMPASS		0x09			Tilt Compensated Compass 
+*																(Accelerometer and Magnetometer 
+*																	Sensor Fusion Mode)
+*				OPERATION_MODE_M4G			0x0A			Magnetometer and Gyroscope Sensor 
+*																Fusion Mode
+*				OPERATION_MODE_NDOF_FMC_OFF	0x0B			9 Degrees of Freedom Sensor Fusion 
+*																with Fast Magnetometer Calibration Off
+*				OPERATION_MODE_NDOF			0x0C			9 Degrees of Freedom Sensor Fusion
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::setOperationMode(byte operationMode)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_set_operation_mode(operationMode);			//Set the Operation Mode	
+}
+
+/*******************************************************************************************
+*Description: This function is used to set the power mode
+*Input Parameters:
+*	byte powerMode: To assign the power mode the device has to switch to
+*				--------------------------------------
+*				Constant Definition		Constant Value
+*				--------------------------------------
+*				POWER_MODE_NORMAL		0x00
+*				POWER_MODE_LOWPOWER		0x01
+*				POWER_MODE_SUSPEND		0x02
+*Return Parameter:
+*******************************************************************************************/
+void NAxisMotion::setPowerMode(byte powerMode)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_set_power_mode(powerMode);					//Set the Power Mode	
+}
+
+/*******************************************************************************************
+*Description: This function is used to update the accelerometer data in m/s2
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/	
+void NAxisMotion::updateAccel(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_convert_float_accel_xyz_msq(&accelData);	//Read the data from the sensor
+}
+
+/*******************************************************************************************
+*Description: This function is used to update the magnetometer data in microTesla
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/	
+void NAxisMotion::updateMag(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_convert_float_mag_xyz_uT(&magData);	//Read the data from the sensor
+}
+
+/*******************************************************************************************
+*Description: This function is used to update the gyroscope data in deg/s
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/	
+void NAxisMotion::updateGyro(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_convert_float_gyro_xyz_dps(&gyroData);		//Read the data from the sensor	
+}
+	
+/*******************************************************************************************
+*Description: This function is used to update the quaternion data
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/	
+void NAxisMotion::updateQuat(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_read_quaternion_wxyz(&quatData);			//Read the data from the sensor
+}
+
+/*******************************************************************************************
+*Description: This function is used to update the euler data in degrees
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/	
+void NAxisMotion::updateEuler(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_convert_float_euler_hpr_deg(&eulerData);	//Read the data from the sensor
+}
+
+
+/*******************************************************************************************
+*Description: This function is used to update the linear acceleration data in m/s2
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/	
+void NAxisMotion::updateLinearAccel(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_convert_float_linear_accel_xyz_msq(&linearAccelData);	//Read the data from the sensor
+}
+
+/*******************************************************************************************
+*Description: This function is used to update the gravity acceleration data in m/s2
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/	
+void NAxisMotion::updateGravAccel(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_convert_float_gravity_xyz_msq(&gravAccelData);	//Read the data from the sensor
+}
+
+/*******************************************************************************************
+*Description: This function is used to update the calibration status
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::updateCalibStatus(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_get_accel_calib_stat(&calibStatus.accel);
+	comRes = bno055_get_mag_calib_stat(&calibStatus.mag);
+	comRes = bno055_get_gyro_calib_stat(&calibStatus.gyro);
+	comRes = bno055_get_sys_calib_stat(&calibStatus.system);
+}
+
+/*******************************************************************************************
+*Description: This function is used to write the accelerometer configurations
+*Input Parameters:
+*	uint8_t range: To assign the range of the accelerometer
+*			--------------------------------------
+*			Constant Definition		Constant Value
+*			--------------------------------------
+*			ACCEL_RANGE_2G			0X00
+*			ACCEL_RANGE_4G			0X01
+*			ACCEL_RANGE_8G			0X02
+*			ACCEL_RANGE_16G			0X03
+*	uint8_t bandwidth: To assign the filter bandwidth of the accelerometer
+*			--------------------------------------
+*			Constant Definition		Constant Value
+*			--------------------------------------
+*			ACCEL_BW_7_81HZ			0x00
+*			ACCEL_BW_15_63HZ		0x01
+*			ACCEL_BW_31_25HZ		0x02
+*			ACCEL_BW_62_5HZ			0X03
+*			ACCEL_BW_125HZ			0X04
+*			ACCEL_BW_250HZ			0X05
+*			ACCEL_BW_500HZ			0X06
+*			ACCEL_BW_1000HZ			0X07
+*	uint8_t powerMode: To assign the power mode of the accelerometer
+*			--------------------------------------
+*			Constant Definition		Constant Value
+*			--------------------------------------
+*			ACCEL_NORMAL			0X00
+*			ACCEL_SUSPEND			0X01
+*			ACCEL_LOWPOWER_1		0X02
+*			ACCEL_STANDBY			0X03
+*			ACCEL_LOWPOWER_2		0X04
+*			ACCEL_DEEPSUSPEND		0X05
+*Return Parameter: None
+*******************************************************************************************/	
+void NAxisMotion::writeAccelConfig(uint8_t range, uint8_t bandwidth, uint8_t powerMode)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_set_accel_range(range);
+	comRes = bno055_set_accel_bw(bandwidth);
+	comRes = bno055_set_accel_power_mode(powerMode);
+}
+
+/*******************************************************************************************
+*Description: This function is used to update the accelerometer configurations
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::updateAccelConfig(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_get_accel_range(&accelStatus.range);
+	comRes = bno055_get_accel_bw(&accelStatus.bandwidth);
+	comRes = bno055_get_accel_power_mode(&accelStatus.powerMode);
+}
+
+/*******************************************************************************************
+*Description: This function is used to control which axis of the accelerometer triggers the
+*				interrupt
+*Input Parameters:
+*	bool xStatus: To know whether the x axis has to trigger the interrupt
+*				---------------------------------------------------
+*				Constant Definition		Constant Value	Comment
+*				---------------------------------------------------
+*				ENABLE					1				Enables interrupts from that axis
+*				DISABLE					0				Disables interrupts from that axis
+*	bool yStatus: To know whether the x axis has to trigger the interrupt
+*				---------------------------------------------------
+*				Constant Definition		Constant Value	Comment
+*				---------------------------------------------------
+*				ENABLE					1				Enables interrupts from that axis
+*				DISABLE					0				Disables interrupts from that axis
+*	bool zStatus: To know whether the x axis has to trigger the interrupt
+*				---------------------------------------------------
+*				Constant Definition		Constant Value	Comment
+*				---------------------------------------------------
+*				ENABLE					1				Enables interrupts from that axis
+*				DISABLE					0				Disables interrupts from that axis
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::accelInterrupts(bool xStatus, bool yStatus, bool zStatus)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_set_accel_any_motion_no_motion_axis_enable(BNO055_ACCEL_ANY_MOTION_NO_MOTION_X_AXIS, xStatus);
+	comRes = bno055_set_accel_any_motion_no_motion_axis_enable(BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS, yStatus);
+	comRes = bno055_set_accel_any_motion_no_motion_axis_enable(BNO055_ACCEL_ANY_MOTION_NO_MOTION_Z_AXIS, zStatus);
+}
+
+/*******************************************************************************************
+*Description: This function is used to reset the interrupt line
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::resetInterrupt(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_set_intr_rst(ENABLE);
+}
+
+/*******************************************************************************************
+*Description: This function is used to enable the any motion interrupt based on the 
+*				accelerometer
+*Input Parameters:
+*	uint8_t threshold: The threshold that triggers the any motion interrupt
+*				The threshold should be entered as an integer. The corresponding value of
+*					the threshold depends on the range that has been set on the 
+*					accelerometer. Below is a table showing the value of 1LSB in 
+*					corresponding units.
+*				Resolution:
+*					ACCEL_RANGE_2G, 1LSB = 3.91mg = ~0.03835m/s2
+*					ACCEL_RANGE_4G, 1LSB = 7.81mg = ~0.07661m/s2
+*					ACCEL_RANGE_8G, 1LSB = 15.6mg = ~0.15303m/s2
+*					ACCEL_RANGE_16G, 1LSB = 31.3mg = ~0.30705m/s2
+*				Maximum:
+*					ACCEL_RANGE_2G, 1LSB = 996mg = ~9.77076m/s2,
+*					ACCEL_RANGE_4G, 1LSB = 1.99g = ~19.5219m/s2
+*					ACCEL_RANGE_8G, 1LSB = 3.98g = ~39.0438m/s2
+*					ACCEL_RANGE_16G, 1LSB = 7.97g = ~97.1857m/s2
+*	uint8_t duration: The duration for which the desired threshold exist
+*				The time difference between the successive acceleration signals depends 
+*				on the selected bandwidth and equates to 1/(2*bandwidth). 
+*				In order to suppress false triggers, the interrupt is only generated (cleared) 
+*				if a certain number N of consecutive slope data points is larger (smaller) 
+*				than the slope 'threshold'. This number is set by the 'duration'. 
+*				It is N = duration + 1.
+*				Resolution:
+*					ACCEL_BW_7_81HZ, 1LSB = 64ms
+*					ACCEL_BW_15_63HZ, 1LSB = 32ms
+*					ACCEL_BW_31_25HZ, 1LSB = 16ms
+*					ACCEL_BW_62_5HZ, 1LSB = 8ms
+*					ACCEL_BW_125HZ, 1LSB = 4ms
+*					ACCEL_BW_250HZ, 1LSB = 2ms
+*					ACCEL_BW_500HZ, 1LSB = 1ms
+*					ACCEL_BW_1000HZ, 1LSB = 0.5ms
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::enableAnyMotion(uint8_t threshold, uint8_t duration)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_set_accel_any_motion_thres(threshold);
+	comRes = bno055_set_accel_any_motion_durn(duration);
+	comRes = bno055_set_intr_accel_any_motion(ENABLE);
+	comRes = bno055_set_intr_mask_accel_any_motion(ENABLE);
+}
+
+/*******************************************************************************************
+*Description: This function is used to disable the any motion interrupt
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::disableAnyMotion(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_set_intr_accel_any_motion(DISABLE);
+	comRes = bno055_set_intr_mask_accel_any_motion(DISABLE);
+}
+
+/*******************************************************************************************
+*Description: This function is used to enable the slow or no motion interrupt based on the 
+*				accelerometer
+*Input Parameters:
+*	uint8_t threshold: The threshold that triggers the no motion interrupt
+*				The threshold should be entered as an integer. The corresponding value of
+*					the threshold depends on the range that has been set on the 
+*					accelerometer. Below is a table showing the value of 1LSB in 
+*					corresponding units.
+*				Resolution:
+*					ACCEL_RANGE_2G, 1LSB = 3.91mg = ~0.03835m/s2
+*					ACCEL_RANGE_4G, 1LSB = 7.81mg = ~0.07661m/s2
+*					ACCEL_RANGE_8G, 1LSB = 15.6mg = ~0.15303m/s2
+*					ACCEL_RANGE_16G, 1LSB = 31.3mg = ~0.30705m/s2
+*				Maximum:
+*					ACCEL_RANGE_2G, 1LSB = 996mg = ~9.77076m/s2,
+*					ACCEL_RANGE_4G, 1LSB = 1.99g = ~19.5219m/s2
+*					ACCEL_RANGE_8G, 1LSB = 3.98g = ~39.0438m/s2
+*					ACCEL_RANGE_16G, 1LSB = 7.97g = ~97.1857m/s2
+*	uint8_t duration: The duration for which the desired threshold should be surpassed
+*				The time difference between the successive acceleration signals depends 
+*				on the selected bandwidth and equates to 1/(2*bandwidth). 
+*				In order to suppress false triggers, the interrupt is only generated (cleared) 
+*				if a certain number N of consecutive slope data points is larger (smaller) 
+*				than the slope 'threshold'. This number is set by the 'duration'. 
+*				It is N = duration + 1.
+*				Resolution:
+*					ACCEL_BW_7_81HZ, 1LSB = 64ms
+*					ACCEL_BW_15_63HZ, 1LSB = 32ms
+*					ACCEL_BW_31_25HZ, 1LSB = 16ms
+*					ACCEL_BW_62_5HZ, 1LSB = 8ms
+*					ACCEL_BW_125HZ, 1LSB = 4ms
+*					ACCEL_BW_250HZ, 1LSB = 2ms
+*					ACCEL_BW_500HZ, 1LSB = 1ms
+*					ACCEL_BW_1000HZ, 1LSB = 0.5ms
+*	bool motion: To trigger either a Slow motion or a No motion interrupt
+*				---------------------------------------------------
+*				Constant Definition		Constant Value	Comment
+*				---------------------------------------------------
+*				NO_MOTION				1				Enables the no motion interrupt
+*				SLOW_MOTION				0				Enables the slow motion interrupt
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::enableSlowNoMotion(uint8_t threshold, uint8_t duration, bool motion)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_set_accel_slow_no_motion_enable(motion);
+	comRes = bno055_set_accel_slow_no_motion_thres(threshold);
+	comRes = bno055_set_accel_slow_no_motion_durn(duration);
+	comRes = bno055_set_intr_accel_no_motion(ENABLE);
+	comRes = bno055_set_intr_mask_accel_no_motion(ENABLE);
+}
+	
+/*******************************************************************************************
+*Description: This function is used to disable the slow or no motion interrupt
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::disableSlowNoMotion(void)
+{
+	BNO055_RETURN_FUNCTION_TYPE comRes = BNO055_ZERO_U8X;		//Holds the communication results
+	comRes = bno055_set_intr_accel_no_motion(DISABLE);
+	comRes = bno055_set_intr_mask_accel_any_motion(DISABLE);
+}
+
+/*******************************************************************************************
+*Description: This function is used to change the mode of updating the local data
+*Input Parameters: None
+*Return Parameter: None
+*******************************************************************************************/
+void NAxisMotion::setUpdateMode(bool updateMode)
+{
+	dataUpdateMode = updateMode;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the x-axis of the accelerometer data
+*Input Parameters: None
+*Return Parameter:
+*	float:	X-axis accelerometer data in m/s2
+*******************************************************************************************/
+float NAxisMotion::readAccelX(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateAccel();
+	}
+	return accelData.x;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the y-axis of the accelerometer data
+*Input Parameters: None
+*Return Parameter:
+*	float:	Y-axis accelerometer data in m/s2
+*******************************************************************************************/
+float NAxisMotion::readAccelY(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateAccel();
+	}
+	return accelData.y;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the z-axis of the accelerometer data
+*Input Parameters: None
+*Return Parameter:
+*	float:	Z-axis accelerometer data in m/s2
+*******************************************************************************************/
+float NAxisMotion::readAccelZ(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateAccel();
+	}
+	return accelData.z;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the x-axis of the gyroscope data
+*Input Parameters: None
+*Return Parameter:
+*	float:	X-axis gyroscope data in deg/s
+*******************************************************************************************/
+float NAxisMotion::readGyroX(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateGyro();
+	}
+	return gyroData.x;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the y-axis of the gyroscope data
+*Input Parameters: None
+*Return Parameter:
+*	float:	Y-axis gyroscope data in deg/s
+*******************************************************************************************/
+float NAxisMotion::readGyroY(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateGyro();
+	}
+	return gyroData.y;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the z-axis of the gyroscope data
+*Input Parameters: None
+*Return Parameter:
+*	float:	Z-axis gyroscope data in deg/s
+*******************************************************************************************/
+float NAxisMotion::readGyroZ(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateGyro();
+	}
+	return gyroData.z;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the x-axis of the magnetometer data
+*Input Parameters: None
+*Return Parameter:
+*	float:	X-axis magnetometer data in µT
+*******************************************************************************************/
+float NAxisMotion::readMagX(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateMag();
+	}
+	return magData.x;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the y-axis of the magnetometer data
+*Input Parameters: None
+*Return Parameter:
+*	float:	Y-axis magnetometer data in µT
+*******************************************************************************************/
+float NAxisMotion::readMagY(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateMag();
+	}
+	return magData.y;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the z-axis of the magnetometer data
+*Input Parameters: None
+*Return Parameter:
+*	float:	Z-axis magnetometer data in µT
+*******************************************************************************************/
+float NAxisMotion::readMagZ(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateMag();
+	}
+	return magData.z;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the w-axis of the quaternion data
+*Input Parameters: None
+*Return Parameter:
+*	int16_t:	W-axis quaternion data multiplied by 1000 (for 3 decimal places accuracy)
+*******************************************************************************************/
+int16_t NAxisMotion::readQuatW(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateQuat();
+	}
+	return quatData.w;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the x-axis of the quaternion data
+*Input Parameters: None
+*Return Parameter:
+*	int16_t:	X-axis quaternion data multiplied by 1000 (for 3 decimal places accuracy)
+*******************************************************************************************/
+int16_t NAxisMotion::readQuatX(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateQuat();
+	}
+	return quatData.x;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the y-axis of the quaternion data
+*Input Parameters: None
+*Return Parameter:
+*	int16_t:	Y-axis quaternion data multiplied by 1000 (for 3 decimal places accuracy)
+*******************************************************************************************/
+int16_t NAxisMotion::readQuatY(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateQuat();
+	}
+	return quatData.y;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the z-axis of the quaternion data
+*Input Parameters: None
+*Return Parameter:
+*	int16_t:	Z-axis quaternion data multiplied by 1000 (for 3 decimal places accuracy)
+*******************************************************************************************/
+int16_t NAxisMotion::readQuatZ(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateQuat();
+	}
+	return quatData.z;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the heading(yaw) of the euler data
+*Input Parameters: None
+*Return Parameter:
+*	float:	Heading of the euler data 
+*******************************************************************************************/
+float NAxisMotion::readEulerHeading(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateEuler();
+	}
+	return eulerData.h;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the roll of the euler data
+*Input Parameters: None
+*Return Parameter:
+*	float:	Roll of the euler data 
+*******************************************************************************************/
+float NAxisMotion::readEulerRoll(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateEuler();
+	}
+	return eulerData.r;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the pitch of the euler data
+*Input Parameters: None
+*Return Parameter:
+*	float:	Pitch of the euler data 
+*******************************************************************************************/
+float NAxisMotion::readEulerPitch(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateEuler();
+	}
+	return eulerData.p;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the x-axis of the linear acceleration data
+*					(accelerometer data without the gravity vector)
+*Input Parameters: None
+*Return Parameter:
+*	float:	X-axis Linear Acceleration data in m/s2
+*******************************************************************************************/
+float NAxisMotion::readLinearAccelX(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateLinearAccel();
+	}
+	return linearAccelData.x;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the y-axis of the linear acceleration data
+*					(accelerometer data without the gravity vector)
+*Input Parameters: None
+*Return Parameter:
+*	float:	Y-axis Linear Acceleration data in m/s2
+*******************************************************************************************/
+float NAxisMotion::readLinearAccelY(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateLinearAccel();
+	}
+	return linearAccelData.y;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the z-axis of the linear acceleration data
+*					(accelerometer data without the gravity vector)
+*Input Parameters: None
+*Return Parameter:
+*	float:	Z-axis Linear Acceleration data in m/s2
+*******************************************************************************************/
+float NAxisMotion::readLinearAccelZ(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateLinearAccel();
+	}
+	return linearAccelData.z;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the x-axis of the gravity acceleration data
+*					(accelerometer data with only the gravity vector)
+*Input Parameters: None
+*Return Parameter:
+*	float:	X-axis Gravity Acceleration data in m/s2
+*******************************************************************************************/
+float NAxisMotion::readGravAccelX(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateGravAccel();
+	}
+	return gravAccelData.x;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the y-axis of the gravity acceleration data
+*					(accelerometer data with only the gravity vector)
+*Input Parameters: None
+*Return Parameter:
+*	float:	Y-axis Gravity Acceleration data in m/s2
+*******************************************************************************************/
+float NAxisMotion::readGravAccelY(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateGravAccel();
+	}
+	return gravAccelData.y;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the z-axis of the gravity acceleration data
+*					(accelerometer data with only the gravity vector)
+*Input Parameters: None
+*Return Parameter:
+*	float:	Z-axis Gravity Acceleration data in m/s2
+*******************************************************************************************/
+float NAxisMotion::readGravAccelZ(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateGravAccel();
+	}
+	return gravAccelData.z;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the accelerometer calibration status
+*Input Parameters: None
+*Return Parameter:
+*	uint8_t:	Accelerometer calibration status, 0-3 (0 - low, 3 - high)
+*******************************************************************************************/
+uint8_t NAxisMotion::readAccelCalibStatus(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateCalibStatus();
+	}
+	return calibStatus.accel;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the gyroscope calibration status
+*Input Parameters: None
+*Return Parameter:
+*	uint8_t:	Gyroscope calibration status, 0-3 (0 - low, 3 - high)
+*******************************************************************************************/
+uint8_t NAxisMotion::readGyroCalibStatus(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateCalibStatus();
+	}
+	return calibStatus.gyro;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the magnetometer calibration status
+*Input Parameters: None
+*Return Parameter:
+*	uint8_t:	Magnetometer calibration status, 0-3 (0 - low, 3 - high)
+*******************************************************************************************/
+uint8_t NAxisMotion::readMagCalibStatus(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateCalibStatus();
+	}
+	return calibStatus.mag;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the system calibration status
+*Input Parameters: None
+*Return Parameter:
+*	uint8_t:	System calibration status, 0-3 (0 - low, 3 - high)
+*******************************************************************************************/
+uint8_t NAxisMotion::readSystemCalibStatus(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateCalibStatus();
+	}
+	return calibStatus.system;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the accelerometer range
+*Input Parameters: None
+*Return Parameter:
+*	uint8_t range: Range of the accelerometer
+*			--------------------------------------
+*			Constant Definition		Constant Value
+*			--------------------------------------
+*			ACCEL_RANGE_2G			0X00
+*			ACCEL_RANGE_4G			0X01
+*			ACCEL_RANGE_8G			0X02
+*			ACCEL_RANGE_16G			0X03
+*******************************************************************************************/
+uint8_t NAxisMotion::readAccelRange(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateAccelConfig();
+	}
+	return accelStatus.range;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the accelerometer bandwidth
+*Input Parameters: None
+*Return Parameter:
+*	uint8_t bandwidth: Bandwidth of the accelerometer
+*			--------------------------------------
+*			Constant Definition		Constant Value
+*			--------------------------------------
+*			ACCEL_BW_7_81HZ			0x00
+*			ACCEL_BW_15_63HZ		0x01
+*			ACCEL_BW_31_25HZ		0x02
+*			ACCEL_BW_62_5HZ			0X03
+*			ACCEL_BW_125HZ			0X04
+*			ACCEL_BW_250HZ			0X05
+*			ACCEL_BW_500HZ			0X06
+*			ACCEL_BW_1000HZ			0X07
+*******************************************************************************************/
+uint8_t NAxisMotion::readAccelBandwidth(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateAccelConfig();
+	}
+	return accelStatus.bandwidth;
+}
+
+/*******************************************************************************************
+*Description: This function is used to return the accelerometer power mode
+*Input Parameters: None
+*Return Parameter:
+*	uint8_t powerMode: Power mode of the accelerometer
+*			--------------------------------------
+*			Constant Definition		Constant Value
+*			--------------------------------------
+*			ACCEL_NORMAL			0X00
+*			ACCEL_SUSPEND			0X01
+*			ACCEL_LOWPOWER_1		0X02
+*			ACCEL_STANDBY			0X03
+*			ACCEL_LOWPOWER_2		0X04
+*			ACCEL_DEEPSUSPEND		0X05
+*******************************************************************************************/
+uint8_t NAxisMotion::readAccelPowerMode(void)
+{
+	if (dataUpdateMode == AUTO)
+	{
+		updateAccelConfig();
+	}
+	return accelStatus.powerMode;
+}
+
+
+/******************** Bridge Functions for the Sensor API to control the Arduino Hardware******************************************/
+signed char BNO055_I2C_bus_read(unsigned char dev_addr,unsigned char reg_addr, unsigned char *reg_data, unsigned char cnt)
+{
+	BNO055_RETURN_FUNCTION_TYPE comres = BNO055_ZERO_U8X;
+	I2C.beginTransmission(dev_addr);	//Start of transmission
+	I2C.write(reg_addr);				//Desired start register
+	comres = I2C.endTransmission();		//Stop of transmission
+	delayMicroseconds(150);				//Caution Delay
+	I2C.requestFrom(dev_addr, cnt);		//Request data
+	while(I2C.available())				//The slave device may send less than requested (burst read)
+	{
+		*reg_data = I2C.read();			//Receive a byte
+		reg_data++;						//Increment pointer
+	}
+	return comres;
+}
+
+
+signed char BNO055_I2C_bus_write(unsigned char dev_addr,unsigned char reg_addr, unsigned char *reg_data, unsigned char cnt)
+{
+	BNO055_RETURN_FUNCTION_TYPE comres = BNO055_ZERO_U8X;
+	I2C.beginTransmission(dev_addr);	//Start of transmission
+	I2C.write(reg_addr);				//Desired start register
+	for(unsigned char index = 0; index < cnt; index++) //Note that the BNO055 supports burst write
+	{
+		I2C.write(*reg_data);			//Write the data
+		reg_data++;						//Increment pointer
+	}
+	comres = I2C.endTransmission();		//Stop of transmission
+	delayMicroseconds(150);				//Caution Delay
+	return comres;
+}
+
+void _delay(u_32 period)
+{
+	delay(period);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/NAxisMotion.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/NAxisMotion.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/NAxisMotion.h	(revision 136)
@@ -0,0 +1,711 @@
+/****************************************************************************
+* Copyright (C) 2011 - 2014 Bosch Sensortec GmbH
+*
+* NAxisMotion.h
+* Date: 2015/02/10
+* Revision: 3.0 $
+*
+* Usage:        Header file of the C++ Wrapper for the BNO055 Sensor API
+*
+****************************************************************************
+*
+* Added Arduino M0/M0 Pro support
+*
+* Date: 07/27/2015
+*
+* Modified by: Arduino.org development Team.
+*
+****************************************************************************
+/***************************************************************************
+* License:
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+*   Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+*
+*   Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+*
+*   Neither the name of the copyright holder nor the names of the
+*   contributors may be used to endorse or promote products derived from
+*   this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
+* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+*
+* The information provided is believed to be accurate and reliable.
+* The copyright holder assumes no responsibility for the consequences of use
+* of such information nor for any infringement of patents or
+* other rights of third parties which may result from its use.
+* No license is granted by implication or otherwise under any patent or
+* patent rights of the copyright holder.
+*/
+#ifndef __NAXISMOTION_H__
+#define __NAXISMOTION_H__
+
+
+
+
+extern "C" {
+#include <utility/BNO055.h>
+}
+#include <Wire.h>
+#include "Arduino.h"
+
+//Custom Data structures
+//Structure to hold the calibration status
+struct bno055_calib_stat_t {
+	uint8_t accel;	//Calibration Status of the accelerometer
+	uint8_t mag;	//Calibration Status of the magnetometer
+	uint8_t gyro;	//Calibration Status of the gyroscope
+	uint8_t system;	//Calibration Status of the overall system
+};
+
+//Structure to hold the accelerometer configurations
+struct bno055_accel_stat_t {
+	uint8_t range;		//Range: 2G - 16G
+	uint8_t bandwidth;	//Bandwidth: 7.81Hz - 1000Hz
+	uint8_t powerMode;	//Power mode: Normal - Deep suspend
+};
+
+//GPIO pins used for controlling the Sensor
+#define RESET_PIN		4		//GPIO to reset the BNO055 (RESET pin has to be HIGH for the BNO055 to operate)
+
+#if defined(__AVR_ATmega32U4__) //Arduino Yun and Leonardo
+#define INT_PIN			4		//GPIO to receive the Interrupt from the BNO055 for the Arduino Uno(Interrupt is visible on the INT LED on the Shield)
+#elif defined(ARDUINO_ARCH_SAM)   //INT_PIN is the interrupt number not the interrupt pin
+#define INT_PIN			2   
+#elif defined(ARDUINO_ARCH_SAMD)
+#define INT_PIN 		7  
+#else
+#define INT_PIN			0
+#endif
+
+#define ENABLE			1		//For use in function parameters
+#define DISABLE			0		//For use in function parameters
+#define NO_MOTION		1		//Enables the no motion interrupt
+#define SLOW_MOTION		0		//Enables the slow motion interrupt
+#define ANDROID			1		//To set the Output Data Format to Android style
+
+#if defined(ARDUINO_SAM_DUE)
+#define I2C				Wire1	//Define which I2C bus is used. Wire1 for the Arduino Due
+#else
+#define I2C             Wire    //Or Wire
+#endif
+
+#define INIT_PERIOD			600		//Initialization period set to 600ms
+#define RESET_PERIOD		300		//Reset period set to 300ms
+#define POST_INIT_PERIOD	50		//Post initialization delay of 50ms
+#define MANUAL				1		//To manually call the update data functions
+#define AUTO				0		//To automatically call the update data functions
+class NAxisMotion {
+private:
+	bool 	dataUpdateMode;								//Variable to store the mode of updating data
+	struct 	bno055_t 			myBNO;					//Structure that stores the device information
+	struct 	bno055_accel_float_t	accelData;				//Structure that holds the accelerometer data
+	struct 	bno055_mag_float_t	magData;				//Structure that holds the magnetometer data
+	struct 	bno055_gyro_float_t 	gyroData;				//Structure that holds the gyroscope data
+	struct 	bno055_quaternion_t	quatData;				//Structure that holds the quaternion data
+	struct 	bno055_euler_float_t	eulerData;				//Structure that holds the euler data
+	struct 	bno055_linear_accel_float_t	linearAccelData;	//Structure that holds the linear acceleration data
+	struct 	bno055_gravity_float_t	gravAccelData;			//Structure that holds the gravity acceleration data
+	struct 	bno055_calib_stat_t	calibStatus;			//Structure to hold the calibration status
+	struct 	bno055_accel_stat_t	accelStatus;			//Structure to hold the status of the accelerometer configurations
+public:
+	//Function Declarations
+	/*******************************************************************************************
+	*Description: Constructor of the class with the default initialization
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	NAxisMotion();
+
+	/*******************************************************************************************
+	*Description: Function with the bare minimum initialization
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+#if defined(ARDUINO_ARCH_SAMD)
+	void initSensor(unsigned int address = 0x29);
+#else /* !defined(ARDUINO_ARCH_SAMD) */    
+	void initSensor(unsigned int address = 0x28);
+#endif /* defined(ARDUINO_ARCH_SAMD) */  
+
+	/*******************************************************************************************
+	*Description: This function is used to reset the BNO055
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void resetSensor(unsigned int address);
+
+	/*******************************************************************************************
+	*Description: This function is used to set the operation mode of the BNO055
+	*Input Parameters:
+	*	byte operationMode: To assign which operation mode the device has to
+	*				---------------------------------------------------
+	*				Constant Definition			Constant Value	Comment
+	*				---------------------------------------------------
+	*				OPERATION_MODE_CONFIG		0x00			Configuration Mode
+	*																(Transient Mode)
+	*				OPERATION_MODE_ACCONLY		0x01			Accelerometer only
+	*				OPERATION_MODE_MAGONLY		0x02			Magnetometer only
+	*				OPERATION_MODE_GYRONLY		0x03			Gyroscope only
+	*				OPERATION_MODE_ACCMAG		0x04			Accelerometer and Magnetometer only
+	*				OPERATION_MODE_ACCGYRO		0x05			Accelerometer and Gyroscope only
+	*				OPERATION_MODE_MAGGYRO		0x06			Magnetometer and Gyroscope only
+	*				OPERATION_MODE_AMG			0x07			Accelerometer, Magnetometer and
+	*																Gyroscope (without fusion)
+	*				OPERATION_MODE_IMUPLUS		0x08			Inertial Measurement Unit
+	*																(Accelerometer and Gyroscope
+	*																	Sensor Fusion Mode)
+	*				OPERATION_MODE_COMPASS		0x09			Tilt Compensated Compass
+	*																(Accelerometer and Magnetometer
+	*																	Sensor Fusion Mode)
+	*				OPERATION_MODE_M4G			0x0A			Magnetometer and Accelerometer Sensor
+	*																Fusion Mode
+	*				OPERATION_MODE_NDOF_FMC_OFF	0x0B			9 Degrees of Freedom Sensor Fusion
+	*																with Fast Magnetometer Calibration Off
+	*				OPERATION_MODE_NDOF			0x0C			9 Degrees of Freedom Sensor Fusion
+	*Return Parameter: None
+	*******************************************************************************************/
+	void setOperationMode(byte operationMode);
+
+	/*******************************************************************************************
+	*Description: This function is used to set the power mode
+	*Input Parameters:
+	*	byte powerMode: To assign the power mode the device has to switch to
+	*				--------------------------------------
+	*				Constant Definition		Constant Value
+	*				--------------------------------------
+	*				POWER_MODE_NORMAL		0x00
+	*				POWER_MODE_LOWPOWER		0x01
+	*				POWER_MODE_SUSPEND		0x02
+	*Return Parameter:
+	*******************************************************************************************/
+	void setPowerMode(byte powerMode);
+
+	/*******************************************************************************************
+	*Description: This function is used to update the accelerometer data in m/s2
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void updateAccel(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to update the magnetometer data in microTesla
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void updateMag(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to update the gyroscope data in deg/s
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void updateGyro(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to update the quaternion data
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void updateQuat(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to update the euler data
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void updateEuler(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to update the linear acceleration data in m/s2
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void updateLinearAccel(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to update the gravity acceleration data in m/s2
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void updateGravAccel(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to update the calibration status
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void updateCalibStatus(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to write the accelerometer configurations
+	*Input Parameters:
+	*	uint8_t range: To assign the range of the accelerometer
+	*			--------------------------------------
+	*			Constant Definition		Constant Value
+	*			--------------------------------------
+	*			ACCEL_RANGE_2G			0X00
+	*			ACCEL_RANGE_4G			0X01
+	*			ACCEL_RANGE_8G			0X02
+	*			ACCEL_RANGE_16G			0X03
+	*	uint8_t bandwidth: To assign the filter bandwidth of the accelerometer
+	*			--------------------------------------
+	*			Constant Definition		Constant Value
+	*			--------------------------------------
+	*			ACCEL_BW_7_81HZ			0x00
+	*			ACCEL_BW_15_63HZ		0x01
+	*			ACCEL_BW_31_25HZ		0x02
+	*			ACCEL_BW_62_5HZ			0X03
+	*			ACCEL_BW_125HZ			0X04
+	*			ACCEL_BW_250HZ			0X05
+	*			ACCEL_BW_500HZ			0X06
+	*			ACCEL_BW_1000HZ			0X07
+	*	uint8_t powerMode: To assign the power mode of the accelerometer
+	*			--------------------------------------
+	*			Constant Definition		Constant Value
+	*			--------------------------------------
+	*			ACCEL_NORMAL			0X00
+	*			ACCEL_SUSPEND			0X01
+	*			ACCEL_LOWPOWER_1		0X02
+	*			ACCEL_STANDBY			0X03
+	*			ACCEL_LOWPOWER_2		0X04
+	*			ACCEL_DEEPSUSPEND		0X05
+	*Return Parameter: None
+	*******************************************************************************************/
+	void writeAccelConfig(uint8_t range, uint8_t bandwidth, uint8_t powerMode);
+
+	/*******************************************************************************************
+	*Description: This function is used to update the accelerometer configurations
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void updateAccelConfig(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to control which axis of the accelerometer triggers the
+	*				interrupt
+	*Input Parameters:
+	*	bool xStatus: To know whether the x axis has to trigger the interrupt
+	*				---------------------------------------------------
+	*				Constant Definition		Constant Value	Comment
+	*				---------------------------------------------------
+	*				ENABLE					1				Enables interrupts from that axis
+	*				DISABLE					0				Disables interrupts from that axis
+	*	bool yStatus: To know whether the x axis has to trigger the interrupt
+	*				---------------------------------------------------
+	*				Constant Definition		Constant Value	Comment
+	*				---------------------------------------------------
+	*				ENABLE					1				Enables interrupts from that axis
+	*				DISABLE					0				Disables interrupts from that axis
+	*	bool zStatus: To know whether the x axis has to trigger the interrupt
+	*				---------------------------------------------------
+	*				Constant Definition		Constant Value	Comment
+	*				---------------------------------------------------
+	*				ENABLE					1				Enables interrupts from that axis
+	*				DISABLE					0				Disables interrupts from that axis
+	*Return Parameter: None
+	*******************************************************************************************/
+	void accelInterrupts(bool xStatus, bool yStatus, bool zStatus);
+
+	/*******************************************************************************************
+	*Description: This function is used to reset the interrupt line
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void resetInterrupt(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to enable the any motion interrupt based on the
+	*				accelerometer
+	*Input Parameters:
+	*	uint8_t threshold: The threshold that triggers the any motion interrupt
+	*				The threshold should be entered as an integer. The corresponding value of
+	*					the threshold depends on the range that has been set on the
+	*					accelerometer. Below is a table showing the value of 1LSB in
+	*					corresponding units.
+	*				Resolution:
+	*					ACCEL_RANGE_2G, 1LSB = 3.91mg = ~0.03835m/s2
+	*					ACCEL_RANGE_4G, 1LSB = 7.81mg = ~0.07661m/s2
+	*					ACCEL_RANGE_8G, 1LSB = 15.6mg = ~0.15303m/s2
+	*					ACCEL_RANGE_16G, 1LSB = 31.3mg = ~0.30705m/s2
+	*				Maximum:
+	*					ACCEL_RANGE_2G, 1LSB = 996mg = ~9.77076m/s2,
+	*					ACCEL_RANGE_4G, 1LSB = 1.99g = ~19.5219m/s2
+	*					ACCEL_RANGE_8G, 1LSB = 3.98g = ~39.0438m/s2
+	*					ACCEL_RANGE_16G, 1LSB = 7.97g = ~97.1857m/s2
+	*	uint8_t duration: The duration for which the desired threshold exist
+	*				The time difference between the successive acceleration signals depends
+	*				on the selected bandwidth and equates to 1/(2*bandwidth).
+	*				In order to suppress false triggers, the interrupt is only generated (cleared)
+	*				if a certain number N of consecutive slope data points is larger (smaller)
+	*				than the slope 'threshold'. This number is set by the 'duration'.
+	*				It is N = duration + 1.
+	*				Resolution:
+	*					ACCEL_BW_7_81HZ, 1LSB = 64ms
+	*					ACCEL_BW_15_63HZ, 1LSB = 32ms
+	*					ACCEL_BW_31_25HZ, 1LSB = 16ms
+	*					ACCEL_BW_62_5HZ, 1LSB = 8ms
+	*					ACCEL_BW_125HZ, 1LSB = 4ms
+	*					ACCEL_BW_250HZ, 1LSB = 2ms
+	*					ACCEL_BW_500HZ, 1LSB = 1ms
+	*					ACCEL_BW_1000HZ, 1LSB = 0.5ms
+	*Return Parameter: None
+	*******************************************************************************************/
+	void enableAnyMotion(uint8_t threshold, uint8_t duration);
+
+	/*******************************************************************************************
+	*Description: This function is used to disable the any motion interrupt
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void disableAnyMotion(void);
+
+
+	/*******************************************************************************************
+	*Description: This function is used to enable the slow or no motion interrupt based on the
+	*				accelerometer
+	*Input Parameters:
+	*	uint8_t threshold: The threshold that triggers the no motion interrupt
+	*				The threshold should be entered as an integer. The corresponding value of
+	*					the threshold depends on the range that has been set on the
+	*					accelerometer. Below is a table showing the value of 1LSB in
+	*					corresponding units.
+	*				Resolution:
+	*					ACCEL_RANGE_2G, 1LSB = 3.91mg = ~0.03835m/s2
+	*					ACCEL_RANGE_4G, 1LSB = 7.81mg = ~0.07661m/s2
+	*					ACCEL_RANGE_8G, 1LSB = 15.6mg = ~0.15303m/s2
+	*					ACCEL_RANGE_16G, 1LSB = 31.3mg = ~0.30705m/s2
+	*				Maximum:
+	*					ACCEL_RANGE_2G, 1LSB = 996mg = ~9.77076m/s2,
+	*					ACCEL_RANGE_4G, 1LSB = 1.99g = ~19.5219m/s2
+	*					ACCEL_RANGE_8G, 1LSB = 3.98g = ~39.0438m/s2
+	*					ACCEL_RANGE_16G, 1LSB = 7.97g = ~97.1857m/s2
+	*	uint8_t duration: The duration for which the desired threshold should be surpassed
+	*				The time difference between the successive acceleration signals depends
+	*				on the selected bandwidth and equates to 1/(2*bandwidth).
+	*				In order to suppress false triggers, the interrupt is only generated (cleared)
+	*				if a certain number N of consecutive slope data points is larger (smaller)
+	*				than the slope 'threshold'. This number is set by the 'duration'.
+	*				It is N = duration + 1.
+	*				Resolution:
+	*					ACCEL_BW_7_81HZ, 1LSB = 64ms
+	*					ACCEL_BW_15_63HZ, 1LSB = 32ms
+	*					ACCEL_BW_31_25HZ, 1LSB = 16ms
+	*					ACCEL_BW_62_5HZ, 1LSB = 8ms
+	*					ACCEL_BW_125HZ, 1LSB = 4ms
+	*					ACCEL_BW_250HZ, 1LSB = 2ms
+	*					ACCEL_BW_500HZ, 1LSB = 1ms
+	*					ACCEL_BW_1000HZ, 1LSB = 0.5ms
+	*	bool motion: To trigger either a Slow motion or a No motion interrupt
+	*				---------------------------------------------------
+	*				Constant Definition		Constant Value	Comment
+	*				---------------------------------------------------
+	*				NO_MOTION				1				Enables the no motion interrupt
+	*				SLOW_MOTION				0				Enables the slow motion interrupt
+	*Return Parameter: None
+	*******************************************************************************************/
+	void enableSlowNoMotion(uint8_t threshold, uint8_t duration, bool motion);
+
+	/*******************************************************************************************
+	*Description: This function is used to disable the slow or no motion interrupt
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void disableSlowNoMotion(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to change the mode of updating the local data
+	*Input Parameters: None
+	*Return Parameter: None
+	*******************************************************************************************/
+	void setUpdateMode(bool updateMode);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the x-axis of the accelerometer data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	X-axis accelerometer data in m/s2
+	*******************************************************************************************/
+	float readAccelX(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the y-axis of the accelerometer data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Y-axis accelerometer data in m/s2
+	*******************************************************************************************/
+	float readAccelY(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the z-axis of the accelerometer data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Z-axis accelerometer data in m/s2
+	*******************************************************************************************/
+	float readAccelZ(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the x-axis of the gyroscope data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	X-axis gyroscope data in deg/s
+	*******************************************************************************************/
+	float readGyroX(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the y-axis of the gyroscope data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Y-axis gyroscope data in deg/s
+	*******************************************************************************************/
+	float readGyroY(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the z-axis of the gyroscope data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Z-axis gyroscope data in deg/s
+	*******************************************************************************************/
+	float readGyroZ(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the x-axis of the magnetometer data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	X-axis magnetometer data in µT
+	*******************************************************************************************/
+	float readMagX(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the y-axis of the magnetometer data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Y-axis magnetometer data in µT
+	*******************************************************************************************/
+	float readMagY(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the z-axis of the magnetometer data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Z-axis magnetometer data in µT
+	*******************************************************************************************/
+	float readMagZ(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the w-axis of the quaternion data
+	*Input Parameters: None
+	*Return Parameter:
+	*	int16_t:	W-axis quaternion data multiplied by 1000 (for 3 decimal places accuracy)
+	*******************************************************************************************/
+	int16_t readQuatW(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the x-axis of the quaternion data
+	*Input Parameters: None
+	*Return Parameter:
+	*	int16_t:	X-axis quaternion data multiplied by 1000 (for 3 decimal places accuracy)
+	*******************************************************************************************/
+	int16_t readQuatX(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the y-axis of the quaternion data
+	*Input Parameters: None
+	*Return Parameter:
+	*	int16_t:	Y-axis quaternion data multiplied by 1000 (for 3 decimal places accuracy)
+	*******************************************************************************************/
+	int16_t readQuatY(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the z-axis of the quaternion data
+	*Input Parameters: None
+	*Return Parameter:
+	*	int16_t:	Z-axis quaternion data multiplied by 1000 (for 3 decimal places accuracy)
+	*******************************************************************************************/
+	int16_t readQuatZ(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the heading(yaw) of the euler data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Heading of the euler data
+	*******************************************************************************************/
+	float readEulerHeading(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the roll of the euler data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Roll of the euler data
+	*******************************************************************************************/
+	float readEulerRoll(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the pitch of the euler data
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Pitch of the euler data
+	*******************************************************************************************/
+	float readEulerPitch(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the x-axis of the linear acceleration data
+	*					(accelerometer data without the gravity vector)
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	X-axis Linear Acceleration data in m/s2
+	*******************************************************************************************/
+	float readLinearAccelX(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the y-axis of the linear acceleration data
+	*					(accelerometer data without the gravity vector)
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Y-axis Linear Acceleration data in m/s2
+	*******************************************************************************************/
+	float readLinearAccelY(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the z-axis of the linear acceleration data
+	*					(accelerometer data without the gravity vector)
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Z-axis Linear Acceleration data in m/s2
+	*******************************************************************************************/
+	float readLinearAccelZ(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the x-axis of the gravity acceleration data
+	*					(accelerometer data with only the gravity vector)
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	X-axis Gravity Acceleration data in m/s2
+	*******************************************************************************************/
+	float readGravAccelX(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the y-axis of the gravity acceleration data
+	*					(accelerometer data with only the gravity vector)
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Y-axis Gravity Acceleration data in m/s2
+	*******************************************************************************************/
+	float readGravAccelY(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the z-axis of the gravity acceleration data
+	*					(accelerometer data with only the gravity vector)
+	*Input Parameters: None
+	*Return Parameter:
+	*	float:	Z-axis Gravity Acceleration data in m/s2
+	*******************************************************************************************/
+	float readGravAccelZ(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the accelerometer calibration status
+	*Input Parameters: None
+	*Return Parameter:
+	*	uint8_t:	Accelerometer calibration status, 0-3 (0 - low, 3 - high)
+	*******************************************************************************************/
+	uint8_t readAccelCalibStatus(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the gyroscope calibration status
+	*Input Parameters: None
+	*Return Parameter:
+	*	uint8_t:	Gyroscope calibration status, 0-3 (0 - low, 3 - high)
+	*******************************************************************************************/
+	uint8_t readGyroCalibStatus(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the magnetometer calibration status
+	*Input Parameters: None
+	*Return Parameter:
+	*	uint8_t:	Magnetometer calibration status, 0-3 (0 - low, 3 - high)
+	*******************************************************************************************/
+	uint8_t readMagCalibStatus(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the system calibration status
+	*Input Parameters: None
+	*Return Parameter:
+	*	uint8_t:	System calibration status, 0-3 (0 - low, 3 - high)
+	*******************************************************************************************/
+	uint8_t readSystemCalibStatus(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the accelerometer range
+	*Input Parameters: None
+	*Return Parameter:
+	*	uint8_t range: Range of the accelerometer
+	*			--------------------------------------
+	*			Constant Definition		Constant Value
+	*			--------------------------------------
+	*			ACCEL_RANGE_2G			0X00
+	*			ACCEL_RANGE_4G			0X01
+	*			ACCEL_RANGE_8G			0X02
+	*			ACCEL_RANGE_16G			0X03
+	*******************************************************************************************/
+	uint8_t readAccelRange(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the accelerometer bandwidth
+	*Input Parameters: None
+	*Return Parameter:
+	*	uint8_t bandwidth: Bandwidth of the accelerometer
+	*			--------------------------------------
+	*			Constant Definition		Constant Value
+	*			--------------------------------------
+	*			ACCEL_BW_7_81HZ			0x00
+	*			ACCEL_BW_15_63HZ		0x01
+	*			ACCEL_BW_31_25HZ		0x02
+	*			ACCEL_BW_62_5HZ			0X03
+	*			ACCEL_BW_125HZ			0X04
+	*			ACCEL_BW_250HZ			0X05
+	*			ACCEL_BW_500HZ			0X06
+	*			ACCEL_BW_1000HZ			0X07
+	*******************************************************************************************/
+	uint8_t readAccelBandwidth(void);
+
+	/*******************************************************************************************
+	*Description: This function is used to return the accelerometer power mode
+	*Input Parameters: None
+	*Return Parameter:
+	*	uint8_t powerMode: Power mode of the accelerometer
+	*			--------------------------------------
+	*			Constant Definition		Constant Value
+	*			--------------------------------------
+	*			ACCEL_NORMAL			0X00
+	*			ACCEL_SUSPEND			0X01
+	*			ACCEL_LOWPOWER_1		0X02
+	*			ACCEL_STANDBY			0X03
+	*			ACCEL_LOWPOWER_2		0X04
+	*			ACCEL_DEEPSUSPEND		0X05
+	*******************************************************************************************/
+	uint8_t readAccelPowerMode(void);
+
+
+
+};
+
+/******************** Bridge Functions for the Sensor API to control the Arduino Hardware******************************************/
+signed char BNO055_I2C_bus_read(unsigned char,unsigned char, unsigned char*, unsigned char);
+signed char BNO055_I2C_bus_write(unsigned char ,unsigned char , unsigned char* , unsigned char );
+void _delay(u_32);
+
+#endif __NAXISMOTION_H__
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/README.md
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/README.md	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/README.md	(revision 136)
@@ -0,0 +1,43 @@
+NAxisMotion
+-----------
+The NAxisMotion.cpp and NAxisMotion.h files are C++ wrapper codes for the 
+BNO055.c and BNO055.h Sensor API. The wrapper code has been designed to
+abstract the Sensor API and also to give an idea on how to use the 
+advanced features in the Sensor API. Apart from that it acts a bridge
+between the Sensor API and the Arduino framework. Copy this library into
+"yourArduinoInstallation"/libraries folder.
+	
+	
+-------------------------------------------------------------------------------	
+There are 4 examples with the NAxisMotion library. 
+ 
+ - BareMinimum: This example code is as the name says the minimum code
+	required to use the NAxisMotion sensor shield.
+	
+ - Euler: This example code reads out the Euler angles in the NDoF mode to
+	the Serial Monitor. It also reads out the Calibration Status. Each sensor
+	and the System itself has its own Calibration Status. See below on how to
+	calibrate each of the sensors.
+
+ - Accelerometer: This example code reads out the Accelerometer data and
+	associated data which are the Linear Acceleration data, which is the
+	Accelerometer data without the gravity vector, the other is the Gravity
+	Acceleration data, which is only the gravity vector.
+	
+ - Motion: This example code is a game to test how steadily you can move an
+	object, in this case it is the shield with the Arduino board. The goal is
+	to demonstrate on how to use the Any motion and No motion Interrupts.
+	
+Calibration helps the Sensor identify its environment and automatically
+determine offsets. Follow the instructions below to calibrate your sensor.
+
+ - Gyroscope: Keep it steady and do not move it. Preferably keep it on a fixed
+	surface such as a table.
+	
+ - Accelerometer: Rotate the shield slowly and pause at every 45deg for a
+	second. Rotate one 1 axis at a time. Preferably rotate along 2 axes.
+	
+ - Magnetometer: Move the magnetometer in a large 8 like pattern a few times
+	gently.
+	
+	
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=9 Axes Motion
+version=1.0
+author=Bosch Sensortec GmbH
+maintainer=Arduino <support@arduino.org>
+sentence=Allows controlling the Arduino 9 Axes Motion Shield.
+paragraph=
+category=Device Control
+url=
+architectures=*
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/utility/BNO055.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/utility/BNO055.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/utility/BNO055.c	(revision 136)
@@ -0,0 +1,17303 @@
+/*
+*
+****************************************************************************
+* Copyright (C) 2013 - 2014 Bosch Sensortec GmbH
+*
+* File : bno055.c
+*
+* Date : 2014/12/12
+*
+* Revision : 2.0.2 $
+*
+* Usage: Sensor Driver file for BNO055 sensor
+*
+* **************************************************************************
+*
+* Added Arduino M0/M0 Pro support
+*
+* Date: 07/27/2015
+*
+* Modified by: Arduino.org development Team.
+*
+****************************************************************************
+* \section License
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+*   Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+*
+*   Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+*
+*   Neither the name of the copyright holder nor the names of the
+*   contributors may be used to endorse or promote products derived from
+*   this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER
+* OR CONTRIBUTORS BE LIABLE FOR ANY
+* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+* OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT NOT LIMITED TO,
+* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+*
+* The information provided is believed to be accurate and reliable.
+* The copyright holder assumes no responsibility
+* for the consequences of use
+* of such information nor for any infringement of patents or
+* other rights of third parties which may result from its use.
+* No license is granted by implication or otherwise under any patent or
+* patent rights of the copyright holder.
+**************************************************************************/
+
+/*********************************************************/
+/*				INCLUDES	*/
+/*******************************************************/
+#include "BNO055.h"
+/*! file <BNO055 >
+    brief <Sensor driver for BNO055> */
+/*	STRUCTURE DEFINITIONS	*/
+static struct bno055_t *p_bno055;
+
+#define ERROR ERROR_BOSCH
+/*	 LOCAL FUNCTIONS	*/
+/*!
+ *	@brief
+ *	This function is used for initialize
+ *	bus read, bus write function pointers,device
+ *	address,accel revision id, gyro revision id
+ *	mag revision id, software revision id, boot loader
+ *	revision id and page id
+ *
+ *	@param  bno055 - structure pointer
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While changing the parameter of the bno055_t
+ *	consider the following point:
+ *	Changing the reference value of the parameter
+ *	will changes the local copy or local reference
+ *	make sure your changes will not
+ *	affect the reference value of the parameter
+ *	(Better case don't change the reference value of the parameter)
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_init(struct bno055_t *bno055)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8 = BNO055_ZERO_U8X;
+	u_8 v_page_zero_u_8 = PAGE_ZERO;
+	/* Array holding the Software revision id
+	*/
+	u_8 a_SW_ID_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	/* stuct parameters are assign to bno055*/
+	p_bno055 = bno055;
+	/* Write the default page as zero*/
+	com_rslt = p_bno055->BNO055_BUS_WRITE_FUNC
+	(p_bno055->dev_addr,
+	BNO055_PAGE_ID__REG, &v_page_zero_u_8, BNO055_ONE_U8X);
+	/* Read the chip id of the sensor from page
+	zero 0x00 register*/
+	com_rslt += p_bno055->BNO055_BUS_READ_FUNC
+	(p_bno055->dev_addr,
+	BNO055_CHIP_ID__REG, &v_data_u_8, BNO055_ONE_U8X);
+	p_bno055->chip_id = v_data_u_8;
+	/* Read the accel revision id from page
+	zero 0x01 register*/
+	com_rslt += p_bno055->BNO055_BUS_READ_FUNC
+	(p_bno055->dev_addr,
+	BNO055_ACCEL_REV_ID__REG, &v_data_u_8, BNO055_ONE_U8X);
+	p_bno055->accel_rev_id = v_data_u_8;
+	/* Read the mag revision id from page
+	zero 0x02 register*/
+	com_rslt += p_bno055->BNO055_BUS_READ_FUNC
+	(p_bno055->dev_addr,
+	BNO055_MAG_REV_ID__REG, &v_data_u_8, BNO055_ONE_U8X);
+	p_bno055->mag_rev_id = v_data_u_8;
+	/* Read the gyro revision id from page
+	zero 0x02 register*/
+	com_rslt += p_bno055->BNO055_BUS_READ_FUNC
+	(p_bno055->dev_addr,
+	BNO055_GYRO_REV_ID__REG, &v_data_u_8, BNO055_ONE_U8X);
+	p_bno055->gyro_rev_id = v_data_u_8;
+	/* Read the boot loader revision from page
+	zero 0x06 register*/
+	com_rslt += p_bno055->BNO055_BUS_READ_FUNC
+	(p_bno055->dev_addr,
+	BNO055_BL_REV_ID__REG, &v_data_u_8, BNO055_ONE_U8X);
+	p_bno055->bl_rev_id = v_data_u_8;
+	/* Read the software revision id from page
+	zero 0x04 and 0x05 register( 2 bytes of data)*/
+	com_rslt += p_bno055->BNO055_BUS_READ_FUNC(p_bno055->dev_addr,
+	BNO055_SW_REV_ID_LSB__REG,
+	a_SW_ID_u_8, BNO055_TWO_U8X);
+	a_SW_ID_u_8[INDEX_ZERO] = BNO055_GET_BITSLICE(
+	a_SW_ID_u_8[INDEX_ZERO],
+	BNO055_SW_REV_ID_LSB);
+	p_bno055->sw_rev_id = (u_16)
+	((((u_32)((u_8)a_SW_ID_u_8[INDEX_ONE])) <<
+	BNO055_SHIFT_8_POSITION) | (a_SW_ID_u_8[INDEX_ZERO]));
+	/* Read the page id from the register 0x07*/
+	com_rslt += p_bno055->BNO055_BUS_READ_FUNC
+	(p_bno055->dev_addr,
+	BNO055_PAGE_ID__REG, &v_data_u_8, BNO055_ONE_U8X);
+	p_bno055->page_id = v_data_u_8;
+
+	return com_rslt;
+}
+/*!
+ *	@brief
+ *	This API gives data to the given register and
+ *	the data is written in the corresponding register address
+ *
+ *  @param v_addr_u_8 : Address of the register
+ *	@param p_data_u_8 : Data to be written to the register
+ *	@param v_len_u_8  : Length of the Data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+*/
+BNO055_RETURN_FUNCTION_TYPE bno055_write_register(u_8 v_addr_u_8,
+u_8 *p_data_u_8, u_8 v_len_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+			/* Write the values of respective given register */
+			com_rslt = p_bno055->BNO055_BUS_WRITE_FUNC
+			(p_bno055->dev_addr, v_addr_u_8, p_data_u_8, v_len_u_8);
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads the data from
+ *	the given register address
+ *
+ *  @param v_addr_u_8 : Address of the register
+ *  @param p_data_u_8 : address of the variable,
+ *	read value will be kept
+ *  @param v_len_u_8  : Length of the data
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_register(u_8 v_addr_u_8,
+u_8 *p_data_u_8, u_8 v_len_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/* Read the value from given register*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr, v_addr_u_8, p_data_u_8, v_len_u_8);
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads chip id
+ *	from register 0x00 it is a byte of data
+ *
+ *
+ *	@param v_chip_id_u_8 : The chip id value 0xA0
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_chip_id(u_8 *v_chip_id_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8 = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the chip id*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_CHIP_ID__REG, &v_data_u_8, BNO055_ONE_U8X);
+			*v_chip_id_u_8 = v_data_u_8;
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads software revision id
+ *	from register 0x04 and 0x05 it is a two byte of data
+ *
+ *	@param v_sw_id_u_8 : The SW revision id
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_sw_rev_id(u_16 *v_sw_id_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* array having the software revision id
+	v_data_u_8[0] - LSB
+	v_data_u_8[1] - MSB*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct  p_bno055 is empty*/
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value of software
+			revision id*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SW_REV_ID_LSB__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_SW_REV_ID_LSB);
+			*v_sw_id_u_8 = (u_16)
+			((((u_32)((u_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads page id
+ *	from register 0x07 it is a byte of data
+ *
+ *
+ *	@param v_page_id_u_8 : The value of page id
+ *
+ *	PAGE_ZERO -> 0x00
+ *	PAGE_ONE  -> 0x01
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_page_id(u_8 *v_page_id_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8 = BNO055_ZERO_U8X;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/* Read the page id form 0x07*/
+		com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+		(p_bno055->dev_addr,
+		BNO055_PAGE_ID__REG, &v_data_u_8, BNO055_ONE_U8X);
+		if (com_rslt == SUCCESS) {
+			v_data_u_8 = BNO055_GET_BITSLICE(v_data_u_8,
+			BNO055_PAGE_ID);
+			*v_page_id_u_8 = v_data_u_8;
+			p_bno055->page_id = v_data_u_8;
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write
+ *	the page id register 0x07
+ *
+ *	@param v_page_id_u_8 : The value of page id
+ *
+ *	PAGE_ZERO -> 0x00
+ *	PAGE_ONE  -> 0x01
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_page_id(u_8 v_page_id_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+			/* Read the current page*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_PAGE_ID__REG, &v_data_u_8r, BNO055_ONE_U8X);
+			/* Check condition for communication success*/
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r = BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_PAGE_ID, v_page_id_u_8);
+				/* Write the page id*/
+				com_rslt += p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_PAGE_ID__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS)
+					p_bno055->page_id = v_page_id_u_8;
+			} else {
+			com_rslt = ERROR;
+			}
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads accel revision id
+ *	from register 0x01 it is a byte of value
+ *
+ *	@param v_accel_rev_id_u_8 : The accel revision id 0xFB
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_rev_id(
+u_8 *v_accel_rev_id_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8 = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the accel revision id */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_REV_ID__REG,
+			&v_data_u_8, BNO055_ONE_U8X);
+			*v_accel_rev_id_u_8 = v_data_u_8;
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads mag revision id
+ *	from register 0x02 it is a byte of value
+ *
+ *	@param v_mag_rev_id_u_8 : The mag revision id 0x32
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_rev_id(
+u_8 *v_mag_rev_id_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8 = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+			if ((v_stat_s_8 == SUCCESS) ||
+			(p_bno055->page_id == PAGE_ZERO)) {
+				/* Read the mag revision id */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_MAG_REV_ID__REG,
+				&v_data_u_8, BNO055_ONE_U8X);
+				*v_mag_rev_id_u_8 = v_data_u_8;
+			} else {
+			com_rslt = ERROR;
+			}
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads gyro revision id
+ *	from register 0x03 it is a byte of value
+ *
+ *	@param v_gyro_rev_id_u_8 : The gyro revision id 0xF0
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_rev_id(
+u_8 *v_gyro_rev_id_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8 = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the gyro revision id */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_REV_ID__REG,
+			&v_data_u_8, BNO055_ONE_U8X);
+			*v_gyro_rev_id_u_8 = v_data_u_8;
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read boot loader revision id
+ *	from register 0x06 it is a byte of value
+ *
+ *	@param v_bl_rev_id_u_8 : The boot loader revision id
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_bl_rev_id(
+u_8 *v_bl_rev_id_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8 = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the boot loader revision id */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_BL_REV_ID__REG,
+			&v_data_u_8, BNO055_ONE_U8X);
+			*v_bl_rev_id_u_8 = v_data_u_8;
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads acceleration data X values
+ *	from register 0x08 and 0x09 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_accel_x_s_16 : The X raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_x(s_16 *v_accel_x_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the accel x value
+	v_data_u_8[INDEX_ZERO] - LSB
+	v_data_u_8[INDEX_ONE] - MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the accel x axis two byte value*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_ACCEL_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_ACCEL_DATA_X_MSB_VALUEX);
+			*v_accel_x_s_16 = (s_16)((((s_32)
+			(s_8)(v_data_u_8[INDEX_ONE])) <<
+			(BNO055_SHIFT_8_POSITION))
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads acceleration data Y values
+ *	from register 0x0A and 0x0B it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_accel_y_s_16 : The Y raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_y(s_16 *v_accel_y_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the accel y value
+	v_data_u_8[INDEX_ZERO] - LSB
+	v_data_u_8[INDEX_ONE] - MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the accel y axis two byte value*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_DATA_Y_LSB_VALUEY__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_ACCEL_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_ACCEL_DATA_Y_MSB_VALUEY);
+			*v_accel_y_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads acceleration data z values
+ *	from register 0x0C and 0x0D it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_accel_z_s_16 : The z raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_z(s_16 *v_accel_z_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the accel z value
+	v_data_u_8[INDEX_ZERO] - LSB
+	v_data_u_8[INDEX_ONE] - MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the accel z axis two byte value*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_DATA_Z_LSB_VALUEZ__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_ACCEL_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_ACCEL_DATA_Z_MSB_VALUEZ);
+			*v_accel_z_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads acceleration data xyz values
+ *	from register 0x08 to 0x0D it is a six byte data
+ *
+ *
+ *	@param accel : The value of accel xyz data
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The accel x data
+ *	 y        | The accel y data
+ *	 z        | The accel z data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_xyz(
+struct bno055_accel_t *accel)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the accel xyz value
+	v_data_u_8[INDEX_ZERO] - x->LSB
+	v_data_u_8[INDEX_ONE] - x->MSB
+	v_data_u_8[2] - y->MSB
+	v_data_u_8[3] - y->MSB
+	v_data_u_8[4] - z->MSB
+	v_data_u_8[5] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_SIX] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_SIX_U8X);
+			/* Data X*/
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_ACCEL_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_ACCEL_DATA_X_MSB_VALUEX);
+			accel->x = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+			/* Data Y*/
+			v_data_u_8[INDEX_TWO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+			BNO055_ACCEL_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_THREE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+			BNO055_ACCEL_DATA_Y_MSB_VALUEY);
+			accel->y = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_THREE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_TWO]));
+			/* Data Z*/
+			v_data_u_8[INDEX_FOUR] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+			BNO055_ACCEL_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_FIVE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+			BNO055_ACCEL_DATA_Z_MSB_VALUEZ);
+			accel->z = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_FIVE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_FOUR]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads mag data x values
+ *	from register 0x0E and 0x0F it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_mag_x_s_16 : The x raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_x(s_16 *v_mag_x_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the mag x value
+	v_data_u_8[INDEX_ZERO] - x->LSB
+	v_data_u_8[INDEX_ONE] - x->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/*Read the mag x two bytes of data */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_MAG_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_MAG_DATA_X_MSB_VALUEX);
+			*v_mag_x_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) | (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads mag data y values
+ *	from register 0x10 and 0x11 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_mag_y_s_16 : The y raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_y(s_16 *v_mag_y_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the mag x value
+	v_data_u_8[INDEX_ZERO] - y->LSB
+	v_data_u_8[INDEX_ONE] - y->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/*Read the mag y two bytes of data */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_DATA_Y_LSB_VALUEY__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_MAG_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_MAG_DATA_Y_MSB_VALUEY);
+			*v_mag_y_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads mag data z values
+ *	from register 0x12 and 0x13 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_mag_z_s_16 : The z raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_z(s_16 *v_mag_z_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the mag x value
+	v_data_u_8[INDEX_ZERO] - z->LSB
+	v_data_u_8[INDEX_ONE] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_DATA_Z_LSB_VALUEZ__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			/*Read the mag z two bytes of data */
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_MAG_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_MAG_DATA_Z_MSB_VALUEZ);
+			*v_mag_z_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads mag data xyz values
+ *	from register 0x0E to 0x13 it is a six byte data
+ *
+ *
+ *	@param mag : The mag xyz values
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The mag x data
+ *	 y        | The mag y data
+ *	 z        | The mag z data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_xyz(struct bno055_mag_t *mag)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the mag xyz value
+	v_data_u_8[INDEX_ZERO] - x->LSB
+	v_data_u_8[INDEX_ONE] - x->MSB
+	v_data_u_8[INDEX_TWO] - y->MSB
+	v_data_u_8[INDEX_THREE] - y->MSB
+	v_data_u_8[INDEX_FOUR] - z->MSB
+	v_data_u_8[INDEX_FIVE] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_SIX] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/*Read the six byte value of mag xyz*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_SIX_U8X);
+			/* Data X*/
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_MAG_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_MAG_DATA_X_MSB_VALUEX);
+			mag->x = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+			/* Data Y*/
+			v_data_u_8[INDEX_TWO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+			BNO055_MAG_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_THREE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+			BNO055_MAG_DATA_Y_MSB_VALUEY);
+			mag->y = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_THREE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_TWO]));
+			/* Data Z*/
+			v_data_u_8[INDEX_FOUR] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+			BNO055_MAG_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_FIVE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+			BNO055_MAG_DATA_Z_MSB_VALUEZ);
+			mag->z = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_FIVE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_FOUR]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads gyro data x values
+ *	from register 0x14 and 0x15 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_gyro_x_s_16 : The x raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_x(s_16 *v_gyro_x_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the gyro 16 bit x value*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_GYRO_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_GYRO_DATA_X_MSB_VALUEX);
+			*v_gyro_x_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads gyro data y values
+ *	from register 0x16 and 0x17 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_gyro_y_s_16 : The y raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_y(s_16 *v_gyro_y_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of gyro y */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_DATA_Y_LSB_VALUEY__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_GYRO_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_GYRO_DATA_Y_MSB_VALUEY);
+			*v_gyro_y_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads gyro data z values
+ *	from register 0x18 and 0x19 it is a two byte data
+ *
+ *	@param v_gyro_z_s_16 : The z raw data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_z(s_16 *v_gyro_z_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the gyro z 16 bit value*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_DATA_Z_LSB_VALUEZ__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_GYRO_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_GYRO_DATA_Z_MSB_VALUEZ);
+			*v_gyro_z_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads gyro data xyz values
+ *	from register 0x14 to 0x19 it is a six byte data
+ *
+ *
+ *	@param gyro : The value of gyro xyz data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The gyro x data
+ *	 y        | The gyro y data
+ *	 z        | The gyro z data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_xyz(struct bno055_gyro_t *gyro)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the accel xyz value
+	v_data_u_8[INDEX_ZERO] - x->LSB
+	v_data_u_8[INDEX_ONE] - x->MSB
+	v_data_u_8[INDEX_TWO] - y->MSB
+	v_data_u_8[INDEX_THREE] - y->MSB
+	v_data_u_8[INDEX_FOUR] - z->MSB
+	v_data_u_8[INDEX_FIVE] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_SIX] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the six bytes data of gyro xyz*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_SIX_U8X);
+			/* Data x*/
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_GYRO_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_GYRO_DATA_X_MSB_VALUEX);
+			gyro->x = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+			/* Data y*/
+			v_data_u_8[INDEX_TWO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+			BNO055_GYRO_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_THREE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+			BNO055_GYRO_DATA_Y_MSB_VALUEY);
+			gyro->y = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_THREE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_TWO]));
+			/* Data z*/
+			v_data_u_8[INDEX_FOUR] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+			BNO055_GYRO_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_FIVE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+			BNO055_GYRO_DATA_Z_MSB_VALUEZ);
+			gyro->z = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_FIVE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_FOUR]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads gyro data z values
+ *	from register 0x1A and 0x1B it is a two byte data
+ *
+ *	@param v_euler_h_s_16 : The raw h data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_euler_h(s_16 *v_euler_h_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the Euler h value
+	v_data_u_8[INDEX_ZERO] - h->LSB
+	v_data_u_8[INDEX_ONE] - h->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the eulre heading data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_EULER_H_LSB_VALUEH__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] = BNO055_GET_BITSLICE
+			(v_data_u_8[INDEX_ZERO],
+			BNO055_EULER_H_LSB_VALUEH);
+			v_data_u_8[INDEX_ONE] = BNO055_GET_BITSLICE
+			(v_data_u_8[INDEX_ONE],
+			BNO055_EULER_H_MSB_VALUEH);
+			*v_euler_h_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads Euler data r values
+ *	from register 0x1C and 0x1D it is a two byte data
+ *
+ *	@param v_euler_r_s_16 : The raw r data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_euler_r(s_16 *v_euler_r_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the Euler h value
+	v_data_u_8[INDEX_ZERO] - r->LSB
+	v_data_u_8[INDEX_ONE] - r->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the Euler roll data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_EULER_R_LSB_VALUER__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_EULER_R_LSB_VALUER);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_EULER_R_MSB_VALUER);
+			*v_euler_r_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads Euler data p values
+ *	from register 0x1E and 0x1F it is a two byte data
+ *
+ *	@param v_euler_p_s_16 : The raw p data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_euler_p(s_16 *v_euler_p_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the Euler p value
+	v_data_u_8[INDEX_ZERO] - p->LSB
+	v_data_u_8[INDEX_ONE] - p->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the Euler p data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_EULER_P_LSB_VALUEP__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_EULER_P_LSB_VALUEP);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_EULER_P_MSB_VALUEP);
+			*v_euler_p_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads Euler data hrp values
+ *	from register 0x1A to 0x1F it is a six byte data
+ *
+ *
+ *	@param euler : The Euler hrp data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 h        | The Euler h data
+ *	 r        | The Euler r data
+ *	 p        | The Euler p data
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_euler_hrp(
+struct bno055_euler_t *euler)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the Euler hrp value
+	v_data_u_8[INDEX_ZERO] - h->LSB
+	v_data_u_8[INDEX_ONE] - h->MSB
+	v_data_u_8[INDEX_TWO] - r->MSB
+	v_data_u_8[INDEX_THREE] - r->MSB
+	v_data_u_8[INDEX_FOUR] - p->MSB
+	v_data_u_8[INDEX_FIVE] - p->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_SIX] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the six byte of Euler hrp data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_EULER_H_LSB_VALUEH__REG,
+			v_data_u_8, BNO055_SIX_U8X);
+			/* Data h*/
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_EULER_H_LSB_VALUEH);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_EULER_H_MSB_VALUEH);
+			euler->h = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+			/* Data r*/
+			v_data_u_8[INDEX_TWO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+			BNO055_EULER_R_LSB_VALUER);
+			v_data_u_8[INDEX_THREE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+			BNO055_EULER_R_MSB_VALUER);
+			euler->r = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_THREE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_TWO]));
+			/* Data p*/
+			v_data_u_8[INDEX_FOUR] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+			BNO055_EULER_P_LSB_VALUEP);
+			v_data_u_8[INDEX_FIVE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+			BNO055_EULER_P_MSB_VALUEP);
+			euler->p = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_FIVE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_FOUR]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads quaternion data w values
+ *	from register 0x20 and 0x21 it is a two byte data
+ *
+ *	@param v_quaternion_w_s_16 : The raw w data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_w(
+s_16 *v_quaternion_w_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the Quaternion w value
+	v_data_u_8[INDEX_ZERO] - w->LSB
+	v_data_u_8[INDEX_ONE] - w->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of quaternion w data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_QUATERNION_DATA_W_LSB_VALUEW__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_QUATERNION_DATA_W_LSB_VALUEW);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_QUATERNION_DATA_W_MSB_VALUEW);
+			*v_quaternion_w_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads quaternion data x values
+ *	from register 0x22 and 0x23 it is a two byte data
+ *
+ *	@param v_quaternion_x_s_16 : The raw x data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_x(
+s_16 *v_quaternion_x_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the quaternion x value
+	v_data_u_8[INDEX_ZERO] - x->LSB
+	v_data_u_8[INDEX_ONE] - x->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of quaternion x data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_QUATERNION_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_QUATERNION_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_QUATERNION_DATA_X_MSB_VALUEX);
+			*v_quaternion_x_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) | (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads quaternion data y values
+ *	from register 0x24 and 0x25 it is a two byte data
+ *
+ *	@param v_quaternion_y_s_16 : The raw y data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_y(
+s_16 *v_quaternion_y_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the quaternion y value
+	v_data_u_8[INDEX_ZERO] - y->LSB
+	v_data_u_8[INDEX_ONE] - y->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of quaternion y data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_QUATERNION_DATA_Y_LSB_VALUEY__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] = BNO055_GET_BITSLICE
+			(v_data_u_8[INDEX_ZERO],
+			BNO055_QUATERNION_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_ONE] = BNO055_GET_BITSLICE
+			(v_data_u_8[INDEX_ONE],
+			BNO055_QUATERNION_DATA_Y_MSB_VALUEY);
+			*v_quaternion_y_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads quaternion data z values
+ *	from register 0x26 and 0x27 it is a two byte data
+ *
+ *	@param v_quaternion_z_s_16 : The raw z data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_z(
+s_16 *v_quaternion_z_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the quaternion z value
+	v_data_u_8[INDEX_ZERO] - z->LSB
+	v_data_u_8[INDEX_ONE] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of quaternion z data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_QUATERNION_DATA_Z_LSB_VALUEZ__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_QUATERNION_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_QUATERNION_DATA_Z_MSB_VALUEZ);
+			*v_quaternion_z_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads Quaternion data wxyz values
+ *	from register 0x20 to 0x27 it is a six byte data
+ *
+ *
+ *	@param quaternion : The value of quaternion wxyz data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 w        | The quaternion w data
+ *	 x        | The quaternion x data
+ *	 y        | The quaternion y data
+ *	 z        | The quaternion z data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_wxyz(
+struct bno055_quaternion_t *quaternion)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the quaternion wxyz value
+	v_data_u_8[INDEX_ZERO] - w->LSB
+	v_data_u_8[INDEX_ONE] - w->MSB
+	v_data_u_8[INDEX_TWO] - x->LSB
+	v_data_u_8[INDEX_THREE] - x->MSB
+	v_data_u_8[INDEX_FOUR] - y->MSB
+	v_data_u_8[INDEX_FIVE] - y->MSB
+	v_data_u_8[6] - z->MSB
+	v_data_u_8[7] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_EIGHT] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the eight byte value
+			of quaternion wxyz data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_QUATERNION_DATA_W_LSB_VALUEW__REG,
+			v_data_u_8, BNO055_EIGHT_U8X);
+			/* Data W*/
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_QUATERNION_DATA_W_LSB_VALUEW);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_QUATERNION_DATA_W_MSB_VALUEW);
+			quaternion->w = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+			/* Data X*/
+			v_data_u_8[INDEX_TWO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+			BNO055_QUATERNION_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_THREE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+			BNO055_QUATERNION_DATA_X_MSB_VALUEX);
+			quaternion->x = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_THREE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_TWO]));
+			/* Data Y*/
+			v_data_u_8[INDEX_FOUR] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+			BNO055_QUATERNION_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_FIVE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+			BNO055_QUATERNION_DATA_Y_MSB_VALUEY);
+			quaternion->y = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_FIVE])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_FOUR]));
+			/* Data Z*/
+			v_data_u_8[INDEX_SIX] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_SIX],
+			BNO055_QUATERNION_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_SEVEN] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_SEVEN],
+			BNO055_QUATERNION_DATA_Z_MSB_VALUEZ);
+			quaternion->z = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_SEVEN])) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_SIX]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads Linear accel data x values
+ *	from register 0x29 and 0x2A it is a two byte data
+ *
+ *	@param v_linear_accel_x_s_16 : The raw x data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_linear_accel_x(
+s_16 *v_linear_accel_x_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the linear accel x value
+	v_data_u_8[INDEX_ZERO] - x->LSB
+	v_data_u_8[INDEX_ONE] - x->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of linear accel x data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_LINEAR_ACCEL_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_LINEAR_ACCEL_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_LINEAR_ACCEL_DATA_X_MSB_VALUEX);
+			*v_linear_accel_x_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads Linear accel data x values
+ *	from register 0x2B and 0x2C it is a two byte data
+ *
+ *	@param v_linear_accel_y_s_16 : The raw y data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_linear_accel_y(
+s_16 *v_linear_accel_y_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the linear accel y value
+	v_data_u_8[INDEX_ZERO] - y->LSB
+	v_data_u_8[INDEX_ONE] - y->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of linear accel y data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_LINEAR_ACCEL_DATA_Y_LSB_VALUEY__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_LINEAR_ACCEL_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_LINEAR_ACCEL_DATA_Y_MSB_VALUEY);
+			*v_linear_accel_y_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) | (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads Linear accel data x values
+ *	from register 0x2C and 0x2D it is a two byte data
+ *
+ *	@param v_linear_accel_z_s_16 : The raw z data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_linear_accel_z(
+s_16 *v_linear_accel_z_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the linear accel z value
+	v_data_u_8[INDEX_ZERO] - z->LSB
+	v_data_u_8[INDEX_ONE] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of linear accel z data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_LINEAR_ACCEL_DATA_Z_LSB_VALUEZ__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_LINEAR_ACCEL_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_LINEAR_ACCEL_DATA_Z_MSB_VALUEZ);
+			*v_linear_accel_z_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION) | (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads Linear accel data xyz values
+ *	from register 0x28 to 0x2D it is a six byte data
+ *
+ *
+ *	@param linear_accel : The value of linear accel xyz data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The linear accel x data
+ *	 y        | The linear accel y data
+ *	 z        | The linear accel z data
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_linear_accel_xyz(
+struct bno055_linear_accel_t *linear_accel)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the linear accel xyz value
+	v_data_u_8[INDEX_ZERO] - x->LSB
+	v_data_u_8[INDEX_ONE] - x->MSB
+	v_data_u_8[INDEX_TWO] - y->MSB
+	v_data_u_8[INDEX_THREE] - y->MSB
+	v_data_u_8[INDEX_FOUR] - z->MSB
+	v_data_u_8[INDEX_FIVE] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_SIX] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the six byte value
+			of linear accel xyz data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_LINEAR_ACCEL_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_SIX_U8X);
+			/* Data x*/
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_LINEAR_ACCEL_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_LINEAR_ACCEL_DATA_X_MSB_VALUEX);
+			linear_accel->x = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+			/* Data y*/
+			v_data_u_8[INDEX_TWO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+			BNO055_LINEAR_ACCEL_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_THREE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+			BNO055_LINEAR_ACCEL_DATA_Y_MSB_VALUEY);
+			linear_accel->y = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_THREE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_TWO]));
+			/* Data z*/
+			v_data_u_8[INDEX_FOUR] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+			BNO055_LINEAR_ACCEL_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_FIVE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+			BNO055_LINEAR_ACCEL_DATA_Z_MSB_VALUEZ);
+			linear_accel->z = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_FIVE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_FOUR]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads gravity data x values
+ *	from register 0x2E and 0x2F it is a two byte data
+ *
+ *	@param v_gravity_x_s_16 : The raw x data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gravity_x(
+s_16 *v_gravity_x_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the gravity x value
+	v_data_u_8[INDEX_ZERO] - x->LSB
+	v_data_u_8[INDEX_ONE] - x->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of gravity x data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GRAVITY_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_GRAVITY_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_GRAVITY_DATA_X_MSB_VALUEX);
+			*v_gravity_x_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads gravity data y values
+ *	from register 0x30 and 0x31 it is a two byte data
+ *
+ *	@param v_gravity_y_s_16 : The raw y data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gravity_y(
+s_16 *v_gravity_y_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the gravity y value
+	v_data_u_8[INDEX_ZERO] - y->LSB
+	v_data_u_8[INDEX_ONE] - y->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of gravity y data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GRAVITY_DATA_Y_LSB_VALUEY__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_GRAVITY_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_GRAVITY_DATA_Y_MSB_VALUEY);
+			*v_gravity_y_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads gravity data z values
+ *	from register 0x32 and 0x33 it is a two byte data
+ *
+ *	@param v_gravity_z_s_16 : The raw z data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gravity_z(
+s_16 *v_gravity_z_s_16)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the gravity z value
+	v_data_u_8[INDEX_ZERO] - z->LSB
+	v_data_u_8[INDEX_ONE] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_TWO] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the two byte value
+			of gravity z data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GRAVITY_DATA_Z_LSB_VALUEZ__REG,
+			v_data_u_8, BNO055_TWO_U8X);
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_GRAVITY_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_GRAVITY_DATA_Z_MSB_VALUEZ);
+			*v_gravity_z_s_16 = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_ONE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_ZERO]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+  *	@brief This API reads gravity data xyz values
+ *	from register 0x2E to 0x33 it is a six byte data
+ *
+ *
+ *	@param gravity : The value of gravity xyz data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The gravity x data
+ *	 y        | The gravity y data
+ *	 z        | The gravity z data
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gravity_xyz(
+struct bno055_gravity_t *gravity)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the gravity xyz value
+	v_data_u_8[INDEX_ZERO] - x->LSB
+	v_data_u_8[INDEX_ONE] - x->MSB
+	v_data_u_8[INDEX_TWO] - y->MSB
+	v_data_u_8[INDEX_THREE] - y->MSB
+	v_data_u_8[INDEX_FOUR] - z->MSB
+	v_data_u_8[INDEX_FIVE] - z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_SIX] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the six byte value
+			of gravity xyz data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GRAVITY_DATA_X_LSB_VALUEX__REG,
+			v_data_u_8, BNO055_SIX_U8X);
+			/* Data x*/
+			v_data_u_8[INDEX_ZERO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+			BNO055_GRAVITY_DATA_X_LSB_VALUEX);
+			v_data_u_8[INDEX_ONE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+			BNO055_GRAVITY_DATA_X_MSB_VALUEX);
+			gravity->x = (s_16)(((s_32)
+			((s_8)v_data_u_8[INDEX_ONE]) <<
+			BNO055_SHIFT_8_POSITION) |
+			(v_data_u_8[INDEX_ZERO]));
+			/* Data y*/
+			v_data_u_8[INDEX_TWO] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+			BNO055_GRAVITY_DATA_Y_LSB_VALUEY);
+			v_data_u_8[INDEX_THREE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+			BNO055_GRAVITY_DATA_Y_MSB_VALUEY);
+			gravity->y = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_THREE])) <<
+			BNO055_SHIFT_8_POSITION) | (v_data_u_8[INDEX_TWO]));
+			/* Data z*/
+			v_data_u_8[INDEX_FOUR] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+			BNO055_GRAVITY_DATA_Z_LSB_VALUEZ);
+			v_data_u_8[INDEX_FIVE] =
+			BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+			BNO055_GRAVITY_DATA_Z_MSB_VALUEZ);
+			gravity->z = (s_16)((((s_32)
+			((s_8)v_data_u_8[INDEX_FIVE])) <<
+			BNO055_SHIFT_8_POSITION)
+			| (v_data_u_8[INDEX_FOUR]));
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API reads temperature values
+ *	from register 0x33 it is a byte data
+ *
+ *	@param v_temp_s_8 : The raw temperature data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_temp_data(s_8 *v_temp_s_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8 = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the raw temperature data */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_TEMP__REG, &v_data_u_8, BNO055_ONE_U8X);
+			*v_temp_s_8 = v_data_u_8;
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+#ifdef	BNO055_FLOAT_ENABLE
+/*!
+ *	@brief This API is used to convert the accel x raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param v_accel_x_f : The accel x meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_x_msq(
+float *v_accel_x_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_x_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as m/s2 if the unit is in mg*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MSQ)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MSQ);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw x data*/
+			com_rslt += bno055_read_accel_x(&v_reg_accel_x_s_16);
+			p_bno055->delay_msec(BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw accel x to m/s2*/
+				v_data_f =
+				(float)(v_reg_accel_x_s_16/ACCEL_DIV_MSQ);
+				*v_accel_x_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel x raw data
+ *	to millig output as float
+ *
+ *	@param v_accel_x_f : The accel x millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_x_mg(
+float *v_accel_x_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_x_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as mg if the unit is in m/s2*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MG)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MG);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw x data*/
+			com_rslt += bno055_read_accel_x(&v_reg_accel_x_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw accel x to m/s2*/
+				v_data_f =
+				(float)(v_reg_accel_x_s_16/ACCEL_DIV_MG);
+				*v_accel_x_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel x raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param v_accel_y_f : The accel y meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_y_msq(
+float *v_accel_y_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_y_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as m/s2 if the unit is in mg*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MSQ)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MSQ);
+		if (com_rslt == SUCCESS) {
+			com_rslt += bno055_read_accel_y(&v_reg_accel_y_s_16);
+			p_bno055->delay_msec(BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw accel y to m/s2*/
+				v_data_f =
+				(float)(v_reg_accel_y_s_16/ACCEL_DIV_MSQ);
+				*v_accel_y_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel y raw data
+ *	to millig output as float
+ *
+ *	@param v_accel_y_f : The accel y millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_y_mg(
+float *v_accel_y_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_y_s_16 = BNO055_ZERO_U8X;
+	float data = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as mg if the unit is in m/s2*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MG)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MG);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw z data*/
+			com_rslt += bno055_read_accel_y(&v_reg_accel_y_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw accel z to mg*/
+				data = (float)(v_reg_accel_y_s_16/ACCEL_DIV_MG);
+				*v_accel_y_f = data;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel z raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param v_accel_z_f : The accel z meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_z_msq(
+float *v_accel_z_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_z_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as m/s2 if the unit is in mg*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MSQ)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MSQ);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw z data*/
+			com_rslt += bno055_read_accel_z(&v_reg_accel_z_s_16);
+			p_bno055->delay_msec(BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw accel z to m/s2*/
+				v_data_f =
+				(float)(v_reg_accel_z_s_16/ACCEL_DIV_MSQ);
+				*v_accel_z_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel z raw data
+ *	to millig output as float
+ *
+ *	@param v_accel_z_f : The accel z millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_z_mg(
+float *v_accel_z_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_z_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as mg if the unit is in m/s2 */
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MG)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MG);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw z data*/
+			com_rslt += bno055_read_accel_z(&v_reg_accel_z_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw accel x to mg*/
+				v_data_f =
+				(float)(v_reg_accel_z_s_16/ACCEL_DIV_MG);
+				*v_accel_z_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel xyz raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param accel_xyz : The meterpersecseq data of accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | meterpersecseq data of accel
+ *	 y        | meterpersecseq data of accel
+ *	 z        | meterpersecseq data of accel
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_xyz_msq(
+struct bno055_accel_float_t *accel_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_accel_t reg_accel_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as m/s2 if the unit is in mg*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MSQ)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MSQ);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw xyz data*/
+			com_rslt += bno055_read_accel_xyz(&reg_accel_xyz);
+			if (com_rslt == SUCCESS) {
+				/* Convert the accel raw xyz to meterpersecseq*/
+				accel_xyz->x =
+				(float)(reg_accel_xyz.x/ACCEL_DIV_MSQ);
+				accel_xyz->y =
+				(float)(reg_accel_xyz.y/ACCEL_DIV_MSQ);
+				accel_xyz->z =
+				(float)(reg_accel_xyz.z/ACCEL_DIV_MSQ);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel xyz raw data
+ *	to millig output as float
+ *
+ *	@param accel_xyz : The millig data of accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | millig data of accel
+ *	 y        | millig data of accel
+ *	 z        | millig data of accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_xyz_mg(
+struct bno055_accel_float_t *accel_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_accel_t reg_accel_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as mg if the unit is in m/s2*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MG)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MG);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw y data*/
+			com_rslt += bno055_read_accel_xyz(&reg_accel_xyz);
+			if (com_rslt == SUCCESS) {
+				/*Convert the accel raw xyz to millig */
+				accel_xyz->x =
+				(float)(reg_accel_xyz.x/ACCEL_DIV_MG);
+				accel_xyz->y =
+				(float)(reg_accel_xyz.y/ACCEL_DIV_MG);
+				accel_xyz->z =
+				(float)(reg_accel_xyz.z/ACCEL_DIV_MG);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the mag x raw data
+ *	to microTesla output as float
+ *
+ *	@param v_mag_x_f : The mag x microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_mag_x_uT(
+float *v_mag_x_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_mag_x_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	/* Read raw mag x data */
+	com_rslt = bno055_read_mag_x(&v_reg_mag_x_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw mag x to microTesla*/
+		v_data_f = (float)(v_reg_mag_x_s_16/MAG_DIV_UT);
+		*v_mag_x_f = v_data_f;
+	} else {
+	com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the mag y raw data
+ *	to microTesla output as float
+ *
+ *	@param v_mag_y_f : The mag y microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_mag_y_uT(
+float *v_mag_y_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_mag_y_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	/* Read raw mag y data */
+	com_rslt = bno055_read_mag_y(&v_reg_mag_y_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw mag y to microTesla*/
+		v_data_f = (float)(v_reg_mag_y_s_16/MAG_DIV_UT);
+		*v_mag_y_f = v_data_f;
+	} else {
+	com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the mag z raw data
+ *	to microTesla output as float
+ *
+ *	@param v_mag_z_f : The mag z microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_mag_z_uT(
+float *v_mag_z_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_mag_z_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	/* Read raw mag z data */
+	com_rslt = bno055_read_mag_z(&v_reg_mag_z_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw mag z to microTesla*/
+		v_data_f = (float)(v_reg_mag_z_s_16/MAG_DIV_UT);
+		*v_mag_z_f = v_data_f;
+	} else {
+	com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the mag yz raw data
+ *	to microTesla output as float
+ *
+ *	@param mag_xyz_data : The microTesla data of mag xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | microTesla data of mag
+ *	  y       | microTesla data of mag
+ *	  z       | microTesla data of mag
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_mag_xyz_uT(
+struct bno055_mag_float_t *mag_xyz_data)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_mag_t mag_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	/* Read raw mag x data */
+	com_rslt = bno055_read_mag_xyz(&mag_xyz);
+	if (com_rslt == SUCCESS) {
+		/* Convert mag raw xyz to microTesla*/
+		mag_xyz_data->x = (float)(mag_xyz.x/MAG_DIV_UT);
+		mag_xyz_data->y = (float)(mag_xyz.y/MAG_DIV_UT);
+		mag_xyz_data->z = (float)(mag_xyz.z/MAG_DIV_UT);
+	} else {
+	com_rslt = ERROR;
+	}
+
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro x raw data
+ *	to dps output as float
+ *
+ *	@param v_gyro_x_f : The gyro x dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_x_dps(
+float *v_gyro_x_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_x_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as dps if the unit is in rps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_DPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_DPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw x data */
+			com_rslt += bno055_read_gyro_x(&v_reg_gyro_x_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw gyro x to dps*/
+				v_data_f =
+				(float)(v_reg_gyro_x_s_16/GYRO_DIV_DPS);
+				*v_gyro_x_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro x raw data
+ *	to rps output as float
+ *
+ *	@param v_gyro_x_f : The gyro x dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_x_rps(
+float *v_gyro_x_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_x_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as rps if the unit is in dps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_RPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_RPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw x data */
+			com_rslt += bno055_read_gyro_x(&v_reg_gyro_x_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw gyro x to rps*/
+				v_data_f =
+				(float)(v_reg_gyro_x_s_16/GYRO_DIV_RPS);
+				*v_gyro_x_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro y raw data
+ *	to dps output as float
+ *
+ *	@param v_gyro_y_f : The gyro y dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_y_dps(
+float *v_gyro_y_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_y_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as dps if the unit is in rps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_DPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_DPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw y data */
+			com_rslt += bno055_read_gyro_y(&v_reg_gyro_y_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw gyro x to dps*/
+				v_data_f =
+				(float)(v_reg_gyro_y_s_16/GYRO_DIV_DPS);
+				*v_gyro_y_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro y raw data
+ *	to rps output as float
+ *
+ *	@param v_gyro_y_f : The gyro y dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_y_rps(
+float *v_gyro_y_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_y_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as rps if the unit is in dps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_RPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_RPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw y data */
+			com_rslt += bno055_read_gyro_y(&v_reg_gyro_y_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw gyro x to rps*/
+				v_data_f =
+				(float)(v_reg_gyro_y_s_16/GYRO_DIV_RPS);
+				*v_gyro_y_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro z raw data
+ *	to dps output as float
+ *
+ *	@param v_gyro_z_f : The gyro z dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_z_dps(
+float *v_gyro_z_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_z_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as dps if the unit is in rps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_DPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_DPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw z data */
+			com_rslt += bno055_read_gyro_z(&v_reg_gyro_z_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw gyro x to dps*/
+				v_data_f =
+				(float)(v_reg_gyro_z_s_16/GYRO_DIV_DPS);
+				*v_gyro_z_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro z raw data
+ *	to rps output as float
+ *
+ *	@param v_gyro_z_f : The gyro z rps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_z_rps(
+float *v_gyro_z_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_z_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as rps if the unit is in dps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_RPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_RPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw x data */
+			com_rslt += bno055_read_gyro_z(&v_reg_gyro_z_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw gyro x to rps*/
+				v_data_f =
+				(float)(v_reg_gyro_z_s_16/GYRO_DIV_RPS);
+				*v_gyro_z_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro xyz raw data
+ *	to dps output as float
+ *
+ *	@param gyro_xyz_data : The dps data of gyro xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | dps data of gyro
+ *	  y       | dps data of gyro
+ *	  z       | dps data of gyro
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_xyz_dps(
+struct bno055_gyro_float_t *gyro_xyz_data)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_gyro_t gyro_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as dps if the unit is in rps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_DPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_DPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw xyz data */
+			com_rslt += bno055_read_gyro_xyz(&gyro_xyz);
+			if (com_rslt == SUCCESS) {
+				/* Convert gyro raw xyz to dps*/
+				gyro_xyz_data->x =
+				(float)(gyro_xyz.x/GYRO_DIV_DPS);
+				gyro_xyz_data->y =
+				(float)(gyro_xyz.y/GYRO_DIV_DPS);
+				gyro_xyz_data->z =
+				(float)(gyro_xyz.z/GYRO_DIV_DPS);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro xyz raw data
+ *	to rps output as float
+ *
+ *	@param gyro_xyz_data : The rps data of gyro xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | rps data of gyro
+ *	  y       | rps data of gyro
+ *	  z       | rps data of gyro
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_xyz_rps(
+struct bno055_gyro_float_t *gyro_xyz_data)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_gyro_t gyro_xyz = {BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as rps if the unit is in dps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_RPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_RPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw xyz data */
+			com_rslt += bno055_read_gyro_xyz(&gyro_xyz);
+			if (com_rslt == SUCCESS) {
+				/* Convert gyro raw xyz to rps*/
+				gyro_xyz_data->x =
+				(float)(gyro_xyz.x/GYRO_DIV_RPS);
+				gyro_xyz_data->y =
+				(float)(gyro_xyz.y/GYRO_DIV_RPS);
+				gyro_xyz_data->z =
+				(float)(gyro_xyz.z/GYRO_DIV_RPS);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler h raw data
+ *	to degree output as float
+ *
+ *	@param v_euler_h_f : The float value of Euler h degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_h_deg(
+float *v_euler_h_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_euler_h_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as degree if the unit is in radians */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_DEG)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_DEG);
+		if (com_rslt ==  SUCCESS) {
+			/* Read Euler raw h data*/
+			com_rslt += bno055_read_euler_h(&v_reg_euler_h_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler h data to degree*/
+				v_data_f =
+				(float)(v_reg_euler_h_s_16/EULER_DIV_DEG);
+				*v_euler_h_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler h raw data
+ *	to radians output as float
+ *
+ *	@param v_euler_h_f : The float value of Euler h radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_h_rad(
+float *v_euler_h_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_euler_h_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_RAD)
+		/* Read the current Euler unit and set the
+		unit as radians if the unit is in degree */
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_RAD);
+		if (com_rslt == SUCCESS) {
+			/* Read Euler raw h data*/
+			com_rslt += bno055_read_euler_h(&v_reg_euler_h_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler h data to degree*/
+				v_data_f =
+				(float)(v_reg_euler_h_s_16/EULER_DIV_RAD);
+				*v_euler_h_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler r raw data
+ *	to degree output as float
+ *
+ *	@param v_euler_r_f : The float value of Euler r degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_r_deg(
+float *v_euler_r_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 reg_euler_r = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as degree if the unit is in radians */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_DEG)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_DEG);
+		if (com_rslt ==  SUCCESS) {
+			/* Read Euler raw r data*/
+			com_rslt += bno055_read_euler_r(&reg_euler_r);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler r data to degree*/
+				v_data_f = (float)(reg_euler_r/EULER_DIV_DEG);
+				*v_euler_r_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler r raw data
+ *	to radians output as float
+ *
+ *	@param v_euler_r_f : The float value of Euler r radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_r_rad(
+float *v_euler_r_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 reg_v_euler_r_f = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as radians if the unit is in degree */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_RAD)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_RAD);
+		if (com_rslt == SUCCESS) {
+			/* Read Euler raw r data*/
+			com_rslt += bno055_read_euler_r(&reg_v_euler_r_f);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler r data to radians*/
+				v_data_f =
+				(float)(reg_v_euler_r_f/EULER_DIV_RAD);
+				*v_euler_r_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler p raw data
+ *	to degree output as float
+ *
+ *	@param v_euler_p_f : The float value of Euler p degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_p_deg(
+float *v_euler_p_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 reg_v_euler_p_f = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as degree if the unit is in radians */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_DEG)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_DEG);
+		if (com_rslt ==  SUCCESS) {
+			/* Read Euler raw p data*/
+			com_rslt += bno055_read_euler_p(&reg_v_euler_p_f);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler p data to degree*/
+				v_data_f =
+				(float)(reg_v_euler_p_f/EULER_DIV_DEG);
+				*v_euler_p_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler p raw data
+ *	to radians output as float
+ *
+ *	@param v_euler_p_f : The float value of Euler p radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_p_rad(
+float *v_euler_p_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 reg_v_euler_p_f = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as radians if the unit is in degree */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_RAD)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_RAD);
+		if (com_rslt == SUCCESS) {
+			/* Read Euler raw r data*/
+			com_rslt += bno055_read_euler_p(&reg_v_euler_p_f);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler r data to radians*/
+				v_data_f =
+				(float)(reg_v_euler_p_f/EULER_DIV_RAD);
+				*v_euler_p_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler hrp raw data
+ *	to degree output as float
+ *
+ *	@param euler_hpr : The degree data of Euler hrp
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  h       | degree data of Euler
+ *	  r       | degree data of Euler
+ *	  p       | degree data of Euler
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_hpr_deg(
+struct bno055_euler_float_t *euler_hpr)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_euler_t reg_euler = {BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as degree if the unit is in radians */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_DEG)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_DEG);
+		if (com_rslt == SUCCESS) {
+			/* Read Euler raw hrp data*/
+			com_rslt += bno055_read_euler_hrp(&reg_euler);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler hrp to degree*/
+				euler_hpr->h =
+				(float)(reg_euler.h/EULER_DIV_DEG);
+				euler_hpr->p =
+				(float)(reg_euler.p/EULER_DIV_DEG);
+				euler_hpr->r =
+				(float)(reg_euler.r/EULER_DIV_DEG);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler xyz raw data
+ *	to radians output as float
+ *
+ *	@param euler_hpr : The radians data of Euler hrp
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  h       | radians data of Euler
+ *	  r       | radians data of Euler
+ *	  p       | radians data of Euler
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_hpr_rad(
+struct bno055_euler_float_t *euler_hpr)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_euler_t reg_euler = {BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as radians if the unit is in degree */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_RAD)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_RAD);
+		if (com_rslt == SUCCESS) {
+			/* Read Euler raw hrp data*/
+			com_rslt += bno055_read_euler_hrp(&reg_euler);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw hrp to radians */
+				euler_hpr->h =
+				(float)(reg_euler.h/EULER_DIV_RAD);
+				euler_hpr->p =
+				(float)(reg_euler.p/EULER_DIV_RAD);
+				euler_hpr->r =
+				(float)(reg_euler.r/EULER_DIV_RAD);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel x raw data to meterpersecseq output as float
+ *
+ *	@param v_linear_accel_x_f : The float value of linear accel x meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_linear_accel_x_msq(
+float *v_linear_accel_x_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_linear_accel_x_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	/* Read the raw x of linear accel */
+	com_rslt = bno055_read_linear_accel_x(&v_reg_linear_accel_x_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw linear accel x to m/s2*/
+		v_data_f =
+		(float)(v_reg_linear_accel_x_s_16/LINEAR_ACCEL_DIV_MSQ);
+		*v_linear_accel_x_f = v_data_f;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel y raw data to meterpersecseq output as float
+ *
+ *	@param v_linear_accel_y_f : The float value of linear accel y meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_linear_accel_y_msq(
+float *v_linear_accel_y_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 reg_linear_accel_y = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	/* Read the raw y of linear accel */
+	com_rslt = bno055_read_linear_accel_y(&reg_linear_accel_y);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw linear accel x to m/s2*/
+		v_data_f = (float)
+		(reg_linear_accel_y/LINEAR_ACCEL_DIV_MSQ);
+		*v_linear_accel_y_f = v_data_f;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel z raw data to meterpersecseq output as float
+ *
+ *	@param v_linear_accel_z_f : The float value of linear accel z meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_linear_accel_z_msq(
+float *v_linear_accel_z_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 reg_linear_accel_z = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	/* Read the raw x of linear accel */
+	com_rslt = bno055_read_linear_accel_z(&reg_linear_accel_z);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw linear accel z to m/s2*/
+		v_data_f = (float)
+		(reg_linear_accel_z/LINEAR_ACCEL_DIV_MSQ);
+		*v_linear_accel_z_f = v_data_f;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the linear accel xyz raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param linear_accel_xyz : The meterpersecseq data of linear accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | meterpersecseq data of linear accel
+ *	  y       | meterpersecseq data of linear accel
+ *	  z       | meterpersecseq data of linear accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_linear_accel_xyz_msq(
+struct bno055_linear_accel_float_t *linear_accel_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_linear_accel_t reg_linear_accel = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	/* Read the raw x of linear accel */
+	com_rslt = bno055_read_linear_accel_xyz(&reg_linear_accel);
+	if (com_rslt == SUCCESS) {
+		linear_accel_xyz->x =
+		(float)(reg_linear_accel.x/LINEAR_ACCEL_DIV_MSQ);
+		linear_accel_xyz->y =
+		(float)(reg_linear_accel.y/LINEAR_ACCEL_DIV_MSQ);
+		linear_accel_xyz->z =
+		(float)(reg_linear_accel.z/LINEAR_ACCEL_DIV_MSQ);
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gravity
+ *	x raw data to meterpersecseq output as float
+ *
+ *	@param v_gravity_x_f : The float value of gravity x meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_float_x_msq(
+float *v_gravity_x_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gravity_x_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	/* Read raw gravity of x*/
+	com_rslt = bno055_read_gravity_x(&v_reg_gravity_x_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw gravity x to m/s2*/
+		v_data_f = (float)(v_reg_gravity_x_s_16/GRAVITY_DIV_MSQ);
+		*v_gravity_x_f = v_data_f;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gravity
+ *	y raw data to meterpersecseq output as float
+ *
+ *	@param v_gravity_y_f : The float value of gravity y meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_float_y_msq(
+float *v_gravity_y_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gravity_y_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	/* Read raw gravity of y*/
+	com_rslt = bno055_read_gravity_y(&v_reg_gravity_y_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw gravity y to m/s2*/
+		v_data_f = (float)(v_reg_gravity_y_s_16/GRAVITY_DIV_MSQ);
+		*v_gravity_y_f = v_data_f;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gravity
+ *	z raw data to meterpersecseq output as float
+ *
+ *	@param v_gravity_z_f : The float value of gravity z meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_float_z_msq(
+float *v_gravity_z_f)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gravity_z_s_16 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	/* Read raw gravity of z */
+	com_rslt = bno055_read_gravity_z(&v_reg_gravity_z_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw gravity z to m/s2*/
+		v_data_f = (float)(v_reg_gravity_z_s_16/GRAVITY_DIV_MSQ);
+		*v_gravity_z_f = v_data_f;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gravity xyz raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param gravity_xyz : The meterpersecseq data of gravity xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | meterpersecseq data of gravity
+ *	  y       | meterpersecseq data of gravity
+ *	  z       | meterpersecseq data of gravity
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gravity_xyz_msq(
+struct bno055_gravity_float_t *gravity_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_gravity_t reg_gravity_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	/* Read raw gravity of xyz */
+	com_rslt = bno055_read_gravity_xyz(&reg_gravity_xyz);
+	if (com_rslt == SUCCESS) {
+		/* Convert raw gravity xyz to meterpersecseq */
+		gravity_xyz->x =
+		(float)(reg_gravity_xyz.x/GRAVITY_DIV_MSQ);
+		gravity_xyz->y =
+		(float)(reg_gravity_xyz.y/GRAVITY_DIV_MSQ);
+		gravity_xyz->z =
+		(float)(reg_gravity_xyz.z/GRAVITY_DIV_MSQ);
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the temperature
+ *	data to Fahrenheit output as float
+ *
+ *	@param v_temp_f : The float value of temperature Fahrenheit
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_temp_fahrenheit(
+float *v_temp_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_8 v_reg_temp_s_8 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_temp_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current temperature unit and set the
+	unit as Fahrenheit if the unit is in Celsius */
+	com_rslt = bno055_get_temp_unit(&v_temp_unit_u_8);
+	if (v_temp_unit_u_8 != TEMP_UNIT_FAHRENHEIT)
+		com_rslt += bno055_set_temp_unit(TEMP_UNIT_FAHRENHEIT);
+		if (com_rslt == SUCCESS) {
+			/* Read the raw temperature data */
+			com_rslt += bno055_read_temp_data(&v_reg_temp_s_8);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw temperature data to Fahrenheit*/
+				v_data_f = (float)
+				(v_reg_temp_s_8/TEMP_DIV_FAHRENHEIT);
+				*v_temp_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the temperature
+ *	data to Celsius output as float
+ *
+ *	@param v_temp_f : The float value of temperature Celsius
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_temp_celsius(
+float *v_temp_f)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_8 v_reg_temp_s_8 = BNO055_ZERO_U8X;
+	float v_data_f = BNO055_ZERO_U8X;
+	u_8 v_temp_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current temperature unit and set the
+	unit as Fahrenheit if the unit is in Celsius */
+	com_rslt = bno055_get_temp_unit(&v_temp_unit_u_8);
+	if (v_temp_unit_u_8 != TEMP_UNIT_CELSIUS)
+		com_rslt += bno055_set_temp_unit(TEMP_UNIT_CELSIUS);
+		if (com_rslt ==  SUCCESS) {
+			/* Read the raw temperature data */
+			com_rslt += bno055_read_temp_data(&v_reg_temp_s_8);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw temperature data to Fahrenheit*/
+				v_data_f =
+				(float)(v_reg_temp_s_8/TEMP_DIV_CELSIUS);
+				*v_temp_f = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+#endif
+#ifdef	BNO055_DOUBLE_ENABLE
+/*!
+ *	@brief This API is used to convert the accel x raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param v_accel_x_d : The accel x meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_x_msq(
+double *v_accel_x_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_x_s_16 = BNO055_ZERO_U8X;
+	double v_data_f = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as m/s2 if the unit is in mg*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MSQ)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MSQ);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw y data*/
+			com_rslt += bno055_read_accel_x(&v_reg_accel_x_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw x to m/s2 */
+				v_data_f =
+				(double)(v_reg_accel_x_s_16/ACCEL_DIV_MSQ);
+				*v_accel_x_d = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel x raw data
+ *	to millig output as double
+ *
+ *	@param v_accel_x_d : The accel x millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_x_mg(
+double *v_accel_x_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_x_s_16 = BNO055_ZERO_U8X;
+	double v_data_f = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as mg if the unit is in m/s2*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MG)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MG);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw y data*/
+			com_rslt += bno055_read_accel_x(&v_reg_accel_x_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw x to mg */
+				v_data_f =
+				(double)(v_reg_accel_x_s_16/ACCEL_DIV_MG);
+				*v_accel_x_d = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel y raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param v_accel_y_d : The accel y meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_y_msq(
+double *v_accel_y_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_y_s_16 = BNO055_ZERO_U8X;
+	double v_data_f = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as m/s2 if the unit is in mg*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MSQ)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MSQ);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw y data*/
+			com_rslt += bno055_read_accel_y(&v_reg_accel_y_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw x to m/s2 */
+				v_data_f =
+				(double)(v_reg_accel_y_s_16/ACCEL_DIV_MSQ);
+				*v_accel_y_d = v_data_f;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel y raw data
+ *	to millig output as double
+ *
+ *	@param v_accel_y_d : The accel y millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_y_mg(
+double *v_accel_y_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_y_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as mg if the unit is in m/s2*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MG)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MG);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw y data*/
+			com_rslt += bno055_read_accel_y(&v_reg_accel_y_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw y to mg */
+				v_data_d =
+				(double)(v_reg_accel_y_s_16/ACCEL_DIV_MG);
+				*v_accel_y_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel z raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param v_accel_z_d : The accel z meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_z_msq(
+double *v_accel_z_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_z_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as m/s2 if the unit is in mg*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MSQ)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MSQ);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw z data*/
+			com_rslt += bno055_read_accel_z(&v_reg_accel_z_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw z to m/s2 */
+				v_data_d =
+				(double)(v_reg_accel_z_s_16/ACCEL_DIV_MSQ);
+				*v_accel_z_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel z raw data
+ *	to millig output as double
+ *
+ *	@param v_accel_z_d : The accel z millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_z_mg(
+double *v_accel_z_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_accel_z_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as mg if the unit is in m/s2*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MG)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MG);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw z data*/
+			com_rslt += bno055_read_accel_z(&v_reg_accel_z_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw z to mg */
+				v_data_d =
+				(double)(v_reg_accel_z_s_16/ACCEL_DIV_MG);
+				*v_accel_z_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel xyz raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param accel_xyz : The meterpersecseq data of accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | meterpersecseq data of accel
+ *	 y        | meterpersecseq data of accel
+ *	 z        | meterpersecseq data of accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_xyz_msq(
+struct bno055_accel_double_t *accel_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_accel_t reg_accel_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as m/s2 if the unit is in mg*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MSQ)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MSQ);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw xyz data*/
+			com_rslt += bno055_read_accel_xyz(&reg_accel_xyz);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw xyz to m/s2*/
+				accel_xyz->x =
+				(double)(reg_accel_xyz.x/ACCEL_DIV_MSQ);
+				accel_xyz->y =
+				(double)(reg_accel_xyz.y/ACCEL_DIV_MSQ);
+				accel_xyz->z =
+				(double)(reg_accel_xyz.z/ACCEL_DIV_MSQ);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the accel xyz raw data
+ *	to millig output as double
+ *
+ *	@param accel_xyz : The millig data of accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | millig data of accel
+ *	 y        | millig data of accel
+ *	 z        | millig data of accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_xyz_mg(
+struct bno055_accel_double_t *accel_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_accel_t reg_accel_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_accel_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current accel unit and set the
+	unit as m/s2 if the unit is in mg*/
+	com_rslt = bno055_get_accel_unit(&v_accel_unit_u_8);
+	if (v_accel_unit_u_8 != ACCEL_UNIT_MG)
+		com_rslt += bno055_set_accel_unit(ACCEL_UNIT_MG);
+		if (com_rslt == SUCCESS) {
+			/* Read the accel raw xyz data*/
+			com_rslt += bno055_read_accel_xyz(&reg_accel_xyz);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw xyz to mg*/
+				accel_xyz->x =
+				(double)(reg_accel_xyz.x/ACCEL_DIV_MG);
+				accel_xyz->y =
+				(double)(reg_accel_xyz.y/ACCEL_DIV_MG);
+				accel_xyz->z =
+				(double)(reg_accel_xyz.z/ACCEL_DIV_MG);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the mag x raw data
+ *	to microTesla output as double
+ *
+ *	@param v_mag_x_d : The mag x microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_mag_x_uT(
+double *v_mag_x_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_v_mag_x_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	/* Read raw mag x data */
+	com_rslt = bno055_read_mag_x(&v_reg_v_mag_x_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert raw mag x to microTesla */
+		v_data_d = (double)(v_reg_v_mag_x_s_16/MAG_DIV_UT);
+		*v_mag_x_d = v_data_d;
+	} else {
+	com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the mag y raw data
+ *	to microTesla output as double
+ *
+ *	@param v_mag_y_d : The mag y microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_mag_y_uT(
+double *v_mag_y_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_mag_y_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	/* Read raw mag y data */
+	com_rslt = bno055_read_mag_y(&v_reg_mag_y_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert raw mag y to microTesla */
+		v_data_d = (double)(v_reg_mag_y_s_16/MAG_DIV_UT);
+		*v_mag_y_d = v_data_d;
+	} else {
+	com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the mag z raw data
+ *	to microTesla output as double
+ *
+ *	@param v_mag_z_d : The mag z microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_mag_z_uT(
+double *v_mag_z_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_mag_z_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	/* Read raw mag x */
+	com_rslt = bno055_read_mag_z(&v_reg_mag_z_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert raw mag x to microTesla */
+		v_data_d = (double)(v_reg_mag_z_s_16/MAG_DIV_UT);
+		*v_mag_z_d = v_data_d;
+	} else {
+	com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the mag yz raw data
+ *	to microTesla output as double
+ *
+ *	@param mag_xyz : The microTesla data of mag xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | microTesla data of mag
+ *	 y        | microTesla data of mag
+ *	 z        | microTesla data of mag
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_mag_xyz_uT(
+struct bno055_mag_double_t *mag_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_mag_t reg_mag_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	/* Read raw mag xyz data */
+	com_rslt = bno055_read_mag_xyz(&reg_mag_xyz);
+	if (com_rslt == SUCCESS) {
+		/* Convert raw mag xyz to microTesla*/
+		mag_xyz->x =
+		(double)(reg_mag_xyz.x/MAG_DIV_UT);
+		mag_xyz->y =
+		(double)(reg_mag_xyz.y/MAG_DIV_UT);
+		mag_xyz->z =
+		(double)(reg_mag_xyz.z/MAG_DIV_UT);
+	} else {
+	com_rslt = ERROR;
+	}
+
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro x raw data
+ *	to dps output as double
+ *
+ *	@param v_gyro_x_d : The gyro x dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_x_dps(
+double *v_gyro_x_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_x_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as dps if the unit is in rps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_DPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_DPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw x data */
+			com_rslt += bno055_read_gyro_x(&v_reg_gyro_x_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw gyro x to dps */
+				v_data_d =
+				(double)(v_reg_gyro_x_s_16/GYRO_DIV_DPS);
+				*v_gyro_x_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro x raw data
+ *	to rps output as double
+ *
+ *	@param v_gyro_x_d : The gyro x dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_x_rps(
+double *v_gyro_x_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_x_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as rps if the unit is in dps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_RPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_RPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw x data */
+			com_rslt += bno055_read_gyro_x(&v_reg_gyro_x_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw gyro x to rps */
+				v_data_d =
+				(double)(v_reg_gyro_x_s_16/GYRO_DIV_RPS);
+				*v_gyro_x_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro y raw data
+ *	to dps output as double
+ *
+ *	@param v_gyro_y_d : The gyro y dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_y_dps(
+double *v_gyro_y_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_y_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as dps if the unit is in rps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_DPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_DPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw y data */
+			com_rslt += bno055_read_gyro_y(&v_reg_gyro_y_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw gyro y to dps */
+				v_data_d =
+				(double)(v_reg_gyro_y_s_16/GYRO_DIV_DPS);
+				*v_gyro_y_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro y raw data
+ *	to rps output as double
+ *
+ *	@param v_gyro_y_d : The gyro y dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_y_rps(
+double *v_gyro_y_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_y_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as rps if the unit is in dps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_RPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_RPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw y data */
+			com_rslt += bno055_read_gyro_y(&v_reg_gyro_y_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw gyro y to rps */
+				v_data_d =
+				(double)(v_reg_gyro_y_s_16/GYRO_DIV_RPS);
+				*v_gyro_y_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro z raw data
+ *	to dps output as double
+ *
+ *	@param v_gyro_z_d : The gyro z dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_z_dps(
+double *v_gyro_z_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_z_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as dps if the unit is in rps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_DPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_DPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw z data */
+			com_rslt += bno055_read_gyro_z(&v_reg_gyro_z_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw gyro z to dps */
+				v_data_d =
+				(double)(v_reg_gyro_z_s_16/GYRO_DIV_DPS);
+				*v_gyro_z_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro z raw data
+ *	to rps output as double
+ *
+ *	@param v_gyro_z_d : The gyro z rps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_z_rps(
+double *v_gyro_z_d)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gyro_z_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as rps if the unit is in dps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_RPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_RPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw x data */
+			com_rslt += bno055_read_gyro_z(&v_reg_gyro_z_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw gyro x to rps */
+				v_data_d =
+				(double)(v_reg_gyro_z_s_16/GYRO_DIV_RPS);
+				*v_gyro_z_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro xyz raw data
+ *	to dps output as double
+ *
+ *	@param gyro_xyz : The dps data of gyro xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | dps data of gyro
+ *	 y        | dps data of gyro
+ *	 z        | dps data of gyro
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_xyz_dps(
+struct bno055_gyro_double_t *gyro_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_gyro_t reg_gyro_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as dps if the unit is in rps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_DPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_DPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw xyz data */
+			com_rslt += bno055_read_gyro_xyz(&reg_gyro_xyz);
+			if (com_rslt == SUCCESS) {
+				/* Convert gyro raw xyz to dps*/
+				gyro_xyz->x =
+				(double)(reg_gyro_xyz.x/GYRO_DIV_DPS);
+				gyro_xyz->y =
+				(double)(reg_gyro_xyz.y/GYRO_DIV_DPS);
+				gyro_xyz->z =
+				(double)(reg_gyro_xyz.z/GYRO_DIV_DPS);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gyro xyz raw data
+ *	to rps output as double
+ *
+ *	@param gyro_xyz : The rps data of gyro xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | rps data of gyro
+ *	 y        | rps data of gyro
+ *	 z        | rps data of gyro
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_xyz_rps(
+struct bno055_gyro_double_t *gyro_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_gyro_t reg_gyro_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_gyro_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current gyro unit and set the
+	unit as rps if the unit is in dps */
+	com_rslt = bno055_get_gyro_unit(&v_gyro_unit_u_8);
+	if (v_gyro_unit_u_8 != GYRO_UNIT_RPS)
+		com_rslt += bno055_set_gyro_unit(GYRO_UNIT_RPS);
+		if (com_rslt == SUCCESS) {
+			/* Read gyro raw x data */
+			com_rslt += bno055_read_gyro_xyz(&reg_gyro_xyz);
+			if (com_rslt == SUCCESS) {
+				/* Convert the raw gyro xyz to rps*/
+				gyro_xyz->x =
+				(double)(reg_gyro_xyz.x/GYRO_DIV_RPS);
+				gyro_xyz->y =
+				(double)(reg_gyro_xyz.y/GYRO_DIV_RPS);
+				gyro_xyz->z =
+				(double)(reg_gyro_xyz.z/GYRO_DIV_RPS);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+			com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler h raw data
+ *	to degree output as double
+ *
+ *	@param v_euler_h_d : The double value of Euler h degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_h_deg(
+double *v_euler_h_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_euler_h_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as degree if the unit is in radians */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_DEG)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_DEG);
+		if (com_rslt ==  SUCCESS) {
+			/* Read Euler raw h data*/
+			com_rslt += bno055_read_euler_h(&v_reg_euler_h_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler h to degree */
+				v_data_d =
+				(double)(v_reg_euler_h_s_16/EULER_DIV_DEG);
+				*v_euler_h_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler h raw data
+ *	to radians output as double
+ *
+ *	@param v_euler_h_d : The double value of Euler h radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_h_rad(
+double *v_euler_h_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_euler_h_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as radians if the unit is in degree */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_RAD)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_RAD);
+		if (com_rslt == SUCCESS) {
+			/* Read Euler raw h data*/
+			com_rslt += bno055_read_euler_h(&v_reg_euler_h_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler h to radians */
+				v_data_d =
+				(double)(v_reg_euler_h_s_16/EULER_DIV_RAD);
+				*v_euler_h_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler r raw data
+ *	to degree output as double
+ *
+ *	@param v_euler_r_d : The double value of Euler r degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_r_deg(
+double *v_euler_r_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_euler_r_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as degree if the unit is in radians */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_DEG)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_DEG);
+		if (com_rslt ==  SUCCESS) {
+			/* Read Euler raw r data*/
+			com_rslt += bno055_read_euler_r(&v_reg_euler_r_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler r to degree */
+				v_data_d =
+				(double)(v_reg_euler_r_s_16/EULER_DIV_DEG);
+				*v_euler_r_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler r raw data
+ *	to radians output as double
+ *
+ *	@param v_euler_r_d : The double value of Euler r radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_r_rad(
+double *v_euler_r_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_euler_r_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as radians if the unit is in degree */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_RAD)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_RAD);
+		if (com_rslt == SUCCESS) {
+			/* Read Euler raw r data*/
+			com_rslt += bno055_read_euler_r(&v_reg_euler_r_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler r to radians */
+				v_data_d =
+				(double)(v_reg_euler_r_s_16/EULER_DIV_RAD);
+				*v_euler_r_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler p raw data
+ *	to degree output as double
+ *
+ *	@param v_euler_p_d : The double value of Euler p degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_p_deg(
+double *v_euler_p_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_euler_p_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as degree if the unit is in radians */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_DEG)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_DEG);
+		if (com_rslt ==  SUCCESS) {
+			/* Read Euler raw p data*/
+			com_rslt += bno055_read_euler_p(&v_reg_euler_p_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler p to degree*/
+				v_data_d =
+				(double)(v_reg_euler_p_s_16/EULER_DIV_DEG);
+				*v_euler_p_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler p raw data
+ *	to radians output as double
+ *
+ *	@param v_euler_p_d : The double value of Euler p radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_p_rad(
+double *v_euler_p_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_euler_p_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as radians if the unit is in degree */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_RAD)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_RAD);
+		if (com_rslt == SUCCESS) {
+			/* Read Euler raw p data*/
+			com_rslt += bno055_read_euler_p(&v_reg_euler_p_s_16);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw p to radians*/
+				v_data_d =
+				(double)(v_reg_euler_p_s_16/EULER_DIV_RAD);
+				*v_euler_p_d = v_data_d;
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler hpr raw data
+ *	to degree output as double
+ *
+ *	@param euler_hpr : The degree data of Euler hpr
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 h        | degree data of Euler
+ *	 r        | degree data of Euler
+ *	 p        | degree data of Euler
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_hpr_deg(
+struct bno055_euler_double_t *euler_hpr)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_euler_t reg_euler = {BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as degree if the unit is in radians */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_DEG)
+		com_rslt += bno055_set_euler_unit(EULER_UNIT_DEG);
+	if (com_rslt == SUCCESS) {
+		/* Read Euler raw h data*/
+			com_rslt += bno055_read_euler_hrp(&reg_euler);
+		if (com_rslt == SUCCESS) {
+			/* Convert raw Euler hrp to degree*/
+			euler_hpr->h =
+			(double)(reg_euler.h/EULER_DIV_DEG);
+			euler_hpr->p =
+			(double)(reg_euler.p/EULER_DIV_DEG);
+			euler_hpr->r =
+			(double)(reg_euler.r/EULER_DIV_DEG);
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the Euler hpr raw data
+ *	to radians output as double
+ *
+ *	@param euler_hpr : The radians data of Euler hpr
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 h        | radians data of Euler
+ *	 r        | radians data of Euler
+ *	 p        | radians data of Euler
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_hpr_rad(
+struct bno055_euler_double_t *euler_hpr)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_euler_t reg_euler = {BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	u_8 v_euler_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current Euler unit and set the
+	unit as radians if the unit is in degree */
+	com_rslt = bno055_get_euler_unit(&v_euler_unit_u_8);
+	if (v_euler_unit_u_8 != EULER_UNIT_RAD)
+		com_rslt = bno055_set_euler_unit(EULER_UNIT_RAD);
+		if (com_rslt == SUCCESS) {
+			/* Read the raw hrp */
+			com_rslt = bno055_read_euler_hrp(&reg_euler);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw Euler hrp to radians*/
+				euler_hpr->h =
+				(double)(reg_euler.h/EULER_DIV_RAD);
+				euler_hpr->p =
+				(double)(reg_euler.p/EULER_DIV_RAD);
+				euler_hpr->r =
+				(double)(reg_euler.r/EULER_DIV_RAD);
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+			com_rslt = ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel x raw data to meterpersecseq output as double
+ *
+ *	@param v_linear_accel_x_d : The double value of
+ *	linear accel x meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_linear_accel_x_msq(
+double *v_linear_accel_x_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_linear_accel_x_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	/* Read the raw x of linear accel */
+	com_rslt = bno055_read_linear_accel_x(&v_reg_linear_accel_x_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw x to m/s2 */
+		v_data_d = (double)
+		(v_reg_linear_accel_x_s_16/LINEAR_ACCEL_DIV_MSQ);
+		*v_linear_accel_x_d = v_data_d;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel y raw data to meterpersecseq output as double
+ *
+ *	@param v_linear_accel_y_d : The double value of
+ *	linear accel y meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_linear_accel_y_msq(
+double *v_linear_accel_y_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_linear_accel_y_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	/* Read the raw x of linear accel */
+	com_rslt = bno055_read_linear_accel_y(&v_reg_linear_accel_y_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw y to m/s2 */
+		v_data_d = (double)
+		(v_reg_linear_accel_y_s_16/LINEAR_ACCEL_DIV_MSQ);
+		*v_linear_accel_y_d = v_data_d;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel z raw data to meterpersecseq output as double
+ *
+ *	@param v_linear_accel_z_d : The double value of
+ *	linear accel z meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_linear_accel_z_msq(
+double *v_linear_accel_z_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_linear_accel_z_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	/* Read the raw x of linear accel */
+	com_rslt = bno055_read_linear_accel_z(&v_reg_linear_accel_z_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw z to m/s2 */
+		v_data_d =
+		(double)(v_reg_linear_accel_z_s_16/LINEAR_ACCEL_DIV_MSQ);
+		*v_linear_accel_z_d = v_data_d;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the linear accel xyz raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param linear_accel_xyz : The meterpersecseq data of linear accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | meterpersecseq data of linear accel
+ *	 y        | meterpersecseq data of linear accel
+ *	 z        | meterpersecseq data of linear accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_linear_accel_xyz_msq(
+struct bno055_linear_accel_double_t *linear_accel_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_linear_accel_t reg_linear_accel_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	/* Read the raw xyz of linear accel */
+	com_rslt = bno055_read_linear_accel_xyz(&reg_linear_accel_xyz);
+	if (com_rslt == SUCCESS) {
+		/* Convert the raw xyz of linear accel to m/s2 */
+		linear_accel_xyz->x =
+		(double)(reg_linear_accel_xyz.x/LINEAR_ACCEL_DIV_MSQ);
+		linear_accel_xyz->y =
+		(double)(reg_linear_accel_xyz.y/LINEAR_ACCEL_DIV_MSQ);
+		linear_accel_xyz->z =
+		(double)(reg_linear_accel_xyz.z/LINEAR_ACCEL_DIV_MSQ);
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gravity
+ *	x raw data to meterpersecseq output as double
+ *
+ *	@param v_gravity_x_d : The double value of gravity x meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_double_x_msq(
+double *v_gravity_x_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gravity_x_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	/* Read raw gravity of x*/
+	com_rslt = bno055_read_gravity_x(&v_reg_gravity_x_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert raw gravity of x to m/s2 */
+		v_data_d =
+		(double)(v_reg_gravity_x_s_16/GRAVITY_DIV_MSQ);
+		*v_gravity_x_d = v_data_d;
+	} else {
+		com_rslt = ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gravity
+ *	y raw data to meterpersecseq output as double
+ *
+ *	@param v_gravity_y_d : The double value of gravity y meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_double_y_msq(
+double *v_gravity_y_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gravity_y_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	/* Read raw gravity of y */
+	com_rslt = bno055_read_gravity_y(&v_reg_gravity_y_s_16);
+	if (com_rslt == SUCCESS) {
+		/* convert raw gravity of y to m/s2 */
+		v_data_d =
+		(double)(v_reg_gravity_y_s_16/GRAVITY_DIV_MSQ);
+		*v_gravity_y_d = v_data_d;
+	} else {
+		com_rslt += ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gravity
+ *	z raw data to meterpersecseq output as double
+ *
+ *	@param v_gravity_z_d : The double value of gravity z meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_double_z_msq(
+double *v_gravity_z_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_16 v_reg_gravity_z_s_16 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	/* Read raw gravity of z */
+	com_rslt = bno055_read_gravity_z(&v_reg_gravity_z_s_16);
+	if (com_rslt == SUCCESS) {
+		/* Convert raw gravity of z to m/s2 */
+		v_data_d =
+		(double)(v_reg_gravity_z_s_16/GRAVITY_DIV_MSQ);
+		*v_gravity_z_d = v_data_d;
+	} else {
+		com_rslt += ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the gravity xyz raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param gravity_xyz : The meterpersecseq data of gravity xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | meterpersecseq data of gravity
+ *	 y        | meterpersecseq data of gravity
+ *	 z        | meterpersecseq data of gravity
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gravity_xyz_msq(
+struct bno055_gravity_double_t *gravity_xyz)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	struct bno055_gravity_t reg_gravity_xyz = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	/* Read raw gravity of xyz */
+	com_rslt = bno055_read_gravity_xyz(&reg_gravity_xyz);
+	if (com_rslt == SUCCESS) {
+		/* Convert raw gravity of xyz to m/s2 */
+		gravity_xyz->x =
+		(double)(reg_gravity_xyz.x/GRAVITY_DIV_MSQ);
+		gravity_xyz->y =
+		(double)(reg_gravity_xyz.y/GRAVITY_DIV_MSQ);
+		gravity_xyz->z =
+		(double)(reg_gravity_xyz.z/GRAVITY_DIV_MSQ);
+	} else {
+		com_rslt += ERROR;
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the temperature
+ *	data to Fahrenheit output as double
+ *
+ *	@param v_temp_d : The double value of temperature Fahrenheit
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_temp_fahrenheit(
+double *v_temp_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_8 v_reg_temp_s_8 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_temp_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current temperature unit and set the
+	unit as Fahrenheit if the unit is in Celsius */
+	com_rslt = bno055_get_temp_unit(&v_temp_unit_u_8);
+	if (v_temp_unit_u_8 != TEMP_UNIT_FAHRENHEIT)
+		com_rslt += bno055_set_temp_unit(TEMP_UNIT_FAHRENHEIT);
+		if (com_rslt == SUCCESS) {
+			/* Read the raw temperature data */
+			com_rslt += bno055_read_temp_data(&v_reg_temp_s_8);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw temperature data to Fahrenheit*/
+				v_data_d =
+				(double)(v_reg_temp_s_8/TEMP_DIV_FAHRENHEIT);
+				*v_temp_d = v_data_d;
+			} else {
+			com_rslt += ERROR;
+			}
+		} else {
+		com_rslt += ERROR;
+		}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to convert the temperature
+ *	data to Celsius output as double
+ *
+ *	@param v_temp_d : The double value of temperature Celsius
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_temp_celsius(
+double *v_temp_d)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	s_8 v_reg_temp_s_8 = BNO055_ZERO_U8X;
+	double v_data_d = BNO055_ZERO_U8X;
+	u_8 v_temp_unit_u_8 = BNO055_ZERO_U8X;
+	/* Read the current temperature unit and set the
+	unit as Fahrenheit if the unit is in Celsius */
+	com_rslt = bno055_get_temp_unit(&v_temp_unit_u_8);
+	if (v_temp_unit_u_8 != TEMP_UNIT_CELSIUS)
+		com_rslt += bno055_set_temp_unit(TEMP_UNIT_CELSIUS);
+		if (com_rslt == SUCCESS) {
+			/* Read the raw temperature data */
+			com_rslt += bno055_read_temp_data(&v_reg_temp_s_8);
+			if (com_rslt == SUCCESS) {
+				/* Convert raw temperature data to Fahrenheit*/
+				v_data_d =
+				(double)(v_reg_temp_s_8/TEMP_DIV_CELSIUS);
+				*v_temp_d = v_data_d;
+			} else {
+			com_rslt += ERROR;
+			}
+		} else {
+		com_rslt += ERROR;
+		}
+	return com_rslt;
+}
+#endif
+/*!
+ *	@brief This API used to read
+ *	mag calibration status from register from 0x35 bit 0 and 1
+ *
+ *	@param v_mag_calib_u_8 : The value of mag calib status
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_calib_stat(
+u_8 *v_mag_calib_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, mag calib
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the mag calib v_stat_s_8 */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_CALIB_STAT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_mag_calib_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_MAG_CALIB_STAT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read
+ *	accel calibration status from register from 0x35 bit 2 and 3
+ *
+ *	@param v_accel_calib_u_8 : The value of accel calib status
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_calib_stat(
+u_8 *v_accel_calib_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty*/
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel calib
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the accel calib v_stat_s_8 */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_CALIB_STAT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_calib_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_CALIB_STAT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read
+ *	gyro calibration status from register from 0x35 bit 4 and 5
+ *
+ *	@param v_gyro_calib_u_8 : The value of gyro calib status
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_calib_stat(
+u_8 *v_gyro_calib_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro calib
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the gyro calib status */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_CALIB_STAT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_calib_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_CALIB_STAT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read
+ *	system calibration status from register from 0x35 bit 6 and 7
+ *
+ *	@param v_sys_calib_u_8 : The value of system calib status
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_sys_calib_stat(
+u_8 *v_sys_calib_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty*/
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page,system calib
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the system calib */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SYS_CALIB_STAT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_sys_calib_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_SYS_CALIB_STAT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read
+ *	self test of accel from register from 0x36 bit 0
+ *
+ *	@param v_selftest_accel_u_8 : The value of self test of accel
+ *
+ *    v_selftest_accel_u_8 |  result
+ *   -------------------- | ---------------------
+ *     0x00               | indicates test failed
+ *     0x01               | indicated test passed
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest_accel(
+u_8 *v_selftest_accel_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel self test is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the accel self test */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SELFTEST_ACCEL__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_selftest_accel_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_SELFTEST_ACCEL);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read
+ *	self test of mag from register from 0x36 bit 1
+ *
+ *	@param v_selftest_mag_u_8 : The value of self test of mag
+ *
+ *     v_selftest_mag_u_8  |  result
+ *   -------------------- | ---------------------
+ *     0x00               | indicates test failed
+ *     0x01               | indicated test passed
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest_mag(
+u_8 *v_selftest_mag_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, self test of mag is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the mag self test */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SELFTEST_MAG__REG, &v_data_u_8r, BNO055_ONE_U8X);
+			*v_selftest_mag_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_SELFTEST_MAG);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read
+ *	self test of gyro from register from 0x36 bit 2
+ *
+ *	@param v_selftest_gyro_u_8 : The value of self test of gyro
+ *
+ *     v_selftest_gyro_u_8 |  result
+ *   -------------------- | ---------------------
+ *     0x00               | indicates test failed
+ *     0x01               | indicated test passed
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest_gyro(
+u_8 *v_selftest_gyro_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page self test of gyro is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the gyro self test */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SELFTEST_GYRO__REG, &v_data_u_8r, BNO055_ONE_U8X);
+			*v_selftest_gyro_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_SELFTEST_GYRO);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read
+ *	self test of micro controller from register from 0x36 bit 3
+ *
+ *	@param v_selftest_mcu_u_8 : The value of self test of micro controller
+ *
+ *     v_selftest_mcu_u_8  |  result
+ *   -------------------- | ---------------------
+ *     0x00               | indicates test failed
+ *     0x01               | indicated test passed
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest_mcu(
+u_8 *v_selftest_mcu_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page self test of micro controller
+		is available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the self test of micro controller*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SELFTEST_MCU__REG, &v_data_u_8r, BNO055_ONE_U8X);
+			*v_selftest_mcu_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_SELFTEST_MCU);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the v_stat_s_8 of
+ *	gyro anymotion interrupt from register from 0x37 bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt
+ *
+ *     v_gyro_any_motion_u_8  |  result
+ *    --------------------   | ---------------------
+ *     0x00                  | indicates no interrupt triggered
+ *     0x01                  | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro anymotion interrupt can be enabled
+ *	by the following APIs
+ *
+ *	bno055_set_intr_mask_gyro_any_motion()
+ *
+ *	bno055_set_intr_gyro_any_motion()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_gyro_any_motion(
+u_8 *v_gyro_any_motion_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro anymotion interrupt
+		status is available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the gyro anymotion interrupt v_stat_s_8*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_INTR_STAT_GYRO_ANY_MOTION__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_any_motion_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_INTR_STAT_GYRO_ANY_MOTION);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the v_stat_s_8 of
+ *	gyro highrate interrupt from register from 0x37 bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt
+ *
+ *     v_gyro_highrate_u_8   |  result
+ *    -------------------   | ---------------------
+ *     0x00                 | indicates no interrupt triggered
+ *     0x01                 | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate interrupt can be configured
+ *			by the following APIs
+ *
+ *	bno055_set_intr_mask_gyro_highrate()
+ *
+ *	bno055_set_intr_gyro_highrate()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_gyro_highrate(
+u_8 *v_gyro_highrate_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the gyro highrate interrupt v_stat_s_8*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_INTR_STAT_GYRO_HIGHRATE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_INTR_STAT_GYRO_HIGHRATE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the v_stat_s_8 of
+ *	accel highg interrupt from register from 0x37 bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt
+ *
+ *     v_accel_high_g_u_8    |  result
+ *    -------------------   | ---------------------
+ *     0x00                 | indicates no interrupt triggered
+ *     0x01                 | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel highg interrupt can be configured
+ *			by the following APIs
+ *
+ *	bno055_set_intr_mask_accel_high_g()
+ *
+ *	bno055_set_intr_accel_high_g()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_accel_high_g(
+u_8 *v_accel_high_g_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel highg is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the accel highg interrupt v_stat_s_8 */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_INTR_STAT_ACCEL_HIGH_G__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_high_g_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_INTR_STAT_ACCEL_HIGH_G);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the v_stat_s_8 of
+ *	accel anymotion interrupt from register from 0x37 bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt
+ *
+ *     v_accel_any_motion_u_8 |  result
+ *    -------------------   | ---------------------
+ *     0x00                 | indicates no interrupt triggered
+ *     0x01                 | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel anymotion interrupt can be configured
+ *			by the following APIs
+ *
+ *	bno055_set_intr_mask_accel_any_motion()
+ *
+ *	bno055_set_intr_accel_any_motion()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_accel_any_motion(
+u_8 *v_accel_any_motion_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel anymotion is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the accel anymotion interrupt v_stat_s_8 */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_INTR_STAT_ACCEL_ANY_MOTION__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_any_motion_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_INTR_STAT_ACCEL_ANY_MOTION);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the v_stat_s_8 of
+ *	accel nomotion/slowmotion interrupt from register from 0x37 bit 6
+ *
+ *	@param v_accel_no_motion_u_8 : The value of accel
+ *	nomotion/slowmotion interrupt
+ *
+ *     v_accel_no_motion_u_8 |  result
+ *    -------------------   | ---------------------
+ *     0x00                 | indicates no interrupt triggered
+ *     0x01                 | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel nomotion/slowmotion interrupt can be configured
+ *			by the following APIs
+ *
+ *	bno055_set_intr_mask_accel_nomotion()
+ *
+ *	bno055_set_intr_accel_nomotion()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_accel_no_motion(
+u_8 *v_accel_no_motion_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel
+		nomotion/slowmotion interrupt
+		is available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the v_stat_s_8 of accel
+			nomotion/slowmotion interrupt*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_INTR_STAT_ACCEL_NO_MOTION__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_no_motion_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_INTR_STAT_ACCEL_NO_MOTION);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to read status of main clock
+ *	from the register 0x38 bit 0
+ *
+ *	@param v_stat_main_clk_u_8 : the status of main clock
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_stat_main_clk(
+u_8 *v_stat_main_clk_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, status of main clk is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the status of main clk */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SYS_MAIN_CLK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_stat_main_clk_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_SYS_MAIN_CLK);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to read system status
+ *	code from the register 0x39 it is a byte of data
+ *
+ *	@param v_sys_stat_u_8 : the status of system
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_sys_stat_code(
+u_8 *v_sys_stat_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, the status of system is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the the status of system*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SYS_STAT_CODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_sys_stat_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_SYS_STAT_CODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to read system error
+ *	code from the register 0x3A it is a byte of data
+ *
+ *	@param v_sys_error_u_8 : The value of system error code
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_sys_error_code(
+u_8 *v_sys_error_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, system error code is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the system error code*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SYS_ERROR_CODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_sys_error_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_SYS_ERROR_CODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel unit
+ *	from register from 0x3B bit 0
+ *
+ *	@param v_accel_unit_u_8 : The value of accel unit
+ *
+ *    v_accel_unit_u_8 |   result
+ *   -------------    | ---------------
+ *        0x00        | ACCEL_UNIT_MSQ
+ *        0x01        | ACCEL_UNIT_MG
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_unit(
+u_8 *v_accel_unit_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel unit is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the accel unit */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_UNIT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_unit_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_ACCEL_UNIT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel unit
+ *	from register from 0x3B bit 0
+ *
+ *	@param v_accel_unit_u_8 : The value of accel unit
+ *
+ *    v_accel_unit_u_8 |   result
+ *   -------------    | ---------------
+ *        0x00        | ACCEL_UNIT_MSQ
+ *        0x01        | ACCEL_UNIT_MG
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_unit(
+u_8 v_accel_unit_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the accel unit */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_UNIT__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_ACCEL_UNIT, v_accel_unit_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_UNIT__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro unit
+ *	from register from 0x3B bit 1
+ *
+ *	@param v_gyro_unit_u_8 : The value of accel unit
+ *
+ *	v_gyro_unit_u_8  |  result
+ *	-------------   | -----------
+ *    0x00          | GYRO_UNIT_DPS
+ *    0x01          | GYRO_UNIT_RPS
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_unit(
+u_8 *v_gyro_unit_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro unit is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the gyro unit */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_UNIT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_unit_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_GYRO_UNIT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro unit
+ *	from register from 0x3B bit 1
+ *
+ *	@param v_gyro_unit_u_8 : The value of accel unit
+ *
+ *	v_gyro_unit_u_8  |  result
+ *	-------------   | -----------
+ *    0x00          | GYRO_UNIT_DPS
+ *    0x01          | GYRO_UNIT_RPS
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_unit(u_8 v_gyro_unit_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the gyro unit */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_UNIT__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_UNIT, v_gyro_unit_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_UNIT__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the Euler unit
+ *	from register from 0x3B bit 2
+ *
+ *	@param v_euler_unit_u_8 : The value of accel unit
+ *
+ *    v_euler_unit_u_8 | result
+ *   --------------   | -----------
+ *      0x00          | EULER_UNIT_DEG
+ *      0x01          | EULER_UNIT_RAD
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_euler_unit(
+u_8 *v_euler_unit_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, Euler unit is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the Euler unit */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_EULER_UNIT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_euler_unit_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_EULER_UNIT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the Euler unit
+ *	from register from 0x3B bit 2
+ *
+ *	@param v_euler_unit_u_8 : The value of Euler unit
+ *
+ *    v_euler_unit_u_8 | result
+ *   --------------   | -----------
+ *      0x00          | EULER_UNIT_DEG
+ *      0x01          | EULER_UNIT_RAD
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_euler_unit(u_8 v_euler_unit_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the Euler unit*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_EULER_UNIT__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_EULER_UNIT, v_euler_unit_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_EULER_UNIT__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the tilt unit
+ *	from register from 0x3B bit 3
+ *
+ *	@param v_tilt_unit_u_8 : The value of tilt unit
+ *
+ *    v_tilt_unit_u_8  | result
+ *   ---------------  | ---------
+ *     0x00           | degrees
+ *     0x01           | radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_tilt_unit(
+u_8 *v_tilt_unit_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, chip id is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_TILT_UNIT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_tilt_unit_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_TILT_UNIT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the tilt unit
+ *	from register from 0x3B bit 3
+ *
+ *	@param v_tilt_unit_u_8 : The value of tilt unit
+ *
+ *    v_tilt_unit_u_8  | result
+ *   ---------------  | ---------
+ *     0x00           | degrees
+ *     0x01           | radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ *  \return Communication results
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_tilt_unit(u_8 v_tilt_unit_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_TILT_UNIT__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_TILT_UNIT, v_tilt_unit_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_TILT_UNIT__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the temperature unit
+ *	from register from 0x3B bit 4
+ *
+ *	@param v_temp_unit_u_8 : The value of temperature unit
+ *
+ *    v_temp_unit_u_8  |  result
+ *   -----------      | --------------
+ *      0x00          | TEMP_UNIT_CELCIUS
+ *      0x01          | TEMP_UNIT_FAHRENHEIT
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_temp_unit(
+u_8 *v_temp_unit_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, temperature unit is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the temperature unit */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_TEMP_UNIT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_temp_unit_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_TEMP_UNIT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the temperature unit
+ *	from register from 0x3B bit 4
+ *
+ *	@param v_temp_unit_u_8 : The value of temperature unit
+ *
+ *    v_temp_unit_u_8  |  result
+ *   -----------      | --------------
+ *      0x00          | TEMP_UNIT_CELCIUS
+ *      0x01          | TEMP_UNIT_FAHRENHEIT
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_temp_unit(
+u_8 v_temp_unit_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the temperature unit */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_TEMP_UNIT__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_TEMP_UNIT,
+					v_temp_unit_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_TEMP_UNIT__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the current selected orientation mode
+ *	from register from 0x3B bit 7
+ *
+ *	@param v_data_output_format_u_8 : The value of data output format
+ *
+ *	  v_data_output_format_u_8  | result
+ *   --------------------      | --------
+ *    0x00                     | Windows
+ *    0x01                     | Android
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_data_output_format(
+u_8 *v_data_output_format_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, data output format is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the data output format */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_DATA_OUTPUT_FORMAT__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_data_output_format_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_DATA_OUTPUT_FORMAT);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the current selected orientation mode
+ *	from register from 0x3B bit 7
+ *
+ *	@param v_data_output_format_u_8 : The value of data output format
+ *
+ *	  v_data_output_format_u_8  | result
+ *   --------------------      | --------
+ *    0x00                     | Windows
+ *    0x01                     | Android
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_data_output_format(
+u_8 v_data_output_format_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the data output format */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_DATA_OUTPUT_FORMAT__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_DATA_OUTPUT_FORMAT,
+					v_data_output_format_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_DATA_OUTPUT_FORMAT__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!	@brief This API used to read the operation mode
+ *	from register from 0x3D bit 0 to 3
+ *
+ *	@param v_operation_mode_u_8 : The value of operation mode
+ *
+ * v_operation_mode_u_8 |      result      | comments
+ * ----------|----------------------------|----------------------------
+ *  0x00     | OPERATION_MODE_CONFIG      | Configuration mode
+ *  0x01     | OPERATION_MODE_ACCONLY     | Reads accel data alone
+ *  0x02     | OPERATION_MODE_MAGONLY     | Reads mag data alone
+ *  0x03     | OPERATION_MODE_GYRONLY     | Reads gyro data alone
+ *  0x04     | OPERATION_MODE_ACCMAG      | Reads accel and mag data
+ *  0x05     | OPERATION_MODE_ACCGYRO     | Reads accel and gyro data
+ *  0x06     | OPERATION_MODE_MAGGYRO     | Reads accel and mag data
+ *  0x07     | OPERATION_MODE_ANY_MOTION  | Reads accel mag and gyro data
+ *  0x08     | OPERATION_MODE_IMUPLUS     | Inertial measurement unit
+ *   -       |       -                    | Reads accel,gyro and fusion data
+ *  0x09     | OPERATION_MODE_COMPASS     | Reads accel, mag data
+ *   -       |       -                    | and fusion data
+ *  0x0A     | OPERATION_MODE_M4G         | Reads accel, mag data
+ *    -      |       -                    | and fusion data
+ *  0x0B     | OPERATION_MODE_NDOF_FMC_OFF| Nine degrees of freedom with
+ *   -       |       -                    | fast magnetic calibration
+ *   -       |       -                    | Reads accel,mag, gyro
+ *   -       |       -                    | and fusion data
+ *  0x0C     | OPERATION_MODE_NDOF        | Nine degrees of freedom
+ *   -       |       -                    | Reads accel,mag, gyro
+ *   -       |       -                    | and fusion data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note In the config mode, all sensor and fusion data
+ *	becomes zero and it is mainly derived
+ *	to configure the various settings of the BNO
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_operation_mode(
+u_8 *v_operation_mode_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, operation mode is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of operation mode*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_OPERATION_MODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_operation_mode_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_OPERATION_MODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!	@brief This API used to write the operation mode
+ *	from register from 0x3D bit 0 to 3
+ *
+ *	@param v_operation_mode_u_8 : The value of operation mode
+ *
+ *  v_operation_mode_u_8  |      result    | comments
+ * ----------|----------------------------|----------------------------
+ *  0x00     | OPERATION_MODE_CONFIG      | Configuration mode
+ *  0x01     | OPERATION_MODE_ACCONLY     | Reads accel data alone
+ *  0x02     | OPERATION_MODE_MAGONLY     | Reads mag data alone
+ *  0x03     | OPERATION_MODE_GYRONLY     | Reads gyro data alone
+ *  0x04     | OPERATION_MODE_ACCMAG      | Reads accel and mag data
+ *  0x05     | OPERATION_MODE_ACCGYRO     | Reads accel and gyro data
+ *  0x06     | OPERATION_MODE_MAGGYRO     | Reads accel and mag data
+ *  0x07     | OPERATION_MODE_ANY_MOTION  | Reads accel mag and gyro data
+ *  0x08     | OPERATION_MODE_IMUPLUS     | Inertial measurement unit
+ *   -       |       -                    | Reads accel,gyro and fusion data
+ *  0x09     | OPERATION_MODE_COMPASS     | Reads accel, mag data
+ *   -       |       -                    | and fusion data
+ *  0x0A     | OPERATION_MODE_M4G         | Reads accel, mag data
+ *    -      |       -                    | and fusion data
+ *  0x0B     | OPERATION_MODE_NDOF_FMC_OFF| Nine degrees of freedom with
+ *   -       |       -                    | fast magnetic calibration
+ *   -       |       -                    | Reads accel,mag, gyro
+ *   -       |       -                    | and fusion data
+ *  0x0C     | OPERATION_MODE_NDOF        | Nine degrees of freedom
+ *   -       |       -                    | Reads accel,mag, gyro
+ *   -       |       -                    | and fusion data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note In the config mode, all sensor and fusion data
+ *	becomes zero and it is mainly derived
+ *	to configure the various settings of the BNO
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_operation_mode(u_8 v_operation_mode_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			/* If the previous operation mode is config it is
+				directly write the operation mode */
+			if (v_prev_opmode_u_8 == OPERATION_MODE_CONFIG) {
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_OPERATION_MODE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_OPERATION_MODE,
+					v_operation_mode_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_OPERATION_MODE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					/* Config mode to other
+					operation mode switching
+					required delay of 600ms*/
+					p_bno055->delay_msec(
+						BNO055_SIX_HUNDRES_U8X);
+				}
+			} else {
+				/* If the previous operation
+				mode is not config it is
+				 write the config mode */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_OPERATION_MODE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_OPERATION_MODE,
+					OPERATION_MODE_CONFIG);
+					com_rslt += bno055_write_register(
+					BNO055_OPERATION_MODE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					/* other mode to config mode switching
+					required delay of 20ms*/
+					p_bno055->delay_msec(BNO055_TWENTY_U8X);
+				}
+				/* Write the operation mode */
+				if (v_operation_mode_u_8 !=
+				OPERATION_MODE_CONFIG) {
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_OPERATION_MODE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data_u_8r = BNO055_SET_BITSLICE
+						(v_data_u_8r,
+						BNO055_OPERATION_MODE,
+						v_operation_mode_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_OPERATION_MODE__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+						/* Config mode to other
+						operation mode switching
+						required delay of 600ms*/
+						p_bno055->delay_msec(
+						BNO055_SIX_HUNDRES_U8X);
+					}
+				}
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!	@brief This API used to read the power mode
+ *	from register from 0x3E bit 0 to 1
+ *
+ *	@param v_power_mode_u_8 : The value of power mode
+ *
+ * v_power_mode_u_8|      result    | comments
+ * ----------|---------------------|-------------------------------------
+ *  0x00     | POWER_MODE_NORMAL   | In the NORMAL mode the register
+ *    -      |       -             | map and the internal peripherals
+ *    -      |       -             | of the MCU are always
+ *    -      |       -             | operative in this mode
+ *  0x01     | POWER_MODE_LOWPOWER | This is first level of power saving mode
+ *  0x02     | POWER_MODE_SUSPEND  | In suspend mode the system is
+ *   -       |      -              | paused and all the sensors and
+ *   -       |      -              | the micro controller are
+ *   -       |      -              | put into sleep mode.
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note For detailed about LOWPOWER mode
+ *	refer data sheet 3.4.2
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_power_mode(
+u_8 *v_power_mode_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, power mode is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of power mode */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_POWER_MODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_power_mode_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_POWER_MODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!	@brief This API used to write the power mode
+ *	from register from 0x3E bit 0 to 1
+ *
+ *	@param v_power_mode_u_8 : The value of power mode
+ *
+ * v_power_mode_u_8 |      result        | comments
+ * ----------|---------------------|-------------------------------------
+ *  0x00     | POWER_MODE_NORMAL   | In the NORMAL mode the register
+ *    -      |       -             | map and the internal peripherals
+ *    -      |       -             | of the MCU are always
+ *    -      |       -             | operative in this mode
+ *  0x01     | POWER_MODE_LOWPOWER | This is first level of power saving mode
+ *  0x02     | POWER_MODE_SUSPEND  | In suspend mode the system is
+ *   -       |      -              | paused and all the sensors and
+ *   -       |      -              | the micro controller are
+ *   -       |      -              | put into sleep mode.
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note For detailed about LOWPOWER mode
+ *	refer data sheet 3.4.2
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_power_mode(u_8 v_power_mode_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the value of power mode */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_POWER_MODE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_POWER_MODE, v_power_mode_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_POWER_MODE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the reset interrupt
+ *	from register from 0x3F bit 6
+ *	It resets all the interrupt bit and interrupt output
+ *
+ *	@param v_intr_rst_u_8 : The value of reset interrupt
+ *
+ *    v_intr_rst_u_8 | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_rst(
+u_8 *v_intr_rst_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page,  reset interrupt is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of reset interrupt*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_INTR_RST__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_intr_rst_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_INTR_RST);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the reset interrupt
+ *	from register from 0x3F bit 6
+ *	It resets all the interrupt bit and interrupt output
+ *
+ *	@param v_intr_rst_u_8 : The value of reset interrupt
+ *
+ *    v_intr_rst_u_8 | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_rst(u_8 v_intr_rst_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, reset interrupt
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Write the value of reset interrupt */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_INTR_RST__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_INTR_RST, v_intr_rst_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_INTR_RST__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the clk source
+ *	from register from 0x3F bit 7
+ *
+ *	@param v_clk_src_u_8 : The value of clk source
+ *
+ *	 v_clk_src_u_8   | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_clk_src(
+u_8 *v_clk_src_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, clk source is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of clk source */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_CLK_SRC__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_clk_src_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r, BNO055_CLK_SRC);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the clk source
+ *	from register from 0x3F bit 7
+ *
+ *	@param v_clk_src_u_8 : The value of clk source
+ *
+ *	 v_clk_src_u_8   | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_clk_src(u_8 v_clk_src_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, clk source is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Write the value of clk source */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_CLK_SRC__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_CLK_SRC, v_clk_src_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_CLK_SRC__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the reset system
+ *	from register from 0x3F bit 5
+ *
+ *	@param v_sys_rst_u_8 : The value of reset system
+ *
+ *	 v_sys_rst_u_8   | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note It resets the whole system
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_sys_rst(
+u_8 *v_sys_rst_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, reset system is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of reset system */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SYS_RST__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_sys_rst_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_SYS_RST);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the reset system
+ *	from register from 0x3F bit 5
+ *
+ *	@param v_sys_rst_u_8 : The value of reset system
+ *
+ *	 v_sys_rst_u_8   | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note It resets the whole system
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_sys_rst(u_8 v_sys_rst_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, reset system is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Write the value of reset system */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SYS_RST__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_SYS_RST, v_sys_rst_u_8);
+				com_rslt =
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_SYS_RST__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the self test
+ *	from register from 0x3F bit 0
+ *
+ *	@param v_selftest_u_8 : The value of self test
+ *
+ *	 v_selftest_u_8  | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note It triggers the self test
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest(
+u_8 *v_selftest_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, self test is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of self test */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SELFTEST__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_selftest_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_SELFTEST);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the self test
+ *	from register from 0x3F bit 0
+ *
+ *	@param v_selftest_u_8 : The value of self test
+ *
+ *	 v_selftest_u_8  | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note It triggers the self test
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_selftest(u_8 v_selftest_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the value of self test */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_SELFTEST__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_SELFTEST,
+					v_selftest_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SELFTEST__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the temperature source
+ *	from register from 0x40 bit 0 and 1
+ *
+ *	@param v_temp_source_u_8 : The value of selected temperature source
+ *
+ *     v_temp_source_u_8 | result
+ *    ----------------  |---------------
+ *      0x00            | ACCEL_TEMP_EN
+ *      0X01            | GYRO_TEMP_EN
+ *      0X03            | MCU_TEMP_EN
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_temp_source(
+u_8 *v_temp_source_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, temperature source is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of temperature source */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_TEMP_SOURCE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_temp_source_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_TEMP_SOURCE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the temperature source
+ *	from register from 0x40 bit 0 and 1
+ *
+ *	@param v_temp_source_u_8 : The value of selected temperature source
+ *
+ *     v_temp_source_u_8 | result
+ *    ----------------  |---------------
+ *      0x00            | ACCEL_TEMP_EN
+ *      0X01            | GYRO_TEMP_EN
+ *      0X03            | MCU_TEMP_EN
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_temp_source(u_8 v_temp_source_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the value of temperature source*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_TEMP_SOURCE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_TEMP_SOURCE, v_temp_source_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_TEMP_SOURCE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the axis remap value
+ *	from register from 0x41 bit 0 and 5
+ *
+ *	@param v_remap_axis_u_8 : The value of axis remapping
+ *
+ *    v_remap_axis_u_8 |   result     | comments
+ *   ------------|-------------------|------------
+ *      0X21     | REMAP_X_Y         | Z=Z;X=Y;Y=X
+ *      0X18     | REMAP_Y_Z         | X=X;Y=Z;Z=Y
+ *      0X06     | REMAP_Z_X         | Y=Y;X=Z;Z=X
+ *      0X12     | REMAP_X_Y_Z_TYPE0 | X=Z;Y=X;Z=Y
+ *      0X09     | REMAP_X_Y_Z_TYPE1 | X=Y;Y=Z;Z=X
+ *      0X24     | DEFAULT_AXIS      | X=X;Y=Y;Z=Z
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note : For axis sign remap refer the following functions
+ *	x-axis :
+ *
+ *	bno055_set_x_remap_sign()
+ *
+ *	y-axis :
+ *
+ *	bno055_set_y_remap_sign()
+ *
+ *	z-axis :
+ *
+ *	bno055_set_z_remap_sign()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_axis_remap_value(
+u_8 *v_remap_axis_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, axis remap is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of axis remap*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_REMAP_AXIS_VALUE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_remap_axis_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_REMAP_AXIS_VALUE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the axis remap value
+ *	from register from 0x41 bit 0 and 5
+ *
+ *	@param v_remap_axis_u_8 : The value of axis remapping
+ *
+ *    v_remap_axis_u_8 |   result     | comments
+ *   ------------|-------------------|------------
+ *      0X21     | REMAP_X_Y         | Z=Z;X=Y;Y=X
+ *      0X18     | REMAP_Y_Z         | X=X;Y=Z;Z=Y
+ *      0X06     | REMAP_Z_X         | Y=Y;X=Z;Z=X
+ *      0X12     | REMAP_X_Y_Z_TYPE0 | X=Z;Y=X;Z=Y
+ *      0X09     | REMAP_X_Y_Z_TYPE1 | X=Y;Y=Z;Z=X
+ *      0X24     | DEFAULT_AXIS      | X=X;Y=Y;Z=Z
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note : For axis sign remap refer the following functions
+ *	x-axis :
+ *
+ *	bno055_set_x_remap_sign()
+ *
+ *	y-axis :
+ *
+ *	bno055_set_y_remap_sign()
+ *
+ *	z-axis :
+ *
+ *	bno055_set_z_remap_sign()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_axis_remap_value(
+u_8 v_remap_axis_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+			/* Write the value of axis remap */
+		if (v_stat_s_8 == SUCCESS) {
+			switch (v_remap_axis_u_8) {
+			case REMAP_X_Y:
+			case REMAP_Y_Z:
+			case REMAP_Z_X:
+			case REMAP_X_Y_Z_TYPE0:
+			case REMAP_X_Y_Z_TYPE1:
+			case DEFAULT_AXIS:
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_REMAP_AXIS_VALUE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_REMAP_AXIS_VALUE,
+					v_remap_axis_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_REMAP_AXIS_VALUE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			break;
+			default:
+				/* Write the default axis remap value */
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_REMAP_AXIS_VALUE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_REMAP_AXIS_VALUE,
+					DEFAULT_AXIS);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_REMAP_AXIS_VALUE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			break;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode
+	of previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the x-axis remap
+ *	sign from register from 0x42 bit 2
+ *
+ *	@param v_remap_x_sign_u_8 : The value of x-axis remap sign
+ *
+ *    v_remap_x_sign_u_8  |    result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_remap_x_sign(
+u_8 *v_remap_x_sign_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, x-axis remap sign is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of x-axis remap sign */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_REMAP_X_SIGN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_remap_x_sign_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_REMAP_X_SIGN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the x-axis remap
+ *	sign from register from 0x42 bit 2
+ *
+ *	@param v_remap_x_sign_u_8 : The value of x-axis remap sign
+ *
+ *    v_remap_x_sign_u_8  |    result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_remap_x_sign(
+u_8 v_remap_x_sign_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the value of x-axis remap */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_REMAP_X_SIGN__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_REMAP_X_SIGN,
+					v_remap_x_sign_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_REMAP_X_SIGN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the y-axis remap
+ *	sign from register from 0x42 bit 1
+ *
+ *	@param v_remap_y_sign_u_8 : The value of y-axis remap sign
+ *
+ *    v_remap_y_sign_u_8  |   result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_remap_y_sign(
+u_8 *v_remap_y_sign_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, y-axis remap sign is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of y-axis remap sign*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_REMAP_Y_SIGN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_remap_y_sign_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_REMAP_Y_SIGN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the y-axis remap
+ *	sign from register from 0x42 bit 1
+ *
+ *	@param v_remap_y_sign_u_8 : The value of y-axis remap sign
+ *
+ *    v_remap_y_sign_u_8  |   result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_remap_y_sign(
+u_8 v_remap_y_sign_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the value of y-axis remap sign*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_REMAP_Y_SIGN__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_REMAP_Y_SIGN,
+					v_remap_y_sign_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_REMAP_Y_SIGN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the z-axis remap
+ *	sign from register from 0x42 bit 0
+ *
+ *	@param v_remap_z_sign_u_8 : The value of z-axis remap sign
+ *
+ *    v_remap_z_sign_u_8  |   result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_remap_z_sign(
+u_8 *v_remap_z_sign_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, z-axis remap sign is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read the value of z-axis remap sign*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_REMAP_Z_SIGN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_remap_z_sign_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_REMAP_Z_SIGN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the z-axis remap
+ *	sign from register from 0x42 bit 0
+ *
+ *	@param v_remap_z_sign_u_8 : The value of z-axis remap sign
+ *
+ *    v_remap_z_sign_u_8  |   result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_remap_z_sign(
+u_8 v_remap_z_sign_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+		/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write the value of z-axis remap sign*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_REMAP_Z_SIGN__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_REMAP_Z_SIGN,
+					v_remap_z_sign_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_REMAP_Z_SIGN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to read soft iron calibration matrix
+ *	from the register 0x43 to 0x53 it is a 18 bytes of data
+ *
+ *	@param sic_matrix : The value of soft iron calibration matrix
+ *
+ *	sic_matrix         |           result
+ * --------------------|----------------------------------
+ *       sic_0         | soft iron calibration matrix zero
+ *       sic_1         | soft iron calibration matrix one
+ *       sic_2         | soft iron calibration matrix two
+ *       sic_3         | soft iron calibration matrix three
+ *       sic_4         | soft iron calibration matrix four
+ *       sic_5         | soft iron calibration matrix five
+ *       sic_6         | soft iron calibration matrix six
+ *       sic_7         | soft iron calibration matrix seven
+ *       sic_8         | soft iron calibration matrix eight
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note : Each soft iron calibration matrix range from -32768 to +32767
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_sic_matrix(
+struct bno055_sic_matrix_t  *sic_matrix)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the soft iron calibration matrix values
+	v_data_u_8[INDEX_ZERO] - sic_0->LSB
+	v_data_u_8[INDEX_ONE] - sic_0->MSB
+	v_data_u_8[INDEX_TWO] - sic_1->LSB
+	v_data_u_8[INDEX_THREE] - sic_1->MSB
+	v_data_u_8[INDEX_FOUR] - sic_2->LSB
+	v_data_u_8[INDEX_FIVE] - sic_2->MSB
+	v_data_u_8[6] - sic_3->LSB
+	v_data_u_8[7] - sic_3->MSB
+	v_data_u_8[8] - sic_4->LSB
+	v_data_u_8[9] - sic_4->MSB
+	v_data_u_8[10] - sic_5->LSB
+	v_data_u_8[11] - sic_5->MSB
+	v_data_u_8[12] - sic_6->LSB
+	v_data_u_8[13] - sic_6->MSB
+	v_data_u_8[14] - sic_7->LSB
+	v_data_u_8[15] - sic_7->MSB
+	v_data_u_8[16] - sic_8->LSB
+	v_data_u_8[17] - sic_8->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_EIGHTEEN] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, soft iron calibration matrix is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read soft iron calibration matrix value
+			it is eighteen bytes of data */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_SIC_MATRIX_0_LSB__REG,
+			v_data_u_8, BNO055_EIGHTEEN_U8X);
+			if (com_rslt == SUCCESS) {
+				/*soft iron calibration matrix zero*/
+				v_data_u_8[INDEX_ZERO] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+				BNO055_SIC_MATRIX_0_LSB);
+				v_data_u_8[INDEX_ONE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+				BNO055_SIC_MATRIX_0_MSB);
+				sic_matrix->sic_0 = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_ONE])) <<
+				(BNO055_SHIFT_8_POSITION))
+				| (v_data_u_8[INDEX_ZERO]));
+
+				/*soft iron calibration matrix one*/
+				v_data_u_8[INDEX_TWO] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+				BNO055_SIC_MATRIX_1_LSB);
+				v_data_u_8[INDEX_THREE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+				BNO055_SIC_MATRIX_1_MSB);
+				sic_matrix->sic_1 = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_THREE])) <<
+				(BNO055_SHIFT_8_POSITION))
+				| (v_data_u_8[INDEX_TWO]));
+
+				/*soft iron calibration matrix two*/
+				v_data_u_8[INDEX_FOUR] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+				BNO055_SIC_MATRIX_2_LSB);
+				v_data_u_8[INDEX_FIVE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+				BNO055_SIC_MATRIX_2_MSB);
+				sic_matrix->sic_2 = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_FIVE])) <<
+				(BNO055_SHIFT_8_POSITION))
+				| (v_data_u_8[INDEX_FOUR]));
+
+				/*soft iron calibration matrix three*/
+				v_data_u_8[INDEX_SIX] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_SIX],
+				BNO055_SIC_MATRIX_3_LSB);
+				v_data_u_8[INDEX_SEVEN] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_SEVEN],
+				BNO055_SIC_MATRIX_3_LSB);
+				sic_matrix->sic_3  = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_SEVEN])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_SIX]));
+
+				/*soft iron calibration matrix four*/
+				v_data_u_8[INDEX_EIGHT] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_EIGHT],
+				BNO055_SIC_MATRIX_4_LSB);
+				v_data_u_8[INDEX_NINE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_NINE],
+				BNO055_SIC_MATRIX_4_LSB);
+				sic_matrix->sic_4  = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_NINE])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_EIGHT]));
+
+				/*soft iron calibration matrix five*/
+				v_data_u_8[INDEX_TEN] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_TEN],
+				BNO055_SIC_MATRIX_5_LSB);
+				v_data_u_8[INDEX_ELEVEN] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_ELEVEN],
+				BNO055_SIC_MATRIX_5_LSB);
+				sic_matrix->sic_5 = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_ELEVEN])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_TEN]));
+
+				/*soft iron calibration matrix six*/
+				v_data_u_8[INDEX_TWELVE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWELVE],
+				BNO055_SIC_MATRIX_6_LSB);
+				v_data_u_8[INDEX_THIRTEEN] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_THIRTEEN],
+				BNO055_SIC_MATRIX_6_LSB);
+				sic_matrix->sic_6  = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_THIRTEEN])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_TWELVE]));
+
+				/*soft iron calibration matrix seven*/
+				v_data_u_8[INDEX_FOURTEEN] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOURTEEN],
+				BNO055_SIC_MATRIX_7_LSB);
+				v_data_u_8[INDEX_FIVETEEN] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVETEEN],
+				BNO055_SIC_MATRIX_7_LSB);
+				sic_matrix->sic_7  = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_FIVETEEN])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_FOURTEEN]));
+
+				/*soft iron calibration matrix eight*/
+				v_data_u_8[INDEX_SIXTEEN] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_SIXTEEN],
+				BNO055_SIC_MATRIX_8_LSB);
+				v_data_u_8[INDEX_SEVENTEEN] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_SEVENTEEN],
+				BNO055_SIC_MATRIX_8_LSB);
+				sic_matrix->sic_8  = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_SEVENTEEN])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_SIXTEEN]));
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to write soft iron calibration matrix
+ *	from the register 0x43 to 0x53 it is a 18 bytes of data
+ *
+ *	@param sic_matrix : The value of soft iron calibration matrix
+ *
+ *	sic_matrix         |           result
+ * --------------------|----------------------------------
+ *       sic_0         | soft iron calibration matrix zero
+ *       sic_1         | soft iron calibration matrix one
+ *       sic_2         | soft iron calibration matrix two
+ *       sic_3         | soft iron calibration matrix three
+ *       sic_4         | soft iron calibration matrix four
+ *       sic_5         | soft iron calibration matrix five
+ *       sic_6         | soft iron calibration matrix six
+ *       sic_7         | soft iron calibration matrix seven
+ *       sic_8         | soft iron calibration matrix eight
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note : Each soft iron calibration matrix range from -32768 to +32767
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_sic_matrix(
+struct bno055_sic_matrix_t  *sic_matrix)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data1_u_8r = BNO055_ZERO_U8X;
+u_8 v_data2_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+	/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+				if (v_stat_s_8 == SUCCESS) {
+					/* write soft iron calibration
+					matrix zero value*/
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_0_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_0
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_0_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_0_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_0_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_0  >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_0_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_0_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write soft iron calibration
+					matrix one value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_1_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_1
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_1_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_1_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_1_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_1  >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_1_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_1_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+				/* write soft iron calibration
+				matrix two value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_2_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_2
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_2_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_2_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_2_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_2 >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_2_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_2_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write soft iron calibration
+					matrix three value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_3_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_3
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_3_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_3_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_3_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_3 >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_3_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_3_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write soft iron calibration
+					matrix four value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_4_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_4
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_4_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_4_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_4_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_4 >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_4_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_4_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write soft iron calibration
+					matrix five value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_5_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_5
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_5_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_5_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_5_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_5 >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_5_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_5_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write soft iron calibration
+					matrix six value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_6_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_6
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_6_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_6_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_6_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_6 >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_6_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_6_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write soft iron calibration
+					matrix seven value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_7_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_7
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_7_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_7_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_7_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_7 >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_7_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_7_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write soft iron calibration
+					matrix eight value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_8_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_8
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_8_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_8_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_SIC_MATRIX_8_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(sic_matrix->sic_8 >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_SIC_MATRIX_8_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_SIC_MATRIX_8_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to read accel offset and accel radius
+ *	offset form register 0x55 to 0x5A and radius form 0x67 and 0x68
+ *
+ *	@param accel_offset : The value of accel offset and radius
+ *
+ *	    bno055_accel_offset_t |     result
+ *      ------------------- | ----------------
+ *	             x          |  accel offset x
+ *               y          |  accel offset y
+ *	             z          |  accel offset z
+ *               r          |  accel offset r
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the accel offset varies based on
+ *	the G-range of accel sensor.
+ *
+ *  accel G range   |  offset range
+ * ---------------  |  --------------
+ *  ACCEL_RANGE_2G  |   +/-2000
+ *  ACCEL_RANGE_4G  |   +/-4000
+ *  ACCEL_RANGE_8G  |   +/-8000
+ *  ACCEL_RANGE_16G |   +/-16000
+ *
+ *	accel G range can be configured by using the
+ *	bno055_set_accel_range() function
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_offset(
+struct bno055_accel_offset_t  *accel_offset)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the accel offset values
+	v_data_u_8[INDEX_ZERO] - offset x->LSB
+	v_data_u_8[INDEX_ONE] - offset x->MSB
+	v_data_u_8[INDEX_TWO] - offset y->LSB
+	v_data_u_8[INDEX_THREE] - offset y->MSB
+	v_data_u_8[INDEX_FOUR] - offset z->LSB
+	v_data_u_8[INDEX_FIVE] - offset z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_SIX] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel offset is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read accel offset value it is six bytes of data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_OFFSET_X_LSB__REG,
+			v_data_u_8, BNO055_SIX_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Read accel x offset value*/
+				v_data_u_8[INDEX_ZERO] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+				BNO055_ACCEL_OFFSET_X_LSB);
+				v_data_u_8[INDEX_ONE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+				BNO055_ACCEL_OFFSET_X_MSB);
+				accel_offset->x = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_ONE])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_ZERO]));
+
+				/* Read accel y offset value*/
+				v_data_u_8[INDEX_TWO] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+				BNO055_ACCEL_OFFSET_Y_LSB);
+				v_data_u_8[INDEX_THREE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+				BNO055_ACCEL_OFFSET_Y_MSB);
+				accel_offset->y = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_THREE])) <<
+				(BNO055_SHIFT_8_POSITION))
+				| (v_data_u_8[INDEX_TWO]));
+
+				/* Read accel z offset value*/
+				v_data_u_8[INDEX_FOUR] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+				BNO055_ACCEL_OFFSET_Z_LSB);
+				v_data_u_8[INDEX_FIVE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+				BNO055_ACCEL_OFFSET_Z_MSB);
+				accel_offset->z = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_FIVE])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_FOUR]));
+
+				/* Read accel radius value
+				it is two bytes of data*/
+				com_rslt += p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_RADIUS_LSB__REG,
+				v_data_u_8, BNO055_TWO_U8X);
+				/* Array holding the accel radius values
+				v_data_u_8[INDEX_ZERO] - radius->LSB
+				v_data_u_8[INDEX_ONE] - radius->MSB
+				*/
+				if (com_rslt == SUCCESS) {
+					v_data_u_8[INDEX_ZERO] =
+					BNO055_GET_BITSLICE(
+						v_data_u_8[INDEX_ZERO],
+					BNO055_ACCEL_RADIUS_LSB);
+					v_data_u_8[INDEX_ONE] =
+					BNO055_GET_BITSLICE(
+						v_data_u_8[INDEX_ONE],
+					BNO055_ACCEL_RADIUS_MSB);
+					accel_offset->r = (s_16)((((s_32)
+					(s_8)(v_data_u_8[INDEX_ONE])) <<
+					(BNO055_SHIFT_8_POSITION)) |
+					(v_data_u_8[INDEX_ZERO]));
+				} else {
+				com_rslt = ERROR;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to write accel offset and accel radius
+ *	offset form register 0x55 to 0x5A and radius form 0x67 and 0x68
+ *
+ *	@param accel_offset : The value of accel offset and radius
+ *
+ *	    bno055_accel_offset_t |     result
+ *      ------------------- | ----------------
+ *	             x          |  accel offset x
+ *               y          |  accel offset y
+ *	             z          |  accel offset z
+ *               r          |  accel offset r
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the accel offset varies based on
+ *	the G-range of accel sensor.
+ *
+ *  accel G range   |  offset range
+ * ---------------  |  --------------
+ *  ACCEL_RANGE_2G  |   +/-2000
+ *  ACCEL_RANGE_4G  |   +/-4000
+ *  ACCEL_RANGE_8G  |   +/-8000
+ *  ACCEL_RANGE_16G |   +/-16000
+ *
+ *	accel G range can be configured by using the
+ *	bno055_set_accel_range() function
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_accel_offset(
+struct bno055_accel_offset_t  *accel_offset)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data1_u_8r = BNO055_ZERO_U8X;
+u_8 v_data2_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+	/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+				if (v_stat_s_8 == SUCCESS) {
+					/* write accel offset x value*/
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_OFFSET_X_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(accel_offset->x
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_ACCEL_OFFSET_X_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_OFFSET_X_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_OFFSET_X_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(accel_offset->x  >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_ACCEL_OFFSET_X_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_OFFSET_X_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write accel offset y value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_OFFSET_Y_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(accel_offset->y
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_ACCEL_OFFSET_Y_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_OFFSET_Y_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_OFFSET_Y_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(accel_offset->y >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_ACCEL_OFFSET_Y_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_OFFSET_Y_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+				/* write accel offset z value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_OFFSET_Z_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(accel_offset->z
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_ACCEL_OFFSET_Z_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_OFFSET_Z_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_OFFSET_Z_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(accel_offset->z >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_ACCEL_OFFSET_Z_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_OFFSET_Z_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+				/*write accel radius value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_RADIUS_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(accel_offset->r
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_ACCEL_RADIUS_LSB,
+						v_data1_u_8r);
+						com_rslt =
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_RADIUS_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_RADIUS_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(accel_offset->r >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_ACCEL_RADIUS_MSB,
+						v_data1_u_8r);
+						com_rslt =
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_RADIUS_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+
+/*!
+ *	@brief This API is used to read mag offset
+ *	offset form register 0x69 to 0x6A
+ *
+ *	@param mag_offset :  The value of mag offset and radius
+ *
+ *	    bno055_mag_offset_t   |     result
+ *      ------------------- | ----------------
+ *	             x          |  mag offset x
+ *               y          |  mag offset y
+ *	             z          |  mag offset z
+ *               r          |  mag radius r
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the magnetometer offset is +/-6400 in LSB
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_offset(
+struct bno055_mag_offset_t  *mag_offset)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the mag offset values
+	v_data_u_8[INDEX_ZERO] - offset x->LSB
+	v_data_u_8[INDEX_ONE] - offset x->MSB
+	v_data_u_8[INDEX_TWO] - offset y->LSB
+	v_data_u_8[INDEX_THREE] - offset y->MSB
+	v_data_u_8[INDEX_FOUR] - offset z->LSB
+	v_data_u_8[INDEX_FIVE] - offset z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_SIX] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, mag offset is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read mag offset value it the six bytes of data */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_OFFSET_X_LSB__REG,
+			v_data_u_8, BNO055_SIX_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Read mag x offset value*/
+				v_data_u_8[INDEX_ZERO] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+				BNO055_MAG_OFFSET_X_LSB);
+				v_data_u_8[INDEX_ONE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+				BNO055_MAG_OFFSET_X_MSB);
+				mag_offset->x = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_ONE])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_ZERO]));
+
+				/* Read mag y offset value*/
+				v_data_u_8[INDEX_TWO] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+				BNO055_MAG_OFFSET_Y_LSB);
+				v_data_u_8[INDEX_THREE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+				BNO055_MAG_OFFSET_Y_MSB);
+				mag_offset->y = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_THREE])) <<
+				(BNO055_SHIFT_8_POSITION))
+				| (v_data_u_8[INDEX_TWO]));
+
+				/* Read mag z offset value*/
+				v_data_u_8[INDEX_FOUR] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+				BNO055_MAG_OFFSET_Z_LSB);
+				v_data_u_8[INDEX_FIVE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+				BNO055_MAG_OFFSET_Z_MSB);
+				mag_offset->z = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_FIVE])) <<
+				(BNO055_SHIFT_8_POSITION))
+				| (v_data_u_8[INDEX_FOUR]));
+
+				/* Read mag radius value
+				it the two bytes of data */
+				com_rslt += p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_MAG_RADIUS_LSB__REG,
+				v_data_u_8, BNO055_TWO_U8X);
+				if (com_rslt == SUCCESS) {
+					/* Array holding the mag radius values
+					v_data_u_8[INDEX_ZERO] - radius->LSB
+					v_data_u_8[INDEX_ONE] - radius->MSB
+					*/
+					v_data_u_8[INDEX_ZERO] =
+					BNO055_GET_BITSLICE(
+						v_data_u_8[INDEX_ZERO],
+					BNO055_MAG_RADIUS_LSB);
+					v_data_u_8[INDEX_ONE] =
+					BNO055_GET_BITSLICE(
+						v_data_u_8[INDEX_ONE],
+					BNO055_MAG_RADIUS_MSB);
+					mag_offset->r = (s_16)((((s_32)
+					(s_8)(v_data_u_8[INDEX_ONE])) <<
+					(BNO055_SHIFT_8_POSITION)) |
+					(v_data_u_8[INDEX_ZERO]));
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+
+/*!
+ *	@brief This API is used to read mag offset
+ *	offset form register 0x69 to 0x6A
+ *
+ *	@param mag_offset :  The value of mag offset and radius
+ *
+ *	    bno055_mag_offset_t |     result
+ *      ------------------- | ----------------
+ *	             x          |  mag offset x
+ *               y          |  mag offset y
+ *	             z          |  mag offset z
+ *               r          |  mag radius r
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the magnetometer offset is +/-6400 in LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_mag_offset(
+struct bno055_mag_offset_t *mag_offset)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data1_u_8r = BNO055_ZERO_U8X;
+u_8 v_data2_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+	/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+		v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+		if (v_stat_s_8 == SUCCESS) {
+			if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+				if (v_stat_s_8 == SUCCESS) {
+					/* write Mag offset x value*/
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_OFFSET_X_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(mag_offset->x
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_MAG_OFFSET_X_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_OFFSET_X_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_OFFSET_X_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(mag_offset->x  >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_MAG_OFFSET_X_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_OFFSET_X_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write Mag offset y value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_OFFSET_Y_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(mag_offset->y &
+						BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_MAG_OFFSET_Y_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_OFFSET_Y_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_OFFSET_Y_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(mag_offset->y >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_MAG_OFFSET_Y_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_OFFSET_Y_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+				/* write Mag offset z value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_OFFSET_Z_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(mag_offset->z &
+						BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_MAG_OFFSET_Z_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_OFFSET_Z_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_OFFSET_Z_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(mag_offset->z >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_MAG_OFFSET_Z_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_OFFSET_Z_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write Mag radius value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_RADIUS_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(mag_offset->r &
+						BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_MAG_RADIUS_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_RADIUS_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_RADIUS_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(mag_offset->r >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_MAG_RADIUS_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_RADIUS_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to read gyro offset
+ *	offset form register 0x61 to 0x66
+ *
+ *	@param gyro_offset : The value of gyro offset
+ *
+ *	    bno055_gyro_offset_t  |     result
+ *      ------------------- | ----------------
+ *	             x          |  gyro offset x
+ *               y          |  gyro offset y
+ *	             z          |  gyro offset z
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the gyro offset varies based on
+ *	the range of gyro sensor
+ *
+ *	gyro G range         | offset range
+ * --------------------  | ------------
+ *  GYRO_RANGE_2000DPS   | +/-32000
+ *  GYRO_RANGE_1000DPS   | +/-16000
+ *  GYRO_RANGE_500DPS    | +/-8000
+ *  GYRO_RANGE_250DPS    | +/-4000
+ *  GYRO_RANGE_125DPS    | +/-2000
+ *
+ *	Gyro range can be configured by using the
+ *	bno055_set_gyro_range() function
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_offset(
+struct bno055_gyro_offset_t  *gyro_offset)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	/* Array holding the gyro offset values
+	v_data_u_8[INDEX_ZERO] - offset x->LSB
+	v_data_u_8[INDEX_ONE] - offset x->MSB
+	v_data_u_8[INDEX_TWO] - offset y->LSB
+	v_data_u_8[INDEX_THREE] - offset y->MSB
+	v_data_u_8[INDEX_FOUR] - offset z->LSB
+	v_data_u_8[INDEX_FIVE] - offset z->MSB
+	*/
+	u_8 v_data_u_8[ARRAY_SIZE_SIX] = {
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X,
+	BNO055_ZERO_U8X, BNO055_ZERO_U8X};
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro offset is
+		available in the page zero*/
+		if (p_bno055->page_id != PAGE_ZERO)
+			/* Write the page zero*/
+			v_stat_s_8 = bno055_write_page_id(PAGE_ZERO);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ZERO)) {
+			/* Read gyro offset value it the six bytes of data*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_OFFSET_X_LSB__REG,
+			v_data_u_8, BNO055_SIX_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Read gyro x offset value*/
+				v_data_u_8[INDEX_ZERO] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_ZERO],
+				BNO055_GYRO_OFFSET_X_LSB);
+				v_data_u_8[INDEX_ONE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_ONE],
+				BNO055_GYRO_OFFSET_X_MSB);
+				gyro_offset->x = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_ONE])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_ZERO]));
+
+				/* Read gyro y offset value*/
+				v_data_u_8[INDEX_TWO] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_TWO],
+				BNO055_GYRO_OFFSET_Y_LSB);
+				v_data_u_8[INDEX_THREE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_THREE],
+				BNO055_GYRO_OFFSET_Y_MSB);
+				gyro_offset->y = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_THREE])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_TWO]));
+
+				/* Read gyro z offset value*/
+				v_data_u_8[INDEX_FOUR] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FOUR],
+				BNO055_GYRO_OFFSET_Z_LSB);
+				v_data_u_8[INDEX_FIVE] =
+				BNO055_GET_BITSLICE(v_data_u_8[INDEX_FIVE],
+				BNO055_GYRO_OFFSET_Z_MSB);
+				gyro_offset->z = (s_16)((((s_32)
+				(s_8)(v_data_u_8[INDEX_FIVE])) <<
+				(BNO055_SHIFT_8_POSITION)) |
+				(v_data_u_8[INDEX_FOUR]));
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API is used to read gyro offset
+ *	offset form register 0x61 to 0x66
+ *
+ *	@param gyro_offset : The value of gyro offset
+ *
+ *	    bno055_gyro_offset_t  |     result
+ *      ------------------- | ----------------
+ *	             x          |  gyro offset x
+ *               y          |  gyro offset y
+ *	             z          |  gyro offset z
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the gyro offset varies based on
+ *	the range of gyro sensor
+ *
+ *	gyro G range         | offset range
+ * --------------------  | ------------
+ *  GYRO_RANGE_2000DPS   | +/-32000
+ *  GYRO_RANGE_1000DPS   | +/-16000
+ *  GYRO_RANGE_500DPS    | +/-8000
+ *  GYRO_RANGE_250DPS    | +/-4000
+ *  GYRO_RANGE_125DPS    | +/-2000
+ *
+ *	Gyro range can be configured by using the
+ *	bno055_set_gyro_range() function
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_gyro_offset(
+struct bno055_gyro_offset_t  *gyro_offset)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data1_u_8r = BNO055_ZERO_U8X;
+u_8 v_data2_u_8r = BNO055_ZERO_U8X;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+	/* The write operation effective only if the operation
+		mode is in config mode, this part of code is checking the
+		current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+				v_stat_s_8 += bno055_set_operation_mode
+				(OPERATION_MODE_CONFIG);
+				if (v_stat_s_8 == SUCCESS) {
+					/* write gryo offset x value*/
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_OFFSET_X_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(gyro_offset->x
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_GYRO_OFFSET_X_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_GYRO_OFFSET_X_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_OFFSET_X_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(gyro_offset->x  >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_GYRO_OFFSET_X_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_GYRO_OFFSET_X_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					/* write gryo offset y value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_OFFSET_Y_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(gyro_offset->y
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_GYRO_OFFSET_Y_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_GYRO_OFFSET_Y_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_OFFSET_Y_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(gyro_offset->y >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_GYRO_OFFSET_Y_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_GYRO_OFFSET_Y_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+				/* write gryo offset z value*/
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_OFFSET_Z_LSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(gyro_offset->z
+						& BNO055_SIC_HEX_0_0_F_F_DATA));
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_GYRO_OFFSET_Z_LSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_GYRO_OFFSET_Z_LSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+
+					com_rslt +=
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_OFFSET_Z_MSB__REG,
+					&v_data2_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data1_u_8r = ((s_8)
+						(gyro_offset->z >>
+						BNO055_SHIFT_8_POSITION)
+						& BNO055_SIC_HEX_0_0_F_F_DATA);
+						v_data2_u_8r =
+						BNO055_SET_BITSLICE(v_data2_u_8r,
+						BNO055_GYRO_OFFSET_Z_MSB,
+						v_data1_u_8r);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_GYRO_OFFSET_Z_MSB__REG,
+						&v_data2_u_8r, BNO055_ONE_U8X);
+					}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/********************************************************/
+ /************** PAGE1 Functions *********************/
+/********************************************************/
+/*!
+ *	@brief This API used to read the accel range
+ *	from page one register from 0x08 bit 0 and 1
+ *
+ *	@param v_accel_range_u_8 : The value of accel range
+ *		  v_accel_range_u_8 |   result
+ *       ----------------- | --------------
+ *              0x00       | ACCEL_RANGE_2G
+ *              0x01       | ACCEL_RANGE_4G
+ *              0x02       | ACCEL_RANGE_8G
+ *              0x03       | ACCEL_RANGE_16G
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_range(
+u_8 *v_accel_range_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel range is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel g range */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_RANGE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_range_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_RANGE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel range
+ *	from page one register from 0x08 bit 0 and 1
+ *
+ *	@param v_accel_range_u_8 : The value of accel range
+ *
+ *		  v_accel_range_u_8 |   result
+ *       ----------------- | --------------
+ *              0x00       | ACCEL_RANGE_2G
+ *              0x01       | ACCEL_RANGE_4G
+ *              0x02       | ACCEL_RANGE_8G
+ *              0x03       | ACCEL_RANGE_16G
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_range(
+u_8 v_accel_range_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				if (v_accel_range_u_8 < BNO055_FIVE_U8X) {
+					/* Write the value of accel range*/
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_RANGE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data_u_8r = BNO055_SET_BITSLICE
+						(v_data_u_8r,
+						BNO055_ACCEL_RANGE,
+						v_accel_range_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_RANGE__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel bandwidth
+ *	from page one register from 0x08 bit 2 to 4
+ *
+ *	@param v_accel_bw_u_8 : The value of accel bandwidth
+ *
+ *		     v_accel_bw_u_8 |     result
+ *       ----------------- | ---------------
+ *              0x00       | ACCEL_BW_7_81HZ
+ *              0x01       | ACCEL_BW_15_63HZ
+ *              0x02       | ACCEL_BW_31_25HZ
+ *              0x03       | ACCEL_BW_62_5HZ
+ *              0x04       | ACCEL_BW_125HZ
+ *              0x05       | ACCEL_BW_250HZ
+ *              0x06       | ACCEL_BW_500HZ
+ *              0x07       | ACCEL_BW_1000HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_bw(
+u_8 *v_accel_bw_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel bandwidth is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel bandwidth */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_BW__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_bw_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_BW);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel bandwidth
+ *	from page one register from 0x08 bit 2 to 4
+ *
+ *	@param v_accel_bw_u_8 : The value of accel bandwidth
+ *
+ *		     v_accel_bw_u_8 |     result
+ *       ----------------- | ---------------
+ *              0x00       | ACCEL_BW_7_81HZ
+ *              0x01       | ACCEL_BW_15_63HZ
+ *              0x02       | ACCEL_BW_31_25HZ
+ *              0x03       | ACCEL_BW_62_5HZ
+ *              0x04       | ACCEL_BW_125HZ
+ *              0x05       | ACCEL_BW_250HZ
+ *              0x06       | ACCEL_BW_500HZ
+ *              0x07       | ACCEL_BW_1000HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_bw(
+u_8 v_accel_bw_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				if (v_accel_bw_u_8 < BNO055_EIGHT_U8X) {
+					/* Write the accel */
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_BW__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data_u_8r = BNO055_SET_BITSLICE
+						(v_data_u_8r, BNO055_ACCEL_BW,
+						v_accel_bw_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_BW__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel power mode
+ *	from page one register from 0x08 bit 5 to 7
+ *
+ *	@param v_accel_power_mode_u_8 : The value of accel power mode
+ * v_accel_power_mode_u_8 |   result
+ *   -----------------   | -------------
+ *              0x00     | ACCEL_NORMAL
+ *              0x01     | ACCEL_SUSPEND
+ *              0x02     | ACCEL_LOWPOWER_1
+ *              0x03     | ACCEL_STANDBY
+ *              0x04     | ACCEL_LOWPOWER_2
+ *              0x05     | ACCEL_DEEPSUSPEND
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_power_mode(
+u_8 *v_accel_power_mode_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel power mode is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel bandwidth */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_POWER_MODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_power_mode_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_POWER_MODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel power mode
+ *	from page one register from 0x08 bit 5 to 7
+ *
+ *	@param v_accel_power_mode_u_8 : The value of accel power mode
+ * v_accel_power_mode_u_8 |   result
+ *   -----------------   | -------------
+ *              0x00     | ACCEL_NORMAL
+ *              0x01     | ACCEL_SUSPEND
+ *              0x02     | ACCEL_LOWPOWER_1
+ *              0x03     | ACCEL_STANDBY
+ *              0x04     | ACCEL_LOWPOWER_2
+ *              0x05     | ACCEL_DEEPSUSPEND
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_power_mode(
+u_8 v_accel_power_mode_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8  = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				if (v_accel_power_mode_u_8 < BNO055_SIX_U8X) {
+					/* Write the value of accel bandwidth*/
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_POWER_MODE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data_u_8r = BNO055_SET_BITSLICE
+						(v_data_u_8r,
+						BNO055_ACCEL_POWER_MODE,
+						v_accel_power_mode_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_POWER_MODE__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the mag output data rate
+ *	from page one register from 0x09 bit 0 to 2
+ *
+ *	@param v_mag_data_output_rate_u_8 : The value of mag output data rate
+ *
+ *  v_mag_data_output_rate_u_8 |   result
+ *  ----------------------    |----------------------
+ *     0x00                   | MAG_DATA_OUTPUT_RATE_2HZ
+ *     0x01                   | MAG_DATA_OUTPUT_RATE_6HZ
+ *     0x02                   | MAG_DATA_OUTPUT_RATE_8HZ
+ *     0x03                   | MAG_DATA_OUTPUT_RATE_10HZ
+ *     0x04                   | MAG_DATA_OUTPUT_RATE_15HZ
+ *     0x05                   | MAG_DATA_OUTPUT_RATE_20HZ
+ *     0x06                   | MAG_DATA_OUTPUT_RATE_25HZ
+ *     0x07                   | MAG_DATA_OUTPUT_RATE_30HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_data_output_rate(
+u_8 *v_mag_data_output_rate_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, output data rate
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the mag output data rate*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_DATA_OUTPUT_RATE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_mag_data_output_rate_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_MAG_DATA_OUTPUT_RATE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the mag output data rate
+ *	from page one register from 0x09 bit 0 to 2
+ *
+ *	@param v_mag_data_output_rate_u_8 : The value of mag output data rate
+ *
+ *  v_mag_data_output_rate_u_8 |   result
+ *  ----------------------    |----------------------
+ *     0x00                   | MAG_DATA_OUTPUT_RATE_2HZ
+ *     0x01                   | MAG_DATA_OUTPUT_RATE_6HZ
+ *     0x02                   | MAG_DATA_OUTPUT_RATE_8HZ
+ *     0x03                   | MAG_DATA_OUTPUT_RATE_10HZ
+ *     0x04                   | MAG_DATA_OUTPUT_RATE_15HZ
+ *     0x05                   | MAG_DATA_OUTPUT_RATE_20HZ
+ *     0x06                   | MAG_DATA_OUTPUT_RATE_25HZ
+ *     0x07                   | MAG_DATA_OUTPUT_RATE_30HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_data_output_rate(
+u_8 v_mag_data_output_rate_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+	if (v_stat_s_8 == SUCCESS) {
+		/* Write page as one */
+		v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if (v_pg_stat_s_8 == SUCCESS) {
+			if (v_mag_data_output_rate_u_8
+				< BNO055_EIGHT_U8X) {
+				/* Write the value of
+				mag output data rate*/
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_MAG_DATA_OUTPUT_RATE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_MAG_DATA_OUTPUT_RATE,
+					v_mag_data_output_rate_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_DATA_OUTPUT_RATE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = E_BNO055_OUT_OF_RANGE;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+} else {
+com_rslt = ERROR;
+}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the mag operation mode
+ *	from page one register from 0x09 bit 3 to 4
+ *
+ *	@param v_mag_operation_mode_u_8 : The value of mag operation mode
+ *
+ *  v_mag_operation_mode_u_8  |      result
+ * ------------------------- |--------------------------
+ *     0x00                  | MAG_OPR_MODE_LOWPOWER
+ *     0x01                  | MAG_OPR_MODE_REGULAR
+ *     0x02                  | MAG_OPR_MODE_ENHANCED_REGULAR
+ *     0x03                  | MAG_OPR_MODE_HIGH_ACCURACY
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_operation_mode(
+u_8 *v_mag_operation_mode_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, mag operation mode is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of mag operation mode*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_OPERATION_MODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_mag_operation_mode_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_MAG_OPERATION_MODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the mag operation mode
+ *	from page one register from 0x09 bit 3 to 4
+ *
+ *	@param v_mag_operation_mode_u_8 : The value of mag operation mode
+ *
+ *  v_mag_operation_mode_u_8  |      result
+ * ------------------------- |--------------------------
+ *     0x00                  | MAG_OPR_MODE_LOWPOWER
+ *     0x01                  | MAG_OPR_MODE_REGULAR
+ *     0x02                  | MAG_OPR_MODE_ENHANCED_REGULAR
+ *     0x03                  | MAG_OPR_MODE_HIGH_ACCURACY
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_operation_mode(
+u_8 v_mag_operation_mode_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				if (v_mag_operation_mode_u_8
+					< BNO055_FIVE_U8X) {
+					/* Write the value
+					of mag operation mode*/
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_OPERATION_MODE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data_u_8r = BNO055_SET_BITSLICE
+						(v_data_u_8r,
+						BNO055_MAG_OPERATION_MODE,
+						v_mag_operation_mode_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_OPERATION_MODE__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the mag power mode
+ *	from page one register from 0x09 bit 4 to 6
+ *
+ *	@param v_mag_power_mode_u_8 : The value of mag power mode
+ *
+ * v_mag_power_mode_u_8 |   result
+ * --------------------|-----------------
+ *     0x00            | MAG_POWER_MODE_NORMAL
+ *     0x01            | MAG_POWER_MODE_SLEEP
+ *     0x02            | MAG_POWER_MODE_SUSPEND
+ *     0x03            | MAG_POWER_MODE_FORCE_MODE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_power_mode(
+u_8 *v_mag_power_mode_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, mag power mode is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of mag power mode */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_POWER_MODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_mag_power_mode_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_MAG_POWER_MODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the mag power mode
+ *	from page one register from 0x09 bit 4 to 6
+ *
+ *	@param v_mag_power_mode_u_8 : The value of mag power mode
+ *
+ * v_mag_power_mode_u_8 |   result
+ * --------------------|-----------------
+ *     0x00            | MAG_POWER_MODE_NORMAL
+ *     0x01            | MAG_POWER_MODE_SLEEP
+ *     0x02            | MAG_POWER_MODE_SUSPEND
+ *     0x03            | MAG_POWER_MODE_FORCE_MODE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_power_mode(
+u_8 v_mag_power_mode_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode(
+		OPERATION_MODE_CONFIG);
+	if (v_stat_s_8 == SUCCESS) {
+		/* Write page as one */
+		v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if (v_pg_stat_s_8 == SUCCESS) {
+			if (v_mag_power_mode_u_8 < BNO055_FOUR_U8X) {
+				/* Write the value of mag power mode*/
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_MAG_POWER_MODE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_MAG_POWER_MODE,
+					v_mag_power_mode_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_POWER_MODE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = E_BNO055_OUT_OF_RANGE;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+} else {
+	com_rslt = ERROR;
+}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro range
+ *	from page one register from 0x0A bit 0 to 3
+ *
+ *	@param v_gyro_range_u_8 : The value of gyro range
+ *
+ *     v_gyro_range_u_8 |   result
+ * --------------------|-----------------
+ *     0x00            | GYRO_RANGE_2000DPS
+ *     0x01            | GYRO_RANGE_1000DPS
+ *     0x02            | GYRO_RANGE_500DPS
+ *     0x03            | GYRO_RANGE_250DPS
+ *     0x04            | GYRO_RANGE_125DPS
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_range(
+u_8 *v_gyro_range_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro range is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro range */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_RANGE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_range_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_RANGE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro range
+ *	from page one register from 0x0A bit 0 to 3
+ *
+ *	@param v_gyro_range_u_8 : The value of gyro range
+ *
+ *     v_gyro_range_u_8 |   result
+ * --------------------|-----------------
+ *     0x00            | GYRO_RANGE_2000DPS
+ *     0x01            | GYRO_RANGE_1000DPS
+ *     0x02            | GYRO_RANGE_500DPS
+ *     0x03            | GYRO_RANGE_250DPS
+ *     0x04            | GYRO_RANGE_125DPS
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_range(
+u_8 v_gyro_range_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				if (v_gyro_range_u_8 < BNO055_FIVE_U8X) {
+					/* Write the value of gyro range*/
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_RANGE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data_u_8r = BNO055_SET_BITSLICE
+						(v_data_u_8r,
+						BNO055_GYRO_RANGE,
+						v_gyro_range_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_GYRO_RANGE__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro bandwidth
+ *	from page one register from 0x0A bit 3 to 5
+ *
+ *	@param v_gyro_bw_u_8 : The value of gyro bandwidth
+ *
+ *     v_gyro_bw_u_8    |   result
+ * --------------------|-----------------
+ *     0x00            | GYRO_BW_523HZ
+ *     0x01            | GYRO_BW_230HZ
+ *     0x02            | GYRO_BW_116HZ
+ *     0x03            | GYRO_BW_47HZ
+ *     0x04            | GYRO_BW_23HZ
+ *     0x05            | GYRO_BW_12HZ
+ *     0x06            | GYRO_BW_64HZ
+ *     0x07            | GYRO_BW_32HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_bw(
+u_8 *v_gyro_bw_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro bandwidth is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_BW__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_bw_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_BW);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro bandwidth
+ *	from page one register from 0x0A bit 3 to 5
+ *
+ *	@param v_gyro_bw_u_8 : The value of gyro bandwidth
+ *
+ *     v_gyro_bw_u_8    |   result
+ * --------------------|-----------------
+ *     0x00            | GYRO_BW_523HZ
+ *     0x01            | GYRO_BW_230HZ
+ *     0x02            | GYRO_BW_116HZ
+ *     0x03            | GYRO_BW_47HZ
+ *     0x04            | GYRO_BW_23HZ
+ *     0x05            | GYRO_BW_12HZ
+ *     0x06            | GYRO_BW_64HZ
+ *     0x07            | GYRO_BW_32HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_bw(
+u_8 v_gyro_bw_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 gyro_opmode = BNO055_ZERO_U8X;
+u_8 gyro_auto_sleep_durn = BNO055_ZERO_U8X;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+	if (v_stat_s_8 == SUCCESS) {
+		/* Write page as one */
+		v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+	if (v_pg_stat_s_8 == SUCCESS) {
+		/* Write the value of gyro bandwidth */
+		if ((v_gyro_bw_u_8 == BNO055_ZERO_U8X ||
+			v_gyro_bw_u_8 > BNO055_ZERO_U8X) &&
+			v_gyro_bw_u_8 < BNO055_EIGHT_U8X) {
+			switch (v_gyro_bw_u_8) {
+			case GYRO_BW_523HZ:
+			v_gyro_bw_u_8 = GYRO_BW_523HZ;
+			break;
+			case GYRO_BW_230HZ:
+			v_gyro_bw_u_8 = GYRO_BW_230HZ;
+			break;
+			case GYRO_BW_116HZ:
+			v_gyro_bw_u_8 = GYRO_BW_116HZ;
+			break;
+			case GYRO_BW_47HZ:
+			v_gyro_bw_u_8 = GYRO_BW_47HZ;
+			break;
+			case GYRO_BW_23HZ:
+			v_gyro_bw_u_8 = GYRO_BW_23HZ;
+			break;
+			case GYRO_BW_12HZ:
+			v_gyro_bw_u_8 = GYRO_BW_12HZ;
+			break;
+			case GYRO_BW_64HZ:
+			v_gyro_bw_u_8 = GYRO_BW_64HZ;
+			break;
+			case GYRO_BW_32HZ:
+			v_gyro_bw_u_8 = GYRO_BW_32HZ;
+			break;
+			default:
+			break;
+			}
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_BW__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r = BNO055_SET_BITSLICE
+				(v_data_u_8r,
+				BNO055_GYRO_BW,
+				v_gyro_bw_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_BW__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+			com_rslt = bno055_get_gyro_power_mode
+			(&gyro_opmode);
+			if (com_rslt == SUCCESS) {
+				if (gyro_opmode ==
+				GYRO_POWER_MODE_ADVANCE_POWERSAVE) {
+					com_rslt +=
+					bno055_get_gyro_auto_sleep_durn
+					(&gyro_auto_sleep_durn);
+					if (com_rslt == SUCCESS) {
+						com_rslt +=
+						bno055_gyro_set_auto_sleep_durn
+						(gyro_auto_sleep_durn,
+						v_gyro_bw_u_8);
+					}
+				}
+			}
+		} else {
+		com_rslt = E_BNO055_OUT_OF_RANGE;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+} else {
+com_rslt = ERROR;
+}
+} else {
+com_rslt = ERROR;
+}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro power mode
+ *	from page one register from 0x0B bit 0 to 2
+ *
+ *	@param v_gyro_power_mode_u_8 : The value of gyro power mode
+ *
+ *  v_gyro_power_mode_u_8 |          result
+ * ----------------------|----------------------------
+ *     0x00              | GYRO_OPR_MODE_NORMAL
+ *     0x01              | GYRO_OPR_MODE_FASTPOWERUP
+ *     0x02              | GYRO_OPR_MODE_DEEPSUSPEND
+ *     0x03              | GYRO_OPR_MODE_SUSPEND
+ *     0x04              | GYRO_OPR_MODE_ADVANCE_POWERSAVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_power_mode(
+u_8 *v_gyro_power_mode_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro power mode is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Write the value of gyro power mode*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_POWER_MODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_power_mode_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_POWER_MODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro power mode
+ *	from page one register from 0x0B bit 0 to 2
+ *
+ *	@param v_gyro_power_mode_u_8 : The value of gyro power mode
+ *
+ *  v_gyro_power_mode_u_8 |          result
+ * ----------------------|----------------------------
+ *     0x00              | GYRO_OPR_MODE_NORMAL
+ *     0x01              | GYRO_OPR_MODE_FASTPOWERUP
+ *     0x02              | GYRO_OPR_MODE_DEEPSUSPEND
+ *     0x03              | GYRO_OPR_MODE_SUSPEND
+ *     0x04              | GYRO_OPR_MODE_ADVANCE_POWERSAVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_power_mode(
+u_8 v_gyro_power_mode_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 gyro_auto_sleep_durn = BNO055_ZERO_U8X;
+u_8 v_gyro_bw_u_8 = BNO055_ZERO_U8X;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+	if (v_stat_s_8 == SUCCESS) {
+		/* Write page as one */
+		v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if (v_pg_stat_s_8 == SUCCESS) {
+			/* Write the value of power mode*/
+			if ((v_gyro_power_mode_u_8 == BNO055_ZERO_U8X ||
+			v_gyro_power_mode_u_8 > BNO055_ZERO_U8X) &&
+			v_gyro_power_mode_u_8 < BNO055_FIVE_U8X) {
+				switch (v_gyro_power_mode_u_8) {
+				case GYRO_POWER_MODE_NORMAL:
+				v_gyro_power_mode_u_8 =
+				GYRO_POWER_MODE_NORMAL;
+				break;
+				case GYRO_POWER_MODE_FASTPOWERUP:
+				v_gyro_power_mode_u_8 =
+				GYRO_POWER_MODE_FASTPOWERUP;
+				break;
+				case GYRO_POWER_MODE_DEEPSUSPEND:
+				v_gyro_power_mode_u_8 =
+				GYRO_POWER_MODE_DEEPSUSPEND;
+				break;
+				case GYRO_POWER_MODE_SUSPEND:
+				v_gyro_power_mode_u_8 =
+				GYRO_POWER_MODE_SUSPEND;
+				break;
+				case GYRO_POWER_MODE_ADVANCE_POWERSAVE:
+				com_rslt = bno055_get_gyro_bw
+				(&v_gyro_bw_u_8);
+				com_rslt += bno055_get_gyro_auto_sleep_durn
+				(&gyro_auto_sleep_durn);
+				if (com_rslt == SUCCESS)
+					bno055_gyro_set_auto_sleep_durn
+					(gyro_auto_sleep_durn,
+					v_gyro_bw_u_8);
+					com_rslt +=
+					bno055_write_page_id(PAGE_ONE);
+					v_gyro_power_mode_u_8 =
+					GYRO_POWER_MODE_ADVANCE_POWERSAVE;
+				break;
+				default:
+				break;
+				}
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_POWER_MODE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_GYRO_POWER_MODE,
+					v_gyro_power_mode_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_POWER_MODE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = E_BNO055_OUT_OF_RANGE;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+} else {
+	com_rslt = ERROR;
+}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel sleep mode
+ *	from page one register from 0x0C bit 0
+ *
+ *	@param v_sleep_tmr_u_8 : The value of accel sleep mode
+ *
+ *  v_sleep_tmr_u_8   |   result
+ * ----------------- |------------------------------------
+ *     0x00          | enable EventDrivenSampling(EDT)
+ *     0x01          | enable Equidistant sampling mode(EST)
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_sleep_tmr_mode(
+u_8 *v_sleep_tmr_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel sleep mode is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* read the value of accel sleep mode */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_SLEEP_MODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_sleep_tmr_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_SLEEP_MODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel sleep mode
+ *	from page one register from 0x0C bit 0
+ *
+ *	@param v_sleep_tmr_u_8 : The value of accel sleep mode
+ *
+ *  v_sleep_tmr_u_8   |   result
+ * ----------------- |------------------------------------
+ *     0x00          | enable EventDrivenSampling(EDT)
+ *     0x01          | enable Equidistant sampling mode(EST)
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_sleep_tmr_mode(
+u_8 v_sleep_tmr_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write page as one */
+				v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+				if (v_pg_stat_s_8 == SUCCESS) {
+					if (v_sleep_tmr_u_8 < BNO055_TWO_U8X) {
+						/*Write the value
+						of accel sleep mode*/
+						com_rslt =
+						p_bno055->BNO055_BUS_READ_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_SLEEP_MODE__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data_u_8r = BNO055_SET_BITSLICE
+						(v_data_u_8r,
+						BNO055_ACCEL_SLEEP_MODE,
+						v_sleep_tmr_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_SLEEP_MODE__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+					} else {
+					com_rslt = E_BNO055_OUT_OF_RANGE;
+					}
+				} else {
+				com_rslt = ERROR;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel sleep duration
+ *	from page one register from 0x0C bit 1 to 4
+ *
+ *	@param v_sleep_durn_u_8 : The value of accel sleep duration
+ *
+ * v_sleep_durn_u_8  |      result
+ * ---------------- |-----------------------------
+ *     0x05         | BNO055_ACCEL_SLEEP_DURN_0_5MS
+ *     0x06         | BNO055_ACCEL_SLEEP_DURN_1MS
+ *     0x07         | BNO055_ACCEL_SLEEP_DURN_2MS
+ *     0x08         | BNO055_ACCEL_SLEEP_DURN_4MS
+ *     0x09         | BNO055_ACCEL_SLEEP_DURN_6MS
+ *     0x0A         | BNO055_ACCEL_SLEEP_DURN_10MS
+ *     0x0B         | BNO055_ACCEL_SLEEP_DURN_25MS
+ *     0x0C         | BNO055_ACCEL_SLEEP_DURN_50MS
+ *     0x0D         | BNO055_ACCEL_SLEEP_DURN_100MS
+ *     0x0E         | BNO055_ACCEL_SLEEP_DURN_500MS
+ *     0x0F         | BNO055_ACCEL_SLEEP_DURN_1S
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_sleep_durn(
+u_8 *v_sleep_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel sleep duration
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel sleep duration */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_SLEEP_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_sleep_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_SLEEP_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel sleep duration
+ *	from page one register from 0x0C bit 1 to 4
+ *
+ *	@param v_sleep_durn_u_8 : The value of accel sleep duration
+ *
+ * v_sleep_durn_u_8  |      result
+ * ---------------- |-----------------------------
+ *     0x05         | BNO055_ACCEL_SLEEP_DURN_0_5MS
+ *     0x06         | BNO055_ACCEL_SLEEP_DURN_1MS
+ *     0x07         | BNO055_ACCEL_SLEEP_DURN_2MS
+ *     0x08         | BNO055_ACCEL_SLEEP_DURN_4MS
+ *     0x09         | BNO055_ACCEL_SLEEP_DURN_6MS
+ *     0x0A         | BNO055_ACCEL_SLEEP_DURN_10MS
+ *     0x0B         | BNO055_ACCEL_SLEEP_DURN_25MS
+ *     0x0C         | BNO055_ACCEL_SLEEP_DURN_50MS
+ *     0x0D         | BNO055_ACCEL_SLEEP_DURN_100MS
+ *     0x0E         | BNO055_ACCEL_SLEEP_DURN_500MS
+ *     0x0F         | BNO055_ACCEL_SLEEP_DURN_1S
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_sleep_durn(
+u_8 v_sleep_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write page as one */
+				v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+				if (v_pg_stat_s_8 == SUCCESS) {
+					if (v_sleep_durn_u_8 <
+					BNO055_SIXTEEN_U8X) {
+						/* Write the accel
+						sleep duration*/
+						com_rslt =
+						p_bno055->BNO055_BUS_READ_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_SLEEP_DURN__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data_u_8r = BNO055_SET_BITSLICE
+						(v_data_u_8r,
+						BNO055_ACCEL_SLEEP_DURN,
+						v_sleep_durn_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_SLEEP_DURN__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+					} else {
+					com_rslt = E_BNO055_OUT_OF_RANGE;
+					}
+				} else {
+				com_rslt = ERROR;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode of
+		previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro sleep duration
+ *	from page one register from 0x0D bit 0 to 2
+ *
+ *	@param v_sleep_durn_u_8 : The value of gyro sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_sleep_durn(u_8 *v_sleep_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel range is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the gyro sleep duration */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_SLEEP_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_sleep_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_SLEEP_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro sleep duration
+ *	from page one register from 0x0D bit 0 to 2
+ *
+ *	@param v_sleep_durn_u_8 : The value of gyro sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_sleep_durn(u_8 v_sleep_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				if (v_sleep_durn_u_8 < BNO055_EIGHT_U8X) {
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_SLEEP_DURN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						/* Write the gyro
+						sleep duration */
+						v_data_u_8r = BNO055_SET_BITSLICE
+						(v_data_u_8r,
+						BNO055_GYRO_SLEEP_DURN,
+						v_sleep_durn_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_GYRO_SLEEP_DURN__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro auto sleep duration
+ *	from page one register from 0x0D bit 3 to 5
+ *
+ *	@param v_auto_sleep_durn_u_8 : The value of gyro auto sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_auto_sleep_durn(
+u_8 *v_auto_sleep_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel range is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro auto sleep duration */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_AUTO_SLEEP_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_auto_sleep_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_AUTO_SLEEP_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro auto sleep duration
+ *	from page one register from 0x0D bit 3 to 5
+ *
+ *	@param v_auto_sleep_durn_u_8 : The value of gyro auto sleep duration
+ *	@param bw : The value of gyro bandwidth
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_gyro_set_auto_sleep_durn(
+u_8 v_auto_sleep_durn_u_8, u_8 bw)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_auto_sleep_durn_u_8r;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+	if (v_stat_s_8 == SUCCESS) {
+		/* Write page as one */
+		v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if (v_pg_stat_s_8 == SUCCESS) {
+			/* Write the value of gyro sleep duration */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_AUTO_SLEEP_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (v_auto_sleep_durn_u_8 < BNO055_EIGHT_U8X) {
+				switch (bw) {
+				case GYRO_BW_523HZ:
+				if (v_auto_sleep_durn_u_8 >
+					BNO055_GYRO_4MS_AUTOSLPDUR)
+					v_auto_sleep_durn_u_8r =
+					v_auto_sleep_durn_u_8;
+				else
+					v_auto_sleep_durn_u_8r =
+					BNO055_GYRO_4MS_AUTOSLPDUR;
+				break;
+				case GYRO_BW_230HZ:
+				if (v_auto_sleep_durn_u_8 >
+					BNO055_GYRO_4MS_AUTOSLPDUR)
+					v_auto_sleep_durn_u_8r =
+					v_auto_sleep_durn_u_8;
+				else
+					v_auto_sleep_durn_u_8r =
+					BNO055_GYRO_4MS_AUTOSLPDUR;
+				break;
+				case GYRO_BW_116HZ:
+				if (v_auto_sleep_durn_u_8 >
+					BNO055_GYRO_4MS_AUTOSLPDUR)
+					v_auto_sleep_durn_u_8r =
+					v_auto_sleep_durn_u_8;
+				else
+					v_auto_sleep_durn_u_8r =
+					BNO055_GYRO_4MS_AUTOSLPDUR;
+				break;
+				case GYRO_BW_47HZ:
+				if (v_auto_sleep_durn_u_8 >
+					BNO055_GYRO_5MS_AUTOSLPDUR)
+					v_auto_sleep_durn_u_8r =
+					v_auto_sleep_durn_u_8;
+				else
+					v_auto_sleep_durn_u_8r =
+					BNO055_GYRO_5MS_AUTOSLPDUR;
+				break;
+				case GYRO_BW_23HZ:
+				if (v_auto_sleep_durn_u_8 >
+					BNO055_GYRO_10MS_AUTOSLPDUR)
+					v_auto_sleep_durn_u_8r =
+					v_auto_sleep_durn_u_8;
+				else
+					v_auto_sleep_durn_u_8r =
+					BNO055_GYRO_10MS_AUTOSLPDUR;
+				break;
+				case GYRO_BW_12HZ:
+				if (v_auto_sleep_durn_u_8 >
+					BNO055_GYRO_20MS_AUTOSLPDUR)
+					v_auto_sleep_durn_u_8r =
+					v_auto_sleep_durn_u_8;
+				else
+					v_auto_sleep_durn_u_8r =
+					BNO055_GYRO_20MS_AUTOSLPDUR;
+				break;
+				case GYRO_BW_64HZ:
+				if (v_auto_sleep_durn_u_8 >
+					BNO055_GYRO_10MS_AUTOSLPDUR)
+					v_auto_sleep_durn_u_8r =
+					v_auto_sleep_durn_u_8;
+				else
+					v_auto_sleep_durn_u_8r =
+					BNO055_GYRO_10MS_AUTOSLPDUR;
+				break;
+				case GYRO_BW_32HZ:
+				if (v_auto_sleep_durn_u_8 >
+					BNO055_GYRO_20MS_AUTOSLPDUR)
+					v_auto_sleep_durn_u_8r =
+					v_auto_sleep_durn_u_8;
+				else
+					v_auto_sleep_durn_u_8r =
+					BNO055_GYRO_20MS_AUTOSLPDUR;
+				break;
+				default:
+				if (v_auto_sleep_durn_u_8 >
+					BNO055_GYRO_4MS_AUTOSLPDUR)
+					v_auto_sleep_durn_u_8r =
+					v_auto_sleep_durn_u_8;
+				else
+					v_auto_sleep_durn_u_8r =
+					BNO055_GYRO_4MS_AUTOSLPDUR;
+				break;
+				}
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_GYRO_AUTO_SLEEP_DURN,
+					v_auto_sleep_durn_u_8r);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_AUTO_SLEEP_DURN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = E_BNO055_OUT_OF_RANGE;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+} else {
+com_rslt = ERROR;
+}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the mag sleep mode
+ *	from page one register from 0x0E bit 0
+ *
+ *	@param v_sleep_mode_u_8 : The value of mag sleep mode
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_sleep_mode(
+u_8 *v_sleep_mode_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page,mag sleep mode is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of mag sleep mode*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_SLEEP_MODE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_sleep_mode_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_MAG_SLEEP_MODE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the mag sleep mode
+ *	from page one register from 0x0E bit 0
+ *
+ *	@param v_sleep_mode_u_8 : The value of mag sleep mode
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_sleep_mode(
+u_8 v_sleep_mode_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write page as one */
+				v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+				if (v_pg_stat_s_8 == SUCCESS) {
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_SLEEP_MODE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						/* Write the value
+						of mag sleep mode*/
+						v_data_u_8r =
+						BNO055_SET_BITSLICE(v_data_u_8r,
+						BNO055_MAG_SLEEP_MODE,
+						v_sleep_mode_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_SLEEP_MODE__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = ERROR;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode of
+		previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the mag sleep duration
+ *	from page one register from 0x0E bit 1 to 4
+ *
+ *	@param v_sleep_durn_u_8 : The value of mag sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_sleep_durn(
+u_8 *v_sleep_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page,mag sleep duration is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of mag sleep duration*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_MAG_SLEEP_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_sleep_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_MAG_SLEEP_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the mag sleep duration
+ *	from page one register from 0x0E bit 1 to 4
+ *
+ *	@param v_sleep_durn_u_8 : The value of mag sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_sleep_durn(
+u_8 v_sleep_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write page as one */
+				v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+				if (v_pg_stat_s_8 == SUCCESS) {
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_MAG_SLEEP_DURN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						/* Write the value of
+						mag sleep duration */
+						v_data_u_8r =
+						BNO055_SET_BITSLICE(v_data_u_8r,
+						BNO055_MAG_SLEEP_DURN,
+						v_sleep_durn_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_MAG_SLEEP_DURN__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = ERROR;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode of
+		previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro anymotion interrupt mask
+ *	from page one register from 0x0F bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt mask
+ *		v_gyro_any_motion_u_8 |   result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *	bno055_set_gyro_any_motion_axis_enable()
+ *
+ *	Filter setting:
+ *	bno055_set_gyro_any_motion_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_gyro_any_motion_thres()
+ *
+ *	Slope samples :
+ *
+ *	bno055_set_gyro_any_motion_slope_samples()
+ *
+ *	Awake duration :
+ *
+ *	bno055_set_gyro_any_motion_awake_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_gyro_any_motion(
+u_8 *v_gyro_any_motion_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro anymotion interrupt mask is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro anymotion interrupt mask*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_ANY_MOTION_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_any_motion_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_ANY_MOTION_INTR_MASK);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro anymotion interrupt mask
+ *	from page one register from 0x0F bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt mask
+ *		v_gyro_any_motion_u_8 |   result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *	bno055_set_gyro_any_motion_axis_enable()
+ *
+ *	Filter setting:
+ *	bno055_set_gyro_any_motion_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_gyro_any_motion_thres()
+ *
+ *	Slope samples :
+ *
+ *	bno055_set_gyro_any_motion_slope_samples()
+ *
+ *	Awake duration :
+ *
+ *	bno055_set_gyro_any_motion_awake_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_gyro_any_motion(
+u_8 v_gyro_any_motion_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel range is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Write the value of gyro anymotion interrupt mask*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_ANY_MOTION_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_GYRO_ANY_MOTION_INTR_MASK,
+				v_gyro_any_motion_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_ANY_MOTION_INTR_MASK__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro highrate interrupt mask
+ *	from page one register from 0x0F bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt mask
+ *		  v_gyro_highrate_u_8 |  result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro highrate interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_gyro_highrate_axis_enable()
+ *
+ *	Filter :
+ *
+ *	bno055_set_gyro_highrate_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_get_gyro_highrate_x_thres()
+ *
+ *	bno055_get_gyro_highrate_y_thres()
+ *
+ *	bno055_get_gyro_highrate_z_thres()
+ *
+ *	Hysteresis :
+ *
+ *	bno055_set_gyro_highrate_x_hyst()
+ *
+ *	bno055_set_gyro_highrate_y_hyst()
+ *
+ *	bno055_set_gyro_highrate_z_hyst()
+ *
+ *	Duration :
+ *
+ *	bno055_set_gyro_highrate_x_durn()
+ *
+ *	bno055_set_gyro_highrate_y_durn()
+ *
+ *	bno055_set_gyro_highrate_z_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_gyro_highrate(
+u_8 *v_gyro_highrate_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate interrupt mask is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate interrupt mask*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_INTR_MASK);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro highrate interrupt mask
+ *	from page one register from 0x0F bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt mask
+ *		  v_gyro_highrate_u_8 |  result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro highrate interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_gyro_highrate_axis_enable()
+ *
+ *	Filter :
+ *
+ *	bno055_set_gyro_highrate_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_get_gyro_highrate_x_thres()
+ *
+ *	bno055_get_gyro_highrate_y_thres()
+ *
+ *	bno055_get_gyro_highrate_z_thres()
+ *
+ *	Hysteresis :
+ *
+ *	bno055_set_gyro_highrate_x_hyst()
+ *
+ *	bno055_set_gyro_highrate_y_hyst()
+ *
+ *	bno055_set_gyro_highrate_z_hyst()
+ *
+ *	Duration :
+ *
+ *	bno055_set_gyro_highrate_x_durn()
+ *
+ *	bno055_set_gyro_highrate_y_durn()
+ *
+ *	bno055_set_gyro_highrate_z_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_gyro_highrate(
+u_8 v_gyro_highrate_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate interrupt mask is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Write the value of gyro
+				highrate interrupt mask*/
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_GYRO_HIGHRATE_INTR_MASK,
+				v_gyro_highrate_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_INTR_MASK__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel highg interrupt mask
+ *	from page one register from 0x0F bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt mask
+ *		   v_accel_high_g_u_8 |   result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_accel_high_g(
+u_8 *v_accel_high_g_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel highg interrupt mask is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel highg interrupt mask*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_HIGH_G_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_high_g_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_HIGH_G_INTR_MASK);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel highg interrupt mask
+ *	from page one register from 0x0F bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt mask
+ *		   v_accel_high_g_u_8 |   result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_accel_high_g(
+u_8 v_accel_high_g_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel highg interrupt mask is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_HIGH_G_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Write the value of accel
+				highg interrupt mask*/
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_HIGH_G_INTR_MASK,
+				v_accel_high_g_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_HIGH_G_INTR_MASK__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel anymotion interrupt mask
+ *	from page one register from 0x0F bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt mask
+ *     v_accel_any_motion_u_8 | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_accel_any_motion(
+u_8 *v_accel_any_motion_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel anymotion interrupt mask is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* The value of accel anymotion interrupt mask*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_ANY_MOTION_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_any_motion_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_ANY_MOTION_INTR_MASK);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel anymotion interrupt mask
+ *	from page one register from 0x0F bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt mask
+ *     v_accel_any_motion_u_8 | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Duration:
+ *
+ *	bno055_set_accel_any_motion_durn()
+ *
+ * Threshold:
+ *
+ *	bno055_set_accel_any_motion_thres()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_accel_any_motion(
+u_8 v_accel_any_motion_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel anymotion interrupt mask is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Write the value of accel anymotion interrupt mask*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_ANY_MOTION_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_ANY_MOTION_INTR_MASK,
+				v_accel_any_motion_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_INTR_MASK__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel nomotion interrupt mask
+ *	from page one register from 0x0F bit 7
+ *
+ *	@param v_accel_nomotion_u_8 : The value of accel nomotion interrupt mask
+ *     v_accel_nomotion_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *
+ *	@note While enabling the accel anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Duration:
+ *
+ *	bno055_set_accel_any_motion_durn()
+ *
+ * Threshold:
+ *
+ *	bno055_set_accel_any_motion_thres())
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_accel_no_motion(
+u_8 *v_accel_nomotion_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel nomotion interrupt mask is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel nomotion interrupt mask*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_NO_MOTION_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_nomotion_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_NO_MOTION_INTR_MASK);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel nomotion interrupt mask
+ *	from page one register from 0x0F bit 7
+ *
+ *	@param v_accel_nomotion_u_8 : The value of accel nomotion interrupt mask
+ *     v_accel_nomotion_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel nomotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_slow_no_motion_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_slow_no_motion_durn()
+ *
+ *	Slow/no motion enable:
+ *
+ *	bno055_set_accel_slow_no_motion_enable()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_accel_no_motion(
+u_8 v_accel_nomotion_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel
+		nomotion interrupt mask is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_NO_MOTION_INTR_MASK__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Write the value of accel
+				nomotion interrupt mask*/
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_NO_MOTION_INTR_MASK,
+				v_accel_nomotion_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_NO_MOTION_INTR_MASK__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro anymotion interrupt
+ *	from page one register from 0x10 bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt
+ *		v_gyro_any_motion_u_8 | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *	bno055_set_gyro_any_motion_axis_enable()
+ *
+ *	Filter setting:
+ *	bno055_set_gyro_any_motion_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_gyro_any_motion_thres()
+ *
+ *	Slope samples :
+ *
+ *	bno055_set_gyro_any_motion_slope_samples()
+ *
+ *	Awake duration :
+ *
+ *	bno055_set_gyro_any_motion_awake_durn()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_gyro_any_motion(
+u_8 *v_gyro_any_motion_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro anymotion interrupt  is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro anymotion interrupt */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_ANY_MOTION_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_any_motion_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_ANY_MOTION_INTR);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro anymotion interrupt
+ *	from page one register from 0x10 bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt
+ *	  v_gyro_any_motion_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *	bno055_set_gyro_any_motion_axis_enable()
+ *
+ *	Filter setting:
+ *	bno055_set_gyro_any_motion_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_gyro_any_motion_thres()
+ *
+ *	Slope samples :
+ *
+ *	bno055_set_gyro_any_motion_slope_samples()
+ *
+ *	Awake duration :
+ *
+ *	bno055_set_gyro_any_motion_awake_durn()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_gyro_any_motion(
+u_8 v_gyro_any_motion_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+	/*condition check for page, gyro anymotion interrupt  is
+	available in the page one*/
+	if (p_bno055->page_id != PAGE_ONE)
+		/* Write page as one */
+		v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+	if ((v_stat_s_8 == SUCCESS) ||
+	(p_bno055->page_id == PAGE_ONE)) {
+		/* Write the value of gyro anymotion interrupt */
+		com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+		(p_bno055->dev_addr,
+		BNO055_GYRO_ANY_MOTION_INTR__REG,
+		&v_data_u_8r, BNO055_ONE_U8X);
+		if (com_rslt == SUCCESS) {
+			v_data_u_8r =
+			BNO055_SET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_ANY_MOTION_INTR,
+			v_gyro_any_motion_u_8);
+			com_rslt +=
+			p_bno055->BNO055_BUS_WRITE_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_ANY_MOTION_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro highrate interrupt
+ *	from page one register from 0x10 bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt
+ *		v_gyro_highrate_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro highrate interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_gyro_highrate_axis_enable()
+ *
+ *	Filter :
+ *
+ *	bno055_set_gyro_highrate_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_get_gyro_highrate_x_thres()
+ *
+ *	bno055_get_gyro_highrate_y_thres()
+ *
+ *	bno055_get_gyro_highrate_z_thres()
+ *
+ *	Hysteresis :
+ *
+ *	bno055_set_gyro_highrate_x_hyst()
+ *
+ *	bno055_set_gyro_highrate_y_hyst()
+ *
+ *	bno055_set_gyro_highrate_z_hyst()
+ *
+ *	Duration :
+ *
+ *	bno055_set_gyro_highrate_x_durn()
+ *
+ *	bno055_set_gyro_highrate_y_durn()
+ *
+ *	bno055_set_gyro_highrate_z_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_gyro_highrate(
+u_8 *v_gyro_highrate_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate interrupt is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate interrupt */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_INTR);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro highrate interrupt
+ *	from page one register from 0x10 bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt
+ *		v_gyro_highrate_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro highrate interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_gyro_highrate_axis_enable()
+ *
+ *	Filter :
+ *
+ *	bno055_set_gyro_highrate_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_get_gyro_highrate_x_thres()
+ *
+ *	bno055_get_gyro_highrate_y_thres()
+ *
+ *	bno055_get_gyro_highrate_z_thres()
+ *
+ *	Hysteresis :
+ *
+ *	bno055_set_gyro_highrate_x_hyst()
+ *
+ *	bno055_set_gyro_highrate_y_hyst()
+ *
+ *	bno055_set_gyro_highrate_z_hyst()
+ *
+ *	Duration :
+ *
+ *	bno055_set_gyro_highrate_x_durn()
+ *
+ *	bno055_set_gyro_highrate_y_durn()
+ *
+ *	bno055_set_gyro_highrate_z_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_gyro_highrate(
+u_8 v_gyro_highrate_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate interrupt is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Write the value of gyro highrate interrupt */
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_GYRO_HIGHRATE_INTR, v_gyro_highrate_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_INTR__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel highg interrupt
+ *	from page one register from 0x10 bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt
+ *		v_accel_high_g_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_accel_high_g(
+u_8 *v_accel_high_g_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel highg interrupt  is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel highg interrupt*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_HIGH_G_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_high_g_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_HIGH_G_INTR);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel highg interrupt
+ *	from page one register from 0x10 bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt
+ *		v_accel_high_g_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_accel_high_g(
+u_8 v_accel_high_g_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel highg interrupt is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_HIGH_G_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Write the value of accel highg interrupt*/
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_HIGH_G_INTR,
+				v_accel_high_g_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_HIGH_G_INTR__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel anymotion interrupt
+ *	from page one register from 0x10 bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt
+ *	v_accel_any_motion_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Duration:
+ *
+ *	bno055_set_accel_any_motion_durn()
+ *
+ * Threshold:
+ *
+ *	bno055_set_accel_any_motion_thres()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_accel_any_motion(
+u_8 *v_accel_any_motion_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel anymotion interrupt  is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel anymotion interrupt */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_ANY_MOTION_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_any_motion_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_ANY_MOTION_INTR);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel anymotion interrupt
+ *	from page one register from 0x10 bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt
+ *	v_accel_any_motion_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Duration:
+ *
+ *	bno055_set_accel_any_motion_durn()
+ *
+ *	Threshold:
+ *
+ *	bno055_set_accel_any_motion_thres()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_accel_any_motion(
+u_8 v_accel_any_motion_u_8)
+{
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel range is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Write the value of accel anymotion interrupt */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_ANY_MOTION_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r =
+				BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_ANY_MOTION_INTR,
+				v_accel_any_motion_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_INTR__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel nomotion interrupt
+ *	from page one register from 0x10 bit 6
+ *
+ *	@param v_accel_nomotion_u_8 : The value of accel nomotion interrupt
+ *	  v_accel_nomotion_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel nomotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_slow_no_motion_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_slow_no_motion_durn()
+ *
+ *	Slow/no motion enable:
+ *
+ *	bno055_set_accel_slow_no_motion_enable()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_accel_no_motion(
+u_8 *v_accel_nomotion_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel nomotion interrupt is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel nomotion interrupt*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_NO_MOTION_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_nomotion_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_NO_MOTION_INTR);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel nomotion interrupt
+ *	from page one register from 0x10 bit 6
+ *
+ *	@param v_accel_nomotion_u_8 : The value of accel nomotion interrupt
+ *	  v_accel_nomotion_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel nomotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_slow_no_motion_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_slow_no_motion_durn()
+ *
+ *	Slow/no motion enable:
+ *
+ *	bno055_set_accel_slow_no_motion_enable()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_accel_no_motion(
+u_8 v_accel_nomotion_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+	} else {
+	/*condition check for page,
+	accel nomotion interrupt is
+	available in the page one*/
+	if (p_bno055->page_id != PAGE_ONE)
+		/* Write page as one */
+		v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_NO_MOTION_INTR__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				/* Write the value of
+				accel nomotion interrupt */
+				v_data_u_8r = BNO055_SET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_NO_MOTION_INTR,
+				v_accel_nomotion_u_8);
+				com_rslt += p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_NO_MOTION_INTR__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel any motion threshold
+ *	from page one register from 0x11 bit 0 to 7
+ *
+ *	@param v_accel_any_motion_thres_u_8 : The value of any motion threshold
+ *  v_accel_any_motion_thres_u_8 | result
+ *  ------------------------    | -------------
+ *              0x01            | ENABLED
+ *              0x00            | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel anymotion threshold dependent on the
+ *	range values
+ *
+ *  v_accel_range_u_8 |	threshold |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    3.19mg     |   1LSB
+ *     4g        |    7.81mg     |   1LSB
+ *     8g        |    15.63mg    |   1LSB
+ *     16g       |    31.25mg    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_any_motion_thres(
+u_8 *v_accel_any_motion_thres_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel any motion threshold  is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel any motion threshold */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_ANY_MOTION_THRES__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_any_motion_thres_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_ANY_MOTION_THRES);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel any motion threshold
+ *	from page one register from 0x11 bit 0 to 7
+ *
+ *	@param v_accel_any_motion_thres_u_8 : The value of any motion threshold
+ *  v_accel_any_motion_thres_u_8 | result
+ *  ------------------------    | -------------
+ *              0x01            | ENABLED
+ *              0x00            | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel anymotion threshold dependent on the
+ *	range values
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    3.19mg     |   1LSB
+ *     4g        |    7.81mg     |   1LSB
+ *     8g        |    15.63mg    |   1LSB
+ *     16g       |    31.25mg    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_any_motion_thres(
+u_8 v_accel_any_motion_thres_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_THRES__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					/* Write the value of
+					accel any motion threshold*/
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_ACCEL_ANY_MOTION_THRES,
+					v_accel_any_motion_thres_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_ANY_MOTION_THRES__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel anymotion duration
+ *	from page one register from 0x12 bit 0 to 1
+ *
+ *	@param v_accel_any_motion_durn_u_8 : The value of accel anymotion duration
+ * v_accel_any_motion_durn_u_8  | result
+ *  -------------------------  | -------------
+ *              0x01           | ENABLED
+ *              0x00           | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_any_motion_durn(
+u_8 *v_accel_any_motion_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel anymotion duration  is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel anymotion duration */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_ANY_MOTION_DURN_SET__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_any_motion_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_ANY_MOTION_DURN_SET);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel anymotion duration
+ *	from page one register from 0x12 bit 0 to 1
+ *
+ *	@param v_accel_any_motion_durn_u_8 : The value of accel anymotion duration
+ *
+ * v_accel_any_motion_durn_u_8  | result
+ *  -------------------------  | -------------
+ *              0x01           | ENABLED
+ *              0x00           | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_any_motion_durn(
+u_8 v_accel_any_motion_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_DURN_SET__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					/* Write the value of
+					accel anymotion duration*/
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_ACCEL_ANY_MOTION_DURN_SET,
+					v_accel_any_motion_durn_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_ANY_MOTION_DURN_SET__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel anymotion enable
+ *	from page one register from 0x12 bit 2 to 4
+ *
+ *	@param v_data_u_8 : The value of accel anymotion enable
+ *	   v_data_u_8 | result
+ *  ------------ | -------------
+ *      0x01     | ENABLED
+ *      0x00     | DISABLED
+ *	@param v_channel_u_8 : The value of accel anymotion axis selection
+ *           v_channel_u_8                        | value
+ *     --------------------------                | ----------
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_X_AXIS  |   0
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS  |   1
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS  |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_any_motion_no_motion_axis_enable(
+u_8 v_channel_u_8, u_8 *v_data_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel anymotion enable is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			switch (v_channel_u_8) {
+			case BNO055_ACCEL_ANY_MOTION_NO_MOTION_X_AXIS:
+				/* Read the value of accel anymotion x enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_X_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				*v_data_u_8 =
+				BNO055_GET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_ANY_MOTION_X_AXIS);
+				break;
+			case BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS:
+				/* Read the value of accel anymotion y enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_Y_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				*v_data_u_8 =
+				BNO055_GET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_ANY_MOTION_Y_AXIS);
+				break;
+			case BNO055_ACCEL_ANY_MOTION_NO_MOTION_Z_AXIS:
+				/* Read the value of accel anymotion z enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_Z_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				*v_data_u_8 =
+				BNO055_GET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_ANY_MOTION_Z_AXIS);
+				break;
+			default:
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				break;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel anymotion enable
+ *	from page one register from 0x12 bit 2 to 4
+ *
+ *	@param v_data_u_8 : The value of accel anymotion enable
+ *	   v_data_u_8 | result
+ *  ------------ | -------------
+ *      0x01     | ENABLED
+ *      0x00     | DISABLED
+ *	@param v_channel_u_8 : The value of accel anymotion axis selection
+ *           v_channel_u_8                        | value
+ *     --------------------------                | ----------
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_X_AXIS  |   0
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS  |   1
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS  |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_any_motion_no_motion_axis_enable(
+u_8 v_channel_u_8, u_8 v_data_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				switch (v_channel_u_8) {
+				case BNO055_ACCEL_ANY_MOTION_NO_MOTION_X_AXIS:
+				/* Write the value of
+				accel anymotion x enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_X_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_ACCEL_ANY_MOTION_X_AXIS,
+					v_data_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_ANY_MOTION_X_AXIS__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+				break;
+				case BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS:
+				/* Write the value of
+				accel anymotion y enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_Y_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_ACCEL_ANY_MOTION_Y_AXIS,
+					v_data_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_ANY_MOTION_Y_AXIS__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+				break;
+				case BNO055_ACCEL_ANY_MOTION_NO_MOTION_Z_AXIS:
+				/* Write the value of
+				accel anymotion z enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_ANY_MOTION_Z_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_ACCEL_ANY_MOTION_Z_AXIS,
+					v_data_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_ANY_MOTION_Z_AXIS__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+				break;
+				default:
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				break;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel highg enable
+ *	from page one register from 0x12 bit 5 to 7
+ *
+ *	@param v_data_u_8 : The value of accel highg enable
+ *      v_data_u_8| result
+ *  ------------ | -------------
+ *      0x01     | ENABLED
+ *      0x00     | DISABLED
+ *	@param v_channel_u_8 : The value of accel highg axis selection
+ *               v_channel_u_8     | value
+ *     -------------------------- | ----------
+ *     BNO055_ACCEL_HIGH_G_X_AXIS |   0
+ *     BNO055_ACCEL_HIGH_G_Y_AXIS |   1
+ *     BNO055_ACCEL_HIGH_G_Z_AXIS |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_high_g_axis_enable(
+u_8 v_channel_u_8, u_8 *v_data_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel highg enable is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			switch (v_channel_u_8) {
+			case BNO055_ACCEL_HIGH_G_X_AXIS:
+				/* Read the value of accel x highg enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_HIGH_G_X_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				*v_data_u_8 =
+				BNO055_GET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_HIGH_G_X_AXIS);
+				break;
+			case BNO055_ACCEL_HIGH_G_Y_AXIS:
+				/* Read the value of accel y highg enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_HIGH_G_Y_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				*v_data_u_8 =
+				BNO055_GET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_HIGH_G_Y_AXIS);
+				break;
+			case BNO055_ACCEL_HIGH_G_Z_AXIS:
+				/* Read the value of accel z highg enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_HIGH_G_Z_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				*v_data_u_8 =
+				BNO055_GET_BITSLICE(v_data_u_8r,
+				BNO055_ACCEL_HIGH_G_Z_AXIS);
+				break;
+			default:
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				break;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel highg enable
+ *	from page one register from 0x12 bit 5 to 7
+ *
+ *	@param v_data_u_8 : The value of accel highg enable
+ *      v_data_u_8| result
+ *  ------------ | -------------
+ *      0x01     | ENABLED
+ *      0x00     | DISABLED
+ *	@param v_channel_u_8 : The value of accel highg axis selection
+ *               v_channel_u_8     | value
+ *     -------------------------- | ----------
+ *     BNO055_ACCEL_HIGH_G_X_AXIS |   0
+ *     BNO055_ACCEL_HIGH_G_Y_AXIS |   1
+ *     BNO055_ACCEL_HIGH_G_Z_AXIS |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_high_g_axis_enable(
+u_8 v_channel_u_8, u_8 v_data_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				switch (v_channel_u_8) {
+				case BNO055_ACCEL_HIGH_G_X_AXIS:
+				/* Write the value of
+				accel x highg enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_HIGH_G_X_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_ACCEL_HIGH_G_X_AXIS, v_data_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_HIGH_G_X_AXIS__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+				break;
+				case BNO055_ACCEL_HIGH_G_Y_AXIS:
+				/* Write the value of
+				accel y highg enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_HIGH_G_Y_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_ACCEL_HIGH_G_Y_AXIS,
+					v_data_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_HIGH_G_Y_AXIS__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+				break;
+				case BNO055_ACCEL_HIGH_G_Z_AXIS:
+				/* Write the value of
+				accel z highg enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_HIGH_G_Z_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_ACCEL_HIGH_G_Z_AXIS, v_data_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_HIGH_G_Z_AXIS__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+				break;
+				default:
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				break;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel highg duration
+ *	from page one register from 0x13 bit 0 to 7
+ *
+ *	@param v_accel_high_g_durn_u_8 : The value of accel highg duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note The high-g interrupt trigger delay according
+ *	to [highg duration  + 1] * 2 ms
+ *
+ *	in a range from 2 ms to 512 ms
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_high_g_durn(
+u_8 *v_accel_high_g_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X) {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel highg duration is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel highg duration*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_HIGH_G_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_high_g_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_HIGH_G_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel highg duration
+ *	from page one register from 0x13 bit 0 to 7
+ *
+ *	@param v_accel_high_g_durn_u_8 : The value of accel highg duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note The high-g interrupt trigger delay according
+ *	to [highg duration  + 1] * 2 ms
+ *
+ *	in a range from 2 ms to 512 ms
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_high_g_durn(
+u_8 v_accel_high_g_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X) {
+	return E_NULL_PTR;
+} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write page as one */
+				v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+				if (v_pg_stat_s_8 == SUCCESS) {
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_HIGH_G_DURN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						/* Write the value of
+						accel highg duration*/
+						v_data_u_8r =
+						BNO055_SET_BITSLICE(v_data_u_8r,
+						BNO055_ACCEL_HIGH_G_DURN,
+						v_accel_high_g_durn_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_HIGH_G_DURN__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = ERROR;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode of
+		previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel highg threshold
+ *	from page one register from 0x14 bit 0 to 7
+ *
+ *	@param v_accel_high_g_thres_u_8 : The value of accel highg threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel highg interrupt threshold dependent
+ *	for accel g range
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    7.81mg     |   1LSB
+ *     4g        |    15.63mg    |   1LSB
+ *     8g        |    31.25mg    |   1LSB
+ *     16g       |    62.5mg     |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_high_g_thres(
+u_8 *v_accel_high_g_thres_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, highg threshold is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of highg threshold */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_HIGH_G_THRES__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_high_g_thres_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_HIGH_G_THRES);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel highg threshold
+ *	from page one register from 0x14 bit 0 to 7
+ *
+ *	@param v_accel_high_g_thres_u_8 : The value of accel highg threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel highg interrupt threshold dependent
+ *	for accel g range
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    7.81mg     |   1LSB
+ *     4g        |    15.63mg    |   1LSB
+ *     8g        |    31.25mg    |   1LSB
+ *     16g       |    62.5mg     |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_high_g_thres(
+u_8 v_accel_high_g_thres_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+	} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write page as one */
+				v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+				if (v_pg_stat_s_8 == SUCCESS) {
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_HIGH_G_THRES__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						/* Write the value of
+						accel highg threshold */
+						v_data_u_8r =
+						BNO055_SET_BITSLICE(v_data_u_8r,
+						BNO055_ACCEL_HIGH_G_THRES,
+						v_accel_high_g_thres_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_ACCEL_HIGH_G_THRES__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = ERROR;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode of
+		previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read the accel slownomotion threshold
+ *	from page one register from 0x15 bit 0 to 7
+ *
+ *	@param v_accel_slow_no_motion_thres_u_8 :
+ *	The value of accel slownomotion threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel slow no motion interrupt threshold dependent
+ *	for accel g range
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    3.19mg     |   1LSB
+ *     4g        |    7.81mg     |   1LSB
+ *     8g        |    15.63mg    |   1LSB
+ *     16g       |    31.25mg    |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_slow_no_motion_thres(
+u_8 *v_accel_slow_no_motion_thres_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel slownomotion threshold is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of slownomotion threshold */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_SLOW_NO_MOTION_THRES__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_slow_no_motion_thres_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_SLOW_NO_MOTION_THRES);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the accel slownomotion threshold
+ *	from page one register from 0x15 bit 0 to 7
+ *
+ *	@param v_accel_slow_no_motion_thres_u_8 :
+ *	The value of accel slownomotion threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel slow no motion interrupt threshold dependent
+ *	for accel g range
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    3.19mg     |   1LSB
+ *     4g        |    7.81mg     |   1LSB
+ *     8g        |    15.63mg    |   1LSB
+ *     16g       |    31.25mg    |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_slow_no_motion_thres(
+u_8 v_accel_slow_no_motion_thres_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value of
+				slownomotion threshold */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_SLOW_NO_MOTION_THRES__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_ACCEL_SLOW_NO_MOTION_THRES,
+					v_accel_slow_no_motion_thres_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_SLOW_NO_MOTION_THRES__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read accel slownomotion enable
+ *	from page one register from 0x16 bit 0
+ *
+ *	@param v_accel_slow_no_motion_en_u_8 : The value of accel slownomotion enable
+ *	  v_accel_slow_no_motion_en_u_8   | result
+ *     ------------------------      | --------
+ *              0x01                 | Slow motion
+ *              0x00                 | No motion
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_slow_no_motion_enable(
+u_8 *v_accel_slow_no_motion_en_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel slownomotion enable is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of accel slownomotion enable */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_SLOW_NO_MOTION_ENABLE__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_slow_no_motion_en_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_SLOW_NO_MOTION_ENABLE);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write accel slownomotion enable
+ *	from page one register from 0x16 bit 0
+ *
+ *	@param v_accel_slow_no_motion_en_u_8 : The value of accel slownomotion enable
+ *	  v_accel_slow_no_motion_en_u_8   | result
+ *     ------------------------      | --------
+ *              0x01                 | Slow motion
+ *              0x00                 | No motion
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_slow_no_motion_enable(
+u_8 v_accel_slow_no_motion_en_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_SLOW_NO_MOTION_ENABLE__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					/* Read the value of
+					accel slownomotion enable */
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_ACCEL_SLOW_NO_MOTION_ENABLE,
+					v_accel_slow_no_motion_en_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_SLOW_NO_MOTION_ENABLE__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read accel slownomotion duration
+ *	from page one register from 0x16 bit 1 to 6
+ *
+ *	@param v_accel_slow_no_motion_durn_u_8 :
+ *	The value of accel slownomotion duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_slow_no_motion_durn(
+u_8 *v_accel_slow_no_motion_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, accel slownomotion duration is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/*read value of accel slownomotion duration*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_ACCEL_SLOW_NO_MOTION_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_accel_slow_no_motion_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_ACCEL_SLOW_NO_MOTION_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write accel slownomotion duration
+ *	from page one register from 0x16 bit 1 to 6
+ *
+ *	@param v_accel_slow_no_motion_durn_u_8 :
+ *	The value of accel slownomotion duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_slow_no_motion_durn(
+u_8 v_accel_slow_no_motion_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_ACCEL_SLOW_NO_MOTION_DURN__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					/*Write the value of accel
+					slownomotion duration*/
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_ACCEL_SLOW_NO_MOTION_DURN,
+					v_accel_slow_no_motion_durn_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_ACCEL_SLOW_NO_MOTION_DURN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro anymotion enable
+ *	from page one register from 0x17 bit 0 to 2
+ *
+ *	@param v_data_u_8 : The value of gyro anymotion enable
+ *      v_data_u_8     | result
+ *  ----------------- |-------------
+ *      0x01          | ENABLED
+ *      0x00          | DISABLED
+ *	@param v_channel_u_8 : The value of gyro anymotion axis selection
+ *               v_channel_u_8         | value
+ *     ---------------------------    | ----------
+ *     BNO055_GYRO_ANY_MOTIONX_AXIS   |   0
+ *     BNO055_GYRO_ANY_MOTIONY_AXIS   |   1
+ *     BNO055_GYRO_ANY_MOTIONZ_AXIS   |   2
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_axis_enable(
+u_8 v_channel_u_8, u_8 *v_data_u_8)
+{
+/* Variable used to return value of
+communication routine*/
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+	} else {
+	/*condition check for page, gyro anymotion axis is
+	available in the page one*/
+	if (p_bno055->page_id != PAGE_ONE)
+		/* Write page as one */
+		v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+	if ((v_stat_s_8 == SUCCESS) ||
+	(p_bno055->page_id == PAGE_ONE)) {
+		switch (v_channel_u_8) {
+		case BNO055_GYRO_ANY_MOTION_X_AXIS:
+			/* Read the gyro anymotion x enable*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_ANY_MOTION_X_AXIS__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_data_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_ANY_MOTION_X_AXIS);
+			break;
+		case BNO055_GYRO_ANY_MOTION_Y_AXIS:
+			/* Read the gyro anymotion y enable*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_ANY_MOTION_Y_AXIS__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_data_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_ANY_MOTION_Y_AXIS);
+			break;
+		case BNO055_GYRO_ANY_MOTION_Z_AXIS:
+			/* Read the gyro anymotion z enable*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_ANY_MOTION_Z_AXIS__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_data_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_ANY_MOTION_Z_AXIS);
+			break;
+		default:
+			com_rslt = E_BNO055_OUT_OF_RANGE;
+			break;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro anymotion enable
+ *	from page one register from 0x17 bit 0 to 2
+ *
+ *	@param v_data_u_8 : The value of gyro anymotion enable
+ *      v_data_u_8     | result
+ *  ----------------- |-------------
+ *      0x01          | ENABLED
+ *      0x00          | DISABLED
+ *	@param v_channel_u_8 : The value of gyro anymotion axis selection
+ *               v_channel_u_8         | value
+ *     ---------------------------    | ----------
+ *     BNO055_GYRO_ANY_MOTIONX_AXIS   |   0
+ *     BNO055_GYRO_ANY_MOTIONY_AXIS   |   1
+ *     BNO055_GYRO_ANY_MOTIONZ_AXIS   |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_axis_enable(
+u_8 v_channel_u_8, u_8  v_data_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+	if (v_stat_s_8 == SUCCESS) {
+		/* Write page as one */
+		v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if (v_pg_stat_s_8 == SUCCESS) {
+			switch (v_channel_u_8) {
+			case BNO055_GYRO_ANY_MOTION_X_AXIS:
+				/* Write the gyro
+				anymotion x enable*/
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_ANY_MOTION_X_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r = BNO055_SET_BITSLICE
+				(v_data_u_8r,
+				BNO055_GYRO_ANY_MOTION_X_AXIS,
+				v_data_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_ANY_MOTION_X_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+			break;
+			case BNO055_GYRO_ANY_MOTION_Y_AXIS:
+				/* Write the gyro
+				anymotion y enable*/
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_ANY_MOTION_Y_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r = BNO055_SET_BITSLICE
+				(v_data_u_8r,
+				BNO055_GYRO_ANY_MOTION_Y_AXIS, v_data_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_ANY_MOTION_Y_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+			break;
+			case BNO055_GYRO_ANY_MOTION_Z_AXIS:
+				/* Write the gyro
+				anymotion z enable*/
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_ANY_MOTION_Z_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			if (com_rslt == SUCCESS) {
+				v_data_u_8r = BNO055_SET_BITSLICE
+				(v_data_u_8r,
+				BNO055_GYRO_ANY_MOTION_Z_AXIS,
+				v_data_u_8);
+				com_rslt +=
+				p_bno055->BNO055_BUS_WRITE_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_ANY_MOTION_Z_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+			}
+			break;
+			default:
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				break;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+} else {
+com_rslt = ERROR;
+}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read the gyro highrate enable
+ *	from page one register from 0x17 bit 3 to 5
+ *
+ *	@param v_data_u_8 : The value of gyro highrate enable
+ *      v_data_u_8     | result
+ *  ----------------  |-------------
+ *      0x01          | ENABLED
+ *      0x00          | DISABLED
+ *	@param v_channel_u_8 : The value of gyro highrate axis selection
+ *               v_channel_u_8         | value
+ *     ------------------------       | ----------
+ *     BNO055_GYRO_HIGHRATE_X_AXIS    |   0
+ *     BNO055_GYRO_HIGHRATE_Y_AXIS    |   1
+ *     BNO055_GYRO_HIGHRATE_Z_AXIS    |   2
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_axis_enable(
+u_8 v_channel_u_8, u_8 *v_data_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate enable is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			switch (v_channel_u_8) {
+			case BNO055_GYRO_HIGHRATE_X_AXIS:
+				/* Read the gyro highrate x enable */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_X_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				*v_data_u_8 =
+				BNO055_GET_BITSLICE(v_data_u_8r,
+				BNO055_GYRO_HIGHRATE_X_AXIS);
+				break;
+			case BNO055_GYRO_HIGHRATE_Y_AXIS:
+				/* Read the gyro highrate y enable */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Y_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				*v_data_u_8 =
+				BNO055_GET_BITSLICE(v_data_u_8r,
+				BNO055_GYRO_HIGHRATE_Y_AXIS);
+				break;
+			case BNO055_GYRO_HIGHRATE_Z_AXIS:
+				/* Read the gyro highrate z enable */
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Z_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				*v_data_u_8 =
+				BNO055_GET_BITSLICE(v_data_u_8r,
+				BNO055_GYRO_HIGHRATE_Z_AXIS);
+				break;
+			default:
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				break;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write the gyro highrate enable
+ *	from page one register from 0x17 bit 3 to 5
+ *
+ *	@param v_data_u_8 : The value of gyro highrate enable
+ *      v_data_u_8     | result
+ *  ----------------  |-------------
+ *      0x01          | ENABLED
+ *      0x00          | DISABLED
+ *	@param v_channel_u_8 : The value of gyro highrate axis selection
+ *               v_channel_u_8         | value
+ *     ------------------------       | ----------
+ *     BNO055_GYRO_HIGHRATE_X_AXIS    |   0
+ *     BNO055_GYRO_HIGHRATE_Y_AXIS    |   1
+ *     BNO055_GYRO_HIGHRATE_Z_AXIS    |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_axis_enable(
+u_8 v_channel_u_8, u_8 v_data_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				switch (v_channel_u_8) {
+				case BNO055_GYRO_HIGHRATE_X_AXIS:
+				/* Write the value of
+				gyro highrate x enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_X_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_X_AXIS, v_data_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_X_AXIS__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+				break;
+				case BNO055_GYRO_HIGHRATE_Y_AXIS:
+				/* Write the value of
+				gyro highrate y enable*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Y_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(
+					v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_Y_AXIS, v_data_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_Y_AXIS__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+				break;
+				case BNO055_GYRO_HIGHRATE_Z_AXIS:
+				/* Write the value of
+				gyro highrate z enable*/
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Z_AXIS__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r = BNO055_SET_BITSLICE
+					(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_Z_AXIS, v_data_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_Z_AXIS__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+				break;
+				default:
+				com_rslt = E_BNO055_OUT_OF_RANGE;
+				break;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro anymotion filter
+ *	from page one register from 0x17 bit 6
+ *
+ *	@param v_gyro_any_motion_filter_u_8 : The value of gyro anymotion filter
+ *   v_gyro_any_motion_filter_u_8  | result
+ *  ---------------------------   |------------
+ *      0x00                      | FILTERED
+ *      0x01                      | UNFILTERED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_filter(
+u_8 *v_gyro_any_motion_filter_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro anymotion filter is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro anymotion filter*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_ANY_MOTION_FILTER__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_any_motion_filter_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_ANY_MOTION_FILTER);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro anymotion filter
+ *	from page one register from 0x17 bit 6
+ *
+ *	@param v_gyro_any_motion_filter_u_8 : The value of gyro anymotion filter
+ *   v_gyro_any_motion_filter_u_8  | result
+ *  ---------------------------   |------------
+ *      0x00                      | FILTERED
+ *      0x01                      | UNFILTERED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_filter(
+u_8 v_gyro_any_motion_filter_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value of
+				gyro anymotion filter*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_ANY_MOTION_FILTER__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_ANY_MOTION_FILTER,
+					v_gyro_any_motion_filter_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_ANY_MOTION_FILTER__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate filter
+ *	from page one register from 0x17 bit 7
+ *
+ *	@param v_gyro_highrate_filter_u_8 : The value of gyro highrate filter
+ *   v_gyro_highrate_filter_u_8  | result
+ *  --------------------------- |------------
+ *         0x00                 | FILTERED
+ *         0x01                 | UNFILTERED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_filter(
+u_8 *v_gyro_highrate_filter_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate filter is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate filter */
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_FILTER__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_filter_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_FILTER);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate filter
+ *	from page one register from 0x17 bit 7
+ *
+ *	@param v_gyro_highrate_filter_u_8 : The value of gyro highrate filter
+ *   v_gyro_highrate_filter_u_8  | result
+ *  --------------------------- |------------
+ *         0x00                 | FILTERED
+ *         0x01                 | UNFILTERED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_filter(
+u_8 v_gyro_highrate_filter_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value of
+				gyro highrate filter*/
+				com_rslt =
+				p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_FILTER__REG,
+				&v_data_u_8r,
+				BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_FILTER,
+					v_gyro_highrate_filter_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_FILTER__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate x threshold
+ *	from page one register from 0x18 bit 0 to 4
+ *
+ *	@param v_gyro_highrate_x_thres_u_8 : The value of gyro x highrate threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_x_thres(
+u_8 *v_gyro_highrate_x_thres_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate x threshold is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate threshold*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_X_THRES__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_x_thres_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_X_THRES);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate x threshold
+ *	from page one register from 0x18 bit 0 to 4
+ *
+ *	@param v_gyro_highrate_x_thres_u_8 : The value of gyro x highrate threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_x_thres(
+u_8 v_gyro_highrate_x_thres_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value of
+				gyro highrate x threshold*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_X_THRES__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_X_THRES,
+					v_gyro_highrate_x_thres_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_X_THRES__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate x hysteresis
+ *	from page one register from 0x18 bit 5 to 6
+ *
+ *	@param v_gyro_highrate_x_hyst_u_8 : The value of gyro highrate x hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_x_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_x_hyst(
+u_8 *v_gyro_highrate_x_hyst_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page,gyro highrate x hysteresis is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate x hysteresis*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_X_HYST__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_x_hyst_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_X_HYST);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate x hysteresis
+ *	from page one register from 0x18 bit 5 to 6
+ *
+ *	@param v_gyro_highrate_x_hyst_u_8 : The value of gyro highrate x hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_x_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_x_hyst(
+u_8 v_gyro_highrate_x_hyst_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/*Write the value of
+				gyro highrate x hysteresis*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_X_HYST__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_X_HYST,
+					v_gyro_highrate_x_hyst_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_X_HYST__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate x duration
+ *	from page one register from 0x19 bit 0 to 7
+ *
+ *	@param v_gyro_highrate_x_durn_u_8 : The value of gyro highrate x duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_x_durn_u_8)*2.5ms
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_x_durn(
+u_8 *v_gyro_highrate_x_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate x duration is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate x duration*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_X_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_x_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_X_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate x duration
+ *	from page one register from 0x19 bit 0 to 7
+ *
+ *	@param v_gyro_highrate_x_durn_u_8 : The value of gyro highrate x duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_x_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_x_durn(
+u_8 v_gyro_highrate_x_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+	} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value
+				of gyro highrate x duration*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_X_DURN__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_X_DURN,
+					v_gyro_highrate_x_durn_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_X_DURN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode of
+		previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate y threshold
+ *	from page one register from 0x1A bit 0 to 4
+ *
+ *	@param v_gyro_highrate_y_thres_u_8 : The value of gyro highrate y threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_y_thres(
+u_8 *v_gyro_highrate_y_thres_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate y threshold is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate y threshold*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_Y_THRES__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_y_thres_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_Y_THRES);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate y threshold
+ *	from page one register from 0x1A bit 0 to 4
+ *
+ *	@param v_gyro_highrate_y_thres_u_8 : The value of gyro highrate y threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_y_thres(
+u_8 v_gyro_highrate_y_thres_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value
+				of gyro highrate y threshold*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Y_THRES__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_Y_THRES,
+					v_gyro_highrate_y_thres_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_Y_THRES__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate y hysteresis
+ *	from page one register from 0x1A bit 5 to 6
+ *
+ *	@param v_gyro_highrate_y_hyst_u_8 : The value of gyro highrate y hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_y_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_y_hyst(
+u_8 *v_gyro_highrate_y_hyst_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate y hysteresis is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate y hysteresis*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_Y_HYST__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_y_hyst_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_Y_HYST);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate y hysteresis
+ *	from page one register from 0x1A bit 5 to 6
+ *
+ *	@param v_gyro_highrate_y_hyst_u_8 : The value of gyro highrate y hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_y_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_y_hyst(
+u_8 v_gyro_highrate_y_hyst_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value of
+				gyro highrate y hysteresis*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Y_HYST__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_Y_HYST,
+					v_gyro_highrate_y_hyst_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_Y_HYST__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate y duration
+ *	from page one register from 0x1B bit 0 to 7
+ *
+ *	@param v_gyro_highrate_y_durn_u_8 : The value of gyro highrate y duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_y_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_y_durn(
+u_8 *v_gyro_highrate_y_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate y duration is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate y duration*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_Y_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_y_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_Y_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate y duration
+ *	from page one register from 0x1B bit 0 to 7
+ *
+ *	@param v_gyro_highrate_y_durn_u_8 : The value of gyro highrate y duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_y_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_y_durn(
+u_8 v_gyro_highrate_y_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+	} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value
+				of gyro highrate y duration*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Y_DURN__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_Y_DURN,
+					v_gyro_highrate_y_durn_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_Y_DURN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode of
+		previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate z threshold
+ *	from page one register from 0x1C bit 0 to 4
+ *
+ *	@param v_gyro_highrate_z_thres_u_8 : The value of gyro highrate z threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_z_thres(
+u_8 *v_gyro_highrate_z_thres_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate z threshold is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate z threshold*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_Z_THRES__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_z_thres_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_Z_THRES);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate z threshold
+ *	from page one register from 0x1C bit 0 to 4
+ *
+ *	@param v_gyro_highrate_z_thres_u_8 : The value of gyro highrate z threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_z_thres(
+u_8 v_gyro_highrate_z_thres_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value
+				of gyro highrate z threshold*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Z_THRES__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_Z_THRES,
+					v_gyro_highrate_z_thres_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_Z_THRES__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate z hysteresis
+ *	from page one register from 0x1C bit 5 to 6
+ *
+ *	@param v_gyro_highrate_z_hyst_u_8 : The value of gyro highrate z hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_z_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	 hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_z_hyst(
+u_8 *v_gyro_highrate_z_hyst_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate z hysteresis is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate z hysteresis*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_Z_HYST__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_z_hyst_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_Z_HYST);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate z hysteresis
+ *	from page one register from 0x1C bit 5 to 6
+ *
+ *	@param v_gyro_highrate_z_hyst_u_8 : The value of gyro highrate z hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_z_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	 hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_z_hyst(
+u_8 v_gyro_highrate_z_hyst_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value
+				of gyro highrate z hysteresis*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Z_HYST__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_Z_HYST,
+					v_gyro_highrate_z_hyst_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_Z_HYST__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro highrate z duration
+ *	from page one register from 0x1D bit 0 to 7
+ *
+ *	@param v_gyro_highrate_z_durn_u_8 : The value of gyro highrate z duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_z_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_z_durn(
+u_8 *v_gyro_highrate_z_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro highrate z duration is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro highrate z duration*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_HIGHRATE_Z_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_highrate_z_durn_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_HIGHRATE_Z_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro highrate z duration
+ *	from page one register from 0x1D bit 0 to 7
+ *
+ *	@param v_gyro_highrate_z_durn_u_8 : The value of gyro highrate z duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_z_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_z_durn(
+u_8 v_gyro_highrate_z_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value of
+				gyro highrate z duration*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_HIGHRATE_Z_DURN__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_HIGHRATE_Z_DURN,
+					v_gyro_highrate_z_durn_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_HIGHRATE_Z_DURN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode of
+		previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro anymotion threshold
+ *	from page one register from 0x1E bit 0 to 6
+ *
+ *	@param v_gyro_any_motion_thres_u_8 : The value of gyro anymotion threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro anymotion interrupt threshold dependent
+ *	on the selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold	  |	   LSB
+ * -----------------  | ------------- | ---------
+ *     2000           |    1dps       |   1LSB
+ *     1000           |    0.5dps     |   1LSB
+ *     500            |    0.25dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_thres(
+u_8 *v_gyro_any_motion_thres_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page,gyro anymotion threshold is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro anymotion threshold*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_ANY_MOTION_THRES__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_any_motion_thres_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_ANY_MOTION_THRES);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro anymotion threshold
+ *	from page one register from 0x1E bit 0 to 6
+ *
+ *	@param v_gyro_any_motion_thres_u_8 : The value of gyro anymotion threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro anymotion interrupt threshold dependent
+ *	on the selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold	  |	   LSB
+ * -----------------  | ------------- | ---------
+ *     2000           |    1dps       |   1LSB
+ *     1000           |    0.5dps     |   1LSB
+ *     500            |    0.25dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_thres(
+u_8 v_gyro_any_motion_thres_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+s_8 v_pg_stat_s_8 = ERROR;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value
+				of gyro anymotion threshold*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_ANY_MOTION_THRES__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_ANY_MOTION_THRES,
+					v_gyro_any_motion_thres_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_ANY_MOTION_THRES__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+}
+if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+	/* set the operation mode of
+	previous operation mode*/
+	com_rslt += bno055_set_operation_mode
+	(v_prev_opmode_u_8);
+return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro anymotion slope samples
+ *	from page one register from 0x1F bit 0 to 1
+ *
+ *	@param v_gyro_any_motion_slope_samples_u_8 :
+ *	The value of gyro anymotion slope samples
+ *  v_gyro_any_motion_slope_samples_u_8   |   result
+ *  ----------------------------------   | -----------
+ *            0                          |    8 samples
+ *            1                          |    16 samples
+ *            2                          |    32 samples
+ *            3                          |    64 samples
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_slope_samples(
+u_8 *v_gyro_any_motion_slope_samples_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro anymotion slope samples is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/*Read the value of gyro anymotion slope samples*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_SLOPE_SAMPLES__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_any_motion_slope_samples_u_8 =
+			BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_SLOPE_SAMPLES);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro anymotion slope samples
+ *	from page one register from 0x1F bit 0 to 1
+ *
+ *	@param v_gyro_any_motion_slope_samples_u_8 :
+ *	The value of gyro anymotion slope samples
+ *  v_gyro_any_motion_slope_samples_u_8   |   result
+ *  ----------------------------------   | -----------
+ *            0                          |    8 samples
+ *            1                          |    16 samples
+ *            2                          |    32 samples
+ *            3                          |    64 samples
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_slope_samples(
+u_8 v_gyro_any_motion_slope_samples_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+} else {
+/* The write operation effective only if the operation
+mode is in config mode, this part of code is checking the
+current operation mode and set the config mode */
+v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+if (v_stat_s_8 == SUCCESS) {
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		v_stat_s_8 += bno055_set_operation_mode
+		(OPERATION_MODE_CONFIG);
+		if (v_stat_s_8 == SUCCESS) {
+			/* Write page as one */
+			v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+			if (v_pg_stat_s_8 == SUCCESS) {
+				/* Write the value of
+				gyro anymotion slope samples*/
+				com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+				(p_bno055->dev_addr,
+				BNO055_GYRO_SLOPE_SAMPLES__REG,
+				&v_data_u_8r, BNO055_ONE_U8X);
+				if (com_rslt == SUCCESS) {
+					v_data_u_8r =
+					BNO055_SET_BITSLICE(v_data_u_8r,
+					BNO055_GYRO_SLOPE_SAMPLES,
+					v_gyro_any_motion_slope_samples_u_8);
+					com_rslt +=
+					p_bno055->BNO055_BUS_WRITE_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_SLOPE_SAMPLES__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	} else {
+	com_rslt = ERROR;
+	}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode of
+		previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to read gyro anymotion awake duration
+ *	from page one register from 0x1F bit 2 to 3
+ *
+ *	@param v_gyro_awake_durn_u_8 : The value of gyro anymotion awake duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_awake_durn(
+u_8 *v_gyro_awake_durn_u_8)
+{
+	/* Variable used to return value of
+	communication routine*/
+	BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+	u_8 v_data_u_8r = BNO055_ZERO_U8X;
+	s_8 v_stat_s_8 = ERROR;
+	/* Check the struct p_bno055 is empty */
+	if (p_bno055 == BNO055_ZERO_U8X)  {
+		return E_NULL_PTR;
+		} else {
+		/*condition check for page, gyro anymotion awake duration is
+		available in the page one*/
+		if (p_bno055->page_id != PAGE_ONE)
+			/* Write page as one */
+			v_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+		if ((v_stat_s_8 == SUCCESS) ||
+		(p_bno055->page_id == PAGE_ONE)) {
+			/* Read the value of gyro anymotion awake duration*/
+			com_rslt = p_bno055->BNO055_BUS_READ_FUNC
+			(p_bno055->dev_addr,
+			BNO055_GYRO_AWAKE_DURN__REG,
+			&v_data_u_8r, BNO055_ONE_U8X);
+			*v_gyro_awake_durn_u_8 = BNO055_GET_BITSLICE(v_data_u_8r,
+			BNO055_GYRO_AWAKE_DURN);
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	return com_rslt;
+}
+/*!
+ *	@brief This API used to write gyro anymotion awake duration
+ *	from page one register from 0x1F bit 2 to 3
+ *
+ *	@param v_gyro_awake_durn_u_8 : The value of gyro anymotion awake duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_awake_durn(
+u_8 v_gyro_awake_durn_u_8)
+{
+BNO055_RETURN_FUNCTION_TYPE com_rslt = ERROR;
+u_8 v_data_u_8r = BNO055_ZERO_U8X;
+s_8 v_stat_s_8 = ERROR;
+s_8 v_pg_stat_s_8 = ERROR;
+u_8 v_prev_opmode_u_8 = OPERATION_MODE_CONFIG;
+/* Check the struct p_bno055 is empty */
+if (p_bno055 == BNO055_ZERO_U8X)  {
+	return E_NULL_PTR;
+	} else {
+	/* The write operation effective only if the operation
+	mode is in config mode, this part of code is checking the
+	current operation mode and set the config mode */
+	v_stat_s_8 = bno055_get_operation_mode(&v_prev_opmode_u_8);
+	if (v_stat_s_8 == SUCCESS) {
+		if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+			v_stat_s_8 += bno055_set_operation_mode
+			(OPERATION_MODE_CONFIG);
+			if (v_stat_s_8 == SUCCESS) {
+				/* Write page as one */
+				v_pg_stat_s_8 = bno055_write_page_id(PAGE_ONE);
+				if (v_pg_stat_s_8 == SUCCESS) {
+					/* Write the value of gyro
+					anymotion awake duration*/
+					com_rslt =
+					p_bno055->BNO055_BUS_READ_FUNC
+					(p_bno055->dev_addr,
+					BNO055_GYRO_AWAKE_DURN__REG,
+					&v_data_u_8r, BNO055_ONE_U8X);
+					if (com_rslt == SUCCESS) {
+						v_data_u_8r =
+						BNO055_SET_BITSLICE(v_data_u_8r,
+						BNO055_GYRO_AWAKE_DURN,
+						v_gyro_awake_durn_u_8);
+						com_rslt +=
+						p_bno055->BNO055_BUS_WRITE_FUNC
+						(p_bno055->dev_addr,
+						BNO055_GYRO_AWAKE_DURN__REG,
+						&v_data_u_8r, BNO055_ONE_U8X);
+					}
+				} else {
+				com_rslt = ERROR;
+				}
+			} else {
+			com_rslt = ERROR;
+			}
+		} else {
+		com_rslt = ERROR;
+		}
+	}
+	if (v_prev_opmode_u_8 != OPERATION_MODE_CONFIG)
+		/* set the operation mode
+		of previous operation mode*/
+		com_rslt += bno055_set_operation_mode
+		(v_prev_opmode_u_8);
+	return com_rslt;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/utility/BNO055.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/utility/BNO055.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NAxesMotion/utility/BNO055.h	(revision 136)
@@ -0,0 +1,7944 @@
+/** \mainpage
+*
+****************************************************************************
+* Copyright (C) 2013 - 2014 Bosch Sensortec GmbH
+*
+* File : bno055.h
+*
+* Date : 2014/12/12
+*
+* Revision : 2.0.2 $
+*
+* Usage: Sensor Driver file for BNO055 sensor
+*
+* **************************************************************************
+*
+* Added Arduino M0/M0 Pro support
+*
+* Date: 07/27/2015
+*
+* Modified by: Arduino.org development Team.
+*
+****************************************************************************
+*
+* \section License
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+*   Redistributions of source code must retain the above copyright
+*   notice, this list of conditions and the following disclaimer.
+*
+*   Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+*
+*   Neither the name of the copyright holder nor the names of the
+*   contributors may be used to endorse or promote products derived from
+*   this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER
+* OR CONTRIBUTORS BE LIABLE FOR ANY
+* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+* OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT NOT LIMITED TO,
+* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+*
+* The information provided is believed to be accurate and reliable.
+* The copyright holder assumes no responsibility
+* for the consequences of use
+* of such information nor for any infringement of patents or
+* other rights of third parties which may result from its use.
+* No license is granted by implication or otherwise under any patent or
+* patent rights of the copyright holder.
+**************************************************************************/
+/*! \file bno055.h
+    \brief BNO055 Sensor Driver Support Header File */
+
+#ifndef __BNO055_H__
+#define __BNO055_H__
+/****************************************************************/
+/**\name	DATA TYPES INCLUDES		*/
+/************************************************************/
+/*!
+* @brief The following definition uses for define the data types
+*
+* @note While porting the API please consider the following
+* @note Please check the version of C standard
+* @note Are you using Linux platform
+*/
+
+/*!
+* @brief For the Linux platform support
+* Please use the types.h for your data types definitions
+*/
+#ifdef	__KERNEL__
+
+#include <linux/types.h>
+/* singed integer type*/
+typedef	int8_t s_8;/**< used for signed 8bit */
+typedef	int16_t s_16;/**< used for signed 16bit */
+typedef	int32_t s_32;/**< used for signed 32bit */
+typedef	int64_t s_64;/**< used for signed 64bit */
+
+typedef	u_int8_t u_8;/**< used for unsigned 8bit */
+typedef	u_int16_t u_16;/**< used for unsigned 16bit */
+typedef	u_int32_t u_32;/**< used for unsigned 32bit */
+typedef	u_int64_t u_64;/**< used for unsigned 64bit */
+
+
+
+#else /* ! __KERNEL__ */
+/**********************************************************
+* These definition uses for define the C
+* standard version data types
+***********************************************************/
+# if !defined(__STDC_VERSION__)
+
+/************************************************
+ * compiler is C11 C standard
+************************************************/
+#if (__STDC_VERSION__ == 201112L)
+
+/************************************************/
+#include <stdint.h>
+/************************************************/
+
+/*unsigned integer types*/
+typedef	uint8_t u_8;/**< used for unsigned 8bit */
+typedef	uint16_t u_16;/**< used for unsigned 16bit */
+typedef	uint32_t u_32;/**< used for unsigned 32bit */
+typedef	uint64_t u_64;/**< used for unsigned 64bit */
+
+/*signed integer types*/
+typedef	int8_t s_8;/**< used for signed 8bit */
+typedef	int16_t s_16;/**< used for signed 16bit */
+typedef	int32_t s_32;/**< used for signed 32bit */
+typedef	int64_t s_64;/**< used for signed 64bit */
+/************************************************
+ * compiler is C99 C standard
+************************************************/
+
+#elif (__STDC_VERSION__ == 199901L)
+
+/* stdint.h is a C99 supported c library.
+which is used to fixed the integer size*/
+/************************************************/
+#include <stdint.h>
+/************************************************/
+
+/*unsigned integer types*/
+typedef	uint8_t u_8;/**< used for unsigned 8bit */
+typedef	uint16_t u_16;/**< used for unsigned 16bit */
+typedef	uint32_t u_32;/**< used for unsigned 32bit */
+typedef	uint64_t u_64;/**< used for unsigned 64bit */
+
+/*signed integer types*/
+typedef int8_t s_8;/**< used for signed 8bit */
+typedef	int16_t s_16;/**< used for signed 16bit */
+typedef	int32_t s_32;/**< used for signed 32bit */
+typedef	int64_t s_64;/**< used for signed 64bit */
+/************************************************
+ * compiler is C89 or other C standard
+************************************************/
+
+#else /*  !defined(__STDC_VERSION__) */
+/*!
+* @brief By default it is defined as 32 bit machine configuration
+*	define your data types based on your
+*	machine/compiler/controller configuration
+*/
+#define  MACHINE_32_BIT
+
+/*! @brief
+ *	If your machine support 16 bit
+ *	define the MACHINE_16_BIT
+ */
+#ifdef MACHINE_16_BIT
+#include <limits.h>
+/*signed integer types*/
+typedef	signed char  s_8;/**< used for signed 8bit */
+typedef	signed short int s_16;/**< used for signed 16bit */
+typedef	signed long int s_32;/**< used for signed 32bit */
+
+#if defined(LONG_MAX) && LONG_MAX == 0x7fffffffffffffffL
+typedef long int s_64;/**< used for signed 64bit */
+typedef unsigned long int u_64;/**< used for unsigned 64bit */
+#elif defined(LLONG_MAX) && (LLONG_MAX == 0x7fffffffffffffffLL)
+typedef long long int s_64;/**< used for signed 64bit */
+typedef unsigned long long int u_64;/**< used for unsigned 64bit */
+#else
+#warning Either the correct data type for signed 64 bit integer \
+could not be found, or 64 bit integers are not supported in your environment.
+#warning If 64 bit integers are supported on your platform, \
+please set s_64 manually.
+#endif
+
+/*unsigned integer types*/
+typedef	unsigned char u_8;/**< used for unsigned 8bit */
+typedef	unsigned short int u_16;/**< used for unsigned 16bit */
+typedef	unsigned long int u_32;/**< used for unsigned 32bit */
+
+/* If your machine support 32 bit
+define the MACHINE_32_BIT*/
+#elif defined MACHINE_32_BIT
+/*signed integer types*/
+typedef	signed char  s_8;/**< used for signed 8bit */
+typedef	signed short int s_16;/**< used for signed 16bit */
+typedef	signed int s_32;/**< used for signed 32bit */
+typedef	signed long long int s_64;/**< used for signed 64bit */
+
+/*unsigned integer types*/
+typedef	unsigned char u_8;/**< used for unsigned 8bit */
+typedef	unsigned short int u_16;/**< used for unsigned 16bit */
+typedef	unsigned int u_32;/**< used for unsigned 32bit */
+typedef	unsigned long long int u_64;/**< used for unsigned 64bit */
+
+/* If your machine support 64 bit
+define the MACHINE_64_BIT*/
+#elif defined MACHINE_64_BIT
+/*signed integer types*/
+typedef	signed char  s_8;/**< used for signed 8bit */
+typedef	signed short int s_16;/**< used for signed 16bit */
+typedef	signed int s_32;/**< used for signed 32bit */
+typedef	signed long int s_64;/**< used for signed 64bit */
+
+/*unsigned integer types*/
+typedef	unsigned char u_8;/**< used for unsigned 8bit */
+typedef	unsigned short int u_16;/**< used for unsigned 16bit */
+typedef	unsigned int u_32;/**< used for unsigned 32bit */
+typedef	unsigned long int u_64;/**< used for unsigned 64bit */
+
+#else
+#warning The data types defined above which not supported \
+define the data types manually
+#endif
+#endif
+
+/*** This else will execute for the compilers
+ *	which are not supported the C standards
+ *	Like C89/C99/C11***/
+#else
+/*!
+* @brief By default it is defined as 32 bit machine configuration
+*	define your data types based on your
+*	machine/compiler/controller configuration
+*/
+#define  MACHINE_32_BIT
+
+/* If your machine support 16 bit
+define the MACHINE_16_BIT*/
+#ifdef MACHINE_16_BIT
+#include <limits.h>
+/*signed integer types*/
+typedef	signed char  s_8;/**< used for signed 8bit */
+typedef	signed short int s_16;/**< used for signed 16bit */
+typedef	signed long int s_32;/**< used for signed 32bit */
+
+#if defined(LONG_MAX) && LONG_MAX == 0x7fffffffffffffffL
+typedef long int s_64;/**< used for signed 64bit */
+typedef unsigned long int u_64;/**< used for unsigned 64bit */
+#elif defined(LLONG_MAX) && (LLONG_MAX == 0x7fffffffffffffffLL)
+typedef long long int s_64;/**< used for signed 64bit */
+typedef unsigned long long int u_64;/**< used for unsigned 64bit */
+#else
+#warning Either the correct data type for signed 64 bit integer \
+could not be found, or 64 bit integers are not supported in your environment.
+#warning If 64 bit integers are supported on your platform, \
+please set s_64 manually.
+#endif
+
+/*unsigned integer types*/
+typedef	unsigned char u_8;/**< used for unsigned 8bit */
+typedef	unsigned short int u_16;/**< used for unsigned 16bit */
+typedef	unsigned long int u_32;/**< used for unsigned 32bit */
+
+/*! @brief If your machine support 32 bit
+define the MACHINE_32_BIT*/
+#elif defined MACHINE_32_BIT
+/*signed integer types*/
+typedef	signed char  s_8;/**< used for signed 8bit */
+typedef	signed short int s_16;/**< used for signed 16bit */
+typedef	signed int s_32;/**< used for signed 32bit */
+typedef	signed long long int s_64;/**< used for signed 64bit */
+
+/*unsigned integer types*/
+typedef	unsigned char u_8;/**< used for unsigned 8bit */
+typedef	unsigned short int u_16;/**< used for unsigned 16bit */
+typedef	unsigned int u_32;/**< used for unsigned 32bit */
+typedef	unsigned long long int u_64;/**< used for unsigned 64bit */
+
+/* If your machine support 64 bit
+define the MACHINE_64_BIT*/
+#elif defined MACHINE_64_BIT
+/*signed integer types*/
+typedef	signed char  s_8;/**< used for signed 8bit */
+typedef	signed short int s_16;/**< used for signed 16bit */
+typedef	signed int s_32;/**< used for signed 32bit */
+typedef	signed long int s_64;/**< used for signed 64bit */
+
+/*unsigned integer types*/
+typedef	unsigned char u_8;/**< used for unsigned 8bit */
+typedef	unsigned short int u_16;/**< used for unsigned 16bit */
+typedef	unsigned int u_32;/**< used for unsigned 32bit */
+typedef	unsigned long int u_64;/**< used for unsigned 64bit */
+
+#else
+#warning The data types defined above which not supported \
+define the data types manually
+#endif
+#endif
+#endif
+/***************************************************************/
+/**\name	BUS READ AND WRITE FUNCTIONS           */
+/***************************************************************/
+#define BNO055_WR_FUNC_PTR s_8 (*bus_write)\
+(u_8, u_8 , u_8 *, u_8)
+
+#define BNO055_BUS_WRITE_FUNC(dev_addr, reg_addr, reg_data, wr_len)\
+	bus_write(dev_addr, reg_addr, reg_data, wr_len)
+
+#define BNO055_RD_FUNC_PTR s_8 \
+(*bus_read)(u_8, u_8 , u_8 *, u_8)
+
+#define BNO055_BUS_READ_FUNC(dev_addr, reg_addr, reg_data, r_len)\
+bus_read(dev_addr, reg_addr, reg_data, r_len)
+
+#define BNO055_DELAY_RETURN_TYPE void
+
+#define BNO055_DELAY_PARAM_TYPES u_32
+
+#define BNO055_DELAY_FUNC(delay_in_msec)\
+	delay_func(delay_in_msec)
+
+/********************************************************/
+/**\name	I2C ADDRESS DEFINITION FOR BNO055           */
+/********************************************************/
+/* bno055 I2C Address */
+#define BNO055_I2C_ADDR1                0x28
+#define BNO055_I2C_ADDR2                0x29
+
+/***************************************************/
+/**\name	REGISTER ADDRESS DEFINITION  */
+/***************************************************/
+/* Page id register definition*/
+#define BNO055_PAGE_ID_ADDR				    0X07
+
+/* PAGE0 REGISTER DEFINITION START*/
+#define BNO055_CHIP_ID_ADDR                 0x00
+#define BNO055_ACCEL_REV_ID_ADDR			0x01
+#define BNO055_MAG_REV_ID_ADDR              0x02
+#define BNO055_GYRO_REV_ID_ADDR             0x03
+#define BNO055_SW_REV_ID_LSB_ADDR			0x04
+#define BNO055_SW_REV_ID_MSB_ADDR			0x05
+#define BNO055_BL_REV_ID_ADDR				0X06
+
+/* Accel data register*/
+#define BNO055_ACCEL_DATA_X_LSB_ADDR			0X08
+#define BNO055_ACCEL_DATA_X_MSB_ADDR			0X09
+#define BNO055_ACCEL_DATA_Y_LSB_ADDR			0X0A
+#define BNO055_ACCEL_DATA_Y_MSB_ADDR			0X0B
+#define BNO055_ACCEL_DATA_Z_LSB_ADDR			0X0C
+#define BNO055_ACCEL_DATA_Z_MSB_ADDR			0X0D
+
+/*Mag data register*/
+#define BNO055_MAG_DATA_X_LSB_ADDR			0X0E
+#define BNO055_MAG_DATA_X_MSB_ADDR			0X0F
+#define BNO055_MAG_DATA_Y_LSB_ADDR			0X10
+#define BNO055_MAG_DATA_Y_MSB_ADDR			0X11
+#define BNO055_MAG_DATA_Z_LSB_ADDR			0X12
+#define BNO055_MAG_DATA_Z_MSB_ADDR			0X13
+
+/*Gyro data registers*/
+#define BNO055_GYRO_DATA_X_LSB_ADDR			0X14
+#define BNO055_GYRO_DATA_X_MSB_ADDR			0X15
+#define BNO055_GYRO_DATA_Y_LSB_ADDR			0X16
+#define BNO055_GYRO_DATA_Y_MSB_ADDR			0X17
+#define BNO055_GYRO_DATA_Z_LSB_ADDR			0X18
+#define BNO055_GYRO_DATA_Z_MSB_ADDR			0X19
+
+/*Euler data registers*/
+#define BNO055_EULER_H_LSB_ADDR			0X1A
+#define BNO055_EULER_H_MSB_ADDR			0X1B
+
+#define BNO055_EULER_R_LSB_ADDR			0X1C
+#define BNO055_EULER_R_MSB_ADDR			0X1D
+
+#define BNO055_EULER_P_LSB_ADDR			0X1E
+#define BNO055_EULER_P_MSB_ADDR			0X1F
+
+/*Quaternion data registers*/
+#define BNO055_QUATERNION_DATA_W_LSB_ADDR	0X20
+#define BNO055_QUATERNION_DATA_W_MSB_ADDR	0X21
+#define BNO055_QUATERNION_DATA_X_LSB_ADDR	0X22
+#define BNO055_QUATERNION_DATA_X_MSB_ADDR	0X23
+#define BNO055_QUATERNION_DATA_Y_LSB_ADDR	0X24
+#define BNO055_QUATERNION_DATA_Y_MSB_ADDR	0X25
+#define BNO055_QUATERNION_DATA_Z_LSB_ADDR	0X26
+#define BNO055_QUATERNION_DATA_Z_MSB_ADDR	0X27
+
+/* Linear acceleration data registers*/
+#define BNO055_LINEAR_ACCEL_DATA_X_LSB_ADDR			0X28
+#define BNO055_LINEAR_ACCEL_DATA_X_MSB_ADDR			0X29
+#define BNO055_LINEAR_ACCEL_DATA_Y_LSB_ADDR			0X2A
+#define BNO055_LINEAR_ACCEL_DATA_Y_MSB_ADDR			0X2B
+#define BNO055_LINEAR_ACCEL_DATA_Z_LSB_ADDR			0X2C
+#define BNO055_LINEAR_ACCEL_DATA_Z_MSB_ADDR			0X2D
+
+/*Gravity data registers*/
+#define BNO055_GRAVITY_DATA_X_LSB_ADDR			0X2E
+#define BNO055_GRAVITY_DATA_X_MSB_ADDR			0X2F
+#define BNO055_GRAVITY_DATA_Y_LSB_ADDR			0X30
+#define BNO055_GRAVITY_DATA_Y_MSB_ADDR			0X31
+#define BNO055_GRAVITY_DATA_Z_LSB_ADDR			0X32
+#define BNO055_GRAVITY_DATA_Z_MSB_ADDR			0X33
+
+/* Temperature data register*/
+#define BNO055_TEMP_ADDR					0X34
+
+/* Status registers*/
+#define BNO055_CALIB_STAT_ADDR				0X35
+#define BNO055_SELFTEST_RESULT_ADDR			0X36
+#define BNO055_INTR_STAT_ADDR				0X37
+#define BNO055_SYS_CLK_STAT_ADDR			0X38
+#define BNO055_SYS_STAT_ADDR				0X39
+#define BNO055_SYS_ERR_ADDR					0X3A
+
+/* Unit selection register*/
+#define BNO055_UNIT_SEL_ADDR				0X3B
+#define BNO055_DATA_SELECT_ADDR				0X3C
+
+/* Mode registers*/
+#define BNO055_OPR_MODE_ADDR				0X3D
+#define BNO055_PWR_MODE_ADDR				0X3E
+
+#define BNO055_SYS_TRIGGER_ADDR				0X3F
+#define BNO055_TEMP_SOURCE_ADDR				0X40
+/* Axis remap registers*/
+#define BNO055_AXIS_MAP_CONFIG_ADDR			0X41
+#define BNO055_AXIS_MAP_SIGN_ADDR			0X42
+
+/* SIC registers*/
+#define BNO055_SIC_MATRIX_0_LSB_ADDR		0X43
+#define BNO055_SIC_MATRIX_0_MSB_ADDR		0X44
+#define BNO055_SIC_MATRIX_1_LSB_ADDR		0X45
+#define BNO055_SIC_MATRIX_1_MSB_ADDR		0X46
+#define BNO055_SIC_MATRIX_2_LSB_ADDR		0X47
+#define BNO055_SIC_MATRIX_2_MSB_ADDR		0X48
+#define BNO055_SIC_MATRIX_3_LSB_ADDR		0X49
+#define BNO055_SIC_MATRIX_3_MSB_ADDR		0X4A
+#define BNO055_SIC_MATRIX_4_LSB_ADDR		0X4B
+#define BNO055_SIC_MATRIX_4_MSB_ADDR		0X4C
+#define BNO055_SIC_MATRIX_5_LSB_ADDR		0X4D
+#define BNO055_SIC_MATRIX_5_MSB_ADDR		0X4E
+#define BNO055_SIC_MATRIX_6_LSB_ADDR		0X4F
+#define BNO055_SIC_MATRIX_6_MSB_ADDR		0X50
+#define BNO055_SIC_MATRIX_7_LSB_ADDR		0X51
+#define BNO055_SIC_MATRIX_7_MSB_ADDR		0X52
+#define BNO055_SIC_MATRIX_8_LSB_ADDR		0X53
+#define BNO055_SIC_MATRIX_8_MSB_ADDR		0X54
+
+/* Accelerometer Offset registers*/
+#define ACCEL_OFFSET_X_LSB_ADDR				0X55
+#define ACCEL_OFFSET_X_MSB_ADDR				0X56
+#define ACCEL_OFFSET_Y_LSB_ADDR				0X57
+#define ACCEL_OFFSET_Y_MSB_ADDR				0X58
+#define ACCEL_OFFSET_Z_LSB_ADDR				0X59
+#define ACCEL_OFFSET_Z_MSB_ADDR				0X5A
+
+/* Magnetometer Offset registers*/
+#define MAG_OFFSET_X_LSB_ADDR				0X5B
+#define MAG_OFFSET_X_MSB_ADDR				0X5C
+#define MAG_OFFSET_Y_LSB_ADDR				0X5D
+#define MAG_OFFSET_Y_MSB_ADDR				0X5E
+#define MAG_OFFSET_Z_LSB_ADDR				0X5F
+#define MAG_OFFSET_Z_MSB_ADDR				0X60
+
+/* Gyroscope Offset registers*/
+#define GYRO_OFFSET_X_LSB_ADDR				0X61
+#define GYRO_OFFSET_X_MSB_ADDR				0X62
+#define GYRO_OFFSET_Y_LSB_ADDR				0X63
+#define GYRO_OFFSET_Y_MSB_ADDR				0X64
+#define GYRO_OFFSET_Z_LSB_ADDR				0X65
+#define GYRO_OFFSET_Z_MSB_ADDR				0X66
+
+/* Radius registers*/
+#define	ACCEL_RADIUS_LSB_ADDR				0X67
+#define	ACCEL_RADIUS_MSB_ADDR				0X68
+#define	MAG_RADIUS_LSB_ADDR					0X69
+#define	MAG_RADIUS_MSB_ADDR					0X6A
+/* PAGE0 REGISTERS DEFINITION END*/
+
+/* PAGE1 REGISTERS DEFINITION START*/
+/* Configuration registers*/
+#define ACCEL_CONFIG_ADDR					0X08
+#define MAG_CONFIG_ADDR						0X09
+#define GYRO_CONFIG_ADDR					0X0A
+#define GYRO_MODE_CONFIG_ADDR				0X0B
+#define ACCEL_SLEEP_CONFIG_ADDR				0X0C
+#define GYRO_SLEEP_CONFIG_ADDR				0X0D
+#define MAG_SLEEP_CONFIG_ADDR				0x0E
+
+/* Interrupt registers*/
+#define INT_MASK_ADDR						0X0F
+#define INT_ADDR							0X10
+#define ACCEL_ANY_MOTION_THRES_ADDR			0X11
+#define ACCEL_INTR_SETTINGS_ADDR				0X12
+#define ACCEL_HIGH_G_DURN_ADDR				0X13
+#define ACCEL_HIGH_G_THRES_ADDR				0X14
+#define ACCEL_NO_MOTION_THRES_ADDR			0X15
+#define ACCEL_NO_MOTION_SET_ADDR				0X16
+#define GYRO_INTR_SETING_ADDR				0X17
+#define GYRO_HIGHRATE_X_SET_ADDR			0X18
+#define GYRO_DURN_X_ADDR						0X19
+#define GYRO_HIGHRATE_Y_SET_ADDR			0X1A
+#define GYRO_DURN_Y_ADDR						0X1B
+#define GYRO_HIGHRATE_Z_SET_ADDR			0X1C
+#define GYRO_DURN_Z_ADDR						0X1D
+#define GYRO_ANY_MOTION_THRES_ADDR			0X1E
+#define GYRO_ANY_MOTION_SET_ADDR				0X1F
+/* PAGE1 REGISTERS DEFINITION END*/
+
+
+#define BNO055_MDELAY_DATA_TYPE           u_32
+
+/*< This refers BNO055 return type as s_8 */
+#define BNO055_RETURN_FUNCTION_TYPE        s_8
+
+/* Compile switch definition for Float and double*/
+#define BNO055_FLOAT_ENABLE
+#define BNO055_DOUBLE_ENABLE
+/**************************************************************/
+/**\name	STRUCTURE DEFINITIONS                         */
+/**************************************************************/
+/*!
+*	@brief bno055 struct
+*/
+struct bno055_t {
+u_8 chip_id;/**< chip_id of bno055 */
+u_16 sw_rev_id;/**< software revision id of bno055 */
+u_8 page_id;/**< page_id of bno055 */
+u_8 accel_rev_id;/**< accel revision id of bno055 */
+u_8 mag_rev_id;/**< mag revision id of bno055 */
+u_8 gyro_rev_id;/**< gyro revision id of bno055 */
+u_8 bl_rev_id;/**< boot loader revision id of bno055 */
+u_8 dev_addr;/**< i2c device address of bno055 */
+BNO055_WR_FUNC_PTR;/**< bus write function pointer */
+BNO055_RD_FUNC_PTR;/**<bus read function pointer */
+void (*delay_msec)(BNO055_MDELAY_DATA_TYPE);/**< delay function pointer */
+};
+/*!
+* @brief struct for accel data read from registers
+*/
+struct bno055_accel_t {
+s_16 x;/**< accel x data */
+s_16 y;/**< accel y data */
+s_16 z;/**< accel z data */
+};
+/*!
+* @brief struct for Mag data read from registers
+*/
+struct bno055_mag_t {
+s_16 x;/**< mag x data */
+s_16 y;/**< mag y data */
+s_16 z;/**< mag z data */
+};
+/*!
+* @brief struct for Gyro data read from registers
+*/
+struct bno055_gyro_t {
+s_16 x;/**< gyro x data */
+s_16 y;/**< gyro y data */
+s_16 z;/**< gyro z data */
+};
+/*!
+* @brief struct for Euler data read from registers
+*/
+struct bno055_euler_t {
+s_16 h;/**< Euler h data */
+s_16 r;/**< Euler r data */
+s_16 p;/**< Euler p data */
+};
+/*!
+* @brief struct for Quaternion data read from registers
+*/
+struct bno055_quaternion_t {
+s_16 w;/**< Quaternion w data */
+s_16 x;/**< Quaternion x data */
+s_16 y;/**< Quaternion y data */
+s_16 z;/**< Quaternion z data */
+};
+/*!
+* @brief struct for Linear Accel data read from registers
+*/
+struct bno055_linear_accel_t {
+s_16 x; /**< Linear Accel x data */
+s_16 y; /**< Linear Accel y data */
+s_16 z; /**< Linear Accel z data */
+};
+/*!
+* @brief struct for Gravity data read from registers
+*/
+struct bno055_gravity_t {
+s_16 x;/**< Gravity x data */
+s_16 y;/**< Gravity y data */
+s_16 z;/**< Gravity z data */
+};
+#ifdef	BNO055_DOUBLE_ENABLE
+/*!
+* @brief struct for Accel-output data of precision double
+*/
+struct bno055_accel_double_t {
+double x;/**< Accel x double data */
+double y;/**< Accel y double data */
+double z;/**< Accel z double data */
+};
+/*!
+* @brief struct for Mag-output data of precision double
+*/
+struct bno055_mag_double_t {
+double x;/**< Mag x double data */
+double y;/**< Mag y double data */
+double z;/**< Mag z double data */
+};
+/*!
+* @brief struct for Gyro-output data of precision double
+*/
+struct bno055_gyro_double_t {
+double x;/**< Gyro x double data */
+double y;/**< Gyro y double data */
+double z;/**< Gyro z double data */
+};
+/*!
+* @brief struct for Euler-output data of precision double
+*/
+struct bno055_euler_double_t {
+double h;/**< Euler h double data */
+double r;/**< Euler r double data */
+double p;/**< Euler p double data */
+};
+/*!
+* @brief struct for Linear Accel-output data of precision double
+*/
+struct bno055_linear_accel_double_t {
+double x;/**< linear accel x double data */
+double y;/**< linear accel y double data */
+double z;/**< linear accel z double data */
+};
+/*!
+* @brief struct for Gravity-output data of precision double
+*/
+struct bno055_gravity_double_t {
+double x;/**< Gravity x double data */
+double y;/**< Gravity y double data */
+double z;/**< Gravity z double data */
+};
+#endif
+#ifdef	BNO055_FLOAT_ENABLE
+/*!
+* @brief struct for Accel-output data of precision float
+*/
+struct bno055_accel_float_t {
+float x;/**< accel x float data */
+float y;/**< accel y float data */
+float z;/**< accel z float data */
+};
+/*!
+* @brief struct for Mag-output data of precision float
+*/
+struct bno055_mag_float_t {
+float x;/**< Mag x float data */
+float y;/**< Mag y float data */
+float z;/**< Mag z float data */
+};
+/*!
+* @brief struct for Gyro-output data of precision float
+*/
+struct bno055_gyro_float_t {
+float x;/**< Gyro x float data */
+float y;/**< Gyro y float data */
+float z;/**< Gyro z float data */
+};
+/*!
+* @brief struct for Euler-output data of precision float
+*/
+struct bno055_euler_float_t {
+float h;/**< Euler h float data */
+float r;/**< Euler r float data */
+float p;/**< Euler p float data */
+};
+/*!
+* @brief struct for Linear accel-output data of precision float
+*/
+struct bno055_linear_accel_float_t {
+float x;/**< Linear accel x float data */
+float y;/**< Linear accel y float data */
+float z;/**< Linear accel z float data */
+};
+/*!
+* @brief struct for Gravity-output data of precision float
+*/
+struct bno055_gravity_float_t {
+float x;/**< Gravity x float data */
+float y;/**< Gravity y float data */
+float z;/**< Gravity z float data */
+};
+#endif
+/*!
+* @brief struct for Accel offset
+*/
+struct bno055_accel_offset_t {
+s_16 x;/**< Accel offset x data */
+s_16 y;/**< Accel offset y data */
+s_16 z;/**< Accel offset z data */
+s_16 r;/**< Accel radius r data */
+};
+/*!
+* @brief struct for Gyro offset
+*/
+struct bno055_gyro_offset_t {
+s_16 x;/**< Gyro offset x data */
+s_16 y;/**< Gyro offset y data */
+s_16 z;/**< Gyro offset z data */
+};
+/*!
+* @brief struct for Mag offset
+*/
+struct bno055_mag_offset_t {
+s_16 x;/**< Mag offset x data */
+s_16 y;/**< Mag offset y data */
+s_16 z;/**< Mag offset z data */
+s_16 r;/**< Mag radius x data */
+};
+/*!
+* @brief struct for soft iron calibration matrix
+*/
+struct bno055_sic_matrix_t {
+s_16 sic_0;/**< soft iron calibration matrix 0 data */
+s_16 sic_1;/**< soft iron calibration matrix 1 data */
+s_16 sic_2;/**< soft iron calibration matrix 2 data */
+s_16 sic_3;/**< soft iron calibration matrix 3 data */
+s_16 sic_4;/**< soft iron calibration matrix 4 data */
+s_16 sic_5;/**< soft iron calibration matrix 5 data */
+s_16 sic_6;/**< soft iron calibration matrix 6 data */
+s_16 sic_7;/**< soft iron calibration matrix 7 data */
+s_16 sic_8;/**< soft iron calibration matrix 8 data */
+};
+/***************************************************/
+/**\name	CONSTANT DEFINITIONS                   */
+/***************************************************/
+#define         BNO055_ZERO_U8X           ((u_8)0)
+#define         BNO055_ONE_U8X           ((u_8)1)
+#define         BNO055_TWO_U8X			  ((u_8)2)
+#define         BNO055_FOUR_U8X           ((u_8)4)
+#define         BNO055_FIVE_U8X           ((u_8)5)
+#define         BNO055_SIX_U8X            ((u_8)6)
+#define         BNO055_SEVEN_U8X          ((u_8)7)
+#define         BNO055_ELEVEN_U8X         ((u_8)11)
+#define         BNO055_SIXTEEN_U8X        ((u_8)16)
+#define			BNO055_EIGHT_U8X		  ((u_8)8)
+#define			BNO055_TWENTY_U8X         ((u_8)20)
+#define			BNO055_EIGHTEEN_U8X       ((u_8)18)
+
+
+#define         BNO055_SHIFT_8_POSITION	   ((u_8)8)
+
+
+/*  BNO055 API error codes */
+#define E_NULL_PTR                  ((s_8)-127)
+#define E_BNO055_OUT_OF_RANGE       ((s_8)-2)
+#define	SUCCESS						((u_8)0)
+#define	ERROR_BOSCH					((s_8)-1)
+
+/* Selection for bit enable and disable */
+#define ENABLED		0x01
+#define DISABLED	0x00
+
+/* Page ID */
+#define PAGE_ZERO		0X00
+#define PAGE_ONE		0X01
+
+/* Enable the temperature source */
+#define	ACCEL_TEMP_EN	0x00
+#define	GYRO_TEMP_EN	0x01
+#define	MCU_TEMP_EN		0x03
+
+/*Accel unit*/
+#define ACCEL_UNIT_MSQ	0x00
+#define ACCEL_UNIT_MG	0x01
+
+/*Gyro unit*/
+#define GYRO_UNIT_DPS	0x00
+#define GYRO_UNIT_RPS	0x01
+
+/* Euler unit*/
+#define EULER_UNIT_DEG	0x00
+#define EULER_UNIT_RAD	0x01
+
+/*Temperature unit*/
+#define TEMP_UNIT_CELSIUS		0x00
+#define TEMP_UNIT_FAHRENHEIT	0x01
+
+/*Accel division factor*/
+#define	ACCEL_DIV_MSQ	100.0
+#define	ACCEL_DIV_MG	1
+
+/*Mag division factor*/
+#define MAG_DIV_UT	16.0
+
+/*Gyro division factor*/
+#define GYRO_DIV_DPS		16.0
+#define GYRO_DIV_RPS		900.0
+
+/*Euler division factor*/
+#define EULER_DIV_DEG		16.0
+#define EULER_DIV_RAD		900.0
+
+/*Linear accel division factor*/
+#define	LINEAR_ACCEL_DIV_MSQ	100.0
+
+/*Gravity accel division factor*/
+#define	GRAVITY_DIV_MSQ	100.0
+
+/* Temperature division factor*/
+#define TEMP_DIV_FAHRENHEIT	0.5
+#define TEMP_DIV_CELSIUS	1
+
+#define	BNO055_SIX_HUNDRES_U8X	600
+
+
+
+/* Operation mode settings*/
+#define OPERATION_MODE_CONFIG			0X00
+#define OPERATION_MODE_ACCONLY			0X01
+#define OPERATION_MODE_MAGONLY			0X02
+#define OPERATION_MODE_GYRONLY			0X03
+#define OPERATION_MODE_ACCMAG			0X04
+#define OPERATION_MODE_ACCGYRO			0X05
+#define OPERATION_MODE_MAGGYRO			0X06
+#define OPERATION_MODE_AMG				0X07
+#define OPERATION_MODE_IMUPLUS			0X08
+#define OPERATION_MODE_COMPASS			0X09
+#define OPERATION_MODE_M4G				0X0A
+#define OPERATION_MODE_NDOF_FMC_OFF		0X0B
+#define OPERATION_MODE_NDOF				0X0C
+
+/* Power mode*/
+#define POWER_MODE_NORMAL	0X00
+#define POWER_MODE_LOWPOWER	0X01
+#define POWER_MODE_SUSPEND	0X02
+
+/* PAGE-1 definitions*/
+/* Accel Range */
+
+#define ACCEL_RANGE_2G		0X00
+#define ACCEL_RANGE_4G		0X01
+#define ACCEL_RANGE_8G		0X02
+#define ACCEL_RANGE_16G		0X03
+
+/* Accel Bandwidth*/
+#define ACCEL_BW_7_81HZ		0x00
+#define ACCEL_BW_15_63HZ	0x01
+#define ACCEL_BW_31_25HZ	0x02
+#define ACCEL_BW_62_5HZ		0X03
+#define ACCEL_BW_125HZ		0X04
+#define ACCEL_BW_250HZ		0X05
+#define ACCEL_BW_500HZ		0X06
+#define ACCEL_BW_1000HZ		0X07
+
+/* Accel Power mode*/
+#define ACCEL_NORMAL			0X00
+#define ACCEL_SUSPEND			0X01
+#define ACCEL_LOWPOWER_1		0X02
+#define ACCEL_STANDBY			0X03
+#define ACCEL_LOWPOWER_2		0X04
+#define ACCEL_DEEPSUSPEND		0X05
+
+/* Mag data output rate*/
+#define MAG_DATA_OUTRATE_2HZ		0X00
+#define MAG_DATA_OUTRATE_6HZ		0X01
+#define MAG_DATA_OUTRATE_8HZ		0X02
+#define MAG_DATA_OUTRATE_10HZ		0X03
+#define MAG_DATA_OUTRATE_15HZ		0X04
+#define MAG_DATA_OUTRATE_20HZ		0X05
+#define MAG_DATA_OUTRATE_25HZ		0X06
+#define MAG_DATA_OUTRATE_30HZ		0X07
+
+/* Mag Operation mode*/
+#define MAG_OPERATION_MODE_LOWPOWER				0X00
+#define MAG_OPERATION_MODE_REGULAR				0X01
+#define MAG_OPERATION_MODE_ENHANCED_REGULAR		0X02
+#define MAG_OPERATION_MODE_HIGH_ACCURACY		0X03
+
+/* Mag power mode*/
+#define MAG_POWER_MODE_NORMAL					0X00
+#define MAG_POWER_MODE_SLEEP					0X01
+#define MAG_POWER_MODE_SUSPEND					0X02
+#define MAG_POWER_MODE_FORCE_MODE				0X03
+
+/* Gyro range*/
+#define GYRO_RANGE_2000DPS		0x00
+#define GYRO_RANGE_1000DPS		0x01
+#define GYRO_RANGE_500DPS		0x02
+#define GYRO_RANGE_250DPS		0x03
+#define GYRO_RANGE_125DPS		0x04
+
+/* Gyro Bandwidth*/
+#define GYRO_BW_523HZ		0x00
+#define GYRO_BW_230HZ		0x01
+#define GYRO_BW_116HZ		0x02
+#define GYRO_BW_47HZ		0x03
+#define GYRO_BW_23HZ		0x04
+#define GYRO_BW_12HZ		0x05
+#define GYRO_BW_64HZ		0x06
+#define GYRO_BW_32HZ		0x07
+
+/* Gyro power mode*/
+#define GYRO_POWER_MODE_NORMAL				0X00
+#define GYRO_POWER_MODE_FASTPOWERUP			0X01
+#define GYRO_POWER_MODE_DEEPSUSPEND			0X02
+#define GYRO_POWER_MODE_SUSPEND				0X03
+#define GYRO_POWER_MODE_ADVANCE_POWERSAVE	0X04
+
+/* Accel Sleep Duration */
+#define BNO055_ACCEL_SLEEP_DURN_0_5MS        0x05
+/* sets sleep duration to 0.5 ms  */
+#define BNO055_ACCEL_SLEEP_DURN_1MS          0x06
+/* sets sleep duration to 1 ms */
+#define BNO055_ACCEL_SLEEP_DURN_2MS          0x07
+/* sets sleep duration to 2 ms */
+#define BNO055_ACCEL_SLEEP_DURN_4MS          0x08
+/* sets sleep duration to 4 ms */
+#define BNO055_ACCEL_SLEEP_DURN_6MS          0x09
+/* sets sleep duration to 6 ms*/
+#define BNO055_ACCEL_SLEEP_DURN_10MS         0x0A
+/* sets sleep duration to 10 ms */
+#define BNO055_ACCEL_SLEEP_DURN_25MS         0x0B
+ /* sets sleep duration to 25 ms */
+#define BNO055_ACCEL_SLEEP_DURN_50MS         0x0C
+ /* sets sleep duration to 50 ms */
+#define BNO055_ACCEL_SLEEP_DURN_100MS        0x0D
+ /* sets sleep duration to 100 ms */
+#define BNO055_ACCEL_SLEEP_DURN_500MS        0x0E
+ /* sets sleep duration to 500 ms */
+#define BNO055_ACCEL_SLEEP_DURN_1S           0x0F
+/* sets sleep duration to 1 s */
+
+/* Gyro Auto sleep duration*/
+#define BNO055_GYRO_No_AUTOSLPDUR		0x00
+#define	BNO055_GYRO_4MS_AUTOSLPDUR		0x01
+#define	BNO055_GYRO_5MS_AUTOSLPDUR		0x02
+#define	BNO055_GYRO_8MS_AUTOSLPDUR		0x03
+#define	BNO055_GYRO_10MS_AUTOSLPDUR		0x04
+#define	BNO055_GYRO_15MS_AUTOSLPDUR		0x05
+#define	BNO055_GYRO_20MS_AUTOSLPDUR		0x06
+#define	BNO055_GYRO_40MS_AUTOSLPDUR		0x07
+
+/* Accel Any/No motion axis selection*/
+#define BNO055_ACCEL_ANY_MOTION_NO_MOTION_X_AXIS		0
+#define BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS		1
+#define BNO055_ACCEL_ANY_MOTION_NO_MOTION_Z_AXIS		2
+
+/* Accel High g axis selection*/
+#define BNO055_ACCEL_HIGH_G_X_AXIS		0
+#define BNO055_ACCEL_HIGH_G_Y_AXIS		1
+#define BNO055_ACCEL_HIGH_G_Z_AXIS		2
+
+/* Gyro Any motion axis selection*/
+#define BNO055_GYRO_ANY_MOTION_X_AXIS		0
+#define BNO055_GYRO_ANY_MOTION_Y_AXIS		1
+#define BNO055_GYRO_ANY_MOTION_Z_AXIS		2
+
+
+/* Gyro High rate axis selection*/
+#define BNO055_GYRO_HIGHRATE_X_AXIS		0
+#define BNO055_GYRO_HIGHRATE_Y_AXIS		1
+#define BNO055_GYRO_HIGHRATE_Z_AXIS		2
+
+/* Axis remap values*/
+#define REMAP_X_Y			0X21
+#define REMAP_Y_Z			0X18
+#define REMAP_Z_X			0X06
+#define REMAP_X_Y_Z_TYPE0	0X12
+#define REMAP_X_Y_Z_TYPE1	0X09
+#define DEFAULT_AXIS		0X24
+
+/* Axis remap sign */
+#define	REMAP_AXIS_POSITIVE	0X00
+#define	REMAP_AXIS_NEGATIVE	0X01
+
+/* Gyro anymotion and high rate filter configuration */
+#define	FILTERED	0x00
+#define	UNFILTERED	0x01
+
+/* mask definitions*/
+#define BNO055_SIC_HEX_0_0_F_F_DATA		0x00FF
+/****************************************************/
+/**\name	ARRAY SIZE DEFINITIONS      */
+/***************************************************/
+#define ARRAY_SIZE_TWO		2
+#define ARRAY_SIZE_THREE	3
+#define ARRAY_SIZE_SIX		6
+#define ARRAY_SIZE_FIVE		5
+#define ARRAY_SIZE_EIGHT	8
+#define ARRAY_SIZE_TWELVE	12
+#define ARRAY_SIZE_FOURTEEN	14
+#define ARRAY_SIZE_EIGHTEEN	18
+#define ARRAY_SIZE_TWENTY_SIX	26
+
+#define INDEX_ZERO		0
+#define INDEX_ONE		1
+#define INDEX_TWO		2
+#define INDEX_THREE		3
+#define INDEX_FOUR		4
+#define INDEX_FIVE		5
+#define INDEX_SIX		6
+#define INDEX_SEVEN		7
+#define INDEX_EIGHT		8
+#define INDEX_NINE		9
+#define INDEX_TEN		10
+#define INDEX_ELEVEN	11
+#define INDEX_TWELVE	12
+#define INDEX_THIRTEEN	13
+#define INDEX_FOURTEEN	14
+#define INDEX_FIVETEEN	15
+#define INDEX_SIXTEEN	16
+#define INDEX_SEVENTEEN	17
+#define INDEX_EIGHTEEN	18
+#define INDEX_NINETEEN	19
+#define INDEX_TWENTY	20
+#define INDEX_TWENTY_ONE	21
+#define INDEX_TWENTY_TWO	22
+#define INDEX_TWENTY_THREE	23
+#define INDEX_TWENTY_FIVE	25
+/****************************************************/
+/**\name	ARRAY PARAMETERS      */
+/***************************************************/
+#define LSB_ZERO	0
+#define MSB_ONE		1
+#define LSB_TWO		2
+#define MSB_THREE	3
+#define LSB_FOUR	4
+#define MSB_FIVE	5
+#define LSB_SIX		6
+#define MSB_SEVEN	7
+/*********************************************************/
+/**\name PAGE0 DATA REGISTERS DEFINITION */
+/*********************************************************/
+/* Chip ID */
+#define BNO055_CHIP_ID__POS             0
+#define BNO055_CHIP_ID__MSK             0xFF
+#define BNO055_CHIP_ID__LEN             8
+#define BNO055_CHIP_ID__REG             BNO055_CHIP_ID_ADDR
+
+/* Accel revision id*/
+#define BNO055_ACCEL_REV_ID__POS             0
+#define BNO055_ACCEL_REV_ID__MSK             0xFF
+#define BNO055_ACCEL_REV_ID__LEN             8
+#define BNO055_ACCEL_REV_ID__REG             BNO055_ACCEL_REV_ID_ADDR
+
+/* Mag revision id*/
+#define BNO055_MAG_REV_ID__POS             0
+#define BNO055_MAG_REV_ID__MSK             0xFF
+#define BNO055_MAG_REV_ID__LEN             8
+#define BNO055_MAG_REV_ID__REG             BNO055_MAG_REV_ID_ADDR
+
+/* Gyro revision id*/
+#define BNO055_GYRO_REV_ID__POS             0
+#define BNO055_GYRO_REV_ID__MSK             0xFF
+#define BNO055_GYRO_REV_ID__LEN             8
+#define BNO055_GYRO_REV_ID__REG             BNO055_GYRO_REV_ID_ADDR
+
+/*Software revision id LSB*/
+#define BNO055_SW_REV_ID_LSB__POS             0
+#define BNO055_SW_REV_ID_LSB__MSK             0xFF
+#define BNO055_SW_REV_ID_LSB__LEN             8
+#define BNO055_SW_REV_ID_LSB__REG             BNO055_SW_REV_ID_LSB_ADDR
+
+/*Software revision id MSB*/
+#define BNO055_SW_REV_ID_MSB__POS             0
+#define BNO055_SW_REV_ID_MSB__MSK             0xFF
+#define BNO055_SW_REV_ID_MSB__LEN             8
+#define BNO055_SW_REV_ID_MSB__REG             BNO055_SW_REV_ID_MSB_ADDR
+
+/* BOOTLODER revision id*/
+#define BNO055_BL_REV_ID__POS             0
+#define BNO055_BL_REV_ID__MSK             0xFF
+#define BNO055_BL_REV_ID__LEN             8
+#define BNO055_BL_REV_ID__REG             BNO055_BL_REV_ID_ADDR
+
+/*Page id*/
+#define BNO055_PAGE_ID__POS             0
+#define BNO055_PAGE_ID__MSK             0xFF
+#define BNO055_PAGE_ID__LEN             8
+#define BNO055_PAGE_ID__REG             BNO055_PAGE_ID_ADDR
+
+/* Accel data X-LSB register*/
+#define BNO055_ACCEL_DATA_X_LSB_VALUEX__POS             0
+#define BNO055_ACCEL_DATA_X_LSB_VALUEX__MSK             0xFF
+#define BNO055_ACCEL_DATA_X_LSB_VALUEX__LEN             8
+#define BNO055_ACCEL_DATA_X_LSB_VALUEX__REG             \
+BNO055_ACCEL_DATA_X_LSB_ADDR
+
+/* Accel data X-MSB register*/
+#define BNO055_ACCEL_DATA_X_MSB_VALUEX__POS             0
+#define BNO055_ACCEL_DATA_X_MSB_VALUEX__MSK             0xFF
+#define BNO055_ACCEL_DATA_X_MSB_VALUEX__LEN             8
+#define BNO055_ACCEL_DATA_X_MSB_VALUEX__REG             \
+BNO055_ACCEL_DATA_X_MSB_ADDR
+
+/* Accel data Y-LSB register*/
+#define BNO055_ACCEL_DATA_Y_LSB_VALUEY__POS             0
+#define BNO055_ACCEL_DATA_Y_LSB_VALUEY__MSK             0xFF
+#define BNO055_ACCEL_DATA_Y_LSB_VALUEY__LEN             8
+#define BNO055_ACCEL_DATA_Y_LSB_VALUEY__REG             \
+BNO055_ACCEL_DATA_Y_LSB_ADDR
+
+/* Accel data Y-MSB register*/
+#define BNO055_ACCEL_DATA_Y_MSB_VALUEY__POS             0
+#define BNO055_ACCEL_DATA_Y_MSB_VALUEY__MSK             0xFF
+#define BNO055_ACCEL_DATA_Y_MSB_VALUEY__LEN             8
+#define BNO055_ACCEL_DATA_Y_MSB_VALUEY__REG             \
+BNO055_ACCEL_DATA_Y_MSB_ADDR
+
+/* Accel data Z-LSB register*/
+#define BNO055_ACCEL_DATA_Z_LSB_VALUEZ__POS		0
+#define BNO055_ACCEL_DATA_Z_LSB_VALUEZ__MSK		0xFF
+#define BNO055_ACCEL_DATA_Z_LSB_VALUEZ__LEN		8
+#define BNO055_ACCEL_DATA_Z_LSB_VALUEZ__REG     \
+BNO055_ACCEL_DATA_Z_LSB_ADDR
+
+/* Accel data Z-MSB register*/
+#define BNO055_ACCEL_DATA_Z_MSB_VALUEZ__POS		0
+#define BNO055_ACCEL_DATA_Z_MSB_VALUEZ__MSK		0xFF
+#define BNO055_ACCEL_DATA_Z_MSB_VALUEZ__LEN		8
+#define BNO055_ACCEL_DATA_Z_MSB_VALUEZ__REG     \
+BNO055_ACCEL_DATA_Z_MSB_ADDR
+
+/* Mag data X-LSB register*/
+#define BNO055_MAG_DATA_X_LSB_VALUEX__POS             0
+#define BNO055_MAG_DATA_X_LSB_VALUEX__MSK             0xFF
+#define BNO055_MAG_DATA_X_LSB_VALUEX__LEN             8
+#define BNO055_MAG_DATA_X_LSB_VALUEX__REG             \
+BNO055_MAG_DATA_X_LSB_ADDR
+
+/* Mag data X-MSB register*/
+#define BNO055_MAG_DATA_X_MSB_VALUEX__POS             0
+#define BNO055_MAG_DATA_X_MSB_VALUEX__MSK             0xFF
+#define BNO055_MAG_DATA_X_MSB_VALUEX__LEN             8
+#define BNO055_MAG_DATA_X_MSB_VALUEX__REG             BNO055_MAG_DATA_X_MSB_ADDR
+
+/* Mag data Y-LSB register*/
+#define BNO055_MAG_DATA_Y_LSB_VALUEY__POS             0
+#define BNO055_MAG_DATA_Y_LSB_VALUEY__MSK             0xFF
+#define BNO055_MAG_DATA_Y_LSB_VALUEY__LEN             8
+#define BNO055_MAG_DATA_Y_LSB_VALUEY__REG             BNO055_MAG_DATA_Y_LSB_ADDR
+
+/* Mag data Y-MSB register*/
+#define BNO055_MAG_DATA_Y_MSB_VALUEY__POS             0
+#define BNO055_MAG_DATA_Y_MSB_VALUEY__MSK             0xFF
+#define BNO055_MAG_DATA_Y_MSB_VALUEY__LEN             8
+#define BNO055_MAG_DATA_Y_MSB_VALUEY__REG             BNO055_MAG_DATA_Y_MSB_ADDR
+
+/* Mag data Z-LSB register*/
+#define BNO055_MAG_DATA_Z_LSB_VALUEZ__POS             0
+#define BNO055_MAG_DATA_Z_LSB_VALUEZ__MSK             0xFF
+#define BNO055_MAG_DATA_Z_LSB_VALUEZ__LEN             8
+#define BNO055_MAG_DATA_Z_LSB_VALUEZ__REG             BNO055_MAG_DATA_Z_LSB_ADDR
+
+/* Mag data Z-MSB register*/
+#define BNO055_MAG_DATA_Z_MSB_VALUEZ__POS             0
+#define BNO055_MAG_DATA_Z_MSB_VALUEZ__MSK             0xFF
+#define BNO055_MAG_DATA_Z_MSB_VALUEZ__LEN             8
+#define BNO055_MAG_DATA_Z_MSB_VALUEZ__REG             BNO055_MAG_DATA_Z_MSB_ADDR
+
+/* Gyro data X-LSB register*/
+#define BNO055_GYRO_DATA_X_LSB_VALUEX__POS	0
+#define BNO055_GYRO_DATA_X_LSB_VALUEX__MSK	0xFF
+#define BNO055_GYRO_DATA_X_LSB_VALUEX__LEN	8
+#define BNO055_GYRO_DATA_X_LSB_VALUEX__REG	BNO055_GYRO_DATA_X_LSB_ADDR
+
+/* Gyro data X-MSB register*/
+#define BNO055_GYRO_DATA_X_MSB_VALUEX__POS	0
+#define BNO055_GYRO_DATA_X_MSB_VALUEX__MSK	0xFF
+#define BNO055_GYRO_DATA_X_MSB_VALUEX__LEN	8
+#define BNO055_GYRO_DATA_X_MSB_VALUEX__REG	BNO055_GYRO_DATA_X_MSB_ADDR
+
+/* Gyro data Y-LSB register*/
+#define BNO055_GYRO_DATA_Y_LSB_VALUEY__POS	0
+#define BNO055_GYRO_DATA_Y_LSB_VALUEY__MSK	0xFF
+#define BNO055_GYRO_DATA_Y_LSB_VALUEY__LEN	8
+#define BNO055_GYRO_DATA_Y_LSB_VALUEY__REG	BNO055_GYRO_DATA_Y_LSB_ADDR
+
+/* Gyro data Y-MSB register*/
+#define BNO055_GYRO_DATA_Y_MSB_VALUEY__POS	0
+#define BNO055_GYRO_DATA_Y_MSB_VALUEY__MSK	0xFF
+#define BNO055_GYRO_DATA_Y_MSB_VALUEY__LEN	8
+#define BNO055_GYRO_DATA_Y_MSB_VALUEY__REG	BNO055_GYRO_DATA_Y_MSB_ADDR
+
+/* Gyro data Z-LSB register*/
+#define BNO055_GYRO_DATA_Z_LSB_VALUEZ__POS	0
+#define BNO055_GYRO_DATA_Z_LSB_VALUEZ__MSK	0xFF
+#define BNO055_GYRO_DATA_Z_LSB_VALUEZ__LEN	8
+#define BNO055_GYRO_DATA_Z_LSB_VALUEZ__REG	BNO055_GYRO_DATA_Z_LSB_ADDR
+
+/* Gyro data Z-MSB register*/
+#define BNO055_GYRO_DATA_Z_MSB_VALUEZ__POS	0
+#define BNO055_GYRO_DATA_Z_MSB_VALUEZ__MSK	0xFF
+#define BNO055_GYRO_DATA_Z_MSB_VALUEZ__LEN	8
+#define BNO055_GYRO_DATA_Z_MSB_VALUEZ__REG	BNO055_GYRO_DATA_Z_MSB_ADDR
+
+/* Euler data HEADING-LSB register*/
+#define BNO055_EULER_H_LSB_VALUEH__POS   0
+#define BNO055_EULER_H_LSB_VALUEH__MSK   0xFF
+#define BNO055_EULER_H_LSB_VALUEH__LEN   8
+#define BNO055_EULER_H_LSB_VALUEH__REG  BNO055_EULER_H_LSB_ADDR
+
+/* Euler data HEADING-MSB register*/
+#define BNO055_EULER_H_MSB_VALUEH__POS  0
+#define BNO055_EULER_H_MSB_VALUEH__MSK  0xFF
+#define BNO055_EULER_H_MSB_VALUEH__LEN  8
+#define BNO055_EULER_H_MSB_VALUEH__REG  BNO055_EULER_H_MSB_ADDR
+
+/* Euler data ROLL-LSB register*/
+#define BNO055_EULER_R_LSB_VALUER__POS  0
+#define BNO055_EULER_R_LSB_VALUER__MSK  0xFF
+#define BNO055_EULER_R_LSB_VALUER__LEN  8
+#define BNO055_EULER_R_LSB_VALUER__REG  BNO055_EULER_R_LSB_ADDR
+
+/* Euler data ROLL-MSB register*/
+#define BNO055_EULER_R_MSB_VALUER__POS  0
+#define BNO055_EULER_R_MSB_VALUER__MSK  0xFF
+#define BNO055_EULER_R_MSB_VALUER__LEN  8
+#define BNO055_EULER_R_MSB_VALUER__REG  BNO055_EULER_R_MSB_ADDR
+
+/* Euler data PITCH-LSB register*/
+#define BNO055_EULER_P_LSB_VALUEP__POS  0
+#define BNO055_EULER_P_LSB_VALUEP__MSK  0xFF
+#define BNO055_EULER_P_LSB_VALUEP__LEN  8
+#define BNO055_EULER_P_LSB_VALUEP__REG  BNO055_EULER_P_LSB_ADDR
+
+/* Euler data HEADING-MSB register*/
+#define BNO055_EULER_P_MSB_VALUEP__POS  0
+#define BNO055_EULER_P_MSB_VALUEP__MSK  0xFF
+#define BNO055_EULER_P_MSB_VALUEP__LEN  8
+#define BNO055_EULER_P_MSB_VALUEP__REG  BNO055_EULER_P_MSB_ADDR
+
+/* Quaternion data W-LSB register*/
+#define BNO055_QUATERNION_DATA_W_LSB_VALUEW__POS  0
+#define BNO055_QUATERNION_DATA_W_LSB_VALUEW__MSK  0xFF
+#define BNO055_QUATERNION_DATA_W_LSB_VALUEW__LEN  8
+#define BNO055_QUATERNION_DATA_W_LSB_VALUEW__REG  \
+BNO055_QUATERNION_DATA_W_LSB_ADDR
+
+/* Quaternion data W-MSB register*/
+#define BNO055_QUATERNION_DATA_W_MSB_VALUEW__POS  0
+#define BNO055_QUATERNION_DATA_W_MSB_VALUEW__MSK  0xFF
+#define BNO055_QUATERNION_DATA_W_MSB_VALUEW__LEN  8
+#define BNO055_QUATERNION_DATA_W_MSB_VALUEW__REG  \
+BNO055_QUATERNION_DATA_W_MSB_ADDR
+
+/* Quaternion data X-LSB register*/
+#define BNO055_QUATERNION_DATA_X_LSB_VALUEX__POS  0
+#define BNO055_QUATERNION_DATA_X_LSB_VALUEX__MSK  0xFF
+#define BNO055_QUATERNION_DATA_X_LSB_VALUEX__LEN  8
+#define BNO055_QUATERNION_DATA_X_LSB_VALUEX__REG  \
+BNO055_QUATERNION_DATA_X_LSB_ADDR
+
+/* Quaternion data X-MSB register*/
+#define BNO055_QUATERNION_DATA_X_MSB_VALUEX__POS  0
+#define BNO055_QUATERNION_DATA_X_MSB_VALUEX__MSK  0xFF
+#define BNO055_QUATERNION_DATA_X_MSB_VALUEX__LEN  8
+#define BNO055_QUATERNION_DATA_X_MSB_VALUEX__REG \
+BNO055_QUATERNION_DATA_X_MSB_ADDR
+
+/* Quaternion data Y-LSB register*/
+#define BNO055_QUATERNION_DATA_Y_LSB_VALUEY__POS  0
+#define BNO055_QUATERNION_DATA_Y_LSB_VALUEY__MSK  0xFF
+#define BNO055_QUATERNION_DATA_Y_LSB_VALUEY__LEN  8
+#define BNO055_QUATERNION_DATA_Y_LSB_VALUEY__REG \
+BNO055_QUATERNION_DATA_Y_LSB_ADDR
+
+/* Quaternion data Y-MSB register*/
+#define BNO055_QUATERNION_DATA_Y_MSB_VALUEY__POS  0
+#define BNO055_QUATERNION_DATA_Y_MSB_VALUEY__MSK  0xFF
+#define BNO055_QUATERNION_DATA_Y_MSB_VALUEY__LEN  8
+#define BNO055_QUATERNION_DATA_Y_MSB_VALUEY__REG  \
+NO055_QUATERNION_DATA_Y_MSB_ADDR
+
+/* Quaternion data Z-LSB register*/
+#define BNO055_QUATERNION_DATA_Z_LSB_VALUEZ__POS  0
+#define BNO055_QUATERNION_DATA_Z_LSB_VALUEZ__MSK  0xFF
+#define BNO055_QUATERNION_DATA_Z_LSB_VALUEZ__LEN  8
+#define BNO055_QUATERNION_DATA_Z_LSB_VALUEZ__REG \
+BNO055_QUATERNION_DATA_Z_LSB_ADDR
+
+/* Quaternion data Z-MSB register*/
+#define BNO055_QUATERNION_DATA_Z_MSB_VALUEZ__POS  0
+#define BNO055_QUATERNION_DATA_Z_MSB_VALUEZ__MSK  0xFF
+#define BNO055_QUATERNION_DATA_Z_MSB_VALUEZ__LEN  8
+#define BNO055_QUATERNION_DATA_Z_MSB_VALUEZ__REG  \
+BNO055_QUATERNION_DATA_Z_MSB_ADDR
+
+/* Linear acceleration data X-LSB register*/
+#define BNO055_LINEAR_ACCEL_DATA_X_LSB_VALUEX__POS  0
+#define BNO055_LINEAR_ACCEL_DATA_X_LSB_VALUEX__MSK  0xFF
+#define BNO055_LINEAR_ACCEL_DATA_X_LSB_VALUEX__LEN  8
+#define BNO055_LINEAR_ACCEL_DATA_X_LSB_VALUEX__REG  \
+BNO055_LINEAR_ACCEL_DATA_X_LSB_ADDR
+
+/* Linear acceleration data X-MSB register*/
+#define BNO055_LINEAR_ACCEL_DATA_X_MSB_VALUEX__POS  0
+#define BNO055_LINEAR_ACCEL_DATA_X_MSB_VALUEX__MSK  0xFF
+#define BNO055_LINEAR_ACCEL_DATA_X_MSB_VALUEX__LEN  8
+#define BNO055_LINEAR_ACCEL_DATA_X_MSB_VALUEX__REG  \
+BNO055_LINEAR_ACCEL_DATA_X_MSB_ADDR
+
+/* Linear acceleration data Y-LSB register*/
+#define BNO055_LINEAR_ACCEL_DATA_Y_LSB_VALUEY__POS  0
+#define BNO055_LINEAR_ACCEL_DATA_Y_LSB_VALUEY__MSK  0xFF
+#define BNO055_LINEAR_ACCEL_DATA_Y_LSB_VALUEY__LEN  8
+#define BNO055_LINEAR_ACCEL_DATA_Y_LSB_VALUEY__REG  \
+BNO055_LINEAR_ACCEL_DATA_Y_LSB_ADDR
+
+/* Linear acceleration data Y-MSB register*/
+#define BNO055_LINEAR_ACCEL_DATA_Y_MSB_VALUEY__POS  0
+#define BNO055_LINEAR_ACCEL_DATA_Y_MSB_VALUEY__MSK  0xFF
+#define BNO055_LINEAR_ACCEL_DATA_Y_MSB_VALUEY__LEN  8
+#define BNO055_LINEAR_ACCEL_DATA_Y_MSB_VALUEY__REG  \
+BNO055_LINEAR_ACCEL_DATA_Y_MSB_ADDR
+
+/* Linear acceleration data Z-LSB register*/
+#define BNO055_LINEAR_ACCEL_DATA_Z_LSB_VALUEZ__POS  0
+#define BNO055_LINEAR_ACCEL_DATA_Z_LSB_VALUEZ__MSK  0xFF
+#define BNO055_LINEAR_ACCEL_DATA_Z_LSB_VALUEZ__LEN  8
+#define BNO055_LINEAR_ACCEL_DATA_Z_LSB_VALUEZ__REG \
+BNO055_LINEAR_ACCEL_DATA_Z_LSB_ADDR
+
+/* Linear acceleration data Z-MSB register*/
+#define BNO055_LINEAR_ACCEL_DATA_Z_MSB_VALUEZ__POS  0
+#define BNO055_LINEAR_ACCEL_DATA_Z_MSB_VALUEZ__MSK  0xFF
+#define BNO055_LINEAR_ACCEL_DATA_Z_MSB_VALUEZ__LEN  8
+#define BNO055_LINEAR_ACCEL_DATA_Z_MSB_VALUEZ__REG  \
+BNO055_LINEAR_ACCEL_DATA_Z_MSB_ADDR
+
+/* Gravity data X-LSB register*/
+#define BNO055_GRAVITY_DATA_X_LSB_VALUEX__POS  0
+#define BNO055_GRAVITY_DATA_X_LSB_VALUEX__MSK  0xFF
+#define BNO055_GRAVITY_DATA_X_LSB_VALUEX__LEN  8
+#define BNO055_GRAVITY_DATA_X_LSB_VALUEX__REG  \
+BNO055_GRAVITY_DATA_X_LSB_ADDR
+
+/* Gravity data X-MSB register*/
+#define BNO055_GRAVITY_DATA_X_MSB_VALUEX__POS  0
+#define BNO055_GRAVITY_DATA_X_MSB_VALUEX__MSK  0xFF
+#define BNO055_GRAVITY_DATA_X_MSB_VALUEX__LEN  8
+#define BNO055_GRAVITY_DATA_X_MSB_VALUEX__REG  \
+BNO055_GRAVITY_DATA_X_MSB_ADDR
+
+/* Gravity data Y-LSB register*/
+#define BNO055_GRAVITY_DATA_Y_LSB_VALUEY__POS  0
+#define BNO055_GRAVITY_DATA_Y_LSB_VALUEY__MSK  0xFF
+#define BNO055_GRAVITY_DATA_Y_LSB_VALUEY__LEN  8
+#define BNO055_GRAVITY_DATA_Y_LSB_VALUEY__REG  \
+BNO055_GRAVITY_DATA_Y_LSB_ADDR
+
+/* Gravity data Y-MSB register*/
+#define BNO055_GRAVITY_DATA_Y_MSB_VALUEY__POS  0
+#define BNO055_GRAVITY_DATA_Y_MSB_VALUEY__MSK  0xFF
+#define BNO055_GRAVITY_DATA_Y_MSB_VALUEY__LEN  8
+#define BNO055_GRAVITY_DATA_Y_MSB_VALUEY__REG  \
+BNO055_GRAVITY_DATA_Y_MSB_ADDR
+
+/* Gravity data Z-LSB register*/
+#define BNO055_GRAVITY_DATA_Z_LSB_VALUEZ__POS  0
+#define BNO055_GRAVITY_DATA_Z_LSB_VALUEZ__MSK  0xFF
+#define BNO055_GRAVITY_DATA_Z_LSB_VALUEZ__LEN  8
+#define BNO055_GRAVITY_DATA_Z_LSB_VALUEZ__REG  \
+BNO055_GRAVITY_DATA_Z_LSB_ADDR
+
+/* Gravity data Z-MSB register*/
+#define BNO055_GRAVITY_DATA_Z_MSB_VALUEZ__POS  0
+#define BNO055_GRAVITY_DATA_Z_MSB_VALUEZ__MSK  0xFF
+#define BNO055_GRAVITY_DATA_Z_MSB_VALUEZ__LEN  8
+#define BNO055_GRAVITY_DATA_Z_MSB_VALUEZ__REG  \
+BNO055_GRAVITY_DATA_Z_MSB_ADDR
+
+/* Temperature register*/
+#define BNO055_TEMP__POS             0
+#define BNO055_TEMP__MSK             0xFF
+#define BNO055_TEMP__LEN             8
+#define BNO055_TEMP__REG             BNO055_TEMP_ADDR
+
+/*Mag_Calib status register*/
+#define BNO055_MAG_CALIB_STAT__POS             0
+#define BNO055_MAG_CALIB_STAT__MSK             0X03
+#define BNO055_MAG_CALIB_STAT__LEN             2
+#define BNO055_MAG_CALIB_STAT__REG             BNO055_CALIB_STAT_ADDR
+
+/*Acc_Calib status register*/
+#define BNO055_ACCEL_CALIB_STAT__POS             2
+#define BNO055_ACCEL_CALIB_STAT__MSK             0X0C
+#define BNO055_ACCEL_CALIB_STAT__LEN             2
+#define BNO055_ACCEL_CALIB_STAT__REG             BNO055_CALIB_STAT_ADDR
+
+/*Gyro_Calib status register*/
+#define BNO055_GYRO_CALIB_STAT__POS             4
+#define BNO055_GYRO_CALIB_STAT__MSK             0X30
+#define BNO055_GYRO_CALIB_STAT__LEN             2
+#define BNO055_GYRO_CALIB_STAT__REG             BNO055_CALIB_STAT_ADDR
+
+/*Sys_Calib status register*/
+#define BNO055_SYS_CALIB_STAT__POS             6
+#define BNO055_SYS_CALIB_STAT__MSK             0XC0
+#define BNO055_SYS_CALIB_STAT__LEN             2
+#define BNO055_SYS_CALIB_STAT__REG             BNO055_CALIB_STAT_ADDR
+
+/*ST_ACCEL register*/
+#define BNO055_SELFTEST_ACCEL__POS             0
+#define BNO055_SELFTEST_ACCEL__MSK             0X01
+#define BNO055_SELFTEST_ACCEL__LEN             1
+#define BNO055_SELFTEST_ACCEL__REG             BNO055_SELFTEST_RESULT_ADDR
+
+/*ST_MAG register*/
+#define BNO055_SELFTEST_MAG__POS             1
+#define BNO055_SELFTEST_MAG__MSK             0X02
+#define BNO055_SELFTEST_MAG__LEN             1
+#define BNO055_SELFTEST_MAG__REG             BNO055_SELFTEST_RESULT_ADDR
+
+/*ST_GYRO register*/
+#define BNO055_SELFTEST_GYRO__POS             2
+#define BNO055_SELFTEST_GYRO__MSK             0X04
+#define BNO055_SELFTEST_GYRO__LEN             1
+#define BNO055_SELFTEST_GYRO__REG             BNO055_SELFTEST_RESULT_ADDR
+
+/*ST_MCU register*/
+#define BNO055_SELFTEST_MCU__POS             3
+#define BNO055_SELFTEST_MCU__MSK             0X08
+#define BNO055_SELFTEST_MCU__LEN             1
+#define BNO055_SELFTEST_MCU__REG             BNO055_SELFTEST_RESULT_ADDR
+
+/*Interrupt status registers*/
+#define BNO055_INTR_STAT_GYRO_ANY_MOTION__POS		2
+#define BNO055_INTR_STAT_GYRO_ANY_MOTION__MSK		0X04
+#define BNO055_INTR_STAT_GYRO_ANY_MOTION__LEN		1
+#define BNO055_INTR_STAT_GYRO_ANY_MOTION__REG		BNO055_INTR_STAT_ADDR
+
+#define BNO055_INTR_STAT_GYRO_HIGHRATE__POS		3
+#define BNO055_INTR_STAT_GYRO_HIGHRATE__MSK		0X08
+#define BNO055_INTR_STAT_GYRO_HIGHRATE__LEN		1
+#define BNO055_INTR_STAT_GYRO_HIGHRATE__REG		BNO055_INTR_STAT_ADDR
+
+#define BNO055_INTR_STAT_ACCEL_HIGH_G__POS		5
+#define BNO055_INTR_STAT_ACCEL_HIGH_G__MSK		0X20
+#define BNO055_INTR_STAT_ACCEL_HIGH_G__LEN		1
+#define BNO055_INTR_STAT_ACCEL_HIGH_G__REG		BNO055_INTR_STAT_ADDR
+
+#define BNO055_INTR_STAT_ACCEL_ANY_MOTION__POS		6
+#define BNO055_INTR_STAT_ACCEL_ANY_MOTION__MSK		0X40
+#define BNO055_INTR_STAT_ACCEL_ANY_MOTION__LEN		1
+#define BNO055_INTR_STAT_ACCEL_ANY_MOTION__REG		BNO055_INTR_STAT_ADDR
+
+#define BNO055_INTR_STAT_ACCEL_NO_MOTION__POS		7
+#define BNO055_INTR_STAT_ACCEL_NO_MOTION__MSK		0X80
+#define BNO055_INTR_STAT_ACCEL_NO_MOTION__LEN		1
+#define BNO055_INTR_STAT_ACCEL_NO_MOTION__REG		BNO055_INTR_STAT_ADDR
+
+/* system clock status register*/
+#define BNO055_SYS_MAIN_CLK__POS		0
+#define BNO055_SYS_MAIN_CLK__MSK		0X10
+#define BNO055_SYS_MAIN_CLK__LEN		1
+#define BNO055_SYS_MAIN_CLK__REG		BNO055_SYS_CLK_STAT_ADDR
+
+/* System registers*/
+#define BNO055_SYS_STAT_CODE__POS		0
+#define BNO055_SYS_STAT_CODE__MSK		0XFF
+#define BNO055_SYS_STAT_CODE__LEN		8
+#define BNO055_SYS_STAT_CODE__REG		BNO055_SYS_STAT_ADDR
+
+#define BNO055_SYS_ERROR_CODE__POS			0
+#define BNO055_SYS_ERROR_CODE__MSK			0XFF
+#define BNO055_SYS_ERROR_CODE__LEN			8
+#define BNO055_SYS_ERROR_CODE__REG			BNO055_SYS_ERR_ADDR
+
+/* Accel_Unit register*/
+#define BNO055_ACCEL_UNIT__POS             0
+#define BNO055_ACCEL_UNIT__MSK             0X01
+#define BNO055_ACCEL_UNIT__LEN             1
+#define BNO055_ACCEL_UNIT__REG             BNO055_UNIT_SEL_ADDR
+
+/* Gyro_Unit register*/
+#define BNO055_GYRO_UNIT__POS             1
+#define BNO055_GYRO_UNIT__MSK             0X02
+#define BNO055_GYRO_UNIT__LEN             1
+#define BNO055_GYRO_UNIT__REG             BNO055_UNIT_SEL_ADDR
+
+/* Euler_Unit register*/
+#define BNO055_EULER_UNIT__POS             2
+#define BNO055_EULER_UNIT__MSK             0X04
+#define BNO055_EULER_UNIT__LEN             1
+#define BNO055_EULER_UNIT__REG             BNO055_UNIT_SEL_ADDR
+
+/* Tilt_Unit register*/
+#define BNO055_TILT_UNIT__POS             3
+#define BNO055_TILT_UNIT__MSK             0X08
+#define BNO055_TILT_UNIT__LEN             1
+#define BNO055_TILT_UNIT__REG             BNO055_UNIT_SEL_ADDR
+
+/* Temperature_Unit register*/
+#define BNO055_TEMP_UNIT__POS             4
+#define BNO055_TEMP_UNIT__MSK             0X10
+#define BNO055_TEMP_UNIT__LEN             1
+#define BNO055_TEMP_UNIT__REG             BNO055_UNIT_SEL_ADDR
+
+/* ORI android-windows register*/
+#define BNO055_DATA_OUTPUT_FORMAT__POS             7
+#define BNO055_DATA_OUTPUT_FORMAT__MSK             0X80
+#define BNO055_DATA_OUTPUT_FORMAT__LEN             1
+#define BNO055_DATA_OUTPUT_FORMAT__REG             BNO055_UNIT_SEL_ADDR
+/*Operation Mode data register*/
+#define BNO055_OPERATION_MODE__POS			0
+#define BNO055_OPERATION_MODE__MSK			0X0F
+#define BNO055_OPERATION_MODE__LEN			4
+#define BNO055_OPERATION_MODE__REG			BNO055_OPR_MODE_ADDR
+/* Power Mode register*/
+#define BNO055_POWER_MODE__POS             0
+#define BNO055_POWER_MODE__MSK             0X03
+#define BNO055_POWER_MODE__LEN             2
+#define BNO055_POWER_MODE__REG             BNO055_PWR_MODE_ADDR
+
+/*Self Test register*/
+#define BNO055_SELFTEST__POS			0
+#define BNO055_SELFTEST__MSK			0X01
+#define BNO055_SELFTEST__LEN			1
+#define BNO055_SELFTEST__REG			BNO055_SYS_TRIGGER_ADDR
+
+/* RST_SYS register*/
+#define BNO055_SYS_RST__POS             5
+#define BNO055_SYS_RST__MSK             0X20
+#define BNO055_SYS_RST__LEN             1
+#define BNO055_SYS_RST__REG             BNO055_SYS_TRIGGER_ADDR
+
+/* RST_INT register*/
+#define BNO055_INTR_RST__POS             6
+#define BNO055_INTR_RST__MSK             0X40
+#define BNO055_INTR_RST__LEN             1
+#define BNO055_INTR_RST__REG             BNO055_SYS_TRIGGER_ADDR
+
+/* CLK_SRC register*/
+#define BNO055_CLK_SRC__POS             7
+#define BNO055_CLK_SRC__MSK             0X80
+#define BNO055_CLK_SRC__LEN             1
+#define BNO055_CLK_SRC__REG             BNO055_SYS_TRIGGER_ADDR
+
+/* Temp source register*/
+#define BNO055_TEMP_SOURCE__POS		0
+#define BNO055_TEMP_SOURCE__MSK		0X03
+#define BNO055_TEMP_SOURCE__LEN		2
+#define BNO055_TEMP_SOURCE__REG		BNO055_TEMP_SOURCE_ADDR
+
+/* Axis remap value register*/
+#define BNO055_REMAP_AXIS_VALUE__POS		0
+#define BNO055_REMAP_AXIS_VALUE__MSK		0X3F
+#define BNO055_REMAP_AXIS_VALUE__LEN		6
+#define BNO055_REMAP_AXIS_VALUE__REG		BNO055_AXIS_MAP_CONFIG_ADDR
+
+/* Axis sign value register*/
+#define BNO055_REMAP_Z_SIGN__POS		0
+#define BNO055_REMAP_Z_SIGN__MSK		0X01
+#define BNO055_REMAP_Z_SIGN__LEN		1
+#define BNO055_REMAP_Z_SIGN__REG		BNO055_AXIS_MAP_SIGN_ADDR
+
+#define BNO055_REMAP_Y_SIGN__POS		1
+#define BNO055_REMAP_Y_SIGN__MSK		0X02
+#define BNO055_REMAP_Y_SIGN__LEN		1
+#define BNO055_REMAP_Y_SIGN__REG		BNO055_AXIS_MAP_SIGN_ADDR
+
+#define BNO055_REMAP_X_SIGN__POS		2
+#define BNO055_REMAP_X_SIGN__MSK		0X04
+#define BNO055_REMAP_X_SIGN__LEN		1
+#define BNO055_REMAP_X_SIGN__REG		BNO055_AXIS_MAP_SIGN_ADDR
+
+/* Soft Iron Calibration matrix register*/
+#define BNO055_SIC_MATRIX_0_LSB__POS		0
+#define BNO055_SIC_MATRIX_0_LSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_0_LSB__LEN		8
+#define BNO055_SIC_MATRIX_0_LSB__REG		BNO055_SIC_MATRIX_0_LSB_ADDR
+
+#define BNO055_SIC_MATRIX_0_MSB__POS		0
+#define BNO055_SIC_MATRIX_0_MSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_0_MSB__LEN		8
+#define BNO055_SIC_MATRIX_0_MSB__REG		BNO055_SIC_MATRIX_0_MSB_ADDR
+
+#define BNO055_SIC_MATRIX_1_LSB__POS		0
+#define BNO055_SIC_MATRIX_1_LSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_1_LSB__LEN		8
+#define BNO055_SIC_MATRIX_1_LSB__REG		BNO055_SIC_MATRIX_1_LSB_ADDR
+
+#define BNO055_SIC_MATRIX_1_MSB__POS		0
+#define BNO055_SIC_MATRIX_1_MSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_1_MSB__LEN		8
+#define BNO055_SIC_MATRIX_1_MSB__REG		BNO055_SIC_MATRIX_1_MSB_ADDR
+
+#define BNO055_SIC_MATRIX_2_LSB__POS		0
+#define BNO055_SIC_MATRIX_2_LSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_2_LSB__LEN		8
+#define BNO055_SIC_MATRIX_2_LSB__REG		BNO055_SIC_MATRIX_2_LSB_ADDR
+
+#define BNO055_SIC_MATRIX_2_MSB__POS		0
+#define BNO055_SIC_MATRIX_2_MSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_2_MSB__LEN		8
+#define BNO055_SIC_MATRIX_2_MSB__REG		BNO055_SIC_MATRIX_2_MSB_ADDR
+
+#define BNO055_SIC_MATRIX_3_LSB__POS		0
+#define BNO055_SIC_MATRIX_3_LSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_3_LSB__LEN		8
+#define BNO055_SIC_MATRIX_3_LSB__REG		BNO055_SIC_MATRIX_3_LSB_ADDR
+
+#define BNO055_SIC_MATRIX_3_MSB__POS		0
+#define BNO055_SIC_MATRIX_3_MSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_3_MSB__LEN		8
+#define BNO055_SIC_MATRIX_3_MSB__REG		BNO055_SIC_MATRIX_3_MSB_ADDR
+
+#define BNO055_SIC_MATRIX_4_LSB__POS		0
+#define BNO055_SIC_MATRIX_4_LSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_4_LSB__LEN		8
+#define BNO055_SIC_MATRIX_4_LSB__REG		BNO055_SIC_MATRIX_4_LSB_ADDR
+
+#define BNO055_SIC_MATRIX_4_MSB__POS		0
+#define BNO055_SIC_MATRIX_4_MSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_4_MSB__LEN		8
+#define BNO055_SIC_MATRIX_4_MSB__REG		BNO055_SIC_MATRIX_4_MSB_ADDR
+
+#define BNO055_SIC_MATRIX_5_LSB__POS		0
+#define BNO055_SIC_MATRIX_5_LSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_5_LSB__LEN		8
+#define BNO055_SIC_MATRIX_5_LSB__REG		BNO055_SIC_MATRIX_5_LSB_ADDR
+
+#define BNO055_SIC_MATRIX_5_MSB__POS		0
+#define BNO055_SIC_MATRIX_5_MSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_5_MSB__LEN		8
+#define BNO055_SIC_MATRIX_5_MSB__REG		BNO055_SIC_MATRIX_5_MSB_ADDR
+
+#define BNO055_SIC_MATRIX_6_LSB__POS		0
+#define BNO055_SIC_MATRIX_6_LSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_6_LSB__LEN		8
+#define BNO055_SIC_MATRIX_6_LSB__REG		BNO055_SIC_MATRIX_6_LSB_ADDR
+
+#define BNO055_SIC_MATRIX_6_MSB__POS		0
+#define BNO055_SIC_MATRIX_6_MSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_6_MSB__LEN		8
+#define BNO055_SIC_MATRIX_6_MSB__REG		BNO055_SIC_MATRIX_6_MSB_ADDR
+
+#define BNO055_SIC_MATRIX_7_LSB__POS		0
+#define BNO055_SIC_MATRIX_7_LSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_7_LSB__LEN		8
+#define BNO055_SIC_MATRIX_7_LSB__REG		BNO055_SIC_MATRIX_7_LSB_ADDR
+
+#define BNO055_SIC_MATRIX_7_MSB__POS		0
+#define BNO055_SIC_MATRIX_7_MSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_7_MSB__LEN		8
+#define BNO055_SIC_MATRIX_7_MSB__REG		BNO055_SIC_MATRIX_7_MSB_ADDR
+
+#define BNO055_SIC_MATRIX_8_LSB__POS		0
+#define BNO055_SIC_MATRIX_8_LSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_8_LSB__LEN		8
+#define BNO055_SIC_MATRIX_8_LSB__REG		BNO055_SIC_MATRIX_8_LSB_ADDR
+
+#define BNO055_SIC_MATRIX_8_MSB__POS		0
+#define BNO055_SIC_MATRIX_8_MSB__MSK		0XFF
+#define BNO055_SIC_MATRIX_8_MSB__LEN		8
+#define BNO055_SIC_MATRIX_8_MSB__REG		BNO055_SIC_MATRIX_8_MSB_ADDR
+
+/*Accel Offset registers*/
+#define BNO055_ACCEL_OFFSET_X_LSB__POS		0
+#define BNO055_ACCEL_OFFSET_X_LSB__MSK		0XFF
+#define BNO055_ACCEL_OFFSET_X_LSB__LEN		8
+#define BNO055_ACCEL_OFFSET_X_LSB__REG		ACCEL_OFFSET_X_LSB_ADDR
+
+#define BNO055_ACCEL_OFFSET_X_MSB__POS		0
+#define BNO055_ACCEL_OFFSET_X_MSB__MSK		0XFF
+#define BNO055_ACCEL_OFFSET_X_MSB__LEN		8
+#define BNO055_ACCEL_OFFSET_X_MSB__REG		ACCEL_OFFSET_X_MSB_ADDR
+
+#define BNO055_ACCEL_OFFSET_Y_LSB__POS		0
+#define BNO055_ACCEL_OFFSET_Y_LSB__MSK		0XFF
+#define BNO055_ACCEL_OFFSET_Y_LSB__LEN		8
+#define BNO055_ACCEL_OFFSET_Y_LSB__REG		ACCEL_OFFSET_Y_LSB_ADDR
+
+#define BNO055_ACCEL_OFFSET_Y_MSB__POS		0
+#define BNO055_ACCEL_OFFSET_Y_MSB__MSK		0XFF
+#define BNO055_ACCEL_OFFSET_Y_MSB__LEN		8
+#define BNO055_ACCEL_OFFSET_Y_MSB__REG		ACCEL_OFFSET_Y_MSB_ADDR
+
+#define BNO055_ACCEL_OFFSET_Z_LSB__POS		0
+#define BNO055_ACCEL_OFFSET_Z_LSB__MSK		0XFF
+#define BNO055_ACCEL_OFFSET_Z_LSB__LEN		8
+#define BNO055_ACCEL_OFFSET_Z_LSB__REG		ACCEL_OFFSET_Z_LSB_ADDR
+
+#define BNO055_ACCEL_OFFSET_Z_MSB__POS		0
+#define BNO055_ACCEL_OFFSET_Z_MSB__MSK		0XFF
+#define BNO055_ACCEL_OFFSET_Z_MSB__LEN		8
+#define BNO055_ACCEL_OFFSET_Z_MSB__REG		ACCEL_OFFSET_Z_MSB_ADDR
+
+/*Mag Offset registers*/
+#define BNO055_MAG_OFFSET_X_LSB__POS		0
+#define BNO055_MAG_OFFSET_X_LSB__MSK		0XFF
+#define BNO055_MAG_OFFSET_X_LSB__LEN		8
+#define BNO055_MAG_OFFSET_X_LSB__REG		MAG_OFFSET_X_LSB_ADDR
+
+#define BNO055_MAG_OFFSET_X_MSB__POS		0
+#define BNO055_MAG_OFFSET_X_MSB__MSK		0XFF
+#define BNO055_MAG_OFFSET_X_MSB__LEN		8
+#define BNO055_MAG_OFFSET_X_MSB__REG		MAG_OFFSET_X_MSB_ADDR
+
+#define BNO055_MAG_OFFSET_Y_LSB__POS		0
+#define BNO055_MAG_OFFSET_Y_LSB__MSK		0XFF
+#define BNO055_MAG_OFFSET_Y_LSB__LEN		8
+#define BNO055_MAG_OFFSET_Y_LSB__REG		MAG_OFFSET_Y_LSB_ADDR
+
+#define BNO055_MAG_OFFSET_Y_MSB__POS		0
+#define BNO055_MAG_OFFSET_Y_MSB__MSK		0XFF
+#define BNO055_MAG_OFFSET_Y_MSB__LEN		8
+#define BNO055_MAG_OFFSET_Y_MSB__REG		MAG_OFFSET_Y_MSB_ADDR
+
+#define BNO055_MAG_OFFSET_Z_LSB__POS		0
+#define BNO055_MAG_OFFSET_Z_LSB__MSK		0XFF
+#define BNO055_MAG_OFFSET_Z_LSB__LEN		8
+#define BNO055_MAG_OFFSET_Z_LSB__REG		MAG_OFFSET_Z_LSB_ADDR
+
+#define BNO055_MAG_OFFSET_Z_MSB__POS		0
+#define BNO055_MAG_OFFSET_Z_MSB__MSK		0XFF
+#define BNO055_MAG_OFFSET_Z_MSB__LEN		8
+#define BNO055_MAG_OFFSET_Z_MSB__REG		MAG_OFFSET_Z_MSB_ADDR
+
+/* Gyro Offset registers*/
+#define BNO055_GYRO_OFFSET_X_LSB__POS		0
+#define BNO055_GYRO_OFFSET_X_LSB__MSK		0XFF
+#define BNO055_GYRO_OFFSET_X_LSB__LEN		8
+#define BNO055_GYRO_OFFSET_X_LSB__REG		GYRO_OFFSET_X_LSB_ADDR
+
+#define BNO055_GYRO_OFFSET_X_MSB__POS		0
+#define BNO055_GYRO_OFFSET_X_MSB__MSK		0XFF
+#define BNO055_GYRO_OFFSET_X_MSB__LEN		8
+#define BNO055_GYRO_OFFSET_X_MSB__REG		GYRO_OFFSET_X_MSB_ADDR
+
+#define BNO055_GYRO_OFFSET_Y_LSB__POS		0
+#define BNO055_GYRO_OFFSET_Y_LSB__MSK		0XFF
+#define BNO055_GYRO_OFFSET_Y_LSB__LEN		8
+#define BNO055_GYRO_OFFSET_Y_LSB__REG		GYRO_OFFSET_Y_LSB_ADDR
+
+#define BNO055_GYRO_OFFSET_Y_MSB__POS		0
+#define BNO055_GYRO_OFFSET_Y_MSB__MSK		0XFF
+#define BNO055_GYRO_OFFSET_Y_MSB__LEN		8
+#define BNO055_GYRO_OFFSET_Y_MSB__REG		GYRO_OFFSET_Y_MSB_ADDR
+
+#define BNO055_GYRO_OFFSET_Z_LSB__POS		0
+#define BNO055_GYRO_OFFSET_Z_LSB__MSK		0XFF
+#define BNO055_GYRO_OFFSET_Z_LSB__LEN		8
+#define BNO055_GYRO_OFFSET_Z_LSB__REG		GYRO_OFFSET_Z_LSB_ADDR
+
+#define BNO055_GYRO_OFFSET_Z_MSB__POS		0
+#define BNO055_GYRO_OFFSET_Z_MSB__MSK		0XFF
+#define BNO055_GYRO_OFFSET_Z_MSB__LEN		8
+#define BNO055_GYRO_OFFSET_Z_MSB__REG		GYRO_OFFSET_Z_MSB_ADDR
+
+/* Radius register definition*/
+#define BNO055_ACCEL_RADIUS_LSB__POS		0
+#define BNO055_ACCEL_RADIUS_LSB__MSK		0XFF
+#define BNO055_ACCEL_RADIUS_LSB__LEN		8
+#define BNO055_ACCEL_RADIUS_LSB__REG		ACCEL_RADIUS_LSB_ADDR
+
+#define BNO055_ACCEL_RADIUS_MSB__POS		0
+#define BNO055_ACCEL_RADIUS_MSB__MSK		0XFF
+#define BNO055_ACCEL_RADIUS_MSB__LEN		8
+#define BNO055_ACCEL_RADIUS_MSB__REG		ACCEL_RADIUS_MSB_ADDR
+
+#define BNO055_MAG_RADIUS_LSB__POS		0
+#define BNO055_MAG_RADIUS_LSB__MSK		0XFF
+#define BNO055_MAG_RADIUS_LSB__LEN		8
+#define BNO055_MAG_RADIUS_LSB__REG		MAG_RADIUS_LSB_ADDR
+
+#define BNO055_MAG_RADIUS_MSB__POS		0
+#define BNO055_MAG_RADIUS_MSB__MSK		0XFF
+#define BNO055_MAG_RADIUS_MSB__LEN		8
+#define BNO055_MAG_RADIUS_MSB__REG		MAG_RADIUS_MSB_ADDR
+
+/* PAGE0 DATA REGISTERS DEFINITION END*/
+/*************************************************/
+/**\name PAGE1 DATA REGISTERS DEFINITION   */
+/*************************************************/
+/* Configuration registers*/
+/* Accel range configuration register*/
+#define BNO055_ACCEL_RANGE__POS		0
+#define BNO055_ACCEL_RANGE__MSK		0X03
+#define BNO055_ACCEL_RANGE__LEN		2
+#define BNO055_ACCEL_RANGE__REG		ACCEL_CONFIG_ADDR
+
+/* Accel bandwidth configuration register*/
+#define BNO055_ACCEL_BW__POS			2
+#define BNO055_ACCEL_BW__MSK			0X1C
+#define BNO055_ACCEL_BW__LEN			3
+#define BNO055_ACCEL_BW__REG			ACCEL_CONFIG_ADDR
+
+/* Accel power mode configuration register*/
+#define BNO055_ACCEL_POWER_MODE__POS		5
+#define BNO055_ACCEL_POWER_MODE__MSK		0XE0
+#define BNO055_ACCEL_POWER_MODE__LEN		3
+#define BNO055_ACCEL_POWER_MODE__REG		ACCEL_CONFIG_ADDR
+
+/* Mag data output rate configuration register*/
+#define BNO055_MAG_DATA_OUTPUT_RATE__POS		0
+#define BNO055_MAG_DATA_OUTPUT_RATE__MSK		0X07
+#define BNO055_MAG_DATA_OUTPUT_RATE__LEN		3
+#define BNO055_MAG_DATA_OUTPUT_RATE__REG		MAG_CONFIG_ADDR
+
+/* Mag operation mode configuration register*/
+#define BNO055_MAG_OPERATION_MODE__POS		3
+#define BNO055_MAG_OPERATION_MODE__MSK		0X18
+#define BNO055_MAG_OPERATION_MODE__LEN		2
+#define BNO055_MAG_OPERATION_MODE__REG		MAG_CONFIG_ADDR
+
+/* Mag power mode configuration register*/
+#define BNO055_MAG_POWER_MODE__POS		5
+#define BNO055_MAG_POWER_MODE__MSK		0X60
+#define BNO055_MAG_POWER_MODE__LEN		2
+#define BNO055_MAG_POWER_MODE__REG		MAG_CONFIG_ADDR
+
+/* Gyro range configuration register*/
+#define BNO055_GYRO_RANGE__POS		0
+#define BNO055_GYRO_RANGE__MSK		0X07
+#define BNO055_GYRO_RANGE__LEN		3
+#define BNO055_GYRO_RANGE__REG		GYRO_CONFIG_ADDR
+
+/* Gyro bandwidth configuration register*/
+#define BNO055_GYRO_BW__POS		3
+#define BNO055_GYRO_BW__MSK		0X38
+#define BNO055_GYRO_BW__LEN		3
+#define BNO055_GYRO_BW__REG		GYRO_CONFIG_ADDR
+
+/* Gyro power mode configuration register*/
+#define BNO055_GYRO_POWER_MODE__POS		0
+#define BNO055_GYRO_POWER_MODE__MSK		0X07
+#define BNO055_GYRO_POWER_MODE__LEN		3
+#define BNO055_GYRO_POWER_MODE__REG		GYRO_MODE_CONFIG_ADDR
+
+/* Sleep configuration registers*/
+/* Accel sleep mode configuration register*/
+#define BNO055_ACCEL_SLEEP_MODE__POS		0
+#define BNO055_ACCEL_SLEEP_MODE__MSK		0X01
+#define BNO055_ACCEL_SLEEP_MODE__LEN		1
+#define BNO055_ACCEL_SLEEP_MODE__REG		ACCEL_SLEEP_CONFIG_ADDR
+
+/* Accel sleep duration configuration register*/
+#define BNO055_ACCEL_SLEEP_DURN__POS		1
+#define BNO055_ACCEL_SLEEP_DURN__MSK		0X1E
+#define BNO055_ACCEL_SLEEP_DURN__LEN		4
+#define BNO055_ACCEL_SLEEP_DURN__REG		ACCEL_SLEEP_CONFIG_ADDR
+
+/* Gyro sleep duration configuration register*/
+#define BNO055_GYRO_SLEEP_DURN__POS		0
+#define BNO055_GYRO_SLEEP_DURN__MSK		0X07
+#define BNO055_GYRO_SLEEP_DURN__LEN		3
+#define BNO055_GYRO_SLEEP_DURN__REG		GYRO_SLEEP_CONFIG_ADDR
+
+/* Gyro auto sleep duration configuration register*/
+#define BNO055_GYRO_AUTO_SLEEP_DURN__POS		3
+#define BNO055_GYRO_AUTO_SLEEP_DURN__MSK		0X38
+#define BNO055_GYRO_AUTO_SLEEP_DURN__LEN		3
+#define BNO055_GYRO_AUTO_SLEEP_DURN__REG		GYRO_SLEEP_CONFIG_ADDR
+
+/* Mag sleep mode configuration register*/
+#define BNO055_MAG_SLEEP_MODE__POS		0
+#define BNO055_MAG_SLEEP_MODE__MSK		0X01
+#define BNO055_MAG_SLEEP_MODE__LEN		1
+#define BNO055_MAG_SLEEP_MODE__REG		MAG_SLEEP_CONFIG_ADDR
+
+/* Mag sleep duration configuration register*/
+#define BNO055_MAG_SLEEP_DURN__POS		1
+#define BNO055_MAG_SLEEP_DURN__MSK		0X1E
+#define BNO055_MAG_SLEEP_DURN__LEN		4
+#define BNO055_MAG_SLEEP_DURN__REG		MAG_SLEEP_CONFIG_ADDR
+
+/* Interrupt registers*/
+/* Gyro any motion interrupt msk register*/
+#define BNO055_GYRO_ANY_MOTION_INTR_MASK__POS		2
+#define BNO055_GYRO_ANY_MOTION_INTR_MASK__MSK		0X04
+#define BNO055_GYRO_ANY_MOTION_INTR_MASK__LEN		1
+#define BNO055_GYRO_ANY_MOTION_INTR_MASK__REG		INT_MASK_ADDR
+
+/* Gyro high rate interrupt msk register*/
+#define BNO055_GYRO_HIGHRATE_INTR_MASK__POS		3
+#define BNO055_GYRO_HIGHRATE_INTR_MASK__MSK		0X08
+#define BNO055_GYRO_HIGHRATE_INTR_MASK__LEN		1
+#define BNO055_GYRO_HIGHRATE_INTR_MASK__REG		INT_MASK_ADDR
+
+/* Accel high g interrupt msk register*/
+#define BNO055_ACCEL_HIGH_G_INTR_MASK__POS		5
+#define BNO055_ACCEL_HIGH_G_INTR_MASK__MSK		0X20
+#define BNO055_ACCEL_HIGH_G_INTR_MASK__LEN		1
+#define BNO055_ACCEL_HIGH_G_INTR_MASK__REG		INT_MASK_ADDR
+
+/* Accel any motion interrupt msk register*/
+#define BNO055_ACCEL_ANY_MOTION_INTR_MASK__POS		6
+#define BNO055_ACCEL_ANY_MOTION_INTR_MASK__MSK		0X40
+#define BNO055_ACCEL_ANY_MOTION_INTR_MASK__LEN		1
+#define BNO055_ACCEL_ANY_MOTION_INTR_MASK__REG		INT_MASK_ADDR
+
+/* Accel any motion interrupt msk register*/
+#define BNO055_ACCEL_NO_MOTION_INTR_MASK__POS		7
+#define BNO055_ACCEL_NO_MOTION_INTR_MASK__MSK		0X80
+#define BNO055_ACCEL_NO_MOTION_INTR_MASK__LEN		1
+#define BNO055_ACCEL_NO_MOTION_INTR_MASK__REG		INT_MASK_ADDR
+
+/* Gyro any motion interrupt register*/
+#define BNO055_GYRO_ANY_MOTION_INTR__POS		2
+#define BNO055_GYRO_ANY_MOTION_INTR__MSK		0X04
+#define BNO055_GYRO_ANY_MOTION_INTR__LEN		1
+#define BNO055_GYRO_ANY_MOTION_INTR__REG		INT_ADDR
+
+/* Gyro high rate interrupt register*/
+#define BNO055_GYRO_HIGHRATE_INTR__POS		3
+#define BNO055_GYRO_HIGHRATE_INTR__MSK		0X08
+#define BNO055_GYRO_HIGHRATE_INTR__LEN		1
+#define BNO055_GYRO_HIGHRATE_INTR__REG		INT_ADDR
+
+/* Accel high g interrupt register*/
+#define BNO055_ACCEL_HIGH_G_INTR__POS		5
+#define BNO055_ACCEL_HIGH_G_INTR__MSK		0X20
+#define BNO055_ACCEL_HIGH_G_INTR__LEN		1
+#define BNO055_ACCEL_HIGH_G_INTR__REG		INT_ADDR
+
+/* Accel any motion interrupt register*/
+#define BNO055_ACCEL_ANY_MOTION_INTR__POS		6
+#define BNO055_ACCEL_ANY_MOTION_INTR__MSK		0X40
+#define BNO055_ACCEL_ANY_MOTION_INTR__LEN		1
+#define BNO055_ACCEL_ANY_MOTION_INTR__REG		INT_ADDR
+
+/*Accel any motion interrupt register*/
+#define BNO055_ACCEL_NO_MOTION_INTR__POS		7
+#define BNO055_ACCEL_NO_MOTION_INTR__MSK		0X80
+#define BNO055_ACCEL_NO_MOTION_INTR__LEN		1
+#define BNO055_ACCEL_NO_MOTION_INTR__REG		INT_ADDR
+
+/*Accel any motion threshold setting*/
+#define BNO055_ACCEL_ANY_MOTION_THRES__POS	0
+#define BNO055_ACCEL_ANY_MOTION_THRES__MSK	0XFF
+#define BNO055_ACCEL_ANY_MOTION_THRES__LEN	8
+#define BNO055_ACCEL_ANY_MOTION_THRES__REG	ACCEL_ANY_MOTION_THRES_ADDR
+
+/*Accel interrupt setting register*/
+#define BNO055_ACCEL_ANY_MOTION_DURN_SET__POS		0
+#define BNO055_ACCEL_ANY_MOTION_DURN_SET__MSK		0X03
+#define BNO055_ACCEL_ANY_MOTION_DURN_SET__LEN		2
+#define BNO055_ACCEL_ANY_MOTION_DURN_SET__REG		ACCEL_INTR_SETTINGS_ADDR
+
+/* Accel AM/NM axis selection register*/
+#define BNO055_ACCEL_ANY_MOTION_X_AXIS__POS		2
+#define BNO055_ACCEL_ANY_MOTION_X_AXIS__MSK		0X04
+#define BNO055_ACCEL_ANY_MOTION_X_AXIS__LEN		1
+#define BNO055_ACCEL_ANY_MOTION_X_AXIS__REG		ACCEL_INTR_SETTINGS_ADDR
+
+#define BNO055_ACCEL_ANY_MOTION_Y_AXIS__POS		3
+#define BNO055_ACCEL_ANY_MOTION_Y_AXIS__MSK		0X08
+#define BNO055_ACCEL_ANY_MOTION_Y_AXIS__LEN		1
+#define BNO055_ACCEL_ANY_MOTION_Y_AXIS__REG		ACCEL_INTR_SETTINGS_ADDR
+
+#define BNO055_ACCEL_ANY_MOTION_Z_AXIS__POS		4
+#define BNO055_ACCEL_ANY_MOTION_Z_AXIS__MSK		0X10
+#define BNO055_ACCEL_ANY_MOTION_Z_AXIS__LEN		1
+#define BNO055_ACCEL_ANY_MOTION_Z_AXIS__REG		ACCEL_INTR_SETTINGS_ADDR
+
+/* Accel high g axis selection register*/
+#define BNO055_ACCEL_HIGH_G_X_AXIS__POS		5
+#define BNO055_ACCEL_HIGH_G_X_AXIS__MSK		0X20
+#define BNO055_ACCEL_HIGH_G_X_AXIS__LEN		1
+#define BNO055_ACCEL_HIGH_G_X_AXIS__REG		ACCEL_INTR_SETTINGS_ADDR
+
+#define BNO055_ACCEL_HIGH_G_Y_AXIS__POS		6
+#define BNO055_ACCEL_HIGH_G_Y_AXIS__MSK		0X40
+#define BNO055_ACCEL_HIGH_G_Y_AXIS__LEN		1
+#define BNO055_ACCEL_HIGH_G_Y_AXIS__REG		ACCEL_INTR_SETTINGS_ADDR
+
+#define BNO055_ACCEL_HIGH_G_Z_AXIS__POS		7
+#define BNO055_ACCEL_HIGH_G_Z_AXIS__MSK		0X80
+#define BNO055_ACCEL_HIGH_G_Z_AXIS__LEN		1
+#define BNO055_ACCEL_HIGH_G_Z_AXIS__REG		ACCEL_INTR_SETTINGS_ADDR
+
+/* Accel High g duration setting register*/
+#define BNO055_ACCEL_HIGH_G_DURN__POS		0
+#define BNO055_ACCEL_HIGH_G_DURN__MSK		0XFF
+#define BNO055_ACCEL_HIGH_G_DURN__LEN		8
+#define BNO055_ACCEL_HIGH_G_DURN__REG		ACCEL_HIGH_G_DURN_ADDR
+
+/* Accel High g threshold setting register*/
+#define BNO055_ACCEL_HIGH_G_THRES__POS		0
+#define BNO055_ACCEL_HIGH_G_THRES__MSK		0XFF
+#define BNO055_ACCEL_HIGH_G_THRES__LEN		8
+#define BNO055_ACCEL_HIGH_G_THRES__REG		ACCEL_HIGH_G_THRES_ADDR
+
+/* Accel no/slow motion threshold setting*/
+#define BNO055_ACCEL_SLOW_NO_MOTION_THRES__POS		0
+#define BNO055_ACCEL_SLOW_NO_MOTION_THRES__MSK		0XFF
+#define BNO055_ACCEL_SLOW_NO_MOTION_THRES__LEN		8
+#define BNO055_ACCEL_SLOW_NO_MOTION_THRES__REG		\
+ACCEL_NO_MOTION_THRES_ADDR
+
+/* Accel no/slow motion enable setting*/
+#define BNO055_ACCEL_SLOW_NO_MOTION_ENABLE__POS		0
+#define BNO055_ACCEL_SLOW_NO_MOTION_ENABLE__MSK		0X01
+#define BNO055_ACCEL_SLOW_NO_MOTION_ENABLE__LEN		1
+#define BNO055_ACCEL_SLOW_NO_MOTION_ENABLE__REG		ACCEL_NO_MOTION_SET_ADDR
+
+/* Accel no/slow motion duration setting*/
+#define BNO055_ACCEL_SLOW_NO_MOTION_DURN__POS		1
+#define BNO055_ACCEL_SLOW_NO_MOTION_DURN__MSK		0X7E
+#define BNO055_ACCEL_SLOW_NO_MOTION_DURN__LEN		6
+#define BNO055_ACCEL_SLOW_NO_MOTION_DURN__REG		ACCEL_NO_MOTION_SET_ADDR
+
+/*Gyro interrupt setting register*/
+/*Gyro any motion axis setting*/
+#define BNO055_GYRO_ANY_MOTION_X_AXIS__POS		0
+#define BNO055_GYRO_ANY_MOTION_X_AXIS__MSK		0X01
+#define BNO055_GYRO_ANY_MOTION_X_AXIS__LEN		1
+#define BNO055_GYRO_ANY_MOTION_X_AXIS__REG		GYRO_INTR_SETING_ADDR
+
+#define BNO055_GYRO_ANY_MOTION_Y_AXIS__POS		1
+#define BNO055_GYRO_ANY_MOTION_Y_AXIS__MSK		0X02
+#define BNO055_GYRO_ANY_MOTION_Y_AXIS__LEN		1
+#define BNO055_GYRO_ANY_MOTION_Y_AXIS__REG		GYRO_INTR_SETING_ADDR
+
+#define BNO055_GYRO_ANY_MOTION_Z_AXIS__POS		2
+#define BNO055_GYRO_ANY_MOTION_Z_AXIS__MSK		0X04
+#define BNO055_GYRO_ANY_MOTION_Z_AXIS__LEN		1
+#define BNO055_GYRO_ANY_MOTION_Z_AXIS__REG		GYRO_INTR_SETING_ADDR
+
+/*Gyro high rate axis setting*/
+#define BNO055_GYRO_HIGHRATE_X_AXIS__POS		3
+#define BNO055_GYRO_HIGHRATE_X_AXIS__MSK		0X08
+#define BNO055_GYRO_HIGHRATE_X_AXIS__LEN		1
+#define BNO055_GYRO_HIGHRATE_X_AXIS__REG		GYRO_INTR_SETING_ADDR
+
+#define BNO055_GYRO_HIGHRATE_Y_AXIS__POS		4
+#define BNO055_GYRO_HIGHRATE_Y_AXIS__MSK		0X10
+#define BNO055_GYRO_HIGHRATE_Y_AXIS__LEN		1
+#define BNO055_GYRO_HIGHRATE_Y_AXIS__REG		GYRO_INTR_SETING_ADDR
+
+#define BNO055_GYRO_HIGHRATE_Z_AXIS__POS		5
+#define BNO055_GYRO_HIGHRATE_Z_AXIS__MSK		0X20
+#define BNO055_GYRO_HIGHRATE_Z_AXIS__LEN		1
+#define BNO055_GYRO_HIGHRATE_Z_AXIS__REG		GYRO_INTR_SETING_ADDR
+
+/* Gyro filter setting*/
+#define BNO055_GYRO_ANY_MOTION_FILTER__POS		6
+#define BNO055_GYRO_ANY_MOTION_FILTER__MSK		0X40
+#define BNO055_GYRO_ANY_MOTION_FILTER__LEN		1
+#define BNO055_GYRO_ANY_MOTION_FILTER__REG		GYRO_INTR_SETING_ADDR
+
+#define BNO055_GYRO_HIGHRATE_FILTER__POS		7
+#define BNO055_GYRO_HIGHRATE_FILTER__MSK		0X80
+#define BNO055_GYRO_HIGHRATE_FILTER__LEN		1
+#define BNO055_GYRO_HIGHRATE_FILTER__REG		GYRO_INTR_SETING_ADDR
+
+/* Gyro high rate X axis settings*/
+#define BNO055_GYRO_HIGHRATE_X_THRES__POS		0
+#define BNO055_GYRO_HIGHRATE_X_THRES__MSK		0X1F
+#define BNO055_GYRO_HIGHRATE_X_THRES__LEN		5
+#define BNO055_GYRO_HIGHRATE_X_THRES__REG		GYRO_HIGHRATE_X_SET_ADDR
+
+#define BNO055_GYRO_HIGHRATE_X_HYST__POS		5
+#define BNO055_GYRO_HIGHRATE_X_HYST__MSK		0X60
+#define BNO055_GYRO_HIGHRATE_X_HYST__LEN		2
+#define BNO055_GYRO_HIGHRATE_X_HYST__REG		GYRO_HIGHRATE_X_SET_ADDR
+
+#define BNO055_GYRO_HIGHRATE_X_DURN__POS		0
+#define BNO055_GYRO_HIGHRATE_X_DURN__MSK		0XFF
+#define BNO055_GYRO_HIGHRATE_X_DURN__LEN		8
+#define BNO055_GYRO_HIGHRATE_X_DURN__REG		GYRO_DURN_X_ADDR
+
+/* Gyro high rate Y axis settings*/
+#define BNO055_GYRO_HIGHRATE_Y_THRES__POS		0
+#define BNO055_GYRO_HIGHRATE_Y_THRES__MSK		0X1F
+#define BNO055_GYRO_HIGHRATE_Y_THRES__LEN		5
+#define BNO055_GYRO_HIGHRATE_Y_THRES__REG		GYRO_HIGHRATE_Y_SET_ADDR
+
+#define BNO055_GYRO_HIGHRATE_Y_HYST__POS		5
+#define BNO055_GYRO_HIGHRATE_Y_HYST__MSK		0X60
+#define BNO055_GYRO_HIGHRATE_Y_HYST__LEN		2
+#define BNO055_GYRO_HIGHRATE_Y_HYST__REG		GYRO_HIGHRATE_Y_SET_ADDR
+
+#define BNO055_GYRO_HIGHRATE_Y_DURN__POS		0
+#define BNO055_GYRO_HIGHRATE_Y_DURN__MSK		0XFF
+#define BNO055_GYRO_HIGHRATE_Y_DURN__LEN		8
+#define BNO055_GYRO_HIGHRATE_Y_DURN__REG		GYRO_DURN_Y_ADDR
+
+/* Gyro high rate Z axis settings*/
+#define BNO055_GYRO_HIGHRATE_Z_THRES__POS		0
+#define BNO055_GYRO_HIGHRATE_Z_THRES__MSK		0X1F
+#define BNO055_GYRO_HIGHRATE_Z_THRES__LEN		5
+#define BNO055_GYRO_HIGHRATE_Z_THRES__REG		GYRO_HIGHRATE_Z_SET_ADDR
+
+#define BNO055_GYRO_HIGHRATE_Z_HYST__POS		5
+#define BNO055_GYRO_HIGHRATE_Z_HYST__MSK		0X60
+#define BNO055_GYRO_HIGHRATE_Z_HYST__LEN		2
+#define BNO055_GYRO_HIGHRATE_Z_HYST__REG		GYRO_HIGHRATE_Z_SET_ADDR
+
+#define BNO055_GYRO_HIGHRATE_Z_DURN__POS		0
+#define BNO055_GYRO_HIGHRATE_Z_DURN__MSK		0XFF
+#define BNO055_GYRO_HIGHRATE_Z_DURN__LEN		8
+#define BNO055_GYRO_HIGHRATE_Z_DURN__REG		GYRO_DURN_Z_ADDR
+
+/*Gyro any motion threshold setting*/
+#define BNO055_GYRO_ANY_MOTION_THRES__POS		0
+#define BNO055_GYRO_ANY_MOTION_THRES__MSK		0X7F
+#define BNO055_GYRO_ANY_MOTION_THRES__LEN		7
+#define BNO055_GYRO_ANY_MOTION_THRES__REG		\
+GYRO_ANY_MOTION_THRES_ADDR
+
+/* Gyro any motion slope sample setting*/
+#define BNO055_GYRO_SLOPE_SAMPLES__POS		0
+#define BNO055_GYRO_SLOPE_SAMPLES__MSK		0X03
+#define BNO055_GYRO_SLOPE_SAMPLES__LEN		2
+#define BNO055_GYRO_SLOPE_SAMPLES__REG		GYRO_ANY_MOTION_SET_ADDR
+
+/* Gyro awake duration setting*/
+#define BNO055_GYRO_AWAKE_DURN__POS		2
+#define BNO055_GYRO_AWAKE_DURN__MSK		0X0C
+#define BNO055_GYRO_AWAKE_DURN__LEN		2
+#define BNO055_GYRO_AWAKE_DURN__REG		GYRO_ANY_MOTION_SET_ADDR
+
+/* PAGE1 DATA REGISTERS DEFINITION END*/
+/*************************************************/
+/**\name GET AND SET BITSLICE FUNCTIONS    */
+/*************************************************/
+#define BNO055_GET_BITSLICE(regvar, bitname)\
+((regvar & bitname##__MSK) >> bitname##__POS)
+
+
+#define BNO055_SET_BITSLICE(regvar, bitname, val)\
+((regvar & ~bitname##__MSK) | ((val<<bitname##__POS)&bitname##__MSK))
+/*************************************************/
+/**\name FUNCTION DECLARATION    */
+/*************************************************/
+/**************************************************/
+/**\name INITIALIZATION AND REVISION ID FUNCTIONS */
+/**************************************************/
+/*!
+ *	@brief
+ *	This function is used for initialize
+ *	bus read, bus write function pointers,device
+ *	address,accel revision id, gyro revision id
+ *	mag revision id, software revision id, boot loader
+ *	revision id and page id
+ *
+ *	@param  bno055 - structure pointer
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While changing the parameter of the bno055_t
+ *	consider the following point:
+ *	Changing the reference value of the parameter
+ *	will changes the local copy or local reference
+ *	make sure your changes will not
+ *	affect the reference value of the parameter
+ *	(Better case don't change the reference value of the parameter)
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_init(struct bno055_t *bno055);
+/*!
+ *	@brief
+ *	This API gives data to the given register and
+ *	the data is written in the corresponding register address
+ *
+ *  @param v_addr_u_8 : Address of the register
+ *	@param p_data_u_8 : Data to be written to the register
+ *	@param v_len_u_8  : Length of the Data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+*/
+BNO055_RETURN_FUNCTION_TYPE bno055_write_register(u_8 v_addr_u_8,
+u_8 *p_data_u_8, u_8 v_len_u_8);
+/*!
+ *	@brief This API reads the data from
+ *	the given register address
+ *
+ *  @param v_addr_u_8 : Address of the register
+ *  @param p_data_u_8 : address of the variable,
+ *	read value will be kept
+ *  @param v_len_u_8  : Length of the data
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_register(u_8 v_addr_u_8,
+u_8 *p_data_u_8, u_8 v_len_u_8);
+/*!
+ *	@brief This API reads chip id
+ *	from register 0x00 it is a byte of data
+ *
+ *
+ *	@param v_chip_id_u_8 : The chip id value 0xA0
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_chip_id(u_8 *v_chip_id_u_8);
+/*!
+ *	@brief This API reads software revision id
+ *	from register 0x04 and 0x05 it is a two byte of data
+ *
+ *	@param v_sw_id_u_8 : The SW revision id
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_sw_rev_id(u_16 *v_sw_id_u_8);
+/*!
+ *	@brief This API reads page id
+ *	from register 0x07 it is a byte of data
+ *
+ *
+ *	@param v_page_id_u_8 : The value of page id
+ *
+ *	PAGE_ZERO -> 0x00
+ *	PAGE_ONE  -> 0x01
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_page_id(u_8 *v_page_id_u_8);
+/*!
+ *	@brief This API used to write
+ *	the page id register 0x07
+ *
+ *	@param v_page_id_u_8 : The value of page id
+ *
+ *	PAGE_ZERO -> 0x00
+ *	PAGE_ONE  -> 0x01
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_page_id(u_8 v_page_id_u_8);
+/*!
+ *	@brief This API reads accel revision id
+ *	from register 0x01 it is a byte of value
+ *
+ *	@param v_accel_rev_id_u_8 : The accel revision id 0xFB
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_rev_id(
+u_8 *v_accel_rev_id_u_8);
+/*!
+ *	@brief This API reads mag revision id
+ *	from register 0x02 it is a byte of value
+ *
+ *	@param v_mag_rev_id_u_8 : The mag revision id 0x32
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_rev_id(
+u_8 *v_mag_rev_id_u_8);
+/*!
+ *	@brief This API reads gyro revision id
+ *	from register 0x03 it is a byte of value
+ *
+ *	@param v_gyro_rev_id_u_8 : The gyro revision id 0xF0
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_rev_id(
+u_8 *v_gyro_rev_id_u_8);
+/*!
+ *	@brief This API used to read boot loader revision id
+ *	from register 0x06 it is a byte of value
+ *
+ *	@param v_bl_rev_id_u_8 : The boot loader revision id
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_bl_rev_id(
+u_8 *v_bl_rev_id_u_8);
+/**************************************************/
+/**\name ACCEL DATA READ FUNCTIONS */
+/**************************************************/
+/*!
+ *	@brief This API reads acceleration data X values
+ *	from register 0x08 and 0x09 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_accel_x_s_16 : The X raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_x(s_16 *v_accel_x_s_16);
+/*!
+ *	@brief This API reads acceleration data Y values
+ *	from register 0x0A and 0x0B it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_accel_y_s_16 : The Y raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_y(s_16 *v_accel_y_s_16);
+/*!
+ *	@brief This API reads acceleration data z values
+ *	from register 0x0C and 0x0D it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_accel_z_s_16 : The z raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_z(s_16 *v_accel_z_s_16);
+/*!
+ *	@brief This API reads acceleration data xyz values
+ *	from register 0x08 to 0x0D it is a six byte data
+ *
+ *
+ *	@param accel : The value of accel xyz data
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The accel x data
+ *	 y        | The accel y data
+ *	 z        | The accel z data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_xyz(
+struct bno055_accel_t *accel);
+/**************************************************/
+/**\name MAG DATA READ FUNCTIONS */
+/**************************************************/
+/*!
+ *	@brief This API reads mag data x values
+ *	from register 0x0E and 0x0F it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_mag_x_s_16 : The x raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_x(s_16 *v_mag_x_s_16);
+/*!
+ *	@brief This API reads mag data y values
+ *	from register 0x10 and 0x11 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_mag_y_s_16 : The y raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_y(s_16 *v_mag_y_s_16);
+/*!
+ *	@brief This API reads mag data z values
+ *	from register 0x12 and 0x13 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_mag_z_s_16 : The z raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_z(s_16 *v_mag_z_s_16);
+/*!
+ *	@brief This API reads mag data xyz values
+ *	from register 0x0E to 0x13 it is a six byte data
+ *
+ *
+ *	@param mag : The mag xyz values
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The mag x data
+ *	 y        | The mag y data
+ *	 z        | The mag z data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_xyz(struct bno055_mag_t *mag);
+/**************************************************/
+/**\name GYRO DATA READ FUNCTIONS */
+/**************************************************/
+/*!
+ *	@brief This API reads gyro data x values
+ *	from register 0x14 and 0x15 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_gyro_x_s_16 : The x raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_x(s_16 *v_gyro_x_s_16);
+/*!
+ *	@brief This API reads gyro data y values
+ *	from register 0x16 and 0x17 it is a two byte data
+ *
+ *
+ *
+ *
+ *	@param v_gyro_y_s_16 : The y raw data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_y(s_16 *v_gyro_y_s_16);
+/*!
+ *	@brief This API reads gyro data z values
+ *	from register 0x18 and 0x19 it is a two byte data
+ *
+ *	@param v_gyro_z_s_16 : The z raw data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_z(s_16 *v_gyro_z_s_16);
+/*!
+ *	@brief This API reads gyro data xyz values
+ *	from register 0x14 to 0x19 it is a six byte data
+ *
+ *
+ *	@param gyro : The value of gyro xyz data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The gyro x data
+ *	 y        | The gyro y data
+ *	 z        | The gyro z data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_xyz(struct bno055_gyro_t *gyro);
+/**************************************************/
+/**\name EULER DATA READ FUNCTIONS */
+/**************************************************/
+/*!
+ *	@brief This API reads gyro data z values
+ *	from register 0x1A and 0x1B it is a two byte data
+ *
+ *	@param v_euler_h_s_16 : The raw h data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_euler_h(s_16 *v_euler_h_s_16);
+/*!
+ *	@brief This API reads Euler data r values
+ *	from register 0x1C and 0x1D it is a two byte data
+ *
+ *	@param v_euler_r_s_16 : The raw r data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_euler_r(s_16 *v_euler_r_s_16);
+/*!
+ *	@brief This API reads Euler data p values
+ *	from register 0x1E and 0x1F it is a two byte data
+ *
+ *	@param v_euler_p_s_16 : The raw p data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_euler_p(s_16 *v_euler_p_s_16);
+/*!
+ *	@brief This API reads Euler data hrp values
+ *	from register 0x1A to 0x1F it is a six byte data
+ *
+ *
+ *	@param euler : The Euler hrp data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 h        | The Euler h data
+ *	 r        | The Euler r data
+ *	 p        | The Euler p data
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_euler_hrp(
+struct bno055_euler_t *euler);
+/**************************************************/
+/**\name QUATERNION DATA READ FUNCTIONS */
+/**************************************************/
+/*!
+ *	@brief This API reads quaternion data w values
+ *	from register 0x20 and 0x21 it is a two byte data
+ *
+ *	@param v_quaternion_w_s_16 : The raw w data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_w(
+s_16 *v_quaternion_w_s_16);
+/*!
+ *	@brief This API reads quaternion data x values
+ *	from register 0x22 and 0x23 it is a two byte data
+ *
+ *	@param v_quaternion_x_s_16 : The raw x data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_x(
+s_16 *v_quaternion_x_s_16);
+/*!
+ *	@brief This API reads quaternion data y values
+ *	from register 0x24 and 0x25 it is a two byte data
+ *
+ *	@param v_quaternion_y_s_16 : The raw y data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_y(
+s_16 *v_quaternion_y_s_16);
+/*!
+ *	@brief This API reads quaternion data z values
+ *	from register 0x26 and 0x27 it is a two byte data
+ *
+ *	@param v_quaternion_z_s_16 : The raw z data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_z(
+s_16 *v_quaternion_z_s_16);
+/*!
+ *	@brief This API reads Quaternion data wxyz values
+ *	from register 0x20 to 0x27 it is a six byte data
+ *
+ *
+ *	@param quaternion : The value of quaternion wxyz data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 w        | The quaternion w data
+ *	 x        | The quaternion x data
+ *	 y        | The quaternion y data
+ *	 z        | The quaternion z data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_quaternion_wxyz(
+struct bno055_quaternion_t *quaternion);
+/**************************************************/
+/**\name LINEAR ACCEL DATA READ FUNCTIONS */
+/**************************************************/
+/*!
+ *	@brief This API reads Linear accel data x values
+ *	from register 0x29 and 0x2A it is a two byte data
+ *
+ *	@param v_linear_accel_x_s_16 : The raw x data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_linear_accel_x(
+s_16 *v_linear_accel_x_s_16);
+/*!
+ *	@brief This API reads Linear accel data x values
+ *	from register 0x2B and 0x2C it is a two byte data
+ *
+ *	@param v_linear_accel_y_s_16 : The raw y data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_linear_accel_y(
+s_16 *v_linear_accel_y_s_16);
+/*!
+ *	@brief This API reads Linear accel data x values
+ *	from register 0x2C and 0x2D it is a two byte data
+ *
+ *	@param v_linear_accel_z_s_16 : The raw z data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_linear_accel_z(
+s_16 *v_linear_accel_z_s_16);
+/*!
+ *	@brief This API reads Linear accel data xyz values
+ *	from register 0x28 to 0x2D it is a six byte data
+ *
+ *
+ *	@param linear_accel : The value of linear accel xyz data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The linear accel x data
+ *	 y        | The linear accel y data
+ *	 z        | The linear accel z data
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_linear_accel_xyz(
+struct bno055_linear_accel_t *linear_accel);
+/**************************************************/
+/**\name GRAVITY DATA READ FUNCTIONS */
+/**************************************************/
+/*!
+ *	@brief This API reads gravity data x values
+ *	from register 0x2E and 0x2F it is a two byte data
+ *
+ *	@param v_gravity_x_s_16 : The raw x data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gravity_x(
+s_16 *v_gravity_x_s_16);
+/*!
+ *	@brief This API reads gravity data y values
+ *	from register 0x30 and 0x31 it is a two byte data
+ *
+ *	@param v_gravity_y_s_16 : The raw y data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gravity_y(
+s_16 *v_gravity_y_s_16);
+/*!
+ *	@brief This API reads gravity data z values
+ *	from register 0x32 and 0x33 it is a two byte data
+ *
+ *	@param v_gravity_z_s_16 : The raw z data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gravity_z(
+s_16 *v_gravity_z_s_16);
+/*!
+  *	@brief This API reads gravity data xyz values
+ *	from register 0x2E to 0x33 it is a six byte data
+ *
+ *
+ *	@param gravity : The value of gravity xyz data's
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | The gravity x data
+ *	 y        | The gravity y data
+ *	 z        | The gravity z data
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gravity_xyz(
+struct bno055_gravity_t *gravity);
+/**************************************************/
+/**\name TEMPERATURE DATA READ FUNCTIONS */
+/**************************************************/
+/*!
+ *	@brief This API reads temperature values
+ *	from register 0x33 it is a byte data
+ *
+ *	@param v_temp_s_8 : The raw temperature data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_temp_data(s_8 *v_temp_s_8);
+#ifdef	BNO055_FLOAT_ENABLE
+/********************************************************************/
+/**\name FUNCTIONS FOR READING ACCEL DATA OUTPUT AS FLOAT PRECISION */
+/********************************************************************/
+/*!
+ *	@brief This API is used to convert the accel x raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param v_accel_x_f : The accel x meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_x_msq(
+float *v_accel_x_f);
+/*!
+ *	@brief This API is used to convert the accel x raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param v_accel_y_f : The accel y meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_y_msq(
+float *v_accel_y_f);
+/*!
+ *	@brief This API is used to convert the accel z raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param v_accel_z_f : The accel z meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_z_msq(
+float *v_accel_z_f);
+/*!
+ *	@brief This API is used to convert the accel y raw data
+ *	to millig output as float
+ *
+ *	@param v_accel_x_f : The accel y millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_x_mg(
+float *v_accel_x_f);
+/*!
+ *	@brief This API is used to convert the accel y raw data
+ *	to millig output as float
+ *
+ *	@param v_accel_y_f : The accel y millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_y_mg(
+float *v_accel_y_f);
+/*!
+ *	@brief This API is used to convert the accel z raw data
+ *	to millig output as float
+ *
+ *	@param v_accel_z_f : The accel z millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_z_mg(
+float *v_accel_z_f);
+/*!
+ *	@brief This API is used to convert the accel xyz raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param accel_xyz : The meterpersecseq data of accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | meterpersecseq data of accel
+ *	 y        | meterpersecseq data of accel
+ *	 z        | meterpersecseq data of accel
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_xyz_msq(
+struct bno055_accel_float_t *accel_xyz);
+/*!
+ *	@brief This API is used to convert the accel xyz raw data
+ *	to millig output as float
+ *
+ *	@param accel_xyz : The millig data of accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | millig data of accel
+ *	 y        | millig data of accel
+ *	 z        | millig data of accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_accel_xyz_mg(
+struct bno055_accel_float_t *accel_xyz);
+/********************************************************************/
+/**\name FUNCTIONS FOR READING MAG DATA OUTPUT AS FLOAT PRECISION */
+/********************************************************************/
+/*!
+ *	@brief This API is used to convert the mag x raw data
+ *	to microTesla output as float
+ *
+ *	@param v_mag_x_f : The mag x microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_mag_x_uT(
+float *v_mag_x_f);
+/*!
+ *	@brief This API is used to convert the mag y raw data
+ *	to microTesla output as float
+ *
+ *	@param v_mag_y_f : The mag y microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_mag_y_uT(
+float *v_mag_y_f);
+/*!
+ *	@brief This API is used to convert the mag z raw data
+ *	to microTesla output as float
+ *
+ *	@param v_mag_z_f : The mag z microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_mag_z_uT(
+float *v_mag_z_f);
+/*!
+ *	@brief This API is used to convert the mag yz raw data
+ *	to microTesla output as float
+ *
+ *	@param mag_xyz_data : The microTesla data of mag xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | microTesla data of mag
+ *	  y       | microTesla data of mag
+ *	  z       | microTesla data of mag
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_mag_xyz_uT(
+struct bno055_mag_float_t *mag_xyz_data);
+/********************************************************************/
+/**\name FUNCTIONS FOR READING GYRO DATA OUTPUT AS FLOAT PRECISION */
+/********************************************************************/
+/*!
+ *	@brief This API is used to convert the gyro x raw data
+ *	to dps output as float
+ *
+ *	@param v_gyro_x_f : The gyro x dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_x_dps(
+float *v_gyro_x_f);
+/*!
+ *	@brief This API is used to convert the gyro x raw data
+ *	to rps output as float
+ *
+ *	@param v_gyro_x_f : The gyro x dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_x_rps(
+float *v_gyro_x_f);
+/*!
+ *	@brief This API is used to convert the gyro y raw data
+ *	to dps output as float
+ *
+ *	@param v_gyro_y_f : The gyro y dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_y_dps(
+float *v_gyro_y_f);
+/*!
+ *	@brief This API is used to convert the gyro y raw data
+ *	to rps output as float
+ *
+ *	@param v_gyro_y_f : The gyro y dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_y_rps(
+float *v_gyro_y_f);
+/*!
+ *	@brief This API is used to convert the gyro z raw data
+ *	to dps output as float
+ *
+ *	@param v_gyro_z_f : The gyro z dps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_z_dps(
+float *v_gyro_z_f);
+/*!
+ *	@brief This API is used to convert the gyro z raw data
+ *	to rps output as float
+ *
+ *	@param v_gyro_z_f : The gyro z rps float data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_z_rps(
+float *v_gyro_z_f);
+/*!
+ *	@brief This API is used to convert the gyro xyz raw data
+ *	to dps output as float
+ *
+ *	@param gyro_xyz_data : The dps data of gyro xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | dps data of gyro
+ *	  y       | dps data of gyro
+ *	  z       | dps data of gyro
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_xyz_dps(
+struct bno055_gyro_float_t *gyro_xyz_data);
+/*!
+ *	@brief This API is used to convert the gyro xyz raw data
+ *	to rps output as float
+ *
+ *	@param gyro_xyz_data : The rps data of gyro xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | rps data of gyro
+ *	  y       | rps data of gyro
+ *	  z       | rps data of gyro
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gyro_xyz_rps(
+struct bno055_gyro_float_t *gyro_xyz_data);
+/********************************************************************/
+/**\name FUNCTIONS FOR READING EULER DATA OUTPUT AS FLOAT PRECISION */
+/********************************************************************/
+/*!
+ *	@brief This API is used to convert the Euler h raw data
+ *	to degree output as float
+ *
+ *	@param v_euler_h_f : The float value of Euler h degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_h_deg(
+float *v_euler_h_f);
+/*!
+ *	@brief This API is used to convert the Euler h raw data
+ *	to radians output as float
+ *
+ *	@param v_euler_h_f : The float value of Euler h radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_h_rad(
+float *v_euler_h_f);
+/*!
+ *	@brief This API is used to convert the Euler r raw data
+ *	to degree output as float
+ *
+ *	@param v_euler_r_f : The float value of Euler r degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_r_deg(
+float *v_euler_r_f);
+/*!
+ *	@brief This API is used to convert the Euler r raw data
+ *	to radians output as float
+ *
+ *	@param v_euler_r_f : The float value of Euler r radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_r_rad(
+float *v_euler_r_f);
+/*!
+ *	@brief This API is used to convert the Euler p raw data
+ *	to degree output as float
+ *
+ *	@param v_euler_p_f : The float value of Euler p degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_p_deg(
+float *v_euler_p_f);
+/*!
+ *	@brief This API is used to convert the Euler p raw data
+ *	to radians output as float
+ *
+ *	@param v_euler_p_f : The float value of Euler p radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_p_rad(
+float *v_euler_p_f);
+/*!
+ *	@brief This API is used to convert the Euler hrp raw data
+ *	to degree output as float
+ *
+ *	@param euler_hpr : The degree data of Euler hrp
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  h       | degree data of Euler
+ *	  r       | degree data of Euler
+ *	  p       | degree data of Euler
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_hpr_deg(
+struct bno055_euler_float_t *euler_hpr);
+/*!
+ *	@brief This API is used to convert the Euler xyz raw data
+ *	to radians output as float
+ *
+ *	@param euler_hpr : The radians data of Euler hrp
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  h       | radians data of Euler
+ *	  r       | radians data of Euler
+ *	  p       | radians data of Euler
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_euler_hpr_rad(
+struct bno055_euler_float_t *euler_hpr);
+/***************************************************************************/
+/**\name FUNCTIONS FOR READING LINEAR ACCEL DATA OUTPUT AS FLOAT PRECISION */
+/**************************************************************************/
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel x raw data to meterpersecseq output as float
+ *
+ *	@param v_linear_accel_x_f : The float value of linear accel x meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_linear_accel_x_msq(
+float *v_linear_accel_x_f);
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel y raw data to meterpersecseq output as float
+ *
+ *	@param v_linear_accel_y_f : The float value of linear accel y meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_linear_accel_y_msq(
+float *v_linear_accel_y_f);
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel z raw data to meterpersecseq output as float
+ *
+ *	@param v_linear_accel_z_f : The float value of linear accel z meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_linear_accel_z_msq(
+float *v_linear_accel_z_f);
+/*!
+ *	@brief This API is used to convert the linear accel xyz raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param linear_accel_xyz : The meterpersecseq data of linear accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | meterpersecseq data of linear accel
+ *	  y       | meterpersecseq data of linear accel
+ *	  z       | meterpersecseq data of linear accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_linear_accel_xyz_msq(
+struct bno055_linear_accel_float_t *linear_accel_xyz);
+/********************************************************************/
+/**\name FUNCTIONS FOR READING GRAVITY DATA OUTPUT AS FLOAT PRECISION */
+/********************************************************************/
+/*!
+ *	@brief This API is used to convert the gravity
+ *	x raw data to meterpersecseq output as float
+ *
+ *	@param v_gravity_x_f : The float value of gravity x meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_float_x_msq(
+float *v_gravity_x_f);
+/*!
+ *	@brief This API is used to convert the gravity
+ *	y raw data to meterpersecseq output as float
+ *
+ *	@param v_gravity_y_f : The float value of gravity y meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_float_y_msq(
+float *v_gravity_y_f);
+/*!
+ *	@brief This API is used to convert the gravity
+ *	z raw data to meterpersecseq output as float
+ *
+ *	@param v_gravity_z_f : The float value of gravity z meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_float_z_msq(
+float *gravity_z);
+/*!
+ *	@brief This API is used to convert the gravity xyz raw data
+ *	to meterpersecseq output as float
+ *
+ *	@param gravity_xyz : The meterpersecseq data of gravity xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	  x       | meterpersecseq data of gravity
+ *	  y       | meterpersecseq data of gravity
+ *	  z       | meterpersecseq data of gravity
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_gravity_xyz_msq(
+struct bno055_gravity_float_t *gravity_xyz);
+/**************************************************************************/
+/**\name FUNCTIONS FOR READING TEMPERATURE DATA OUTPUT AS FLOAT PRECISION */
+/*************************************************************************/
+/*!
+ *	@brief This API is used to convert the temperature
+ *	data to Fahrenheit output as float
+ *
+ *	@param v_temp_f : The float value of temperature Fahrenheit
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_temp_fahrenheit(
+float *v_temp_f);
+/*!
+ *	@brief This API is used to convert the temperature
+ *	data to Celsius output as float
+ *
+ *	@param v_temp_f : The float value of temperature Celsius
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_float_temp_celsius(
+float *v_temp_f);
+#endif
+#ifdef	BNO055_DOUBLE_ENABLE
+/**************************************************************************/
+/**\name FUNCTIONS FOR READING ACCEL DATA OUTPUT AS DOUBLE PRECISION */
+/*************************************************************************/
+/*!
+ *	@brief This API is used to convert the accel x raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param v_accel_x_d : The accel x meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_x_msq(
+double *v_accel_x_d);
+/*!
+ *	@brief This API is used to convert the accel y raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param v_accel_y_d : The accel y meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_y_msq(
+double *v_accel_y_d);
+/*!
+ *	@brief This API is used to convert the accel z raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param v_accel_z_d : The accel z meterpersecseq data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_z_msq(
+double *v_accel_z_d);
+/*!
+ *	@brief This API is used to convert the accel x raw data
+ *	to millig output as double
+ *
+ *	@param v_accel_x_d : The accel x millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_x_mg(
+double *v_accel_x_d);
+/*!
+ *	@brief This API is used to convert the accel y raw data
+ *	to millig output as double
+ *
+ *	@param v_accel_y_d : The accel y millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_y_mg(
+double *v_accel_y_d);
+/*!
+ *	@brief This API is used to convert the accel z raw data
+ *	to millig output as double
+ *
+ *	@param v_accel_z_d : The accel z millig data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_z_mg(
+double *v_accel_z_d);
+/*!
+ *	@brief This API is used to convert the accel xyz raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param accel_xyz : The meterpersecseq data of accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | meterpersecseq data of accel
+ *	 y        | meterpersecseq data of accel
+ *	 z        | meterpersecseq data of accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_xyz_msq(
+struct bno055_accel_double_t *accel_xyz);
+/*!
+ *	@brief This API is used to convert the accel xyz raw data
+ *	to millig output as double
+ *
+ *	@param accel_xyz : The millig data of accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | millig data of accel
+ *	 y        | millig data of accel
+ *	 z        | millig data of accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_accel_xyz_mg(
+struct bno055_accel_double_t *accel_xyz);
+/**************************************************************************/
+/**\name FUNCTIONS FOR READING MAG DATA OUTPUT AS DOUBLE PRECISION */
+/*************************************************************************/
+/*!
+ *	@brief This API is used to convert the mag x raw data
+ *	to microTesla output as double
+ *
+ *	@param v_mag_x_d : The mag x microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_mag_x_uT(
+double *v_mag_x_d);
+/*!
+ *	@brief This API is used to convert the mag x raw data
+ *	to microTesla output as double
+ *
+ *	@param v_mag_y_d : The mag x microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_mag_y_uT(
+double *v_mag_y_d);
+/*!
+ *	@brief This API is used to convert the mag z raw data
+ *	to microTesla output as double
+ *
+ *	@param v_mag_z_d : The mag z microTesla data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_mag_z_uT(
+double *v_mag_z_d);
+/*!
+ *	@brief This API is used to convert the mag yz raw data
+ *	to microTesla output as double
+ *
+ *	@param mag_xyz : The microTesla data of mag xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | microTesla data of mag
+ *	 y        | microTesla data of mag
+ *	 z        | microTesla data of mag
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_mag_xyz_uT(
+struct bno055_mag_double_t *mag_xyz);
+/**************************************************************************/
+/**\name FUNCTIONS FOR READING GYRO DATA OUTPUT AS DOUBLE PRECISION */
+/*************************************************************************/
+/*!
+ *	@brief This API is used to convert the gyro x raw data
+ *	to dps output as double
+ *
+ *	@param v_gyro_x_d : The gyro x dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_x_dps(
+double *v_gyro_x_d);
+/*!
+ *	@brief This API is used to convert the gyro y raw data
+ *	to dps output as double
+ *
+ *	@param v_gyro_y_d : The gyro y dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_y_dps(
+double *v_gyro_y_d);
+/*!
+ *	@brief This API is used to convert the gyro z raw data
+ *	to dps output as double
+ *
+ *	@param v_gyro_z_d : The gyro z dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_z_dps(
+double *v_gyro_z_d);
+/*!
+ *	@brief This API is used to convert the gyro x raw data
+ *	to rps output as double
+ *
+ *	@param v_gyro_x_d : The gyro x dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_x_rps(
+double *v_gyro_x_d);
+/*!
+ *	@brief This API is used to convert the gyro y raw data
+ *	to rps output as double
+ *
+ *	@param v_gyro_y_d : The gyro y dps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_y_rps(
+double *v_gyro_y_d);
+/*!
+ *	@brief This API is used to convert the gyro z raw data
+ *	to rps output as double
+ *
+ *	@param v_gyro_z_d : The gyro z rps double data
+ *
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_z_rps(
+double *v_gyro_z_d);
+/*!
+ *	@brief This API is used to convert the gyro xyz raw data
+ *	to dps output as double
+ *
+ *	@param gyro_xyz : The dps data of gyro xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | dps data of gyro
+ *	 y        | dps data of gyro
+ *	 z        | dps data of gyro
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_xyz_dps(
+struct bno055_gyro_double_t *gyro_xyz);
+/*!
+ *	@brief This API is used to convert the gyro xyz raw data
+ *	to rps output as double
+ *
+ *	@param gyro_xyz : The rps data of gyro xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | rps data of gyro
+ *	 y        | rps data of gyro
+ *	 z        | rps data of gyro
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gyro_xyz_rps(
+struct bno055_gyro_double_t *gyro_xyz);
+/**************************************************************************/
+/**\name FUNCTIONS FOR READING EULER DATA OUTPUT AS DOUBLE PRECISION */
+/*************************************************************************/
+/*!
+ *	@brief This API is used to convert the Euler h raw data
+ *	to degree output as double
+ *
+ *	@param v_euler_h_d : The double value of Euler h degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_h_deg(
+double *v_euler_h_d);
+/*!
+ *	@brief This API is used to convert the Euler p raw data
+ *	to degree output as double
+ *
+ *	@param v_euler_p_d : The double value of Euler p degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_p_deg(
+double *v_euler_p_d);
+/*!
+ *	@brief This API is used to convert the Euler r raw data
+ *	to degree output as double
+ *
+ *	@param v_euler_r_d : The double value of Euler r degree
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_r_deg(
+double *v_euler_r_d);
+/*!
+ *	@brief This API is used to convert the Euler h raw data
+ *	to radians output as double
+ *
+ *	@param v_euler_h_d : The double value of Euler h radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_h_rad(
+double *v_euler_h_d);
+/*!
+ *	@brief This API is used to convert the Euler p raw data
+ *	to radians output as double
+ *
+ *	@param v_euler_p_d : The double value of Euler p radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_p_rad(
+double *v_euler_p_d);
+/*!
+ *	@brief This API is used to convert the Euler r raw data
+ *	to radians output as double
+ *
+ *	@param v_euler_r_d : The double value of Euler r radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_r_rad(
+double *v_euler_r_d);
+/*!
+ *	@brief This API is used to convert the Euler hpr raw data
+ *	to degree output as double
+ *
+ *	@param euler_hpr : The degree data of Euler hpr
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 h        | degree data of Euler
+ *	 r        | degree data of Euler
+ *	 p        | degree data of Euler
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_hpr_deg(
+struct bno055_euler_double_t *euler_hpr);
+/*!
+ *	@brief This API is used to convert the Euler hpr raw data
+ *	to radians output as double
+ *
+ *	@param euler_hpr : The radians data of Euler hpr
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 h        | radians data of Euler
+ *	 r        | radians data of Euler
+ *	 p        | radians data of Euler
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_euler_hpr_rad(
+struct bno055_euler_double_t *euler_hpr);
+/****************************************************************************/
+/**\name FUNCTIONS FOR READING LINEAR ACCEL DATA OUTPUT AS DOUBLE PRECISION */
+/****************************************************************************/
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel x raw data to meterpersecseq output as double
+ *
+ *	@param v_linear_accel_x_d : The double value of
+ *	linear accel x meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_linear_accel_x_msq(
+double *v_linear_accel_x_d);
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel y raw data to meterpersecseq output as double
+ *
+ *	@param v_linear_accel_y_d : The double value of
+ *	linear accel y meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_linear_accel_y_msq(
+double *v_linear_accel_y_d);
+/*!
+ *	@brief This API is used to convert the linear
+ *	accel z raw data to meterpersecseq output as double
+ *
+ *	@param v_linear_accel_z_d : The double value of
+ *	linear accel z meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_linear_accel_z_msq(
+double *v_linear_accel_z_d);
+/*!
+ *	@brief This API is used to convert the linear accel xyz raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param linear_accel_xyz : The meterpersecseq data of linear accel xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | meterpersecseq data of linear accel
+ *	 y        | meterpersecseq data of linear accel
+ *	 z        | meterpersecseq data of linear accel
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_linear_accel_xyz_msq(
+struct bno055_linear_accel_double_t *linear_accel_xyz);
+/**************************************************************************/
+/**\name FUNCTIONS FOR READING GRAVITY DATA OUTPUT AS DOUBLE PRECISION */
+/*************************************************************************/
+/*!
+ *	@brief This API is used to convert the gravity
+ *	x raw data to meterpersecseq output as double
+ *
+ *	@param v_gravity_x_d : The double value of gravity x meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_double_x_msq(
+double *v_gravity_x_d);
+/*!
+ *	@brief This API is used to convert the gravity
+ *	y raw data to meterpersecseq output as double
+ *
+ *	@param v_gravity_y_d : The double value of gravity y meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_double_y_msq(
+double *v_gravity_y_d);
+/*!
+ *	@brief This API is used to convert the gravity
+ *	z raw data to meterpersecseq output as double
+ *
+ *	@param v_gravity_z_d : The double value of gravity z meterpersecseq
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_gravity_double_z_msq(
+double *v_gravity_z_d);
+/*!
+ *	@brief This API is used to convert the gravity xyz raw data
+ *	to meterpersecseq output as double
+ *
+ *	@param gravity_xyz : The meterpersecseq data of gravity xyz
+ *
+ *	Parameter |    result
+ *  --------- | -----------------
+ *	 x        | meterpersecseq data of gravity
+ *	 y        | meterpersecseq data of gravity
+ *	 z        | meterpersecseq data of gravity
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_gravity_xyz_msq(
+struct bno055_gravity_double_t *gravity_xyz);
+/**************************************************************************/
+/**\name FUNCTIONS FOR READING TEMPERATURE DATA OUTPUT AS DOUBLE PRECISION*/
+/*************************************************************************/
+/*!
+ *	@brief This API is used to convert the temperature
+ *	data to Fahrenheit output as double
+ *
+ *	@param v_temp_d : The double value of temperature Fahrenheit
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_temp_fahrenheit(
+double *v_temp_d);
+/*!
+ *	@brief This API is used to convert the temperature
+ *	data to Celsius output as double
+ *
+ *	@param v_temp_d : The double value of temperature Celsius
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_convert_double_temp_celsius(
+double *v_temp_d);
+#endif
+/**************************************************************************/
+/**\name FUNCTIONS FOR READING ACCEL,MAG,GYRO AND SYTEM CALIBRATION STATUS*/
+/*************************************************************************/
+/*!
+ *	@brief This API used to read
+ *	mag calibration status from register from 0x35 bit 0 and 1
+ *
+ *	@param v_mag_calib_u_8 : The value of mag calib status
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_calib_stat(
+u_8 *v_mag_calib_u_8);
+/*!
+ *	@brief This API used to read
+ *	accel calibration status from register from 0x35 bit 2 and 3
+ *
+ *	@param v_accel_calib_u_8 : The value of accel calib status
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_calib_stat(
+u_8 *v_accel_calib_u_8);
+/*!
+ *	@brief This API used to read
+ *	gyro calibration status from register from 0x35 bit 4 and 5
+ *
+ *	@param v_gyro_calib_u_8 : The value of gyro calib status
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_calib_stat(
+u_8 *v_gyro_calib_u_8);
+/*!
+ *	@brief This API used to read
+ *	system calibration status from register from 0x35 bit 6 and 7
+ *
+ *	@param v_sys_calib_u_8 : The value of system calib status
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_sys_calib_stat(
+u_8 *v_sys_calib_u_8);
+/******************************************************************/
+/**\name FUNCTIONS FOR READING ACCEL,MAG,GYRO AND SYTEM SELF TEST */
+/******************************************************************/
+/*!
+ *	@brief This API used to read
+ *	self test of accel from register from 0x36 bit 0
+ *
+ *	@param v_selftest_accel_u_8 : The value of self test of accel
+ *
+ *    v_selftest_accel_u_8 |  result
+ *   -------------------- | ---------------------
+ *     0x00               | indicates test failed
+ *     0x01               | indicated test passed
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest_accel(
+u_8 *v_selftest_accel_u_8);
+/*!
+ *	@brief This API used to read
+ *	self test of mag from register from 0x36 bit 1
+ *
+ *	@param v_selftest_mag_u_8 : The value of self test of mag
+ *
+ *     v_selftest_mag_u_8  |  result
+ *   -------------------- | ---------------------
+ *     0x00               | indicates test failed
+ *     0x01               | indicated test passed
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest_mag(
+u_8 *v_selftest_mag_u_8);
+/*!
+ *	@brief This API used to read
+ *	self test of gyro from register from 0x36 bit 2
+ *
+ *	@param v_selftest_gyro_u_8 : The value of self test of gyro
+ *
+ *     v_selftest_gyro_u_8 |  result
+ *   -------------------- | ---------------------
+ *     0x00               | indicates test failed
+ *     0x01               | indicated test passed
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest_gyro(
+u_8 *v_selftest_gyro_u_8);
+/*!
+ *	@brief This API used to read
+ *	self test of micro controller from register from 0x36 bit 3
+ *
+ *	@param v_selftest_mcu_u_8 : The value of self test of micro controller
+ *
+ *     v_selftest_mcu_u_8  |  result
+ *   -------------------- | ---------------------
+ *     0x00               | indicates test failed
+ *     0x01               | indicated test passed
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest_mcu(
+u_8 *v_selftest_mcu_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR READING GYRO INTERRUPT STATUS */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the v_stat_s_8 of
+ *	gyro anymotion interrupt from register from 0x37 bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt
+ *
+ *     v_gyro_any_motion_u_8  |  result
+ *    --------------------   | ---------------------
+ *     0x00                  | indicates no interrupt triggered
+ *     0x01                  | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro anymotion interrupt can be enabled
+ *	by the following APIs
+ *
+ *	bno055_set_intr_mask_gyro_any_motion()
+ *
+ *	bno055_set_intr_gyro_any_motion()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_gyro_any_motion(
+u_8 *v_gyro_any_motion_u_8);
+/*!
+ *	@brief This API used to read the v_stat_s_8 of
+ *	gyro highrate interrupt from register from 0x37 bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt
+ *
+ *     v_gyro_highrate_u_8   |  result
+ *    -------------------   | ---------------------
+ *     0x00                 | indicates no interrupt triggered
+ *     0x01                 | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate interrupt can be configured
+ *			by the following APIs
+ *
+ *	bno055_set_intr_mask_gyro_highrate()
+ *
+ *	bno055_set_intr_gyro_highrate()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_gyro_highrate(
+u_8 *v_gyro_highrate_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR READING ACCEL INTERRUPT STATUS */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the status of
+ *	accel highg interrupt from register from 0x37 bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt
+ *
+ *     v_accel_high_g_u_8    |  result
+ *    -------------------   | ---------------------
+ *     0x00                 | indicates no interrupt triggered
+ *     0x01                 | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel highg interrupt can be configured
+ *			by the following APIs
+ *
+ *	bno055_set_intr_mask_accel_high_g()
+ *
+ *	bno055_set_intr_accel_high_g()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_accel_high_g(
+u_8 *v_accel_high_g_u_8);
+/*!
+ *	@brief This API used to read the v_stat_s_8 of
+ *	accel anymotion interrupt from register from 0x37 bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt
+ *
+ *     v_accel_any_motion_u_8 |  result
+ *    -------------------   | ---------------------
+ *     0x00                 | indicates no interrupt triggered
+ *     0x01                 | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel anymotion interrupt can be configured
+ *			by the following APIs
+ *
+ *	bno055_set_intr_mask_accel_any_motion()
+ *
+ *	bno055_set_intr_accel_any_motion()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_accel_any_motion(
+u_8 *v_accel_any_motion_u_8);
+/*!
+ *	@brief This API used to read the v_stat_s_8 of
+ *	accel nomotion/slowmotion interrupt from register from 0x37 bit 6
+ *
+ *	@param v_accel_no_motion_u_8 :
+ *	The value of accel nomotion/slowmotion interrupt
+ *
+ *     v_accel_no_motion_u_8 |  result
+ *    -------------------   | ---------------------
+ *     0x00                 | indicates no interrupt triggered
+ *     0x01                 | indicates interrupt triggered
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel nomotion/slowmotion interrupt can be configured
+ *			by the following APIs
+ *
+ *	bno055_set_intr_mask_accel_nomotion()
+ *
+ *	bno055_set_intr_accel_nomotion()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_stat_accel_no_motion(
+u_8 *v_accel_no_motion_u_8);
+/**************************************************************************/
+/**\name FUNCTIONS FOR READING SYSTEM CLOCK, STATUS AND ERROR CODE */
+/*************************************************************************/
+/*!
+ *	@brief This API is used to read status of main clock
+ *	from the register 0x38 bit 0
+ *
+ *	@param v_stat_main_clk_u_8 : the status of main clock
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_stat_main_clk(
+u_8 *v_stat_main_clk_u_8);
+/*!
+ *	@brief This API is used to read system status
+ *	code from the register 0x39 it is a byte of data
+ *
+ *	@param v_sys_stat_u_8 : the status of system
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_sys_stat_code(
+u_8 *v_sys_stat_u_8);
+/*!
+ *	@brief This API is used to read system error
+ *	code from the register 0x3A it is a byte of data
+ *
+ *	@param v_sys_error_u_8 : The value of system error code
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_sys_error_code(
+u_8 *v_sys_error_u_8);
+/********************************************/
+/**\name FUNCTIONS FOR ACCEL UNIT SELECTION */
+/********************************************/
+/*!
+ *	@brief This API used to read the accel unit
+ *	from register from 0x3B bit 0
+ *
+ *	@param v_accel_unit_u_8 : The value of accel unit
+ *
+ *    v_accel_unit_u_8 |   result
+ *   -------------    | ---------------
+ *        0x00        | ACCEL_UNIT_MSQ
+ *        0x01        | ACCEL_UNIT_MG
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_unit(
+u_8 *v_accel_unit_u_8);
+/*!
+ *	@brief This API used to write the accel unit
+ *	from register from 0x3B bit 0
+ *
+ *	@param v_accel_unit_u_8 : The value of accel unit
+ *
+ *    v_accel_unit_u_8 |   result
+ *   -------------    | ---------------
+ *        0x00        | ACCEL_UNIT_MSQ
+ *        0x01        | ACCEL_UNIT_MG
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_unit(
+u_8 v_accel_unit_u_8);
+/********************************************/
+/**\name FUNCTIONS FOR GYRO UNIT SELECTION */
+/********************************************/
+/*!
+ *	@brief This API used to read the gyro unit
+ *	from register from 0x3B bit 1
+ *
+ *	@param v_gyro_unit_u_8 : The value of accel unit
+ *
+ *	v_gyro_unit_u_8  |  result
+ *	-------------   | -----------
+ *    0x00          | GYRO_UNIT_DPS
+ *    0x01          | GYRO_UNIT_RPS
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_unit(
+u_8 *v_gyro_unit_u_8);
+/*!
+ *	@brief This API used to write the gyro unit
+ *	from register from 0x3B bit 1
+ *
+ *	@param v_gyro_unit_u_8 : The value of accel unit
+ *
+ *	v_gyro_unit_u_8  |  result
+ *	-------------   | -----------
+ *    0x00          | GYRO_UNIT_DPS
+ *    0x01          | GYRO_UNIT_RPS
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_unit(u_8 v_gyro_unit_u_8);
+/********************************************/
+/**\name FUNCTIONS FOR EULER UNIT SELECTION */
+/********************************************/
+/*!
+ *	@brief This API used to read the Euler unit
+ *	from register from 0x3B bit 2
+ *
+ *	@param v_euler_unit_u_8 : The value of accel unit
+ *
+ *    v_euler_unit_u_8 | result
+ *   --------------   | -----------
+ *      0x00          | EULER_UNIT_DEG
+ *      0x01          | EULER_UNIT_RAD
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_euler_unit(
+u_8 *v_euler_unit_u_8);
+/*!
+ *	@brief This API used to write the Euler unit
+ *	from register from 0x3B bit 2
+ *
+ *	@param v_euler_unit_u_8 : The value of Euler unit
+ *
+ *    v_euler_unit_u_8 | result
+ *   --------------   | -----------
+ *      0x00          | EULER_UNIT_DEG
+ *      0x01          | EULER_UNIT_RAD
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_euler_unit(u_8 v_euler_unit_u_8);
+/********************************************/
+/**\name FUNCTIONS FOR TILT UNIT SELECTION */
+/********************************************/
+/*!
+ *	@brief This API used to write the tilt unit
+ *	from register from 0x3B bit 3
+ *
+ *	@param v_tilt_unit_u_8 : The value of tilt unit
+ *
+ *    v_tilt_unit_u_8  | result
+ *   ---------------  | ---------
+ *     0x00           | degrees
+ *     0x01           | radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_tilt_unit(
+u_8 *v_tilt_unit_u_8);
+/*!
+ *	@brief This API used to write the tilt unit
+ *	from register from 0x3B bit 3
+ *
+ *	@param v_tilt_unit_u_8 : The value of tilt unit
+ *
+ *    v_tilt_unit_u_8  | result
+ *   ---------------  | ---------
+ *     0x00           | degrees
+ *     0x01           | radians
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ *
+ *  \return Communication results
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_tilt_unit(
+u_8 v_tilt_unit_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR TEMPERATURE UNIT SELECTION */
+/**************************************************/
+/*!
+ *	@brief This API used to read the temperature unit
+ *	from register from 0x3B bit 4
+ *
+ *	@param v_temp_unit_u_8 : The value of temperature unit
+ *
+ *    v_temp_unit_u_8  |  result
+ *   -----------      | --------------
+ *      0x00          | TEMP_UNIT_CELCIUS
+ *      0x01          | TEMP_UNIT_FAHRENHEIT
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_temp_unit(
+u_8 *v_temp_unit_u_8);
+/*!
+ *	@brief This API used to write the temperature unit
+ *	from register from 0x3B bit 4
+ *
+ *	@param v_temp_unit_u_8 : The value of temperature unit
+ *
+ *    v_temp_unit_u_8  |  result
+ *   -----------      | --------------
+ *      0x00          | TEMP_UNIT_CELCIUS
+ *      0x01          | TEMP_UNIT_FAHRENHEIT
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_temp_unit(
+u_8 v_temp_unit_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR DATA OUTPUT FORMAT SELECT */
+/**************************************************/
+/*!
+ *	@brief This API used to read the current selected orientation mode
+ *	from register from 0x3B bit 7
+ *
+ *	@param v_data_output_format_u_8 : The value of data output format
+ *
+ *	  v_data_output_format_u_8  | result
+ *   --------------------      | --------
+ *    0x00                     | Windows
+ *    0x01                     | Android
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_data_output_format(
+u_8 *v_data_output_format_u_8);
+/*!
+ *	@brief This API used to read the current selected orientation mode
+ *	from register from 0x3B bit 7
+ *
+ *	@param v_data_output_format_u_8 : The value of data output format
+ *
+ *	  v_data_output_format_u_8  | result
+ *   --------------------      | --------
+ *    0x00                     | Windows
+ *    0x01                     | Android
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_data_output_format(
+u_8 v_data_output_format_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR DATA OPERATION MODE  */
+/**************************************************/
+/*!	@brief This API used to read the operation mode
+ *	from register from 0x3D bit 0 to 3
+ *
+ *	@param v_operation_mode_u_8 : The value of operation mode
+ *
+ * v_operation_mode_u_8 |      result      | comments
+ * ----------|----------------------------|----------------------------
+ *  0x00     | OPERATION_MODE_CONFIG      | Configuration mode
+ *  0x01     | OPERATION_MODE_ACCONLY     | Reads accel data alone
+ *  0x02     | OPERATION_MODE_MAGONLY     | Reads mag data alone
+ *  0x03     | OPERATION_MODE_GYRONLY     | Reads gyro data alone
+ *  0x04     | OPERATION_MODE_ACCMAG      | Reads accel and mag data
+ *  0x05     | OPERATION_MODE_ACCGYRO     | Reads accel and gyro data
+ *  0x06     | OPERATION_MODE_MAGGYRO     | Reads accel and mag data
+ *  0x07     | OPERATION_MODE_ANY_MOTION  | Reads accel mag and gyro data
+ *  0x08     | OPERATION_MODE_IMUPLUS     | Inertial measurement unit
+ *   -       |       -                    | Reads accel,gyro and fusion data
+ *  0x09     | OPERATION_MODE_COMPASS     | Reads accel, mag data
+ *   -       |       -                    | and fusion data
+ *  0x0A     | OPERATION_MODE_M4G         | Reads accel, mag data
+ *    -      |       -                    | and fusion data
+ *  0x0B     | OPERATION_MODE_NDOF_FMC_OFF| Nine degrees of freedom with
+ *   -       |       -                    | fast magnetic calibration
+ *   -       |       -                    | Reads accel,mag, gyro
+ *   -       |       -                    | and fusion data
+ *  0x0C     | OPERATION_MODE_NDOF        | Nine degrees of freedom
+ *   -       |       -                    | Reads accel,mag, gyro
+ *   -       |       -                    | and fusion data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note In the config mode, all sensor and fusion data
+ *	becomes zero and it is mainly derived
+ *	to configure the various settings of the BNO
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_operation_mode(
+u_8 *v_operation_mode_u_8);
+/*!	@brief This API used to write the operation mode
+ *	from register from 0x3D bit 0 to 3
+ *
+ *	@param v_operation_mode_u_8 : The value of operation mode
+ *
+ *  v_operation_mode_u_8  |      result    | comments
+ * ----------|----------------------------|----------------------------
+ *  0x00     | OPERATION_MODE_CONFIG      | Configuration mode
+ *  0x01     | OPERATION_MODE_ACCONLY     | Reads accel data alone
+ *  0x02     | OPERATION_MODE_MAGONLY     | Reads mag data alone
+ *  0x03     | OPERATION_MODE_GYRONLY     | Reads gyro data alone
+ *  0x04     | OPERATION_MODE_ACCMAG      | Reads accel and mag data
+ *  0x05     | OPERATION_MODE_ACCGYRO     | Reads accel and gyro data
+ *  0x06     | OPERATION_MODE_MAGGYRO     | Reads accel and mag data
+ *  0x07     | OPERATION_MODE_ANY_MOTION  | Reads accel mag and gyro data
+ *  0x08     | OPERATION_MODE_IMUPLUS     | Inertial measurement unit
+ *   -       |       -                    | Reads accel,gyro and fusion data
+ *  0x09     | OPERATION_MODE_COMPASS     | Reads accel, mag data
+ *   -       |       -                    | and fusion data
+ *  0x0A     | OPERATION_MODE_M4G         | Reads accel, mag data
+ *    -      |       -                    | and fusion data
+ *  0x0B     | OPERATION_MODE_NDOF_FMC_OFF| Nine degrees of freedom with
+ *   -       |       -                    | fast magnetic calibration
+ *   -       |       -                    | Reads accel,mag, gyro
+ *   -       |       -                    | and fusion data
+ *  0x0C     | OPERATION_MODE_NDOF        | Nine degrees of freedom
+ *   -       |       -                    | Reads accel,mag, gyro
+ *   -       |       -                    | and fusion data
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note In the config mode, all sensor and fusion data
+ *	becomes zero and it is mainly derived
+ *	to configure the various settings of the BNO
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_operation_mode(u_8 v_operation_mode_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR POWER MODE  */
+/**************************************************/
+/*!	@brief This API used to read the power mode
+ *	from register from 0x3E bit 0 to 1
+ *
+ *	@param v_power_mode_u_8 : The value of power mode
+ *
+ * v_power_mode_u_8|      result    | comments
+ * ----------|---------------------|-------------------------------------
+ *  0x00     | POWER_MODE_NORMAL   | In the NORMAL mode the register
+ *    -      |       -             | map and the internal peripherals
+ *    -      |       -             | of the MCU are always
+ *    -      |       -             | operative in this mode
+ *  0x01     | POWER_MODE_LOWPOWER | This is first level of power saving mode
+ *  0x02     | POWER_MODE_SUSPEND  | In suspend mode the system is
+ *   -       |      -              | paused and all the sensors and
+ *   -       |      -              | the micro controller are
+ *   -       |      -              | put into sleep mode.
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note For detailed about LOWPOWER mode
+ *	refer data sheet 3.4.2
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_power_mode(
+u_8 *v_power_mode_u_8);
+/*!	@brief This API used to write the power mode
+ *	from register from 0x3E bit 0 to 1
+ *
+ *	@param v_power_mode_u_8 : The value of power mode
+ *
+ * v_power_mode_u_8 |      result        | comments
+ * ----------|---------------------|-------------------------------------
+ *  0x00     | POWER_MODE_NORMAL   | In the NORMAL mode the register
+ *    -      |       -             | map and the internal peripherals
+ *    -      |       -             | of the MCU are always
+ *    -      |       -             | operative in this mode
+ *  0x01     | POWER_MODE_LOWPOWER | This is first level of power saving mode
+ *  0x02     | POWER_MODE_SUSPEND  | In suspend mode the system is
+ *   -       |      -              | paused and all the sensors and
+ *   -       |      -              | the micro controller are
+ *   -       |      -              | put into sleep mode.
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note For detailed about LOWPOWER mode
+ *	refer data sheet 3.4.2
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_power_mode(u_8 v_power_mode_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR RESET INTERRUPT  */
+/**************************************************/
+/*!
+ *	@brief This API used to read the reset interrupt
+ *	from register from 0x3F bit 6
+ *	It resets all the interrupt bit and interrupt output
+ *
+ *	@param v_intr_rst_u_8 : The value of reset interrupt
+ *
+ *    v_intr_rst_u_8 | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_rst(
+u_8 *v_intr_rst_u_8);
+/*!
+ *	@brief This API used to write the reset interrupt
+ *	from register from 0x3F bit 6
+ *	It resets all the interrupt bit and interrupt output
+ *
+ *	@param v_intr_rst_u_8 : The value of reset interrupt
+ *
+ *    v_intr_rst_u_8 | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_rst(u_8 v_intr_rst_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR CLOCK SOURCE  */
+/**************************************************/
+/*!
+ *	@brief This API used to read the clk source
+ *	from register from 0x3F bit 7
+ *
+ *	@param v_clk_src_u_8 : The value of clk source
+ *
+ *	 v_clk_src_u_8   | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_clk_src(
+u_8 *v_clk_src_u_8);
+/*!
+ *	@brief This API used to write the clk source
+ *	from register from 0x3F bit 7
+ *
+ *	@param v_clk_src_u_8 : The value of clk source
+ *
+ *	 v_clk_src_u_8   | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_clk_src(u_8 v_clk_src_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR RESET SYSTEM  */
+/**************************************************/
+/*!
+ *	@brief This API used to read the reset system
+ *	from register from 0x3F bit 5
+ *
+ *	@param v_sys_rst_u_8 : The value of reset system
+ *
+ *	 v_sys_rst_u_8   | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note It resets the whole system
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_sys_rst(
+u_8 *v_sys_rst_u_8);
+/*!
+ *	@brief This API used to write the reset system
+ *	from register from 0x3F bit 5
+ *
+ *	@param v_sys_rst_u_8 : The value of reset system
+ *
+ *	 v_sys_rst_u_8   | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note It resets the whole system
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_sys_rst(u_8 v_sys_rst_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR SELF TEST  */
+/**************************************************/
+/*!
+ *	@brief This API used to read the self test
+ *	from register from 0x3F bit 0
+ *
+ *	@param v_selftest_u_8 : The value of self test
+ *
+ *	 v_selftest_u_8  | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note It triggers the self test
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_selftest(
+u_8 *v_selftest_u_8);
+/*!
+ *	@brief This API used to write the self test
+ *	from register from 0x3F bit 0
+ *
+ *	@param v_selftest_u_8 : The value of self test
+ *
+ *	 v_selftest_u_8  | result
+ *   -------------- |----------
+ *     0x01         | ENABLED
+ *     0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note It triggers the self test
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_selftest(u_8 v_selftest_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR TEMPERATURE SOURCE  */
+/**************************************************/
+/*!
+ *	@brief This API used to read the temperature source
+ *	from register from 0x40 bit 0 and 1
+ *
+ *	@param v_temp_source_u_8 : The value of selected temperature source
+ *
+ *     v_temp_source_u_8 | result
+ *    ----------------  |---------------
+ *      0x00            | ACCEL_TEMP_EN
+ *      0X01            | GYRO_TEMP_EN
+ *      0X03            | MCU_TEMP_EN
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_temp_source(
+u_8 *v_temp_source_u_8);
+/*!
+ *	@brief This API used to write the temperature source
+ *	from register from 0x40 bit 0 and 1
+ *
+ *	@param v_temp_source_u_8 : The value of selected temperature source
+ *
+ *     v_temp_source_u_8 | result
+ *    ----------------  |---------------
+ *      0x00            | ACCEL_TEMP_EN
+ *      0X01            | GYRO_TEMP_EN
+ *      0X03            | MCU_TEMP_EN
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_temp_source(u_8 v_temp_source_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR AXIS REMAP  */
+/**************************************************/
+/*!
+ *	@brief This API used to read the axis remap value
+ *	from register from 0x41 bit 0 and 5
+ *
+ *	@param v_remap_axis_u_8 : The value of axis remapping
+ *
+ *    v_remap_axis_u_8 |   result     | comments
+ *   ------------|-------------------|------------
+ *      0X21     | REMAP_X_Y         | Z=Z;X=Y;Y=X
+ *      0X18     | REMAP_Y_Z         | X=X;Y=Z;Z=Y
+ *      0X06     | REMAP_Z_X         | Y=Y;X=Z;Z=X
+ *      0X12     | REMAP_X_Y_Z_TYPE0 | X=Z;Y=X;Z=Y
+ *      0X09     | REMAP_X_Y_Z_TYPE1 | X=Y;Y=Z;Z=X
+ *      0X24     | DEFAULT_AXIS      | X=X;Y=Y;Z=Z
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note : For axis sign remap refer the following functions
+ *	x-axis :
+ *
+ *	bno055_set_x_remap_sign()
+ *
+ *	y-axis :
+ *
+ *	bno055_set_y_remap_sign()
+ *
+ *	z-axis :
+ *
+ *	bno055_set_z_remap_sign()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_axis_remap_value(
+u_8 *v_remap_axis_u_8);
+/*!
+ *	@brief This API used to write the axis remap value
+ *	from register from 0x41 bit 0 and 5
+ *
+ *	@param v_remap_axis_u_8 : The value of axis remapping
+ *
+ *    v_remap_axis_u_8 |   result     | comments
+ *   ------------|-------------------|------------
+ *      0X21     | REMAP_X_Y         | Z=Z;X=Y;Y=X
+ *      0X18     | REMAP_Y_Z         | X=X;Y=Z;Z=Y
+ *      0X06     | REMAP_Z_X         | Y=Y;X=Z;Z=X
+ *      0X12     | REMAP_X_Y_Z_TYPE0 | X=Z;Y=X;Z=Y
+ *      0X09     | REMAP_X_Y_Z_TYPE1 | X=Y;Y=Z;Z=X
+ *      0X24     | DEFAULT_AXIS      | X=X;Y=Y;Z=Z
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note : For axis sign remap refer the following functions
+ *	x-axis :
+ *
+ *	bno055_set_x_remap_sign()
+ *
+ *	y-axis :
+ *
+ *	bno055_set_y_remap_sign()
+ *
+ *	z-axis :
+ *
+ *	bno055_set_z_remap_sign()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_axis_remap_value(
+u_8 v_remap_axis_u_8);
+/**************************************************/
+/**\name FUNCTIONS FOR AXIS REMAP SIGN  */
+/**************************************************/
+/*!
+ *	@brief This API used to read the x-axis remap
+ *	sign from register from 0x42 bit 2
+ *
+ *	@param v_remap_x_sign_u_8 : The value of x-axis remap sign
+ *
+ *    v_remap_x_sign_u_8  |    result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_remap_x_sign(
+u_8 *v_remap_x_sign_u_8);
+/*!
+ *	@brief This API used to write the x-axis remap
+ *	sign from register from 0x42 bit 2
+ *
+ *	@param v_remap_x_sign_u_8 : The value of x-axis remap sign
+ *
+ *    v_remap_x_sign_u_8  |    result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_remap_x_sign(
+u_8 v_remap_x_sign_u_8);
+/*!
+ *	@brief This API used to read the y-axis remap
+ *	sign from register from 0x42 bit 1
+ *
+ *	@param v_remap_y_sign_u_8 : The value of y-axis remap sign
+ *
+ *    v_remap_y_sign_u_8  |   result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_remap_y_sign(
+u_8 *v_remap_y_sign_u_8);
+/*!
+ *	@brief This API used to write the y-axis remap
+ *	sign from register from 0x42 bit 1
+ *
+ *	@param v_remap_y_sign_u_8 : The value of y-axis remap sign
+ *
+ *    v_remap_y_sign_u_8  |   result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_remap_y_sign(
+u_8 v_remap_y_sign_u_8);
+/*!
+ *	@brief This API used to read the z-axis remap
+ *	sign from register from 0x42 bit 0
+ *
+ *	@param v_remap_z_sign_u_8 : The value of z-axis remap sign
+ *
+ *    v_remap_z_sign_u_8  |   result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_remap_z_sign(
+u_8 *v_remap_z_sign_u_8);
+/*!
+ *	@brief This API used to write the z-axis remap
+ *	sign from register from 0x42 bit 0
+ *
+ *	@param v_remap_z_sign_u_8 : The value of z-axis remap sign
+ *
+ *    v_remap_z_sign_u_8  |   result
+ *   ------------------- |--------------------
+ *      0X00             | REMAP_AXIS_POSITIVE
+ *      0X01             | REMAP_AXIS_NEGATIVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_remap_z_sign(
+u_8 v_remap_z_sign_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR SOFT IRON CALIBRATION MATRIX  */
+/*****************************************************/
+/*!
+ *	@brief This API is used to read soft iron calibration matrix
+ *	from the register 0x43 to 0x53 it is a 18 bytes of data
+ *
+ *	@param sic_matrix : The value of soft iron calibration matrix
+ *
+ *	sic_matrix         |           result
+ * --------------------|----------------------------------
+ *       sic_0         | soft iron calibration matrix zero
+ *       sic_1         | soft iron calibration matrix one
+ *       sic_2         | soft iron calibration matrix two
+ *       sic_3         | soft iron calibration matrix three
+ *       sic_4         | soft iron calibration matrix four
+ *       sic_5         | soft iron calibration matrix five
+ *       sic_6         | soft iron calibration matrix six
+ *       sic_7         | soft iron calibration matrix seven
+ *       sic_8         | soft iron calibration matrix eight
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note : Each soft iron calibration matrix range from -32768 to +32767
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_sic_matrix(
+struct bno055_sic_matrix_t  *sic_matrix);
+/*!
+ *	@brief This API is used to write soft iron calibration matrix
+ *	from the register 0x43 to 0x53 it is a 18 bytes of data
+ *
+ *	@param sic_matrix : The value of soft iron calibration matrix
+ *
+ *	sic_matrix         |           result
+ * --------------------|----------------------------------
+ *       sic_0         | soft iron calibration matrix zero
+ *       sic_1         | soft iron calibration matrix one
+ *       sic_2         | soft iron calibration matrix two
+ *       sic_3         | soft iron calibration matrix three
+ *       sic_4         | soft iron calibration matrix four
+ *       sic_5         | soft iron calibration matrix five
+ *       sic_6         | soft iron calibration matrix six
+ *       sic_7         | soft iron calibration matrix seven
+ *       sic_8         | soft iron calibration matrix eight
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note : Each soft iron calibration matrix range from -32768 to +32767
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_sic_matrix(
+struct bno055_sic_matrix_t  *sic_matrix);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL OFFSET AND RADIUS */
+/*****************************************************/
+/*!
+ *	@brief This API is used to read accel offset and accel radius
+ *	offset form register 0x55 to 0x5A and radius form 0x67 and 0x68
+ *
+ *	@param accel_offset : The value of accel offset and radius
+ *
+ *	    bno055_accel_offset_t |     result
+ *      ------------------- | ----------------
+ *	             x          |  accel offset x
+ *               y          |  accel offset y
+ *	             z          |  accel offset z
+ *               r          |  accel offset r
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the accel offset varies based on
+ *	the G-range of accel sensor.
+ *
+ *  accel G range   |  offset range
+ * ---------------  |  --------------
+ *  ACCEL_RANGE_2G  |   +/-2000
+ *  ACCEL_RANGE_4G  |   +/-4000
+ *  ACCEL_RANGE_8G  |   +/-8000
+ *  ACCEL_RANGE_16G |   +/-16000
+ *
+ *	accel G range can be configured by using the
+ *	bno055_set_accel_range() function
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_accel_offset(
+struct bno055_accel_offset_t  *accel_offset);
+/*!
+ *	@brief This API is used to write accel offset and accel radius
+ *	offset form register 0x55 to 0x5A and radius form 0x67 and 0x68
+ *
+ *	@param accel_offset : The value of accel offset and radius
+ *
+ *	    bno055_accel_offset_t |     result
+ *      ------------------- | ----------------
+ *	             x          |  accel offset x
+ *               y          |  accel offset y
+ *	             z          |  accel offset z
+ *               r          |  accel offset r
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the accel offset varies based on
+ *	the G-range of accel sensor.
+ *
+ *  accel G range   |  offset range
+ * ---------------  |  --------------
+ *  ACCEL_RANGE_2G  |   +/-2000
+ *  ACCEL_RANGE_4G  |   +/-4000
+ *  ACCEL_RANGE_8G  |   +/-8000
+ *  ACCEL_RANGE_16G |   +/-16000
+ *
+ *	accel G range can be configured by using the
+ *	bno055_set_accel_range() function
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_accel_offset(
+struct bno055_accel_offset_t  *accel_offset);
+/*****************************************************/
+/**\name FUNCTIONS FOR MAG OFFSET AND RADIUS*/
+/*****************************************************/
+/*!
+ *	@brief This API is used to read mag offset
+ *	offset form register 0x69 to 0x6A
+ *
+ *	@param mag_offset :  The value of mag offset and radius
+ *
+ *	    bno055_mag_offset_t   |     result
+ *      ------------------- | ----------------
+ *	             x          |  mag offset x
+ *               y          |  mag offset y
+ *	             z          |  mag offset z
+ *               r          |  mag radius r
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the magnetometer offset is +/-6400 in LSB
+ */
+
+BNO055_RETURN_FUNCTION_TYPE bno055_read_mag_offset(
+struct bno055_mag_offset_t  *mag_offset);
+/*!
+ *	@brief This API is used to read mag offset
+ *	offset form register 0x69 to 0x6A
+ *
+ *	@param mag_offset :  The value of mag offset and radius
+ *
+ *	    bno055_mag_offset_t   |     result
+ *      ------------------- | ----------------
+ *	             x          |  mag offset x
+ *               y          |  mag offset y
+ *	             z          |  mag offset z
+ *               r          |  mag radius r
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the magnetometer offset is +/-6400 in LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_mag_offset(
+struct bno055_mag_offset_t  *mag_offset);
+/*****************************************************/
+/**\name FUNCTIONS FOR GYRO OFFSET */
+/*****************************************************/
+/*!
+ *	@brief This API is used to read gyro offset
+ *	offset form register 0x61 to 0x66
+ *
+ *	@param gyro_offset : The value of gyro offset
+ *
+ *	    bno055_gyro_offset_t  |     result
+ *      ------------------- | ----------------
+ *	             x          |  gyro offset x
+ *               y          |  gyro offset y
+ *	             z          |  gyro offset z
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the gyro offset varies based on
+ *	the range of gyro sensor
+ *
+ *	gyro G range         | offset range
+ * --------------------  | ------------
+ *  GYRO_RANGE_2000DPS   | +/-32000
+ *  GYRO_RANGE_1000DPS   | +/-16000
+ *  GYRO_RANGE_500DPS    | +/-8000
+ *  GYRO_RANGE_250DPS    | +/-4000
+ *  GYRO_RANGE_125DPS    | +/-2000
+ *
+ *	Gyro range can be configured by using the
+ *	bno055_set_gyro_range() function
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_read_gyro_offset(
+struct bno055_gyro_offset_t  *gyro_offset);
+/*!
+ *	@brief This API is used to read gyro offset
+ *	offset form register 0x61 to 0x66
+ *
+ *	@param gyro_offset : The value of gyro offset
+ *
+ *	    bno055_gyro_offset_t  |     result
+ *      ------------------- | ----------------
+ *	             x          |  gyro offset x
+ *               y          |  gyro offset y
+ *	             z          |  gyro offset z
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note  The range of the gyro offset varies based on
+ *	the range of gyro sensor
+ *
+ *	gyro G range         | offset range
+ * --------------------  | ------------
+ *  GYRO_RANGE_2000DPS   | +/-32000
+ *  GYRO_RANGE_1000DPS   | +/-16000
+ *  GYRO_RANGE_500DPS    | +/-8000
+ *  GYRO_RANGE_250DPS    | +/-4000
+ *  GYRO_RANGE_125DPS    | +/-2000
+ *
+ *	Gyro range can be configured by using the
+ *	bno055_set_gyro_range() function
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_write_gyro_offset(
+struct bno055_gyro_offset_t *gyro_offset);
+/********************************************************/
+/************** PAGE1 Functions *********************/
+/********************************************************/
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL CONFIGURATION */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel range
+ *	from page one register from 0x08 bit 0 and 1
+ *
+ *	@param v_accel_range_u_8 : The value of accel range
+ *		  v_accel_range_u_8 |   result
+ *       ----------------- | --------------
+ *              0x00       | ACCEL_RANGE_2G
+ *              0x01       | ACCEL_RANGE_4G
+ *              0x02       | ACCEL_RANGE_8G
+ *              0x03       | ACCEL_RANGE_16G
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_range(
+u_8 *v_accel_range_u_8);
+/*!
+ *	@brief This API used to write the accel range
+ *	from page one register from 0x08 bit 0 and 1
+ *
+ *	@param v_accel_range_u_8 : The value of accel range
+ *
+ *		  v_accel_range_u_8 |   result
+ *       ----------------- | --------------
+ *              0x00       | ACCEL_RANGE_2G
+ *              0x01       | ACCEL_RANGE_4G
+ *              0x02       | ACCEL_RANGE_8G
+ *              0x03       | ACCEL_RANGE_16G
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_range(
+u_8 v_accel_range_u_8);
+/*!
+ *	@brief This API used to read the accel bandwidth
+ *	from page one register from 0x08 bit 2 to 4
+ *
+ *	@param v_accel_bw_u_8 : The value of accel bandwidth
+ *
+ *		     v_accel_bw_u_8 |     result
+ *       ----------------- | ---------------
+ *              0x00       | ACCEL_BW_7_81HZ
+ *              0x01       | ACCEL_BW_15_63HZ
+ *              0x02       | ACCEL_BW_31_25HZ
+ *              0x03       | ACCEL_BW_62_5HZ
+ *              0x04       | ACCEL_BW_125HZ
+ *              0x05       | ACCEL_BW_250HZ
+ *              0x06       | ACCEL_BW_500HZ
+ *              0x07       | ACCEL_BW_1000HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_bw(
+u_8 *v_accel_bw_u_8);
+/*!
+ *	@brief This API used to write the accel bandwidth
+ *	from page one register from 0x08 bit 2 to 4
+ *
+ *	@param v_accel_bw_u_8 : The value of accel bandwidth
+ *
+ *		     v_accel_bw_u_8 |     result
+ *       ----------------- | ---------------
+ *              0x00       | ACCEL_BW_7_81HZ
+ *              0x01       | ACCEL_BW_15_63HZ
+ *              0x02       | ACCEL_BW_31_25HZ
+ *              0x03       | ACCEL_BW_62_5HZ
+ *              0x04       | ACCEL_BW_125HZ
+ *              0x05       | ACCEL_BW_250HZ
+ *              0x06       | ACCEL_BW_500HZ
+ *              0x07       | ACCEL_BW_1000HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_bw(
+u_8 v_accel_bw_u_8);
+/*!
+ *	@brief This API used to read the accel power mode
+ *	from page one register from 0x08 bit 5 to 7
+ *
+ *	@param v_accel_power_mode_u_8 : The value of accel power mode
+ * v_accel_power_mode_u_8 |   result
+ *   -----------------   | -------------
+ *              0x00     | ACCEL_NORMAL
+ *              0x01     | ACCEL_SUSPEND
+ *              0x02     | ACCEL_LOWPOWER_1
+ *              0x03     | ACCEL_STANDBY
+ *              0x04     | ACCEL_LOWPOWER_2
+ *              0x05     | ACCEL_DEEPSUSPEND
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_power_mode(
+u_8 *v_accel_power_mode_u_8);
+/*!
+ *	@brief This API used to write the accel power mode
+ *	from page one register from 0x08 bit 5 to 7
+ *
+ *	@param v_accel_power_mode_u_8 : The value of accel power mode
+ * v_accel_power_mode_u_8 |   result
+ *   -----------------   | -------------
+ *              0x00     | ACCEL_NORMAL
+ *              0x01     | ACCEL_SUSPEND
+ *              0x02     | ACCEL_LOWPOWER_1
+ *              0x03     | ACCEL_STANDBY
+ *              0x04     | ACCEL_LOWPOWER_2
+ *              0x05     | ACCEL_DEEPSUSPEND
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_power_mode(
+u_8 v_accel_power_mode_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR MAG CONFIGURATION */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the mag output data rate
+ *	from page one register from 0x09 bit 0 to 2
+ *
+ *	@param v_mag_data_output_rate_u_8 : The value of mag output data rate
+ *
+ *  v_mag_data_output_rate_u_8 |   result
+ *  ----------------------    |----------------------
+ *     0x00                   | MAG_DATA_OUTPUT_RATE_2HZ
+ *     0x01                   | MAG_DATA_OUTPUT_RATE_6HZ
+ *     0x02                   | MAG_DATA_OUTPUT_RATE_8HZ
+ *     0x03                   | MAG_DATA_OUTPUT_RATE_10HZ
+ *     0x04                   | MAG_DATA_OUTPUT_RATE_15HZ
+ *     0x05                   | MAG_DATA_OUTPUT_RATE_20HZ
+ *     0x06                   | MAG_DATA_OUTPUT_RATE_25HZ
+ *     0x07                   | MAG_DATA_OUTPUT_RATE_30HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_data_output_rate(
+u_8 *v_mag_data_output_rate_u_8);
+/*!
+ *	@brief This API used to write the mag output data rate
+ *	from page one register from 0x09 bit 0 to 2
+ *
+ *	@param v_mag_data_output_rate_u_8 : The value of mag output data rate
+ *
+ *  v_mag_data_output_rate_u_8 |   result
+ *  ----------------------    |----------------------
+ *     0x00                   | MAG_DATA_OUTPUT_RATE_2HZ
+ *     0x01                   | MAG_DATA_OUTPUT_RATE_6HZ
+ *     0x02                   | MAG_DATA_OUTPUT_RATE_8HZ
+ *     0x03                   | MAG_DATA_OUTPUT_RATE_10HZ
+ *     0x04                   | MAG_DATA_OUTPUT_RATE_15HZ
+ *     0x05                   | MAG_DATA_OUTPUT_RATE_20HZ
+ *     0x06                   | MAG_DATA_OUTPUT_RATE_25HZ
+ *     0x07                   | MAG_DATA_OUTPUT_RATE_30HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_data_output_rate(
+u_8 v_mag_data_output_rate_u_8);
+/*!
+ *	@brief This API used to read the mag operation mode
+ *	from page one register from 0x09 bit 3 to 4
+ *
+ *	@param v_mag_operation_mode_u_8 : The value of mag operation mode
+ *
+ *  v_mag_operation_mode_u_8  |      result
+ * ------------------------- |--------------------------
+ *     0x00                  | MAG_OPR_MODE_LOWPOWER
+ *     0x01                  | MAG_OPR_MODE_REGULAR
+ *     0x02                  | MAG_OPR_MODE_ENHANCED_REGULAR
+ *     0x03                  | MAG_OPR_MODE_HIGH_ACCURACY
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_operation_mode(
+u_8 *v_mag_operation_mode_u_8);
+/*!
+ *	@brief This API used to write the mag operation mode
+ *	from page one register from 0x09 bit 3 to 4
+ *
+ *	@param v_mag_operation_mode_u_8 : The value of mag operation mode
+ *
+ *  v_mag_operation_mode_u_8  |      result
+ * ------------------------- |--------------------------
+ *     0x00                  | MAG_OPR_MODE_LOWPOWER
+ *     0x01                  | MAG_OPR_MODE_REGULAR
+ *     0x02                  | MAG_OPR_MODE_ENHANCED_REGULAR
+ *     0x03                  | MAG_OPR_MODE_HIGH_ACCURACY
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_operation_mode(
+u_8 v_mag_operation_mode_u_8);
+/*!
+ *	@brief This API used to read the mag power mode
+ *	from page one register from 0x09 bit 4 to 6
+ *
+ *	@param v_mag_power_mode_u_8 : The value of mag power mode
+ *
+ * v_mag_power_mode_u_8 |   result
+ * --------------------|-----------------
+ *     0x00            | MAG_POWER_MODE_NORMAL
+ *     0x01            | MAG_POWER_MODE_SLEEP
+ *     0x02            | MAG_POWER_MODE_SUSPEND
+ *     0x03            | MAG_POWER_MODE_FORCE_MODE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_power_mode(
+u_8 *v_mag_power_mode_u_8);
+/*!
+ *	@brief This API used to write the mag power mode
+ *	from page one register from 0x09 bit 4 to 6
+ *
+ *	@param v_mag_power_mode_u_8 : The value of mag power mode
+ *
+ * v_mag_power_mode_u_8 |   result
+ * --------------------|-----------------
+ *     0x00            | MAG_POWER_MODE_NORMAL
+ *     0x01            | MAG_POWER_MODE_SLEEP
+ *     0x02            | MAG_POWER_MODE_SUSPEND
+ *     0x03            | MAG_POWER_MODE_FORCE_MODE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_power_mode(
+u_8 v_mag_power_mode_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR GYRO CONFIGURATION */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the gyro range
+ *	from page one register from 0x0A bit 0 to 3
+ *
+ *	@param v_gyro_range_u_8 : The value of gyro range
+ *
+ *     v_gyro_range_u_8 |   result
+ * --------------------|-----------------
+ *     0x00            | GYRO_RANGE_2000DPS
+ *     0x01            | GYRO_RANGE_1000DPS
+ *     0x02            | GYRO_RANGE_500DPS
+ *     0x03            | GYRO_RANGE_250DPS
+ *     0x04            | GYRO_RANGE_125DPS
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_range(
+u_8 *v_gyro_range_u_8);
+/*!
+ *	@brief This API used to write the gyro range
+ *	from page one register from 0x0A bit 0 to 3
+ *
+ *	@param v_gyro_range_u_8 : The value of gyro range
+ *
+ *     v_gyro_range_u_8 |   result
+ * --------------------|-----------------
+ *     0x00            | GYRO_RANGE_2000DPS
+ *     0x01            | GYRO_RANGE_1000DPS
+ *     0x02            | GYRO_RANGE_500DPS
+ *     0x03            | GYRO_RANGE_250DPS
+ *     0x04            | GYRO_RANGE_125DPS
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_range(
+u_8 v_gyro_range_u_8);
+/*!
+ *	@brief This API used to read the gyro bandwidth
+ *	from page one register from 0x0A bit 3 to 5
+ *
+ *	@param v_gyro_bw_u_8 : The value of gyro bandwidth
+ *
+ *     v_gyro_bw_u_8    |   result
+ * --------------------|-----------------
+ *     0x00            | GYRO_BW_523HZ
+ *     0x01            | GYRO_BW_230HZ
+ *     0x02            | GYRO_BW_116HZ
+ *     0x03            | GYRO_BW_47HZ
+ *     0x04            | GYRO_BW_23HZ
+ *     0x05            | GYRO_BW_12HZ
+ *     0x06            | GYRO_BW_64HZ
+ *     0x07            | GYRO_BW_32HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_bw(
+u_8 *v_gyro_bw_u_8);
+/*!
+ *	@brief This API used to write the gyro bandwidth
+ *	from page one register from 0x0A bit 3 to 5
+ *
+ *	@param v_gyro_bw_u_8 : The value of gyro bandwidth
+ *
+ *     v_gyro_bw_u_8    |   result
+ * --------------------|-----------------
+ *     0x00            | GYRO_BW_523HZ
+ *     0x01            | GYRO_BW_230HZ
+ *     0x02            | GYRO_BW_116HZ
+ *     0x03            | GYRO_BW_47HZ
+ *     0x04            | GYRO_BW_23HZ
+ *     0x05            | GYRO_BW_12HZ
+ *     0x06            | GYRO_BW_64HZ
+ *     0x07            | GYRO_BW_32HZ
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_bw(
+u_8 v_gyro_bw_u_8);
+/*!
+ *	@brief This API used to read the gyro power mode
+ *	from page one register from 0x0B bit 0 to 2
+ *
+ *	@param v_gyro_power_mode_u_8 : The value of gyro power mode
+ *
+ *  v_gyro_power_mode_u_8 |          result
+ * ----------------------|----------------------------
+ *     0x00              | GYRO_OPR_MODE_NORMAL
+ *     0x01              | GYRO_OPR_MODE_FASTPOWERUP
+ *     0x02              | GYRO_OPR_MODE_DEEPSUSPEND
+ *     0x03              | GYRO_OPR_MODE_SUSPEND
+ *     0x04              | GYRO_OPR_MODE_ADVANCE_POWERSAVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_power_mode(
+u_8 *v_gyro_power_mode_u_8);
+/*!
+ *	@brief This API used to write the gyro power mode
+ *	from page one register from 0x0B bit 0 to 2
+ *
+ *	@param v_gyro_power_mode_u_8 : The value of gyro power mode
+ *
+ *  v_gyro_power_mode_u_8 |          result
+ * ----------------------|----------------------------
+ *     0x00              | GYRO_OPR_MODE_NORMAL
+ *     0x01              | GYRO_OPR_MODE_FASTPOWERUP
+ *     0x02              | GYRO_OPR_MODE_DEEPSUSPEND
+ *     0x03              | GYRO_OPR_MODE_SUSPEND
+ *     0x04              | GYRO_OPR_MODE_ADVANCE_POWERSAVE
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_power_mode(
+u_8 v_gyro_power_mode_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL SLEEP SETTINGS  */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel sleep mode
+ *	from page one register from 0x0C bit 0
+ *
+ *	@param v_sleep_tmr_u_8 : The value of accel sleep mode
+ *
+ *  v_sleep_tmr_u_8   |   result
+ * ----------------- |------------------------------------
+ *     0x00          | enable EventDrivenSampling(EDT)
+ *     0x01          | enable Equidistant sampling mode(EST)
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_sleep_tmr_mode(
+u_8 *v_sleep_tmr_u_8);
+/*!
+ *	@brief This API used to write the accel sleep mode
+ *	from page one register from 0x0C bit 0
+ *
+ *	@param v_sleep_tmr_u_8 : The value of accel sleep mode
+ *
+ *  v_sleep_tmr_u_8   |   result
+ * ----------------- |------------------------------------
+ *     0x00          | enable EventDrivenSampling(EDT)
+ *     0x01          | enable Equidistant sampling mode(EST)
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_sleep_tmr_mode(
+u_8 v_sleep_tmr_u_8);
+/*!
+ *	@brief This API used to read the accel sleep duration
+ *	from page one register from 0x0C bit 1 to 4
+ *
+ *	@param v_sleep_durn_u_8 : The value of accel sleep duration
+ *
+ * v_sleep_durn_u_8  |      result
+ * ---------------- |-----------------------------
+ *     0x05         | BNO055_ACCEL_SLEEP_DURN_0_5MS
+ *     0x06         | BNO055_ACCEL_SLEEP_DURN_1MS
+ *     0x07         | BNO055_ACCEL_SLEEP_DURN_2MS
+ *     0x08         | BNO055_ACCEL_SLEEP_DURN_4MS
+ *     0x09         | BNO055_ACCEL_SLEEP_DURN_6MS
+ *     0x0A         | BNO055_ACCEL_SLEEP_DURN_10MS
+ *     0x0B         | BNO055_ACCEL_SLEEP_DURN_25MS
+ *     0x0C         | BNO055_ACCEL_SLEEP_DURN_50MS
+ *     0x0D         | BNO055_ACCEL_SLEEP_DURN_100MS
+ *     0x0E         | BNO055_ACCEL_SLEEP_DURN_500MS
+ *     0x0F         | BNO055_ACCEL_SLEEP_DURN_1S
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_sleep_durn(
+u_8 *v_sleep_durn_u_8);
+/*!
+ *	@brief This API used to write the accel sleep duration
+ *	from page one register from 0x0C bit 1 to 4
+ *
+ *	@param v_sleep_durn_u_8 : The value of accel sleep duration
+ *
+ * v_sleep_durn_u_8  |      result
+ * ---------------- |-----------------------------
+ *     0x05         | BNO055_ACCEL_SLEEP_DURN_0_5MS
+ *     0x06         | BNO055_ACCEL_SLEEP_DURN_1MS
+ *     0x07         | BNO055_ACCEL_SLEEP_DURN_2MS
+ *     0x08         | BNO055_ACCEL_SLEEP_DURN_4MS
+ *     0x09         | BNO055_ACCEL_SLEEP_DURN_6MS
+ *     0x0A         | BNO055_ACCEL_SLEEP_DURN_10MS
+ *     0x0B         | BNO055_ACCEL_SLEEP_DURN_25MS
+ *     0x0C         | BNO055_ACCEL_SLEEP_DURN_50MS
+ *     0x0D         | BNO055_ACCEL_SLEEP_DURN_100MS
+ *     0x0E         | BNO055_ACCEL_SLEEP_DURN_500MS
+ *     0x0F         | BNO055_ACCEL_SLEEP_DURN_1S
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_sleep_durn(
+u_8 v_sleep_durn_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR GYRO SLEEP SETTINGS  */
+/*****************************************************/
+/*!
+ *	@brief This API used to write the gyro sleep duration
+ *	from page one register from 0x0D bit 0 to 2
+ *
+ *	@param v_sleep_durn_u_8 : The value of gyro sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_sleep_durn(
+u_8 *v_sleep_durn_u_8);
+/*!
+ *	@brief This API used to write the gyro sleep duration
+ *	from page one register from 0x0D bit 0 to 2
+ *
+ *	@param v_sleep_durn_u_8 : The value of gyro sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_sleep_durn(
+u_8 sleep_durn);
+/*!
+ *	@brief This API used to read the gyro auto sleep duration
+ *	from page one register from 0x0D bit 3 to 5
+ *
+ *	@param v_auto_sleep_durn_u_8 : The value of gyro auto sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_auto_sleep_durn(
+u_8 *v_auto_sleep_durn_u_8);
+/*!
+ *	@brief This API used to write the gyro auto sleep duration
+ *	from page one register from 0x0D bit 3 to 5
+ *
+ *	@param v_auto_sleep_durn_u_8 : The value of gyro auto sleep duration
+ *	@param bw : The value of gyro bandwidth
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_gyro_set_auto_sleep_durn(
+u_8 v_auto_sleep_durn_u_8, u_8 bw);
+/*****************************************************/
+/**\name FUNCTIONS FOR MAG SLEEP SETTINGS  */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the mag sleep mode
+ *	from page one register from 0x0E bit 0
+ *
+ *	@param v_sleep_mode_u_8 : The value of mag sleep mode
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_sleep_mode(
+u_8 *v_sleep_mode_u_8);
+/*!
+ *	@brief This API used to write the mag sleep mode
+ *	from page one register from 0x0E bit 0
+ *
+ *	@param v_sleep_mode_u_8 : The value of mag sleep mode
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_sleep_mode(
+u_8 v_sleep_mode_u_8);
+/*!
+ *	@brief This API used to read the mag sleep duration
+ *	from page one register from 0x0E bit 1 to 4
+ *
+ *	@param v_sleep_durn_u_8 : The value of mag sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_mag_sleep_durn(
+u_8 *v_sleep_durn_u_8);
+/*!
+ *	@brief This API used to write the mag sleep duration
+ *	from page one register from 0x0E bit 1 to 4
+ *
+ *	@param v_sleep_durn_u_8 : The value of mag sleep duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_mag_sleep_durn(
+u_8 v_sleep_durn_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR GYRO INTERRUPT MASK  */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the gyro anymotion interrupt mask
+ *	from page one register from 0x0F bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt mask
+ *		v_gyro_any_motion_u_8 |   result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *	bno055_set_gyro_any_motion_axis_enable()
+ *
+ *	Filter setting:
+ *	bno055_set_gyro_any_motion_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_gyro_any_motion_thres()
+ *
+ *	Slope samples :
+ *
+ *	bno055_set_gyro_any_motion_slope_samples()
+ *
+ *	Awake duration :
+ *
+ *	bno055_set_gyro_any_motion_awake_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_gyro_any_motion(
+u_8 *v_gyro_any_motion_u_8);
+/*!
+ *	@brief This API used to write the gyro anymotion interrupt mask
+ *	from page one register from 0x0F bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt mask
+ *		v_gyro_any_motion_u_8 |   result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *	bno055_set_gyro_any_motion_axis_enable()
+ *
+ *	Filter setting:
+ *	bno055_set_gyro_any_motion_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_gyro_any_motion_thres()
+ *
+ *	Slope samples :
+ *
+ *	bno055_set_gyro_any_motion_slope_samples()
+ *
+ *	Awake duration :
+ *
+ *	bno055_set_gyro_any_motion_awake_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_gyro_any_motion(
+u_8 v_gyro_any_motion_u_8);
+/*!
+ *	@brief This API used to read the gyro highrate interrupt mask
+ *	from page one register from 0x0F bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt mask
+ *		  v_gyro_highrate_u_8 |  result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro highrate interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_gyro_highrate_axis_enable()
+ *
+ *	Filter :
+ *
+ *	bno055_set_gyro_highrate_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_get_gyro_highrate_x_thres()
+ *
+ *	bno055_get_gyro_highrate_y_thres()
+ *
+ *	bno055_get_gyro_highrate_z_thres()
+ *
+ *	Hysteresis :
+ *
+ *	bno055_set_gyro_highrate_x_hyst()
+ *
+ *	bno055_set_gyro_highrate_y_hyst()
+ *
+ *	bno055_set_gyro_highrate_z_hyst()
+ *
+ *	Duration :
+ *
+ *	bno055_set_gyro_highrate_x_durn()
+ *
+ *	bno055_set_gyro_highrate_y_durn()
+ *
+ *	bno055_set_gyro_highrate_z_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_gyro_highrate(
+u_8 *v_gyro_highrate_u_8);
+/*!
+ *	@brief This API used to write the gyro highrate interrupt mask
+ *	from page one register from 0x0F bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt mask
+ *		  v_gyro_highrate_u_8 |  result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro highrate interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_gyro_highrate_axis_enable()
+ *
+ *	Filter :
+ *
+ *	bno055_set_gyro_highrate_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_get_gyro_highrate_x_thres()
+ *
+ *	bno055_get_gyro_highrate_y_thres()
+ *
+ *	bno055_get_gyro_highrate_z_thres()
+ *
+ *	Hysteresis :
+ *
+ *	bno055_set_gyro_highrate_x_hyst()
+ *
+ *	bno055_set_gyro_highrate_y_hyst()
+ *
+ *	bno055_set_gyro_highrate_z_hyst()
+ *
+ *	Duration :
+ *
+ *	bno055_set_gyro_highrate_x_durn()
+ *
+ *	bno055_set_gyro_highrate_y_durn()
+ *
+ *	bno055_set_gyro_highrate_z_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_gyro_highrate(
+u_8 v_gyro_highrate_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL INTERRUPT MASK  */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel highg interrupt mask
+ *	from page one register from 0x0F bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt mask
+ *		   v_accel_high_g_u_8 |   result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_accel_high_g(
+u_8 *v_accel_high_g_u_8);
+/*!
+ *	@brief This API used to write the accel highg interrupt mask
+ *	from page one register from 0x0F bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt mask
+ *		   v_accel_high_g_u_8 |   result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_accel_high_g(
+u_8 v_accel_high_g_u_8);
+/*!
+ *	@brief This API used to read the accel anymotion interrupt mask
+ *	from page one register from 0x0F bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt mask
+ *     v_accel_any_motion_u_8 | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_accel_any_motion(
+u_8 *v_accel_any_motion_u_8);
+/*!
+ *	@brief This API used to write the accel anymotion interrupt mask
+ *	from page one register from 0x0F bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt mask
+ *     v_accel_any_motion_u_8 | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Duration:
+ *
+ *	bno055_set_accel_any_motion_durn()
+ *
+ * Threshold:
+ *
+ *	bno055_set_accel_any_motion_thres()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_accel_any_motion(
+u_8 v_accel_any_motion_u_8);
+/*!
+ *	@brief This API used to read the accel nomotion interrupt mask
+ *	from page one register from 0x0F bit 7
+ *
+ *	@param v_accel_nomotion_u_8 : The value of accel nomotion interrupt mask
+ *     v_accel_nomotion_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *
+ *	@note While enabling the accel anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Duration:
+ *
+ *	bno055_set_accel_any_motion_durn()
+ *
+ * Threshold:
+ *
+ *	bno055_set_accel_any_motion_thres())
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_mask_accel_no_motion(
+u_8 *v_accel_nomotion_u_8);
+/*!
+ *	@brief This API used to write the accel nomotion interrupt mask
+ *	from page one register from 0x0F bit 7
+ *
+ *	@param v_accel_nomotion_u_8 : The value of accel nomotion interrupt mask
+ *     v_accel_nomotion_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel nomotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_slow_no_motion_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_slow_no_motion_durn()
+ *
+ *	Slow/no motion enable:
+ *
+ *	bno055_set_accel_slow_no_motion_enable()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_mask_accel_no_motion(
+u_8 v_accel_nomotion_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR GYRO INTERRUPT */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the gyro anymotion interrupt
+ *	from page one register from 0x10 bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt
+ *		v_gyro_any_motion_u_8 | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *	bno055_set_gyro_any_motion_axis_enable()
+ *
+ *	Filter setting:
+ *	bno055_set_gyro_any_motion_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_gyro_any_motion_thres()
+ *
+ *	Slope samples :
+ *
+ *	bno055_set_gyro_any_motion_slope_samples()
+ *
+ *	Awake duration :
+ *
+ *	bno055_set_gyro_any_motion_awake_durn()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_gyro_any_motion(
+u_8 *v_gyro_any_motion_u_8);
+/*!
+ *	@brief This API used to write the gyro anymotion interrupt
+ *	from page one register from 0x10 bit 2
+ *
+ *	@param v_gyro_any_motion_u_8 : The value of gyro anymotion interrupt
+ *	  v_gyro_any_motion_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *	bno055_set_gyro_any_motion_axis_enable()
+ *
+ *	Filter setting:
+ *	bno055_set_gyro_any_motion_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_gyro_any_motion_thres()
+ *
+ *	Slope samples :
+ *
+ *	bno055_set_gyro_any_motion_slope_samples()
+ *
+ *	Awake duration :
+ *
+ *	bno055_set_gyro_any_motion_awake_durn()
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_gyro_any_motion(
+u_8 v_gyro_any_motion_u_8);
+/*!
+ *	@brief This API used to read the gyro highrate interrupt
+ *	from page one register from 0x10 bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt
+ *		v_gyro_highrate_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro highrate interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_gyro_highrate_axis_enable()
+ *
+ *	Filter :
+ *
+ *	bno055_set_gyro_highrate_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_get_gyro_highrate_x_thres()
+ *
+ *	bno055_get_gyro_highrate_y_thres()
+ *
+ *	bno055_get_gyro_highrate_z_thres()
+ *
+ *	Hysteresis :
+ *
+ *	bno055_set_gyro_highrate_x_hyst()
+ *
+ *	bno055_set_gyro_highrate_y_hyst()
+ *
+ *	bno055_set_gyro_highrate_z_hyst()
+ *
+ *	Duration :
+ *
+ *	bno055_set_gyro_highrate_x_durn()
+ *
+ *	bno055_set_gyro_highrate_y_durn()
+ *
+ *	bno055_set_gyro_highrate_z_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_gyro_highrate(
+u_8 *v_gyro_highrate_u_8);
+/*!
+ *	@brief This API used to write the gyro highrate interrupt
+ *	from page one register from 0x10 bit 3
+ *
+ *	@param v_gyro_highrate_u_8 : The value of gyro highrate interrupt
+ *		v_gyro_highrate_u_8   | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the gyro highrate interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_gyro_highrate_axis_enable()
+ *
+ *	Filter :
+ *
+ *	bno055_set_gyro_highrate_filter()
+ *
+ *	Threshold :
+ *
+ *	bno055_get_gyro_highrate_x_thres()
+ *
+ *	bno055_get_gyro_highrate_y_thres()
+ *
+ *	bno055_get_gyro_highrate_z_thres()
+ *
+ *	Hysteresis :
+ *
+ *	bno055_set_gyro_highrate_x_hyst()
+ *
+ *	bno055_set_gyro_highrate_y_hyst()
+ *
+ *	bno055_set_gyro_highrate_z_hyst()
+ *
+ *	Duration :
+ *
+ *	bno055_set_gyro_highrate_x_durn()
+ *
+ *	bno055_set_gyro_highrate_y_durn()
+ *
+ *	bno055_set_gyro_highrate_z_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_gyro_highrate(
+u_8 v_gyro_highrate_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL INTERRUPT  */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel highg interrupt
+ *	from page one register from 0x10 bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt
+ *		v_accel_high_g_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_accel_high_g(
+u_8 *v_accel_high_g_u_8);
+/*!
+ *	@brief This API used to write the accel highg interrupt
+ *	from page one register from 0x10 bit 5
+ *
+ *	@param v_accel_high_g_u_8 : The value of accel highg interrupt
+ *		v_accel_high_g_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel highg interrupt
+ *	configure the below settings by using
+ *	the following functions
+ *
+ *	Axis :
+ *
+ *	bno055_set_accel_high_g_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_high_g_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_high_g_durn()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_accel_high_g(
+u_8 v_accel_high_g_u_8);
+/*!
+ *	@brief This API used to read the accel anymotion interrupt
+ *	from page one register from 0x10 bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt
+ *	v_accel_any_motion_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Duration:
+ *
+ *	bno055_set_accel_any_motion_durn()
+ *
+ * Threshold:
+ *
+ *	bno055_set_accel_any_motion_thres()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_accel_any_motion(
+u_8 *v_accel_any_motion_u_8);
+/*!
+ *	@brief This API used to write the accel anymotion interrupt
+ *	from page one register from 0x10 bit 6
+ *
+ *	@param v_accel_any_motion_u_8 : The value of accel anymotion interrupt
+ *	v_accel_any_motion_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel anymotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Duration:
+ *
+ *	bno055_set_accel_any_motion_durn()
+ *
+ *	Threshold:
+ *
+ *	bno055_set_accel_any_motion_thres()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_accel_any_motion(
+u_8 v_accel_any_motion_u_8);
+/*!
+ *	@brief This API used to read the accel nomotion interrupt
+ *	from page one register from 0x10 bit 6
+ *
+ *	@param v_accel_nomotion_u_8 : The value of accel nomotion interrupt
+ *	  v_accel_nomotion_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel nomotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_slow_no_motion_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_slow_no_motion_durn()
+ *
+ *	Slow/no motion enable:
+ *
+ *	bno055_set_accel_slow_no_motion_enable()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_intr_accel_no_motion(
+u_8 *v_accel_nomotion_u_8);
+/*!
+ *	@brief This API used to write the accel nomotion interrupt
+ *	from page one register from 0x10 bit 6
+ *
+ *	@param v_accel_nomotion_u_8 : The value of accel nomotion interrupt
+ *	  v_accel_nomotion_u_8    | result
+ *     --------------------  |------------
+ *              0x01         | ENABLED
+ *              0x00         | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note While enabling the accel nomotion interrupt
+ *	configure the following settings
+ *
+ *	Axis:
+ *
+ *	bno055_set_accel_any_motion_no_motion_axis_enable()
+ *
+ *	Threshold :
+ *
+ *	bno055_set_accel_slow_no_motion_thres()
+ *
+ *	Duration :
+ *
+ *	bno055_set_accel_slow_no_motion_durn()
+ *
+ *	Slow/no motion enable:
+ *
+ *	bno055_set_accel_slow_no_motion_enable()
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_intr_accel_no_motion(
+u_8 v_accel_nomotion_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL ANY_MOTION THRESHOLD  */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel any motion threshold
+ *	from page one register from 0x11 bit 0 to 7
+ *
+ *	@param v_accel_any_motion_thres_u_8 : The value of any motion threshold
+ *  v_accel_any_motion_thres_u_8 | result
+ *  ------------------------    | -------------
+ *              0x01            | ENABLED
+ *              0x00            | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel anymotion threshold dependent on the
+ *	range values
+ *
+ *  v_accel_range_u_8 |	threshold |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    3.19mg     |   1LSB
+ *     4g        |    7.81mg     |   1LSB
+ *     8g        |    15.63mg    |   1LSB
+ *     16g       |    31.25mg    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_any_motion_thres(
+u_8 *v_accel_any_motion_thres_u_8);
+/*!
+ *	@brief This API used to write the accel any motion threshold
+ *	from page one register from 0x11 bit 0 to 7
+ *
+ *	@param v_accel_any_motion_thres_u_8 : The value of any motion threshold
+ *  v_accel_any_motion_thres_u_8 | result
+ *  ------------------------    | -------------
+ *              0x01            | ENABLED
+ *              0x00            | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel anymotion threshold dependent on the
+ *	range values
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    3.19mg     |   1LSB
+ *     4g        |    7.81mg     |   1LSB
+ *     8g        |    15.63mg    |   1LSB
+ *     16g       |    31.25mg    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_any_motion_thres(
+u_8 v_accel_any_motion_thres_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL ANY_MOTION DURATION  */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel anymotion duration
+ *	from page one register from 0x12 bit 0 to 1
+ *
+ *	@param v_accel_any_motion_durn_u_8 : The value of accel anymotion duration
+ * v_accel_any_motion_durn_u_8  | result
+ *  -------------------------  | -------------
+ *              0x01           | ENABLED
+ *              0x00           | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_any_motion_durn(
+u_8 *v_accel_any_motion_durn_u_8);
+/*!
+ *	@brief This API used to write the accel anymotion duration
+ *	from page one register from 0x12 bit 0 to 1
+ *
+ *	@param v_accel_any_motion_durn_u_8 : The value of accel anymotion duration
+ *
+ * v_accel_any_motion_durn_u_8  | result
+ *  -------------------------  | -------------
+ *              0x01           | ENABLED
+ *              0x00           | DISABLED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_any_motion_durn(
+u_8 v_accel_any_motion_durn_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL ANY_MOTION AXIS ENABLE  */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel anymotion enable
+ *	from page one register from 0x12 bit 2 to 4
+ *
+ *	@param v_data_u_8 : The value of accel anymotion enable
+ *	   v_data_u_8 | result
+ *  ------------ | -------------
+ *      0x01     | ENABLED
+ *      0x00     | DISABLED
+ *	@param v_channel_u_8 : The value of accel anymotion axis selection
+ *           v_channel_u_8                        | value
+ *     --------------------------                | ----------
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_X_AXIS  |   0
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS  |   1
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS  |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_any_motion_no_motion_axis_enable(
+u_8 v_channel_u_8, u_8 *v_data_u_8);
+/*!
+ *	@brief This API used to write the accel anymotion enable
+ *	from page one register from 0x12 bit 2 to 4
+ *
+ *	@param v_data_u_8 : The value of accel anymotion enable
+ *	   v_data_u_8 | result
+ *  ------------ | -------------
+ *      0x01     | ENABLED
+ *      0x00     | DISABLED
+ *	@param v_channel_u_8 : The value of accel anymotion axis selection
+ *           v_channel_u_8                        | value
+ *     --------------------------                | ----------
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_X_AXIS  |   0
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS  |   1
+ *     BNO055_ACCEL_ANY_MOTION_NO_MOTION_Y_AXIS  |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_any_motion_no_motion_axis_enable(
+u_8 v_channel_u_8, u_8 v_data_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL HIGHG AXIS ENABLE  */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel highg enable
+ *	from page one register from 0x12 bit 5 to 7
+ *
+ *	@param v_data_u_8 : The value of accel highg enable
+ *      v_data_u_8| result
+ *  ------------ | -------------
+ *      0x01     | ENABLED
+ *      0x00     | DISABLED
+ *	@param v_channel_u_8 : The value of accel highg axis selection
+ *               v_channel_u_8     | value
+ *     -------------------------- | ----------
+ *     BNO055_ACCEL_HIGH_G_X_AXIS |   0
+ *     BNO055_ACCEL_HIGH_G_Y_AXIS |   1
+ *     BNO055_ACCEL_HIGH_G_Z_AXIS |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_high_g_axis_enable(
+u_8 v_channel_u_8, u_8 *v_data_u_8);
+/*!
+ *	@brief This API used to write the accel highg enable
+ *	from page one register from 0x12 bit 5 to 7
+ *
+ *	@param v_data_u_8 : The value of accel highg enable
+ *      v_data_u_8| result
+ *  ------------ | -------------
+ *      0x01     | ENABLED
+ *      0x00     | DISABLED
+ *	@param v_channel_u_8 : The value of accel highg axis selection
+ *               v_channel_u_8     | value
+ *     -------------------------- | ----------
+ *     BNO055_ACCEL_HIGH_G_X_AXIS |   0
+ *     BNO055_ACCEL_HIGH_G_Y_AXIS |   1
+ *     BNO055_ACCEL_HIGH_G_Z_AXIS |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_high_g_axis_enable(
+u_8 v_channel_u_8, u_8 v_data_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL HIGHG DURATION */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel highg duration
+ *	from page one register from 0x13 bit 0 to 7
+ *
+ *	@param v_accel_high_g_durn_u_8 : The value of accel highg duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note The high-g interrupt trigger delay according
+ *	to [highg duration + 1] * 2 ms
+ *
+ *	in a range from 2 ms to 512 ms
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_high_g_durn(
+u_8 *v_accel_high_g_durn_u_8);
+/*!
+ *	@brief This API used to write the accel highg duration
+ *	from page one register from 0x13 bit 0 to 7
+ *
+ *	@param v_accel_high_g_durn_u_8 : The value of accel highg duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note The high-g interrupt trigger delay according
+ *	to [highg duration + 1] * 2 ms
+ *
+ *	in a range from 2 ms to 512 ms
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_high_g_durn(
+u_8 v_accel_high_g_durn_u_8);
+/*****************************************************/
+/**\name FUNCTIONS FOR ACCEL HIGHG THRESHOLD */
+/*****************************************************/
+/*!
+ *	@brief This API used to read the accel highg threshold
+ *	from page one register from 0x14 bit 0 to 7
+ *
+ *	@param v_accel_high_g_thres_u_8 : The value of accel highg threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel highg interrupt threshold dependent
+ *	for accel g range
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    7.81mg     |   1LSB
+ *     4g        |    15.63mg    |   1LSB
+ *     8g        |    31.25mg    |   1LSB
+ *     16g       |    62.5mg     |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_high_g_thres(
+u_8 *v_accel_high_g_thres_u_8);
+/*!
+ *	@brief This API used to write the accel highg threshold
+ *	from page one register from 0x14 bit 0 to 7
+ *
+ *	@param v_accel_high_g_thres_u_8 : The value of accel highg threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel highg interrupt threshold dependent
+ *	for accel g range
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    7.81mg     |   1LSB
+ *     4g        |    15.63mg    |   1LSB
+ *     8g        |    31.25mg    |   1LSB
+ *     16g       |    62.5mg     |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_high_g_thres(
+u_8 v_accel_high_g_thres_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR ACCEL SLOWNOMOTION THRESHOLD */
+/**************************************************************/
+/*!
+ *	@brief This API used to read the accel slownomotion threshold
+ *	from page one register from 0x15 bit 0 to 7
+ *
+ *	@param v_accel_slow_no_motion_thres_u_8 :
+ *	The value of accel slownomotion threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel slow no motion interrupt threshold dependent
+ *	for accel g range
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    3.19mg     |   1LSB
+ *     4g        |    7.81mg     |   1LSB
+ *     8g        |    15.63mg    |   1LSB
+ *     16g       |    31.25mg    |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_slow_no_motion_thres(
+u_8 *v_accel_slow_no_motion_thres_u_8);
+/*!
+ *	@brief This API used to write the accel slownomotion threshold
+ *	from page one register from 0x15 bit 0 to 7
+ *
+ *	@param v_accel_slow_no_motion_thres_u_8 :
+ *	The value of accel slownomotion threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Accel slow no motion interrupt threshold dependent
+ *	for accel g range
+ *
+ *  v_accel_range_u_8	 |	threshold	 |	LSB
+ * ------------- | ------------- | ---------
+ *     2g        |    3.19mg     |   1LSB
+ *     4g        |    7.81mg     |   1LSB
+ *     8g        |    15.63mg    |   1LSB
+ *     16g       |    31.25mg    |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_slow_no_motion_thres(
+u_8 v_accel_slow_no_motion_thres_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR ACCEL SLOWNOMOTION ENABLE */
+/**************************************************************/
+/*!
+ *	@brief This API used to read accel slownomotion enable
+ *	from page one register from 0x16 bit 0
+ *
+ *	@param v_accel_slow_no_motion_en_u_8 : The value of accel slownomotion enable
+ *	  v_accel_slow_no_motion_en_u_8   | result
+ *     ------------------------      | --------
+ *              0x01                 | Slow motion
+ *              0x00                 | No motion
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_slow_no_motion_enable(
+u_8 *v_accel_slow_no_motion_en_u_8);
+/*!
+ *	@brief This API used to write accel slownomotion enable
+ *	from page one register from 0x16 bit 0
+ *
+ *	@param v_accel_slow_no_motion_en_u_8 : The value of accel slownomotion enable
+ *	  v_accel_slow_no_motion_en_u_8   | result
+ *     ------------------------      | --------
+ *              0x01                 | Slow motion
+ *              0x00                 | No motion
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_slow_no_motion_enable(
+u_8 v_accel_slow_no_motion_en_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR ACCEL SLOWNOMOTION DURATION */
+/**************************************************************/
+/*!
+ *	@brief This API used to read accel slownomotion duration
+ *	from page one register from 0x16 bit 1 to 6
+ *
+ *	@param v_accel_slow_no_motion_durn_u_8 :
+ *	The value of accel slownomotion duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_accel_slow_no_motion_durn(
+u_8 *v_accel_slow_no_motion_durn_u_8);
+/*!
+ *	@brief This API used to write accel slownomotion duration
+ *	from page one register from 0x16 bit 1 to 6
+ *
+ *	@param v_accel_slow_no_motion_durn_u_8 :
+ *	The value of accel slownomotion duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_accel_slow_no_motion_durn(
+u_8 v_accel_slow_no_motion_durn_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO ANY_MOTION AXIS ENABLE */
+/**************************************************************/
+/*!
+ *	@brief This API used to read the gyro anymotion enable
+ *	from page one register from 0x17 bit 0 to 2
+ *
+ *	@param v_data_u_8 : The value of gyro anymotion enable
+ *      v_data_u_8     | result
+ *  ----------------- |-------------
+ *      0x01          | ENABLED
+ *      0x00          | DISABLED
+ *	@param v_channel_u_8 : The value of gyro anymotion axis selection
+ *               v_channel_u_8         | value
+ *     ---------------------------    | ----------
+ *     BNO055_GYRO_ANY_MOTIONX_AXIS   |   0
+ *     BNO055_GYRO_ANY_MOTIONY_AXIS   |   1
+ *     BNO055_GYRO_ANY_MOTIONZ_AXIS   |   2
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_axis_enable(
+u_8 v_channel_u_8, u_8 *v_data_u_8);
+/*!
+ *	@brief This API used to write the gyro anymotion enable
+ *	from page one register from 0x17 bit 0 to 2
+ *
+ *	@param v_data_u_8 : The value of gyro anymotion enable
+ *      v_data_u_8     | result
+ *  ----------------- |-------------
+ *      0x01          | ENABLED
+ *      0x00          | DISABLED
+ *	@param v_channel_u_8 : The value of gyro anymotion axis selection
+ *               v_channel_u_8         | value
+ *     ---------------------------    | ----------
+ *     BNO055_GYRO_ANY_MOTIONX_AXIS   |   0
+ *     BNO055_GYRO_ANY_MOTIONY_AXIS   |   1
+ *     BNO055_GYRO_ANY_MOTIONZ_AXIS   |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_axis_enable(
+u_8 v_channel_u_8, u_8  v_data_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE ENABLE */
+/**************************************************************/
+/*!
+ *	@brief This API used to read the gyro highrate enable
+ *	from page one register from 0x17 bit 3 to 5
+ *
+ *	@param v_data_u_8 : The value of gyro highrate enable
+ *      v_data_u_8     | result
+ *  ----------------  |-------------
+ *      0x01          | ENABLED
+ *      0x00          | DISABLED
+ *	@param v_channel_u_8 : The value of gyro highrate axis selection
+ *               v_channel_u_8         | value
+ *     ------------------------       | ----------
+ *     BNO055_GYRO_HIGHRATE_X_AXIS    |   0
+ *     BNO055_GYRO_HIGHRATE_Y_AXIS    |   1
+ *     BNO055_GYRO_HIGHRATE_Z_AXIS    |   2
+ *
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_axis_enable(
+u_8 v_channel_u_8, u_8 *v_data_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE AXIS ENABLE */
+/**************************************************************/
+/*!
+ *	@brief This API used to write the gyro highrate enable
+ *	from page one register from 0x17 bit 3 to 5
+ *
+ *	@param v_data_u_8 : The value of gyro highrate enable
+ *      v_data_u_8     | result
+ *  ----------------  |-------------
+ *      0x01          | ENABLED
+ *      0x00          | DISABLED
+ *	@param v_channel_u_8 : The value of gyro highrate axis selection
+ *               v_channel_u_8         | value
+ *     ------------------------       | ----------
+ *     BNO055_GYRO_HIGHRATE_X_AXIS    |   0
+ *     BNO055_GYRO_HIGHRATE_Y_AXIS    |   1
+ *     BNO055_GYRO_HIGHRATE_Z_AXIS    |   2
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_axis_enable(
+u_8 v_channel_u_8, u_8 v_data_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO ANY_MOTION FILTER */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro anymotion filter
+ *	from page one register from 0x17 bit 6
+ *
+ *	@param v_gyro_any_motion_filter_u_8 : The value of gyro anymotion filter
+ *   v_gyro_any_motion_filter_u_8  | result
+ *  ---------------------------   |------------
+ *      0x00                      | FILTERED
+ *      0x01                      | UNFILTERED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_filter(
+u_8 *v_gyro_any_motion_filter_u_8);
+/*!
+ *	@brief This API used to write gyro anymotion filter
+ *	from page one register from 0x17 bit 6
+ *
+ *	@param v_gyro_any_motion_filter_u_8 : The value of gyro anymotion filter
+ *   v_gyro_any_motion_filter_u_8  | result
+ *  ---------------------------   |------------
+ *      0x00                      | FILTERED
+ *      0x01                      | UNFILTERED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_filter(
+u_8 v_gyro_any_motion_filter_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE FILTER */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate filter
+ *	from page one register from 0x17 bit 7
+ *
+ *	@param v_gyro_highrate_filter_u_8 : The value of gyro highrate filter
+ *   v_gyro_highrate_filter_u_8  | result
+ *  --------------------------- |------------
+ *         0x00                 | FILTERED
+ *         0x01                 | UNFILTERED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_filter(
+u_8 *v_gyro_highrate_filter_u_8);
+/*!
+ *	@brief This API used to write gyro highrate filter
+ *	from page one register from 0x17 bit 7
+ *
+ *	@param v_gyro_highrate_filter_u_8 : The value of gyro highrate filter
+ *   v_gyro_highrate_filter_u_8  | result
+ *  --------------------------- |------------
+ *         0x00                 | FILTERED
+ *         0x01                 | UNFILTERED
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_filter(
+u_8 v_gyro_highrate_filter_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE X THRESHOLD */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate x threshold
+ *	from page one register from 0x18 bit 0 to 4
+ *
+ *	@param v_gyro_highrate_x_thres_u_8 : The value of gyro x highrate threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_x_thres(
+u_8 *v_gyro_highrate_x_thres_u_8);
+/*!
+ *	@brief This API used to write gyro highrate x threshold
+ *	from page one register from 0x18 bit 0 to 4
+ *
+ *	@param v_gyro_highrate_x_thres_u_8 : The value of gyro x highrate threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_x_thres(
+u_8 v_gyro_highrate_x_thres_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE X HYSTERESIS */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate x hysteresis
+ *	from page one register from 0x18 bit 5 to 6
+ *
+ *	@param v_gyro_highrate_x_hyst_u_8 : The value of gyro highrate x hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_x_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_x_hyst(
+u_8 *v_gyro_highrate_x_hyst_u_8);
+/*!
+ *	@brief This API used to write gyro highrate x hysteresis
+ *	from page one register from 0x18 bit 5 to 6
+ *
+ *	@param v_gyro_highrate_x_hyst_u_8 : The value of gyro highrate x hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_x_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_x_hyst(
+u_8 v_gyro_highrate_x_hyst_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE X DURATION */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate x duration
+ *	from page one register from 0x19 bit 0 to 7
+ *
+ *	@param v_gyro_highrate_x_durn_u_8 : The value of gyro highrate x duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_x_durn_u_8)*2.5ms
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_x_durn(
+u_8 *v_gyro_highrate_x_durn_u_8);
+/*!
+ *	@brief This API used to write gyro highrate x duration
+ *	from page one register from 0x19 bit 0 to 7
+ *
+ *	@param v_gyro_highrate_x_durn_u_8 : The value of gyro highrate x duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_x_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_x_durn(
+u_8 v_gyro_highrate_x_durn_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE Y THRESHOLD */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate y threshold
+ *	from page one register from 0x1A bit 0 to 4
+ *
+ *	@param v_gyro_highrate_y_thres_u_8 : The value of gyro highrate y threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_y_thres(
+u_8 *v_gyro_highrate_y_thres_u_8);
+/*!
+ *	@brief This API used to write gyro highrate y threshold
+ *	from page one register from 0x1A bit 0 to 4
+ *
+ *	@param v_gyro_highrate_y_thres_u_8 : The value of gyro highrate y threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_y_thres(
+u_8 v_gyro_highrate_y_thres_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE Y HYSTERESIS */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate y hysteresis
+ *	from page one register from 0x1A bit 5 to 6
+ *
+ *	@param v_gyro_highrate_y_hyst_u_8 : The value of gyro highrate y hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_y_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_y_hyst(
+u_8 *v_gyro_highrate_y_hyst_u_8);
+/*!
+ *	@brief This API used to write gyro highrate y hysteresis
+ *	from page one register from 0x1A bit 5 to 6
+ *
+ *	@param v_gyro_highrate_y_hyst_u_8 : The value of gyro highrate y hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_y_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_y_hyst(
+u_8 v_gyro_highrate_y_hyst_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE Y DURATION */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate y duration
+ *	from page one register from 0x1B bit 0 to 7
+ *
+ *	@param v_gyro_highrate_y_durn_u_8 : The value of gyro highrate y duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_y_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_y_durn(
+u_8 *v_gyro_highrate_y_durn_u_8);
+/*!
+ *	@brief This API used to write gyro highrate y duration
+ *	from page one register from 0x1B bit 0 to 7
+ *
+ *	@param v_gyro_highrate_y_durn_u_8 : The value of gyro highrate y duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_y_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_y_durn(
+u_8 v_gyro_highrate_y_durn_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE Z THRESHOLD */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate z threshold
+ *	from page one register from 0x1C bit 0 to 4
+ *
+ *	@param v_gyro_highrate_z_thres_u_8 : The value of gyro highrate z threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_z_thres(
+u_8 *v_gyro_highrate_z_thres_u_8);
+/*!
+ *	@brief This API used to write gyro highrate z threshold
+ *	from page one register from 0x1C bit 0 to 4
+ *
+ *	@param v_gyro_highrate_z_thres_u_8 : The value of gyro highrate z threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate threshold dependent on the
+ *	selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.5dps      |   1LSB
+ *     1000           |    31.25dps     |   1LSB
+ *     500            |    15.625dps    |   1LSB
+ *     125            |    7.8125dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_z_thres(
+u_8 v_gyro_highrate_z_thres_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE Z HYSTERESIS */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate z hysteresis
+ *	from page one register from 0x1C bit 5 to 6
+ *
+ *	@param v_gyro_highrate_z_hyst_u_8 : The value of gyro highrate z hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_z_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	 hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_z_hyst(
+u_8 *v_gyro_highrate_z_hyst_u_8);
+/*!
+ *	@brief This API used to write gyro highrate z hysteresis
+ *	from page one register from 0x1C bit 5 to 6
+ *
+ *	@param v_gyro_highrate_z_hyst_u_8 : The value of gyro highrate z hysteresis
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro high rate hysteresis calculated by
+ *
+ *	using this (255 + 256 * v_gyro_highrate_z_hyst_u_8) *4 LSB
+ *
+ *	The high rate value scales with the range setting
+ *
+ *  v_gyro_range_u_8	  |	 hysteresis		|     LSB
+ * -----------------  | -------------   | ---------
+ *     2000           |    62.26dps     |   1LSB
+ *     1000           |    31.13dps     |   1LSB
+ *     500            |    15.56dps     |   1LSB
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_z_hyst(
+u_8 v_gyro_highrate_z_hyst_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO HIGHRATE Z DURATION */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro highrate z duration
+ *	from page one register from 0x1D bit 0 to 7
+ *
+ *	@param v_gyro_highrate_z_durn_u_8 : The value of gyro highrate z duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_z_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_highrate_z_durn(
+u_8 *v_gyro_highrate_z_durn_u_8);
+/*!
+ *	@brief This API used to write gyro highrate z duration
+ *	from page one register from 0x1D bit 0 to 7
+ *
+ *	@param v_gyro_highrate_z_durn_u_8 : The value of gyro highrate z duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro highrate duration calculate by using the formula
+ *
+ *	(1 + v_gyro_highrate_z_durn_u_8)*2.5ms
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_highrate_z_durn(
+u_8 v_gyro_highrate_z_durn_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO ANY_MOTION THRESHOLD */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro anymotion threshold
+ *	from page one register from 0x1E bit 0 to 6
+ *
+ *	@param v_gyro_any_motion_thres_u_8 : The value of gyro anymotion threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro anymotion interrupt threshold dependent
+ *	on the selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold	  |	   LSB
+ * -----------------  | ------------- | ---------
+ *     2000           |    1dps       |   1LSB
+ *     1000           |    0.5dps     |   1LSB
+ *     500            |    0.25dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_thres(
+u_8 *v_gyro_any_motion_thres_u_8);
+/*!
+ *	@brief This API used to write gyro anymotion threshold
+ *	from page one register from 0x1E bit 0 to 6
+ *
+ *	@param v_gyro_any_motion_thres_u_8 : The value of gyro anymotion threshold
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ *	@note Gyro anymotion interrupt threshold dependent
+ *	on the selection of gyro range
+ *
+ *  v_gyro_range_u_8	  |	threshold	  |	   LSB
+ * -----------------  | ------------- | ---------
+ *     2000           |    1dps       |   1LSB
+ *     1000           |    0.5dps     |   1LSB
+ *     500            |    0.25dps    |   1LSB
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_thres(
+u_8 v_gyro_any_motion_thres_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO ANY_MOTION SLOPE SAMPLES */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro anymotion slope samples
+ *	from page one register from 0x1F bit 0 to 1
+ *
+ *	@param v_gyro_any_motion_slope_samples_u_8 :
+ *	The value of gyro anymotion slope samples
+ *  v_gyro_any_motion_slope_samples_u_8   |   result
+ *  ----------------------------------   | -----------
+ *            0                          |    8 samples
+ *            1                          |    16 samples
+ *            2                          |    32 samples
+ *            3                          |    64 samples
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_slope_samples(
+u_8 *v_gyro_any_motion_slope_samples_u_8);
+/*!
+ *	@brief This API used to write gyro anymotion slope samples
+ *	from page one register from 0x1F bit 0 to 1
+ *
+ *	@param v_gyro_any_motion_slope_samples_u_8 :
+ *	The value of gyro anymotion slope samples
+ *  v_gyro_any_motion_slope_samples_u_8   |   result
+ *  ----------------------------------   | -----------
+ *            0                          |    8 samples
+ *            1                          |    16 samples
+ *            2                          |    32 samples
+ *            3                          |    64 samples
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_slope_samples(
+u_8 v_gyro_any_motion_slope_samples_u_8);
+/**************************************************************/
+/**\name FUNCTIONS FOR GYRO ANY_MOTION AWAKE DURATION */
+/**************************************************************/
+/*!
+ *	@brief This API used to read gyro anymotion awake duration
+ *	from page one register from 0x1F bit 2 to 3
+ *
+ *	@param v_gyro_awake_durn_u_8 : The value of gyro anymotion awake duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_get_gyro_any_motion_awake_durn(
+u_8 *v_gyro_awake_durn_u_8);
+/*!
+ *	@brief This API used to write gyro anymotion awake duration
+ *	from page one register from 0x1F bit 2 to 3
+ *
+ *	@param v_gyro_awake_durn_u_8 : The value of gyro anymotion awake duration
+ *
+ *	@return results of bus communication function
+ *	@retval 0 -> Success
+ *	@retval 1 -> Error
+ *
+ */
+BNO055_RETURN_FUNCTION_TYPE bno055_set_gyro_any_motion_awake_durn(
+u_8 v_gyro_awake_durn_u_8);
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/License.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/License.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/License.txt	(revision 136)
@@ -0,0 +1,21 @@
+The MIT License (MIT)
+
+Copyright (c) 2013 Seeed Technology Inc.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/README.md
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/README.md	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/README.md	(revision 136)
@@ -0,0 +1,171 @@
+CAN BUS Shield
+---------------------------------------------------------
+[![CAN BUS Shield](http://www.seeedstudio.com/depot/images/1130300211.jpg)](http://www.seeedstudio.com/depot/CANBUS-Shield-p-2256.html?cPath=19_88)
+
+
+
+<br>
+CAN-BUS is a common industrial bus because of its long travel distance, medium communication speed and high reliability. It is commonly found on modern machine tools and as an automotive diagnostic bus. This CAN-BUS Shield adopts MCP2515 CAN Bus controller with SPI interface and MCP2551 CAN transceiver to give your Arduino/Seeeduino CAN-BUS capibility. With an OBD-II converter cable added on and the OBD-II library imported, you are ready to build an onboard diagnostic device or data logger.
+
+- Implements CAN V2.0B at up to 1 Mb/s
+- SPI Interface up to 10 MHz
+- Standard (11 bit) and extended (29 bit) data and remote frames
+- Two receive buffers with prioritized message storage
+- Industrial standard 9 pin sub-D connector
+- Two LED indicators
+
+
+
+<br>
+# Usage:
+
+
+
+## 1. Set the BaudRate
+
+This function is used to initialize the baudrate of the CAN Bus system.
+
+The available baudrates are listed as follws:
+
+	#define CAN_5KBPS    1
+	#define CAN_10KBPS   2
+	#define CAN_20KBPS   3
+	#define CAN_31K25BPS 4
+	#define CAN_33KBPS   5
+	#define CAN_40KBPS   6
+	#define CAN_50KBPS   7
+	#define CAN_80KBPS   8
+	#define CAN_83K3BPS  9
+	#define CAN_95KBPS   10
+	#define CAN_100KBPS  11
+	#define CAN_125KBPS  12
+	#define CAN_200KBPS  13
+	#define CAN_250KBPS  14
+	#define CAN_500KBPS  15
+	#define CAN_1000KBPS 16
+
+
+<br>
+
+##2. Set Receive Mask and Filter
+
+There are 2 receive mask registers and 5 filter registers on the controller chip that guarantee you get data from the target device. They are useful especially in a large network consisting of numerous nodes.
+
+We provide two functions for you to utilize these mask and filter registers. They are:
+
+    init_Mask(unsigned char num, unsigned char ext, unsigned char ulData);
+    init_Filt(unsigned char num, unsigned char ext, unsigned char ulData);
+
+**num** represents which register to use. You can fill 0 or 1 for mask and 0 to 5 for filter.
+
+**ext** represents the status of the frame. 0 means it's a mask or filter for a standard frame. 1 means it's for a extended frame.
+
+**ulData** represents the content of the mask of filter.
+
+
+
+<br>
+## 3. Check Receive
+The MCP2515 can operate in either a polled mode, where the software checks for a received frame, or using additional pins to signal that a frame has been received or transmit completed.  Use the following function to poll for received frames.
+
+    INT8U MCP_CAN::checkReceive(void);
+
+The function will return 1 if a frame arrives, and 0 if nothing arrives.
+
+
+
+<br>
+## 4. Get CAN ID
+
+When some data arrive, you can use the following function to get the CAN ID of the "send" node. 
+
+    INT32U MCP_CAN::getCanId(void);
+
+
+
+<br>
+## 5. Send Data
+
+    CAN.sendMsgBuf(INT8U id, INT8U ext, INT8U len, data_buf);
+
+This is a function to send data onto the bus. In which:
+
+**id** represents where the data come from.
+
+**ext** represents the status of the frame. '0' means standard frame. '1' means extended frame.
+
+**len** represents the length of this frame.
+
+**data_buf** is the content of this message.
+
+For example, In the 'send' example, we have:
+
+<pre>  
+unsigned char stmp[8] = {0, 1, 2, 3, 4, 5, 6, 7};
+
+CAN.sendMsgBuf(0x00, 0, 8, stmp); //send out the message 'stmp' to the bus and tell other devices this is a standard frame from 0x00.
+</pre>
+
+
+
+<br>
+## 6. Receive Data
+
+The following function is used to receive data on the 'receive' node:
+
+    CAN.readMsgBuf(unsigned char len, unsigned char buf);
+
+In conditions that masks and filters have been set. This function can only get frames that meet the requirements of masks and filters.
+
+**len** represents the data length.
+
+**buf** is where you store the data.
+
+<br>
+## 7. Check additional flags
+
+When frame is received you may check whether it was remote request and whether it was an extended (29bit) frame.
+
+    CAN.isRemoteRequest();
+    CAN.isExtendedFrame();
+
+**return value** is '0' for a negative response and '1' for a positive
+
+
+<br>
+For more information, please refer to [wiki page](http://www.seeedstudio.com/wiki/CAN-BUS_Shield).
+
+    
+----
+
+This software is written by loovee ([luweicong@seeed.cc](luweicong@seeed.cc "luweicong@seeed.cc")) for seeed studio<br>
+and is licensed under [The MIT License](http://opensource.org/licenses/mit-license.php). Check License.txt for more information.<br>
+
+Contributing to this software is warmly welcomed. You can do this basically by<br>
+[forking](https://help.github.com/articles/fork-a-repo), committing modifications and then [pulling requests](https://help.github.com/articles/using-pull-requests) (follow the links above<br>
+for operating guide). Adding change log and your contact into file header is encouraged.<br>
+Thanks for your contribution.
+
+Seeed Studio is an open hardware facilitation company based in Shenzhen, China. <br>
+Benefiting from local manufacture power and convenient global logistic system, <br>
+we integrate resources to serve new era of innovation. Seeed also works with <br>
+global distributors and partners to push open hardware movement.<br>
+
+
+
+
+
+
+[![Analytics](https://ga-beacon.appspot.com/UA-46589105-3/CAN_BUS_Shield)](https://github.com/igrigorik/ga-beacon)
+
+
+<script>
+  (function(i,s,o,g,r,a,m){i['GoogleAnalyticsObject']=r;i[r]=i[r]||function(){
+  (i[r].q=i[r].q||[]).push(arguments)},i[r].l=1*new Date();a=s.createElement(o),
+  m=s.getElementsByTagName(o)[0];a.async=1;a.src=g;m.parentNode.insertBefore(a,m)
+  })(window,document,'script','//www.google-analytics.com/analytics.js','ga');
+
+  ga('create', 'UA-65075738-1', 'auto');
+  ga('send', 'pageview');
+
+</script>
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/README.nces
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/README.nces	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/README.nces	(revision 136)
@@ -0,0 +1,77 @@
+è¿½å æ
+å ±
+
+1. Set the BaudRate
+
+INT8U MCP_CAN::mcp2515_init(const INT8U canSpeed)     
+åä¿¡ãããã¡ãæå¹ã«ããªãï¼
+
+2. Set Receive Mask and Filter
+
+åä¿¡ã¡ã¼ã«ããã¯ã¹æ¯ã®ãã¹ã¯ã¨ãã£ã«ã¿ã®æ§æã¯æ¬¡ã®éãã§ããï¼
+
+ã¡ã¼ã«ããã¯ã¹0(RXB0) : ãã¹ã¯(RXM0) : ãã£ã«ã¿(RXF0ï½RXF1)
+ã¡ã¼ã«ããã¯ã¹1(RXB1) : ãã¹ã¯(RXM1) : ãã£ã«ã¿(RXF2ï½RXF5)
+
+ãªãªã¸ãã«ããã®å¤æ´ç¹
+
+åã
+ã®ã¡ã¼ã«ããã¯ã¹ãæå®ããããã«å¤æ´ï¼
+
+ 2. Set Receive Mask and Filter
+
+ 3. Check Receive
+
+  INT8U MCP_CAN::checkReceive(uint8_t rxbid);  
+   ã¡ã¼ã«ããã¯ã¹(0,1)ãæå®å¯è½ã«å¤æ´
+
+ 4. Get CAN ID
+
+  INT32U MCP_CAN::getCanId();
+   å»æ­¢
+
+ 5. Send Data
+  sendMsgBuf(uint8_t txbid, INT8U id, INT8U ext, INT8U len, data_buf);
+   å»æ­¢sendMsg()ãpublicã«å¤æ´
+   
+  setMsg()  : å
+é¨å¤æ°ã«æ ¼ç´ããªãããã«ããããåé¤
+
+  sendMsg(INT8U txbid, INT32U id, INT8U ext, INT8U len, INT8U rtr, INT8U *pData) 
+  sendMsg(INT8U txbid, INT32U id, INT8U ext, INT8U len, INT8U *p_buf);
+  sendMsg(INT8U txbid, INT32U id, INT8U len, INT8U *p_buf);
+   å¼æ°ã§éä¿¡ã¡ã¼ã«ããã¯ã¹ã®IDç­ãæ¸¡ãããã«å¤æ´, ããªã¨ã¼ã·ã§ã³ãè¿½å 
+   ã¡ã¼ã«ããã¯ã¹ã®ç©ºãã¯å¾
+ããã«ä¸æ¸ã
+
+  mcp2515_write_canMsg(INT8U txbid, INT32U id, INT8U ext, INT8U len, INT8U rtr, INT8U *pData)
+   å¼æ°ã§éä¿¡ã¡ã¼ã«ããã¯ã¹ã®IDç­ãæ¸¡ãããã«å¤æ´
+
+  mcp2515_start_transmit(INT8U txbid)   
+   å¼æ°ã§éä¿¡ã¡ã¼ã«ããã¯ã¹ã®IDãæ¸¡ãããã«å¤æ´
+
+ 6. Receive Data
+
+    INT8U MCP_CAN::readMsgBufID(INT8U rxbid, INT32U *ID, INT8U *len, INT8U buf[])
+     å»æ­¢
+
+    CAN.readMsgBuf(uint8_t rxbid, INT32U *ID, INT8U &ext, unsigned char len, unsigned char buf);
+     å»æ­¢
+
+    readMsg(INT8U rxbid, INT32U *ID, INT8U *ext, INT8U *rtr, unsigned char *len, unsigned char *buf);
+     ã¡ã¼ã«ããã¯ã¹(0,1)ãæå®å¯è½ã«å¤æ´ï¼å¼æ°ã®ããªã¨ã¼ã·ã§ã³ã®ç¨æ
+
+    mcp2515_read_canMsg(    
+ 7. Check additional flags
+    CAN.isRemoteRequest();
+    CAN.isExtendedFrame();
+     å»æ­¢
+
+ 8. Check Sent
+    INT8U checkSent(INT8U txbid);
+     ã¡ãã»ã¼ã¸ãéä¿¡ããããç¢ºèªï¼
+
+ 9. éä¿¡ã®æå¹
+   INT8U startReceive(INT8U rxbid);
+
+ä»¥ä¸ï¼
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/receive_Blink/receive_Blink.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/receive_Blink/receive_Blink.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/receive_Blink/receive_Blink.ino	(revision 136)
@@ -0,0 +1,78 @@
+// demo: CAN-BUS Shield, receive data with check mode
+// send data coming to fast, such as less than 10ms, you can use this way
+// loovee, 2014-6-13
+
+
+#include <SPI.h>
+#include "mcp_can.h"
+
+
+// the cs pin of the version after v1.1 is default to D9
+// v0.9b and v1.0 is default D10
+const int SPI_CS_PIN = 9;
+const int LED=8;
+boolean ledON=1;
+MCP_CAN CAN(SPI_CS_PIN);                                    // Set CS pin
+
+void setup()
+{
+    Serial.begin(115200);
+    pinMode(LED,OUTPUT);
+
+START_INIT:
+
+    if(CAN_OK == CAN.begin(CAN_500KBPS))                   // init can bus : baudrate = 500k
+    {
+        Serial.println("CAN BUS Shield init ok!");
+    }
+    else
+    {
+        Serial.println("CAN BUS Shield init fail");
+        Serial.println("Init CAN BUS Shield again");
+        delay(100);
+        goto START_INIT;
+    }
+}
+
+
+void loop()
+{
+    unsigned char len = 0;
+    unsigned char buf[8];
+
+    if(CAN_MSGAVAIL == CAN.checkReceive())            // check if data coming
+    {
+        CAN.readMsgBuf(&len, buf);    // read data,  len: data length, buf: data buf
+
+        unsigned char canId = CAN.getCanId();
+        
+        Serial.println("-----------------------------");
+        Serial.println("get data from ID: ");
+        Serial.println(canId);
+
+        for(int i = 0; i<len; i++)    // print the data
+        {
+            Serial.print(buf[i]);
+            Serial.print("\t");
+            if(ledON && i==0)
+            {
+             
+              digitalWrite(LED,buf[i]);
+              ledON=0;
+              delay(500);
+              }
+            else if((!(ledON)) && i==4){
+              
+              digitalWrite(LED,buf[i]);
+              ledON=1;
+              }
+              
+              
+        }
+        Serial.println();
+    }
+}
+
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/receive_check/receive_check.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/receive_check/receive_check.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/receive_check/receive_check.ino	(revision 136)
@@ -0,0 +1,62 @@
+// demo: CAN-BUS Shield, receive data with check mode
+// send data coming to fast, such as less than 10ms, you can use this way
+// loovee, 2014-6-13
+
+
+#include <SPI.h>
+#include "mcp_can.h"
+
+
+// the cs pin of the version after v1.1 is default to D9
+// v0.9b and v1.0 is default D10
+const int SPI_CS_PIN = 9;
+
+MCP_CAN CAN(SPI_CS_PIN);                                    // Set CS pin
+
+void setup()
+{
+    Serial.begin(115200);
+
+START_INIT:
+
+    if(CAN_OK == CAN.begin(CAN_500KBPS))                   // init can bus : baudrate = 500k
+    {
+        Serial.println("CAN BUS Shield init ok!");
+    }
+    else
+    {
+        Serial.println("CAN BUS Shield init fail");
+        Serial.println("Init CAN BUS Shield again");
+        delay(100);
+        goto START_INIT;
+    }
+}
+
+
+void loop()
+{
+    unsigned char len = 0;
+    unsigned char buf[8];
+
+    if(CAN_MSGAVAIL == CAN.checkReceive())            // check if data coming
+    {
+        CAN.readMsgBuf(&len, buf);    // read data,  len: data length, buf: data buf
+
+        unsigned long canId = CAN.getCanId();
+        
+        Serial.println("-----------------------------");
+        Serial.print("get data from ID: ");
+        Serial.println(canId, HEX);
+
+        for(int i = 0; i<len; i++)    // print the data
+        {
+            Serial.print(buf[i]);
+            Serial.print("\t");
+        }
+        Serial.println();
+    }
+}
+
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/receive_interrupt/receive_interrupt.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/receive_interrupt/receive_interrupt.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/receive_interrupt/receive_interrupt.ino	(revision 136)
@@ -0,0 +1,74 @@
+// demo: CAN-BUS Shield, receive data with interrupt mode
+// when in interrupt mode, the data coming can't be too fast, must >20ms, or else you can use check mode
+// loovee, 2014-6-13
+
+#include <SPI.h>
+#include "mcp_can.h"
+
+// the cs pin of the version after v1.1 is default to D9
+// v0.9b and v1.0 is default D10
+const int SPI_CS_PIN = 9;
+
+MCP_CAN CAN(SPI_CS_PIN);                                    // Set CS pin
+
+
+unsigned char flagRecv = 0;
+unsigned char len = 0;
+unsigned char buf[8];
+char str[20];
+
+void setup()
+{
+    Serial.begin(115200);
+
+START_INIT:
+
+    if(CAN_OK == CAN.begin(CAN_500KBPS))                   // init can bus : baudrate = 500k
+    {
+        Serial.println("CAN BUS Shield init ok!");
+    }
+    else
+    {
+        Serial.println("CAN BUS Shield init fail");
+        Serial.println("Init CAN BUS Shield again");
+        delay(100);
+        goto START_INIT;
+    }
+
+    attachInterrupt(0, MCP2515_ISR, FALLING); // start interrupt
+}
+
+void MCP2515_ISR()
+{
+    flagRecv = 1;
+}
+
+void loop()
+{
+    if(flagRecv) 
+    {                                   // check if get data
+
+        flagRecv = 0;                   // clear flag
+
+        // iterate over all pending messages
+        // If either the bus is saturated or the MCU is busy,
+        // both RX buffers may be in use and reading a single
+        // message does not clear the IRQ conditon.
+        while (CAN_MSGAVAIL == CAN.checkReceive()) 
+        {
+            // read data,  len: data length, buf: data buf
+            CAN.readMsgBuf(&len, buf);
+
+            // print the data
+            for(int i = 0; i<len; i++)
+            {
+                Serial.print(buf[i]);Serial.print("\t");
+            }
+            Serial.println();
+        }
+    }
+}
+
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/send/send.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/send/send.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/send/send.ino	(revision 136)
@@ -0,0 +1,40 @@
+// demo: CAN-BUS Shield, send data
+#include <mcp_can.h>
+#include <SPI.h>
+
+// the cs pin of the version after v1.1 is default to D9
+// v0.9b and v1.0 is default D10
+const int SPI_CS_PIN = 9;
+
+MCP_CAN CAN(SPI_CS_PIN);                                    // Set CS pin
+
+void setup()
+{
+    Serial.begin(115200);
+
+START_INIT:
+
+    if(CAN_OK == CAN.begin(CAN_500KBPS))                   // init can bus : baudrate = 500k
+    {
+        Serial.println("CAN BUS Shield init ok!");
+    }
+    else
+    {
+        Serial.println("CAN BUS Shield init fail");
+        Serial.println("Init CAN BUS Shield again");
+        delay(100);
+        goto START_INIT;
+    }
+}
+
+unsigned char stmp[8] = {0, 1, 2, 3, 4, 5, 6, 7};
+void loop()
+{
+    // send data:  id = 0x00, standrad frame, data len = 8, stmp: data buf
+    CAN.sendMsgBuf(0x00, 0, 8, stmp);
+    delay(100);                       // send data per 100ms
+}
+
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/send_Blink/send_Blink.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/send_Blink/send_Blink.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/send_Blink/send_Blink.ino	(revision 136)
@@ -0,0 +1,43 @@
+// demo: CAN-BUS Shield, send data
+#include <mcp_can.h>
+#include <SPI.h>
+
+// the cs pin of the version after v1.1 is default to D9
+// v0.9b and v1.0 is default D10
+const int SPI_CS_PIN = 9;
+const int ledHIGH    = 1;
+const int ledLOW     = 0;
+
+MCP_CAN CAN(SPI_CS_PIN);                                    // Set CS pin
+
+void setup()
+{
+    Serial.begin(115200);
+
+START_INIT:
+
+    if(CAN_OK == CAN.begin(CAN_500KBPS))                   // init can bus : baudrate = 500k
+    {
+        Serial.println("CAN BUS Shield init ok!");
+    }
+    else
+    {
+        Serial.println("CAN BUS Shield init fail");
+        Serial.println("Init CAN BUS Shield again");
+        delay(100);
+        goto START_INIT;
+    }
+}
+
+unsigned char stmp[8] = {ledHIGH, 1, 2, 3, ledLOW, 5, 6, 7};
+
+void loop()
+{   Serial.println("In loop");
+    // send data:  id = 0x00, standrad frame, data len = 8, stmp: data buf
+    CAN.sendMsgBuf(0x70,0, 8, stmp);
+    delay(1000);                       // send data per 100ms
+}
+
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/send_Blink_ROS/send_Blink_ROS.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/send_Blink_ROS/send_Blink_ROS.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/send_Blink_ROS/send_Blink_ROS.ino	(revision 136)
@@ -0,0 +1,73 @@
+// demo: CAN-BUS Shield, send data
+// Hardware: TWO ArduinoMega with CAN-SHIELDS
+// Run this send_Blink_ROS.ino file on one of the Arduinos
+// Run receive_Blink on the other
+// ***ROS commands to be followe***//
+// roscore
+// rosrun roial_python serial_node.py /dev/ttyACM1 _baud:=57600
+// rostopic pub toggle_led std_msgs/Empty -r 100
+// Jaghvi: jaghvim@andrew.cmu.edu
+
+
+#include <mcp_can.h>
+#include <SPI.h>
+
+//ROS
+#include <ros.h>
+#include <std_msgs/Empty.h>
+
+ros::NodeHandle  nh;
+
+const int SPI_CS_PIN = 9;
+const int ledHIGH=1;
+const int ledLOW=0;
+unsigned char stmp[8] = {ledHIGH, 1, 2, 3, ledLOW, 5, 6, 7};
+
+MCP_CAN CAN(SPI_CS_PIN);                                    // Set CS pin
+
+void messageCb( const std_msgs::Empty& toggle_msg){
+  //digitalWrite(13, HIGH-digitalRead(13));   // blink the led
+  // send data:  id = 0x00, standrad frame, data len = 8, stmp: data buf
+  CAN.sendMsgBuf(0x70,0, 8, stmp);
+  delay(1000);                       // send data per 100ms
+}
+
+ros::Subscriber<std_msgs::Empty> sub("toggle_led", &messageCb );
+
+// the cs pin of the version after v1.1 is default to D9
+// v0.9b and v1.0 is default D10
+
+
+
+void setup()
+{
+    Serial.begin(115200);
+    nh.initNode();
+    nh.subscribe(sub);
+
+START_INIT:
+
+    if(CAN_OK == CAN.begin(CAN_500KBPS))                   // init can bus : baudrate = 500k
+    {
+        Serial.println("CAN BUS Shield init ok!");
+    }
+    else
+    {
+        Serial.println("CAN BUS Shield init fail");
+        Serial.println("Init CAN BUS Shield again");
+        delay(100);
+        goto START_INIT;
+    }
+}
+
+
+void loop()
+{   
+    
+    nh.spinOnce();
+    delay(1);
+}
+
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/set_mask_filter_recv/set_mask_filter_recv.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/set_mask_filter_recv/set_mask_filter_recv.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/set_mask_filter_recv/set_mask_filter_recv.ino	(revision 136)
@@ -0,0 +1,91 @@
+// demo: CAN-BUS Shield, receive data with interrupt mode, and set mask and filter
+//
+// when in interrupt mode, the data coming can't be too fast, must >20ms, or else you can use check mode
+// loovee, 2014-7-8
+
+#include <SPI.h>
+#include "mcp_can.h"
+
+// the cs pin of the version after v1.1 is default to D9
+// v0.9b and v1.0 is default D10
+const int SPI_CS_PIN = 9;
+
+MCP_CAN CAN(SPI_CS_PIN);                                    // Set CS pin
+
+
+unsigned char flagRecv = 0;
+unsigned char len = 0;
+unsigned char buf[8];
+char str[20];
+
+void setup()
+{
+    Serial.begin(115200);
+
+    START_INIT:
+
+    if(CAN_OK == CAN.begin(CAN_500KBPS))                   // init can bus : baudrate = 500k
+    {
+        Serial.println("CAN BUS Shield init ok!");
+    }
+    else
+    {
+        Serial.println("CAN BUS Shield init fail");
+        Serial.println("Init CAN BUS Shield again");
+        delay(100);
+        goto START_INIT;
+    }
+
+    attachInterrupt(0, MCP2515_ISR, FALLING); // start interrupt
+
+
+    /*
+     * set mask, set both the mask to 0x3ff
+     */
+    CAN.init_Mask(0, 0, 0x3ff);                         // there are 2 mask in mcp2515, you need to set both of them
+    CAN.init_Mask(1, 0, 0x3ff);
+
+
+    /*
+     * set filter, we can receive id from 0x04 ~ 0x09
+     */
+    CAN.init_Filt(0, 0, 0x04);                          // there are 6 filter in mcp2515
+    CAN.init_Filt(1, 0, 0x05);                          // there are 6 filter in mcp2515
+
+    CAN.init_Filt(2, 0, 0x06);                          // there are 6 filter in mcp2515
+    CAN.init_Filt(3, 0, 0x07);                          // there are 6 filter in mcp2515
+    CAN.init_Filt(4, 0, 0x08);                          // there are 6 filter in mcp2515
+    CAN.init_Filt(5, 0, 0x09);                          // there are 6 filter in mcp2515
+
+}
+
+void MCP2515_ISR()
+{
+    flagRecv = 1;
+}
+
+void loop()
+{
+    if(flagRecv)                   // check if get data
+    {
+
+        flagRecv = 0;                // clear flag
+        CAN.readMsgBuf(&len, buf);    // read data,  len: data length, buf: data buf
+
+        Serial.println("\r\n------------------------------------------------------------------");
+        Serial.print("Get Data From id: ");
+        Serial.println(CAN.getCanId());
+        for(int i = 0; i<len; i++)    // print the data
+        {
+            Serial.print("0x");
+            Serial.print(buf[i], HEX);
+            Serial.print("\t");
+        }
+        Serial.println();
+
+    }
+}
+
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/set_mask_filter_send/set_mask_filter_send.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/set_mask_filter_send/set_mask_filter_send.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/examples/set_mask_filter_send/set_mask_filter_send.ino	(revision 136)
@@ -0,0 +1,46 @@
+// demo: set_mask_filter_send
+// this demo will show you how to use mask and filter
+
+#include <mcp_can.h>
+#include <SPI.h>
+
+// the cs pin of the version after v1.1 is default to D9
+// v0.9b and v1.0 is default D10
+const int SPI_CS_PIN = 9;
+
+MCP_CAN CAN(SPI_CS_PIN);                                    // Set CS pin
+
+void setup()
+{
+    Serial.begin(115200);
+
+START_INIT:
+
+    if(CAN_OK == CAN.begin(CAN_500KBPS))                   // init can bus : baudrate = 500k
+    {
+        Serial.println("CAN BUS Shield init ok!");
+    }
+    else
+    {
+        Serial.println("CAN BUS Shield init fail");
+        Serial.println("Init CAN BUS Shield again");
+        delay(100);
+        goto START_INIT;
+    }
+}
+
+unsigned char stmp[8] = {0, 1, 2, 3, 4, 5, 6, 7};
+
+void loop()
+{
+    for(int id=0; id<10; id++)
+    {
+        memset(stmp, id, sizeof(stmp));                 // set id to send data buff
+        CAN.sendMsgBuf(id, 0, sizeof(stmp), stmp);
+        delay(100);
+    }
+}
+
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/keywords.txt	(revision 136)
@@ -0,0 +1,47 @@
+#######################################
+# Syntax Coloring Map For debug_lvc
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+MCP_CAN	KEYWORD1
+mcp_can_dfs	KEYWORD1
+mcp_can	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+begin	KEYWORD2
+init_Mask	KEYWORD2
+init_Filt	KEYWORD2
+sendMsgBuf	KEYWORD2
+readMsgBuf	KEYWORD2
+checkReceive	KEYWORD2
+checkError	KEYWORD2
+getCanId	KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+CAN_5KBPS	LITERAL1
+CAN_10KBPS	LITERAL1
+CAN_20KBPS	LITERAL1
+CAN_40KBPS	LITERAL1
+CAN_50KBPS	LITERAL1
+CAN_80KBPS	LITERAL1
+CAN_100KBPS	LITERAL1
+CAN_125KBPS	LITERAL1
+CAN_200KBPS	LITERAL1
+CAN_250KBPS	LITERAL1
+CAN_500KBPS	LITERAL1
+CAN_1000KBPS	LITERAL1
+CAN_OK	LITERAL1
+CAN_FAILINIT	LITERAL1
+CAN_FAILTX	LITERAL1
+CAN_MSGAVAIL	LITERAL1
+CAN_NOMSG	LITERAL1
+CAN_CTRLERROR	LITERAL1
+CAN_GETTXBFTIMEOUT	LITERAL1
+CAN_SENDMSGTIMEOUT	LITERAL1
+CAN_FAIL	LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/mcp_can.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/mcp_can.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/mcp_can.cpp	(revision 136)
@@ -0,0 +1,899 @@
+/*
+  mcp_can.cpp
+  2012 Copyright (c) Seeed Technology Inc.  All right reserved.
+
+  Author:Loovee
+  Contributor: Cory J. Fowler
+  2014-1-16
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-
+  1301  USA
+*/
+#include "mcp_can.h"
+
+#define spi_readwrite SPI.transfer
+#define spi_read() spi_readwrite(0x00)
+
+#define CHECK_RXBID(rxbid) do {				\
+	if (!((rxbid == 0) || (rxbid == 1))) {	\
+		return CAN_FAIL;					\
+	}										\
+} while(false)
+
+#define CHECK_LEN(len) do {					\
+	if (len > 8) {							\
+		return CAN_FAIL;					\
+	}										\
+} while(false)
+
+#define CHECK_TXBID(txbid) do {								\
+	if (!((txbid == 0) || (txbid == 1) || (txbid == 2))) {	\
+		return CAN_FAIL;									\
+	}														\
+} while(false)
+
+/*********************************************************************************************************
+** Function name:           mcp2515_reset
+** Descriptions:            reset the device
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_reset(void)
+{
+    MCP2515_SELECT();
+    spi_readwrite(MCP_RESET);
+    MCP2515_UNSELECT();
+    delay(10);
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_readRegister
+** Descriptions:            read register
+*********************************************************************************************************/
+INT8U MCP_CAN::mcp2515_readRegister(const INT8U address)
+{
+    INT8U ret;
+
+    MCP2515_SELECT();
+    spi_readwrite(MCP_READ);
+    spi_readwrite(address);
+    ret = spi_read();
+    MCP2515_UNSELECT();
+
+    return ret;
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_readRegisterS
+** Descriptions:            read registerS
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_readRegisterS(const INT8U address, INT8U values[], const INT8U n)
+{
+	INT8U i;
+	MCP2515_SELECT();
+	spi_readwrite(MCP_READ);
+	spi_readwrite(address);
+	// mcp2515 has auto-increment of address-pointer
+	for (i=0; i<n && i<CAN_MAX_CHAR_IN_MESSAGE; i++) {
+		values[i] = spi_read();
+	}
+	MCP2515_UNSELECT();
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_setRegister
+** Descriptions:            set register
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_setRegister(const INT8U address, const INT8U value)
+{
+    MCP2515_SELECT();
+    spi_readwrite(MCP_WRITE);
+    spi_readwrite(address);
+    spi_readwrite(value);
+    MCP2515_UNSELECT();
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_setRegisterS
+** Descriptions:            set registerS
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_setRegisterS(const INT8U address, const INT8U values[], const INT8U n)
+{
+    INT8U i;
+    MCP2515_SELECT();
+    spi_readwrite(MCP_WRITE);
+    spi_readwrite(address);
+       
+    for (i=0; i<n; i++) 
+    {
+        spi_readwrite(values[i]);
+    }
+    MCP2515_UNSELECT();
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_modifyRegister
+** Descriptions:            set bit of one register
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_modifyRegister(const INT8U address, const INT8U mask, const INT8U data)
+{
+    MCP2515_SELECT();
+    spi_readwrite(MCP_BITMOD);
+    spi_readwrite(address);
+    spi_readwrite(mask);
+    spi_readwrite(data);
+    MCP2515_UNSELECT();
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_readStatus
+** Descriptions:            read mcp2515's Status
+*********************************************************************************************************/
+INT8U MCP_CAN::mcp2515_readStatus(void)                             
+{
+	INT8U i;
+	MCP2515_SELECT();
+	spi_readwrite(MCP_READ_STATUS);
+	i = spi_read();
+	MCP2515_UNSELECT();
+	
+	return i;
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_setCANCTRL_Mode
+** Descriptions:            set control mode
+*********************************************************************************************************/
+INT8U MCP_CAN::mcp2515_setCANCTRL_Mode(const INT8U newmode)
+{
+    INT8U i;
+
+    mcp2515_modifyRegister(MCP_CANCTRL, MODE_MASK, newmode);
+
+    i = mcp2515_readRegister(MCP_CANCTRL);
+    i &= MODE_MASK;
+
+    if ( i == newmode ) 
+    {
+        return MCP2515_OK;
+    }
+
+    return MCP2515_FAIL;
+
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_configRate
+** Descriptions:            set boadrate
+*********************************************************************************************************/
+INT8U MCP_CAN::mcp2515_configRate(const INT8U canSpeed)            
+{
+    INT8U set, cfg1, cfg2, cfg3;
+    set = 1;
+    switch (canSpeed) 
+    {
+        case (CAN_5KBPS):
+        cfg1 = MCP_16MHz_5kBPS_CFG1;
+        cfg2 = MCP_16MHz_5kBPS_CFG2;
+        cfg3 = MCP_16MHz_5kBPS_CFG3;
+        break;
+
+        case (CAN_10KBPS):
+        cfg1 = MCP_16MHz_10kBPS_CFG1;
+        cfg2 = MCP_16MHz_10kBPS_CFG2;
+        cfg3 = MCP_16MHz_10kBPS_CFG3;
+        break;
+
+        case (CAN_20KBPS):
+        cfg1 = MCP_16MHz_20kBPS_CFG1;
+        cfg2 = MCP_16MHz_20kBPS_CFG2;
+        cfg3 = MCP_16MHz_20kBPS_CFG3;
+        break;
+        
+        case (CAN_31K25BPS):
+        cfg1 = MCP_16MHz_31k25BPS_CFG1;
+        cfg2 = MCP_16MHz_31k25BPS_CFG2;
+        cfg3 = MCP_16MHz_31k25BPS_CFG3;
+        break;
+
+        case (CAN_33KBPS):
+        cfg1 = MCP_16MHz_33kBPS_CFG1;
+        cfg2 = MCP_16MHz_33kBPS_CFG2;
+        cfg3 = MCP_16MHz_33kBPS_CFG3;
+        break;
+
+        case (CAN_40KBPS):
+        cfg1 = MCP_16MHz_40kBPS_CFG1;
+        cfg2 = MCP_16MHz_40kBPS_CFG2;
+        cfg3 = MCP_16MHz_40kBPS_CFG3;
+        break;
+
+        case (CAN_50KBPS):
+        cfg1 = MCP_16MHz_50kBPS_CFG1;
+        cfg2 = MCP_16MHz_50kBPS_CFG2;
+        cfg3 = MCP_16MHz_50kBPS_CFG3;
+        break;
+
+        case (CAN_80KBPS):
+        cfg1 = MCP_16MHz_80kBPS_CFG1;
+        cfg2 = MCP_16MHz_80kBPS_CFG2;
+        cfg3 = MCP_16MHz_80kBPS_CFG3;
+        break;
+
+        case (CAN_83K3BPS):
+        cfg1 = MCP_16MHz_83k3BPS_CFG1;
+        cfg2 = MCP_16MHz_83k3BPS_CFG2;
+        cfg3 = MCP_16MHz_83k3BPS_CFG3;
+        break;  
+
+        case (CAN_95KBPS):
+        cfg1 = MCP_16MHz_95kBPS_CFG1;
+        cfg2 = MCP_16MHz_95kBPS_CFG2;
+        cfg3 = MCP_16MHz_95kBPS_CFG3;
+        break;
+
+        case (CAN_100KBPS):                                             /* 100KBPS                  */
+        cfg1 = MCP_16MHz_100kBPS_CFG1;
+        cfg2 = MCP_16MHz_100kBPS_CFG2;
+        cfg3 = MCP_16MHz_100kBPS_CFG3;
+        break;
+
+        case (CAN_125KBPS):
+        cfg1 = MCP_16MHz_125kBPS_CFG1;
+        cfg2 = MCP_16MHz_125kBPS_CFG2;
+        cfg3 = MCP_16MHz_125kBPS_CFG3;
+        break;
+
+        case (CAN_200KBPS):
+        cfg1 = MCP_16MHz_200kBPS_CFG1;
+        cfg2 = MCP_16MHz_200kBPS_CFG2;
+        cfg3 = MCP_16MHz_200kBPS_CFG3;
+        break;
+
+        case (CAN_250KBPS):
+        cfg1 = MCP_16MHz_250kBPS_CFG1;
+        cfg2 = MCP_16MHz_250kBPS_CFG2;
+        cfg3 = MCP_16MHz_250kBPS_CFG3;
+        break;
+
+        case (CAN_500KBPS):
+        cfg1 = MCP_16MHz_500kBPS_CFG1;
+        cfg2 = MCP_16MHz_500kBPS_CFG2;
+        cfg3 = MCP_16MHz_500kBPS_CFG3;
+        break;
+        
+        case (CAN_1000KBPS):
+        cfg1 = MCP_16MHz_1000kBPS_CFG1;
+        cfg2 = MCP_16MHz_1000kBPS_CFG2;
+        cfg3 = MCP_16MHz_1000kBPS_CFG3;
+        break;  
+
+        default:
+        set = 0;
+        break;
+    }
+
+    if (set) {
+        mcp2515_setRegister(MCP_CNF1, cfg1);
+        mcp2515_setRegister(MCP_CNF2, cfg2);
+        mcp2515_setRegister(MCP_CNF3, cfg3);
+        return MCP2515_OK;
+    }
+    else {
+        return MCP2515_FAIL;
+    }
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_initCANBuffers
+** Descriptions:            init canbuffers
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_initCANBuffers(void)
+{
+    INT8U i, a1, a2, a3;
+    
+    INT8U std = 0;               
+    INT8U ext = 1;
+    INT32U ulMask = 0xffffffff, ulFilt = 0x00;
+
+
+    mcp2515_write_id(MCP_RXM0SIDH, ext, ulMask);			/*Set both masks to 0xff       */
+    mcp2515_write_id(MCP_RXM1SIDH, ext, ulMask);			/*Mask register ignores ext bit */
+    
+                                                            /* Set all filters to 0         */
+    mcp2515_write_id(MCP_RXF0SIDH, std, ulFilt);			/* RXB0: standard               */
+    mcp2515_write_id(MCP_RXF1SIDH, std, ulFilt);			/* RXB1: standard               */
+    mcp2515_write_id(MCP_RXF2SIDH, std, ulFilt);			/* RXB2: standard               */
+    mcp2515_write_id(MCP_RXF3SIDH, std, ulFilt);			/* RXB3: standard               */
+    mcp2515_write_id(MCP_RXF4SIDH, std, ulFilt);
+    mcp2515_write_id(MCP_RXF5SIDH, std, ulFilt);
+    
+                                                                        /* Clear, deactivate the three  */
+                                                                        /* transmit buffers             */
+                                                                        /* TXBnCTRL -> TXBnD7           */
+    a1 = MCP_TXB0CTRL;
+    a2 = MCP_TXB1CTRL;
+    a3 = MCP_TXB2CTRL;
+    for (i = 0; i < 14; i++) {                                          /* in-buffer loop               */
+        mcp2515_setRegister(a1, 0);
+        mcp2515_setRegister(a2, 0);
+        mcp2515_setRegister(a3, 0);
+        a1++;
+        a2++;
+        a3++;
+    }
+    mcp2515_setRegister(MCP_RXB0CTRL, 0x00);
+    mcp2515_setRegister(MCP_RXB1CTRL, 0xff);
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_init
+** Descriptions:            init the device
+*********************************************************************************************************/
+INT8U MCP_CAN::mcp2515_init(const INT8U canSpeed)                       /* mcp2515init                  */
+{
+
+  INT8U res;
+
+    mcp2515_reset();
+
+    res = mcp2515_setCANCTRL_Mode(MODE_CONFIG);
+    if(res > 0)
+    {
+#if DEBUG_MODE
+      Serial.print("Enter setting mode fall\r\n"); 
+#endif
+      return res;
+    }
+#if DEBUG_MODE
+    Serial.print("Enter setting mode success \r\n");
+#endif
+
+    if(mcp2515_configRate(canSpeed))
+    {
+#if DEBUG_MODE
+      Serial.print("set rate fall!!\r\n");
+#endif
+      return res;
+    }
+#if DEBUG_MODE
+    Serial.print("set rate success!!\r\n");
+#endif
+
+    if ( res == MCP2515_OK ) {
+
+                                                                        /* init canbuffers              */
+        mcp2515_initCANBuffers();
+
+                                                                        /* interrupt mode               */
+        mcp2515_setRegister(MCP_CANINTE, 0x00);
+        
+                                                                        /* enter normal mode            */
+        res = mcp2515_setCANCTRL_Mode(MODE_NORMAL);                                                                
+        if(res)
+        {
+#if DEBUG_MODE        
+          Serial.print("Enter Normal Mode Fall!!\r\n");
+#endif           
+          return res;
+        }
+
+
+#if DEBUG_MODE
+          Serial.print("Enter Normal Mode Success!!\r\n");
+#endif
+
+    }
+    return res;
+
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_write_id
+** Descriptions:            write can id
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_write_id( const INT8U mcp_addr, const INT8U ext, const INT32U id )
+{
+    uint16_t canid;
+    INT8U tbufdata[4];
+
+    canid = (uint16_t)(id & 0x0FFFF);
+
+    if ( ext == 1) 
+    {
+        tbufdata[MCP_EID0] = (INT8U) (canid & 0xFF);
+        tbufdata[MCP_EID8] = (INT8U) (canid >> 8);
+        canid = (uint16_t)(id >> 16);
+        tbufdata[MCP_SIDL] = (INT8U) (canid & 0x03);
+        tbufdata[MCP_SIDL] += (INT8U) ((canid & 0x1C) << 3);
+        tbufdata[MCP_SIDL] |= MCP_TXB_EXIDE_M;
+        tbufdata[MCP_SIDH] = (INT8U) (canid >> 5 );
+    }
+    else 
+    {
+        tbufdata[MCP_SIDH] = (INT8U) (canid >> 3 );
+        tbufdata[MCP_SIDL] = (INT8U) ((canid & 0x07 ) << 5);
+        tbufdata[MCP_EID0] = 0;
+        tbufdata[MCP_EID8] = 0;
+    }
+    mcp2515_setRegisterS( mcp_addr, tbufdata, 4 );
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_read_id
+** Descriptions:            read can id
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_read_id( const INT8U mcp_addr, INT8U* ext, INT32U* id )
+{
+    INT8U tbufdata[4];
+
+    *ext = 0;
+    *id = 0;
+
+    mcp2515_readRegisterS( mcp_addr, tbufdata, 4 );
+
+    *id = (tbufdata[MCP_SIDH]<<3) + (tbufdata[MCP_SIDL]>>5);
+
+    if ( (tbufdata[MCP_SIDL] & MCP_TXB_EXIDE_M) ==  MCP_TXB_EXIDE_M ) 
+    {
+                                                                        /* extended id                  */
+        *id = (*id<<2) + (tbufdata[MCP_SIDL] & 0x03);
+        *id = (*id<<8) + tbufdata[MCP_EID8];
+        *id = (*id<<8) + tbufdata[MCP_EID0];
+        *ext = 1;
+    }
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_write_canMsg
+** Descriptions:            write msg
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_write_canMsg( INT8U txbid, INT32U id, INT8U len, INT8U *pData, INT8U ext, INT8U rtr )
+{
+    INT8U ctrlregs[MCP_N_TXBUFFERS] = { MCP_TXB0CTRL, MCP_TXB1CTRL, MCP_TXB2CTRL };    
+    INT8U mcp_addr = ctrlregs[txbid] + 1;
+
+    mcp2515_setRegisterS(mcp_addr+5, pData, len );                  /* write data bytes             */
+    if ( rtr == 1)                                               /* if RTR set bit in byte       */
+    {
+        len |= MCP_RTR_MASK;  
+    }
+    mcp2515_setRegister((mcp_addr+4), len );                        /* write the RTR and DLC        */
+    mcp2515_write_id(mcp_addr, ext, id );                           /* write CAN id                 */
+
+}
+
+/*********************************************************************************************************
+** Function name:           mcp2515_read_canMsg
+** Descriptions:            read message
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_read_canMsg( INT8U rxbid, INT32U *p_id, INT8U *p_len, INT8U *p_buf, INT8U *p_ext, INT8U *p_rtr)        /* read can msg                 */
+{
+    INT8U mcp_addr = (rxbid == 0)? MCP_RXBUF_0 : MCP_RXBUF_1;
+    INT8U ctrl;
+
+    mcp2515_read_id( mcp_addr, p_ext, p_id );
+
+    ctrl = mcp2515_readRegister( mcp_addr-1 );
+    *p_len = mcp2515_readRegister( mcp_addr+4 );
+
+    if ((ctrl & 0x08)) {
+        *p_rtr = 1;
+    }
+    else {
+        *p_rtr = 0;
+    }
+
+    *p_len &= MCP_DLC_MASK;
+    mcp2515_readRegisterS( mcp_addr+5, p_buf, *p_len );
+}
+
+/*********************************************************************************************************
+** Function name:           sendMsg
+** Descriptions:            send message
+*********************************************************************************************************/
+void MCP_CAN::mcp2515_start_transmit(INT8U txbid)              /* start transmit               */
+{
+    INT8U ctrlregs[MCP_N_TXBUFFERS] = { MCP_TXB0CTRL, MCP_TXB1CTRL, MCP_TXB2CTRL };
+    INT8U mcp_addr = ctrlregs[txbid];
+    
+    mcp2515_modifyRegister( mcp_addr, MCP_TXB_TXREQ_M, MCP_TXB_TXREQ_M );
+}
+
+/*********************************************************************************************************
+** Function name:           sendMsg
+** Descriptions:            send message
+*********************************************************************************************************/
+INT8U MCP_CAN::mcp2515_getNextFreeTXBuf(INT8U *txbuf_n)                 /* get Next free txbuf          */
+{
+    INT8U res, i, ctrlval;
+    INT8U ctrlregs[MCP_N_TXBUFFERS] = { MCP_TXB0CTRL, MCP_TXB1CTRL, MCP_TXB2CTRL };
+
+    res = MCP_ALLTXBUSY;
+    *txbuf_n = 0x00;
+
+                                                                        /* check all 3 TX-Buffers       */
+    for (i=0; i<MCP_N_TXBUFFERS; i++) {
+        ctrlval = mcp2515_readRegister( ctrlregs[i] );
+        if ( (ctrlval & MCP_TXB_TXREQ_M) == 0 ) {
+            *txbuf_n = ctrlregs[i]+1;                                   /* return SIDH-address of Buffe */
+                                                                        /* r                            */
+            res = MCP2515_OK;
+            return res;                                                 /* ! function exit              */
+        }
+    }
+    return res;
+}
+
+/*********************************************************************************************************
+** Function name:           set CS
+** Descriptions:            init CS pin and set UNSELECTED
+*********************************************************************************************************/
+MCP_CAN::MCP_CAN(INT8U _CS)
+{
+    SPICS = _CS;
+    pinMode(SPICS, OUTPUT);
+    MCP2515_UNSELECT();
+}
+
+/*********************************************************************************************************
+** Function name:           init
+** Descriptions:            init can and set speed
+*********************************************************************************************************/
+INT8U MCP_CAN::begin(INT8U speedset)
+{
+    INT8U res;
+
+    SPI.begin();
+    res = mcp2515_init(speedset);
+    if (res == MCP2515_OK) return CAN_OK;
+    else return CAN_FAILINIT;
+}
+
+/*********************************************************************************************************
+** Function name:           enableInterrupt
+** Descriptions:            Enable Interrupt
+*********************************************************************************************************/
+INT8U MCP_CAN::enableInterrupt(INT8U mask)
+{
+    mcp2515_modifyRegister(MCP_CANINTE, mask, mask);
+    return CAN_OK;
+}
+
+/*********************************************************************************************************
+** Function name:           disableInterrupt
+** Descriptions:            Disable Interrupt
+*********************************************************************************************************/
+INT8U MCP_CAN::disableInterrupt(INT8U mask)
+{
+    mcp2515_modifyRegister(MCP_CANINTE, mask, !mask);
+    return CAN_OK;    
+}
+
+/*********************************************************************************************************
+** Function name:           attachInterrupt
+** Descriptions:            Attach Interrupt
+*********************************************************************************************************/
+INT8U MCP_CAN::attachInterrupt(uint32_t ulPin, voidFuncPtr callback)
+{
+    ::attachInterrupt( ulPin, callback, FALLING ) ;
+    return CAN_OK;    
+}
+
+/*********************************************************************************************************
+** Function name:           init_Mask
+** Descriptions:            init canid Masks
+*********************************************************************************************************/
+INT8U MCP_CAN::init_Mask(INT8U num, INT32U ulData, INT8U ext)
+{
+    INT8U res = MCP2515_OK;
+#if DEBUG_MODE
+    Serial.print("Begin to set Mask!!\r\n");
+#endif
+    res = mcp2515_setCANCTRL_Mode(MODE_CONFIG);
+    if(res > 0){
+#if DEBUG_MODE
+    Serial.print("Enter setting mode fall\r\n"); 
+#endif
+    return res;
+    }
+    
+    if (num == 0){
+        mcp2515_write_id(MCP_RXM0SIDH, ext, ulData);
+    }
+    else if(num == 1){
+        mcp2515_write_id(MCP_RXM1SIDH, ext, ulData);
+    }
+    else res =  MCP2515_FAIL;
+    
+    res = mcp2515_setCANCTRL_Mode(MODE_NORMAL);
+    if(res > 0){
+#if DEBUG_MODE
+    Serial.print("Enter normal mode fall\r\n"); 
+#endif
+    return res;
+  }
+#if DEBUG_MODE
+    Serial.print("set Mask success!!\r\n");
+#endif
+    return res;
+}
+
+/*********************************************************************************************************
+** Function name:           init_Filter
+** Descriptions:            init canid filters
+*********************************************************************************************************/
+INT8U MCP_CAN::init_Filter(INT8U num, INT32U ulData, INT8U ext)
+{
+    INT8U res = MCP2515_OK;
+#if DEBUG_MODE
+    Serial.print("Begin to set Filter!!\r\n");
+#endif
+    res = mcp2515_setCANCTRL_Mode(MODE_CONFIG);
+    if(res > 0)
+    {
+#if DEBUG_MODE
+      Serial.print("Enter setting mode fall\r\n"); 
+#endif
+      return res;
+    }
+    
+    switch( num )
+    {
+        case 0:
+        mcp2515_write_id(MCP_RXF0SIDH, ext, ulData);
+        break;
+
+        case 1:
+        mcp2515_write_id(MCP_RXF1SIDH, ext, ulData);
+        break;
+
+        case 2:
+        mcp2515_write_id(MCP_RXF2SIDH, ext, ulData);
+        break;
+
+        case 3:
+        mcp2515_write_id(MCP_RXF3SIDH, ext, ulData);
+        break;
+
+        case 4:
+        mcp2515_write_id(MCP_RXF4SIDH, ext, ulData);
+        break;
+
+        case 5:
+        mcp2515_write_id(MCP_RXF5SIDH, ext, ulData);
+        break;
+
+        default:
+        res = MCP2515_FAIL;
+    }
+    
+    res = mcp2515_setCANCTRL_Mode(MODE_NORMAL);
+    if(res > 0)
+    {
+#if DEBUG_MODE
+      Serial.print("Enter normal mode fall\r\nSet filter fail!!\r\n"); 
+#else
+      delay(10);
+#endif
+      return res;
+    }
+#if DEBUG_MODE
+    Serial.print("set Filter success!!\r\n");
+#else
+    delay(10);
+#endif
+    
+    return res;
+}
+
+/*********************************************************************************************************
+** Function name:           startReceive
+** Descriptions:            start Receive 
+*********************************************************************************************************/
+INT8U MCP_CAN::startReceive(INT8U rxbid)
+{
+    CHECK_RXBID(rxbid);
+
+#if (DEBUG_RXANY==1)
+                                                                        /* enable both receive-buffers  */
+                                                                        /* to receive any message       */
+                                                                        /* and enable rollover          */
+    if (rxbid == 0) {
+        mcp2515_modifyRegister(MCP_RXB0CTRL,
+        MCP_RXB_RX_MASK | MCP_RXB_BUKT_MASK,
+        MCP_RXB_RX_ANY);
+    }else{
+        mcp2515_modifyRegister(MCP_RXB1CTRL, MCP_RXB_RX_MASK,
+        MCP_RXB_RX_ANY);
+    }
+#else
+                                                                        /* enable both receive-buffers  */
+                                                                        /* to receive messages          */
+                                                                        /* with std. and ext. identifie */
+                                                                        /* rs                           */
+                                                                        /* and enable rollover          */
+    if (rxbid == 0) {        
+        mcp2515_modifyRegister(MCP_RXB0CTRL,
+        MCP_RXB_RX_MASK | MCP_RXB_BUKT_MASK,
+        MCP_RXB_RX_STDEXT);
+    }else{
+        mcp2515_modifyRegister(MCP_RXB1CTRL, MCP_RXB_RX_MASK,
+        MCP_RXB_RX_STDEXT);
+    }
+#endif
+
+    return CAN_OK;
+}
+
+/*********************************************************************************************************
+** Function name:           sendMsg
+** Descriptions:            send message
+*********************************************************************************************************/
+INT8U MCP_CAN::sendMsg(INT8U txbid, INT32U id, INT8U len, INT8U *p_buf, INT8U ext, INT8U rtr)
+{    
+    INT8U intf_tbl[MCP_N_TXBUFFERS] = { MCP_TX0IF, MCP_TX1IF, MCP_TX2IF };
+    INT8U intf_bit = intf_tbl[txbid];
+
+    CHECK_LEN(len);
+    CHECK_TXBID(txbid);
+    
+    mcp2515_write_canMsg(txbid, id, len, p_buf, ext, rtr);
+    mcp2515_modifyRegister(MCP_CANINTF, intf_bit, 0);
+    mcp2515_start_transmit( txbid );
+
+    return CAN_OK;
+}
+
+/*********************************************************************************************************
+** Function name:           sendMsg
+** Descriptions:            send buf
+*********************************************************************************************************/
+INT8U MCP_CAN::sendMsg(INT8U txbid, INT32U id, INT8U len, INT8U *p_buf, INT8U ext)
+{
+    return sendMsg(txbid, id, len, p_buf, ext, 0);
+}
+
+/*********************************************************************************************************
+** Function name:           sendMsg
+** Descriptions:            send buf
+*********************************************************************************************************/
+INT8U MCP_CAN::sendMsg(INT8U txbid, INT32U id, INT8U len, INT8U *p_buf)
+{
+    return sendMsg(txbid, id, len, p_buf, 0, 0);
+}
+
+
+/*********************************************************************************************************
+** Function name:           readMsg
+** Descriptions:            read message
+*********************************************************************************************************/
+INT8U MCP_CAN::readMsg(INT8U rxbid, INT32U *p_id, INT8U *p_len, INT8U *p_buf, INT8U *p_ext, INT8U *p_rtr)
+{
+    INT8U stat, res;
+    CHECK_RXBID(rxbid);
+    INT8U stat_bit = (rxbid == 0)? MCP_STAT_RX0IF : MCP_STAT_RX1IF;
+    INT8U intf_bit = (rxbid == 0)? MCP_RX0IF : MCP_RX1IF;
+      
+    stat = mcp2515_readStatus();
+
+    if ( stat & stat_bit )
+    {
+        mcp2515_read_canMsg(rxbid, p_id, p_len, p_buf, p_ext, p_rtr);
+        mcp2515_modifyRegister(MCP_CANINTF, intf_bit, 0);
+        res = CAN_OK;
+    }
+    else {
+        res = CAN_NOMSG;
+    }
+    return res;
+}
+
+/*********************************************************************************************************
+** Function name:           readMsgBuf
+** Descriptions:            read message
+*********************************************************************************************************/
+INT8U MCP_CAN::readMsg(INT8U rxbid, INT32U *p_id, INT8U *p_len, INT8U *p_buf, INT8U *p_ext)
+{
+    INT8U rtr;
+    
+    return readMsg(rxbid, p_id, p_len, p_buf, p_ext, &rtr);
+}
+
+/*********************************************************************************************************
+** Function name:           readMsgBuf
+** Descriptions:            read message
+*********************************************************************************************************/
+INT8U MCP_CAN::readMsg(INT8U rxbid, INT32U *p_id, INT8U *p_len, INT8U *p_buf)
+{
+    INT8U ext;
+    INT8U rtr;
+    
+    return readMsg(rxbid, p_id, p_len, p_buf, &ext, &rtr);
+}
+
+/*********************************************************************************************************
+** Function name:           readMsgBuf
+** Descriptions:            read message
+*********************************************************************************************************/
+INT8U MCP_CAN::readMsg(INT8U rxbid, INT8U *p_len, INT8U *p_buf)
+{
+    INT32U id;
+    INT8U ext;
+    INT8U rtr;
+    
+    return readMsg(rxbid, &id, p_len, p_buf, &ext, &rtr);
+}
+
+/*********************************************************************************************************
+** Function name:           checkReceive
+** Descriptions:            check if got something
+*********************************************************************************************************/
+INT8U MCP_CAN::checkReceive(INT8U rxbid)
+{
+    INT8U res;
+    CHECK_RXBID(rxbid);
+    res = mcp2515_readStatus();                                         /* RXnIF in Bit 1 and 0         */
+    if (rxbid == 0) {
+        if ( (res & MCP_STAT_RX0IF) == MCP_STAT_RX0IF) {
+            return CAN_MSGAVAIL;
+        }
+    }
+    else if (rxbid == 1) {
+        if ( (res & MCP_STAT_RX1IF) == MCP_STAT_RX1IF ) {
+            return CAN_MSGAVAIL;
+        }        
+    }
+    return CAN_NOMSG;
+}
+
+/*********************************************************************************************************
+** Function name:           checkSend
+** Descriptions:            check if snt msg
+*********************************************************************************************************/
+INT8U MCP_CAN::checkSend(INT8U txbid)
+{
+    INT8U res;
+    INT8U txbx_ctrl[MCP_N_TXBUFFERS] = { MCP_TXB0CTRL, MCP_TXB1CTRL, MCP_TXB2CTRL };
+    
+    CHECK_TXBID(txbid);
+    
+    res = mcp2515_readRegister(txbx_ctrl[txbid]);
+
+    if ( (res & MCP_TXB_TXREQ_M) == MCP_TXB_TXREQ_M) {
+        return CAN_SENDWAIT;
+    }
+
+    return CAN_NOSENDWAIT;
+}
+
+/*********************************************************************************************************
+** Function name:           checkError
+** Descriptions:            if something error
+*********************************************************************************************************/
+INT8U MCP_CAN::checkError(void)
+{
+    INT8U eflg = mcp2515_readRegister(MCP_EFLG);
+
+    if ( eflg & MCP_EFLG_ERRORMASK ) 
+    {
+        return CAN_CTRLERROR;
+    }
+    else 
+    {
+        return CAN_OK;
+    }
+}
+
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/mcp_can.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/mcp_can.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/mcp_can.h	(revision 136)
@@ -0,0 +1,104 @@
+/*
+  mcp_can.h
+  2012 Copyright (c) Seeed Technology Inc.  All right reserved.
+
+  Author:Loovee
+  Contributor: Cory J. Fowler
+  2014-1-16
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-
+  1301  USA
+*/
+#ifndef _MCP2515_H_
+#define _MCP2515_H_
+
+#include "mcp_can_dfs.h"
+
+#define MAX_CHAR_IN_MESSAGE 8
+
+class MCP_CAN
+{
+    private:
+    
+    INT8U   SPICS;
+
+/*
+*  mcp2515 driver function 
+*/
+   // private:
+private:
+
+    void mcp2515_reset(void);                                           /* reset mcp2515                */
+
+    INT8U mcp2515_readRegister(const INT8U address);                    /* read mcp2515's register      */
+    
+    void mcp2515_readRegisterS(const INT8U address, 
+	                       INT8U values[], 
+                               const INT8U n);
+    void mcp2515_setRegister(const INT8U address,                       /* set mcp2515's register       */
+                             const INT8U value);
+
+    void mcp2515_setRegisterS(const INT8U address,                      /* set mcp2515's registers      */
+                              const INT8U values[],
+                              const INT8U n);
+    
+    void mcp2515_initCANBuffers(void);
+    
+    void mcp2515_modifyRegister(const INT8U address,                    /* set bit of one register      */
+                                const INT8U mask,
+                                const INT8U data);
+
+    INT8U mcp2515_readStatus(void);                                     /* read mcp2515's Status        */
+    INT8U mcp2515_setCANCTRL_Mode(const INT8U newmode);                 /* set mode                     */
+    INT8U mcp2515_configRate(const INT8U canSpeed);                     /* set boadrate                 */
+    INT8U mcp2515_init(const INT8U canSpeed);                           /* mcp2515init                  */
+
+    void mcp2515_write_id( const INT8U mcp_addr,                        /* write can id                 */
+                               const INT8U ext,
+                               const INT32U id );
+
+    void mcp2515_read_id( const INT8U mcp_addr,                         /* read can id                  */
+                                    INT8U* ext,
+                                    INT32U* id );
+
+    void mcp2515_write_canMsg( INT8U txbid, INT32U id, INT8U len, INT8U *pData, INT8U ext, INT8U rtr);          /* write can msg                */
+    void mcp2515_read_canMsg( INT8U rxbid, INT32U *p_id, INT8U *p_len, INT8U *p_buf, INT8U *p_ext, INT8U *p_rtr);            /* read can msg                 */
+    void mcp2515_start_transmit(INT8U txbid);                  /* start transmit               */
+    INT8U mcp2515_getNextFreeTXBuf(INT8U *txbuf_n);                     /* get Next free txbuf          */
+
+public:
+    MCP_CAN(INT8U _CS);
+    INT8U begin(INT8U speedset);                                    /* init can                     */
+    INT8U enableInterrupt(INT8U mask);
+    INT8U disableInterrupt(INT8U mask);
+    INT8U attachInterrupt(uint32_t ulPin, voidFuncPtr callback);    
+    INT8U init_Mask(INT8U num, INT32U ulData, INT8U ext = 0);       /* init Masks                   */
+    INT8U init_Filter(INT8U num, INT32U ulData, INT8U ext = 0);       /* init filters                 */    
+    INT8U startReceive(INT8U rxbid);                                /* Start Receive                */
+    INT8U sendMsg(INT8U txbid, INT32U id, INT8U len, INT8U *p_buf, INT8U ext, INT8U rtr);   /* send msg                     */
+    INT8U sendMsg(INT8U txbid, INT32U id, INT8U len, INT8U *p_buf, INT8U ext);   /* send msg                     */
+    INT8U sendMsg(INT8U txbid, INT32U id, INT8U len, INT8U *p_buf);   /* send msg                     */    
+    INT8U readMsg(INT8U rxbid, INT32U *p_id, INT8U *p_len, INT8U *p_buf, INT8U *p_ext, INT8U *p_rtr);         /* read msg   */
+    INT8U readMsg(INT8U rxbid, INT32U *p_id, INT8U *p_len, INT8U *p_buf, INT8U *p_ext);         /* read msg */    
+    INT8U readMsg(INT8U rxbid, INT32U *p_id, INT8U *p_len, INT8U *p_buf);         /* read msg */
+    INT8U readMsg(INT8U rxbid, INT8U *p_len, INT8U *p_buf);         /* read buf with object ID      */        
+    INT8U checkReceive(INT8U rxbid);                                /* if something received        */
+    INT8U checkSend(INT8U txbid);                                   /* if something sent            */    
+    INT8U checkError(void);                                         /* if something error           */
+};
+
+#endif
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/NcesCan/mcp_can_dfs.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/NcesCan/mcp_can_dfs.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/NcesCan/mcp_can_dfs.h	(revision 136)
@@ -0,0 +1,412 @@
+/*
+  mcp_can_dfs.h
+  2012 Copyright (c) Seeed Technology Inc.  All right reserved.
+
+  Author:Loovee
+  Contributor: Cory J. Fowler
+  2014-1-16
+  
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-
+  1301  USA
+*/
+#ifndef _MCP2515DFS_H_
+#define _MCP2515DFS_H_
+
+#include <Arduino.h>
+#include <SPI.h>
+#include <inttypes.h>
+
+#ifndef INT32U
+#define INT32U unsigned long
+#endif
+
+#ifndef INT8U
+#define INT8U byte
+#endif
+
+// if print debug information
+#define DEBUG_MODE 0
+
+#define MCP_RXB0       0
+#define MCP_RXB1       1
+#define MCP_TXB0       0
+#define MCP_TXB1       1
+#define MCP_TXB2       2
+#define MCP_RXM0       0
+#define MCP_RXM1       1
+#define MCP_RXF0       0
+#define MCP_RXF1       1
+#define MCP_RXF2       2
+#define MCP_RXF3       3
+#define MCP_RXF4       4
+#define MCP_RXF5       5
+
+/*
+ *   Begin mt
+ */
+#define TIMEOUTVALUE    50
+#define MCP_SIDH        0
+#define MCP_SIDL        1
+#define MCP_EID8        2
+#define MCP_EID0        3
+
+#define MCP_TXB_EXIDE_M     0x08                                        /* In TXBnSIDL                  */
+#define MCP_DLC_MASK        0x0F                                        /* 4 LSBits                     */
+#define MCP_RTR_MASK        0x40                                        /* (1<<6) Bit 6                 */
+
+#define MCP_RXB_RX_ANY      0x60
+#define MCP_RXB_RX_EXT      0x40
+#define MCP_RXB_RX_STD      0x20
+#define MCP_RXB_RX_STDEXT   0x00
+#define MCP_RXB_RX_MASK     0x60
+#define MCP_RXB_BUKT_MASK   (1<<2)
+
+/*
+** Bits in the TXBnCTRL registers.
+*/
+#define MCP_TXB_TXBUFE_M    0x80
+#define MCP_TXB_ABTF_M      0x40
+#define MCP_TXB_MLOA_M      0x20
+#define MCP_TXB_TXERR_M     0x10
+#define MCP_TXB_TXREQ_M     0x08
+#define MCP_TXB_TXIE_M      0x04
+#define MCP_TXB_TXP10_M     0x03
+
+#define MCP_TXB_RTR_M       0x40                                        /* In TXBnDLC                   */
+#define MCP_RXB_IDE_M       0x08                                        /* In RXBnSIDL                  */
+#define MCP_RXB_RTR_M       0x40                                        /* In RXBnDLC                   */
+
+#define MCP_STAT_RXIF_MASK   (0x03)
+#define MCP_STAT_RX0IF (1<<0)
+#define MCP_STAT_RX1IF (1<<1)
+
+#define MCP_STAT_TX0IF (1<<3)
+#define MCP_STAT_TX1IF (1<<5)
+#define MCP_STAT_TX2IF (1<<7)
+
+#define MCP_STAT_TX0REQ (1<<2)
+#define MCP_STAT_TX1REQ (1<<4)
+#define MCP_STAT_TX2REQ (1<<6)
+
+#define MCP_EFLG_RX1OVR (1<<7)
+#define MCP_EFLG_RX0OVR (1<<6)
+#define MCP_EFLG_TXBO   (1<<5)
+#define MCP_EFLG_TXEP   (1<<4)
+#define MCP_EFLG_RXEP   (1<<3)
+#define MCP_EFLG_TXWAR  (1<<2)
+#define MCP_EFLG_RXWAR  (1<<1)
+#define MCP_EFLG_EWARN  (1<<0)
+#define MCP_EFLG_ERRORMASK  (0xF8)                                      /* 5 MS-Bits                    */
+
+
+/*
+ *   Define MCP2515 register addresses
+ */
+
+#define MCP_RXF0SIDH    0x00
+#define MCP_RXF0SIDL    0x01
+#define MCP_RXF0EID8    0x02
+#define MCP_RXF0EID0    0x03
+#define MCP_RXF1SIDH    0x04
+#define MCP_RXF1SIDL    0x05
+#define MCP_RXF1EID8    0x06
+#define MCP_RXF1EID0    0x07
+#define MCP_RXF2SIDH    0x08
+#define MCP_RXF2SIDL    0x09
+#define MCP_RXF2EID8    0x0A
+#define MCP_RXF2EID0    0x0B
+#define MCP_CANSTAT     0x0E
+#define MCP_CANCTRL     0x0F
+#define MCP_RXF3SIDH    0x10
+#define MCP_RXF3SIDL    0x11
+#define MCP_RXF3EID8    0x12
+#define MCP_RXF3EID0    0x13
+#define MCP_RXF4SIDH    0x14
+#define MCP_RXF4SIDL    0x15
+#define MCP_RXF4EID8    0x16
+#define MCP_RXF4EID0    0x17
+#define MCP_RXF5SIDH    0x18
+#define MCP_RXF5SIDL    0x19
+#define MCP_RXF5EID8    0x1A
+#define MCP_RXF5EID0    0x1B
+#define MCP_TEC         0x1C
+#define MCP_REC         0x1D
+#define MCP_RXM0SIDH    0x20
+#define MCP_RXM0SIDL    0x21
+#define MCP_RXM0EID8    0x22
+#define MCP_RXM0EID0    0x23
+#define MCP_RXM1SIDH    0x24
+#define MCP_RXM1SIDL    0x25
+#define MCP_RXM1EID8    0x26
+#define MCP_RXM1EID0    0x27
+#define MCP_CNF3        0x28
+#define MCP_CNF2        0x29
+#define MCP_CNF1        0x2A
+#define MCP_CANINTE     0x2B
+#define MCP_CANINTF     0x2C
+#define MCP_EFLG        0x2D
+#define MCP_TXB0CTRL    0x30
+#define MCP_TXB1CTRL    0x40
+#define MCP_TXB2CTRL    0x50
+#define MCP_RXB0CTRL    0x60
+#define MCP_RXB0SIDH    0x61
+#define MCP_RXB1CTRL    0x70
+#define MCP_RXB1SIDH    0x71
+
+
+#define MCP_TX_INT          0x1C                                    // Enable all transmit interrup ts
+#define MCP_TX01_INT        0x0C                                    // Enable TXB0 and TXB1 interru pts
+#define MCP_RX_INT          0x03                                    // Enable receive interrupts
+#define MCP_NO_INT          0x00                                    // Disable all interrupts
+
+#define MCP_TX01_MASK       0x14
+#define MCP_TX_MASK         0x54
+
+/*
+ *   Define SPI Instruction Set
+ */
+
+#define MCP_WRITE           0x02
+
+#define MCP_READ            0x03
+
+#define MCP_BITMOD          0x05
+
+#define MCP_LOAD_TX0        0x40
+#define MCP_LOAD_TX1        0x42
+#define MCP_LOAD_TX2        0x44
+
+#define MCP_RTS_TX0         0x81
+#define MCP_RTS_TX1         0x82
+#define MCP_RTS_TX2         0x84
+#define MCP_RTS_ALL         0x87
+
+#define MCP_READ_RX0        0x90
+#define MCP_READ_RX1        0x94
+
+#define MCP_READ_STATUS     0xA0
+
+#define MCP_RX_STATUS       0xB0
+
+#define MCP_RESET           0xC0
+
+
+/*
+ *   CANCTRL Register Values
+ */
+
+#define MODE_NORMAL     0x00
+#define MODE_SLEEP      0x20
+#define MODE_LOOPBACK   0x40
+#define MODE_LISTENONLY 0x60
+#define MODE_CONFIG     0x80
+#define MODE_POWERUP    0xE0
+#define MODE_MASK       0xE0
+#define ABORT_TX        0x10
+#define MODE_ONESHOT    0x08
+#define CLKOUT_ENABLE   0x04
+#define CLKOUT_DISABLE  0x00
+#define CLKOUT_PS1      0x00
+#define CLKOUT_PS2      0x01
+#define CLKOUT_PS4      0x02
+#define CLKOUT_PS8      0x03
+
+
+/*
+ *   CNF1 Register Values
+ */
+
+#define SJW1            0x00
+#define SJW2            0x40
+#define SJW3            0x80
+#define SJW4            0xC0
+
+
+/*
+ *   CNF2 Register Values
+ */
+
+#define BTLMODE         0x80
+#define SAMPLE_1X       0x00
+#define SAMPLE_3X       0x40
+
+
+/*
+ *   CNF3 Register Values
+ */
+
+#define SOF_ENABLE      0x80
+#define SOF_DISABLE     0x00
+#define WAKFIL_ENABLE   0x40
+#define WAKFIL_DISABLE  0x00
+
+
+/*
+ *   CANINTF Register Bits
+ */
+
+#define MCP_RX0IF       0x01
+#define MCP_RX1IF       0x02
+#define MCP_TX0IF       0x04
+#define MCP_TX1IF       0x08
+#define MCP_TX2IF       0x10
+#define MCP_ERRIF       0x20
+#define MCP_WAKIF       0x40
+#define MCP_MERRF       0x80
+
+/*
+ *  speed 16M
+ */
+#define MCP_16MHz_1000kBPS_CFG1 (0x00)
+#define MCP_16MHz_1000kBPS_CFG2 (0xD0)
+#define MCP_16MHz_1000kBPS_CFG3 (0x82)
+
+#define MCP_16MHz_500kBPS_CFG1 (0x00)
+#define MCP_16MHz_500kBPS_CFG2 (0xF0)
+#define MCP_16MHz_500kBPS_CFG3 (0x86)
+
+#define MCP_16MHz_250kBPS_CFG1 (0x41)
+#define MCP_16MHz_250kBPS_CFG2 (0xF1)
+#define MCP_16MHz_250kBPS_CFG3 (0x85)
+
+#define MCP_16MHz_200kBPS_CFG1 (0x01)
+#define MCP_16MHz_200kBPS_CFG2 (0xFA)
+#define MCP_16MHz_200kBPS_CFG3 (0x87)
+
+#define MCP_16MHz_125kBPS_CFG1 (0x03)
+#define MCP_16MHz_125kBPS_CFG2 (0xF0)
+#define MCP_16MHz_125kBPS_CFG3 (0x86)
+
+#define MCP_16MHz_100kBPS_CFG1 (0x03)
+#define MCP_16MHz_100kBPS_CFG2 (0xFA)
+#define MCP_16MHz_100kBPS_CFG3 (0x87)
+
+/*
+#define MCP_16MHz_100kBPS_CFG1 (0x03)
+#define MCP_16MHz_100kBPS_CFG2 (0xBA)
+#define MCP_16MHz_100kBPS_CFG3 (0x07)
+*/
+
+#define MCP_16MHz_95kBPS_CFG1 (0x03)
+#define MCP_16MHz_95kBPS_CFG2 (0xAD)
+#define MCP_16MHz_95kBPS_CFG3 (0x07)
+
+#define MCP_16MHz_83k3BPS_CFG1 (0x03)
+#define MCP_16MHz_83k3BPS_CFG2 (0xBE)
+#define MCP_16MHz_83k3BPS_CFG3 (0x07)
+
+#define MCP_16MHz_80kBPS_CFG1 (0x03)
+#define MCP_16MHz_80kBPS_CFG2 (0xFF)
+#define MCP_16MHz_80kBPS_CFG3 (0x87)
+
+#define MCP_16MHz_50kBPS_CFG1 (0x07)
+#define MCP_16MHz_50kBPS_CFG2 (0xFA)
+#define MCP_16MHz_50kBPS_CFG3 (0x87)
+
+#define MCP_16MHz_40kBPS_CFG1 (0x07)
+#define MCP_16MHz_40kBPS_CFG2 (0xFF)
+#define MCP_16MHz_40kBPS_CFG3 (0x87)
+
+#define MCP_16MHz_33kBPS_CFG1 (0x09)
+#define MCP_16MHz_33kBPS_CFG2 (0xBE)
+#define MCP_16MHz_33kBPS_CFG3 (0x07)
+
+#define MCP_16MHz_31k25BPS_CFG1 (0x0F)
+#define MCP_16MHz_31k25BPS_CFG2 (0xF1)
+#define MCP_16MHz_31k25BPS_CFG3 (0x85)
+
+#define MCP_16MHz_20kBPS_CFG1 (0x0F)
+#define MCP_16MHz_20kBPS_CFG2 (0xFF)
+#define MCP_16MHz_20kBPS_CFG3 (0x87)
+
+#define MCP_16MHz_10kBPS_CFG1 (0x1F)
+#define MCP_16MHz_10kBPS_CFG2 (0xFF)
+#define MCP_16MHz_10kBPS_CFG3 (0x87)
+
+#define MCP_16MHz_5kBPS_CFG1 (0x3F)
+#define MCP_16MHz_5kBPS_CFG2 (0xFF)
+#define MCP_16MHz_5kBPS_CFG3 (0x87)
+
+
+
+#define MCPDEBUG        (0)
+#define MCPDEBUG_TXBUF  (0)
+#define MCP_N_TXBUFFERS (3)
+
+#define MCP_RXBUF_0 (MCP_RXB0SIDH)
+#define MCP_RXBUF_1 (MCP_RXB1SIDH)
+
+//#define SPICS 10
+#define MCP2515_SELECT()   digitalWrite(SPICS, LOW)
+#define MCP2515_UNSELECT() digitalWrite(SPICS, HIGH)
+
+#define MCP2515_OK         (0)
+#define MCP2515_FAIL       (1)
+#define MCP_ALLTXBUSY      (2)
+
+#define CANDEBUG   1
+
+#define CANUSELOOP 0
+
+#define CANSENDTIMEOUT (200)                                            /* milliseconds                 */
+
+/*
+ *   initial value of gCANAutoProcess
+ */
+#define CANAUTOPROCESS (1)
+#define CANAUTOON  (1)
+#define CANAUTOOFF (0)
+
+#define CAN_STDID (0)
+#define CAN_EXTID (1)
+
+#define CANDEFAULTIDENT    (0x55CC)
+#define CANDEFAULTIDENTEXT (CAN_EXTID)
+
+#define CAN_5KBPS    1
+#define CAN_10KBPS   2
+#define CAN_20KBPS   3
+#define CAN_31K25BPS 4
+#define CAN_33KBPS   5
+#define CAN_40KBPS   6
+#define CAN_50KBPS   7
+#define CAN_80KBPS   8
+#define CAN_83K3BPS  9
+#define CAN_95KBPS   10
+#define CAN_100KBPS  11
+#define CAN_125KBPS  12
+#define CAN_200KBPS  13
+#define CAN_250KBPS  14
+#define CAN_500KBPS  15
+#define CAN_1000KBPS 16
+
+#define CAN_OK                  (0)
+#define CAN_FAILINIT            (1)
+#define CAN_FAILTX              (2)
+#define CAN_MSGAVAIL            (3)
+#define CAN_NOMSG               (4)
+#define CAN_SENDWAIT            (5)
+#define CAN_NOSENDWAIT          (6)
+#define CAN_CTRLERROR           (7)
+#define CAN_GETTXBFTIMEOUT      (8)
+#define CAN_SENDMSGTIMEOUT      (9)
+#define CAN_FAIL                (0xff)
+
+#define CAN_MAX_CHAR_IN_MESSAGE (8)
+
+#endif
+/*********************************************************************************************************
+  END FILE
+*********************************************************************************************************/
Index: rtos_arduino/trunk/arduino_lib/libraries/RTC/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RTC/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RTC/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= RTC Library for Arduino =
+
+The RTC library enables an Arduino Zero board to take control of the internal RTC.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/RTC
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/ALARM_interrupt/ALARM_interrupt.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/ALARM_interrupt/ALARM_interrupt.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/ALARM_interrupt/ALARM_interrupt.ino	(revision 136)
@@ -0,0 +1,50 @@
+/*****************************************************************************************************************************************************************************
+* This sketch demonstrate how to use alarm in interrupt mode.
+This mode is more conveniently because you use processor for other tasks and when alarm match occurs interrupt routine is executed.
+In this way, alarm flag checking is indipendent from main program flow.
+******************************************************************************************************************************************************************************/
+
+
+#include <RTCInt.h>
+
+RTCInt rtc;
+
+void setup() 
+{
+  Serial.begin(9600);       //serial communication initializing
+  pinMode(13,OUTPUT);
+  rtc.begin(TIME_H24);      //RTC initializing with 24 hour representation mode
+  rtc.setTime(17,0,5,0);    //setting time (hour minute and second)
+  rtc.setDate(13,8,15);     //setting date
+  rtc.enableAlarm(SEC,ALARM_INTERRUPT,alarm_int); //enabling alarm in polled mode and match on second
+  rtc.local_time.hour=17;
+  rtc.local_time.minute=5;
+  rtc.local_time.second=10;  //setting second to match
+  rtc.setAlarm();  //write second in alarm register
+}
+
+void loop()
+{
+  digitalWrite(13,HIGH);   //main program code
+  delay(100);
+  digitalWrite(13,LOW);
+  delay(900);
+  
+}
+
+
+/*************** Interrupt routine for alarm ******************************/
+void alarm_int(void)
+{
+  Serial.println("Alarm match!");
+    for(int i=0; i < 10; i++)
+    {
+      digitalWrite(13,HIGH);
+      //delay(200);
+      for(int j=0; j < 1000000; j++) asm("NOP");  //in interrupt routine you cannot use delay function then an alternative is NOP instruction cicled many time as you need
+      digitalWrite(13,LOW);
+      //delay(800);
+      for(int j=0; j < 2000000; j++) asm("NOP");
+    }
+    RTC->MODE2.INTFLAG.bit.ALARM0=1; //clearing alarm0 flag
+}    
Index: rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/ALARM_polled/ALARM_polled.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/ALARM_polled/ALARM_polled.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/ALARM_polled/ALARM_polled.ino	(revision 136)
@@ -0,0 +1,46 @@
+/*********************************************************************************************************************************************************************************
+* This sketch demonstrates how configure alarm in polled mode.
+  In this mode you hav to check continuously ALARM0 flag in the main program code.
+*********************************************************************************************************************************************************************************/  
+
+
+#include <RTCInt.h>
+
+RTCInt rtc;
+
+void setup() 
+{
+  Serial.begin(9600);       //serial communication initializing
+  pinMode(13,OUTPUT);
+  rtc.begin(TIME_H24);      //RTC initializing with 24 hour representation mode
+  rtc.setTime(17,0,5,0);    //setting time (hour minute and second)
+  rtc.setDate(13,8,15);     //setting date
+  rtc.enableAlarm(SEC,ALARM_POLLED,NULL); //enabling alarm in polled mode and match on second
+  rtc.local_time.hour=17;
+  rtc.local_time.minute=5;
+  rtc.local_time.second=10;  //setting second to match
+  rtc.setAlarm();  //write second in alarm register
+}
+
+void loop()
+{
+
+   digitalWrite(13,HIGH);
+   delay(100);
+   digitalWrite(13,LOW);
+   delay(400);
+   
+  if(rtc.alarmMatch())        //when match occurs led on pin 13 blinks ten times
+  {
+    Serial.println("Alarm match!");
+    for(int i=0; i < 10; i++)
+    {
+      digitalWrite(13,HIGH);
+      delay(200);
+      digitalWrite(13,LOW);
+      delay(800);
+    }
+    RTC->MODE2.INTFLAG.bit.ALARM0=1; //clearing alarm0 flag
+  } 
+   
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/RTC_simple/RTC_simple.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/RTC_simple/RTC_simple.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/RTC_simple/RTC_simple.ino	(revision 136)
@@ -0,0 +1,62 @@
+/**********************************************************************************************************************************************************
+This sketch gives a simple demonstration of how to use RTC library.
+The code sets date and time using internal structure and then print on serial date and time. Time representation is 12 hour mode
+**********************************************************************************************************************************************************/
+
+
+
+#include <RTCInt.h>
+
+RTCInt rtc;  //create an RTCInt type object
+
+
+void setup() 
+{
+  Serial.begin(9600);
+  rtc.begin(TIME_H12); //init RTC in 12 hour mode
+  
+  //filling internal structure for time
+  rtc.local_time.hour = 10;          //hour
+  rtc.local_time.minute = 44;       //minute
+  rtc.local_time.second = 0;        //second
+  rtc.local_time.Tmode = ANTI_MERIDIAN;  
+  
+  //filling internal structure for date
+  rtc.local_date.day = 13;        //day
+  rtc.local_date.month = 8;       //month
+  rtc.local_date.year = 15;       //year
+  
+  rtc.setTime();  //setting time
+  rtc.setDate();  //setting date
+  
+  
+  
+  
+
+}
+
+void loop() 
+{
+ rtc.getDate();      //getting date in local structure (local_date)
+ rtc.getTime();      //getting time in local structure(local_time)
+ 
+ //printing date in format YYYY/MM/DD
+ Serial.print(rtc.local_date.year+2000); // year
+ Serial.print('/');
+ Serial.print(rtc.local_date.month);    // month
+ Serial.print('/');
+ Serial.print(rtc.local_date.day);      // day
+ Serial.print(' ');
+ 
+ //printing time
+ Serial.print(rtc.local_time.hour);    //hour
+ Serial.print(':');
+ Serial.print(rtc.local_time.minute);  //minute
+ Serial.print(':');
+ Serial.print(rtc.local_time.second);  //second
+ Serial.print (' ');
+ if(rtc.local_time.Tmode == ANTI_MERIDIAN) Serial.println("AM"); // print AM or PM
+ else Serial.println("PM");
+ 
+ delay(1000);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/RTC_simple_24H_mode/RTC_simple_24H_mode.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/RTC_simple_24H_mode/RTC_simple_24H_mode.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RTC/examples/RTC_simple_24H_mode/RTC_simple_24H_mode.ino	(revision 136)
@@ -0,0 +1,51 @@
+/**********************************************************************************************************************************************************
+This sketch gives a simple demonstration of how to use RTC library.
+The code sets date and time using internal structure and then print on serial date and time. Time representation is 24 hour mode
+**********************************************************************************************************************************************************/
+
+
+
+#include <RTCInt.h>
+
+RTCInt rtc;  //create an RTCInt type object
+
+
+void setup() 
+{
+  Serial.begin(9600);
+  rtc.begin(TIME_H24); //init RTC in 12 hour mode
+  
+  //time settings
+  rtc.setHour(15,0);  //setting hour
+  rtc.setMinute(43);  //setting minute
+  rtc.setSecond(0);   //setting second
+  
+  
+  rtc.setDay(13);     //setting day
+  rtc.setMonth(8);    //setting month
+  rtc.setYear(15);    //setting year
+  
+}
+
+void loop() 
+{
+ rtc.getDate();      //getting date in local structure (local_date)
+ rtc.getTime();      //getting time in local structure(local_time)
+ 
+ //printing date in format YYYY/MM/DD
+ Serial.print(rtc.local_date.year+2000); // year
+ Serial.print('/');
+ Serial.print(rtc.local_date.month);    // month
+ Serial.print('/');
+ Serial.print(rtc.local_date.day);      // day
+ Serial.print(' ');
+ 
+ //printing time
+ Serial.print(rtc.local_time.hour);    //hour
+ Serial.print(':');
+ Serial.print(rtc.local_time.minute);  //minute
+ Serial.print(':');
+ Serial.println(rtc.local_time.second);  //second
+ 
+ delay(1000);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/RTC/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RTC/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RTC/keywords.txt	(revision 136)
@@ -0,0 +1,58 @@
+#######################################
+# Syntax Coloring Map For RTC
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+RTCInt	KEYWORD1
+local_time	KEYWORD1
+local_date	KEYWORD1
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+getDay	KEYWORD2
+getMonth	KEYWORD2
+getYear	KEYWORD2
+getHour	KEYWORD2
+getMinute	KEYWORD2
+getSecond	KEYWORD2
+getDate	KEYWORD2
+getTime	Keyword2
+
+setDay	KEYWORD2
+setMonth	KEYWORD2
+setYear	KEYWORD2
+setHour	KEYWORD2
+setMinute	KEYWORD2
+setSecond	KEYWORD2
+setDate	KEYWORD2
+setTime	KEYWORD2
+
+enableAlarm	KEYWORD2
+setAlarm	KEYWORD2
+alarmMatch	KEYWORD2
+
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+TIME_H24	LITERAL1
+TIME_H12	LITERAL1
+
+
+OFF	LITERAL1
+
+
+MMSS	LITERAL1
+HHMMSS	LITERAL1
+DDHHMMSS	LITERAL1
+MMDDHHMMSS	LITERAL1
+YYMMDDHHMMSS	LITERAL1
+SEC	LITERAL1
+ANTI_MERIDIAN	LITERAL1
+POST_MERIDIAN	LITERAL1
+ALARM_POLLED	LITERAL1
+ALARM_INTERRUPT	LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/RTC/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RTC/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RTC/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=RTC
+version=1.0.0
+author=Arduino
+maintainer=Arduino
+sentence=Allows to use the RTC functionalities. For Arduino M0 or M0PRO only.
+paragraph=With this library you can use the RTC peripheral of an Arduino M0/M0PRO in order to program actions related to date and time.
+category=Timing
+url=http://www.arduino.cc/en/Reference/RTCZero
+architectures=samd
Index: rtos_arduino/trunk/arduino_lib/libraries/RTC/src/RTCInt.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RTC/src/RTCInt.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RTC/src/RTCInt.cpp	(revision 136)
@@ -0,0 +1,626 @@
+/*
+  RTC library for Arduino M0/M0PRO.
+  Copyright (c) 2015 Arduino SRL. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+ 
+#include "RTCInt.h"
+//#include <Arduino.h>
+
+static bool time_Mode = false;
+
+/*******************************************************************************************
+*Description: Function responsible of RTC initialization
+*Input Parameters: bool timeRep this parameter can be TIME_H24 (24 hour mode) or TIME_H12 (12 hour mode)
+*Return Parameter: None
+*******************************************************************************************/
+void RTCInt::begin(bool timeRep) 
+{
+  
+  
+  PM->APBAMASK.reg |= PM_APBAMASK_RTC; // turn on digital interface clock for RTC
+  
+  GCLK->CLKCTRL.reg = (uint32_t)((GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK4 | (RTC_GCLK_ID << GCLK_CLKCTRL_ID_Pos)));
+  while (GCLK->STATUS.bit.SYNCBUSY);
+  
+  GCLK->GENCTRL.reg = (GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_OSCULP32K | GCLK_GENCTRL_ID(4) | GCLK_GENCTRL_DIVSEL );
+  while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY);
+  
+  GCLK->GENDIV.reg = GCLK_GENDIV_ID(4); 
+  GCLK->GENDIV.bit.DIV=4;
+  while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY);
+  
+  
+
+  RTCdisable();
+
+  RTCreset();
+
+  RTC->MODE2.CTRL.reg |= RTC_MODE2_CTRL_MODE_CLOCK; // set RTC operating mode
+  RTC->MODE2.CTRL.reg |= RTC_MODE2_CTRL_PRESCALER_DIV1024; // set prescaler to 1024 for MODE2
+  RTC->MODE2.CTRL.bit.MATCHCLR = 0; // disable clear on match
+  
+  
+  if (timeRep)
+  {
+    RTC->MODE2.CTRL.bit.CLKREP = 0; // 24h time representation
+	time_Mode = true;
+  }		
+  else
+  {  
+    RTC->MODE2.CTRL.bit.CLKREP = 1; // 12h time representation
+	time_Mode = false;
+  }	
+
+  RTC->MODE2.READREQ.reg &= ~RTC_READREQ_RCONT; // disable continuously mode
+
+  
+  while (RTCSync());
+	RTCresetRemove();
+  RTCenable();
+  
+}
+
+/*
+ * Get Time Functions
+ */
+
+/**********************************************************************************************************************
+*Description: Function for getting hour, according to time representation mode this value can 
+			  be in the range 0-24 (in case of TIME_H24) or in the range 0-12 (in case of TIME_H12)	
+*Input Parameters: None
+*Return Parameter: unsigned int (hour)
+***********************************************************************************************************************/
+ unsigned int RTCInt::getHour()
+{
+	unsigned int h=0;
+	
+	
+	h=RTC->MODE2.CLOCK.bit.HOUR;
+	while (RTCSync());
+	
+	if(time_Mode ==TIME_H12)
+	{
+		h = h & 0x0000000F;
+	}
+	
+  return h;
+}
+ 
+ /**********************************************************************************************************************
+*Description: Function for getting minute, this value varies in the range 0 - 59 
+*Input Parameters: None
+*Return Parameter: unsigned int (minute)
+***********************************************************************************************************************/
+unsigned int RTCInt::getMinute()
+{
+  unsigned int m=0;
+  
+  m=RTC->MODE2.CLOCK.bit.MINUTE;
+  while (RTCSync());
+ return m; 
+}
+ 
+ 
+ /**********************************************************************************************************************
+*Description: Function for getting second, this value varies in the range 0 - 59 
+*Input Parameters: None
+*Return Parameter: unsigned int (second)
+***********************************************************************************************************************/
+ unsigned int RTCInt::getSecond()
+{
+  unsigned int s=0;
+  
+  s=RTC->MODE2.CLOCK.bit.SECOND;
+  while (RTCSync());
+ return s; 
+}
+
+
+/**********************************************************************************************************************
+*Description: Function for getting time (hours, minutes and seconds). This function fills a structure called local_time
+			  accessible in the class RTCInt.	
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTCInt::getTime(void)
+{
+	unsigned int hour=0, h=0;
+	
+	local_time.hour = getHour();
+	if(time_Mode == TIME_H12)
+	{
+		h=RTC->MODE2.CLOCK.bit.HOUR;
+		while (RTCSync());
+		local_time.Tmode = h & 0x10;
+	}	
+	local_time.minute = getMinute();
+	local_time.second = getSecond();
+}
+
+unsigned char RTCInt::getMeridian(void)
+{
+	unsigned int h=0;
+	unsigned char m=0;
+	
+	if(time_Mode == TIME_H12)
+	{
+		h=RTC->MODE2.CLOCK.bit.HOUR;
+		while (RTCSync());
+		m = h & 0x10;
+		m >> 4;
+	}
+	else m=0;
+return m;	
+}
+
+
+/*
+ * Get Date Functions
+ */
+
+ 
+/**********************************************************************************************************************
+*Description: Function for getting day 	
+*Input Parameters: None
+*Return Parameter: unsigned int day in the range 1 - 31
+***********************************************************************************************************************/ 
+unsigned int RTCInt::getDay()
+{
+  unsigned int d=0;
+  
+  d=RTC->MODE2.CLOCK.bit.DAY;
+  while (RTCSync());
+ return d; 
+}
+
+/**********************************************************************************************************************
+*Description: Function for getting Month 	
+*Input Parameters: None
+*Return Parameter: unsigned int month in the range 1 - 12
+***********************************************************************************************************************/
+unsigned int RTCInt::getMonth()
+{
+  unsigned int month=0;
+  
+  month=RTC->MODE2.CLOCK.bit.MONTH;
+  while (RTCSync());
+ return month; 
+}
+
+
+/************************************************************************************************************************************
+*Description: Function for getting year 	
+*Input Parameters: None
+*Return Parameter: unsigned int year in the range 0 - 63 (note: add offset to this value to obtain correct representation for year)
+*************************************************************************************************************************************/
+unsigned int RTCInt::getYear()
+{
+  unsigned int y=0;
+  
+  y=RTC->MODE2.CLOCK.bit.YEAR;
+  while (RTCSync());
+ return y; 
+}
+
+
+/**********************************************************************************************************************
+*Description: Function for getting date (day, month and year). This function fills a structure called local_date
+			  accessible in the class RTCInt.	
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTCInt::getDate(void)
+{
+	local_date.day = getDay();
+	local_date.month = getMonth();
+	local_date.year = getYear();
+}
+
+/*
+ * Set Time Functions
+ */
+
+ 
+/************************************************************************************************************************************
+*Description: Function for setting hour 	
+*Input Parameters: unsigned int hour (according to time representation the range can be 0 - 23 or 0 - 12)
+*Return Parameter: None
+*************************************************************************************************************************************/ 
+void RTCInt::setHour(unsigned int hour, unsigned char meridian)
+{
+  if (time_Mode) {
+    if((hour >= 0) && (hour <= 23))
+	{	
+		RTC->MODE2.CLOCK.bit.HOUR = hour;
+		while (RTCSync());
+	}
+	else return;	
+  } 
+  else {
+    if((hour >= 0) && (hour <=12)) 
+	{	
+		
+		hour=hour | (meridian << 4);
+		RTC->MODE2.CLOCK.bit.HOUR = hour;
+		while (RTCSync());
+	}
+	else return;	
+  }
+  
+}
+ 
+ 
+ /************************************************************************************************************************************
+*Description: Function for setting minute 	
+*Input Parameters: unsigned int minute (range 0 - 59)
+*Return Parameter: None
+*************************************************************************************************************************************/ 
+ void RTCInt::setMinute(unsigned int minute)
+{
+  if((minute >=0) && (minute <= 59))
+  {		
+	RTC->MODE2.CLOCK.bit.MINUTE = minute;
+	while (RTCSync());
+  }
+  else return;	
+}
+ 
+ 
+ 
+/************************************************************************************************************************************
+*Description: Function for setting second 	
+*Input Parameters: unsigned int second (range 0 - 59)
+*Return Parameter: None
+*************************************************************************************************************************************/  
+void RTCInt::setSecond(unsigned int second)
+{
+  if((second >=0) && (second <= 59))
+  {		
+	RTC->MODE2.CLOCK.bit.SECOND = second;
+	while (RTCSync());
+  }
+  else return;	
+}
+
+
+/************************************************************************************************************************************
+*Description: Function for setting time 	
+*Input Parameters: unsigned int hour (range 0 - 23 or 0 - 12 according to time representation)
+				   unsigned int minute (range 0 - 59)
+				   unsigned int second (range 0 - 59)		
+*Return Parameter: None
+*************************************************************************************************************************************/  
+void RTCInt::setTime(unsigned int hour,unsigned char meridian, unsigned int minute, unsigned int second)
+{
+  setHour(hour,meridian);
+  setMinute(minute);
+  setSecond(second);  
+}
+
+
+/**********************************************************************************************************************
+*Description: Function for setting time (hour, minute and second). This function sets time retrieving values from a 
+			  local structure called local_time accessible in the class RTCInt.	
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTCInt::setTime(void)
+{
+	setHour(local_time.hour,local_time.Tmode);
+    setMinute(local_time.minute);
+    setSecond(local_time.second);  
+}
+
+
+/*
+ * Set Date Functions
+ */
+
+
+/************************************************************************************************************************************
+*Description: Function for setting day	
+*Input Parameters: unsigned int day (range 1 - 31)
+*Return Parameter: None
+*************************************************************************************************************************************/  
+void RTCInt::setDay(unsigned int day)
+{
+  if((day > 1) && (day <=31))
+  {
+  RTC->MODE2.CLOCK.bit.DAY = day;
+  while (RTCSync());
+  }
+  else return;
+}
+
+
+/************************************************************************************************************************************
+*Description: Function for setting month 	
+*Input Parameters: unsigned int month (range 1 - 12)
+*Return Parameter: None
+*************************************************************************************************************************************/  
+void RTCInt::setMonth(unsigned int month)
+{
+  if((month > 1) && (month <=12))
+  {	  
+  RTC->MODE2.CLOCK.bit.MONTH = month;
+  while (RTCSync());
+  }
+  else return;
+}
+
+
+/************************************************************************************************************************************
+*Description: Function for setting year 	
+*Input Parameters: unsigned int year range (0 - 63) (note: add offset to this value to obtain correct representation for year)
+*Return Parameter: None 
+*************************************************************************************************************************************/
+void RTCInt::setYear(unsigned int year)
+{
+  if((year >= 0) && (year <=63))
+  {	  
+  RTC->MODE2.CLOCK.bit.YEAR = year;
+  while (RTCSync());
+  }
+  else return;
+}
+
+
+/**********************************************************************************************************************
+*Description: Function for setting date (day, month and year).	
+*Input Parameters: unsigned int day (range 1 - 31)
+				   unsigned int month (range 1 - 12)
+				   unsigned int year (range 0 - 63)		
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTCInt::setDate(unsigned int day, unsigned int month, unsigned int year)
+{
+  setDay(day);
+  setMonth(month);  
+  setYear(year);
+}
+
+
+/**********************************************************************************************************************
+*Description: Function for setting date (day, month and year). This function retrieves values from a local structure 
+			  called local_date accessible in the class RTCInt.	
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTCInt::setDate(void)
+{
+	setDay(local_date.day);
+	setMonth(local_date.month);  
+    setYear(local_date.year);
+}
+
+/*
+ * Set Alarm Functions
+ */
+ 
+
+ /**********************************************************************************************************************
+*Description: Function for enabling alarm.	
+*Input Parameters: unsigned int mode:
+										 OFF                 alarm disabled
+										 SEC                 alarm match on seconds
+										 MMSS                alarm match on minutes and seconds
+										 HHMMSS              alarm match on hours, minute and seconds
+										 DDHHMMSS            alarm match on day, hours, minutes and seconds
+										 MMDDHHMMSS          alarm match on month, day hours, minutes and seconds
+										 YYMMDDHHMMSS        alarm match on year, month, day, hours, minutes and seconds	
+				   unsigned int type:
+										 ALARM_POLLED        alarm matching must be monitored from the code
+										 ALARM_INTERRUPT     when alarm match occurs will be generated an interrupt
+				   
+				   voidFuncPtr callback: pointer to interrupt routine for alarm match (write NULL if you use ALARM_POLLED)		
+*Return Parameter: None
+***********************************************************************************************************************/
+ void RTCInt::enableAlarm(unsigned int mode, unsigned int type, voidFuncPtr callback)
+ {
+	 
+	 Alarm_Mode = mode;
+	 RTC->MODE2.Mode2Alarm->MASK.reg = mode;
+	 while (RTCSync());
+	 
+	 if(type == ALARM_POLLED)
+	 {
+		 return;
+	 }	 
+	 
+	 else if(type == ALARM_INTERRUPT)
+	 {
+		 NVIC_DisableIRQ(RTC_IRQn); //disable any RTC interrupt
+		 NVIC_ClearPendingIRQ(RTC_IRQn); //clear all pending interrupt for RTC
+		 NVIC_SetPriority(RTC_IRQn,0);  //set RTC interrupt priority 
+		 NVIC_EnableIRQ(RTC_IRQn);  //enable general interrupt for RTC
+		 
+		 RTC->MODE2.INTENSET.bit.ALARM0 = 1; //enable ALARM0 mathc
+		 while (RTCSync());
+		 
+		 _callback = callback;
+		 RTC->MODE2.INTFLAG.bit.ALARM0 = 1; //clear interrupt flag for RTC ALARM0 interrupt
+		 
+	 }		
+ }
+ 
+ 
+ /**********************************************************************************************************************
+*Description: Function for setting alarm. This function retrieves values from two local structures 
+			  called local_date and local_time accessible in the class RTCInt. According to match alarm type, values 
+			  can be obtained from local_time, local_date or both structures.	
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+ void RTCInt::setAlarm(void)
+ {
+	 
+   switch(RTCInt::Alarm_Mode)
+   {
+   case OFF :
+      break;
+   case SEC :
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.SECOND= local_time.second;
+	  while (RTCSync());
+	  break;	
+   case MMSS :
+      RTC->MODE2.Mode2Alarm->ALARM.bit.MINUTE= local_time.minute;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.SECOND= local_time.second;
+	  while (RTCSync());
+	  break;
+   case HHMMSS :
+      RTC->MODE2.Mode2Alarm->ALARM.bit.HOUR= local_time.hour;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.MINUTE= local_time.minute;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.SECOND= local_time.second;
+	  while (RTCSync());
+      break;
+   case DDHHMMSS :
+      RTC->MODE2.Mode2Alarm->ALARM.bit.DAY= local_date.day;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.HOUR= local_time.hour;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.MINUTE= local_time.minute;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.SECOND= local_time.second;
+	  while (RTCSync());
+      break;
+   case MMDDHHMMSS :
+      RTC->MODE2.Mode2Alarm->ALARM.bit.MONTH= local_date.month;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.DAY= local_date.day;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.HOUR= local_time.hour;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.MINUTE= local_time.minute;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.SECOND= local_time.second;
+	  while (RTCSync());
+      break;
+   case YYMMDDHHMMSS :
+      RTC->MODE2.Mode2Alarm->ALARM.bit.YEAR= local_date.year;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.MONTH= local_date.month;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.DAY= local_date.day;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.HOUR= local_time.hour;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.MINUTE= local_time.minute;
+	  while (RTCSync());
+	  RTC->MODE2.Mode2Alarm->ALARM.bit.SECOND= local_time.second;
+	  while (RTCSync());
+      break;	  
+   default :
+      break;
+   }
+   
+}
+
+/**********************************************************************************************************************
+*Description: Function for getting status of alarm match. This function is used when you adopt ALARM_POLLED mode 	
+*Input Parameters: None
+*Return Parameter: bool alarm match
+***********************************************************************************************************************/
+bool RTCInt::alarmMatch(void)
+   {
+	   return RTC->MODE2.INTFLAG.bit.ALARM0;
+   }
+
+/*
+ * Private Utility Functions
+ */
+
+
+
+/**********************************************************************************************************************
+*Description: Function for retrieving sync status of RTC 
+*Input Parameters: None
+*Return Parameter: bool RTC sync
+***********************************************************************************************************************/
+bool RTCInt::RTCSync()
+{
+  return (RTC->MODE2.STATUS.bit.SYNCBUSY);
+}
+
+
+/**********************************************************************************************************************
+*Description: Function for disabling RTC
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTCInt::RTCdisable()
+{
+  RTC->MODE2.CTRL.reg &= ~RTC_MODE2_CTRL_ENABLE; // disable RTC
+  while (RTCSync());
+}
+
+
+/**********************************************************************************************************************
+*Description: Function for enabling RTC
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTCInt::RTCenable()
+{
+  RTC->MODE2.CTRL.reg |= RTC_MODE2_CTRL_ENABLE; // enable RTC
+  while (RTCSync());
+}
+
+
+/**********************************************************************************************************************
+*Description: Function for resetting RTC. This function clears all RTC registers
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTCInt::RTCreset()
+{
+  RTC->MODE2.CTRL.reg |= RTC_MODE2_CTRL_SWRST; // software reset
+  while (RTCSync());
+}
+
+
+/**********************************************************************************************************************
+*Description: Function for remove reset to RTC
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTCInt::RTCresetRemove()
+{
+  RTC->MODE2.CTRL.reg &= ~RTC_MODE2_CTRL_SWRST; // software reset remove
+  while (RTCSync());
+}
+
+
+
+/**********************************************************************************************************************
+*Description: RTC handler interrupt routine. This function checks flag ALARM0 and if is set calls routine 
+			  pointed by _callback pointer then resets ALARM0 flag.
+*Input Parameters: None
+*Return Parameter: None
+***********************************************************************************************************************/
+void RTC_Handler(void)
+{
+	if(RTC->MODE2.INTFLAG.bit.ALARM0)
+	{
+		_callback(); //call interrupt routine
+		RTC->MODE2.INTFLAG.bit.ALARM0 = 1; // clear ALARM0 flag
+	}
+	
+	else return;	
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/RTC/src/RTCInt.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RTC/src/RTCInt.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RTC/src/RTCInt.h	(revision 136)
@@ -0,0 +1,112 @@
+/*
+  RTC library for Arduino Zero.
+  Copyright (c) 2015 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#ifndef RTCInt_H
+#define RTCInt_H
+
+#define TIME_H24 1
+#define TIME_H12 0
+
+#define OFF RTC_MODE2_MASK_SEL_OFF
+#define SEC RTC_MODE2_MASK_SEL_SS
+#define MMSS RTC_MODE2_MASK_SEL_MMSS
+#define HHMMSS RTC_MODE2_MASK_SEL_HHMMSS
+#define DDHHMMSS RTC_MODE2_MASK_SEL_DDHHMMSS
+#define MMDDHHMMSS RTC_MODE2_MASK_SEL_MMDDHHMMSS
+#define YYMMDDHHMMSS RTC_MODE2_MASK_SEL_YYMMDDHHMMSS
+
+#define ALARM_POLLED 0
+#define ALARM_INTERRUPT 1
+
+#define ANTI_MERIDIAN 0
+#define POST_MERIDIAN 1
+
+#include "Arduino.h"
+
+typedef struct {
+	unsigned int hour;
+	unsigned int minute;
+	unsigned int second;
+	unsigned char Tmode;
+}TIME;
+
+typedef struct {
+	unsigned int day;
+	unsigned int month;
+	unsigned int year;
+}DATE;
+
+static voidFuncPtr _callback = NULL;
+
+class RTCInt {
+public:
+
+  RTCInt() {};
+  
+  TIME local_time;
+  DATE local_date;
+  
+  void begin(bool timeMode);
+  
+  /* Get Time Functions */
+
+  unsigned int getHour(void);
+  unsigned int getMinute(void);
+  unsigned int getSecond(void);
+  void getTime(void);
+  unsigned char getMeridian(void); 
+ 
+ /* Get Date Functions */ 
+  unsigned int getDay(void);
+  unsigned int getMonth(void);
+  unsigned int getYear(void);
+  void getDate(void);
+
+  /* Set Time Functions */
+
+  void setHour(unsigned int hour, unsigned char meridian);
+  void setMinute(unsigned int minute);
+  void setSecond(unsigned int second);
+  void setTime(unsigned int hour, unsigned char meridian, unsigned int minute, unsigned int second);
+  void setTime(void);
+
+ /* Set Date Functions */ 
+  void setDay(unsigned int day);
+  void setMonth(unsigned int month);
+  void setYear(unsigned int year);
+  void setDate(unsigned int day, unsigned int month, unsigned int year);
+  void setDate(void);
+  
+ /* Alarm Functions */
+	void enableAlarm(unsigned int mode, unsigned int type, voidFuncPtr callback);
+	void setAlarm(void);
+	bool alarmMatch(void);
+	
+
+private:
+  unsigned int Alarm_Mode=0;
+  bool RTCSync(void);  
+  void RTCdisable(void);
+  void RTCenable(void);
+  void RTCreset(void);
+  void RTCresetRemove(void);
+};
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Rest/examples/rest_ext_interrupt/rest_ext_interrupt.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Rest/examples/rest_ext_interrupt/rest_ext_interrupt.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Rest/examples/rest_ext_interrupt/rest_ext_interrupt.ino	(revision 136)
@@ -0,0 +1,41 @@
+/*********************************************************************************************************************************************************************************
+* This sketch demonstrates how sleep function using external interrupt to wake up the MCU.
+  This sketch work only for M0 or M0PRO boards.
+*********************************************************************************************************************************************************************************/  
+
+
+
+#include <rest.h>
+
+rest mcu_std;
+
+unsigned int i=0;
+
+void setup() 
+{
+  
+  //SerialUSB.begin(9600);   //serial settings
+  mcu_std.begin(WAKE_EXT_INTERRUPT,8,prova);  //standby setup for external interrupts
+  
+
+}
+
+void loop() 
+{
+  for(i=0; i<20; i++)
+  {
+    digitalWrite(13,HIGH);
+    delay(100);
+    digitalWrite(13,LOW);
+    delay(500);
+  }  
+  
+  mcu_std.standby();  //now mcu go to standby
+
+}
+
+
+void prova(void)  //interrupt routine (isn't necessary to execute any tasks in this routine
+{
+  
+} 
Index: rtos_arduino/trunk/arduino_lib/libraries/Rest/examples/rest_rtc_alarm_interrupt/rest_rtc_alarm_interrupt.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Rest/examples/rest_rtc_alarm_interrupt/rest_rtc_alarm_interrupt.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Rest/examples/rest_rtc_alarm_interrupt/rest_rtc_alarm_interrupt.ino	(revision 136)
@@ -0,0 +1,54 @@
+/*********************************************************************************************************************************************************************************
+* This sketch demonstrates how to use sleep function and wake-up MCU with RTC alarm interrupt.
+  This sketch work only for M0 and M0PRO boards.
+*********************************************************************************************************************************************************************************/  
+
+#include <rest.h>
+#include <RTCInt.h>
+
+rest mcu_std;
+RTCInt rtc;
+
+unsigned int i=0;
+
+void setup() 
+{
+  
+  pinMode(30,OUTPUT);  //led RX
+  Serial5.begin(9600);   //serial settings
+  rtc.begin(TIME_H24);
+  rtc.setTime(12,48,0,0);
+  rtc.setDate(22,10,15);
+  rtc.enableAlarm(SEC,ALARM_INTERRUPT,rest_alarm_int);
+  rtc.local_time.hour=12;
+  rtc.local_time.minute=48;
+  rtc.local_time.second=30;
+  mcu_std.begin(WAKE_RTC_ALARM);  //standby setup for external interrupts
+  rtc.setAlarm();
+  SerialUSB.println("START");
+
+}
+
+void loop() 
+{
+  for(i=0; i<20; i++)
+  {
+    digitalWrite(13,HIGH);
+    delay(100);
+    digitalWrite(13,LOW);
+    delay(200);
+  }  
+  
+  digitalWrite(30,LOW);
+  mcu_std.standby();  //now mcu go to standby
+
+}
+
+
+void rest_alarm_int(void)  //interrupt routine 
+{
+  //PORT->Group[1].OUTSET.reg = 0x1u<<3;
+  digitalWrite(30,HIGH);
+  
+  Serial5.println("HELLO");
+} 
Index: rtos_arduino/trunk/arduino_lib/libraries/Rest/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Rest/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Rest/keywords.txt	(revision 136)
@@ -0,0 +1,27 @@
+#######################################
+# Syntax Coloring Map For Rest
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+rest	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+begin	KEYWORD2
+standby	KEYWORD2
+
+
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+WAKE_EXT_INTERRUPT	LITERAL1
+WAKE_RTC_ALARM	LITERAL1
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Rest/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Rest/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Rest/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Rest
+version=1.0.0
+author=Arduino
+maintainer=Arduino
+sentence=Allows to use the sleep functionalities. For Arduino M0 or M0PRO only.
+paragraph=With this library you can manage power on an Arduino M0/M0PRO.
+category=power
+url=http://www.arduino.org
+architectures=samd
Index: rtos_arduino/trunk/arduino_lib/libraries/Rest/src/rest.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Rest/src/rest.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Rest/src/rest.cpp	(revision 136)
@@ -0,0 +1,119 @@
+#include "rest.h"
+
+
+
+void rest::begin(unsigned int mode, unsigned int inter_pin, voidFuncPtr callback)
+{
+	if((mode == WAKE_EXT_INTERRUPT) && (inter_pin !=2) &&  (inter_pin!=0) && (inter_pin!=1))
+	{
+		 NVMCTRL->CTRLB.bit.SLEEPPRM = 3;
+		
+		SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
+		pinMode(inter_pin,INPUT_PULLUP);
+		
+		attachInterrupt(inter_pin,callback,FALLING);
+		enable_eic_wake(inter_pin);
+		set_clk();
+		
+	}
+	else return; 
+	
+	
+	
+	
+}
+
+
+void rest::begin(unsigned int mode)
+{
+	if(mode == WAKE_RTC_ALARM)
+	{
+		//RTCInt.begin(TIME_H24);
+		
+		GCLK->CLKCTRL.bit.CLKEN = 0; //disable GCLK module 
+		while (GCLK->STATUS.bit.SYNCBUSY);
+		
+		GCLK->GENCTRL.bit.RUNSTDBY = 1;  //GCLK6 run standby
+		while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY);
+		
+		GCLK->CLKCTRL.bit.CLKEN = 1; //disable GCLK module 
+		while (GCLK->STATUS.bit.SYNCBUSY);
+		
+		NVMCTRL->CTRLB.bit.SLEEPPRM = 3;
+		
+		SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
+		
+	}
+	else return; 
+	
+}
+
+
+void rest::standby(void)
+{
+	__DSB();
+    __WFI();
+	
+}
+
+
+void rest::set_clk(void)
+{
+	GCLK->CLKCTRL.bit.CLKEN = 0; //disable GCLK module 
+		while (GCLK->STATUS.bit.SYNCBUSY);
+		
+		GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK6 | GCLK_CLKCTRL_ID( GCM_EIC )) ;  //EIC clock switched on GCLK6
+		while (GCLK->STATUS.bit.SYNCBUSY);
+		
+		GCLK->GENCTRL.reg = (GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_OSCULP32K | GCLK_GENCTRL_ID(6));  //source for GCLK6 is OSCULP32K
+		while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY);
+		
+		GCLK->GENCTRL.bit.RUNSTDBY = 1;  //GCLK6 run standby
+		while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY);
+	
+}
+
+
+void rest::enable_eic_wake(unsigned int inter_pin)
+{
+	switch(inter_pin)
+		{
+			case 3:
+				EIC->WAKEUP.bit.WAKEUPEN9 = 1;
+				break;
+			case 4:
+				EIC->WAKEUP.bit.WAKEUPEN14 = 1;
+				break;
+			case 5:
+				EIC->WAKEUP.bit.WAKEUPEN15 = 1;
+				break;
+			case 6:
+				//EIC->WAKEUP.bit.WAKEUPEN20 = 1;  //non si pu嘆 usare
+				break;
+			case 7:
+				//EIC->WAKEUP.bit.WAKEUPEN21 = 1;  //non si pu嘆 usare
+				break;
+			case 8:
+				EIC->WAKEUP.bit.WAKEUPEN6 = 1;
+				break;
+			case 9:
+				EIC->WAKEUP.bit.WAKEUPEN7 = 1;
+				break;
+			case 10:
+				//EIC->WAKEUP.bit.WAKEUPEN18 = 1;  //non si pu嘆 usare
+				break;
+			case 11:
+				//EIC->WAKEUP.bit.WAKEUPEN16 = 1;  //non c'竪
+				break;
+			case 12:
+				//EIC->WAKEUP.bit.WAKEUPEN19 = 1;  //non si pu嘆 usare
+				break;
+			case 13:
+				//EIC->WAKEUP.bit.WAKEUPEN17 = 1;  //non c'竪
+				break;
+			default:
+				break;
+				
+		}		
+	
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Rest/src/rest.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Rest/src/rest.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Rest/src/rest.h	(revision 136)
@@ -0,0 +1,26 @@
+#ifndef rest_h
+#define rest_h
+
+
+#include <sam.h>
+#include <Arduino.h>
+
+#define WAKE_EXT_INTERRUPT 1
+#define WAKE_RTC_ALARM 2
+
+typedef void (*voidFuncPtr)( void ) ;
+
+class rest {
+	public:
+		//sleep();
+		void begin(unsigned int mode, unsigned int inter_pin, voidFuncPtr callback);
+		void begin(unsigned int mode);
+		void standby(void);
+	
+	private:
+		void set_clk(void);
+		void enable_eic_wake(unsigned int inter_pin);
+		
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Robot IR Remote Library for Arduino =
+
+The Robot has a number of built in sensors and actuators. The library is designed to easily access the robot's functionality.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/RobotLibrary
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/extras/LICENSE.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/extras/LICENSE.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/extras/LICENSE.txt	(revision 136)
@@ -0,0 +1,466 @@
+
+		  GNU LESSER GENERAL PUBLIC LICENSE
+		       Version 2.1, February 1999
+
+ Copyright (C) 1991, 1999 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+[This is the first released version of the Lesser GPL.  It also counts
+ as the successor of the GNU Library Public License, version 2, hence
+ the version number 2.1.]
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+Licenses are intended to guarantee your freedom to share and change
+free software--to make sure the software is free for all its users.
+
+  This license, the Lesser General Public License, applies to some
+specially designated software packages--typically libraries--of the
+Free Software Foundation and other authors who decide to use it.  You
+can use it too, but we suggest you first think carefully about whether
+this license or the ordinary General Public License is the better
+strategy to use in any particular case, based on the explanations below.
+
+  When we speak of free software, we are referring to freedom of use,
+not price.  Our General Public Licenses are designed to make sure that
+you have the freedom to distribute copies of free software (and charge
+for this service if you wish); that you receive source code or can get
+it if you want it; that you can change the software and use pieces of
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+
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+
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+
+  We protect your rights with a two-step method: (1) we copyright the
+library, and (2) we offer you this license, which gives you legal
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+
+
+  Finally, software patents pose a constant threat to the existence of
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Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/extras/readme
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/extras/readme	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/extras/readme	(revision 136)
@@ -0,0 +1,14 @@
+This is the IRremote library for the Arduino.
+
+To download from github (http://github.com/shirriff/Arduino-IRremote), click on the "Downloads" link in the upper right, click "Download as zip", and get a zip file.  Unzip it and rename the directory shirriff-Arduino-IRremote-nnn to IRremote
+
+To install, move the downloaded IRremote directory to:
+arduino-1.x/libraries/IRremote
+where arduino-1.x is your Arduino installation directory
+
+After installation you should have files such as:
+arduino-1.x/libraries/IRremote/IRremote.cpp
+
+For details on the library see the Wiki on github or the blog post http://arcfn.com/2009/08/multi-protocol-infrared-remote-library.html
+
+Copyright 2009-2012 Ken Shirriff
Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/keywords.txt	(revision 136)
@@ -0,0 +1,50 @@
+#######################################
+# Syntax Coloring Map For IRremote
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+decode_results	KEYWORD1
+IRrecv	KEYWORD1
+IRsend	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+blink13	KEYWORD2
+decode	KEYWORD2
+enableIRIn	KEYWORD2
+resume	KEYWORD2
+enableIROut	KEYWORD2
+sendNEC	KEYWORD2
+sendSony	KEYWORD2
+sendSanyo KEYWORD2
+sendMitsubishi KEYWORD2
+sendRaw	KEYWORD2
+sendRC5	KEYWORD2
+sendRC6	KEYWORD2
+sendDISH KEYWORD2
+sendSharp KEYWORD2
+sendPanasonic KEYWORD2
+sendJVC KEYWORD2
+
+#
+#######################################
+# Constants (LITERAL1)
+#######################################
+
+NEC	LITERAL1
+SONY	LITERAL1
+SANYO LITERAL1
+MITSUBISHI LITERAL1
+RC5	LITERAL1
+RC6	LITERAL1
+DISH LITERAL1
+SHARP LITERAL1
+PANASONIC LITERAL1
+JVC LITERAL1
+UNKNOWN	LITERAL1
+REPEAT	LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Robot IR Remote
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Allows controlling the Arduino Robot via an IR remote control. For Arduino Robot only.
+paragraph=
+category=Device Control
+url=https://github.com/shirriff/Arduino-IRremote
+architectures=avr
Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremote.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremote.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremote.cpp	(revision 136)
@@ -0,0 +1,777 @@
+/*
+ * IRremote
+ * Version 0.11 August, 2009
+ * Copyright 2009 Ken Shirriff
+ * For details, see http://arcfn.com/2009/08/multi-protocol-infrared-remote-library.html
+ *
+ * Modified by Paul Stoffregen <paul@pjrc.com> to support other boards and timers
+ * Modified  by Mitra Ardron <mitra@mitra.biz> 
+ * Added Sanyo and Mitsubishi controllers
+ * Modified Sony to spot the repeat codes that some Sony's send
+ *
+ * Interrupt code based on NECIRrcv by Joe Knapp
+ * http://www.arduino.cc/cgi-bin/yabb2/YaBB.pl?num=1210243556
+ * Also influenced by http://zovirl.com/2008/11/12/building-a-universal-remote-with-an-arduino/
+ *
+ * JVC and Panasonic protocol added by Kristian Lauszus (Thanks to zenwheel and other people at the original blog post)
+ */
+
+#include "IRremote.h"
+#include "IRremoteInt.h"
+
+// Provides ISR
+#include <avr/interrupt.h>
+
+volatile irparams_t irparams;
+
+// These versions of MATCH, MATCH_MARK, and MATCH_SPACE are only for debugging.
+// To use them, set DEBUG in IRremoteInt.h
+// Normally macros are used for efficiency
+#ifdef DEBUG
+int MATCH(int measured, int desired) {
+  Serial.print("Testing: ");
+  Serial.print(TICKS_LOW(desired), DEC);
+  Serial.print(" <= ");
+  Serial.print(measured, DEC);
+  Serial.print(" <= ");
+  Serial.println(TICKS_HIGH(desired), DEC);
+  return measured >= TICKS_LOW(desired) && measured <= TICKS_HIGH(desired);
+}
+
+int MATCH_MARK(int measured_ticks, int desired_us) {
+  Serial.print("Testing mark ");
+  Serial.print(measured_ticks * USECPERTICK, DEC);
+  Serial.print(" vs ");
+  Serial.print(desired_us, DEC);
+  Serial.print(": ");
+  Serial.print(TICKS_LOW(desired_us + MARK_EXCESS), DEC);
+  Serial.print(" <= ");
+  Serial.print(measured_ticks, DEC);
+  Serial.print(" <= ");
+  Serial.println(TICKS_HIGH(desired_us + MARK_EXCESS), DEC);
+  return measured_ticks >= TICKS_LOW(desired_us + MARK_EXCESS) && measured_ticks <= TICKS_HIGH(desired_us + MARK_EXCESS);
+}
+
+int MATCH_SPACE(int measured_ticks, int desired_us) {
+  Serial.print("Testing space ");
+  Serial.print(measured_ticks * USECPERTICK, DEC);
+  Serial.print(" vs ");
+  Serial.print(desired_us, DEC);
+  Serial.print(": ");
+  Serial.print(TICKS_LOW(desired_us - MARK_EXCESS), DEC);
+  Serial.print(" <= ");
+  Serial.print(measured_ticks, DEC);
+  Serial.print(" <= ");
+  Serial.println(TICKS_HIGH(desired_us - MARK_EXCESS), DEC);
+  return measured_ticks >= TICKS_LOW(desired_us - MARK_EXCESS) && measured_ticks <= TICKS_HIGH(desired_us - MARK_EXCESS);
+}
+#else
+int MATCH(int measured, int desired) {return measured >= TICKS_LOW(desired) && measured <= TICKS_HIGH(desired);}
+int MATCH_MARK(int measured_ticks, int desired_us) {return MATCH(measured_ticks, (desired_us + MARK_EXCESS));}
+int MATCH_SPACE(int measured_ticks, int desired_us) {return MATCH(measured_ticks, (desired_us - MARK_EXCESS));}
+#endif
+
+IRrecv::IRrecv(int recvpin)
+{
+  irparams.recvpin = recvpin;
+  irparams.blinkflag = 0;
+}
+
+// initialization
+void IRrecv::enableIRIn() {
+  cli();
+  // setup pulse clock timer interrupt
+  //Prescale /8 (16M/8 = 0.5 microseconds per tick)
+  // Therefore, the timer interval can range from 0.5 to 128 microseconds
+  // depending on the reset value (255 to 0)
+  TIMER_CONFIG_NORMAL();
+
+  //Timer2 Overflow Interrupt Enable
+  TIMER_ENABLE_INTR;
+
+  TIMER_RESET;
+
+  sei();  // enable interrupts
+
+  // initialize state machine variables
+  irparams.rcvstate = STATE_IDLE;
+  irparams.rawlen = 0;
+
+  // set pin modes
+  pinMode(irparams.recvpin, INPUT);
+}
+
+// enable/disable blinking of pin 13 on IR processing
+void IRrecv::blink13(int blinkflag)
+{
+  irparams.blinkflag = blinkflag;
+  if (blinkflag)
+    pinMode(BLINKLED, OUTPUT);
+}
+
+// TIMER2 interrupt code to collect raw data.
+// Widths of alternating SPACE, MARK are recorded in rawbuf.
+// Recorded in ticks of 50 microseconds.
+// rawlen counts the number of entries recorded so far.
+// First entry is the SPACE between transmissions.
+// As soon as a SPACE gets long, ready is set, state switches to IDLE, timing of SPACE continues.
+// As soon as first MARK arrives, gap width is recorded, ready is cleared, and new logging starts
+ISR(TIMER_INTR_NAME)
+{
+  TIMER_RESET;
+
+  uint8_t irdata = (uint8_t)digitalRead(irparams.recvpin);
+
+  irparams.timer++; // One more 50us tick
+  if (irparams.rawlen >= RAWBUF) {
+    // Buffer overflow
+    irparams.rcvstate = STATE_STOP;
+  }
+  switch(irparams.rcvstate) {
+  case STATE_IDLE: // In the middle of a gap
+    if (irdata == MARK) {
+      if (irparams.timer < GAP_TICKS) {
+        // Not big enough to be a gap.
+        irparams.timer = 0;
+      } 
+      else {
+        // gap just ended, record duration and start recording transmission
+        irparams.rawlen = 0;
+        irparams.rawbuf[irparams.rawlen++] = irparams.timer;
+        irparams.timer = 0;
+        irparams.rcvstate = STATE_MARK;
+      }
+    }
+    break;
+  case STATE_MARK: // timing MARK
+    if (irdata == SPACE) {   // MARK ended, record time
+      irparams.rawbuf[irparams.rawlen++] = irparams.timer;
+      irparams.timer = 0;
+      irparams.rcvstate = STATE_SPACE;
+    }
+    break;
+  case STATE_SPACE: // timing SPACE
+    if (irdata == MARK) { // SPACE just ended, record it
+      irparams.rawbuf[irparams.rawlen++] = irparams.timer;
+      irparams.timer = 0;
+      irparams.rcvstate = STATE_MARK;
+    } 
+    else { // SPACE
+      if (irparams.timer > GAP_TICKS) {
+        // big SPACE, indicates gap between codes
+        // Mark current code as ready for processing
+        // Switch to STOP
+        // Don't reset timer; keep counting space width
+        irparams.rcvstate = STATE_STOP;
+      } 
+    }
+    break;
+  case STATE_STOP: // waiting, measuring gap
+    if (irdata == MARK) { // reset gap timer
+      irparams.timer = 0;
+    }
+    break;
+  }
+
+  if (irparams.blinkflag) {
+    if (irdata == MARK) {
+      BLINKLED_ON();  // turn pin 13 LED on
+    } 
+    else {
+      BLINKLED_OFF();  // turn pin 13 LED off
+    }
+  }
+}
+
+void IRrecv::resume() {
+  irparams.rcvstate = STATE_IDLE;
+  irparams.rawlen = 0;
+}
+
+
+
+// Decodes the received IR message
+// Returns 0 if no data ready, 1 if data ready.
+// Results of decoding are stored in results
+int IRrecv::decode(decode_results *results) {
+  results->rawbuf = irparams.rawbuf;
+  results->rawlen = irparams.rawlen;
+  if (irparams.rcvstate != STATE_STOP) {
+    return ERR;
+  }
+
+#ifdef DEBUG
+  Serial.println("Attempting NEC decode");
+#endif
+  if (decodeNEC(results)) {
+    return DECODED;
+  }
+/*
+#ifdef DEBUG
+  Serial.println("Attempting Sony decode");
+#endif
+  if (decodeSony(results)) {
+    return DECODED;
+  }*/
+/*
+#ifdef DEBUG
+  Serial.println("Attempting Sanyo decode");
+#endif
+  if (decodeSanyo(results)) {
+    return DECODED;
+  }
+  */
+/*
+#ifdef DEBUG
+  Serial.println("Attempting Mitsubishi decode");
+#endif
+  if (decodeMitsubishi(results)) {
+    return DECODED;
+  }*/
+/*
+#ifdef DEBUG
+  Serial.println("Attempting RC5 decode");
+#endif  
+  if (decodeRC5(results)) {
+    return DECODED;
+  }
+  */
+/*
+#ifdef DEBUG
+  Serial.println("Attempting RC6 decode");
+#endif 
+  if (decodeRC6(results)) {
+    return DECODED;
+  }
+  */
+/*
+#ifdef DEBUG
+    Serial.println("Attempting Panasonic decode");
+#endif 
+    if (decodePanasonic(results)) {
+        return DECODED;
+    }
+	*/
+/*
+#ifdef DEBUG
+    Serial.println("Attempting JVC decode");
+#endif 
+    if (decodeJVC(results)) {
+        return DECODED;
+    }*/
+  // decodeHash returns a hash on any input.
+  // Thus, it needs to be last in the list.
+  // If you add any decodes, add them before this.
+  if (decodeHash(results)) {
+    return DECODED;
+  }
+  // Throw away and start over
+  resume();
+  return ERR;
+}
+
+
+// NECs have a repeat only 4 items long
+long IRrecv::decodeNEC(decode_results *results) {
+  long data = 0;
+  int offset = 1; // Skip first space
+  // Initial mark
+  if (!MATCH_MARK(results->rawbuf[offset], NEC_HDR_MARK)) {
+    return ERR;
+  }
+  offset++;
+  // Check for repeat
+  if (irparams.rawlen == 4 &&
+    MATCH_SPACE(results->rawbuf[offset], NEC_RPT_SPACE) &&
+    MATCH_MARK(results->rawbuf[offset+1], NEC_BIT_MARK)) {
+    results->bits = 0;
+    results->value = REPEAT;
+    results->decode_type = NEC;
+    return DECODED;
+  }
+  if (irparams.rawlen < 2 * NEC_BITS + 4) {
+    return ERR;
+  }
+  // Initial space  
+  if (!MATCH_SPACE(results->rawbuf[offset], NEC_HDR_SPACE)) {
+    return ERR;
+  }
+  offset++;
+  for (int i = 0; i < NEC_BITS; i++) {
+    if (!MATCH_MARK(results->rawbuf[offset], NEC_BIT_MARK)) {
+      return ERR;
+    }
+    offset++;
+    if (MATCH_SPACE(results->rawbuf[offset], NEC_ONE_SPACE)) {
+      data = (data << 1) | 1;
+    } 
+    else if (MATCH_SPACE(results->rawbuf[offset], NEC_ZERO_SPACE)) {
+      data <<= 1;
+    } 
+    else {
+      return ERR;
+    }
+    offset++;
+  }
+  // Success
+  results->bits = NEC_BITS;
+  results->value = data;
+  results->decode_type = NEC;
+  return DECODED;
+}
+/*
+long IRrecv::decodeSony(decode_results *results) {
+  long data = 0;
+  if (irparams.rawlen < 2 * SONY_BITS + 2) {
+    return ERR;
+  }
+  int offset = 0; // Dont skip first space, check its size
+
+  // Some Sony's deliver repeats fast after first
+  // unfortunately can't spot difference from of repeat from two fast clicks
+  if (results->rawbuf[offset] < SONY_DOUBLE_SPACE_USECS) {
+    // Serial.print("IR Gap found: ");
+    results->bits = 0;
+    results->value = REPEAT;
+    results->decode_type = SANYO;
+    return DECODED;
+  }
+  offset++;
+
+  // Initial mark
+  if (!MATCH_MARK(results->rawbuf[offset], SONY_HDR_MARK)) {
+    return ERR;
+  }
+  offset++;
+
+  while (offset + 1 < irparams.rawlen) {
+    if (!MATCH_SPACE(results->rawbuf[offset], SONY_HDR_SPACE)) {
+      break;
+    }
+    offset++;
+    if (MATCH_MARK(results->rawbuf[offset], SONY_ONE_MARK)) {
+      data = (data << 1) | 1;
+    } 
+    else if (MATCH_MARK(results->rawbuf[offset], SONY_ZERO_MARK)) {
+      data <<= 1;
+    } 
+    else {
+      return ERR;
+    }
+    offset++;
+  }
+
+  // Success
+  results->bits = (offset - 1) / 2;
+  if (results->bits < 12) {
+    results->bits = 0;
+    return ERR;
+  }
+  results->value = data;
+  results->decode_type = SONY;
+  return DECODED;
+}*/
+
+/*
+// I think this is a Sanyo decoder - serial = SA 8650B
+// Looks like Sony except for timings, 48 chars of data and time/space different
+long IRrecv::decodeSanyo(decode_results *results) {
+  long data = 0;
+  if (irparams.rawlen < 2 * SANYO_BITS + 2) {
+    return ERR;
+  }
+  int offset = 0; // Skip first space
+  // Initial space  
+  // Put this back in for debugging - note can't use #DEBUG as if Debug on we don't see the repeat cos of the delay
+  //Serial.print("IR Gap: ");
+  //Serial.println( results->rawbuf[offset]);
+  //Serial.println( "test against:");
+  //Serial.println(results->rawbuf[offset]);
+  
+  if (results->rawbuf[offset] < SANYO_DOUBLE_SPACE_USECS) {
+    // Serial.print("IR Gap found: ");
+    results->bits = 0;
+    results->value = REPEAT;
+    results->decode_type = SANYO;
+    return DECODED;
+  }
+  offset++;
+
+  // Initial mark
+  if (!MATCH_MARK(results->rawbuf[offset], SANYO_HDR_MARK)) {
+    return ERR;
+  }
+  offset++;
+
+  // Skip Second Mark
+  if (!MATCH_MARK(results->rawbuf[offset], SANYO_HDR_MARK)) {
+    return ERR;
+  }
+  offset++;
+
+  while (offset + 1 < irparams.rawlen) {
+    if (!MATCH_SPACE(results->rawbuf[offset], SANYO_HDR_SPACE)) {
+      break;
+    }
+    offset++;
+    if (MATCH_MARK(results->rawbuf[offset], SANYO_ONE_MARK)) {
+      data = (data << 1) | 1;
+    } 
+    else if (MATCH_MARK(results->rawbuf[offset], SANYO_ZERO_MARK)) {
+      data <<= 1;
+    } 
+    else {
+      return ERR;
+    }
+    offset++;
+  }
+
+  // Success
+  results->bits = (offset - 1) / 2;
+  if (results->bits < 12) {
+    results->bits = 0;
+    return ERR;
+  }
+  results->value = data;
+  results->decode_type = SANYO;
+  return DECODED;
+}
+*/
+/*
+// Looks like Sony except for timings, 48 chars of data and time/space different
+long IRrecv::decodeMitsubishi(decode_results *results) {
+  // Serial.print("?!? decoding Mitsubishi:");Serial.print(irparams.rawlen); Serial.print(" want "); Serial.println( 2 * MITSUBISHI_BITS + 2);
+  long data = 0;
+  if (irparams.rawlen < 2 * MITSUBISHI_BITS + 2) {
+    return ERR;
+  }
+  int offset = 0; // Skip first space
+  // Initial space  
+  // Put this back in for debugging - note can't use #DEBUG as if Debug on we don't see the repeat cos of the delay
+  //Serial.print("IR Gap: ");
+  //Serial.println( results->rawbuf[offset]);
+  //Serial.println( "test against:");
+  //Serial.println(results->rawbuf[offset]);
+  
+  // Not seeing double keys from Mitsubishi
+  //if (results->rawbuf[offset] < MITSUBISHI_DOUBLE_SPACE_USECS) {
+    // Serial.print("IR Gap found: ");
+  //  results->bits = 0;
+  //  results->value = REPEAT;
+  //  results->decode_type = MITSUBISHI;
+  //  return DECODED;
+  //}
+  
+  offset++;
+
+  // Typical
+  // 14200 7 41 7 42 7 42 7 17 7 17 7 18 7 41 7 18 7 17 7 17 7 18 7 41 8 17 7 17 7 18 7 17 7 
+
+  // Initial Space
+  if (!MATCH_MARK(results->rawbuf[offset], MITSUBISHI_HDR_SPACE)) {
+    return ERR;
+  }
+  offset++;
+  while (offset + 1 < irparams.rawlen) {
+    if (MATCH_MARK(results->rawbuf[offset], MITSUBISHI_ONE_MARK)) {
+      data = (data << 1) | 1;
+    } 
+    else if (MATCH_MARK(results->rawbuf[offset], MITSUBISHI_ZERO_MARK)) {
+      data <<= 1;
+    } 
+    else {
+      // Serial.println("A"); Serial.println(offset); Serial.println(results->rawbuf[offset]);
+      return ERR;
+    }
+    offset++;
+    if (!MATCH_SPACE(results->rawbuf[offset], MITSUBISHI_HDR_SPACE)) {
+      // Serial.println("B"); Serial.println(offset); Serial.println(results->rawbuf[offset]);
+      break;
+    }
+    offset++;
+  }
+
+  // Success
+  results->bits = (offset - 1) / 2;
+  if (results->bits < MITSUBISHI_BITS) {
+    results->bits = 0;
+    return ERR;
+  }
+  results->value = data;
+  results->decode_type = MITSUBISHI;
+  return DECODED;
+}*/
+
+
+// Gets one undecoded level at a time from the raw buffer.
+// The RC5/6 decoding is easier if the data is broken into time intervals.
+// E.g. if the buffer has MARK for 2 time intervals and SPACE for 1,
+// successive calls to getRClevel will return MARK, MARK, SPACE.
+// offset and used are updated to keep track of the current position.
+// t1 is the time interval for a single bit in microseconds.
+// Returns -1 for error (measured time interval is not a multiple of t1).
+int IRrecv::getRClevel(decode_results *results, int *offset, int *used, int t1) {
+  if (*offset >= results->rawlen) {
+    // After end of recorded buffer, assume SPACE.
+    return SPACE;
+  }
+  int width = results->rawbuf[*offset];
+  int val = ((*offset) % 2) ? MARK : SPACE;
+  int correction = (val == MARK) ? MARK_EXCESS : - MARK_EXCESS;
+
+  int avail;
+  if (MATCH(width, t1 + correction)) {
+    avail = 1;
+  } 
+  else if (MATCH(width, 2*t1 + correction)) {
+    avail = 2;
+  } 
+  else if (MATCH(width, 3*t1 + correction)) {
+    avail = 3;
+  } 
+  else {
+    return -1;
+  }
+
+  (*used)++;
+  if (*used >= avail) {
+    *used = 0;
+    (*offset)++;
+  }
+#ifdef DEBUG
+  if (val == MARK) {
+    Serial.println("MARK");
+  } 
+  else {
+    Serial.println("SPACE");
+  }
+#endif
+  return val;   
+}
+/*
+long IRrecv::decodeRC5(decode_results *results) {
+  if (irparams.rawlen < MIN_RC5_SAMPLES + 2) {
+    return ERR;
+  }
+  int offset = 1; // Skip gap space
+  long data = 0;
+  int used = 0;
+  // Get start bits
+  if (getRClevel(results, &offset, &used, RC5_T1) != MARK) return ERR;
+  if (getRClevel(results, &offset, &used, RC5_T1) != SPACE) return ERR;
+  if (getRClevel(results, &offset, &used, RC5_T1) != MARK) return ERR;
+  int nbits;
+  for (nbits = 0; offset < irparams.rawlen; nbits++) {
+    int levelA = getRClevel(results, &offset, &used, RC5_T1); 
+    int levelB = getRClevel(results, &offset, &used, RC5_T1);
+    if (levelA == SPACE && levelB == MARK) {
+      // 1 bit
+      data = (data << 1) | 1;
+    } 
+    else if (levelA == MARK && levelB == SPACE) {
+      // zero bit
+      data <<= 1;
+    } 
+    else {
+      return ERR;
+    } 
+  }
+
+  // Success
+  results->bits = nbits;
+  results->value = data;
+  results->decode_type = RC5;
+  return DECODED;
+}*/
+/*
+long IRrecv::decodeRC6(decode_results *results) {
+  if (results->rawlen < MIN_RC6_SAMPLES) {
+    return ERR;
+  }
+  int offset = 1; // Skip first space
+  // Initial mark
+  if (!MATCH_MARK(results->rawbuf[offset], RC6_HDR_MARK)) {
+    return ERR;
+  }
+  offset++;
+  if (!MATCH_SPACE(results->rawbuf[offset], RC6_HDR_SPACE)) {
+    return ERR;
+  }
+  offset++;
+  long data = 0;
+  int used = 0;
+  // Get start bit (1)
+  if (getRClevel(results, &offset, &used, RC6_T1) != MARK) return ERR;
+  if (getRClevel(results, &offset, &used, RC6_T1) != SPACE) return ERR;
+  int nbits;
+  for (nbits = 0; offset < results->rawlen; nbits++) {
+    int levelA, levelB; // Next two levels
+    levelA = getRClevel(results, &offset, &used, RC6_T1); 
+    if (nbits == 3) {
+      // T bit is double wide; make sure second half matches
+      if (levelA != getRClevel(results, &offset, &used, RC6_T1)) return ERR;
+    } 
+    levelB = getRClevel(results, &offset, &used, RC6_T1);
+    if (nbits == 3) {
+      // T bit is double wide; make sure second half matches
+      if (levelB != getRClevel(results, &offset, &used, RC6_T1)) return ERR;
+    } 
+    if (levelA == MARK && levelB == SPACE) { // reversed compared to RC5
+      // 1 bit
+      data = (data << 1) | 1;
+    } 
+    else if (levelA == SPACE && levelB == MARK) {
+      // zero bit
+      data <<= 1;
+    } 
+    else {
+      return ERR; // Error
+    } 
+  }
+  // Success
+  results->bits = nbits;
+  results->value = data;
+  results->decode_type = RC6;
+  return DECODED;
+}*/
+/*
+long IRrecv::decodePanasonic(decode_results *results) {
+    unsigned long long data = 0;
+    int offset = 1;
+    
+    if (!MATCH_MARK(results->rawbuf[offset], PANASONIC_HDR_MARK)) {
+        return ERR;
+    }
+    offset++;
+    if (!MATCH_MARK(results->rawbuf[offset], PANASONIC_HDR_SPACE)) {
+        return ERR;
+    }
+    offset++;
+    
+    // decode address
+    for (int i = 0; i < PANASONIC_BITS; i++) {
+        if (!MATCH_MARK(results->rawbuf[offset++], PANASONIC_BIT_MARK)) {
+            return ERR;
+        }
+        if (MATCH_SPACE(results->rawbuf[offset],PANASONIC_ONE_SPACE)) {
+            data = (data << 1) | 1;
+        } else if (MATCH_SPACE(results->rawbuf[offset],PANASONIC_ZERO_SPACE)) {
+            data <<= 1;
+        } else {
+            return ERR;
+        }
+        offset++;
+    }
+    results->value = (unsigned long)data;
+    results->panasonicAddress = (unsigned int)(data >> 32);
+    results->decode_type = PANASONIC;
+    results->bits = PANASONIC_BITS;
+    return DECODED;
+}*/
+/*
+long IRrecv::decodeJVC(decode_results *results) {
+    long data = 0;
+    int offset = 1; // Skip first space
+    // Check for repeat
+    if (irparams.rawlen - 1 == 33 &&
+        MATCH_MARK(results->rawbuf[offset], JVC_BIT_MARK) &&
+        MATCH_MARK(results->rawbuf[irparams.rawlen-1], JVC_BIT_MARK)) {
+        results->bits = 0;
+        results->value = REPEAT;
+        results->decode_type = JVC;
+        return DECODED;
+    } 
+    // Initial mark
+    if (!MATCH_MARK(results->rawbuf[offset], JVC_HDR_MARK)) {
+        return ERR;
+    }
+    offset++; 
+    if (irparams.rawlen < 2 * JVC_BITS + 1 ) {
+        return ERR;
+    }
+    // Initial space 
+    if (!MATCH_SPACE(results->rawbuf[offset], JVC_HDR_SPACE)) {
+        return ERR;
+    }
+    offset++;
+    for (int i = 0; i < JVC_BITS; i++) {
+        if (!MATCH_MARK(results->rawbuf[offset], JVC_BIT_MARK)) {
+            return ERR;
+        }
+        offset++;
+        if (MATCH_SPACE(results->rawbuf[offset], JVC_ONE_SPACE)) {
+            data = (data << 1) | 1;
+        } 
+        else if (MATCH_SPACE(results->rawbuf[offset], JVC_ZERO_SPACE)) {
+            data <<= 1;
+        } 
+        else {
+            return ERR;
+        }
+        offset++;
+    }
+    //Stop bit
+    if (!MATCH_MARK(results->rawbuf[offset], JVC_BIT_MARK)){
+        return ERR;
+    }
+    // Success
+    results->bits = JVC_BITS;
+    results->value = data;
+    results->decode_type = JVC;
+    return DECODED;
+}*/
+
+/* -----------------------------------------------------------------------
+ * hashdecode - decode an arbitrary IR code.
+ * Instead of decoding using a standard encoding scheme
+ * (e.g. Sony, NEC, RC5), the code is hashed to a 32-bit value.
+ *
+ * The algorithm: look at the sequence of MARK signals, and see if each one
+ * is shorter (0), the same length (1), or longer (2) than the previous.
+ * Do the same with the SPACE signals.  Hszh the resulting sequence of 0's,
+ * 1's, and 2's to a 32-bit value.  This will give a unique value for each
+ * different code (probably), for most code systems.
+ *
+ * http://arcfn.com/2010/01/using-arbitrary-remotes-with-arduino.html
+ */
+
+// Compare two tick values, returning 0 if newval is shorter,
+// 1 if newval is equal, and 2 if newval is longer
+// Use a tolerance of 20%
+int IRrecv::compare(unsigned int oldval, unsigned int newval) {
+  if (newval < oldval * .8) {
+    return 0;
+  } 
+  else if (oldval < newval * .8) {
+    return 2;
+  } 
+  else {
+    return 1;
+  }
+}
+
+// Use FNV hash algorithm: http://isthe.com/chongo/tech/comp/fnv/#FNV-param
+#define FNV_PRIME_32 16777619
+#define FNV_BASIS_32 2166136261
+
+/* Converts the raw code values into a 32-bit hash code.
+ * Hopefully this code is unique for each button.
+ * This isn't a "real" decoding, just an arbitrary value.
+ */
+long IRrecv::decodeHash(decode_results *results) {
+  // Require at least 6 samples to prevent triggering on noise
+  if (results->rawlen < 6) {
+    return ERR;
+  }
+  long hash = FNV_BASIS_32;
+  for (int i = 1; i+2 < results->rawlen; i++) {
+    int value =  compare(results->rawbuf[i], results->rawbuf[i+2]);
+    // Add value into the hash
+    hash = (hash * FNV_PRIME_32) ^ value;
+  }
+  results->value = hash;
+  results->bits = 32;
+  results->decode_type = UNKNOWN;
+  return DECODED;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremote.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremote.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremote.h	(revision 136)
@@ -0,0 +1,94 @@
+/*
+ * IRremote
+ * Version 0.1 July, 2009
+ * Copyright 2009 Ken Shirriff
+ * For details, see http://arcfn.com/2009/08/multi-protocol-infrared-remote-library.htm http://arcfn.com
+ * Edited by Mitra to add new controller SANYO
+ *
+ * Interrupt code based on NECIRrcv by Joe Knapp
+ * http://www.arduino.cc/cgi-bin/yabb2/YaBB.pl?num=1210243556
+ * Also influenced by http://zovirl.com/2008/11/12/building-a-universal-remote-with-an-arduino/
+ *
+ * JVC and Panasonic protocol added by Kristian Lauszus (Thanks to zenwheel and other people at the original blog post)
+ */
+
+#ifndef IRremote_h
+#define IRremote_h
+
+// The following are compile-time library options.
+// If you change them, recompile the library.
+// If DEBUG is defined, a lot of debugging output will be printed during decoding.
+// TEST must be defined for the IRtest unittests to work.  It will make some
+// methods virtual, which will be slightly slower, which is why it is optional.
+// #define DEBUG
+// #define TEST
+
+// Results returned from the decoder
+class decode_results {
+public:
+  int decode_type; // NEC, SONY, RC5, UNKNOWN
+  unsigned int panasonicAddress; // This is only used for decoding Panasonic data
+  unsigned long value; // Decoded value
+  int bits; // Number of bits in decoded value
+  volatile unsigned int *rawbuf; // Raw intervals in .5 us ticks
+  int rawlen; // Number of records in rawbuf.
+};
+
+// Values for decode_type
+#define NEC 1
+#define SONY 2
+#define RC5 3
+#define RC6 4
+#define DISH 5
+#define SHARP 6
+#define PANASONIC 7
+#define JVC 8
+#define SANYO 9
+#define MITSUBISHI 10
+#define UNKNOWN -1
+
+// Decoded value for NEC when a repeat code is received
+#define REPEAT 0xffffffff
+
+// main class for receiving IR
+class IRrecv
+{
+public:
+  IRrecv(int recvpin);
+  void blink13(int blinkflag);
+  int decode(decode_results *results);
+  void enableIRIn();
+  void resume();
+private:
+  // These are called by decode
+  int getRClevel(decode_results *results, int *offset, int *used, int t1);
+  long decodeNEC(decode_results *results);
+  //long decodeSony(decode_results *results);
+  //long decodeSanyo(decode_results *results);
+  //long decodeMitsubishi(decode_results *results);
+  //long decodeRC5(decode_results *results);
+  //long decodeRC6(decode_results *results);
+  //long decodePanasonic(decode_results *results);
+  //long decodeJVC(decode_results *results);
+  long decodeHash(decode_results *results);
+  int compare(unsigned int oldval, unsigned int newval);
+
+} 
+;
+
+// Only used for testing; can remove virtual for shorter code
+#ifdef TEST
+#define VIRTUAL virtual
+#else
+#define VIRTUAL
+#endif
+// Some useful constants
+
+#define USECPERTICK 50  // microseconds per clock interrupt tick
+#define RAWBUF 100 // Length of raw duration buffer
+
+// Marks tend to be 100us too long, and spaces 100us too short
+// when received due to sensor lag.
+#define MARK_EXCESS 100
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremoteInt.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremoteInt.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremoteInt.h	(revision 136)
@@ -0,0 +1,446 @@
+/*
+ * IRremote
+ * Version 0.1 July, 2009
+ * Copyright 2009 Ken Shirriff
+ * For details, see http://arcfn.com/2009/08/multi-protocol-infrared-remote-library.html
+ *
+ * Modified by Paul Stoffregen <paul@pjrc.com> to support other boards and timers
+ *
+ * Interrupt code based on NECIRrcv by Joe Knapp
+ * http://www.arduino.cc/cgi-bin/yabb2/YaBB.pl?num=1210243556
+ * Also influenced by http://zovirl.com/2008/11/12/building-a-universal-remote-with-an-arduino/
+ *
+ * JVC and Panasonic protocol added by Kristian Lauszus (Thanks to zenwheel and other people at the original blog post)
+ */
+
+#ifndef IRremoteint_h
+#define IRremoteint_h
+
+#if defined(ARDUINO) && ARDUINO >= 100
+#include <Arduino.h>
+#else
+#include <WProgram.h>
+#endif
+
+// define which timer to use
+//
+// Uncomment the timer you wish to use on your board.  If you
+// are using another library which uses timer2, you have options
+// to switch IRremote to use a different timer.
+
+// Arduino Mega
+#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+  //#define IR_USE_TIMER1   // tx = pin 11
+  #define IR_USE_TIMER2     // tx = pin 9
+  //#define IR_USE_TIMER3   // tx = pin 5
+  //#define IR_USE_TIMER4   // tx = pin 6
+  //#define IR_USE_TIMER5   // tx = pin 46
+
+// Teensy 1.0
+#elif defined(__AVR_AT90USB162__)
+  #define IR_USE_TIMER1     // tx = pin 17
+
+// Teensy 2.0
+#elif defined(__AVR_ATmega32U4__)
+  //#define IR_USE_TIMER1   // tx = pin 14
+  //#define IR_USE_TIMER3   // tx = pin 9
+  #define IR_USE_TIMER4_HS  // tx = pin 10
+
+// Teensy++ 1.0 & 2.0
+#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
+  //#define IR_USE_TIMER1   // tx = pin 25
+  #define IR_USE_TIMER2     // tx = pin 1
+  //#define IR_USE_TIMER3   // tx = pin 16
+
+// Sanguino
+#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
+  //#define IR_USE_TIMER1   // tx = pin 13
+  #define IR_USE_TIMER2     // tx = pin 14
+
+// Atmega8
+#elif defined(__AVR_ATmega8P__) || defined(__AVR_ATmega8__)
+  #define IR_USE_TIMER1   // tx = pin 9
+
+// Arduino Duemilanove, Diecimila, LilyPad, Mini, Fio, etc
+#else
+  //#define IR_USE_TIMER1   // tx = pin 9
+  #define IR_USE_TIMER2     // tx = pin 3
+#endif
+
+
+
+#ifdef F_CPU
+#define SYSCLOCK F_CPU     // main Arduino clock
+#else
+#define SYSCLOCK 16000000  // main Arduino clock
+#endif
+
+#define ERR 0
+#define DECODED 1
+
+
+// defines for setting and clearing register bits
+#ifndef cbi
+#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit))
+#endif
+#ifndef sbi
+#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))
+#endif
+
+// Pulse parms are *50-100 for the Mark and *50+100 for the space
+// First MARK is the one after the long gap
+// pulse parameters in usec
+#define NEC_HDR_MARK	9000
+#define NEC_HDR_SPACE	4500
+#define NEC_BIT_MARK	560
+#define NEC_ONE_SPACE	1600
+#define NEC_ZERO_SPACE	560
+#define NEC_RPT_SPACE	2250
+
+#define SONY_HDR_MARK	2400
+#define SONY_HDR_SPACE	600
+#define SONY_ONE_MARK	1200
+#define SONY_ZERO_MARK	600
+#define SONY_RPT_LENGTH 45000
+#define SONY_DOUBLE_SPACE_USECS  500  // usually ssee 713 - not using ticks as get number wrapround
+
+// SA 8650B
+#define SANYO_HDR_MARK	3500  // seen range 3500
+#define SANYO_HDR_SPACE	950 //  seen 950
+#define SANYO_ONE_MARK	2400 // seen 2400  
+#define SANYO_ZERO_MARK 700 //  seen 700
+#define SANYO_DOUBLE_SPACE_USECS  800  // usually ssee 713 - not using ticks as get number wrapround
+#define SANYO_RPT_LENGTH 45000
+
+// Mitsubishi RM 75501
+// 14200 7 41 7 42 7 42 7 17 7 17 7 18 7 41 7 18 7 17 7 17 7 18 7 41 8 17 7 17 7 18 7 17 7 
+
+// #define MITSUBISHI_HDR_MARK	250  // seen range 3500
+#define MITSUBISHI_HDR_SPACE	350 //  7*50+100
+#define MITSUBISHI_ONE_MARK	1950 // 41*50-100
+#define MITSUBISHI_ZERO_MARK  750 // 17*50-100
+// #define MITSUBISHI_DOUBLE_SPACE_USECS  800  // usually ssee 713 - not using ticks as get number wrapround
+// #define MITSUBISHI_RPT_LENGTH 45000
+
+
+#define RC5_T1		889
+#define RC5_RPT_LENGTH	46000
+
+#define RC6_HDR_MARK	2666
+#define RC6_HDR_SPACE	889
+#define RC6_T1		444
+#define RC6_RPT_LENGTH	46000
+
+#define SHARP_BIT_MARK 245
+#define SHARP_ONE_SPACE 1805
+#define SHARP_ZERO_SPACE 795
+#define SHARP_GAP 600000
+#define SHARP_TOGGLE_MASK 0x3FF
+#define SHARP_RPT_SPACE 3000
+
+#define DISH_HDR_MARK 400
+#define DISH_HDR_SPACE 6100
+#define DISH_BIT_MARK 400
+#define DISH_ONE_SPACE 1700
+#define DISH_ZERO_SPACE 2800
+#define DISH_RPT_SPACE 6200
+#define DISH_TOP_BIT 0x8000
+
+#define PANASONIC_HDR_MARK 3502
+#define PANASONIC_HDR_SPACE 1750
+#define PANASONIC_BIT_MARK 502
+#define PANASONIC_ONE_SPACE 1244
+#define PANASONIC_ZERO_SPACE 400
+
+#define JVC_HDR_MARK 8000
+#define JVC_HDR_SPACE 4000
+#define JVC_BIT_MARK 600
+#define JVC_ONE_SPACE 1600
+#define JVC_ZERO_SPACE 550
+#define JVC_RPT_LENGTH 60000
+
+#define SHARP_BITS 15
+#define DISH_BITS 16
+
+#define TOLERANCE 25  // percent tolerance in measurements
+#define LTOL (1.0 - TOLERANCE/100.) 
+#define UTOL (1.0 + TOLERANCE/100.) 
+
+#define _GAP 5000 // Minimum map between transmissions
+#define GAP_TICKS (_GAP/USECPERTICK)
+
+#define TICKS_LOW(us) (int) (((us)*LTOL/USECPERTICK))
+#define TICKS_HIGH(us) (int) (((us)*UTOL/USECPERTICK + 1))
+
+// receiver states
+#define STATE_IDLE     2
+#define STATE_MARK     3
+#define STATE_SPACE    4
+#define STATE_STOP     5
+
+// information for the interrupt handler
+typedef struct {
+  uint8_t recvpin;           // pin for IR data from detector
+  uint8_t rcvstate;          // state machine
+  uint8_t blinkflag;         // TRUE to enable blinking of pin 13 on IR processing
+  unsigned int timer;     // state timer, counts 50uS ticks.
+  unsigned int rawbuf[RAWBUF]; // raw data
+  uint8_t rawlen;         // counter of entries in rawbuf
+} 
+irparams_t;
+
+// Defined in IRremote.cpp
+extern volatile irparams_t irparams;
+
+// IR detector output is active low
+#define MARK  0
+#define SPACE 1
+
+#define TOPBIT 0x80000000
+
+#define NEC_BITS 32
+#define SONY_BITS 12
+#define SANYO_BITS 12
+#define MITSUBISHI_BITS 16
+#define MIN_RC5_SAMPLES 11
+#define MIN_RC6_SAMPLES 1
+#define PANASONIC_BITS 48
+#define JVC_BITS 16
+
+
+
+
+// defines for timer2 (8 bits)
+#if defined(IR_USE_TIMER2)
+#define TIMER_RESET
+#define TIMER_ENABLE_PWM     (TCCR2A |= _BV(COM2B1))
+#define TIMER_DISABLE_PWM    (TCCR2A &= ~(_BV(COM2B1)))
+#define TIMER_ENABLE_INTR    (TIMSK2 = _BV(OCIE2A))
+#define TIMER_DISABLE_INTR   (TIMSK2 = 0)
+#define TIMER_INTR_NAME      TIMER2_COMPA_vect
+#define TIMER_CONFIG_KHZ(val) ({ \
+  const uint8_t pwmval = SYSCLOCK / 2000 / (val); \
+  TCCR2A = _BV(WGM20); \
+  TCCR2B = _BV(WGM22) | _BV(CS20); \
+  OCR2A = pwmval; \
+  OCR2B = pwmval / 3; \
+})
+#define TIMER_COUNT_TOP      (SYSCLOCK * USECPERTICK / 1000000)
+#if (TIMER_COUNT_TOP < 256)
+#define TIMER_CONFIG_NORMAL() ({ \
+  TCCR2A = _BV(WGM21); \
+  TCCR2B = _BV(CS20); \
+  OCR2A = TIMER_COUNT_TOP; \
+  TCNT2 = 0; \
+})
+#else
+#define TIMER_CONFIG_NORMAL() ({ \
+  TCCR2A = _BV(WGM21); \
+  TCCR2B = _BV(CS21); \
+  OCR2A = TIMER_COUNT_TOP / 8; \
+  TCNT2 = 0; \
+})
+#endif
+#if defined(CORE_OC2B_PIN)
+#define TIMER_PWM_PIN        CORE_OC2B_PIN  /* Teensy */
+#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+#define TIMER_PWM_PIN        9  /* Arduino Mega */
+#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
+#define TIMER_PWM_PIN        14 /* Sanguino */
+#else
+#define TIMER_PWM_PIN        3  /* Arduino Duemilanove, Diecimila, LilyPad, etc */
+#endif
+
+
+// defines for timer1 (16 bits)
+#elif defined(IR_USE_TIMER1)
+#define TIMER_RESET
+#define TIMER_ENABLE_PWM     (TCCR1A |= _BV(COM1A1))
+#define TIMER_DISABLE_PWM    (TCCR1A &= ~(_BV(COM1A1)))
+#if defined(__AVR_ATmega8P__) || defined(__AVR_ATmega8__)
+  #define TIMER_ENABLE_INTR    (TIMSK = _BV(OCIE1A))
+  #define TIMER_DISABLE_INTR   (TIMSK = 0)
+#else
+  #define TIMER_ENABLE_INTR    (TIMSK1 = _BV(OCIE1A))
+  #define TIMER_DISABLE_INTR   (TIMSK1 = 0)
+#endif
+#define TIMER_INTR_NAME      TIMER1_COMPA_vect
+#define TIMER_CONFIG_KHZ(val) ({ \
+  const uint16_t pwmval = SYSCLOCK / 2000 / (val); \
+  TCCR1A = _BV(WGM11); \
+  TCCR1B = _BV(WGM13) | _BV(CS10); \
+  ICR1 = pwmval; \
+  OCR1A = pwmval / 3; \
+})
+#define TIMER_CONFIG_NORMAL() ({ \
+  TCCR1A = 0; \
+  TCCR1B = _BV(WGM12) | _BV(CS10); \
+  OCR1A = SYSCLOCK * USECPERTICK / 1000000; \
+  TCNT1 = 0; \
+})
+#if defined(CORE_OC1A_PIN)
+#define TIMER_PWM_PIN        CORE_OC1A_PIN  /* Teensy */
+#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+#define TIMER_PWM_PIN        11  /* Arduino Mega */
+#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
+#define TIMER_PWM_PIN        13 /* Sanguino */
+#else
+#define TIMER_PWM_PIN        9  /* Arduino Duemilanove, Diecimila, LilyPad, etc */
+#endif
+
+
+// defines for timer3 (16 bits)
+#elif defined(IR_USE_TIMER3)
+#define TIMER_RESET
+#define TIMER_ENABLE_PWM     (TCCR3A |= _BV(COM3A1))
+#define TIMER_DISABLE_PWM    (TCCR3A &= ~(_BV(COM3A1)))
+#define TIMER_ENABLE_INTR    (TIMSK3 = _BV(OCIE3A))
+#define TIMER_DISABLE_INTR   (TIMSK3 = 0)
+#define TIMER_INTR_NAME      TIMER3_COMPA_vect
+#define TIMER_CONFIG_KHZ(val) ({ \
+  const uint16_t pwmval = SYSCLOCK / 2000 / (val); \
+  TCCR3A = _BV(WGM31); \
+  TCCR3B = _BV(WGM33) | _BV(CS30); \
+  ICR3 = pwmval; \
+  OCR3A = pwmval / 3; \
+})
+#define TIMER_CONFIG_NORMAL() ({ \
+  TCCR3A = 0; \
+  TCCR3B = _BV(WGM32) | _BV(CS30); \
+  OCR3A = SYSCLOCK * USECPERTICK / 1000000; \
+  TCNT3 = 0; \
+})
+#if defined(CORE_OC3A_PIN)
+#define TIMER_PWM_PIN        CORE_OC3A_PIN  /* Teensy */
+#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+#define TIMER_PWM_PIN        5  /* Arduino Mega */
+#else
+#error "Please add OC3A pin number here\n"
+#endif
+
+
+// defines for timer4 (10 bits, high speed option)
+#elif defined(IR_USE_TIMER4_HS)
+#define TIMER_RESET
+#define TIMER_ENABLE_PWM     (TCCR4A |= _BV(COM4A1))
+#define TIMER_DISABLE_PWM    (TCCR4A &= ~(_BV(COM4A1)))
+#define TIMER_ENABLE_INTR    (TIMSK4 = _BV(TOIE4))
+#define TIMER_DISABLE_INTR   (TIMSK4 = 0)
+#define TIMER_INTR_NAME      TIMER4_OVF_vect
+#define TIMER_CONFIG_KHZ(val) ({ \
+  const uint16_t pwmval = SYSCLOCK / 2000 / (val); \
+  TCCR4A = (1<<PWM4A); \
+  TCCR4B = _BV(CS40); \
+  TCCR4C = 0; \
+  TCCR4D = (1<<WGM40); \
+  TCCR4E = 0; \
+  TC4H = pwmval >> 8; \
+  OCR4C = pwmval; \
+  TC4H = (pwmval / 3) >> 8; \
+  OCR4A = (pwmval / 3) & 255; \
+})
+#define TIMER_CONFIG_NORMAL() ({ \
+  TCCR4A = 0; \
+  TCCR4B = _BV(CS40); \
+  TCCR4C = 0; \
+  TCCR4D = 0; \
+  TCCR4E = 0; \
+  TC4H = (SYSCLOCK * USECPERTICK / 1000000) >> 8; \
+  OCR4C = (SYSCLOCK * USECPERTICK / 1000000) & 255; \
+  TC4H = 0; \
+  TCNT4 = 0; \
+})
+#if defined(CORE_OC4A_PIN)
+#define TIMER_PWM_PIN        CORE_OC4A_PIN  /* Teensy */
+#elif defined(__AVR_ATmega32U4__)
+#define TIMER_PWM_PIN        13  /* Leonardo */
+#else
+#error "Please add OC4A pin number here\n"
+#endif
+
+
+// defines for timer4 (16 bits)
+#elif defined(IR_USE_TIMER4)
+#define TIMER_RESET
+#define TIMER_ENABLE_PWM     (TCCR4A |= _BV(COM4A1))
+#define TIMER_DISABLE_PWM    (TCCR4A &= ~(_BV(COM4A1)))
+#define TIMER_ENABLE_INTR    (TIMSK4 = _BV(OCIE4A))
+#define TIMER_DISABLE_INTR   (TIMSK4 = 0)
+#define TIMER_INTR_NAME      TIMER4_COMPA_vect
+#define TIMER_CONFIG_KHZ(val) ({ \
+  const uint16_t pwmval = SYSCLOCK / 2000 / (val); \
+  TCCR4A = _BV(WGM41); \
+  TCCR4B = _BV(WGM43) | _BV(CS40); \
+  ICR4 = pwmval; \
+  OCR4A = pwmval / 3; \
+})
+#define TIMER_CONFIG_NORMAL() ({ \
+  TCCR4A = 0; \
+  TCCR4B = _BV(WGM42) | _BV(CS40); \
+  OCR4A = SYSCLOCK * USECPERTICK / 1000000; \
+  TCNT4 = 0; \
+})
+#if defined(CORE_OC4A_PIN)
+#define TIMER_PWM_PIN        CORE_OC4A_PIN
+#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+#define TIMER_PWM_PIN        6  /* Arduino Mega */
+#else
+#error "Please add OC4A pin number here\n"
+#endif
+
+
+// defines for timer5 (16 bits)
+#elif defined(IR_USE_TIMER5)
+#define TIMER_RESET
+#define TIMER_ENABLE_PWM     (TCCR5A |= _BV(COM5A1))
+#define TIMER_DISABLE_PWM    (TCCR5A &= ~(_BV(COM5A1)))
+#define TIMER_ENABLE_INTR    (TIMSK5 = _BV(OCIE5A))
+#define TIMER_DISABLE_INTR   (TIMSK5 = 0)
+#define TIMER_INTR_NAME      TIMER5_COMPA_vect
+#define TIMER_CONFIG_KHZ(val) ({ \
+  const uint16_t pwmval = SYSCLOCK / 2000 / (val); \
+  TCCR5A = _BV(WGM51); \
+  TCCR5B = _BV(WGM53) | _BV(CS50); \
+  ICR5 = pwmval; \
+  OCR5A = pwmval / 3; \
+})
+#define TIMER_CONFIG_NORMAL() ({ \
+  TCCR5A = 0; \
+  TCCR5B = _BV(WGM52) | _BV(CS50); \
+  OCR5A = SYSCLOCK * USECPERTICK / 1000000; \
+  TCNT5 = 0; \
+})
+#if defined(CORE_OC5A_PIN)
+#define TIMER_PWM_PIN        CORE_OC5A_PIN
+#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+#define TIMER_PWM_PIN        46  /* Arduino Mega */
+#else
+#error "Please add OC5A pin number here\n"
+#endif
+
+
+#else // unknown timer
+#error "Internal code configuration error, no known IR_USE_TIMER# defined\n"
+#endif
+
+
+// defines for blinking the LED
+#if defined(CORE_LED0_PIN)
+#define BLINKLED       CORE_LED0_PIN
+#define BLINKLED_ON()  (digitalWrite(CORE_LED0_PIN, HIGH))
+#define BLINKLED_OFF() (digitalWrite(CORE_LED0_PIN, LOW))
+#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+#define BLINKLED       13
+#define BLINKLED_ON()  (PORTB |= B10000000)
+#define BLINKLED_OFF() (PORTB &= B01111111)
+#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
+#define BLINKLED       0
+#define BLINKLED_ON()  (PORTD |= B00000001)
+#define BLINKLED_OFF() (PORTD &= B11111110)
+#else
+#define BLINKLED       13
+#define BLINKLED_ON()  (PORTB |= B00100000)
+#define BLINKLED_OFF() (PORTB &= B11011111)
+#endif
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremoteTools.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremoteTools.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremoteTools.cpp	(revision 136)
@@ -0,0 +1,23 @@
+#include "IRremote.h"
+#include "IRremoteTools.h"
+#include <Arduino.h>
+
+int RECV_PIN = TKD2; // the pin the IR receiver is connected to
+IRrecv irrecv(RECV_PIN); // an instance of the IR receiver object
+decode_results results; // container for received IR codes
+
+void beginIRremote(){
+	irrecv.enableIRIn(); // Start the receiver
+}
+
+bool IRrecived(){
+	return irrecv.decode(&results);
+}
+
+void resumeIRremote(){
+    irrecv.resume(); // resume receiver
+}
+
+unsigned long getIRresult(){
+	return results.value;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremoteTools.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremoteTools.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/RobotIRremote/src/IRremoteTools.h	(revision 136)
@@ -0,0 +1,12 @@
+#ifndef IRREMOTETOOLS_H
+#define IRREMOTETOOLS_H
+
+extern void beginIRremote();
+
+extern bool IRrecived();
+
+extern void resumeIRremote();
+
+extern unsigned long getIRresult();
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Robot Control Library for Arduino =
+
+The Robot has a number of built in sensors and actuators. The library is designed to easily access the robot's functionality.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/RobotLibrary
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R01_Logo/R01_Logo.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R01_Logo/R01_Logo.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R01_Logo/R01_Logo.ino	(revision 136)
@@ -0,0 +1,136 @@
+/* Robot Logo
+
+ This sketch demonstrates basic movement of the Robot.
+ When the sketch starts, press the on-board buttons to tell
+ the robot how to move. Pressing the middle button will
+ save the pattern, and the robot will follow accordingly.
+ You can record up to 20 commands. The robot will move for
+ one second per command.
+
+ This example uses images on an SD card. It looks for
+ files named "lg0.bmp" and "lg1.bmp" and draws them on the
+ screen.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h> // include the robot library
+#include <Wire.h>
+#include <SPI.h>
+
+int commands[20];  //  array for storing commands
+
+void setup() {
+  // initialize the Robot, SD card, and display
+  Robot.begin();
+  Robot.beginTFT();
+  Robot.beginSD();
+
+  // draw "lg0.bmp" and "lg1.bmp" on the screen
+  Robot.displayLogos();
+}
+
+void loop() {
+
+  Robot.drawBMP("intro.bmp", 0, 0);  //display background image
+
+  iniCommands(); // remove commands from the array
+  addCommands(); // add commands to the array
+
+  delay(1000); // wait for a second
+
+  executeCommands(); // follow orders
+
+  Robot.stroke(0, 0, 0);
+  Robot.text("Done!", 5, 103); // write some text to the display
+  delay(1500); // wait for a moment
+}
+
+// empty the commands array
+void iniCommands() {
+  for (int i = 0; i < 20; i++)
+    commands[i] = -1;
+}
+
+// add commands to the array
+void addCommands() {
+  Robot.stroke(0, 0, 0);
+  // display text on the screen
+  Robot.text("1. Press buttons to\n add commands.\n\n 2. Middle to finish.", 5, 5);
+
+  // read the buttons' state
+  for (int i = 0; i < 20;) { //max 20 commands
+    int key = Robot.keyboardRead();
+    if (key == BUTTON_MIDDLE) { //finish input
+      break;
+    } else if (key == BUTTON_NONE) { //if no button is pressed
+      continue;
+    }
+    commands[i] = key; // save the button to the array
+    PrintCommandI(i, 46); // print the command on the screen
+    delay(100);
+    i++;
+  }
+}
+
+// run through the array and move the robot
+void executeCommands() {
+  // print status to the screen
+  Robot.text("Excuting...", 5, 70);
+
+  // read through the array and move accordingly
+  for (int i = 0; i < 20; i++) {
+    switch (commands[i]) {
+      case BUTTON_LEFT:
+        Robot.turn(-90);
+        break;
+      case BUTTON_RIGHT:
+        Robot.turn(90);
+        break;
+      case BUTTON_UP:
+        Robot.motorsWrite(255, 255);
+        break;
+      case BUTTON_DOWN:
+        Robot.motorsWrite(-255, -255);
+        break;
+      case BUTTON_NONE:
+        return;
+    }
+    // print the current command to the screen
+    Robot.stroke(255, 0, 0);
+    PrintCommandI(i, 86);
+    delay(1000);
+
+    // stop moving for a second
+    Robot.motorsStop();
+    delay(1000);
+  }
+}
+
+// convert the button press to a single character
+char keyToChar(int key) {
+  switch (key) {
+    case BUTTON_LEFT:
+      return '<';
+    case BUTTON_RIGHT:
+      return '>';
+    case BUTTON_UP:
+      return '^';
+    case BUTTON_DOWN:
+      return 'v';
+  }
+}
+
+// display a command
+void PrintCommandI(int i, int originY) {
+  Robot.text(keyToChar(commands[i]), i % 14 * 8 + 5, i / 14 * 10 + originY);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R02_Line_Follow/R02_Line_Follow.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R02_Line_Follow/R02_Line_Follow.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R02_Line_Follow/R02_Line_Follow.ino	(revision 136)
@@ -0,0 +1,76 @@
+/* Robot Line Follow
+
+ This sketch demonstrates the line following capabilities
+ of the Arduino Robot. On the floor, place some black
+ electrical tape along the path you wish the robot to follow.
+ To indicate a stopping point, place another piece of tape
+ perpendicular to the path.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h> // include the robot library
+#include <Wire.h>
+#include <SPI.h>
+
+long timerOrigin; // used for counting elapsed time
+
+void setup() {
+  // initialize the Robot, SD card, display, and speaker
+  Robot.begin();
+  Robot.beginTFT();
+  Robot.beginSD();
+  Robot.beginSpeaker();
+
+  // show the logots on the TFT screen
+  Robot.displayLogos();
+
+  Robot.drawBMP("lf.bmp", 0, 0); // display background image
+
+  Robot.playFile("chase.sqm");  // play a song from the SD card
+
+  // add the instructions
+  Robot.text("Line Following\n\n place the robot on\n the track and \n see it run", 5, 5);
+  Robot.text("Press the middle\n button to start...", 5, 61);
+  Robot.waitContinue();
+
+  // These are some general values that work for line following
+  // uncomment one or the other to see the different behaviors of the robot
+  //Robot.lineFollowConfig(14, 9, 50, 10);
+  Robot.lineFollowConfig(11, 7, 60, 5);
+
+
+  //set the motor board into line-follow mode
+  Robot.setMode(MODE_LINE_FOLLOW);
+
+  // start
+  Robot.fill(255, 255, 255);
+  Robot.stroke(255, 255, 255);
+  Robot.rect(0, 0, 128, 80); // erase the previous text
+  Robot.stroke(0, 0, 0);
+  Robot.text("Start", 5, 5);
+
+  Robot.stroke(0, 0, 0); // choose color for the text
+  Robot.text("Time passed:", 5, 21); // write some text to the screen
+
+  timerOrigin = millis(); // keep track of the elapsed time
+
+  while (!Robot.isActionDone()) { //wait for the finish signal
+    Robot.debugPrint(millis() - timerOrigin, 5, 29); // show how much time has passed
+  }
+
+  Robot.stroke(0, 0, 0);
+  Robot.text("Done!", 5, 45);
+}
+void loop() {
+  //nothing here, the program only runs once. Reset the robot
+  //to do it again!
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R03_Disco_Bot/R03_Disco_Bot.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R03_Disco_Bot/R03_Disco_Bot.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R03_Disco_Bot/R03_Disco_Bot.ino	(revision 136)
@@ -0,0 +1,181 @@
+/* Disco Bot
+
+ This sketch shows you how to use the melody playing
+ feature of the robot, with some really cool 8-bit music.
+ Music will play when the robot is turned on, and it
+ will show you some dance moves.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h> // include the robot library
+#include <Wire.h>
+#include <SPI.h>
+
+/* Dancing steps:
+  S: stop
+  L: turn left
+  R: turn right
+  F: go forward
+  B: go backwards
+
+  The number after each command determines how long
+  each step lasts. Each number is 1/2 second long.
+
+  The "\0" indicates end of string
+*/
+char danceScript[] = "S4L1R1S2F1B1S1\0";
+
+int currentScript = 0; // what step are we at
+
+int currentSong = 0; // keep track of the current song
+static const int SONGS_COUNT = 3; // number of songs
+
+// an array to hold the songs
+char musics[][11] = {
+  "melody.sqm",
+  "menu.sqm",
+  "chase.sqm",
+};
+
+// variables for non-blocking delay
+long waitFrom;
+long waitTime = 0;
+
+void setup() {
+  // initialize the Robot, SD card, display, and speaker
+  Robot.begin();
+  Robot.beginSpeaker();
+  Robot.beginSD();
+  Robot.beginTFT();
+
+  // draw "lg0.bmp" and "lg1.bmp" on the screen
+  Robot.displayLogos();
+
+  // Print instructions to the screen
+  Robot.text("1. Use left and\n right key to switch\n song", 5, 5);
+  Robot.text("2. Put robot on the\n ground to dance", 5, 33);
+
+  // wait for a few soconds
+  delay(3000);
+
+  setInterface(); // display the current song
+  play(0);  //play the first song in the array
+
+  resetWait();  //Initialize non-blocking delay
+}
+
+void loop() {
+  // read the butttons on the robot
+  int key = Robot.keyboardRead();
+
+  // Right/left buttons play next/previous song
+  switch (key) {
+    case BUTTON_UP:
+    case BUTTON_LEFT:
+      play(-1);  //play previous song
+      break;
+    case BUTTON_DOWN:
+    case BUTTON_RIGHT:
+      play(1);  //play next song
+      break;
+  }
+
+  // dance!
+  runScript();
+}
+
+// Dancing function
+void runScript() {
+  if (!waiting()) { // if the previous instructions have finished
+    // get the next 2 commands (direction and duration)
+    parseCommand(danceScript[currentScript], danceScript[currentScript + 1]);
+    currentScript += 2;
+    if (danceScript[currentScript] == '\0') // at the end of the array
+      currentScript = 0; // start again at the beginning
+  }
+}
+
+// instead of delay, use this timer
+boolean waiting() {
+  if (millis() - waitFrom >= waitTime)
+    return false;
+  else
+    return true;
+}
+
+// how long to wait
+void wait(long t) {
+  resetWait();
+  waitTime = t;
+}
+
+// reset the timer
+void resetWait() {
+  waitFrom = millis();
+}
+
+// read the direction and dirstion of the steps
+void parseCommand(char dir, char duration) {
+  //convert the scripts to action
+  switch (dir) {
+    case 'L':
+      Robot.motorsWrite(-255, 255);
+      break;
+    case 'R':
+      Robot.motorsWrite(255, -255);
+      break;
+    case 'F':
+      Robot.motorsWrite(255, 255);
+      break;
+    case 'B':
+      Robot.motorsWrite(-255, -255);
+      break;
+    case 'S':
+      Robot.motorsStop();
+      break;
+  }
+  //You can change "500" to change the pace of dancing
+  wait(500 * (duration - '0'));
+}
+
+// display the song
+void setInterface() {
+  Robot.clearScreen();
+  Robot.stroke(0, 0, 0);
+  Robot.text(musics[0], 0, 0);
+}
+
+// display the next song
+void select(int seq, boolean onOff) {
+  if (onOff) { //select
+    Robot.stroke(0, 0, 0);
+    Robot.text(musics[seq], 0, 0);
+  } else { //deselect
+    Robot.stroke(255, 255, 255);
+    Robot.text(musics[seq], 0, 0);
+  }
+}
+
+// play the slected song
+void play(int seq) {
+  select(currentSong, false);
+  if (currentSong <= 0 && seq == -1) { //previous of 1st song?
+    currentSong = SONGS_COUNT - 1; //go to last song
+  } else if (currentSong >= SONGS_COUNT - 1 && seq == 1) { //next of last?
+    currentSong = 0;  //go to 1st song
+  } else {
+    currentSong += seq;  //next song
+  }
+  Robot.stopPlayFile();
+  Robot.playFile(musics[currentSong]);
+  select(currentSong, true);  //display the current song
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R04_Compass/R04_Compass.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R04_Compass/R04_Compass.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R04_Compass/R04_Compass.ino	(revision 136)
@@ -0,0 +1,72 @@
+/* Robot Compass
+
+ The robot has an on-board compass module, with
+ which it can tell the direction the robot is
+ facing. This sketch will make sure the robot
+ goes towards a certain direction.
+
+ Beware, magnets will interfere with the compass
+ readings.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+// include the robot library
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+int speedLeft;
+int speedRight;
+int compassValue;
+int direc = 180;  //Direction the robot is heading
+
+void setup() {
+  // initialize the modules
+  Robot.begin();
+  Robot.beginTFT();
+  Robot.beginSD();
+  Robot.displayLogos();
+}
+
+void loop() {
+  // read the compass orientation
+  compassValue = Robot.compassRead();
+
+  // how many degrees are we off
+  int diff = compassValue - direc;
+
+  // modify degress
+  if (diff > 180)
+    diff = -360 + diff;
+  else if (diff < -180)
+    diff = 360 + diff;
+
+  // Make the robot turn to its proper orientation
+  diff = map(diff, -180, 180, -255, 255);
+
+  if (diff > 0) {
+    // keep the right wheel spinning,
+    // change the speed of the left wheel
+    speedLeft = 255 - diff;
+    speedRight = 255;
+  } else {
+    // keep the right left spinning,
+    // change the speed of the left wheel
+    speedLeft = 255;
+    speedRight = 255 + diff;
+  }
+  // write out to the motors
+  Robot.motorsWrite(speedLeft, speedRight);
+
+  // draw the orientation on the screen
+  Robot.drawCompass(compassValue);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R05_Inputs/R05_Inputs.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R05_Inputs/R05_Inputs.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R05_Inputs/R05_Inputs.ino	(revision 136)
@@ -0,0 +1,167 @@
+/* Robot Inputs
+
+ This sketch shows you how to use the on-board
+ potentiometer and buttons as inputs.
+
+ Turning the potentiometer draws a clock-shaped
+ circle. The up and down buttons change the pitch,
+ while the left and right buttons change the tempo.
+ The middle button resets tempo and pitch.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+// default tempo and pitch of the music
+int tempo = 60;
+int pitch = 1000;
+
+void setup() {
+  // initialize the Robot, SD card, speaker, and display
+  Robot.begin();
+  Robot.beginTFT();
+  Robot.beginSpeaker();
+  Robot.beginSD();
+
+  // draw "lg0.bmp" and "lg1.bmp" on the screen
+  Robot.displayLogos();
+
+  // play a sound file
+  Robot.playFile("Melody.sqm");
+}
+
+void loop() {
+  // check the value of the buttons
+  keyDown(Robot.keyboardRead());
+
+  // check the value of the pot
+  drawKnob(Robot.knobRead());
+}
+
+// Draw the basic interface
+void renderUI() {
+  //fill the buttons blank
+  Robot.fill(255, 255, 255);
+  Robot.rect(53, 58, 13, 13); // left
+  Robot.rect(93, 58, 13, 13); // right
+  Robot.rect(73, 38, 13, 13); // up
+  Robot.circle(79, 64, 6); // middle
+  Robot.rect(73, 78, 13, 13); // down
+
+  //draw the knob
+  Robot.noFill();
+  Robot.circle(26, 116, 17); // knob
+
+  //draw the vertical bargraph
+  int fullPart = map(pitch, 200, 2000, 0, 58); //length of filled bargraph
+  Robot.fill(255, 255, 255);
+  Robot.rect(21, 30, 13, 58 - fullPart);
+  Robot.fill(0, 0, 255);
+  Robot.rect(21, 88 - fullPart, 13, fullPart); //58-fullPart+30
+
+  //draw the horizontal bargraph
+  fullPart = map(tempo, 20, 100, 0, 58);  // length of filled bargraph
+  Robot.fill(255, 190, 0);
+  Robot.rect(53, 110, fullPart, 13);
+  Robot.fill(255, 255, 255);
+  Robot.rect(53 + fullPart, 110, 58 - fullPart, 13);
+}
+
+void keyDown(int keyCode) {
+  // use a static int so it is persistent over time
+  static int oldKey;
+  switch (keyCode) {
+    case BUTTON_LEFT:
+      //left button pressed, reduces tempo
+      tempo -= 5;
+      if (tempo < 20) tempo = 20; //lowest tempo 20
+      Robot.fill(255, 190, 0);
+
+      Robot.rect(53, 58, 13, 13);
+      break;
+    case BUTTON_RIGHT:
+      //right button pressed, increases tempo
+      tempo += 5;
+      if (tempo > 100) tempo = 100; //highest tempo 100
+      Robot.fill(255, 190, 0);
+      Robot.rect(93, 58, 13, 13);
+      break;
+    case BUTTON_UP:
+      //up button pressed, increases pitch
+      pitch += 120;
+      if (pitch > 2000) pitch = 2000;
+      Robot.fill(0, 0, 255);
+
+      Robot.rect(73, 38, 13, 13);
+      break;
+    case BUTTON_DOWN:
+      //down button pressed, reduces pitch
+      pitch -= 120;
+      if (pitch < 200) {
+        pitch = 200;
+      }
+      Robot.fill(0, 0, 255);
+
+      Robot.rect(73, 78, 13, 13);
+      break;
+    case BUTTON_MIDDLE:
+      //middle button pressed, resets tempo and pitch
+      tempo = 60;
+      pitch = 1000;
+      Robot.fill(160, 160, 160);
+
+      Robot.circle(79, 64, 6);
+      break;
+    case BUTTON_NONE:
+      //Only when the keys are released(thus BUTTON_NONE is
+      //encountered the first time), the interface will be
+      //re-drawn.
+      if (oldKey != BUTTON_NONE) {
+        renderUI();
+      }
+      break;
+  }
+  if (oldKey != keyCode) {
+    // change the song's tempo
+    Robot.tempoWrite(tempo);
+    // change the song's pitch
+    Robot.tuneWrite(float(pitch / 1000.0));
+  }
+  oldKey = keyCode;
+}
+
+//Draw a circle according to value
+//of the knob.
+void drawKnob(int val) {
+  static int val_old;
+  int r = map(val, 0, 1023, 1, 15);
+
+  //Only updates when the
+  //value changes.
+  if (val_old != r) {
+    Robot.noFill();
+
+    //erase the old circle
+    Robot.stroke(255, 255, 255);
+    Robot.circle(26, 116, r + 1);
+
+    //draw the new circle
+    Robot.stroke(255, 0, 255);
+    Robot.circle(26, 116, r);
+
+    Robot.stroke(0, 0, 0);
+
+    val_old = r;
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R06_Wheel_Calibration/R06_Wheel_Calibration.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R06_Wheel_Calibration/R06_Wheel_Calibration.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R06_Wheel_Calibration/R06_Wheel_Calibration.ino	(revision 136)
@@ -0,0 +1,40 @@
+/* 6 Wheel Calibration
+*
+* Use this sketch to calibrate the wheels in your robot.
+* Your robot should drive as straight as possible when
+* putting both motors at the same speed.
+*
+* Run the software and follow the on-screen instructions.
+* Use the trimmer on the bottom board to make sure the
+* robot is working at its best!
+*
+* (c) 2013 X. Yang
+*/
+#include "scripts_library.h"
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  Serial.begin(9600);
+  Robot.begin();
+  Robot.beginTFT();
+  Robot.beginSD();
+
+  Robot.setTextWrap(false);
+  Robot.displayLogos();
+
+  writeAllScripts();
+
+}
+void loop() {
+  int val = map(Robot.knobRead(), 0, 1023, -255, 255);
+  Serial.println(val);
+  Robot.motorsWrite(val, val);
+
+  int WC = map(Robot.trimRead(), 0, 1023, -20, 20);
+  Robot.debugPrint(WC, 108, 149);
+  delay(40);
+
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R06_Wheel_Calibration/scripts_library.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R06_Wheel_Calibration/scripts_library.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R06_Wheel_Calibration/scripts_library.h	(revision 136)
@@ -0,0 +1,43 @@
+#include <avr/pgmspace.h>
+#include <ArduinoRobot.h>
+
+const char script1[] PROGMEM="Wheel Calibration\n";
+const char script2[] PROGMEM="1. Put Robot on a flat surface\n";
+const char script3[] PROGMEM="2. Adjust speed with the knob on top\n";
+const char script4[] PROGMEM="3. If robot goes straight, it's done\n";
+const char script5[] PROGMEM="4. Use screwdriver on the trim on bottom\n";
+const char script6[] PROGMEM="Robot turns left, screw it clockwise;\n";
+const char script7[] PROGMEM="Turns right, screw it ct-colockwise;\n";
+const char script8[] PROGMEM="5. Repeat 4 until going straight\n";
+
+char buffer[42];//must be longer than text
+
+const char * const scripts[] PROGMEM = {
+  script1,
+  script2,
+  script3,
+  script4,
+  script5,
+  script6,
+  script7,
+  script8,
+};
+
+void getPGMtext(int seq){
+  strcpy_P(buffer,(char*)pgm_read_word(&(scripts[seq])));
+}
+
+void writePGMtext(int seq){
+  getPGMtext(seq);
+  Robot.print(buffer);
+}
+
+void writeScript(int seq){
+  writePGMtext(seq);
+}
+
+void writeAllScripts(){
+  for(int i=0;i<8;i++){
+    writeScript(i);
+  }  
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R07_Runaway_Robot/R07_Runaway_Robot.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R07_Runaway_Robot/R07_Runaway_Robot.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R07_Runaway_Robot/R07_Runaway_Robot.ino	(revision 136)
@@ -0,0 +1,80 @@
+/* Runaway Robot
+
+ Play tag with your robot! With an ultrasonic
+ distance sensor, it's capable of detecting and avoiding
+ obstacles, never bumping into walls again!
+
+ You'll need to attach an untrasonic range finder to M1.
+
+ Circuit:
+ * Arduino Robot
+ * US range finder like Maxbotix EZ10, with analog output
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+// include the robot library
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+int sensorPin = M1;  // pin is used by the sensor
+
+void setup() {
+  // initialize the Robot, SD card, and display
+  Serial.begin(9600);
+  Robot.begin();
+  Robot.beginTFT();
+  Robot.beginSD();
+  Robot.displayLogos();
+
+  // draw a face on the LCD screen
+  setFace(true);
+}
+
+void loop() {
+  // If the robot is blocked, turn until free
+  while (getDistance() < 40) { // If an obstacle is less than 20cm away
+    setFace(false); //shows an unhappy face
+    Robot.motorsStop(); // stop the motors
+    delay(1000); // wait for a moment
+    Robot.turn(90); // turn to the right and try again
+    setFace(true); // happy face
+  }
+  // if there are no objects in the way, keep moving
+  Robot.motorsWrite(255, 255);
+  delay(100);
+}
+
+// return the distance in cm
+float getDistance() {
+  // read the value from the sensor
+  int sensorValue = Robot.analogRead(sensorPin);
+  //Convert the sensor input to cm.
+  float distance_cm = sensorValue * 1.27;
+  return distance_cm;
+}
+
+// make a happy or sad face
+void setFace(boolean onOff) {
+  if (onOff) {
+    // if true show a happy face
+    Robot.background(0, 0, 255);
+    Robot.setCursor(44, 60);
+    Robot.stroke(0, 255, 0);
+    Robot.setTextSize(4);
+    Robot.print(":)");
+  } else {
+    // if false show an upset face
+    Robot.background(255, 0, 0);
+    Robot.setCursor(44, 60);
+    Robot.stroke(0, 255, 0);
+    Robot.setTextSize(4);
+    Robot.print("X(");
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R08_Remote_Control/R08_Remote_Control.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R08_Remote_Control/R08_Remote_Control.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R08_Remote_Control/R08_Remote_Control.ino	(revision 136)
@@ -0,0 +1,93 @@
+/* 08 Remote Control
+
+ If you connect a IR receiver to the robot,
+ you can control it like a RC car.
+ Using the remote control comes with sensor
+ pack, You can make the robot move around
+ without even touching it!
+
+ Circuit:
+ * Arduino Robot
+ * Connect the IRreceiver to D2
+ * Remote control from Robot sensor pack
+
+ based on the IRremote library
+ by Ken Shirriff
+ http://arcfn.com
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+// include the necessary libraries
+#include <IRremote.h>
+#include <IRremoteTools.h>
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+// Define a few commands from your remote control
+#define IR_CODE_FORWARD 284154405
+#define IR_CODE_BACKWARDS 284113605
+#define IR_CODE_TURN_LEFT 284129925
+#define IR_CODE_TURN_RIGHT 284127885
+#define IR_CODE_CONTINUE -1
+
+boolean isActing = false; //If the robot is executing command from remote
+long timer;
+const long TIME_OUT = 150;
+
+void setup() {
+  // initialize the Robot, SD card, display, and speaker
+  Serial.begin(9600);
+  Robot.begin();
+  Robot.beginTFT();
+  Robot.beginSD();
+
+  // print some text to the screen
+  beginIRremote(); // Start the receiver
+}
+
+void loop() {
+  // if there is an IR command, process it
+  if (IRrecived()) {
+    processResult();
+    resumeIRremote(); // resume receiver
+  }
+
+  //If the robot does not receive any command, stop it
+  if (isActing && (millis() - timer >= TIME_OUT)) {
+    Robot.motorsStop();
+    isActing = false;
+  }
+}
+void processResult() {
+  unsigned long res = getIRresult();
+  switch (res) {
+    case IR_CODE_FORWARD:
+      changeAction(1, 1); //Move the robot forward
+      break;
+    case IR_CODE_BACKWARDS:
+      changeAction(-1, -1); //Move the robot backwards
+      break;
+    case IR_CODE_TURN_LEFT:
+      changeAction(-0.5, 0.5); //Turn the robot left
+      break;
+    case IR_CODE_TURN_RIGHT:
+      changeAction(0.5, -0.5); //Turn the robot Right
+      break;
+    case IR_CODE_CONTINUE:
+      timer = millis(); //Continue the last action, reset timer
+      break;
+  }
+}
+void changeAction(float directionLeft, float directionRight) {
+  Robot.motorsWrite(255 * directionLeft, 255 * directionRight);
+  timer = millis();
+  isActing = true;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R09_Picture_Browser/R09_Picture_Browser.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R09_Picture_Browser/R09_Picture_Browser.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R09_Picture_Browser/R09_Picture_Browser.ino	(revision 136)
@@ -0,0 +1,161 @@
+/* Picture Browser
+
+ You can make your own gallery/picture show with the
+ Robot. Put some pictures on the SD card, start the
+ sketch, they will diplay on the screen.
+
+ Use the left/right buttons to navigate through the
+ previous and next images.
+
+ Press up or down to enter a mode where you change
+ the pictures by rotating the robot.
+
+ You can add your own pictures onto the SD card, and
+ view them in the Robot's gallery!
+
+ Pictures must be uncompressed BMP, 24-bit color depth,
+ 160 pixels wide, and 128 pixels tall.
+
+ They should be named as "picN.bmp". Replace 'N' with a
+ number between 0 and 9.
+
+ The current code only supports 10 pictures. How would you
+ improve it to handle more?
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h> // include the robot library
+#include <Wire.h>
+#include <SPI.h>
+
+const int NUM_PICS = 4;  //Total number of pictures in Gallery
+
+// name the modes
+const int CONTROL_MODE_KEY = 0;
+const int CONTROL_MODE_COMPASS = 1;
+
+char buffer[] = "pic1.bmp";  // current file name
+int i = 1;  // Current gallery sequence counter
+int mode = 0;  // Current mode
+
+// text to display on screen
+char modeNames[][9] = { "keyboard", "tilt    " };
+
+void setup() {
+  // initialize the Robot, SD card, display, and speaker
+  Robot.beginSD();
+  Robot.beginTFT();
+  Robot.begin();
+
+  // draw "lg0.bmp" and "lg1.bmp" on the screen
+  Robot.displayLogos();
+
+  // draw init3.bmp from the SD card on the screen
+  Robot.drawBMP("init3.bmp", 0, 0);
+
+  // display instructions
+  Robot.stroke(0, 0, 0);
+  Robot.text("The gallery\n\n has 2 modes, in\n keyboard mode, L/R\n key for switching\n pictures, U/D key\n for changing modes", 5, 5);
+  delay(6000);
+  Robot.clearScreen();
+  Robot.drawBMP("pb.bmp", 0, 0);
+  Robot.text("In tilt mode,\n quickly tilt the\n robot to switch\n pictures", 5, 5);
+  delay(4000);
+}
+
+void loop() {
+  buffer[3] = '0' + i; // change filename of the img to be displayed
+  Robot.drawBMP(buffer, 0, 0); // draw the file on the screen
+  // change control modes
+  switch (mode) {
+    case CONTROL_MODE_COMPASS:
+      compassControl(3);
+      break;
+    case CONTROL_MODE_KEY:
+      keyboardControl();
+      break;
+  }
+  delay(200);
+}
+
+void keyboardControl() {
+  //Use buttons to control the gallery
+  while (true) {
+    int keyPressed = Robot.keyboardRead(); // read the button values
+    switch (keyPressed) {
+      case BUTTON_LEFT:  // display previous picture
+        if (--i < 1) i = NUM_PICS;
+        return;
+      case BUTTON_MIDDLE:  // do nothing
+      case BUTTON_RIGHT:  // display next picture
+        if (++i > NUM_PICS) i = 1;
+        return;
+      case BUTTON_UP:  // change mode
+        changeMode(-1);
+        return;
+      case BUTTON_DOWN:  // change mode
+        changeMode(1);
+        return;
+    }
+  }
+}
+
+// if controlling by the compass
+void compassControl(int change) {
+  // Rotate the robot to change the pictures
+  while (true) {
+    // read the value of the compass
+    int oldV = Robot.compassRead();
+
+    //get the change of angle
+    int diff = Robot.compassRead() - oldV;
+    if (diff > 180) diff -= 360;
+    else if (diff < -180) diff += 360;
+
+    if (abs(diff) > change) {
+      if (++i > NUM_PICS) i = 1;
+      return;
+    }
+
+    // chage modes, if buttons are pressed
+    int keyPressed = Robot.keyboardRead();
+    switch (keyPressed) {
+      case BUTTON_UP:
+        changeMode(-1);
+        return;
+      case BUTTON_DOWN:
+        changeMode(1);
+        return;
+    }
+    delay(10);
+  }
+}
+
+// Change the control mode and display it on the LCD
+void changeMode(int changeDir) {
+  // alternate modes
+  mode += changeDir;
+  if (mode < 0) {
+    mode = 1;
+  } else if (mode > 1)
+    mode = 0;
+
+  // display  the mode on screen
+  Robot.fill(255, 255, 255);
+  Robot.stroke(255, 255, 255);
+  Robot.rect(0, 0, 128, 12);
+  Robot.stroke(0, 0, 0);
+  Robot.text("Control:", 2, 2);
+  Robot.text(modeNames[mode], 52, 2);
+  delay(1000);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R10_Rescue/R10_Rescue.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R10_Rescue/R10_Rescue.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R10_Rescue/R10_Rescue.ino	(revision 136)
@@ -0,0 +1,121 @@
+/* Robot Rescue
+
+ In this example, the robot enters the line following mode and
+ plays some music until it reaches its target. Once it finds the
+ target, it pushes it out of the track. It then returns to the
+ track and looks for a second target.
+
+ You can make the robot push as many objects as you want to, just
+ add more to calls to the rescue function or even move that code
+ into the loop.
+
+ Circuit:
+ * Arduino Robot
+ * some objects for the robot to push
+ * a line-following circuit
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h> // include the robot library
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the Robot, SD card, display, and speaker
+  Robot.begin();
+  Robot.beginTFT();
+  Robot.beginSD();
+  Robot.beginSpeaker();
+
+  // draw "lg0.bmp" and "lg1.bmp" on the screen
+  Robot.displayLogos();
+
+  // display the line following instructional image from the SD card
+  Robot.drawBMP("lf.bmp", 0, 0);
+
+  // play the chase music file
+  Robot.playFile("chase.sqm");
+
+  // add the instructions
+  Robot.text("Rescue\n\n place the robot on\n the rescue track\n pushing the\n obstacles away", 5, 5);
+  Robot.text("Press the middle\n button to start...", 5, 61);
+  Robot.waitContinue();
+
+  // start
+  Robot.fill(255, 255, 255);
+  Robot.stroke(255, 255, 255);
+  Robot.rect(0, 0, 128, 80); // erase the previous text
+  Robot.stroke(0, 0, 0);
+  Robot.text("Start", 5, 5);
+
+  // use this to calibrate the line following algorithm
+  // uncomment one or the other to see the different behaviors of the robot
+  // Robot.lineFollowConfig(14, 9, 50, 10);
+  Robot.lineFollowConfig(11, 7, 60, 5);
+
+  // run the rescue sequence
+  rescueSequence();
+  // find the track again
+  goToNext();
+  // run the rescue sequence a second time
+  rescueSequence();
+  
+  // here you could go on ...
+ 
+  
+}
+
+void loop() {
+  //nothing here, the program only runs once.
+}
+
+// run the sequence
+void rescueSequence() {
+  //set the motor board into line-follow mode
+  Robot.setMode(MODE_LINE_FOLLOW);
+
+  while (!Robot.isActionDone()) { // wait until it is no longer following the line
+  }
+  delay(1000);
+
+  // do the rescue operation
+  doRescue();
+  delay(1000);
+}
+
+void doRescue() {
+  // Reached the endline, engage the target
+  Robot.motorsWrite(200, 200);
+  delay(250);
+  Robot.motorsStop();
+  delay(1000);
+
+  // Turn the robot
+  Robot.turn(90);
+  Robot.motorsStop();
+  delay(1000);
+
+  // Move forward
+  Robot.motorsWrite(200, 200);
+  delay(500);
+  Robot.motorsStop();
+  delay(1000);
+
+  // move backwards, leave the target
+  Robot.motorsWrite(-200, -200);
+  delay(500);
+  Robot.motorsStop();
+}
+
+void goToNext() {
+  // Turn the robot
+  Robot.turn(-90);
+  Robot.motorsStop();
+  delay(1000);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R11_Hello_User/R11_Hello_User.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R11_Hello_User/R11_Hello_User.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/explore/R11_Hello_User/R11_Hello_User.ino	(revision 136)
@@ -0,0 +1,180 @@
+/* Hello User
+
+ Hello User! This sketch is the first thing you see
+ when starting this robot. It gives you a warm welcome,
+ showing you some of the really amazing abilities of
+ the robot, and make itself really personal to you.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h> // include the robot library
+#include <Wire.h>
+#include <SPI.h>
+
+// include the utility function for ths sketch
+// see the details below
+#include <utility/RobotTextManager.h>
+
+char buffer[20];//for storing user name
+
+void setup() {
+  //necessary initialization sequence
+  Robot.begin();
+  Robot.beginTFT();
+  Robot.beginSD();
+
+  // show the logos from the SD card
+  Robot.displayLogos();
+
+  // clear the screen
+  Robot.clearScreen();
+
+  // From now on, display different slides of
+  // text/pictures in sequence. The so-called
+  // scripts are strings of text stored in the
+  // robot's memory
+
+  // these functions are explained below
+
+  //Script 6
+  textManager.writeScript(5, 4, 0);
+  textManager.writeScript(9, 10, 0);
+  Robot.waitContinue();
+  delay(500);
+  Robot.clearScreen();
+
+  //Script 7
+  textManager.writeScript(6, 4, 0);
+  textManager.writeScript(9, 10, 0);
+  Robot.waitContinue();
+  delay(500);
+  Robot.clearScreen();
+
+  //Script 8
+  // this function enables sound and images at once
+  textManager.showPicture("init2.bmp", 0, 0);
+
+  textManager.writeScript(7, 2, 0);
+  textManager.writeScript(9, 7, 0);
+  Robot.waitContinue();
+  delay(500);
+  Robot.clearScreen();
+
+  //Script 9
+  textManager.showPicture("init3.bmp", 0, 0);
+  textManager.writeScript(8, 2, 0);
+  textManager.writeScript(9, 7, 0);
+  Robot.waitContinue();
+  delay(500);
+  Robot.clearScreen();
+
+  //Script 11
+  textManager.writeScript(10, 4, 0);
+  textManager.writeScript(9, 10, 0);
+  Robot.waitContinue();
+  delay(500);
+  Robot.clearScreen();
+
+  //Input screen
+  textManager.writeScript(0, 1, 1);
+  textManager.input(3, 1, USERNAME);
+
+  textManager.writeScript(1, 5, 1);
+  textManager.input(7, 1, ROBOTNAME);
+
+  delay(1000);
+  Robot.clearScreen();
+
+  //last screen
+  textManager.showPicture("init4.bmp", 0, 0);
+  textManager.writeText(1, 2, "Hello");
+  Robot.userNameRead(buffer);
+  textManager.writeText(3, 2, buffer);
+
+  textManager.writeScript(4, 10, 0);
+
+  Robot.waitContinue(BUTTON_LEFT);
+  Robot.waitContinue(BUTTON_RIGHT);
+  textManager.showPicture("kt1.bmp", 0, 0);
+}
+
+void loop() {
+  // do nothing here
+}
+
+
+/**
+textManager mostly contains helper functions for
+R06_Wheel_Calibration and R01_Hello_User.
+
+The ones used in this example:
+  textManager.setMargin(margin_left, margin_top):
+    Configure the left and top margin for text
+    display. The margins will be used for
+    textManager.writeText().
+    Parameters:
+      margin_left, margin_top: the margin values
+      from the top and left side of the screen.
+    Returns:
+      none
+
+  textManager.writeScript(script_number,line,column):
+    Display a script of Hello User example.
+    Parameters:
+      script_number: an int value representing the
+        script to be displayed.
+      line, column: in which line,column is the script
+        displayed. Same as writeText().
+    Returns:
+      none
+
+  textManager.input(line,column,codename):
+    Print an input indicator(">") in the line and column,
+    dispaly and receive input from a virtual keyboard,
+    and save the value into EEPROM represented by codename
+    Parameters:
+      line,column: int values represents where the input
+        starts. Same as wirteText().
+      codename: either USERNAME,ROBOTNAME,CITYNAME or
+        COUNTRYNAME. You can call Robot.userNameRead(),
+        robotNameRead(),cityNameRead() or countryNameRead()
+        to access the values later.
+    Returns:
+      none;
+
+  textManager.writeText(line,column,text):
+    Display text on the specific line and column.
+    It's different from Robot.text() as the later
+    uses pixels for positioning the text.
+    Parameters:
+      line:in which line is the text displayed. Each line
+        is 10px high.
+      column:in which column is the text displayed. Each
+        column is 8px wide.
+      text:a char array(string) of the text to be displayed.
+    Returns:
+      none
+
+    textManager.showPicture(filename, x, y):
+      It has the same functionality as Robot.drawPicture(),
+      while fixing the conflict between drawPicture() and
+      sound playing. Using Robot.drawPicture(), it'll have
+      glitches when playing sound at the same time. Using
+      showPicture(), it'll stop sound when displaying
+      picture, so preventing the problem.
+      Parameters:
+        filename:string, name of the bmp file in sd
+        x,y: int values, position of the picture
+      Returns:
+        none
+
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/AllIOPorts/AllIOPorts.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/AllIOPorts/AllIOPorts.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/AllIOPorts/AllIOPorts.ino	(revision 136)
@@ -0,0 +1,151 @@
+/*
+ All IO Ports
+
+ This example goes through all the IO ports on your robot and
+ reads/writes from/to them. Uncomment the different lines inside
+ the loop to test the different possibilities.
+
+ The M inputs on the Control Board are multiplexed and therefore
+ it is not recommended to use them as outputs. The D pins on the
+ Control Board as well as the D pins on the Motor Board go directly
+ to the microcontroller and therefore can be used both as inputs
+ and outputs.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+// use arrays to store the names of the pins to be read
+uint8_t arr[]  = { M0, M1, M2, M3, M4, M5, M6, M7 };
+uint8_t arr2[] = { D0, D1, D2, D3, D4, D5 };
+uint8_t arr3[] = { D7, D8, D9, D10 };
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // open the serial port to send the information of what you are reading
+  Serial.begin(9600);
+}
+
+void loop() {
+  // read all the D inputs at the Motor Board as analog
+  //analogReadB_Ds();
+
+  // read all the D inputs at the Motor Board as digital
+  //digitalReadB_Ds();
+
+  // read all the M inputs at the Control Board as analog
+  //analogReadMs();
+
+  // read all the M inputs at the Control Board as digital
+  //digitalReadMs();
+
+  // read all the D inputs at the Control Board as analog
+  analogReadT_Ds();
+
+  // read all the D inputs at the Control Board as digital
+  //digitalReadT_Ds();
+
+  // write all the D outputs at the Motor Board as digital
+  //digitalWriteB_Ds();
+
+  // write all the D outputs at the Control Board as digital
+  //digitalWriteT_Ds();
+  delay(40);
+}
+
+// read all M inputs on the Control Board as analog inputs
+void analogReadMs() {
+  for (int i = 0; i < 8; i++) {
+    Serial.print(Robot.analogRead(arr[i]));
+    Serial.print(",");
+  }
+  Serial.println("");
+}
+
+// read all M inputs on the Control Board as digital inputs
+void digitalReadMs() {
+  for (int i = 0; i < 8; i++) {
+    Serial.print(Robot.digitalRead(arr[i]));
+    Serial.print(",");
+  }
+  Serial.println("");
+}
+
+// read all D inputs on the Control Board as analog inputs
+void analogReadT_Ds() {
+  for (int i = 0; i < 6; i++) {
+    Serial.print(Robot.analogRead(arr2[i]));
+    Serial.print(",");
+  }
+  Serial.println("");
+}
+
+// read all D inputs on the Control Board as digital inputs
+void digitalReadT_Ds() {
+  for (int i = 0; i < 6; i++) {
+    Serial.print(Robot.digitalRead(arr2[i]));
+    Serial.print(",");
+  }
+  Serial.println("");
+}
+
+// write all D outputs on the Control Board as digital outputs
+void digitalWriteT_Ds() {
+  // turn all the pins on
+  for (int i = 0; i < 6; i++) {
+    Robot.digitalWrite(arr2[i], HIGH);
+  }
+  delay(500);
+
+  // turn all the pins off
+  for (int i = 0; i < 6; i++) {
+    Robot.digitalWrite(arr2[i], LOW);
+  }
+  delay(500);
+}
+
+// write all D outputs on the Motor Board as digital outputs
+void digitalWriteB_Ds() {
+  // turn all the pins on
+  for (int i = 0; i < 4; i++) {
+    Robot.digitalWrite(arr3[i], HIGH);
+  }
+  delay(500);
+
+  // turn all the pins off
+  for (int i = 0; i < 4; i++) {
+    Robot.digitalWrite(arr3[i], LOW);
+  }
+  delay(500);
+}
+
+// read all D inputs on the Motor Board as analog inputs
+void analogReadB_Ds() {
+  for (int i = 0; i < 4; i++) {
+    Serial.print(Robot.analogRead(arr3[i]));
+    Serial.print(",");
+  }
+  Serial.println("");
+}
+
+// read all D inputs on the Motor Board as digital inputs
+void digitalReadB_Ds() {
+  for (int i = 0; i < 4; i++) {
+    Serial.print(Robot.digitalRead(arr3[i]));
+    Serial.print(",");
+  }
+  Serial.println("");
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/Beep/Beep.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/Beep/Beep.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/Beep/Beep.ino	(revision 136)
@@ -0,0 +1,41 @@
+/*
+ Beep
+
+ Test different pre-configured beeps on
+ the robot's speaker.
+
+ Possible beeps are:
+ - BEEP_SIMPLE
+ - BEEP_DOUBLE
+ - BEEP_LONG
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // initialize the sound speaker
+  Robot.beginSpeaker();
+}
+void loop() {
+  Robot.beep(BEEP_SIMPLE);
+  delay(1000);
+  Robot.beep(BEEP_DOUBLE);
+  delay(1000);
+  Robot.beep(BEEP_LONG);
+  delay(1000);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/CleanEEPROM/CleanEEPROM.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/CleanEEPROM/CleanEEPROM.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/CleanEEPROM/CleanEEPROM.ino	(revision 136)
@@ -0,0 +1,43 @@
+/*
+ Clean EEPROM
+
+ This example erases the user information stored on the
+ external EEPROM memory chip on your robot.
+
+ BEWARE, this will erase the following information:
+ - your name
+ - your robots name given by you
+ - your city and country if you configured them via software
+
+ EEPROMs shouldn't be rewritten too often, therefore the
+ code runs only during setup and not inside loop.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // write empty strings for the different fields
+  Robot.userNameWrite("");
+  Robot.robotNameWrite("");
+  Robot.cityNameWrite("");
+  Robot.countryNameWrite("");
+}
+
+void loop() {
+  // do nothing
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/Compass/Compass.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/Compass/Compass.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/Compass/Compass.ino	(revision 136)
@@ -0,0 +1,43 @@
+/*
+ Compass
+
+ Try the compass both on the robot's TFT
+ and through the serial port.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // initialize the robot's screen
+  Robot.beginTFT();
+
+  // initialize the serial port
+  Serial.begin(9600);
+}
+
+void loop() {
+  // read the compass
+  int compass = Robot.compassRead();
+
+  // print out the sensor's value
+  Serial.println(compass);
+
+  // show the value on the robot's screen
+  Robot.drawCompass(compass);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/IRArray/IRArray.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/IRArray/IRArray.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/IRArray/IRArray.ino	(revision 136)
@@ -0,0 +1,46 @@
+/*
+ IR array
+
+ Read the analog value of the IR sensors at the
+ bottom of the robot. The also-called line following
+ sensors are a series of pairs of IR sender/receiver
+ used to detect how dark it is underneath the robot.
+
+ The information coming from the sensor array is stored
+ into the Robot.IRarray[] and updated using the Robot.updateIR()
+ method.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // initialize the serial port
+  Serial.begin(9600);
+}
+
+void loop() {
+  // store the sensor information into the array
+  Robot.updateIR();
+
+  // iterate the array and print the data to the Serial port
+  for (int i = 0; i < 5; i++) {
+    Serial.print(Robot.IRarray[i]);
+    Serial.print(" ");
+  }
+  Serial.println("");
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LCDDebugPrint/LCDDebugPrint.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LCDDebugPrint/LCDDebugPrint.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LCDDebugPrint/LCDDebugPrint.ino	(revision 136)
@@ -0,0 +1,39 @@
+/*
+ LCD Debug Print
+
+ Use the Robot's library function debugPrint() to
+ quickly send a sensor reading to the robot's creen.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+int value;
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // initialize the screen
+  Robot.beginTFT();
+}
+void loop() {
+  // read a value
+  value = analogRead(A4);
+
+  // send the value to the screen
+  Robot.debugPrint(value);
+
+  delay(40);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LCDPrint/LCDPrint.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LCDPrint/LCDPrint.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LCDPrint/LCDPrint.ino	(revision 136)
@@ -0,0 +1,46 @@
+/*
+ LCD Print
+
+ Print the reading from a sensor to the screen.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+int value;
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // initialize the robot's screen
+  Robot.beginTFT();
+}
+
+void loop() {
+  // read a analog port
+  value = Robot.analogRead(TK4);
+
+  // write the sensor value on the screen
+  Robot.stroke(0, 255, 0);
+  Robot.textSize(1);
+  Robot.text(value, 0, 0);
+
+  delay(500);
+
+  // erase the previous text on the screen
+  Robot.stroke(255, 255, 255);
+  Robot.textSize(1);
+  Robot.text(value, 0, 0);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LCDWriteText/LCDWriteText.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LCDWriteText/LCDWriteText.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LCDWriteText/LCDWriteText.ino	(revision 136)
@@ -0,0 +1,43 @@
+/*
+ LCD Write Text
+
+ Use the Robot's library function text() to
+ print out text to the robot's screen. Take
+ into account that you need to erase the
+ information before continuing writing.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // initialize the screen
+  Robot.beginTFT();
+}
+void loop() {
+  Robot.stroke(0, 0, 0);              // choose the color black
+  Robot.text("Hello World", 0, 0);  // print the text
+  delay(2000);
+  Robot.stroke(255, 255, 255);        // choose the color white
+  Robot.text("Hello World", 0, 0);  // writing text in the same color as the BG erases the text!
+
+  Robot.stroke(0, 0, 0);              // choose the color black
+  Robot.text("I am a robot", 0, 0); // print the text
+  delay(3000);
+  Robot.stroke(255, 255, 255);         // choose the color black
+  Robot.text("I am a robot", 0, 0);  // print the text
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LineFollowWithPause/LineFollowWithPause.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LineFollowWithPause/LineFollowWithPause.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/LineFollowWithPause/LineFollowWithPause.ino	(revision 136)
@@ -0,0 +1,51 @@
+/*
+ Line Following with Pause
+
+ As the robot has two processors, one to command the motors and one to
+ take care of the screen and user input, it is possible to write
+ programs that put one part of the robot to do something and get the
+ other half to control it.
+
+ This example shows how the Control Board assigns the Motor one to
+ follow a line, but asks it to stop every 3 seconds.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // initialize the screen
+  Robot.beginTFT();
+
+  // get some time to place the robot on the ground
+  delay(3000);
+
+  // set the robot in line following mode
+  Robot.setMode(MODE_LINE_FOLLOW);
+}
+
+void loop() {
+  // tell the robot to take a break and stop
+  Robot.pauseMode(true);
+  Robot.debugPrint('p');
+  delay(3000);
+
+  // tell the robot to move on
+  Robot.pauseMode(false);
+  Robot.debugPrint('>');
+  delay(3000);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/Melody/Melody.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/Melody/Melody.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/Melody/Melody.ino	(revision 136)
@@ -0,0 +1,64 @@
+/*
+ Melody
+
+ Plays a melody stored in a string.
+
+ The notes and durations are encoded as follows:
+
+ NOTES:
+ c  play "C"
+ C  play "#C"
+ d  play "D"
+ D  play "#D"
+ e  play "E"
+ f  play "F"
+ F  play "#F"
+ g  play "G"
+ G  play "#G"
+ a  play "A"
+ A  play "#A"
+ b  play "B"
+ -  silence
+
+ DURATIONS:
+ 1  Set as full note
+ 2  Set as half note
+ 4  Set as quarter note
+ 8  Set as eigth note
+
+ SPECIAL NOTATION:
+ .  Make the previous note 3/4 the length
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+
+ This code uses the Squawk sound library designed by STG. For
+ more information about it check: http://github.com/stg/squawk
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // initialize the sound library
+  Robot.beginSpeaker();
+}
+
+void loop() {
+  // array containing the melody
+  char aTinyMelody[] = "8eF-FFga4b.a.g.F.8beee-d2e.1-";
+
+  // play the melody
+  Robot.playMelody(aTinyMelody);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/MotorTest/MotorTest.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/MotorTest/MotorTest.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/MotorTest/MotorTest.ino	(revision 136)
@@ -0,0 +1,43 @@
+/*
+ Motor Test
+
+ Just see if the robot can move and turn.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+}
+
+void loop() {
+  Robot.motorsWrite(255, 255);  // move forward
+  delay(2000);
+  Robot.motorsStop();           // fast stop
+  delay(1000);
+  Robot.motorsWrite(-255, -255); // backward
+  delay(1000);
+  Robot.motorsWrite(0, 0);      // slow stop
+  delay(1000);
+  Robot.motorsWrite(-255, 255); // turn left
+  delay(2000);
+  Robot.motorsStop();           // fast stop
+  delay(1000);
+  Robot.motorsWrite(255, -255); // turn right
+  delay(2000);
+  Robot.motorsStop();           // fast stop
+  delay(1000);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/SpeedByPotentiometer/SpeedByPotentiometer.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/SpeedByPotentiometer/SpeedByPotentiometer.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/SpeedByPotentiometer/SpeedByPotentiometer.ino	(revision 136)
@@ -0,0 +1,41 @@
+/*
+ Speed by Potentiometer
+
+ Control the robot's speed using the on-board
+ potentiometer. The speed will be printed on
+ the TFT screen.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+
+  // initialize the screen
+  Robot.beginTFT();
+}
+
+void loop() {
+  // read the value of the potentiometer
+  int val = map(Robot.knobRead(), 0, 1023, -255, 255);
+
+  // print the value to the TFT screen
+  Robot.debugPrint(val);
+
+  // set the same speed on both of the robot's wheels
+  Robot.motorsWrite(val, val);
+  delay(10);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/TurnTest/TurnTest.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/TurnTest/TurnTest.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/TurnTest/TurnTest.ino	(revision 136)
@@ -0,0 +1,34 @@
+/*
+ Turn Test
+
+ Check if the robot turns a certain amount of degrees.
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the robot
+  Robot.begin();
+}
+
+void loop() {
+  Robot.turn(50); //turn 50 degrees to the right
+  Robot.motorsStop();
+  delay(1000);
+
+  Robot.turn(-100); //turn 100 degrees to the left
+  Robot.motorsStop();
+  delay(1000);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/keyboardTest/keyboardTest.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/keyboardTest/keyboardTest.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/examples/learn/keyboardTest/keyboardTest.ino	(revision 136)
@@ -0,0 +1,40 @@
+/*
+ Keyboard Test
+
+ Check how the robot's keyboard works. This example
+ sends the data about the key pressed through the
+ serial port.
+
+ All the buttons on the Control Board are tied up to a
+ single analog input pin, in this way it is possible to multiplex a
+ whole series of buttons on one single pin.
+
+ It is possible to recalibrate the thresholds of the buttons using
+ the Robot.keyboardCalibrate() function, that takes a 5 ints long
+ array as parameter
+
+ Circuit:
+ * Arduino Robot
+
+ created 1 May 2013
+ by X. Yang
+ modified 12 May 2013
+ by D. Cuartielles
+
+ This example is in the public domain
+ */
+
+#include <ArduinoRobot.h>
+#include <Wire.h>
+#include <SPI.h>
+
+void setup() {
+  // initialize the serial port
+  Serial.begin(9600);
+}
+
+void loop() {
+  // print out the keyboard readings
+  Serial.println(Robot.keyboardRead());
+  delay(100);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Robot Control
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Enables easy access to the controls of the Arduino Robot Control board. For Arduino Robot only.
+paragraph=The Arduino robot is made by two independent boards. The Control Board is the top board of the Arduino Robot, with this library you can easily write sketches to control the robot.
+category=Device Control
+url=http://arduino.cc/en/Reference/RobotLibrary
+architectures=avr
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/ArduinoRobot.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/ArduinoRobot.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/ArduinoRobot.cpp	(revision 136)
@@ -0,0 +1,40 @@
+#include "ArduinoRobot.h"
+#include "Multiplexer.h"
+#include "Wire.h"
+#include "EasyTransfer2.h"
+
+//RobotControl::RobotControl(){}
+
+RobotControl::RobotControl():Arduino_LCD(LCD_CS,DC_LCD,RST_LCD){
+
+}
+
+void RobotControl::begin(){
+	Wire.begin();
+	//Compass
+	//nothing here
+		
+	//TK sensors
+	uint8_t MuxPins[]={MUXA,MUXB,MUXC,MUXD};
+	Multiplexer::begin(MuxPins,MUX_IN,4);
+	
+	//piezo
+	pinMode(BUZZ,OUTPUT);
+	
+	//communication
+	Serial1.begin(9600);
+	messageOut.begin(&Serial1);
+	messageIn.begin(&Serial1);
+	
+	//TFT initialization
+	//Arduino_LCD::initR(INITR_GREENTAB);
+}
+
+void RobotControl::setMode(uint8_t mode){
+	messageOut.writeByte(COMMAND_SWITCH_MODE);
+	messageOut.writeByte(mode);
+	messageOut.sendData();
+}
+
+
+RobotControl Robot=RobotControl();
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/ArduinoRobot.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/ArduinoRobot.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/ArduinoRobot.h	(revision 136)
@@ -0,0 +1,374 @@
+#ifndef ArduinoRobot_h
+#define ArduinoRobot_h
+
+#include "Arduino_LCD.h" // Hardware-specific library
+//#include "FormattedText.h"
+#include "SquawkSD.h"
+#include "Multiplexer.h"
+#include "EasyTransfer2.h"
+#include "EEPROM_I2C.h"
+#include "Compass.h"
+#include "Fat16.h"
+
+#if ARDUINO >= 100
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+
+
+#define BUTTON_NONE   -1
+#define BUTTON_LEFT  0
+#define BUTTON_DOWN      1
+#define BUTTON_UP     2
+#define BUTTON_RIGHT    3
+#define BUTTON_MIDDLE     4
+#define NUMBER_BUTTONS 5
+
+//beep length
+#define BEEP_SIMPLE   0
+#define BEEP_DOUBLE    1
+#define BEEP_LONG    2
+
+// image locations on the EEPROM
+ #define HOME_BMP	0
+#define BATTERY_BMP	2048
+#define COMPASS_BMP	4096
+#define CONTROL_BMP	6144
+#define GEARS_BMP	8192
+#define LIGHT_BMP	10240
+#define OSCILLO_BMP	12288
+#define VOLT_BMP	14336
+#define INICIO_BMP	16384  // this is a full screen splash
+
+//Command code
+#define COMMAND_SWITCH_MODE 0
+#define COMMAND_RUN	10
+#define COMMAND_MOTORS_STOP	11
+#define COMMAND_ANALOG_WRITE	20
+#define COMMAND_DIGITAL_WRITE	30
+#define COMMAND_ANALOG_READ	40
+#define COMMAND_ANALOG_READ_RE	41
+#define COMMAND_DIGITAL_READ	50
+#define COMMAND_DIGITAL_READ_RE	51
+#define COMMAND_READ_IR	60
+#define COMMAND_READ_IR_RE	61
+#define COMMAND_ACTION_DONE 70
+#define COMMAND_READ_TRIM 80
+#define COMMAND_READ_TRIM_RE 81
+#define COMMAND_PAUSE_MODE 90
+#define COMMAND_LINE_FOLLOW_CONFIG 100
+
+//component codename
+#define CN_LEFT_MOTOR	0
+#define CN_RIGHT_MOTOR	1
+#define CN_IR 2
+
+//motor board modes
+#define MODE_SIMPLE 0
+#define MODE_LINE_FOLLOW 1
+#define MODE_ADJUST_MOTOR 2
+#define MODE_IR_CONTROL 3
+
+//port types, for R/W
+#define TYPE_TOP_TK 0
+#define TYPE_TOP_TKD 1
+#define TYPE_BOTTOM_TK 2
+
+//top TKs
+#define TK0 100
+#define TK1 101
+#define TK2 102
+#define TK3 103
+#define TK4 104
+#define TK5 105
+#define TK6 106
+#define TK7 107
+
+#define M0 TK0
+#define M1 TK1
+#define M2 TK2
+#define M3 TK3
+#define M4 TK4
+#define M5 TK5
+#define M6 TK6
+#define M7 TK7
+
+//bottom TKs, just for communication purpose
+#define B_TK1 201
+#define B_TK2 202
+#define B_TK3 203
+#define B_TK4 204
+
+#define D10 B_TK1
+#define D9 B_TK2
+#define D8 B_TK4
+#define D7 B_TK3
+
+//bottom IRs, for communication purpose
+#define B_IR0 210
+#define B_IR1 211
+#define B_IR2 212
+#define B_IR3 213
+#define B_IR4 214
+
+#ifndef LED1
+#define LED1 17
+#endif
+
+//320 - 337 username, 
+#define ADDRESS_USERNAME 320
+//338 - 355 robotname, 
+#define ADDRESS_ROBOTNAME 338
+//356 - 373 cityname, 
+#define ADDRESS_CITYNAME 356
+ //374- 391 countryname, 
+#define ADDRESS_COUNTRYNAME 374
+//508-511 robot info
+#define ADDRESS_ROBOTINFO 508
+
+#define	BLACK	ILI9163C_BLACK   
+#define	BLUE	ILI9163C_BLUE    
+#define	RED		ILI9163C_RED     
+#define	GREEN	ILI9163C_GREEN   
+#define CYAN	ILI9163C_CYAN    
+#define MAGENTA	ILI9163C_MAGENTA 
+#define YELLOW	ILI9163C_YELLOW    
+#define WHITE	ILI9163C_WHITE   
+ 
+//A data structure for storing the current state of motor board
+struct MOTOR_BOARD_DATA{
+	int _B_TK1;
+	int _B_TK2;
+	int _B_TK3;
+	int _B_TK4;
+	
+	/*int _B_IR0;
+	int _B_IR1;
+	int _B_IR2;
+	int _B_IR3;
+	int _B_IR4;*/
+};
+
+/*
+A message structure will be:
+switch mode:
+	byte COMMAND_SWITCH_MODE, byte mode
+run:
+	byte COMMAND_RUN, int speedL, int speedR
+analogWrite:
+	byte COMMAND_ANALOG_WRITE, byte codename, byte value;
+digitalWrite:
+	byte COMMAND_DIGITAL_WRITE, byte codename, byte value;
+analogRead:
+	byte COMMAND_ANALOG_READ, byte codename;
+analogRead return:
+	byte COMMAND_ANALOG_READ_RE, byte codename, int value;
+digitalRead return:
+	byte COMMAND_DIGITAL_READ_RE, byte codename, byte value;
+read IR:
+	byte COMMAND_READ_IR, int valueA, int valueB, int valueC, int valueD;
+
+
+*/
+#define NUM_EEPROM_BMP 10
+struct EEPROM_BMP{
+	char name[8];
+	uint8_t width;
+	uint8_t height;
+	uint16_t address;
+};
+
+//if you call #undef USE_SQUAWK_SYNTH_SD at the beginning of your sketch,
+//it's going to remove anything regarding sound playing
+
+class RobotControl:public Multiplexer, 
+public EEPROM_I2C, 
+public Compass, 
+public SquawkSynthSD, 
+//public FormattedText
+public Arduino_LCD
+{
+	public:
+		RobotControl();
+		void begin();
+		void setMode(uint8_t mode);
+		
+		//Read & Write, TK0 - TK7, TKD0 - TKD1, bottom TK0 - TK4
+		bool digitalRead(uint8_t port);
+		int analogRead(uint8_t port);
+		void digitalWrite(uint8_t port, bool value);
+		void analogWrite(uint8_t port, uint8_t value);//It's not available, as there's no pin can be used for analog write
+		
+		//IR sensors from the bottom board
+		//define an array as "int arr[4];", and supply the arry name here
+		uint16_t IRarray[5];
+		void updateIR();
+		
+		//on board Potentiometor
+		int knobRead();
+		//Potentiometor of the motor board
+		int trimRead();
+		
+		//on board piezo
+		void beginSpeaker(uint16_t frequency=44100);
+		void playMelody(char* script);
+		void playFile(char* filename);
+		void stopPlayFile();
+		void beep(int beep_length=BEEP_SIMPLE);
+		void tempoWrite(int tempo);
+		void tuneWrite(float tune);
+
+		//compass
+		uint16_t compassRead();
+		void drawCompass(uint16_t value);
+		void drawBase();
+		void drawDire(int16_t dire);
+		
+		//keyboard
+		void keyboardCalibrate(int *vals);
+		int8_t keyboardRead();//return the key that is being pressed?Has been pressed(with _processKeyboard)?
+		
+		//movement
+		void moveForward(int speed);
+		void moveBackward(int speed);
+		void turnLeft(int speed);
+		void turnRight(int speed);
+		void motorsStop();
+		void motorsWritePct(int speedLeftPct, int speedRightPct);
+		
+		void motorsWrite(int speedLeft,int speedRight);
+		void pointTo(int degrees);//turn to an absolute angle from the compass
+		void turn(int degress);//turn certain degrees from the current heading
+		
+		//Line Following
+		void lineFollowConfig(uint8_t KP, uint8_t KD, uint8_t robotSpeed, uint8_t intergrationTime);//default 11 5 50 10
+		
+		//TFT LCD
+		//use the same commands as Arduino_LCD
+		void beginTFT(uint16_t foreGround=BLACK, uint16_t background=WHITE);
+		/*void text(int value, uint8_t posX, uint8_t posY, bool EW);
+		void text(long value, uint8_t posX, uint8_t posY, bool EW);
+		void text(char* value, uint8_t posX, uint8_t posY, bool EW);
+		void text(char value, uint8_t posX, uint8_t posY, bool EW);*/
+		void debugPrint(long value, uint8_t x=0, uint8_t y=0);
+		void clearScreen();
+		
+		void drawBMP(char* filename, uint8_t x, uint8_t y);//detect if draw with EEPROM or SD, and draw it
+		void _drawBMP(uint32_t iconOffset, uint8_t x, uint8_t y, uint8_t width, uint8_t height);//draw from EEPROM
+		void _drawBMP(char* filename, uint8_t x, uint8_t y);//draw from SD
+		void beginBMPFromEEPROM();
+		void endBMPFromEEPROM();
+		
+		uint16_t foreGround;//foreground color
+		uint16_t backGround;//background color
+
+		
+		//SD card
+		void beginSD();
+		
+		//Information
+		void userNameRead(char* container);
+		void robotNameRead(char* container);
+		void cityNameRead(char* container);
+		void countryNameRead(char* container);
+		
+		void userNameWrite(char* text);
+		void robotNameWrite(char* text);
+		void cityNameWrite(char* text);
+		void countryNameWrite(char* text);
+		
+		//Others
+		bool isActionDone();
+		void pauseMode(uint8_t onOff);
+		void displayLogos();
+		void waitContinue(uint8_t key=BUTTON_MIDDLE);
+		
+	private:
+		//Read & Write
+		uint8_t _getTypeCode(uint8_t port);//different ports need different actions
+		uint8_t _portToTopMux(uint8_t port);//get the number for multiplexer within top TKs
+		uint8_t _topDPortToAPort(uint8_t port);//get the corrensponding analogIn pin for top TKDs
+		
+		bool _digitalReadTopMux(uint8_t port);//TK0 - TK7
+		int _analogReadTopMux(uint8_t port);
+		
+		bool _digitalReadTopPin(uint8_t port);
+		int _analogReadTopPin(uint8_t port);
+		void _digitalWriteTopPin(uint8_t port, bool value);
+		
+		MOTOR_BOARD_DATA motorBoardData;
+		int* parseMBDPort(uint8_t port);
+		int get_motorBoardData(uint8_t port);
+		void set_motorBoardData(uint8_t port, int value);
+		
+		bool _requestDigitalRead(uint8_t port);
+		int _requestAnalogRead(uint8_t port);
+		void _requestDigitalWrite(uint8_t port, uint8_t value);
+				
+		//LCD
+		void _enableLCD();
+		void _setWrite(uint8_t posX, uint8_t posY);
+		void _setErase(uint8_t posX, uint8_t posY);
+		
+		
+		//SD
+		SdCard card;
+		Fat16 file;
+		Fat16 melody;
+		void _enableSD();
+		
+		//keyboard
+		void _processKeyboard(); //need to run in loop, detect if the key is actually pressed
+		int averageAnalogInput(int pinNum);
+		
+		//Ultrasonic ranger
+		//uint8_t pinTrigger_UR;
+		//uint8_t pinEcho_UR;
+		
+		//Melody
+		void playNote(byte period, word length, char modifier); 
+		
+		//Communication
+		
+		EasyTransfer2 messageOut;
+		EasyTransfer2 messageIn;
+		
+		//TFT LCD
+		bool _isEEPROM_BMP_Allocated;
+		EEPROM_BMP * _eeprom_bmp;
+		void _drawBMP_EEPROM(uint16_t address, uint8_t width, uint8_t height);
+		void _drawBMP_SD(char* filename, uint8_t x, uint8_t y);
+
+		
+};
+
+inline void RobotControl::userNameRead(char* container){
+	EEPROM_I2C::readBuffer(ADDRESS_USERNAME,(uint8_t*)container,18);
+}
+inline void RobotControl::robotNameRead(char* container){
+	EEPROM_I2C::readBuffer(ADDRESS_ROBOTNAME,(uint8_t*)container,18);
+}
+inline void RobotControl::cityNameRead(char* container){
+	EEPROM_I2C::readBuffer(ADDRESS_CITYNAME,(uint8_t*)container,18);
+}
+inline void RobotControl::countryNameRead(char* container){
+	EEPROM_I2C::readBuffer(ADDRESS_COUNTRYNAME,(uint8_t*)container,18);
+}
+
+inline void RobotControl::userNameWrite(char* text){
+	EEPROM_I2C::writePage(ADDRESS_USERNAME,(uint8_t*)text,18);
+}
+inline void RobotControl::robotNameWrite(char* text){
+	EEPROM_I2C::writePage(ADDRESS_ROBOTNAME,(uint8_t*)text,18);
+}
+inline void RobotControl::cityNameWrite(char* text){
+	EEPROM_I2C::writePage(ADDRESS_CITYNAME,(uint8_t*)text,18);
+}
+inline void RobotControl::countryNameWrite(char* text){
+	EEPROM_I2C::writePage(ADDRESS_COUNTRYNAME,(uint8_t*)text,18);
+}
+
+extern RobotControl Robot;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Arduino_LCD.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Arduino_LCD.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Arduino_LCD.cpp	(revision 136)
@@ -0,0 +1,707 @@
+/*************************************************** 
+  This is a library for the Adafruit 1.8" SPI display.
+  This library works with the Adafruit 1.8" TFT Breakout w/SD card
+  ----> http://www.adafruit.com/products/358
+  as well as Adafruit raw 1.8" TFT display
+  ----> http://www.adafruit.com/products/618
+ 
+  Check out the links above for our tutorials and wiring diagrams
+  These displays use SPI to communicate, 4 or 5 pins are required to
+  interface (RST is optional)
+  Adafruit invests time and resources providing this open source code,
+  please support Adafruit and open-source hardware by purchasing
+  products from Adafruit!
+
+  Written by Limor Fried/Ladyada for Adafruit Industries.
+  MIT license, all text above must be included in any redistribution
+ ****************************************************/
+
+#include "Arduino_LCD.h"
+//#include <avr/pgmspace.h>
+#include <limits.h>
+//#include "pins_arduino.h"
+#include "wiring_private.h"
+#include <SPI.h>
+
+
+// Constructor when using software SPI.  All output pins are configurable.
+Arduino_LCD::Arduino_LCD(uint8_t cs, uint8_t rs, uint8_t sid, uint8_t sclk,
+  uint8_t rst) : Adafruit_GFX(ILI9163C_TFTWIDTH, ILI9163C_TFTHEIGHT)
+{
+  _cs   = cs;
+  _rs   = rs;
+  _sid  = sid;
+  _sclk = sclk;
+  _rst  = rst;
+  hwSPI = false;
+}
+
+
+// Constructor when using hardware SPI.  Faster, but must use SPI pins
+// specific to each board type (e.g. 11,13 for Uno, 51,52 for Mega, etc.)
+Arduino_LCD::Arduino_LCD(uint8_t cs, uint8_t rs, uint8_t rst) :
+    Adafruit_GFX(ILI9163C_TFTWIDTH, ILI9163C_TFTHEIGHT) {
+  _cs   = cs;
+  _rs   = rs;
+  _rst  = rst;
+  hwSPI = true;
+  _sid  = _sclk = 0;
+}
+
+
+inline void Arduino_LCD::spiwrite(uint8_t c) {
+
+  //Serial.println(c, HEX);
+
+/*  if (hwSPI) {
+    SPDR = c;
+    while(!(SPSR & _BV(SPIF)));
+  } else {
+    // Fast SPI bitbang swiped from LPD8806 library
+    for(uint8_t bit = 0x80; bit; bit >>= 1) {
+      if(c & bit) *dataport |=  datapinmask;
+      else        *dataport &= ~datapinmask;
+      *clkport |=  clkpinmask;
+      *clkport &= ~clkpinmask;
+    }
+  }
+*/
+SPI.transfer(c);
+}
+
+
+void Arduino_LCD::writecommand(uint8_t c) {
+//  *rsport &= ~rspinmask;
+//  *csport &= ~cspinmask;
+digitalWrite(_rs, LOW);
+digitalWrite(_cs, LOW);
+
+  //Serial.print("C ");
+  spiwrite(c);
+//SPI.transfer(c);
+//  *csport |= cspinmask;
+digitalWrite(_cs, HIGH);
+}
+
+
+void Arduino_LCD::writedata(uint8_t c) {
+//  *rsport &= ~rspinmask;
+//  *csport &= ~cspinmask;
+digitalWrite(_rs, HIGH);
+digitalWrite(_cs, LOW);
+
+  //Serial.print("D ");
+  spiwrite(c);
+//SPI.transfer(c);
+//  *csport |= cspinmask;
+digitalWrite(_cs, HIGH);
+} 
+
+
+// Rather than a bazillion writecommand() and writedata() calls, screen
+// initialization commands and arguments are organized in these tables
+// stored in PROGMEM.  The table may look bulky, but that's mostly the
+// formatting -- storage-wise this is hundreds of bytes more compact
+// than the equivalent code.  Companion function follows.
+#define DELAY 0x80
+//PROGMEM static prog_uchar
+/*uint8_t
+  Bcmd[] = {                  // Initialization commands for 7735B screens
+   18,                       // 18 commands in list:
+    ILI9163C_SWRESET,   DELAY,  //  1: Software reset, no args, w/delay
+      50,                     //     50 ms delay
+    ILI9163C_SLPOUT ,   DELAY,  //  2: Out of sleep mode, no args, w/delay
+      255,                    //     255 = 500 ms delay
+    ILI9163C_COLMOD , 1+DELAY,  //  3: Set color mode, 1 arg + delay: // I THINK THERE WAS SOMETHING HERE BECAUSE THE COMMAND IS CALLED 3A on Adafruits
+      0x05,                   //     16-bit color
+      10,                     //     10 ms delay
+    ILI9163C_FRMCTR1, 3+DELAY,  //  4: Frame rate control, 3 args + delay:
+      0x00,                   //     fastest refresh
+      0x06,                   //     6 lines front porch
+      0x03,                   //     3 lines back porch
+      10,                     //     10 ms delay
+    ILI9163C_MADCTL , 1      ,  //  5: Memory access ctrl (directions), 1 arg:
+      0x08,                   //     Row addr/col addr, bottom to top refresh
+    ILI9163C_DISSET5, 2      ,  //  6: Display settings #5, 2 args, no delay:
+      0x15,                   //     1 clk cycle nonoverlap, 2 cycle gate
+                              //     rise, 3 cycle osc equalize
+      0x02,                   //     Fix on VTL
+    ILI9163C_INVCTR , 1      ,  //  7: Display inversion control, 1 arg:
+      0x0,                    //     Line inversion
+    ILI9163C_PWCTR1 , 2+DELAY,  //  8: Power control, 2 args + delay:
+      0x02,                   //     GVDD = 4.7V
+      0x70,                   //     1.0uA
+      10,                     //     10 ms delay
+    ILI9163C_PWCTR2 , 1      ,  //  9: Power control, 1 arg, no delay:
+      0x05,                   //     VGH = 14.7V, VGL = -7.35V
+    ILI9163C_PWCTR3 , 2      ,  // 10: Power control, 2 args, no delay:
+      0x01,                   //     Opamp current small
+      0x02,                   //     Boost frequency
+    ILI9163C_VMCTR1 , 2+DELAY,  // 11: Power control, 2 args + delay:
+      0x3C,                   //     VCOMH = 4V
+      0x38,                   //     VCOML = -1.1V
+      10,                     //     10 ms delay
+    ILI9163C_PWCTR6 , 2      ,  // 12: Power control, 2 args, no delay:
+      0x11, 0x15,
+    ILI9163C_GMCTRP1,16      ,  // 13: Magical unicorn dust, 16 args, no delay:
+      0x09, 0x16, 0x09, 0x20, //     (seriously though, not sure what
+      0x21, 0x1B, 0x13, 0x19, //      these config values represent)
+      0x17, 0x15, 0x1E, 0x2B,
+      0x04, 0x05, 0x02, 0x0E,
+    ILI9163C_GMCTRN1,16+DELAY,  // 14: Sparkles and rainbows, 16 args + delay:
+      0x0B, 0x14, 0x08, 0x1E, //     (ditto)
+      0x22, 0x1D, 0x18, 0x1E,
+      0x1B, 0x1A, 0x24, 0x2B,
+      0x06, 0x06, 0x02, 0x0F,
+      10,                     //     10 ms delay
+    ILI9163C_CASET  , 4      ,  // 15: Column addr set, 4 args, no delay:
+      0x00, 0x02,             //     XSTART = 2
+      0x00, 0x81,             //     XEND = 129
+    ILI9163C_RASET  , 4      ,  // 16: Row addr set, 4 args, no delay:
+      0x00, 0x02,             //     XSTART = 1
+      0x00, 0x81,             //     XEND = 160
+    ILI9163C_NORON  ,   DELAY,  // 17: Normal display on, no args, w/delay
+      10,                     //     10 ms delay
+    ILI9163C_DISPON ,   DELAY,  // 18: Main screen turn on, no args, w/delay
+      255 },                  //     255 = 500 ms delay
+*/
+uint8_t
+  Bcmd[] = {                    // Initialization commands for 7735B screens
+   19,                          // 19 commands in list:
+    ILI9163C_SWRESET,   DELAY,  // 1: Software reset, no args, w/delay
+      50,                       //     50 ms delay
+    0x11 ,   DELAY,  		// 2: Out of sleep mode, no args, w/delay
+      100,                      //     255 = 500 ms delay
+    0x26 , 1,  			// 3: Set default gamma
+      0x04,                     //     16-bit color
+    0xb1, 2,              	// 4: Frame Rate
+      0x0b,
+      0x14,
+    0xc0, 2,                    // 5: VRH1[4:0] & VC[2:0]
+      0x08,
+      0x00,
+    0xc1, 1,                    // 6: BT[2:0]
+      0x05,
+    0xc5, 2,                    // 7: VMH[6:0] & VML[6:0]
+      0x41,
+      0x30,
+    0xc7, 1,                    // 8: LCD Driving control
+      0xc1,
+    0xEC, 1,                    // 9: Set pumping color freq
+      0x1b,
+    0x3a , 1 + DELAY,  	        // 10: Set color format
+      0x55,                     //     16-bit color
+      100,
+    0x2a, 4,                    // 11: Set Column Address
+      0x00,
+      0x00,
+      0x00,
+      0x7f,
+    0x2b, 4,                    // 12: Set Page Address
+      0x00,
+      0x00,
+      0x00,
+      0x9f,
+    0x36, 1,                    // 12+1: Set Scanning Direction
+      0xc8,
+    0xb7, 1,			// 14: Set Source Output Direciton
+      0x00,
+    0xf2, 1,			// 15: Enable Gamma bit
+      0x01,
+    0xe0, 15 + DELAY,		// 16: magic
+      0x28, 0x24, 0x22, 0x31,
+      0x2b, 0x0e, 0x53, 0xa5,
+      0x42, 0x16, 0x18, 0x12,
+      0x1a, 0x14, 0x03,
+      50,
+    0xe1, 15 + DELAY,		// 17: more magic
+      0x17, 0x1b, 0x1d, 0x0e,
+      0x14, 0x11, 0x2c, 0xa5,
+      0x3d, 0x09, 0x27, 0x2d,
+      0x25, 0x2b, 0x3c, 
+      50, 
+    ILI9163C_NORON  ,    DELAY, // 18: Normal display on, no args, w/delay
+      10,                       //     10 ms delay
+    ILI9163C_DISPON ,    DELAY, // 19: Main screen turn on, no args w/delay
+      100 },                    //     100 ms delay
+Rcmd1[] = {                   // Init for 7735R, part 1 (red or green tab)
+    15,                       // 15 commands in list:
+    ILI9163C_SWRESET,   DELAY,  //  1: Software reset, 0 args, w/delay
+      150,                    //     150 ms delay
+    ILI9163C_SLPOUT ,   DELAY,  //  2: Out of sleep mode, 0 args, w/delay
+      255,                    //     500 ms delay
+    ILI9163C_FRMCTR1, 3      ,  //  3: Frame rate ctrl - normal mode, 3 args:
+      0x01, 0x2C, 0x2D,       //     Rate = fosc/(1x2+40) * (LINE+2C+2D)
+    ILI9163C_FRMCTR2, 3      ,  //  4: Frame rate control - idle mode, 3 args:
+      0x01, 0x2C, 0x2D,       //     Rate = fosc/(1x2+40) * (LINE+2C+2D)
+    ILI9163C_FRMCTR3, 6      ,  //  5: Frame rate ctrl - partial mode, 6 args:
+      0x01, 0x2C, 0x2D,       //     Dot inversion mode
+      0x01, 0x2C, 0x2D,       //     Line inversion mode
+    ILI9163C_INVCTR , 1      ,  //  6: Display inversion ctrl, 1 arg, no delay:
+      0x07,                   //     No inversion
+    ILI9163C_PWCTR1 , 3      ,  //  7: Power control, 3 args, no delay:
+      0xA2,
+      0x02,                   //     -4.6V
+      0x84,                   //     AUTO mode
+    ILI9163C_PWCTR2 , 1      ,  //  8: Power control, 1 arg, no delay:
+      0xC5,                   //     VGH25 = 2.4C VGSEL = -10 VGH = 3 * AVDD
+    ILI9163C_PWCTR3 , 2      ,  //  9: Power control, 2 args, no delay:
+      0x0A,                   //     Opamp current small
+      0x00,                   //     Boost frequency
+    ILI9163C_PWCTR4 , 2      ,  // 10: Power control, 2 args, no delay:
+      0x8A,                   //     BCLK/2, Opamp current small & Medium low
+      0x2A,  
+    ILI9163C_PWCTR5 , 2      ,  // 11: Power control, 2 args, no delay:
+      0x8A, 0xEE,
+    ILI9163C_VMCTR1 , 1      ,  // 12: Power control, 1 arg, no delay:
+      0x0E,
+    ILI9163C_INVOFF , 0      ,  // 13: Don't invert display, no args, no delay
+    ILI9163C_MADCTL , 1      ,  // 14: Memory access control (directions), 1 arg:
+      0xC8,                   //     row addr/col addr, bottom to top refresh
+    ILI9163C_COLMOD , 1      ,  // 15: set color mode, 1 arg, no delay:
+      0x05 },                 //     16-bit color
+
+  Rcmd2green[] = {            // Init for 7735R, part 2 (green tab only)
+    2,                        //  2 commands in list:
+    ILI9163C_CASET  , 4      ,  //  1: Column addr set, 4 args, no delay:
+      0x00, 0x02,             //     XSTART = 0
+      0x00, 0x7F+0x02,        //     XEND = 127
+    ILI9163C_RASET  , 4      ,  //  2: Row addr set, 4 args, no delay:
+      0x00, 0x01,             //     XSTART = 0
+      0x00, 0x9F+0x01 },      //     XEND = 159
+  Rcmd2red[] = {              // Init for 7735R, part 2 (red tab only)
+    2,                        //  2 commands in list:
+    ILI9163C_CASET  , 4      ,  //  1: Column addr set, 4 args, no delay:
+      0x00, 0x00,             //     XSTART = 0
+      0x00, 0x7F,             //     XEND = 127
+    ILI9163C_RASET  , 4      ,  //  2: Row addr set, 4 args, no delay:
+      0x00, 0x00,             //     XSTART = 0
+      0x00, 0x9F },           //     XEND = 159
+
+  Rcmd3[] = {                 // Init for 7735R, part 3 (red or green tab)
+    4,                        //  4 commands in list:
+    ILI9163C_GMCTRP1, 16      , //  1: Magical unicorn dust, 16 args, no delay:
+      0x02, 0x1c, 0x07, 0x12,
+      0x37, 0x32, 0x29, 0x2d,
+      0x29, 0x25, 0x2B, 0x39,
+      0x00, 0x01, 0x03, 0x10,
+    ILI9163C_GMCTRN1, 16      , //  2: Sparkles and rainbows, 16 args, no delay:
+      0x03, 0x1d, 0x07, 0x06,
+      0x2E, 0x2C, 0x29, 0x2D,
+      0x2E, 0x2E, 0x37, 0x3F,
+      0x00, 0x00, 0x02, 0x10,
+    ILI9163C_NORON  ,    DELAY, //  3: Normal display on, no args, w/delay
+      10,                     //     10 ms delay
+    ILI9163C_DISPON ,    DELAY, //  4: Main screen turn on, no args w/delay
+      100 };                  //     100 ms delay
+
+
+// Companion code to the above tables.  Reads and issues
+// a series of LCD commands stored in PROGMEM byte array.
+//void Arduino_LCD::commandList(prog_uchar *addr) {
+void Arduino_LCD::commandList(uint8_t *addr) {
+
+  uint8_t  numCommands, numArgs;
+  uint16_t ms;
+
+  numCommands = *addr++;   // Number of commands to follow
+  while(numCommands--) {                 // For each command...
+    writecommand(*addr++); //   Read, issue command
+    numArgs  = *addr++;    //   Number of args to follow
+    ms       = numArgs & DELAY;          //   If hibit set, delay follows args
+    numArgs &= ~DELAY;                   //   Mask out delay bit
+    while(numArgs--) {                   //   For each argument...
+      writedata(*addr++);  //     Read, issue argument
+    }
+
+    if(ms) {
+      ms = *addr++; // Read post-command delay time (ms)
+      if(ms == 255) ms = 500;     // If 255, delay for 500 ms
+      delay(ms);
+    }
+  }
+}
+
+
+// Initialization code common to both 'B' and 'R' type displays
+//void Arduino_LCD::commonInit(prog_uchar *cmdList) {
+void Arduino_LCD::commonInit(uint8_t *cmdList) {
+
+  colstart = rowstart = 0; // May be overridden in init func
+
+  pinMode(_rs, OUTPUT);
+  pinMode(_cs, OUTPUT);
+/*
+  csport    = portOutputRegister(digitalPinToPort(_cs));
+  cspinmask = digitalPinToBitMask(_cs);
+  rsport    = portOutputRegister(digitalPinToPort(_rs));
+  rspinmask = digitalPinToBitMask(_rs);
+*/
+
+//  if(hwSPI) { // Using hardware SPI
+    SPI.begin();
+    SPI.setClockDivider(21); // 4 MHz (half speed)
+//    SPI.setClockDivider(SPI_CLOCK_DIV4); // 4 MHz (half speed)
+//    SPI.setBitOrder(MSBFIRST);
+// there is no setBitOrder on the SPI library for the Due
+    SPI.setDataMode(SPI_MODE0);
+/*
+  } else {
+    pinMode(_sclk, OUTPUT);
+    pinMode(_sid , OUTPUT);
+    clkport     = portOutputRegister(digitalPinToPort(_sclk));
+    clkpinmask  = digitalPinToBitMask(_sclk);
+    dataport    = portOutputRegister(digitalPinToPort(_sid));
+    datapinmask = digitalPinToBitMask(_sid);
+    *clkport   &= ~clkpinmask;
+    *dataport  &= ~datapinmask;
+  }
+*/
+
+  // toggle RST low to reset; CS low so it'll listen to us
+//  *csport &= ~cspinmask;
+  digitalWrite(_cs, LOW);
+  if (_rst) {
+    pinMode(_rst, OUTPUT);
+    digitalWrite(_rst, HIGH);
+    delay(500);
+    digitalWrite(_rst, LOW);
+    delay(500);
+    digitalWrite(_rst, HIGH);
+    delay(500);
+  }
+
+  if(cmdList) commandList(cmdList);
+}
+
+
+// Initialization for ST7735B screens
+void Arduino_LCD::initB(void) {
+  commonInit(Bcmd);
+  commandList(Rcmd3);
+}
+
+
+// Initialization for ST7735R screens (green or red tabs)
+void Arduino_LCD::initR(uint8_t options) {
+  commonInit(Rcmd1);
+  if(options == INITR_GREENTAB) {
+    commandList(Rcmd2green);
+    colstart = 2;
+    rowstart = 1;
+  } else {
+    // colstart, rowstart left at default '0' values
+    commandList(Rcmd2red);
+  }
+  commandList(Rcmd3);
+}
+
+
+void Arduino_LCD::setAddrWindow(uint8_t x0, uint8_t y0, uint8_t x1,
+ uint8_t y1) {
+
+  writecommand(ILI9163C_CASET); // Column addr set
+  writedata(0x00);
+  writedata(x0+colstart);     // XSTART 
+  writedata(0x00);
+  writedata(x1+colstart);     // XEND
+
+  writecommand(ILI9163C_RASET); // Row addr set
+  writedata(0x00);
+  writedata(y0+rowstart);     // YSTART
+  writedata(0x00);
+  writedata(y1+rowstart);     // YEND
+
+  writecommand(ILI9163C_RAMWR); // write to RAM
+}
+
+
+void Arduino_LCD::fillScreen(uint16_t color) {
+
+  uint8_t x, y, hi = color >> 8, lo = color;
+
+  setAddrWindow(0, 0, _width-1, _height-1);
+
+//  *rsport |=  rspinmask;
+//  *csport &= ~cspinmask;
+digitalWrite(_rs, HIGH);
+  digitalWrite(_cs, LOW);
+
+  for(y=_height; y>0; y--) {
+    for(x=_width; x>0; x--) {
+//SPI.transfer(hi);
+//SPI.transfer(lo);
+      spiwrite(hi);
+      spiwrite(lo);
+    }
+  }
+
+//  *csport |= cspinmask;
+  digitalWrite(_cs, HIGH);
+}
+
+
+void Arduino_LCD::pushColor(uint16_t color) {
+//  *rsport |=  rspinmask;
+//  *csport &= ~cspinmask;
+digitalWrite(_rs, HIGH);
+  digitalWrite(_cs, LOW);
+
+  spiwrite(color >> 8);
+  spiwrite(color);
+//SPI.transfer(color>>8);
+//SPI.transfer(color);
+
+//  *csport |= cspinmask;
+  digitalWrite(_cs, HIGH);
+}
+
+
+void Arduino_LCD::drawPixel(int16_t x, int16_t y, uint16_t color) {
+
+  if((x < 0) ||(x >= _width) || (y < 0) || (y >= _height)) return;
+
+  setAddrWindow(x,y,x+1,y+1);
+
+//  *rsport |=  rspinmask;
+//  *csport &= ~cspinmask;
+digitalWrite(_rs, HIGH);
+  digitalWrite(_cs, LOW);
+
+  spiwrite(color >> 8);
+  spiwrite(color);
+//SPI.transfer(color>>8);
+//SPI.transfer(color);
+
+//  *csport |= cspinmask;
+  digitalWrite(_cs, HIGH);
+}
+
+
+void Arduino_LCD::drawFastVLine(int16_t x, int16_t y, int16_t h,
+ uint16_t color) {
+
+  // Rudimentary clipping
+  if((x >= _width) || (y >= _height)) return;
+  if((y+h-1) >= _height) h = _height-y;
+  setAddrWindow(x, y, x, y+h-1);
+
+  uint8_t hi = color >> 8, lo = color;
+//  *rsport |=  rspinmask;
+//  *csport &= ~cspinmask;
+digitalWrite(_rs, HIGH);
+  digitalWrite(_cs, LOW);
+  while (h--) {
+    spiwrite(hi);
+    spiwrite(lo);
+//SPI.transfer(hi);
+//SPI.transfer(lo);
+  }
+//  *csport |= cspinmask;
+  digitalWrite(_cs, HIGH);
+}
+
+
+void Arduino_LCD::drawFastHLine(int16_t x, int16_t y, int16_t w,
+  uint16_t color) {
+
+  // Rudimentary clipping
+  if((x >= _width) || (y >= _height)) return;
+  if((x+w-1) >= _width)  w = _width-x;
+  setAddrWindow(x, y, x+w-1, y);
+
+  uint8_t hi = color >> 8, lo = color;
+//  *rsport |=  rspinmask;
+//  *csport &= ~cspinmask;
+digitalWrite(_rs, HIGH);
+  digitalWrite(_cs, LOW);
+  while (w--) {
+    spiwrite(hi);
+    spiwrite(lo);
+//SPI.transfer(hi);
+//SPI.transfer(lo);
+  }
+//  *csport |= cspinmask;
+  digitalWrite(_cs, HIGH);
+}
+
+
+// fill a rectangle
+void Arduino_LCD::fillRect(int16_t x, int16_t y, int16_t w, int16_t h,
+  uint16_t color) {
+
+  // rudimentary clipping (drawChar w/big text requires this)
+  if((x >= _width) || (y >= _height)) return;
+  if((x + w - 1) >= _width)  w = _width  - x;
+  if((y + h - 1) >= _height) h = _height - y;
+
+  setAddrWindow(x, y, x+w-1, y+h-1);
+
+  uint8_t hi = color >> 8, lo = color;
+//  *rsport |=  rspinmask;
+//  *csport &= ~cspinmask;
+digitalWrite(_rs, HIGH);
+digitalWrite(_cs, LOW);
+  for(y=h; y>0; y--) {
+    for(x=w; x>0; x--) {
+      spiwrite(hi);
+      spiwrite(lo);
+//SPI.transfer(hi);
+//SPI.transfer(lo);
+    }
+  }
+
+//  *csport |= cspinmask;
+digitalWrite(_cs, HIGH);
+}
+
+
+// Pass 8-bit (each) R,G,B, get back 16-bit packed color
+uint16_t Arduino_LCD::Color565(uint8_t r, uint8_t g, uint8_t b) {
+  return ((r & 0xF8) << 8) | ((g & 0xFC) << 3) | (b >> 3);
+}
+
+
+#define MADCTL_MY  0x80
+#define MADCTL_MX  0x40
+#define MADCTL_MV  0x20
+#define MADCTL_ML  0x10
+#define MADCTL_RGB 0x08
+#define MADCTL_MH  0x04
+
+void Arduino_LCD::setRotation(uint8_t m) {
+
+  writecommand(ILI9163C_MADCTL);
+  rotation = m % 4; // can't be higher than 3
+  switch (rotation) {
+   case 0:
+    writedata(MADCTL_MX | MADCTL_MY | MADCTL_RGB);
+    _width  = ILI9163C_TFTWIDTH;
+    _height = ILI9163C_TFTHEIGHT;
+    break;
+   case 1:
+    writedata(MADCTL_MY | MADCTL_MV | MADCTL_RGB);
+    _width  = ILI9163C_TFTHEIGHT;
+    _height = ILI9163C_TFTWIDTH;
+    break;
+   case 2:
+    writedata(MADCTL_RGB);
+    _width  = ILI9163C_TFTWIDTH;
+    _height = ILI9163C_TFTHEIGHT;
+    break;
+   case 3:
+    writedata(MADCTL_MX | MADCTL_MV | MADCTL_RGB);
+    _width  = ILI9163C_TFTHEIGHT;
+    _height = ILI9163C_TFTWIDTH;
+    break;
+  }
+}
+
+
+void Arduino_LCD::invertDisplay(boolean i) {
+  writecommand(i ? ILI9163C_INVON : ILI9163C_INVOFF);
+}
+
+/* 
+  18, // there are 17 commands
+    ILI9163C_SWRESET,   DELAY,  //  1: Software reset, no args, w/delay
+      50,                     //     50 ms delay
+
+	0x11, 			//Exit Sleep
+	DELAY,50,
+
+	0x26, 			//Set Default Gamma
+	0x104,
+
+	//0xF2, //E0h & E1h Enable/Disable
+	//0x100,
+
+	0xB1,
+	0x10C,
+	0x114,
+
+	0xC0, //Set VRH1[4:0] & VC[2:0] for VCI1 & GVDD
+	0x10C,
+	0x105,
+
+	0xC1, //Set BT[2:0] for AVDD & VCL & VGH & VGL
+	0x102,
+
+	0xC5, //Set VMH[6:0] & VML[6:0] for VOMH & VCOML
+	0x129,
+	0x143,
+
+	0xC7,
+	0x140,
+
+	0x3a, //Set Color Format
+	0x105,
+
+	0x2A, //Set Column Address
+	0x100,
+	0x100,
+	0x100,
+	0x17F,
+
+	0x2B, //Set Page Address
+	0x100,
+	0x100,
+	0x100,
+	0x19F,
+
+	0x36, //Set Scanning Direction, RGB
+	0x1C0,
+
+	0xB7, //Set Source Output Direction
+	0x100,
+
+	0xf2, //Enable Gamma bit
+	0x101,
+
+	0xE0,
+	0x136,//p1
+	0x129,//p2
+	0x112,//p3
+	0x122,//p4
+	0x11C,//p5
+	0x115,//p6
+	0x142,//p7
+	0x1B7,//p8
+	0x12F,//p9
+	0x113,//p10
+	0x112,//p11
+	0x10A,//p12
+	0x111,//p13
+	0x10B,//p14
+	0x106,//p15
+
+	0xE1,
+	0x109,//p1
+	0x116,//p2
+	0x12D,//p3
+	0x10D,//p4
+	0x113,//p5
+	0x115,//p6
+	0x140,//p7
+	0x148,//p8
+	0x153,//p9
+	0x10C,//p10
+	0x11D,//p11
+	0x125,//p12
+	0x12E,//p13
+	0x134,//p14
+	0x139,//p15
+
+	0x33, // scroll setup
+	0x100,
+	0x100,
+	0x100,
+	0x1C1,
+	0x100,
+	0x100,
+
+	0x29,	// Display On
+	0x2C},	// write gram
+
+*/
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Arduino_LCD.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Arduino_LCD.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Arduino_LCD.h	(revision 136)
@@ -0,0 +1,141 @@
+/***************************************************
+  This is a library for the Adafruit 1.8" SPI display.
+  This library works with the Adafruit 1.8" TFT Breakout w/SD card
+  ----> http://www.adafruit.com/products/358
+  as well as Adafruit raw 1.8" TFT display
+  ----> http://www.adafruit.com/products/618
+ 
+  Check out the links above for our tutorials and wiring diagrams
+  These displays use SPI to communicate, 4 or 5 pins are required to
+  interface (RST is optional)
+  Adafruit invests time and resources providing this open source code,
+  please support Adafruit and open-source hardware by purchasing
+  products from Adafruit!
+
+  Written by Limor Fried/Ladyada for Adafruit Industries.
+  MIT license, all text above must be included in any redistribution
+ ****************************************************/
+
+#ifndef _ARDUINO_LCDH_
+#define _ARDUINO_LCDH_
+
+#if ARDUINO >= 100
+ #include "Arduino.h"
+ #include "Print.h"
+#else
+ #include "WProgram.h"
+#endif
+#include "utility/Adafruit_GFX.h"
+//#include <avr/pgmspace.h>
+
+// some flags for initR() :(
+#define INITR_GREENTAB 0x0
+#define INITR_REDTAB   0x1
+
+#define ILI9163C_TFTWIDTH  128
+#define ILI9163C_TFTHEIGHT 160
+
+#define ILI9163C_NOP     0x00
+#define ILI9163C_SWRESET 0x01
+#define ILI9163C_RDDID   0x04
+#define ILI9163C_RDDST   0x09
+
+#define ILI9163C_SLPIN   0x10
+#define ILI9163C_SLPOUT  0x11
+#define ILI9163C_PTLON   0x12
+#define ILI9163C_NORON   0x13
+
+#define ILI9163C_INVOFF  0x20
+#define ILI9163C_INVON   0x21
+#define ILI9163C_DISPOFF 0x28
+#define ILI9163C_DISPON  0x29
+#define ILI9163C_CASET   0x2A
+#define ILI9163C_RASET   0x2B
+#define ILI9163C_RAMWR   0x2C
+#define ILI9163C_RAMRD   0x2E
+
+#define ILI9163C_PTLAR   0x30
+#define ILI9163C_COLMOD  0x3A // this is interface pixel format, this might be the issue
+#define ILI9163C_MADCTL  0x36
+
+#define ILI9163C_FRMCTR1 0xB1
+#define ILI9163C_FRMCTR2 0xB2
+#define ILI9163C_FRMCTR3 0xB3
+#define ILI9163C_INVCTR  0xB4
+#define ILI9163C_DISSET5 0xB6
+
+#define ILI9163C_PWCTR1  0xC0
+#define ILI9163C_PWCTR2  0xC1
+#define ILI9163C_PWCTR3  0xC2
+#define ILI9163C_PWCTR4  0xC3
+#define ILI9163C_PWCTR5  0xC4
+#define ILI9163C_VMCTR1  0xC5
+
+#define ILI9163C_RDID1   0xDA
+#define ILI9163C_RDID2   0xDB
+#define ILI9163C_RDID3   0xDC
+#define ILI9163C_RDID4   0xDD
+
+#define ILI9163C_PWCTR6  0xFC
+
+#define ILI9163C_GMCTRP1 0xE0
+#define ILI9163C_GMCTRN1 0xE1
+
+// Color definitions
+#define	ILI9163C_BLACK   0x0000
+#define	ILI9163C_BLUE    0x001F
+#define	ILI9163C_RED     0xF800
+#define	ILI9163C_GREEN   0x07E0
+#define ILI9163C_CYAN    0x07FF
+#define ILI9163C_MAGENTA 0xF81F
+#define ILI9163C_YELLOW  0xFFE0  
+#define ILI9163C_WHITE   0xFFFF
+
+
+class Arduino_LCD : public Adafruit_GFX {
+
+ public:
+
+  Arduino_LCD(uint8_t CS, uint8_t RS, uint8_t SID, uint8_t SCLK, uint8_t RST);
+  Arduino_LCD(uint8_t CS, uint8_t RS, uint8_t RST);
+
+  void     initB(void),                             // for ST7735B displays
+           initR(uint8_t options = INITR_GREENTAB), // for ST7735R
+           setAddrWindow(uint8_t x0, uint8_t y0, uint8_t x1, uint8_t y1),
+           pushColor(uint16_t color),
+           fillScreen(uint16_t color),
+           drawPixel(int16_t x, int16_t y, uint16_t color),
+           drawFastVLine(int16_t x, int16_t y, int16_t h, uint16_t color),
+           drawFastHLine(int16_t x, int16_t y, int16_t w, uint16_t color),
+           fillRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color),
+           setRotation(uint8_t r),
+           invertDisplay(boolean i);
+  uint16_t Color565(uint8_t r, uint8_t g, uint8_t b);
+
+  /* These are not for current use, 8-bit protocol only!
+  uint8_t  readdata(void),
+           readcommand8(uint8_t);
+  uint16_t readcommand16(uint8_t);
+  uint32_t readcommand32(uint8_t);
+  void     dummyclock(void);
+  */
+
+ private:
+
+  void     spiwrite(uint8_t),
+           writecommand(uint8_t c),
+           writedata(uint8_t d),
+//           commandList(prog_uchar *addr),
+//           commonInit(prog_uchar *cmdList);
+           commandList(uint8_t *addr),
+           commonInit(uint8_t *cmdList);
+//uint8_t  spiread(void);
+
+  boolean  hwSPI;
+  volatile uint8_t *dataport, *clkport, *csport, *rsport;
+  uint8_t  _cs, _rs, _rst, _sid, _sclk,
+           datapinmask, clkpinmask, cspinmask, rspinmask,
+           colstart, rowstart; // some displays need this changed
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Compass.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Compass.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Compass.cpp	(revision 136)
@@ -0,0 +1,34 @@
+#include "Compass.h"
+#include <Wire.h>
+
+void Compass::begin(){
+	Wire.begin();
+}
+float Compass::getReading(){
+	_beginTransmission();
+	_endTransmission();
+	
+  //time delays required by HMC6352 upon receipt of the command
+  //Get Data. Compensate and Calculate New Heading : 6ms
+  delay(6);
+
+  Wire.requestFrom(HMC6352SlaveAddress, 2); //get the two data bytes, MSB and LSB
+
+  //"The heading output data will be the value in tenths of degrees
+  //from zero to 3599 and provided in binary format over the two bytes."
+  byte MSB = Wire.read();
+  byte LSB = Wire.read();
+
+  float headingSum = (MSB << 8) + LSB; //(MSB / LSB sum)
+  float headingInt = headingSum / 10; 
+  
+  return headingInt;
+}
+
+void Compass::_beginTransmission(){
+  Wire.beginTransmission(HMC6352SlaveAddress);
+  Wire.write(HMC6352ReadAddress);
+}
+void Compass::_endTransmission(){
+  Wire.endTransmission();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Compass.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Compass.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Compass.h	(revision 136)
@@ -0,0 +1,24 @@
+#ifndef Compass_h
+#define Compass_h
+
+#if ARDUINO >= 100
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+
+//0x21==0x42>>1, from bildr's code
+#define HMC6352SlaveAddress 0x21
+#define HMC6352ReadAddress 0x41
+
+class Compass{
+	public:
+		void begin();
+		float getReading();
+	private:
+		void _beginTransmission();
+		void _endTransmission();
+
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EEPROM_I2C.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EEPROM_I2C.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EEPROM_I2C.cpp	(revision 136)
@@ -0,0 +1,62 @@
+#include "EEPROM_I2C.h"
+#include <Wire.h>
+
+#if ARDUINO >= 100
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+
+void EEPROM_I2C::begin(){
+  Wire.begin();
+}
+
+void EEPROM_I2C::writeByte(unsigned int eeaddress, byte data){
+  int rdata = data;
+  this->_beginTransmission(eeaddress);
+  Wire.write(rdata);
+  this->_endTransmission();
+}
+
+byte EEPROM_I2C::readByte(unsigned int eeaddress){
+  int rdata;
+  this->_beginTransmission(eeaddress);
+  this->_endTransmission();
+  
+  Wire.requestFrom(DEVICEADDRESS,1);
+  if (Wire.available()) rdata = Wire.read();
+  return rdata;
+}
+
+void EEPROM_I2C::writePage(unsigned int eeaddress, byte* data, byte length ){
+  this->_beginTransmission(eeaddress);
+  
+  byte c;
+  
+  for ( c = 0; c < length; c++)
+    Wire.write(data[c]);
+	
+  this->_endTransmission();
+  
+  delay(10);                           // need some delay
+}
+
+void EEPROM_I2C::readBuffer(unsigned int eeaddress, byte *buffer, int length ){
+  this->_beginTransmission(eeaddress);
+  this->_endTransmission();
+  Wire.requestFrom(DEVICEADDRESS,length);
+
+  for ( int c = 0; c < length; c++ )
+    if (Wire.available()) buffer[c] = Wire.read();
+}
+
+
+
+void EEPROM_I2C::_beginTransmission(unsigned int eeaddress){
+  Wire.beginTransmission(DEVICEADDRESS);
+  Wire.write((eeaddress >> 8));    // Address High Byte
+  Wire.write((eeaddress & 0xFF));  // Address Low Byte
+}
+void EEPROM_I2C::_endTransmission(){
+  Wire.endTransmission();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EEPROM_I2C.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EEPROM_I2C.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EEPROM_I2C.h	(revision 136)
@@ -0,0 +1,31 @@
+#ifndef EEPROM_I2C_h
+#define EEPROM_I2C_h
+
+#if ARDUINO >= 100
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+
+#define EE24LC512MAXBYTES 64000
+#define DEVICEADDRESS 0x50
+
+class EEPROM_I2C{
+	public:
+		void begin();
+		
+		void writeByte(unsigned int eeaddresspage, byte data);
+		byte readByte(unsigned int eeaddresspage);
+		
+		void writePage(unsigned int eeaddresspage, byte* data, byte length );
+		void readBuffer(unsigned int eeaddress, byte *buffer, int length );
+		
+		//uint16_t readPixel(uint16_t theMemoryAddress);
+		//void readImage(uint16_t theMemoryAddress, int width, int height);
+			
+	protected:
+		void _beginTransmission(unsigned int eeaddress);
+		void _endTransmission();
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EasyTransfer2.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EasyTransfer2.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EasyTransfer2.cpp	(revision 136)
@@ -0,0 +1,152 @@
+#include "EasyTransfer2.h"
+
+
+
+
+//Captures address and size of struct
+void EasyTransfer2::begin(HardwareSerial *theSerial){
+	_serial = theSerial;
+	
+	//dynamic creation of rx parsing buffer in RAM
+	//rx_buffer = (uint8_t*) malloc(size);
+	
+	resetData();
+}
+
+void EasyTransfer2::writeByte(uint8_t dat){
+	if(position<20)
+		data[position++]=dat;
+		size++;
+}
+void EasyTransfer2::writeInt(int dat){
+	if(position<19){
+		data[position++]=dat>>8;
+		data[position++]=dat;
+		size+=2;
+	}
+}
+uint8_t EasyTransfer2::readByte(){
+	if(position>=size)return 0;
+	return data[position++];
+}
+int EasyTransfer2::readInt(){
+	if(position+1>=size)return 0;
+	int dat_1=data[position++]<<8;
+	int dat_2=data[position++];
+	int dat= dat_1 | dat_2;
+	return dat;
+}
+
+void EasyTransfer2::resetData(){
+	for(int i=0;i<20;i++){
+		data[i]=0;
+	}
+	size=0;
+	position=0;
+}
+
+//Sends out struct in binary, with header, length info and checksum
+void EasyTransfer2::sendData(){
+  uint8_t CS = size;
+  _serial->write(0x06);
+  _serial->write(0x85);
+  _serial->write(size);
+  for(int i = 0; i<size; i++){
+    CS^=*(data+i);
+    _serial->write(*(data+i));
+	//Serial.print(*(data+i));
+	//Serial.print(",");
+  }
+  //Serial.println("");
+  _serial->write(CS);
+  
+  resetData();
+}
+
+boolean EasyTransfer2::receiveData(){
+  
+  //start off by looking for the header bytes. If they were already found in a previous call, skip it.
+  if(rx_len == 0){
+  //this size check may be redundant due to the size check below, but for now I'll leave it the way it is.
+    if(_serial->available() >= 3){
+	//this will block until a 0x06 is found or buffer size becomes less then 3.
+      while(_serial->read() != 0x06) {
+		//This will trash any preamble junk in the serial buffer
+		//but we need to make sure there is enough in the buffer to process while we trash the rest
+		//if the buffer becomes too empty, we will escape and try again on the next call
+		if(_serial->available() < 3)
+			return false;
+		}
+		//Serial.println("head");
+      if (_serial->read() == 0x85){
+        rx_len = _serial->read();
+		//Serial.print("rx_len:");
+		//Serial.println(rx_len);
+		resetData();
+
+		//make sure the binary structs on both Arduinos are the same size.
+        /*if(rx_len != size){
+          rx_len = 0;
+          return false;
+        }*/
+      }
+    }
+	//Serial.println("nothing");
+  }
+  
+  //we get here if we already found the header bytes, the struct size matched what we know, and now we are byte aligned.
+  if(rx_len != 0){
+	
+    while(_serial->available() && rx_array_inx <= rx_len){
+      data[rx_array_inx++] = _serial->read();
+    }
+    
+    if(rx_len == (rx_array_inx-1)){
+      //seem to have got whole message
+      //last uint8_t is CS
+      calc_CS = rx_len;
+	  //Serial.print("len:");
+	  //Serial.println(rx_len);
+      for (int i = 0; i<rx_len; i++){
+        calc_CS^=data[i];
+		//Serial.print("m");
+		//Serial.print(data[i]);
+		//Serial.print(",");
+      } 
+	  //Serial.println();
+      //Serial.print(data[rx_array_inx-1]);
+	  //Serial.print(" ");
+	  //Serial.println(calc_CS);
+	  
+      if(calc_CS == data[rx_array_inx-1]){//CS good
+		//resetData();
+        //memcpy(data,d,rx_len);
+		for(int i=0;i<20;i++){
+			//Serial.print(data[i]);
+			//Serial.print(",");
+		}
+		//Serial.println("");
+		size=rx_len;
+		rx_len = 0;
+		rx_array_inx = 0;
+		return true;
+		}
+		
+	  else{
+  		//Serial.println("CS");
+		resetData();
+	  //failed checksum, need to clear this out anyway
+		rx_len = 0;
+		rx_array_inx = 0;
+		return false;
+	  }
+        
+    }
+  }
+  //Serial.print(rx_len);
+  //Serial.print(" ");
+  //Serial.print(rx_array_inx);
+  //Serial.print(" ");
+  //Serial.println("Short");
+  return false;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EasyTransfer2.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EasyTransfer2.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/EasyTransfer2.h	(revision 136)
@@ -0,0 +1,76 @@
+/******************************************************************
+*  EasyTransfer Arduino Library 
+*		details and example sketch: 
+*			http://www.billporter.info/easytransfer-arduino-library/
+*
+*		Brought to you by:
+*              Bill Porter
+*              www.billporter.info
+*
+*		See Readme for other info and version history
+*	
+*  
+*This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or(at your option) any later version.
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+<http://www.gnu.org/licenses/>
+*
+*This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 Unported License. 
+*To view a copy of this license, visit http://creativecommons.org/licenses/by-sa/3.0/ or
+*send a letter to Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, 94041, USA.
+******************************************************************/
+#ifndef EasyTransfer2_h
+#define EasyTransfer2_h
+
+
+//make it a little prettier on the front end. 
+#define details(name) (byte*)&name,sizeof(name)
+
+//Not neccessary, but just in case. 
+#if ARDUINO > 22
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+#include "HardwareSerial.h"
+//#include <NewSoftSerial.h>
+#include <math.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <avr/io.h>
+
+class EasyTransfer2 {
+public:
+void begin(HardwareSerial *theSerial);
+//void begin(uint8_t *, uint8_t, NewSoftSerial *theSerial);
+void sendData();
+boolean receiveData();
+
+void writeByte(uint8_t dat);
+void writeInt(int dat);
+uint8_t readByte();
+int readInt();
+
+
+private:
+HardwareSerial *_serial;
+
+void resetData();
+
+uint8_t data[20];	//data storage, for both read and send
+uint8_t position;
+uint8_t size; //size of data in bytes. Both for read and send
+//uint8_t * address;  //address of struct
+//uint8_t size;       //size of struct
+//uint8_t * rx_buffer; //address for temporary storage and parsing buffer
+//uint8_t rx_buffer[20];
+uint8_t rx_array_inx;  //index for RX parsing buffer
+uint8_t rx_len;		//RX packet length according to the packet
+uint8_t calc_CS;	   //calculated Chacksum
+};
+
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16.cpp	(revision 136)
@@ -0,0 +1,990 @@
+/* Arduino FAT16 Library
+ * Copyright (C) 2008 by William Greiman
+ *
+ * This file is part of the Arduino FAT16 Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Fat16 Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#include <avr/pgmspace.h>
+#if ARDUINO < 100
+#include <WProgram.h>
+#else  // ARDUINO
+#include <Arduino.h>
+#endif  // ARDUINO
+#include <Fat16.h>
+//-----------------------------------------------------------------------------
+// volume info
+uint8_t  Fat16::volumeInitialized_ = 0;  // true if FAT16 volume is valid
+uint8_t  Fat16::fatCount_;               // number of file allocation tables
+uint8_t  Fat16::blocksPerCluster_;       // must be power of 2
+uint16_t Fat16::rootDirEntryCount_;      // should be 512 for FAT16
+fat_t    Fat16::blocksPerFat_;           // number of blocks in one FAT
+fat_t    Fat16::clusterCount_;           // total clusters in volume
+uint32_t Fat16::fatStartBlock_;          // start of first FAT
+uint32_t Fat16::rootDirStartBlock_;      // start of root dir
+uint32_t Fat16::dataStartBlock_;         // start of data clusters
+//------------------------------------------------------------------------------
+// raw block cache
+SdCard *Fat16::rawDev_ = 0;             // class for block read and write
+uint32_t Fat16::cacheBlockNumber_ = 0XFFFFFFFF;  // init to invalid block number
+cache16_t  Fat16::cacheBuffer_;         // 512 byte cache for SdCard
+uint8_t  Fat16::cacheDirty_ = 0;        // cacheFlush() will write block if true
+uint32_t Fat16::cacheMirrorBlock_ = 0;  // mirror  block for second FAT
+//------------------------------------------------------------------------------
+// callback function for date/time
+void (*Fat16::dateTime_)(uint16_t* date, uint16_t* time) = NULL;
+
+#if ALLOW_DEPRECATED_FUNCTIONS
+void (*Fat16::oldDateTime_)(uint16_t& date, uint16_t& time) = NULL;  // NOLINT
+#endif  // ALLOW_DEPRECATED_FUNCTIONS
+//------------------------------------------------------------------------------
+// format 8.3 name for directory entry
+static uint8_t make83Name(const char* str, uint8_t* name) {
+  uint8_t c;
+  uint8_t n = 7;  // max index for part before dot
+  uint8_t i = 0;
+  // blank fill name and extension
+  while (i < 11) name[i++] = ' ';
+  i = 0;
+  while ((c = *str++) != '\0') {
+    if (c == '.') {
+      if (n == 10) return false;  // only one dot allowed
+      n = 10;  // max index for full 8.3 name
+      i = 8;   // place for extension
+    } else {
+      // illegal FAT characters
+      PGM_P p = PSTR("|<>^+=?/[];,*\"\\");
+      uint8_t b;
+      while ((b = pgm_read_byte(p++))) if (b == c) return false;
+      // check length and only allow ASCII printable characters
+      if (i > n || c < 0X21 || c > 0X7E) return false;
+      // only upper case allowed in 8.3 names - convert lower to upper
+      name[i++] = c < 'a' || c > 'z' ?  c : c + ('A' - 'a');
+    }
+  }
+  // must have a file name, extension is optional
+  return name[0] != ' ';
+}
+//==============================================================================
+// Fat16 member functions
+//------------------------------------------------------------------------------
+uint8_t Fat16::addCluster(void) {
+  // start search after last cluster of file or at cluster two in FAT
+  fat_t freeCluster = curCluster_ ? curCluster_ : 1;
+  for (fat_t i = 0; ; i++) {
+    // return no free clusters
+    if (i >= clusterCount_) return false;
+    // Fat has clusterCount + 2 entries
+    if (freeCluster > clusterCount_) freeCluster = 1;
+    freeCluster++;
+    fat_t value;
+    if (!fatGet(freeCluster, &value)) return false;
+    if (value == 0) break;
+  }
+  // mark cluster allocated
+  if (!fatPut(freeCluster, FAT16EOC)) return false;
+
+  if (curCluster_ != 0) {
+    // link cluster to chain
+    if (!fatPut(curCluster_, freeCluster)) return false;
+  } else {
+    // first cluster of file so update directory entry
+    flags_ |= F_FILE_DIR_DIRTY;
+    firstCluster_ = freeCluster;
+  }
+  curCluster_ = freeCluster;
+  return true;
+}
+//------------------------------------------------------------------------------
+//
+dir_t* Fat16::cacheDirEntry(uint16_t index, uint8_t action) {
+  if (index >= rootDirEntryCount_) return NULL;
+  if (!cacheRawBlock(rootDirStartBlock_ + (index >> 4), action)) return NULL;
+  return &cacheBuffer_.dir[index & 0XF];
+}
+//------------------------------------------------------------------------------
+//
+uint8_t Fat16::cacheFlush(void) {
+  if (cacheDirty_) {
+    if (!rawDev_->writeBlock(cacheBlockNumber_, cacheBuffer_.data)) {
+      return false;
+    }
+    // mirror FAT tables
+    if (cacheMirrorBlock_) {
+      if (!rawDev_->writeBlock(cacheMirrorBlock_, cacheBuffer_.data)) {
+        return false;
+      }
+      cacheMirrorBlock_ = 0;
+    }
+    cacheDirty_ = 0;
+  }
+  return true;
+}
+//------------------------------------------------------------------------------
+//
+uint8_t Fat16::cacheRawBlock(uint32_t blockNumber, uint8_t action) {
+  if (cacheBlockNumber_ != blockNumber) {
+    if (!cacheFlush()) return false;
+    if (!rawDev_->readBlock(blockNumber, cacheBuffer_.data)) return false;
+    cacheBlockNumber_ = blockNumber;
+  }
+  cacheDirty_ |= action;
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ *  Close a file and force cached data and directory information
+ *  to be written to the storage device.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include no file is open or an I/O error.
+ */
+uint8_t Fat16::close(void) {
+  if (!sync()) return false;
+  flags_ = 0;
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ * Return a files directory entry
+ *
+ * \param[out] dir Location for return of the files directory entry.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t Fat16::dirEntry(dir_t* dir) {
+  if (!sync()) return false;
+  dir_t* p = cacheDirEntry(dirEntryIndex_, CACHE_FOR_WRITE);
+  if (!p) return false;
+  memcpy(dir, p, sizeof(dir_t));
+  return true;
+}
+//------------------------------------------------------------------------------
+uint8_t Fat16::fatGet(fat_t cluster, fat_t* value) {
+  if (cluster > (clusterCount_ + 1)) return false;
+  uint32_t lba = fatStartBlock_ + (cluster >> 8);
+  if (lba != cacheBlockNumber_) {
+    if (!cacheRawBlock(lba)) return false;
+  }
+  *value = cacheBuffer_.fat[cluster & 0XFF];
+  return true;
+}
+//------------------------------------------------------------------------------
+uint8_t Fat16::fatPut(fat_t cluster, fat_t value) {
+  if (cluster < 2) return false;
+  if (cluster > (clusterCount_ + 1)) return false;
+  uint32_t lba = fatStartBlock_ + (cluster >> 8);
+  if (lba != cacheBlockNumber_) {
+    if (!cacheRawBlock(lba)) return false;
+  }
+  cacheBuffer_.fat[cluster & 0XFF] = value;
+  cacheSetDirty();
+  // mirror second FAT
+  if (fatCount_ > 1) cacheMirrorBlock_ = lba + blocksPerFat_;
+  return true;
+}
+//------------------------------------------------------------------------------
+// free a cluster chain
+uint8_t Fat16::freeChain(fat_t cluster) {
+  while (1) {
+    fat_t next;
+    if (!fatGet(cluster, &next)) return false;
+    if (!fatPut(cluster, 0)) return false;
+    if (isEOC(next)) return true;
+    cluster = next;
+  }
+}
+//------------------------------------------------------------------------------
+/**
+ *  Initialize a FAT16 volume.
+ *
+ * \param[in] dev The SdCard where the volume is located.
+ *
+ * \param[in] part The partition to be used.  Legal values for \a part are
+ * 1-4 to use the corresponding partition on a device formatted with
+ * a MBR, Master Boot Record, or zero if the device is formatted as
+ * a super floppy with the FAT boot sector in block zero.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.  reasons for
+ * failure include not finding a valid FAT16 file system in the
+ * specified partition, a call to init() after a volume has
+ * been successful initialized or an I/O error.
+ *
+ */
+uint8_t Fat16::init(SdCard* dev, uint8_t part) {
+  // error if invalid partition
+  if (part > 4) return false;
+  rawDev_ = dev;
+  uint32_t volumeStartBlock = 0;
+  // if part == 0 assume super floppy with FAT16 boot sector in block zero
+  // if part > 0 assume mbr volume with partition table
+  if (part) {
+    if (!cacheRawBlock(volumeStartBlock)) return false;
+    volumeStartBlock = cacheBuffer_.mbr.part[part - 1].firstSector;
+  }
+  if (!cacheRawBlock(volumeStartBlock)) return false;
+  // check boot block signature
+  if (cacheBuffer_.data[510] != BOOTSIG0 ||
+      cacheBuffer_.data[511] != BOOTSIG1) return false;
+  bpb_t* bpb = &cacheBuffer_.fbs.bpb;
+  fatCount_ = bpb->fatCount;
+  blocksPerCluster_ = bpb->sectorsPerCluster;
+  blocksPerFat_ = bpb->sectorsPerFat16;
+  rootDirEntryCount_ = bpb->rootDirEntryCount;
+  fatStartBlock_ = volumeStartBlock + bpb->reservedSectorCount;
+  rootDirStartBlock_ = fatStartBlock_ + bpb->fatCount*bpb->sectorsPerFat16;
+  dataStartBlock_ = rootDirStartBlock_
+                    + ((32*bpb->rootDirEntryCount + 511)/512);
+  uint32_t totalBlocks = bpb->totalSectors16 ?
+                               bpb->totalSectors16 : bpb->totalSectors32;
+  clusterCount_ = (totalBlocks - (dataStartBlock_ - volumeStartBlock))
+                  /bpb->sectorsPerCluster;
+  // verify valid FAT16 volume
+  if (bpb->bytesPerSector != 512       // only allow 512 byte blocks
+     || bpb->sectorsPerFat16 == 0      // zero for FAT32
+     || clusterCount_ < 4085           // FAT12 if true
+     || totalBlocks > 0X800000         // Max size for FAT16 volume
+     || bpb->reservedSectorCount == 0  // invalid volume
+     || bpb->fatCount == 0             // invalid volume
+     || bpb->sectorsPerFat16 < (clusterCount_ >> 8)  // invalid volume
+     || bpb->sectorsPerCluster == 0   // invalid volume
+        // power of 2 test
+     || bpb->sectorsPerCluster & (bpb->sectorsPerCluster - 1)) {
+    // not a usable FAT16 bpb
+    return false;
+  }
+  volumeInitialized_ = 1;
+  return true;
+}
+//------------------------------------------------------------------------------
+/** List directory contents to Serial.
+ *
+ * \param[in] flags The inclusive OR of
+ *
+ * LS_DATE - %Print file modification date
+ *
+ * LS_SIZE - %Print file size.
+ */
+void Fat16::ls(uint8_t flags) {
+  dir_t d;
+  for (uint16_t index = 0; readDir(&d, &index, DIR_ATT_VOLUME_ID); index++) {
+    // print file name with possible blank fill
+    printDirName(d, flags & (LS_DATE | LS_SIZE) ? 14 : 0);
+
+    // print modify date/time if requested
+    if (flags & LS_DATE) {
+       printFatDate(d.lastWriteDate);
+       Serial.write(' ');
+       printFatTime(d.lastWriteTime);
+    }
+
+    // print size if requested
+    if (DIR_IS_FILE(&d) && (flags & LS_SIZE)) {
+      Serial.write(' ');
+      Serial.print(d.fileSize);
+    }
+    Serial.println();
+  }
+}
+//------------------------------------------------------------------------------
+/**
+ * Open a file by file name.
+ *
+ * \note The file must be in the root directory and must have a DOS
+ * 8.3 name.
+ *
+ * \param[in] fileName A valid 8.3 DOS name for a file in the root directory.
+ *
+ * \param[in] oflag Values for \a oflag are constructed by a bitwise-inclusive
+ *  OR of flags from the following list
+ *
+ * O_READ - Open for reading.
+ *
+ * O_RDONLY - Same as O_READ.
+ *
+ * O_WRITE - Open for writing.
+ *
+ * O_WRONLY - Same as O_WRITE.
+ *
+ * O_RDWR - Open for reading and writing.
+ *
+ * O_APPEND - If set, the file offset shall be set to the end of the
+ * file prior to each write.
+ *
+ * O_CREAT - If the file exists, this flag has no effect except as noted
+ * under O_EXCL below. Otherwise, the file shall be created
+ *
+ * O_EXCL - If O_CREAT and O_EXCL are set, open() shall fail if the file exists.
+ *
+ * O_SYNC - Call sync() after each write.  This flag should not be used with
+ * write(uint8_t), write_P(PGM_P), writeln_P(PGM_P), or the Arduino Print class.
+ * These functions do character a time writes so sync() will be called
+ * after each byte.
+ *
+ * O_TRUNC - If the file exists and is a regular file, and the file is
+ * successfully opened and is not read only, its length shall be truncated to 0.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include the FAT volume has not been initialized,
+ * a file is already open, \a fileName is invalid, the file does not exist,
+ * is a directory, or can't be opened in the access mode specified by oflag.
+ */
+uint8_t Fat16::open(const char* fileName, uint8_t oflag) {
+  uint8_t dname[11];   // name formated for dir entry
+  int16_t empty = -1;  // index of empty slot
+  dir_t* p;            // pointer to cached dir entry
+
+  if (!volumeInitialized_ || isOpen()) return false;
+
+  // error if invalid name
+  if (!make83Name(fileName, dname)) return false;
+
+  for (uint16_t index = 0; index < rootDirEntryCount_; index++) {
+    if (!(p = cacheDirEntry(index))) return false;
+    if (p->name[0] == DIR_NAME_FREE || p->name[0] == DIR_NAME_DELETED) {
+      // remember first empty slot
+      if (empty < 0) empty = index;
+      // done if no entries follow
+      if (p->name[0] == DIR_NAME_FREE) break;
+    } else if (!memcmp(dname, p->name, 11)) {
+      // don't open existing file if O_CREAT and O_EXCL
+      if ((oflag & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL)) return false;
+
+      // open existing file
+      return open(index, oflag);
+    }
+  }
+  // error if directory is full
+  if (empty < 0) return false;
+
+  // only create file if O_CREAT and O_WRITE
+  if ((oflag & (O_CREAT | O_WRITE)) != (O_CREAT | O_WRITE)) return false;
+
+  if (!(p = cacheDirEntry(empty, CACHE_FOR_WRITE))) return false;
+
+  // initialize as empty file
+  memset(p, 0, sizeof(dir_t));
+  memcpy(p->name, dname, 11);
+
+  // set timestamps
+  if (dateTime_) {
+    // call user function
+    dateTime_(&p->creationDate, &p->creationTime);
+  } else {
+    // use default date/time
+    p->creationDate = FAT_DEFAULT_DATE;
+    p->creationTime = FAT_DEFAULT_TIME;
+  }
+  p->lastAccessDate = p->creationDate;
+  p->lastWriteDate = p->creationDate;
+  p->lastWriteTime = p->creationTime;
+
+  // insure created directory entry will be written to storage device
+  if (!cacheFlush()) return false;
+
+  // open entry
+  return open(empty, oflag);
+}
+//------------------------------------------------------------------------------
+/**
+ * Open a file by file index.
+ *
+ * \param[in] index The root directory index of the file to be opened.  See \link
+ *  Fat16::readDir() readDir()\endlink.
+ *
+ * \param[in] oflag  See \link Fat16::open(const char*, uint8_t)\endlink.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include the FAT volume has not been initialized,
+ * a file is already open, \a index is invalid or is not the index of a
+ * file or the file cannot be opened in the access mode specified by oflag.
+ */
+uint8_t Fat16::open(uint16_t index, uint8_t oflag) {
+  if (!volumeInitialized_ || isOpen()) return false;
+  if ((oflag & O_TRUNC) && !(oflag & O_WRITE)) return false;
+  dir_t* d = cacheDirEntry(index);
+  // if bad file index or I/O error
+  if (!d) return false;
+
+  // error if unused entry
+  if (d->name[0] == DIR_NAME_FREE || d->name[0] == DIR_NAME_DELETED) {
+    return false;
+  }
+  // error if long name, volume label or subdirectory
+  if ((d->attributes & (DIR_ATT_VOLUME_ID | DIR_ATT_DIRECTORY)) != 0) {
+    return false;
+  }
+  // don't allow write or truncate if read-only
+  if (d->attributes & DIR_ATT_READ_ONLY) {
+    if (oflag & (O_WRITE | O_TRUNC)) return false;
+  }
+
+  curCluster_ = 0;
+  curPosition_ = 0;
+  dirEntryIndex_ = index;
+  fileSize_ = d->fileSize;
+  firstCluster_ = d->firstClusterLow;
+  flags_ = oflag & (O_ACCMODE | O_SYNC | O_APPEND);
+
+  if (oflag & O_TRUNC ) return truncate(0);
+  return true;
+}
+//------------------------------------------------------------------------------
+/** %Print the name field of a directory entry in 8.3 format to Serial.
+ *
+ * \param[in] dir The directory structure containing the name.
+ * \param[in] width Blank fill name if length is less than \a width.
+ */
+void Fat16::printDirName(const dir_t& dir, uint8_t width) {
+  uint8_t w = 0;
+  for (uint8_t i = 0; i < 11; i++) {
+    if (dir.name[i] == ' ') continue;
+    if (i == 8) {
+      Serial.write('.');
+      w++;
+    }
+    Serial.write(dir.name[i]);
+    w++;
+  }
+  if (DIR_IS_SUBDIR(&dir)) {
+    Serial.write('/');
+    w++;
+  }
+  while (w < width) {
+    Serial.write(' ');
+    w++;
+  }
+}
+//------------------------------------------------------------------------------
+/** %Print a directory date field to Serial.
+ *
+ *  Format is yyyy-mm-dd.
+ *
+ * \param[in] fatDate The date field from a directory entry.
+ */
+void Fat16::printFatDate(uint16_t fatDate) {
+  Serial.print(FAT_YEAR(fatDate));
+  Serial.write('-');
+  printTwoDigits(FAT_MONTH(fatDate));
+  Serial.write('-');
+  printTwoDigits(FAT_DAY(fatDate));
+}
+//------------------------------------------------------------------------------
+/** %Print a directory time field to Serial.
+ *
+ * Format is hh:mm:ss.
+ *
+ * \param[in] fatTime The time field from a directory entry.
+ */
+void Fat16::printFatTime(uint16_t fatTime) {
+  printTwoDigits(FAT_HOUR(fatTime));
+  Serial.write(':');
+  printTwoDigits(FAT_MINUTE(fatTime));
+  Serial.write(':');
+  printTwoDigits(FAT_SECOND(fatTime));
+}
+
+//------------------------------------------------------------------------------
+/** %Print a value as two digits to Serial.
+ *
+ * \param[in] v Value to be printed, 0 <= \a v <= 99
+ */
+void Fat16::printTwoDigits(uint8_t v) {
+  char str[3];
+  str[0] = '0' + v/10;
+  str[1] = '0' + v % 10;
+  str[2] = 0;
+  Serial.print(str);
+}
+//------------------------------------------------------------------------------
+/**
+ * Read the next byte from a file.
+ *
+ * \return For success read returns the next byte in the file as an int.
+ * If an error occurs or end of file is reached -1 is returned.
+ */
+int16_t Fat16::read(void) {
+  uint8_t b;
+  return read(&b, 1) == 1 ? b : -1;
+}
+//------------------------------------------------------------------------------
+/**
+ * Read data from a file at starting at the current file position.
+ *
+ * \param[out] buf Pointer to the location that will receive the data.
+ *
+ * \param[in] nbyte Maximum number of bytes to read.
+ *
+ * \return For success read returns the number of bytes read.
+ * A value less than \a nbyte, including zero, may be returned
+ * if end of file is reached.
+ * If an error occurs, read returns -1.  Possible errors include
+ * read called before a file has been opened, the file has not been opened in
+ * read mode, a corrupt file system, or an I/O error.
+ */
+int16_t Fat16::read(void* buf, uint16_t nbyte) {
+  // convert void pointer to uin8_t pointer
+  uint8_t* dst = reinterpret_cast<uint8_t*>(buf);
+
+  // error if not open for read
+  if (!(flags_ & O_READ)) return -1;
+
+  // don't read beyond end of file
+  if ((curPosition_ + nbyte) > fileSize_) nbyte = fileSize_ - curPosition_;
+
+  // bytes left to read in loop
+  uint16_t nToRead = nbyte;
+  while (nToRead > 0) {
+    uint8_t blkOfCluster = blockOfCluster(curPosition_);
+    uint16_t blockOffset = cacheDataOffset(curPosition_);
+    if (blkOfCluster == 0 && blockOffset == 0) {
+      // start next cluster
+      if (curCluster_ == 0) {
+        curCluster_ = firstCluster_;
+      } else {
+        if (!fatGet(curCluster_, &curCluster_)) return -1;
+      }
+      // return error if bad cluster chain
+      if (curCluster_ < 2 || isEOC(curCluster_)) return -1;
+    }
+    // cache data block
+    if (!cacheRawBlock(dataBlockLba(curCluster_, blkOfCluster))) return -1;
+
+    // location of data in cache
+    uint8_t* src = cacheBuffer_.data + blockOffset;
+
+    // max number of byte available in block
+    uint16_t n = 512 - blockOffset;
+
+    // lesser of available and amount to read
+    if (n > nToRead) n = nToRead;
+
+    // copy data to caller
+    memcpy(dst, src, n);
+
+    curPosition_ += n;
+    dst += n;
+    nToRead -= n;
+  }
+  return nbyte;
+}
+//------------------------------------------------------------------------------
+/**
+ *  Read the next short, 8.3, directory entry.
+ *
+ *  Unused entries and entries for long names are skipped.
+ *
+ * \param[out] dir Location that will receive the entry.
+ *
+ * \param[in,out] index The search starts at \a index and \a index is
+ * updated with the root directory index of the found directory entry.
+ * If the entry is a file, it may be opened by calling
+ * \link Fat16::open(uint16_t, uint8_t) \endlink.
+ *
+ * \param[in] skip Skip entries that have these attributes. If \a skip
+ * is not specified, the default is to skip the volume label and directories.
+ *
+ * \return The value one, true, is returned for success and the value zero,
+ * false, is returned if an error occurs or the end of the root directory is
+ * reached.  On success, \a entry is set to the index of the found directory
+ * entry.
+ */
+uint8_t Fat16::readDir(dir_t* dir, uint16_t* index, uint8_t skip) {
+  dir_t* p;
+  for (uint16_t i = *index; ; i++) {
+    if (i >= rootDirEntryCount_) return false;
+    if (!(p = cacheDirEntry(i))) return false;
+
+    // done if beyond last used entry
+    if (p->name[0] == DIR_NAME_FREE) return false;
+
+    // skip deleted entry
+    if (p->name[0] == DIR_NAME_DELETED) continue;
+
+    // skip long names
+    if ((p->attributes & DIR_ATT_LONG_NAME_MASK) == DIR_ATT_LONG_NAME) continue;
+
+    // skip if attribute match
+    if (p->attributes & skip) continue;
+
+    // return found index
+    *index = i;
+    break;
+  }
+  memcpy(dir, p, sizeof(dir_t));
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ * Remove a file.  The directory entry and all data for the file are deleted.
+ *
+ * \note This function should not be used to delete the 8.3 version of a
+ * file that has a long name. For example if a file has the long name
+ * "New Text Document.txt" you should not delete the 8.3 name "NEWTEX~1.TXT".
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include the file is not open for write
+ * or an I/O error occurred.
+ */
+uint8_t Fat16::remove(void) {
+  // error if file is not open for write
+  if (!(flags_ & O_WRITE)) return false;
+  if (firstCluster_) {
+    if (!freeChain(firstCluster_)) return false;
+  }
+  dir_t* d = cacheDirEntry(dirEntryIndex_, CACHE_FOR_WRITE);
+  if (!d) return false;
+  d->name[0] = DIR_NAME_DELETED;
+  flags_ = 0;
+  return cacheFlush();
+}
+//------------------------------------------------------------------------------
+/**
+ * Remove a file.
+ *
+ * The directory entry and all data for the file are deleted.
+ *
+ * \param[in] fileName The name of the file to be removed.
+ *
+ * \note This function should not be used to delete the 8.3 version of a
+ * file that has a long name. For example if a file has the long name
+ * "New Text Document.txt" you should not delete the 8.3 name "NEWTEX~1.TXT".
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include the file is read only, \a fileName is not found
+ * or an I/O error occurred.
+ */
+uint8_t Fat16::remove(const char* fileName) {
+  Fat16 file;
+  if (!file.open(fileName, O_WRITE)) return false;
+  return file.remove();
+}
+//------------------------------------------------------------------------------
+/**
+ * Sets the file's read/write position.
+ *
+ * \param[in] pos The new position in bytes from the beginning of the file.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t Fat16::seekSet(uint32_t pos) {
+  // error if file not open or seek past end of file
+  if (!isOpen() || pos > fileSize_) return false;
+  if (pos == 0) {
+    // set position to start of file
+    curCluster_ = 0;
+    curPosition_ = 0;
+    return true;
+  }
+  fat_t n = ((pos - 1) >> 9)/blocksPerCluster_;
+  if (pos < curPosition_ || curPosition_ == 0) {
+    // must follow chain from first cluster
+    curCluster_ = firstCluster_;
+  } else {
+    // advance from curPosition
+    n -= ((curPosition_ - 1) >> 9)/blocksPerCluster_;
+  }
+  while (n--) {
+    if (!fatGet(curCluster_, &curCluster_)) return false;
+  }
+  curPosition_ = pos;
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ *  The sync() call causes all modified data and directory fields
+ *  to be written to the storage device.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include a call to sync() before a file has been
+ * opened or an I/O error.
+ */
+uint8_t Fat16::sync(void) {
+  if (flags_ & F_FILE_DIR_DIRTY) {
+    // cache directory entry
+    dir_t* d = cacheDirEntry(dirEntryIndex_, CACHE_FOR_WRITE);
+    if (!d) return false;
+
+    // update file size and first cluster
+    d->fileSize = fileSize_;
+    d->firstClusterLow = firstCluster_;
+
+    // set modify time if user supplied a callback date/time function
+    if (dateTime_) {
+      dateTime_(&d->lastWriteDate, &d->lastWriteTime);
+      d->lastAccessDate = d->lastWriteDate;
+    }
+    flags_ &= ~F_FILE_DIR_DIRTY;
+  }
+  return cacheFlush();
+}
+//------------------------------------------------------------------------------
+/**
+ * The timestamp() call sets a file's timestamps in its directory entry.
+ *
+ * \param[in] flags Values for \a flags are constructed by a bitwise-inclusive
+ * OR of flags from the following list
+ *
+ * T_ACCESS - Set the file's last access date.
+ *
+ * T_CREATE - Set the file's creation date and time.
+ *
+ * T_WRITE - Set the file's last write/modification date and time.
+ *
+ * \param[in] year Valid range 1980 - 2107 inclusive.
+ *
+ * \param[in] month Valid range 1 - 12 inclusive.
+ *
+ * \param[in] day Valid range 1 - 31 inclusive.
+ *
+ * \param[in] hour Valid range 0 - 23 inclusive.
+ *
+ * \param[in] minute Valid range 0 - 59 inclusive.
+ *
+ * \param[in] second Valid range 0 - 59 inclusive
+ *
+ * \note It is possible to set an invalid date since there is no check for
+ * the number of days in a month.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t Fat16::timestamp(uint8_t flags, uint16_t year, uint8_t month,
+         uint8_t day, uint8_t hour, uint8_t minute, uint8_t second) {
+  if (!isOpen()
+    || year < 1980
+    || year > 2107
+    || month < 1
+    || month > 12
+    || day < 1
+    || day > 31
+    || hour > 23
+    || minute > 59
+    || second > 59) {
+      return false;
+  }
+  dir_t* d = cacheDirEntry(dirEntryIndex_, CACHE_FOR_WRITE);
+  if (!d) return false;
+  uint16_t dirDate = FAT_DATE(year, month, day);
+  uint16_t dirTime = FAT_TIME(hour, minute, second);
+  if (flags & T_ACCESS) {
+    d->lastAccessDate = dirDate;
+  }
+  if (flags & T_CREATE) {
+    d->creationDate = dirDate;
+    d->creationTime = dirTime;
+    // seems to be units of 1/100 second not 1/10 as Microsoft standard states
+    d->creationTimeTenths = second & 1 ? 100 : 0;
+  }
+  if (flags & T_WRITE) {
+    d->lastWriteDate = dirDate;
+    d->lastWriteTime = dirTime;
+  }
+  cacheSetDirty();
+  return sync();
+}
+//------------------------------------------------------------------------------
+/**
+ * Truncate a file to a specified length.  The current file position
+ * will be maintained if it is less than or equal to \a length otherwise
+ * it will be set to end of file.
+ *
+ * \param[in] length The desired length for the file.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include file is read only, file is a directory,
+ * \a length is greater than the current file size or an I/O error occurs.
+ */
+uint8_t Fat16::truncate(uint32_t length) {
+  // error if file is not open for write
+  if (!(flags_ & O_WRITE)) return false;
+
+  if (length > fileSize_) return false;
+
+  // fileSize and length are zero - nothing to do
+  if (fileSize_ == 0) return true;
+  uint32_t newPos = curPosition_ > length ? length : curPosition_;
+  if (length == 0) {
+    // free all clusters
+    if (!freeChain(firstCluster_)) return false;
+    curCluster_ = firstCluster_ = 0;
+  } else {
+    fat_t toFree;
+    if (!seekSet(length)) return false;
+    if (!fatGet(curCluster_, &toFree)) return false;
+    if (!isEOC(toFree)) {
+      // free extra clusters
+      if (!fatPut(curCluster_, FAT16EOC)) return false;
+      if (!freeChain(toFree)) return false;
+    }
+  }
+  fileSize_ = length;
+  flags_ |= F_FILE_DIR_DIRTY;
+  if (!sync()) return false;
+  return seekSet(newPos);
+}
+//------------------------------------------------------------------------------
+/**
+ * Write data at the current position of an open file.
+ *
+ * \note Data is moved to the cache but may not be written to the
+ * storage device until sync() is called.
+ *
+ * \param[in] buf Pointer to the location of the data to be written.
+ *
+ * \param[in] nbyte Number of bytes to write.
+ *
+ * \return For success write() returns the number of bytes written, always
+ * \a nbyte.  If an error occurs, write() returns -1.  Possible errors include
+ * write() is called before a file has been opened, the file has not been opened
+ * for write, device is full, a corrupt file system or an I/O error.
+ *
+ */
+int16_t Fat16::write(const void* buf, uint16_t nbyte) {
+  uint16_t nToWrite = nbyte;
+  const uint8_t* src = reinterpret_cast<const uint8_t*>(buf);
+
+  // error if file is not open for write
+  if (!(flags_ & O_WRITE)) goto writeErrorReturn;
+
+  // go to end of file if O_APPEND
+  if ((flags_ & O_APPEND) && curPosition_ != fileSize_) {
+    if (!seekEnd()) goto writeErrorReturn;
+  }
+  while (nToWrite > 0) {
+    uint8_t blkOfCluster = blockOfCluster(curPosition_);
+    uint16_t blockOffset = cacheDataOffset(curPosition_);
+    if (blkOfCluster == 0 && blockOffset == 0) {
+      // start of new cluster
+      if (curCluster_ == 0) {
+        if (firstCluster_ == 0) {
+          // allocate first cluster of file
+          if (!addCluster()) goto writeErrorReturn;
+        } else {
+          curCluster_ = firstCluster_;
+        }
+      } else {
+        fat_t next;
+        if (!fatGet(curCluster_, &next)) goto writeErrorReturn;
+        if (isEOC(next)) {
+          // add cluster if at end of chain
+          if (!addCluster()) goto writeErrorReturn;
+        } else {
+          curCluster_ = next;
+        }
+      }
+    }
+    uint32_t lba = dataBlockLba(curCluster_, blkOfCluster);
+    if (blockOffset == 0 && curPosition_ >= fileSize_) {
+      // start of new block don't need to read into cache
+      if (!cacheFlush()) goto writeErrorReturn;
+      cacheBlockNumber_ = lba;
+      cacheSetDirty();
+    } else {
+      // rewrite part of block
+      if (!cacheRawBlock(lba, CACHE_FOR_WRITE)) return -1;
+    }
+    uint8_t* dst = cacheBuffer_.data + blockOffset;
+
+    // max space in block
+    uint16_t n = 512 - blockOffset;
+
+    // lesser of space and amount to write
+    if (n > nToWrite) n = nToWrite;
+
+    // copy data to cache
+    memcpy(dst, src, n);
+
+    curPosition_ += n;
+    nToWrite -= n;
+    src += n;
+  }
+  if (curPosition_ > fileSize_) {
+    // update fileSize and insure sync will update dir entry
+    fileSize_ = curPosition_;
+    flags_ |= F_FILE_DIR_DIRTY;
+  } else if (dateTime_ && nbyte) {
+    // insure sync will update modified date and time
+    flags_ |= F_FILE_DIR_DIRTY;
+  }
+
+  if (flags_ & O_SYNC) {
+    if (!sync()) goto writeErrorReturn;
+  }
+  return nbyte;
+
+ writeErrorReturn:
+  writeError = true;
+  return -1;
+}
+//------------------------------------------------------------------------------
+/**
+ * Write a byte to a file. Required by the Arduino Print class.
+ *
+ *  Use Fat16::writeError to check for errors.
+ */
+#if ARDUINO < 100
+void Fat16::write(uint8_t b) {
+  write(&b, 1);
+}
+#else  // ARDUINO < 100
+size_t Fat16::write(uint8_t b) {
+  return write(&b, 1) == 1 ? 1 : 0;
+}
+#endif  // ARDUINO < 100
+//------------------------------------------------------------------------------
+/**
+ * Write a string to a file. Used by the Arduino Print class.
+ *
+ * Use Fat16::writeError to check for errors.
+ */
+#if ARDUINO < 100
+void Fat16::write(const char* str) {
+  write(str, strlen(str));
+}
+#else  // ARDUINO < 100
+int16_t Fat16::write(const char* str) {
+  return write(str, strlen(str));
+}
+#endif  // ARDUINO < 100
+//------------------------------------------------------------------------------
+/**
+ * Write a PROGMEM string to a file.
+ *
+ * Use Fat16::writeError to check for errors.
+ */
+void Fat16::write_P(PGM_P str) {
+  for (uint8_t c; (c = pgm_read_byte(str)); str++) write(c);
+}
+//------------------------------------------------------------------------------
+/**
+ * Write a PROGMEM string followed by CR/LF to a file.
+ *
+ * Use Fat16::writeError to check for errors.
+ */
+void Fat16::writeln_P(PGM_P str) {
+  write_P(str);
+  println();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16.h	(revision 136)
@@ -0,0 +1,378 @@
+/* Arduino FAT16 Library
+ * Copyright (C) 2008 by William Greiman
+ *
+ * This file is part of the Arduino FAT16 Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Fat16 Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#ifndef Fat16_h
+#define Fat16_h
+/**
+ * \file
+ * Fat16 class
+ */
+#include <string.h>
+#include <avr/pgmspace.h>
+#include <Print.h>
+#include <SdCard.h>
+#include <FatStructs.h>
+#include <Fat16Config.h>
+//------------------------------------------------------------------------------
+/** Fat16 version YYYYMMDD */
+#define FAT16_VERSION 20111205
+//------------------------------------------------------------------------------
+// flags for ls()
+/** ls() flag to print modify date */
+uint8_t const LS_DATE = 1;
+/** ls() flag to print file size */
+uint8_t const LS_SIZE = 2;
+
+// use the gnu style oflags
+/** open for reading */
+uint8_t const O_READ    = 0X01;
+/** same as O_READ */
+uint8_t const O_RDONLY  = O_READ;
+/** open for write */
+uint8_t const O_WRITE   = 0X02;
+/** same as O_WRITE */
+uint8_t const O_WRONLY  = O_WRITE;
+/** open for reading and writing */
+uint8_t const O_RDWR    = O_READ | O_WRITE;
+/** mask for access modes */
+uint8_t const O_ACCMODE = O_READ | O_WRITE;
+/** The file offset shall be set to the end of the file prior to each write. */
+uint8_t const O_APPEND  = 0X04;
+/** synchronous writes - call sync() after each write */
+uint8_t const O_SYNC    = 0X08;
+/** create the file if nonexistent */
+uint8_t const O_CREAT   = 0X10;
+/** If O_CREAT and O_EXCL are set, open() shall fail if the file exists */
+uint8_t const O_EXCL    = 0X20;
+/** truncate the file to zero length */
+uint8_t const O_TRUNC   = 0X40;
+
+// flags for timestamp
+/** set the file's last access date */
+uint8_t const T_ACCESS = 1;
+/** set the file's creation date and time */
+uint8_t const T_CREATE = 2;
+/** Set the file's write date and time */
+uint8_t const T_WRITE  = 4;
+
+/** date field for FAT directory entry */
+static inline uint16_t FAT_DATE(uint16_t year, uint8_t month, uint8_t day) {
+  return (year - 1980) << 9 | month << 5 | day;
+}
+/** year part of FAT directory date field */
+static inline uint16_t FAT_YEAR(uint16_t fatDate) {
+  return 1980 + (fatDate >> 9);
+}
+/** month part of FAT directory date field */
+static inline uint8_t FAT_MONTH(uint16_t fatDate) {
+  return (fatDate >> 5) & 0XF;
+}
+/** day part of FAT directory date field */
+static inline uint8_t FAT_DAY(uint16_t fatDate) {
+  return fatDate & 0X1F;
+}
+/** time field for FAT directory entry */
+static inline uint16_t FAT_TIME(uint8_t hour, uint8_t minute, uint8_t second) {
+  return hour << 11 | minute << 5 | second >> 1;
+}
+/** hour part of FAT directory time field */
+static inline uint8_t FAT_HOUR(uint16_t fatTime) {
+  return fatTime >> 11;
+}
+/** minute part of FAT directory time field */
+static inline uint8_t FAT_MINUTE(uint16_t fatTime) {
+  return(fatTime >> 5) & 0X3F;
+}
+/** second part of FAT directory time field */
+static inline uint8_t FAT_SECOND(uint16_t fatTime) {
+  return 2*(fatTime & 0X1F);
+}
+/** Default date for file timestamps is 1 Jan 2000 */
+uint16_t const FAT_DEFAULT_DATE = ((2000 - 1980) << 9) | (1 << 5) | 1;
+/** Default time for file timestamp is 1 am */
+uint16_t const FAT_DEFAULT_TIME = (1 << 11);
+//------------------------------------------------------------------------------
+/**
+ * \typedef fat_t
+ *
+ * \brief Type for FAT16 entry
+ */
+typedef uint16_t fat_t;
+/**
+ * \union cache16_t
+ *
+ * \brief Cache buffer data type
+ *
+ */
+union cache16_t {
+          /** Used to access cached file data blocks. */
+  uint8_t data[512];
+          /** Used to access cached FAT entries. */
+  fat_t   fat[256];
+          /** Used to access cached directory entries. */
+  dir_t   dir[16];
+          /** Used to access a cached Master Boot Record. */
+  mbr_t   mbr;
+          /** Used to access to a cached FAT16 boot sector. */
+  fbs_t   fbs;
+};
+//------------------------------------------------------------------------------
+/** \class Fat16
+ * \brief Fat16 implements a minimal Arduino FAT16 Library
+ *
+ * Fat16 does not support subdirectories or long file names.
+ */
+class Fat16 : public Print {
+ public:
+  /*
+   * Public functions
+   */
+  /** create with file closed */
+  Fat16(void) : flags_(0) {}
+  /** \return The current cluster number. */
+  fat_t curCluster(void) const {return curCluster_;}
+  uint8_t close(void);
+  /** \return The count of clusters in the FAT16 volume. */
+  static fat_t clusterCount(void) {return clusterCount_;}
+  /** \return The number of 512 byte blocks in a cluster */
+  static uint8_t clusterSize(void) {return blocksPerCluster_;}
+  /** \return The current file position. */
+  uint32_t curPosition(void) const {return curPosition_;}
+  /**
+   * Set the date/time callback function
+   *
+   * \param[in] dateTime The user's callback function.  The callback
+   * function is of the form:
+   *
+   * \code
+   * void dateTime(uint16_t* date, uint16_t* time) {
+   *   uint16_t year;
+   *   uint8_t month, day, hour, minute, second;
+   *
+   *   // User gets date and time from GPS or real-time clock here
+   *
+   *   // return date using FAT_DATE macro to format fields
+   *   *date = FAT_DATE(year, month, day);
+   *
+   *   // return time using FAT_TIME macro to format fields
+   *   *time = FAT_TIME(hour, minute, second);
+   * }
+   * \endcode
+   *
+   * Sets the function that is called when a file is created or when
+   * a file's directory entry is modified by sync(). All timestamps,
+   * access, creation, and modify, are set when a file is created.
+   * sync() maintains the last access date and last modify date/time.
+   *
+   * See the timestamp() function.
+   */
+  static void dateTimeCallback(
+    void (*dateTime)(uint16_t* date, uint16_t* time)) {
+    dateTime_ = dateTime;
+  }
+  /**
+   * Cancel the date/time callback function.
+   */
+  static void dateTimeCallbackCancel(void) {dateTime_ = NULL;}
+  uint8_t dirEntry(dir_t* dir);
+
+  /** \return The file's size in bytes. */
+  uint32_t fileSize(void) const {return fileSize_;}
+  static uint8_t init(SdCard* dev, uint8_t part);
+  /**
+   *  Initialize a FAT16 volume.
+   *
+   *  First try partition 1 then try super floppy format.
+   *
+   * \param[in] dev The SdCard where the volume is located.
+   *
+   * \return The value one, true, is returned for success and
+   * the value zero, false, is returned for failure.  reasons for
+   * failure include not finding a valid FAT16 file system, a call
+   * to init() after a volume has been successful initialized or
+   * an I/O error.
+   *
+   */
+  static uint8_t init(SdCard* dev) {
+    return init(dev, 1) ? true : init(dev, 0);
+  }
+  /**
+   * Checks the file's open/closed status for this instance of Fat16.
+   * \return The value true if a file is open otherwise false;
+   */
+  uint8_t isOpen(void) const {return (flags_ & O_ACCMODE) != 0;}
+  static void ls(uint8_t flags = 0);
+  uint8_t open(const char* fileName, uint8_t oflag);
+  uint8_t open(uint16_t entry, uint8_t oflag);
+  static void printDirName(const dir_t& dir, uint8_t width);
+  static void printFatDate(uint16_t fatDate);
+  static void printFatTime(uint16_t fatTime);
+  static void printTwoDigits(uint8_t v);
+  int16_t read(void);
+  int16_t read(void* buf, uint16_t nbyte);
+  static uint8_t readDir(dir_t* dir, uint16_t* index,
+                    uint8_t skip = (DIR_ATT_VOLUME_ID | DIR_ATT_DIRECTORY));
+
+  uint8_t remove(void);
+  static uint8_t remove(const char* fileName);
+  /** Sets the file's current position to zero. */
+  void rewind(void) {curPosition_ = curCluster_ = 0;}
+  /** \return The number of entries in the root directory. */
+  static uint16_t rootDirEntryCount(void) {return rootDirEntryCount_;}
+  /**  Seek to current position plus \a pos bytes. See Fat16::seekSet(). */
+  uint8_t seekCur(uint32_t pos) {return seekSet(curPosition_ + pos);}
+  /** Seek to end of file.  See Fat16::seekSet(). */
+  uint8_t seekEnd(void) {return seekSet(fileSize_);}
+  uint8_t seekSet(uint32_t pos);
+  uint8_t sync(void);
+  uint8_t timestamp(uint8_t flag, uint16_t year, uint8_t month, uint8_t day,
+          uint8_t hour, uint8_t minute, uint8_t second);
+  uint8_t truncate(uint32_t size);
+  /** Fat16::writeError is set to true if an error occurs during a write().
+   * Set Fat16::writeError to false before calling print() and/or write() and check
+   * for true after calls to write() and/or print().
+   */
+  bool writeError;
+  int16_t write(const void *buf, uint16_t nbyte);
+#if ARDUINO < 100
+  void write(uint8_t b);
+  void write(const char* str);
+#else  // ARDUINO < 100
+  size_t write(uint8_t b);
+  int16_t write(const char* str);
+#endif  // ARDUINO < 100
+  void write_P(PGM_P str);
+  void writeln_P(PGM_P str);
+//------------------------------------------------------------------------------
+#if FAT16_DEBUG_SUPPORT
+  /** For debug only.  Do not use in applications. */
+  static cache16_t* dbgBufAdd(void) {return &cacheBuffer_;}
+  /** For debug only.  Do not use in applications. */
+  static void dbgSetDev(SdCard* dev) {rawDev_ = dev;}
+  /** For debug only.  Do not use in applications. */
+  static uint8_t* dbgCacheBlock(uint32_t blockNumber) {
+    return cacheRawBlock(blockNumber) ? cacheBuffer_.data : 0; }
+  /** For debug only.  Do not use in applications. */
+  static dir_t* dbgCacheDir(uint16_t index) {
+    return cacheDirEntry(index);}
+#endif  // FAT16_DEBUG_SUPPORT
+//------------------------------------------------------------------------------
+#if ALLOW_DEPRECATED_FUNCTIONS
+// Deprecated functions - suppress cpplint messages with NOLINT comment
+ public:
+  /**
+   * Deprecated - Use:
+   * static void Fat16::dateTimeCallback(
+   *        void (*dateTime)(uint16_t* date, uint16_t* time));
+   */
+  static void dateTimeCallback(
+    void (*dateTime)(uint16_t& date, uint16_t& time)) {  // NOLINT
+    oldDateTime_ = dateTime;
+    dateTime_ = dateTime ? oldToNew : 0;
+  }
+  /** Deprecated - Use: uint8_t Fat16::dirEntry(dir_t* dir); */
+  uint8_t dirEntry(dir_t& dir) {  // NOLINT
+    return dirEntry(&dir);
+  }
+  /** Deprecated - Use: static uint8_t Fat16::init(SdCard *dev); */
+  static uint8_t init(SdCard& dev) {return init(&dev);}  // NOLINT
+
+  /** Deprecated - Use: static uint8_t Fat16::init(SdCard *dev, uint8_t part) */
+  static uint8_t init(SdCard& dev, uint8_t part) {  // NOLINT
+    return init(&dev, part);
+  }
+  /**
+   * Deprecated - Use:
+   * uint8_t Fat16::readDir(dir_t* dir, uint16_t* index, uint8_t skip);
+   */
+  static uint8_t readDir(dir_t& dir, uint16_t& index,  // NOLINT
+         uint8_t skip = (DIR_ATT_VOLUME_ID | DIR_ATT_DIRECTORY)) {
+    return readDir(&dir, &index, skip);
+  }
+//------------------------------------------------------------------------------
+ private:
+  static void (*oldDateTime_)(uint16_t& date, uint16_t& time);  // NOLINT
+  static void oldToNew(uint16_t *date, uint16_t *time) {
+    uint16_t d;
+    uint16_t t;
+    oldDateTime_(d, t);
+    *date = d;
+    *time = t;
+  }
+#endif  // ALLOW_DEPRECATED_FUNCTIONS
+//------------------------------------------------------------------------------
+ private:
+  // Volume info
+  static uint8_t  volumeInitialized_;  // true if volume has been initialized
+  static uint8_t  fatCount_;           // number of FATs
+  static uint8_t  blocksPerCluster_;   // must be power of 2
+  static uint16_t rootDirEntryCount_;  // should be 512 for FAT16
+  static fat_t    blocksPerFat_;       // number of blocks in one FAT
+  static fat_t    clusterCount_;       // total clusters in volume
+  static uint32_t fatStartBlock_;      // start of first FAT
+  static uint32_t rootDirStartBlock_;  // start of root dir
+  static uint32_t dataStartBlock_;     // start of data clusters
+
+  // block cache
+  static uint8_t const CACHE_FOR_READ  = 0;    // cache a block for read
+  static uint8_t const CACHE_FOR_WRITE = 1;    // cache a block and set dirty
+  static SdCard *rawDev_;             // Device
+  static cache16_t cacheBuffer_;      // 512 byte cache for raw blocks
+  static uint32_t cacheBlockNumber_;  // Logical number of block in the cache
+  static uint8_t cacheDirty_;         // cacheFlush() will write block if true
+  static uint32_t cacheMirrorBlock_;  // mirror block for second FAT
+
+  // callback function for date/time
+  static void (*dateTime_)(uint16_t* date, uint16_t* time);
+
+  // define fields in flags_
+  static uint8_t const F_OFLAG = O_ACCMODE | O_APPEND | O_SYNC;
+  static uint8_t const F_FILE_DIR_DIRTY = 0X80;  // require sync directory entry
+
+  uint8_t flags_;          // see above for bit definitions
+  int16_t dirEntryIndex_;  // index of directory entry for open file
+  fat_t firstCluster_;     // first cluster of file
+  uint32_t fileSize_;      // fileSize
+  fat_t curCluster_;       // current cluster
+  uint32_t curPosition_;   // current byte offset
+
+  // private functions for cache
+  static uint8_t blockOfCluster(uint32_t position) {
+    // depends on blocks per cluster being power of two
+    return (position >> 9) & (blocksPerCluster_ - 1);
+  }
+  static uint16_t cacheDataOffset(uint32_t position) {return position & 0X1FF;}
+  static dir_t* cacheDirEntry(uint16_t index, uint8_t action = 0);
+  static uint8_t cacheRawBlock(uint32_t blockNumber, uint8_t action = 0);
+  static uint8_t cacheFlush(void);
+  static void cacheSetDirty(void) {cacheDirty_ |= CACHE_FOR_WRITE;}
+  static uint32_t dataBlockLba(fat_t cluster, uint8_t blockOfCluster) {
+    return dataStartBlock_ + (uint32_t)(cluster - 2) * blocksPerCluster_
+      + blockOfCluster;
+  }
+  static uint8_t fatGet(fat_t cluster, fat_t* value);
+  static uint8_t fatPut(fat_t cluster, fat_t value);
+  // end of chain test
+  static uint8_t isEOC(fat_t cluster) {return cluster >= 0XFFF8;}
+  // allocate a cluster to a file
+  uint8_t addCluster(void);
+  // free a cluster chain
+  uint8_t freeChain(fat_t cluster);
+};
+#endif  // Fat16_h
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16Config.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16Config.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16Config.h	(revision 136)
@@ -0,0 +1,38 @@
+/* Arduino FAT16 Library
+ * Copyright (C) 2008 by William Greiman
+ *
+ * This file is part of the Arduino FAT16 Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Fat16 Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+ /**
+  * \file
+  * Configuration file
+  */
+#ifndef Fat16Config_h
+#define Fat16Config_h
+/**
+ * Allow use of deprecated functions if non-zero
+ */
+#define ALLOW_DEPRECATED_FUNCTIONS 1
+/**
+ * SdCard::writeBlock will protect block zero if set non-zero
+ */
+#define SD_PROTECT_BLOCK_ZERO 1
+/**
+ * Set non-zero to allow access to Fat16 internals by cardInfo debug sketch
+ */
+#define FAT16_DEBUG_SUPPORT 1
+#endif  // Fat16Config_h
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16mainpage.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16mainpage.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16mainpage.h	(revision 136)
@@ -0,0 +1,208 @@
+/* Arduino FAT16 Library
+ * Copyright (C) 2008 by William Greiman
+ *  
+ * This file is part of the Arduino FAT16 Library
+ *  
+ * This Library is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ * 
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ 
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Fat16 Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+/**
+\mainpage Arduino Fat16 Library
+<CENTER>Copyright &copy; 2008 by William Greiman
+</CENTER>
+
+\section Intro Introduction
+The Arduino Fat16 Library is a minimal implementation of the FAT16 file system
+on standard SD flash memory cards.  Fat16 supports read, write, file
+creation, deletion, and truncation. 
+
+The Fat16 class only supports access to files in the root directory and only
+supports short 8.3 names.  Directory time and date fields for creation
+and modification can be maintained by providing a date/time callback
+function \link Fat16::dateTimeCallback() dateTimeCallback()\endlink
+or calling \link Fat16::timestamp() timestamp()\endlink.
+
+Fat16 was designed to use the Arduino Print class which
+allows files to be written with \link Print::print() print() \endlink and 
+\link Print::println()  println()\endlink.
+
+\section comment Bugs and Comments
+
+If you wish to report bugs or have comments, send email to fat16lib@sbcglobal.net.
+
+
+\section SDcard SD Cards
+
+Arduinos access SD cards using the cards SPI protocol.  PCs, Macs, and
+most consumer devices use the 4-bit parallel SD protocol.  A card that
+functions well on A PC or Mac may not work well on the Arduino.
+
+Most cards have good SPI read performance but cards vary widely in SPI
+write performance.  Write performance is limited by how efficiently the
+card manages internal erase/remapping operations.  The Arduino cannot
+optimize writes to reduce erase operations because of its limit RAM.
+
+SanDisk cards generally have good write performance.  They seem to have
+more internal RAM buffering than other cards and therefore can limit
+the number of flash erase operations that the Arduino forces due to its
+limited RAM.
+
+Some Dane-Elec cards have a write speed that is only 20% as fast as
+a good SanDisk card.
+
+
+\section Hardware Hardware Configuration
+Fat16 was developed using an <A HREF = "http://www.adafruit.com/"> Adafruit Industries</A> 
+<A HREF = "http://ladyada.net/make/gpsshield/modules.html"> GPS Shield</A>.
+
+The hardware interface to the SD card should not use a resistor based level
+shifter.  SdCard::init() sets the SPI bus frequency to 8 MHz which results in
+signal rise times that are too slow for the edge detectors in many newer SD card
+controllers when resistor voltage dividers are used.
+
+The 5 to 3.3 V level shifter for 5 V arduinos should be IC based like the
+74HC4050N based circuit shown in the file SdLevel.png.  The Adafruit Wave Shield
+uses a 74AHC125N.  Gravitech sells SD and MicroSD Card Adapters based on the
+74LCX245.
+
+If you are using a resistor based level shifter and are having problems try
+setting the SPI bus frequency to 4 MHz.  This can be done by using
+card.init(true) to initialize the SD card.
+
+
+\section Fat16Class Fat16 Usage
+
+The class Fat16 is a minimal implementation of FAT16 on standard SD cards.
+High Capacity SD cards, SDHC, are not supported. It should work on all
+standard cards from 8MB to 2GB formatted with a FAT16 file system.
+
+\note 
+  The Arduino Print class uses character
+at a time writes so it was necessary to use a \link Fat16::sync() sync() \endlink
+function to control when data is written to the SD card.
+
+\par
+An application which writes to a file using \link Print::print() print()\endlink, 
+\link Print::println() println() \endlink 
+or \link Fat16::write write() \endlink must call \link Fat16::sync() sync() \endlink 
+at the appropriate time to force data and directory information to be written 
+to the SD Card.  Data and directory information are also written to the SD card
+when \link Fat16::close() close() \endlink is called.
+
+\par 
+Applications must use care calling \link Fat16::sync() sync() \endlink
+since 2048 bytes of I/O is required to update file and
+directory information.  This includes writing the current data block, reading
+the block that contains the directory entry for update, writing the directory
+block back and reading back the current data block.
+
+Fat16 only supports access to files in the root directory and only supports
+short 8.3 names.
+
+It is possible to open a file with two or more instances of Fat16.  A file may
+be corrupted if data is written to the file by more than one instance of Fat16.
+
+Short names are limited to 8 characters followed by an optional period (.)
+and extension of up to 3 characters.  The characters may be any combination
+of letters and digits.  The following special characters are also allowed:
+
+$ % ' - _ @ ~ ` ! ( ) { } ^ # &
+
+Short names are always converted to upper case and their original case
+value is lost.  
+
+Fat16 uses a slightly restricted form of short names.
+Only printable ASCII characters are supported. No characters with code point
+values greater than 127 are allowed.  Space is not allowed even though space 
+was allowed in the API of early versions of DOS.
+
+Fat16 has been optimized for The Arduino ATmega168.  Minimizing RAM use is the
+highest priority goal followed by flash use and finally performance.  
+Most SD cards only support 512 byte block write operations so a 512 byte
+cache buffer is used by Fat16.  This is the main use of RAM.  A small
+amount of RAM is used to store key volume and file information.
+Flash memory usage can be controlled by selecting options in Fat16Config.h.
+
+\section HowTo How to format SD Cards as FAT16 Volumes
+
+Microsoft operating systems support removable media formatted with a 
+Master Boot Record, MBR, or formatted as a super floppy with a FAT Boot Sector
+in block zero.
+
+Microsoft operating systems expect MBR formatted removable media 
+to have only one partition. The first partition should be used.
+
+Microsoft operating systems do not support partitioning SD flash cards.
+If you erase an SD card with a program like KillDisk, Most versions of
+Windows will format the card as a super floppy.
+
+The best way to restore an SD card's MBR is to use SDFormatter 
+which can be downloaded from:
+
+http://www.sdcard.org/consumers/formatter/
+
+SDFormatter does not have an option for FAT type so it may format
+small cards as FAT12.
+
+After the MBR is restored by SDFormatter you may need to reformat small
+cards that have been formatted FAT12 to force the volume type to be FAT16. 
+
+The FAT type, FAT12, FAT16, or FAT32, is determined by the count 
+of clusters on the volume and nothing else.
+
+Microsoft published the following code for determining FAT type:
+
+\code
+if (CountOfClusters < 4085) {
+  // Volume is FAT12
+}
+else if (CountOfClusters < 65525) {
+  // Volume is FAT16
+}
+else {
+  // Volume is FAT32
+}
+
+\endcode
+If you format a FAT volume with an OS utility , choose a cluster size that 
+will result in:
+
+4084 < CountOfClusters && CountOfClusters < 65525
+
+The volume will then be FAT16.
+
+If you are formatting an SD card on OS X or Linux, be sure to use the first 
+partition. Format this partition with a cluster count in above range.
+
+\section  References References
+
+The Arduino site:
+
+http://www.arduino.cc/
+
+For more information about FAT file systems see:
+
+http://www.microsoft.com/whdc/system/platform/firmware/fatgen.mspx
+
+For information about using SD cards as SPI devices see:
+
+http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
+
+The ATmega328 datasheet:
+
+http://www.atmel.com/dyn/resources/prod_documents/doc8161.pdf
+ 
+
+ */  
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16util.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16util.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Fat16util.h	(revision 136)
@@ -0,0 +1,74 @@
+#ifndef Fat16util_h
+#define Fat16util_h
+/* Arduino FAT16 Library
+ * Copyright (C) 2008 by William Greiman
+ *
+ * This file is part of the Arduino FAT16 Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Fat16 Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+/**
+ * \file
+ * Useful utility functions.
+ */
+#if ARDUINO < 100
+#include <WProgram.h>
+#else  // ARDUINO
+#include <Arduino.h>
+#endif  // ARDUINO
+#include <avr/pgmspace.h>
+/** Store and print a string in flash memory.*/
+#define PgmPrint(x) SerialPrint_P(PSTR(x))
+/** Store and print a string in flash memory followed by a CR/LF.*/
+#define PgmPrintln(x) SerialPrintln_P(PSTR(x))
+/** Defined so doxygen works for function definitions. */
+#define NOINLINE __attribute__((noinline))
+//------------------------------------------------------------------------------
+/** Return the number of bytes currently free in RAM. */
+static int FreeRam(void) {
+  extern int  __bss_end;
+  extern int* __brkval;
+  int free_memory;
+  if (reinterpret_cast<int>(__brkval) == 0) {
+    // if no heap use from end of bss section
+    free_memory = reinterpret_cast<int>(&free_memory)
+                  - reinterpret_cast<int>(&__bss_end);
+  } else {
+    // use from top of stack to heap
+    free_memory = reinterpret_cast<int>(&free_memory)
+                  - reinterpret_cast<int>(__brkval);
+  }
+  return free_memory;
+}
+//------------------------------------------------------------------------------
+/**
+ * %Print a string in flash memory to the serial port.
+ *
+ * \param[in] str Pointer to string stored in flash memory.
+ */
+static NOINLINE void SerialPrint_P(PGM_P str) {
+  for (uint8_t c; (c = pgm_read_byte(str)); str++) Serial.write(c);
+}
+//------------------------------------------------------------------------------
+/**
+ * %Print a string in flash memory followed by a CR/LF.
+ *
+ * \param[in] str Pointer to string stored in flash memory.
+ */
+static NOINLINE void SerialPrintln_P(PGM_P str) {
+  SerialPrint_P(str);
+  Serial.println();
+}
+#endif  // #define Fat16util_h
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/FatStructs.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/FatStructs.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/FatStructs.h	(revision 136)
@@ -0,0 +1,418 @@
+/* Arduino Fat16 Library
+ * Copyright (C) 2009 by William Greiman
+ *
+ * This file is part of the Arduino Fat16 Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Fat16 Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#ifndef FatStructs_h
+#define FatStructs_h
+/**
+ * \file
+ * FAT file structures
+ */
+/*
+ * mostly from Microsoft document fatgen103.doc
+ * http://www.microsoft.com/whdc/system/platform/firmware/fatgen.mspx
+ */
+//------------------------------------------------------------------------------
+/** Value for byte 510 of boot block or MBR */
+uint8_t const BOOTSIG0 = 0X55;
+/** Value for byte 511 of boot block or MBR */
+uint8_t const BOOTSIG1 = 0XAA;
+//------------------------------------------------------------------------------
+/**
+ * \struct partitionTable
+ * \brief MBR partition table entry
+ *
+ * A partition table entry for a MBR formatted storage device.
+ * The MBR partition table has four entries.
+ */
+struct partitionTable {
+          /**
+           * Boot Indicator . Indicates whether the volume is the active
+           * partition.  Legal values include: 0X00. Do not use for booting.
+           * 0X80 Active partition.
+           */
+  uint8_t  boot;
+          /**
+            * Head part of Cylinder-head-sector address of the first block in
+            * the partition. Legal values are 0-255. Only used in old PC BIOS.
+            */
+  uint8_t  beginHead;
+          /**
+           * Sector part of Cylinder-head-sector address of the first block in
+           * the partition. Legal values are 1-63. Only used in old PC BIOS.
+           */
+  unsigned beginSector : 6;
+           /** High bits cylinder for first block in partition. */
+  unsigned beginCylinderHigh : 2;
+          /**
+           * Combine beginCylinderLow with beginCylinderHigh. Legal values
+           * are 0-1023.  Only used in old PC BIOS.
+           */
+  uint8_t  beginCylinderLow;
+          /**
+           * Partition type. See defines that begin with PART_TYPE_ for
+           * some Microsoft partition types.
+           */
+  uint8_t  type;
+          /**
+           * head part of cylinder-head-sector address of the last sector in the
+           * partition.  Legal values are 0-255. Only used in old PC BIOS.
+           */
+  uint8_t  endHead;
+          /**
+           * Sector part of cylinder-head-sector address of the last sector in
+           * the partition.  Legal values are 1-63. Only used in old PC BIOS.
+           */
+  unsigned endSector : 6;
+           /** High bits of end cylinder */
+  unsigned endCylinderHigh : 2;
+          /**
+           * Combine endCylinderLow with endCylinderHigh. Legal values
+           * are 0-1023.  Only used in old PC BIOS.
+           */
+  uint8_t  endCylinderLow;
+           /** Logical block address of the first block in the partition. */
+  uint32_t firstSector;
+           /** Length of the partition, in blocks. */
+  uint32_t totalSectors;
+};
+/** Type name for partitionTable */
+typedef struct partitionTable part_t;
+//------------------------------------------------------------------------------
+/**
+ * \struct masterBootRecord
+ *
+ * \brief Master Boot Record
+ *
+ * The first block of a storage device that is formatted with a MBR.
+ */
+struct masterBootRecord {
+           /** Code Area for master boot program. */
+  uint8_t  codeArea[440];
+           /** Optional WindowsNT disk signature. May contain more boot code. */
+  uint32_t diskSignature;
+           /** Usually zero but may be more boot code. */
+  uint16_t usuallyZero;
+           /** Partition tables. */
+  part_t   part[4];
+           /** First MBR signature byte. Must be 0X55 */
+  uint8_t  mbrSig0;
+           /** Second MBR signature byte. Must be 0XAA */
+  uint8_t  mbrSig1;
+};
+/** Type name for masterBootRecord */
+typedef struct masterBootRecord mbr_t;
+//------------------------------------------------------------------------------
+/** 
+ * \struct biosParmBlock
+ *
+ * \brief BIOS parameter block
+ * 
+ *  The BIOS parameter block describes the physical layout of a FAT volume.
+ */
+struct biosParmBlock {
+          /**
+           * Count of bytes per sector. This value may take on only the
+           * following values: 512, 1024, 2048 or 4096
+           */
+  uint16_t bytesPerSector;
+          /**
+           * Number of sectors per allocation unit. This value must be a
+           * power of 2 that is greater than 0. The legal values are
+           * 1, 2, 4, 8, 16, 32, 64, and 128.
+           */
+  uint8_t  sectorsPerCluster;
+          /**
+           * Number of sectors before the first FAT.
+           * This value must not be zero.
+           */
+  uint16_t reservedSectorCount;
+          /** The count of FAT data structures on the volume. This field should
+           *  always contain the value 2 for any FAT volume of any type.
+           */
+  uint8_t  fatCount;
+          /**
+          * For FAT12 and FAT16 volumes, this field contains the count of
+          * 32-byte directory entries in the root directory. For FAT32 volumes,
+          * this field must be set to 0. For FAT12 and FAT16 volumes, this
+          * value should always specify a count that when multiplied by 32
+          * results in a multiple of bytesPerSector.  FAT16 volumes should
+          * use the value 512.
+          */
+  uint16_t rootDirEntryCount;
+          /**
+           * This field is the old 16-bit total count of sectors on the volume.
+           * This count includes the count of all sectors in all four regions
+           * of the volume. This field can be 0; if it is 0, then totalSectors32
+           * must be non-zero.  For FAT32 volumes, this field must be 0. For
+           * FAT12 and FAT16 volumes, this field contains the sector count, and
+           * totalSectors32 is 0 if the total sector count fits
+           * (is less than 0x10000).
+           */
+  uint16_t totalSectors16;
+          /**
+           * This dates back to the old MS-DOS 1.x media determination and is
+           * no longer usually used for anything.  0xF8 is the standard value
+           * for fixed (non-removable) media. For removable media, 0xF0 is
+           * frequently used. Legal values are 0xF0 or 0xF8-0xFF.
+           */
+  uint8_t  mediaType;
+          /**
+           * Count of sectors occupied by one FAT on FAT12/FAT16 volumes.
+           * On FAT32 volumes this field must be 0, and sectorsPerFat32
+           * contains the FAT size count.
+           */
+  uint16_t sectorsPerFat16;
+           /** Sectors per track for interrupt 0x13. Not used otherwise. */
+  uint16_t sectorsPerTrtack;
+           /** Number of heads for interrupt 0x13.  Not used otherwise. */
+  uint16_t headCount;
+          /**
+           * Count of hidden sectors preceding the partition that contains this
+           * FAT volume. This field is generally only relevant for media
+           *  visible on interrupt 0x13.
+           */
+  uint32_t hidddenSectors;
+          /**
+           * This field is the new 32-bit total count of sectors on the volume.
+           * This count includes the count of all sectors in all four regions
+           * of the volume.  This field can be 0; if it is 0, then
+           * totalSectors16 must be non-zero.
+           */
+  uint32_t totalSectors32;
+          /**
+           * Count of sectors occupied by one FAT on FAT32 volumes.
+           */
+  uint32_t sectorsPerFat32;
+          /**
+           * This field is only defined for FAT32 media and does not exist on
+           * FAT12 and FAT16 media.
+           * Bits 0-3 -- Zero-based number of active FAT.
+           *             Only valid if mirroring is disabled.
+           * Bits 4-6 -- Reserved.
+           * Bit 7	-- 0 means the FAT is mirrored at runtime into all FATs.
+	         *        -- 1 means only one FAT is active; it is the one referenced in bits 0-3.
+           * Bits 8-15 	-- Reserved.
+           */
+  uint16_t fat32Flags;
+          /**
+           * FAT32 version. High byte is major revision number.
+           * Low byte is minor revision number. Only 0.0 define.
+           */
+  uint16_t fat32Version;
+          /**
+           * Cluster number of the first cluster of the root directory for FAT32.
+           * This usually 2 but not required to be 2.
+           */
+  uint32_t fat32RootCluster;
+          /**
+           * Sector number of FSINFO structure in the reserved area of the
+           * FAT32 volume. Usually 1.
+           */
+  uint16_t fat32FSInfo;
+          /**
+           * If non-zero, indicates the sector number in the reserved area
+           * of the volume of a copy of the boot record. Usually 6.
+           * No value other than 6 is recommended.
+           */
+  uint16_t fat32BackBootBlock;
+          /**
+           * Reserved for future expansion. Code that formats FAT32 volumes
+           * should always set all of the bytes of this field to 0.
+           */
+  uint8_t  fat32Reserved[12];
+};
+/** Type name for biosParmBlock */
+typedef struct biosParmBlock bpb_t;
+//------------------------------------------------------------------------------
+/**
+ * \struct fat32BootSector
+ *
+ * \brief Boot sector for a FAT16 or FAT32 volume.
+ * 
+ */  
+struct fat32BootSector {
+           /** X86 jmp to boot program */
+  uint8_t  jmpToBootCode[3];
+           /** informational only - don't depend on it */
+  char     oemName[8];
+           /** BIOS Parameter Block */
+  bpb_t    bpb;
+           /** for int0x13 use value 0X80 for hard drive */
+  uint8_t  driveNumber;
+           /** used by Windows NT - should be zero for FAT */
+  uint8_t  reserved1;
+           /** 0X29 if next three fields are valid */
+  uint8_t  bootSignature;
+           /** usually generated by combining date and time */
+  uint32_t volumeSerialNumber;
+           /** should match volume label in root dir */
+  char     volumeLabel[11];
+           /** informational only - don't depend on it */
+  char     fileSystemType[8];
+           /** X86 boot code */
+  uint8_t  bootCode[420];
+           /** must be 0X55 */
+  uint8_t  bootSectorSig0;
+           /** must be 0XAA */
+  uint8_t  bootSectorSig1;
+};
+//------------------------------------------------------------------------------
+// End Of Chain values for FAT entries
+/** FAT16 end of chain value used by Microsoft. */
+uint16_t const FAT16EOC = 0XFFFF;
+/** Minimum value for FAT16 EOC.  Use to test for EOC. */
+uint16_t const FAT16EOC_MIN = 0XFFF8;
+/** FAT32 end of chain value used by Microsoft. */
+uint32_t const FAT32EOC = 0X0FFFFFFF;
+/** Minimum value for FAT32 EOC.  Use to test for EOC. */
+uint32_t const FAT32EOC_MIN = 0X0FFFFFF8;
+/** Mask a for FAT32 entry. Entries are 28 bits. */
+uint32_t const FAT32MASK = 0X0FFFFFFF;
+
+/** Type name for fat32BootSector */
+typedef struct fat32BootSector fbs_t;
+//------------------------------------------------------------------------------
+/**
+ * \struct directoryEntry
+ * \brief FAT short directory entry
+ *
+ * Short means short 8.3 name, not the entry size.
+ *  
+ * Date Format. A FAT directory entry date stamp is a 16-bit field that is 
+ * basically a date relative to the MS-DOS epoch of 01/01/1980. Here is the
+ * format (bit 0 is the LSB of the 16-bit word, bit 15 is the MSB of the 
+ * 16-bit word):
+ *   
+ * Bits 9-15: Count of years from 1980, valid value range 0-127 
+ * inclusive (1980-2107).
+ *   
+ * Bits 5-8: Month of year, 1 = January, valid value range 1-12 inclusive.
+ *
+ * Bits 0-4: Day of month, valid value range 1-31 inclusive.
+ *
+ * Time Format. A FAT directory entry time stamp is a 16-bit field that has
+ * a granularity of 2 seconds. Here is the format (bit 0 is the LSB of the 
+ * 16-bit word, bit 15 is the MSB of the 16-bit word).
+ *   
+ * Bits 11-15: Hours, valid value range 0-23 inclusive.
+ * 
+ * Bits 5-10: Minutes, valid value range 0-59 inclusive.
+ *      
+ * Bits 0-4: 2-second count, valid value range 0-29 inclusive (0 - 58 seconds).
+ *   
+ * The valid time range is from Midnight 00:00:00 to 23:59:58.
+ */
+struct directoryEntry {
+           /**
+            * Short 8.3 name.
+            * The first eight bytes contain the file name with blank fill.
+            * The last three bytes contain the file extension with blank fill.
+            */
+  uint8_t  name[11];
+          /** Entry attributes.
+           *
+           * The upper two bits of the attribute byte are reserved and should
+           * always be set to 0 when a file is created and never modified or
+           * looked at after that.  See defines that begin with DIR_ATT_.
+           */
+  uint8_t  attributes;
+          /**
+           * Reserved for use by Windows NT. Set value to 0 when a file is
+           * created and never modify or look at it after that.
+           */
+  uint8_t  reservedNT;
+          /**
+           * The granularity of the seconds part of creationTime is 2 seconds
+           * so this field is a count of tenths of a second and its valid
+           * value range is 0-199 inclusive. (WHG note - seems to be hundredths)
+           */
+  uint8_t  creationTimeTenths;
+           /** Time file was created. */
+  uint16_t creationTime;
+           /** Date file was created. */
+  uint16_t creationDate;
+          /**
+           * Last access date. Note that there is no last access time, only
+           * a date.  This is the date of last read or write. In the case of
+           * a write, this should be set to the same date as lastWriteDate.
+           */
+  uint16_t lastAccessDate;
+          /**
+           * High word of this entry's first cluster number (always 0 for a
+           * FAT12 or FAT16 volume).
+           */
+  uint16_t firstClusterHigh;
+           /** Time of last write. File creation is considered a write. */
+  uint16_t lastWriteTime;
+           /** Date of last write. File creation is considered a write. */
+  uint16_t lastWriteDate;
+           /** Low word of this entry's first cluster number. */
+  uint16_t firstClusterLow;
+           /** 32-bit unsigned holding this file's size in bytes. */
+  uint32_t fileSize;
+};
+//------------------------------------------------------------------------------
+// Definitions for directory entries
+//
+/** Type name for directoryEntry */
+typedef struct directoryEntry dir_t;
+/** escape for name[0] = 0XE5 */
+uint8_t const DIR_NAME_0XE5 = 0X05;
+/** name[0] value for entry that is free after being "deleted" */
+uint8_t const DIR_NAME_DELETED = 0XE5;
+/** name[0] value for entry that is free and no allocated entries follow */
+uint8_t const DIR_NAME_FREE = 0X00;
+/** file is read-only */
+uint8_t const DIR_ATT_READ_ONLY = 0X01;
+/** File should hidden in directory listings */
+uint8_t const DIR_ATT_HIDDEN = 0X02;
+/** Entry is for a system file */
+uint8_t const DIR_ATT_SYSTEM = 0X04;
+/** Directory entry contains the volume label */
+uint8_t const DIR_ATT_VOLUME_ID = 0X08;
+/** Entry is for a directory */
+uint8_t const DIR_ATT_DIRECTORY = 0X10;
+/** Old DOS archive bit for backup support */
+uint8_t const DIR_ATT_ARCHIVE = 0X20;
+/** Test value for long name entry.  Test is
+  (d->attributes & DIR_ATT_LONG_NAME_MASK) == DIR_ATT_LONG_NAME. */
+uint8_t const DIR_ATT_LONG_NAME = 0X0F;
+/** Test mask for long name entry */
+uint8_t const DIR_ATT_LONG_NAME_MASK = 0X3F;
+/** defined attribute bits */
+uint8_t const DIR_ATT_DEFINED_BITS = 0X3F;
+/** Directory entry is part of a long name */
+static inline uint8_t DIR_IS_LONG_NAME(const dir_t* dir) {
+  return (dir->attributes & DIR_ATT_LONG_NAME_MASK) == DIR_ATT_LONG_NAME;
+}
+/** Mask for file/subdirectory tests */
+uint8_t const DIR_ATT_FILE_TYPE_MASK = (DIR_ATT_VOLUME_ID | DIR_ATT_DIRECTORY);
+/** Directory entry is for a file */
+static inline uint8_t DIR_IS_FILE(const dir_t* dir) {
+  return (dir->attributes & DIR_ATT_FILE_TYPE_MASK) == 0;
+}
+/** Directory entry is for a subdirectory */
+static inline uint8_t DIR_IS_SUBDIR(const dir_t* dir) {
+  return (dir->attributes & DIR_ATT_FILE_TYPE_MASK) == DIR_ATT_DIRECTORY;
+}
+/** Directory entry is for a file or subdirectory */
+static inline uint8_t DIR_IS_FILE_OR_SUBDIR(const dir_t* dir) {
+  return (dir->attributes & DIR_ATT_VOLUME_ID) == 0;
+}
+#endif  // FatStructs_h
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Melody.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Melody.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Melody.cpp	(revision 136)
@@ -0,0 +1,100 @@
+#include "ArduinoRobot.h"
+#include "SquawkSD.h"
+#include "Fat16.h"
+
+
+
+SQUAWK_CONSTRUCT_ISR(SQUAWK_PWM_PIN5);
+
+
+void RobotControl::beginSpeaker(uint16_t frequency){
+  SquawkSynth::begin(frequency);
+  SquawkSynth::play();
+  osc[2].vol = 0x7F;
+}
+
+void RobotControl::playNote(byte period, word length, char modifier) {
+  // Modifier . makes note length 2/3
+  if(modifier == '.') length = (length * 2) / 3;
+  // Set up the play frequency, 352800 is [sample_rate]=44100 * [tuning]=8.0
+  osc[2].freq = 352800 / period;
+  // Delay, silence, delay
+  delay(length);
+  osc[2].freq = 0;
+  delay(length);
+}
+
+void RobotControl::playMelody(char* script){
+  // Find length of play string
+  word length = strlen(script);
+  // Set the default note time
+  word time = 500;
+  // Loop through each character in the play string
+  for(int n = 0; n < length; n++) {
+    // Fetch the character AFTER the current one - it may contain a modifier
+    char modifier = script[n + 1];
+    // Fetch the current character and branch accordingly
+    switch(script[n]) {
+      // Notes
+      case 'c': playNote(214, time, modifier); break; // Play a  C
+      case 'C': playNote(202, time, modifier); break; // Play a  C#
+      case 'd': playNote(190, time, modifier); break; // Play a  D
+      case 'D': playNote(180, time, modifier); break; // Play a  D#
+      case 'e': playNote(170, time, modifier); break; // Play an E
+      case 'f': playNote(160, time, modifier); break; // Play an F
+      case 'F': playNote(151, time, modifier); break; // Play an F#
+      case 'g': playNote(143, time, modifier); break; // Play a  G
+      case 'G': playNote(135, time, modifier); break; // Play a  G#
+      case 'a': playNote(127, time, modifier); break; // Play an A
+      case 'A': playNote(120, time, modifier); break; // Play an A#
+      case 'b': playNote(113, time, modifier); break; // Play a  B
+      // Delay
+      case '-': playNote(0,   time, modifier); break; // Play a quiet note
+      // Note lengths
+      case '1': time = 1000; break; // Full note
+      case '2': time =  500; break; // Half note
+      case '4': time =  250; break; // Quarter note
+      case '8': time =   50; break; // Eigth note
+	  // Modifier '.' makes note length 2/3
+
+    }
+  }
+}
+
+void RobotControl::beep(int beep_length){
+  char scr1[]="8F";
+  char scr2[]="8Fe";
+  char scr3[]="1F";
+
+  switch (beep_length)
+  {
+  case BEEP_SIMPLE:
+  default:
+    playMelody(scr1);
+    break;
+
+  case BEEP_DOUBLE:
+	playMelody(scr2);
+    break;
+
+  case BEEP_LONG:
+    playMelody(scr3);
+  }
+
+}
+
+void RobotControl::tempoWrite(int tempo){
+	SquawkSynthSD::tempo(tempo);
+}
+void RobotControl::tuneWrite(float tune){
+	SquawkSynthSD::tune(tune);
+}
+
+void RobotControl::playFile(char* filename){
+  melody.open(filename,O_READ);
+  SquawkSynthSD::play(melody);
+}
+
+void RobotControl::stopPlayFile(){
+  melody.close();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Motors.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Motors.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Motors.cpp	(revision 136)
@@ -0,0 +1,113 @@
+#include "ArduinoRobot.h"
+#include "EasyTransfer2.h"
+
+
+void RobotControl::motorsStop(){
+	messageOut.writeByte(COMMAND_MOTORS_STOP);
+	messageOut.sendData();
+}
+void RobotControl::motorsWrite(int speedLeft,int speedRight){
+	messageOut.writeByte(COMMAND_RUN);
+	messageOut.writeInt(speedLeft);
+	messageOut.writeInt(speedRight);
+	messageOut.sendData();
+}
+void RobotControl::motorsWritePct(int speedLeftPct, int speedRightPct){
+	int16_t speedLeft=255*speedLeftPct/100.0;
+	int16_t speedRight=255*speedRightPct/100.0;
+	motorsWrite(speedLeft,speedRight);
+}
+void RobotControl::pointTo(int angle){
+	int target=angle;
+	uint8_t speed=80;
+	target=target%360;
+	if(target<0){
+		target+=360;
+	}
+	int direction=angle;
+	while(1){
+		int currentAngle=compassRead();
+		int diff=target-currentAngle;
+		direction=180-(diff+360)%360;
+		if(direction>0){
+			motorsWrite(speed,-speed);//right
+			delay(10);
+		}else{
+			motorsWrite(-speed,speed);//left
+			delay(10);
+		}
+		//if(diff<-180) 
+		//	diff += 360;
+		//else if(diff> 180) 
+		//	diff -= 360;
+		//direction=-diff;
+		
+		if(abs(diff)<5){
+			motorsStop();
+			return;
+		}
+	}
+}
+void RobotControl::turn(int angle){
+	int originalAngle=compassRead();
+	int target=originalAngle+angle;
+	pointTo(target);
+	/*uint8_t speed=80;
+	target=target%360;
+	if(target<0){
+		target+=360;
+	}
+	int direction=angle;
+	while(1){
+		if(direction>0){
+			motorsWrite(speed,speed);//right
+			delay(10);
+		}else{
+			motorsWrite(-speed,-speed);//left
+			delay(10);
+		}
+		int currentAngle=compassRead();
+		int diff=target-currentAngle;
+		if(diff<-180) 
+			diff += 360;
+		else if(diff> 180) 
+			diff -= 360;
+		direction=-diff;
+		
+		if(abs(diff)<5){
+			motorsWrite(0,0);
+			return;
+		}
+	}*/
+}
+
+void RobotControl::moveForward(int speed){
+	motorsWrite(speed,speed);
+}
+void RobotControl::moveBackward(int speed){
+	motorsWrite(speed,speed);
+}
+void RobotControl::turnLeft(int speed){
+	motorsWrite(speed,255);
+}
+void RobotControl::turnRight(int speed){
+	motorsWrite(255,speed);
+}
+
+
+
+/*
+int RobotControl::getIRrecvResult(){
+	messageOut.writeByte(COMMAND_GET_IRRECV);
+	messageOut.sendData();
+	//delay(10);
+	while(!messageIn.receiveData());
+	
+	if(messageIn.readByte()==COMMAND_GET_IRRECV_RE){
+		return messageIn.readInt();
+	}
+
+
+	return -1;
+}
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Multiplexer.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Multiplexer.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Multiplexer.cpp	(revision 136)
@@ -0,0 +1,37 @@
+#include "Multiplexer.h"
+
+void Multiplexer::begin(uint8_t* selectors, uint8_t Z, uint8_t length){
+	for(uint8_t i=0;i<length;i++){
+		this->selectors[i]=selectors[i];
+		pinMode(selectors[i],OUTPUT);
+	}
+	this->length=length;
+	this->pin_Z=Z;
+	pinMode(pin_Z,INPUT);
+}
+
+void Multiplexer::selectPin(uint8_t num){
+	for(uint8_t i=0;i<length;i++){
+		//Serial.print(bitRead(num,i));
+		digitalWrite(selectors[i],bitRead(num,i));
+	}
+	//Serial.println("");
+}
+
+int Multiplexer::getAnalogValue(){
+	return analogRead(pin_Z);
+}
+
+bool Multiplexer::getDigitalValue(){
+	return digitalRead(pin_Z);
+}
+
+int Multiplexer::getAnalogValueAt(uint8_t num){
+	selectPin(num);
+	return getAnalogValue();
+}
+
+bool Multiplexer::getDigitalValueAt(uint8_t num){
+	selectPin(num);
+	return getDigitalValue();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Multiplexer.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Multiplexer.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Multiplexer.h	(revision 136)
@@ -0,0 +1,24 @@
+#ifndef Multiplexer_h
+#define Multiplexer_h
+
+#if ARDUINO >= 100
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+
+class Multiplexer{
+	public:
+		void begin(uint8_t* selectors, uint8_t Z, uint8_t length);
+		void selectPin(uint8_t num);
+		int getAnalogValue();
+		int getAnalogValueAt(uint8_t num);
+		bool getDigitalValue();
+		bool getDigitalValueAt(uint8_t num);
+	private:
+		uint8_t selectors[4];
+		uint8_t pin_Z;
+		uint8_t length;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/RobotSdCard.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/RobotSdCard.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/RobotSdCard.cpp	(revision 136)
@@ -0,0 +1,22 @@
+#include <ArduinoRobot.h>
+
+void RobotControl::beginSD(){
+  card.init();
+  file.init(&card);
+  melody.init(&card);
+}
+
+void RobotControl::_enableSD(){
+  DDRB = DDRB & 0xDF; //pinMode(CS_LCD,INPUT);
+  DDRB = DDRB | 0x10; //pinMode(CS_SD,OUTPUT);
+}
+
+/*
+void RobotControl::sdTest(){
+  file.open("Infor.txt",O_READ);
+  uint8_t buf[7];
+  char n;
+  while ((n = file.read(buf, sizeof(buf))) > 0) {
+    for (uint8_t i = 0; i < n; i++) Serial.write(buf[i]);
+  }
+}*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SdCard.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SdCard.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SdCard.cpp	(revision 136)
@@ -0,0 +1,279 @@
+/* Arduino FAT16 Library
+ * Copyright (C) 2008 by William Greiman
+ *
+ * This file is part of the Arduino FAT16 Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Fat16 Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#include <avr/pgmspace.h>
+#if ARDUINO < 100
+#include <WProgram.h>
+#else  // ARDUINO
+#include <Arduino.h>
+#endif  // ARDUINO
+#include <Fat16Config.h>
+#include <SdCard.h>
+//------------------------------------------------------------------------------
+// r1 status values
+uint8_t const R1_READY_STATE = 0;
+uint8_t const R1_IDLE_STATE  = 1;
+// start data token for read or write
+uint8_t const DATA_START_BLOCK = 0XFE;
+// data response tokens for write block
+uint8_t const DATA_RES_MASK        = 0X1F;
+uint8_t const DATA_RES_ACCEPTED    = 0X05;
+uint8_t const DATA_RES_CRC_ERROR   = 0X0B;
+uint8_t const DATA_RES_WRITE_ERROR = 0X0D;
+//
+// stop compiler from inlining where speed optimization is not required
+#define STATIC_NOINLINE static __attribute__((noinline))
+//------------------------------------------------------------------------------
+// SPI static functions
+//
+// clock byte in
+STATIC_NOINLINE uint8_t spiRec(void) {
+  SPDR = 0xff;
+  while (!(SPSR & (1 << SPIF)));
+  return SPDR;
+}
+// clock byte out
+STATIC_NOINLINE void spiSend(uint8_t b) {
+  SPDR = b;
+  while (!(SPSR & (1 << SPIF)));
+}
+//------------------------------------------------------------------------------
+// wait for card to go not busy
+// return false if timeout
+static uint8_t waitForToken(uint8_t token, uint16_t timeoutMillis) {
+  uint16_t t0 = millis();
+  while (spiRec() != token) {
+    if (((uint16_t)millis() - t0) > timeoutMillis) return false;
+  }
+  return true;
+}
+//------------------------------------------------------------------------------
+uint8_t SdCard::cardCommand(uint8_t cmd, uint32_t arg) {
+  uint8_t r1;
+
+  // select card
+  chipSelectLow();
+
+  // wait if busy
+  waitForToken(0XFF, SD_COMMAND_TIMEOUT);
+
+  // send command
+  spiSend(cmd | 0x40);
+
+  // send argument
+  for (int8_t s = 24; s >= 0; s -= 8) spiSend(arg >> s);
+
+  // send CRC - must send valid CRC for CMD0
+  spiSend(cmd == CMD0 ? 0x95 : 0XFF);
+
+  // wait for not busy
+  for (uint8_t retry = 0; (0X80 & (r1 = spiRec())) && retry != 0XFF; retry++);
+  return r1;
+}
+//------------------------------------------------------------------------------
+uint8_t SdCard::cardAcmd(uint8_t cmd, uint32_t arg) {
+  cardCommand(CMD55, 0);
+  return cardCommand(cmd, arg);
+}
+//==============================================================================
+// SdCard member functions
+//------------------------------------------------------------------------------
+/**
+ * Determine the size of a standard SD flash memory card
+ * \return The number of 512 byte data blocks in the card
+ */
+uint32_t SdCard::cardSize(void) {
+  uint16_t c_size;
+  csd_t csd;
+  if (!readReg(CMD9, &csd)) return 0;
+  uint8_t read_bl_len = csd.read_bl_len;
+  c_size = (csd.c_size_high << 10) | (csd.c_size_mid << 2) | csd.c_size_low;
+  uint8_t c_size_mult = (csd.c_size_mult_high << 1) | csd.c_size_mult_low;
+  return (uint32_t)(c_size+1) << (c_size_mult + read_bl_len - 7);
+}
+//------------------------------------------------------------------------------
+void SdCard::chipSelectHigh(void) {
+  digitalWrite(chipSelectPin_, HIGH);
+  // make sure MISO goes high impedance
+  spiSend(0XFF);
+}
+//------------------------------------------------------------------------------
+void SdCard::chipSelectLow(void) {
+  // Enable SPI, Master, clock rate F_CPU/4
+  SPCR = (1 << SPE) | (1 << MSTR);
+
+  // Doubled Clock Frequency to F_CPU/2 unless speed_ is nonzero
+  if (!speed_) SPSR |= (1 << SPI2X);
+
+  digitalWrite(chipSelectPin_, LOW);
+}
+//------------------------------------------------------------------------------
+void SdCard::error(uint8_t code, uint8_t data) {
+  errorData = data;
+  error(code);
+}
+//------------------------------------------------------------------------------
+void SdCard::error(uint8_t code) {
+  errorCode = code;
+  chipSelectHigh();
+}
+//------------------------------------------------------------------------------
+/**
+ * Initialize a SD flash memory card.
+ *
+ * \param[in] speed Set SPI Frequency to F_CPU/2 if speed = 0 or F_CPU/4
+ *  if speed = 1.
+ * \param[in] chipSelectPin SD chip select pin number.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ *
+ */
+uint8_t SdCard::init(uint8_t speed, uint8_t chipSelectPin) {
+  if (speed > 1) {
+    error(SD_ERROR_SPI_SPEED);
+    return false;
+  }
+  speed_ = speed;
+  chipSelectPin_ = chipSelectPin;
+  errorCode = 0;
+  uint8_t r;
+  // 16-bit init start time allows over a minute
+  uint16_t t0 = (uint16_t)millis();
+
+  pinMode(chipSelectPin_, OUTPUT);
+  digitalWrite(chipSelectPin_, HIGH);
+  pinMode(SPI_MISO_PIN, INPUT);
+  pinMode(SPI_SS_PIN, OUTPUT);
+  pinMode(SPI_MOSI_PIN, OUTPUT);
+  pinMode(SPI_SCK_PIN, OUTPUT);
+
+  // Enable SPI, Master, clock rate F_CPU/128
+  SPCR = (1 << SPE) | (1 << MSTR) | (1 << SPR1) | (1 << SPR0);
+
+  // must supply min of 74 clock cycles with CS high.
+  for (uint8_t i = 0; i < 10; i++) spiSend(0XFF);
+  digitalWrite(chipSelectPin_, LOW);
+
+  // command to go idle in SPI mode
+  while ((r = cardCommand(CMD0, 0)) != R1_IDLE_STATE) {
+    if (((uint16_t)millis() - t0) > SD_INIT_TIMEOUT) {
+      error(SD_ERROR_CMD0, r);
+      return false;
+    }
+  }
+  // start initialization and wait for completed initialization
+  while ((r = cardAcmd(ACMD41, 0)) != R1_READY_STATE) {
+    if (((uint16_t)millis() - t0) > SD_INIT_TIMEOUT) {
+      error(SD_ERROR_ACMD41, r);
+      return false;
+    }
+  }
+  chipSelectHigh();
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ * Reads a 512 byte block from a storage device.
+ *
+ * \param[in] blockNumber Logical block to be read.
+ * \param[out] dst Pointer to the location that will receive the data.
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t SdCard::readBlock(uint32_t blockNumber, uint8_t* dst) {
+  if (cardCommand(CMD17, blockNumber << 9)) {
+    error(SD_ERROR_CMD17);
+    return false;
+  }
+  return readTransfer(dst, 512);
+}
+//------------------------------------------------------------------------------
+uint8_t SdCard::readReg(uint8_t cmd, void* buf) {
+  uint8_t* dst = reinterpret_cast<uint8_t*>(buf);
+  if (cardCommand(cmd, 0)) {
+    chipSelectHigh();
+    return false;
+  }
+  return readTransfer(dst, 16);
+}
+//------------------------------------------------------------------------------
+uint8_t SdCard::readTransfer(uint8_t* dst, uint16_t count) {
+  // wait for start of data
+  if (!waitForToken(DATA_START_BLOCK, SD_READ_TIMEOUT)) {
+    error(SD_ERROR_READ_TIMEOUT);
+  }
+  // start first spi transfer
+  SPDR = 0XFF;
+  for (uint16_t i = 0; i < count; i++) {
+    while (!(SPSR & (1 << SPIF)));
+    dst[i] = SPDR;
+    SPDR = 0XFF;
+  }
+  // wait for first CRC byte
+  while (!(SPSR & (1 << SPIF)));
+  spiRec();  // second CRC byte
+  chipSelectHigh();
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ * Writes a 512 byte block to a storage device.
+ *
+ * \param[in] blockNumber Logical block to be written.
+ * \param[in] src Pointer to the location of the data to be written.
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t SdCard::writeBlock(uint32_t blockNumber, const uint8_t* src) {
+  uint32_t address = blockNumber << 9;
+#if SD_PROTECT_BLOCK_ZERO
+  // don't allow write to first block
+  if (address == 0) {
+    error(SD_ERROR_BLOCK_ZERO_WRITE);
+    return false;
+  }
+#endif  // SD_PROTECT_BLOCK_ZERO
+  if (cardCommand(CMD24, address)) {
+    error(SD_ERROR_CMD24);
+    return false;
+  }
+  // optimize write loop
+  SPDR = DATA_START_BLOCK;
+  for (uint16_t i = 0; i < 512; i++) {
+    while (!(SPSR & (1 << SPIF)));
+    SPDR = src[i];
+  }
+  while (!(SPSR & (1 << SPIF)));  // wait for last data byte
+  spiSend(0xFF);  // dummy crc
+  spiSend(0xFF);  // dummy crc
+
+  // get write response
+  uint8_t r1 = spiRec();
+  if ((r1 & DATA_RES_MASK) != DATA_RES_ACCEPTED) {
+    error(SD_ERROR_WRITE_RESPONSE, r1);
+    return false;
+  }
+  // wait for card to complete write programming
+  if (!waitForToken(0XFF, SD_WRITE_TIMEOUT)) {
+      error(SD_ERROR_WRITE_TIMEOUT);
+  }
+  chipSelectHigh();
+  return true;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SdCard.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SdCard.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SdCard.h	(revision 136)
@@ -0,0 +1,192 @@
+/* Arduino FAT16 Library
+ * Copyright (C) 2008 by William Greiman
+ *
+ * This file is part of the Arduino FAT16 Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Fat16 Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#ifndef SdCard_h
+#define SdCard_h
+ /**
+  * \file
+  * SdCard class
+  */
+#include <SdInfo.h>
+//------------------------------------------------------------------------------
+// Warning only SD_CHIP_SELECT_PIN, the SD card select pin, may be redefined.
+// define hardware SPI pins
+#if defined(__AVR_ATmega168__)\
+||defined(__AVR_ATmega168P__)\
+||defined(__AVR_ATmega328P__)
+// 168 and 328 Arduinos
+/** Slave Select pin */
+uint8_t const SPI_SS_PIN   = 10;
+/** Master Out Slave In pin */
+uint8_t const SPI_MOSI_PIN = 11;
+/** Master In Slave Out pin */
+uint8_t const SPI_MISO_PIN = 12;
+/** Serial Clock */
+uint8_t const SPI_SCK_PIN  = 13;
+//------------------------------------------------------------------------------
+#elif defined(__AVR_ATmega1280__)\
+|| defined(__AVR_ATmega2560__)
+// pins for Arduino Mega
+uint8_t const SPI_SS_PIN   = 53;
+uint8_t const SPI_MOSI_PIN = 51;
+uint8_t const SPI_MISO_PIN = 50;
+uint8_t const SPI_SCK_PIN  = 52;
+//------------------------------------------------------------------------------
+#elif defined(__AVR_ATmega644P__)\
+|| defined(__AVR_ATmega644__)\
+|| defined(__AVR_ATmega1284P__)
+// pins for Sanguino
+uint8_t const SPI_SS_PIN   = 4;
+uint8_t const SPI_MOSI_PIN = 5;
+uint8_t const SPI_MISO_PIN = 6;
+uint8_t const SPI_SCK_PIN  = 7;
+//------------------------------------------------------------------------------
+#elif defined(__AVR_ATmega32U4__)
+// pins for Teensy 2.0
+uint8_t const SPI_SS_PIN   = 8;
+uint8_t const SPI_MOSI_PIN = 16;
+uint8_t const SPI_MISO_PIN = 14;
+uint8_t const SPI_SCK_PIN  = 15;
+//------------------------------------------------------------------------------
+#elif defined(__AVR_AT90USB646__)\
+|| defined(__AVR_AT90USB1286__)
+// pins for Teensy++ 1.0 & 2.0
+uint8_t const SPI_SS_PIN   = 20;
+uint8_t const SPI_MOSI_PIN = 22;
+uint8_t const SPI_MISO_PIN = 23;
+uint8_t const SPI_SCK_PIN  = 21;
+//------------------------------------------------------------------------------
+#else  // SPI pins
+#error unknown CPU
+#endif  // SPI pins
+//------------------------------------------------------------------------------
+/**
+ * SD Chip Select pin
+ *
+ * Warning if this pin is redefined the hardware SS pin will be enabled
+ * as an output by init().  An avr processor will not function as an SPI
+ * master unless SS is set to output mode.
+ *
+ * For example to set SD_CHIP_SELECT_PIN to 8 for the SparkFun microSD shield:
+ * uint8_t const SD_CHIP_SELECT_PIN = 8;
+ *
+ * The default chip select pin for the SD card is SS.
+ */
+uint8_t const SD_CHIP_SELECT_PIN = SPI_SS_PIN;
+//------------------------------------------------------------------------------
+/** command timeout ms */
+uint16_t const SD_COMMAND_TIMEOUT = 300;
+/** init timeout ms */
+uint16_t const SD_INIT_TIMEOUT    = 2000;
+/** read timeout ms */
+uint16_t const SD_READ_TIMEOUT    = 300;
+/** write timeout ms */
+uint16_t const SD_WRITE_TIMEOUT   = 600;
+//------------------------------------------------------------------------------
+// error codes
+/** Card did not go into SPI mode */
+uint8_t const SD_ERROR_CMD0              = 1;
+/** Card did not go ready */
+uint8_t const SD_ERROR_ACMD41            = 2;
+/** Write command not accepted */
+uint8_t const SD_ERROR_CMD24             = 3;
+/** Read command not accepted */
+uint8_t const SD_ERROR_CMD17             = 4;
+/** timeout waiting for read data */
+uint8_t const SD_ERROR_READ_TIMEOUT      = 5;
+/** write error occurred */
+uint8_t const SD_ERROR_WRITE_RESPONSE    = 6;
+/** timeout waiting for write status */
+uint8_t const SD_ERROR_WRITE_TIMEOUT     = 7;
+/** attempt to write block zero */
+uint8_t const SD_ERROR_BLOCK_ZERO_WRITE  = 8;
+/** card returned an error to a CMD13 status check after a write */
+uint8_t const SD_ERROR_WRITE_PROGRAMMING = 9;
+/** invalid SPI speed in init() call */
+uint8_t const SD_ERROR_SPI_SPEED         = 10;
+//------------------------------------------------------------------------------
+// SD command codes
+/** SEND OPERATING CONDITIONS */
+uint8_t const ACMD41   = 0X29;
+/** GO_IDLE_STATE - init card in spi mode if CS low */
+uint8_t const CMD0     = 0X00;
+/** SEND_CSD - Card Specific Data */
+uint8_t const CMD9     = 0X09;
+/** SEND_CID - Card IDentification */
+uint8_t const CMD10    = 0X0A;
+/** SEND_STATUS - read the card status register */
+uint8_t const CMD13    = 0X0D;
+/** READ_BLOCK */
+uint8_t const CMD17    = 0X11;
+/** WRITE_BLOCK */
+uint8_t const CMD24    = 0X18;
+/** APP_CMD - escape for application specific command */
+uint8_t const CMD55    = 0X37;
+//------------------------------------------------------------------------------
+/**
+ * \class SdCard
+ * \brief Hardware access class for SD flash cards
+ *
+ * Supports raw access to a standard SD flash memory card.
+ *
+ */
+class SdCard  {
+ public:
+  /** Code for a SD error. See SdCard.h for definitions. */
+  uint8_t errorCode;
+  /** Data that may be helpful in determining the cause of an error */
+  uint8_t errorData;
+  uint32_t cardSize(void);
+  /**
+   * Initialize an SD flash memory card with default clock rate and chip
+   * select pin.  See SdCard::init(uint8_t sckRateID, uint8_t chipSelectPin).
+   */
+  uint8_t init(void) {
+    return init(0, SD_CHIP_SELECT_PIN);
+  }
+  /**
+   * Initialize an SD flash memory card with the selected SPI clock rate
+   * and the default SD chip select pin.
+   * See SdCard::init(uint8_t slow, uint8_t chipSelectPin).
+   */
+  uint8_t init(uint8_t speed) {
+    return init(speed, SD_CHIP_SELECT_PIN);
+  }
+  uint8_t init(uint8_t speed, uint8_t chipselectPin);
+  uint8_t readBlock(uint32_t block, uint8_t* dst);
+  /** Read the CID register which contains info about the card.
+   *  This includes Manufacturer ID, OEM ID, product name, version,
+   *  serial number, and manufacturing date. */
+  uint8_t readCID(cid_t* cid) {
+    return readReg(CMD10, cid);
+  }
+  uint8_t writeBlock(uint32_t block, const uint8_t* src);
+ private:
+  uint8_t cardAcmd(uint8_t cmd, uint32_t arg);
+  uint8_t cardCommand(uint8_t cmd, uint32_t arg);
+  uint8_t chipSelectPin_;
+  uint8_t speed_;
+  void chipSelectHigh(void);
+  void chipSelectLow(void);
+  void error(uint8_t code, uint8_t data);
+  void error(uint8_t code);
+  uint8_t readReg(uint8_t cmd, void* buf);
+  uint8_t readTransfer(uint8_t* dst, uint16_t count);
+};
+#endif  // SdCard_h
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SdInfo.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SdInfo.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SdInfo.h	(revision 136)
@@ -0,0 +1,117 @@
+/* Arduino FAT16 Library
+ * Copyright (C) 2008 by William Greiman
+ *
+ * This file is part of the Arduino FAT16 Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Fat16 Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#ifndef SdInfo_h
+#define SdInfo_h
+#include <stdint.h>
+// Based on the document:
+//
+// SD Specifications
+// Part 1
+// Physical Layer
+// Simplified Specification
+// Version 2.00
+// September 25, 2006
+//
+// www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
+//
+// Card IDentification (CID) register
+typedef struct CID {
+  // byte 0
+  uint8_t mid;  // Manufacturer ID
+  // byte 1-2
+  char oid[2];  // OEM/Application ID
+  // byte 3-7
+  char pnm[5];  // Product name
+  // byte 8
+  unsigned prv_m : 4;  // Product revision n.m
+  unsigned prv_n : 4;
+  // byte 9-12
+  uint32_t psn;  // Product serial number
+  // byte 13
+  unsigned mdt_year_high : 4;  // Manufacturing date
+  unsigned reserved : 4;
+  // byte 14
+  unsigned mdt_month : 4;
+  unsigned mdt_year_low :4;
+  // byte 15
+  unsigned always1 : 1;
+  unsigned crc : 7;
+}cid_t;
+// Card-Specific Data register
+typedef struct CSD {
+  // byte 0
+  unsigned reserved1 : 6;
+  unsigned csd_ver : 2;
+  // byte 1
+  uint8_t taac;
+  // byte 2
+  uint8_t nsac;
+  // byte 3
+  uint8_t tran_speed;
+  // byte 4
+  uint8_t ccc_high;
+  // byte 5
+  unsigned read_bl_len : 4;
+  unsigned ccc_low : 4;
+  // byte 6
+  unsigned c_size_high : 2;
+  unsigned reserved2 : 2;
+  unsigned dsr_imp : 1;
+  unsigned read_blk_misalign :1;
+  unsigned write_blk_misalign : 1;
+  unsigned read_bl_partial : 1;
+  // byte 7
+  uint8_t c_size_mid;
+  // byte 8
+  unsigned vdd_r_curr_max : 3;
+  unsigned vdd_r_curr_min : 3;
+  unsigned c_size_low :2;
+  // byte 9
+  unsigned c_size_mult_high : 2;
+  unsigned vdd_w_cur_max : 3;
+  unsigned vdd_w_curr_min : 3;
+  // byte 10
+  unsigned sector_size_high : 6;
+  unsigned erase_blk_en : 1;
+  unsigned c_size_mult_low : 1;
+  // byte 11
+  unsigned wp_grp_size : 7;
+  unsigned sector_size_low : 1;
+  // byte 12
+  unsigned write_bl_len_high : 2;
+  unsigned r2w_factor : 3;
+  unsigned reserved3 : 2;
+  unsigned wp_grp_enable : 1;
+  // byte 13
+  unsigned reserved4 : 5;
+  unsigned write_partial : 1;
+  unsigned write_bl_len_low : 2;
+  // byte 14
+  unsigned reserved5: 2;
+  unsigned file_format : 2;
+  unsigned tmp_write_protect : 1;
+  unsigned perm_write_protect : 1;
+  unsigned copy : 1;
+  unsigned file_format_grp : 1;
+  // byte 15
+  unsigned always1 : 1;
+  unsigned crc : 7;
+}csd_t;
+#endif  // SdInfo_h
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Sensors.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Sensors.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Sensors.cpp	(revision 136)
@@ -0,0 +1,274 @@
+#include "ArduinoRobot.h"
+#include "Multiplexer.h"
+#include "Wire.h"
+bool RobotControl::digitalRead(uint8_t port){
+	uint8_t type=_getTypeCode(port);
+	switch(type){
+		case TYPE_TOP_TK:
+			return _digitalReadTopMux(port);
+			break;
+		case TYPE_TOP_TKD:
+			return _digitalReadTopPin(port);
+			break;
+		case TYPE_BOTTOM_TK:
+			return _requestDigitalRead(port);
+			break;
+	}
+}
+int RobotControl::analogRead(uint8_t port){
+	uint8_t type=_getTypeCode(port);
+	switch(type){
+		case TYPE_TOP_TK:
+			return _analogReadTopMux(port);
+			break;
+		case TYPE_TOP_TKD:
+			return _analogReadTopPin(port);
+			break;
+		case TYPE_BOTTOM_TK:
+			return _requestAnalogRead(port);
+			break;
+	}
+}
+void RobotControl::digitalWrite(uint8_t port, bool value){
+	uint8_t type=_getTypeCode(port);
+	switch(type){
+		case TYPE_TOP_TK:
+			//Top TKs can't use digitalWrite?
+			break;
+		case TYPE_TOP_TKD:
+			_digitalWriteTopPin(port, value);
+			break;
+		case TYPE_BOTTOM_TK:
+			_requestDigitalWrite(port, value);
+			break;
+	}
+}
+void RobotControl::analogWrite(uint8_t port, uint8_t value){
+	if(port==TKD4)
+		::analogWrite(port,value);
+}
+
+uint8_t RobotControl::_getTypeCode(uint8_t port){
+	switch(port){
+		case TK0:
+		case TK1:
+		case TK2:
+		case TK3:
+		case TK4:
+		case TK5:
+		case TK6:
+		case TK7:
+			return TYPE_TOP_TK;
+			break;
+			
+		case TKD0:
+		case TKD1:
+		case TKD2:
+		case TKD3:
+		case TKD4:
+		case TKD5:
+		case LED1:
+			return TYPE_TOP_TKD;
+			break;
+			
+		case B_TK1:
+		case B_TK2:
+		case B_TK3:
+		case B_TK4:
+			return TYPE_BOTTOM_TK;
+			break;
+	}
+}
+uint8_t RobotControl::_portToTopMux(uint8_t port){
+	switch(port){
+		case TK0:
+			return 0;
+		case TK1:
+			return 1;
+		case TK2:
+			return 2;
+		case TK3:
+			return 3;
+		case TK4:
+			return 4;
+		case TK5:
+			return 5;
+		case TK6:
+			return 6;
+		case TK7:
+			return 7;
+	}
+}
+uint8_t RobotControl::_topDPortToAPort(uint8_t port){
+	switch(port){
+		case TKD0:
+		  return A1;
+		case TKD1:
+		  return A2;
+		case TKD2:
+		  return A3;
+		case TKD3:
+		  return A4;
+		case TKD4:
+		  return A7;
+		case TKD5:
+		  return A11;
+	}
+}
+int* RobotControl::parseMBDPort(uint8_t port){
+	//Serial.println(port);
+	switch(port){
+		case B_TK1:
+			return &motorBoardData._B_TK1;
+		case B_TK2:
+			return &motorBoardData._B_TK2;
+		case B_TK3:
+			return &motorBoardData._B_TK3;
+		case B_TK4:
+			return &motorBoardData._B_TK4;
+		
+		/*		
+		case B_IR0:
+			return &motorBoardData._B_IR0;
+		case B_IR1:
+			return &motorBoardData._B_IR1;
+		case B_IR2:
+			return &motorBoardData._B_IR2;
+		case B_IR3:
+			return &motorBoardData._B_IR3;
+		case B_IR4:
+			return &motorBoardData._B_IR4;*/
+	}
+}
+int RobotControl::get_motorBoardData(uint8_t port){
+	return *parseMBDPort(port);
+}
+void RobotControl::set_motorBoardData(uint8_t port, int data){
+	*parseMBDPort(port)=data;
+}
+
+bool RobotControl::_digitalReadTopMux(uint8_t port){
+	uint8_t num=_portToTopMux(port);
+	return Multiplexer::getDigitalValueAt(num);
+}
+
+int RobotControl::_analogReadTopMux(uint8_t port){
+	uint8_t num=_portToTopMux(port);
+	return Multiplexer::getAnalogValueAt(num);
+}
+
+bool RobotControl::_digitalReadTopPin(uint8_t port){
+	return ::digitalRead(port);
+}
+int RobotControl::_analogReadTopPin(uint8_t port){
+	uint8_t aPin=_topDPortToAPort(port);
+	return ::analogRead(aPin);
+}
+void RobotControl::_digitalWriteTopPin(uint8_t port, bool value){
+	::digitalWrite(port, value);
+}
+
+bool RobotControl::_requestDigitalRead(uint8_t port){
+	messageOut.writeByte(COMMAND_DIGITAL_READ);
+	messageOut.writeByte(port);//B_TK1 - B_TK4
+	messageOut.sendData();
+	delay(10);
+	if(messageIn.receiveData()){
+		//Serial.println("*************");
+		uint8_t cmd=messageIn.readByte();
+		//Serial.print("cmd: ");
+		//Serial.println(cmd);
+		if(!(cmd==COMMAND_DIGITAL_READ_RE))
+			return false;
+			
+		uint8_t pt=messageIn.readByte(); //Bottom TK port codename
+		//Serial.print("pt: ");
+		//Serial.println(pt);
+		set_motorBoardData(pt,messageIn.readByte());
+		return get_motorBoardData(port);
+	}
+}
+int RobotControl::_requestAnalogRead(uint8_t port){
+	messageOut.writeByte(COMMAND_ANALOG_READ);
+	messageOut.writeByte(port);//B_TK1 - B_TK4
+	messageOut.sendData();
+	delay(10);
+	if(messageIn.receiveData()){
+		uint8_t cmd=messageIn.readByte();
+		//Serial.println("*************");
+		//Serial.print("cmd: ");
+		//Serial.println(cmd);
+		if(!(cmd==COMMAND_ANALOG_READ_RE))
+			return false;
+			
+		uint8_t pt=messageIn.readByte();
+		//Serial.print("pt: ");
+		//Serial.println(pt);
+		set_motorBoardData(pt,messageIn.readInt());
+		return get_motorBoardData(port);
+	}
+}
+void RobotControl::_requestDigitalWrite(uint8_t selector, uint8_t value){
+	messageOut.writeByte(COMMAND_DIGITAL_WRITE);
+	messageOut.writeByte(selector);//B_TK1 - B_TK4
+	messageOut.writeByte(value);
+	messageOut.sendData();
+}
+
+
+
+
+
+void RobotControl::updateIR(){
+	messageOut.writeByte(COMMAND_READ_IR);
+	messageOut.sendData();
+	delay(10);
+	if(messageIn.receiveData()){
+		if(messageIn.readByte()==COMMAND_READ_IR_RE){
+			for(int i=0;i<5;i++){
+				IRarray[i]=messageIn.readInt();
+			}
+		}
+	}
+}
+
+int RobotControl::knobRead(){
+	return ::analogRead(POT);
+}
+
+int RobotControl::trimRead(){
+	messageOut.writeByte(COMMAND_READ_TRIM);
+	messageOut.sendData();
+	delay(10);
+	if(messageIn.receiveData()){
+		uint8_t cmd=messageIn.readByte();
+		if(!(cmd==COMMAND_READ_TRIM_RE))
+			return false;
+			
+		uint16_t pt=messageIn.readInt();
+		return pt;
+	}
+}
+
+uint16_t RobotControl::compassRead(){
+	return Compass::getReading();
+}
+
+/*
+void RobotControl::beginUR(uint8_t pinTrigger, uint8_t pinEcho){
+	pinTrigger_UR=pinTrigger;
+	pinEcho_UR=pinEcho;
+	
+	pinMode(pinEcho_UR, INPUT);
+	pinMode(pinTrigger_UR, OUTPUT);
+}
+uint16_t RobotControl::getDistance(){
+	digitalWrite(pinTrigger_UR, LOW);                   // Set the trigger pin to low for 2uS
+	delayMicroseconds(2);
+	digitalWrite(pinTrigger_UR, HIGH);                  // Send a 10uS high to trigger ranging
+	delayMicroseconds(10);
+	digitalWrite(pinTrigger_UR, LOW);                   // Send pin low again
+	uint16_t distance = pulseIn(pinEcho_UR, HIGH);        // Read in times pulse
+	distance= distance/58;                        // Calculate distance from time of pulse
+	return distance;
+}*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Squawk.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Squawk.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Squawk.cpp	(revision 136)
@@ -0,0 +1,601 @@
+// Squawk Soft-Synthesizer Library for Arduino
+//
+// Davey Taylor 2013
+// d.taylor@arduino.cc
+
+#include "Squawk.h"
+
+// Period range, used for clamping
+#define PERIOD_MIN 28
+#define PERIOD_MAX 3424
+
+// Convenience macros
+#define LO4(V)    ((V) & 0x0F)
+#define HI4(V)    (((V) & 0xF0) >> 4)
+#define MIN(A, B) ((A) < (B) ? (A) : (B))
+#define MAX(A, B) ((A) > (B) ? (A) : (B))
+#define FREQ(PERIOD) (tuning_long / (PERIOD))
+
+// SquawkStream class for PROGMEM data
+class StreamROM : public SquawkStream {
+  private:
+    uint8_t *p_start;
+    uint8_t *p_cursor;
+  public:
+    StreamROM(const uint8_t *p_rom = NULL) { p_start = p_cursor = (uint8_t*)p_rom; }
+    uint8_t read() { return pgm_read_byte(p_cursor++); }
+    void seek(size_t offset) { p_cursor = p_start + offset; }
+};
+
+// Oscillator memory
+typedef struct {
+  uint8_t fxp;
+  uint8_t offset;
+  uint8_t mode;
+} pto_t;
+
+// Deconstructed cell
+typedef struct {
+  uint8_t fxc, fxp, ixp;
+} cel_t;
+
+// Effect memory
+typedef struct {
+  int8_t    volume;
+  uint8_t   port_speed;
+  uint16_t  port_target;
+  bool      glissando;
+  pto_t     vibr;
+  pto_t     trem;
+  uint16_t  period;
+  uint8_t   param;
+} fxm_t;
+
+// Locals
+static uint8_t  order_count;
+static uint8_t  order[64];
+static uint8_t  speed;
+static uint8_t  tick;
+static uint8_t  ix_row;
+static uint8_t  ix_order;
+static uint8_t  ix_nextrow;
+static uint8_t  ix_nextorder;
+static uint8_t  row_delay;
+static fxm_t    fxm[4];
+static cel_t    cel[4];
+static uint32_t tuning_long;
+static uint16_t sample_rate;
+static float    tuning = 1.0;
+static uint16_t tick_rate = 50;
+
+static SquawkStream *stream;
+static uint16_t stream_base;
+static StreamROM rom;
+
+// Imports
+extern intptr_t squawk_register;
+extern uint16_t cia;
+
+// Exports
+osc_t osc[4];
+uint8_t pcm = 128;
+
+// ProTracker period tables
+const uint16_t period_tbl[84] PROGMEM = {
+  3424, 3232, 3048, 2880, 2712, 2560, 2416, 2280, 2152, 2032, 1920, 1814,
+  1712, 1616, 1524, 1440, 1356, 1280, 1208, 1140, 1076, 1016,  960,  907,
+   856,  808,  762,  720,  678,  640,  604,  570,  538,  508,  480,  453,
+   428,  404,  381,  360,  339,  320,  302,  285,  269,  254,  240,  226,
+   214,  202,  190,  180,  170,  160,  151,  143,  135,  127,  120,  113,
+   107,  101,   95,   90,   85,   80,   75,   71,   67,   63,   60,   56,
+    53,   50,   47,   45,   42,   40,   37,   35,   33,   31,   30,   28,
+};
+
+// ProTracker sine table
+const int8_t sine_tbl[32] PROGMEM = {
+  0x00, 0x0C, 0x18, 0x25, 0x30, 0x3C, 0x47, 0x51, 0x5A, 0x62, 0x6A, 0x70, 0x76, 0x7A, 0x7D, 0x7F,
+  0x7F, 0x7F, 0x7D, 0x7A, 0x76, 0x70, 0x6A, 0x62, 0x5A, 0x51, 0x47, 0x3C, 0x30, 0x25, 0x18, 0x0C,
+};
+
+// Squawk object
+SquawkSynth Squawk;
+
+// Look up or generate waveform for ProTracker vibrato/tremolo oscillator
+static int8_t do_osc(pto_t *p_osc) {
+  int8_t sample = 0;
+  int16_t mul;
+  switch(p_osc->mode & 0x03) {
+    case 0: // Sine
+      sample = pgm_read_byte(&sine_tbl[(p_osc->offset) & 0x1F]);
+      if(p_osc->offset & 0x20) sample = -sample;
+      break;
+    case 1: // Square
+      sample = (p_osc->offset & 0x20) ? 127 : -128;
+      break;
+    case 2: // Saw
+      sample = -(p_osc->offset << 2);
+      break;
+    case 3: // Noise (random)
+      sample = rand();
+      break;
+  }
+  mul = sample * LO4(p_osc->fxp);
+  p_osc->offset = (p_osc->offset + HI4(p_osc->fxp));
+  return mul >> 6;
+}
+
+// Calculates and returns arpeggio period
+// Essentially finds period of current note + halftones
+static inline uint16_t arpeggio(uint8_t ch, uint8_t halftones) {
+  uint8_t n;
+  for(n = 0; n != 47; n++) {
+    if(fxm[ch].period >= pgm_read_word(&period_tbl[n])) break;
+  }
+  return pgm_read_word(&period_tbl[MIN(n + halftones, 47)]);
+}
+
+// Calculates and returns glissando period
+// Essentially snaps a sliding frequency to the closest note
+static inline uint16_t glissando(uint8_t ch) {
+  uint8_t n;
+  uint16_t period_h, period_l;
+  for(n = 0; n != 47; n++) {
+    period_l = pgm_read_word(&period_tbl[n]);
+    period_h = pgm_read_word(&period_tbl[n + 1]);
+    if(fxm[ch].period < period_l && fxm[ch].period >= period_h) {
+      if(period_l - fxm[ch].period <= fxm[ch].period - period_h) {
+        period_h = period_l;
+      }
+      break;
+    }
+  }
+  return period_h;
+}
+
+// Tunes Squawk to a different frequency
+void SquawkSynth::tune(float new_tuning) {
+  tuning = new_tuning;
+  tuning_long = (long)(((double)3669213184.0 / (double)sample_rate) * (double)tuning);
+
+}
+
+// Sets tempo
+void SquawkSynth::tempo(uint16_t new_tempo) {
+  tick_rate = new_tempo;
+  cia = sample_rate / tick_rate; // not atomic?
+}
+
+// Initializes Squawk
+// Sets up the selected port, and the sample grinding ISR
+void SquawkSynth::begin(uint16_t hz) {
+  word isr_rr;
+
+  sample_rate = hz;
+  tuning_long = (long)(((double)3669213184.0 / (double)sample_rate) * (double)tuning);
+  cia = sample_rate / tick_rate;
+
+  if(squawk_register == (intptr_t)&OCR0A) {
+    // Squawk uses PWM on OCR0A/PD5(ATMega328/168)/PB7(ATMega32U4)
+#ifdef  __AVR_ATmega32U4__
+    DDRB  |= 0b10000000; // TODO: FAIL on 32U4
+#else
+    DDRD  |= 0b01000000;
+#endif
+    TCCR0A = 0b10000011; // Fast-PWM 8-bit
+    TCCR0B = 0b00000001; // 62500Hz
+    OCR0A  = 0x7F;
+  } else if(squawk_register == (intptr_t)&OCR0B) {
+    // Squawk uses PWM on OCR0B/PC5(ATMega328/168)/PD0(ATMega32U4)
+#ifdef  __AVR_ATmega32U4__
+    DDRD  |= 0b00000001;
+#else
+    DDRD  |= 0b00100000;
+#endif                   // Set timer mode to
+    TCCR0A = 0b00100011; // Fast-PWM 8-bit
+    TCCR0B = 0b00000001; // 62500Hz
+    OCR0B  = 0x7F;
+#ifdef OCR2A
+  } else if(squawk_register == (intptr_t)&OCR2A) {
+    // Squawk uses PWM on OCR2A/PB3
+    DDRB  |= 0b00001000; // Set timer mode to
+    TCCR2A = 0b10000011; // Fast-PWM 8-bit
+    TCCR2B = 0b00000001; // 62500Hz
+    OCR2A  = 0x7F;
+#endif
+#ifdef OCR2B
+  } else if(squawk_register == (intptr_t)&OCR2B) {
+    // Squawk uses PWM on OCR2B/PD3
+    DDRD  |= 0b00001000; // Set timer mode to
+    TCCR2A = 0b00100011; // Fast-PWM 8-bit
+    TCCR2B = 0b00000001; // 62500Hz
+    OCR2B  = 0x7F;
+#endif
+#ifdef OCR3AL
+  } else if(squawk_register == (intptr_t)&OCR3AL) {
+    // Squawk uses PWM on OCR3AL/PC6
+    DDRC  |= 0b01000000; // Set timer mode to
+    TCCR3A = 0b10000001; // Fast-PWM 8-bit
+    TCCR3B = 0b00001001; // 62500Hz
+    OCR3AH = 0x00;
+    OCR3AL = 0x7F;
+#endif
+  } else if(squawk_register == (intptr_t)&SPDR) {
+    // NOT YET SUPPORTED
+    // Squawk uses external DAC via SPI
+    // TODO: Configure SPI
+    // TODO: Needs SS toggle in sample grinder
+  } else if(squawk_register == (intptr_t)&PORTB) {
+    // NOT YET SUPPORTED
+    // Squawk uses resistor ladder on PORTB
+    // TODO: Needs shift right in sample grinder
+    DDRB   = 0b11111111;
+  } else if(squawk_register == (intptr_t)&PORTC) {
+    // NOT YET SUPPORTED
+    // Squawk uses resistor ladder on PORTC
+    // TODO: Needs shift right in sample grinder
+    DDRC   = 0b11111111;
+  }
+
+  // Seed LFSR (needed for noise)
+  osc[3].freq = 0x2000;
+
+  // Set up ISR to run at sample_rate (may not be exact)
+  isr_rr = F_CPU / sample_rate;
+  TCCR1A = 0b00000000;     // Set timer mode
+  TCCR1B = 0b00001001;
+  OCR1AH = isr_rr >> 8;    // Set freq
+  OCR1AL = isr_rr & 0xFF;
+}
+
+// Decrunches a 9 byte row into a useful data
+static void decrunch_row() {
+  uint8_t data;
+
+  // Initial decrunch
+  stream->seek(stream_base + ((order[ix_order] << 6) + ix_row) * 9);
+  data = stream->read(); cel[0].fxc  =  data << 0x04;
+                         cel[1].fxc  =  data &  0xF0;
+  data = stream->read(); cel[0].fxp  =  data;
+  data = stream->read(); cel[1].fxp  =  data;
+  data = stream->read(); cel[2].fxc  =  data << 0x04;
+                         cel[3].fxc  =  data >> 0x04;
+  data = stream->read(); cel[2].fxp  =  data;
+  data = stream->read(); cel[3].fxp  =  data;
+  data = stream->read(); cel[0].ixp  =  data;
+  data = stream->read(); cel[1].ixp  =  data;
+  data = stream->read(); cel[2].ixp  =  data;
+
+  // Decrunch extended effects
+  if(cel[0].fxc == 0xE0) { cel[0].fxc |= cel[0].fxp >> 4; cel[0].fxp &= 0x0F; }
+  if(cel[1].fxc == 0xE0) { cel[1].fxc |= cel[1].fxp >> 4; cel[1].fxp &= 0x0F; }
+  if(cel[2].fxc == 0xE0) { cel[2].fxc |= cel[2].fxp >> 4; cel[2].fxp &= 0x0F; }
+
+  // Decrunch cell 3 ghetto-style
+  cel[3].ixp = ((cel[3].fxp & 0x80) ? 0x00 : 0x7F) | ((cel[3].fxp & 0x40) ? 0x80 : 0x00);
+  cel[3].fxp &= 0x3F;
+  switch(cel[3].fxc) {
+    case 0x02:
+    case 0x03: if(cel[3].fxc & 0x01) cel[3].fxp |= 0x40; cel[3].fxp = (cel[3].fxp >> 4) | (cel[3].fxp << 4); cel[3].fxc = 0x70; break;
+    case 0x01: if(cel[3].fxp & 0x08) cel[3].fxp = (cel[3].fxp & 0x07) << 4; cel[3].fxc = 0xA0; break;
+    case 0x04: cel[3].fxc = 0xC0; break;
+    case 0x05: cel[3].fxc = 0xB0; break;
+    case 0x06: cel[3].fxc = 0xD0; break;
+    case 0x07: cel[3].fxc = 0xF0; break;
+    case 0x08: cel[3].fxc = 0xE7; break;
+    case 0x09: cel[3].fxc = 0xE9; break;
+    case 0x0A: cel[3].fxc = (cel[3].fxp & 0x08) ? 0xEA : 0xEB; cel[3].fxp &= 0x07; break;
+    case 0x0B: cel[3].fxc = (cel[3].fxp & 0x10) ? 0xED : 0xEC; cel[3].fxp &= 0x0F; break;
+    case 0x0C: cel[3].fxc = 0xEE; break;
+  }
+
+  // Apply generic effect parameter memory
+  uint8_t ch;
+  cel_t *p_cel = cel;
+  fxm_t *p_fxm = fxm;
+  for(ch = 0; ch != 4; ch++) {
+    uint8_t fx = p_cel->fxc;
+    if(fx == 0x10 || fx == 0x20 || fx == 0xE1 || fx == 0xE2 || fx == 0x50 || fx == 0x60 || fx == 0xA0) {
+      if(p_cel->fxp) {
+        p_fxm->param = p_cel->fxp;
+      } else {
+        p_cel->fxp = p_fxm->param;
+      }
+    }
+    p_cel++; p_fxm++;
+  }
+}
+
+// Resets playback
+static void playroutine_reset() {
+  memset(fxm, 0, sizeof(fxm));
+  tick         = 0;
+  ix_row       = 0;
+  ix_order     = 0;
+  ix_nextrow   = 0xFF;
+  ix_nextorder = 0xFF;
+  row_delay    = 0;
+  speed        = 6;
+  decrunch_row();
+}
+
+// Start grinding samples
+void SquawkSynth::play() {
+  TIMSK1 = 1 << OCIE1A; // Enable interrupt
+}
+
+// Load a melody stream and start grinding samples
+void SquawkSynth::play(SquawkStream *melody) {
+  uint8_t n;
+  pause();
+  stream = melody;
+  stream->seek(0);
+  n = stream->read();
+  if(n == 'S') {
+    // Squawk SD file
+    stream->seek(4);
+    stream_base = stream->read() << 8;
+    stream_base |= stream->read();
+    stream_base += 6;
+  } else {
+    // Squawk ROM array
+    stream_base = 1;
+  }
+  stream->seek(stream_base);
+  order_count = stream->read();
+  if(order_count <= 64) {
+    stream_base += order_count + 1;
+    for(n = 0; n < order_count; n++) order[n] = stream->read();
+    playroutine_reset();
+    play();
+  } else {
+    order_count = 0;
+  }
+}
+
+// Load a melody in PROGMEM and start grinding samples
+void SquawkSynth::play(const uint8_t *melody) {
+  pause();
+  rom = StreamROM(melody);
+  play(&rom);
+}
+
+// Pause playback
+void SquawkSynth::pause() {
+  TIMSK1 = 0; // Disable interrupt
+}
+
+// Stop playing, unload melody
+void SquawkSynth::stop() {
+  pause();
+  order_count = 0; // Unload melody
+}
+
+// Progress module by one tick
+void squawk_playroutine() {
+  static bool lockout = false;
+
+  if(!order_count) return;
+
+  // Protect from re-entry via ISR
+  cli();
+  if(lockout) {
+    sei();
+    return;
+  }
+  lockout = true;
+  sei();
+
+  // Handle row delay
+  if(row_delay) {
+    if(tick == 0) row_delay--;
+    // Advance tick
+    if(++tick == speed) tick = 0;
+  } else {
+
+    // Quick pointer access
+    fxm_t *p_fxm = fxm;
+    osc_t *p_osc = osc;
+    cel_t *p_cel = cel;
+
+    // Temps
+    uint8_t ch, fx, fxp;
+    bool    pattern_jump = false;
+    uint8_t ix_period;
+
+    for(ch = 0; ch != 4; ch++) {
+      uint8_t       temp;
+
+      // Local register copy
+      fx        = p_cel->fxc;
+      fxp       = p_cel->fxp;
+      ix_period = p_cel->ixp;
+
+      // If first tick
+      if(tick == (fx == 0xED ? fxp : 0)) {
+
+        // Reset volume
+        if(ix_period & 0x80) p_osc->vol = p_fxm->volume = 0x20;
+
+        if((ix_period & 0x7F) != 0x7F) {
+
+          // Reset oscillators (unless continous flag set)
+          if((p_fxm->vibr.mode & 0x4) == 0x0) p_fxm->vibr.offset = 0;
+          if((p_fxm->trem.mode & 0x4) == 0x0) p_fxm->trem.offset = 0;
+
+          // Cell has note
+          if(fx == 0x30 || fx == 0x50) {
+
+            // Tone-portamento effect setup
+            p_fxm->port_target = pgm_read_word(&period_tbl[ix_period & 0x7F]);
+          } else {
+
+            // Set required effect memory parameters
+            p_fxm->period = pgm_read_word(&period_tbl[ix_period & 0x7F]);
+
+            // Start note
+            if(ch != 3) p_osc->freq = FREQ(p_fxm->period);
+
+          }
+        }
+
+        // Effects processed when tick = 0
+        switch(fx) {
+          case 0x30: // Portamento
+            if(fxp) p_fxm->port_speed = fxp;
+            break;
+          case 0xB0: // Jump to pattern
+            ix_nextorder = (fxp >= order_count ? 0x00 : fxp);
+            ix_nextrow = 0;
+            pattern_jump = true;
+            break;
+          case 0xC0: // Set volume
+            p_osc->vol = p_fxm->volume = MIN(fxp, 0x20);
+            break;
+          case 0xD0: // Jump to row
+            if(!pattern_jump) ix_nextorder = ((ix_order + 1) >= order_count ? 0x00 : ix_order + 1);
+            pattern_jump = true;
+            ix_nextrow = (fxp > 63 ? 0 : fxp);
+            break;
+          case 0xF0: // Set speed, BPM(CIA) not supported
+            if(fxp <= 0x20) speed = fxp;
+            break;
+          case 0x40: // Vibrato
+            if(fxp) p_fxm->vibr.fxp = fxp;
+            break;
+          case 0x70: // Tremolo
+            if(fxp) p_fxm->trem.fxp = fxp;
+            break;
+          case 0xE1: // Fine slide up
+            if(ch != 3) {
+              p_fxm->period = MAX(p_fxm->period - fxp, PERIOD_MIN);
+              p_osc->freq = FREQ(p_fxm->period);
+            }
+            break;
+          case 0xE2: // Fine slide down
+            if(ch != 3) {
+              p_fxm->period = MIN(p_fxm->period + fxp, PERIOD_MAX);
+              p_osc->freq = FREQ(p_fxm->period);
+            }
+            break;
+          case 0xE3: // Glissando control
+            p_fxm->glissando = (fxp != 0);
+            break;
+          case 0xE4: // Set vibrato waveform
+            p_fxm->vibr.mode = fxp;
+            break;
+          case 0xE7: // Set tremolo waveform
+            p_fxm->trem.mode = fxp;
+            break;
+          case 0xEA: // Fine volume slide up
+            p_osc->vol = p_fxm->volume = MIN(p_fxm->volume + fxp, 0x20);
+            break;
+          case 0xEB: // Fine volume slide down
+            p_osc->vol = p_fxm->volume = MAX(p_fxm->volume - fxp, 0);
+            break;
+          case 0xEE: // Delay
+            row_delay = fxp;
+            break;
+        }
+      } else {
+
+        // Effects processed when tick > 0
+        switch(fx) {
+          case 0x10: // Slide up
+            if(ch != 3) {
+              p_fxm->period = MAX(p_fxm->period - fxp, PERIOD_MIN);
+              p_osc->freq = FREQ(p_fxm->period);
+            }
+            break;
+          case 0x20: // Slide down
+            if(ch != 3) {
+              p_fxm->period = MIN(p_fxm->period + fxp, PERIOD_MAX);
+              p_osc->freq = FREQ(p_fxm->period);
+            }
+            break;
+/*
+          // Just feels... ugly
+          case 0xE9: // Retrigger note
+            temp = tick; while(temp >= fxp) temp -= fxp;
+            if(!temp) {
+              if(ch == 3) {
+                p_osc->freq = p_osc->phase = 0x2000;
+              } else {
+                p_osc->phase = 0;
+              }
+            }
+            break;
+*/            
+          case 0xEC: // Note cut
+            if(fxp == tick) p_osc->vol = 0x00;
+            break;
+          default:   // Multi-effect processing
+
+            // Portamento
+            if(ch != 3 && (fx == 0x30 || fx == 0x50)) {
+              if(p_fxm->period < p_fxm->port_target) p_fxm->period = MIN(p_fxm->period + p_fxm->port_speed,  p_fxm->port_target);
+              else                                   p_fxm->period = MAX(p_fxm->period - p_fxm->port_speed,  p_fxm->port_target);
+              if(p_fxm->glissando) p_osc->freq = FREQ(glissando(ch));
+              else                 p_osc->freq = FREQ(p_fxm->period);
+            }
+
+            // Volume slide
+            if(fx == 0x50 || fx == 0x60 || fx == 0xA0) {
+              if((fxp & 0xF0) == 0) p_fxm->volume -= (LO4(fxp));
+              if((fxp & 0x0F) == 0) p_fxm->volume += (HI4(fxp));
+              p_osc->vol = p_fxm->volume = MAX(MIN(p_fxm->volume, 0x20), 0);
+            }
+        }
+      }
+
+      // Normal play and arpeggio
+      if(fx == 0x00) {
+        if(ch != 3) {
+          temp = tick; while(temp > 2) temp -= 2;
+          if(temp == 0) {
+
+            // Reset
+            p_osc->freq = FREQ(p_fxm->period);
+          } else if(fxp) {
+
+            // Arpeggio
+            p_osc->freq = FREQ(arpeggio(ch, (temp == 1 ? HI4(fxp) : LO4(fxp))));
+          }
+        }
+      } else if(fx == 0x40 || fx == 0x60) {
+
+        // Vibrato
+        if(ch != 3) p_osc->freq = FREQ((p_fxm->period + do_osc(&p_fxm->vibr)));
+      } else if(fx == 0x70) {
+        int8_t trem = p_fxm->volume + do_osc(&p_fxm->trem);
+        p_osc->vol = MAX(MIN(trem, 0x20), 0);
+      }
+
+      // Next channel
+      p_fxm++; p_cel++; p_osc++;
+    }
+
+    // Advance tick
+    if(++tick == speed) tick = 0;
+
+    // Advance playback
+    if(tick == 0) {
+      if(++ix_row == 64) {
+        ix_row = 0;
+        if(++ix_order >= order_count) ix_order = 0;
+      }
+	    // Forced order/row
+	    if( ix_nextorder != 0xFF ) {
+	      ix_order = ix_nextorder;
+	      ix_nextorder = 0xFF;
+	    }
+	    if( ix_nextrow != 0xFF ) {
+	      ix_row = ix_nextrow;
+	      ix_nextrow = 0xFF;
+	    }
+			decrunch_row();
+    }
+
+  }
+
+  lockout = false;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Squawk.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Squawk.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/Squawk.h	(revision 136)
@@ -0,0 +1,265 @@
+// Squawk Soft-Synthesizer Library for Arduino
+//
+// Davey Taylor 2013
+// d.taylor@arduino.cc
+
+#ifndef _SQUAWK_H_
+#define _SQUAWK_H_
+#include <stddef.h>
+#include <inttypes.h>
+#include "Arduino.h"
+
+#define Melody const uint8_t PROGMEM
+
+class SquawkStream {
+	public:
+	  virtual ~SquawkStream() = 0;
+    virtual uint8_t read() = 0;
+    virtual void seek(size_t offset) = 0;
+};
+inline SquawkStream::~SquawkStream() { }
+
+class SquawkSynth {
+
+protected:
+  // Load and play specified melody
+  void play(SquawkStream *melody);
+
+public:
+  SquawkSynth() {};
+
+  // Initialize Squawk to generate samples at sample_rate Hz
+  void begin(uint16_t sample_rate);
+
+  // Load and play specified melody
+  // melody needs to point to PROGMEM data
+  void play(const uint8_t *melody);
+  
+  // Resume currently loaded melody (or enable direct osc manipulation by sketch)
+  void play();
+    
+  // Pause playback
+  void pause();
+  
+  // Stop playback (unloads song)
+  void stop();
+  
+  // Tune Squawk to a different frequency - default is 1.0
+  void tune(float tuning);
+
+  // Change the tempo - default is 50
+	void tempo(uint16_t tempo);
+};
+
+extern SquawkSynth Squawk;
+
+// oscillator structure
+typedef struct {
+  uint8_t  vol;
+  uint16_t freq;
+  uint16_t phase;
+} osc_t;
+
+typedef osc_t Oscillator;
+
+// oscillator memory
+extern osc_t osc[4];
+extern uint8_t pcm;
+// channel 0 is pulse wave @ 25% duty
+// channel 1 is square wave
+// channel 2 is triangle wave
+// channel 3 is noise
+
+// For channel 3, freq is used as part of its LFSR and should not be changed.
+// LFSR: Linear feedback shift register, a method of producing a
+// pseudo-random bit sequence, used to generate nasty noise.
+
+#ifdef __AVR_ATmega32U4__
+// Supported configurations for ATmega32U4
+#define SQUAWK_PWM_PIN5  OCR3AL
+#define SQUAWK_PWM_PIN11 OCR0A
+#define SQUAWK_PWM_PIN3  OCR0B
+/*
+// NOT SUPPORTED YET
+#define SQUAWK_PWM_PIN6  OCR4D
+#define SQUAWK_PWM_PIN9  OCR4B
+#define SQUAWK_PWM_PIN10 OCR4B
+*/
+#endif
+
+#ifdef __AVR_ATmega168__
+// Supported configurations for ATmega168
+#define SQUAWK_PWM_PIN6  OCR0A
+#define SQUAWK_PWM_PIN5  OCR0B
+#define SQUAWK_PWM_PIN11 OCR2A
+#define SQUAWK_PWM_PIN3  OCR2B
+#endif
+
+#ifdef __AVR_ATmega328P__
+// Supported configurations for ATmega328P
+#define SQUAWK_PWM_PIN6  OCR0A
+#define SQUAWK_PWM_PIN5  OCR0B
+#define SQUAWK_PWM_PIN11 OCR2A
+#define SQUAWK_PWM_PIN3  OCR2B
+#endif
+
+/*
+// NOT SUPPORTED YET
+#define SQUAWK_SPI SPDR
+#define SQUAWK_RLD_PORTB PORTB
+#define SQUAWK_RLD_PORTC PORTC
+*/
+
+extern void squawk_playroutine() asm("squawk_playroutine");
+
+// SAMPLE GRINDER
+// generates samples and updates oscillators
+// uses 132 cycles (not counting playroutine)
+//     ~1/3 CPU @ 44kHz on 16MHz
+#define SQUAWK_CONSTRUCT_ISR(TARGET_REGISTER) \
+uint16_t cia, cia_count; \
+intptr_t squawk_register = (intptr_t)&TARGET_REGISTER; \
+ISR(TIMER1_COMPA_vect, ISR_NAKED) { \
+  asm volatile( \
+    "push r2                                          " "\n\t" \
+    "in   r2,                    __SREG__             " "\n\t" \
+    "push r18                                         " "\n\t" \
+    "push r27                                         " "\n\t" \
+    "push r26                                         " "\n\t" \
+    "push r0                                          " "\n\t" \
+    "push r1                                          " "\n\t" \
+\
+    "lds  r18,                   osc+2*%[mul]+%[fre]  " "\n\t" \
+    "lds  r0,                    osc+2*%[mul]+%[pha]  " "\n\t" \
+    "add  r0,                    r18                  " "\n\t" \
+    "sts  osc+2*%[mul]+%[pha],   r0                   " "\n\t" \
+    "lds  r18,                   osc+2*%[mul]+%[fre]+1" "\n\t" \
+    "lds  r1,                    osc+2*%[mul]+%[pha]+1" "\n\t" \
+    "adc  r1,                    r18                  " "\n\t" \
+    "sts  osc+2*%[mul]+%[pha]+1, r1                   " "\n\t" \
+\
+    "mov  r27,                   r1                   " "\n\t" \
+    "sbrc r27,                   7                    " "\n\t" \
+    "com  r27                                         " "\n\t" \
+    "lsl  r27                                         " "\n\t" \
+    "lds  r26,                   osc+2*%[mul]+%[vol]  " "\n\t" \
+    "subi r27,                   128                  " "\n\t" \
+    "muls r27,                   r26                  " "\n\t" \
+    "lsl  r1                                          " "\n\t" \
+    "mov  r26,                   r1                   " "\n\t" \
+\
+    "lds  r18,                   osc+0*%[mul]+%[fre]  " "\n\t" \
+    "lds  r0,                    osc+0*%[mul]+%[pha]  " "\n\t" \
+    "add  r0,                    r18                  " "\n\t" \
+    "sts  osc+0*%[mul]+%[pha],   r0                   " "\n\t" \
+    "lds  r18,                   osc+0*%[mul]+%[fre]+1" "\n\t" \
+    "lds  r1,                    osc+0*%[mul]+%[pha]+1" "\n\t" \
+    "adc  r1,                    r18                  " "\n\t" \
+    "sts  osc+0*%[mul]+%[pha]+1, r1                   " "\n\t" \
+\
+    "mov  r18,                   r1                   " "\n\t" \
+    "lsl  r18                                         " "\n\t" \
+    "and  r18,                   r1                   " "\n\t" \
+    "lds  r27,                   osc+0*%[mul]+%[vol]  " "\n\t" \
+    "sbrc r18,                   7                    " "\n\t" \
+    "neg  r27                                         " "\n\t" \
+    "add  r26,                   r27                  " "\n\t" \
+\
+    "lds  r18,                   osc+1*%[mul]+%[fre]  " "\n\t" \
+    "lds  r0,                    osc+1*%[mul]+%[pha]  " "\n\t" \
+    "add  r0,                    r18                  " "\n\t" \
+    "sts  osc+1*%[mul]+%[pha],   r0                   " "\n\t" \
+    "lds  r18,                   osc+1*%[mul]+%[fre]+1" "\n\t" \
+    "lds  r1,                    osc+1*%[mul]+%[pha]+1" "\n\t" \
+    "adc  r1,                    r18                  " "\n\t" \
+    "sts  osc+1*%[mul]+%[pha]+1, r1                   " "\n\t" \
+\
+    "lds  r27,                   osc+1*%[mul]+%[vol]  " "\n\t" \
+    "sbrc r1,                    7                    " "\n\t" \
+    "neg  r27                                         " "\n\t" \
+    "add  r26,                   r27                  " "\n\t" \
+\
+    "ldi  r27,                   1                    " "\n\t" \
+    "lds  r0,                    osc+3*%[mul]+%[fre]  " "\n\t" \
+    "lds  r1,                    osc+3*%[mul]+%[fre]+1" "\n\t" \
+    "add  r0,                    r0                   " "\n\t" \
+    "adc  r1,                    r1                   " "\n\t" \
+    "sbrc r1,                    7                    " "\n\t" \
+    "eor  r0,                    r27                  " "\n\t" \
+    "sbrc r1,                    6                    " "\n\t" \
+    "eor  r0,                    r27                  " "\n\t" \
+    "sts  osc+3*%[mul]+%[fre],   r0                   " "\n\t" \
+    "sts  osc+3*%[mul]+%[fre]+1, r1                   " "\n\t" \
+\
+    "lds  r27,                   osc+3*%[mul]+%[vol]  " "\n\t" \
+    "sbrc r1,                    7                    " "\n\t" \
+    "neg  r27                                         " "\n\t" \
+    "add  r26,                   r27                  " "\n\t" \
+\
+    "lds  r27,                   pcm                  " "\n\t" \
+    "add  r26,                   r27                  " "\n\t" \
+    "sts  %[reg],                r26                  " "\n\t" \
+\
+	  "lds  r27,                   cia_count+1          " "\n\t" \
+	  "lds  r26,                   cia_count            " "\n\t" \
+	  "sbiw r26,                   1                    " "\n\t" \
+	  "breq call_playroutine                            " "\n\t" \
+	  "sts  cia_count+1,           r27                  " "\n\t" \
+	  "sts  cia_count,             r26                  " "\n\t" \
+    "pop  r1                                          " "\n\t" \
+    "pop  r0                                          " "\n\t" \
+    "pop  r26                                         " "\n\t" \
+    "pop  r27                                         " "\n\t" \
+    "pop  r18                                         " "\n\t" \
+    "out  __SREG__,              r2                   " "\n\t" \
+    "pop  r2                                          " "\n\t" \
+	  "reti                                             " "\n\t" \
+    "call_playroutine:                                " "\n\t" \
+\
+	  "lds  r27, cia+1                                  " "\n\t" \
+	  "lds  r26, cia                                    " "\n\t" \
+	  "sts  cia_count+1,           r27                  " "\n\t" \
+	  "sts  cia_count,             r26                  " "\n\t" \
+\
+    "sei                                              " "\n\t" \
+	  "push r19                                         " "\n\t" \
+	  "push r20                                         " "\n\t" \
+	  "push r21                                         " "\n\t" \
+	  "push r22                                         " "\n\t" \
+	  "push r23                                         " "\n\t" \
+	  "push r24                                         " "\n\t" \
+	  "push r25                                         " "\n\t" \
+	  "push r30                                         " "\n\t" \
+	  "push r31                                         " "\n\t" \
+\
+    "clr  r1                                          " "\n\t" \
+    "call squawk_playroutine                          " "\n\t" \
+\
+	  "pop  r31                                         " "\n\t" \
+	  "pop  r30                                         " "\n\t" \
+	  "pop  r25                                         " "\n\t" \
+	  "pop  r24                                         " "\n\t" \
+	  "pop  r23                                         " "\n\t" \
+	  "pop  r22                                         " "\n\t" \
+	  "pop  r21                                         " "\n\t" \
+	  "pop  r20                                         " "\n\t" \
+	  "pop  r19                                         " "\n\t" \
+\
+    "pop  r1                                          " "\n\t" \
+    "pop  r0                                          " "\n\t" \
+    "pop  r26                                         " "\n\t" \
+    "pop  r27                                         " "\n\t" \
+    "pop  r18                                         " "\n\t" \
+    "out  __SREG__,              r2                   " "\n\t" \
+    "pop  r2                                          " "\n\t" \
+	  "reti                                             " "\n\t" \
+    : \
+    : [reg] "M" _SFR_MEM_ADDR(TARGET_REGISTER), \
+      [mul] "M" (sizeof(Oscillator)), \
+      [pha] "M" (offsetof(Oscillator, phase)), \
+      [fre] "M" (offsetof(Oscillator, freq)), \
+      [vol] "M" (offsetof(Oscillator, vol)) \
+  ); \
+}
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SquawkSD.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SquawkSD.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SquawkSD.cpp	(revision 136)
@@ -0,0 +1,182 @@
+#include <SquawkSD.h>
+
+SquawkSynthSD SquawkSD;
+
+class StreamFile : public SquawkStream {
+  private:
+    Fat16 f;
+	public:
+		StreamFile(Fat16 file = Fat16()) { f = file; }
+    uint8_t read() { return f.read(); }
+    void seek(size_t offset) { f.seekSet(offset); }
+};
+
+static StreamFile file;
+
+extern const uint16_t period_tbl[84] PROGMEM;
+
+void SquawkSynthSD::play(Fat16 melody) {
+	SquawkSynth::pause();
+	file = StreamFile(melody);
+	SquawkSynth::play(&file);
+}
+
+/*
+void SquawkSynthSD::convert(Fat16 in, Fat16 out) {
+  unsigned int n;
+  uint8_t patterns = 0, order_count;
+  unsigned int ptn, row, chn;
+  uint8_t temp;
+
+  uint8_t fxc[4], fxp[4], note[4], sample[4];
+  uint16_t period;
+
+  out.write('S'); // ID
+  out.write('Q');
+  out.write('M');
+  out.write('1');
+  out.write((uint8_t)0); // No meta data
+  out.write((uint8_t)0);
+  
+  // Write order list, count patterns
+  in.seek(0x3B6);
+  order_count = in.read();
+  out.write(order_count);
+  in.seek(0x3B8);
+  for(n = 0; n < order_count; n++) {
+    temp = in.read();
+    if(temp >= patterns) patterns = temp + 1;
+    out.write(temp);
+  }
+  
+  // Write patterns
+  in.seek(0x43C);
+  for(ptn = 0; ptn < patterns; ptn++) {
+    for(row = 0; row < 64; row++) {
+      for(chn = 0; chn < 4; chn++) {
+        
+        // Basic extraction
+        temp         = in.read();          // sample.msb and period.msb
+        period       = (temp & 0x0F) << 8;
+        sample[chn]  = temp & 0xF0;
+        period      |= in.read();          // period.lsb
+        temp         = in.read();          // sample.lsb and effect
+        sample[chn] |= temp >> 4;
+        fxc[chn]     = (temp & 0x0F) << 4;
+        fxp[chn]     = in.read();          // parameters
+        if(fxc[chn] == 0xE0) {
+          fxc[chn]    |= fxp[chn] >> 4;    // extended parameters
+          fxp[chn]    &= 0x0F;
+        }
+        
+        #define DIF(A, B) ((A) > (B) ? ((int32_t)(A) - (int32_t)(B)) : ((int32_t)(B) - (int32_t)(A)))
+        // Find closest matching period
+        if(period == 0) {
+          note[chn] = 0x7F;
+        } else {
+          int16_t best = DIF(period, pgm_read_word(&period_tbl[0]));
+          note[chn] = 0;
+          for(n = 0; n < sizeof(period_tbl) / sizeof(uint16_t); n++) {
+            if(DIF(period, pgm_read_word(&period_tbl[n])) < best) {
+              note[chn] = n;
+              best = DIF(period, pgm_read_word(&period_tbl[n]));
+            }
+          }
+        }
+        
+        // Crunch volume/decimal commands
+        if(fxc[chn] == 0x50 || fxc[chn] == 0x60 || fxc[chn] == 0xA0) {
+          fxp[chn] = (fxp[chn] >> 1) & 0x77;
+        } else if(fxc[chn] == 0x70) {
+          fxp[chn] = (fxp[chn] & 0xF0) | ((fxp[chn] & 0x0F) >> 1);
+        } else if(fxc[chn] == 0xC0 || fxc[chn] == 0xEA || fxc[chn] == 0xEB) {
+          fxp[chn] >>= 1;
+        } else if(fxc[chn] == 0xD0) {
+          fxp[chn] = ((fxp[chn] >> 4) * 10) | (fxp[chn] & 0x0F);
+        }
+
+        // Re-nibblify - it's a word!
+        if(chn != 3) {
+          if((fxc[chn] & 0xF0) == 0xE0) fxp[chn] |= fxc[chn] << 4;
+          fxc[chn] >>= 4;       
+        }
+
+      }
+
+      // Ghetto crunch the last channel to save a byte
+      switch(fxc[3]) {
+        case 0x50: case 0x60: case 0xA0:
+          fxc[3] = 0x1;
+          if((fxp[3] >> 4) >= (fxp[3] & 0x0F)) {
+            fxp[3] = 0x80 + ((fxp[3] >> 4) - (fxp[3] & 0x0F));
+          } else {
+            fxp[3] = ((fxp[3] & 0x0F) - (fxp[3] >> 4));
+          }
+          break;
+        case 0x70:
+          fxc[3] = (fxp[3] & 0x4) ? 0x3 : 0x2;
+          fxp[3] = (fxp[3] >> 4) | ((fxp[3] & 0x03) << 4);
+          break;
+        case 0xC0:
+          fxc[3] = 0x4;
+          fxp[3] &= 0x1F;
+          break;
+        case 0xB0:
+          fxc[3] = 0x5;
+          fxp[3] &= 0x1F;
+          break;
+        case 0xD0:
+          fxc[3] = 0x6;
+          if(fxp[3] > 63) fxp[3] = 0;
+          break;
+        case 0xF0:
+          if(fxp[3] > 0x20) {
+            fxc[3] = 0x0;
+            fxp[3] = 0x00;
+          } else {
+            fxc[3] = 0x7;             
+          }
+          break;
+        case 0xE7:
+          fxc[3] = 0x8;
+          break;
+        case 0xE9:
+          fxc[3] = 0x9;
+          break;
+        case 0xEA:
+          fxc[3] = 0xA;
+          fxp[3] |= 0x08;
+          break;
+        case 0xEB:
+          fxc[3] = 0xA;
+          break;
+        case 0xEC:
+          fxc[3] = 0xB;
+          break;
+        case 0xED:
+          fxc[3] = 0xB;
+          fxp[3] |= 0x10;
+          break;
+        case 0xEE:
+          fxc[3] = 0xC;
+          break;
+        default:
+          fxc[3] = 0;
+          fxp[3] = 0;
+      }
+      if(note[3] != 0x7F) fxp[3] |= 0x80;
+      if(sample[3]) fxp[3] |= 0x40;
+
+      // Write out
+      out.write((fxc[0]) | fxc[1] << 4);
+      out.write(fxp[0]);
+      out.write(fxp[1]);
+      out.write((fxc[2]) | fxc[3] << 4);
+      out.write(fxp[2]);
+      out.write(fxp[3]);
+      out.write(note[0] | (sample[0] == 0 ? 0x00 : 0x80));
+      out.write(note[1] | (sample[1] == 0 ? 0x00 : 0x80));
+      out.write(note[2] | (sample[2] == 0 ? 0x00 : 0x80));
+    }
+  }
+}*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SquawkSD.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SquawkSD.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/SquawkSD.h	(revision 136)
@@ -0,0 +1,17 @@
+#ifndef _SQUAWKSD_H_
+#define _SQUAWKSD_H_
+#include <Squawk.h>
+#include "Fat16.h"
+
+class SquawkSynthSD : public SquawkSynth {
+  private:
+  	Fat16 f;
+	public:
+	  inline void play() { Squawk.play(); };
+		void play(Fat16 file);
+		//void convert(Fat16 in, Fat16 out);
+};
+
+extern SquawkSynthSD SquawkSD;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/communication.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/communication.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/communication.cpp	(revision 136)
@@ -0,0 +1,29 @@
+#include <ArduinoRobot.h>
+
+bool RobotControl::isActionDone(){
+	if(messageIn.receiveData()){
+		if(messageIn.readByte()==COMMAND_ACTION_DONE){
+			return true;
+		}
+	}
+	return false;
+}
+
+void RobotControl::pauseMode(uint8_t onOff){
+	messageOut.writeByte(COMMAND_PAUSE_MODE);
+	if(onOff){
+		messageOut.writeByte(true);
+	}else{
+		messageOut.writeByte(false);
+	}
+	messageOut.sendData();
+}
+
+void RobotControl::lineFollowConfig(uint8_t KP, uint8_t KD, uint8_t robotSpeed, uint8_t intergrationTime){
+	messageOut.writeByte(COMMAND_LINE_FOLLOW_CONFIG);
+	messageOut.writeByte(KP);
+	messageOut.writeByte(KD);
+	messageOut.writeByte(robotSpeed);
+	messageOut.writeByte(intergrationTime);
+	messageOut.sendData();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/glcdfont.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/glcdfont.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/glcdfont.c	(revision 136)
@@ -0,0 +1,266 @@
+#include <avr/io.h>
+#include <avr/pgmspace.h> 
+ 
+#ifndef FONT5X7_H
+#define FONT5X7_H
+
+// standard ascii 5x7 font
+
+static const unsigned char font[] PROGMEM = {
+	0x00, 0x00, 0x00, 0x00, 0x00,   
+	0x3E, 0x5B, 0x4F, 0x5B, 0x3E, 	
+	0x3E, 0x6B, 0x4F, 0x6B, 0x3E, 	
+	0x1C, 0x3E, 0x7C, 0x3E, 0x1C, 
+	0x18, 0x3C, 0x7E, 0x3C, 0x18, 
+	0x1C, 0x57, 0x7D, 0x57, 0x1C, 
+	0x1C, 0x5E, 0x7F, 0x5E, 0x1C, 
+	0x00, 0x18, 0x3C, 0x18, 0x00, 
+	0xFF, 0xE7, 0xC3, 0xE7, 0xFF, 
+	0x00, 0x18, 0x24, 0x18, 0x00, 
+	0xFF, 0xE7, 0xDB, 0xE7, 0xFF, 
+	0x30, 0x48, 0x3A, 0x06, 0x0E, 
+	0x26, 0x29, 0x79, 0x29, 0x26, 
+	0x40, 0x7F, 0x05, 0x05, 0x07, 
+	0x40, 0x7F, 0x05, 0x25, 0x3F, 
+	0x5A, 0x3C, 0xE7, 0x3C, 0x5A, 
+	0x7F, 0x3E, 0x1C, 0x1C, 0x08, 
+	0x08, 0x1C, 0x1C, 0x3E, 0x7F, 
+	0x14, 0x22, 0x7F, 0x22, 0x14, 
+	0x5F, 0x5F, 0x00, 0x5F, 0x5F, 
+	0x06, 0x09, 0x7F, 0x01, 0x7F, 
+	0x00, 0x66, 0x89, 0x95, 0x6A, 
+	0x60, 0x60, 0x60, 0x60, 0x60, 
+	0x94, 0xA2, 0xFF, 0xA2, 0x94, 
+	0x08, 0x04, 0x7E, 0x04, 0x08, 
+	0x10, 0x20, 0x7E, 0x20, 0x10, 
+	0x08, 0x08, 0x2A, 0x1C, 0x08, 
+	0x08, 0x1C, 0x2A, 0x08, 0x08, 
+	0x1E, 0x10, 0x10, 0x10, 0x10, 
+	0x0C, 0x1E, 0x0C, 0x1E, 0x0C, 
+	0x30, 0x38, 0x3E, 0x38, 0x30, 
+	0x06, 0x0E, 0x3E, 0x0E, 0x06, 
+	0x00, 0x00, 0x00, 0x00, 0x00, 
+	0x00, 0x00, 0x5F, 0x00, 0x00, 
+	0x00, 0x07, 0x00, 0x07, 0x00, 
+	0x14, 0x7F, 0x14, 0x7F, 0x14, 
+	0x24, 0x2A, 0x7F, 0x2A, 0x12, 
+	0x23, 0x13, 0x08, 0x64, 0x62, 
+	0x36, 0x49, 0x56, 0x20, 0x50, 
+	0x00, 0x08, 0x07, 0x03, 0x00, 
+	0x00, 0x1C, 0x22, 0x41, 0x00, 
+	0x00, 0x41, 0x22, 0x1C, 0x00, 
+	0x2A, 0x1C, 0x7F, 0x1C, 0x2A, 
+	0x08, 0x08, 0x3E, 0x08, 0x08, 
+	0x00, 0x80, 0x70, 0x30, 0x00, 
+	0x08, 0x08, 0x08, 0x08, 0x08, 
+	0x00, 0x00, 0x60, 0x60, 0x00, 
+	0x20, 0x10, 0x08, 0x04, 0x02, 
+	0x3E, 0x51, 0x49, 0x45, 0x3E, 
+	0x00, 0x42, 0x7F, 0x40, 0x00, 
+	0x72, 0x49, 0x49, 0x49, 0x46, 
+	0x21, 0x41, 0x49, 0x4D, 0x33, 
+	0x18, 0x14, 0x12, 0x7F, 0x10, 
+	0x27, 0x45, 0x45, 0x45, 0x39, 
+	0x3C, 0x4A, 0x49, 0x49, 0x31, 
+	0x41, 0x21, 0x11, 0x09, 0x07, 
+	0x36, 0x49, 0x49, 0x49, 0x36, 
+	0x46, 0x49, 0x49, 0x29, 0x1E, 
+	0x00, 0x00, 0x14, 0x00, 0x00, 
+	0x00, 0x40, 0x34, 0x00, 0x00, 
+	0x00, 0x08, 0x14, 0x22, 0x41, 
+	0x14, 0x14, 0x14, 0x14, 0x14, 
+	0x00, 0x41, 0x22, 0x14, 0x08, 
+	0x02, 0x01, 0x59, 0x09, 0x06, 
+	0x3E, 0x41, 0x5D, 0x59, 0x4E, 
+	0x7C, 0x12, 0x11, 0x12, 0x7C, 
+	0x7F, 0x49, 0x49, 0x49, 0x36, 
+	0x3E, 0x41, 0x41, 0x41, 0x22, 
+	0x7F, 0x41, 0x41, 0x41, 0x3E, 
+	0x7F, 0x49, 0x49, 0x49, 0x41, 
+	0x7F, 0x09, 0x09, 0x09, 0x01, 
+	0x3E, 0x41, 0x41, 0x51, 0x73, 
+	0x7F, 0x08, 0x08, 0x08, 0x7F, 
+	0x00, 0x41, 0x7F, 0x41, 0x00, 
+	0x20, 0x40, 0x41, 0x3F, 0x01, 
+	0x7F, 0x08, 0x14, 0x22, 0x41, 
+	0x7F, 0x40, 0x40, 0x40, 0x40, 
+	0x7F, 0x02, 0x1C, 0x02, 0x7F, 
+	0x7F, 0x04, 0x08, 0x10, 0x7F, 
+	0x3E, 0x41, 0x41, 0x41, 0x3E, 
+	0x7F, 0x09, 0x09, 0x09, 0x06, 
+	0x3E, 0x41, 0x51, 0x21, 0x5E, 
+	0x7F, 0x09, 0x19, 0x29, 0x46, 
+	0x26, 0x49, 0x49, 0x49, 0x32, 
+	0x03, 0x01, 0x7F, 0x01, 0x03, 
+	0x3F, 0x40, 0x40, 0x40, 0x3F, 
+	0x1F, 0x20, 0x40, 0x20, 0x1F, 
+	0x3F, 0x40, 0x38, 0x40, 0x3F, 
+	0x63, 0x14, 0x08, 0x14, 0x63, 
+	0x03, 0x04, 0x78, 0x04, 0x03, 
+	0x61, 0x59, 0x49, 0x4D, 0x43, 
+	0x00, 0x7F, 0x41, 0x41, 0x41, 
+	0x02, 0x04, 0x08, 0x10, 0x20, 
+	0x00, 0x41, 0x41, 0x41, 0x7F, 
+	0x04, 0x02, 0x01, 0x02, 0x04, 
+	0x40, 0x40, 0x40, 0x40, 0x40, 
+	0x00, 0x03, 0x07, 0x08, 0x00, 
+	0x20, 0x54, 0x54, 0x78, 0x40, 
+	0x7F, 0x28, 0x44, 0x44, 0x38, 
+	0x38, 0x44, 0x44, 0x44, 0x28, 
+	0x38, 0x44, 0x44, 0x28, 0x7F, 
+	0x38, 0x54, 0x54, 0x54, 0x18, 
+	0x00, 0x08, 0x7E, 0x09, 0x02, 
+	0x18, 0xA4, 0xA4, 0x9C, 0x78, 
+	0x7F, 0x08, 0x04, 0x04, 0x78, 
+	0x00, 0x44, 0x7D, 0x40, 0x00, 
+	0x20, 0x40, 0x40, 0x3D, 0x00, 
+	0x7F, 0x10, 0x28, 0x44, 0x00, 
+	0x00, 0x41, 0x7F, 0x40, 0x00, 
+	0x7C, 0x04, 0x78, 0x04, 0x78, 
+	0x7C, 0x08, 0x04, 0x04, 0x78, 
+	0x38, 0x44, 0x44, 0x44, 0x38, 
+	0xFC, 0x18, 0x24, 0x24, 0x18, 
+	0x18, 0x24, 0x24, 0x18, 0xFC, 
+	0x7C, 0x08, 0x04, 0x04, 0x08, 
+	0x48, 0x54, 0x54, 0x54, 0x24, 
+	0x04, 0x04, 0x3F, 0x44, 0x24, 
+	0x3C, 0x40, 0x40, 0x20, 0x7C, 
+	0x1C, 0x20, 0x40, 0x20, 0x1C, 
+	0x3C, 0x40, 0x30, 0x40, 0x3C, 
+	0x44, 0x28, 0x10, 0x28, 0x44, 
+	0x4C, 0x90, 0x90, 0x90, 0x7C, 
+	0x44, 0x64, 0x54, 0x4C, 0x44, 
+	0x00, 0x08, 0x36, 0x41, 0x00, 
+	0x00, 0x00, 0x77, 0x00, 0x00, 
+	0x00, 0x41, 0x36, 0x08, 0x00, 
+	0x02, 0x01, 0x02, 0x04, 0x02, 
+	0x3C, 0x26, 0x23, 0x26, 0x3C, 
+	0x1E, 0xA1, 0xA1, 0x61, 0x12, 
+	0x3A, 0x40, 0x40, 0x20, 0x7A, 
+	0x38, 0x54, 0x54, 0x55, 0x59, 
+	0x21, 0x55, 0x55, 0x79, 0x41, 
+	0x21, 0x54, 0x54, 0x78, 0x41, 
+	0x21, 0x55, 0x54, 0x78, 0x40, 
+	0x20, 0x54, 0x55, 0x79, 0x40, 
+	0x0C, 0x1E, 0x52, 0x72, 0x12, 
+	0x39, 0x55, 0x55, 0x55, 0x59, 
+	0x39, 0x54, 0x54, 0x54, 0x59, 
+	0x39, 0x55, 0x54, 0x54, 0x58, 
+	0x00, 0x00, 0x45, 0x7C, 0x41, 
+	0x00, 0x02, 0x45, 0x7D, 0x42, 
+	0x00, 0x01, 0x45, 0x7C, 0x40, 
+	0xF0, 0x29, 0x24, 0x29, 0xF0, 
+	0xF0, 0x28, 0x25, 0x28, 0xF0, 
+	0x7C, 0x54, 0x55, 0x45, 0x00, 
+	0x20, 0x54, 0x54, 0x7C, 0x54, 
+	0x7C, 0x0A, 0x09, 0x7F, 0x49, 
+	0x32, 0x49, 0x49, 0x49, 0x32, 
+	0x32, 0x48, 0x48, 0x48, 0x32, 
+	0x32, 0x4A, 0x48, 0x48, 0x30, 
+	0x3A, 0x41, 0x41, 0x21, 0x7A, 
+	0x3A, 0x42, 0x40, 0x20, 0x78, 
+	0x00, 0x9D, 0xA0, 0xA0, 0x7D, 
+	0x39, 0x44, 0x44, 0x44, 0x39, 
+	0x3D, 0x40, 0x40, 0x40, 0x3D, 
+	0x3C, 0x24, 0xFF, 0x24, 0x24, 
+	0x48, 0x7E, 0x49, 0x43, 0x66, 
+	0x2B, 0x2F, 0xFC, 0x2F, 0x2B, 
+	0xFF, 0x09, 0x29, 0xF6, 0x20, 
+	0xC0, 0x88, 0x7E, 0x09, 0x03, 
+	0x20, 0x54, 0x54, 0x79, 0x41, 
+	0x00, 0x00, 0x44, 0x7D, 0x41, 
+	0x30, 0x48, 0x48, 0x4A, 0x32, 
+	0x38, 0x40, 0x40, 0x22, 0x7A, 
+	0x00, 0x7A, 0x0A, 0x0A, 0x72, 
+	0x7D, 0x0D, 0x19, 0x31, 0x7D, 
+	0x26, 0x29, 0x29, 0x2F, 0x28, 
+	0x26, 0x29, 0x29, 0x29, 0x26, 
+	0x30, 0x48, 0x4D, 0x40, 0x20, 
+	0x38, 0x08, 0x08, 0x08, 0x08, 
+	0x08, 0x08, 0x08, 0x08, 0x38, 
+	0x2F, 0x10, 0xC8, 0xAC, 0xBA, 
+	0x2F, 0x10, 0x28, 0x34, 0xFA, 
+	0x00, 0x00, 0x7B, 0x00, 0x00, 
+	0x08, 0x14, 0x2A, 0x14, 0x22, 
+	0x22, 0x14, 0x2A, 0x14, 0x08, 
+	0xAA, 0x00, 0x55, 0x00, 0xAA, 
+	0xAA, 0x55, 0xAA, 0x55, 0xAA, 
+	0x00, 0x00, 0x00, 0xFF, 0x00, 
+	0x10, 0x10, 0x10, 0xFF, 0x00, 
+	0x14, 0x14, 0x14, 0xFF, 0x00, 
+	0x10, 0x10, 0xFF, 0x00, 0xFF, 
+	0x10, 0x10, 0xF0, 0x10, 0xF0, 
+	0x14, 0x14, 0x14, 0xFC, 0x00, 
+	0x14, 0x14, 0xF7, 0x00, 0xFF, 
+	0x00, 0x00, 0xFF, 0x00, 0xFF, 
+	0x14, 0x14, 0xF4, 0x04, 0xFC, 
+	0x14, 0x14, 0x17, 0x10, 0x1F, 
+	0x10, 0x10, 0x1F, 0x10, 0x1F, 
+	0x14, 0x14, 0x14, 0x1F, 0x00, 
+	0x10, 0x10, 0x10, 0xF0, 0x00, 
+	0x00, 0x00, 0x00, 0x1F, 0x10, 
+	0x10, 0x10, 0x10, 0x1F, 0x10, 
+	0x10, 0x10, 0x10, 0xF0, 0x10, 
+	0x00, 0x00, 0x00, 0xFF, 0x10, 
+	0x10, 0x10, 0x10, 0x10, 0x10, 
+	0x10, 0x10, 0x10, 0xFF, 0x10, 
+	0x00, 0x00, 0x00, 0xFF, 0x14, 
+	0x00, 0x00, 0xFF, 0x00, 0xFF, 
+	0x00, 0x00, 0x1F, 0x10, 0x17, 
+	0x00, 0x00, 0xFC, 0x04, 0xF4, 
+	0x14, 0x14, 0x17, 0x10, 0x17, 
+	0x14, 0x14, 0xF4, 0x04, 0xF4, 
+	0x00, 0x00, 0xFF, 0x00, 0xF7, 
+	0x14, 0x14, 0x14, 0x14, 0x14, 
+	0x14, 0x14, 0xF7, 0x00, 0xF7, 
+	0x14, 0x14, 0x14, 0x17, 0x14, 
+	0x10, 0x10, 0x1F, 0x10, 0x1F, 
+	0x14, 0x14, 0x14, 0xF4, 0x14, 
+	0x10, 0x10, 0xF0, 0x10, 0xF0, 
+	0x00, 0x00, 0x1F, 0x10, 0x1F, 
+	0x00, 0x00, 0x00, 0x1F, 0x14, 
+	0x00, 0x00, 0x00, 0xFC, 0x14, 
+	0x00, 0x00, 0xF0, 0x10, 0xF0, 
+	0x10, 0x10, 0xFF, 0x10, 0xFF, 
+	0x14, 0x14, 0x14, 0xFF, 0x14, 
+	0x10, 0x10, 0x10, 0x1F, 0x00, 
+	0x00, 0x00, 0x00, 0xF0, 0x10, 
+	0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 
+	0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 
+	0xFF, 0xFF, 0xFF, 0x00, 0x00, 
+	0x00, 0x00, 0x00, 0xFF, 0xFF, 
+	0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 
+	0x38, 0x44, 0x44, 0x38, 0x44, 
+	0x7C, 0x2A, 0x2A, 0x3E, 0x14, 
+	0x7E, 0x02, 0x02, 0x06, 0x06, 
+	0x02, 0x7E, 0x02, 0x7E, 0x02, 
+	0x63, 0x55, 0x49, 0x41, 0x63, 
+	0x38, 0x44, 0x44, 0x3C, 0x04, 
+	0x40, 0x7E, 0x20, 0x1E, 0x20, 
+	0x06, 0x02, 0x7E, 0x02, 0x02, 
+	0x99, 0xA5, 0xE7, 0xA5, 0x99, 
+	0x1C, 0x2A, 0x49, 0x2A, 0x1C, 
+	0x4C, 0x72, 0x01, 0x72, 0x4C, 
+	0x30, 0x4A, 0x4D, 0x4D, 0x30, 
+	0x30, 0x48, 0x78, 0x48, 0x30, 
+	0xBC, 0x62, 0x5A, 0x46, 0x3D, 
+	0x3E, 0x49, 0x49, 0x49, 0x00, 
+	0x7E, 0x01, 0x01, 0x01, 0x7E, 
+	0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 
+	0x44, 0x44, 0x5F, 0x44, 0x44, 
+	0x40, 0x51, 0x4A, 0x44, 0x40, 
+	0x40, 0x44, 0x4A, 0x51, 0x40, 
+	0x00, 0x00, 0xFF, 0x01, 0x03, 
+	0xE0, 0x80, 0xFF, 0x00, 0x00, 
+	0x08, 0x08, 0x6B, 0x6B, 0x08,
+	0x36, 0x12, 0x36, 0x24, 0x36, 
+	0x06, 0x0F, 0x09, 0x0F, 0x06, 
+	0x00, 0x00, 0x18, 0x18, 0x00, 
+	0x00, 0x00, 0x10, 0x10, 0x00, 
+	0x30, 0x40, 0xFF, 0x01, 0x01, 
+	0x00, 0x1F, 0x01, 0x01, 0x1E, 
+	0x00, 0x19, 0x1D, 0x17, 0x12, 
+	0x00, 0x3C, 0x3C, 0x3C, 0x3C, 
+	0x00, 0x00, 0x00, 0x00, 0x00, 
+};
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/helper.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/helper.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/helper.cpp	(revision 136)
@@ -0,0 +1,45 @@
+#include "ArduinoRobot.h"
+
+void RobotControl::drawBase(){
+	Arduino_LCD::drawCircle(64,80,50,foreGround);
+	Arduino_LCD::drawLine(64,30,64,20,foreGround);
+}
+void RobotControl::drawDire(int16_t dire){
+	static uint8_t x_old;
+	static uint8_t y_old;
+	static uint8_t x_t_old;
+	static uint8_t y_t_old;
+
+	uint8_t x=60*sin(dire/360.0*6.28)+64;
+	uint8_t x_t=40*sin(dire/360.0*6.28)+64;
+	uint8_t y=60*cos(dire/360.0*6.28)+80;
+	uint8_t y_t=40*cos(dire/360.0*6.28)+80;
+
+	Arduino_LCD::drawLine(x_t_old,y_t_old,x_old,y_old,backGround);
+	Arduino_LCD::drawLine(x_t,y_t,x,y,RED);
+
+	x_old=x;
+	y_old=y;
+	x_t_old=x_t;
+	y_t_old=y_t;
+}
+
+void RobotControl::drawCompass(uint16_t value){
+	drawBase();
+	drawDire(value);
+	debugPrint(value,57,76);
+}
+
+//display logos 
+void RobotControl::displayLogos(){
+	_drawBMP("lg0.bmp",0,0);
+	delay(2000);
+	_drawBMP("lg1.bmp",0,0);
+	delay(2000);
+	clearScreen();
+}
+
+//wait for a button to be pressed
+void RobotControl::waitContinue(uint8_t key){
+  while(!(Robot.keyboardRead()==key));
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/information.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/information.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/information.cpp	(revision 136)
@@ -0,0 +1,41 @@
+/*#include <ArduinoRobot.h>
+//0 - 319: pic array, 
+
+//320 - 337 username, 
+#define ADDRESS_USERNAME 320
+//338 - 355 robotname, 
+#define ADDRESS_ROBOTNAME 338
+//356 - 373 cityname, 
+#define ADDRESS_CITYNAME 356
+ //374- 391 countryname, 
+#define ADDRESS_COUNTRYNAME 374
+//508-511 robot info
+#define ADDRESS_ROBOTINFO 508
+
+
+void RobotControl::getMyName(char* container){
+	EEPROM_I2C::readBuffer(ADDRESS_USERNAME,(uint8_t*)container,18);
+}
+void RobotControl::getRobotName(char* container){
+	EEPROM_I2C::readBuffer(ADDRESS_ROBOTNAME,(uint8_t*)container,18);
+}
+void RobotControl::getMyCity(char* container){
+	EEPROM_I2C::readBuffer(ADDRESS_CITYNAME,(uint8_t*)container,18);
+}
+void RobotControl::getMyCountry(char* container){
+	EEPROM_I2C::readBuffer(ADDRESS_COUNTRYNAME,(uint8_t*)container,18);
+}
+
+void RobotControl::setMyName(char* text){
+	EEPROM_I2C::writePage(ADDRESS_USERNAME,(uint8_t*)text,18);
+}
+void RobotControl::setRobotName(char* text){
+	EEPROM_I2C::writePage(ADDRESS_ROBOTNAME,(uint8_t*)text,18);
+}
+void RobotControl::setMyCity(char* text){
+	EEPROM_I2C::writePage(ADDRESS_CITYNAME,(uint8_t*)text,18);
+}
+void RobotControl::setMyCountry(char* text){
+	EEPROM_I2C::writePage(ADDRESS_COUNTRYNAME,(uint8_t*)text,18);
+}
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/keyboard.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/keyboard.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/keyboard.cpp	(revision 136)
@@ -0,0 +1,65 @@
+#include "ArduinoRobot.h"
+
+#if ARDUINO >= 100
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+int pul_min[]={0,133,319,494,732};
+int pul_max[]={10,153,339,514,752};
+/*int pul_min[]={0,123,295,471,714};
+int pul_max[]={0,143,315,491,734};*/
+/*
+int pul_min[]={0,133,319,494,732};
+int pul_max[]={10,153,339,514,752};
+*/
+void sort(int* v);
+
+void RobotControl::keyboardCalibrate(int *vals){
+	for(int i=0;i<5;i++){
+		pul_min[i]=vals[i]-10;
+		pul_max[i]=vals[i]+10;
+	}
+}
+int8_t RobotControl::keyboardRead(void)
+{
+
+  int lectura_pul;
+  int8_t conta_pul=0;
+  static int anterior=0;
+
+  lectura_pul = this->averageAnalogInput(KEY);
+
+  while ((conta_pul < NUMBER_BUTTONS) && !(lectura_pul >= pul_min[conta_pul] && lectura_pul <= pul_max[conta_pul]))
+    conta_pul++;
+
+  if (conta_pul >= NUMBER_BUTTONS)
+    conta_pul = -1;
+  else
+    delay(100);
+
+  return conta_pul;
+}
+
+int RobotControl::averageAnalogInput(int pinNum)
+{
+  int vals[5];
+  for(int i=0;i<5;i++){
+	for(int j=i;j<5;j++){
+	  vals[j]=::analogRead(pinNum);
+	}
+	sort(vals);
+  }
+  return vals[0];
+}
+void sort(int* v){
+  int tmp;
+  for(int i=0;i<4;i++)
+    for(int j=i+1;j<5;j++)
+      if(v[j]<v[i]){
+        tmp=v[j];
+        v[j]=v[i];
+        v[i]=tmp;
+      }
+  v[0]=v[3];
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/lcd.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/lcd.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/lcd.cpp	(revision 136)
@@ -0,0 +1,279 @@
+#include "ArduinoRobot.h"
+#include "Wire.h"
+
+#define BUFFPIXEL 20
+
+bool cmp(char* str1, char* str2, uint8_t len);
+uint16_t read16(Fat16& f);
+uint32_t read32(Fat16& f);
+//uint16_t color565(uint8_t r, uint8_t g, uint8_t b);
+
+void RobotControl::beginTFT(uint16_t foreGround, uint16_t backGround){
+	//TFT initialization
+	Arduino_LCD::initB();
+	Arduino_LCD::fillScreen(backGround);
+	Arduino_LCD::setTextColor(foreGround);
+	Arduino_LCD::setTextSize(1);
+	this->foreGround=foreGround;
+	this->backGround=backGround;
+}
+void RobotControl::_enableLCD(){
+	DDRB = DDRB & 0xEF; //pinMode(CS_SD,INPUT);
+	DDRB = DDRB | 0x20; //pinMode(CS_LCD,OUTPUT);
+}
+/*void RobotControl::_setErase(uint8_t posX, uint8_t posY){
+	Arduino_LCD::setCursor(posX,posY);
+	Arduino_LCD::setTextColor(backGround);
+	Arduino_LCD::setTextSize(1);
+}
+void RobotControl::_setWrite(uint8_t posX, uint8_t posY){
+	Arduino_LCD::setCursor(posX,posY);
+	Arduino_LCD::setTextColor(foreGround);
+	Arduino_LCD::setTextSize(1);
+}*/
+/*
+void RobotControl::text(int value, uint8_t posX, uint8_t posY, bool EW){
+	if(EW)
+		_setWrite(posX,posY);
+	else 
+		_setErase(posX,posY);
+	Arduino_LCD::print(value);
+}
+void RobotControl::text(long value, uint8_t posX, uint8_t posY, bool EW){
+	if(EW)
+		_setWrite(posX,posY);
+	else 
+		_setErase(posX,posY);
+	Arduino_LCD::print(value);
+}
+void RobotControl::text(char* value, uint8_t posX, uint8_t posY, bool EW){
+	if(EW)
+		_setWrite(posX,posY);
+	else 
+		_setErase(posX,posY);
+	Arduino_LCD::print(value);
+}
+void RobotControl::text(char value, uint8_t posX, uint8_t posY, bool EW){
+	if(EW)
+		_setWrite(posX,posY);
+	else 
+		_setErase(posX,posY);
+	Arduino_LCD::print(value);
+}
+*/
+
+void RobotControl::debugPrint(long value, uint8_t x, uint8_t y){
+	static long oldVal=0;
+	Arduino_LCD::stroke(backGround);
+	text(oldVal,x,y);
+	Arduino_LCD::stroke(foreGround);
+	text(value,x,y);
+	oldVal=value;
+}
+
+void RobotControl::clearScreen(){
+	Arduino_LCD::fillScreen(backGround);
+}
+
+void RobotControl::drawBMP(char* filename, uint8_t x, uint8_t y){
+	/*for(int j=0;j<NUM_EEPROM_BMP;j++){
+		Serial.println(_eeprom_bmp[j].name);
+		Serial.print(" ");
+		Serial.print(_eeprom_bmp[j].address);
+		Serial.print(" ");
+		Serial.print(_eeprom_bmp[j].width);
+		Serial.print(" ");
+		Serial.println(_eeprom_bmp[j].height);
+	}
+	Serial.println();*/
+	if(_isEEPROM_BMP_Allocated){
+		for(int i=0;i<NUM_EEPROM_BMP;i++){
+			if(cmp(_eeprom_bmp[i].name,filename,7)){
+				/*Serial.println(_eeprom_bmp[i].name);
+				Serial.print(" ");
+				Serial.print(_eeprom_bmp[i].address);
+				Serial.print(" ");
+				Serial.print(_eeprom_bmp[i].width);
+				Serial.print(" ");
+				Serial.println(_eeprom_bmp[i].height);*/
+				_drawBMP(_eeprom_bmp[i].address,x,y,_eeprom_bmp[i].width,_eeprom_bmp[i].height);
+				return;
+			}
+		}
+	}else{
+		_drawBMP(filename,x,y);//goes to SD
+	}
+}
+bool cmp(char* str1, char* str2, uint8_t len){
+  for(uint8_t i=0;i<len;i++){
+	if(str1[i]==' ')break;
+    if(str1[i]!=str2[i])return false;
+  }
+  return true;
+}
+
+void RobotControl::_drawBMP(uint32_t iconOffset, uint8_t x, uint8_t y, uint8_t width, uint8_t height){
+	uint8_t screenWidth=Arduino_LCD::width();
+	uint8_t screenHeight=Arduino_LCD::height();
+	if((x >= screenWidth) || (y >= screenHeight)) return;
+
+	// Crop area to be loaded
+	if((x+width-1) >= screenWidth)  width = screenWidth  - x;
+	if((y+height-1) >= screenHeight) height = screenHeight - y;
+
+	// Set TFT address window to clipped image bounds
+	Arduino_LCD::setAddrWindow(x, y, x+width-1, y+height-1);
+
+	// launch the reading command
+	_drawBMP_EEPROM(iconOffset, width, height);
+}
+
+//  Draw BMP from SD card through the filename
+void RobotControl::_drawBMP(char* filename, uint8_t posX, uint8_t posY){
+	uint8_t  bmpWidth, bmpHeight;   // W+H in pixels
+	uint8_t  bmpDepth;              // Bit depth (currently must be 24)
+	uint32_t bmpImageoffset;        // Start of image data in file
+	uint32_t rowSize;               // Not always = bmpWidth; may have padding
+	uint8_t  sdbuffer[3*BUFFPIXEL]; // pixel buffer (R+G+B per pixel)
+	uint8_t  buffidx = sizeof(sdbuffer); // Current position in sdbuffer
+	bool  goodBmp = false;       // Set to true on valid header parse
+	bool  flip    = true;        // BMP is stored bottom-to-top
+	uint8_t  w, h, row, col;
+	uint8_t  r, g, b;
+	uint32_t pos = 0;
+
+	// Open requested file on SD card
+	if ((file.open(filename,O_READ)) == NULL) {
+		return;
+	}
+
+	// Parse BMP header
+	if(read16(file) == 0x4D42) { // BMP signature
+		read32(file);//uint32_t aux = read32(file);
+		(void)read32(file); // Read & ignore creator bytes
+		bmpImageoffset = read32(file); // Start of image data
+		
+		// Read DIB header
+		(void)read32(file);//aux = read32(file);
+		bmpWidth  = read32(file);
+		bmpHeight = read32(file);
+		
+		if(read16(file) == 1) { // # planes -- must be '1'
+			bmpDepth = read16(file); // bits per pixel
+			if((bmpDepth == 24) && (read32(file) == 0)) { // 0 = uncompressed
+				goodBmp = true; // Supported BMP format -- proceed!
+
+				// BMP rows are padded (if needed) to 4-byte boundary
+				rowSize = (bmpWidth * 3 + 3) & ~3;
+
+				// If bmpHeight is negative, image is in top-down order.
+				// This is not canon but has been observed in the wild.
+				if(bmpHeight < 0) {
+					bmpHeight = -bmpHeight;
+					flip      = false;
+				}
+
+				// Crop area to be loaded
+				w = bmpWidth;
+				h = bmpHeight;
+
+				//  Start drawing
+				//_enableLCD();
+				Arduino_LCD::setAddrWindow(posX, posY, posX+bmpWidth-1, posY+bmpHeight-1);  
+
+				for (row=0; row<h; row++) { // For each scanline...
+					if(flip) // Bitmap is stored bottom-to-top order (normal BMP)
+						pos = bmpImageoffset + (bmpHeight - 1 - row) * rowSize;
+					else     // Bitmap is stored top-to-bottom
+						pos = bmpImageoffset + row * rowSize;
+						
+					if(file.curPosition() != pos) { // Need seek?
+						//_enableSD();
+						file.seekSet(pos);
+						buffidx = sizeof(sdbuffer); // Force buffer reload
+						//_enableLCD();
+					}
+					for (col=0; col<w; col++) { // For each pixel...
+						// Time to read more pixel data?
+						if (buffidx >= sizeof(sdbuffer)) { // Indeed
+							//_enableSD();
+							file.read(sdbuffer, sizeof(sdbuffer));
+							buffidx = 0; // Set index to beginning
+							//_enableLCD();
+						}
+						// Convert pixel from BMP to TFT format, push to display
+						b = sdbuffer[buffidx++];
+						g = sdbuffer[buffidx++];
+						r = sdbuffer[buffidx++];
+
+						int  color = Arduino_LCD::Color565(r,g,b);
+						
+						Arduino_LCD::pushColor(color);
+					} // end pixel
+				} // end scanline
+				//_enableSD();
+			} // end goodBmp*/
+		}
+	}
+	file.close();
+	//_enableLCD();
+}
+uint16_t read16(Fat16& f) {
+  uint16_t result;
+  f.read(&result,sizeof(result));
+  return result;
+}
+uint32_t read32(Fat16& f) {
+  uint32_t result;
+  f.read(&result,sizeof(result));
+  return result;
+}
+/*
+uint16_t color565(uint8_t r, uint8_t g, uint8_t b) {
+  return ((r & 0xF8) << 8) | ((g & 0xFC) << 3) | (b >> 3);
+}*/
+
+
+void RobotControl::_drawBMP_EEPROM(uint16_t address, uint8_t width, uint8_t height){
+	uint16_t u16retVal = 0;
+	EEPROM_I2C::_beginTransmission(address);
+	EEPROM_I2C::_endTransmission();
+	/*Wire.beginTransmission(DEVICEADDRESS);
+	Wire.write( (address >> 8) & 0xFF );
+	Wire.write( (address >> 0) & 0xFF );
+	Wire.endTransmission();*/
+
+	long s = width * height ;
+	for(long j = 0; j < (long) s >> 4; j++) { // divided by 32, times 2
+		Wire.requestFrom(DEVICEADDRESS, 32);
+		for(int i = 0; i < 32; i+=2) {
+			u16retVal = Wire.read();
+			u16retVal = (u16retVal << 8) + Wire.read();
+			Arduino_LCD::pushColor(u16retVal);
+		}
+	}
+
+}
+void RobotControl::beginBMPFromEEPROM(){
+	_eeprom_bmp=(EEPROM_BMP*)malloc(NUM_EEPROM_BMP*sizeof(EEPROM_BMP));
+	EEPROM_I2C::_beginTransmission(0);
+	EEPROM_I2C::_endTransmission();
+	
+	for(uint8_t j=0;j<NUM_EEPROM_BMP;j++){
+		Wire.requestFrom(DEVICEADDRESS, sizeof(EEPROM_BMP));
+		for(uint8_t i=0;i<8;i++){
+			_eeprom_bmp[j].name[i]=Wire.read();//name
+		}
+		_eeprom_bmp[j].width=Wire.read();//width
+		_eeprom_bmp[j].height=Wire.read();//height
+		
+		_eeprom_bmp[j].address=Wire.read();
+		_eeprom_bmp[j].address=_eeprom_bmp[j].address + (Wire.read() << 8);//address
+	}
+	_isEEPROM_BMP_Allocated=true;
+	
+}
+void RobotControl::endBMPFromEEPROM(){
+	free(_eeprom_bmp);
+	_isEEPROM_BMP_Allocated=false;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/Adafruit_GFX.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/Adafruit_GFX.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/Adafruit_GFX.cpp	(revision 136)
@@ -0,0 +1,690 @@
+/*
+This is the core graphics library for all our displays, providing a common
+set of graphics primitives (points, lines, circles, etc.).  It needs to be
+paired with a hardware-specific library for each display device we carry
+(to handle the lower-level functions).
+
+Adafruit invests time and resources providing this open source code, please
+support Adafruit & open-source hardware by purchasing products from Adafruit!
+
+Copyright (c) 2013 Adafruit Industries.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+- Redistributions of source code must retain the above copyright notice,
+  this list of conditions and the following disclaimer.
+- Redistributions in binary form must reproduce the above copyright notice,
+  this list of conditions and the following disclaimer in the documentation
+  and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#include "Adafruit_GFX.h"
+#include "glcdfont.c"
+#ifdef __AVR__
+ #include <avr/pgmspace.h>
+#else
+ #define pgm_read_byte(addr) (*(const unsigned char *)(addr))
+#endif
+
+Adafruit_GFX::Adafruit_GFX(int16_t w, int16_t h):
+  WIDTH(w), HEIGHT(h)
+{
+  _width    = WIDTH;
+  _height   = HEIGHT;
+  rotation  = 0;
+  cursor_y  = cursor_x    = 0;
+  textsize  = 1;
+  textcolor = textbgcolor = 0xFFFF;
+  wrap      = true;
+}
+
+// Draw a circle outline
+void Adafruit_GFX::drawCircle(int16_t x0, int16_t y0, int16_t r,
+    uint16_t color) {
+  int16_t f = 1 - r;
+  int16_t ddF_x = 1;
+  int16_t ddF_y = -2 * r;
+  int16_t x = 0;
+  int16_t y = r;
+
+  drawPixel(x0  , y0+r, color);
+  drawPixel(x0  , y0-r, color);
+  drawPixel(x0+r, y0  , color);
+  drawPixel(x0-r, y0  , color);
+
+  while (x<y) {
+    if (f >= 0) {
+      y--;
+      ddF_y += 2;
+      f += ddF_y;
+    }
+    x++;
+    ddF_x += 2;
+    f += ddF_x;
+  
+    drawPixel(x0 + x, y0 + y, color);
+    drawPixel(x0 - x, y0 + y, color);
+    drawPixel(x0 + x, y0 - y, color);
+    drawPixel(x0 - x, y0 - y, color);
+    drawPixel(x0 + y, y0 + x, color);
+    drawPixel(x0 - y, y0 + x, color);
+    drawPixel(x0 + y, y0 - x, color);
+    drawPixel(x0 - y, y0 - x, color);
+  }
+}
+
+void Adafruit_GFX::drawCircleHelper( int16_t x0, int16_t y0,
+               int16_t r, uint8_t cornername, uint16_t color) {
+  int16_t f     = 1 - r;
+  int16_t ddF_x = 1;
+  int16_t ddF_y = -2 * r;
+  int16_t x     = 0;
+  int16_t y     = r;
+
+  while (x<y) {
+    if (f >= 0) {
+      y--;
+      ddF_y += 2;
+      f     += ddF_y;
+    }
+    x++;
+    ddF_x += 2;
+    f     += ddF_x;
+    if (cornername & 0x4) {
+      drawPixel(x0 + x, y0 + y, color);
+      drawPixel(x0 + y, y0 + x, color);
+    } 
+    if (cornername & 0x2) {
+      drawPixel(x0 + x, y0 - y, color);
+      drawPixel(x0 + y, y0 - x, color);
+    }
+    if (cornername & 0x8) {
+      drawPixel(x0 - y, y0 + x, color);
+      drawPixel(x0 - x, y0 + y, color);
+    }
+    if (cornername & 0x1) {
+      drawPixel(x0 - y, y0 - x, color);
+      drawPixel(x0 - x, y0 - y, color);
+    }
+  }
+}
+
+void Adafruit_GFX::fillCircle(int16_t x0, int16_t y0, int16_t r,
+			      uint16_t color) {
+  drawFastVLine(x0, y0-r, 2*r+1, color);
+  fillCircleHelper(x0, y0, r, 3, 0, color);
+}
+
+// Used to do circles and roundrects
+void Adafruit_GFX::fillCircleHelper(int16_t x0, int16_t y0, int16_t r,
+    uint8_t cornername, int16_t delta, uint16_t color) {
+
+  int16_t f     = 1 - r;
+  int16_t ddF_x = 1;
+  int16_t ddF_y = -2 * r;
+  int16_t x     = 0;
+  int16_t y     = r;
+
+  while (x<y) {
+    if (f >= 0) {
+      y--;
+      ddF_y += 2;
+      f     += ddF_y;
+    }
+    x++;
+    ddF_x += 2;
+    f     += ddF_x;
+
+    if (cornername & 0x1) {
+      drawFastVLine(x0+x, y0-y, 2*y+1+delta, color);
+      drawFastVLine(x0+y, y0-x, 2*x+1+delta, color);
+    }
+    if (cornername & 0x2) {
+      drawFastVLine(x0-x, y0-y, 2*y+1+delta, color);
+      drawFastVLine(x0-y, y0-x, 2*x+1+delta, color);
+    }
+  }
+}
+
+// Bresenham's algorithm - thx wikpedia
+void Adafruit_GFX::drawLine(int16_t x0, int16_t y0,
+			    int16_t x1, int16_t y1,
+			    uint16_t color) {
+  int16_t steep = abs(y1 - y0) > abs(x1 - x0);
+  if (steep) {
+    swap(x0, y0);
+    swap(x1, y1);
+  }
+
+  if (x0 > x1) {
+    swap(x0, x1);
+    swap(y0, y1);
+  }
+
+  int16_t dx, dy;
+  dx = x1 - x0;
+  dy = abs(y1 - y0);
+
+  int16_t err = dx / 2;
+  int16_t ystep;
+
+  if (y0 < y1) {
+    ystep = 1;
+  } else {
+    ystep = -1;
+  }
+
+  for (; x0<=x1; x0++) {
+    if (steep) {
+      drawPixel(y0, x0, color);
+    } else {
+      drawPixel(x0, y0, color);
+    }
+    err -= dy;
+    if (err < 0) {
+      y0 += ystep;
+      err += dx;
+    }
+  }
+}
+
+// Draw a rectangle
+void Adafruit_GFX::drawRect(int16_t x, int16_t y,
+			    int16_t w, int16_t h,
+			    uint16_t color) {
+  drawFastHLine(x, y, w, color);
+  drawFastHLine(x, y+h-1, w, color);
+  drawFastVLine(x, y, h, color);
+  drawFastVLine(x+w-1, y, h, color);
+}
+
+void Adafruit_GFX::drawFastVLine(int16_t x, int16_t y,
+				 int16_t h, uint16_t color) {
+  // Update in subclasses if desired!
+  drawLine(x, y, x, y+h-1, color);
+}
+
+void Adafruit_GFX::drawFastHLine(int16_t x, int16_t y,
+				 int16_t w, uint16_t color) {
+  // Update in subclasses if desired!
+  drawLine(x, y, x+w-1, y, color);
+}
+
+void Adafruit_GFX::fillRect(int16_t x, int16_t y, int16_t w, int16_t h,
+			    uint16_t color) {
+  // Update in subclasses if desired!
+  for (int16_t i=x; i<x+w; i++) {
+    drawFastVLine(i, y, h, color);
+  }
+}
+
+void Adafruit_GFX::fillScreen(uint16_t color) {
+  fillRect(0, 0, _width, _height, color);
+}
+
+// Draw a rounded rectangle
+void Adafruit_GFX::drawRoundRect(int16_t x, int16_t y, int16_t w,
+  int16_t h, int16_t r, uint16_t color) {
+  // smarter version
+  drawFastHLine(x+r  , y    , w-2*r, color); // Top
+  drawFastHLine(x+r  , y+h-1, w-2*r, color); // Bottom
+  drawFastVLine(x    , y+r  , h-2*r, color); // Left
+  drawFastVLine(x+w-1, y+r  , h-2*r, color); // Right
+  // draw four corners
+  drawCircleHelper(x+r    , y+r    , r, 1, color);
+  drawCircleHelper(x+w-r-1, y+r    , r, 2, color);
+  drawCircleHelper(x+w-r-1, y+h-r-1, r, 4, color);
+  drawCircleHelper(x+r    , y+h-r-1, r, 8, color);
+}
+
+// Fill a rounded rectangle
+void Adafruit_GFX::fillRoundRect(int16_t x, int16_t y, int16_t w,
+				 int16_t h, int16_t r, uint16_t color) {
+  // smarter version
+  fillRect(x+r, y, w-2*r, h, color);
+
+  // draw four corners
+  fillCircleHelper(x+w-r-1, y+r, r, 1, h-2*r-1, color);
+  fillCircleHelper(x+r    , y+r, r, 2, h-2*r-1, color);
+}
+
+// Draw a triangle
+void Adafruit_GFX::drawTriangle(int16_t x0, int16_t y0,
+				int16_t x1, int16_t y1,
+				int16_t x2, int16_t y2, uint16_t color) {
+  drawLine(x0, y0, x1, y1, color);
+  drawLine(x1, y1, x2, y2, color);
+  drawLine(x2, y2, x0, y0, color);
+}
+
+// Fill a triangle
+void Adafruit_GFX::fillTriangle ( int16_t x0, int16_t y0,
+				  int16_t x1, int16_t y1,
+				  int16_t x2, int16_t y2, uint16_t color) {
+
+  int16_t a, b, y, last;
+
+  // Sort coordinates by Y order (y2 >= y1 >= y0)
+  if (y0 > y1) {
+    swap(y0, y1); swap(x0, x1);
+  }
+  if (y1 > y2) {
+    swap(y2, y1); swap(x2, x1);
+  }
+  if (y0 > y1) {
+    swap(y0, y1); swap(x0, x1);
+  }
+
+  if(y0 == y2) { // Handle awkward all-on-same-line case as its own thing
+    a = b = x0;
+    if(x1 < a)      a = x1;
+    else if(x1 > b) b = x1;
+    if(x2 < a)      a = x2;
+    else if(x2 > b) b = x2;
+    drawFastHLine(a, y0, b-a+1, color);
+    return;
+  }
+
+  int16_t
+    dx01 = x1 - x0,
+    dy01 = y1 - y0,
+    dx02 = x2 - x0,
+    dy02 = y2 - y0,
+    dx12 = x2 - x1,
+    dy12 = y2 - y1,
+    sa   = 0,
+    sb   = 0;
+
+  // For upper part of triangle, find scanline crossings for segments
+  // 0-1 and 0-2.  If y1=y2 (flat-bottomed triangle), the scanline y1
+  // is included here (and second loop will be skipped, avoiding a /0
+  // error there), otherwise scanline y1 is skipped here and handled
+  // in the second loop...which also avoids a /0 error here if y0=y1
+  // (flat-topped triangle).
+  if(y1 == y2) last = y1;   // Include y1 scanline
+  else         last = y1-1; // Skip it
+
+  for(y=y0; y<=last; y++) {
+    a   = x0 + sa / dy01;
+    b   = x0 + sb / dy02;
+    sa += dx01;
+    sb += dx02;
+    /* longhand:
+    a = x0 + (x1 - x0) * (y - y0) / (y1 - y0);
+    b = x0 + (x2 - x0) * (y - y0) / (y2 - y0);
+    */
+    if(a > b) swap(a,b);
+    drawFastHLine(a, y, b-a+1, color);
+  }
+
+  // For lower part of triangle, find scanline crossings for segments
+  // 0-2 and 1-2.  This loop is skipped if y1=y2.
+  sa = dx12 * (y - y1);
+  sb = dx02 * (y - y0);
+  for(; y<=y2; y++) {
+    a   = x1 + sa / dy12;
+    b   = x0 + sb / dy02;
+    sa += dx12;
+    sb += dx02;
+    /* longhand:
+    a = x1 + (x2 - x1) * (y - y1) / (y2 - y1);
+    b = x0 + (x2 - x0) * (y - y0) / (y2 - y0);
+    */
+    if(a > b) swap(a,b);
+    drawFastHLine(a, y, b-a+1, color);
+  }
+}
+
+void Adafruit_GFX::drawBitmap(int16_t x, int16_t y,
+			      const uint8_t *bitmap, int16_t w, int16_t h,
+			      uint16_t color) {
+
+  int16_t i, j, byteWidth = (w + 7) / 8;
+
+  for(j=0; j<h; j++) {
+    for(i=0; i<w; i++ ) {
+      if(pgm_read_byte(bitmap + j * byteWidth + i / 8) & (128 >> (i & 7))) {
+	drawPixel(x+i, y+j, color);
+      }
+    }
+  }
+}
+
+#if ARDUINO >= 100
+size_t Adafruit_GFX::write(uint8_t c) {
+#else
+void Adafruit_GFX::write(uint8_t c) {
+#endif
+  if (c == '\n') {
+    cursor_y += textsize*8;
+    cursor_x  = 0;
+  } else if (c == '\r') {
+    // skip em
+  } else {
+    drawChar(cursor_x, cursor_y, c, textcolor, textbgcolor, textsize);
+    cursor_x += textsize*6;
+    if (wrap && (cursor_x > (_width - textsize*6))) {
+      cursor_y += textsize*8;
+      cursor_x = 0;
+    }
+  }
+#if ARDUINO >= 100
+  return 1;
+#endif
+}
+
+// Draw a character
+void Adafruit_GFX::drawChar(int16_t x, int16_t y, unsigned char c,
+			    uint16_t color, uint16_t bg, uint8_t size) {
+
+  if((x >= _width)            || // Clip right
+     (y >= _height)           || // Clip bottom
+     ((x + 6 * size - 1) < 0) || // Clip left
+     ((y + 8 * size - 1) < 0))   // Clip top
+    return;
+
+  for (int8_t i=0; i<6; i++ ) {
+    uint8_t line;
+    if (i == 5) 
+      line = 0x0;
+    else 
+      line = pgm_read_byte(font+(c*5)+i);
+    for (int8_t j = 0; j<8; j++) {
+      if (line & 0x1) {
+        if (size == 1) // default size
+          drawPixel(x+i, y+j, color);
+        else {  // big size
+          fillRect(x+(i*size), y+(j*size), size, size, color);
+        } 
+      } else if (bg != color) {
+        if (size == 1) // default size
+          drawPixel(x+i, y+j, bg);
+        else {  // big size
+          fillRect(x+i*size, y+j*size, size, size, bg);
+        }
+      }
+      line >>= 1;
+    }
+  }
+}
+
+void Adafruit_GFX::setCursor(int16_t x, int16_t y) {
+  cursor_x = x;
+  cursor_y = y;
+}
+
+void Adafruit_GFX::setTextSize(uint8_t s) {
+  textsize = (s > 0) ? s : 1;
+}
+
+void Adafruit_GFX::setTextColor(uint16_t c) {
+  // For 'transparent' background, we'll set the bg 
+  // to the same as fg instead of using a flag
+  textcolor = textbgcolor = c;
+}
+
+void Adafruit_GFX::setTextColor(uint16_t c, uint16_t b) {
+  textcolor   = c;
+  textbgcolor = b; 
+}
+
+void Adafruit_GFX::setTextWrap(boolean w) {
+  wrap = w;
+}
+
+uint8_t Adafruit_GFX::getRotation(void) {
+  return rotation;
+}
+
+void Adafruit_GFX::setRotation(uint8_t x) {
+  rotation = (x & 3);
+  switch(rotation) {
+   case 0:
+   case 2:
+    _width  = WIDTH;
+    _height = HEIGHT;
+    break;
+   case 1:
+   case 3:
+    _width  = HEIGHT;
+    _height = WIDTH;
+    break;
+  }
+}
+
+// Return the size of the display (per current rotation)
+int16_t Adafruit_GFX::width(void) {
+  return _width;
+}
+ 
+int16_t Adafruit_GFX::height(void) {
+  return _height;
+}
+
+void Adafruit_GFX::invertDisplay(boolean i) {
+  // Do nothing, must be subclassed if supported
+}
+
+uint16_t Adafruit_GFX::newColor(uint8_t r, uint8_t g, uint8_t b) {
+  return ((r & 0xF8) << 8) | ((g & 0xFC) << 3) | (b >> 3);
+}
+
+void Adafruit_GFX::background(uint8_t red, uint8_t green, uint8_t blue) {
+  background(newColor(red, green, blue));
+}
+
+void Adafruit_GFX::background(color c) {
+  fillScreen(c);
+}
+
+void Adafruit_GFX::stroke(uint8_t red, uint8_t green, uint8_t blue) {
+  stroke(newColor(red, green, blue));
+}
+
+void Adafruit_GFX::stroke(color c) {
+  useStroke = true;
+  strokeColor = c;
+  setTextColor(c);
+}
+
+void Adafruit_GFX::noStroke() {
+  useStroke = false;
+}
+
+void Adafruit_GFX::noFill() {
+  useFill = false;
+}
+
+void Adafruit_GFX::fill(uint8_t red, uint8_t green, uint8_t blue) {
+  fill(newColor(red, green, blue));
+}
+
+void Adafruit_GFX::fill(color c) {
+  useFill = true;
+  fillColor = c;
+}
+
+void Adafruit_GFX::text(int value, uint8_t x, uint8_t y){
+  if (!useStroke)
+    return;
+  
+  setTextWrap(false);
+  setTextColor(strokeColor);
+  setCursor(x, y);
+  print(value);
+}
+void Adafruit_GFX::text(long value, uint8_t x, uint8_t y){
+  if (!useStroke)
+    return;
+  
+  setTextWrap(false);
+  setTextColor(strokeColor);
+  setCursor(x, y);
+  print(value);
+}
+void Adafruit_GFX::text(char value, uint8_t x, uint8_t y){
+  if (!useStroke)
+    return;
+  
+  setTextWrap(false);
+  setTextColor(strokeColor);
+  setCursor(x, y);
+  print(value);
+}
+
+void Adafruit_GFX::text(const char * text, int16_t x, int16_t y) {
+  if (!useStroke)
+    return;
+  
+  setTextWrap(false);
+  setTextColor(strokeColor);
+  setCursor(x, y);
+  print(text);
+}
+
+void Adafruit_GFX::textWrap(const char * text, int16_t x, int16_t y) {
+  if (!useStroke)
+    return;
+  
+  setTextWrap(true);
+  setTextColor(strokeColor);
+  setCursor(x, y);
+  print(text);
+}
+
+
+void Adafruit_GFX::textSize(uint8_t size) {
+  setTextSize(size);
+}
+
+void Adafruit_GFX::point(int16_t x, int16_t y) {
+  if (!useStroke)
+    return;
+  
+  drawPixel(x, y, strokeColor);
+}
+
+void Adafruit_GFX::line(int16_t x1, int16_t y1, int16_t x2, int16_t y2) {
+  if (!useStroke)
+    return;
+  
+  if (x1 == x2) {
+    drawFastVLine(x1, y1, y2 - y1, strokeColor);
+  }
+  else if (y1 == y2) {
+    drawFastHLine(x1, y1, x2 - x1, strokeColor);
+  }
+  else {
+    drawLine(x1, y1, x2, y2, strokeColor);
+  }
+}
+
+void Adafruit_GFX::rect(int16_t x, int16_t y, int16_t width, int16_t height) {
+  if (useFill) {
+    fillRect(x, y, width, height, fillColor);
+  }
+  if (useStroke) {
+    drawRect(x, y, width, height, strokeColor);
+  }
+}
+
+void Adafruit_GFX::rect(int16_t x, int16_t y, int16_t width, int16_t height, int16_t radius) {
+  if (radius == 0) {
+    rect(x, y, width, height);
+  }
+  if (useFill) {
+    fillRoundRect(x, y, width, height, radius, fillColor);
+  }
+  if (useStroke) {
+    drawRoundRect(x, y, width, height, radius, strokeColor);
+  }
+}
+
+void Adafruit_GFX::circle(int16_t x, int16_t y, int16_t r) {
+  if (r == 0)
+    return;
+  
+  if (useFill) {
+    fillCircle(x, y, r, fillColor);
+  }
+  if (useStroke) {
+    drawCircle(x, y, r, strokeColor);
+  }
+}
+
+void Adafruit_GFX::triangle(int16_t x1, int16_t y1, int16_t x2, int16_t y2, int16_t x3, int16_t y3) {
+  if (useFill) {
+    fillTriangle(x1, y1, x2, y2, x3, y3, fillColor);
+  }
+  if (useStroke) {
+    drawTriangle(x1, y1, x2, y2, x3, y3, strokeColor);
+  }
+}
+
+#define BUFFPIXEL 20
+/*
+void Adafruit_GFX::image(PImage & img, uint16_t x, uint16_t y) {
+  int      w, h, row, col;
+  uint8_t  r, g, b;
+  uint32_t pos = 0;
+  uint8_t  sdbuffer[3*BUFFPIXEL]; // pixel buffer (R+G+B per pixel)
+  uint8_t  buffidx = sizeof(sdbuffer); // Current position in sdbuffer
+
+  // Crop area to be loaded
+  w = img._bmpWidth;
+  h = img._bmpHeight;
+  if((x+w-1) >= width())  w = width()  - x;
+  if((y+h-1) >= height()) h = height() - y;
+
+  
+  // Set TFT address window to clipped image bounds
+  //setAddrWindow(x, y, x+w-1, y+h-1);
+  
+  
+  for (row=0; row<h; row++) { // For each scanline...
+    // Seek to start of scan line.  It might seem labor-
+    // intensive to be doing this on every line, but this
+    // method covers a lot of gritty details like cropping
+    // and scanline padding.  Also, the seek only takes
+    // place if the file position actually needs to change
+    // (avoids a lot of cluster math in SD library).
+    if(img._flip) // Bitmap is stored bottom-to-top order (normal BMP)
+      pos = img._bmpImageoffset + (img._bmpHeight - 1 - row) * img._rowSize;
+    else     // Bitmap is stored top-to-bottom
+      pos = img._bmpImageoffset + row * img._rowSize;
+    if(img._bmpFile.position() != pos) { // Need seek?
+      img._bmpFile.seek(pos);
+      buffidx = sizeof(sdbuffer); // Force buffer reload
+    }
+
+    for (col=0; col<w; col++) { // For each pixel...
+      // Time to read more pixel data?
+      if (buffidx >= sizeof(sdbuffer)) { // Indeed
+        img._bmpFile.read(sdbuffer, sizeof(sdbuffer));
+        buffidx = 0; // Set index to beginning
+      }
+
+      // Convert pixel from BMP to TFT format, push to display
+      b = sdbuffer[buffidx++];
+      g = sdbuffer[buffidx++];
+      r = sdbuffer[buffidx++];
+      //pushColor(tft.Color565(r,g,b));
+      drawPixel(x + col, y + row, newColor(r, g, b));
+      
+    } // end pixel
+  } // end scanline
+
+}*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/Adafruit_GFX.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/Adafruit_GFX.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/Adafruit_GFX.h	(revision 136)
@@ -0,0 +1,190 @@
+/******************************************************************
+ This is the core graphics library for all our displays, providing
+ basic graphics primitives (points, lines, circles, etc.). It needs
+ to be paired with a hardware-specific library for each display
+ device we carry (handling the lower-level functions).
+ 
+ Adafruit invests time and resources providing this open
+ source code, please support Adafruit and open-source hardware
+ by purchasing products from Adafruit!
+ 
+ Written by Limor Fried/Ladyada for Adafruit Industries.
+ BSD license, check license.txt for more information.
+ All text above must be included in any redistribution.
+ ******************************************************************/
+
+#ifndef _ADAFRUIT_GFX_H
+#define _ADAFRUIT_GFX_H
+
+#if ARDUINO >= 100
+ #include "Arduino.h"
+ #include "Print.h"
+#else
+ #include "WProgram.h"
+#endif
+
+//#include "PImage.h"
+
+#define swap(a, b) { int16_t t = a; a = b; b = t; }
+
+/* TODO
+enum RectMode {
+  CORNER,
+  CORNERS,
+  RADIUS,
+  CENTER
+};
+*/
+
+typedef uint16_t color;
+
+class Adafruit_GFX : public Print {
+ public:
+
+  Adafruit_GFX(int16_t w, int16_t h); // Constructor
+
+  // This MUST be defined by the subclass:
+  virtual void drawPixel(int16_t x, int16_t y, uint16_t color) = 0;
+
+  // These MAY be overridden by the subclass to provide device-specific
+  // optimized code.  Otherwise 'generic' versions are used.
+  virtual void
+    drawLine(int16_t x0, int16_t y0, int16_t x1, int16_t y1, uint16_t color),
+    drawFastVLine(int16_t x, int16_t y, int16_t h, uint16_t color),
+    drawFastHLine(int16_t x, int16_t y, int16_t w, uint16_t color),
+    drawRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color),
+    fillRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color),
+    fillScreen(uint16_t color),
+    invertDisplay(boolean i);
+
+  // These exist only with Adafruit_GFX (no subclass overrides)
+  void
+    drawCircle(int16_t x0, int16_t y0, int16_t r, uint16_t color),
+    drawCircleHelper(int16_t x0, int16_t y0, int16_t r, uint8_t cornername,
+      uint16_t color),
+    fillCircle(int16_t x0, int16_t y0, int16_t r, uint16_t color),
+    fillCircleHelper(int16_t x0, int16_t y0, int16_t r, uint8_t cornername,
+      int16_t delta, uint16_t color),
+    drawTriangle(int16_t x0, int16_t y0, int16_t x1, int16_t y1,
+      int16_t x2, int16_t y2, uint16_t color),
+    fillTriangle(int16_t x0, int16_t y0, int16_t x1, int16_t y1,
+      int16_t x2, int16_t y2, uint16_t color),
+    drawRoundRect(int16_t x0, int16_t y0, int16_t w, int16_t h,
+      int16_t radius, uint16_t color),
+    fillRoundRect(int16_t x0, int16_t y0, int16_t w, int16_t h,
+      int16_t radius, uint16_t color),
+    drawBitmap(int16_t x, int16_t y, const uint8_t *bitmap,
+      int16_t w, int16_t h, uint16_t color),
+    drawChar(int16_t x, int16_t y, unsigned char c, uint16_t color,
+      uint16_t bg, uint8_t size),
+    setCursor(int16_t x, int16_t y),
+    setTextColor(uint16_t c),
+    setTextColor(uint16_t c, uint16_t bg),
+    setTextSize(uint8_t s),
+    setTextWrap(boolean w),
+    setRotation(uint8_t r);
+
+#if ARDUINO >= 100
+  virtual size_t write(uint8_t);
+#else
+  virtual void   write(uint8_t);
+#endif
+
+  int16_t
+    height(void),
+    width(void);
+
+  uint8_t getRotation(void);
+
+  
+  /*
+   * Processing-like graphics primitives
+   */
+  
+  /// transforms a color in 16-bit form given the RGB components.
+  /// The default implementation makes a 5-bit red, a 6-bit
+  /// green and a 5-bit blue (MSB to LSB). Devices that use
+  /// different scheme should override this. 
+  virtual uint16_t newColor(uint8_t red, uint8_t green, uint8_t blue);
+  
+  
+  // http://processing.org/reference/background_.html
+  void background(uint8_t red, uint8_t green, uint8_t blue);
+  void background(color c);
+
+  // http://processing.org/reference/fill_.html
+  void fill(uint8_t red, uint8_t green, uint8_t blue);
+  void fill(color c);
+
+  // http://processing.org/reference/noFill_.html
+  void noFill();
+
+  // http://processing.org/reference/stroke_.html
+  void stroke(uint8_t red, uint8_t green, uint8_t blue);
+  void stroke(color c);
+
+  // http://processing.org/reference/noStroke_.html
+  void noStroke();
+  
+  void text(const char * text, int16_t x, int16_t y);
+  void text(int value, uint8_t posX, uint8_t posY);
+  void text(long value, uint8_t posX, uint8_t posY);
+  void text(char value, uint8_t posX, uint8_t posY);
+  
+  void textWrap(const char * text, int16_t x, int16_t y);
+
+  void textSize(uint8_t size);
+  
+  // similar to ellipse() in Processing, but with
+  // a single radius.
+  // http://processing.org/reference/ellipse_.html
+  void circle(int16_t x, int16_t y, int16_t r);
+  
+  void point(int16_t x, int16_t y);
+  
+  void line(int16_t x1, int16_t y1, int16_t x2, int16_t y2);
+  
+  void quad(int16_t x1, int16_t y1, int16_t x2, int16_t y2, int16_t x3, int16_t y3, int16_t x4, int16_t y4);
+  
+  void rect(int16_t x, int16_t y, int16_t width, int16_t height);
+
+  void rect(int16_t x, int16_t y, int16_t width, int16_t height, int16_t radius);
+  
+  void triangle(int16_t x1, int16_t y1, int16_t x2, int16_t y2, int16_t x3, int16_t y3);
+  
+  /* TODO
+  void rectMode(RectMode mode);
+  
+  void pushStyle();
+  void popStyle();
+  */
+
+//  PImage loadImage(const char * fileName) { return PImage::loadImage(fileName); }
+  
+//  void image(PImage & img, uint16_t x, uint16_t y);
+  
+ protected:
+  const int16_t
+    WIDTH, HEIGHT;   // This is the 'raw' display w/h - never changes
+  int16_t
+    _width, _height, // Display w/h as modified by current rotation
+    cursor_x, cursor_y;
+  uint16_t
+    textcolor, textbgcolor;
+  uint8_t
+    textsize,
+    rotation;
+  boolean
+    wrap; // If set, 'wrap' text at right edge of display
+
+  /*
+   * Processing-style graphics state
+   */
+  
+  color strokeColor;
+  bool useStroke;
+  color fillColor;
+  bool useFill;
+};
+
+#endif // _ADAFRUIT_GFX_H
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/RobotTextManager.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/RobotTextManager.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/RobotTextManager.cpp	(revision 136)
@@ -0,0 +1,192 @@
+#include <avr/pgmspace.h>
+#include <ArduinoRobot.h>
+#include "VirtualKeyboard.h"
+#include "RobotTextManager.h"
+#include "scripts_Hello_User.h"
+
+const int TextManager::lineHeight=10;
+const int TextManager::charWidth=6;
+
+
+void TextManager::setMargin(int margin_left,int margin_top){
+	this->margin_left=margin_left;
+	this->margin_top=margin_top;
+}
+int TextManager::getLin(int lineNum){
+   return lineNum*lineHeight+margin_top;
+}
+
+int TextManager::getCol(int colNum){
+   return colNum*charWidth+margin_left;
+}
+
+void TextManager::writeText(int lineNum, int colNum, char* txt, bool onOff){
+  if(!onOff)
+	Robot.setTextColor(WHITE);
+
+  Robot.setCursor(getCol(colNum),getLin(lineNum));
+  Robot.print(txt);
+  
+  Robot.setTextColor(BLACK);
+}
+
+void TextManager::drawInput(bool onOff){
+  if(!onOff)
+    Robot.setTextColor(WHITE);
+
+  Robot.setCursor(getCol(inputCol),getLin(inputLin)+1);
+  Robot.print('_');
+  
+  Robot.setTextColor(BLACK);
+
+}
+
+void TextManager::mvInput(int dire){
+  drawInput(0);
+  if(dire<0){
+    if(inputPos>0){
+      inputPos--;
+      inputCol--;
+    }
+  }else{
+    if(inputPos<16){
+      inputPos++;
+      inputCol++;
+    }
+  }
+  drawInput(1);
+}
+
+char TextManager::selectLetter(){
+  static int oldVal;
+  char val=map(Robot.knobRead(),0,1023,32,125);
+  if(val==oldVal){
+    return 0;  //No changes
+  }else{
+    oldVal=val;
+    return val;  //Current letter
+  }
+}
+
+void TextManager::refreshCurrentLetter(char letter){
+  if(letter){
+	writeText(inputLin,inputCol,inputPool+inputPos,false);//erase
+	inputPool[inputPos]=letter;
+	writeText(inputLin,inputCol,inputPool+inputPos,true);//write
+  }
+}
+
+
+void TextManager::getInput(int lin, int col){
+  writeText(lin,col,">");  //Input indicator
+  
+  writeText(lin, col+1, inputPool);
+  
+  inputLin=lin;  //Ini input cursor
+  inputCol=col+1;
+  inputPos=0;
+  drawInput(true);
+  
+  Vkey.display(100);//Vkey is a object of VirtualKeyboard class
+  
+  while(true){
+    switch(Robot.keyboardRead()){
+      case BUTTON_LEFT:
+        //Robot.beep(BEEP_SIMPLE);
+        mvInput(-1);
+        break;
+      case BUTTON_RIGHT:
+        //Robot.beep(BEEP_SIMPLE);
+        mvInput(1);
+        break;
+      case BUTTON_MIDDLE:
+        //Robot.beep(BEEP_DOUBLE);
+        char selection=Vkey.getSelection();
+        if(selection!='\0'){
+          refreshCurrentLetter(selection);
+          mvInput(1);
+        }else{
+          drawInput(false);
+          return;
+        }
+    }
+    Vkey.run();
+    delay(10);
+  }
+}
+void TextManager::setInputPool(int code){
+  switch(code){
+    case USERNAME:
+      Robot.userNameRead(inputPool);
+      break;
+    case ROBOTNAME:
+      Robot.robotNameRead(inputPool);
+      break;
+    case CITYNAME:
+      Robot.cityNameRead(inputPool);
+      break;
+    case COUNTRYNAME:
+      Robot.countryNameRead(inputPool);
+      break;
+  }
+  for(int i=0;i<18;i++){
+    if(inputPool[i]=='\0'){
+      for(int j=i;j<18;j++){
+        inputPool[j]='\0';
+      }
+      break;
+    }
+  }
+}
+void TextManager::pushInput(int code){
+  switch(code){
+    case USERNAME:
+      Robot.userNameWrite(inputPool);
+      break;
+    case ROBOTNAME:
+      Robot.robotNameWrite(inputPool);
+      break;
+    case CITYNAME:
+      Robot.cityNameWrite(inputPool);
+      break;
+    case COUNTRYNAME:
+      Robot.countryNameWrite(inputPool);
+      break;
+  }
+  for(int i=0;i<18;i++){
+    inputPool[i]='\0';
+  }
+}
+void TextManager::input(int lin,int col, int code){
+  setInputPool(code);
+  getInput(lin,col);
+  pushInput(code);
+}
+
+void TextManager::showPicture(char * filename, int posX, int posY){
+  Robot.pause();
+  Robot._drawBMP(filename,posX,posY);
+  Robot.play();
+}
+
+void TextManager::getPGMtext(int seq){
+  //It takes a string from program space, and fill it  
+  //in the buffer
+  //if(in hello user example){
+  if(true){
+	strcpy_P(PGMbuffer,(char*)pgm_read_word(&(::scripts_Hello_User[seq])));
+  }
+}
+
+void TextManager::writeScript(int seq, int line, int col){
+  //print a string from program space to a specific line,
+  //column on the LCD
+  
+  //first fill the buffer with text from program space
+  getPGMtext(seq);
+  //then print it to the screen
+  textManager.writeText(line,col,PGMbuffer);
+}
+
+
+TextManager textManager=TextManager();
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/RobotTextManager.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/RobotTextManager.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/RobotTextManager.h	(revision 136)
@@ -0,0 +1,77 @@
+#ifndef ROBOTTEXTMANAGER_H
+#define ROBOTTEXTMANAGER_H
+
+#define USERNAME  0
+#define ROBOTNAME  1
+#define CITYNAME  2
+#define COUNTRYNAME  3
+#define EMPTY 4
+
+class TextManager{
+  //The TextManager class is a collection of features specific for Hello 
+  //User example. 
+  //
+  //- It includes solution for setting text position based on
+  //  line/column. The original Robot.text(), or the more low level 
+  //  print() function can only set text position on pixels from left,
+  //  top. 
+  //
+  //- The process of accepting input with the virtual keyboard, saving
+  //  into or reading from EEPROM is delt with here.
+  //
+  //- A workflow for stop the music while displaying image. Trouble
+  //  will happen otherwise.
+  
+  public:
+	//add some margin to the text, left side only atm.
+	void setMargin(int margin_left,int margin_top);
+    
+    //print text based on line, column. 
+    void writeText(int lineNum, int colNum, char* txt, bool onOff=true);
+	
+	//print a script from the scripts library
+	void writeScript(int seq, int line, int col);
+
+	//The whole process of getting input
+	void input(int lin,int col, int code);
+    //Print a cursor and virtual keyboard on screen, and save the user's input
+    void getInput(int lin, int col);  
+    //Get user name, robot name, city name or country name from EEPROM
+    //and store in the input pool.
+    void setInputPool(int code);
+    //save user input to EEPROM
+    void pushInput(int code);
+	
+    //Replaces Robot.drawPicture(), as this one solves collision between
+    //image and music
+    void showPicture(char * filename, int posX, int posY);
+
+  private:
+    int margin_left,margin_top;
+	int getLin(int lineNum);  //Convert line to pixels from top
+    int getCol(int colNum);  //Convert line to pixels from left
+  
+    static const int lineHeight;//8+2=10
+    static const int charWidth;//5+1=6
+    
+    int inputPos;
+    int inputLin;
+    int inputCol;
+	
+    void drawInput(bool onOff);
+    void mvInput(int dire);
+
+    char selectLetter();
+    void refreshCurrentLetter(char letter);
+
+	void getPGMtext(int seq);
+	
+	char PGMbuffer[85];  //the buffer for storing strings
+    char inputPool[18];
+};
+
+//a trick for removing the need of creating an object of TextManager.
+//So you can call me.somefunction() directly in the sketch.
+extern TextManager textManager;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/VirtualKeyboard.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/VirtualKeyboard.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/VirtualKeyboard.cpp	(revision 136)
@@ -0,0 +1,127 @@
+#include "VirtualKeyboard.h"
+
+int VirtualKeyboard::getColLin(int val){
+  uint8_t col,lin;
+  lin=val/10;
+  col=val%10; // saving 36 bytes :(
+  /*if(0<=val && 9>=val){
+    col=val;
+    lin=0;
+  }else if(10<=val && 19>=val){
+    col=val-10;
+    lin=1;
+  }else if(20<=val && 29>=val){
+    col=val-20;
+    lin=2;
+  }else if(30<=val && 39>=val){
+    col=val-30;
+    lin=3;
+  }*/
+  return (col<<8)+lin;	//Put col and lin in one int
+}
+void VirtualKeyboard::run(){
+/** visually select a letter on the keyboard
+*	The selection boarder is 1px higher than the character, 
+*	1px on the bottom, 2px to the left and 2px to the right.
+*
+*/
+  if(!onOff)return;
+  //Serial.println(onOff);
+  static int oldColLin=0;
+  uint8_t val=map(Robot.knobRead(),0,1023,0,38);
+  if(val==38)val=37;	//The last value is jumpy when using batteries
+  int colLin=getColLin(val);
+  
+  if(oldColLin!=colLin){
+    uint8_t x=(oldColLin>>8 & 0xFF)*11+10;//col*11+1+9
+    uint8_t y=(oldColLin & 0xFF)*11+1+top;//lin*11+1+top
+    uint8_t w=9;
+    if(oldColLin==1795)  //last item "Enter", col=7 lin=3
+      w=33; //(5+1)*6-1+2+2  charWidth=5, charMargin=1, count("Enter")=6, lastItem_MarginRight=0, marginLeft==marginRight=2
+    Robot.drawRect(x,y,w,9,hideColor);
+
+
+    x=(colLin>>8 & 0xFF)*11+10;
+    y=(colLin & 0xFF)*11+1+top;
+    w=9;
+    if(colLin==1795)  //last item "Enter", col=7 lin=3
+      w=33; //(5+1)*6-1+2+2  charWidth=5, charMargin=1, count("Enter")=6, lastItem_MarginRight=0, marginLeft==marginRight=2
+    Robot.drawRect(x,y,w,9,showColor);
+    oldColLin=colLin;
+  }
+}
+
+char VirtualKeyboard::getSelection(){
+  if(!onOff)return -1;
+
+  uint8_t val=map(Robot.knobRead(),0,1023,0,38);
+  if(0<=val && 9>=val)
+    val='0'+val;	
+  else if(10<=val && 35>=val)
+    val='A'+val-10;	
+  else if(val==36)
+    val=' ';
+  else if(val>=37)
+    val='\0';
+  
+  return val;
+}
+void VirtualKeyboard::hide(){
+	onOff=false;
+	Robot.fillRect(0,top,128,44,hideColor);//11*4
+}
+
+void VirtualKeyboard::display(uint8_t top, uint16_t showColor, uint16_t hideColor){
+/** Display the keyboard at y position of top
+*	formular:
+*	When text size is 1, one character is 5*7
+*	margin-left==margin-right==3,
+*	margin-top==margin-bottom==2,
+*	keyWidth=5+3+3==11,
+*	keyHeight=7+2+2==11,
+*	keyboard-margin-left=keyboard-margin-right==9
+*	so character-x=11*col+9+3=11*col+12
+*	character-y=11*lin+2+top
+*	
+**/
+  this->top=top;
+  this->onOff=true;
+  
+  this->showColor=showColor;
+  this->hideColor=hideColor;
+  
+  for(uint8_t i=0;i<36;i++){
+	Robot.setCursor(i%10*11+12,2+top+i/10*11);
+	if(i<10)
+		Robot.print(char('0'+i));
+	else
+		Robot.print(char(55+i));//'A'-10=55
+  }//for saving 58 bytes :(
+  
+  /*for(int i=0;i<10;i++){
+    Robot.setCursor(i*11+12,2+top);//11*0+2+top
+    Robot.print(char('0'+i));//line_1: 0-9
+  }
+  for(int i=0;i<10;i++){
+    Robot.setCursor(i*11+12,13+top);//11*1+2+top
+    Robot.print(char('A'+i));//line_2: A-J
+  }
+  for(int i=0;i<10;i++){
+    Robot.setCursor(i*11+12,24+top);//11*2+2+top
+    Robot.print(char('K'+i));//line_3: K-T
+  }
+  for(int i=0;i<6;i++){
+    Robot.setCursor(i*11+12,35+top);//11*3+2+top
+    Robot.print(char('U'+i));//line_4: U-Z
+  }*/
+  //space and enter at the end of the last line.
+  Robot.setCursor(78,35+top);//6*11+12=78
+  Robot.print('_');//_
+  
+  Robot.setCursor(89,35+top);//7*11+12=89
+  Robot.print("Enter");//enter
+}
+
+
+
+VirtualKeyboard Vkey=VirtualKeyboard();
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/VirtualKeyboard.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/VirtualKeyboard.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/VirtualKeyboard.h	(revision 136)
@@ -0,0 +1,28 @@
+#ifndef VIRTUAL_KEYBOARD_H
+#define VIRTUAL_KEYBOARD_H
+
+#include <Arduino.h>
+#include <ArduinoRobot.h>
+
+class VirtualKeyboard{
+	public:
+		//void begin();
+		void display(uint8_t top, uint16_t showColor=BLACK, uint16_t hideColor=WHITE);
+		void hide();
+		
+		char getSelection();
+		void run();
+		
+	private:
+		uint8_t top;
+		bool onOff;
+		
+		uint16_t showColor;
+		uint16_t hideColor;
+		
+		int getColLin(int val);
+
+};
+
+extern VirtualKeyboard Vkey;
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/scripts_Hello_User.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/scripts_Hello_User.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Control/src/utility/scripts_Hello_User.h	(revision 136)
@@ -0,0 +1,51 @@
+#include <avr/pgmspace.h>
+
+//an advanced trick for storing strings inside the program space
+//as the ram of Arduino is very tiny, keeping too many string in it
+//can kill the program
+
+const char hello_user_script1[] PROGMEM="What's your name?";
+const char hello_user_script2[] PROGMEM="Give me a name!";
+const char hello_user_script3[] PROGMEM="And the country?";
+const char hello_user_script4[] PROGMEM="The city you're in?";
+const char hello_user_script5[] PROGMEM="  Plug me to\n\n  your computer\n\n  and start coding!";
+
+const char hello_user_script6[] PROGMEM="     Hello User!\n\n It's me, your robot\n\n    I'm alive! <3";
+const char hello_user_script7[] PROGMEM="  First I need some\n\n   input from you!";
+const char hello_user_script8[] PROGMEM="     Use the knob\n\n   to select letters";
+const char hello_user_script9[] PROGMEM="   Use L/R button\n\n to move the cursor,\n\n  middle to confirm";
+const char hello_user_script10[] PROGMEM="  Press middle key\n   to continue...";
+const char hello_user_script11[] PROGMEM="  Choose \"enter\" to\n\n  finish the input";
+
+const char * const scripts_Hello_User[] PROGMEM = {
+  hello_user_script1,
+  hello_user_script2,
+  hello_user_script3,
+  hello_user_script4,
+  hello_user_script5,
+  hello_user_script6,
+  hello_user_script7,
+  hello_user_script8,
+  hello_user_script9,
+  hello_user_script10,
+  hello_user_script11,
+};
+
+/*
+void getPGMtext(int seq){
+  //It takes a string from program space, and fill it  
+  //in the buffer
+  strcpy_P(buffer,(char*)pgm_read_word(&(scripts[seq])));
+}
+
+void writeScript(int seq, int line, int col){
+  //print a string from program space to a specific line,
+  //column on the LCD
+  
+  //first fill the buffer with text from program space
+  getPGMtext(seq);
+  //then print it to the screen
+  textManager.writeText(line,col,buffer);
+}
+
+*/
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Robot Motor Library for Arduino =
+
+The Robot has a number of built in sensors and actuators. The library is designed to easily access the robot's functionality.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/RobotLibrary
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/examples/Robot_IR_Array_Test/Robot_IR_Array_Test.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/examples/Robot_IR_Array_Test/Robot_IR_Array_Test.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/examples/Robot_IR_Array_Test/Robot_IR_Array_Test.ino	(revision 136)
@@ -0,0 +1,26 @@
+/* Motor Board IR Array Test
+
+   This example of the Arduno robot's motor board returns the
+   values read fron the 5 infrared sendors on the bottom of
+   the robot.
+
+*/
+// include the motor board header
+#include <ArduinoRobotMotorBoard.h>
+
+String bar; // string for storing the informaton
+
+void setup() {
+  // start serial communication
+  Serial.begin(9600);
+  // initialize the library
+  RobotMotor.begin();
+}
+void loop() {
+  bar = String(""); // empty the string
+  // read the sensors and add them to the string
+  bar = bar + RobotMotor.IRread(1) + ' ' + RobotMotor.IRread(2) + ' ' + RobotMotor.IRread(3) + ' ' + RobotMotor.IRread(4) + ' ' + RobotMotor.IRread(5);
+  // print out the values
+  Serial.println(bar);
+  delay(100);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/examples/Robot_Motor_Core/Robot_Motor_Core.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/examples/Robot_Motor_Core/Robot_Motor_Core.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/examples/Robot_Motor_Core/Robot_Motor_Core.ino	(revision 136)
@@ -0,0 +1,18 @@
+/* Motor Core
+
+  This code for the Arduino Robot's motor board
+  is the stock firmware. program the motor board with
+  this sketch whenever you want to return the motor
+  board to its default state.
+
+*/
+
+#include <ArduinoRobotMotorBoard.h>
+
+void setup() {
+  RobotMotor.begin();
+}
+void loop() {
+  RobotMotor.parseCommand();
+  RobotMotor.process();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Robot Motor
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Enables easy access to the motors of the Arduino Robot Motor board. For Arduino Robot only.
+paragraph=
+category=Device Control
+url=http://arduino.cc/en/Reference/RobotLibrary
+architectures=avr
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/ArduinoRobotMotorBoard.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/ArduinoRobotMotorBoard.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/ArduinoRobotMotorBoard.cpp	(revision 136)
@@ -0,0 +1,269 @@
+#include "ArduinoRobotMotorBoard.h"
+#include "EasyTransfer2.h"
+#include "Multiplexer.h"
+#include "LineFollow.h"
+
+RobotMotorBoard::RobotMotorBoard(){
+	//LineFollow::LineFollow();
+}
+/*void RobotMotorBoard::beginIRReceiver(){
+	IRrecv::enableIRIn();
+}*/
+void RobotMotorBoard::begin(){
+	//initialze communication
+	Serial1.begin(9600);
+	messageIn.begin(&Serial1);
+	messageOut.begin(&Serial1);
+
+	//init MUX
+	uint8_t MuxPins[]={MUXA,MUXB,MUXC};
+	this->IRs.begin(MuxPins,MUX_IN,3);
+	pinMode(MUXI,INPUT);
+	digitalWrite(MUXI,LOW);
+	
+	isPaused=false;
+}
+
+void RobotMotorBoard::process(){
+	if(isPaused)return;//skip process if the mode is paused
+	
+	if(mode==MODE_SIMPLE){
+		//Serial.println("s");
+		//do nothing? Simple mode is just about getting commands
+	}else if(mode==MODE_LINE_FOLLOW){
+		//do line following stuff here.
+		LineFollow::runLineFollow();
+	}else if(mode==MODE_ADJUST_MOTOR){
+		//Serial.println('a');
+		//motorAdjustment=analogRead(POT);
+		//setSpeed(255,255);
+		//delay(100);
+	}
+}
+void RobotMotorBoard::pauseMode(bool onOff){
+	if(onOff){
+		isPaused=true;
+	}else{
+		isPaused=false;
+	}
+	stopCurrentActions();
+
+}
+void RobotMotorBoard::parseCommand(){
+	uint8_t modeName;
+	uint8_t codename;
+	int value;
+	int speedL;
+	int speedR;
+	if(this->messageIn.receiveData()){
+		//Serial.println("data received");
+		uint8_t command=messageIn.readByte();
+		//Serial.println(command);
+		switch(command){
+			case COMMAND_SWITCH_MODE:
+				modeName=messageIn.readByte();
+				setMode(modeName);
+				break;
+			case COMMAND_RUN:
+				if(mode==MODE_LINE_FOLLOW)break;//in follow line mode, the motor does not follow commands
+				speedL=messageIn.readInt();
+				speedR=messageIn.readInt();
+				motorsWrite(speedL,speedR);
+				break;
+			case COMMAND_MOTORS_STOP:
+				motorsStop();
+				break;
+			case COMMAND_ANALOG_WRITE:
+				codename=messageIn.readByte();
+				value=messageIn.readInt();
+				_analogWrite(codename,value);
+				break;
+			case COMMAND_DIGITAL_WRITE:
+				codename=messageIn.readByte();
+				value=messageIn.readByte();
+				_digitalWrite(codename,value);
+				break;
+			case COMMAND_ANALOG_READ:
+				codename=messageIn.readByte();
+				_analogRead(codename);
+				break;
+			case COMMAND_DIGITAL_READ:
+				codename=messageIn.readByte();
+				_digitalRead(codename);
+				break;
+			case COMMAND_READ_IR:
+				_readIR();
+				break;
+			case COMMAND_READ_TRIM:
+				_readTrim();
+				break;
+			case COMMAND_PAUSE_MODE:
+				pauseMode(messageIn.readByte());//onOff state
+				break;
+			case COMMAND_LINE_FOLLOW_CONFIG:
+				LineFollow::config(
+					messageIn.readByte(),	//KP
+					messageIn.readByte(),	//KD
+					messageIn.readByte(),	//robotSpeed
+					messageIn.readByte()	//IntegrationTime
+				);
+				break;
+		}
+	}
+	//delay(5);
+}
+uint8_t RobotMotorBoard::parseCodename(uint8_t codename){
+	switch(codename){
+		case B_TK1:
+			return TK1;
+		case B_TK2:
+			return TK2;
+		case B_TK3:
+			return TK3;
+		case B_TK4:
+			return TK4;
+	}
+}
+uint8_t RobotMotorBoard::codenameToAPin(uint8_t codename){
+	switch(codename){
+		case B_TK1:
+			return A0;
+		case B_TK2:
+			return A1;
+		case B_TK3:
+			return A6;
+		case B_TK4:
+			return A11;
+	}
+}
+
+void RobotMotorBoard::setMode(uint8_t mode){
+	if(mode==MODE_LINE_FOLLOW){
+		LineFollow::calibIRs();
+	}
+	/*if(mode==SET_MOTOR_ADJUSTMENT){
+			save_motor_adjustment_to_EEPROM();
+		}
+	*/
+	/*if(mode==MODE_IR_CONTROL){
+		beginIRReceiver();
+	}*/
+	this->mode=mode;
+	//stopCurrentActions();//If line following, this should stop the motors
+}
+
+void RobotMotorBoard::stopCurrentActions(){
+	motorsStop();
+	//motorsWrite(0,0);
+}
+
+void RobotMotorBoard::motorsWrite(int speedL, int speedR){
+	/*Serial.print(speedL);
+	Serial.print(" ");
+	Serial.println(speedR);*/
+	//motor adjustment, using percentage
+	_refreshMotorAdjustment();
+	
+	if(motorAdjustment<0){
+		speedR*=(1+motorAdjustment);
+	}else{
+		speedL*=(1-motorAdjustment);
+	}
+	
+	if(speedR>0){
+		analogWrite(IN_A1,speedR);
+		analogWrite(IN_A2,0);
+	}else{
+		analogWrite(IN_A1,0);
+		analogWrite(IN_A2,-speedR);
+	}
+	
+	if(speedL>0){
+		analogWrite(IN_B1,speedL);
+		analogWrite(IN_B2,0);
+	}else{
+		analogWrite(IN_B1,0);
+		analogWrite(IN_B2,-speedL);
+	}
+}
+void RobotMotorBoard::motorsWritePct(int speedLpct, int speedRpct){
+	//speedLpct, speedRpct ranges from -100 to 100
+	motorsWrite(speedLpct*2.55,speedRpct*2.55);
+}
+void RobotMotorBoard::motorsStop(){
+	analogWrite(IN_A1,255);
+	analogWrite(IN_A2,255);
+
+	analogWrite(IN_B1,255);
+	analogWrite(IN_B2,255);
+}
+
+
+/*
+*
+*
+*	Input and Output ports
+*
+*
+*/
+void RobotMotorBoard::_digitalWrite(uint8_t codename,bool value){
+	uint8_t pin=parseCodename(codename);
+	digitalWrite(pin,value);
+}
+void RobotMotorBoard::_analogWrite(uint8_t codename,int value){
+	//There's no PWM available on motor board
+}
+void RobotMotorBoard::_digitalRead(uint8_t codename){
+	uint8_t pin=parseCodename(codename);
+	bool value=digitalRead(pin);
+	messageOut.writeByte(COMMAND_DIGITAL_READ_RE);
+	messageOut.writeByte(codename);
+	messageOut.writeByte(value);
+	messageOut.sendData();
+}
+void RobotMotorBoard::_analogRead(uint8_t codename){
+	uint8_t pin=codenameToAPin(codename);
+	int value=analogRead(pin);
+	messageOut.writeByte(COMMAND_ANALOG_READ_RE);
+	messageOut.writeByte(codename);
+	messageOut.writeInt(value);
+	messageOut.sendData();
+}
+int RobotMotorBoard::IRread(uint8_t num){
+	return _IRread(num-1); //To make consistant with the pins labeled on the board
+}
+
+int RobotMotorBoard::_IRread(uint8_t num){
+	IRs.selectPin(num); 
+	return IRs.getAnalogValue();
+}
+
+
+void RobotMotorBoard::_readIR(){
+	int value;
+	messageOut.writeByte(COMMAND_READ_IR_RE);
+	for(int i=0;i<5;i++){
+		value=_IRread(i);
+		messageOut.writeInt(value);
+	}
+	messageOut.sendData();
+}
+
+void RobotMotorBoard::_readTrim(){
+	int value=analogRead(TRIM);
+	messageOut.writeByte(COMMAND_READ_TRIM_RE);
+	messageOut.writeInt(value);
+	messageOut.sendData();	
+}
+
+void RobotMotorBoard::_refreshMotorAdjustment(){
+	motorAdjustment=map(analogRead(TRIM),0,1023,-30,30)/100.0;
+}
+
+void RobotMotorBoard::reportActionDone(){
+	setMode(MODE_SIMPLE);
+	messageOut.writeByte(COMMAND_ACTION_DONE);
+	messageOut.sendData();
+}
+
+RobotMotorBoard RobotMotor=RobotMotorBoard();
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/ArduinoRobotMotorBoard.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/ArduinoRobotMotorBoard.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/ArduinoRobotMotorBoard.h	(revision 136)
@@ -0,0 +1,126 @@
+#ifndef ArduinoRobot_h
+#define ArduinoRobot_h
+
+#include "EasyTransfer2.h"
+#include "Multiplexer.h"
+#include "LineFollow.h"
+//#include "IRremote.h"
+
+#if ARDUINO >= 100
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+
+//Command code
+#define COMMAND_SWITCH_MODE 0
+#define COMMAND_RUN	10
+#define COMMAND_MOTORS_STOP	11
+#define COMMAND_ANALOG_WRITE	20
+#define COMMAND_DIGITAL_WRITE	30
+#define COMMAND_ANALOG_READ	40
+#define COMMAND_ANALOG_READ_RE	41
+#define COMMAND_DIGITAL_READ	50
+#define COMMAND_DIGITAL_READ_RE	51
+#define COMMAND_READ_IR	60
+#define COMMAND_READ_IR_RE	61
+#define COMMAND_ACTION_DONE 70
+#define COMMAND_READ_TRIM 80
+#define COMMAND_READ_TRIM_RE 81
+#define COMMAND_PAUSE_MODE 90
+#define COMMAND_LINE_FOLLOW_CONFIG 100
+
+
+//component codename
+#define CN_LEFT_MOTOR	0
+#define CN_RIGHT_MOTOR	1
+#define CN_IR 2
+
+//motor board modes
+#define MODE_SIMPLE 0
+#define MODE_LINE_FOLLOW 1
+#define MODE_ADJUST_MOTOR 2
+#define MODE_IR_CONTROL 3
+
+//bottom TKs, just for communication purpose
+#define B_TK1 201
+#define B_TK2 202
+#define B_TK3 203
+#define B_TK4 204
+
+/*
+A message structure will be:
+switch mode (2):
+	byte COMMAND_SWITCH_MODE, byte mode
+run (5):
+	byte COMMAND_RUN, int speedL, int speedR
+analogWrite (3):
+	byte COMMAND_ANALOG_WRITE, byte codename, byte value;
+digitalWrite (3):
+	byte COMMAND_DIGITAL_WRITE, byte codename, byte value;
+analogRead (2):
+	byte COMMAND_ANALOG_READ, byte codename;
+analogRead _return_ (4):
+	byte COMMAND_ANALOG_READ_RE, byte codename, int value;
+digitalRead (2):
+	byte COMMAND_DIGITAL_READ, byte codename;
+digitalRead _return_ (4):
+	byte COMMAND_DIGITAL_READ_RE, byte codename, int value;
+read IR (1):
+	byte COMMAND_READ_IR;
+read IR _return_ (9):
+	byte COMMAND_READ_IR_RE, int valueA, int valueB, int valueC, int valueD;
+
+
+*/
+
+class RobotMotorBoard:public LineFollow{
+	public:
+		RobotMotorBoard();
+		void begin();
+		
+		void process();
+		
+		void parseCommand();
+		
+		int IRread(uint8_t num);
+		
+		void setMode(uint8_t mode);
+		void pauseMode(bool onOff);
+		
+		void motorsWrite(int speedL, int speedR);
+		void motorsWritePct(int speedLpct, int speedRpct);//write motor values in percentage
+		void motorsStop();		
+	private:
+		float motorAdjustment;//-1.0 ~ 1.0, whether left is lowered or right is lowered
+		
+		//convert codename to actual pins
+		uint8_t parseCodename(uint8_t codename);
+		uint8_t codenameToAPin(uint8_t codename);
+		
+		void stopCurrentActions();
+		//void sendCommand(byte command,byte codename,int value);
+		
+		void _analogWrite(uint8_t codename, int value);
+		void _digitalWrite(uint8_t codename, bool value);
+		void _analogRead(uint8_t codename);
+		void _digitalRead(uint8_t codename);
+		int _IRread(uint8_t num);
+		void _readIR();
+		void _readTrim();
+		
+		void _refreshMotorAdjustment();
+		
+		Multiplexer IRs;
+		uint8_t mode;
+		uint8_t isPaused;
+		EasyTransfer2 messageIn;
+		EasyTransfer2 messageOut;
+		
+		//Line Following 
+		void reportActionDone();
+};
+
+extern RobotMotorBoard RobotMotor;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/EasyTransfer2.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/EasyTransfer2.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/EasyTransfer2.cpp	(revision 136)
@@ -0,0 +1,152 @@
+#include "EasyTransfer2.h"
+
+
+
+
+//Captures address and size of struct
+void EasyTransfer2::begin(HardwareSerial *theSerial){
+	_serial = theSerial;
+	
+	//dynamic creation of rx parsing buffer in RAM
+	//rx_buffer = (uint8_t*) malloc(size);
+	
+	resetData();
+}
+
+void EasyTransfer2::writeByte(uint8_t dat){
+	if(position<20)
+		data[position++]=dat;
+		size++;
+}
+void EasyTransfer2::writeInt(int dat){
+	if(position<19){
+		data[position++]=dat>>8;
+		data[position++]=dat;
+		size+=2;
+	}
+}
+uint8_t EasyTransfer2::readByte(){
+	if(position>=size)return 0;
+	return data[position++];
+}
+int EasyTransfer2::readInt(){
+	if(position+1>=size)return 0;
+	int dat_1=data[position++]<<8;
+	int dat_2=data[position++];
+	int dat= dat_1 | dat_2;
+	return dat;
+}
+
+void EasyTransfer2::resetData(){
+	for(int i=0;i<20;i++){
+		data[i]=0;
+	}
+	size=0;
+	position=0;
+}
+
+//Sends out struct in binary, with header, length info and checksum
+void EasyTransfer2::sendData(){
+  uint8_t CS = size;
+  _serial->write(0x06);
+  _serial->write(0x85);
+  _serial->write(size);
+  for(int i = 0; i<size; i++){
+    CS^=*(data+i);
+    _serial->write(*(data+i));
+	//Serial.print(*(data+i));
+	//Serial.print(",");
+  }
+  //Serial.println("");
+  _serial->write(CS);
+  
+  resetData();
+}
+
+boolean EasyTransfer2::receiveData(){
+  
+  //start off by looking for the header bytes. If they were already found in a previous call, skip it.
+  if(rx_len == 0){
+  //this size check may be redundant due to the size check below, but for now I'll leave it the way it is.
+    if(_serial->available() >= 3){
+	//this will block until a 0x06 is found or buffer size becomes less then 3.
+      while(_serial->read() != 0x06) {
+		//This will trash any preamble junk in the serial buffer
+		//but we need to make sure there is enough in the buffer to process while we trash the rest
+		//if the buffer becomes too empty, we will escape and try again on the next call
+		if(_serial->available() < 3)
+			return false;
+		}
+		//Serial.println("head");
+      if (_serial->read() == 0x85){
+        rx_len = _serial->read();
+		//Serial.print("rx_len:");
+		//Serial.println(rx_len);
+		resetData();
+
+		//make sure the binary structs on both Arduinos are the same size.
+        /*if(rx_len != size){
+          rx_len = 0;
+          return false;
+        }*/
+      }
+    }
+	//Serial.println("nothing");
+  }
+  
+  //we get here if we already found the header bytes, the struct size matched what we know, and now we are byte aligned.
+  if(rx_len != 0){
+	
+    while(_serial->available() && rx_array_inx <= rx_len){
+      data[rx_array_inx++] = _serial->read();
+    }
+    
+    if(rx_len == (rx_array_inx-1)){
+      //seem to have got whole message
+      //last uint8_t is CS
+      calc_CS = rx_len;
+	  //Serial.print("len:");
+	  //Serial.println(rx_len);
+      for (int i = 0; i<rx_len; i++){
+        calc_CS^=data[i];
+		//Serial.print("m");
+		//Serial.print(data[i]);
+		//Serial.print(",");
+      } 
+	  //Serial.println();
+      //Serial.print(data[rx_array_inx-1]);
+	  //Serial.print(" ");
+	  //Serial.println(calc_CS);
+	  
+      if(calc_CS == data[rx_array_inx-1]){//CS good
+		//resetData();
+        //memcpy(data,d,rx_len);
+		for(int i=0;i<20;i++){
+			//Serial.print(data[i]);
+			//Serial.print(",");
+		}
+		//Serial.println("");
+		size=rx_len;
+		rx_len = 0;
+		rx_array_inx = 0;
+		return true;
+		}
+		
+	  else{
+  		//Serial.println("CS");
+		resetData();
+	  //failed checksum, need to clear this out anyway
+		rx_len = 0;
+		rx_array_inx = 0;
+		return false;
+	  }
+        
+    }
+  }
+  //Serial.print(rx_len);
+  //Serial.print(" ");
+  //Serial.print(rx_array_inx);
+  //Serial.print(" ");
+  //Serial.println("Short");
+  return false;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/EasyTransfer2.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/EasyTransfer2.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/EasyTransfer2.h	(revision 136)
@@ -0,0 +1,76 @@
+/******************************************************************
+*  EasyTransfer Arduino Library 
+*		details and example sketch: 
+*			http://www.billporter.info/easytransfer-arduino-library/
+*
+*		Brought to you by:
+*              Bill Porter
+*              www.billporter.info
+*
+*		See Readme for other info and version history
+*	
+*  
+*This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or(at your option) any later version.
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+<http://www.gnu.org/licenses/>
+*
+*This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 Unported License. 
+*To view a copy of this license, visit http://creativecommons.org/licenses/by-sa/3.0/ or
+*send a letter to Creative Commons, 444 Castro Street, Suite 900, Mountain View, California, 94041, USA.
+******************************************************************/
+#ifndef EasyTransfer2_h
+#define EasyTransfer2_h
+
+
+//make it a little prettier on the front end. 
+#define details(name) (byte*)&name,sizeof(name)
+
+//Not neccessary, but just in case. 
+#if ARDUINO > 22
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+#include "HardwareSerial.h"
+//#include <NewSoftSerial.h>
+#include <math.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <avr/io.h>
+
+class EasyTransfer2 {
+public:
+void begin(HardwareSerial *theSerial);
+//void begin(uint8_t *, uint8_t, NewSoftSerial *theSerial);
+void sendData();
+boolean receiveData();
+
+void writeByte(uint8_t dat);
+void writeInt(int dat);
+uint8_t readByte();
+int readInt();
+
+
+private:
+HardwareSerial *_serial;
+
+void resetData();
+
+uint8_t data[20];	//data storage, for both read and send
+uint8_t position;
+uint8_t size; //size of data in bytes. Both for read and send
+//uint8_t * address;  //address of struct
+//uint8_t size;       //size of struct
+//uint8_t * rx_buffer; //address for temporary storage and parsing buffer
+//uint8_t rx_buffer[20];
+uint8_t rx_array_inx;  //index for RX parsing buffer
+uint8_t rx_len;		//RX packet length according to the packet
+uint8_t calc_CS;	   //calculated Chacksum
+};
+
+
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/LineFollow.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/LineFollow.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/LineFollow.h	(revision 136)
@@ -0,0 +1,40 @@
+#ifndef LINE_FOLLOW_H
+#define LINE_FOLLOW_H
+
+#if ARDUINO >= 100
+	#include "Arduino.h"
+#else
+	#include "WProgram.h"
+#endif
+
+class LineFollow{
+	public:
+		LineFollow();
+
+		void calibIRs();
+		void runLineFollow();
+		void config(uint8_t KP, uint8_t KD, uint8_t robotSpeed, uint8_t intergrationTime);
+		
+		//These are all pure virtual functions, pure VF needs pure specifier "=0"
+		//virtual void motorsWrite(int speedL, int speedR)=0;
+		virtual void motorsWritePct(int speedLpct, int speedRpct)=0;
+		virtual void motorsStop()=0;
+		virtual int _IRread(uint8_t num)=0;
+	protected:
+		virtual	void reportActionDone()=0;
+		
+	private:
+		void doCalibration(int speedPct, int time);
+		void ajusta_niveles();
+		
+		uint8_t KP;
+		uint8_t KD;
+		uint8_t robotSpeed; //percentage
+		uint8_t intergrationTime;
+		
+		int lectura_sensor[5], last_error, acu;
+		int sensor_blanco[5];
+		int sensor_negro[5];
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/Multiplexer.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/Multiplexer.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/Multiplexer.cpp	(revision 136)
@@ -0,0 +1,37 @@
+#include "Multiplexer.h"
+
+void Multiplexer::begin(uint8_t* selectors, uint8_t Z, uint8_t length){
+	for(uint8_t i=0;i<length;i++){
+		this->selectors[i]=selectors[i];
+		pinMode(selectors[i],OUTPUT);
+	}
+	this->length=length;
+	this->pin_Z=Z;
+	pinMode(pin_Z,INPUT);
+}
+
+void Multiplexer::selectPin(uint8_t num){
+	for(uint8_t i=0;i<length;i++){
+		//Serial.print(bitRead(num,i));
+		digitalWrite(selectors[i],bitRead(num,i));
+	}
+	//Serial.println("");
+}
+
+int Multiplexer::getAnalogValue(){
+	return analogRead(pin_Z);
+}
+
+bool Multiplexer::getDigitalValue(){
+	return digitalRead(pin_Z);
+}
+
+int Multiplexer::getAnalogValueAt(uint8_t num){
+	selectPin(num);
+	return getAnalogValue();
+}
+
+bool Multiplexer::getDigitalValueAt(uint8_t num){
+	selectPin(num);
+	return getDigitalValue();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/Multiplexer.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/Multiplexer.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/Multiplexer.h	(revision 136)
@@ -0,0 +1,24 @@
+#ifndef Multiplexer_h
+#define Multiplexer_h
+
+#if ARDUINO >= 100
+#include "Arduino.h"
+#else
+#include "WProgram.h"
+#endif
+
+class Multiplexer{
+	public:
+		void begin(uint8_t* selectors, uint8_t Z, uint8_t length);
+		void selectPin(uint8_t num);
+		int getAnalogValue();
+		int getAnalogValueAt(uint8_t num);
+		bool getDigitalValue();
+		bool getDigitalValueAt(uint8_t num);
+	private:
+		uint8_t selectors[4];
+		uint8_t pin_Z;
+		uint8_t length;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/lineFollow.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/lineFollow.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Robot_Motor/src/lineFollow.cpp	(revision 136)
@@ -0,0 +1,152 @@
+//#include <ArduinoRobotMotorBoard.h>
+#include "LineFollow.h"
+
+//#define KP 19 //0.1 units
+//#define KD 14
+//#define ROBOT_SPEED 100 //percentage
+
+//#define KP 11
+//#define KD 5
+//#define ROBOT_SPEED 50
+
+//#define INTEGRATION_TIME 10 //En ms
+
+/*uint8_t KP=11;
+uint8_t KD=5;
+uint8_t robotSpeed=50; //percentage
+uint8_t intergrationTime=10;*/
+
+#define NIVEL_PARA_LINEA 50 
+
+/*int lectura_sensor[5], last_error=0, acu=0;
+
+//Estos son los arrays que hay que rellenar con los valores de los sensores
+//de suelo sobre blanco y negro. 
+int sensor_blanco[]={
+  0,0,0,0,0};
+int sensor_negro[]={
+  1023,1023,1023,1023,1023};
+*/
+//unsigned long time;
+
+//void mueve_robot(int vel_izq, int vel_der);
+//void para_robot();
+//void doCalibration(int speedPct, int time);
+//void ajusta_niveles();	//calibrate values
+
+LineFollow::LineFollow(){
+	/*KP=11;
+	KD=5;
+	robotSpeed=50; //percentage
+	intergrationTime=10;*/
+	config(11,5,50,10);
+		
+	for(int i=0;i<5;i++){
+		sensor_blanco[i]=0;
+		sensor_negro[i]=1023;
+	}
+}
+
+void LineFollow::config(uint8_t KP, uint8_t KD, uint8_t robotSpeed, uint8_t intergrationTime){
+	this->KP=KP;
+	this->KD=KD;
+	this->robotSpeed=robotSpeed;
+	this->intergrationTime=intergrationTime;
+	/*Serial.print("LFC: ");
+	Serial.print(KP);
+	Serial.print(' ');
+	Serial.print(KD);
+	Serial.print(' ');
+	Serial.print(robotSpeed);
+	Serial.print(' ');
+	Serial.println(intergrationTime);*/
+	
+}
+void LineFollow::calibIRs(){
+	static bool isInited=false;//So only init once
+	if(isInited)return ;
+	
+	delay(1000);
+	
+	doCalibration(30,500);
+	doCalibration(-30,800);
+	doCalibration(30,500);
+	
+	delay(1000);
+	isInited=true;
+}
+
+void LineFollow::runLineFollow(){
+  for(int count=0; count<5; count++)
+  {
+    lectura_sensor[count]=map(_IRread(count),sensor_negro[count],sensor_blanco[count],0,127);
+    acu+=lectura_sensor[count];
+  }
+
+  //Serial.println(millis());
+  if (acu > NIVEL_PARA_LINEA)
+  {
+    acu/=5;
+
+    int error = ((lectura_sensor[0]<<6)+(lectura_sensor[1]<<5)-(lectura_sensor[3]<<5)-(lectura_sensor[4]<<6))/acu;
+
+    error = constrain(error,-100,100);
+
+    //Calculamos la correcion de velocidad mediante un filtro PD
+    int vel = (error * KP)/10 + (error-last_error)*KD;
+
+    last_error = error;
+
+    //Corregimos la velocidad de avance con el error de salida del filtro PD
+    int motor_left = constrain((robotSpeed + vel),-100,100);
+    int motor_right =constrain((robotSpeed - vel),-100,100);
+
+    //Movemos el robot
+    //motorsWritePct(motor_left,motor_right);
+    motorsWritePct(motor_left,motor_right);
+
+    //Esperamos un poquito a que el robot reaccione
+    delay(intergrationTime);
+  }
+  else
+  {
+    //Hemos encontrado una linea negra
+    //perpendicular a nuestro camino
+    //paramos el robot
+    motorsStop();
+
+    //y detenemos la ejecución del programa
+    //while(true);
+	reportActionDone();
+	//setMode(MODE_SIMPLE);
+  }
+}  
+
+
+void LineFollow::doCalibration(int speedPct, int time){
+	motorsWritePct(speedPct, -speedPct);
+	unsigned long beginTime = millis();
+	while((millis()-beginTime)<time)
+		ajusta_niveles();
+	motorsStop();
+}
+void LineFollow::ajusta_niveles()
+{
+	int lectura=0;
+
+	for(int count=0; count<5; count++){
+		lectura=_IRread(count);
+
+		if (lectura > sensor_blanco[count])
+			sensor_blanco[count]=lectura;
+
+		if (lectura < sensor_negro[count])
+			sensor_negro[count]=lectura;
+	} 
+}
+
+
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= SD Library for Arduino =
+
+The SD library allows for reading from and writing to SD cards.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/SD
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/examples/CardInfo/CardInfo.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/examples/CardInfo/CardInfo.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/examples/CardInfo/CardInfo.ino	(revision 136)
@@ -0,0 +1,117 @@
+/*
+  SD card test
+
+ This example shows how use the utility libraries on which the'
+ SD library is based in order to get info about your SD card.
+ Very useful for testing a card when you're not sure whether its working or not.
+
+ The circuit:
+  * SD card attached to SPI bus as follows:
+ ** MOSI - pin 11 on Arduino Uno/Duemilanove/Diecimila
+ ** MISO - pin 12 on Arduino Uno/Duemilanove/Diecimila
+ ** CLK - pin 13 on Arduino Uno/Duemilanove/Diecimila
+ ** CS - depends on your SD card shield or module.
+ 		Pin 4 used here for consistency with other Arduino examples
+
+
+ created  28 Mar 2011
+ by Limor Fried
+ modified 9 Apr 2012
+ by Tom Igoe
+ */
+// include the SD library:
+#include <SPI.h>
+#include <SD.h>
+
+// set up variables using the SD utility library functions:
+Sd2Card card;
+SdVolume volume;
+SdFile root;
+
+// change this to match your SD shield or module;
+// Arduino Ethernet shield: pin 4
+// Adafruit SD shields and modules: pin 10
+// Sparkfun SD shield: pin 8
+const int chipSelect = 4;
+
+void setup()
+{
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  Serial.print("\nInitializing SD card...");
+  // On the Ethernet Shield, CS is pin 4. It's set as an output by default.
+  // Note that even if it's not used as the CS pin, the hardware SS pin
+  // (10 on most Arduino boards, 53 on the Mega, 14 on Leonardo) must be left as an output
+  // or the SD library functions will not work.
+
+
+  // we'll use the initialization code from the utility libraries
+  // since we're just testing if the card is working!
+  if (!card.init(SPI_HALF_SPEED, chipSelect)) {
+    Serial.println("initialization failed. Things to check:");
+    Serial.println("* is a card is inserted?");
+    Serial.println("* Is your wiring correct?");
+    Serial.println("* did you change the chipSelect pin to match your shield or module?");
+    return;
+  } else {
+    Serial.println("Wiring is correct and a card is present.");
+  }
+
+  // print the type of card
+  Serial.print("\nCard type: ");
+  switch (card.type()) {
+    case SD_CARD_TYPE_SD1:
+      Serial.println("SD1");
+      break;
+    case SD_CARD_TYPE_SD2:
+      Serial.println("SD2");
+      break;
+    case SD_CARD_TYPE_SDHC:
+      Serial.println("SDHC");
+      break;
+    default:
+      Serial.println("Unknown");
+  }
+
+  // Now we will try to open the 'volume'/'partition' - it should be FAT16 or FAT32
+  if (!volume.init(card)) {
+    Serial.println("Could not find FAT16/FAT32 partition.\nMake sure you've formatted the card");
+    return;
+  }
+
+
+  // print the type and size of the first FAT-type volume
+  uint32_t volumesize;
+  Serial.print("\nVolume type is FAT");
+  Serial.println(volume.fatType(), DEC);
+  Serial.println();
+
+  volumesize = volume.blocksPerCluster();    // clusters are collections of blocks
+  volumesize *= volume.clusterCount();       // we'll have a lot of clusters
+  volumesize *= 512;                            // SD card blocks are always 512 bytes
+  Serial.print("Volume size (bytes): ");
+  Serial.println(volumesize);
+  Serial.print("Volume size (Kbytes): ");
+  volumesize /= 1024;
+  Serial.println(volumesize);
+  Serial.print("Volume size (Mbytes): ");
+  volumesize /= 1024;
+  Serial.println(volumesize);
+
+
+  Serial.println("\nFiles found on the card (name, date and size in bytes): ");
+  root.openRoot(volume);
+
+  // list all files in the card with date and size
+  root.ls(LS_R | LS_DATE | LS_SIZE);
+}
+
+
+void loop(void) {
+
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/examples/Datalogger/Datalogger.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/examples/Datalogger/Datalogger.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/examples/Datalogger/Datalogger.ino	(revision 136)
@@ -0,0 +1,93 @@
+/*
+  SD card datalogger
+
+ This example shows how to log data from three analog sensors
+ to an SD card using the SD library.
+
+ The circuit:
+ * analog sensors on analog ins 0, 1, and 2
+ * SD card attached to SPI bus as follows:
+ ** MOSI - pin 11
+ ** MISO - pin 12
+ ** CLK - pin 13
+ ** CS - pin 4
+
+ created  24 Nov 2010
+ modified 9 Apr 2012
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ */
+
+#include <SPI.h>
+#include <SD.h>
+
+// On the Ethernet Shield, CS is pin 4. Note that even if it's not
+// used as the CS pin, the hardware CS pin (10 on most Arduino boards,
+// 53 on the Mega) must be left as an output or the SD library
+// functions will not work.
+const int chipSelect = 4;
+
+void setup()
+{
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  Serial.print("Initializing SD card...");
+  // make sure that the default chip select pin is set to
+  // output, even if you don't use it:
+  // pinMode(10, OUTPUT);
+
+  // see if the card is present and can be initialized:
+  if (!SD.begin(chipSelect)) {
+    Serial.println("Card failed, or not present");
+    // don't do anything more:
+    return;
+  }
+  Serial.println("card initialized.");
+}
+
+void loop()
+{
+  // make a string for assembling the data to log:
+  String dataString = "";
+
+  // read three sensors and append to the string:
+  for (int analogPin = 0; analogPin < 3; analogPin++) {
+    int sensor = analogRead(analogPin);
+    dataString += String(sensor);
+    if (analogPin < 2) {
+      dataString += ",";
+    }
+  }
+
+  // open the file. note that only one file can be open at a time,
+  // so you have to close this one before opening another.
+  File dataFile = SD.open("datalog.txt", FILE_WRITE);
+
+  // if the file is available, write to it:
+  if (dataFile) {
+    dataFile.println(dataString);
+    dataFile.close();
+    // print to the serial port too:
+    Serial.println(dataString);
+  }
+  // if the file isn't open, pop up an error:
+  else {
+    Serial.println("error opening datalog.txt");
+  }
+}
+
+
+
+
+
+
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/examples/DumpFile/DumpFile.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/examples/DumpFile/DumpFile.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/examples/DumpFile/DumpFile.ino	(revision 136)
@@ -0,0 +1,74 @@
+/*
+  SD card file dump
+
+ This example shows how to read a file from the SD card using the
+ SD library and send it over the serial port.
+
+ The circuit:
+ * SD card attached to SPI bus as follows:
+ ** MOSI - pin 11
+ ** MISO - pin 12
+ ** CLK - pin 13
+ ** CS - pin 4
+
+ created  22 December 2010
+ by Limor Fried
+ modified 9 Apr 2012
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ */
+
+#include <SPI.h>
+#include <SD.h>
+
+// On the Ethernet Shield, CS is pin 4. Note that even if it's not
+// used as the CS pin, the hardware CS pin (10 on most Arduino boards,
+// 53 on the Mega) must be left as an output or the SD library
+// functions will not work.
+const int chipSelect = 4;
+
+void setup()
+{
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  Serial.print("Initializing SD card...");
+  // make sure that the default chip select pin is set to
+  // output, even if you don't use it:
+  // pinMode(10, OUTPUT);
+
+  // see if the card is present and can be initialized:
+  if (!SD.begin(chipSelect)) {
+    Serial.println("Card failed, or not present");
+    // don't do anything more:
+    return;
+  }
+  Serial.println("card initialized.");
+
+  // open the file. note that only one file can be open at a time,
+  // so you have to close this one before opening another.
+  File dataFile = SD.open("datalog.txt");
+
+  // if the file is available, write to it:
+  if (dataFile) {
+    while (dataFile.available()) {
+      Serial.write(dataFile.read());
+    }
+    dataFile.close();
+  }
+  // if the file isn't open, pop up an error:
+  else {
+    Serial.println("error opening datalog.txt");
+  }
+}
+
+void loop()
+{
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/examples/Files/Files.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/examples/Files/Files.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/examples/Files/Files.ino	(revision 136)
@@ -0,0 +1,84 @@
+/*
+  SD card basic file example
+
+ This example shows how to create and destroy an SD card file
+ The circuit:
+ * SD card attached to SPI bus as follows:
+ ** MOSI - pin 11
+ ** MISO - pin 12
+ ** CLK - pin 13
+ ** CS - pin 4
+
+ created   Nov 2010
+ by David A. Mellis
+ modified 9 Apr 2012
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ */
+#include <SPI.h>
+#include <SD.h>
+
+File myFile;
+
+void setup()
+{
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  Serial.print("Initializing SD card...");
+  // On the Ethernet Shield, CS is pin 4. It's set as an output by default.
+  // Note that even if it's not used as the CS pin, the hardware SS pin
+  // (10 on most Arduino boards, 53 on the Mega, 14 on the Leonardo) must be left as an output
+  // or the SD library functions will not work.
+
+  if (!SD.begin(4)) {
+    Serial.println("initialization failed!");
+    return;
+  }
+  Serial.println("initialization done.");
+
+  if (SD.exists("example.txt")) {
+    Serial.println("example.txt exists.");
+  }
+  else {
+    Serial.println("example.txt doesn't exist.");
+  }
+
+  // open a new file and immediately close it:
+  Serial.println("Creating example.txt...");
+  myFile = SD.open("example.txt", FILE_WRITE);
+  myFile.close();
+
+  // Check to see if the file exists:
+  if (SD.exists("example.txt")) {
+    Serial.println("example.txt exists.");
+  }
+  else {
+    Serial.println("example.txt doesn't exist.");
+  }
+
+  // delete the file:
+  Serial.println("Removing example.txt...");
+  SD.remove("example.txt");
+
+  if (SD.exists("example.txt")) {
+    Serial.println("example.txt exists.");
+  }
+  else {
+    Serial.println("example.txt doesn't exist.");
+  }
+}
+
+void loop()
+{
+  // nothing happens after setup finishes.
+}
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/examples/ReadWrite/ReadWrite.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/examples/ReadWrite/ReadWrite.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/examples/ReadWrite/ReadWrite.ino	(revision 136)
@@ -0,0 +1,85 @@
+/*
+  SD card read/write
+
+ This example shows how to read and write data to and from an SD card file
+ The circuit:
+ * SD card attached to SPI bus as follows:
+ ** MOSI - pin 11
+ ** MISO - pin 12
+ ** CLK - pin 13
+ ** CS - pin 4
+
+ created   Nov 2010
+ by David A. Mellis
+ modified 9 Apr 2012
+ by Tom Igoe
+
+ This example code is in the public domain.
+
+ */
+
+#include <SPI.h>
+#include <SD.h>
+
+File myFile;
+
+void setup()
+{
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+
+  Serial.print("Initializing SD card...");
+  // On the Ethernet Shield, CS is pin 4. It's set as an output by default.
+  // Note that even if it's not used as the CS pin, the hardware SS pin
+  // (10 on most Arduino boards, 53 on the Mega, 14 on the Leonardo) must be left as an output
+  // or the SD library functions will not work.
+
+  if (!SD.begin(4)) {
+    Serial.println("initialization failed!");
+    return;
+  }
+  Serial.println("initialization done.");
+
+  // open the file. note that only one file can be open at a time,
+  // so you have to close this one before opening another.
+  myFile = SD.open("test.txt", FILE_WRITE);
+
+  // if the file opened okay, write to it:
+  if (myFile) {
+    Serial.print("Writing to test.txt...");
+    myFile.println("testing 1, 2, 3.");
+    // close the file:
+    myFile.close();
+    Serial.println("done.");
+  } else {
+    // if the file didn't open, print an error:
+    Serial.println("error opening test.txt");
+  }
+
+  // re-open the file for reading:
+  myFile = SD.open("test.txt");
+  if (myFile) {
+    Serial.println("test.txt:");
+
+    // read from the file until there's nothing else in it:
+    while (myFile.available()) {
+      Serial.write(myFile.read());
+    }
+    // close the file:
+    myFile.close();
+  } else {
+    // if the file didn't open, print an error:
+    Serial.println("error opening test.txt");
+  }
+}
+
+void loop()
+{
+  // nothing happens after setup
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/examples/listfiles/listfiles.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/examples/listfiles/listfiles.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/examples/listfiles/listfiles.ino	(revision 136)
@@ -0,0 +1,86 @@
+/*
+  Listfiles
+ 
+ This example shows how print out the files in a 
+ directory on a SD card 
+ 	
+ The circuit:
+ * SD card attached to SPI bus as follows:
+ ** MOSI - pin 11
+ ** MISO - pin 12
+ ** CLK - pin 13
+ ** CS - pin 4
+
+ created   Nov 2010
+ by David A. Mellis
+ modified 9 Apr 2012
+ by Tom Igoe
+ modified 2 Feb 2014
+ by Scott Fitzgerald
+ 
+ This example code is in the public domain.
+
+ */
+#include <SPI.h>
+#include <SD.h>
+
+File root;
+
+void setup()
+{
+  // Open serial communications and wait for port to open:
+  Serial.begin(9600);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for Leonardo only
+  }
+
+  Serial.print("Initializing SD card...");
+  // On the Ethernet Shield, CS is pin 4. It's set as an output by default.
+  // Note that even if it's not used as the CS pin, the hardware SS pin
+  // (10 on most Arduino boards, 53 on the Mega, 14 on the Leonardo) must be left as an output
+  // or the SD library functions will not work.
+
+  if (!SD.begin(4)) {
+    Serial.println("initialization failed!");
+    return;
+  }
+  Serial.println("initialization done.");
+
+  root = SD.open("/");
+
+  printDirectory(root, 0);
+
+  Serial.println("done!");
+}
+
+void loop()
+{
+  // nothing happens after setup finishes.
+}
+
+void printDirectory(File dir, int numTabs) {
+   while(true) {
+     
+     File entry =  dir.openNextFile();
+     if (! entry) {
+       // no more files
+       break;
+     }
+     for (uint8_t i=0; i<numTabs; i++) {
+       Serial.print('\t');
+     }
+     Serial.print(entry.name());
+     if (entry.isDirectory()) {
+       Serial.println("/");
+       printDirectory(entry, numTabs+1);
+     } else {
+       // files have sizes, directories do not
+       Serial.print("\t\t");
+       Serial.println(entry.size(), DEC);
+     }
+     entry.close();
+   }
+}
+
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/keywords.txt	(revision 136)
@@ -0,0 +1,30 @@
+#######################################
+# Syntax Coloring Map SD
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+SD	KEYWORD1
+File	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+begin	KEYWORD2
+exists	KEYWORD2
+mkdir	KEYWORD2
+remove	KEYWORD2
+rmdir	KEYWORD2
+open	KEYWORD2
+close	KEYWORD2
+seek	KEYWORD2
+position	KEYWORD2
+size	KEYWORD2	
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+FILE_READ	LITERAL1
+FILE_WRITE	LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=SD
+version=1.0
+author=Arduino, SparkFun
+maintainer=Arduino <info@arduino.cc>
+sentence=Enables reading and writing on SD cards. For all Arduino boards.
+paragraph=Once an SD memory card is connected to the SPI interfare of the Arduino board you are enabled to create files and read/write on them. You can also move through directories on the SD card.
+category=Data Storage
+url=http://arduino.cc/en/Reference/SD
+architectures=*
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/File.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/File.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/File.cpp	(revision 136)
@@ -0,0 +1,146 @@
+/*
+
+ SD - a slightly more friendly wrapper for sdfatlib
+
+ This library aims to expose a subset of SD card functionality
+ in the form of a higher level "wrapper" object.
+
+ License: GNU General Public License V3
+          (Because sdfatlib is licensed with this.)
+
+ (C) Copyright 2010 SparkFun Electronics
+
+ */
+
+#include <SD.h>
+
+/* for debugging file open/close leaks
+   uint8_t nfilecount=0;
+*/
+
+File::File(SdFile f, const char *n) {
+  // oh man you are kidding me, new() doesnt exist? Ok we do it by hand!
+  _file = (SdFile *)malloc(sizeof(SdFile)); 
+  if (_file) {
+    memcpy(_file, &f, sizeof(SdFile));
+    
+    strncpy(_name, n, 12);
+    _name[12] = 0;
+    
+    /* for debugging file open/close leaks
+       nfilecount++;
+       Serial.print("Created \"");
+       Serial.print(n);
+       Serial.print("\": ");
+       Serial.println(nfilecount, DEC);
+    */
+  }
+}
+
+File::File(void) {
+  _file = 0;
+  _name[0] = 0;
+  //Serial.print("Created empty file object");
+}
+
+// returns a pointer to the file name
+char *File::name(void) {
+  return _name;
+}
+
+// a directory is a special type of file
+boolean File::isDirectory(void) {
+  return (_file && _file->isDir());
+}
+
+
+size_t File::write(uint8_t val) {
+  return write(&val, 1);
+}
+
+size_t File::write(const uint8_t *buf, size_t size) {
+  size_t t;
+  if (!_file) {
+    setWriteError();
+    return 0;
+  }
+  _file->clearWriteError();
+  t = _file->write(buf, size);
+  if (_file->getWriteError()) {
+    setWriteError();
+    return 0;
+  }
+  return t;
+}
+
+int File::peek() {
+  if (! _file) 
+    return 0;
+
+  int c = _file->read();
+  if (c != -1) _file->seekCur(-1);
+  return c;
+}
+
+int File::read() {
+  if (_file) 
+    return _file->read();
+  return -1;
+}
+
+// buffered read for more efficient, high speed reading
+int File::read(void *buf, uint16_t nbyte) {
+  if (_file) 
+    return _file->read(buf, nbyte);
+  return 0;
+}
+
+int File::available() {
+  if (! _file) return 0;
+
+  uint32_t n = size() - position();
+
+  return n > 0X7FFF ? 0X7FFF : n;
+}
+
+void File::flush() {
+  if (_file)
+    _file->sync();
+}
+
+boolean File::seek(uint32_t pos) {
+  if (! _file) return false;
+
+  return _file->seekSet(pos);
+}
+
+uint32_t File::position() {
+  if (! _file) return -1;
+  return _file->curPosition();
+}
+
+uint32_t File::size() {
+  if (! _file) return 0;
+  return _file->fileSize();
+}
+
+void File::close() {
+  if (_file) {
+    _file->close();
+    free(_file); 
+    _file = 0;
+
+    /* for debugging file open/close leaks
+    nfilecount--;
+    Serial.print("Deleted ");
+    Serial.println(nfilecount, DEC);
+    */
+  }
+}
+
+File::operator bool() {
+  if (_file) 
+    return  _file->isOpen();
+  return false;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/README.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/README.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/README.txt	(revision 136)
@@ -0,0 +1,13 @@
+
+** SD - a slightly more friendly wrapper for sdfatlib **
+
+This library aims to expose a subset of SD card functionality in the
+form of a higher level "wrapper" object.
+
+License: GNU General Public License V3
+         (Because sdfatlib is licensed with this.)
+
+(C) Copyright 2010 SparkFun Electronics
+
+Now better than ever with optimization, multiple file support, directory handling, etc - ladyada!
+
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/SD.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/SD.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/SD.cpp	(revision 136)
@@ -0,0 +1,616 @@
+/*
+
+ SD - a slightly more friendly wrapper for sdfatlib
+
+ This library aims to expose a subset of SD card functionality
+ in the form of a higher level "wrapper" object.
+
+ License: GNU General Public License V3
+          (Because sdfatlib is licensed with this.)
+
+ (C) Copyright 2010 SparkFun Electronics
+
+
+ This library provides four key benefits:
+
+   * Including `SD.h` automatically creates a global
+     `SD` object which can be interacted with in a similar
+     manner to other standard global objects like `Serial` and `Ethernet`.
+
+   * Boilerplate initialisation code is contained in one method named 
+     `begin` and no further objects need to be created in order to access
+     the SD card.
+
+   * Calls to `open` can supply a full path name including parent 
+     directories which simplifies interacting with files in subdirectories.
+
+   * Utility methods are provided to determine whether a file exists
+     and to create a directory heirarchy.
+
+
+  Note however that not all functionality provided by the underlying
+  sdfatlib library is exposed.
+
+ */
+
+/*
+
+  Implementation Notes
+
+  In order to handle multi-directory path traversal, functionality that 
+  requires this ability is implemented as callback functions.
+
+  Individual methods call the `walkPath` function which performs the actual
+  directory traversal (swapping between two different directory/file handles
+  along the way) and at each level calls the supplied callback function.
+
+  Some types of functionality will take an action at each level (e.g. exists
+  or make directory) which others will only take an action at the bottom
+  level (e.g. open).
+
+ */
+
+#include "SD.h"
+
+// Used by `getNextPathComponent`
+#define MAX_COMPONENT_LEN 12 // What is max length?
+#define PATH_COMPONENT_BUFFER_LEN MAX_COMPONENT_LEN+1
+
+bool getNextPathComponent(char *path, unsigned int *p_offset,
+			  char *buffer) {
+  /*
+
+    Parse individual path components from a path.
+
+      e.g. after repeated calls '/foo/bar/baz' will be split
+           into 'foo', 'bar', 'baz'.
+
+    This is similar to `strtok()` but copies the component into the
+    supplied buffer rather than modifying the original string.
+
+
+    `buffer` needs to be PATH_COMPONENT_BUFFER_LEN in size.
+
+    `p_offset` needs to point to an integer of the offset at
+    which the previous path component finished.
+
+    Returns `true` if more components remain.
+
+    Returns `false` if this is the last component.
+      (This means path ended with 'foo' or 'foo/'.)
+
+   */
+
+  // TODO: Have buffer local to this function, so we know it's the
+  //       correct length?
+
+  int bufferOffset = 0;
+
+  int offset = *p_offset;
+
+  // Skip root or other separator
+  if (path[offset] == '/') {
+    offset++;
+  }
+  
+  // Copy the next next path segment
+  while (bufferOffset < MAX_COMPONENT_LEN
+	 && (path[offset] != '/')
+	 && (path[offset] != '\0')) {
+    buffer[bufferOffset++] = path[offset++];
+  }
+
+  buffer[bufferOffset] = '\0';
+
+  // Skip trailing separator so we can determine if this
+  // is the last component in the path or not.
+  if (path[offset] == '/') {
+    offset++;
+  }
+
+  *p_offset = offset;
+
+  return (path[offset] != '\0');
+}
+
+
+
+boolean walkPath(char *filepath, SdFile& parentDir,
+		 boolean (*callback)(SdFile& parentDir,
+				     char *filePathComponent,
+				     boolean isLastComponent,
+				     void *object),
+		 void *object = NULL) {
+  /*
+     
+     When given a file path (and parent directory--normally root),
+     this function traverses the directories in the path and at each
+     level calls the supplied callback function while also providing
+     the supplied object for context if required.
+
+       e.g. given the path '/foo/bar/baz'
+            the callback would be called at the equivalent of
+	    '/foo', '/foo/bar' and '/foo/bar/baz'.
+
+     The implementation swaps between two different directory/file
+     handles as it traverses the directories and does not use recursion
+     in an attempt to use memory efficiently.
+
+     If a callback wishes to stop the directory traversal it should
+     return false--in this case the function will stop the traversal,
+     tidy up and return false.
+
+     If a directory path doesn't exist at some point this function will
+     also return false and not subsequently call the callback.
+
+     If a directory path specified is complete, valid and the callback
+     did not indicate the traversal should be interrupted then this
+     function will return true.
+
+   */
+
+
+  SdFile subfile1;
+  SdFile subfile2;
+
+  char buffer[PATH_COMPONENT_BUFFER_LEN]; 
+
+  unsigned int offset = 0;
+
+  SdFile *p_parent;
+  SdFile *p_child;
+
+  SdFile *p_tmp_sdfile;  
+  
+  p_child = &subfile1;
+  
+  p_parent = &parentDir;
+
+  while (true) {
+
+    boolean moreComponents = getNextPathComponent(filepath, &offset, buffer);
+
+    boolean shouldContinue = callback((*p_parent), buffer, !moreComponents, object);
+
+    if (!shouldContinue) {
+      // TODO: Don't repeat this code?
+      // If it's one we've created then we
+      // don't need the parent handle anymore.
+      if (p_parent != &parentDir) {
+        (*p_parent).close();
+      }
+      return false;
+    }
+    
+    if (!moreComponents) {
+      break;
+    }
+    
+    boolean exists = (*p_child).open(*p_parent, buffer, O_RDONLY);
+
+    // If it's one we've created then we
+    // don't need the parent handle anymore.
+    if (p_parent != &parentDir) {
+      (*p_parent).close();
+    }
+    
+    // Handle case when it doesn't exist and we can't continue...
+    if (exists) {
+      // We alternate between two file handles as we go down
+      // the path.
+      if (p_parent == &parentDir) {
+        p_parent = &subfile2;
+      }
+
+      p_tmp_sdfile = p_parent;
+      p_parent = p_child;
+      p_child = p_tmp_sdfile;
+    } else {
+      return false;
+    }
+  }
+  
+  if (p_parent != &parentDir) {
+    (*p_parent).close(); // TODO: Return/ handle different?
+  }
+
+  return true;
+}
+
+
+
+/*
+
+   The callbacks used to implement various functionality follow.
+
+   Each callback is supplied with a parent directory handle,
+   character string with the name of the current file path component,
+   a flag indicating if this component is the last in the path and
+   a pointer to an arbitrary object used for context.
+
+ */
+
+boolean callback_pathExists(SdFile& parentDir, char *filePathComponent, 
+			    boolean isLastComponent, void *object) {
+  /*
+
+    Callback used to determine if a file/directory exists in parent
+    directory.
+
+    Returns true if file path exists.
+
+  */
+  SdFile child;
+
+  boolean exists = child.open(parentDir, filePathComponent, O_RDONLY);
+  
+  if (exists) {
+     child.close(); 
+  }
+  
+  return exists;
+}
+
+
+
+boolean callback_makeDirPath(SdFile& parentDir, char *filePathComponent, 
+			     boolean isLastComponent, void *object) {
+  /*
+
+    Callback used to create a directory in the parent directory if
+    it does not already exist.
+
+    Returns true if a directory was created or it already existed.
+
+  */
+  boolean result = false;
+  SdFile child;
+  
+  result = callback_pathExists(parentDir, filePathComponent, isLastComponent, object);
+  if (!result) {
+    result = child.makeDir(parentDir, filePathComponent);
+  } 
+  
+  return result;
+}
+
+
+  /*
+
+boolean callback_openPath(SdFile& parentDir, char *filePathComponent, 
+			  boolean isLastComponent, void *object) {
+
+    Callback used to open a file specified by a filepath that may
+    specify one or more directories above it.
+
+    Expects the context object to be an instance of `SDClass` and
+    will use the `file` property of the instance to open the requested
+    file/directory with the associated file open mode property.
+
+    Always returns true if the directory traversal hasn't reached the
+    bottom of the directory heirarchy.
+
+    Returns false once the file has been opened--to prevent the traversal
+    from descending further. (This may be unnecessary.)
+
+  if (isLastComponent) {
+    SDClass *p_SD = static_cast<SDClass*>(object);
+    p_SD->file.open(parentDir, filePathComponent, p_SD->fileOpenMode);
+    if (p_SD->fileOpenMode == FILE_WRITE) {
+      p_SD->file.seekSet(p_SD->file.fileSize());
+    }
+    // TODO: Return file open result?
+    return false;
+  }
+  return true;
+}
+  */
+
+
+
+boolean callback_remove(SdFile& parentDir, char *filePathComponent, 
+			boolean isLastComponent, void *object) {
+  if (isLastComponent) {
+    return SdFile::remove(parentDir, filePathComponent);
+  }
+  return true;
+}
+
+boolean callback_rmdir(SdFile& parentDir, char *filePathComponent, 
+			boolean isLastComponent, void *object) {
+  if (isLastComponent) {
+    SdFile f;
+    if (!f.open(parentDir, filePathComponent, O_READ)) return false;
+    return f.rmDir();
+  }
+  return true;
+}
+
+
+
+/* Implementation of class used to create `SDCard` object. */
+
+
+
+boolean SDClass::begin(uint8_t csPin) {
+  /*
+
+    Performs the initialisation required by the sdfatlib library.
+
+    Return true if initialization succeeds, false otherwise.
+
+   */
+  return card.init(SPI_HALF_SPEED, csPin) &&
+         volume.init(card) &&
+         root.openRoot(volume);
+}
+
+
+
+// this little helper is used to traverse paths
+SdFile SDClass::getParentDir(const char *filepath, int *index) {
+  // get parent directory
+  SdFile d1 = root; // start with the mostparent, root!
+  SdFile d2;
+
+  // we'll use the pointers to swap between the two objects
+  SdFile *parent = &d1;
+  SdFile *subdir = &d2;
+  
+  const char *origpath = filepath;
+
+  while (strchr(filepath, '/')) {
+
+    // get rid of leading /'s
+    if (filepath[0] == '/') {
+      filepath++;
+      continue;
+    }
+    
+    if (! strchr(filepath, '/')) {
+      // it was in the root directory, so leave now
+      break;
+    }
+
+    // extract just the name of the next subdirectory
+    uint8_t idx = strchr(filepath, '/') - filepath;
+    if (idx > 12)
+      idx = 12;    // dont let them specify long names
+    char subdirname[13];
+    strncpy(subdirname, filepath, idx);
+    subdirname[idx] = 0;
+
+    // close the subdir (we reuse them) if open
+    subdir->close();
+    if (! subdir->open(parent, subdirname, O_READ)) {
+      // failed to open one of the subdirectories
+      return SdFile();
+    }
+    // move forward to the next subdirectory
+    filepath += idx;
+
+    // we reuse the objects, close it.
+    parent->close();
+
+    // swap the pointers
+    SdFile *t = parent;
+    parent = subdir;
+    subdir = t;
+  }
+
+  *index = (int)(filepath - origpath);
+  // parent is now the parent diretory of the file!
+  return *parent;
+}
+
+
+File SDClass::open(const char *filepath, uint8_t mode) {
+  /*
+
+     Open the supplied file path for reading or writing.
+
+     The file content can be accessed via the `file` property of
+     the `SDClass` object--this property is currently
+     a standard `SdFile` object from `sdfatlib`.
+
+     Defaults to read only.
+
+     If `write` is true, default action (when `append` is true) is to
+     append data to the end of the file.
+
+     If `append` is false then the file will be truncated first.
+
+     If the file does not exist and it is opened for writing the file
+     will be created.
+
+     An attempt to open a file for reading that does not exist is an
+     error.
+
+   */
+
+  int pathidx;
+
+  // do the interative search
+  SdFile parentdir = getParentDir(filepath, &pathidx);
+  // no more subdirs!
+
+  filepath += pathidx;
+
+  if (! filepath[0]) {
+    // it was the directory itself!
+    return File(parentdir, "/");
+  }
+
+  // Open the file itself
+  SdFile file;
+
+  // failed to open a subdir!
+  if (!parentdir.isOpen())
+    return File();
+
+  // there is a special case for the Root directory since its a static dir
+  if (parentdir.isRoot()) {
+    if ( ! file.open(SD.root, filepath, mode)) {
+      // failed to open the file :(
+      return File();
+    }
+    // dont close the root!
+  } else {
+    if ( ! file.open(parentdir, filepath, mode)) {
+      return File();
+    }
+    // close the parent
+    parentdir.close();
+  }
+
+  if (mode & (O_APPEND | O_WRITE)) 
+    file.seekSet(file.fileSize());
+  return File(file, filepath);
+}
+
+
+/*
+File SDClass::open(char *filepath, uint8_t mode) {
+  //
+
+     Open the supplied file path for reading or writing.
+
+     The file content can be accessed via the `file` property of
+     the `SDClass` object--this property is currently
+     a standard `SdFile` object from `sdfatlib`.
+
+     Defaults to read only.
+
+     If `write` is true, default action (when `append` is true) is to
+     append data to the end of the file.
+
+     If `append` is false then the file will be truncated first.
+
+     If the file does not exist and it is opened for writing the file
+     will be created.
+
+     An attempt to open a file for reading that does not exist is an
+     error.
+
+   //
+
+  // TODO: Allow for read&write? (Possibly not, as it requires seek.)
+
+  fileOpenMode = mode;
+  walkPath(filepath, root, callback_openPath, this);
+
+  return File();
+
+}
+*/
+
+
+//boolean SDClass::close() {
+//  /*
+//
+//    Closes the file opened by the `open` method.
+//
+//   */
+//  file.close();
+//}
+
+
+boolean SDClass::exists(char *filepath) {
+  /*
+
+     Returns true if the supplied file path exists.
+
+   */
+  return walkPath(filepath, root, callback_pathExists);
+}
+
+
+//boolean SDClass::exists(char *filepath, SdFile& parentDir) {
+//  /*
+//
+//     Returns true if the supplied file path rooted at `parentDir`
+//     exists.
+//
+//   */
+//  return walkPath(filepath, parentDir, callback_pathExists);
+//}
+
+
+boolean SDClass::mkdir(char *filepath) {
+  /*
+  
+    Makes a single directory or a heirarchy of directories.
+
+    A rough equivalent to `mkdir -p`.
+  
+   */
+  return walkPath(filepath, root, callback_makeDirPath);
+}
+
+boolean SDClass::rmdir(char *filepath) {
+  /*
+  
+    Remove a single directory or a heirarchy of directories.
+
+    A rough equivalent to `rm -rf`.
+  
+   */
+  return walkPath(filepath, root, callback_rmdir);
+}
+
+boolean SDClass::remove(char *filepath) {
+  return walkPath(filepath, root, callback_remove);
+}
+
+
+// allows you to recurse into a directory
+File File::openNextFile(uint8_t mode) {
+  dir_t p;
+
+  //Serial.print("\t\treading dir...");
+  while (_file->readDir(&p) > 0) {
+
+    // done if past last used entry
+    if (p.name[0] == DIR_NAME_FREE) {
+      //Serial.println("end");
+      return File();
+    }
+
+    // skip deleted entry and entries for . and  ..
+    if (p.name[0] == DIR_NAME_DELETED || p.name[0] == '.') {
+      //Serial.println("dots");
+      continue;
+    }
+
+    // only list subdirectories and files
+    if (!DIR_IS_FILE_OR_SUBDIR(&p)) {
+      //Serial.println("notafile");
+      continue;
+    }
+
+    // print file name with possible blank fill
+    SdFile f;
+    char name[13];
+    _file->dirName(p, name);
+    //Serial.print("try to open file ");
+    //Serial.println(name);
+
+    if (f.open(_file, name, mode)) {
+      //Serial.println("OK!");
+      return File(f, name);    
+    } else {
+      //Serial.println("ugh");
+      return File();
+    }
+  }
+
+  //Serial.println("nothing");
+  return File();
+}
+
+void File::rewindDirectory(void) {  
+  if (isDirectory())
+    _file->rewind();
+}
+
+SDClass SD;
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/SD.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/SD.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/SD.h	(revision 136)
@@ -0,0 +1,102 @@
+/*
+
+ SD - a slightly more friendly wrapper for sdfatlib
+
+ This library aims to expose a subset of SD card functionality
+ in the form of a higher level "wrapper" object.
+
+ License: GNU General Public License V3
+          (Because sdfatlib is licensed with this.)
+
+ (C) Copyright 2010 SparkFun Electronics
+
+ */
+
+#ifndef __SD_H__
+#define __SD_H__
+
+#include <Arduino.h>
+
+#include <utility/SdFat.h>
+#include <utility/SdFatUtil.h>
+
+#define FILE_READ O_READ
+#define FILE_WRITE (O_READ | O_WRITE | O_CREAT)
+
+class File : public Stream {
+ private:
+  char _name[13]; // our name
+  SdFile *_file;  // underlying file pointer
+
+public:
+  File(SdFile f, const char *name);     // wraps an underlying SdFile
+  File(void);      // 'empty' constructor
+  virtual size_t write(uint8_t);
+  virtual size_t write(const uint8_t *buf, size_t size);
+  virtual int read();
+  virtual int peek();
+  virtual int available();
+  virtual void flush();
+  int read(void *buf, uint16_t nbyte);
+  boolean seek(uint32_t pos);
+  uint32_t position();
+  uint32_t size();
+  void close();
+  operator bool();
+  char * name();
+
+  boolean isDirectory(void);
+  File openNextFile(uint8_t mode = O_RDONLY);
+  void rewindDirectory(void);
+  
+  using Print::write;
+};
+
+class SDClass {
+
+private:
+  // These are required for initialisation and use of sdfatlib
+  Sd2Card card;
+  SdVolume volume;
+  SdFile root;
+  
+  // my quick&dirty iterator, should be replaced
+  SdFile getParentDir(const char *filepath, int *indx);
+public:
+  // This needs to be called to set up the connection to the SD card
+  // before other methods are used.
+  boolean begin(uint8_t csPin = SD_CHIP_SELECT_PIN);
+  
+  // Open the specified file/directory with the supplied mode (e.g. read or
+  // write, etc). Returns a File object for interacting with the file.
+  // Note that currently only one file can be open at a time.
+  File open(const char *filename, uint8_t mode = FILE_READ);
+
+  // Methods to determine if the requested file path exists.
+  boolean exists(char *filepath);
+
+  // Create the requested directory heirarchy--if intermediate directories
+  // do not exist they will be created.
+  boolean mkdir(char *filepath);
+  
+  // Delete the file.
+  boolean remove(char *filepath);
+  
+  boolean rmdir(char *filepath);
+
+private:
+
+  // This is used to determine the mode used to open a file
+  // it's here because it's the easiest place to pass the 
+  // information through the directory walking function. But
+  // it's probably not the best place for it.
+  // It shouldn't be set directly--it is set via the parameters to `open`.
+  int fileOpenMode;
+  
+  friend class File;
+  friend boolean callback_openPath(SdFile&, char *, boolean, void *); 
+};
+
+extern SDClass SD;
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/FatStructs.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/FatStructs.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/FatStructs.h	(revision 136)
@@ -0,0 +1,418 @@
+/* Arduino SdFat Library
+ * Copyright (C) 2009 by William Greiman
+ *
+ * This file is part of the Arduino SdFat Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino SdFat Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#ifndef FatStructs_h
+#define FatStructs_h
+/**
+ * \file
+ * FAT file structures
+ */
+/*
+ * mostly from Microsoft document fatgen103.doc
+ * http://www.microsoft.com/whdc/system/platform/firmware/fatgen.mspx
+ */
+//------------------------------------------------------------------------------
+/** Value for byte 510 of boot block or MBR */
+uint8_t const BOOTSIG0 = 0X55;
+/** Value for byte 511 of boot block or MBR */
+uint8_t const BOOTSIG1 = 0XAA;
+//------------------------------------------------------------------------------
+/**
+ * \struct partitionTable
+ * \brief MBR partition table entry
+ *
+ * A partition table entry for a MBR formatted storage device.
+ * The MBR partition table has four entries.
+ */
+struct partitionTable {
+          /**
+           * Boot Indicator . Indicates whether the volume is the active
+           * partition.  Legal values include: 0X00. Do not use for booting.
+           * 0X80 Active partition.
+           */
+  uint8_t  boot;
+          /**
+            * Head part of Cylinder-head-sector address of the first block in
+            * the partition. Legal values are 0-255. Only used in old PC BIOS.
+            */
+  uint8_t  beginHead;
+          /**
+           * Sector part of Cylinder-head-sector address of the first block in
+           * the partition. Legal values are 1-63. Only used in old PC BIOS.
+           */
+  unsigned beginSector : 6;
+           /** High bits cylinder for first block in partition. */
+  unsigned beginCylinderHigh : 2;
+          /**
+           * Combine beginCylinderLow with beginCylinderHigh. Legal values
+           * are 0-1023.  Only used in old PC BIOS.
+           */
+  uint8_t  beginCylinderLow;
+          /**
+           * Partition type. See defines that begin with PART_TYPE_ for
+           * some Microsoft partition types.
+           */
+  uint8_t  type;
+          /**
+           * head part of cylinder-head-sector address of the last sector in the
+           * partition.  Legal values are 0-255. Only used in old PC BIOS.
+           */
+  uint8_t  endHead;
+          /**
+           * Sector part of cylinder-head-sector address of the last sector in
+           * the partition.  Legal values are 1-63. Only used in old PC BIOS.
+           */
+  unsigned endSector : 6;
+           /** High bits of end cylinder */
+  unsigned endCylinderHigh : 2;
+          /**
+           * Combine endCylinderLow with endCylinderHigh. Legal values
+           * are 0-1023.  Only used in old PC BIOS.
+           */
+  uint8_t  endCylinderLow;
+           /** Logical block address of the first block in the partition. */
+  uint32_t firstSector;
+           /** Length of the partition, in blocks. */
+  uint32_t totalSectors;
+} __attribute__((packed));
+/** Type name for partitionTable */
+typedef struct partitionTable part_t;
+//------------------------------------------------------------------------------
+/**
+ * \struct masterBootRecord
+ *
+ * \brief Master Boot Record
+ *
+ * The first block of a storage device that is formatted with a MBR.
+ */
+struct masterBootRecord {
+           /** Code Area for master boot program. */
+  uint8_t  codeArea[440];
+           /** Optional WindowsNT disk signature. May contain more boot code. */
+  uint32_t diskSignature;
+           /** Usually zero but may be more boot code. */
+  uint16_t usuallyZero;
+           /** Partition tables. */
+  part_t   part[4];
+           /** First MBR signature byte. Must be 0X55 */
+  uint8_t  mbrSig0;
+           /** Second MBR signature byte. Must be 0XAA */
+  uint8_t  mbrSig1;
+} __attribute__((packed));
+/** Type name for masterBootRecord */
+typedef struct masterBootRecord mbr_t;
+//------------------------------------------------------------------------------
+/** 
+ * \struct biosParmBlock
+ *
+ * \brief BIOS parameter block
+ * 
+ *  The BIOS parameter block describes the physical layout of a FAT volume.
+ */
+struct biosParmBlock {
+          /**
+           * Count of bytes per sector. This value may take on only the
+           * following values: 512, 1024, 2048 or 4096
+           */
+  uint16_t bytesPerSector;
+          /**
+           * Number of sectors per allocation unit. This value must be a
+           * power of 2 that is greater than 0. The legal values are
+           * 1, 2, 4, 8, 16, 32, 64, and 128.
+           */
+  uint8_t  sectorsPerCluster;
+          /**
+           * Number of sectors before the first FAT.
+           * This value must not be zero.
+           */
+  uint16_t reservedSectorCount;
+          /** The count of FAT data structures on the volume. This field should
+           *  always contain the value 2 for any FAT volume of any type.
+           */
+  uint8_t  fatCount;
+          /**
+          * For FAT12 and FAT16 volumes, this field contains the count of
+          * 32-byte directory entries in the root directory. For FAT32 volumes,
+          * this field must be set to 0. For FAT12 and FAT16 volumes, this
+          * value should always specify a count that when multiplied by 32
+          * results in a multiple of bytesPerSector.  FAT16 volumes should
+          * use the value 512.
+          */
+  uint16_t rootDirEntryCount;
+          /**
+           * This field is the old 16-bit total count of sectors on the volume.
+           * This count includes the count of all sectors in all four regions
+           * of the volume. This field can be 0; if it is 0, then totalSectors32
+           * must be non-zero.  For FAT32 volumes, this field must be 0. For
+           * FAT12 and FAT16 volumes, this field contains the sector count, and
+           * totalSectors32 is 0 if the total sector count fits
+           * (is less than 0x10000).
+           */
+  uint16_t totalSectors16;
+          /**
+           * This dates back to the old MS-DOS 1.x media determination and is
+           * no longer usually used for anything.  0xF8 is the standard value
+           * for fixed (non-removable) media. For removable media, 0xF0 is
+           * frequently used. Legal values are 0xF0 or 0xF8-0xFF.
+           */
+  uint8_t  mediaType;
+          /**
+           * Count of sectors occupied by one FAT on FAT12/FAT16 volumes.
+           * On FAT32 volumes this field must be 0, and sectorsPerFat32
+           * contains the FAT size count.
+           */
+  uint16_t sectorsPerFat16;
+           /** Sectors per track for interrupt 0x13. Not used otherwise. */
+  uint16_t sectorsPerTrtack;
+           /** Number of heads for interrupt 0x13.  Not used otherwise. */
+  uint16_t headCount;
+          /**
+           * Count of hidden sectors preceding the partition that contains this
+           * FAT volume. This field is generally only relevant for media
+           *  visible on interrupt 0x13.
+           */
+  uint32_t hidddenSectors;
+          /**
+           * This field is the new 32-bit total count of sectors on the volume.
+           * This count includes the count of all sectors in all four regions
+           * of the volume.  This field can be 0; if it is 0, then
+           * totalSectors16 must be non-zero.
+           */
+  uint32_t totalSectors32;
+          /**
+           * Count of sectors occupied by one FAT on FAT32 volumes.
+           */
+  uint32_t sectorsPerFat32;
+          /**
+           * This field is only defined for FAT32 media and does not exist on
+           * FAT12 and FAT16 media.
+           * Bits 0-3 -- Zero-based number of active FAT.
+           *             Only valid if mirroring is disabled.
+           * Bits 4-6 -- Reserved.
+           * Bit 7	-- 0 means the FAT is mirrored at runtime into all FATs.
+	         *        -- 1 means only one FAT is active; it is the one referenced in bits 0-3.
+           * Bits 8-15 	-- Reserved.
+           */
+  uint16_t fat32Flags;
+          /**
+           * FAT32 version. High byte is major revision number.
+           * Low byte is minor revision number. Only 0.0 define.
+           */
+  uint16_t fat32Version;
+          /**
+           * Cluster number of the first cluster of the root directory for FAT32.
+           * This usually 2 but not required to be 2.
+           */
+  uint32_t fat32RootCluster;
+          /**
+           * Sector number of FSINFO structure in the reserved area of the
+           * FAT32 volume. Usually 1.
+           */
+  uint16_t fat32FSInfo;
+          /**
+           * If non-zero, indicates the sector number in the reserved area
+           * of the volume of a copy of the boot record. Usually 6.
+           * No value other than 6 is recommended.
+           */
+  uint16_t fat32BackBootBlock;
+          /**
+           * Reserved for future expansion. Code that formats FAT32 volumes
+           * should always set all of the bytes of this field to 0.
+           */
+  uint8_t  fat32Reserved[12];
+} __attribute__((packed));
+/** Type name for biosParmBlock */
+typedef struct biosParmBlock bpb_t;
+//------------------------------------------------------------------------------
+/**
+ * \struct fat32BootSector
+ *
+ * \brief Boot sector for a FAT16 or FAT32 volume.
+ * 
+ */  
+struct fat32BootSector {
+           /** X86 jmp to boot program */
+  uint8_t  jmpToBootCode[3];
+           /** informational only - don't depend on it */
+  char     oemName[8];
+           /** BIOS Parameter Block */
+  bpb_t    bpb;
+           /** for int0x13 use value 0X80 for hard drive */
+  uint8_t  driveNumber;
+           /** used by Windows NT - should be zero for FAT */
+  uint8_t  reserved1;
+           /** 0X29 if next three fields are valid */
+  uint8_t  bootSignature;
+           /** usually generated by combining date and time */
+  uint32_t volumeSerialNumber;
+           /** should match volume label in root dir */
+  char     volumeLabel[11];
+           /** informational only - don't depend on it */
+  char     fileSystemType[8];
+           /** X86 boot code */
+  uint8_t  bootCode[420];
+           /** must be 0X55 */
+  uint8_t  bootSectorSig0;
+           /** must be 0XAA */
+  uint8_t  bootSectorSig1;
+} __attribute__((packed));
+//------------------------------------------------------------------------------
+// End Of Chain values for FAT entries
+/** FAT16 end of chain value used by Microsoft. */
+uint16_t const FAT16EOC = 0XFFFF;
+/** Minimum value for FAT16 EOC.  Use to test for EOC. */
+uint16_t const FAT16EOC_MIN = 0XFFF8;
+/** FAT32 end of chain value used by Microsoft. */
+uint32_t const FAT32EOC = 0X0FFFFFFF;
+/** Minimum value for FAT32 EOC.  Use to test for EOC. */
+uint32_t const FAT32EOC_MIN = 0X0FFFFFF8;
+/** Mask a for FAT32 entry. Entries are 28 bits. */
+uint32_t const FAT32MASK = 0X0FFFFFFF;
+
+/** Type name for fat32BootSector */
+typedef struct fat32BootSector fbs_t;
+//------------------------------------------------------------------------------
+/**
+ * \struct directoryEntry
+ * \brief FAT short directory entry
+ *
+ * Short means short 8.3 name, not the entry size.
+ *  
+ * Date Format. A FAT directory entry date stamp is a 16-bit field that is 
+ * basically a date relative to the MS-DOS epoch of 01/01/1980. Here is the
+ * format (bit 0 is the LSB of the 16-bit word, bit 15 is the MSB of the 
+ * 16-bit word):
+ *   
+ * Bits 9-15: Count of years from 1980, valid value range 0-127 
+ * inclusive (1980-2107).
+ *   
+ * Bits 5-8: Month of year, 1 = January, valid value range 1-12 inclusive.
+ *
+ * Bits 0-4: Day of month, valid value range 1-31 inclusive.
+ *
+ * Time Format. A FAT directory entry time stamp is a 16-bit field that has
+ * a granularity of 2 seconds. Here is the format (bit 0 is the LSB of the 
+ * 16-bit word, bit 15 is the MSB of the 16-bit word).
+ *   
+ * Bits 11-15: Hours, valid value range 0-23 inclusive.
+ * 
+ * Bits 5-10: Minutes, valid value range 0-59 inclusive.
+ *      
+ * Bits 0-4: 2-second count, valid value range 0-29 inclusive (0 - 58 seconds).
+ *   
+ * The valid time range is from Midnight 00:00:00 to 23:59:58.
+ */
+struct directoryEntry {
+           /**
+            * Short 8.3 name.
+            * The first eight bytes contain the file name with blank fill.
+            * The last three bytes contain the file extension with blank fill.
+            */
+  uint8_t  name[11];
+          /** Entry attributes.
+           *
+           * The upper two bits of the attribute byte are reserved and should
+           * always be set to 0 when a file is created and never modified or
+           * looked at after that.  See defines that begin with DIR_ATT_.
+           */
+  uint8_t  attributes;
+          /**
+           * Reserved for use by Windows NT. Set value to 0 when a file is
+           * created and never modify or look at it after that.
+           */
+  uint8_t  reservedNT;
+          /**
+           * The granularity of the seconds part of creationTime is 2 seconds
+           * so this field is a count of tenths of a second and its valid
+           * value range is 0-199 inclusive. (WHG note - seems to be hundredths)
+           */
+  uint8_t  creationTimeTenths;
+           /** Time file was created. */
+  uint16_t creationTime;
+           /** Date file was created. */
+  uint16_t creationDate;
+          /**
+           * Last access date. Note that there is no last access time, only
+           * a date.  This is the date of last read or write. In the case of
+           * a write, this should be set to the same date as lastWriteDate.
+           */
+  uint16_t lastAccessDate;
+          /**
+           * High word of this entry's first cluster number (always 0 for a
+           * FAT12 or FAT16 volume).
+           */
+  uint16_t firstClusterHigh;
+           /** Time of last write. File creation is considered a write. */
+  uint16_t lastWriteTime;
+           /** Date of last write. File creation is considered a write. */
+  uint16_t lastWriteDate;
+           /** Low word of this entry's first cluster number. */
+  uint16_t firstClusterLow;
+           /** 32-bit unsigned holding this file's size in bytes. */
+  uint32_t fileSize;
+} __attribute__((packed));
+//------------------------------------------------------------------------------
+// Definitions for directory entries
+//
+/** Type name for directoryEntry */
+typedef struct directoryEntry dir_t;
+/** escape for name[0] = 0XE5 */
+uint8_t const DIR_NAME_0XE5 = 0X05;
+/** name[0] value for entry that is free after being "deleted" */
+uint8_t const DIR_NAME_DELETED = 0XE5;
+/** name[0] value for entry that is free and no allocated entries follow */
+uint8_t const DIR_NAME_FREE = 0X00;
+/** file is read-only */
+uint8_t const DIR_ATT_READ_ONLY = 0X01;
+/** File should hidden in directory listings */
+uint8_t const DIR_ATT_HIDDEN = 0X02;
+/** Entry is for a system file */
+uint8_t const DIR_ATT_SYSTEM = 0X04;
+/** Directory entry contains the volume label */
+uint8_t const DIR_ATT_VOLUME_ID = 0X08;
+/** Entry is for a directory */
+uint8_t const DIR_ATT_DIRECTORY = 0X10;
+/** Old DOS archive bit for backup support */
+uint8_t const DIR_ATT_ARCHIVE = 0X20;
+/** Test value for long name entry.  Test is
+  (d->attributes & DIR_ATT_LONG_NAME_MASK) == DIR_ATT_LONG_NAME. */
+uint8_t const DIR_ATT_LONG_NAME = 0X0F;
+/** Test mask for long name entry */
+uint8_t const DIR_ATT_LONG_NAME_MASK = 0X3F;
+/** defined attribute bits */
+uint8_t const DIR_ATT_DEFINED_BITS = 0X3F;
+/** Directory entry is part of a long name */
+static inline uint8_t DIR_IS_LONG_NAME(const dir_t* dir) {
+  return (dir->attributes & DIR_ATT_LONG_NAME_MASK) == DIR_ATT_LONG_NAME;
+}
+/** Mask for file/subdirectory tests */
+uint8_t const DIR_ATT_FILE_TYPE_MASK = (DIR_ATT_VOLUME_ID | DIR_ATT_DIRECTORY);
+/** Directory entry is for a file */
+static inline uint8_t DIR_IS_FILE(const dir_t* dir) {
+  return (dir->attributes & DIR_ATT_FILE_TYPE_MASK) == 0;
+}
+/** Directory entry is for a subdirectory */
+static inline uint8_t DIR_IS_SUBDIR(const dir_t* dir) {
+  return (dir->attributes & DIR_ATT_FILE_TYPE_MASK) == DIR_ATT_DIRECTORY;
+}
+/** Directory entry is for a file or subdirectory */
+static inline uint8_t DIR_IS_FILE_OR_SUBDIR(const dir_t* dir) {
+  return (dir->attributes & DIR_ATT_VOLUME_ID) == 0;
+}
+#endif  // FatStructs_h
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/Sd2Card.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/Sd2Card.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/Sd2Card.cpp	(revision 136)
@@ -0,0 +1,721 @@
+/* Arduino Sd2Card Library
+ * Copyright (C) 2009 by William Greiman
+ *
+ * This file is part of the Arduino Sd2Card Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Sd2Card Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#define USE_SPI_LIB
+#include <Arduino.h>
+#include "Sd2Card.h"
+//------------------------------------------------------------------------------
+#ifndef SOFTWARE_SPI
+#ifdef USE_SPI_LIB
+#include <SPI.h>
+#ifndef ARDUINO_ARCH_SAMD
+static SPISettings settings;
+#endif
+#endif
+// functions for hardware SPI
+/** Send a byte to the card */
+static void spiSend(uint8_t b) {
+#ifndef USE_SPI_LIB
+  SPDR = b;
+  while (!(SPSR & (1 << SPIF)))
+    ;
+#else
+  SPI.transfer(b);
+#endif
+}
+/** Receive a byte from the card */
+static  uint8_t spiRec(void) {
+#ifndef USE_SPI_LIB
+  spiSend(0XFF);
+  return SPDR;
+#else
+  return SPI.transfer(0xFF);
+#endif
+}
+#else  // SOFTWARE_SPI
+//------------------------------------------------------------------------------
+/** nop to tune soft SPI timing */
+#define nop asm volatile ("nop\n\t")
+//------------------------------------------------------------------------------
+/** Soft SPI receive */
+uint8_t spiRec(void) {
+  uint8_t data = 0;
+  // no interrupts during byte receive - about 8 us
+  cli();
+  // output pin high - like sending 0XFF
+  fastDigitalWrite(SPI_MOSI_PIN, HIGH);
+
+  for (uint8_t i = 0; i < 8; i++) {
+    fastDigitalWrite(SPI_SCK_PIN, HIGH);
+
+    // adjust so SCK is nice
+    nop;
+    nop;
+
+    data <<= 1;
+
+    if (fastDigitalRead(SPI_MISO_PIN)) data |= 1;
+
+    fastDigitalWrite(SPI_SCK_PIN, LOW);
+  }
+  // enable interrupts
+  sei();
+  return data;
+}
+//------------------------------------------------------------------------------
+/** Soft SPI send */
+void spiSend(uint8_t data) {
+  // no interrupts during byte send - about 8 us
+  cli();
+  for (uint8_t i = 0; i < 8; i++) {
+    fastDigitalWrite(SPI_SCK_PIN, LOW);
+
+    fastDigitalWrite(SPI_MOSI_PIN, data & 0X80);
+
+    data <<= 1;
+
+    fastDigitalWrite(SPI_SCK_PIN, HIGH);
+  }
+  // hold SCK high for a few ns
+  nop;
+  nop;
+  nop;
+  nop;
+
+  fastDigitalWrite(SPI_SCK_PIN, LOW);
+  // enable interrupts
+  sei();
+}
+#endif  // SOFTWARE_SPI
+//------------------------------------------------------------------------------
+// send command and return error code.  Return zero for OK
+uint8_t Sd2Card::cardCommand(uint8_t cmd, uint32_t arg) {
+  // end read if in partialBlockRead mode
+  readEnd();
+
+  // select card
+  chipSelectLow();
+
+  // wait up to 300 ms if busy
+  waitNotBusy(300);
+
+  // send command
+  spiSend(cmd | 0x40);
+
+  // send argument
+  for (int8_t s = 24; s >= 0; s -= 8) spiSend(arg >> s);
+
+  // send CRC
+  uint8_t crc = 0XFF;
+  if (cmd == CMD0) crc = 0X95;  // correct crc for CMD0 with arg 0
+  if (cmd == CMD8) crc = 0X87;  // correct crc for CMD8 with arg 0X1AA
+  spiSend(crc);
+
+  // wait for response
+  for (uint8_t i = 0; ((status_ = spiRec()) & 0X80) && i != 0XFF; i++)
+    ;
+  return status_;
+}
+//------------------------------------------------------------------------------
+/**
+ * Determine the size of an SD flash memory card.
+ *
+ * \return The number of 512 byte data blocks in the card
+ *         or zero if an error occurs.
+ */
+uint32_t Sd2Card::cardSize(void) {
+  csd_t csd;
+  if (!readCSD(&csd)) return 0;
+  if (csd.v1.csd_ver == 0) {
+    uint8_t read_bl_len = csd.v1.read_bl_len;
+    uint16_t c_size = (csd.v1.c_size_high << 10)
+                      | (csd.v1.c_size_mid << 2) | csd.v1.c_size_low;
+    uint8_t c_size_mult = (csd.v1.c_size_mult_high << 1)
+                          | csd.v1.c_size_mult_low;
+    return (uint32_t)(c_size + 1) << (c_size_mult + read_bl_len - 7);
+  } else if (csd.v2.csd_ver == 1) {
+    uint32_t c_size = ((uint32_t)csd.v2.c_size_high << 16)
+                      | (csd.v2.c_size_mid << 8) | csd.v2.c_size_low;
+    return (c_size + 1) << 10;
+  } else {
+    error(SD_CARD_ERROR_BAD_CSD);
+    return 0;
+  }
+}
+//------------------------------------------------------------------------------
+static uint8_t chip_select_asserted = 0;
+
+void Sd2Card::chipSelectHigh(void) {
+  digitalWrite(chipSelectPin_, HIGH);
+#ifdef USE_SPI_LIB
+  if (chip_select_asserted) {
+    chip_select_asserted = 0;
+	#ifndef ARDUINO_ARCH_SAMD
+    SPI.endTransaction();
+	#endif
+  }
+#endif
+}
+//------------------------------------------------------------------------------
+void Sd2Card::chipSelectLow(void) {
+#ifdef USE_SPI_LIB
+  if (!chip_select_asserted) {
+    chip_select_asserted = 1;
+	#ifndef ARDUINO_ARCH_SAMD
+    SPI.beginTransaction(settings);
+	#endif
+  }
+#endif
+  digitalWrite(chipSelectPin_, LOW);
+}
+//------------------------------------------------------------------------------
+/** Erase a range of blocks.
+ *
+ * \param[in] firstBlock The address of the first block in the range.
+ * \param[in] lastBlock The address of the last block in the range.
+ *
+ * \note This function requests the SD card to do a flash erase for a
+ * range of blocks.  The data on the card after an erase operation is
+ * either 0 or 1, depends on the card vendor.  The card must support
+ * single block erase.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t Sd2Card::erase(uint32_t firstBlock, uint32_t lastBlock) {
+  if (!eraseSingleBlockEnable()) {
+    error(SD_CARD_ERROR_ERASE_SINGLE_BLOCK);
+    goto fail;
+  }
+  if (type_ != SD_CARD_TYPE_SDHC) {
+    firstBlock <<= 9;
+    lastBlock <<= 9;
+  }
+  if (cardCommand(CMD32, firstBlock)
+    || cardCommand(CMD33, lastBlock)
+    || cardCommand(CMD38, 0)) {
+      error(SD_CARD_ERROR_ERASE);
+      goto fail;
+  }
+  if (!waitNotBusy(SD_ERASE_TIMEOUT)) {
+    error(SD_CARD_ERROR_ERASE_TIMEOUT);
+    goto fail;
+  }
+  chipSelectHigh();
+  return true;
+
+ fail:
+  chipSelectHigh();
+  return false;
+}
+//------------------------------------------------------------------------------
+/** Determine if card supports single block erase.
+ *
+ * \return The value one, true, is returned if single block erase is supported.
+ * The value zero, false, is returned if single block erase is not supported.
+ */
+uint8_t Sd2Card::eraseSingleBlockEnable(void) {
+  csd_t csd;
+  return readCSD(&csd) ? csd.v1.erase_blk_en : 0;
+}
+//------------------------------------------------------------------------------
+/**
+ * Initialize an SD flash memory card.
+ *
+ * \param[in] sckRateID SPI clock rate selector. See setSckRate().
+ * \param[in] chipSelectPin SD chip select pin number.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.  The reason for failure
+ * can be determined by calling errorCode() and errorData().
+ */
+uint8_t Sd2Card::init(uint8_t sckRateID, uint8_t chipSelectPin) {
+	
+  errorCode_ = inBlock_ = partialBlockRead_ = type_ = 0;
+  chipSelectPin_ = chipSelectPin;
+  // 16-bit init start time allows over a minute
+  uint16_t t0 = (uint16_t)millis();
+  uint32_t arg;
+
+  // set pin modes
+  pinMode(chipSelectPin_, OUTPUT);
+  digitalWrite(chipSelectPin_, HIGH);
+#ifndef USE_SPI_LIB
+  pinMode(SPI_MISO_PIN, INPUT);
+  pinMode(SPI_MOSI_PIN, OUTPUT);
+  pinMode(SPI_SCK_PIN, OUTPUT);
+#endif
+
+#ifndef SOFTWARE_SPI
+#ifndef USE_SPI_LIB
+  // SS must be in output mode even it is not chip select
+  pinMode(SS_PIN, OUTPUT);
+  digitalWrite(SS_PIN, HIGH); // disable any SPI device using hardware SS pin
+  // Enable SPI, Master, clock rate f_osc/128
+  SPCR = (1 << SPE) | (1 << MSTR) | (1 << SPR1) | (1 << SPR0);
+  // clear double speed
+  SPSR &= ~(1 << SPI2X);
+#else // USE_SPI_LIB
+  SPI.begin();
+  #ifndef ARDUINO_ARCH_SAMD
+  settings = SPISettings(250000, MSBFIRST, SPI_MODE0);
+  #endif
+#endif // USE_SPI_LIB
+#endif // SOFTWARE_SPI
+
+  // must supply min of 74 clock cycles with CS high.
+#ifdef USE_SPI_LIB
+#ifndef ARDUINO_ARCH_SAMD
+  SPI.beginTransaction(settings);
+#endif
+#endif
+  for (uint8_t i = 0; i < 10; i++) spiSend(0XFF);
+#ifdef USE_SPI_LIB  
+#ifndef ARDUINO_ARCH_SAMD
+  SPI.endTransaction();
+#endif
+#endif
+
+  chipSelectLow();
+
+  // command to go idle in SPI mode
+  while ((status_ = cardCommand(CMD0, 0)) != R1_IDLE_STATE) {
+    if (((uint16_t)millis() - t0) > SD_INIT_TIMEOUT) {
+      error(SD_CARD_ERROR_CMD0);
+      goto fail;
+    }
+  }
+  // check SD version
+  if ((cardCommand(CMD8, 0x1AA) & R1_ILLEGAL_COMMAND)) {
+    type(SD_CARD_TYPE_SD1);
+  } else {
+    // only need last byte of r7 response
+    for (uint8_t i = 0; i < 4; i++) status_ = spiRec();
+    if (status_ != 0XAA) {
+      error(SD_CARD_ERROR_CMD8);
+      goto fail;
+    }
+    type(SD_CARD_TYPE_SD2);
+  }
+  // initialize card and send host supports SDHC if SD2
+  arg = type() == SD_CARD_TYPE_SD2 ? 0X40000000 : 0;
+
+  while ((status_ = cardAcmd(ACMD41, arg)) != R1_READY_STATE) {
+    // check for timeout
+    if (((uint16_t)millis() - t0) > SD_INIT_TIMEOUT) {
+      error(SD_CARD_ERROR_ACMD41);
+      goto fail;
+    }
+  }
+  // if SD2 read OCR register to check for SDHC card
+  if (type() == SD_CARD_TYPE_SD2) {
+    if (cardCommand(CMD58, 0)) {
+      error(SD_CARD_ERROR_CMD58);
+      goto fail;
+    }
+    if ((spiRec() & 0XC0) == 0XC0) type(SD_CARD_TYPE_SDHC);
+    // discard rest of ocr - contains allowed voltage range
+    for (uint8_t i = 0; i < 3; i++) spiRec();
+  }
+  chipSelectHigh();
+
+#ifndef SOFTWARE_SPI
+  return setSckRate(sckRateID);
+#else  // SOFTWARE_SPI
+  return true;
+#endif  // SOFTWARE_SPI
+
+ fail:
+  chipSelectHigh();
+  return false;
+}
+//------------------------------------------------------------------------------
+/**
+ * Enable or disable partial block reads.
+ *
+ * Enabling partial block reads improves performance by allowing a block
+ * to be read over the SPI bus as several sub-blocks.  Errors may occur
+ * if the time between reads is too long since the SD card may timeout.
+ * The SPI SS line will be held low until the entire block is read or
+ * readEnd() is called.
+ *
+ * Use this for applications like the Adafruit Wave Shield.
+ *
+ * \param[in] value The value TRUE (non-zero) or FALSE (zero).)
+ */
+void Sd2Card::partialBlockRead(uint8_t value) {
+  readEnd();
+  partialBlockRead_ = value;
+}
+//------------------------------------------------------------------------------
+/**
+ * Read a 512 byte block from an SD card device.
+ *
+ * \param[in] block Logical block to be read.
+ * \param[out] dst Pointer to the location that will receive the data.
+
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t Sd2Card::readBlock(uint32_t block, uint8_t* dst) {
+  return readData(block, 0, 512, dst);
+}
+//------------------------------------------------------------------------------
+/**
+ * Read part of a 512 byte block from an SD card.
+ *
+ * \param[in] block Logical block to be read.
+ * \param[in] offset Number of bytes to skip at start of block
+ * \param[out] dst Pointer to the location that will receive the data.
+ * \param[in] count Number of bytes to read
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t Sd2Card::readData(uint32_t block,
+        uint16_t offset, uint16_t count, uint8_t* dst) {
+  uint16_t n;
+  if (count == 0) return true;
+  if ((count + offset) > 512) {
+    goto fail;
+  }
+  if (!inBlock_ || block != block_ || offset < offset_) {
+    block_ = block;
+    // use address if not SDHC card
+    if (type()!= SD_CARD_TYPE_SDHC) block <<= 9;
+    if (cardCommand(CMD17, block)) {
+      error(SD_CARD_ERROR_CMD17);
+      goto fail;
+    }
+    if (!waitStartBlock()) {
+      goto fail;
+    }
+    offset_ = 0;
+    inBlock_ = 1;
+  }
+
+#ifdef OPTIMIZE_HARDWARE_SPI
+  // start first spi transfer
+  SPDR = 0XFF;
+
+  // skip data before offset
+  for (;offset_ < offset; offset_++) {
+    while (!(SPSR & (1 << SPIF)))
+      ;
+    SPDR = 0XFF;
+  }
+  // transfer data
+  n = count - 1;
+  for (uint16_t i = 0; i < n; i++) {
+    while (!(SPSR & (1 << SPIF)))
+      ;
+    dst[i] = SPDR;
+    SPDR = 0XFF;
+  }
+  // wait for last byte
+  while (!(SPSR & (1 << SPIF)))
+    ;
+  dst[n] = SPDR;
+
+#else  // OPTIMIZE_HARDWARE_SPI
+
+  // skip data before offset
+  for (;offset_ < offset; offset_++) {
+    spiRec();
+  }
+  // transfer data
+  for (uint16_t i = 0; i < count; i++) {
+    dst[i] = spiRec();
+  }
+#endif  // OPTIMIZE_HARDWARE_SPI
+
+  offset_ += count;
+  if (!partialBlockRead_ || offset_ >= 512) {
+    // read rest of data, checksum and set chip select high
+    readEnd();
+  }
+  return true;
+
+ fail:
+  chipSelectHigh();
+  return false;
+}
+//------------------------------------------------------------------------------
+/** Skip remaining data in a block when in partial block read mode. */
+void Sd2Card::readEnd(void) {
+  if (inBlock_) {
+      // skip data and crc
+#ifdef OPTIMIZE_HARDWARE_SPI
+    // optimize skip for hardware
+    SPDR = 0XFF;
+    while (offset_++ < 513) {
+      while (!(SPSR & (1 << SPIF)))
+        ;
+      SPDR = 0XFF;
+    }
+    // wait for last crc byte
+    while (!(SPSR & (1 << SPIF)))
+      ;
+#else  // OPTIMIZE_HARDWARE_SPI
+    while (offset_++ < 514) spiRec();
+#endif  // OPTIMIZE_HARDWARE_SPI
+    chipSelectHigh();
+    inBlock_ = 0;
+  }
+}
+//------------------------------------------------------------------------------
+/** read CID or CSR register */
+uint8_t Sd2Card::readRegister(uint8_t cmd, void* buf) {
+  uint8_t* dst = reinterpret_cast<uint8_t*>(buf);
+  if (cardCommand(cmd, 0)) {
+    error(SD_CARD_ERROR_READ_REG);
+    goto fail;
+  }
+  if (!waitStartBlock()) goto fail;
+  // transfer data
+  for (uint16_t i = 0; i < 16; i++) dst[i] = spiRec();
+  spiRec();  // get first crc byte
+  spiRec();  // get second crc byte
+  chipSelectHigh();
+  return true;
+
+ fail:
+  chipSelectHigh();
+  return false;
+}
+//------------------------------------------------------------------------------
+/**
+ * Set the SPI clock rate.
+ *
+ * \param[in] sckRateID A value in the range [0, 6].
+ *
+ * The SPI clock will be set to F_CPU/pow(2, 1 + sckRateID). The maximum
+ * SPI rate is F_CPU/2 for \a sckRateID = 0 and the minimum rate is F_CPU/128
+ * for \a scsRateID = 6.
+ *
+ * \return The value one, true, is returned for success and the value zero,
+ * false, is returned for an invalid value of \a sckRateID.
+ */
+uint8_t Sd2Card::setSckRate(uint8_t sckRateID) {
+  if (sckRateID > 6) {
+    error(SD_CARD_ERROR_SCK_RATE);
+    return false;
+  }
+#ifndef USE_SPI_LIB
+  // see avr processor datasheet for SPI register bit definitions
+  if ((sckRateID & 1) || sckRateID == 6) {
+    SPSR &= ~(1 << SPI2X);
+  } else {
+    SPSR |= (1 << SPI2X);
+  }
+  SPCR &= ~((1 <<SPR1) | (1 << SPR0));
+  SPCR |= (sckRateID & 4 ? (1 << SPR1) : 0)
+    | (sckRateID & 2 ? (1 << SPR0) : 0);
+#else // USE_SPI_LIB
+  #if defined(ARDUINO_ARCH_SAM)
+  switch (sckRateID) {
+    case 0:  settings = SPISettings(25000000, MSBFIRST, SPI_MODE0); break;
+    case 1:  settings = SPISettings(4000000, MSBFIRST, SPI_MODE0); break;
+    case 2:  settings = SPISettings(2000000, MSBFIRST, SPI_MODE0); break;
+    case 3:  settings = SPISettings(1000000, MSBFIRST, SPI_MODE0); break;
+    case 4:  settings = SPISettings(500000, MSBFIRST, SPI_MODE0); break;
+    case 5:  settings = SPISettings(250000, MSBFIRST, SPI_MODE0); break;
+    default: settings = SPISettings(125000, MSBFIRST, SPI_MODE0);
+  }
+  #endif
+#endif // USE_SPI_LIB
+  return true;
+}
+//------------------------------------------------------------------------------
+// wait for card to go not busy
+uint8_t Sd2Card::waitNotBusy(uint16_t timeoutMillis) {
+  uint16_t t0 = millis();
+  do {
+    if (spiRec() == 0XFF) return true;
+  }
+  while (((uint16_t)millis() - t0) < timeoutMillis);
+  return false;
+}
+//------------------------------------------------------------------------------
+/** Wait for start block token */
+uint8_t Sd2Card::waitStartBlock(void) {
+  uint16_t t0 = millis();
+  while ((status_ = spiRec()) == 0XFF) {
+    if (((uint16_t)millis() - t0) > SD_READ_TIMEOUT) {
+      error(SD_CARD_ERROR_READ_TIMEOUT);
+      goto fail;
+    }
+  }
+  if (status_ != DATA_START_BLOCK) {
+    error(SD_CARD_ERROR_READ);
+    goto fail;
+  }
+  return true;
+
+ fail:
+  chipSelectHigh();
+  return false;
+}
+//------------------------------------------------------------------------------
+/**
+ * Writes a 512 byte block to an SD card.
+ *
+ * \param[in] blockNumber Logical block to be written.
+ * \param[in] src Pointer to the location of the data to be written.
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t Sd2Card::writeBlock(uint32_t blockNumber, const uint8_t* src) {
+#if SD_PROTECT_BLOCK_ZERO
+  // don't allow write to first block
+  if (blockNumber == 0) {
+    error(SD_CARD_ERROR_WRITE_BLOCK_ZERO);
+    goto fail;
+  }
+#endif  // SD_PROTECT_BLOCK_ZERO
+
+  // use address if not SDHC card
+  if (type() != SD_CARD_TYPE_SDHC) blockNumber <<= 9;
+  if (cardCommand(CMD24, blockNumber)) {
+    error(SD_CARD_ERROR_CMD24);
+    goto fail;
+  }
+  if (!writeData(DATA_START_BLOCK, src)) goto fail;
+
+  // wait for flash programming to complete
+  if (!waitNotBusy(SD_WRITE_TIMEOUT)) {
+    error(SD_CARD_ERROR_WRITE_TIMEOUT);
+    goto fail;
+  }
+  // response is r2 so get and check two bytes for nonzero
+  if (cardCommand(CMD13, 0) || spiRec()) {
+    error(SD_CARD_ERROR_WRITE_PROGRAMMING);
+    goto fail;
+  }
+  chipSelectHigh();
+  return true;
+
+ fail:
+  chipSelectHigh();
+  return false;
+}
+//------------------------------------------------------------------------------
+/** Write one data block in a multiple block write sequence */
+uint8_t Sd2Card::writeData(const uint8_t* src) {
+  // wait for previous write to finish
+  if (!waitNotBusy(SD_WRITE_TIMEOUT)) {
+    error(SD_CARD_ERROR_WRITE_MULTIPLE);
+    chipSelectHigh();
+    return false;
+  }
+  return writeData(WRITE_MULTIPLE_TOKEN, src);
+}
+//------------------------------------------------------------------------------
+// send one block of data for write block or write multiple blocks
+uint8_t Sd2Card::writeData(uint8_t token, const uint8_t* src) {
+#ifdef OPTIMIZE_HARDWARE_SPI
+
+  // send data - optimized loop
+  SPDR = token;
+
+  // send two byte per iteration
+  for (uint16_t i = 0; i < 512; i += 2) {
+    while (!(SPSR & (1 << SPIF)))
+      ;
+    SPDR = src[i];
+    while (!(SPSR & (1 << SPIF)))
+      ;
+    SPDR = src[i+1];
+  }
+
+  // wait for last data byte
+  while (!(SPSR & (1 << SPIF)))
+    ;
+
+#else  // OPTIMIZE_HARDWARE_SPI
+  spiSend(token);
+  for (uint16_t i = 0; i < 512; i++) {
+    spiSend(src[i]);
+  }
+#endif  // OPTIMIZE_HARDWARE_SPI
+  spiSend(0xff);  // dummy crc
+  spiSend(0xff);  // dummy crc
+
+  status_ = spiRec();
+  if ((status_ & DATA_RES_MASK) != DATA_RES_ACCEPTED) {
+    error(SD_CARD_ERROR_WRITE);
+    chipSelectHigh();
+    return false;
+  }
+  return true;
+}
+//------------------------------------------------------------------------------
+/** Start a write multiple blocks sequence.
+ *
+ * \param[in] blockNumber Address of first block in sequence.
+ * \param[in] eraseCount The number of blocks to be pre-erased.
+ *
+ * \note This function is used with writeData() and writeStop()
+ * for optimized multiple block writes.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t Sd2Card::writeStart(uint32_t blockNumber, uint32_t eraseCount) {
+#if SD_PROTECT_BLOCK_ZERO
+  // don't allow write to first block
+  if (blockNumber == 0) {
+    error(SD_CARD_ERROR_WRITE_BLOCK_ZERO);
+    goto fail;
+  }
+#endif  // SD_PROTECT_BLOCK_ZERO
+  // send pre-erase count
+  if (cardAcmd(ACMD23, eraseCount)) {
+    error(SD_CARD_ERROR_ACMD23);
+    goto fail;
+  }
+  // use address if not SDHC card
+  if (type() != SD_CARD_TYPE_SDHC) blockNumber <<= 9;
+  if (cardCommand(CMD25, blockNumber)) {
+    error(SD_CARD_ERROR_CMD25);
+    goto fail;
+  }
+  return true;
+
+ fail:
+  chipSelectHigh();
+  return false;
+}
+//------------------------------------------------------------------------------
+/** End a write multiple blocks sequence.
+ *
+* \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t Sd2Card::writeStop(void) {
+  if (!waitNotBusy(SD_WRITE_TIMEOUT)) goto fail;
+  spiSend(STOP_TRAN_TOKEN);
+  if (!waitNotBusy(SD_WRITE_TIMEOUT)) goto fail;
+  chipSelectHigh();
+  return true;
+
+ fail:
+  error(SD_CARD_ERROR_STOP_TRAN);
+  chipSelectHigh();
+  return false;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/Sd2Card.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/Sd2Card.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/Sd2Card.h	(revision 136)
@@ -0,0 +1,240 @@
+/* Arduino Sd2Card Library
+ * Copyright (C) 2009 by William Greiman
+ *
+ * This file is part of the Arduino Sd2Card Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Sd2Card Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#ifndef Sd2Card_h
+#define Sd2Card_h
+/**
+ * \file
+ * Sd2Card class
+ */
+#include "Sd2PinMap.h"
+#include "SdInfo.h"
+/** Set SCK to max rate of F_CPU/2. See Sd2Card::setSckRate(). */
+uint8_t const SPI_FULL_SPEED = 0;
+/** Set SCK rate to F_CPU/4. See Sd2Card::setSckRate(). */
+uint8_t const SPI_HALF_SPEED = 1;
+/** Set SCK rate to F_CPU/8. Sd2Card::setSckRate(). */
+uint8_t const SPI_QUARTER_SPEED = 2;
+/**
+ * USE_SPI_LIB: if set, use the SPI library bundled with Arduino IDE, otherwise
+ * run with a standalone driver for AVR.
+ */
+#define USE_SPI_LIB
+/**
+ * Define MEGA_SOFT_SPI non-zero to use software SPI on Mega Arduinos.
+ * Pins used are SS 10, MOSI 11, MISO 12, and SCK 13.
+ *
+ * MEGA_SOFT_SPI allows an unmodified Adafruit GPS Shield to be used
+ * on Mega Arduinos.  Software SPI works well with GPS Shield V1.1
+ * but many SD cards will fail with GPS Shield V1.0.
+ */
+#define MEGA_SOFT_SPI 0
+//------------------------------------------------------------------------------
+#if MEGA_SOFT_SPI && (defined(__AVR_ATmega1280__)||defined(__AVR_ATmega2560__))
+#define SOFTWARE_SPI
+#endif  // MEGA_SOFT_SPI
+//------------------------------------------------------------------------------
+// SPI pin definitions
+//
+#ifndef SOFTWARE_SPI
+// hardware pin defs
+/**
+ * SD Chip Select pin
+ *
+ * Warning if this pin is redefined the hardware SS will pin will be enabled
+ * as an output by init().  An avr processor will not function as an SPI
+ * master unless SS is set to output mode.
+ */
+/** The default chip select pin for the SD card is SS. */
+uint8_t const  SD_CHIP_SELECT_PIN = SS_PIN;
+// The following three pins must not be redefined for hardware SPI.
+/** SPI Master Out Slave In pin */
+uint8_t const  SPI_MOSI_PIN = MOSI_PIN;
+/** SPI Master In Slave Out pin */
+uint8_t const  SPI_MISO_PIN = MISO_PIN;
+/** SPI Clock pin */
+uint8_t const  SPI_SCK_PIN = SCK_PIN;
+/** optimize loops for hardware SPI */
+#ifndef USE_SPI_LIB
+#define OPTIMIZE_HARDWARE_SPI
+#endif
+
+#else  // SOFTWARE_SPI
+// define software SPI pins so Mega can use unmodified GPS Shield
+/** SPI chip select pin */
+uint8_t const SD_CHIP_SELECT_PIN = 10;
+/** SPI Master Out Slave In pin */
+uint8_t const SPI_MOSI_PIN = 11;
+/** SPI Master In Slave Out pin */
+uint8_t const SPI_MISO_PIN = 12;
+/** SPI Clock pin */
+uint8_t const SPI_SCK_PIN = 13;
+#endif  // SOFTWARE_SPI
+//------------------------------------------------------------------------------
+/** Protect block zero from write if nonzero */
+#define SD_PROTECT_BLOCK_ZERO 1
+/** init timeout ms */
+uint16_t const SD_INIT_TIMEOUT = 2000;
+/** erase timeout ms */
+uint16_t const SD_ERASE_TIMEOUT = 10000;
+/** read timeout ms */
+uint16_t const SD_READ_TIMEOUT = 300;
+/** write time out ms */
+uint16_t const SD_WRITE_TIMEOUT = 600;
+//------------------------------------------------------------------------------
+// SD card errors
+/** timeout error for command CMD0 */
+uint8_t const SD_CARD_ERROR_CMD0 = 0X1;
+/** CMD8 was not accepted - not a valid SD card*/
+uint8_t const SD_CARD_ERROR_CMD8 = 0X2;
+/** card returned an error response for CMD17 (read block) */
+uint8_t const SD_CARD_ERROR_CMD17 = 0X3;
+/** card returned an error response for CMD24 (write block) */
+uint8_t const SD_CARD_ERROR_CMD24 = 0X4;
+/**  WRITE_MULTIPLE_BLOCKS command failed */
+uint8_t const SD_CARD_ERROR_CMD25 = 0X05;
+/** card returned an error response for CMD58 (read OCR) */
+uint8_t const SD_CARD_ERROR_CMD58 = 0X06;
+/** SET_WR_BLK_ERASE_COUNT failed */
+uint8_t const SD_CARD_ERROR_ACMD23 = 0X07;
+/** card's ACMD41 initialization process timeout */
+uint8_t const SD_CARD_ERROR_ACMD41 = 0X08;
+/** card returned a bad CSR version field */
+uint8_t const SD_CARD_ERROR_BAD_CSD = 0X09;
+/** erase block group command failed */
+uint8_t const SD_CARD_ERROR_ERASE = 0X0A;
+/** card not capable of single block erase */
+uint8_t const SD_CARD_ERROR_ERASE_SINGLE_BLOCK = 0X0B;
+/** Erase sequence timed out */
+uint8_t const SD_CARD_ERROR_ERASE_TIMEOUT = 0X0C;
+/** card returned an error token instead of read data */
+uint8_t const SD_CARD_ERROR_READ = 0X0D;
+/** read CID or CSD failed */
+uint8_t const SD_CARD_ERROR_READ_REG = 0X0E;
+/** timeout while waiting for start of read data */
+uint8_t const SD_CARD_ERROR_READ_TIMEOUT = 0X0F;
+/** card did not accept STOP_TRAN_TOKEN */
+uint8_t const SD_CARD_ERROR_STOP_TRAN = 0X10;
+/** card returned an error token as a response to a write operation */
+uint8_t const SD_CARD_ERROR_WRITE = 0X11;
+/** attempt to write protected block zero */
+uint8_t const SD_CARD_ERROR_WRITE_BLOCK_ZERO = 0X12;
+/** card did not go ready for a multiple block write */
+uint8_t const SD_CARD_ERROR_WRITE_MULTIPLE = 0X13;
+/** card returned an error to a CMD13 status check after a write */
+uint8_t const SD_CARD_ERROR_WRITE_PROGRAMMING = 0X14;
+/** timeout occurred during write programming */
+uint8_t const SD_CARD_ERROR_WRITE_TIMEOUT = 0X15;
+/** incorrect rate selected */
+uint8_t const SD_CARD_ERROR_SCK_RATE = 0X16;
+//------------------------------------------------------------------------------
+// card types
+/** Standard capacity V1 SD card */
+uint8_t const SD_CARD_TYPE_SD1 = 1;
+/** Standard capacity V2 SD card */
+uint8_t const SD_CARD_TYPE_SD2 = 2;
+/** High Capacity SD card */
+uint8_t const SD_CARD_TYPE_SDHC = 3;
+//------------------------------------------------------------------------------
+/**
+ * \class Sd2Card
+ * \brief Raw access to SD and SDHC flash memory cards.
+ */
+class Sd2Card {
+ public:
+  /** Construct an instance of Sd2Card. */
+  Sd2Card(void) : errorCode_(0), inBlock_(0), partialBlockRead_(0), type_(0) {}
+  uint32_t cardSize(void);
+  uint8_t erase(uint32_t firstBlock, uint32_t lastBlock);
+  uint8_t eraseSingleBlockEnable(void);
+  /**
+   * \return error code for last error. See Sd2Card.h for a list of error codes.
+   */
+  uint8_t errorCode(void) const {return errorCode_;}
+  /** \return error data for last error. */
+  uint8_t errorData(void) const {return status_;}
+  /**
+   * Initialize an SD flash memory card with default clock rate and chip
+   * select pin.  See sd2Card::init(uint8_t sckRateID, uint8_t chipSelectPin).
+   */
+  uint8_t init(void) {
+    return init(SPI_FULL_SPEED, SD_CHIP_SELECT_PIN);
+  }
+  /**
+   * Initialize an SD flash memory card with the selected SPI clock rate
+   * and the default SD chip select pin.
+   * See sd2Card::init(uint8_t sckRateID, uint8_t chipSelectPin).
+   */
+  uint8_t init(uint8_t sckRateID) {
+    return init(sckRateID, SD_CHIP_SELECT_PIN);
+  }
+  uint8_t init(uint8_t sckRateID, uint8_t chipSelectPin);
+  void partialBlockRead(uint8_t value);
+  /** Returns the current value, true or false, for partial block read. */
+  uint8_t partialBlockRead(void) const {return partialBlockRead_;}
+  uint8_t readBlock(uint32_t block, uint8_t* dst);
+  uint8_t readData(uint32_t block,
+          uint16_t offset, uint16_t count, uint8_t* dst);
+  /**
+   * Read a cards CID register. The CID contains card identification
+   * information such as Manufacturer ID, Product name, Product serial
+   * number and Manufacturing date. */
+  uint8_t readCID(cid_t* cid) {
+    return readRegister(CMD10, cid);
+  }
+  /**
+   * Read a cards CSD register. The CSD contains Card-Specific Data that
+   * provides information regarding access to the card's contents. */
+  uint8_t readCSD(csd_t* csd) {
+    return readRegister(CMD9, csd);
+  }
+  void readEnd(void);
+  uint8_t setSckRate(uint8_t sckRateID);
+  /** Return the card type: SD V1, SD V2 or SDHC */
+  uint8_t type(void) const {return type_;}
+  uint8_t writeBlock(uint32_t blockNumber, const uint8_t* src);
+  uint8_t writeData(const uint8_t* src);
+  uint8_t writeStart(uint32_t blockNumber, uint32_t eraseCount);
+  uint8_t writeStop(void);
+ private:
+  uint32_t block_;
+  uint8_t chipSelectPin_;
+  uint8_t errorCode_;
+  uint8_t inBlock_;
+  uint16_t offset_;
+  uint8_t partialBlockRead_;
+  uint8_t status_;
+  uint8_t type_;
+  // private functions
+  uint8_t cardAcmd(uint8_t cmd, uint32_t arg) {
+    cardCommand(CMD55, 0);
+    return cardCommand(cmd, arg);
+  }
+  uint8_t cardCommand(uint8_t cmd, uint32_t arg);
+  void error(uint8_t code) {errorCode_ = code;}
+  uint8_t readRegister(uint8_t cmd, void* buf);
+  uint8_t sendWriteCommand(uint32_t blockNumber, uint32_t eraseCount);
+  void chipSelectHigh(void);
+  void chipSelectLow(void);
+  void type(uint8_t value) {type_ = value;}
+  uint8_t waitNotBusy(uint16_t timeoutMillis);
+  uint8_t writeData(uint8_t token, const uint8_t* src);
+  uint8_t waitStartBlock(void);
+};
+#endif  // Sd2Card_h
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/Sd2PinMap.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/Sd2PinMap.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/Sd2PinMap.h	(revision 136)
@@ -0,0 +1,372 @@
+/* Arduino SdFat Library
+ * Copyright (C) 2010 by William Greiman
+ *
+ * This file is part of the Arduino SdFat Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino SdFat Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#if defined(__arm__) // Arduino Due Board follows
+
+#ifndef Sd2PinMap_h
+#define Sd2PinMap_h
+
+#include <Arduino.h>
+
+uint8_t const SS_PIN = SS;
+uint8_t const MOSI_PIN = MOSI;
+uint8_t const MISO_PIN = MISO;
+uint8_t const SCK_PIN = SCK;
+
+#endif // Sd2PinMap_h
+
+#elif defined(__AVR__) // Other AVR based Boards follows
+
+// Warning this file was generated by a program.
+#ifndef Sd2PinMap_h
+#define Sd2PinMap_h
+#include <avr/io.h>
+
+//------------------------------------------------------------------------------
+/** struct for mapping digital pins */
+struct pin_map_t {
+  volatile uint8_t* ddr;
+  volatile uint8_t* pin;
+  volatile uint8_t* port;
+  uint8_t bit;
+};
+//------------------------------------------------------------------------------
+#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+// Mega
+
+// Two Wire (aka I2C) ports
+uint8_t const SDA_PIN = 20;
+uint8_t const SCL_PIN = 21;
+
+// SPI port
+uint8_t const SS_PIN = 53;
+uint8_t const MOSI_PIN = 51;
+uint8_t const MISO_PIN = 50;
+uint8_t const SCK_PIN = 52;
+
+static const pin_map_t digitalPinMap[] = {
+  {&DDRE, &PINE, &PORTE, 0},  // E0  0
+  {&DDRE, &PINE, &PORTE, 1},  // E1  1
+  {&DDRE, &PINE, &PORTE, 4},  // E4  2
+  {&DDRE, &PINE, &PORTE, 5},  // E5  3
+  {&DDRG, &PING, &PORTG, 5},  // G5  4
+  {&DDRE, &PINE, &PORTE, 3},  // E3  5
+  {&DDRH, &PINH, &PORTH, 3},  // H3  6
+  {&DDRH, &PINH, &PORTH, 4},  // H4  7
+  {&DDRH, &PINH, &PORTH, 5},  // H5  8
+  {&DDRH, &PINH, &PORTH, 6},  // H6  9
+  {&DDRB, &PINB, &PORTB, 4},  // B4 10
+  {&DDRB, &PINB, &PORTB, 5},  // B5 11
+  {&DDRB, &PINB, &PORTB, 6},  // B6 12
+  {&DDRB, &PINB, &PORTB, 7},  // B7 13
+  {&DDRJ, &PINJ, &PORTJ, 1},  // J1 14
+  {&DDRJ, &PINJ, &PORTJ, 0},  // J0 15
+  {&DDRH, &PINH, &PORTH, 1},  // H1 16
+  {&DDRH, &PINH, &PORTH, 0},  // H0 17
+  {&DDRD, &PIND, &PORTD, 3},  // D3 18
+  {&DDRD, &PIND, &PORTD, 2},  // D2 19
+  {&DDRD, &PIND, &PORTD, 1},  // D1 20
+  {&DDRD, &PIND, &PORTD, 0},  // D0 21
+  {&DDRA, &PINA, &PORTA, 0},  // A0 22
+  {&DDRA, &PINA, &PORTA, 1},  // A1 23
+  {&DDRA, &PINA, &PORTA, 2},  // A2 24
+  {&DDRA, &PINA, &PORTA, 3},  // A3 25
+  {&DDRA, &PINA, &PORTA, 4},  // A4 26
+  {&DDRA, &PINA, &PORTA, 5},  // A5 27
+  {&DDRA, &PINA, &PORTA, 6},  // A6 28
+  {&DDRA, &PINA, &PORTA, 7},  // A7 29
+  {&DDRC, &PINC, &PORTC, 7},  // C7 30
+  {&DDRC, &PINC, &PORTC, 6},  // C6 31
+  {&DDRC, &PINC, &PORTC, 5},  // C5 32
+  {&DDRC, &PINC, &PORTC, 4},  // C4 33
+  {&DDRC, &PINC, &PORTC, 3},  // C3 34
+  {&DDRC, &PINC, &PORTC, 2},  // C2 35
+  {&DDRC, &PINC, &PORTC, 1},  // C1 36
+  {&DDRC, &PINC, &PORTC, 0},  // C0 37
+  {&DDRD, &PIND, &PORTD, 7},  // D7 38
+  {&DDRG, &PING, &PORTG, 2},  // G2 39
+  {&DDRG, &PING, &PORTG, 1},  // G1 40
+  {&DDRG, &PING, &PORTG, 0},  // G0 41
+  {&DDRL, &PINL, &PORTL, 7},  // L7 42
+  {&DDRL, &PINL, &PORTL, 6},  // L6 43
+  {&DDRL, &PINL, &PORTL, 5},  // L5 44
+  {&DDRL, &PINL, &PORTL, 4},  // L4 45
+  {&DDRL, &PINL, &PORTL, 3},  // L3 46
+  {&DDRL, &PINL, &PORTL, 2},  // L2 47
+  {&DDRL, &PINL, &PORTL, 1},  // L1 48
+  {&DDRL, &PINL, &PORTL, 0},  // L0 49
+  {&DDRB, &PINB, &PORTB, 3},  // B3 50
+  {&DDRB, &PINB, &PORTB, 2},  // B2 51
+  {&DDRB, &PINB, &PORTB, 1},  // B1 52
+  {&DDRB, &PINB, &PORTB, 0},  // B0 53
+  {&DDRF, &PINF, &PORTF, 0},  // F0 54
+  {&DDRF, &PINF, &PORTF, 1},  // F1 55
+  {&DDRF, &PINF, &PORTF, 2},  // F2 56
+  {&DDRF, &PINF, &PORTF, 3},  // F3 57
+  {&DDRF, &PINF, &PORTF, 4},  // F4 58
+  {&DDRF, &PINF, &PORTF, 5},  // F5 59
+  {&DDRF, &PINF, &PORTF, 6},  // F6 60
+  {&DDRF, &PINF, &PORTF, 7},  // F7 61
+  {&DDRK, &PINK, &PORTK, 0},  // K0 62
+  {&DDRK, &PINK, &PORTK, 1},  // K1 63
+  {&DDRK, &PINK, &PORTK, 2},  // K2 64
+  {&DDRK, &PINK, &PORTK, 3},  // K3 65
+  {&DDRK, &PINK, &PORTK, 4},  // K4 66
+  {&DDRK, &PINK, &PORTK, 5},  // K5 67
+  {&DDRK, &PINK, &PORTK, 6},  // K6 68
+  {&DDRK, &PINK, &PORTK, 7}   // K7 69
+};
+//------------------------------------------------------------------------------
+#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
+// Sanguino
+
+// Two Wire (aka I2C) ports
+uint8_t const SDA_PIN = 17;
+uint8_t const SCL_PIN = 18;
+
+// SPI port
+uint8_t const SS_PIN = 4;
+uint8_t const MOSI_PIN = 5;
+uint8_t const MISO_PIN = 6;
+uint8_t const SCK_PIN = 7;
+
+static const pin_map_t digitalPinMap[] = {
+  {&DDRB, &PINB, &PORTB, 0},  // B0  0
+  {&DDRB, &PINB, &PORTB, 1},  // B1  1
+  {&DDRB, &PINB, &PORTB, 2},  // B2  2
+  {&DDRB, &PINB, &PORTB, 3},  // B3  3
+  {&DDRB, &PINB, &PORTB, 4},  // B4  4
+  {&DDRB, &PINB, &PORTB, 5},  // B5  5
+  {&DDRB, &PINB, &PORTB, 6},  // B6  6
+  {&DDRB, &PINB, &PORTB, 7},  // B7  7
+  {&DDRD, &PIND, &PORTD, 0},  // D0  8
+  {&DDRD, &PIND, &PORTD, 1},  // D1  9
+  {&DDRD, &PIND, &PORTD, 2},  // D2 10
+  {&DDRD, &PIND, &PORTD, 3},  // D3 11
+  {&DDRD, &PIND, &PORTD, 4},  // D4 12
+  {&DDRD, &PIND, &PORTD, 5},  // D5 13
+  {&DDRD, &PIND, &PORTD, 6},  // D6 14
+  {&DDRD, &PIND, &PORTD, 7},  // D7 15
+  {&DDRC, &PINC, &PORTC, 0},  // C0 16
+  {&DDRC, &PINC, &PORTC, 1},  // C1 17
+  {&DDRC, &PINC, &PORTC, 2},  // C2 18
+  {&DDRC, &PINC, &PORTC, 3},  // C3 19
+  {&DDRC, &PINC, &PORTC, 4},  // C4 20
+  {&DDRC, &PINC, &PORTC, 5},  // C5 21
+  {&DDRC, &PINC, &PORTC, 6},  // C6 22
+  {&DDRC, &PINC, &PORTC, 7},  // C7 23
+  {&DDRA, &PINA, &PORTA, 7},  // A7 24
+  {&DDRA, &PINA, &PORTA, 6},  // A6 25
+  {&DDRA, &PINA, &PORTA, 5},  // A5 26
+  {&DDRA, &PINA, &PORTA, 4},  // A4 27
+  {&DDRA, &PINA, &PORTA, 3},  // A3 28
+  {&DDRA, &PINA, &PORTA, 2},  // A2 29
+  {&DDRA, &PINA, &PORTA, 1},  // A1 30
+  {&DDRA, &PINA, &PORTA, 0}   // A0 31
+};
+//------------------------------------------------------------------------------
+#elif defined(__AVR_ATmega32U4__)
+// Leonardo
+
+// Two Wire (aka I2C) ports
+uint8_t const SDA_PIN = 2;
+uint8_t const SCL_PIN = 3;
+
+// SPI port
+uint8_t const SS_PIN = 17;
+uint8_t const MOSI_PIN = 16;
+uint8_t const MISO_PIN = 14;
+uint8_t const SCK_PIN = 15;
+
+static const pin_map_t digitalPinMap[] = {
+  {&DDRD, &PIND, &PORTD, 2},  // D2  0
+  {&DDRD, &PIND, &PORTD, 3},  // D3  1
+  {&DDRD, &PIND, &PORTD, 1},  // D1  2
+  {&DDRD, &PIND, &PORTD, 0},  // D0  3
+  {&DDRD, &PIND, &PORTD, 4},  // D4  4
+  {&DDRC, &PINC, &PORTC, 6},  // C6  5
+  {&DDRD, &PIND, &PORTD, 7},  // D7  6
+  {&DDRE, &PINE, &PORTE, 6},  // E6  7
+  {&DDRB, &PINB, &PORTB, 4},  // B4  8
+  {&DDRB, &PINB, &PORTB, 5},  // B5  9
+  {&DDRB, &PINB, &PORTB, 6},  // B6 10
+  {&DDRB, &PINB, &PORTB, 7},  // B7 11
+  {&DDRD, &PIND, &PORTD, 6},  // D6 12
+  {&DDRC, &PINC, &PORTC, 7},  // C7 13
+  {&DDRB, &PINB, &PORTB, 3},  // B3 14
+  {&DDRB, &PINB, &PORTB, 1},  // B1 15
+  {&DDRB, &PINB, &PORTB, 2},  // B2 16
+  {&DDRB, &PINB, &PORTB, 0},  // B0 17
+  {&DDRF, &PINF, &PORTF, 7},  // F7 18
+  {&DDRF, &PINF, &PORTF, 6},  // F6 19
+  {&DDRF, &PINF, &PORTF, 5},  // F5 20
+  {&DDRF, &PINF, &PORTF, 4},  // F4 21
+  {&DDRF, &PINF, &PORTF, 1},  // F1 22
+  {&DDRF, &PINF, &PORTF, 0},  // F0 23
+};
+//------------------------------------------------------------------------------
+#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
+// Teensy++ 1.0 & 2.0
+
+// Two Wire (aka I2C) ports
+uint8_t const SDA_PIN = 1;
+uint8_t const SCL_PIN = 0;
+
+// SPI port
+uint8_t const SS_PIN = 20;
+uint8_t const MOSI_PIN = 22;
+uint8_t const MISO_PIN = 23;
+uint8_t const SCK_PIN = 21;
+
+static const pin_map_t digitalPinMap[] = {
+  {&DDRD, &PIND, &PORTD, 0},  // D0  0
+  {&DDRD, &PIND, &PORTD, 1},  // D1  1
+  {&DDRD, &PIND, &PORTD, 2},  // D2  2
+  {&DDRD, &PIND, &PORTD, 3},  // D3  3
+  {&DDRD, &PIND, &PORTD, 4},  // D4  4
+  {&DDRD, &PIND, &PORTD, 5},  // D5  5
+  {&DDRD, &PIND, &PORTD, 6},  // D6  6
+  {&DDRD, &PIND, &PORTD, 7},  // D7  7
+  {&DDRE, &PINE, &PORTE, 0},  // E0  8
+  {&DDRE, &PINE, &PORTE, 1},  // E1  9
+  {&DDRC, &PINC, &PORTC, 0},  // C0 10
+  {&DDRC, &PINC, &PORTC, 1},  // C1 11
+  {&DDRC, &PINC, &PORTC, 2},  // C2 12
+  {&DDRC, &PINC, &PORTC, 3},  // C3 13
+  {&DDRC, &PINC, &PORTC, 4},  // C4 14
+  {&DDRC, &PINC, &PORTC, 5},  // C5 15
+  {&DDRC, &PINC, &PORTC, 6},  // C6 16
+  {&DDRC, &PINC, &PORTC, 7},  // C7 17
+  {&DDRE, &PINE, &PORTE, 6},  // E6 18
+  {&DDRE, &PINE, &PORTE, 7},  // E7 19
+  {&DDRB, &PINB, &PORTB, 0},  // B0 20
+  {&DDRB, &PINB, &PORTB, 1},  // B1 21
+  {&DDRB, &PINB, &PORTB, 2},  // B2 22
+  {&DDRB, &PINB, &PORTB, 3},  // B3 23
+  {&DDRB, &PINB, &PORTB, 4},  // B4 24
+  {&DDRB, &PINB, &PORTB, 5},  // B5 25
+  {&DDRB, &PINB, &PORTB, 6},  // B6 26
+  {&DDRB, &PINB, &PORTB, 7},  // B7 27
+  {&DDRA, &PINA, &PORTA, 0},  // A0 28
+  {&DDRA, &PINA, &PORTA, 1},  // A1 29
+  {&DDRA, &PINA, &PORTA, 2},  // A2 30
+  {&DDRA, &PINA, &PORTA, 3},  // A3 31
+  {&DDRA, &PINA, &PORTA, 4},  // A4 32
+  {&DDRA, &PINA, &PORTA, 5},  // A5 33
+  {&DDRA, &PINA, &PORTA, 6},  // A6 34
+  {&DDRA, &PINA, &PORTA, 7},  // A7 35
+  {&DDRE, &PINE, &PORTE, 4},  // E4 36
+  {&DDRE, &PINE, &PORTE, 5},  // E5 37
+  {&DDRF, &PINF, &PORTF, 0},  // F0 38
+  {&DDRF, &PINF, &PORTF, 1},  // F1 39
+  {&DDRF, &PINF, &PORTF, 2},  // F2 40
+  {&DDRF, &PINF, &PORTF, 3},  // F3 41
+  {&DDRF, &PINF, &PORTF, 4},  // F4 42
+  {&DDRF, &PINF, &PORTF, 5},  // F5 43
+  {&DDRF, &PINF, &PORTF, 6},  // F6 44
+  {&DDRF, &PINF, &PORTF, 7}   // F7 45
+};
+//------------------------------------------------------------------------------
+#else  // defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+// 168 and 328 Arduinos
+
+// Two Wire (aka I2C) ports
+uint8_t const SDA_PIN = 18;
+uint8_t const SCL_PIN = 19;
+
+// SPI port
+uint8_t const SS_PIN = 10;
+uint8_t const MOSI_PIN = 11;
+uint8_t const MISO_PIN = 12;
+uint8_t const SCK_PIN = 13;
+
+static const pin_map_t digitalPinMap[] = {
+  {&DDRD, &PIND, &PORTD, 0},  // D0  0
+  {&DDRD, &PIND, &PORTD, 1},  // D1  1
+  {&DDRD, &PIND, &PORTD, 2},  // D2  2
+  {&DDRD, &PIND, &PORTD, 3},  // D3  3
+  {&DDRD, &PIND, &PORTD, 4},  // D4  4
+  {&DDRD, &PIND, &PORTD, 5},  // D5  5
+  {&DDRD, &PIND, &PORTD, 6},  // D6  6
+  {&DDRD, &PIND, &PORTD, 7},  // D7  7
+  {&DDRB, &PINB, &PORTB, 0},  // B0  8
+  {&DDRB, &PINB, &PORTB, 1},  // B1  9
+  {&DDRB, &PINB, &PORTB, 2},  // B2 10
+  {&DDRB, &PINB, &PORTB, 3},  // B3 11
+  {&DDRB, &PINB, &PORTB, 4},  // B4 12
+  {&DDRB, &PINB, &PORTB, 5},  // B5 13
+  {&DDRC, &PINC, &PORTC, 0},  // C0 14
+  {&DDRC, &PINC, &PORTC, 1},  // C1 15
+  {&DDRC, &PINC, &PORTC, 2},  // C2 16
+  {&DDRC, &PINC, &PORTC, 3},  // C3 17
+  {&DDRC, &PINC, &PORTC, 4},  // C4 18
+  {&DDRC, &PINC, &PORTC, 5}   // C5 19
+};
+#endif  // defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+//------------------------------------------------------------------------------
+static const uint8_t digitalPinCount = sizeof(digitalPinMap)/sizeof(pin_map_t);
+
+uint8_t badPinNumber(void)
+  __attribute__((error("Pin number is too large or not a constant")));
+
+static inline __attribute__((always_inline))
+  uint8_t getPinMode(uint8_t pin) {
+  if (__builtin_constant_p(pin) && pin < digitalPinCount) {
+    return (*digitalPinMap[pin].ddr >> digitalPinMap[pin].bit) & 1;
+  } else {
+    return badPinNumber();
+  }
+}
+static inline __attribute__((always_inline))
+  void setPinMode(uint8_t pin, uint8_t mode) {
+  if (__builtin_constant_p(pin) && pin < digitalPinCount) {
+    if (mode) {
+      *digitalPinMap[pin].ddr |= 1 << digitalPinMap[pin].bit;
+    } else {
+      *digitalPinMap[pin].ddr &= ~(1 << digitalPinMap[pin].bit);
+    }
+  } else {
+    badPinNumber();
+  }
+}
+static inline __attribute__((always_inline))
+  uint8_t fastDigitalRead(uint8_t pin) {
+  if (__builtin_constant_p(pin) && pin < digitalPinCount) {
+    return (*digitalPinMap[pin].pin >> digitalPinMap[pin].bit) & 1;
+  } else {
+    return badPinNumber();
+  }
+}
+static inline __attribute__((always_inline))
+  void fastDigitalWrite(uint8_t pin, uint8_t value) {
+  if (__builtin_constant_p(pin) && pin < digitalPinCount) {
+    if (value) {
+      *digitalPinMap[pin].port |= 1 << digitalPinMap[pin].bit;
+    } else {
+      *digitalPinMap[pin].port &= ~(1 << digitalPinMap[pin].bit);
+    }
+  } else {
+    badPinNumber();
+  }
+}
+#endif  // Sd2PinMap_h
+
+#else
+#error Architecture or board not supported.
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFat.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFat.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFat.h	(revision 136)
@@ -0,0 +1,551 @@
+/* Arduino SdFat Library
+ * Copyright (C) 2009 by William Greiman
+ *
+ * This file is part of the Arduino SdFat Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino SdFat Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#ifndef SdFat_h
+#define SdFat_h
+/**
+ * \file
+ * SdFile and SdVolume classes
+ */
+#ifdef __AVR__
+#include <avr/pgmspace.h>
+#endif
+#include "Sd2Card.h"
+#include "FatStructs.h"
+#include "Print.h"
+//------------------------------------------------------------------------------
+/**
+ * Allow use of deprecated functions if non-zero
+ */
+#define ALLOW_DEPRECATED_FUNCTIONS 1
+//------------------------------------------------------------------------------
+// forward declaration since SdVolume is used in SdFile
+class SdVolume;
+//==============================================================================
+// SdFile class
+
+// flags for ls()
+/** ls() flag to print modify date */
+uint8_t const LS_DATE = 1;
+/** ls() flag to print file size */
+uint8_t const LS_SIZE = 2;
+/** ls() flag for recursive list of subdirectories */
+uint8_t const LS_R = 4;
+
+// use the gnu style oflag in open()
+/** open() oflag for reading */
+uint8_t const O_READ = 0X01;
+/** open() oflag - same as O_READ */
+uint8_t const O_RDONLY = O_READ;
+/** open() oflag for write */
+uint8_t const O_WRITE = 0X02;
+/** open() oflag - same as O_WRITE */
+uint8_t const O_WRONLY = O_WRITE;
+/** open() oflag for reading and writing */
+uint8_t const O_RDWR = (O_READ | O_WRITE);
+/** open() oflag mask for access modes */
+uint8_t const O_ACCMODE = (O_READ | O_WRITE);
+/** The file offset shall be set to the end of the file prior to each write. */
+uint8_t const O_APPEND = 0X04;
+/** synchronous writes - call sync() after each write */
+uint8_t const O_SYNC = 0X08;
+/** create the file if nonexistent */
+uint8_t const O_CREAT = 0X10;
+/** If O_CREAT and O_EXCL are set, open() shall fail if the file exists */
+uint8_t const O_EXCL = 0X20;
+/** truncate the file to zero length */
+uint8_t const O_TRUNC = 0X40;
+
+// flags for timestamp
+/** set the file's last access date */
+uint8_t const T_ACCESS = 1;
+/** set the file's creation date and time */
+uint8_t const T_CREATE = 2;
+/** Set the file's write date and time */
+uint8_t const T_WRITE = 4;
+// values for type_
+/** This SdFile has not been opened. */
+uint8_t const FAT_FILE_TYPE_CLOSED = 0;
+/** SdFile for a file */
+uint8_t const FAT_FILE_TYPE_NORMAL = 1;
+/** SdFile for a FAT16 root directory */
+uint8_t const FAT_FILE_TYPE_ROOT16 = 2;
+/** SdFile for a FAT32 root directory */
+uint8_t const FAT_FILE_TYPE_ROOT32 = 3;
+/** SdFile for a subdirectory */
+uint8_t const FAT_FILE_TYPE_SUBDIR = 4;
+/** Test value for directory type */
+uint8_t const FAT_FILE_TYPE_MIN_DIR = FAT_FILE_TYPE_ROOT16;
+
+/** date field for FAT directory entry */
+static inline uint16_t FAT_DATE(uint16_t year, uint8_t month, uint8_t day) {
+  return (year - 1980) << 9 | month << 5 | day;
+}
+/** year part of FAT directory date field */
+static inline uint16_t FAT_YEAR(uint16_t fatDate) {
+  return 1980 + (fatDate >> 9);
+}
+/** month part of FAT directory date field */
+static inline uint8_t FAT_MONTH(uint16_t fatDate) {
+  return (fatDate >> 5) & 0XF;
+}
+/** day part of FAT directory date field */
+static inline uint8_t FAT_DAY(uint16_t fatDate) {
+  return fatDate & 0X1F;
+}
+/** time field for FAT directory entry */
+static inline uint16_t FAT_TIME(uint8_t hour, uint8_t minute, uint8_t second) {
+  return hour << 11 | minute << 5 | second >> 1;
+}
+/** hour part of FAT directory time field */
+static inline uint8_t FAT_HOUR(uint16_t fatTime) {
+  return fatTime >> 11;
+}
+/** minute part of FAT directory time field */
+static inline uint8_t FAT_MINUTE(uint16_t fatTime) {
+  return(fatTime >> 5) & 0X3F;
+}
+/** second part of FAT directory time field */
+static inline uint8_t FAT_SECOND(uint16_t fatTime) {
+  return 2*(fatTime & 0X1F);
+}
+/** Default date for file timestamps is 1 Jan 2000 */
+uint16_t const FAT_DEFAULT_DATE = ((2000 - 1980) << 9) | (1 << 5) | 1;
+/** Default time for file timestamp is 1 am */
+uint16_t const FAT_DEFAULT_TIME = (1 << 11);
+//------------------------------------------------------------------------------
+/**
+ * \class SdFile
+ * \brief Access FAT16 and FAT32 files on SD and SDHC cards.
+ */
+class SdFile : public Print {
+ public:
+  /** Create an instance of SdFile. */
+  SdFile(void) : type_(FAT_FILE_TYPE_CLOSED) {}
+  /**
+   * writeError is set to true if an error occurs during a write().
+   * Set writeError to false before calling print() and/or write() and check
+   * for true after calls to print() and/or write().
+   */
+  //bool writeError;
+  /**
+   * Cancel unbuffered reads for this file.
+   * See setUnbufferedRead()
+   */
+  void clearUnbufferedRead(void) {
+    flags_ &= ~F_FILE_UNBUFFERED_READ;
+  }
+  uint8_t close(void);
+  uint8_t contiguousRange(uint32_t* bgnBlock, uint32_t* endBlock);
+  uint8_t createContiguous(SdFile* dirFile,
+          const char* fileName, uint32_t size);
+  /** \return The current cluster number for a file or directory. */
+  uint32_t curCluster(void) const {return curCluster_;}
+  /** \return The current position for a file or directory. */
+  uint32_t curPosition(void) const {return curPosition_;}
+  /**
+   * Set the date/time callback function
+   *
+   * \param[in] dateTime The user's call back function.  The callback
+   * function is of the form:
+   *
+   * \code
+   * void dateTime(uint16_t* date, uint16_t* time) {
+   *   uint16_t year;
+   *   uint8_t month, day, hour, minute, second;
+   *
+   *   // User gets date and time from GPS or real-time clock here
+   *
+   *   // return date using FAT_DATE macro to format fields
+   *   *date = FAT_DATE(year, month, day);
+   *
+   *   // return time using FAT_TIME macro to format fields
+   *   *time = FAT_TIME(hour, minute, second);
+   * }
+   * \endcode
+   *
+   * Sets the function that is called when a file is created or when
+   * a file's directory entry is modified by sync(). All timestamps,
+   * access, creation, and modify, are set when a file is created.
+   * sync() maintains the last access date and last modify date/time.
+   *
+   * See the timestamp() function.
+   */
+  static void dateTimeCallback(
+    void (*dateTime)(uint16_t* date, uint16_t* time)) {
+    dateTime_ = dateTime;
+  }
+  /**
+   * Cancel the date/time callback function.
+   */
+  static void dateTimeCallbackCancel(void) {
+    // use explicit zero since NULL is not defined for Sanguino
+    dateTime_ = 0;
+  }
+  /** \return Address of the block that contains this file's directory. */
+  uint32_t dirBlock(void) const {return dirBlock_;}
+  uint8_t dirEntry(dir_t* dir);
+  /** \return Index of this file's directory in the block dirBlock. */
+  uint8_t dirIndex(void) const {return dirIndex_;}
+  static void dirName(const dir_t& dir, char* name);
+  /** \return The total number of bytes in a file or directory. */
+  uint32_t fileSize(void) const {return fileSize_;}
+  /** \return The first cluster number for a file or directory. */
+  uint32_t firstCluster(void) const {return firstCluster_;}
+  /** \return True if this is a SdFile for a directory else false. */
+  uint8_t isDir(void) const {return type_ >= FAT_FILE_TYPE_MIN_DIR;}
+  /** \return True if this is a SdFile for a file else false. */
+  uint8_t isFile(void) const {return type_ == FAT_FILE_TYPE_NORMAL;}
+  /** \return True if this is a SdFile for an open file/directory else false. */
+  uint8_t isOpen(void) const {return type_ != FAT_FILE_TYPE_CLOSED;}
+  /** \return True if this is a SdFile for a subdirectory else false. */
+  uint8_t isSubDir(void) const {return type_ == FAT_FILE_TYPE_SUBDIR;}
+  /** \return True if this is a SdFile for the root directory. */
+  uint8_t isRoot(void) const {
+    return type_ == FAT_FILE_TYPE_ROOT16 || type_ == FAT_FILE_TYPE_ROOT32;
+  }
+  void ls(uint8_t flags = 0, uint8_t indent = 0);
+  uint8_t makeDir(SdFile* dir, const char* dirName);
+  uint8_t open(SdFile* dirFile, uint16_t index, uint8_t oflag);
+  uint8_t open(SdFile* dirFile, const char* fileName, uint8_t oflag);
+
+  uint8_t openRoot(SdVolume* vol);
+  static void printDirName(const dir_t& dir, uint8_t width);
+  static void printFatDate(uint16_t fatDate);
+  static void printFatTime(uint16_t fatTime);
+  static void printTwoDigits(uint8_t v);
+  /**
+   * Read the next byte from a file.
+   *
+   * \return For success read returns the next byte in the file as an int.
+   * If an error occurs or end of file is reached -1 is returned.
+   */
+  int16_t read(void) {
+    uint8_t b;
+    return read(&b, 1) == 1 ? b : -1;
+  }
+  int16_t read(void* buf, uint16_t nbyte);
+  int8_t readDir(dir_t* dir);
+  static uint8_t remove(SdFile* dirFile, const char* fileName);
+  uint8_t remove(void);
+  /** Set the file's current position to zero. */
+  void rewind(void) {
+    curPosition_ = curCluster_ = 0;
+  }
+  uint8_t rmDir(void);
+  uint8_t rmRfStar(void);
+  /** Set the files position to current position + \a pos. See seekSet(). */
+  uint8_t seekCur(uint32_t pos) {
+    return seekSet(curPosition_ + pos);
+  }
+  /**
+   *  Set the files current position to end of file.  Useful to position
+   *  a file for append. See seekSet().
+   */
+  uint8_t seekEnd(void) {return seekSet(fileSize_);}
+  uint8_t seekSet(uint32_t pos);
+  /**
+   * Use unbuffered reads to access this file.  Used with Wave
+   * Shield ISR.  Used with Sd2Card::partialBlockRead() in WaveRP.
+   *
+   * Not recommended for normal applications.
+   */
+  void setUnbufferedRead(void) {
+    if (isFile()) flags_ |= F_FILE_UNBUFFERED_READ;
+  }
+  uint8_t timestamp(uint8_t flag, uint16_t year, uint8_t month, uint8_t day,
+          uint8_t hour, uint8_t minute, uint8_t second);
+  uint8_t sync(void);
+  /** Type of this SdFile.  You should use isFile() or isDir() instead of type()
+   * if possible.
+   *
+   * \return The file or directory type.
+   */
+  uint8_t type(void) const {return type_;}
+  uint8_t truncate(uint32_t size);
+  /** \return Unbuffered read flag. */
+  uint8_t unbufferedRead(void) const {
+    return flags_ & F_FILE_UNBUFFERED_READ;
+  }
+  /** \return SdVolume that contains this file. */
+  SdVolume* volume(void) const {return vol_;}
+  size_t write(uint8_t b);
+  size_t write(const void* buf, uint16_t nbyte);
+  size_t write(const char* str);
+#ifdef __AVR__
+  void write_P(PGM_P str);
+  void writeln_P(PGM_P str);
+#endif
+//------------------------------------------------------------------------------
+#if ALLOW_DEPRECATED_FUNCTIONS
+// Deprecated functions  - suppress cpplint warnings with NOLINT comment
+  /** \deprecated Use:
+   * uint8_t SdFile::contiguousRange(uint32_t* bgnBlock, uint32_t* endBlock);
+   */
+  uint8_t contiguousRange(uint32_t& bgnBlock, uint32_t& endBlock) {  // NOLINT
+    return contiguousRange(&bgnBlock, &endBlock);
+  }
+ /** \deprecated Use:
+   * uint8_t SdFile::createContiguous(SdFile* dirFile,
+   *   const char* fileName, uint32_t size)
+   */
+  uint8_t createContiguous(SdFile& dirFile,  // NOLINT
+    const char* fileName, uint32_t size) {
+    return createContiguous(&dirFile, fileName, size);
+  }
+
+  /**
+   * \deprecated Use:
+   * static void SdFile::dateTimeCallback(
+   *   void (*dateTime)(uint16_t* date, uint16_t* time));
+   */
+  static void dateTimeCallback(
+    void (*dateTime)(uint16_t& date, uint16_t& time)) {  // NOLINT
+    oldDateTime_ = dateTime;
+    dateTime_ = dateTime ? oldToNew : 0;
+  }
+  /** \deprecated Use: uint8_t SdFile::dirEntry(dir_t* dir); */
+  uint8_t dirEntry(dir_t& dir) {return dirEntry(&dir);}  // NOLINT
+  /** \deprecated Use:
+   * uint8_t SdFile::makeDir(SdFile* dir, const char* dirName);
+   */
+  uint8_t makeDir(SdFile& dir, const char* dirName) {  // NOLINT
+    return makeDir(&dir, dirName);
+  }
+  /** \deprecated Use:
+   * uint8_t SdFile::open(SdFile* dirFile, const char* fileName, uint8_t oflag);
+   */
+  uint8_t open(SdFile& dirFile, // NOLINT
+    const char* fileName, uint8_t oflag) {
+    return open(&dirFile, fileName, oflag);
+  }
+  /** \deprecated  Do not use in new apps */
+  uint8_t open(SdFile& dirFile, const char* fileName) {  // NOLINT
+    return open(dirFile, fileName, O_RDWR);
+  }
+  /** \deprecated Use:
+   * uint8_t SdFile::open(SdFile* dirFile, uint16_t index, uint8_t oflag);
+   */
+  uint8_t open(SdFile& dirFile, uint16_t index, uint8_t oflag) {  // NOLINT
+    return open(&dirFile, index, oflag);
+  }
+  /** \deprecated Use: uint8_t SdFile::openRoot(SdVolume* vol); */
+  uint8_t openRoot(SdVolume& vol) {return openRoot(&vol);}  // NOLINT
+
+  /** \deprecated Use: int8_t SdFile::readDir(dir_t* dir); */
+  int8_t readDir(dir_t& dir) {return readDir(&dir);}  // NOLINT
+  /** \deprecated Use:
+   * static uint8_t SdFile::remove(SdFile* dirFile, const char* fileName);
+   */
+  static uint8_t remove(SdFile& dirFile, const char* fileName) {  // NOLINT
+    return remove(&dirFile, fileName);
+  }
+//------------------------------------------------------------------------------
+// rest are private
+ private:
+  static void (*oldDateTime_)(uint16_t& date, uint16_t& time);  // NOLINT
+  static void oldToNew(uint16_t* date, uint16_t* time) {
+    uint16_t d;
+    uint16_t t;
+    oldDateTime_(d, t);
+    *date = d;
+    *time = t;
+  }
+#endif  // ALLOW_DEPRECATED_FUNCTIONS
+ private:
+  // bits defined in flags_
+  // should be 0XF
+  static uint8_t const F_OFLAG = (O_ACCMODE | O_APPEND | O_SYNC);
+  // available bits
+  static uint8_t const F_UNUSED = 0X30;
+  // use unbuffered SD read
+  static uint8_t const F_FILE_UNBUFFERED_READ = 0X40;
+  // sync of directory entry required
+  static uint8_t const F_FILE_DIR_DIRTY = 0X80;
+
+// make sure F_OFLAG is ok
+#if ((F_UNUSED | F_FILE_UNBUFFERED_READ | F_FILE_DIR_DIRTY) & F_OFLAG)
+#error flags_ bits conflict
+#endif  // flags_ bits
+
+  // private data
+  uint8_t   flags_;         // See above for definition of flags_ bits
+  uint8_t   type_;          // type of file see above for values
+  uint32_t  curCluster_;    // cluster for current file position
+  uint32_t  curPosition_;   // current file position in bytes from beginning
+  uint32_t  dirBlock_;      // SD block that contains directory entry for file
+  uint8_t   dirIndex_;      // index of entry in dirBlock 0 <= dirIndex_ <= 0XF
+  uint32_t  fileSize_;      // file size in bytes
+  uint32_t  firstCluster_;  // first cluster of file
+  SdVolume* vol_;           // volume where file is located
+
+  // private functions
+  uint8_t addCluster(void);
+  uint8_t addDirCluster(void);
+  dir_t* cacheDirEntry(uint8_t action);
+  static void (*dateTime_)(uint16_t* date, uint16_t* time);
+  static uint8_t make83Name(const char* str, uint8_t* name);
+  uint8_t openCachedEntry(uint8_t cacheIndex, uint8_t oflags);
+  dir_t* readDirCache(void);
+};
+//==============================================================================
+// SdVolume class
+/**
+ * \brief Cache for an SD data block
+ */
+union cache_t {
+           /** Used to access cached file data blocks. */
+  uint8_t  data[512];
+           /** Used to access cached FAT16 entries. */
+  uint16_t fat16[256];
+           /** Used to access cached FAT32 entries. */
+  uint32_t fat32[128];
+           /** Used to access cached directory entries. */
+  dir_t    dir[16];
+           /** Used to access a cached MasterBoot Record. */
+  mbr_t    mbr;
+           /** Used to access to a cached FAT boot sector. */
+  fbs_t    fbs;
+};
+//------------------------------------------------------------------------------
+/**
+ * \class SdVolume
+ * \brief Access FAT16 and FAT32 volumes on SD and SDHC cards.
+ */
+class SdVolume {
+ public:
+  /** Create an instance of SdVolume */
+  SdVolume(void) :allocSearchStart_(2), fatType_(0) {}
+  /** Clear the cache and returns a pointer to the cache.  Used by the WaveRP
+   *  recorder to do raw write to the SD card.  Not for normal apps.
+   */
+  static uint8_t* cacheClear(void) {
+    cacheFlush();
+    cacheBlockNumber_ = 0XFFFFFFFF;
+    return cacheBuffer_.data;
+  }
+  /**
+   * Initialize a FAT volume.  Try partition one first then try super
+   * floppy format.
+   *
+   * \param[in] dev The Sd2Card where the volume is located.
+   *
+   * \return The value one, true, is returned for success and
+   * the value zero, false, is returned for failure.  Reasons for
+   * failure include not finding a valid partition, not finding a valid
+   * FAT file system or an I/O error.
+   */
+  uint8_t init(Sd2Card* dev) { return init(dev, 1) ? true : init(dev, 0);}
+  uint8_t init(Sd2Card* dev, uint8_t part);
+
+  // inline functions that return volume info
+  /** \return The volume's cluster size in blocks. */
+  uint8_t blocksPerCluster(void) const {return blocksPerCluster_;}
+  /** \return The number of blocks in one FAT. */
+  uint32_t blocksPerFat(void)  const {return blocksPerFat_;}
+  /** \return The total number of clusters in the volume. */
+  uint32_t clusterCount(void) const {return clusterCount_;}
+  /** \return The shift count required to multiply by blocksPerCluster. */
+  uint8_t clusterSizeShift(void) const {return clusterSizeShift_;}
+  /** \return The logical block number for the start of file data. */
+  uint32_t dataStartBlock(void) const {return dataStartBlock_;}
+  /** \return The number of FAT structures on the volume. */
+  uint8_t fatCount(void) const {return fatCount_;}
+  /** \return The logical block number for the start of the first FAT. */
+  uint32_t fatStartBlock(void) const {return fatStartBlock_;}
+  /** \return The FAT type of the volume. Values are 12, 16 or 32. */
+  uint8_t fatType(void) const {return fatType_;}
+  /** \return The number of entries in the root directory for FAT16 volumes. */
+  uint32_t rootDirEntryCount(void) const {return rootDirEntryCount_;}
+  /** \return The logical block number for the start of the root directory
+       on FAT16 volumes or the first cluster number on FAT32 volumes. */
+  uint32_t rootDirStart(void) const {return rootDirStart_;}
+  /** return a pointer to the Sd2Card object for this volume */
+  static Sd2Card* sdCard(void) {return sdCard_;}
+//------------------------------------------------------------------------------
+#if ALLOW_DEPRECATED_FUNCTIONS
+  // Deprecated functions  - suppress cpplint warnings with NOLINT comment
+  /** \deprecated Use: uint8_t SdVolume::init(Sd2Card* dev); */
+  uint8_t init(Sd2Card& dev) {return init(&dev);}  // NOLINT
+
+  /** \deprecated Use: uint8_t SdVolume::init(Sd2Card* dev, uint8_t vol); */
+  uint8_t init(Sd2Card& dev, uint8_t part) {  // NOLINT
+    return init(&dev, part);
+  }
+#endif  // ALLOW_DEPRECATED_FUNCTIONS
+//------------------------------------------------------------------------------
+  private:
+  // Allow SdFile access to SdVolume private data.
+  friend class SdFile;
+
+  // value for action argument in cacheRawBlock to indicate read from cache
+  static uint8_t const CACHE_FOR_READ = 0;
+  // value for action argument in cacheRawBlock to indicate cache dirty
+  static uint8_t const CACHE_FOR_WRITE = 1;
+
+  static cache_t cacheBuffer_;        // 512 byte cache for device blocks
+  static uint32_t cacheBlockNumber_;  // Logical number of block in the cache
+  static Sd2Card* sdCard_;            // Sd2Card object for cache
+  static uint8_t cacheDirty_;         // cacheFlush() will write block if true
+  static uint32_t cacheMirrorBlock_;  // block number for mirror FAT
+//
+  uint32_t allocSearchStart_;   // start cluster for alloc search
+  uint8_t blocksPerCluster_;    // cluster size in blocks
+  uint32_t blocksPerFat_;       // FAT size in blocks
+  uint32_t clusterCount_;       // clusters in one FAT
+  uint8_t clusterSizeShift_;    // shift to convert cluster count to block count
+  uint32_t dataStartBlock_;     // first data block number
+  uint8_t fatCount_;            // number of FATs on volume
+  uint32_t fatStartBlock_;      // start block for first FAT
+  uint8_t fatType_;             // volume type (12, 16, OR 32)
+  uint16_t rootDirEntryCount_;  // number of entries in FAT16 root dir
+  uint32_t rootDirStart_;       // root start block for FAT16, cluster for FAT32
+  //----------------------------------------------------------------------------
+  uint8_t allocContiguous(uint32_t count, uint32_t* curCluster);
+  uint8_t blockOfCluster(uint32_t position) const {
+          return (position >> 9) & (blocksPerCluster_ - 1);}
+  uint32_t clusterStartBlock(uint32_t cluster) const {
+           return dataStartBlock_ + ((cluster - 2) << clusterSizeShift_);}
+  uint32_t blockNumber(uint32_t cluster, uint32_t position) const {
+           return clusterStartBlock(cluster) + blockOfCluster(position);}
+  static uint8_t cacheFlush(void);
+  static uint8_t cacheRawBlock(uint32_t blockNumber, uint8_t action);
+  static void cacheSetDirty(void) {cacheDirty_ |= CACHE_FOR_WRITE;}
+  static uint8_t cacheZeroBlock(uint32_t blockNumber);
+  uint8_t chainSize(uint32_t beginCluster, uint32_t* size) const;
+  uint8_t fatGet(uint32_t cluster, uint32_t* value) const;
+  uint8_t fatPut(uint32_t cluster, uint32_t value);
+  uint8_t fatPutEOC(uint32_t cluster) {
+    return fatPut(cluster, 0x0FFFFFFF);
+  }
+  uint8_t freeChain(uint32_t cluster);
+  uint8_t isEOC(uint32_t cluster) const {
+    return  cluster >= (fatType_ == 16 ? FAT16EOC_MIN : FAT32EOC_MIN);
+  }
+  uint8_t readBlock(uint32_t block, uint8_t* dst) {
+    return sdCard_->readBlock(block, dst);}
+  uint8_t readData(uint32_t block, uint16_t offset,
+    uint16_t count, uint8_t* dst) {
+      return sdCard_->readData(block, offset, count, dst);
+  }
+  uint8_t writeBlock(uint32_t block, const uint8_t* dst) {
+    return sdCard_->writeBlock(block, dst);
+  }
+};
+#endif  // SdFat_h
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFatUtil.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFatUtil.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFatUtil.h	(revision 136)
@@ -0,0 +1,75 @@
+/* Arduino SdFat Library
+ * Copyright (C) 2008 by William Greiman
+ *
+ * This file is part of the Arduino SdFat Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino SdFat Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#ifndef SdFatUtil_h
+#define SdFatUtil_h
+/**
+ * \file
+ * Useful utility functions.
+ */
+#include <Arduino.h>
+#ifdef __AVR__
+#include <avr/pgmspace.h>
+/** Store and print a string in flash memory.*/
+#define PgmPrint(x) SerialPrint_P(PSTR(x))
+/** Store and print a string in flash memory followed by a CR/LF.*/
+#define PgmPrintln(x) SerialPrintln_P(PSTR(x))
+/** Defined so doxygen works for function definitions. */
+#endif
+#define NOINLINE __attribute__((noinline,unused))
+#define UNUSEDOK __attribute__((unused))
+//------------------------------------------------------------------------------
+/** Return the number of bytes currently free in RAM. */
+static UNUSEDOK int FreeRam(void) {
+  extern int  __bss_end;
+  extern int* __brkval;
+  int free_memory;
+  if (reinterpret_cast<int>(__brkval) == 0) {
+    // if no heap use from end of bss section
+    free_memory = reinterpret_cast<int>(&free_memory)
+                  - reinterpret_cast<int>(&__bss_end);
+  } else {
+    // use from top of stack to heap
+    free_memory = reinterpret_cast<int>(&free_memory)
+                  - reinterpret_cast<int>(__brkval);
+  }
+  return free_memory;
+}
+#ifdef __AVR__
+//------------------------------------------------------------------------------
+/**
+ * %Print a string in flash memory to the serial port.
+ *
+ * \param[in] str Pointer to string stored in flash memory.
+ */
+static NOINLINE void SerialPrint_P(PGM_P str) {
+  for (uint8_t c; (c = pgm_read_byte(str)); str++) Serial.write(c);
+}
+//------------------------------------------------------------------------------
+/**
+ * %Print a string in flash memory followed by a CR/LF.
+ *
+ * \param[in] str Pointer to string stored in flash memory.
+ */
+static NOINLINE void SerialPrintln_P(PGM_P str) {
+  SerialPrint_P(str);
+  Serial.println();
+}
+#endif  // __AVR__
+#endif  // #define SdFatUtil_h
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFatmainpage.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFatmainpage.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFatmainpage.h	(revision 136)
@@ -0,0 +1,202 @@
+/* Arduino SdFat Library
+ * Copyright (C) 2009 by William Greiman
+ *  
+ * This file is part of the Arduino SdFat Library
+ *  
+ * This Library is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ * 
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino SdFat Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+/**
+\mainpage Arduino SdFat Library
+<CENTER>Copyright &copy; 2009 by William Greiman
+</CENTER>
+
+\section Intro Introduction
+The Arduino SdFat Library is a minimal implementation of FAT16 and FAT32
+file systems on SD flash memory cards.  Standard SD and high capacity
+SDHC cards are supported.
+
+The SdFat only supports short 8.3 names.
+
+The main classes in SdFat are Sd2Card, SdVolume, and SdFile.
+
+The Sd2Card class supports access to standard SD cards and SDHC cards.  Most
+applications will only need to call the Sd2Card::init() member function.
+
+The SdVolume class supports FAT16 and FAT32 partitions.  Most applications
+will only need to call the SdVolume::init() member function.
+
+The SdFile class provides file access functions such as open(), read(),
+remove(), write(), close() and sync(). This class supports access to the root
+directory and subdirectories.
+
+A number of example are provided in the SdFat/examples folder.  These were
+developed to test SdFat and illustrate its use.
+
+SdFat was developed for high speed data recording.  SdFat was used to implement
+an audio record/play class, WaveRP, for the Adafruit Wave Shield.  This
+application uses special Sd2Card calls to write to contiguous files in raw mode.
+These functions reduce write latency so that audio can be recorded with the
+small amount of RAM in the Arduino.
+
+\section SDcard SD\SDHC Cards
+
+Arduinos access SD cards using the cards SPI protocol.  PCs, Macs, and
+most consumer devices use the 4-bit parallel SD protocol.  A card that
+functions well on A PC or Mac may not work well on the Arduino.
+
+Most cards have good SPI read performance but cards vary widely in SPI
+write performance.  Write performance is limited by how efficiently the
+card manages internal erase/remapping operations.  The Arduino cannot
+optimize writes to reduce erase operations because of its limit RAM.
+
+SanDisk cards generally have good write performance.  They seem to have
+more internal RAM buffering than other cards and therefore can limit
+the number of flash erase operations that the Arduino forces due to its
+limited RAM.
+
+\section Hardware Hardware Configuration
+
+SdFat was developed using an
+<A HREF = "http://www.adafruit.com/"> Adafruit Industries</A> 
+<A HREF = "http://www.ladyada.net/make/waveshield/"> Wave Shield</A>.
+
+The hardware interface to the SD card should not use a resistor based level
+shifter.  SdFat sets the SPI bus frequency to 8 MHz which results in signal
+rise times that are too slow for the edge detectors in many newer SD card
+controllers when resistor voltage dividers are used.
+
+The 5 to 3.3 V level shifter for 5 V Arduinos should be IC based like the
+74HC4050N based circuit shown in the file SdLevel.png.  The Adafruit Wave Shield
+uses a 74AHC125N.  Gravitech sells SD and MicroSD Card Adapters based on the
+74LCX245.
+
+If you are using a resistor based level shifter and are having problems try
+setting the SPI bus frequency to 4 MHz.  This can be done by using 
+card.init(SPI_HALF_SPEED) to initialize the SD card.
+
+\section comment Bugs and Comments
+
+If you wish to report bugs or have comments, send email to fat16lib@sbcglobal.net.
+
+\section SdFatClass SdFat Usage
+
+SdFat uses a slightly restricted form of short names.
+Only printable ASCII characters are supported. No characters with code point
+values greater than 127 are allowed.  Space is not allowed even though space
+was allowed in the API of early versions of DOS.
+
+Short names are limited to 8 characters followed by an optional period (.)
+and extension of up to 3 characters.  The characters may be any combination
+of letters and digits.  The following special characters are also allowed:
+
+$ % ' - _ @ ~ ` ! ( ) { } ^ # &
+
+Short names are always converted to upper case and their original case
+value is lost.
+
+\note
+  The Arduino Print class uses character
+at a time writes so it was necessary to use a \link SdFile::sync() sync() \endlink
+function to control when data is written to the SD card.
+
+\par
+An application which writes to a file using \link Print::print() print()\endlink,
+\link Print::println() println() \endlink
+or \link SdFile::write write() \endlink must call \link SdFile::sync() sync() \endlink
+at the appropriate time to force data and directory information to be written
+to the SD Card.  Data and directory information are also written to the SD card
+when \link SdFile::close() close() \endlink is called.
+
+\par
+Applications must use care calling \link SdFile::sync() sync() \endlink
+since 2048 bytes of I/O is required to update file and
+directory information.  This includes writing the current data block, reading
+the block that contains the directory entry for update, writing the directory
+block back and reading back the current data block.
+
+It is possible to open a file with two or more instances of SdFile.  A file may
+be corrupted if data is written to the file by more than one instance of SdFile.
+
+\section HowTo How to format SD Cards as FAT Volumes
+
+You should use a freshly formatted SD card for best performance.  FAT
+file systems become slower if many files have been created and deleted.
+This is because the directory entry for a deleted file is marked as deleted,
+but is not deleted.  When a new file is created, these entries must be scanned
+before creating the file, a flaw in the FAT design.  Also files can become
+fragmented which causes reads and writes to be slower.
+
+Microsoft operating systems support removable media formatted with a
+Master Boot Record, MBR, or formatted as a super floppy with a FAT Boot Sector
+in block zero.
+
+Microsoft operating systems expect MBR formatted removable media
+to have only one partition. The first partition should be used.
+
+Microsoft operating systems do not support partitioning SD flash cards.
+If you erase an SD card with a program like KillDisk, Most versions of
+Windows will format the card as a super floppy.
+
+The best way to restore an SD card's format is to use SDFormatter
+which can be downloaded from:
+
+http://www.sdcard.org/consumers/formatter/
+
+SDFormatter aligns flash erase boundaries with file
+system structures which reduces write latency and file system overhead.
+
+SDFormatter does not have an option for FAT type so it may format
+small cards as FAT12.
+
+After the MBR is restored by SDFormatter you may need to reformat small
+cards that have been formatted FAT12 to force the volume type to be FAT16.
+
+If you reformat the SD card with an OS utility, choose a cluster size that
+will result in:
+
+4084 < CountOfClusters && CountOfClusters < 65525
+
+The volume will then be FAT16.
+
+If you are formatting an SD card on OS X or Linux, be sure to use the first
+partition. Format this partition with a cluster count in above range.
+
+\section  References References
+
+Adafruit Industries:
+
+http://www.adafruit.com/
+
+http://www.ladyada.net/make/waveshield/
+
+The Arduino site:
+
+http://www.arduino.cc/
+
+For more information about FAT file systems see:
+
+http://www.microsoft.com/whdc/system/platform/firmware/fatgen.mspx
+
+For information about using SD cards as SPI devices see:
+
+http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
+
+The ATmega328 datasheet:
+
+http://www.atmel.com/dyn/resources/prod_documents/doc8161.pdf
+ 
+
+ */  
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFile.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFile.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdFile.cpp	(revision 136)
@@ -0,0 +1,1316 @@
+/* Arduino SdFat Library
+ * Copyright (C) 2009 by William Greiman
+ *
+ * This file is part of the Arduino SdFat Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino SdFat Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#include "SdFat.h"
+#ifdef __AVR__
+#include <avr/pgmspace.h>
+#endif
+#include <Arduino.h>
+//------------------------------------------------------------------------------
+// callback function for date/time
+void (*SdFile::dateTime_)(uint16_t* date, uint16_t* time) = NULL;
+
+#if ALLOW_DEPRECATED_FUNCTIONS
+// suppress cpplint warnings with NOLINT comment
+void (*SdFile::oldDateTime_)(uint16_t& date, uint16_t& time) = NULL;  // NOLINT
+#endif  // ALLOW_DEPRECATED_FUNCTIONS
+//------------------------------------------------------------------------------
+// add a cluster to a file
+uint8_t SdFile::addCluster() {
+  if (!vol_->allocContiguous(1, &curCluster_)) return false;
+
+  // if first cluster of file link to directory entry
+  if (firstCluster_ == 0) {
+    firstCluster_ = curCluster_;
+    flags_ |= F_FILE_DIR_DIRTY;
+  }
+  return true;
+}
+//------------------------------------------------------------------------------
+// Add a cluster to a directory file and zero the cluster.
+// return with first block of cluster in the cache
+uint8_t SdFile::addDirCluster(void) {
+  if (!addCluster()) return false;
+
+  // zero data in cluster insure first cluster is in cache
+  uint32_t block = vol_->clusterStartBlock(curCluster_);
+  for (uint8_t i = vol_->blocksPerCluster_; i != 0; i--) {
+    if (!SdVolume::cacheZeroBlock(block + i - 1)) return false;
+  }
+  // Increase directory file size by cluster size
+  fileSize_ += 512UL << vol_->clusterSizeShift_;
+  return true;
+}
+//------------------------------------------------------------------------------
+// cache a file's directory entry
+// return pointer to cached entry or null for failure
+dir_t* SdFile::cacheDirEntry(uint8_t action) {
+  if (!SdVolume::cacheRawBlock(dirBlock_, action)) return NULL;
+  return SdVolume::cacheBuffer_.dir + dirIndex_;
+}
+//------------------------------------------------------------------------------
+/**
+ *  Close a file and force cached data and directory information
+ *  to be written to the storage device.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include no file is open or an I/O error.
+ */
+uint8_t SdFile::close(void) {
+  if (!sync())return false;
+  type_ = FAT_FILE_TYPE_CLOSED;
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ * Check for contiguous file and return its raw block range.
+ *
+ * \param[out] bgnBlock the first block address for the file.
+ * \param[out] endBlock the last  block address for the file.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include file is not contiguous, file has zero length
+ * or an I/O error occurred.
+ */
+uint8_t SdFile::contiguousRange(uint32_t* bgnBlock, uint32_t* endBlock) {
+  // error if no blocks
+  if (firstCluster_ == 0) return false;
+
+  for (uint32_t c = firstCluster_; ; c++) {
+    uint32_t next;
+    if (!vol_->fatGet(c, &next)) return false;
+
+    // check for contiguous
+    if (next != (c + 1)) {
+      // error if not end of chain
+      if (!vol_->isEOC(next)) return false;
+      *bgnBlock = vol_->clusterStartBlock(firstCluster_);
+      *endBlock = vol_->clusterStartBlock(c)
+                  + vol_->blocksPerCluster_ - 1;
+      return true;
+    }
+  }
+}
+//------------------------------------------------------------------------------
+/**
+ * Create and open a new contiguous file of a specified size.
+ *
+ * \note This function only supports short DOS 8.3 names.
+ * See open() for more information.
+ *
+ * \param[in] dirFile The directory where the file will be created.
+ * \param[in] fileName A valid DOS 8.3 file name.
+ * \param[in] size The desired file size.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include \a fileName contains
+ * an invalid DOS 8.3 file name, the FAT volume has not been initialized,
+ * a file is already open, the file already exists, the root
+ * directory is full or an I/O error.
+ *
+ */
+uint8_t SdFile::createContiguous(SdFile* dirFile,
+        const char* fileName, uint32_t size) {
+  // don't allow zero length file
+  if (size == 0) return false;
+  if (!open(dirFile, fileName, O_CREAT | O_EXCL | O_RDWR)) return false;
+
+  // calculate number of clusters needed
+  uint32_t count = ((size - 1) >> (vol_->clusterSizeShift_ + 9)) + 1;
+
+  // allocate clusters
+  if (!vol_->allocContiguous(count, &firstCluster_)) {
+    remove();
+    return false;
+  }
+  fileSize_ = size;
+
+  // insure sync() will update dir entry
+  flags_ |= F_FILE_DIR_DIRTY;
+  return sync();
+}
+//------------------------------------------------------------------------------
+/**
+ * Return a files directory entry
+ *
+ * \param[out] dir Location for return of the files directory entry.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t SdFile::dirEntry(dir_t* dir) {
+  // make sure fields on SD are correct
+  if (!sync()) return false;
+
+  // read entry
+  dir_t* p = cacheDirEntry(SdVolume::CACHE_FOR_READ);
+  if (!p) return false;
+
+  // copy to caller's struct
+  memcpy(dir, p, sizeof(dir_t));
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ * Format the name field of \a dir into the 13 byte array
+ * \a name in standard 8.3 short name format.
+ *
+ * \param[in] dir The directory structure containing the name.
+ * \param[out] name A 13 byte char array for the formatted name.
+ */
+void SdFile::dirName(const dir_t& dir, char* name) {
+  uint8_t j = 0;
+  for (uint8_t i = 0; i < 11; i++) {
+    if (dir.name[i] == ' ')continue;
+    if (i == 8) name[j++] = '.';
+    name[j++] = dir.name[i];
+  }
+  name[j] = 0;
+}
+//------------------------------------------------------------------------------
+/** List directory contents to Serial.
+ *
+ * \param[in] flags The inclusive OR of
+ *
+ * LS_DATE - %Print file modification date
+ *
+ * LS_SIZE - %Print file size.
+ *
+ * LS_R - Recursive list of subdirectories.
+ *
+ * \param[in] indent Amount of space before file name. Used for recursive
+ * list to indicate subdirectory level.
+ */
+void SdFile::ls(uint8_t flags, uint8_t indent) {
+  dir_t* p;
+  rewind();
+  while ((p = readDirCache())) {
+    // done if past last used entry
+    if (p->name[0] == DIR_NAME_FREE) break;
+    // skip deleted entry and entries for . and  ..
+    if (p->name[0] == DIR_NAME_DELETED || p->name[0] == '.') continue;
+    // only list subdirectories and files
+    if (!DIR_IS_FILE_OR_SUBDIR(p)) continue;
+    // print any indent spaces
+	#if defined(ARDUINO_ARCH_SAMD)
+    for (int8_t i = 0; i < indent; i++) SerialUSB.print(' ');
+	#else
+	for (int8_t i = 0; i < indent; i++) Serial.print(' ');
+	#endif
+
+    // print file name with possible blank fill
+    printDirName(*p, flags & (LS_DATE | LS_SIZE) ? 14 : 0);
+
+    // print modify date/time if requested
+    if (flags & LS_DATE) {
+       printFatDate(p->lastWriteDate);
+	   #if defined(ARDUINO_ARCH_SAMD)
+       SerialUSB.print(' ');
+	   #else
+	   Serial.print(' ');
+       #endif
+       printFatTime(p->lastWriteTime);
+	   
+    }
+    // print size if requested
+    if (!DIR_IS_SUBDIR(p) && (flags & LS_SIZE)) {
+	  #if defined(ARDUINO_ARCH_SAMD)
+      SerialUSB.print(' ');
+      SerialUSB.print(p->fileSize);
+	  #else
+	  Serial.print(' ');
+      Serial.print(p->fileSize);  
+	  #endif
+    }
+	#if defined(ARDUINO_ARCH_SAMD)
+    SerialUSB.println();
+	#else
+	Serial.println();
+	#endif
+
+    // list subdirectory content if requested
+    if ((flags & LS_R) && DIR_IS_SUBDIR(p)) {
+      uint16_t index = curPosition()/32 - 1;
+      SdFile s;
+      if (s.open(this, index, O_READ)) s.ls(flags, indent + 2);
+      seekSet(32 * (index + 1));
+    }
+  }
+}
+//------------------------------------------------------------------------------
+// format directory name field from a 8.3 name string
+uint8_t SdFile::make83Name(const char* str, uint8_t* name) {
+  uint8_t c;
+  uint8_t n = 7;  // max index for part before dot
+  uint8_t i = 0;
+  // blank fill name and extension
+  while (i < 11) name[i++] = ' ';
+  i = 0;
+  while ((c = *str++) != '\0') {
+    if (c == '.') {
+      if (n == 10) return false;  // only one dot allowed
+      n = 10;  // max index for full 8.3 name
+      i = 8;   // place for extension
+    } else {
+      // illegal FAT characters
+      uint8_t b;
+#if defined(__AVR__)
+      PGM_P p = PSTR("|<>^+=?/[];,*\"\\");
+      while ((b = pgm_read_byte(p++))) if (b == c) return false;
+#elif defined(__arm__)
+      const uint8_t valid[] = "|<>^+=?/[];,*\"\\";
+      const uint8_t *p = valid;
+      while ((b = *p++)) if (b == c) return false;
+#endif
+      // check size and only allow ASCII printable characters
+      if (i > n || c < 0X21 || c > 0X7E)return false;
+      // only upper case allowed in 8.3 names - convert lower to upper
+      name[i++] = c < 'a' || c > 'z' ?  c : c + ('A' - 'a');
+    }
+  }
+  // must have a file name, extension is optional
+  return name[0] != ' ';
+}
+//------------------------------------------------------------------------------
+/** Make a new directory.
+ *
+ * \param[in] dir An open SdFat instance for the directory that will containing
+ * the new directory.
+ *
+ * \param[in] dirName A valid 8.3 DOS name for the new directory.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include this SdFile is already open, \a dir is not a
+ * directory, \a dirName is invalid or already exists in \a dir.
+ */
+uint8_t SdFile::makeDir(SdFile* dir, const char* dirName) {
+  dir_t d;
+
+  // create a normal file
+  if (!open(dir, dirName, O_CREAT | O_EXCL | O_RDWR)) return false;
+
+  // convert SdFile to directory
+  flags_ = O_READ;
+  type_ = FAT_FILE_TYPE_SUBDIR;
+
+  // allocate and zero first cluster
+  if (!addDirCluster())return false;
+
+  // force entry to SD
+  if (!sync()) return false;
+
+  // cache entry - should already be in cache due to sync() call
+  dir_t* p = cacheDirEntry(SdVolume::CACHE_FOR_WRITE);
+  if (!p) return false;
+
+  // change directory entry  attribute
+  p->attributes = DIR_ATT_DIRECTORY;
+
+  // make entry for '.'
+  memcpy(&d, p, sizeof(d));
+  for (uint8_t i = 1; i < 11; i++) d.name[i] = ' ';
+  d.name[0] = '.';
+
+  // cache block for '.'  and '..'
+  uint32_t block = vol_->clusterStartBlock(firstCluster_);
+  if (!SdVolume::cacheRawBlock(block, SdVolume::CACHE_FOR_WRITE)) return false;
+
+  // copy '.' to block
+  memcpy(&SdVolume::cacheBuffer_.dir[0], &d, sizeof(d));
+
+  // make entry for '..'
+  d.name[1] = '.';
+  if (dir->isRoot()) {
+    d.firstClusterLow = 0;
+    d.firstClusterHigh = 0;
+  } else {
+    d.firstClusterLow = dir->firstCluster_ & 0XFFFF;
+    d.firstClusterHigh = dir->firstCluster_ >> 16;
+  }
+  // copy '..' to block
+  memcpy(&SdVolume::cacheBuffer_.dir[1], &d, sizeof(d));
+
+  // set position after '..'
+  curPosition_ = 2 * sizeof(d);
+
+  // write first block
+  return SdVolume::cacheFlush();
+}
+//------------------------------------------------------------------------------
+/**
+ * Open a file or directory by name.
+ *
+ * \param[in] dirFile An open SdFat instance for the directory containing the
+ * file to be opened.
+ *
+ * \param[in] fileName A valid 8.3 DOS name for a file to be opened.
+ *
+ * \param[in] oflag Values for \a oflag are constructed by a bitwise-inclusive
+ * OR of flags from the following list
+ *
+ * O_READ - Open for reading.
+ *
+ * O_RDONLY - Same as O_READ.
+ *
+ * O_WRITE - Open for writing.
+ *
+ * O_WRONLY - Same as O_WRITE.
+ *
+ * O_RDWR - Open for reading and writing.
+ *
+ * O_APPEND - If set, the file offset shall be set to the end of the
+ * file prior to each write.
+ *
+ * O_CREAT - If the file exists, this flag has no effect except as noted
+ * under O_EXCL below. Otherwise, the file shall be created
+ *
+ * O_EXCL - If O_CREAT and O_EXCL are set, open() shall fail if the file exists.
+ *
+ * O_SYNC - Call sync() after each write.  This flag should not be used with
+ * write(uint8_t), write_P(PGM_P), writeln_P(PGM_P), or the Arduino Print class.
+ * These functions do character at a time writes so sync() will be called
+ * after each byte.
+ *
+ * O_TRUNC - If the file exists and is a regular file, and the file is
+ * successfully opened and is not read only, its length shall be truncated to 0.
+ *
+ * \note Directory files must be opened read only.  Write and truncation is
+ * not allowed for directory files.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include this SdFile is already open, \a difFile is not
+ * a directory, \a fileName is invalid, the file does not exist
+ * or can't be opened in the access mode specified by oflag.
+ */
+uint8_t SdFile::open(SdFile* dirFile, const char* fileName, uint8_t oflag) {
+  uint8_t dname[11];
+  dir_t* p;
+
+  // error if already open
+  if (isOpen())return false;
+
+  if (!make83Name(fileName, dname)) return false;
+  vol_ = dirFile->vol_;
+  dirFile->rewind();
+
+  // bool for empty entry found
+  uint8_t emptyFound = false;
+
+  // search for file
+  while (dirFile->curPosition_ < dirFile->fileSize_) {
+    uint8_t index = 0XF & (dirFile->curPosition_ >> 5);
+    p = dirFile->readDirCache();
+    if (p == NULL) return false;
+
+    if (p->name[0] == DIR_NAME_FREE || p->name[0] == DIR_NAME_DELETED) {
+      // remember first empty slot
+      if (!emptyFound) {
+        emptyFound = true;
+        dirIndex_ = index;
+        dirBlock_ = SdVolume::cacheBlockNumber_;
+      }
+      // done if no entries follow
+      if (p->name[0] == DIR_NAME_FREE) break;
+    } else if (!memcmp(dname, p->name, 11)) {
+      // don't open existing file if O_CREAT and O_EXCL
+      if ((oflag & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL)) return false;
+
+      // open found file
+      return openCachedEntry(0XF & index, oflag);
+    }
+  }
+  // only create file if O_CREAT and O_WRITE
+  if ((oflag & (O_CREAT | O_WRITE)) != (O_CREAT | O_WRITE)) return false;
+
+  // cache found slot or add cluster if end of file
+  if (emptyFound) {
+    p = cacheDirEntry(SdVolume::CACHE_FOR_WRITE);
+    if (!p) return false;
+  } else {
+    if (dirFile->type_ == FAT_FILE_TYPE_ROOT16) return false;
+
+    // add and zero cluster for dirFile - first cluster is in cache for write
+    if (!dirFile->addDirCluster()) return false;
+
+    // use first entry in cluster
+    dirIndex_ = 0;
+    p = SdVolume::cacheBuffer_.dir;
+  }
+  // initialize as empty file
+  memset(p, 0, sizeof(dir_t));
+  memcpy(p->name, dname, 11);
+
+  // set timestamps
+  if (dateTime_) {
+    // call user function
+    dateTime_(&p->creationDate, &p->creationTime);
+  } else {
+    // use default date/time
+    p->creationDate = FAT_DEFAULT_DATE;
+    p->creationTime = FAT_DEFAULT_TIME;
+  }
+  p->lastAccessDate = p->creationDate;
+  p->lastWriteDate = p->creationDate;
+  p->lastWriteTime = p->creationTime;
+
+  // force write of entry to SD
+  if (!SdVolume::cacheFlush()) return false;
+
+  // open entry in cache
+  return openCachedEntry(dirIndex_, oflag);
+}
+//------------------------------------------------------------------------------
+/**
+ * Open a file by index.
+ *
+ * \param[in] dirFile An open SdFat instance for the directory.
+ *
+ * \param[in] index The \a index of the directory entry for the file to be
+ * opened.  The value for \a index is (directory file position)/32.
+ *
+ * \param[in] oflag Values for \a oflag are constructed by a bitwise-inclusive
+ * OR of flags O_READ, O_WRITE, O_TRUNC, and O_SYNC.
+ *
+ * See open() by fileName for definition of flags and return values.
+ *
+ */
+uint8_t SdFile::open(SdFile* dirFile, uint16_t index, uint8_t oflag) {
+  // error if already open
+  if (isOpen())return false;
+
+  // don't open existing file if O_CREAT and O_EXCL - user call error
+  if ((oflag & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL)) return false;
+
+  vol_ = dirFile->vol_;
+
+  // seek to location of entry
+  if (!dirFile->seekSet(32 * index)) return false;
+
+  // read entry into cache
+  dir_t* p = dirFile->readDirCache();
+  if (p == NULL) return false;
+
+  // error if empty slot or '.' or '..'
+  if (p->name[0] == DIR_NAME_FREE ||
+      p->name[0] == DIR_NAME_DELETED || p->name[0] == '.') {
+    return false;
+  }
+  // open cached entry
+  return openCachedEntry(index & 0XF, oflag);
+}
+//------------------------------------------------------------------------------
+// open a cached directory entry. Assumes vol_ is initializes
+uint8_t SdFile::openCachedEntry(uint8_t dirIndex, uint8_t oflag) {
+  // location of entry in cache
+  dir_t* p = SdVolume::cacheBuffer_.dir + dirIndex;
+
+  // write or truncate is an error for a directory or read-only file
+  if (p->attributes & (DIR_ATT_READ_ONLY | DIR_ATT_DIRECTORY)) {
+    if (oflag & (O_WRITE | O_TRUNC)) return false;
+  }
+  // remember location of directory entry on SD
+  dirIndex_ = dirIndex;
+  dirBlock_ = SdVolume::cacheBlockNumber_;
+
+  // copy first cluster number for directory fields
+  firstCluster_ = (uint32_t)p->firstClusterHigh << 16;
+  firstCluster_ |= p->firstClusterLow;
+
+  // make sure it is a normal file or subdirectory
+  if (DIR_IS_FILE(p)) {
+    fileSize_ = p->fileSize;
+    type_ = FAT_FILE_TYPE_NORMAL;
+  } else if (DIR_IS_SUBDIR(p)) {
+    if (!vol_->chainSize(firstCluster_, &fileSize_)) return false;
+    type_ = FAT_FILE_TYPE_SUBDIR;
+  } else {
+    return false;
+  }
+  // save open flags for read/write
+  flags_ = oflag & (O_ACCMODE | O_SYNC | O_APPEND);
+
+  // set to start of file
+  curCluster_ = 0;
+  curPosition_ = 0;
+
+  // truncate file to zero length if requested
+  if (oflag & O_TRUNC) return truncate(0);
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ * Open a volume's root directory.
+ *
+ * \param[in] vol The FAT volume containing the root directory to be opened.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include the FAT volume has not been initialized
+ * or it a FAT12 volume.
+ */
+uint8_t SdFile::openRoot(SdVolume* vol) {
+  // error if file is already open
+  if (isOpen()) return false;
+
+  if (vol->fatType() == 16) {
+    type_ = FAT_FILE_TYPE_ROOT16;
+    firstCluster_ = 0;
+    fileSize_ = 32 * vol->rootDirEntryCount();
+  } else if (vol->fatType() == 32) {
+    type_ = FAT_FILE_TYPE_ROOT32;
+    firstCluster_ = vol->rootDirStart();
+    if (!vol->chainSize(firstCluster_, &fileSize_)) return false;
+  } else {
+    // volume is not initialized or FAT12
+    return false;
+  }
+  vol_ = vol;
+  // read only
+  flags_ = O_READ;
+
+  // set to start of file
+  curCluster_ = 0;
+  curPosition_ = 0;
+
+  // root has no directory entry
+  dirBlock_ = 0;
+  dirIndex_ = 0;
+  return true;
+}
+//------------------------------------------------------------------------------
+/** %Print the name field of a directory entry in 8.3 format to Serial.
+ *
+ * \param[in] dir The directory structure containing the name.
+ * \param[in] width Blank fill name if length is less than \a width.
+ */
+void SdFile::printDirName(const dir_t& dir, uint8_t width) {
+  uint8_t w = 0;
+  for (uint8_t i = 0; i < 11; i++) {
+    if (dir.name[i] == ' ')continue;
+    if (i == 8) {
+	  #if defined(ARDUINO_ARCH_SAMD)
+      SerialUSB.print('.');
+	  #else
+	  Serial.print('.');
+	  #endif
+      w++;
+    }
+	#if defined(ARDUINO_ARCH_SAMD)
+    SerialUSB.write(dir.name[i]);
+	#else
+	Serial.write(dir.name[i]);
+	#endif
+    w++;
+  }
+  if (DIR_IS_SUBDIR(&dir)) {
+	#if defined(ARDUINO_ARCH_SAMD)
+    SerialUSB.print('/');
+	#else
+	Serial.print('/');
+	#endif
+    w++;
+  }
+  while (w < width) {
+	#if defined(ARDUINO_ARCH_SAMD)
+    SerialUSB.print(' ');
+	#else
+	Serial.print(' ');
+	#endif
+    w++;
+  }
+}
+//------------------------------------------------------------------------------
+/** %Print a directory date field to Serial.
+ *
+ *  Format is yyyy-mm-dd.
+ *
+ * \param[in] fatDate The date field from a directory entry.
+ */
+void SdFile::printFatDate(uint16_t fatDate) {
+  
+  #if defined(ARDUINO_ARCH_SAMD)
+  SerialUSB.print(FAT_YEAR(fatDate));
+  SerialUSB.print('-');
+  #else
+  Serial.print(FAT_YEAR(fatDate));
+  Serial.print('-');
+  #endif
+  printTwoDigits(FAT_MONTH(fatDate));
+  #if defined(ARDUINO_ARCH_SAMD)
+  SerialUSB.print('-');
+  #else
+  Serial.print('-');
+  #endif
+  printTwoDigits(FAT_DAY(fatDate));
+}
+//------------------------------------------------------------------------------
+/** %Print a directory time field to Serial.
+ *
+ * Format is hh:mm:ss.
+ *
+ * \param[in] fatTime The time field from a directory entry.
+ */
+void SdFile::printFatTime(uint16_t fatTime) {
+  printTwoDigits(FAT_HOUR(fatTime));
+  #if defined(ARDUINO_ARCH_SAMD)
+  SerialUSB.print(':');
+  #else
+  Serial.print(':');
+  #endif
+  printTwoDigits(FAT_MINUTE(fatTime));
+  #if defined(ARDUINO_ARCH_SAMD)
+  SerialUSB.print(':');
+  #else
+  Serial.print(':');
+  #endif
+  printTwoDigits(FAT_SECOND(fatTime));
+}
+//------------------------------------------------------------------------------
+/** %Print a value as two digits to Serial.
+ *
+ * \param[in] v Value to be printed, 0 <= \a v <= 99
+ */
+void SdFile::printTwoDigits(uint8_t v) {
+  char str[3];
+  str[0] = '0' + v/10;
+  str[1] = '0' + v % 10;
+  str[2] = 0;
+  #if defined(ARDUINO_ARCH_SAMD)
+  SerialUSB.print(str);
+  #else
+  Serial.print(str);
+  #endif
+
+}
+//------------------------------------------------------------------------------
+/**
+ * Read data from a file starting at the current position.
+ *
+ * \param[out] buf Pointer to the location that will receive the data.
+ *
+ * \param[in] nbyte Maximum number of bytes to read.
+ *
+ * \return For success read() returns the number of bytes read.
+ * A value less than \a nbyte, including zero, will be returned
+ * if end of file is reached.
+ * If an error occurs, read() returns -1.  Possible errors include
+ * read() called before a file has been opened, corrupt file system
+ * or an I/O error occurred.
+ */
+int16_t SdFile::read(void* buf, uint16_t nbyte) {
+  uint8_t* dst = reinterpret_cast<uint8_t*>(buf);
+
+  // error if not open or write only
+  if (!isOpen() || !(flags_ & O_READ)) return -1;
+
+  // max bytes left in file
+  if (nbyte > (fileSize_ - curPosition_)) nbyte = fileSize_ - curPosition_;
+
+  // amount left to read
+  uint16_t toRead = nbyte;
+  while (toRead > 0) {
+    uint32_t block;  // raw device block number
+    uint16_t offset = curPosition_ & 0X1FF;  // offset in block
+    if (type_ == FAT_FILE_TYPE_ROOT16) {
+      block = vol_->rootDirStart() + (curPosition_ >> 9);
+    } else {
+      uint8_t blockOfCluster = vol_->blockOfCluster(curPosition_);
+      if (offset == 0 && blockOfCluster == 0) {
+        // start of new cluster
+        if (curPosition_ == 0) {
+          // use first cluster in file
+          curCluster_ = firstCluster_;
+        } else {
+          // get next cluster from FAT
+          if (!vol_->fatGet(curCluster_, &curCluster_)) return -1;
+        }
+      }
+      block = vol_->clusterStartBlock(curCluster_) + blockOfCluster;
+    }
+    uint16_t n = toRead;
+
+    // amount to be read from current block
+    if (n > (512 - offset)) n = 512 - offset;
+
+    // no buffering needed if n == 512 or user requests no buffering
+    if ((unbufferedRead() || n == 512) &&
+      block != SdVolume::cacheBlockNumber_) {
+      if (!vol_->readData(block, offset, n, dst)) return -1;
+      dst += n;
+    } else {
+      // read block to cache and copy data to caller
+      if (!SdVolume::cacheRawBlock(block, SdVolume::CACHE_FOR_READ)) return -1;
+      uint8_t* src = SdVolume::cacheBuffer_.data + offset;
+      uint8_t* end = src + n;
+      while (src != end) *dst++ = *src++;
+    }
+    curPosition_ += n;
+    toRead -= n;
+  }
+  return nbyte;
+}
+//------------------------------------------------------------------------------
+/**
+ * Read the next directory entry from a directory file.
+ *
+ * \param[out] dir The dir_t struct that will receive the data.
+ *
+ * \return For success readDir() returns the number of bytes read.
+ * A value of zero will be returned if end of file is reached.
+ * If an error occurs, readDir() returns -1.  Possible errors include
+ * readDir() called before a directory has been opened, this is not
+ * a directory file or an I/O error occurred.
+ */
+int8_t SdFile::readDir(dir_t* dir) {
+  int8_t n;
+  // if not a directory file or miss-positioned return an error
+  if (!isDir() || (0X1F & curPosition_)) return -1;
+
+  while ((n = read(dir, sizeof(dir_t))) == sizeof(dir_t)) {
+    // last entry if DIR_NAME_FREE
+    if (dir->name[0] == DIR_NAME_FREE) break;
+    // skip empty entries and entry for .  and ..
+    if (dir->name[0] == DIR_NAME_DELETED || dir->name[0] == '.') continue;
+    // return if normal file or subdirectory
+    if (DIR_IS_FILE_OR_SUBDIR(dir)) return n;
+  }
+  // error, end of file, or past last entry
+  return n < 0 ? -1 : 0;
+}
+//------------------------------------------------------------------------------
+// Read next directory entry into the cache
+// Assumes file is correctly positioned
+dir_t* SdFile::readDirCache(void) {
+  // error if not directory
+  if (!isDir()) return NULL;
+
+  // index of entry in cache
+  uint8_t i = (curPosition_ >> 5) & 0XF;
+
+  // use read to locate and cache block
+  if (read() < 0) return NULL;
+
+  // advance to next entry
+  curPosition_ += 31;
+
+  // return pointer to entry
+  return (SdVolume::cacheBuffer_.dir + i);
+}
+//------------------------------------------------------------------------------
+/**
+ * Remove a file.
+ *
+ * The directory entry and all data for the file are deleted.
+ *
+ * \note This function should not be used to delete the 8.3 version of a
+ * file that has a long name. For example if a file has the long name
+ * "New Text Document.txt" you should not delete the 8.3 name "NEWTEX~1.TXT".
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include the file read-only, is a directory,
+ * or an I/O error occurred.
+ */
+uint8_t SdFile::remove(void) {
+  // free any clusters - will fail if read-only or directory
+  if (!truncate(0)) return false;
+
+  // cache directory entry
+  dir_t* d = cacheDirEntry(SdVolume::CACHE_FOR_WRITE);
+  if (!d) return false;
+
+  // mark entry deleted
+  d->name[0] = DIR_NAME_DELETED;
+
+  // set this SdFile closed
+  type_ = FAT_FILE_TYPE_CLOSED;
+
+  // write entry to SD
+  return SdVolume::cacheFlush();
+}
+//------------------------------------------------------------------------------
+/**
+ * Remove a file.
+ *
+ * The directory entry and all data for the file are deleted.
+ *
+ * \param[in] dirFile The directory that contains the file.
+ * \param[in] fileName The name of the file to be removed.
+ *
+ * \note This function should not be used to delete the 8.3 version of a
+ * file that has a long name. For example if a file has the long name
+ * "New Text Document.txt" you should not delete the 8.3 name "NEWTEX~1.TXT".
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include the file is a directory, is read only,
+ * \a dirFile is not a directory, \a fileName is not found
+ * or an I/O error occurred.
+ */
+uint8_t SdFile::remove(SdFile* dirFile, const char* fileName) {
+  SdFile file;
+  if (!file.open(dirFile, fileName, O_WRITE)) return false;
+  return file.remove();
+}
+//------------------------------------------------------------------------------
+/** Remove a directory file.
+ *
+ * The directory file will be removed only if it is empty and is not the
+ * root directory.  rmDir() follows DOS and Windows and ignores the
+ * read-only attribute for the directory.
+ *
+ * \note This function should not be used to delete the 8.3 version of a
+ * directory that has a long name. For example if a directory has the
+ * long name "New folder" you should not delete the 8.3 name "NEWFOL~1".
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include the file is not a directory, is the root
+ * directory, is not empty, or an I/O error occurred.
+ */
+uint8_t SdFile::rmDir(void) {
+  // must be open subdirectory
+  if (!isSubDir()) return false;
+
+  rewind();
+
+  // make sure directory is empty
+  while (curPosition_ < fileSize_) {
+    dir_t* p = readDirCache();
+    if (p == NULL) return false;
+    // done if past last used entry
+    if (p->name[0] == DIR_NAME_FREE) break;
+    // skip empty slot or '.' or '..'
+    if (p->name[0] == DIR_NAME_DELETED || p->name[0] == '.') continue;
+    // error not empty
+    if (DIR_IS_FILE_OR_SUBDIR(p)) return false;
+  }
+  // convert empty directory to normal file for remove
+  type_ = FAT_FILE_TYPE_NORMAL;
+  flags_ |= O_WRITE;
+  return remove();
+}
+//------------------------------------------------------------------------------
+/** Recursively delete a directory and all contained files.
+ *
+ * This is like the Unix/Linux 'rm -rf *' if called with the root directory
+ * hence the name.
+ *
+ * Warning - This will remove all contents of the directory including
+ * subdirectories.  The directory will then be removed if it is not root.
+ * The read-only attribute for files will be ignored.
+ *
+ * \note This function should not be used to delete the 8.3 version of
+ * a directory that has a long name.  See remove() and rmDir().
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t SdFile::rmRfStar(void) {
+  rewind();
+  while (curPosition_ < fileSize_) {
+    SdFile f;
+
+    // remember position
+    uint16_t index = curPosition_/32;
+
+    dir_t* p = readDirCache();
+    if (!p) return false;
+
+    // done if past last entry
+    if (p->name[0] == DIR_NAME_FREE) break;
+
+    // skip empty slot or '.' or '..'
+    if (p->name[0] == DIR_NAME_DELETED || p->name[0] == '.') continue;
+
+    // skip if part of long file name or volume label in root
+    if (!DIR_IS_FILE_OR_SUBDIR(p)) continue;
+
+    if (!f.open(this, index, O_READ)) return false;
+    if (f.isSubDir()) {
+      // recursively delete
+      if (!f.rmRfStar()) return false;
+    } else {
+      // ignore read-only
+      f.flags_ |= O_WRITE;
+      if (!f.remove()) return false;
+    }
+    // position to next entry if required
+    if (curPosition_ != (32*(index + 1))) {
+      if (!seekSet(32*(index + 1))) return false;
+    }
+  }
+  // don't try to delete root
+  if (isRoot()) return true;
+  return rmDir();
+}
+//------------------------------------------------------------------------------
+/**
+ * Sets a file's position.
+ *
+ * \param[in] pos The new position in bytes from the beginning of the file.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t SdFile::seekSet(uint32_t pos) {
+  // error if file not open or seek past end of file
+  if (!isOpen() || pos > fileSize_) return false;
+
+  if (type_ == FAT_FILE_TYPE_ROOT16) {
+    curPosition_ = pos;
+    return true;
+  }
+  if (pos == 0) {
+    // set position to start of file
+    curCluster_ = 0;
+    curPosition_ = 0;
+    return true;
+  }
+  // calculate cluster index for cur and new position
+  uint32_t nCur = (curPosition_ - 1) >> (vol_->clusterSizeShift_ + 9);
+  uint32_t nNew = (pos - 1) >> (vol_->clusterSizeShift_ + 9);
+
+  if (nNew < nCur || curPosition_ == 0) {
+    // must follow chain from first cluster
+    curCluster_ = firstCluster_;
+  } else {
+    // advance from curPosition
+    nNew -= nCur;
+  }
+  while (nNew--) {
+    if (!vol_->fatGet(curCluster_, &curCluster_)) return false;
+  }
+  curPosition_ = pos;
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ * The sync() call causes all modified data and directory fields
+ * to be written to the storage device.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include a call to sync() before a file has been
+ * opened or an I/O error.
+ */
+uint8_t SdFile::sync(void) {
+  // only allow open files and directories
+  if (!isOpen()) return false;
+
+  if (flags_ & F_FILE_DIR_DIRTY) {
+    dir_t* d = cacheDirEntry(SdVolume::CACHE_FOR_WRITE);
+    if (!d) return false;
+
+    // do not set filesize for dir files
+    if (!isDir()) d->fileSize = fileSize_;
+
+    // update first cluster fields
+    d->firstClusterLow = firstCluster_ & 0XFFFF;
+    d->firstClusterHigh = firstCluster_ >> 16;
+
+    // set modify time if user supplied a callback date/time function
+    if (dateTime_) {
+      dateTime_(&d->lastWriteDate, &d->lastWriteTime);
+      d->lastAccessDate = d->lastWriteDate;
+    }
+    // clear directory dirty
+    flags_ &= ~F_FILE_DIR_DIRTY;
+  }
+  return SdVolume::cacheFlush();
+}
+//------------------------------------------------------------------------------
+/**
+ * Set a file's timestamps in its directory entry.
+ *
+ * \param[in] flags Values for \a flags are constructed by a bitwise-inclusive
+ * OR of flags from the following list
+ *
+ * T_ACCESS - Set the file's last access date.
+ *
+ * T_CREATE - Set the file's creation date and time.
+ *
+ * T_WRITE - Set the file's last write/modification date and time.
+ *
+ * \param[in] year Valid range 1980 - 2107 inclusive.
+ *
+ * \param[in] month Valid range 1 - 12 inclusive.
+ *
+ * \param[in] day Valid range 1 - 31 inclusive.
+ *
+ * \param[in] hour Valid range 0 - 23 inclusive.
+ *
+ * \param[in] minute Valid range 0 - 59 inclusive.
+ *
+ * \param[in] second Valid range 0 - 59 inclusive
+ *
+ * \note It is possible to set an invalid date since there is no check for
+ * the number of days in a month.
+ *
+ * \note
+ * Modify and access timestamps may be overwritten if a date time callback
+ * function has been set by dateTimeCallback().
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ */
+uint8_t SdFile::timestamp(uint8_t flags, uint16_t year, uint8_t month,
+         uint8_t day, uint8_t hour, uint8_t minute, uint8_t second) {
+  if (!isOpen()
+    || year < 1980
+    || year > 2107
+    || month < 1
+    || month > 12
+    || day < 1
+    || day > 31
+    || hour > 23
+    || minute > 59
+    || second > 59) {
+      return false;
+  }
+  dir_t* d = cacheDirEntry(SdVolume::CACHE_FOR_WRITE);
+  if (!d) return false;
+
+  uint16_t dirDate = FAT_DATE(year, month, day);
+  uint16_t dirTime = FAT_TIME(hour, minute, second);
+  if (flags & T_ACCESS) {
+    d->lastAccessDate = dirDate;
+  }
+  if (flags & T_CREATE) {
+    d->creationDate = dirDate;
+    d->creationTime = dirTime;
+    // seems to be units of 1/100 second not 1/10 as Microsoft states
+    d->creationTimeTenths = second & 1 ? 100 : 0;
+  }
+  if (flags & T_WRITE) {
+    d->lastWriteDate = dirDate;
+    d->lastWriteTime = dirTime;
+  }
+  SdVolume::cacheSetDirty();
+  return sync();
+}
+//------------------------------------------------------------------------------
+/**
+ * Truncate a file to a specified length.  The current file position
+ * will be maintained if it is less than or equal to \a length otherwise
+ * it will be set to end of file.
+ *
+ * \param[in] length The desired length for the file.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.
+ * Reasons for failure include file is read only, file is a directory,
+ * \a length is greater than the current file size or an I/O error occurs.
+ */
+uint8_t SdFile::truncate(uint32_t length) {
+// error if not a normal file or read-only
+  if (!isFile() || !(flags_ & O_WRITE)) return false;
+
+  // error if length is greater than current size
+  if (length > fileSize_) return false;
+
+  // fileSize and length are zero - nothing to do
+  if (fileSize_ == 0) return true;
+
+  // remember position for seek after truncation
+  uint32_t newPos = curPosition_ > length ? length : curPosition_;
+
+  // position to last cluster in truncated file
+  if (!seekSet(length)) return false;
+
+  if (length == 0) {
+    // free all clusters
+    if (!vol_->freeChain(firstCluster_)) return false;
+    firstCluster_ = 0;
+  } else {
+    uint32_t toFree;
+    if (!vol_->fatGet(curCluster_, &toFree)) return false;
+
+    if (!vol_->isEOC(toFree)) {
+      // free extra clusters
+      if (!vol_->freeChain(toFree)) return false;
+
+      // current cluster is end of chain
+      if (!vol_->fatPutEOC(curCluster_)) return false;
+    }
+  }
+  fileSize_ = length;
+
+  // need to update directory entry
+  flags_ |= F_FILE_DIR_DIRTY;
+
+  if (!sync()) return false;
+
+  // set file to correct position
+  return seekSet(newPos);
+}
+//------------------------------------------------------------------------------
+/**
+ * Write data to an open file.
+ *
+ * \note Data is moved to the cache but may not be written to the
+ * storage device until sync() is called.
+ *
+ * \param[in] buf Pointer to the location of the data to be written.
+ *
+ * \param[in] nbyte Number of bytes to write.
+ *
+ * \return For success write() returns the number of bytes written, always
+ * \a nbyte.  If an error occurs, write() returns -1.  Possible errors
+ * include write() is called before a file has been opened, write is called
+ * for a read-only file, device is full, a corrupt file system or an I/O error.
+ *
+ */
+size_t SdFile::write(const void* buf, uint16_t nbyte) {
+  // convert void* to uint8_t*  -  must be before goto statements
+  const uint8_t* src = reinterpret_cast<const uint8_t*>(buf);
+
+  // number of bytes left to write  -  must be before goto statements
+  uint16_t nToWrite = nbyte;
+
+  // error if not a normal file or is read-only
+  if (!isFile() || !(flags_ & O_WRITE)) goto writeErrorReturn;
+
+  // seek to end of file if append flag
+  if ((flags_ & O_APPEND) && curPosition_ != fileSize_) {
+    if (!seekEnd()) goto writeErrorReturn;
+  }
+
+  while (nToWrite > 0) {
+    uint8_t blockOfCluster = vol_->blockOfCluster(curPosition_);
+    uint16_t blockOffset = curPosition_ & 0X1FF;
+    if (blockOfCluster == 0 && blockOffset == 0) {
+      // start of new cluster
+      if (curCluster_ == 0) {
+        if (firstCluster_ == 0) {
+          // allocate first cluster of file
+          if (!addCluster()) goto writeErrorReturn;
+        } else {
+          curCluster_ = firstCluster_;
+        }
+      } else {
+        uint32_t next;
+        if (!vol_->fatGet(curCluster_, &next)) return false;
+        if (vol_->isEOC(next)) {
+          // add cluster if at end of chain
+          if (!addCluster()) goto writeErrorReturn;
+        } else {
+          curCluster_ = next;
+        }
+      }
+    }
+    // max space in block
+    uint16_t n = 512 - blockOffset;
+
+    // lesser of space and amount to write
+    if (n > nToWrite) n = nToWrite;
+
+    // block for data write
+    uint32_t block = vol_->clusterStartBlock(curCluster_) + blockOfCluster;
+    if (n == 512) {
+      // full block - don't need to use cache
+      // invalidate cache if block is in cache
+      if (SdVolume::cacheBlockNumber_ == block) {
+        SdVolume::cacheBlockNumber_ = 0XFFFFFFFF;
+      }
+      if (!vol_->writeBlock(block, src)) goto writeErrorReturn;
+      src += 512;
+    } else {
+      if (blockOffset == 0 && curPosition_ >= fileSize_) {
+        // start of new block don't need to read into cache
+        if (!SdVolume::cacheFlush()) goto writeErrorReturn;
+        SdVolume::cacheBlockNumber_ = block;
+        SdVolume::cacheSetDirty();
+      } else {
+        // rewrite part of block
+        if (!SdVolume::cacheRawBlock(block, SdVolume::CACHE_FOR_WRITE)) {
+          goto writeErrorReturn;
+        }
+      }
+      uint8_t* dst = SdVolume::cacheBuffer_.data + blockOffset;
+      uint8_t* end = dst + n;
+      while (dst != end) *dst++ = *src++;
+    }
+    nToWrite -= n;
+    curPosition_ += n;
+  }
+  if (curPosition_ > fileSize_) {
+    // update fileSize and insure sync will update dir entry
+    fileSize_ = curPosition_;
+    flags_ |= F_FILE_DIR_DIRTY;
+  } else if (dateTime_ && nbyte) {
+    // insure sync will update modified date and time
+    flags_ |= F_FILE_DIR_DIRTY;
+  }
+
+  if (flags_ & O_SYNC) {
+    if (!sync()) goto writeErrorReturn;
+  }
+  return nbyte;
+
+ writeErrorReturn:
+  // return for write error
+  //writeError = true;
+  setWriteError();
+  return 0;
+}
+//------------------------------------------------------------------------------
+/**
+ * Write a byte to a file. Required by the Arduino Print class.
+ *
+ * Use SdFile::writeError to check for errors.
+ */
+size_t SdFile::write(uint8_t b) {
+  return write(&b, 1);
+}
+//------------------------------------------------------------------------------
+/**
+ * Write a string to a file. Used by the Arduino Print class.
+ *
+ * Use SdFile::writeError to check for errors.
+ */
+size_t SdFile::write(const char* str) {
+  return write(str, strlen(str));
+}
+#ifdef __AVR__
+//------------------------------------------------------------------------------
+/**
+ * Write a PROGMEM string to a file.
+ *
+ * Use SdFile::writeError to check for errors.
+ */
+void SdFile::write_P(PGM_P str) {
+  for (uint8_t c; (c = pgm_read_byte(str)); str++) write(c);
+}
+//------------------------------------------------------------------------------
+/**
+ * Write a PROGMEM string followed by CR/LF to a file.
+ *
+ * Use SdFile::writeError to check for errors.
+ */
+void SdFile::writeln_P(PGM_P str) {
+  write_P(str);
+  println();
+}
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdInfo.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdInfo.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdInfo.h	(revision 136)
@@ -0,0 +1,232 @@
+/* Arduino Sd2Card Library
+ * Copyright (C) 2009 by William Greiman
+ *
+ * This file is part of the Arduino Sd2Card Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino Sd2Card Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#ifndef SdInfo_h
+#define SdInfo_h
+#include <stdint.h>
+// Based on the document:
+//
+// SD Specifications
+// Part 1
+// Physical Layer
+// Simplified Specification
+// Version 2.00
+// September 25, 2006
+//
+// www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
+//------------------------------------------------------------------------------
+// SD card commands
+/** GO_IDLE_STATE - init card in spi mode if CS low */
+uint8_t const CMD0 = 0X00;
+/** SEND_IF_COND - verify SD Memory Card interface operating condition.*/
+uint8_t const CMD8 = 0X08;
+/** SEND_CSD - read the Card Specific Data (CSD register) */
+uint8_t const CMD9 = 0X09;
+/** SEND_CID - read the card identification information (CID register) */
+uint8_t const CMD10 = 0X0A;
+/** SEND_STATUS - read the card status register */
+uint8_t const CMD13 = 0X0D;
+/** READ_BLOCK - read a single data block from the card */
+uint8_t const CMD17 = 0X11;
+/** WRITE_BLOCK - write a single data block to the card */
+uint8_t const CMD24 = 0X18;
+/** WRITE_MULTIPLE_BLOCK - write blocks of data until a STOP_TRANSMISSION */
+uint8_t const CMD25 = 0X19;
+/** ERASE_WR_BLK_START - sets the address of the first block to be erased */
+uint8_t const CMD32 = 0X20;
+/** ERASE_WR_BLK_END - sets the address of the last block of the continuous
+    range to be erased*/
+uint8_t const CMD33 = 0X21;
+/** ERASE - erase all previously selected blocks */
+uint8_t const CMD38 = 0X26;
+/** APP_CMD - escape for application specific command */
+uint8_t const CMD55 = 0X37;
+/** READ_OCR - read the OCR register of a card */
+uint8_t const CMD58 = 0X3A;
+/** SET_WR_BLK_ERASE_COUNT - Set the number of write blocks to be
+     pre-erased before writing */
+uint8_t const ACMD23 = 0X17;
+/** SD_SEND_OP_COMD - Sends host capacity support information and
+    activates the card's initialization process */
+uint8_t const ACMD41 = 0X29;
+//------------------------------------------------------------------------------
+/** status for card in the ready state */
+uint8_t const R1_READY_STATE = 0X00;
+/** status for card in the idle state */
+uint8_t const R1_IDLE_STATE = 0X01;
+/** status bit for illegal command */
+uint8_t const R1_ILLEGAL_COMMAND = 0X04;
+/** start data token for read or write single block*/
+uint8_t const DATA_START_BLOCK = 0XFE;
+/** stop token for write multiple blocks*/
+uint8_t const STOP_TRAN_TOKEN = 0XFD;
+/** start data token for write multiple blocks*/
+uint8_t const WRITE_MULTIPLE_TOKEN = 0XFC;
+/** mask for data response tokens after a write block operation */
+uint8_t const DATA_RES_MASK = 0X1F;
+/** write data accepted token */
+uint8_t const DATA_RES_ACCEPTED = 0X05;
+//------------------------------------------------------------------------------
+typedef struct CID {
+  // byte 0
+  uint8_t mid;  // Manufacturer ID
+  // byte 1-2
+  char oid[2];  // OEM/Application ID
+  // byte 3-7
+  char pnm[5];  // Product name
+  // byte 8
+  unsigned prv_m : 4;  // Product revision n.m
+  unsigned prv_n : 4;
+  // byte 9-12
+  uint32_t psn;  // Product serial number
+  // byte 13
+  unsigned mdt_year_high : 4;  // Manufacturing date
+  unsigned reserved : 4;
+  // byte 14
+  unsigned mdt_month : 4;
+  unsigned mdt_year_low :4;
+  // byte 15
+  unsigned always1 : 1;
+  unsigned crc : 7;
+}cid_t;
+//------------------------------------------------------------------------------
+// CSD for version 1.00 cards
+typedef struct CSDV1 {
+  // byte 0
+  unsigned reserved1 : 6;
+  unsigned csd_ver : 2;
+  // byte 1
+  uint8_t taac;
+  // byte 2
+  uint8_t nsac;
+  // byte 3
+  uint8_t tran_speed;
+  // byte 4
+  uint8_t ccc_high;
+  // byte 5
+  unsigned read_bl_len : 4;
+  unsigned ccc_low : 4;
+  // byte 6
+  unsigned c_size_high : 2;
+  unsigned reserved2 : 2;
+  unsigned dsr_imp : 1;
+  unsigned read_blk_misalign :1;
+  unsigned write_blk_misalign : 1;
+  unsigned read_bl_partial : 1;
+  // byte 7
+  uint8_t c_size_mid;
+  // byte 8
+  unsigned vdd_r_curr_max : 3;
+  unsigned vdd_r_curr_min : 3;
+  unsigned c_size_low :2;
+  // byte 9
+  unsigned c_size_mult_high : 2;
+  unsigned vdd_w_cur_max : 3;
+  unsigned vdd_w_curr_min : 3;
+  // byte 10
+  unsigned sector_size_high : 6;
+  unsigned erase_blk_en : 1;
+  unsigned c_size_mult_low : 1;
+  // byte 11
+  unsigned wp_grp_size : 7;
+  unsigned sector_size_low : 1;
+  // byte 12
+  unsigned write_bl_len_high : 2;
+  unsigned r2w_factor : 3;
+  unsigned reserved3 : 2;
+  unsigned wp_grp_enable : 1;
+  // byte 13
+  unsigned reserved4 : 5;
+  unsigned write_partial : 1;
+  unsigned write_bl_len_low : 2;
+  // byte 14
+  unsigned reserved5: 2;
+  unsigned file_format : 2;
+  unsigned tmp_write_protect : 1;
+  unsigned perm_write_protect : 1;
+  unsigned copy : 1;
+  unsigned file_format_grp : 1;
+  // byte 15
+  unsigned always1 : 1;
+  unsigned crc : 7;
+}csd1_t;
+//------------------------------------------------------------------------------
+// CSD for version 2.00 cards
+typedef struct CSDV2 {
+  // byte 0
+  unsigned reserved1 : 6;
+  unsigned csd_ver : 2;
+  // byte 1
+  uint8_t taac;
+  // byte 2
+  uint8_t nsac;
+  // byte 3
+  uint8_t tran_speed;
+  // byte 4
+  uint8_t ccc_high;
+  // byte 5
+  unsigned read_bl_len : 4;
+  unsigned ccc_low : 4;
+  // byte 6
+  unsigned reserved2 : 4;
+  unsigned dsr_imp : 1;
+  unsigned read_blk_misalign :1;
+  unsigned write_blk_misalign : 1;
+  unsigned read_bl_partial : 1;
+  // byte 7
+  unsigned reserved3 : 2;
+  unsigned c_size_high : 6;
+  // byte 8
+  uint8_t c_size_mid;
+  // byte 9
+  uint8_t c_size_low;
+  // byte 10
+  unsigned sector_size_high : 6;
+  unsigned erase_blk_en : 1;
+  unsigned reserved4 : 1;
+  // byte 11
+  unsigned wp_grp_size : 7;
+  unsigned sector_size_low : 1;
+  // byte 12
+  unsigned write_bl_len_high : 2;
+  unsigned r2w_factor : 3;
+  unsigned reserved5 : 2;
+  unsigned wp_grp_enable : 1;
+  // byte 13
+  unsigned reserved6 : 5;
+  unsigned write_partial : 1;
+  unsigned write_bl_len_low : 2;
+  // byte 14
+  unsigned reserved7: 2;
+  unsigned file_format : 2;
+  unsigned tmp_write_protect : 1;
+  unsigned perm_write_protect : 1;
+  unsigned copy : 1;
+  unsigned file_format_grp : 1;
+  // byte 15
+  unsigned always1 : 1;
+  unsigned crc : 7;
+}csd2_t;
+//------------------------------------------------------------------------------
+// union of old and new style CSD register
+union csd_t {
+  csd1_t v1;
+  csd2_t v2;
+};
+#endif  // SdInfo_h
Index: rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdVolume.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdVolume.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/SD/src/utility/SdVolume.cpp	(revision 136)
@@ -0,0 +1,295 @@
+/* Arduino SdFat Library
+ * Copyright (C) 2009 by William Greiman
+ *
+ * This file is part of the Arduino SdFat Library
+ *
+ * This Library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This Library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with the Arduino SdFat Library.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+#include "SdFat.h"
+//------------------------------------------------------------------------------
+// raw block cache
+// init cacheBlockNumber_to invalid SD block number
+uint32_t SdVolume::cacheBlockNumber_ = 0XFFFFFFFF;
+cache_t  SdVolume::cacheBuffer_;     // 512 byte cache for Sd2Card
+Sd2Card* SdVolume::sdCard_;          // pointer to SD card object
+uint8_t  SdVolume::cacheDirty_ = 0;  // cacheFlush() will write block if true
+uint32_t SdVolume::cacheMirrorBlock_ = 0;  // mirror  block for second FAT
+//------------------------------------------------------------------------------
+// find a contiguous group of clusters
+uint8_t SdVolume::allocContiguous(uint32_t count, uint32_t* curCluster) {
+  // start of group
+  uint32_t bgnCluster;
+
+  // flag to save place to start next search
+  uint8_t setStart;
+
+  // set search start cluster
+  if (*curCluster) {
+    // try to make file contiguous
+    bgnCluster = *curCluster + 1;
+
+    // don't save new start location
+    setStart = false;
+  } else {
+    // start at likely place for free cluster
+    bgnCluster = allocSearchStart_;
+
+    // save next search start if one cluster
+    setStart = 1 == count;
+  }
+  // end of group
+  uint32_t endCluster = bgnCluster;
+
+  // last cluster of FAT
+  uint32_t fatEnd = clusterCount_ + 1;
+
+  // search the FAT for free clusters
+  for (uint32_t n = 0;; n++, endCluster++) {
+    // can't find space checked all clusters
+    if (n >= clusterCount_) return false;
+
+    // past end - start from beginning of FAT
+    if (endCluster > fatEnd) {
+      bgnCluster = endCluster = 2;
+    }
+    uint32_t f;
+    if (!fatGet(endCluster, &f)) return false;
+
+    if (f != 0) {
+      // cluster in use try next cluster as bgnCluster
+      bgnCluster = endCluster + 1;
+    } else if ((endCluster - bgnCluster + 1) == count) {
+      // done - found space
+      break;
+    }
+  }
+  // mark end of chain
+  if (!fatPutEOC(endCluster)) return false;
+
+  // link clusters
+  while (endCluster > bgnCluster) {
+    if (!fatPut(endCluster - 1, endCluster)) return false;
+    endCluster--;
+  }
+  if (*curCluster != 0) {
+    // connect chains
+    if (!fatPut(*curCluster, bgnCluster)) return false;
+  }
+  // return first cluster number to caller
+  *curCluster = bgnCluster;
+
+  // remember possible next free cluster
+  if (setStart) allocSearchStart_ = bgnCluster + 1;
+
+  return true;
+}
+//------------------------------------------------------------------------------
+uint8_t SdVolume::cacheFlush(void) {
+  if (cacheDirty_) {
+    if (!sdCard_->writeBlock(cacheBlockNumber_, cacheBuffer_.data)) {
+      return false;
+    }
+    // mirror FAT tables
+    if (cacheMirrorBlock_) {
+      if (!sdCard_->writeBlock(cacheMirrorBlock_, cacheBuffer_.data)) {
+        return false;
+      }
+      cacheMirrorBlock_ = 0;
+    }
+    cacheDirty_ = 0;
+  }
+  return true;
+}
+//------------------------------------------------------------------------------
+uint8_t SdVolume::cacheRawBlock(uint32_t blockNumber, uint8_t action) {
+  if (cacheBlockNumber_ != blockNumber) {
+    if (!cacheFlush()) return false;
+    if (!sdCard_->readBlock(blockNumber, cacheBuffer_.data)) return false;
+    cacheBlockNumber_ = blockNumber;
+  }
+  cacheDirty_ |= action;
+  return true;
+}
+//------------------------------------------------------------------------------
+// cache a zero block for blockNumber
+uint8_t SdVolume::cacheZeroBlock(uint32_t blockNumber) {
+  if (!cacheFlush()) return false;
+
+  // loop take less flash than memset(cacheBuffer_.data, 0, 512);
+  for (uint16_t i = 0; i < 512; i++) {
+    cacheBuffer_.data[i] = 0;
+  }
+  cacheBlockNumber_ = blockNumber;
+  cacheSetDirty();
+  return true;
+}
+//------------------------------------------------------------------------------
+// return the size in bytes of a cluster chain
+uint8_t SdVolume::chainSize(uint32_t cluster, uint32_t* size) const {
+  uint32_t s = 0;
+  do {
+    if (!fatGet(cluster, &cluster)) return false;
+    s += 512UL << clusterSizeShift_;
+  } while (!isEOC(cluster));
+  *size = s;
+  return true;
+}
+//------------------------------------------------------------------------------
+// Fetch a FAT entry
+uint8_t SdVolume::fatGet(uint32_t cluster, uint32_t* value) const {
+  if (cluster > (clusterCount_ + 1)) return false;
+  uint32_t lba = fatStartBlock_;
+  lba += fatType_ == 16 ? cluster >> 8 : cluster >> 7;
+  if (lba != cacheBlockNumber_) {
+    if (!cacheRawBlock(lba, CACHE_FOR_READ)) return false;
+  }
+  if (fatType_ == 16) {
+    *value = cacheBuffer_.fat16[cluster & 0XFF];
+  } else {
+    *value = cacheBuffer_.fat32[cluster & 0X7F] & FAT32MASK;
+  }
+  return true;
+}
+//------------------------------------------------------------------------------
+// Store a FAT entry
+uint8_t SdVolume::fatPut(uint32_t cluster, uint32_t value) {
+  // error if reserved cluster
+  if (cluster < 2) return false;
+
+  // error if not in FAT
+  if (cluster > (clusterCount_ + 1)) return false;
+
+  // calculate block address for entry
+  uint32_t lba = fatStartBlock_;
+  lba += fatType_ == 16 ? cluster >> 8 : cluster >> 7;
+
+  if (lba != cacheBlockNumber_) {
+    if (!cacheRawBlock(lba, CACHE_FOR_READ)) return false;
+  }
+  // store entry
+  if (fatType_ == 16) {
+    cacheBuffer_.fat16[cluster & 0XFF] = value;
+  } else {
+    cacheBuffer_.fat32[cluster & 0X7F] = value;
+  }
+  cacheSetDirty();
+
+  // mirror second FAT
+  if (fatCount_ > 1) cacheMirrorBlock_ = lba + blocksPerFat_;
+  return true;
+}
+//------------------------------------------------------------------------------
+// free a cluster chain
+uint8_t SdVolume::freeChain(uint32_t cluster) {
+  // clear free cluster location
+  allocSearchStart_ = 2;
+
+  do {
+    uint32_t next;
+    if (!fatGet(cluster, &next)) return false;
+
+    // free cluster
+    if (!fatPut(cluster, 0)) return false;
+
+    cluster = next;
+  } while (!isEOC(cluster));
+
+  return true;
+}
+//------------------------------------------------------------------------------
+/**
+ * Initialize a FAT volume.
+ *
+ * \param[in] dev The SD card where the volume is located.
+ *
+ * \param[in] part The partition to be used.  Legal values for \a part are
+ * 1-4 to use the corresponding partition on a device formatted with
+ * a MBR, Master Boot Record, or zero if the device is formatted as
+ * a super floppy with the FAT boot sector in block zero.
+ *
+ * \return The value one, true, is returned for success and
+ * the value zero, false, is returned for failure.  Reasons for
+ * failure include not finding a valid partition, not finding a valid
+ * FAT file system in the specified partition or an I/O error.
+ */
+uint8_t SdVolume::init(Sd2Card* dev, uint8_t part) {
+  uint32_t volumeStartBlock = 0;
+  sdCard_ = dev;
+  // if part == 0 assume super floppy with FAT boot sector in block zero
+  // if part > 0 assume mbr volume with partition table
+  if (part) {
+    if (part > 4)return false;
+    if (!cacheRawBlock(volumeStartBlock, CACHE_FOR_READ)) return false;
+    part_t* p = &cacheBuffer_.mbr.part[part-1];
+    if ((p->boot & 0X7F) !=0  ||
+      p->totalSectors < 100 ||
+      p->firstSector == 0) {
+      // not a valid partition
+      return false;
+    }
+    volumeStartBlock = p->firstSector;
+  }
+  if (!cacheRawBlock(volumeStartBlock, CACHE_FOR_READ)) return false;
+  bpb_t* bpb = &cacheBuffer_.fbs.bpb;
+  if (bpb->bytesPerSector != 512 ||
+    bpb->fatCount == 0 ||
+    bpb->reservedSectorCount == 0 ||
+    bpb->sectorsPerCluster == 0) {
+       // not valid FAT volume
+      return false;
+  }
+  fatCount_ = bpb->fatCount;
+  blocksPerCluster_ = bpb->sectorsPerCluster;
+
+  // determine shift that is same as multiply by blocksPerCluster_
+  clusterSizeShift_ = 0;
+  while (blocksPerCluster_ != (1 << clusterSizeShift_)) {
+    // error if not power of 2
+    if (clusterSizeShift_++ > 7) return false;
+  }
+  blocksPerFat_ = bpb->sectorsPerFat16 ?
+                    bpb->sectorsPerFat16 : bpb->sectorsPerFat32;
+
+  fatStartBlock_ = volumeStartBlock + bpb->reservedSectorCount;
+
+  // count for FAT16 zero for FAT32
+  rootDirEntryCount_ = bpb->rootDirEntryCount;
+
+  // directory start for FAT16 dataStart for FAT32
+  rootDirStart_ = fatStartBlock_ + bpb->fatCount * blocksPerFat_;
+
+  // data start for FAT16 and FAT32
+  dataStartBlock_ = rootDirStart_ + ((32 * bpb->rootDirEntryCount + 511)/512);
+
+  // total blocks for FAT16 or FAT32
+  uint32_t totalBlocks = bpb->totalSectors16 ?
+                           bpb->totalSectors16 : bpb->totalSectors32;
+  // total data blocks
+  clusterCount_ = totalBlocks - (dataStartBlock_ - volumeStartBlock);
+
+  // divide by cluster size to get cluster count
+  clusterCount_ >>= clusterSizeShift_;
+
+  // FAT type is determined by cluster count
+  if (clusterCount_ < 4085) {
+    fatType_ = 12;
+  } else if (clusterCount_ < 65525) {
+    fatType_ = 16;
+  } else {
+    rootDirStart_ = bpb->fat32RootCluster;
+    fatType_ = 32;
+  }
+  return true;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Servo Library for Arduino =
+
+This library allows an Arduino board to control RC (hobby) servo motors.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/Servo
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/examples/Knob/Knob.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/examples/Knob/Knob.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/examples/Knob/Knob.ino	(revision 136)
@@ -0,0 +1,29 @@
+/* 
+ Controlling a servo position using a potentiometer (variable resistor) 
+ by Michal Rinott <http://people.interaction-ivrea.it/m.rinott> 
+
+ modified on 8 Nov 2013
+ by Scott Fitzgerald
+ http://arduino.cc/en/Tutorial/Knob
+*/
+
+#include <Servo.h>
+
+Servo myservo;  // create servo object to control a servo
+
+int potpin = 0;  // analog pin used to connect the potentiometer
+int val;    // variable to read the value from the analog pin
+
+void setup()
+{
+  myservo.attach(9);  // attaches the servo on pin 9 to the servo object
+}
+
+void loop() 
+{ 
+  val = analogRead(potpin);            // reads the value of the potentiometer (value between 0 and 1023) 
+  val = map(val, 0, 1023, 0, 180);     // scale it to use it with the servo (value between 0 and 180) 
+  myservo.write(val);                  // sets the servo position according to the scaled value 
+  delay(15);                           // waits for the servo to get there 
+} 
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/examples/Sweep/Sweep.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/examples/Sweep/Sweep.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/examples/Sweep/Sweep.ino	(revision 136)
@@ -0,0 +1,35 @@
+/* Sweep
+ by BARRAGAN <http://barraganstudio.com> 
+ This example code is in the public domain.
+
+ modified 8 Nov 2013
+ by Scott Fitzgerald
+ http://arduino.cc/en/Tutorial/Sweep
+*/ 
+
+#include <Servo.h> 
+ 
+Servo myservo;  // create servo object to control a servo 
+                // twelve servo objects can be created on most boards
+ 
+int pos = 0;    // variable to store the servo position 
+ 
+void setup() 
+{ 
+  myservo.attach(9);  // attaches the servo on pin 9 to the servo object 
+} 
+ 
+void loop() 
+{ 
+  for(pos = 0; pos <= 180; pos += 1) // goes from 0 degrees to 180 degrees 
+  {                                  // in steps of 1 degree 
+    myservo.write(pos);              // tell servo to go to position in variable 'pos' 
+    delay(15);                       // waits 15ms for the servo to reach the position 
+  } 
+  for(pos = 180; pos>=0; pos-=1)     // goes from 180 degrees to 0 degrees 
+  {                                
+    myservo.write(pos);              // tell servo to go to position in variable 'pos' 
+    delay(15);                       // waits 15ms for the servo to reach the position 
+  } 
+} 
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/keywords.txt	(revision 136)
@@ -0,0 +1,24 @@
+#######################################
+# Syntax Coloring Map Servo
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+Servo	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+attach	KEYWORD2
+detach	KEYWORD2
+write	KEYWORD2
+read	KEYWORD2
+attached	KEYWORD2
+writeMicroseconds	KEYWORD2
+readMicroseconds	KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Servo
+version=1.0
+author=Michael Margolis, Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Allows Arduino boards to control a variety of servo motors. For all Arduino boards.
+paragraph=This library can control a great number of servos.<br />It makes careful use of timers: the library can control 12 servos using only 1 timer.<br />On the Arduino Due you can control up to 60 servos.<br />
+category=Device Control
+url=http://arduino.cc/en/Reference/Servo
+architectures=avr,sam
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/src/Servo.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/src/Servo.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/src/Servo.h	(revision 136)
@@ -0,0 +1,121 @@
+/*
+  Servo.h - Interrupt driven Servo library for Arduino using 16 bit timers- Version 2
+  Copyright (c) 2009 Michael Margolis.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+/* 
+  A servo is activated by creating an instance of the Servo class passing 
+  the desired pin to the attach() method.
+  The servos are pulsed in the background using the value most recently 
+  written using the write() method.
+
+  Note that analogWrite of PWM on pins associated with the timer are 
+  disabled when the first servo is attached.
+  Timers are seized as needed in groups of 12 servos - 24 servos use two 
+  timers, 48 servos will use four.
+  The sequence used to sieze timers is defined in timers.h
+
+  The methods are:
+
+    Servo - Class for manipulating servo motors connected to Arduino pins.
+
+    attach(pin )  - Attaches a servo motor to an i/o pin.
+    attach(pin, min, max  ) - Attaches to a pin setting min and max values in microseconds
+    default min is 544, max is 2400  
+ 
+    write()     - Sets the servo angle in degrees.  (invalid angle that is valid as pulse in microseconds is treated as microseconds)
+    writeMicroseconds() - Sets the servo pulse width in microseconds 
+    read()      - Gets the last written servo pulse width as an angle between 0 and 180. 
+    readMicroseconds()   - Gets the last written servo pulse width in microseconds. (was read_us() in first release)
+    attached()  - Returns true if there is a servo attached. 
+    detach()    - Stops an attached servos from pulsing its i/o pin. 
+ */
+
+#ifndef Servo_h
+#define Servo_h
+
+#include <inttypes.h>
+
+/* 
+ * Defines for 16 bit timers used with  Servo library 
+ *
+ * If _useTimerX is defined then TimerX is a 16 bit timer on the current board
+ * timer16_Sequence_t enumerates the sequence that the timers should be allocated
+ * _Nbr_16timers indicates how many 16 bit timers are available.
+ */
+
+// Architecture specific include
+#if defined(ARDUINO_ARCH_AVR)
+	#include "avr/ServoTimers.h"
+#elif defined(ARDUINO_ARCH_SAM)
+	#include "sam/ServoTimers.h"
+#elif defined(ARDUINO_ARCH_SAMD)
+	//#include "samd/ServoTimersSamd.h"
+	#define MIN_PULSE_WIDTH_SAMD 500
+	#define MAX_PULSE_WIDTH_SAMD 2100
+#else	
+	#error "This library only supports boards with an AVR,SAM or SAMD processor."
+#endif
+
+#define Servo_VERSION           2.1     // software version of this library
+
+#define MIN_PULSE_WIDTH       544     // the shortest pulse sent to a servo  
+#define MAX_PULSE_WIDTH      2400     // the longest pulse sent to a servo 
+#define DEFAULT_PULSE_WIDTH  1500     // default pulse width when servo is attached
+#define REFRESH_INTERVAL    20000     // minumim time to refresh servos in microseconds 
+
+#define SERVOS_PER_TIMER       12     // the maximum number of servos controlled by one timer 
+#if defined(ARDUINO_ARCH_AVR) || defined(ARDUINO_ARCH_SAM)
+	#define MAX_SERVOS   (_Nbr_16timers  * SERVOS_PER_TIMER)
+#elif defined(ARDUINO_ARCH_SAMD)  
+	#define MAX_SERVOS 8
+#else
+	#error "This library only supports boards with an AVR,SAM or SAMD processor."
+#endif
+
+
+#define INVALID_SERVO         255     // flag indicating an invalid servo index
+
+typedef struct  {
+  uint8_t nbr        :6 ;             // a pin number from 0 to 63
+  uint8_t isActive   :1 ;             // true if this channel is enabled, pin not pulsed if false 
+} ServoPin_t   ;  
+
+typedef struct {
+  ServoPin_t Pin;
+  volatile unsigned int ticks;
+} servo_t;
+
+class Servo
+{
+public:
+  Servo();
+  uint8_t attach(int pin);           // attach the given pin to the next free channel, sets pinMode, returns channel number or 0 if failure
+  uint8_t attach(int pin, int min, int max); // as above but also sets min and max values for writes. 
+  void detach();
+  void write(int value);             // if value is < 200 its treated as an angle, otherwise as pulse width in microseconds 
+  void writeMicroseconds(int value); // Write pulse width in microseconds 
+  int read();                        // returns current pulse width as an angle between 0 and 180 degrees
+  int readMicroseconds();            // returns current pulse width in microseconds for this servo (was read_us() in first release)
+  bool attached();                   // return true if this servo is attached, otherwise false 
+private:
+   uint8_t servoIndex;               // index into the channel data for this servo
+   int8_t min;                       // minimum is this value times 4 added to MIN_PULSE_WIDTH    
+   int8_t max;                       // maximum is this value times 4 added to MAX_PULSE_WIDTH   
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/src/avr/Servo.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/src/avr/Servo.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/src/avr/Servo.cpp	(revision 136)
@@ -0,0 +1,317 @@
+/*
+ Servo.cpp - Interrupt driven Servo library for Arduino using 16 bit timers- Version 2
+ Copyright (c) 2009 Michael Margolis.  All right reserved.
+
+ This library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ This library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with this library; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#if defined(ARDUINO_ARCH_AVR)
+
+#include <avr/interrupt.h>
+#include <Arduino.h>
+
+#include "Servo.h"
+
+#define usToTicks(_us)    (( clockCyclesPerMicrosecond()* _us) / 8)     // converts microseconds to tick (assumes prescale of 8)  // 12 Aug 2009
+#define ticksToUs(_ticks) (( (unsigned)_ticks * 8)/ clockCyclesPerMicrosecond() ) // converts from ticks back to microseconds
+
+
+#define TRIM_DURATION       2                               // compensation ticks to trim adjust for digitalWrite delays // 12 August 2009
+
+//#define NBR_TIMERS        (MAX_SERVOS / SERVOS_PER_TIMER)
+
+static servo_t servos[MAX_SERVOS];                          // static array of servo structures
+static volatile int8_t Channel[_Nbr_16timers ];             // counter for the servo being pulsed for each timer (or -1 if refresh interval)
+
+uint8_t ServoCount = 0;                                     // the total number of attached servos
+
+
+// convenience macros
+#define SERVO_INDEX_TO_TIMER(_servo_nbr) ((timer16_Sequence_t)(_servo_nbr / SERVOS_PER_TIMER)) // returns the timer controlling this servo
+#define SERVO_INDEX_TO_CHANNEL(_servo_nbr) (_servo_nbr % SERVOS_PER_TIMER)       // returns the index of the servo on this timer
+#define SERVO_INDEX(_timer,_channel)  ((_timer*SERVOS_PER_TIMER) + _channel)     // macro to access servo index by timer and channel
+#define SERVO(_timer,_channel)  (servos[SERVO_INDEX(_timer,_channel)])            // macro to access servo class by timer and channel
+
+#define SERVO_MIN() (MIN_PULSE_WIDTH - this->min * 4)  // minimum value in uS for this servo
+#define SERVO_MAX() (MAX_PULSE_WIDTH - this->max * 4)  // maximum value in uS for this servo
+
+/************ static functions common to all instances ***********************/
+
+static inline void handle_interrupts(timer16_Sequence_t timer, volatile uint16_t *TCNTn, volatile uint16_t* OCRnA)
+{
+  if( Channel[timer] < 0 )
+    *TCNTn = 0; // channel set to -1 indicated that refresh interval completed so reset the timer
+  else{
+    if( SERVO_INDEX(timer,Channel[timer]) < ServoCount && SERVO(timer,Channel[timer]).Pin.isActive == true )
+      digitalWrite( SERVO(timer,Channel[timer]).Pin.nbr,LOW); // pulse this channel low if activated
+  }
+
+  Channel[timer]++;    // increment to the next channel
+  if( SERVO_INDEX(timer,Channel[timer]) < ServoCount && Channel[timer] < SERVOS_PER_TIMER) {
+    *OCRnA = *TCNTn + SERVO(timer,Channel[timer]).ticks;
+    if(SERVO(timer,Channel[timer]).Pin.isActive == true)     // check if activated
+      digitalWrite( SERVO(timer,Channel[timer]).Pin.nbr,HIGH); // its an active channel so pulse it high
+  }
+  else {
+    // finished all channels so wait for the refresh period to expire before starting over
+    if( ((unsigned)*TCNTn) + 4 < usToTicks(REFRESH_INTERVAL) )  // allow a few ticks to ensure the next OCR1A not missed
+      *OCRnA = (unsigned int)usToTicks(REFRESH_INTERVAL);
+    else
+      *OCRnA = *TCNTn + 4;  // at least REFRESH_INTERVAL has elapsed
+    Channel[timer] = -1; // this will get incremented at the end of the refresh period to start again at the first channel
+  }
+}
+
+#ifndef WIRING // Wiring pre-defines signal handlers so don't define any if compiling for the Wiring platform
+// Interrupt handlers for Arduino
+#if defined(_useTimer1)
+SIGNAL (TIMER1_COMPA_vect)
+{
+  handle_interrupts(_timer1, &TCNT1, &OCR1A);
+}
+#endif
+
+#if defined(_useTimer3)
+SIGNAL (TIMER3_COMPA_vect)
+{
+  handle_interrupts(_timer3, &TCNT3, &OCR3A);
+}
+#endif
+
+#if defined(_useTimer4)
+SIGNAL (TIMER4_COMPA_vect)
+{
+  handle_interrupts(_timer4, &TCNT4, &OCR4A);
+}
+#endif
+
+#if defined(_useTimer5)
+SIGNAL (TIMER5_COMPA_vect)
+{
+  handle_interrupts(_timer5, &TCNT5, &OCR5A);
+}
+#endif
+
+#elif defined WIRING
+// Interrupt handlers for Wiring
+#if defined(_useTimer1)
+void Timer1Service()
+{
+  handle_interrupts(_timer1, &TCNT1, &OCR1A);
+}
+#endif
+#if defined(_useTimer3)
+void Timer3Service()
+{
+  handle_interrupts(_timer3, &TCNT3, &OCR3A);
+}
+#endif
+#endif
+
+
+static void initISR(timer16_Sequence_t timer)
+{
+#if defined (_useTimer1)
+  if(timer == _timer1) {
+    TCCR1A = 0;             // normal counting mode
+    TCCR1B = _BV(CS11);     // set prescaler of 8
+    TCNT1 = 0;              // clear the timer count
+#if defined(__AVR_ATmega8__)|| defined(__AVR_ATmega128__)
+    TIFR |= _BV(OCF1A);      // clear any pending interrupts;
+    TIMSK |=  _BV(OCIE1A) ;  // enable the output compare interrupt
+#else
+    // here if not ATmega8 or ATmega128
+    TIFR1 |= _BV(OCF1A);     // clear any pending interrupts;
+    TIMSK1 |=  _BV(OCIE1A) ; // enable the output compare interrupt
+#endif
+#if defined(WIRING)
+    timerAttach(TIMER1OUTCOMPAREA_INT, Timer1Service);
+#endif
+  }
+#endif
+
+#if defined (_useTimer3)
+  if(timer == _timer3) {
+    TCCR3A = 0;             // normal counting mode
+    TCCR3B = _BV(CS31);     // set prescaler of 8
+    TCNT3 = 0;              // clear the timer count
+#if defined(__AVR_ATmega128__)
+    TIFR |= _BV(OCF3A);     // clear any pending interrupts;
+	ETIMSK |= _BV(OCIE3A);  // enable the output compare interrupt
+#else
+    TIFR3 = _BV(OCF3A);     // clear any pending interrupts;
+    TIMSK3 =  _BV(OCIE3A) ; // enable the output compare interrupt
+#endif
+#if defined(WIRING)
+    timerAttach(TIMER3OUTCOMPAREA_INT, Timer3Service);  // for Wiring platform only
+#endif
+  }
+#endif
+
+#if defined (_useTimer4)
+  if(timer == _timer4) {
+    TCCR4A = 0;             // normal counting mode
+    TCCR4B = _BV(CS41);     // set prescaler of 8
+    TCNT4 = 0;              // clear the timer count
+    TIFR4 = _BV(OCF4A);     // clear any pending interrupts;
+    TIMSK4 =  _BV(OCIE4A) ; // enable the output compare interrupt
+  }
+#endif
+
+#if defined (_useTimer5)
+  if(timer == _timer5) {
+    TCCR5A = 0;             // normal counting mode
+    TCCR5B = _BV(CS51);     // set prescaler of 8
+    TCNT5 = 0;              // clear the timer count
+    TIFR5 = _BV(OCF5A);     // clear any pending interrupts;
+    TIMSK5 =  _BV(OCIE5A) ; // enable the output compare interrupt
+  }
+#endif
+}
+
+static void finISR(timer16_Sequence_t timer)
+{
+    //disable use of the given timer
+#if defined WIRING   // Wiring
+  if(timer == _timer1) {
+    #if defined(__AVR_ATmega1281__)||defined(__AVR_ATmega2561__)
+    TIMSK1 &=  ~_BV(OCIE1A) ;  // disable timer 1 output compare interrupt
+    #else
+    TIMSK &=  ~_BV(OCIE1A) ;  // disable timer 1 output compare interrupt
+    #endif
+    timerDetach(TIMER1OUTCOMPAREA_INT);
+  }
+  else if(timer == _timer3) {
+    #if defined(__AVR_ATmega1281__)||defined(__AVR_ATmega2561__)
+    TIMSK3 &= ~_BV(OCIE3A);    // disable the timer3 output compare A interrupt
+    #else
+    ETIMSK &= ~_BV(OCIE3A);    // disable the timer3 output compare A interrupt
+    #endif
+    timerDetach(TIMER3OUTCOMPAREA_INT);
+  }
+#else
+    //For arduino - in future: call here to a currently undefined function to reset the timer
+#endif
+}
+
+static boolean isTimerActive(timer16_Sequence_t timer)
+{
+  // returns true if any servo is active on this timer
+  for(uint8_t channel=0; channel < SERVOS_PER_TIMER; channel++) {
+    if(SERVO(timer,channel).Pin.isActive == true)
+      return true;
+  }
+  return false;
+}
+
+
+/****************** end of static functions ******************************/
+
+Servo::Servo()
+{
+  if( ServoCount < MAX_SERVOS) {
+    this->servoIndex = ServoCount++;                    // assign a servo index to this instance
+	servos[this->servoIndex].ticks = usToTicks(DEFAULT_PULSE_WIDTH);   // store default values  - 12 Aug 2009
+  }
+  else
+    this->servoIndex = INVALID_SERVO ;  // too many servos
+}
+
+uint8_t Servo::attach(int pin)
+{
+  return this->attach(pin, MIN_PULSE_WIDTH, MAX_PULSE_WIDTH);
+}
+
+uint8_t Servo::attach(int pin, int min, int max)
+{
+  if(this->servoIndex < MAX_SERVOS ) {
+    pinMode( pin, OUTPUT) ;                                   // set servo pin to output
+    servos[this->servoIndex].Pin.nbr = pin;
+    // todo min/max check: abs(min - MIN_PULSE_WIDTH) /4 < 128
+    this->min  = (MIN_PULSE_WIDTH - min)/4; //resolution of min/max is 4 uS
+    this->max  = (MAX_PULSE_WIDTH - max)/4;
+    // initialize the timer if it has not already been initialized
+    timer16_Sequence_t timer = SERVO_INDEX_TO_TIMER(servoIndex);
+    if(isTimerActive(timer) == false)
+      initISR(timer);
+    servos[this->servoIndex].Pin.isActive = true;  // this must be set after the check for isTimerActive
+  }
+  return this->servoIndex ;
+}
+
+void Servo::detach()
+{
+  servos[this->servoIndex].Pin.isActive = false;
+  timer16_Sequence_t timer = SERVO_INDEX_TO_TIMER(servoIndex);
+  if(isTimerActive(timer) == false) {
+    finISR(timer);
+  }
+}
+
+void Servo::write(int value)
+{
+  if(value < MIN_PULSE_WIDTH)
+  {  // treat values less than 544 as angles in degrees (valid values in microseconds are handled as microseconds)
+    if(value < 0) value = 0;
+    if(value > 180) value = 180;
+    value = map(value, 0, 180, SERVO_MIN(),  SERVO_MAX());
+  }
+  this->writeMicroseconds(value);
+}
+
+void Servo::writeMicroseconds(int value)
+{
+  // calculate and store the values for the given channel
+  byte channel = this->servoIndex;
+  if( (channel < MAX_SERVOS) )   // ensure channel is valid
+  {
+    if( value < SERVO_MIN() )          // ensure pulse width is valid
+      value = SERVO_MIN();
+    else if( value > SERVO_MAX() )
+      value = SERVO_MAX();
+
+    value = value - TRIM_DURATION;
+    value = usToTicks(value);  // convert to ticks after compensating for interrupt overhead - 12 Aug 2009
+
+    uint8_t oldSREG = SREG;
+    cli();
+    servos[channel].ticks = value;
+    SREG = oldSREG;
+  }
+}
+
+int Servo::read() // return the value as degrees
+{
+  return  map( this->readMicroseconds()+1, SERVO_MIN(), SERVO_MAX(), 0, 180);
+}
+
+int Servo::readMicroseconds()
+{
+  unsigned int pulsewidth;
+  if( this->servoIndex != INVALID_SERVO )
+    pulsewidth = ticksToUs(servos[this->servoIndex].ticks)  + TRIM_DURATION ;   // 12 aug 2009
+  else
+    pulsewidth  = 0;
+
+  return pulsewidth;
+}
+
+bool Servo::attached()
+{
+  return servos[this->servoIndex].Pin.isActive ;
+}
+
+#endif // ARDUINO_ARCH_AVR
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/src/avr/ServoTimers.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/src/avr/ServoTimers.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/src/avr/ServoTimers.h	(revision 136)
@@ -0,0 +1,59 @@
+/*
+  Servo.h - Interrupt driven Servo library for Arduino using 16 bit timers- Version 2
+  Copyright (c) 2009 Michael Margolis.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+/*
+ * Defines for 16 bit timers used with  Servo library
+ *
+ * If _useTimerX is defined then TimerX is a 16 bit timer on the current board
+ * timer16_Sequence_t enumerates the sequence that the timers should be allocated
+ * _Nbr_16timers indicates how many 16 bit timers are available.
+ */
+
+/**
+ * AVR Only definitions
+ * --------------------
+ */
+
+// Say which 16 bit timers can be used and in what order
+#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
+#define _useTimer5
+#define _useTimer1
+#define _useTimer3
+#define _useTimer4
+typedef enum { _timer5, _timer1, _timer3, _timer4, _Nbr_16timers } timer16_Sequence_t;
+
+#elif defined(__AVR_ATmega32U4__)
+#define _useTimer1
+typedef enum { _timer1, _Nbr_16timers } timer16_Sequence_t;
+
+#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
+#define _useTimer3
+#define _useTimer1
+typedef enum { _timer3, _timer1, _Nbr_16timers } timer16_Sequence_t;
+
+#elif defined(__AVR_ATmega128__) ||defined(__AVR_ATmega1281__)||defined(__AVR_ATmega2561__)
+#define _useTimer3
+#define _useTimer1
+typedef enum { _timer3, _timer1, _Nbr_16timers } timer16_Sequence_t;
+
+#else  // everything else
+#define _useTimer1
+typedef enum { _timer1, _Nbr_16timers } timer16_Sequence_t;
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/src/sam/Servo.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/src/sam/Servo.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/src/sam/Servo.cpp	(revision 136)
@@ -0,0 +1,283 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#if defined(ARDUINO_ARCH_SAM)
+
+#include <Arduino.h>
+#include <Servo.h>
+
+#define usToTicks(_us)    (( clockCyclesPerMicrosecond() * _us) / 32)     // converts microseconds to tick
+#define ticksToUs(_ticks) (( (unsigned)_ticks * 32)/ clockCyclesPerMicrosecond() ) // converts from ticks back to microseconds
+
+#define TRIM_DURATION       2                               // compensation ticks to trim adjust for digitalWrite delays
+
+static servo_t servos[MAX_SERVOS];                          // static array of servo structures
+
+uint8_t ServoCount = 0;                                     // the total number of attached servos
+
+static volatile int8_t Channel[_Nbr_16timers ];             // counter for the servo being pulsed for each timer (or -1 if refresh interval)
+
+// convenience macros
+#define SERVO_INDEX_TO_TIMER(_servo_nbr) ((timer16_Sequence_t)(_servo_nbr / SERVOS_PER_TIMER)) // returns the timer controlling this servo
+#define SERVO_INDEX_TO_CHANNEL(_servo_nbr) (_servo_nbr % SERVOS_PER_TIMER)       // returns the index of the servo on this timer
+#define SERVO_INDEX(_timer,_channel)  ((_timer*SERVOS_PER_TIMER) + _channel)     // macro to access servo index by timer and channel
+#define SERVO(_timer,_channel)  (servos[SERVO_INDEX(_timer,_channel)])            // macro to access servo class by timer and channel
+
+#define SERVO_MIN() (MIN_PULSE_WIDTH - this->min * 4)  // minimum value in uS for this servo
+#define SERVO_MAX() (MAX_PULSE_WIDTH - this->max * 4)  // maximum value in uS for this servo
+
+/************ static functions common to all instances ***********************/
+
+//------------------------------------------------------------------------------
+/// Interrupt handler for the TC0 channel 1.
+//------------------------------------------------------------------------------
+void Servo_Handler(timer16_Sequence_t timer, Tc *pTc, uint8_t channel);
+#if defined (_useTimer1)
+void HANDLER_FOR_TIMER1(void) {
+    Servo_Handler(_timer1, TC_FOR_TIMER1, CHANNEL_FOR_TIMER1);
+}
+#endif
+#if defined (_useTimer2)
+void HANDLER_FOR_TIMER2(void) {
+    Servo_Handler(_timer2, TC_FOR_TIMER2, CHANNEL_FOR_TIMER2);
+}
+#endif
+#if defined (_useTimer3)
+void HANDLER_FOR_TIMER3(void) {
+    Servo_Handler(_timer3, TC_FOR_TIMER3, CHANNEL_FOR_TIMER3);
+}
+#endif
+#if defined (_useTimer4)
+void HANDLER_FOR_TIMER4(void) {
+    Servo_Handler(_timer4, TC_FOR_TIMER4, CHANNEL_FOR_TIMER4);
+}
+#endif
+#if defined (_useTimer5)
+void HANDLER_FOR_TIMER5(void) {
+    Servo_Handler(_timer5, TC_FOR_TIMER5, CHANNEL_FOR_TIMER5);
+}
+#endif
+
+void Servo_Handler(timer16_Sequence_t timer, Tc *tc, uint8_t channel)
+{
+    // clear interrupt
+    tc->TC_CHANNEL[channel].TC_SR;
+    if (Channel[timer] < 0) {
+        tc->TC_CHANNEL[channel].TC_CCR |= TC_CCR_SWTRG; // channel set to -1 indicated that refresh interval completed so reset the timer
+    } else {
+        if (SERVO_INDEX(timer,Channel[timer]) < ServoCount && SERVO(timer,Channel[timer]).Pin.isActive == true) {
+            digitalWrite(SERVO(timer,Channel[timer]).Pin.nbr, LOW); // pulse this channel low if activated
+        }
+    }
+
+    Channel[timer]++;    // increment to the next channel
+    if( SERVO_INDEX(timer,Channel[timer]) < ServoCount && Channel[timer] < SERVOS_PER_TIMER) {
+        tc->TC_CHANNEL[channel].TC_RA = tc->TC_CHANNEL[channel].TC_CV + SERVO(timer,Channel[timer]).ticks;
+        if(SERVO(timer,Channel[timer]).Pin.isActive == true) {    // check if activated
+            digitalWrite( SERVO(timer,Channel[timer]).Pin.nbr,HIGH); // its an active channel so pulse it high
+        }
+    }
+    else {
+        // finished all channels so wait for the refresh period to expire before starting over
+        if( (tc->TC_CHANNEL[channel].TC_CV) + 4 < usToTicks(REFRESH_INTERVAL) ) { // allow a few ticks to ensure the next OCR1A not missed
+            tc->TC_CHANNEL[channel].TC_RA = (unsigned int)usToTicks(REFRESH_INTERVAL);
+        }
+        else {
+            tc->TC_CHANNEL[channel].TC_RA = tc->TC_CHANNEL[channel].TC_CV + 4;  // at least REFRESH_INTERVAL has elapsed
+        }
+        Channel[timer] = -1; // this will get incremented at the end of the refresh period to start again at the first channel
+    }
+}
+
+static void _initISR(Tc *tc, uint32_t channel, uint32_t id, IRQn_Type irqn)
+{
+    pmc_enable_periph_clk(id);
+    TC_Configure(tc, channel,
+   TC_CMR_TCCLKS_TIMER_CLOCK3 | // MCK/32
+            TC_CMR_WAVE |                // Waveform mode
+            TC_CMR_WAVSEL_UP_RC );       // Counter running up and reset when equals to RC
+
+    /* 84MHz, MCK/32, for 1.5ms: 3937 */
+    TC_SetRA(tc, channel, 2625); // 1ms
+
+    /* Configure and enable interrupt */
+    NVIC_EnableIRQ(irqn);
+    // TC_IER_CPAS: RA Compare
+    tc->TC_CHANNEL[channel].TC_IER = TC_IER_CPAS;
+
+    // Enables the timer clock and performs a software reset to start the counting
+    TC_Start(tc, channel);
+}
+
+static void initISR(timer16_Sequence_t timer)
+{
+#if defined (_useTimer1)
+    if (timer == _timer1)
+        _initISR(TC_FOR_TIMER1, CHANNEL_FOR_TIMER1, ID_TC_FOR_TIMER1, IRQn_FOR_TIMER1);
+#endif
+#if defined (_useTimer2)
+    if (timer == _timer2)
+        _initISR(TC_FOR_TIMER2, CHANNEL_FOR_TIMER2, ID_TC_FOR_TIMER2, IRQn_FOR_TIMER2);
+#endif
+#if defined (_useTimer3)
+    if (timer == _timer3)
+        _initISR(TC_FOR_TIMER3, CHANNEL_FOR_TIMER3, ID_TC_FOR_TIMER3, IRQn_FOR_TIMER3);
+#endif
+#if defined (_useTimer4)
+    if (timer == _timer4)
+        _initISR(TC_FOR_TIMER4, CHANNEL_FOR_TIMER4, ID_TC_FOR_TIMER4, IRQn_FOR_TIMER4);
+#endif
+#if defined (_useTimer5)
+    if (timer == _timer5)
+        _initISR(TC_FOR_TIMER5, CHANNEL_FOR_TIMER5, ID_TC_FOR_TIMER5, IRQn_FOR_TIMER5);
+#endif
+}
+
+static void finISR(timer16_Sequence_t timer)
+{
+#if defined (_useTimer1)
+    TC_Stop(TC_FOR_TIMER1, CHANNEL_FOR_TIMER1);
+#endif
+#if defined (_useTimer2)
+    TC_Stop(TC_FOR_TIMER2, CHANNEL_FOR_TIMER2);
+#endif
+#if defined (_useTimer3)
+    TC_Stop(TC_FOR_TIMER3, CHANNEL_FOR_TIMER3);
+#endif
+#if defined (_useTimer4)
+    TC_Stop(TC_FOR_TIMER4, CHANNEL_FOR_TIMER4);
+#endif
+#if defined (_useTimer5)
+    TC_Stop(TC_FOR_TIMER5, CHANNEL_FOR_TIMER5);
+#endif
+}
+
+
+static boolean isTimerActive(timer16_Sequence_t timer)
+{
+  // returns true if any servo is active on this timer
+  for(uint8_t channel=0; channel < SERVOS_PER_TIMER; channel++) {
+    if(SERVO(timer,channel).Pin.isActive == true)
+      return true;
+  }
+  return false;
+}
+
+/****************** end of static functions ******************************/
+
+Servo::Servo()
+{
+  if (ServoCount < MAX_SERVOS) {
+    this->servoIndex = ServoCount++;                    // assign a servo index to this instance
+    servos[this->servoIndex].ticks = usToTicks(DEFAULT_PULSE_WIDTH);   // store default values
+  } else {
+    this->servoIndex = INVALID_SERVO;  // too many servos
+  }
+}
+
+uint8_t Servo::attach(int pin)
+{
+  return this->attach(pin, MIN_PULSE_WIDTH, MAX_PULSE_WIDTH);
+}
+
+uint8_t Servo::attach(int pin, int min, int max)
+{
+  timer16_Sequence_t timer;
+
+  if (this->servoIndex < MAX_SERVOS) {
+    pinMode(pin, OUTPUT);                                   // set servo pin to output
+    servos[this->servoIndex].Pin.nbr = pin;
+    // todo min/max check: abs(min - MIN_PULSE_WIDTH) /4 < 128
+    this->min  = (MIN_PULSE_WIDTH - min)/4; //resolution of min/max is 4 uS
+    this->max  = (MAX_PULSE_WIDTH - max)/4;
+    // initialize the timer if it has not already been initialized
+    timer = SERVO_INDEX_TO_TIMER(servoIndex);
+    if (isTimerActive(timer) == false) {
+      initISR(timer);
+    }
+    servos[this->servoIndex].Pin.isActive = true;  // this must be set after the check for isTimerActive
+  }
+  return this->servoIndex;
+}
+
+void Servo::detach()
+{
+  timer16_Sequence_t timer;
+
+  servos[this->servoIndex].Pin.isActive = false;
+  timer = SERVO_INDEX_TO_TIMER(servoIndex);
+  if(isTimerActive(timer) == false) {
+    finISR(timer);
+  }
+}
+
+void Servo::write(int value)
+{
+  // treat values less than 544 as angles in degrees (valid values in microseconds are handled as microseconds)
+  if (value < MIN_PULSE_WIDTH)
+  {
+    if (value < 0)
+      value = 0;
+    else if (value > 180)
+      value = 180;
+
+    value = map(value, 0, 180, SERVO_MIN(), SERVO_MAX());
+  }
+  writeMicroseconds(value);
+}
+
+void Servo::writeMicroseconds(int value)
+{
+  // calculate and store the values for the given channel
+  byte channel = this->servoIndex;
+  if( (channel < MAX_SERVOS) )   // ensure channel is valid
+  {
+    if (value < SERVO_MIN())          // ensure pulse width is valid
+      value = SERVO_MIN();
+    else if (value > SERVO_MAX())
+      value = SERVO_MAX();
+
+    value = value - TRIM_DURATION;
+    value = usToTicks(value);  // convert to ticks after compensating for interrupt overhead
+    servos[channel].ticks = value;
+  }
+}
+
+int Servo::read() // return the value as degrees
+{
+  return map(readMicroseconds()+1, SERVO_MIN(), SERVO_MAX(), 0, 180);
+}
+
+int Servo::readMicroseconds()
+{
+  unsigned int pulsewidth;
+  if (this->servoIndex != INVALID_SERVO)
+    pulsewidth = ticksToUs(servos[this->servoIndex].ticks)  + TRIM_DURATION;
+  else
+    pulsewidth  = 0;
+
+  return pulsewidth;
+}
+
+bool Servo::attached()
+{
+  return servos[this->servoIndex].Pin.isActive;
+}
+
+#endif // ARDUINO_ARCH_SAM
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/src/sam/ServoTimers.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/src/sam/ServoTimers.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/src/sam/ServoTimers.h	(revision 136)
@@ -0,0 +1,88 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+/*
+ * Defines for 16 bit timers used with  Servo library
+ *
+ * If _useTimerX is defined then TimerX is a 16 bit timer on the current board
+ * timer16_Sequence_t enumerates the sequence that the timers should be allocated
+ * _Nbr_16timers indicates how many 16 bit timers are available.
+ */
+
+/**
+ * SAM Only definitions
+ * --------------------
+ */
+
+// For SAM3X:
+#define _useTimer1
+#define _useTimer2
+#define _useTimer3
+#define _useTimer4
+#define _useTimer5
+
+/*
+  TC0, chan 0 => TC0_Handler
+  TC0, chan 1 => TC1_Handler
+  TC0, chan 2 => TC2_Handler
+  TC1, chan 0 => TC3_Handler
+  TC1, chan 1 => TC4_Handler
+  TC1, chan 2 => TC5_Handler
+  TC2, chan 0 => TC6_Handler
+  TC2, chan 1 => TC7_Handler
+  TC2, chan 2 => TC8_Handler
+ */
+
+#if defined (_useTimer1)
+#define TC_FOR_TIMER1       TC1
+#define CHANNEL_FOR_TIMER1  0
+#define ID_TC_FOR_TIMER1    ID_TC3
+#define IRQn_FOR_TIMER1     TC3_IRQn
+#define HANDLER_FOR_TIMER1  TC3_Handler
+#endif
+#if defined (_useTimer2)
+#define TC_FOR_TIMER2       TC1
+#define CHANNEL_FOR_TIMER2  1
+#define ID_TC_FOR_TIMER2    ID_TC4
+#define IRQn_FOR_TIMER2     TC4_IRQn
+#define HANDLER_FOR_TIMER2  TC4_Handler
+#endif
+#if defined (_useTimer3)
+#define TC_FOR_TIMER3       TC1
+#define CHANNEL_FOR_TIMER3  2
+#define ID_TC_FOR_TIMER3    ID_TC5
+#define IRQn_FOR_TIMER3     TC5_IRQn
+#define HANDLER_FOR_TIMER3  TC5_Handler
+#endif
+#if defined (_useTimer4)
+#define TC_FOR_TIMER4       TC0
+#define CHANNEL_FOR_TIMER4  2
+#define ID_TC_FOR_TIMER4    ID_TC2
+#define IRQn_FOR_TIMER4     TC2_IRQn
+#define HANDLER_FOR_TIMER4  TC2_Handler
+#endif
+#if defined (_useTimer5)
+#define TC_FOR_TIMER5       TC0
+#define CHANNEL_FOR_TIMER5  0
+#define ID_TC_FOR_TIMER5    ID_TC0
+#define IRQn_FOR_TIMER5     TC0_IRQn
+#define HANDLER_FOR_TIMER5  TC0_Handler
+#endif
+
+typedef enum { _timer1, _timer2, _timer3, _timer4, _timer5, _Nbr_16timers } timer16_Sequence_t ;
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/src/samd/Servo.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/src/samd/Servo.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/src/samd/Servo.cpp	(revision 136)
@@ -0,0 +1,263 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#if defined(ARDUINO_ARCH_SAMD)
+
+#include <Arduino.h>
+#include <Servo.h>
+
+static servo_t servos[MAX_SERVOS];                          // static array of servo structures
+
+uint8_t ServoCount = 0;                                     // the total number of attached servos
+Tcc* TCCx;
+uint8_t Channelx = 0;
+
+// convenience macros
+
+#define SERVO_MIN() (MIN_PULSE_WIDTH_SAMD)  // minimum value in uS for this servo
+#define SERVO_MAX() (MAX_PULSE_WIDTH_SAMD)  // maximum value in uS for this servo
+
+/************ static functions common to all instances ***********************/
+
+//------------------------------------------------------------------------------
+/// Interrupt handler for the TC0 channel 1.
+//------------------------------------------------------------------------------
+
+
+/****************** end of static functions ******************************/
+
+Servo::Servo()
+{
+  if (ServoCount < MAX_SERVOS) {
+    this->servoIndex = ServoCount++;                    // assign a servo index to this instance
+  } else {                                                  //su questo costruttore forse si deve tornare
+    this->servoIndex = INVALID_SERVO;  // too many servos
+  }
+}
+
+uint8_t Servo::attach(int pin)
+{
+  return this->attach(pin, MIN_PULSE_WIDTH_SAMD, MAX_PULSE_WIDTH_SAMD);
+}
+
+uint8_t Servo::attach(int pin, int min, int max)
+{
+  
+
+  if (this->servoIndex < MAX_SERVOS) {
+    pinMode(pin, OUTPUT);                                   // set servo pin to output
+    servos[this->servoIndex].Pin.nbr = pin;
+    if(min > MIN_PULSE_WIDTH_SAMD) min = MIN_PULSE_WIDTH_SAMD;
+	if (max > MAX_PULSE_WIDTH_SAMD) max = MAX_PULSE_WIDTH_SAMD;
+	this->min  = min;
+    this->max  = max;
+	
+	switch(pin)
+	{
+		case 2:
+		{
+			pinPeripheral(pin, g_APinDescription[pin].ulPinType);
+			TCCx=TCC0;
+			Channelx=0;
+		}
+		break;
+		
+		case 3:
+		{
+			pinPeripheral(pin, g_APinDescription[pin].ulPinType);
+			TCCx=TCC0;
+			Channelx=1;
+		}
+		break;
+		
+		case 6:
+		{
+			pinPeripheral(pin, g_APinDescription[pin].ulPinType);
+			TCCx=TCC0;
+			Channelx=2;
+		}
+		break;
+		
+		case 7:
+		{
+			pinPeripheral(pin, g_APinDescription[pin].ulPinType);
+			TCCx=TCC0;
+			Channelx=3;
+		}
+		break;
+		
+		case 8:
+		{
+			pinPeripheral(pin, g_APinDescription[pin].ulPinType);
+			TCCx=TCC1;
+			Channelx=0;
+		}
+		break;
+		
+		case 9:
+		{
+			pinPeripheral(pin, g_APinDescription[pin].ulPinType);
+			TCCx=TCC1;
+			Channelx=1;
+		}
+		break;
+		
+		case 11:
+		{
+			pinPeripheral(pin, g_APinDescription[pin].ulPinType);
+			TCCx=TCC2;
+			Channelx=0;
+		}
+		break;
+		
+		case 13:
+		{
+			pinPeripheral(pin, g_APinDescription[pin].ulPinType);
+			TCCx=TCC2;
+			Channelx=1;
+		}
+		break;
+		
+		default:
+		break;
+		
+	}
+	
+	if ((TCCx==TCC0) | (TCCx==TCC1)) GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID( GCM_TCC0_TCC1 )) ;
+	else if(TCCx==TCC2) GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID( GCM_TCC2_TC3 )) ;
+	else;
+		
+	if(servos[this->servoIndex].Pin.isActive == false)
+	{	
+		TCCx->CTRLA.reg &=~(TCC_CTRLA_ENABLE);        //disable TCC module
+		TCCx->CTRLA.reg |=TCC_CTRLA_PRESCALER_DIV8;   //setting prescaler to divide by 8
+		TCCx->WAVE.reg |= TCC_WAVE_WAVEGEN_NPWM;      //Set TCCx as normal PWM
+		TCCx->CC[Channelx].reg=1500;                  //default value for servo position
+		TCCx->PER.reg=20000;                          // setting servo frequency (50 hz) 
+		TCCx->CTRLA.reg |= TCC_CTRLA_ENABLE ;	      //ENABLE TCCx
+		servos[this->servoIndex].Pin.isActive = true; 
+	}	
+    
+    //servos[this->servoIndex].Pin.isActive = true;  // this must be set after the check for isTimerActive
+  }
+  return this->servoIndex;
+}
+
+void Servo::detach()
+{
+  
+	
+  servos[this->servoIndex].Pin.isActive = false;
+  if((servos[this->servoIndex].Pin.nbr == 2) | (servos[this->servoIndex].Pin.nbr == 3) | (servos[this->servoIndex].Pin.nbr == 6) | (servos[this->servoIndex].Pin.nbr == 7)) TCC0->CTRLA.reg &=~(TCC_CTRLA_ENABLE); 
+  else if((servos[this->servoIndex].Pin.nbr == 8) | (servos[this->servoIndex].Pin.nbr == 9)) TCC1->CTRLA.reg &=~(TCC_CTRLA_ENABLE);
+  else if ((servos[this->servoIndex].Pin.nbr == 11) | (servos[this->servoIndex].Pin.nbr == 13)) TCC2->CTRLA.reg &=~(TCC_CTRLA_ENABLE);	
+}
+
+void Servo::write(int value)
+{
+  // treat values less than 544 as angles in degrees (valid values in microseconds are handled as microseconds)
+  if (value < MIN_PULSE_WIDTH)
+  {
+    if (value < 0)
+      value = 0;
+    else if (value > 180)
+      value = 180;
+
+    value = map(value, 0, 180, SERVO_MIN(), SERVO_MAX());
+  }
+  writeMicroseconds(value);
+}
+
+void Servo::writeMicroseconds(int value)
+{
+  // calculate and store the values for the given channel
+  byte channel = this->servoIndex;
+  if( (channel < MAX_SERVOS) )   // ensure channel is valid
+  {
+    if (value < SERVO_MIN())          // ensure pulse width is valid
+      value = SERVO_MIN();
+    else if (value > SERVO_MAX())
+      value = SERVO_MAX();
+    servos[this->servoIndex].ticks = value;   //da sistemare
+	switch(servos[this->servoIndex].Pin.nbr)
+	{
+		case 2:
+			TCC0->CC[0].reg=value;
+			break;
+			
+		case 3:
+			TCC0->CC[1].reg=value;
+			break;
+			
+		case 6:
+			TCC0->CC[2].reg=value;
+			break;
+			
+		case 7:
+			TCC0->CC[3].reg=value;
+			break;
+
+		case 8:
+			TCC1->CC[0].reg=value;
+			break;			
+		
+		case 9:
+			TCC1->CC[1].reg=value;
+			break;
+			
+		case 11:
+			TCC2->CC[0].reg=value;
+			break;
+
+		case 13:
+			TCC2->CC[1].reg=value;
+			break;
+
+		default:
+		break;
+		
+	}
+    
+    //servos[this->servoIndex].ticks = value;   //da sistemare
+	//servos[channel].ticks = value;
+  }
+}
+
+int Servo::read() // return the value as degrees
+{
+  return map(readMicroseconds(), SERVO_MIN(), SERVO_MAX(), 0, 180);
+}
+
+int Servo::readMicroseconds()
+{
+  unsigned int pulsewidth;
+  if (this->servoIndex != INVALID_SERVO)
+    pulsewidth = servos[this->servoIndex].ticks;
+  else
+    pulsewidth  = 0;
+
+  return pulsewidth;
+}
+
+bool Servo::attached()
+{
+  return servos[this->servoIndex].Pin.isActive;
+}
+
+#endif // ARDUINO_ARCH_SAM
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Servo/src/samd/ServoTimersSamd.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Servo/src/samd/ServoTimersSamd.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Servo/src/samd/ServoTimersSamd.h	(revision 136)
@@ -0,0 +1,68 @@
+/*
+  Copyright (c) 2013 Arduino LLC. All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+  Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+/*
+ * Defines for 16 bit timers used with  Servo library
+ *
+ * If _useTimerX is defined then TimerX is a 16 bit timer on the current board
+ * timer16_Sequence_t enumerates the sequence that the timers should be allocated
+ * _Nbr_16timers indicates how many 16 bit timers are available.
+ */
+
+/**
+ * SAM Only definitions
+ * --------------------
+ */
+
+// For SAMD21G:
+#define _useTimer0
+#define _useTimer1
+#define _useTimer2
+
+
+
+
+#if defined (_useTimer0)
+#define TC_FOR_TIMER0       TCC0
+#define CHANNEL0_FOR_TIMER0  0
+#define CHANNEL1_FOR_TIMER0  1
+#define CHANNEL2_FOR_TIMER0  2
+#define CHANNEL3_FOR_TIMER0  3
+//#define ID_TC_FOR_TIMER1    ID_TC3   //forse non serve
+
+#endif
+#if defined (_useTimer1)
+#define TC_FOR_TIMER1       TCC1
+#define CHANNEL0_FOR_TIMER1  0
+#define CHANNEL1_FOR_TIMER1  1
+//#define ID_TC_FOR_TIMER2    ID_TC4   //forse non serve
+#endif
+
+
+#if defined (_useTimer2)
+#define TC_FOR_TIMER2       TCC2
+#define CHANNEL_FOR_TIMER2  0
+#define CHANNEL_FOR_TIMER2  1
+//#define ID_TC_FOR_TIMER3    ID_TC5      //forse non serve
+
+#endif
+
+#endif
+
+//typedef enum { _timer1, _timer2, _timer3, _timer4, _timer5, _Nbr_16timers } timer16_Sequence_t ;    // forse non serve
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Stepper/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Stepper/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Stepper/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= Stepper Library for Arduino =
+
+This library allows you to control unipolar or bipolar stepper motors. To use it you will need a stepper motor, and the appropriate hardware to control it.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/Stepper
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/MotorKnob/MotorKnob.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/MotorKnob/MotorKnob.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/MotorKnob/MotorKnob.ino	(revision 136)
@@ -0,0 +1,41 @@
+/*
+ * MotorKnob
+ *
+ * A stepper motor follows the turns of a potentiometer
+ * (or other sensor) on analog input 0.
+ *
+ * http://www.arduino.cc/en/Reference/Stepper
+ * This example code is in the public domain.
+ */
+
+#include <Stepper.h>
+
+// change this to the number of steps on your motor
+#define STEPS 100
+
+// create an instance of the stepper class, specifying
+// the number of steps of the motor and the pins it's
+// attached to
+Stepper stepper(STEPS, 8, 9, 10, 11);
+
+// the previous reading from the analog input
+int previous = 0;
+
+void setup()
+{
+  // set the speed of the motor to 30 RPMs
+  stepper.setSpeed(30);
+}
+
+void loop()
+{
+  // get the sensor value
+  int val = analogRead(0);
+
+  // move a number of steps equal to the change in the
+  // sensor reading
+  stepper.step(val - previous);
+
+  // remember the previous value of the sensor
+  previous = val;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/stepper_oneRevolution/stepper_oneRevolution.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/stepper_oneRevolution/stepper_oneRevolution.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/stepper_oneRevolution/stepper_oneRevolution.ino	(revision 136)
@@ -0,0 +1,44 @@
+
+/*
+ Stepper Motor Control - one revolution
+
+ This program drives a unipolar or bipolar stepper motor.
+ The motor is attached to digital pins 8 - 11 of the Arduino.
+
+ The motor should revolve one revolution in one direction, then
+ one revolution in the other direction.
+
+
+ Created 11 Mar. 2007
+ Modified 30 Nov. 2009
+ by Tom Igoe
+
+ */
+
+#include <Stepper.h>
+
+const int stepsPerRevolution = 200;  // change this to fit the number of steps per revolution
+// for your motor
+
+// initialize the stepper library on pins 8 through 11:
+Stepper myStepper(stepsPerRevolution, 8, 9, 10, 11);
+
+void setup() {
+  // set the speed at 60 rpm:
+  myStepper.setSpeed(60);
+  // initialize the serial port:
+  Serial.begin(9600);
+}
+
+void loop() {
+  // step one revolution  in one direction:
+  Serial.println("clockwise");
+  myStepper.step(stepsPerRevolution);
+  delay(500);
+
+  // step one revolution in the other direction:
+  Serial.println("counterclockwise");
+  myStepper.step(-stepsPerRevolution);
+  delay(500);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/stepper_oneStepAtATime/stepper_oneStepAtATime.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/stepper_oneStepAtATime/stepper_oneStepAtATime.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/stepper_oneStepAtATime/stepper_oneStepAtATime.ino	(revision 136)
@@ -0,0 +1,44 @@
+
+/*
+ Stepper Motor Control - one step at a time
+
+ This program drives a unipolar or bipolar stepper motor.
+ The motor is attached to digital pins 8 - 11 of the Arduino.
+
+ The motor will step one step at a time, very slowly.  You can use this to
+ test that you've got the four wires of your stepper wired to the correct
+ pins. If wired correctly, all steps should be in the same direction.
+
+ Use this also to count the number of steps per revolution of your motor,
+ if you don't know it.  Then plug that number into the oneRevolution
+ example to see if you got it right.
+
+ Created 30 Nov. 2009
+ by Tom Igoe
+
+ */
+
+#include <Stepper.h>
+
+const int stepsPerRevolution = 200;  // change this to fit the number of steps per revolution
+// for your motor
+
+// initialize the stepper library on pins 8 through 11:
+Stepper myStepper(stepsPerRevolution, 8, 9, 10, 11);
+
+int stepCount = 0;         // number of steps the motor has taken
+
+void setup() {
+  // initialize the serial port:
+  Serial.begin(9600);
+}
+
+void loop() {
+  // step one step:
+  myStepper.step(1);
+  Serial.print("steps:" );
+  Serial.println(stepCount);
+  stepCount++;
+  delay(500);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/stepper_speedControl/stepper_speedControl.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/stepper_speedControl/stepper_speedControl.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Stepper/examples/stepper_speedControl/stepper_speedControl.ino	(revision 136)
@@ -0,0 +1,48 @@
+
+/*
+ Stepper Motor Control - speed control
+
+ This program drives a unipolar or bipolar stepper motor.
+ The motor is attached to digital pins 8 - 11 of the Arduino.
+ A potentiometer is connected to analog input 0.
+
+ The motor will rotate in a clockwise direction. The higher the potentiometer value,
+ the faster the motor speed. Because setSpeed() sets the delay between steps,
+ you may notice the motor is less responsive to changes in the sensor value at
+ low speeds.
+
+ Created 30 Nov. 2009
+ Modified 28 Oct 2010
+ by Tom Igoe
+
+ */
+
+#include <Stepper.h>
+
+const int stepsPerRevolution = 200;  // change this to fit the number of steps per revolution
+// for your motor
+
+
+// initialize the stepper library on pins 8 through 11:
+Stepper myStepper(stepsPerRevolution, 8, 9, 10, 11);
+
+int stepCount = 0;  // number of steps the motor has taken
+
+void setup() {
+  // nothing to do inside the setup
+}
+
+void loop() {
+  // read the sensor value:
+  int sensorReading = analogRead(A0);
+  // map it to a range from 0 to 100:
+  int motorSpeed = map(sensorReading, 0, 1023, 0, 100);
+  // set the motor speed:
+  if (motorSpeed > 0) {
+    myStepper.setSpeed(motorSpeed);
+    // step 1/100 of a revolution:
+    myStepper.step(stepsPerRevolution / 100);
+  }
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Stepper/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Stepper/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Stepper/keywords.txt	(revision 136)
@@ -0,0 +1,28 @@
+#######################################
+# Syntax Coloring Map For Test
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+Stepper	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+step	KEYWORD2
+setSpeed	KEYWORD2
+version	KEYWORD2
+
+######################################
+# Instances (KEYWORD2)
+#######################################
+direction	KEYWORD2
+speed	KEYWORD2
+
+
+#######################################
+# Constants (LITERAL1)
+#######################################
Index: rtos_arduino/trunk/arduino_lib/libraries/Stepper/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Stepper/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Stepper/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=Stepper
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Allows Arduino boards to control a variety of stepper motors. For all Arduino boards.
+paragraph=This library allows you to control unipolar or bipolar stepper motors. To use it you will need a stepper motor, and the appropriate hardware to control it.
+category=Device Control
+url=http://arduino.cc/en/Reference/Stepper
+architectures=*
Index: rtos_arduino/trunk/arduino_lib/libraries/Stepper/src/Stepper.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Stepper/src/Stepper.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Stepper/src/Stepper.cpp	(revision 136)
@@ -0,0 +1,220 @@
+/*
+  Stepper.cpp - - Stepper library for Wiring/Arduino - Version 0.4
+  
+  Original library     (0.1) by Tom Igoe.
+  Two-wire modifications   (0.2) by Sebastian Gassner
+  Combination version   (0.3) by Tom Igoe and David Mellis
+  Bug fix for four-wire   (0.4) by Tom Igoe, bug fix from Noah Shibley  
+
+  Drives a unipolar or bipolar stepper motor using  2 wires or 4 wires
+
+  When wiring multiple stepper motors to a microcontroller,
+  you quickly run out of output pins, with each motor requiring 4 connections. 
+
+  By making use of the fact that at any time two of the four motor
+  coils are the inverse  of the other two, the number of
+  control connections can be reduced from 4 to 2. 
+
+  A slightly modified circuit around a Darlington transistor array or an L293 H-bridge
+  connects to only 2 microcontroler pins, inverts the signals received,
+  and delivers the 4 (2 plus 2 inverted ones) output signals required
+  for driving a stepper motor.
+
+  The sequence of control signals for 4 control wires is as follows:
+
+  Step C0 C1 C2 C3
+     1  1  0  1  0
+     2  0  1  1  0
+     3  0  1  0  1
+     4  1  0  0  1
+
+  The sequence of controls signals for 2 control wires is as follows
+  (columns C1 and C2 from above):
+
+  Step C0 C1
+     1  0  1
+     2  1  1
+     3  1  0
+     4  0  0
+
+  The circuits can be found at 
+ 
+http://www.arduino.cc/en/Tutorial/Stepper
+ 
+ 
+ */
+
+
+#include "Arduino.h"
+#include "Stepper.h"
+
+/*
+ * two-wire constructor.
+ * Sets which wires should control the motor.
+ */
+Stepper::Stepper(int number_of_steps, int motor_pin_1, int motor_pin_2)
+{
+  this->step_number = 0;      // which step the motor is on
+  this->speed = 0;        // the motor speed, in revolutions per minute
+  this->direction = 0;      // motor direction
+  this->last_step_time = 0;    // time stamp in ms of the last step taken
+  this->number_of_steps = number_of_steps;    // total number of steps for this motor
+  
+  // Arduino pins for the motor control connection:
+  this->motor_pin_1 = motor_pin_1;
+  this->motor_pin_2 = motor_pin_2;
+
+  // setup the pins on the microcontroller:
+  pinMode(this->motor_pin_1, OUTPUT);
+  pinMode(this->motor_pin_2, OUTPUT);
+  
+  // When there are only 2 pins, set the other two to 0:
+  this->motor_pin_3 = 0;
+  this->motor_pin_4 = 0;
+  
+  // pin_count is used by the stepMotor() method:
+  this->pin_count = 2;
+}
+
+
+/*
+ *   constructor for four-pin version
+ *   Sets which wires should control the motor.
+ */
+
+Stepper::Stepper(int number_of_steps, int motor_pin_1, int motor_pin_2, int motor_pin_3, int motor_pin_4)
+{
+  this->step_number = 0;      // which step the motor is on
+  this->speed = 0;        // the motor speed, in revolutions per minute
+  this->direction = 0;      // motor direction
+  this->last_step_time = 0;    // time stamp in ms of the last step taken
+  this->number_of_steps = number_of_steps;    // total number of steps for this motor
+  
+  // Arduino pins for the motor control connection:
+  this->motor_pin_1 = motor_pin_1;
+  this->motor_pin_2 = motor_pin_2;
+  this->motor_pin_3 = motor_pin_3;
+  this->motor_pin_4 = motor_pin_4;
+
+  // setup the pins on the microcontroller:
+  pinMode(this->motor_pin_1, OUTPUT);
+  pinMode(this->motor_pin_2, OUTPUT);
+  pinMode(this->motor_pin_3, OUTPUT);
+  pinMode(this->motor_pin_4, OUTPUT);
+
+  // pin_count is used by the stepMotor() method:  
+  this->pin_count = 4;  
+}
+
+/*
+  Sets the speed in revs per minute
+
+*/
+void Stepper::setSpeed(long whatSpeed)
+{
+  this->step_delay = 60L * 1000L / this->number_of_steps / whatSpeed;
+}
+
+/*
+  Moves the motor steps_to_move steps.  If the number is negative, 
+   the motor moves in the reverse direction.
+ */
+void Stepper::step(int steps_to_move)
+{  
+  int steps_left = abs(steps_to_move);  // how many steps to take
+  
+  // determine direction based on whether steps_to_mode is + or -:
+  if (steps_to_move > 0) {this->direction = 1;}
+  if (steps_to_move < 0) {this->direction = 0;}
+    
+    
+  // decrement the number of steps, moving one step each time:
+  while(steps_left > 0) {
+  // move only if the appropriate delay has passed:
+  if (millis() - this->last_step_time >= this->step_delay) {
+      // get the timeStamp of when you stepped:
+      this->last_step_time = millis();
+      // increment or decrement the step number,
+      // depending on direction:
+      if (this->direction == 1) {
+        this->step_number++;
+        if (this->step_number == this->number_of_steps) {
+          this->step_number = 0;
+        }
+      } 
+      else { 
+        if (this->step_number == 0) {
+          this->step_number = this->number_of_steps;
+        }
+        this->step_number--;
+      }
+      // decrement the steps left:
+      steps_left--;
+      // step the motor to step number 0, 1, 2, or 3:
+      stepMotor(this->step_number % 4);
+    }
+  }
+}
+
+/*
+ * Moves the motor forward or backwards.
+ */
+void Stepper::stepMotor(int thisStep)
+{
+  if (this->pin_count == 2) {
+    switch (thisStep) {
+      case 0: /* 01 */
+      digitalWrite(motor_pin_1, LOW);
+      digitalWrite(motor_pin_2, HIGH);
+      break;
+      case 1: /* 11 */
+      digitalWrite(motor_pin_1, HIGH);
+      digitalWrite(motor_pin_2, HIGH);
+      break;
+      case 2: /* 10 */
+      digitalWrite(motor_pin_1, HIGH);
+      digitalWrite(motor_pin_2, LOW);
+      break;
+      case 3: /* 00 */
+      digitalWrite(motor_pin_1, LOW);
+      digitalWrite(motor_pin_2, LOW);
+      break;
+    } 
+  }
+  if (this->pin_count == 4) {
+    switch (thisStep) {
+      case 0:    // 1010
+      digitalWrite(motor_pin_1, HIGH);
+      digitalWrite(motor_pin_2, LOW);
+      digitalWrite(motor_pin_3, HIGH);
+      digitalWrite(motor_pin_4, LOW);
+      break;
+      case 1:    // 0110
+      digitalWrite(motor_pin_1, LOW);
+      digitalWrite(motor_pin_2, HIGH);
+      digitalWrite(motor_pin_3, HIGH);
+      digitalWrite(motor_pin_4, LOW);
+      break;
+      case 2:    //0101
+      digitalWrite(motor_pin_1, LOW);
+      digitalWrite(motor_pin_2, HIGH);
+      digitalWrite(motor_pin_3, LOW);
+      digitalWrite(motor_pin_4, HIGH);
+      break;
+      case 3:    //1001
+      digitalWrite(motor_pin_1, HIGH);
+      digitalWrite(motor_pin_2, LOW);
+      digitalWrite(motor_pin_3, LOW);
+      digitalWrite(motor_pin_4, HIGH);
+      break;
+    } 
+  }
+}
+
+/*
+  version() returns the version of the library:
+*/
+int Stepper::version(void)
+{
+  return 4;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Stepper/src/Stepper.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Stepper/src/Stepper.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Stepper/src/Stepper.h	(revision 136)
@@ -0,0 +1,83 @@
+/*
+  Stepper.h - - Stepper library for Wiring/Arduino - Version 0.4
+  
+  Original library     (0.1) by Tom Igoe.
+  Two-wire modifications   (0.2) by Sebastian Gassner
+  Combination version   (0.3) by Tom Igoe and David Mellis
+  Bug fix for four-wire   (0.4) by Tom Igoe, bug fix from Noah Shibley
+
+  Drives a unipolar or bipolar stepper motor using  2 wires or 4 wires
+
+  When wiring multiple stepper motors to a microcontroller,
+  you quickly run out of output pins, with each motor requiring 4 connections. 
+
+  By making use of the fact that at any time two of the four motor
+  coils are the inverse  of the other two, the number of
+  control connections can be reduced from 4 to 2. 
+
+  A slightly modified circuit around a Darlington transistor array or an L293 H-bridge
+  connects to only 2 microcontroler pins, inverts the signals received,
+  and delivers the 4 (2 plus 2 inverted ones) output signals required
+  for driving a stepper motor.
+
+  The sequence of control signals for 4 control wires is as follows:
+
+  Step C0 C1 C2 C3
+     1  1  0  1  0
+     2  0  1  1  0
+     3  0  1  0  1
+     4  1  0  0  1
+
+  The sequence of controls signals for 2 control wires is as follows
+  (columns C1 and C2 from above):
+
+  Step C0 C1
+     1  0  1
+     2  1  1
+     3  1  0
+     4  0  0
+
+  The circuits can be found at 
+  http://www.arduino.cc/en/Tutorial/Stepper
+*/
+
+// ensure this library description is only included once
+#ifndef Stepper_h
+#define Stepper_h
+
+// library interface description
+class Stepper {
+  public:
+    // constructors:
+    Stepper(int number_of_steps, int motor_pin_1, int motor_pin_2);
+    Stepper(int number_of_steps, int motor_pin_1, int motor_pin_2, int motor_pin_3, int motor_pin_4);
+
+    // speed setter method:
+    void setSpeed(long whatSpeed);
+
+    // mover method:
+    void step(int number_of_steps);
+
+    int version(void);
+
+  private:
+    void stepMotor(int this_step);
+    
+    int direction;        // Direction of rotation
+    int speed;          // Speed in RPMs
+    unsigned long step_delay;    // delay between steps, in ms, based on speed
+    int number_of_steps;      // total number of steps this motor can take
+    int pin_count;        // whether you're driving the motor with 2 or 4 pins
+    int step_number;        // which step the motor is on
+    
+    // motor pin numbers:
+    int motor_pin_1;
+    int motor_pin_2;
+    int motor_pin_3;
+    int motor_pin_4;
+    
+    long last_step_time;      // time stamp in ms of when the last step was taken
+};
+
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= TFT Library for Arduino =
+
+This library enables an Arduino board to communicate with the Arduino TFT LCD screen. It simplifies the process for drawing shapes, lines, images, and text to the screen. 
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/TFTLibrary
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTBitmapLogo/TFTBitmapLogo.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTBitmapLogo/TFTBitmapLogo.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTBitmapLogo/TFTBitmapLogo.ino	(revision 136)
@@ -0,0 +1,108 @@
+/*
+
+ Arduino TFT Bitmap Logo example
+
+ This example reads an image file from a micro-SD card
+ and draws it on the screen, at random locations.
+
+ In this sketch, the Arduino logo is read from a micro-SD card.
+ There is a .bmp file included with this sketch.
+ - open the sketch folder (Ctrl-K or Cmd-K)
+ - copy the "arduino.bmp" file to a micro-SD
+ - put the SD into the SD slot of the Arduino TFT module.
+
+ This example code is in the public domain.
+
+ Created 19 April 2013 by Enrico Gueli
+
+ http://arduino.cc/en/Tutorial/TFTBitmapLogo
+
+ */
+
+// include the necessary libraries
+#include <SPI.h>
+#include <SD.h>
+#include <TFT.h>  // Arduino LCD library
+
+// pin definition for the Uno
+#define sd_cs  4
+#define lcd_cs 10
+#define dc     9
+#define rst    8
+
+// pin definition for the Leonardo
+//#define sd_cs  8
+//#define lcd_cs 7
+//#define dc     0
+//#define rst    1
+
+TFT TFTscreen = TFT(lcd_cs, dc, rst);
+
+// this variable represents the image to be drawn on screen
+PImage logo;
+
+
+void setup() {
+  // initialize the GLCD and show a message
+  // asking the user to open the serial line
+  TFTscreen.begin();
+  TFTscreen.background(255, 255, 255);
+
+  TFTscreen.stroke(0, 0, 255);
+  TFTscreen.println();
+  TFTscreen.println(F("Arduino TFT Bitmap Example"));
+  TFTscreen.stroke(0, 0, 0);
+  TFTscreen.println(F("Open serial monitor"));
+  TFTscreen.println(F("to run the sketch"));
+
+  // initialize the serial port: it will be used to
+  // print some diagnostic info
+  Serial.begin(9600);
+  while (!Serial) {
+    // wait for serial line to be ready
+  }
+
+  // clear the GLCD screen before starting
+  TFTscreen.background(255, 255, 255);
+
+  // try to access the SD card. If that fails (e.g.
+  // no card present), the setup process will stop.
+  Serial.print(F("Initializing SD card..."));
+  if (!SD.begin(sd_cs)) {
+    Serial.println(F("failed!"));
+    return;
+  }
+  Serial.println(F("OK!"));
+
+  // initialize and clear the GLCD screen
+  TFTscreen.begin();
+  TFTscreen.background(255, 255, 255);
+
+  // now that the SD card can be access, try to load the
+  // image file.
+  logo = TFTscreen.loadImage("arduino.bmp");
+  if (!logo.isValid()) {
+    Serial.println(F("error while loading arduino.bmp"));
+  }
+}
+
+void loop() {
+  // don't do anything if the image wasn't loaded correctly.
+  if (logo.isValid() == false) {
+    return;
+  }
+
+  Serial.println(F("drawing image"));
+
+  // get a random location where to draw the image.
+  // To avoid the image to be draw outside the screen,
+  // take into account the image size.
+  int x = random(TFTscreen.width() - logo.width());
+  int y = random(TFTscreen.height() - logo.height());
+
+  // draw the image to the screen
+  TFTscreen.image(logo, x, y);
+
+  // wait a little bit before drawing again
+  delay(1500);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTColorPicker/TFTColorPicker.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTColorPicker/TFTColorPicker.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTColorPicker/TFTColorPicker.ino	(revision 136)
@@ -0,0 +1,67 @@
+/*
+
+ TFT Color Picker
+
+ This example for the Arduino screen reads the input of
+ potentiometers or analog sensors attached to A0, A1,
+ and A2 and uses the values to change the screen's color.
+
+ This example code is in the public domain.
+
+ Created 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/TFTColorPicker
+
+ */
+
+// pin definition for the Uno
+#define cs   10
+#define dc   9
+#define rst  8
+
+// pin definition for the Leonardo
+// #define cs   7
+// #define dc   0
+// #define rst  1
+
+#include <TFT.h>  // Arduino LCD library
+#include <SPI.h>
+
+TFT TFTscreen = TFT(cs, dc, rst);
+
+void setup() {
+  // begin serial communication
+  Serial.begin(9600);
+
+  // initialize the display
+  TFTscreen.begin();
+
+  // set the background to white
+  TFTscreen.background(255, 255, 255);
+
+}
+
+void loop() {
+
+  // read the values from your sensors and scale them to 0-255
+  int redVal = map(analogRead(A0), 0, 1023, 0, 255);
+  int greenVal = map(analogRead(A1), 0, 1023, 0, 255);
+  int blueVal = map(analogRead(A2), 0, 1023, 0, 255);
+
+  // draw the background based on the mapped values
+  TFTscreen.background(redVal, greenVal, blueVal);
+
+  // send the values to the serial monitor
+  Serial.print("background(");
+  Serial.print(redVal);
+  Serial.print(" , ");
+  Serial.print(greenVal);
+  Serial.print(" , ");
+  Serial.print(blueVal);
+  Serial.println(")");
+
+  // wait for a moment
+  delay(33);
+
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTDisplayText/TFTDisplayText.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTDisplayText/TFTDisplayText.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTDisplayText/TFTDisplayText.ino	(revision 136)
@@ -0,0 +1,74 @@
+/*
+  Arduino TFT text example
+
+  This example demonstrates how to draw text on the
+  TFT with an Arduino. The Arduino reads the value
+  of an analog sensor attached to pin A0, and writes
+  the value to the LCD screen, updating every
+  quarter second.
+
+  This example code is in the public domain
+
+  Created 15 April 2013 by Scott Fitzgerald
+
+  http://arduino.cc/en/Tutorial/TFTDisplayText
+
+ */
+
+#include <TFT.h>  // Arduino LCD library
+#include <SPI.h>
+
+// pin definition for the Uno
+#define cs   10
+#define dc   9
+#define rst  8
+
+// pin definition for the Leonardo
+// #define cs   7
+// #define dc   0
+// #define rst  1
+
+// create an instance of the library
+TFT TFTscreen = TFT(cs, dc, rst);
+
+// char array to print to the screen
+char sensorPrintout[4];
+
+void setup() {
+
+  // Put this line at the beginning of every sketch that uses the GLCD:
+  TFTscreen.begin();
+
+  // clear the screen with a black background
+  TFTscreen.background(0, 0, 0);
+
+  // write the static text to the screen
+  // set the font color to white
+  TFTscreen.stroke(255, 255, 255);
+  // set the font size
+  TFTscreen.setTextSize(2);
+  // write the text to the top left corner of the screen
+  TFTscreen.text("Sensor Value :\n ", 0, 0);
+  // ste the font size very large for the loop
+  TFTscreen.setTextSize(5);
+}
+
+void loop() {
+
+  // Read the value of the sensor on A0
+  String sensorVal = String(analogRead(A0));
+
+  // convert the reading to a char array
+  sensorVal.toCharArray(sensorPrintout, 4);
+
+  // set the font color
+  TFTscreen.stroke(255, 255, 255);
+  // print the sensor value
+  TFTscreen.text(sensorPrintout, 0, 20);
+  // wait for a moment
+  delay(250);
+  // erase the text you just wrote
+  TFTscreen.stroke(0, 0, 0);
+  TFTscreen.text(sensorPrintout, 0, 20);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTEtchASketch/TFTEtchASketch.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTEtchASketch/TFTEtchASketch.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTEtchASketch/TFTEtchASketch.ino	(revision 136)
@@ -0,0 +1,84 @@
+/*
+
+ TFT EtchASketch
+
+ This example for the Arduino screen draws a white point
+ on the GLCD based on the values of 2 potentiometers.
+ To clear the screen, press a button attached to pin 2.
+
+ This example code is in the public domain.
+
+ Created 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/TFTEtchASketch
+
+ */
+
+#include <TFT.h>  // Arduino LCD library
+#include <SPI.h>
+
+// pin definition for the Uno
+#define cs   10
+#define dc   9
+#define rst  8
+
+// pin definition for the Leonardo
+// #define cs   7
+// #define dc   0
+// #define rst  1
+
+TFT TFTscreen = TFT(cs, dc, rst);
+
+// initial position of the cursor
+int xPos = TFTscreen.width() / 2;
+int yPos = TFTscreen.height() / 2;
+
+// pin the erase switch is connected to
+int erasePin = 2;
+
+void setup() {
+  // declare inputs
+  pinMode(erasePin, INPUT);
+  // initialize the screen
+  TFTscreen.begin();
+  // make the background black
+  TFTscreen.background(0, 0, 0);
+}
+
+void loop()
+{
+  // read the potentiometers on A0 and A1
+  int xValue = analogRead(A0);
+  int yValue = analogRead(A1);
+
+  // map the values and update the position
+  xPos = xPos + (map(xValue, 0, 1023, 2, -2));
+  yPos = yPos + (map(yValue, 0, 1023, -2, 2));
+
+  // don't let the point go past the screen edges
+  if (xPos > 159) {
+    (xPos = 159);
+  }
+
+  if (xPos < 0) {
+    (xPos = 0);
+  }
+  if (yPos > 127) {
+    (yPos = 127);
+  }
+
+  if (yPos < 0) {
+    (yPos = 0);
+  }
+
+  // draw the point
+  TFTscreen.stroke(255, 255, 255);
+  TFTscreen.point(xPos, yPos);
+
+  // read the value of the pin, and erase the screen if pressed
+  if (digitalRead(erasePin) == HIGH) {
+    TFTscreen.background(0, 0, 0);
+  }
+
+  delay(33);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTGraph/TFTGraph.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTGraph/TFTGraph.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTGraph/TFTGraph.ino	(revision 136)
@@ -0,0 +1,71 @@
+/*
+
+ TFT Graph
+
+ This example for an Arduino screen reads
+ the value of an analog sensor on A0, and
+ graphs the values on the screen.
+
+ This example code is in the public domain.
+
+ Created 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/TFTGraph
+
+ */
+
+#include <TFT.h>  // Arduino LCD library
+#include <SPI.h>
+
+// pin definition for the Uno
+#define cs   10
+#define dc   9
+#define rst  8
+
+// pin definition for the Leonardo
+// #define cs   7
+// #define dc   0
+// #define rst  1
+
+TFT TFTscreen = TFT(cs, dc, rst);
+
+// position of the line on screen
+int xPos = 0;
+
+void setup() {
+  // initialize the serial port
+  Serial.begin(9600);
+
+  // initialize the display
+  TFTscreen.begin();
+
+  // clear the screen with a pretty color
+  TFTscreen.background(250, 16, 200);
+}
+
+void loop() {
+  // read the sensor and map it to the screen height
+  int sensor = analogRead(A0);
+  int drawHeight = map(sensor, 0, 1023, 0, TFTscreen.height());
+
+  // print out the height to the serial monitor
+  Serial.println(drawHeight);
+
+  // draw a line in a nice color
+  TFTscreen.stroke(250, 180, 10);
+  TFTscreen.line(xPos, TFTscreen.height() - drawHeight, xPos, TFTscreen.height());
+
+  // if the graph has reached the screen edge
+  // erase the screen and start again
+  if (xPos >= 160) {
+    xPos = 0;
+    TFTscreen.background(250, 16, 200);
+  }
+  else {
+    // increment the horizontal position:
+    xPos++;
+  }
+
+  delay(16);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTPong/TFTPong.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTPong/TFTPong.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Arduino/TFTPong/TFTPong.ino	(revision 136)
@@ -0,0 +1,135 @@
+/*
+
+ TFT Pong
+
+ This example for the Arduino screen reads the values
+ of 2 potentiometers to move a rectangular platform
+ on the x and y axes. The platform can intersect
+ with a ball causing it to bounce.
+
+ This example code is in the public domain.
+
+ Created by Tom Igoe December 2012
+ Modified 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/TFTPong
+
+ */
+
+#include <TFT.h>  // Arduino LCD library
+#include <SPI.h>
+
+// pin definition for the Uno
+#define cs   10
+#define dc   9
+#define rst  8
+
+// pin definition for the Leonardo
+// #define cs   7
+// #define dc   0
+// #define rst  1
+
+TFT TFTscreen = TFT(cs, dc, rst);
+
+// variables for the position of the ball and paddle
+int paddleX = 0;
+int paddleY = 0;
+int oldPaddleX, oldPaddleY;
+int ballDirectionX = 1;
+int ballDirectionY = 1;
+
+int ballSpeed = 10; // lower numbers are faster
+
+int ballX, ballY, oldBallX, oldBallY;
+
+void setup() {
+  // initialize the display
+  TFTscreen.begin();
+  // black background
+  TFTscreen.background(0, 0, 0);
+}
+
+void loop() {
+
+  // save the width and height of the screen
+  int myWidth = TFTscreen.width();
+  int myHeight = TFTscreen.height();
+
+  // map the paddle's location to the position of the potentiometers
+  paddleX = map(analogRead(A0), 512, -512, 0, myWidth) - 20 / 2;
+  paddleY = map(analogRead(A1), 512, -512, 0, myHeight) - 5 / 2;
+
+  // set the fill color to black and erase the previous
+  // position of the paddle if different from present
+  TFTscreen.fill(0, 0, 0);
+
+  if (oldPaddleX != paddleX || oldPaddleY != paddleY) {
+    TFTscreen.rect(oldPaddleX, oldPaddleY, 20, 5);
+  }
+
+  // draw the paddle on screen, save the current position
+  // as the previous.
+  TFTscreen.fill(255, 255, 255);
+
+  TFTscreen.rect(paddleX, paddleY, 20, 5);
+  oldPaddleX = paddleX;
+  oldPaddleY = paddleY;
+
+  // update the ball's position and draw it on screen
+  if (millis() % ballSpeed < 2) {
+    moveBall();
+  }
+}
+
+// this function determines the ball's position on screen
+void moveBall() {
+  // if the ball goes offscreen, reverse the direction:
+  if (ballX > TFTscreen.width() || ballX < 0) {
+    ballDirectionX = -ballDirectionX;
+  }
+
+  if (ballY > TFTscreen.height() || ballY < 0) {
+    ballDirectionY = -ballDirectionY;
+  }
+
+  // check if the ball and the paddle occupy the same space on screen
+  if (inPaddle(ballX, ballY, paddleX, paddleY, 20, 5)) {
+    ballDirectionX = -ballDirectionX;
+    ballDirectionY = -ballDirectionY;
+  }
+
+  // update the ball's position
+  ballX += ballDirectionX;
+  ballY += ballDirectionY;
+
+  // erase the ball's previous position
+  TFTscreen.fill(0, 0, 0);
+
+  if (oldBallX != ballX || oldBallY != ballY) {
+    TFTscreen.rect(oldBallX, oldBallY, 5, 5);
+  }
+
+
+  // draw the ball's current position
+  TFTscreen.fill(255, 255, 255);
+  TFTscreen.rect(ballX, ballY, 5, 5);
+
+  oldBallX = ballX;
+  oldBallY = ballY;
+
+}
+
+// this function checks the position of the ball
+// to see if it intersects with the paddle
+boolean inPaddle(int x, int y, int rectX, int rectY, int rectWidth, int rectHeight) {
+  boolean result = false;
+
+  if ((x >= rectX && x <= (rectX + rectWidth)) &&
+      (y >= rectY && y <= (rectY + rectHeight))) {
+    result = true;
+  }
+
+  return result;
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTBitmapLogo/EsploraTFTBitmapLogo.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTBitmapLogo/EsploraTFTBitmapLogo.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTBitmapLogo/EsploraTFTBitmapLogo.ino	(revision 136)
@@ -0,0 +1,101 @@
+/*
+
+ Esplora TFT Bitmap Logos
+
+ This example for the Arduino TFT screen is for use
+ with an Arduino Esplora.
+
+ This example reads an image file from a micro-SD card
+ and draws it on the screen, at random locations.
+
+ There is a .bmp file included with this sketch.
+ - open the sketch folder (Ctrl-K or Cmd-K)
+ - copy the "arduino.bmp" file to a micro-SD
+ - put the SD into the SD slot of the Arduino LCD module.
+
+ This example code is in the public domain.
+
+ Created 19 April 2013 by Enrico Gueli
+
+ http://arduino.cc/en/Tutorial/EsploraTFTBitmapLogo
+
+ */
+
+// include the necessary libraries
+#include <Esplora.h>
+#include <SPI.h>
+#include <SD.h>
+#include <TFT.h>            // Arduino LCD library
+
+// the Esplora pin connected to the chip select line for SD card
+#define SD_CS    8
+
+// this variable represents the image to be drawn on screen
+PImage logo;
+
+void setup() {
+  // initialize the GLCD and show a message
+  // asking the user to open the serial line
+  EsploraTFT.begin();
+  EsploraTFT.background(255, 255, 255);
+
+  EsploraTFT.stroke(0, 0, 255);
+  EsploraTFT.println();
+  EsploraTFT.println(F("Arduino LCD Bitmap Example"));
+  EsploraTFT.stroke(0, 0, 0);
+  EsploraTFT.println(F("Open serial monitor"));
+  EsploraTFT.println(F("to run the sketch"));
+
+  // initialize the serial port: it will be used to
+  // print some diagnostic info
+  Serial.begin(9600);
+  while (!Serial) {
+    // wait for serial monitor to be open
+  }
+
+  // try to access the SD card. If that fails (e.g.
+  // no card present), the Esplora's LED will turn red.
+  Serial.print(F("Initializing SD card..."));
+  if (!SD.begin(SD_CS)) {
+    Serial.println(F("failed!"));
+    Esplora.writeRed(255);
+    return;
+  }
+  Serial.println("OK!");
+
+  // clear the GLCD screen before starting
+  EsploraTFT.background(255, 255, 255);
+
+  // now that the SD card can be access, try to load the
+  // image file. The Esplora LED will turn green or red if
+  // the loading went OK or not.
+  Esplora.writeRGB(0, 0, 0);
+  logo = EsploraTFT.loadImage("arduino.bmp");
+  if (logo.isValid()) {
+    Esplora.writeGreen(255);
+  }
+  else
+    Esplora.writeRed(255);
+
+}
+
+void loop() {
+  // don't do anything if the image wasn't loaded correctly.
+  if (logo.isValid() == false) {
+    return;
+  }
+
+  Serial.println(F("drawing image"));
+
+  // get a random location where to draw the image.
+  // To avoid the image to be draw outside the screen,
+  // take into account the image size.
+  int x = random(EsploraTFT.width() - logo.width());
+  int y = random(EsploraTFT.height() - logo.height());
+
+  // draw the image to the screen
+  EsploraTFT.image(logo, x, y);
+
+  // wait a little bit before drawing again
+  delay(1500);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTColorPicker/EsploraTFTColorPicker.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTColorPicker/EsploraTFTColorPicker.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTColorPicker/EsploraTFTColorPicker.ino	(revision 136)
@@ -0,0 +1,54 @@
+/*
+
+ Esplora TFT Color Picker
+
+ This example for the Esplora with an Arduino TFT reads
+ the input of the joystick and slider, using the values
+ to change the screen's color.
+
+ This example code is in the public domain.
+
+ Created 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/TFTColorPicker
+
+ */
+
+#include <Esplora.h>
+#include <TFT.h>  // Arduino LCD library
+#include <SPI.h>
+
+void setup() {
+  Serial.begin(9600);
+
+  // initialize the LCD
+  EsploraTFT.begin();
+
+  // start out with a white screen
+  EsploraTFT.background(255, 255, 255);
+
+}
+
+void loop() {
+
+  // map the values from sensors
+  int xValue = map(Esplora.readJoystickX(), -512, 512, 0, 255);  // read the joystick's X position
+  int yValue = map(Esplora.readJoystickY(), -512, 512, 0, 255);  // read the joystick's Y position
+  int slider = map(Esplora.readSlider(), 0, 1023, 0, 255);   // read the slider's position
+
+  // change the background color based on the mapped values
+  EsploraTFT.background(xValue, yValue, slider);
+
+  // print the mapped values to the Serial monitor
+  Serial.print("background(");
+  Serial.print(xValue);
+  Serial.print(" , ");
+  Serial.print(yValue);
+  Serial.print(" , ");
+  Serial.print(slider);
+  Serial.println(")");
+
+  delay(33);
+
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTEtchASketch/EsploraTFTEtchASketch.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTEtchASketch/EsploraTFTEtchASketch.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTEtchASketch/EsploraTFTEtchASketch.ino	(revision 136)
@@ -0,0 +1,83 @@
+/*
+
+ Esplora TFT EtchASketch
+
+ This example for the Arduino TFT and Esplora draws
+ a white line on the screen, based on the position
+ of the joystick. To clear the screen, shake the
+ Esplora, using the values from the accelerometer.
+
+ This example code is in the public domain.
+
+ Created 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/EsploraTFTEtchASketch
+
+ */
+
+#include <Esplora.h>
+#include <TFT.h>  // Arduino LCD library
+#include <SPI.h>
+
+// initial position of the cursor
+int xPos = EsploraTFT.width() / 2;
+int yPos = EsploraTFT.height() / 2;
+
+void setup() {
+  // initialize the display
+  EsploraTFT.begin();
+
+  // clear the background
+  EsploraTFT.background(0, 0, 0);
+}
+
+void loop()
+{
+
+  int xAxis = Esplora.readJoystickX();    // read the X axis
+  int yAxis = Esplora.readJoystickY();    // read the Y axis
+
+  // update the position of the line
+  // depending on the position of the joystick
+  if (xAxis < 10 && xAxis > -10) {
+    xPos = xPos;
+  }
+  else {
+    xPos = xPos + (map(xAxis, -512, 512, 2, -2));
+  }
+  if (yAxis < 10 && yAxis > -10) {
+    yAxis = yAxis;
+  }
+  else {
+    yPos = yPos + (map(yAxis, -512, 512, -2, 2));
+  }
+
+  // don't let the point go past the screen edges
+  if (xPos > 159) {
+    (xPos = 159);
+  }
+
+  if (xPos < 0) {
+    (xPos = 0);
+  }
+  if (yPos > 127) {
+    (yPos = 127);
+  }
+
+  if (yPos < 0) {
+    (yPos = 0);
+  }
+
+  // draw the point
+  EsploraTFT.stroke(255, 255, 255);
+  EsploraTFT.point(xPos, yPos);
+
+  // check the accelerometer values and clear
+  // the screen if it is being shaken
+  if (abs(Esplora.readAccelerometer(X_AXIS)) > 200 || abs(Esplora.readAccelerometer(Y_AXIS)) > 200) {
+    EsploraTFT.background(0, 0, 0);
+  }
+
+  delay(33);
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTGraph/EsploraTFTGraph.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTGraph/EsploraTFTGraph.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTGraph/EsploraTFTGraph.ino	(revision 136)
@@ -0,0 +1,56 @@
+/*
+
+ Esplora TFT Graph
+
+ This example for the Esplora with an Arduino TFT reads
+ the value of the light sensor, and graphs the values on
+ the screen.
+
+ This example code is in the public domain.
+
+ Created 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/EsploraTFTGraph
+
+ */
+
+#include <Esplora.h>
+#include <TFT.h>  // Arduino LCD library
+#include <SPI.h>
+
+// position of the line on screen
+int xPos = 0;
+
+void setup() {
+
+  // initialize the screen
+  EsploraTFT.begin();
+
+  // clear the screen with a nice color
+  EsploraTFT.background(250, 16, 200);
+}
+
+void loop() {
+
+  // read the sensor value
+  int sensor = Esplora.readLightSensor();
+  // map the sensor value to the height of the screen
+  int graphHeight = map(sensor, 0, 1023, 0, EsploraTFT.height());
+
+  // draw the line in a pretty color
+  EsploraTFT.stroke(250, 180, 10);
+  EsploraTFT.line(xPos, EsploraTFT.height() - graphHeight, xPos, EsploraTFT.height());
+
+  // if the graph reaches the edge of the screen
+  // erase it and start over from the other side
+  if (xPos >= 160) {
+    xPos = 0;
+    EsploraTFT.background(250, 16, 200);
+  }
+  else {
+    // increment the horizontal position:
+    xPos++;
+  }
+
+  delay(16);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTHorizon/EsploraTFTHorizon.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTHorizon/EsploraTFTHorizon.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTHorizon/EsploraTFTHorizon.ino	(revision 136)
@@ -0,0 +1,63 @@
+/*
+
+ Esplora TFT Horizon
+
+ This example for the Arduino TFT and Esplora draws
+ a line on the screen that stays level with the ground
+ as you tile the Esplora side to side
+
+ This example code is in the public domain.
+
+ Created 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/EsploraTFTHorizon
+
+ */
+
+#include <Esplora.h>
+#include <TFT.h>            // Arduino LCD library
+#include <SPI.h>
+
+// horizontal start and end positions
+int yStart = EsploraTFT.height() / 2;
+int yEnd = EsploraTFT.height() / 2;
+
+// previous start and end positions
+int oldEndY;
+int oldStartY;
+
+void setup() {
+  // initialize the display
+  EsploraTFT.begin();
+  // make the background black
+  EsploraTFT.background(0, 0, 0);
+}
+
+void loop()
+{
+  // read the x-axis of te accelerometer
+  int tilt = Esplora.readAccelerometer(X_AXIS);
+
+  // the values are 100 when tilted to the left
+  // and  -100 when tilted to the right
+  // map these values to the start and end points
+  yStart = map(tilt, -100, 100, EsploraTFT.height(), 0);
+  yEnd = map(tilt, -100, 100, 0, EsploraTFT.height());
+
+  // if the previous values are different than the current values
+  // erase the previous line
+  if (oldStartY != yStart || oldEndY != yEnd) {
+    EsploraTFT.stroke(0, 0, 0);
+    EsploraTFT.line(0, oldStartY, EsploraTFT.width(), oldEndY);
+  }
+
+  // draw the line in magenta
+  EsploraTFT.stroke(255, 0, 255);
+  EsploraTFT.line(0, yStart, EsploraTFT.width(), yEnd);
+
+  // save the current start and end points
+  // to compare int he next loop
+  oldStartY = yStart;
+  oldEndY = yEnd;
+  delay(10);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTPong/EsploraTFTPong.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTPong/EsploraTFTPong.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTPong/EsploraTFTPong.ino	(revision 136)
@@ -0,0 +1,126 @@
+/*
+
+ Esplora TFT Pong
+
+ This example for the Esplora with an Arduino TFT screen reads
+ the value of the joystick to move a rectangular platform
+ on the x and y axes. The platform can intersect with a ball
+ causing it to bounce. The Esplora's slider adjusts the speed
+ of the ball.
+
+ This example code is in the public domain.
+
+ Created by Tom Igoe December 2012
+ Modified 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/EsploraTFTPong
+
+ */
+
+#include <Esplora.h>
+#include <TFT.h>            // Arduino LCD library
+#include <SPI.h>
+
+// variables for the position of the ball and paddle
+int paddleX = 0;
+int paddleY = 0;
+int oldPaddleX, oldPaddleY;
+int ballDirectionX = 1;
+int ballDirectionY = 1;
+
+int ballX, ballY, oldBallX, oldBallY;
+
+void setup() {
+
+  Serial.begin(9600);
+
+  // initialize the display
+  EsploraTFT.begin();
+  // set the background the black
+  EsploraTFT.background(0, 0, 0);
+}
+
+void loop() {
+  // save the width and height of the screen
+  int myWidth = EsploraTFT.width();
+  int myHeight = EsploraTFT.height();
+
+  // map the paddle's location to the joystick's position
+  paddleX = map(Esplora.readJoystickX(), 512, -512, 0, myWidth) - 20 / 2;
+  paddleY = map(Esplora.readJoystickY(), -512, 512, 0, myHeight) - 5 / 2;
+  Serial.print(paddleX);
+  Serial.print(" ");
+  Serial.println(paddleY);
+
+  // set the fill color to black and erase the previous
+  // position of the paddle if different from present
+  EsploraTFT.fill(0, 0, 0);
+
+  if (oldPaddleX != paddleX || oldPaddleY != paddleY) {
+    EsploraTFT.rect(oldPaddleX, oldPaddleY, 20, 5);
+  }
+
+  // draw the paddle on screen, save the current position
+  // as the previous.
+  EsploraTFT.fill(255, 255, 255);
+  EsploraTFT.rect(paddleX, paddleY, 20, 5);
+  oldPaddleX = paddleX;
+  oldPaddleY = paddleY;
+
+  // read the slider to determinde the speed of the ball
+  int ballSpeed = map(Esplora.readSlider(), 0, 1023, 0, 80) + 1;
+  if (millis() % ballSpeed < 2) {
+    moveBall();
+  }
+}
+
+
+// this function determines the ball's position on screen
+void moveBall() {
+  // if the ball goes offscreen, reverse the direction:
+  if (ballX > EsploraTFT.width() || ballX < 0) {
+    ballDirectionX = -ballDirectionX;
+  }
+
+  if (ballY > EsploraTFT.height() || ballY < 0) {
+    ballDirectionY = -ballDirectionY;
+  }
+
+  // check if the ball and the paddle occupy the same space on screen
+  if (inPaddle(ballX, ballY, paddleX, paddleY, 20, 5)) {
+    ballDirectionY = -ballDirectionY;
+  }
+
+  // update the ball's position
+  ballX += ballDirectionX;
+  ballY += ballDirectionY;
+
+  // erase the ball's previous position
+  EsploraTFT.fill(0, 0, 0);
+
+  if (oldBallX != ballX || oldBallY != ballY) {
+    EsploraTFT.rect(oldBallX, oldBallY, 5, 5);
+  }
+
+  // draw the ball's current position
+  EsploraTFT.fill(255, 255, 255);
+
+  EsploraTFT.rect(ballX, ballY, 5, 5);
+
+  oldBallX = ballX;
+  oldBallY = ballY;
+
+}
+
+// this function checks the position of the ball
+// to see if it intersects with the paddle
+boolean inPaddle(int x, int y, int rectX, int rectY, int rectWidth, int rectHeight) {
+  boolean result = false;
+
+  if ((x >= rectX && x <= (rectX + rectWidth)) &&
+      (y >= rectY && y <= (rectY + rectHeight))) {
+    result = true;
+  }
+
+  return result;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTTemp/EsploraTFTTemp.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTTemp/EsploraTFTTemp.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/examples/Esplora/EsploraTFTTemp/EsploraTFTTemp.ino	(revision 136)
@@ -0,0 +1,64 @@
+/*
+
+ Esplora TFT Temperature Display
+
+ This example for the Arduino TFT screen is for use
+ with an Arduino Esplora.
+
+ This example reads the temperature of the Esplora's
+ on board thermisistor and displays it on an attached
+ LCD screen, updating every second.
+
+ This example code is in the public domain.
+
+ Created 15 April 2013 by Scott Fitzgerald
+
+ http://arduino.cc/en/Tutorial/EsploraTFTTemp
+
+ */
+
+// include the necessary libraries
+#include <Esplora.h>
+#include <TFT.h>            // Arduino LCD library
+#include <SPI.h>
+
+char tempPrintout[3];  // array to hold the temperature data
+
+void setup() {
+
+  // Put this line at the beginning of every sketch that uses the GLCD
+  EsploraTFT.begin();
+
+  // clear the screen with a black background
+  EsploraTFT.background(0, 0, 0);
+
+  // set the text color to magenta
+  EsploraTFT.stroke(200, 20, 180);
+  // set the text to size 2
+  EsploraTFT.setTextSize(2);
+  // start the text at the top left of the screen
+  // this text is going to remain static
+  EsploraTFT.text("Degrees in C :\n ", 0, 0);
+
+  // set the text in the loop to size 5
+  EsploraTFT.setTextSize(5);
+}
+
+void loop() {
+
+  // read the temperature  in Celcius and store it in a String
+  String temperature = String(Esplora.readTemperature(DEGREES_C));
+
+  // convert the string to a char array
+  temperature.toCharArray(tempPrintout, 3);
+
+  // set the text color to white
+  EsploraTFT.stroke(255, 255, 255);
+  // print the temperature one line below the static text
+  EsploraTFT.text(tempPrintout, 0, 30);
+
+  delay(1000);
+  // erase the text for the next loop
+  EsploraTFT.stroke(0, 0, 0);
+  EsploraTFT.text(tempPrintout, 0, 30);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/extras/Adafruit-README.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/extras/Adafruit-README.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/extras/Adafruit-README.txt	(revision 136)
@@ -0,0 +1,21 @@
+This is a library for the Adafruit 1.8" SPI display.
+This library works with the Adafruit 1.8" TFT Breakout w/SD card
+  ----> http://www.adafruit.com/products/358
+as well as Adafruit raw 1.8" TFT display
+  ----> http://www.adafruit.com/products/618
+ 
+Check out the links above for our tutorials and wiring diagrams.
+These displays use SPI to communicate, 4 or 5 pins are required
+to interface (RST is optional).
+Adafruit invests time and resources providing this open source code,
+please support Adafruit and open-source hardware by purchasing
+products from Adafruit!
+
+Written by Limor Fried/Ladyada for Adafruit Industries.
+MIT license, all text above must be included in any redistribution
+
+To download. click the DOWNLOADS button in the top right corner, rename the uncompressed folder Adafruit_ST7735. Check that the Adafruit_ST7735 folder contains Adafruit_ST7735.cpp and Adafruit_ST7735.
+
+Place the Adafruit_ST7735 library folder your <arduinosketchfolder>/libraries/ folder. You may need to create the libraries subfolder if its your first library. Restart the IDE
+
+Also requires the Adafruit_GFX library for Arduino.
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/extras/Adafruit-license.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/extras/Adafruit-license.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/extras/Adafruit-license.txt	(revision 136)
@@ -0,0 +1,25 @@
+Software License Agreement (BSD License)
+
+Copyright (c) 2012, Adafruit Industries.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+1. Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+3. Neither the name of the copyright holders nor the names of its
+contributors may be used to endorse or promote products derived from
+this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/extras/README.md
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/extras/README.md	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/extras/README.md	(revision 136)
@@ -0,0 +1,18 @@
+TFT Library
+============
+
+An Arduino library for the Arduino TFT LCD screen.
+
+This library enables an Arduino board to communicate with an Arduino TFT LCD screen. It simplifies the process for drawing shapes, lines, images, and text to the screen.
+The Arduino TFT library extends the Adafruit GFX, and Adafruit ST7735 libraries that it is based on. The GFX library is responsible for the drawing routines, while the ST7735 library is specific to the screen on the Arduino GTFT. The Arduino specific additions were designed to work as similarly to the Processing API as possible.
+
+Onboard the screen is a SD card slot, which can be used through the SD library.
+
+The TFT library relies on the SPI library for communication with the screen and SD card, and needs to be included in all sketches.
+
+https://github.com/adafruit/Adafruit-GFX-Library
+https://github.com/adafruit/Adafruit-ST7735-Library
+http://arduino.cc/en/Reference/SD
+http://arduino.cc/en/Reference/SPI
+
+http://arduino.cc/en/Reference/TFTLibrary
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/keywords.txt	(revision 136)
@@ -0,0 +1,20 @@
+#######################################
+# Syntax Coloring Map For Arduino GLCD
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+TFT	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
+EsploraTFT	LITERAL1
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=TFT
+version=1.0
+author=Arduino, Adafruit
+maintainer=Arduino <info@arduino.cc>
+sentence=Allows drawing text, images, and shapes on the Arduino TFT graphical display. For all Arduino boards.
+paragraph=This library is compatible with most of the TFT display based on the ST7735 chipset
+category=Display
+url=http://arduino.cc/en/Reference/TFTLibrary
+architectures=*
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/src/TFT.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/src/TFT.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/src/TFT.cpp	(revision 136)
@@ -0,0 +1,24 @@
+#include "TFT.h"
+#include <Arduino.h>  //modified
+
+#if ARDUINO_AVR_ESPLORA
+TFT EsploraTFT(7, 0, 1);
+#endif
+
+TFT::TFT(uint8_t CS, uint8_t RS, uint8_t RST) 
+  : Adafruit_ST7735(CS, RS, RST)
+{
+  // as we already know the orientation (landscape, therefore rotated),
+  // set default width and height without need to call begin() first.
+  _width = ST7735_TFTHEIGHT;
+  _height = ST7735_TFTWIDTH;
+}
+
+void TFT::begin() {
+//initR(INITR_REDTAB);
+  #if defined(ARDUINO_ARCH_SAMD)
+	if((!Serial) || (SerialUSB)) Serial.begin(1200);
+  #endif	
+  initG();
+  setRotation(1);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/src/TFT.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/src/TFT.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/src/TFT.h	(revision 136)
@@ -0,0 +1,28 @@
+
+#ifndef _ARDUINO_TFT_H
+#define _ARDUINO_TFT_H
+
+#include "Arduino.h"
+#include "utility/Adafruit_GFX.h"
+#include "utility/Adafruit_ST7735.h"
+
+/// The Arduino LCD is a ST7735-based device.
+/// By default, it is mounted horizontally.
+/// TFT class follows the convention of other
+/// Arduino library classes by adding a begin() method
+/// to be called in the setup() routine.
+/// @author Enrico Gueli <enrico.gueli@gmail.com>
+class TFT : public Adafruit_ST7735 {
+public:
+  TFT(uint8_t CS, uint8_t RS, uint8_t RST);
+
+  void begin();  
+};
+
+/// Esplora boards have hard-wired connections with
+/// the Arduino LCD if mounted on the onboard connector.
+#if ARDUINO_AVR_ESPLORA // are we building for Esplora?
+extern TFT EsploraTFT;
+#endif
+
+#endif // _ARDUINO_TFT_H
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_GFX.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_GFX.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_GFX.cpp	(revision 136)
@@ -0,0 +1,715 @@
+/*
+This is the core graphics library for all our displays, providing a common
+set of graphics primitives (points, lines, circles, etc.).  It needs to be
+paired with a hardware-specific library for each display device we carry
+(to handle the lower-level functions).
+
+Adafruit invests time and resources providing this open source code, please
+support Adafruit & open-source hardware by purchasing products from Adafruit!
+
+Copyright (c) 2013 Adafruit Industries.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+- Redistributions of source code must retain the above copyright notice,
+  this list of conditions and the following disclaimer.
+- Redistributions in binary form must reproduce the above copyright notice,
+  this list of conditions and the following disclaimer in the documentation
+  and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#include "Adafruit_GFX.h"
+#include "glcdfont.c"
+#ifdef __AVR__
+ #include <avr/pgmspace.h>
+#else
+ #define pgm_read_byte(addr) (*(const unsigned char *)(addr))
+#endif
+
+Adafruit_GFX::Adafruit_GFX(int16_t w, int16_t h) :
+  WIDTH(w), HEIGHT(h)
+{
+  _width    = WIDTH;
+  _height   = HEIGHT;
+  rotation  = 0;
+  cursor_y  = cursor_x    = 0;
+  textsize  = 1;
+  textcolor = textbgcolor = 0xFFFF;
+  wrap = true;
+}
+
+// draw a circle outline
+void Adafruit_GFX::drawCircle(int16_t x0, int16_t y0, int16_t r, 
+			      uint16_t color) {
+  int16_t f = 1 - r;
+  int16_t ddF_x = 1;
+  int16_t ddF_y = -2 * r;
+  int16_t x = 0;
+  int16_t y = r;
+
+  drawPixel(x0, y0+r, color);
+  drawPixel(x0, y0-r, color);
+  drawPixel(x0+r, y0, color);
+  drawPixel(x0-r, y0, color);
+
+  while (x<y) {
+    if (f >= 0) {
+      y--;
+      ddF_y += 2;
+      f += ddF_y;
+    }
+    x++;
+    ddF_x += 2;
+    f += ddF_x;
+  
+    drawPixel(x0 + x, y0 + y, color);
+    drawPixel(x0 - x, y0 + y, color);
+    drawPixel(x0 + x, y0 - y, color);
+    drawPixel(x0 - x, y0 - y, color);
+    drawPixel(x0 + y, y0 + x, color);
+    drawPixel(x0 - y, y0 + x, color);
+    drawPixel(x0 + y, y0 - x, color);
+    drawPixel(x0 - y, y0 - x, color);   
+  }
+}
+
+void Adafruit_GFX::drawCircleHelper( int16_t x0, int16_t y0,
+               int16_t r, uint8_t cornername, uint16_t color) {
+  int16_t f     = 1 - r;
+  int16_t ddF_x = 1;
+  int16_t ddF_y = -2 * r;
+  int16_t x     = 0;
+  int16_t y     = r;
+
+  while (x<y) {
+    if (f >= 0) {
+      y--;
+      ddF_y += 2;
+      f     += ddF_y;
+    }
+    x++;
+    ddF_x += 2;
+    f     += ddF_x;
+    if (cornername & 0x4) {
+      drawPixel(x0 + x, y0 + y, color);
+      drawPixel(x0 + y, y0 + x, color);
+    } 
+    if (cornername & 0x2) {
+      drawPixel(x0 + x, y0 - y, color);
+      drawPixel(x0 + y, y0 - x, color);
+    }
+    if (cornername & 0x8) {
+      drawPixel(x0 - y, y0 + x, color);
+      drawPixel(x0 - x, y0 + y, color);
+    }
+    if (cornername & 0x1) {
+      drawPixel(x0 - y, y0 - x, color);
+      drawPixel(x0 - x, y0 - y, color);
+    }
+  }
+}
+
+void Adafruit_GFX::fillCircle(int16_t x0, int16_t y0, int16_t r,
+			      uint16_t color) 
+{
+  drawFastVLine(x0, y0-r, 2*r+1, color);
+  fillCircleHelper(x0, y0, r, 3, 0, color);
+}
+
+// used to do circles and roundrects
+void Adafruit_GFX::fillCircleHelper(int16_t x0, int16_t y0, int16_t r,
+				    uint8_t cornername, int16_t delta, 				    uint16_t color) 
+{
+  int16_t f     = 1 - r;
+  int16_t ddF_x = 1;
+  int16_t ddF_y = -2 * r;
+  int16_t x     = 0;
+  int16_t y     = r;
+
+  while (x<y) {
+    if (f >= 0) {
+      y--;
+      ddF_y += 2;
+      f     += ddF_y;
+    }
+    x++;
+    ddF_x += 2;
+    f     += ddF_x;
+
+    if (cornername & 0x1) {
+      drawFastVLine(x0+x, y0-y, 2*y+1+delta, color);
+      drawFastVLine(x0+y, y0-x, 2*x+1+delta, color);
+    }
+    if (cornername & 0x2) {
+      drawFastVLine(x0-x, y0-y, 2*y+1+delta, color);
+      drawFastVLine(x0-y, y0-x, 2*x+1+delta, color);
+    }
+  }
+}
+
+// Bresenham's algorithm - thx wikpedia
+void Adafruit_GFX::drawLine(int16_t x0, int16_t y0, 
+			    int16_t x1, int16_t y1, 
+			    uint16_t color) 
+{
+  int16_t steep = abs(y1 - y0) > abs(x1 - x0);
+  if (steep) {
+    swap(x0, y0);
+    swap(x1, y1);
+  }
+
+  if (x0 > x1) {
+    swap(x0, x1);
+    swap(y0, y1);
+  }
+
+  int16_t dx, dy;
+  dx = x1 - x0;
+  dy = abs(y1 - y0);
+
+  int16_t err = dx / 2;
+  int16_t ystep;
+
+  if (y0 < y1) {
+    ystep = 1;
+  } else {
+    ystep = -1;
+  }
+
+  for (; x0<=x1; x0++) {
+    if (steep) {
+      drawPixel(y0, x0, color);
+    } else {
+      drawPixel(x0, y0, color);
+    }
+    err -= dy;
+    if (err < 0) {
+      y0 += ystep;
+      err += dx;
+    }
+  }
+}
+
+
+// Draw a rectangle
+void Adafruit_GFX::drawRect(int16_t x, int16_t y,
+			    int16_t w, int16_t h, 
+			    uint16_t color) 
+{
+  drawFastHLine(x, y, w, color);
+  drawFastHLine(x, y+h-1, w, color);
+  drawFastVLine(x, y, h, color);
+  drawFastVLine(x+w-1, y, h, color);
+}
+
+void Adafruit_GFX::drawFastVLine(int16_t x, int16_t y,
+				 int16_t h, uint16_t color) 
+{
+  // Update in subclasses if desired!
+  drawLine(x, y, x, y+h-1, color);
+}
+
+
+void Adafruit_GFX::drawFastHLine(int16_t x, int16_t y,
+				 int16_t w, uint16_t color) 
+{
+  // Update in subclasses if desired!
+  drawLine(x, y, x+w-1, y, color);
+}
+
+void Adafruit_GFX::fillRect(int16_t x, int16_t y, int16_t w, int16_t h,
+			    uint16_t color) 
+{
+  // Update in subclasses if desired!
+  for (int16_t i=x; i<x+w; i++) {
+    drawFastVLine(i, y, h, color);
+  }
+}
+
+
+void Adafruit_GFX::fillScreen(uint16_t color) {
+  fillRect(0, 0, _width, _height, color);
+}
+
+// Draw a rounded rectangle
+void Adafruit_GFX::drawRoundRect(int16_t x, int16_t y, int16_t w,
+  				 int16_t h, int16_t r, uint16_t color) 
+{
+  // smarter version
+  drawFastHLine(x+r  , y    , w-2*r, color); // Top
+  drawFastHLine(x+r  , y+h-1, w-2*r, color); // Bottom
+  drawFastVLine(x    , y+r  , h-2*r, color); // Left
+  drawFastVLine(x+w-1, y+r  , h-2*r, color); // Right
+  // draw four corners
+  drawCircleHelper(x+r    , y+r    , r, 1, color);
+  drawCircleHelper(x+w-r-1, y+r    , r, 2, color);
+  drawCircleHelper(x+w-r-1, y+h-r-1, r, 4, color);
+  drawCircleHelper(x+r    , y+h-r-1, r, 8, color);
+}
+
+// Fill a rounded rectangle
+void Adafruit_GFX::fillRoundRect(int16_t x, int16_t y, int16_t w,
+				 int16_t h, int16_t r, uint16_t color) 
+{
+  // smarter version
+  fillRect(x+r, y, w-2*r, h, color);
+
+  // draw four corners
+  fillCircleHelper(x+w-r-1, y+r, r, 1, h-2*r-1, color);
+  fillCircleHelper(x+r    , y+r, r, 2, h-2*r-1, color);
+}
+
+// Draw a triangle
+void Adafruit_GFX::drawTriangle(int16_t x0, int16_t y0,
+				int16_t x1, int16_t y1, 
+				int16_t x2, int16_t y2, uint16_t color) {
+  drawLine(x0, y0, x1, y1, color);
+  drawLine(x1, y1, x2, y2, color);
+  drawLine(x2, y2, x0, y0, color);
+}
+
+// Fill a triangle
+void Adafruit_GFX::fillTriangle ( int16_t x0, int16_t y0,
+				  int16_t x1, int16_t y1,
+				  int16_t x2, int16_t y2, uint16_t color) {
+  int16_t a, b, y, last;
+
+  // Sort coordinates by Y order (y2 >= y1 >= y0)
+  if (y0 > y1) {
+    swap(y0, y1); swap(x0, x1);
+  }
+  if (y1 > y2) {
+    swap(y2, y1); swap(x2, x1);
+  }
+  if (y0 > y1) {
+    swap(y0, y1); swap(x0, x1);
+  }
+
+  if(y0 == y2) { // Handle awkward all-on-same-line case as its own thing
+    a = b = x0;
+    if(x1 < a)      a = x1;
+    else if(x1 > b) b = x1;
+    if(x2 < a)      a = x2;
+    else if(x2 > b) b = x2;
+    drawFastHLine(a, y0, b-a+1, color);
+    return;
+  }
+
+  int16_t
+    dx01 = x1 - x0,
+    dy01 = y1 - y0,
+    dx02 = x2 - x0,
+    dy02 = y2 - y0,
+    dx12 = x2 - x1,
+    dy12 = y2 - y1,
+    sa   = 0,
+    sb   = 0;
+
+  // For upper part of triangle, find scanline crossings for segments
+  // 0-1 and 0-2.  If y1=y2 (flat-bottomed triangle), the scanline y1
+  // is included here (and second loop will be skipped, avoiding a /0
+  // error there), otherwise scanline y1 is skipped here and handled
+  // in the second loop...which also avoids a /0 error here if y0=y1
+  // (flat-topped triangle).
+  if(y1 == y2) last = y1;   // Include y1 scanline
+  else         last = y1-1; // Skip it
+
+  for(y=y0; y<=last; y++) {
+    a   = x0 + sa / dy01;
+    b   = x0 + sb / dy02;
+    sa += dx01;
+    sb += dx02;
+    /* longhand:
+    a = x0 + (x1 - x0) * (y - y0) / (y1 - y0);
+    b = x0 + (x2 - x0) * (y - y0) / (y2 - y0);
+    */
+    if(a > b) swap(a,b);
+    drawFastHLine(a, y, b-a+1, color);
+  }
+
+  // For lower part of triangle, find scanline crossings for segments
+  // 0-2 and 1-2.  This loop is skipped if y1=y2.
+  sa = dx12 * (y - y1);
+  sb = dx02 * (y - y0);
+  for(; y<=y2; y++) {
+    a   = x1 + sa / dy12;
+    b   = x0 + sb / dy02;
+    sa += dx12;
+    sb += dx02;
+    /* longhand:
+    a = x1 + (x2 - x1) * (y - y1) / (y2 - y1);
+    b = x0 + (x2 - x0) * (y - y0) / (y2 - y0);
+    */
+    if(a > b) swap(a,b);
+    drawFastHLine(a, y, b-a+1, color);
+  }
+}
+
+void Adafruit_GFX::drawBitmap(int16_t x, int16_t y, 
+			      const uint8_t *bitmap, int16_t w, int16_t h,
+			      uint16_t color) 
+{
+  int16_t i, j, byteWidth = (w + 7) / 8;
+
+  for(j=0; j<h; j++) {
+    for(i=0; i<w; i++ ) {
+      if(pgm_read_byte(bitmap + j * byteWidth + i / 8) & (128 >> (i & 7))) {
+	drawPixel(x+i, y+j, color);
+      }
+    }
+  }
+}
+
+
+#if ARDUINO >= 100
+size_t Adafruit_GFX::write(uint8_t c) {
+#else
+void Adafruit_GFX::write(uint8_t c) {
+#endif
+  if (c == '\n') {
+    cursor_y += textsize*8;
+    cursor_x = 0;
+  } else if (c == '\r') {
+    // skip em
+  } else {
+    drawChar(cursor_x, cursor_y, c, textcolor, textbgcolor, textsize);
+    cursor_x += textsize*6;
+    if (wrap && (cursor_x > (_width - textsize*6))) {
+      cursor_y += textsize*8;
+      cursor_x = 0;
+    }
+  }
+#if ARDUINO >= 100
+  return 1;
+#endif
+}
+
+// draw a character
+void Adafruit_GFX::drawChar(int16_t x, int16_t y, unsigned char c,
+			    uint16_t color, uint16_t bg, uint8_t size) 
+{
+  if((x >= _width)		|| // Clip right
+     (y >= _height)		|| // Clip bottom
+     ((x + 6 * size - 1) < 0)	|| // Clip left
+     ((y + 8 * size - 1) < 0))     // Clip top
+    return;
+
+  for (int8_t i=0; i<6; i++ ) {
+    uint8_t line;
+    if (i == 5) 
+      line = 0x0;
+    else 
+      line = pgm_read_byte(font+(c*5)+i);
+    for (int8_t j = 0; j<8; j++) {
+      if (line & 0x1) {
+        if (size == 1) // default size
+          drawPixel(x+i, y+j, color);
+        else {  // big size
+          fillRect(x+(i*size), y+(j*size), size, size, color);
+        } 
+      } else if (bg != color) {
+        if (size == 1) // default size
+          drawPixel(x+i, y+j, bg);
+        else {  // big size
+          fillRect(x+i*size, y+j*size, size, size, bg);
+        } 	
+      }
+      line >>= 1;
+    }
+  }
+}
+
+void Adafruit_GFX::setCursor(int16_t x, int16_t y) 
+{
+  cursor_x = x;
+  cursor_y = y;
+}
+
+
+void Adafruit_GFX::setTextSize(uint8_t s) 
+{
+  textsize = (s > 0) ? s : 1;
+}
+
+
+void Adafruit_GFX::setTextColor(uint16_t c) {
+  textcolor = c;
+  textbgcolor = c; 
+  // for 'transparent' background, we'll set the bg 
+  // to the same as fg instead of using a flag
+}
+
+ void Adafruit_GFX::setTextColor(uint16_t c, uint16_t b) 
+{
+   textcolor = c;
+   textbgcolor = b; 
+}
+
+void Adafruit_GFX::setTextWrap(boolean w) 
+{
+  wrap = w;
+}
+
+uint8_t Adafruit_GFX::getRotation(void) 
+{
+  return rotation;
+}
+
+void Adafruit_GFX::setRotation(uint8_t x) 
+{
+  rotation = (x & 3);
+  switch (x) {
+  case 0:
+  case 2:
+    _width = WIDTH;
+    _height = HEIGHT;
+    break;
+  case 1:
+  case 3:
+    _width = HEIGHT;
+    _height = WIDTH;
+    break;
+  }
+}
+
+
+
+// return the size of the display (per current rotation)
+int16_t Adafruit_GFX::width(void) 
+{ 
+  return _width; 
+}
+ 
+int16_t Adafruit_GFX::height(void) 
+{ 
+  return _height; 
+}
+
+void Adafruit_GFX::invertDisplay(boolean i) 
+{
+  // Do nothing, must be subclassed if supported
+}
+
+
+uint16_t Adafruit_GFX::newColor(uint8_t r, uint8_t g, uint8_t b) 
+{
+  return ((r & 0xF8) << 8) | ((g & 0xFC) << 3) | (b >> 3);
+}
+
+void Adafruit_GFX::background(uint8_t red, uint8_t green, uint8_t blue) 
+{
+  background(newColor(red, green, blue));
+}
+
+void Adafruit_GFX::background(color c) {
+  fillScreen(c);
+}
+
+void Adafruit_GFX::stroke(uint8_t red, uint8_t green, uint8_t blue) 
+{
+  stroke(newColor(red, green, blue));
+}
+
+void Adafruit_GFX::stroke(color c) 
+{
+  useStroke = true;
+  strokeColor = c;
+  setTextColor(c);
+}
+
+void Adafruit_GFX::noStroke() 
+{
+  useStroke = false;
+}
+
+void Adafruit_GFX::noFill() {
+  useFill = false;
+}
+
+void Adafruit_GFX::fill(uint8_t red, uint8_t green, uint8_t blue) 
+{
+  fill(newColor(red, green, blue));
+}
+
+void Adafruit_GFX::fill(color c) 
+{
+  useFill = true;
+  fillColor = c;
+}
+
+
+void Adafruit_GFX::text(const char * text, int16_t x, int16_t y) 
+{
+  if (!useStroke)
+    return;
+  
+  setTextWrap(false);
+  setTextColor(strokeColor);
+  setCursor(x, y);
+  print(text);
+}
+
+void Adafruit_GFX::textWrap(const char * text, int16_t x, int16_t y) 
+{
+  if (!useStroke)
+    return;
+  
+  setTextWrap(true);
+  setTextColor(strokeColor);
+  setCursor(x, y);
+  print(text);
+}
+
+
+void Adafruit_GFX::textSize(uint8_t size) 
+{
+  setTextSize(size);
+}
+
+void Adafruit_GFX::point(int16_t x, int16_t y) 
+{
+  if (!useStroke)
+    return;
+  
+  drawPixel(x, y, strokeColor);
+}
+
+void Adafruit_GFX::line(int16_t x1, int16_t y1, int16_t x2, int16_t y2) 
+{
+  if (!useStroke)
+    return;
+  
+  if (x1 == x2) {
+    if (y1 < y2)
+      drawFastVLine(x1, y1, y2 - y1, strokeColor);
+    else
+      drawFastVLine(x1, y2, y1 - y2, strokeColor);      
+  }
+  else if (y1 == y2) {
+    if (x1 < x2)
+      drawFastHLine(x1, y1, x2 - x1, strokeColor);
+    else
+      drawFastHLine(x2, y1, x1 - x2, strokeColor);
+  }
+  else {
+    drawLine(x1, y1, x2, y2, strokeColor);
+  }
+}
+
+void Adafruit_GFX::rect(int16_t x, int16_t y, int16_t width, int16_t height) 
+{
+  if (useFill) {
+    fillRect(x, y, width, height, fillColor);
+  }
+  if (useStroke) {
+    drawRect(x, y, width, height, strokeColor);
+  }
+}
+
+void Adafruit_GFX::rect(int16_t x, int16_t y, int16_t width, int16_t height, int16_t radius) 
+{
+  if (radius == 0) {
+    rect(x, y, width, height);
+  }
+  if (useFill) {
+    fillRoundRect(x, y, width, height, radius, fillColor);
+  }
+  if (useStroke) {
+    drawRoundRect(x, y, width, height, radius, strokeColor);
+  }
+}
+
+void Adafruit_GFX::circle(int16_t x, int16_t y, int16_t r) 
+{
+  if (r == 0)
+    return;
+  
+  if (useFill) {
+    fillCircle(x, y, r, fillColor);
+  }
+  if (useStroke) {
+    drawCircle(x, y, r, strokeColor);
+  }
+}
+
+void Adafruit_GFX::triangle(int16_t x1, int16_t y1, int16_t x2, int16_t y2, int16_t x3, int16_t y3) 
+{
+  if (useFill) {
+    fillTriangle(x1, y1, x2, y2, x3, y3, fillColor);
+  }
+  if (useStroke) {
+    drawTriangle(x1, y1, x2, y2, x3, y3, strokeColor);
+  }
+}
+
+#if defined(__SD_H__)  // Arduino SD library
+
+#define BUFFPIXEL 20
+
+void Adafruit_GFX::image(PImage & img, uint16_t x, uint16_t y) {
+  int      w, h, row, col;
+  uint8_t  r, g, b;
+  uint32_t pos = 0;
+  uint8_t  sdbuffer[3*BUFFPIXEL]; // pixel buffer (R+G+B per pixel)
+  uint8_t  buffidx = sizeof(sdbuffer); // Current position in sdbuffer
+
+  // Crop area to be loaded
+  w = img._bmpWidth;
+  h = img._bmpHeight;
+  if((x+w-1) >= width())  w = width()  - x;
+  if((y+h-1) >= height()) h = height() - y;
+
+  /*
+  // Set TFT address window to clipped image bounds
+  setAddrWindow(x, y, x+w-1, y+h-1);
+  */
+  
+  for (row=0; row<h; row++) { // For each scanline...
+    // Seek to start of scan line.  It might seem labor-
+    // intensive to be doing this on every line, but this
+    // method covers a lot of gritty details like cropping
+    // and scanline padding.  Also, the seek only takes
+    // place if the file position actually needs to change
+    // (avoids a lot of cluster math in SD library).
+    if(img._flip) // Bitmap is stored bottom-to-top order (normal BMP)
+      pos = img._bmpImageoffset + (img._bmpHeight - 1 - row) * img._rowSize;
+    else     // Bitmap is stored top-to-bottom
+      pos = img._bmpImageoffset + row * img._rowSize;
+    if(img._bmpFile.position() != pos) { // Need seek?
+      img._bmpFile.seek(pos);
+      buffidx = sizeof(sdbuffer); // Force buffer reload
+    }
+
+    for (col=0; col<w; col++) { // For each pixel...
+      // Time to read more pixel data?
+      if (buffidx >= sizeof(sdbuffer)) { // Indeed
+        img._bmpFile.read(sdbuffer, sizeof(sdbuffer));
+        buffidx = 0; // Set index to beginning
+      }
+
+      // Convert pixel from BMP to TFT format, push to display
+      b = sdbuffer[buffidx++];
+      g = sdbuffer[buffidx++];
+      r = sdbuffer[buffidx++];
+      //pushColor(tft.Color565(r,g,b));
+      drawPixel(x + col, y + row, newColor(r, g, b));
+      
+    } // end pixel
+  } // end scanline
+
+}
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_GFX.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_GFX.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_GFX.h	(revision 136)
@@ -0,0 +1,372 @@
+/******************************************************************
+ This is the core graphics library for all our displays, providing
+ basic graphics primitives (points, lines, circles, etc.). It needs
+ to be paired with a hardware-specific library for each display
+ device we carry (handling the lower-level functions).
+ 
+ Adafruit invests time and resources providing this open
+ source code, please support Adafruit and open-source hardware
+ by purchasing products from Adafruit!
+ 
+ Written by Limor Fried/Ladyada for Adafruit Industries.
+ Processing-like API written by Enrico Gueli for Officine Arduino.
+ BSD license, check license.txt for more information.
+ All text above must be included in any redistribution.
+ ******************************************************************/
+
+#ifndef _ADAFRUIT_GFX_H
+#define _ADAFRUIT_GFX_H
+
+#if ARDUINO >= 100
+ #include "Arduino.h"
+ #include "Print.h"
+#else
+ #include "WProgram.h"
+#endif
+
+/*
+ * This library can work with or without the presence of an SD
+ * reading library (to load images). At the moment, only the
+ * Arduino SD library is supported; it is included in
+ * standard Arduino libraries.
+ * 
+ * The presence of the SD library is detected by looking at the
+ * __SD_H__ preprocessor variable, defined into 
+ * Arduino SD library to avoid double inclusion. This means
+ * that in order to use the image-related API of Adafruit_GFX,
+ * SD.h *must* be included before Adafruit_GFX.
+ * 
+ * The bottom part of this include file contains the actual image
+ * loading code; if it was in a separate .cpp file, there were no
+ * way to check if the SD library was present or not.
+ * 
+ * A partial solution was to include SD.h anyway, see if that works
+ * (i.e. it is found in the include search path) and act accordingly.
+ * But this solution relied on the preprocessor to issue only a
+ * warning when an include file is not found. Avr-gcc, used for
+ * Arduino 8-bit MCUs, does that, but the standard gcc-4.4, used for
+ * Arduino Due, issues a fatal error and stops compilation.
+ * 
+ * The best solution so far is to put the code here. It works if this
+ * include is used only in one .cpp file in the build (this is the
+ * case of most Arduino sketches); if used in multiple .cpp files,
+ * the linker may complain about duplicate definitions.
+ * 
+ */
+
+#if defined(__SD_H__)  // Arduino SD library
+ #include "PImage.h"
+#else
+ #warning "The SD library was not found. loadImage() and image() won't be supported."
+#endif
+
+#define swap(a, b) { int16_t t = a; a = b; b = t; }
+
+/* TODO
+enum RectMode {
+  CORNER,
+  CORNERS,
+  RADIUS,
+  CENTER
+};
+*/
+
+typedef uint16_t color;
+
+class Adafruit_GFX : public Print {
+ public:
+
+  Adafruit_GFX(int16_t w, int16_t h); // Constructor
+
+  // This MUST be defined by the subclass
+  virtual void drawPixel(int16_t x, int16_t y, uint16_t color) = 0;
+
+  
+
+  // These MAY be overridden by the subclass to provide device-specific
+  // optimized code.  Otherwise 'generic' versions are used.
+  virtual void 
+	drawLine(int16_t x0, int16_t y0, int16_t x1, int16_t y1, 
+		uint16_t color),
+  	drawFastVLine(int16_t x, int16_t y, int16_t h, uint16_t color),
+	drawFastHLine(int16_t x, int16_t y, int16_t w, uint16_t color),
+	drawRect(int16_t x, int16_t y, int16_t w, int16_t h, 
+		uint16_t color),
+	fillRect(int16_t x, int16_t y, int16_t w, int16_t h, 
+		uint16_t color),
+	fillScreen(uint16_t color),
+	invertDisplay(boolean i);
+
+// These exist only with Adafruit_GFX (no subclass overrides)
+  void
+	drawCircle(int16_t x0, int16_t y0, int16_t r, uint16_t color),
+	drawCircleHelper(int16_t x0, int16_t y0,
+			int16_t r, uint8_t cornername, uint16_t color),
+	fillCircle(int16_t x0, int16_t y0, int16_t r, uint16_t color),
+	fillCircleHelper(int16_t x0, int16_t y0, int16_t r,
+		      uint8_t cornername, int16_t delta, uint16_t color),
+
+	drawTriangle(int16_t x0, int16_t y0, int16_t x1, int16_t y1,
+		    int16_t x2, int16_t y2, uint16_t color),
+	fillTriangle(int16_t x0, int16_t y0, int16_t x1, int16_t y1,
+		    int16_t x2, int16_t y2, uint16_t color),
+	drawRoundRect(int16_t x0, int16_t y0, int16_t w, int16_t h,
+		     int16_t radius, uint16_t color),
+	fillRoundRect(int16_t x0, int16_t y0, int16_t w, int16_t h,
+		     int16_t radius, uint16_t color),
+
+	drawBitmap(int16_t x, int16_t y, 
+		  const uint8_t *bitmap, int16_t w, int16_t h,
+		  uint16_t color),
+	drawChar(int16_t x, int16_t y, unsigned char c,
+		uint16_t color, uint16_t bg, uint8_t size),
+	setCursor(int16_t x, int16_t y),
+	setTextColor(uint16_t c),
+	setTextColor(uint16_t c, uint16_t bg),
+	setTextSize(uint8_t s),
+	setTextWrap(boolean w),
+	setRotation(uint8_t r);
+
+#if ARDUINO >= 100
+  virtual size_t write(uint8_t);
+#else
+  virtual void   write(uint8_t);
+#endif
+
+  int16_t 
+	height(void),
+	width(void);
+
+
+  uint8_t getRotation(void);
+
+  
+  /*
+   * Processing-like graphics primitives
+   */
+  
+  /// transforms a color in 16-bit form given the RGB components.
+  /// The default implementation makes a 5-bit red, a 6-bit
+  /// green and a 5-bit blue (MSB to LSB). Devices that use
+  /// different scheme should override this. 
+  virtual uint16_t newColor(uint8_t red, uint8_t green, uint8_t blue);
+  
+  
+  void
+	// http://processing.org/reference/background_.html
+	background(uint8_t red, uint8_t green, uint8_t blue),
+	background(color c),
+
+	// http://processing.org/reference/fill_.html
+	fill(uint8_t red, uint8_t green, uint8_t blue),
+	fill(color c),
+
+	// http://processing.org/reference/noFill_.html
+	noFill(),
+
+	// http://processing.org/reference/stroke_.html
+	stroke(uint8_t red, uint8_t green, uint8_t blue),
+	stroke(color c),
+
+	// http://processing.org/reference/noStroke_.html
+	noStroke(),
+  
+	text(const char * text, int16_t x, int16_t y),
+	textWrap(const char * text, int16_t x, int16_t y),
+
+	textSize(uint8_t size),
+  
+	// similar to ellipse() in Processing, but with
+	// a single radius.
+	// http://processing.org/reference/ellipse_.html
+	circle(int16_t x, int16_t y, int16_t r),
+	point(int16_t x, int16_t y),
+	line(int16_t x1, int16_t y1, int16_t x2, int16_t y2),
+	quad(int16_t x1, int16_t y1, int16_t x2, int16_t y2, int16_t x3, int16_t y3, int16_t x4, int16_t y4),
+rect(int16_t x, int16_t y, int16_t width, int16_t height),
+	rect(int16_t x, int16_t y, int16_t width, int16_t height, int16_t radius),
+	triangle(int16_t x1, int16_t y1, int16_t x2, int16_t y2, int16_t x3, int16_t y3);
+  
+  /* TODO
+  void rectMode(RectMode mode);
+  
+  void pushStyle();
+  void popStyle();
+  */
+
+#if defined(__SD_H__)  // Arduino SD library
+  PImage loadImage(const char * fileName) { return PImage::loadImage(fileName); }
+  
+  void image(PImage & img, uint16_t x, uint16_t y);
+#endif
+  
+ protected:
+  int16_t
+	WIDTH, HEIGHT;   // this is the 'raw' display w/h - never changes
+  int16_t
+	_width, _height, // dependent on rotation
+	cursor_x, cursor_y;
+  uint16_t
+	textcolor, textbgcolor;
+  uint8_t
+	textsize,
+	rotation;
+  boolean
+	wrap; // If set, 'wrap' text at right edge of display
+  
+  /*
+   * Processing-style graphics state
+   */
+  
+  color strokeColor;
+  bool useStroke;
+  color fillColor;
+  bool useFill;
+};
+
+#if defined(__SD_H__)  // Arduino SD library
+
+#define BUFFPIXEL 20
+
+void Adafruit_GFX::image(PImage & img, uint16_t x, uint16_t y) {
+  int      w, h, row, col;
+  uint8_t  r, g, b;
+  uint32_t pos = 0;
+  uint8_t  sdbuffer[3*BUFFPIXEL]; // pixel buffer (R+G+B per pixel)
+  uint8_t  buffidx = sizeof(sdbuffer); // Current position in sdbuffer
+
+  // Crop area to be loaded
+  w = img._bmpWidth;
+  h = img._bmpHeight;
+  if((x+w-1) >= width())  w = width()  - x;
+  if((y+h-1) >= height()) h = height() - y;
+
+  /*
+  // Set TFT address window to clipped image bounds
+  setAddrWindow(x, y, x+w-1, y+h-1);
+  */
+  
+  for (row=0; row<h; row++) { // For each scanline...
+    // Seek to start of scan line.  It might seem labor-
+    // intensive to be doing this on every line, but this
+    // method covers a lot of gritty details like cropping
+    // and scanline padding.  Also, the seek only takes
+    // place if the file position actually needs to change
+    // (avoids a lot of cluster math in SD library).
+    if(img._flip) // Bitmap is stored bottom-to-top order (normal BMP)
+      pos = img._bmpImageoffset + (img._bmpHeight - 1 - row) * img._rowSize;
+    else     // Bitmap is stored top-to-bottom
+      pos = img._bmpImageoffset + row * img._rowSize;
+    if(img._bmpFile.position() != pos) { // Need seek?
+      img._bmpFile.seek(pos);
+      buffidx = sizeof(sdbuffer); // Force buffer reload
+    }
+
+    for (col=0; col<w; col++) { // For each pixel...
+      // Time to read more pixel data?
+      if (buffidx >= sizeof(sdbuffer)) { // Indeed
+        img._bmpFile.read(sdbuffer, sizeof(sdbuffer));
+        buffidx = 0; // Set index to beginning
+      }
+
+      // Convert pixel from BMP to TFT format, push to display
+      b = sdbuffer[buffidx++];
+      g = sdbuffer[buffidx++];
+      r = sdbuffer[buffidx++];
+      //pushColor(tft.Color565(r,g,b));
+      drawPixel(x + col, y + row, newColor(r, g, b));
+      
+    } // end pixel
+  } // end scanline
+
+}
+
+
+
+
+// These read 16- and 32-bit types from the SD card file.
+// BMP data is stored little-endian, Arduino is little-endian too.
+// May need to reverse subscript order if porting elsewhere.
+
+uint16_t PImage::read16(File f) {
+  uint16_t result;
+  ((uint8_t *)&result)[0] = f.read(); // LSB
+  ((uint8_t *)&result)[1] = f.read(); // MSB
+  return result;
+}
+
+uint32_t PImage::read32(File f) {
+  uint32_t result;
+  ((uint8_t *)&result)[0] = f.read(); // LSB
+  ((uint8_t *)&result)[1] = f.read();
+  ((uint8_t *)&result)[2] = f.read();
+  ((uint8_t *)&result)[3] = f.read(); // MSB
+  return result;
+}
+
+
+PImage PImage::loadImage(const char * fileName) {
+  File     bmpFile;
+  int      bmpWidth, bmpHeight;   // W+H in pixels
+  uint8_t  bmpDepth;              // Bit depth (currently must be 24)
+  uint32_t bmpImageoffset;        // Start of image data in file
+  uint32_t rowSize;               // Not always = bmpWidth; may have padding
+  bool     flip    = true;        // BMP is stored bottom-to-top
+
+
+  // Open requested file on SD card
+  if ((bmpFile = SD.open(fileName)) == NULL) {
+    Serial.print(F("loadImage: file not found: "));
+    Serial.println(fileName);
+    return PImage(); // load error
+  }
+  
+  
+  
+  // Parse BMP header
+  if(read16(bmpFile) != 0x4D42) { // BMP signature
+    Serial.println(F("loadImage: file doesn't look like a BMP"));
+    return PImage();
+  }
+  
+  Serial.print(F("File size: ")); Serial.println(read32(bmpFile));
+  (void)read32(bmpFile); // Read & ignore creator bytes
+  bmpImageoffset = read32(bmpFile); // Start of image data
+  Serial.print(F("Image Offset: ")); Serial.println(bmpImageoffset, DEC);
+  // Read DIB header
+  Serial.print(F("Header size: ")); Serial.println(read32(bmpFile));
+  bmpWidth  = read32(bmpFile);
+  bmpHeight = read32(bmpFile);
+  if(read16(bmpFile) != 1) { // # planes -- must be '1'
+    Serial.println(F("loadImage: invalid n. of planes"));
+    return PImage();
+  }
+  
+  bmpDepth = read16(bmpFile); // bits per pixel
+  Serial.print(F("Bit Depth: ")); Serial.println(bmpDepth);
+  if((bmpDepth != 24) || (read32(bmpFile) != 0)) { // 0 = uncompressed {
+    Serial.println(F("loadImage: invalid pixel format"));
+    return PImage();
+  }
+
+  Serial.print(F("Image size: "));
+  Serial.print(bmpWidth);
+  Serial.print('x');
+  Serial.println(bmpHeight);
+
+  // BMP rows are padded (if needed) to 4-byte boundary
+  rowSize = (bmpWidth * 3 + 3) & ~3;
+
+  // If bmpHeight is negative, image is in top-down order.
+  // This is not canon but has been observed in the wild.
+  if(bmpHeight < 0) {
+    bmpHeight = -bmpHeight;
+    flip      = false;
+  }
+  
+  return PImage(bmpFile, bmpWidth, bmpHeight, bmpDepth, bmpImageoffset, rowSize, flip);
+}
+
+#endif
+
+#endif // _ADAFRUIT_GFX_H
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_ST7735.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_ST7735.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_ST7735.cpp	(revision 136)
@@ -0,0 +1,670 @@
+/*************************************************** 
+  This is a library for the Adafruit 1.8" SPI display.
+  This library works with the Adafruit 1.8" TFT Breakout w/SD card
+  ----> http://www.adafruit.com/products/358
+  as well as Adafruit raw 1.8" TFT display
+  ----> http://www.adafruit.com/products/618
+ 
+  Check out the links above for our tutorials and wiring diagrams
+  These displays use SPI to communicate, 4 or 5 pins are required to
+  interface (RST is optional)
+  Adafruit invests time and resources providing this open source code,
+  please support Adafruit and open-source hardware by purchasing
+  products from Adafruit!
+
+  Written by Limor Fried/Ladyada for Adafruit Industries.
+  MIT license, all text above must be included in any redistribution
+ ****************************************************/
+
+#include "Adafruit_ST7735.h"
+#include <avr/pgmspace.h>
+#include <limits.h>
+#include "pins_arduino.h"
+#include "wiring_private.h"
+#include <SPI.h>
+
+inline uint16_t swapcolor(uint16_t x) { 
+  return (x << 11) | (x & 0x07E0) | (x >> 11);
+}
+
+
+// Constructor when using software SPI.  All output pins are configurable.
+Adafruit_ST7735::Adafruit_ST7735(uint8_t cs, uint8_t rs, uint8_t sid,
+ uint8_t sclk, uint8_t rst) : Adafruit_GFX(ST7735_TFTWIDTH, ST7735_TFTHEIGHT) 
+{
+  _cs   = cs;
+  _rs   = rs;
+  _sid  = sid;
+  _sclk = sclk;
+  _rst  = rst;
+  hwSPI = false;
+}
+
+
+// Constructor when using hardware SPI.  Faster, but must use SPI pins
+// specific to each board type (e.g. 11,13 for Uno, 51,52 for Mega, etc.)
+Adafruit_ST7735::Adafruit_ST7735(uint8_t cs, uint8_t rs, uint8_t rst) : 
+Adafruit_GFX(ST7735_TFTWIDTH, ST7735_TFTHEIGHT) 
+{
+  _cs   = cs;
+  _rs   = rs;
+  _rst  = rst;
+  hwSPI = true;
+  _sid  = _sclk = 0;
+}
+
+
+inline void Adafruit_ST7735::spiwrite(uint8_t c) {
+
+  //Serial.println(c, HEX);
+
+  if (hwSPI) {
+    SPI.transfer(c);
+  } else {
+    // Fast SPI bitbang swiped from LPD8806 library
+    for(uint8_t bit = 0x80; bit; bit >>= 1) {
+      if(c & bit) *dataport |=  datapinmask;
+      else        *dataport &= ~datapinmask;
+      *clkport |=  clkpinmask;
+      *clkport &= ~clkpinmask;
+    }
+  }
+}
+
+
+void Adafruit_ST7735::writecommand(uint8_t c) {
+  *rsport &= ~rspinmask;
+  *csport &= ~cspinmask;
+
+  //Serial.print("C ");
+  spiwrite(c);
+
+  *csport |= cspinmask;
+}
+
+
+void Adafruit_ST7735::writedata(uint8_t c) {
+  *rsport |=  rspinmask;
+  *csport &= ~cspinmask;
+    
+  //Serial.print("D ");
+  spiwrite(c);
+
+  *csport |= cspinmask;
+} 
+
+
+// Rather than a bazillion writecommand() and writedata() calls, screen
+// initialization commands and arguments are organized in these tables
+// stored in PROGMEM.  The table may look bulky, but that's mostly the
+// formatting -- storage-wise this is hundreds of bytes more compact
+// than the equivalent code.  Companion function follows.
+#define DELAY 0x80
+PROGMEM const static unsigned char
+  Bcmd[] = {                  // Initialization commands for 7735B screens
+    18,                       // 18 commands in list:
+    ST7735_SWRESET,   DELAY,  //  1: Software reset, no args, w/delay
+      50,                     //     50 ms delay
+    ST7735_SLPOUT ,   DELAY,  //  2: Out of sleep mode, no args, w/delay
+      255,                    //     255 = 500 ms delay
+    ST7735_COLMOD , 1+DELAY,  //  3: Set color mode, 1 arg + delay:
+      0x05,                   //     16-bit color
+      10,                     //     10 ms delay
+    ST7735_FRMCTR1, 3+DELAY,  //  4: Frame rate control, 3 args + delay:
+      0x00,                   //     fastest refresh
+      0x06,                   //     6 lines front porch
+      0x03,                   //     3 lines back porch
+      10,                     //     10 ms delay
+    ST7735_MADCTL , 1      ,  //  5: Memory access ctrl (directions), 1 arg:
+      0x08,                   //     Row addr/col addr, bottom to top refresh
+    ST7735_DISSET5, 2      ,  //  6: Display settings #5, 2 args, no delay:
+      0x15,                   //     1 clk cycle nonoverlap, 2 cycle gate
+                              //     rise, 3 cycle osc equalize
+      0x02,                   //     Fix on VTL
+    ST7735_INVCTR , 1      ,  //  7: Display inversion control, 1 arg:
+      0x0,                    //     Line inversion
+    ST7735_PWCTR1 , 2+DELAY,  //  8: Power control, 2 args + delay:
+      0x02,                   //     GVDD = 4.7V
+      0x70,                   //     1.0uA
+      10,                     //     10 ms delay
+    ST7735_PWCTR2 , 1      ,  //  9: Power control, 1 arg, no delay:
+      0x05,                   //     VGH = 14.7V, VGL = -7.35V
+    ST7735_PWCTR3 , 2      ,  // 10: Power control, 2 args, no delay:
+      0x01,                   //     Opamp current small
+      0x02,                   //     Boost frequency
+    ST7735_VMCTR1 , 2+DELAY,  // 11: Power control, 2 args + delay:
+      0x3C,                   //     VCOMH = 4V
+      0x38,                   //     VCOML = -1.1V
+      10,                     //     10 ms delay
+    ST7735_PWCTR6 , 2      ,  // 12: Power control, 2 args, no delay:
+      0x11, 0x15,
+    ST7735_GMCTRP1,16      ,  // 13: Magical unicorn dust, 16 args, no delay:
+      0x09, 0x16, 0x09, 0x20, //     (seriously though, not sure what
+      0x21, 0x1B, 0x13, 0x19, //      these config values represent)
+      0x17, 0x15, 0x1E, 0x2B,
+      0x04, 0x05, 0x02, 0x0E,
+    ST7735_GMCTRN1,16+DELAY,  // 14: Sparkles and rainbows, 16 args + delay:
+      0x0B, 0x14, 0x08, 0x1E, //     (ditto)
+      0x22, 0x1D, 0x18, 0x1E,
+      0x1B, 0x1A, 0x24, 0x2B,
+      0x06, 0x06, 0x02, 0x0F,
+      10,                     //     10 ms delay
+    ST7735_CASET  , 4      ,  // 15: Column addr set, 4 args, no delay:
+      0x00, 0x02,             //     XSTART = 2
+      0x00, 0x81,             //     XEND = 129
+    ST7735_RASET  , 4      ,  // 16: Row addr set, 4 args, no delay:
+      0x00, 0x02,             //     XSTART = 1
+      0x00, 0x81,             //     XEND = 160
+    ST7735_NORON  ,   DELAY,  // 17: Normal display on, no args, w/delay
+      10,                     //     10 ms delay
+    ST7735_DISPON ,   DELAY,  // 18: Main screen turn on, no args, w/delay
+      255 },                  //     255 = 500 ms delay
+
+  Rcmd1[] = {                 // Init for 7735R, part 1 (red or green tab)
+    15,                       // 15 commands in list:
+    ST7735_SWRESET,   DELAY,  //  1: Software reset, 0 args, w/delay
+      150,                    //     150 ms delay
+    ST7735_SLPOUT ,   DELAY,  //  2: Out of sleep mode, 0 args, w/delay
+      255,                    //     500 ms delay
+    ST7735_FRMCTR1, 3      ,  //  3: Frame rate ctrl - normal mode, 3 args:
+      0x01, 0x2C, 0x2D,       //     Rate = fosc/(1x2+40) * (LINE+2C+2D)
+    ST7735_FRMCTR2, 3      ,  //  4: Frame rate control - idle mode, 3 args:
+      0x01, 0x2C, 0x2D,       //     Rate = fosc/(1x2+40) * (LINE+2C+2D)
+    ST7735_FRMCTR3, 6      ,  //  5: Frame rate ctrl - partial mode, 6 args:
+      0x01, 0x2C, 0x2D,       //     Dot inversion mode
+      0x01, 0x2C, 0x2D,       //     Line inversion mode
+    ST7735_INVCTR , 1      ,  //  6: Display inversion ctrl, 1 arg, no delay:
+      0x07,                   //     No inversion
+    ST7735_PWCTR1 , 3      ,  //  7: Power control, 3 args, no delay:
+      0xA2,
+      0x02,                   //     -4.6V
+      0x84,                   //     AUTO mode
+    ST7735_PWCTR2 , 1      ,  //  8: Power control, 1 arg, no delay:
+      0xC5,                   //     VGH25 = 2.4C VGSEL = -10 VGH = 3 * AVDD
+    ST7735_PWCTR3 , 2      ,  //  9: Power control, 2 args, no delay:
+      0x0A,                   //     Opamp current small
+      0x00,                   //     Boost frequency
+    ST7735_PWCTR4 , 2      ,  // 10: Power control, 2 args, no delay:
+      0x8A,                   //     BCLK/2, Opamp current small & Medium low
+      0x2A,  
+    ST7735_PWCTR5 , 2      ,  // 11: Power control, 2 args, no delay:
+      0x8A, 0xEE,
+    ST7735_VMCTR1 , 1      ,  // 12: Power control, 1 arg, no delay:
+      0x0E,
+    ST7735_INVOFF , 0      ,  // 13: Don't invert display, no args, no delay
+    ST7735_MADCTL , 1      ,  // 14: Memory access control (directions), 1 arg:
+      0xC8,                   //     row addr/col addr, bottom to top refresh
+    ST7735_COLMOD , 1      ,  // 15: set color mode, 1 arg, no delay:
+      0x05 },                 //     16-bit color
+
+  Rcmd2green[] = {            // Init for 7735R, part 2 (green tab only)
+    2,                        //  2 commands in list:
+    ST7735_CASET  , 4      ,  //  1: Column addr set, 4 args, no delay:
+      0x00, 0x02,             //     XSTART = 0
+      0x00, 0x7F+0x02,        //     XEND = 127
+    ST7735_RASET  , 4      ,  //  2: Row addr set, 4 args, no delay:
+      0x00, 0x01,             //     XSTART = 0
+      0x00, 0x9F+0x01 },      //     XEND = 159
+  Rcmd2red[] = {              // Init for 7735R, part 2 (red tab only)
+    2,                        //  2 commands in list:
+    ST7735_CASET  , 4      ,  //  1: Column addr set, 4 args, no delay:
+      0x00, 0x00,             //     XSTART = 0
+      0x00, 0x7F,             //     XEND = 127
+    ST7735_RASET  , 4      ,  //  2: Row addr set, 4 args, no delay:
+      0x00, 0x00,             //     XSTART = 0
+      0x00, 0x9F },           //     XEND = 159
+
+  Rcmd3[] = {                 // Init for 7735R, part 3 (red or green tab)
+    4,                        //  4 commands in list:
+    ST7735_GMCTRP1, 16      , //  1: Magical unicorn dust, 16 args, no delay:
+      0x02, 0x1c, 0x07, 0x12,
+      0x37, 0x32, 0x29, 0x2d,
+      0x29, 0x25, 0x2B, 0x39,
+      0x00, 0x01, 0x03, 0x10,
+    ST7735_GMCTRN1, 16      , //  2: Sparkles and rainbows, 16 args, no delay:
+      0x03, 0x1d, 0x07, 0x06,
+      0x2E, 0x2C, 0x29, 0x2D,
+      0x2E, 0x2E, 0x37, 0x3F,
+      0x00, 0x00, 0x02, 0x10,
+    ST7735_NORON  ,    DELAY, //  3: Normal display on, no args, w/delay
+      10,                     //     10 ms delay
+    ST7735_DISPON ,    DELAY, //  4: Main screen turn on, no args w/delay
+      100 },                  //     100 ms delay
+  Gcmd[] = {                  // Initialization commands for 7735B screens
+    19,                       // 18 commands in list:
+    ST7735_SWRESET,   DELAY,  //  1: Software reset, no args, w/delay
+      50,                     //     50 ms delay
+    ST7735_SLPOUT ,   DELAY,  //  2: Out of sleep mode, no args, w/delay
+      100,                    //     255 = 500 ms delay
+    0x26 , 1,  			// 3: Set default gamma
+      0x04,                     //     16-bit color
+    0xb1, 2,              	// 4: Frame Rate
+      0x0b,
+      0x14,
+    0xc0, 2,                    // 5: VRH1[4:0] & VC[2:0]
+      0x08,
+      0x00,
+    0xc1, 1,                    // 6: BT[2:0]
+      0x05,
+    0xc5, 2,                    // 7: VMH[6:0] & VML[6:0]
+      0x41,
+      0x30,
+    0xc7, 1,                    // 8: LCD Driving control
+      0xc1,
+    0xEC, 1,                    // 9: Set pumping color freq
+      0x1b,
+    0x3a , 1 + DELAY,  	        // 10: Set color format
+      0x55,                     //     16-bit color
+      100,
+    0x2a, 4,                    // 11: Set Column Address
+      0x00,
+      0x00,
+      0x00,
+      0x7f,
+    0x2b, 4,                    // 12: Set Page Address
+      0x00,
+      0x00,
+      0x00,
+      0x9f,
+    0x36, 1,                    // 12+1: Set Scanning Direction
+      0xc8,
+    0xb7, 1,			// 14: Set Source Output Direciton
+      0x00,
+    0xf2, 1,			// 15: Enable Gamma bit
+      0x00,
+    0xe0, 15 + DELAY,		// 16: magic
+      0x28, 0x24, 0x22, 0x31,
+      0x2b, 0x0e, 0x53, 0xa5,
+      0x42, 0x16, 0x18, 0x12,
+      0x1a, 0x14, 0x03,
+      50,
+    0xe1, 15 + DELAY,		// 17: more magic
+      0x17, 0x1b, 0x1d, 0x0e,
+      0x14, 0x11, 0x2c, 0xa5,
+      0x3d, 0x09, 0x27, 0x2d,
+      0x25, 0x2b, 0x3c, 
+      50, 
+    ST7735_NORON  ,   DELAY,  // 17: Normal display on, no args, w/delay
+      10,                     //     10 ms delay
+    ST7735_DISPON ,   DELAY,  // 18: Main screen turn on, no args, w/delay
+      255 };                  //     255 = 500 ms delay
+
+
+
+// Companion code to the above tables.  Reads and issues
+// a series of LCD commands stored in PROGMEM byte array.
+void Adafruit_ST7735::commandList(const uint8_t *addr) {
+
+  uint8_t  numCommands, numArgs;
+  uint16_t ms;
+
+  numCommands = pgm_read_byte(addr++);   // Number of commands to follow
+  while(numCommands--) {                 // For each command...
+    writecommand(pgm_read_byte(addr++)); //   Read, issue command
+    numArgs  = pgm_read_byte(addr++);    //   Number of args to follow
+    ms       = numArgs & DELAY;          //   If hibit set, delay follows args
+    numArgs &= ~DELAY;                   //   Mask out delay bit
+    while(numArgs--) {                   //   For each argument...
+      writedata(pgm_read_byte(addr++));  //     Read, issue argument
+    }
+
+    if(ms) {
+      ms = pgm_read_byte(addr++); // Read post-command delay time (ms)
+      if(ms == 255) ms = 500;     // If 255, delay for 500 ms
+      delay(ms);
+    }
+  }
+}
+
+
+// Initialization code common to both 'B' and 'R' type displays
+void Adafruit_ST7735::commonInit(const uint8_t *cmdList) {
+
+  colstart  = rowstart = 0; // May be overridden in init func
+
+  pinMode(_rs, OUTPUT);
+  pinMode(_cs, OUTPUT);
+  csport    = portOutputRegister(digitalPinToPort(_cs));
+  cspinmask = digitalPinToBitMask(_cs);
+  rsport    = portOutputRegister(digitalPinToPort(_rs));
+  rspinmask = digitalPinToBitMask(_rs);
+
+  if(hwSPI) { // Using hardware SPI
+    SPI.begin();
+#if defined(ARDUINO_ARCH_SAMD)
+    SPI.setClockDivider(24); // 4 MHz (half speed)
+#else
+    SPI.setClockDivider(SPI_CLOCK_DIV4); // 4 MHz (half speed)
+#endif
+    SPI.setBitOrder(MSBFIRST);
+    SPI.setDataMode(SPI_MODE0);
+  } else {
+    pinMode(_sclk, OUTPUT);
+    pinMode(_sid , OUTPUT);
+    clkport     = portOutputRegister(digitalPinToPort(_sclk));
+    clkpinmask  = digitalPinToBitMask(_sclk);
+    dataport    = portOutputRegister(digitalPinToPort(_sid));
+    datapinmask = digitalPinToBitMask(_sid);
+    *clkport   &= ~clkpinmask;
+    *dataport  &= ~datapinmask;
+  }
+
+  // toggle RST low to reset; CS low so it'll listen to us
+  *csport &= ~cspinmask;
+  if (_rst) {
+    pinMode(_rst, OUTPUT);
+    digitalWrite(_rst, HIGH);
+    delay(500);
+    digitalWrite(_rst, LOW);
+    delay(500);
+    digitalWrite(_rst, HIGH);
+    delay(500);
+  }
+
+  if(cmdList) commandList(cmdList);
+}
+
+
+// Initialization for ST7735B screens
+void Adafruit_ST7735::initB(void) {
+  commonInit(Bcmd);
+}
+
+
+// Initialization for ST7735B screens
+void Adafruit_ST7735::initG(void) {
+  commonInit(Gcmd);
+}
+
+
+// Initialization for ST7735R screens (green or red tabs)
+void Adafruit_ST7735::initR(uint8_t options) {
+  commonInit(Rcmd1);
+  if(options == INITR_GREENTAB) {
+    commandList(Rcmd2green);
+    colstart = 2;
+    rowstart = 1;
+  } else {
+    // colstart, rowstart left at default '0' values
+    commandList(Rcmd2red);
+  }
+  commandList(Rcmd3);
+  tabcolor = options;
+}
+
+
+void Adafruit_ST7735::setAddrWindow(uint8_t x0, uint8_t y0, uint8_t x1,
+ uint8_t y1) {
+
+  writecommand(ST7735_CASET); // Column addr set
+  writedata(0x00);
+  writedata(x0+colstart);     // XSTART 
+  writedata(0x00);
+  writedata(x1+colstart);     // XEND
+
+  writecommand(ST7735_RASET); // Row addr set
+  writedata(0x00);
+  writedata(y0+rowstart);     // YSTART
+  writedata(0x00);
+  writedata(y1+rowstart);     // YEND
+
+  writecommand(ST7735_RAMWR); // write to RAM
+}
+
+
+void Adafruit_ST7735::pushColor(uint16_t color) {
+  *rsport |=  rspinmask;
+  *csport &= ~cspinmask;
+
+  if (tabcolor == INITR_BLACKTAB)   color = swapcolor(color);
+  spiwrite(color >> 8);
+  spiwrite(color);
+
+  *csport |= cspinmask;
+}
+
+void Adafruit_ST7735::drawPixel(int16_t x, int16_t y, uint16_t color) {
+
+  if((x < 0) ||(x >= _width) || (y < 0) || (y >= _height)) return;
+
+  setAddrWindow(x,y,x+1,y+1);
+
+  *rsport |=  rspinmask;
+  *csport &= ~cspinmask;
+
+  if (tabcolor == INITR_BLACKTAB)   color = swapcolor(color);
+
+  spiwrite(color >> 8);
+  spiwrite(color);
+
+  *csport |= cspinmask;
+}
+
+
+void Adafruit_ST7735::drawFastVLine(int16_t x, int16_t y, int16_t h,
+ uint16_t color) {
+
+  // Rudimentary clipping
+  if((x >= _width) || (y >= _height)) return;
+  if((y+h-1) >= _height) h = _height-y;
+  setAddrWindow(x, y, x, y+h-1);
+
+  if (tabcolor == INITR_BLACKTAB)   color = swapcolor(color);
+
+  uint8_t hi = color >> 8, lo = color;
+  *rsport |=  rspinmask;
+  *csport &= ~cspinmask;
+  while (h--) {
+    spiwrite(hi);
+    spiwrite(lo);
+  }
+  *csport |= cspinmask;
+}
+
+
+void Adafruit_ST7735::drawFastHLine(int16_t x, int16_t y, int16_t w,
+  uint16_t color) {
+
+  // Rudimentary clipping
+  if((x >= _width) || (y >= _height)) return;
+  if((x+w-1) >= _width)  w = _width-x;
+  setAddrWindow(x, y, x+w-1, y);
+
+  if (tabcolor == INITR_BLACKTAB)   color = swapcolor(color);
+
+  uint8_t hi = color >> 8, lo = color;
+  *rsport |=  rspinmask;
+  *csport &= ~cspinmask;
+  while (w--) {
+    spiwrite(hi);
+    spiwrite(lo);
+  }
+  *csport |= cspinmask;
+}
+
+
+
+void Adafruit_ST7735::fillScreen(uint16_t color) {
+  fillRect(0, 0,  _width, _height, color);
+}
+
+
+
+// fill a rectangle
+void Adafruit_ST7735::fillRect(int16_t x, int16_t y, int16_t w, int16_t h,
+  uint16_t color) {
+
+  // rudimentary clipping (drawChar w/big text requires this)
+  if((x >= _width) || (y >= _height)) return;
+  if((x + w - 1) >= _width)  w = _width  - x;
+  if((y + h - 1) >= _height) h = _height - y;
+
+  if (tabcolor == INITR_BLACKTAB)   color = swapcolor(color);
+
+  setAddrWindow(x, y, x+w-1, y+h-1);
+
+  uint8_t hi = color >> 8, lo = color;
+  *rsport |=  rspinmask;
+  *csport &= ~cspinmask;
+  for(y=h; y>0; y--) {
+    for(x=w; x>0; x--) {
+      spiwrite(hi);
+      spiwrite(lo);
+    }
+  }
+
+  *csport |= cspinmask;
+}
+
+
+#define MADCTL_MY  0x80
+#define MADCTL_MX  0x40
+#define MADCTL_MV  0x20
+#define MADCTL_ML  0x10
+#define MADCTL_RGB 0x08
+#define MADCTL_MH  0x04
+
+void Adafruit_ST7735::setRotation(uint8_t m) {
+
+  writecommand(ST7735_MADCTL);
+  rotation = m % 4; // can't be higher than 3
+  switch (rotation) {
+   case 0:
+    writedata(MADCTL_MX | MADCTL_MY | MADCTL_RGB);
+    _width  = ST7735_TFTWIDTH;
+    _height = ST7735_TFTHEIGHT;
+    break;
+   case 1:
+    writedata(MADCTL_MY | MADCTL_MV | MADCTL_RGB);
+    _width  = ST7735_TFTHEIGHT;
+    _height = ST7735_TFTWIDTH;
+    break;
+   case 2:
+    writedata(MADCTL_RGB);
+    _width  = ST7735_TFTWIDTH;
+    _height = ST7735_TFTHEIGHT;
+    break;
+   case 3:
+    writedata(MADCTL_MX | MADCTL_MV | MADCTL_RGB);
+    _width  = ST7735_TFTHEIGHT;
+    _height = ST7735_TFTWIDTH;
+    break;
+  }
+}
+
+
+void Adafruit_ST7735::invertDisplay(boolean i) {
+  writecommand(i ? ST7735_INVON : ST7735_INVOFF);
+}
+
+
+////////// stuff not actively being used, but kept for posterity
+/*
+
+ uint8_t Adafruit_ST7735::spiread(void) {
+ uint8_t r = 0;
+ if (_sid > 0) {
+ r = shiftIn(_sid, _sclk, MSBFIRST);
+ } else {
+ //SID_DDR &= ~_BV(SID);
+ //int8_t i;
+ //for (i=7; i>=0; i--) {
+ //  SCLK_PORT &= ~_BV(SCLK);
+ //  r <<= 1;
+ //  r |= (SID_PIN >> SID) & 0x1;
+ //  SCLK_PORT |= _BV(SCLK);
+ //}
+ //SID_DDR |= _BV(SID);
+ 
+ }
+ return r;
+ }
+ 
+ 
+ void Adafruit_ST7735::dummyclock(void) {
+ 
+ if (_sid > 0) {
+ digitalWrite(_sclk, LOW);
+ digitalWrite(_sclk, HIGH);
+ } else {
+ // SCLK_PORT &= ~_BV(SCLK);
+ //SCLK_PORT |= _BV(SCLK);
+ }
+ }
+ uint8_t Adafruit_ST7735::readdata(void) {
+ *portOutputRegister(rsport) |= rspin;
+ 
+ *portOutputRegister(csport) &= ~ cspin;
+ 
+ uint8_t r = spiread();
+ 
+ *portOutputRegister(csport) |= cspin;
+ 
+ return r;
+ 
+ } 
+ 
+ uint8_t Adafruit_ST7735::readcommand8(uint8_t c) {
+ digitalWrite(_rs, LOW);
+ 
+ *portOutputRegister(csport) &= ~ cspin;
+ 
+ spiwrite(c);
+ 
+ digitalWrite(_rs, HIGH);
+ pinMode(_sid, INPUT); // input!
+ digitalWrite(_sid, LOW); // low
+ spiread();
+ uint8_t r = spiread();
+ 
+ 
+ *portOutputRegister(csport) |= cspin;
+ 
+ 
+ pinMode(_sid, OUTPUT); // back to output
+ return r;
+ }
+ 
+ 
+ uint16_t Adafruit_ST7735::readcommand16(uint8_t c) {
+ digitalWrite(_rs, LOW);
+ if (_cs)
+ digitalWrite(_cs, LOW);
+ 
+ spiwrite(c);
+ pinMode(_sid, INPUT); // input!
+ uint16_t r = spiread();
+ r <<= 8;
+ r |= spiread();
+ if (_cs)
+ digitalWrite(_cs, HIGH);
+ 
+ pinMode(_sid, OUTPUT); // back to output
+ return r;
+ }
+ 
+ uint32_t Adafruit_ST7735::readcommand32(uint8_t c) {
+ digitalWrite(_rs, LOW);
+ if (_cs)
+ digitalWrite(_cs, LOW);
+ spiwrite(c);
+ pinMode(_sid, INPUT); // input!
+ 
+ dummyclock();
+ dummyclock();
+ 
+ uint32_t r = spiread();
+ r <<= 8;
+ r |= spiread();
+ r <<= 8;
+ r |= spiread();
+ r <<= 8;
+ r |= spiread();
+ if (_cs)
+ digitalWrite(_cs, HIGH);
+ 
+ pinMode(_sid, OUTPUT); // back to output
+ return r;
+ }
+ 
+ */
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_ST7735.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_ST7735.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/Adafruit_ST7735.h	(revision 136)
@@ -0,0 +1,151 @@
+/***************************************************
+  This is a library for the Adafruit 1.8" SPI display.
+  This library works with the Adafruit 1.8" TFT Breakout w/SD card
+  ----> http://www.adafruit.com/products/358
+  as well as Adafruit raw 1.8" TFT display
+  ----> http://www.adafruit.com/products/618
+ 
+  Check out the links above for our tutorials and wiring diagrams
+  These displays use SPI to communicate, 4 or 5 pins are required to
+  interface (RST is optional)
+  Adafruit invests time and resources providing this open source code,
+  please support Adafruit and open-source hardware by purchasing
+  products from Adafruit!
+
+  Written by Limor Fried/Ladyada for Adafruit Industries.
+  MIT license, all text above must be included in any redistribution
+ ****************************************************/
+
+#ifndef _ADAFRUIT_ST7735H_
+#define _ADAFRUIT_ST7735H_
+
+#if ARDUINO >= 100
+ #include "Arduino.h"
+ #include "Print.h"
+#else
+ #include "WProgram.h"
+#endif
+#include "Adafruit_GFX.h"
+#include <avr/pgmspace.h>
+
+// some flags for initR() :(
+#define INITR_GREENTAB 0x0
+#define INITR_REDTAB   0x1
+#define INITR_BLACKTAB   0x2
+
+#define ST7735_TFTWIDTH  128
+#define ST7735_TFTHEIGHT 160
+
+#define ST7735_NOP     0x00
+#define ST7735_SWRESET 0x01
+#define ST7735_RDDID   0x04
+#define ST7735_RDDST   0x09
+
+#define ST7735_SLPIN   0x10
+#define ST7735_SLPOUT  0x11
+#define ST7735_PTLON   0x12
+#define ST7735_NORON   0x13
+
+#define ST7735_INVOFF  0x20
+#define ST7735_INVON   0x21
+#define ST7735_DISPOFF 0x28
+#define ST7735_DISPON  0x29
+#define ST7735_CASET   0x2A
+#define ST7735_RASET   0x2B
+#define ST7735_RAMWR   0x2C
+#define ST7735_RAMRD   0x2E
+
+#define ST7735_PTLAR   0x30
+#define ST7735_COLMOD  0x3A
+#define ST7735_MADCTL  0x36
+
+#define ST7735_FRMCTR1 0xB1
+#define ST7735_FRMCTR2 0xB2
+#define ST7735_FRMCTR3 0xB3
+#define ST7735_INVCTR  0xB4
+#define ST7735_DISSET5 0xB6
+
+#define ST7735_PWCTR1  0xC0
+#define ST7735_PWCTR2  0xC1
+#define ST7735_PWCTR3  0xC2
+#define ST7735_PWCTR4  0xC3
+#define ST7735_PWCTR5  0xC4
+#define ST7735_VMCTR1  0xC5
+
+#define ST7735_RDID1   0xDA
+#define ST7735_RDID2   0xDB
+#define ST7735_RDID3   0xDC
+#define ST7735_RDID4   0xDD
+
+#define ST7735_PWCTR6  0xFC
+
+#define ST7735_GMCTRP1 0xE0
+#define ST7735_GMCTRN1 0xE1
+
+// Color definitions
+#define	ST7735_BLACK   0x0000
+#define	ST7735_BLUE    0x001F
+#define	ST7735_RED     0xF800
+#define	ST7735_GREEN   0x07E0
+#define ST7735_CYAN    0x07FF
+#define ST7735_MAGENTA 0xF81F
+#define ST7735_YELLOW  0xFFE0  
+#define ST7735_WHITE   0xFFFF
+
+
+class Adafruit_ST7735 : public Adafruit_GFX {
+
+ public:
+
+  Adafruit_ST7735(uint8_t CS, uint8_t RS, uint8_t SID, uint8_t SCLK,
+    uint8_t RST);
+  Adafruit_ST7735(uint8_t CS, uint8_t RS, uint8_t RST);
+
+  void     initB(void),                             // for ST7735B displays
+           initG(void),                             // for ILI9163C displays
+           initR(uint8_t options = INITR_GREENTAB), // for ST7735R
+           setAddrWindow(uint8_t x0, uint8_t y0, uint8_t x1, uint8_t y1),
+           pushColor(uint16_t color),
+           fillScreen(uint16_t color),
+           drawPixel(int16_t x, int16_t y, uint16_t color),
+           drawFastVLine(int16_t x, int16_t y, int16_t h, uint16_t color),
+           drawFastHLine(int16_t x, int16_t y, int16_t w, uint16_t color),
+           fillRect(int16_t x, int16_t y, int16_t w, int16_t h,
+             uint16_t color),
+           setRotation(uint8_t r),
+           invertDisplay(boolean i);
+  uint16_t Color565(uint8_t r, uint8_t g, uint8_t b) { return newColor(r, g, b);}
+  
+  /* These are not for current use, 8-bit protocol only!
+  uint8_t  readdata(void),
+           readcommand8(uint8_t);
+  uint16_t readcommand16(uint8_t);
+  uint32_t readcommand32(uint8_t);
+  void     dummyclock(void);
+  */
+
+ private:
+  uint8_t  tabcolor;
+
+  void     spiwrite(uint8_t),
+           writecommand(uint8_t c),
+           writedata(uint8_t d),
+           commandList(const uint8_t *addr),
+           commonInit(const uint8_t *cmdList);
+//uint8_t  spiread(void);
+
+  boolean  hwSPI;
+ #if defined(ARDUINO_ARCH_SAMD)
+  volatile uint32_t *dataport, *clkport, *csport, *rsport;
+  uint32_t  _cs, _rs, _rst, _sid, _sclk,
+           datapinmask, clkpinmask, cspinmask, rspinmask,
+           colstart, rowstart; // some displays need this changed
+ #else
+  volatile uint8_t *dataport, *clkport, *csport, *rsport;
+  uint8_t  _cs, _rs, _rst, _sid, _sclk,
+           datapinmask, clkpinmask, cspinmask, rspinmask,
+           colstart, rowstart; // some displays need this changed
+ #endif   
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/PImage.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/PImage.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/PImage.h	(revision 136)
@@ -0,0 +1,65 @@
+
+
+#ifndef _PIMAGE_H
+#define _PIMAGE_H
+
+class Adafruit_GFX;
+
+#if defined(__SD_H__)  // Arduino SD library
+
+
+/// This class mimics Processing's PImage, but with fewer
+/// capabilities. It allows an image stored in the SD card to be
+/// drawn to the display.
+/// @author Enrico Gueli <enrico.gueli@gmail.com>
+class PImage {
+public:
+  PImage() : 
+    _valid(false), 
+    _bmpWidth(0), 
+    _bmpHeight(0) { }
+  
+  void draw(Adafruit_GFX & glcd, int16_t x, int16_t y);
+  
+  static PImage loadImage(const char * fileName);
+  
+  void close() { _bmpFile.close(); }
+  
+  bool isValid() { return _valid; }
+  
+  int width() { return _bmpWidth; }
+  int height() { return _bmpHeight; }
+  
+private:
+  friend class Adafruit_GFX;
+  
+  File _bmpFile;
+  int  _bmpWidth, _bmpHeight;   // W+H in pixels
+  uint8_t  _bmpDepth;              // Bit depth (currently must be 24)
+  uint32_t _bmpImageoffset;        // Start of image data in file
+  uint32_t _rowSize;               // Not always = bmpWidth; may have padding
+  bool     _flip; 
+  
+  bool     _valid;
+  
+  PImage(File & bmpFile, int bmpWidth, int bmpHeight, uint8_t  bmpDepth, uint32_t bmpImageoffset, uint32_t rowSize, bool     flip) : 
+  _bmpFile(bmpFile),
+  _bmpWidth(bmpWidth),
+  _bmpHeight(bmpHeight),
+  _bmpDepth(bmpDepth),
+  _bmpImageoffset(bmpImageoffset),
+  _rowSize(rowSize),
+  _flip(flip),
+  _valid(true) // since Adafruit_GFX is friend, we could just let it write the variables and save some CPU cycles
+  { }
+  
+  static uint16_t read16(File f);
+  static uint32_t read32(File f);
+  
+  // TODO close the file in ~PImage and PImage(const PImage&)
+
+};
+
+#endif
+
+#endif // _PIMAGE_H
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/glcdfont.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/glcdfont.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/glcdfont.c	(revision 136)
@@ -0,0 +1,268 @@
+#ifndef ARDUINO_ARCH_SAMD
+#include <avr/io.h>
+#endif
+#include <avr/pgmspace.h> 
+ 
+#ifndef FONT5X7_H
+#define FONT5X7_H
+
+// standard ascii 5x7 font
+
+static const unsigned char  font[] PROGMEM = {
+        0x00, 0x00, 0x00, 0x00, 0x00,   
+	0x3E, 0x5B, 0x4F, 0x5B, 0x3E, 	
+	0x3E, 0x6B, 0x4F, 0x6B, 0x3E, 	
+	0x1C, 0x3E, 0x7C, 0x3E, 0x1C, 
+	0x18, 0x3C, 0x7E, 0x3C, 0x18, 
+	0x1C, 0x57, 0x7D, 0x57, 0x1C, 
+	0x1C, 0x5E, 0x7F, 0x5E, 0x1C, 
+	0x00, 0x18, 0x3C, 0x18, 0x00, 
+	0xFF, 0xE7, 0xC3, 0xE7, 0xFF, 
+	0x00, 0x18, 0x24, 0x18, 0x00, 
+	0xFF, 0xE7, 0xDB, 0xE7, 0xFF, 
+	0x30, 0x48, 0x3A, 0x06, 0x0E, 
+	0x26, 0x29, 0x79, 0x29, 0x26, 
+	0x40, 0x7F, 0x05, 0x05, 0x07, 
+	0x40, 0x7F, 0x05, 0x25, 0x3F, 
+	0x5A, 0x3C, 0xE7, 0x3C, 0x5A, 
+	0x7F, 0x3E, 0x1C, 0x1C, 0x08, 
+	0x08, 0x1C, 0x1C, 0x3E, 0x7F, 
+	0x14, 0x22, 0x7F, 0x22, 0x14, 
+	0x5F, 0x5F, 0x00, 0x5F, 0x5F, 
+	0x06, 0x09, 0x7F, 0x01, 0x7F, 
+	0x00, 0x66, 0x89, 0x95, 0x6A, 
+	0x60, 0x60, 0x60, 0x60, 0x60, 
+	0x94, 0xA2, 0xFF, 0xA2, 0x94, 
+	0x08, 0x04, 0x7E, 0x04, 0x08, 
+	0x10, 0x20, 0x7E, 0x20, 0x10, 
+	0x08, 0x08, 0x2A, 0x1C, 0x08, 
+	0x08, 0x1C, 0x2A, 0x08, 0x08, 
+	0x1E, 0x10, 0x10, 0x10, 0x10, 
+	0x0C, 0x1E, 0x0C, 0x1E, 0x0C, 
+	0x30, 0x38, 0x3E, 0x38, 0x30, 
+	0x06, 0x0E, 0x3E, 0x0E, 0x06, 
+	0x00, 0x00, 0x00, 0x00, 0x00, 
+	0x00, 0x00, 0x5F, 0x00, 0x00, 
+	0x00, 0x07, 0x00, 0x07, 0x00, 
+	0x14, 0x7F, 0x14, 0x7F, 0x14, 
+	0x24, 0x2A, 0x7F, 0x2A, 0x12, 
+	0x23, 0x13, 0x08, 0x64, 0x62, 
+	0x36, 0x49, 0x56, 0x20, 0x50, 
+	0x00, 0x08, 0x07, 0x03, 0x00, 
+	0x00, 0x1C, 0x22, 0x41, 0x00, 
+	0x00, 0x41, 0x22, 0x1C, 0x00, 
+	0x2A, 0x1C, 0x7F, 0x1C, 0x2A, 
+	0x08, 0x08, 0x3E, 0x08, 0x08, 
+	0x00, 0x80, 0x70, 0x30, 0x00, 
+	0x08, 0x08, 0x08, 0x08, 0x08, 
+	0x00, 0x00, 0x60, 0x60, 0x00, 
+	0x20, 0x10, 0x08, 0x04, 0x02, 
+	0x3E, 0x51, 0x49, 0x45, 0x3E, 
+	0x00, 0x42, 0x7F, 0x40, 0x00, 
+	0x72, 0x49, 0x49, 0x49, 0x46, 
+	0x21, 0x41, 0x49, 0x4D, 0x33, 
+	0x18, 0x14, 0x12, 0x7F, 0x10, 
+	0x27, 0x45, 0x45, 0x45, 0x39, 
+	0x3C, 0x4A, 0x49, 0x49, 0x31, 
+	0x41, 0x21, 0x11, 0x09, 0x07, 
+	0x36, 0x49, 0x49, 0x49, 0x36, 
+	0x46, 0x49, 0x49, 0x29, 0x1E, 
+	0x00, 0x00, 0x14, 0x00, 0x00, 
+	0x00, 0x40, 0x34, 0x00, 0x00, 
+	0x00, 0x08, 0x14, 0x22, 0x41, 
+	0x14, 0x14, 0x14, 0x14, 0x14, 
+	0x00, 0x41, 0x22, 0x14, 0x08, 
+	0x02, 0x01, 0x59, 0x09, 0x06, 
+	0x3E, 0x41, 0x5D, 0x59, 0x4E, 
+	0x7C, 0x12, 0x11, 0x12, 0x7C, 
+	0x7F, 0x49, 0x49, 0x49, 0x36, 
+	0x3E, 0x41, 0x41, 0x41, 0x22, 
+	0x7F, 0x41, 0x41, 0x41, 0x3E, 
+	0x7F, 0x49, 0x49, 0x49, 0x41, 
+	0x7F, 0x09, 0x09, 0x09, 0x01, 
+	0x3E, 0x41, 0x41, 0x51, 0x73, 
+	0x7F, 0x08, 0x08, 0x08, 0x7F, 
+	0x00, 0x41, 0x7F, 0x41, 0x00, 
+	0x20, 0x40, 0x41, 0x3F, 0x01, 
+	0x7F, 0x08, 0x14, 0x22, 0x41, 
+	0x7F, 0x40, 0x40, 0x40, 0x40, 
+	0x7F, 0x02, 0x1C, 0x02, 0x7F, 
+	0x7F, 0x04, 0x08, 0x10, 0x7F, 
+	0x3E, 0x41, 0x41, 0x41, 0x3E, 
+	0x7F, 0x09, 0x09, 0x09, 0x06, 
+	0x3E, 0x41, 0x51, 0x21, 0x5E, 
+	0x7F, 0x09, 0x19, 0x29, 0x46, 
+	0x26, 0x49, 0x49, 0x49, 0x32, 
+	0x03, 0x01, 0x7F, 0x01, 0x03, 
+	0x3F, 0x40, 0x40, 0x40, 0x3F, 
+	0x1F, 0x20, 0x40, 0x20, 0x1F, 
+	0x3F, 0x40, 0x38, 0x40, 0x3F, 
+	0x63, 0x14, 0x08, 0x14, 0x63, 
+	0x03, 0x04, 0x78, 0x04, 0x03, 
+	0x61, 0x59, 0x49, 0x4D, 0x43, 
+	0x00, 0x7F, 0x41, 0x41, 0x41, 
+	0x02, 0x04, 0x08, 0x10, 0x20, 
+	0x00, 0x41, 0x41, 0x41, 0x7F, 
+	0x04, 0x02, 0x01, 0x02, 0x04, 
+	0x40, 0x40, 0x40, 0x40, 0x40, 
+	0x00, 0x03, 0x07, 0x08, 0x00, 
+	0x20, 0x54, 0x54, 0x78, 0x40, 
+	0x7F, 0x28, 0x44, 0x44, 0x38, 
+	0x38, 0x44, 0x44, 0x44, 0x28, 
+	0x38, 0x44, 0x44, 0x28, 0x7F, 
+	0x38, 0x54, 0x54, 0x54, 0x18, 
+	0x00, 0x08, 0x7E, 0x09, 0x02, 
+	0x18, 0xA4, 0xA4, 0x9C, 0x78, 
+	0x7F, 0x08, 0x04, 0x04, 0x78, 
+	0x00, 0x44, 0x7D, 0x40, 0x00, 
+	0x20, 0x40, 0x40, 0x3D, 0x00, 
+	0x7F, 0x10, 0x28, 0x44, 0x00, 
+	0x00, 0x41, 0x7F, 0x40, 0x00, 
+	0x7C, 0x04, 0x78, 0x04, 0x78, 
+	0x7C, 0x08, 0x04, 0x04, 0x78, 
+	0x38, 0x44, 0x44, 0x44, 0x38, 
+	0xFC, 0x18, 0x24, 0x24, 0x18, 
+	0x18, 0x24, 0x24, 0x18, 0xFC, 
+	0x7C, 0x08, 0x04, 0x04, 0x08, 
+	0x48, 0x54, 0x54, 0x54, 0x24, 
+	0x04, 0x04, 0x3F, 0x44, 0x24, 
+	0x3C, 0x40, 0x40, 0x20, 0x7C, 
+	0x1C, 0x20, 0x40, 0x20, 0x1C, 
+	0x3C, 0x40, 0x30, 0x40, 0x3C, 
+	0x44, 0x28, 0x10, 0x28, 0x44, 
+	0x4C, 0x90, 0x90, 0x90, 0x7C, 
+	0x44, 0x64, 0x54, 0x4C, 0x44, 
+	0x00, 0x08, 0x36, 0x41, 0x00, 
+	0x00, 0x00, 0x77, 0x00, 0x00, 
+	0x00, 0x41, 0x36, 0x08, 0x00, 
+	0x02, 0x01, 0x02, 0x04, 0x02, 
+	0x3C, 0x26, 0x23, 0x26, 0x3C, 
+	0x1E, 0xA1, 0xA1, 0x61, 0x12, 
+	0x3A, 0x40, 0x40, 0x20, 0x7A, 
+	0x38, 0x54, 0x54, 0x55, 0x59, 
+	0x21, 0x55, 0x55, 0x79, 0x41, 
+	0x21, 0x54, 0x54, 0x78, 0x41, 
+	0x21, 0x55, 0x54, 0x78, 0x40, 
+	0x20, 0x54, 0x55, 0x79, 0x40, 
+	0x0C, 0x1E, 0x52, 0x72, 0x12, 
+	0x39, 0x55, 0x55, 0x55, 0x59, 
+	0x39, 0x54, 0x54, 0x54, 0x59, 
+	0x39, 0x55, 0x54, 0x54, 0x58, 
+	0x00, 0x00, 0x45, 0x7C, 0x41, 
+	0x00, 0x02, 0x45, 0x7D, 0x42, 
+	0x00, 0x01, 0x45, 0x7C, 0x40, 
+	0xF0, 0x29, 0x24, 0x29, 0xF0, 
+	0xF0, 0x28, 0x25, 0x28, 0xF0, 
+	0x7C, 0x54, 0x55, 0x45, 0x00, 
+	0x20, 0x54, 0x54, 0x7C, 0x54, 
+	0x7C, 0x0A, 0x09, 0x7F, 0x49, 
+	0x32, 0x49, 0x49, 0x49, 0x32, 
+	0x32, 0x48, 0x48, 0x48, 0x32, 
+	0x32, 0x4A, 0x48, 0x48, 0x30, 
+	0x3A, 0x41, 0x41, 0x21, 0x7A, 
+	0x3A, 0x42, 0x40, 0x20, 0x78, 
+	0x00, 0x9D, 0xA0, 0xA0, 0x7D, 
+	0x39, 0x44, 0x44, 0x44, 0x39, 
+	0x3D, 0x40, 0x40, 0x40, 0x3D, 
+	0x3C, 0x24, 0xFF, 0x24, 0x24, 
+	0x48, 0x7E, 0x49, 0x43, 0x66, 
+	0x2B, 0x2F, 0xFC, 0x2F, 0x2B, 
+	0xFF, 0x09, 0x29, 0xF6, 0x20, 
+	0xC0, 0x88, 0x7E, 0x09, 0x03, 
+	0x20, 0x54, 0x54, 0x79, 0x41, 
+	0x00, 0x00, 0x44, 0x7D, 0x41, 
+	0x30, 0x48, 0x48, 0x4A, 0x32, 
+	0x38, 0x40, 0x40, 0x22, 0x7A, 
+	0x00, 0x7A, 0x0A, 0x0A, 0x72, 
+	0x7D, 0x0D, 0x19, 0x31, 0x7D, 
+	0x26, 0x29, 0x29, 0x2F, 0x28, 
+	0x26, 0x29, 0x29, 0x29, 0x26, 
+	0x30, 0x48, 0x4D, 0x40, 0x20, 
+	0x38, 0x08, 0x08, 0x08, 0x08, 
+	0x08, 0x08, 0x08, 0x08, 0x38, 
+	0x2F, 0x10, 0xC8, 0xAC, 0xBA, 
+	0x2F, 0x10, 0x28, 0x34, 0xFA, 
+	0x00, 0x00, 0x7B, 0x00, 0x00, 
+	0x08, 0x14, 0x2A, 0x14, 0x22, 
+	0x22, 0x14, 0x2A, 0x14, 0x08, 
+	0xAA, 0x00, 0x55, 0x00, 0xAA, 
+	0xAA, 0x55, 0xAA, 0x55, 0xAA, 
+	0x00, 0x00, 0x00, 0xFF, 0x00, 
+	0x10, 0x10, 0x10, 0xFF, 0x00, 
+	0x14, 0x14, 0x14, 0xFF, 0x00, 
+	0x10, 0x10, 0xFF, 0x00, 0xFF, 
+	0x10, 0x10, 0xF0, 0x10, 0xF0, 
+	0x14, 0x14, 0x14, 0xFC, 0x00, 
+	0x14, 0x14, 0xF7, 0x00, 0xFF, 
+	0x00, 0x00, 0xFF, 0x00, 0xFF, 
+	0x14, 0x14, 0xF4, 0x04, 0xFC, 
+	0x14, 0x14, 0x17, 0x10, 0x1F, 
+	0x10, 0x10, 0x1F, 0x10, 0x1F, 
+	0x14, 0x14, 0x14, 0x1F, 0x00, 
+	0x10, 0x10, 0x10, 0xF0, 0x00, 
+	0x00, 0x00, 0x00, 0x1F, 0x10, 
+	0x10, 0x10, 0x10, 0x1F, 0x10, 
+	0x10, 0x10, 0x10, 0xF0, 0x10, 
+	0x00, 0x00, 0x00, 0xFF, 0x10, 
+	0x10, 0x10, 0x10, 0x10, 0x10, 
+	0x10, 0x10, 0x10, 0xFF, 0x10, 
+	0x00, 0x00, 0x00, 0xFF, 0x14, 
+	0x00, 0x00, 0xFF, 0x00, 0xFF, 
+	0x00, 0x00, 0x1F, 0x10, 0x17, 
+	0x00, 0x00, 0xFC, 0x04, 0xF4, 
+	0x14, 0x14, 0x17, 0x10, 0x17, 
+	0x14, 0x14, 0xF4, 0x04, 0xF4, 
+	0x00, 0x00, 0xFF, 0x00, 0xF7, 
+	0x14, 0x14, 0x14, 0x14, 0x14, 
+	0x14, 0x14, 0xF7, 0x00, 0xF7, 
+	0x14, 0x14, 0x14, 0x17, 0x14, 
+	0x10, 0x10, 0x1F, 0x10, 0x1F, 
+	0x14, 0x14, 0x14, 0xF4, 0x14, 
+	0x10, 0x10, 0xF0, 0x10, 0xF0, 
+	0x00, 0x00, 0x1F, 0x10, 0x1F, 
+	0x00, 0x00, 0x00, 0x1F, 0x14, 
+	0x00, 0x00, 0x00, 0xFC, 0x14, 
+	0x00, 0x00, 0xF0, 0x10, 0xF0, 
+	0x10, 0x10, 0xFF, 0x10, 0xFF, 
+	0x14, 0x14, 0x14, 0xFF, 0x14, 
+	0x10, 0x10, 0x10, 0x1F, 0x00, 
+	0x00, 0x00, 0x00, 0xF0, 0x10, 
+	0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 
+	0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 
+	0xFF, 0xFF, 0xFF, 0x00, 0x00, 
+	0x00, 0x00, 0x00, 0xFF, 0xFF, 
+	0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 
+	0x38, 0x44, 0x44, 0x38, 0x44, 
+	0x7C, 0x2A, 0x2A, 0x3E, 0x14, 
+	0x7E, 0x02, 0x02, 0x06, 0x06, 
+	0x02, 0x7E, 0x02, 0x7E, 0x02, 
+	0x63, 0x55, 0x49, 0x41, 0x63, 
+	0x38, 0x44, 0x44, 0x3C, 0x04, 
+	0x40, 0x7E, 0x20, 0x1E, 0x20, 
+	0x06, 0x02, 0x7E, 0x02, 0x02, 
+	0x99, 0xA5, 0xE7, 0xA5, 0x99, 
+	0x1C, 0x2A, 0x49, 0x2A, 0x1C, 
+	0x4C, 0x72, 0x01, 0x72, 0x4C, 
+	0x30, 0x4A, 0x4D, 0x4D, 0x30, 
+	0x30, 0x48, 0x78, 0x48, 0x30, 
+	0xBC, 0x62, 0x5A, 0x46, 0x3D, 
+	0x3E, 0x49, 0x49, 0x49, 0x00, 
+	0x7E, 0x01, 0x01, 0x01, 0x7E, 
+	0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 
+	0x44, 0x44, 0x5F, 0x44, 0x44, 
+	0x40, 0x51, 0x4A, 0x44, 0x40, 
+	0x40, 0x44, 0x4A, 0x51, 0x40, 
+	0x00, 0x00, 0xFF, 0x01, 0x03, 
+	0xE0, 0x80, 0xFF, 0x00, 0x00, 
+	0x08, 0x08, 0x6B, 0x6B, 0x08,
+	0x36, 0x12, 0x36, 0x24, 0x36, 
+	0x06, 0x0F, 0x09, 0x0F, 0x06, 
+	0x00, 0x00, 0x18, 0x18, 0x00, 
+	0x00, 0x00, 0x10, 0x10, 0x00, 
+	0x30, 0x40, 0xFF, 0x01, 0x01, 
+	0x00, 0x1F, 0x01, 0x01, 0x1E, 
+	0x00, 0x19, 0x1D, 0x17, 0x12, 
+	0x00, 0x3C, 0x3C, 0x3C, 0x3C, 
+	0x00, 0x00, 0x00, 0x00, 0x00, 
+};
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/TFT/src/utility/keywords.txt	(revision 136)
@@ -0,0 +1,70 @@
+#######################################
+# Syntax Coloring Map For Adafruit_GFX
+# and Adafruit_ST7735
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+Adafruit_GFX	KEYWORD1
+Adafruit_ST7735	KEYWORD1
+PImage	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+drawPixel	KEYWORD2
+invertDisplay	KEYWORD2
+drawLine	KEYWORD2
+drawFastVLine	KEYWORD2
+drawFastHLine	KEYWORD2
+drawRect	KEYWORD2
+fillRect	KEYWORD2
+fillScreen	KEYWORD2
+drawCircle	KEYWORD2
+drawCircleHelper	KEYWORD2
+fillCircle	KEYWORD2
+fillCircleHelper	KEYWORD2
+drawTriangle	KEYWORD2
+fillTriangle	KEYWORD2
+drawRoundRect	KEYWORD2
+fillRoundRect	KEYWORD2
+drawBitmap	KEYWORD2
+drawChar	KEYWORD2
+setCursor	KEYWORD2
+setTextColor	KEYWORD2
+setTextSize	KEYWORD2
+setTextWrap	KEYWORD2
+height	KEYWORD2
+width	KEYWORD2
+setRotation	KEYWORD2
+getRotation	KEYWORD2
+
+
+
+newColor	KEYWORD2
+background	KEYWORD2
+fill	KEYWORD2
+noFill	KEYWORD2
+stroke	KEYWORD2
+noStroke	KEYWORD2
+text	KEYWORD2
+textWrap	KEYWORD2
+textSize	KEYWORD2
+circle	KEYWORD2
+point	KEYWORD2
+quad	KEYWORD2
+rect	KEYWORD2
+triangle	KEYWORD2
+loadImage	KEYWORD2
+image	KEYWORD2
+
+draw	KEYWORD2
+isValid	KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/README.adoc	(revision 136)
@@ -0,0 +1,21 @@
+= Temboo Library for Arduino =
+
+This library allows an Arduino Yun to connect to the Temboo service.
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/extras/readme.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/extras/readme.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/extras/readme.txt	(revision 136)
@@ -0,0 +1,31 @@
+Temboo Library for Arduino
+
+Installation
+------------
+
+For installation instructions, please visit: 
+
+http://temboo.com/arduino/others/library-installation
+
+Examples, Tutorials & More
+--------------------------
+
+You can find lots of examples, tutorials and info about Device Coder (Temboo's tool for automatically generating internet-connected sketch code) at the link below:
+
+http://temboo.com/arduino/
+
+Compatibility
+-------------
+
+This library has been tested with the following Arduino boards: 
+
+* TRE
+* Y炭n
+* Due
+* Mega
+* Uno
+
+And the following internet shields: 
+
+* Arduino Wifi Shield 
+* Arduino Ethernet Shield 
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/keywords.txt	(revision 136)
@@ -0,0 +1,31 @@
+#######################################
+# Syntax Coloring Map Temboo
+#######################################
+
+#######################################
+# Class (KEYWORD3)
+#######################################
+
+Temboo	KEYWORD3
+
+#######################################
+# Datatypes (KEYWORD2)
+#######################################
+
+TembooChoreo	KEYWORD2
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+begin	KEYWORD2
+setAccountName	KEYWORD2
+setAppKeyName	KEYWORD2
+setAppKey	KEYWORD2
+setChoreo	KEYWORD2
+setCredential	KEYWORD2
+setSavedInputs	KEYWORD2
+addInput	KEYWORD2
+addOutputFilter	KEYWORD2
+setSettingsFileToWrite	KEYWORD2
+setSettingsFileToRead	KEYWORD2
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/library.properties	(revision 136)
@@ -0,0 +1,10 @@
+name=Temboo
+author=Temboo
+maintainer=Temboo <support@temboo.com>
+sentence=This library enables calls to Temboo, a platform that connects Arduino boards to 100+ APIs, databases, code utilities and more. 
+paragraph=Use this library to connect your Arduino board to Temboo, making it simple to interact with a vast array of web-based resources and services.
+category=Communication
+url=http://www.temboo.com/arduino
+architectures=*
+version=1.1
+core-dependencies=arduino (>=1.5.0)
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/Temboo.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/Temboo.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/Temboo.cpp	(revision 136)
@@ -0,0 +1,395 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+
+#if defined (ARDUINO_AVR_YUN) || defined (ARDUINO_AVR_TRE)
+
+///////////////////////////////////////////////////////
+//  BEGIN ARDUINO YUN AND TRE SUPPORT
+///////////////////////////////////////////////////////
+
+#include <Temboo.h>
+
+void TembooChoreo::begin() {
+    Process::begin("temboo");
+}
+
+void TembooChoreo::setAccountName(const String& accountName) {
+    addParameter("-a" + accountName);
+}
+
+void TembooChoreo::setAppKeyName(const String& appKeyName) {
+    addParameter("-u" + appKeyName);
+}
+
+void TembooChoreo::setAppKey(const String& appKey) {
+    addParameter("-p" + appKey);
+}
+
+void TembooChoreo::setChoreo(const String& choreo) {
+    addParameter("-c" + choreo);
+}
+
+void TembooChoreo::setCredential(const String& credentialName) {
+    addParameter("-e" + credentialName);
+}
+
+void TembooChoreo::setSavedInputs(const String& savedInputsName) {
+    addParameter("-e" + savedInputsName);
+}
+
+void TembooChoreo::setProfile(const String& profileName) {
+    addParameter("-e" + profileName);
+}
+
+void TembooChoreo::addInput(const String& inputName, const String& inputValue) {
+    addParameter("-i" + inputName + ":" + inputValue);
+}
+
+void TembooChoreo::addOutputFilter(const String& outputName, const String& filterPath, const String& variableName) {
+    addParameter("-o" + outputName + ":" + filterPath + ":" + variableName);
+}
+
+void TembooChoreo::setSettingsFileToWrite(const String& filePath) {
+    addParameter("-w" + filePath);
+}
+
+void TembooChoreo::setSettingsFileToRead(const String& filePath) {
+    addParameter("-r" + filePath);
+}
+
+
+#else //ARDUINO_AVR_YUN
+
+///////////////////////////////////////////////////////
+//  BEGIN ARDUINO NON-YUN SUPPORT
+///////////////////////////////////////////////////////
+
+#include <string.h>
+#include <Client.h>
+#include <avr/pgmspace.h>
+#include <Temboo.h>
+#include "utility/TembooGlobal.h"
+#include "utility/TembooSession.h"
+
+static const char HTTP_CODE[] PROGMEM = "HTTP_CODE\x0A\x1F";
+
+TembooChoreo::TembooChoreo(Client& client) : m_client(client) {
+    m_accountName = NULL;
+    m_appKeyName = NULL;
+    m_appKeyValue = NULL;
+    m_path = NULL;
+    m_nextChar = NULL;
+    m_nextState = END;
+}
+
+void TembooChoreo::setAccountName(const String& accountName) {
+    m_accountName = accountName.c_str();
+}
+
+
+void TembooChoreo::setAccountName(const char* accountName) {
+    m_accountName = accountName;
+}
+
+
+void TembooChoreo::setAppKeyName(const String& appKeyName) {
+    m_appKeyName = appKeyName.c_str();
+}
+
+
+void TembooChoreo::setAppKeyName(const char* appKeyName) {
+    m_appKeyName = appKeyName;
+}
+
+
+void TembooChoreo::setAppKey(const String& appKeyValue) {
+    m_appKeyValue = appKeyValue.c_str();
+}
+
+
+void TembooChoreo::setAppKey(const char* appKeyValue) {
+    m_appKeyValue = appKeyValue;
+}
+
+
+void TembooChoreo::setChoreo(const String& path) {
+    m_path = path.c_str();
+}
+
+
+void TembooChoreo::setChoreo(const char* path) {
+    m_path = path;
+}
+
+
+void TembooChoreo::setSavedInputs(const String& savedInputsName) {
+    m_preset.put(savedInputsName.c_str());
+}
+
+
+void TembooChoreo::setSavedInputs(const char* savedInputsName) {
+    m_preset.put(savedInputsName);
+}
+
+
+void TembooChoreo::setCredential(const String& credentialName) {
+    m_preset.put(credentialName.c_str());
+}
+
+
+void TembooChoreo::setCredential(const char* credentialName) {
+    m_preset.put(credentialName);
+}
+
+void TembooChoreo::setProfile(const String& profileName) {
+    m_preset.put(profileName.c_str());
+}
+
+
+void TembooChoreo::setProfile(const char* profileName) {
+    m_preset.put(profileName);
+}
+
+
+
+void TembooChoreo::addInput(const String& inputName, const String& inputValue) {
+    m_inputs.put(inputName.c_str(), inputValue.c_str());
+}
+
+
+void TembooChoreo::addInput(const char* inputName, const char* inputValue) {
+    m_inputs.put(inputName, inputValue);
+}
+
+
+void TembooChoreo::addInput(const char* inputName, const String& inputValue) {
+    m_inputs.put(inputName, inputValue.c_str());
+}
+
+
+void TembooChoreo::addInput(const String& inputName, const char* inputValue) {
+    m_inputs.put(inputName.c_str(), inputValue);
+}
+
+
+void TembooChoreo::addOutputFilter(const char* outputName, const char* filterPath, const char* variableName) {
+    m_outputs.put(outputName, filterPath, variableName);
+}
+
+
+void TembooChoreo::addOutputFilter(const String& outputName, const char* filterPath, const char* variableName) {
+    m_outputs.put(outputName.c_str(), filterPath, variableName);
+}
+
+
+void TembooChoreo::addOutputFilter(const char* outputName, const String& filterPath, const char* variableName) {
+    m_outputs.put(outputName, filterPath.c_str(), variableName);
+}
+
+
+void TembooChoreo::addOutputFilter(const String& outputName, const String& filterPath, const char* variableName) {
+    m_outputs.put(outputName.c_str(), filterPath.c_str(), variableName);
+}
+
+
+void TembooChoreo::addOutputFilter(const char* outputName, const char* filterPath, const String& variableName) {
+    m_outputs.put(outputName, filterPath, variableName.c_str());
+}
+
+
+void TembooChoreo::addOutputFilter(const String& outputName, const char* filterPath, const String& variableName) {
+    m_outputs.put(outputName.c_str(), filterPath, variableName.c_str());
+}
+
+
+void TembooChoreo::addOutputFilter(const char* outputName, const String& filterPath, const String& variableName) {
+    m_outputs.put(outputName, filterPath.c_str(), variableName.c_str());
+}
+
+
+void TembooChoreo::addOutputFilter(const String& outputName, const String& filterPath, const String& variableName) {
+    m_outputs.put(outputName.c_str(), filterPath.c_str(), variableName.c_str());
+}
+
+
+int TembooChoreo::run() {
+    return run(INADDR_NONE, 80);
+}
+
+
+int TembooChoreo::run(IPAddress addr, uint16_t port) {
+
+    m_nextChar = NULL;
+
+    if (m_accountName == NULL || *m_accountName == '\0') {
+        return TEMBOO_ERROR_ACCOUNT_MISSING;
+    }
+
+    if (m_path == NULL || *m_path == '\0') {
+        return TEMBOO_ERROR_CHOREO_MISSING;
+    }
+
+    if (m_appKeyName == NULL || *m_appKeyName == '\0') {
+        return TEMBOO_ERROR_APPKEY_NAME_MISSING;
+    }
+
+    if (m_appKeyValue == NULL || *m_appKeyValue == '\0') {
+        return TEMBOO_ERROR_APPKEY_MISSING;
+    }
+
+
+    TembooSession session(m_client, addr, port);
+    uint16_t httpCode = 0;
+    
+    for (int i = 0; i < 2; i++) {
+        if (0 != session.executeChoreo(m_accountName, m_appKeyName, m_appKeyValue, m_path, m_inputs, m_outputs, m_preset)) {
+            httpCode = 0;
+            break;
+        }
+
+        while(!m_client.available()) {
+            if (!m_client.connected()) {
+                TEMBOO_TRACELN("Disconnected");
+                return TEMBOO_ERROR_HTTP_ERROR;
+            }
+            delay(10);
+        }
+
+        if (!m_client.find("HTTP/1.1 ")) {
+            TEMBOO_TRACELN("No HTTP");
+            return TEMBOO_ERROR_HTTP_ERROR;
+        }
+
+        httpCode = (uint16_t)m_client.parseInt();
+
+        // We expect HTTP response codes to be <= 599, but 
+        // we need to be prepared for anything.
+        if (httpCode >= 600) {
+            TEMBOO_TRACELN("Invalid HTTP");
+            httpCode = 0;
+        }
+
+        // if we get an auth error AND there was an x-temboo-time header,
+        // update the session timeOffset
+        if ((httpCode == 401) && (i == 0)) {
+            if (m_client.find("x-temboo-time:")) {
+                TembooSession::setTime((unsigned long)m_client.parseInt());
+                while(m_client.available()) {
+                    m_client.read();
+                }
+                m_client.stop();
+            }
+        } else {
+            break;
+        }
+    }
+
+    uint16toa(httpCode, m_httpCodeStr);
+    strcat_P(m_httpCodeStr, PSTR("\x0A\x1E"));
+    m_nextState = START;
+    m_nextChar = HTTP_CODE;
+
+    if (httpCode < 200 || httpCode >= 300) {
+        return TEMBOO_ERROR_HTTP_ERROR;
+    }
+
+    if (!m_client.find("\x0D\x0A\x0D\x0A")) {
+        return TEMBOO_ERROR_HTTP_ERROR;
+    }
+
+    return TEMBOO_ERROR_OK;
+}
+
+void TembooChoreo::close() {
+    m_client.stop();
+}
+
+int TembooChoreo::available() {
+    // If we're still sending the HTTP response code,
+    // report at least one character available.
+    if (m_nextChar != NULL) {
+        return m_client.available() + 1;
+    }
+
+    // Otherwise, return however many characters the client has.
+    return m_client.available();
+}
+
+
+int TembooChoreo::peek() {
+    // If we're still sending the HTTP response code,
+    // return the next character in that sequence.
+    if (m_nextChar != NULL) {
+        return (int)*m_nextChar;
+    }
+
+    // Otherwise, return whatever is in the client buffer.
+    return m_client.peek();
+}
+
+
+int TembooChoreo::read() {
+
+    int c = 0;
+    switch(m_nextState) {
+        case START:
+            m_nextChar = HTTP_CODE;
+            c = (int)pgm_read_byte(m_nextChar++);
+            m_nextState = HTTP_CODE_TAG;
+            break;
+
+        case HTTP_CODE_TAG:
+            c = (int)pgm_read_byte(m_nextChar++);
+            if (pgm_read_byte(m_nextChar) == '\0') {
+                m_nextState = HTTP_CODE_VALUE;
+                m_nextChar = m_httpCodeStr;
+            }
+            break;
+
+        case HTTP_CODE_VALUE:
+            c = (int)(*m_nextChar++);
+            if (*m_nextChar == '\0') {
+                m_nextState = END;
+                m_nextChar = NULL;
+            }
+            break;
+
+        default:
+            c = m_client.read();
+    }
+    return c;
+}
+
+
+size_t TembooChoreo::write(uint8_t data) {
+    return m_client.write(data);
+}
+
+
+void TembooChoreo::flush() {
+    m_nextChar = NULL;
+    m_nextState = END;
+    m_client.flush();
+}
+
+#endif //ARDUINO_AVR_YUN
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/Temboo.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/Temboo.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/Temboo.h	(revision 136)
@@ -0,0 +1,171 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef TEMBOO_H_
+#define TEMBOO_H_
+
+#include <Arduino.h>
+
+#if defined (ARDUINO_AVR_YUN) || defined (ARDUINO_AVR_TRE)
+///////////////////////////////////////////////////////
+//  BEGIN ARDUINO YUN AND TRE SUPPORT
+///////////////////////////////////////////////////////
+
+#include <Process.h>
+
+class TembooChoreo : public Process {
+
+    public:
+        void begin();
+        void setAccountName(const String& accountName);
+        void setAppKeyName(const String& appKeyName);
+        void setAppKey(const String& appKey);
+        void setChoreo(const String& choreo);
+        void setCredential(const String& credentialName);
+        void setSavedInputs(const String& saveInputsName);
+        void setProfile(const String& profileName);
+        void addInput(const String& inputName, const String& inputValue);
+        void addOutputFilter(const String& filterName, const String& filterPath, const String& variableName);
+        void setSettingsFileToWrite(const String& filePath);
+        void setSettingsFileToRead(const String& filePath);
+
+};
+
+#else //ARDUINO_AVR_YUN
+
+///////////////////////////////////////////////////////
+//  BEGIN ARDUINO NON-YUN SUPPORT
+///////////////////////////////////////////////////////
+
+#include <Stream.h>
+#include <Client.h>
+#include <IPAddress.h>
+#include "utility/ChoreoInputSet.h"
+#include "utility/ChoreoOutputSet.h"
+#include "utility/ChoreoPreset.h"
+
+#define TEMBOO_ERROR_OK                   (0)
+#define TEMBOO_ERROR_ACCOUNT_MISSING      (201)
+#define TEMBOO_ERROR_CHOREO_MISSING       (203)
+#define TEMBOO_ERROR_APPKEY_NAME_MISSING  (205)
+#define TEMBOO_ERROR_APPKEY_MISSING       (207)
+#define TEMBOO_ERROR_HTTP_ERROR           (223)
+
+class TembooChoreo : public Stream {
+    public:
+        
+        // Constructor.
+        // client - an instance of an Arduino Client, usually an EthernetClient
+        //          or a WiFiClient.  Used to communicate with Temboo.
+        TembooChoreo(Client& client);
+
+        // Does nothing. Just for source compatibility with Yun code.
+        void begin() {}; 
+        
+        // Sets the account name to use when communicating with Temboo.
+        // (required)
+        void setAccountName(const String& accountName);
+        void setAccountName(const char* accountName);
+
+        // Sets the application key name to use with choreo execution requests.
+        // (required)
+        void setAppKeyName(const String& appKeyName);
+        void setAppKeyName(const char* appKeyName);
+        
+        // Sets the application key value to use with choreo execution requests
+        // (required)
+        void setAppKey(const String& appKey);
+        void setAppKey(const char* appKey);
+        
+        // sets the name of the choreo to be executed.
+        // (required)
+        void setChoreo(const String& choreoPath);
+        void setChoreo(const char* choreoPath);
+        
+        // sets the name of the saved inputs to use when executing the choreo
+        // (optional)
+        void setSavedInputs(const String& savedInputsName);
+        void setSavedInputs(const char* savedInputsName);
+
+        void setCredential(const String& credentialName);
+        void setCredential(const char* credentialName);
+
+        void setProfile(const String& profileName);
+        void setProfile(const char* profileName);
+
+        // sets an input to be used when executing a choreo.
+        // (optional or required, depending on the choreo being executed.)
+        void addInput(const String& inputName, const String& inputValue);
+        void addInput(const char* inputName, const char* inputValue);
+        void addInput(const char* inputName, const String& inputValue);
+        void addInput(const String& inputName, const char* inputValue);
+        
+        // sets an output filter to be used to process the choreo output
+        // (optional)
+        void addOutputFilter(const char* filterName, const char* filterPath, const char* variableName);
+        void addOutputFilter(const String& filterName, const char* filterPath, const char* variableName);
+        void addOutputFilter(const char* filterName, const String& filterPath, const char* variableName);
+        void addOutputFilter(const String& filterName, const String& filterPath, const char* variableName);
+        void addOutputFilter(const char* filterName, const char* filterPath, const String& variableName);
+        void addOutputFilter(const String& filterName, const char* filterPath, const String& variableName);
+        void addOutputFilter(const char* filterName, const String& filterPath, const String& variableName);
+        void addOutputFilter(const String& filterName, const String& filterPath, const String& variableName);
+       
+        // run the choreo using the current input info
+        int run();
+
+        // run the choreo on the Temboo server at the given IP address and port
+        // (used only when instructed by Temboo customer support.)
+        int run(IPAddress addr, uint16_t port);
+
+        void close();
+
+        // Stream interface - see the Arduino library documentation.
+        int available();
+        int read();
+        int peek();
+        void flush();
+
+        //Print interface - see the Arduino library documentation
+        size_t write(uint8_t data);
+
+
+    protected:
+        ChoreoInputSet m_inputs;
+        ChoreoOutputSet m_outputs;
+        ChoreoPreset m_preset;
+
+        const char* m_accountName;
+        const char* m_appKeyValue;
+        const char* m_appKeyName;
+        const char* m_path;
+        Client& m_client;
+        char m_httpCodeStr[6];
+        const char* m_nextChar;
+        enum State {START, HTTP_CODE_TAG, HTTP_CODE_VALUE, END};
+        State m_nextState;
+
+};
+
+#endif //ARDUINO_AVR_YUN
+
+#endif //TEMBOO_H_
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/BaseFormatter.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/BaseFormatter.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/BaseFormatter.cpp	(revision 136)
@@ -0,0 +1,96 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include "BaseFormatter.h"
+
+char BaseFormatter::escape(char c) {
+    char outChar = c;
+    switch(c) {
+        case '\\':
+        case '"':
+            outChar = '\\';
+            m_escapedChar = c;
+            break;
+        case '\b':
+            outChar = '\\';
+            m_escapedChar = 'b';
+            break;
+        case '\f':
+            outChar = '\\';
+            m_escapedChar = 'f';
+            break;
+        case '\n':
+            outChar = '\\';
+            m_escapedChar = 'n';
+            break;
+        case '\r':
+            outChar = '\\';
+            m_escapedChar = 'r';
+            break;
+        case '\t':
+            outChar = '\\';
+            m_escapedChar = 't';
+            break;
+        default:
+            m_escapedChar = '\0';
+    }
+    return outChar;
+}
+
+char BaseFormatter::finishEscape() {
+    char c = m_escapedChar;
+    m_escapedChar = '\0';
+    return c;
+}
+
+char BaseFormatter::readTagChar(int nextState) {
+    char c = pgm_read_byte(m_nextChar++);
+    if (pgm_read_byte(m_nextChar) == '\0') {
+        m_nextState = nextState;
+    }
+    return c;
+}
+
+char BaseFormatter::readValueChar(int nextState) {
+    char c;
+    if (isEscaping()) {
+        c = finishEscape();
+        if (*m_nextChar == '\0') {
+            m_nextState = nextState;
+        }
+    } else {
+        c = escape(*m_nextChar++);
+        if (!isEscaping()) {
+            if(*m_nextChar == '\0') {
+                m_nextState = nextState;
+            }
+        }
+    }
+    return c;
+}
+
+char BaseFormatter::readStartTagChar(const char* tag, int nextState) {
+    m_nextChar = tag;
+    char c = pgm_read_byte(m_nextChar++);
+    m_nextState = nextState;
+    return c;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/BaseFormatter.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/BaseFormatter.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/BaseFormatter.h	(revision 136)
@@ -0,0 +1,46 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef BASEFORMATTER_H_
+#define BASEFORMATTER_H_
+#include "TembooGlobal.h"
+
+class BaseFormatter {
+    public:
+        BaseFormatter() {m_escapedChar = '\0';}
+
+    protected:
+        const char* m_nextChar;
+        int m_nextState;
+        char m_escapedChar;
+
+        char escape(char c);
+        bool isEscaping() {return m_escapedChar != '\0';}
+        char finishEscape();
+
+        char readTagChar(int nextState);
+        char readValueChar(int nextState);
+        char readStartTagChar(const char* tag, int nextState);
+
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInput.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInput.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInput.cpp	(revision 136)
@@ -0,0 +1,34 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include <stddef.h>
+#include "ChoreoInput.h"
+
+ChoreoInput::ChoreoInput(ChoreoInput* prev, const char* name, const char* value) {
+    if (prev != NULL) {
+        prev->m_next = this;
+    } 
+    m_next = NULL;
+    m_name = name;
+    m_value = value;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInput.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInput.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInput.h	(revision 136)
@@ -0,0 +1,41 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef CHOREOINPUT_H_
+#define CHOREOINPUT_H_
+#include "TembooGlobal.h"
+class ChoreoInput {
+    public:
+        ChoreoInput(ChoreoInput* prev, const char* name, const char* value);
+        const char* getName() const      {return m_name;}
+        const char* getValue() const     {return m_value;}
+        void setValue(const char* value) {m_value = value;}
+        ChoreoInput* getNext() const     {return m_next;}
+
+    private:
+        ChoreoInput* m_next;
+        const char*  m_name;
+        const char*  m_value;
+};
+
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputFormatter.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputFormatter.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputFormatter.cpp	(revision 136)
@@ -0,0 +1,125 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include <stddef.h>
+#include <avr/pgmspace.h>
+#include "ChoreoInputFormatter.h"
+#include "ChoreoInputSet.h"
+
+static const char TAG_INPUTS_START[] PROGMEM = "\"inputs\":{";
+
+ChoreoInputFormatter::ChoreoInputFormatter(const ChoreoInputSet* inputSet) {
+    m_inputSet = inputSet;
+    reset();
+}
+
+void ChoreoInputFormatter::reset() {
+    m_currentInput = NULL;
+    m_nextChar = NULL;
+    if (m_inputSet == NULL || m_inputSet->isEmpty()) {
+        m_nextState = END;
+    } else {
+        m_nextState = START;
+    }
+}
+
+bool ChoreoInputFormatter::hasNext() {
+    return m_nextState != END;
+}
+
+char ChoreoInputFormatter::next() {
+    char c;
+    switch(m_nextState) {
+        case START:
+            c = readStartTagChar(TAG_INPUTS_START, INPUTS_TAG);
+            break;
+        
+        case INPUTS_TAG:
+            c = readTagChar(NAME_START);
+            if (m_nextState == NAME_START) {
+                m_currentInput= m_inputSet->getFirstInput();
+            }
+            break;
+        
+        case NAME_START: 
+            c = '"';
+            m_nextChar = m_currentInput->getName();
+            if ((NULL == m_nextChar) || ('\0' == *m_nextChar)) {
+                m_nextState = NAME_END;
+            } else {
+                m_nextState = NAME;
+            }
+            break;
+
+        case NAME:
+            c = readValueChar(NAME_END);
+            break;
+
+        case NAME_END: 
+            c = '"';
+            m_nextState = NAME_VALUE_SEPARATOR;
+            break;
+
+        case NAME_VALUE_SEPARATOR:
+            c = ':';
+            m_nextState = VALUE_START;
+            break;
+
+        case VALUE_START: 
+            c = '"';
+            m_nextChar = m_currentInput->getValue();
+            if ((NULL == m_nextChar) || ('\0' == *m_nextChar)) {
+                m_nextState = VALUE_END;
+            } else {
+                m_nextState = VALUE;
+            }
+            break;
+
+        case VALUE:
+            c = readValueChar(VALUE_END);
+            break;
+
+        case VALUE_END: 
+            c = '"';
+            m_currentInput = m_currentInput->getNext();
+            if (m_currentInput != NULL) {
+                m_nextState = NEXT_INPUT;
+            } else {
+                m_nextState = INPUTS_END;
+            }
+            break;
+        case NEXT_INPUT:
+            c = ',';
+            m_nextChar = m_currentInput->getName();
+            m_nextState = NAME_START;
+            break;
+
+        case INPUTS_END:
+            c = '}';
+            m_nextState = END;
+            break;
+        case END: 
+        default:
+            c = '\0';
+    }
+    return c;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputFormatter.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputFormatter.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputFormatter.h	(revision 136)
@@ -0,0 +1,58 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef CHOREOINPUTFORMATTER_H_
+#define CHOREOINPUTFORMATTER_H_
+#include "TembooGlobal.h"
+#include "BaseFormatter.h"
+#include "ChoreoInputSet.h"
+
+class ChoreoInputFormatter : public BaseFormatter {
+
+    public:
+        ChoreoInputFormatter(const ChoreoInputSet* inputSet);
+        bool hasNext();
+        char next();
+        void reset();
+
+    protected:
+        const ChoreoInputSet* m_inputSet;
+        const ChoreoInput* m_currentInput;
+        
+        
+        enum State {
+            START,
+            INPUTS_TAG,
+            NAME_START,
+            NAME,
+            NAME_END,
+            NAME_VALUE_SEPARATOR,
+            VALUE_START,
+            VALUE,
+            VALUE_END,
+            NEXT_INPUT,
+            INPUTS_END,
+            END
+        };
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputSet.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputSet.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputSet.cpp	(revision 136)
@@ -0,0 +1,80 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include <string.h>
+#include "ChoreoInputSet.h"
+
+ChoreoInputSet::ChoreoInputSet() {
+    m_first = NULL;
+}
+
+ChoreoInputSet::~ChoreoInputSet() {
+    ChoreoInput* i = m_first;
+    ChoreoInput* next = NULL;
+    while (i != NULL) {
+        next = i->getNext();
+        delete i;
+        i = next;
+    }
+}
+
+void ChoreoInputSet::put(const char* name, const char* value) {
+
+    // Haven't set ANY inputs yet?  
+    // Just create a new one.
+    if (m_first == NULL) {
+        m_first = new ChoreoInput(NULL, name, value);
+    } else {
+        // Some inputs already set.
+        // See if we already have this input.
+        ChoreoInput* last = NULL;
+        ChoreoInput* i = m_first;
+        while(i != NULL) {
+            if (strcmp(i->getName(), name) == 0) {
+                // We already have an input with this name.
+                // Just update the value.
+                i->setValue(value);
+                break;
+            }
+            last = i;
+            i = i->getNext();
+        }
+
+        // We don't have an input with this name
+        // So we need to create a new one.
+        if (i == NULL) {
+            new ChoreoInput(last, name, value);
+        }
+    }
+}
+
+const char* ChoreoInputSet::get(const char* name) const {
+    ChoreoInput* i = m_first;
+    while(i != NULL) {
+        if (strcmp(i->getName(), name) == 0) {
+            return i->getValue();
+        }
+        i = i->getNext();
+    }
+    return NULL;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputSet.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputSet.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoInputSet.h	(revision 136)
@@ -0,0 +1,43 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef CHOREOINPUTSET_H_
+#define CHOREOINPUTSET_H_
+#include <stddef.h>
+#include "TembooGlobal.h"
+#include "ChoreoInput.h"
+
+class ChoreoInputSet {
+
+    public:
+        ChoreoInputSet();
+        ~ChoreoInputSet();
+        void put(const char* name, const char* value);
+        const char* get(const char* name) const;
+        bool isEmpty() const                     {return m_first == NULL;}
+        const ChoreoInput* getFirstInput() const {return m_first;}
+
+    protected:
+        ChoreoInput* m_first;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutput.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutput.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutput.cpp	(revision 136)
@@ -0,0 +1,37 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include <stddef.h>
+#include "ChoreoOutput.h"
+
+
+ChoreoOutput::ChoreoOutput(ChoreoOutput* prev, const char* name, const char* path, const char* var) {
+    if (prev != NULL) {
+        prev->m_next = this;
+    }
+    m_next = NULL;
+    m_name = name;
+    m_path = path;
+    m_var = var;
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutput.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutput.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutput.h	(revision 136)
@@ -0,0 +1,44 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef CHOREOOUTPUT_H_
+#define CHOREOOUTPUT_H_
+#include "TembooGlobal.h"
+
+class ChoreoOutput {
+    public:
+        ChoreoOutput(ChoreoOutput* prev, const char* name, const char* path, const char* var);
+        const char* getName() const            {return m_name;}
+        const char* getPath() const            {return m_path;}
+        const char* getVariable() const        {return m_var;}
+        void setPath(const char* path)         {m_path = path;}
+        void setVariable(const char* variable) {m_var = variable;}
+        ChoreoOutput* getNext() const          {return m_next;}
+
+    private:
+        ChoreoOutput* m_next;
+        const char*  m_name;
+        const char*  m_path;
+        const char*  m_var;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputFormatter.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputFormatter.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputFormatter.cpp	(revision 136)
@@ -0,0 +1,181 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include <stddef.h>
+#include <avr/pgmspace.h>
+#include "ChoreoOutputFormatter.h"
+#include "ChoreoOutputSet.h"
+
+static const char TAG_OUTPUTS_START[] PROGMEM = "\"outputs\":[";
+static const char TAG_NAME[]          PROGMEM = "\"name\":";
+static const char TAG_PATH[]          PROGMEM = "\"path\":";
+static const char TAG_VAR[]           PROGMEM = "\"variable\":";
+
+
+ChoreoOutputFormatter::ChoreoOutputFormatter(const ChoreoOutputSet* outputSet) {
+    m_outputSet = outputSet;
+    reset();
+}
+
+void ChoreoOutputFormatter::reset() {
+    m_currentOutput = NULL;
+    m_nextChar = NULL;
+    if (m_outputSet == NULL || m_outputSet->isEmpty()) {
+        m_nextState = END;
+    } else {
+        m_nextState = START;
+    }
+}
+
+bool ChoreoOutputFormatter::hasNext() {
+    return m_nextState != END;
+}
+
+char ChoreoOutputFormatter::next() {
+    char c = '\0';
+    switch(m_nextState) {
+        case START:
+            c = readStartTagChar(TAG_OUTPUTS_START, OUTPUTS_TAG);
+            break;
+
+        case OUTPUTS_TAG:
+            c = readTagChar(OUTPUT_START);
+            if (m_nextState == OUTPUT_START) {
+                m_currentOutput = m_outputSet->getFirstOutput();
+            }
+            break;
+
+        case OUTPUT_START:
+            c = '{';
+            m_nextChar = TAG_NAME;
+            m_nextState = NAME_TAG;
+            break;
+
+        case NAME_TAG:
+            c = readTagChar(NAME_START);
+            break;
+
+        case NAME_START:
+            c = '"';
+            m_nextChar = m_currentOutput->getName();
+            if ((NULL == m_nextChar) || ('\0' == *m_nextChar)) {
+                m_nextState = NAME_END;
+            } else {
+                m_nextState = NAME;
+            }
+            break;
+
+        case NAME:
+            c = readValueChar(NAME_END);
+            break;
+
+        case NAME_END:
+            c = '"';
+            m_nextState = NAME_PATH_SEPARATOR;
+            break;
+
+        case NAME_PATH_SEPARATOR:
+            c = ',';
+            m_nextState = PATH_TAG;
+            m_nextChar = TAG_PATH;
+            break;
+
+        case PATH_TAG:
+            c = readTagChar(PATH_START);
+            break;
+
+        case PATH_START:
+            c = '"';
+            m_nextChar = m_currentOutput->getPath();
+            if ((NULL == m_nextChar) || ('\0' == *m_nextChar)) {
+                m_nextState = PATH_END;
+            } else {
+                m_nextState = PATH;
+            }
+            break;
+
+        case PATH:
+            c = readValueChar(PATH_END);
+            break;
+
+        case PATH_END:
+            c = '"';
+            m_nextState = PATH_VAR_SEPARATOR;
+            break;
+
+        case PATH_VAR_SEPARATOR:
+            c = ',';
+            m_nextState = VAR_TAG;
+            m_nextChar = TAG_VAR;
+            break;
+            
+        case VAR_TAG:
+            c = readTagChar(VAR_START);
+            break;
+
+        case VAR_START:
+            c = '"';
+            m_nextChar = m_currentOutput->getVariable();
+            if ((NULL == m_nextChar) || ('\0' == *m_nextChar)) {
+                m_nextState = VAR_END;
+            } else {
+                m_nextState = VAR;
+            }
+            break;
+
+        case VAR:
+            c = readValueChar(VAR_END);
+            break;
+
+        case VAR_END:
+            c = '"';
+            m_nextState = OUTPUT_END;
+            break;
+
+        case OUTPUT_END:
+            c = '}';
+            m_currentOutput = m_currentOutput->getNext();
+            if (m_currentOutput != NULL) {
+                m_nextState = NEXT_OUTPUT;
+            } else {
+                m_nextState = OUTPUTS_END;
+            }
+            break;
+
+        case NEXT_OUTPUT:
+            c = ',';
+            m_nextChar = m_currentOutput->getName();
+            m_nextState = OUTPUT_START;
+            break;
+
+        case OUTPUTS_END:
+            c = ']';
+            m_nextState = END;
+            break;
+        case END:
+        default:
+            c = '\0';
+    }
+
+    return c;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputFormatter.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputFormatter.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputFormatter.h	(revision 136)
@@ -0,0 +1,66 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef CHOREOOUTPUTFORMATTER_H_
+#define CHOREOOUTPUTFORMATTER_H_
+#include "TembooGlobal.h"
+#include "BaseFormatter.h"
+#include "ChoreoOutputSet.h"
+
+class ChoreoOutputFormatter : public BaseFormatter {
+
+    public:
+        ChoreoOutputFormatter(const ChoreoOutputSet* outputSet);
+        bool hasNext();
+        char next();
+        void reset();
+
+    protected:
+        const ChoreoOutputSet* m_outputSet;
+        const ChoreoOutput* m_currentOutput;
+        
+        enum State {
+            START,
+            OUTPUTS_TAG,
+            OUTPUT_START,
+            NAME_TAG,
+            NAME_START,
+            NAME,
+            NAME_END,
+            NAME_PATH_SEPARATOR,
+            PATH_TAG,
+            PATH_START,
+            PATH,
+            PATH_END,
+            PATH_VAR_SEPARATOR,
+            VAR_TAG,
+            VAR_START,
+            VAR,
+            VAR_END,
+            OUTPUT_END,
+            NEXT_OUTPUT,
+            OUTPUTS_END,
+            END
+        };
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputSet.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputSet.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputSet.cpp	(revision 136)
@@ -0,0 +1,73 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include <stddef.h>
+#include <string.h>
+#include "ChoreoOutputSet.h"
+
+
+ChoreoOutputSet::ChoreoOutputSet() {
+    m_first = NULL;
+}
+
+ChoreoOutputSet::~ChoreoOutputSet() {
+    ChoreoOutput* i = m_first;
+    ChoreoOutput* next = NULL;
+    while(i != NULL) {
+        next = i->getNext();
+        delete i;
+        i = next;
+    }
+}
+
+void ChoreoOutputSet::put(const char* name, const char* path, const char* variable) {
+    if (m_first == NULL) {
+        m_first = new ChoreoOutput(NULL, name, path, variable);
+    } else {
+        ChoreoOutput* last = NULL;
+        ChoreoOutput* i = m_first;
+        while(i != NULL) {
+            if (strcmp(i->getName(), name) == 0) {
+                i->setPath(path);
+                i->setVariable(variable);
+                break;
+            }
+            last = i;
+            i = i->getNext();
+        }
+
+        if (i == NULL) {
+            new ChoreoOutput(last, name, path, variable);
+        }
+    }
+}
+
+const ChoreoOutput* ChoreoOutputSet::get(const char* name) const {
+    ChoreoOutput* i = m_first;
+    while(i != NULL) {
+        if (strcmp(i->getName(), name) == 0) {
+            return i;
+        }
+        i = i->getNext();
+    }
+    return NULL;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputSet.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputSet.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoOutputSet.h	(revision 136)
@@ -0,0 +1,43 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef CHOREOOUTPUTSET_H_
+#define CHOREOOUTPUTSET_H_
+#include <stddef.h>
+#include "TembooGlobal.h"
+#include "ChoreoOutput.h"
+
+class ChoreoOutputSet {
+
+    public:
+        ChoreoOutputSet();
+        ~ChoreoOutputSet();
+        void put(const char* name, const char* path, const char* variable);
+        const ChoreoOutput* get(const char* name) const;
+        bool isEmpty() const                       {return m_first == NULL;}
+        const ChoreoOutput* getFirstOutput() const {return m_first;}
+
+    protected:
+        ChoreoOutput* m_first;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPreset.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPreset.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPreset.cpp	(revision 136)
@@ -0,0 +1,23 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include "ChoreoPreset.h"
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPreset.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPreset.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPreset.h	(revision 136)
@@ -0,0 +1,40 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef CHOREOPRESET_H_
+#define CHOREOPRESET_H_
+#include <stddef.h>
+#include "TembooGlobal.h"
+
+class ChoreoPreset {
+    public:
+        ChoreoPreset()                      {m_name = NULL;}
+        ChoreoPreset(const char* name)      {put(name);}
+        const char* getName() const          {return m_name;}
+        void put(const char* name)           {m_name = name;}
+        bool isEmpty() const                 {return m_name == NULL || *m_name == '\0';}
+
+    private:
+        const char* m_name;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPresetFormatter.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPresetFormatter.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPresetFormatter.cpp	(revision 136)
@@ -0,0 +1,84 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include <stddef.h>
+#include <avr/pgmspace.h>
+#include "ChoreoPresetFormatter.h"
+#include "ChoreoPreset.h"
+
+static const char TAG_PRESET[] PROGMEM = "\"preset\":";
+
+ChoreoPresetFormatter::ChoreoPresetFormatter(const ChoreoPreset* preset) {
+    m_preset = preset;
+    reset();
+}
+
+void ChoreoPresetFormatter::reset() {
+    m_nextChar = NULL;
+    if (m_preset == NULL || m_preset->isEmpty()) {
+        m_nextState = END;
+    } else {
+        m_nextState = START;
+    }
+}
+
+bool ChoreoPresetFormatter::hasNext() {
+    return m_nextState != END;
+}
+
+char ChoreoPresetFormatter::next() {
+    char c = '\0';
+    switch(m_nextState) {
+        case START:
+            c = readStartTagChar(TAG_PRESET, PRESET_TAG);
+            break;
+
+        case PRESET_TAG:
+            c = readTagChar(NAME_START);
+            break;
+
+        case NAME_START:
+            c = '"';
+            m_nextChar = m_preset->getName();
+            if ((NULL == m_nextChar) || ('\0' == *m_nextChar)) {
+                m_nextState = NAME_END;
+            } else {
+                m_nextState = NAME;
+            }
+            break;
+
+        case NAME:
+            c = readValueChar(NAME_END);
+            break;
+
+        case NAME_END:
+            c = '"';
+            m_nextState = END;
+            break;
+
+        case END:
+        default:
+            c = '\0';
+    }
+    return c;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPresetFormatter.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPresetFormatter.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/ChoreoPresetFormatter.h	(revision 136)
@@ -0,0 +1,50 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef CHOREOPROFILEFORMATTER_H_
+#define CHOREOPROFILEFORMATTER_H_
+#include "TembooGlobal.h"
+#include "BaseFormatter.h"
+#include "ChoreoPreset.h"
+
+class ChoreoPresetFormatter : public BaseFormatter {
+
+    public:
+        ChoreoPresetFormatter(const ChoreoPreset* preset);
+        bool hasNext();
+        char next();
+        void reset();
+
+    protected:
+        const ChoreoPreset* m_preset;
+        
+        enum State {
+            START,
+            PRESET_TAG,
+            NAME_START,
+            NAME,
+            NAME_END,
+            END
+        };
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/DataFormatter.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/DataFormatter.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/DataFormatter.cpp	(revision 136)
@@ -0,0 +1,114 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include "DataFormatter.h"
+
+
+DataFormatter::DataFormatter(
+        const ChoreoInputSet* inputSet, 
+        const ChoreoOutputSet* outputSet, 
+        const ChoreoPreset* preset) : 
+    m_inputFormatter(inputSet), 
+    m_outputFormatter(outputSet), 
+    m_presetFormatter(preset) {
+
+    m_inputSet = inputSet;
+    m_outputSet = outputSet;
+    m_preset = preset;
+   
+    reset();
+}
+
+void DataFormatter::reset() {
+    m_nextState = DATA_START;
+    m_inputFormatter.reset();
+    m_outputFormatter.reset();
+    m_presetFormatter.reset();
+}
+
+bool DataFormatter::hasNext() {
+    return m_nextState != DATA_END;
+}
+
+char DataFormatter::next() {
+    char c;
+    switch(m_nextState) {
+        case DATA_START:
+            c = '{';
+            if (m_inputFormatter.hasNext()) {
+                m_nextState = FORMATTING_INPUTS;
+            } else if (m_outputFormatter.hasNext()) {
+                m_nextState = FORMATTING_OUTPUTS;
+            } else if (m_presetFormatter.hasNext()) {
+                m_nextState = FORMATTING_PRESET;
+            } else {
+                m_nextState = FORMATTING_EMPTY;
+            }
+            break;
+        case FORMATTING_INPUTS:
+            if (m_inputFormatter.hasNext()) {
+                c = m_inputFormatter.next();
+            } else if (m_outputFormatter.hasNext()) {
+                c = ',';
+                m_nextState = FORMATTING_OUTPUTS;
+            } else if (m_presetFormatter.hasNext()) {
+                c = ',';
+                m_nextState = FORMATTING_PRESET;
+            } else {
+                c = '}';
+                m_nextState = DATA_END;
+            }
+            break;
+        case FORMATTING_OUTPUTS:
+            if (m_outputFormatter.hasNext()) {
+                c = m_outputFormatter.next();
+            } else if (m_presetFormatter.hasNext()) {
+                c = ',';
+                m_nextState = FORMATTING_PRESET;
+            } else {
+                c = '}';
+                m_nextState = DATA_END;
+            }
+            break;
+
+        case FORMATTING_PRESET:
+            if (m_presetFormatter.hasNext()) {
+                c = m_presetFormatter.next();
+            } else {
+                c = '}';
+                m_nextState = DATA_END;
+            }
+            break;
+
+        case FORMATTING_EMPTY:
+            c = '}';
+            m_nextState = DATA_END;
+            break;
+
+        case DATA_END:
+        default:
+            c = '\0';
+            break;
+    }
+    return c;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/DataFormatter.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/DataFormatter.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/DataFormatter.h	(revision 136)
@@ -0,0 +1,63 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef DATAFORMATTER_H_
+#define DATAFORMATTER_H_
+#include "TembooGlobal.h"
+#include "ChoreoInputSet.h"
+#include "ChoreoOutputSet.h"
+#include "ChoreoPreset.h"
+#include "ChoreoInputFormatter.h"
+#include "ChoreoOutputFormatter.h"
+#include "ChoreoPresetFormatter.h"
+
+
+class DataFormatter {
+
+    public:
+        DataFormatter(const ChoreoInputSet* inputSet, const ChoreoOutputSet* outputSet, const ChoreoPreset* preset);
+        bool hasNext();
+        char next();
+        void reset();
+
+    private:
+        const ChoreoInputSet* m_inputSet;
+        const ChoreoOutputSet* m_outputSet;
+        const ChoreoPreset* m_preset;
+
+        ChoreoInputFormatter m_inputFormatter;
+        ChoreoOutputFormatter m_outputFormatter;
+        ChoreoPresetFormatter m_presetFormatter;
+    
+        enum State {
+            DATA_START,
+            FORMATTING_INPUTS,
+            FORMATTING_OUTPUTS,
+            FORMATTING_PRESET,
+            FORMATTING_EMPTY,
+            DATA_END
+        };
+
+        State m_nextState;
+
+};
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooGlobal.c
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooGlobal.c	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooGlobal.c	(revision 136)
@@ -0,0 +1,48 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include "TembooGlobal.h"
+
+char* uint16toa(uint16_t value, char* dest) {
+    return uint32toa(value, dest);
+}
+
+char* uint32toa(uint32_t value, char* dest) {
+    char* end = dest;
+    do {
+        *end++ = (value % 10) + '0';
+    } while (value /= 10);
+    *end = '\0';
+    end--;
+
+    char c;
+    char* begin = dest;
+    while(end > begin) {
+        c = *end;
+        *end = *begin;
+        *begin = c;
+        end--;
+        begin++;
+    }
+
+    return dest;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooGlobal.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooGlobal.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooGlobal.h	(revision 136)
@@ -0,0 +1,53 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef TEMBOOGLOBAL_H_
+#define TEMBOOGLOBAL_H_
+
+#include <Arduino.h>
+
+//#define TEMBOO_VERBOSE
+
+#ifdef TEMBOO_VERBOSE
+    #define TEMBOO_TRACE(x) Serial.print(x)
+    #define TEMBOO_TRACE_BYTES(x,c) Serial.write((const uint8_t*)x,c)
+    #define TEMBOO_TRACELN(x) Serial.println(x)
+#else
+    #define TEMBOO_TRACE(x)
+    #define TEMBOO_TRACE_BYTES(x,c)
+    #define TEMBOO_TRACELN(x)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+char* uint16toa(uint16_t value, char* dest);
+char* uint32toa(uint32_t value, char* dest);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooSession.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooSession.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooSession.cpp	(revision 136)
@@ -0,0 +1,266 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include <string.h>
+#include <stdlib.h>
+#include <avr/pgmspace.h>
+#include "TembooSession.h"
+#include "tmbhmac.h"
+#include "DataFormatter.h"
+
+static const char EOL[]                    PROGMEM = "\r\n";
+static const char POST[]                   PROGMEM = "POST ";
+static const char POSTAMBLE[]              PROGMEM = " HTTP/1.0"; // Prevent host from using chunked encoding in response.
+static const char HEADER_HOST[]            PROGMEM = "Host: ";
+static const char HEADER_ACCEPT[]          PROGMEM = "Accept: application/xml";
+static const char HEADER_ORG[]             PROGMEM = "x-temboo-domain: /";
+static const char HEADER_DOM[]             PROGMEM = "/master";
+static const char HEADER_CONTENT_LENGTH[]  PROGMEM = "Content-Length: ";
+static const char HEADER_TIME[]            PROGMEM = "x-temboo-time: ";
+static const char BASE_CHOREO_URI[]        PROGMEM = "/arcturus-web/api-1.0/ar";
+static const char HEADER_AUTH[]            PROGMEM = "x-temboo-authentication: ";
+static const char HEADER_CONTENT_TYPE[]    PROGMEM = "Content-Type: text/plain";
+static const char TEMBOO_DOMAIN[]          PROGMEM = ".temboolive.com";
+static const char SDK_ID[]                 PROGMEM = "?source_id=arduinoSDK1";
+
+unsigned long TembooSession::s_timeOffset = 0;
+
+TembooSession::TembooSession(Client& client, 
+        IPAddress serverAddr, 
+        uint16_t port) : m_client(client) {
+    m_addr = serverAddr;
+    m_port = port;
+    m_sendQueueDepth = 0;
+}
+
+
+void TembooSession::setTime(unsigned long currentTime) {
+    s_timeOffset = currentTime - (millis()/1000);
+}
+
+
+unsigned long TembooSession::getTime() {
+    return s_timeOffset + (millis()/1000);
+}
+
+
+
+int TembooSession::executeChoreo(
+        const char* accountName, 
+        const char* appKeyName, 
+        const char* appKeyValue, 
+        const char* path, 
+        const ChoreoInputSet& inputSet, 
+        const ChoreoOutputSet& outputSet, 
+        const ChoreoPreset& preset) {
+
+    DataFormatter fmt(&inputSet, &outputSet, &preset);
+    char auth[HMAC_HEX_SIZE_BYTES + 1];
+    char buffer[11];
+    
+    // We use the current time-of-day as salt on the app key.
+    // We keep track of time-of-day by getting the current time
+    // from the server and applying an offset (the length of time
+    // we've been running.) 
+    uint32toa((uint32_t)TembooSession::getTime(), buffer);
+
+    uint16_t contentLength = getAuth(fmt, appKeyValue, buffer, auth);
+
+    m_client.stop();
+    m_client.flush();
+
+    int connected = 0;
+    TEMBOO_TRACE("Connecting: ");
+
+    // reserve space for the "host" string sufficient to hold either the 
+    // (dotted-quad) IP address + port, or the default <account>.temboolive.com
+    // host string.
+    int hostLen = (m_addr == INADDR_NONE ? (strlen_P(TEMBOO_DOMAIN) + strlen(accountName) + 1):21);
+    char host[hostLen];
+
+    // If no explicit IP address was specified (the normal case), construct
+    // the "host" string from the account name and the temboo domain name.
+    if (m_addr == INADDR_NONE) {
+        strcpy(host, accountName);
+        strcat_P(host, TEMBOO_DOMAIN);
+        TEMBOO_TRACELN(host);
+        connected = m_client.connect(host, m_port);
+    } else {
+
+        // If an IP address was explicitly specified (presumably for testing purposes),
+        // convert it to a dotted-quad text string.
+        host[0] = '\0';
+        for(int i = 0; i < 4; i++) {
+            uint16toa(m_addr[i], &host[strlen(host)]);
+            strcat(host, ".");
+        }
+
+        // replace the last '.' with ':'
+        host[strlen(host)-1] = ':';
+        
+        // append the port number
+        uint16toa(m_port, &host[strlen(host)]);
+        
+        TEMBOO_TRACELN(host);
+        connected = m_client.connect(m_addr, m_port);
+    }
+
+    if (connected) {
+
+        TEMBOO_TRACELN("OK. req:");
+        qsendProgmem(POST);
+        qsendProgmem(BASE_CHOREO_URI);
+        qsend(path);
+        qsendProgmem(SDK_ID);
+        qsendlnProgmem(POSTAMBLE);
+        
+        // Send our custom authentication header
+        // (app-key-name:hmac)
+        qsendProgmem(HEADER_AUTH);
+        qsend(appKeyName);
+        qsend(":");
+        qsendln(auth);
+        
+        // send the standard host header
+        qsendProgmem(HEADER_HOST);
+        qsendln(host);
+        
+        // send the standard accept header
+        qsendlnProgmem(HEADER_ACCEPT);
+        
+        // send our custom account name neader
+        qsendProgmem(HEADER_ORG);
+        qsend(accountName);
+        qsendlnProgmem(HEADER_DOM);
+        
+        // send the standard content type header
+        qsendlnProgmem(HEADER_CONTENT_TYPE);
+        
+        // send our custom client time header
+        qsendProgmem(HEADER_TIME);
+        qsendln(buffer);
+        
+        // send the standard content length header
+        qsendProgmem(HEADER_CONTENT_LENGTH);
+        qsendln(uint16toa(contentLength, buffer));
+
+        qsendProgmem(EOL);
+        
+        // Format and send the body of the request
+        fmt.reset();
+        while(fmt.hasNext()) {
+            qsend(fmt.next());
+        }
+
+        qsendProgmem(EOL);
+        qflush();
+        return 0;
+    } else {
+        TEMBOO_TRACELN("FAIL");
+        return 1;
+    }
+}
+
+
+uint16_t TembooSession::getAuth(DataFormatter& fmt, const char* appKeyValue, const char* salt, char* result) const {
+
+    // We need the length of the data for other things, and
+    // this method is a convenient place to calculate it.
+    uint16_t len = 0;
+
+    HMAC hmac;
+
+    //combine the salt and the key and give it to the HMAC calculator
+    size_t keyLength = strlen(appKeyValue) + strlen(salt);
+    char key[keyLength + 1];
+    strcpy(key, salt);
+    strcat(key, appKeyValue);
+    hmac.init((uint8_t*)key, keyLength);
+
+    // process the data a block at a time.
+    uint8_t buffer[HMAC_BLOCK_SIZE_BYTES];
+    int blockCount = 0;
+    fmt.reset();
+    while(fmt.hasNext()) {
+        uint8_t c = fmt.next();
+        len++;
+        buffer[blockCount++] = c;
+        if (blockCount == HMAC_BLOCK_SIZE_BYTES) {
+            hmac.process(buffer, blockCount);
+            blockCount = 0;
+        }
+    }
+    hmac.process(buffer, blockCount);
+
+    // Finalize the HMAC calculation and store the (ASCII HEX) value in *result.
+    hmac.finishHex(result);
+
+    // Return the number of characters processed.
+    return len;
+}
+
+
+void TembooSession::qsend(const char* s) {
+    char c = *s++;
+    while(c != '\0') {
+        qsend(c);
+        c = *s++;
+    }
+}
+
+
+void TembooSession::qsendProgmem(const char* s) {
+    char c = pgm_read_byte(s++);
+    while(c != '\0') {
+        qsend(c);
+        c = pgm_read_byte(s++);
+    }
+}
+
+
+void TembooSession::qsend(char c) {
+    m_sendQueue[m_sendQueueDepth++] = c;
+    if (m_sendQueueDepth >= TEMBOO_SEND_QUEUE_SIZE) {
+        qflush();
+    }
+}
+
+
+void TembooSession::qflush() {
+    m_client.write((const uint8_t*)m_sendQueue, m_sendQueueDepth);
+    TEMBOO_TRACE_BYTES(m_sendQueue, m_sendQueueDepth);
+    m_sendQueueDepth = 0;
+}
+
+
+void TembooSession::qsendln(const char* s) {
+    qsend(s);
+    qsendProgmem(EOL);
+}
+
+
+void TembooSession::qsendlnProgmem(const char* s) {
+    qsendProgmem(s);
+    qsendProgmem(EOL);
+}
+
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooSession.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooSession.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/TembooSession.h	(revision 136)
@@ -0,0 +1,134 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef TEMBOOSESSIONCLASS_H_
+#define TEMBOOSESSIONCLASS_H_
+
+#include <stdint.h>
+#include <Arduino.h>
+#include <IPAddress.h>
+#include <Client.h>
+#include "TembooGlobal.h"
+
+#ifndef TEMBOO_SEND_QUEUE_SIZE
+
+// Some network interfaces (i.e. ethernet or WiFi shields) can only accept
+// a limited amount of data.  If you try to send more than the limit, the excess
+// is just lost.  However, sending one character at a time is very inefficient.
+// To deal with this situation, we queue up TEMBOO_SEND_QUEUE_SIZE bytes to send
+// to the network device at one time.  This is a compromise between RAM usage 
+// and performance.
+#define TEMBOO_SEND_QUEUE_SIZE (32)
+#endif
+
+class ChoreoInputSet;
+class ChoreoOutputSet;
+class ChoreoPreset;
+class DataFormatter;
+
+class TembooSession {
+    public:
+
+        //TembooSession constructor
+        //client: REQUIRED TCP/IP client object.  Usually either an EthernetClient or a WiFiClient
+        //IPAddress: OPTIONAL IP address of the server to connect to.  Usually only used for testing.
+        //port: OPTIONAL port number to use with the IPAddress. Usually only used for testing.
+        TembooSession(Client& client, IPAddress serverAddr=INADDR_NONE, uint16_t port=80);
+
+        //executeChoreo sends a choreo execution request to the Temboo system.
+        //              Does not wait for a response (that's a job for whoever owns the Client.)
+        //accountName: the name of the user's account at Temboo.
+        //appKeyName: the name of an application key in the user's account to use 
+        //            for this execution (analogous to a user name).
+        //appKeyValue: the value of the application key named in appKeyName.
+        //             Used to authenticate the user (analogous to a password)
+        //path: The full path to the choreo to be executed (relative to the root of the 
+        //      user's account.)
+        //inputSet: the set of inputs needed by the choreo.
+        //          May be an empty ChoreoInputSet.
+        //outputSet: the set of output filters to be applied to the choreo results.
+        //           May be an empty ChoreoOutputSet
+        //preset: the ChoreoPreset to be used with the choreo execution. 
+        //        May be an empty ChoreoPreset.
+        int executeChoreo(const char* accountName, 
+                const char* appKeyName, 
+                const char* appKeyValue, 
+                const char* path, 
+                const ChoreoInputSet& inputSet, 
+                const ChoreoOutputSet& outputSet, 
+                const ChoreoPreset& preset);
+
+        // setTime sets the current time in Unix timestamp format.  Needed for execution request authentication.
+        //         NOTE: This method is usually called by TembooChoreo.run() with the current time returned by 
+        //         an error response from the Temboo system, thus automatically setting the time.  However, it 
+        //         MAY be called from user code if the particular board has a way of determining the current
+        //         time in the proper format.
+        // currentTime: the number of seconds since 1970-01-01 00:00:00 UTC.
+        static void setTime(unsigned long currentTime);
+
+        //getTime returns the current time in Unix timestamp format (seconds since 1970-01-01 00:00:00 UTC).
+        //        Only valid after setTime has been called.
+        static unsigned long getTime();
+
+    private:
+        static unsigned long s_timeOffset;
+
+        IPAddress m_addr;
+        uint16_t m_port;
+        
+        Client& m_client;
+        char m_sendQueue[TEMBOO_SEND_QUEUE_SIZE];
+        size_t m_sendQueueDepth;
+        
+        // calculate the authentication code value of the formatted request body
+        // using the salted application key value as the key.  
+        // Returns the number of characters processed (i.e. the length of the request body)
+        uint16_t getAuth(DataFormatter& fmt, const char* appKeyValue, const char* salt, char* hexAuth) const;
+        
+        
+        // queue an entire nul-terminated char array
+        // from RAM followed by a newline.
+        void qsendln(const char* str);
+        
+        // queue an entire nul-terminated char array
+        // from flash memory (PROGMEM) one byte at a time,
+        // followed by a newline.
+        void qsendlnProgmem(const char* str);
+        
+        // queue an entire nul-terminated char array
+        // from RAM one byte at a time.
+        void qsend(const char*);
+
+        // queue an entire nul-terminated char array 
+        // from flash memory (PROGMEM) one byte at a time.
+        void qsendProgmem(const char*);
+
+        // queue a single character to be sent when the queue is full.
+        void qsend(char);
+        
+        // send the current contents of the send queue to the client.
+        void qflush();
+
+};
+
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbhmac.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbhmac.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbhmac.cpp	(revision 136)
@@ -0,0 +1,107 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#include <string.h>
+#include <avr/pgmspace.h>
+#include "tmbhmac.h"
+
+HMAC::HMAC() {
+}
+
+HMAC::HMAC(const uint8_t* key, uint32_t keyLength) {
+    init(key, keyLength);
+}
+
+void HMAC::init(const uint8_t* key, uint32_t keyLength) {
+    
+    m_key = key;
+    m_keyLength = keyLength;
+
+    uint8_t iKeyPad[HMAC_BLOCK_SIZE_BYTES];
+    
+    constructKeyPad(iKeyPad, key, keyLength, (uint8_t)0x36);
+
+    m_md5.init();
+    m_md5.process(iKeyPad, HMAC_BLOCK_SIZE_BYTES);
+}
+
+void HMAC::process(const uint8_t* msg, uint32_t msgLength) {
+    // hmac = hash(o_key_pad + hash(i_key_pad + message))
+    // continue hashing the message
+    m_md5.process(msg, msgLength);
+}
+
+void HMAC::finish(uint8_t* dest) {
+    //hmac = hash(o_key_pad + hash(i_key_pad + message))
+    //
+    // Construct the o_key_pad
+    uint8_t finalBlock[HMAC_BLOCK_SIZE_BYTES + HMAC_HASH_SIZE_BYTES];
+    constructKeyPad(finalBlock, m_key, m_keyLength, (uint8_t)0x5C);
+    m_md5.finish(finalBlock + HMAC_BLOCK_SIZE_BYTES);
+    
+    m_md5.init();
+    m_md5.process(finalBlock, HMAC_BLOCK_SIZE_BYTES + HMAC_HASH_SIZE_BYTES);
+    m_md5.finish(dest);
+}
+
+void HMAC::finishHex(char* dest) {
+    uint8_t binDest[HMAC_HASH_SIZE_BYTES];
+    finish(binDest);
+    toHex(binDest, dest);
+}
+
+void HMAC::toHex(uint8_t* hmac, char* dest) {
+    static const char hex[17] PROGMEM = "0123456789abcdef";
+    uint16_t i;
+    for (i = 0; i < HMAC_HASH_SIZE_BYTES; i++) {
+        dest[i*2] = pgm_read_byte(&hex[hmac[i] >> 4]);
+        dest[(i*2) + 1] = pgm_read_byte(&hex[hmac[i] & 0x0F]);
+    }
+    dest[HMAC_HASH_SIZE_BYTES * 2] = '\0';
+}
+
+/*
+ * dest MUST be big enough to hold HMAC_BLOCK_SIZE_BYTES
+ */
+void HMAC::constructKeyPad(uint8_t* dest, const uint8_t* key, uint32_t keyLength, uint8_t padByte) {
+
+    if (keyLength > HMAC_BLOCK_SIZE_BYTES) {
+        // If the key is bigger than 1 block, 
+        // replace the key with the hash of the key.
+        MD5 md5;
+        md5.process(key, keyLength);
+        md5.finish(dest);
+        keyLength = HMAC_HASH_SIZE_BYTES;
+    } else {
+        // If the key length is <= to the HMAC block length, 
+        // just use the key as-is.
+        memcpy(dest, key, keyLength);
+    }
+    // pad the remaining space with 0s
+    if (keyLength < HMAC_BLOCK_SIZE_BYTES) {
+        memset(dest + keyLength, 0, HMAC_BLOCK_SIZE_BYTES-keyLength);
+    }
+
+    for (int i = 0; i < HMAC_BLOCK_SIZE_BYTES; i++) {
+        dest[i] ^= padByte;
+    }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbhmac.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbhmac.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbhmac.h	(revision 136)
@@ -0,0 +1,57 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef TMBHMAC_H_
+#define TMBHMAC_H_
+#include "tmbmd5.h"
+#include "TembooGlobal.h"
+
+#define HMAC_HASH_SIZE_BYTES (MD5_HASH_SIZE_BYTES)
+#define HMAC_BLOCK_SIZE_BYTES (MD5_BLOCK_SIZE_BYTES)
+
+#define HMAC_HEX_SIZE_BYTES (HMAC_HASH_SIZE_BYTES * 2)
+
+class HMAC
+{
+    public:
+        HMAC();
+        HMAC(const uint8_t* key, uint32_t keyLength);
+        void init(const uint8_t* key, uint32_t keyLength);
+        void process(const uint8_t* msg, uint32_t msgLength);
+        void finish(uint8_t* dest);
+        void finishHex(char* dest);
+        enum {
+            HMAC_OK = 0,
+            HMAC_ERROR,
+            HMAC_FAIL_TESTVECTOR
+        };
+
+    private:
+        MD5 m_md5;
+        const uint8_t* m_key;
+        uint32_t m_keyLength;
+
+        void constructKeyPad(uint8_t* dest, const uint8_t* key, uint32_t keyLength, uint8_t padByte);
+        void toHex(uint8_t* hmac, char* dest);
+};
+#endif
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbmd5.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbmd5.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbmd5.cpp	(revision 136)
@@ -0,0 +1,213 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+
+#include <string.h>
+#include <avr/pgmspace.h>
+#include "tmbmd5.h"
+
+
+static const uint8_t Worder[64] PROGMEM = {
+   0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,
+   1,6,11,0,5,10,15,4,9,14,3,8,13,2,7,12,
+   5,8,11,14,1,4,7,10,13,0,3,6,9,12,15,2,
+   0,7,14,5,12,3,10,1,8,15,6,13,4,11,2,9
+};
+
+static const uint8_t Rorder[64] PROGMEM = {
+   7,12,17,22,7,12,17,22,7,12,17,22,7,12,17,22,
+   5,9,14,20,5,9,14,20,5,9,14,20,5,9,14,20,
+   4,11,16,23,4,11,16,23,4,11,16,23,4,11,16,23,
+   6,10,15,21,6,10,15,21,6,10,15,21,6,10,15,21
+};
+
+static const uint32_t Korder[64] PROGMEM = {
+0xd76aa478UL, 0xe8c7b756UL, 0x242070dbUL, 0xc1bdceeeUL, 0xf57c0fafUL, 0x4787c62aUL, 0xa8304613UL, 0xfd469501UL,
+0x698098d8UL, 0x8b44f7afUL, 0xffff5bb1UL, 0x895cd7beUL, 0x6b901122UL, 0xfd987193UL, 0xa679438eUL, 0x49b40821UL,
+0xf61e2562UL, 0xc040b340UL, 0x265e5a51UL, 0xe9b6c7aaUL, 0xd62f105dUL, 0x02441453UL, 0xd8a1e681UL, 0xe7d3fbc8UL,
+0x21e1cde6UL, 0xc33707d6UL, 0xf4d50d87UL, 0x455a14edUL, 0xa9e3e905UL, 0xfcefa3f8UL, 0x676f02d9UL, 0x8d2a4c8aUL,
+0xfffa3942UL, 0x8771f681UL, 0x6d9d6122UL, 0xfde5380cUL, 0xa4beea44UL, 0x4bdecfa9UL, 0xf6bb4b60UL, 0xbebfbc70UL,
+0x289b7ec6UL, 0xeaa127faUL, 0xd4ef3085UL, 0x04881d05UL, 0xd9d4d039UL, 0xe6db99e5UL, 0x1fa27cf8UL, 0xc4ac5665UL,
+0xf4292244UL, 0x432aff97UL, 0xab9423a7UL, 0xfc93a039UL, 0x655b59c3UL, 0x8f0ccc92UL, 0xffeff47dUL, 0x85845dd1UL,
+0x6fa87e4fUL, 0xfe2ce6e0UL, 0xa3014314UL, 0x4e0811a1UL, 0xf7537e82UL, 0xbd3af235UL, 0x2ad7d2bbUL, 0xeb86d391UL
+};
+
+
+MD5::MD5() {
+    init();
+}
+
+void MD5::init() {
+   m_state[0] = 0x67452301UL;
+   m_state[1] = 0xefcdab89UL;
+   m_state[2] = 0x98badcfeUL;
+   m_state[3] = 0x10325476UL;
+   m_bufLength = 0;
+   m_msgLengthBits = 0;
+}
+
+int  MD5::compress(const uint8_t* buf) {
+    uint32_t a;
+    uint32_t b;
+    uint32_t c;
+    uint32_t d;
+    uint32_t i;
+    uint32_t W[16];
+    uint32_t t;
+
+    // Copy data into W[0..15] in an endian-agnostic way
+    for (i = 0; i < 16; i++) {
+        W[i] = ((uint32_t)(buf[3])) << 24
+             | ((uint32_t)(buf[2])) << 16
+             | ((uint32_t)(buf[1])) <<  8
+             | ((uint32_t)(buf[0]));
+        buf += 4;
+    }
+
+    // copy current state 
+    a = m_state[0];
+    b = m_state[1];
+    c = m_state[2];
+    d = m_state[3];
+
+    for (i = 0; i < 16; ++i) {
+        FF(&a,b,c,d,W[pgm_read_byte(&Worder[i])],pgm_read_byte(&Rorder[i]),pgm_read_dword(&Korder[i]));
+        t = d; d = c; c = b; b = a; a = t;
+    }
+
+    for (; i < 32; ++i) {
+        GG(&a,b,c,d,W[pgm_read_byte(&Worder[i])],pgm_read_byte(&Rorder[i]),pgm_read_dword(&Korder[i]));
+        t = d; d = c; c = b; b = a; a = t;
+    }
+
+    for (; i < 48; ++i) {
+        HH(&a,b,c,d,W[pgm_read_byte(&Worder[i])],pgm_read_byte(&Rorder[i]),pgm_read_dword(&Korder[i]));
+        t = d; d = c; c = b; b = a; a = t;
+    }
+
+    for (; i < 64; ++i) {
+        II(&a,b,c,d,W[pgm_read_byte(&Worder[i])],pgm_read_byte(&Rorder[i]),pgm_read_dword(&Korder[i]));
+        t = d; d = c; c = b; b = a; a = t;
+    }
+
+    m_state[0] = m_state[0] + a;
+    m_state[1] = m_state[1] + b;
+    m_state[2] = m_state[2] + c;
+    m_state[3] = m_state[3] + d;
+
+    return MD5::MD5_OK;
+}
+
+int MD5::process (const uint8_t* msg, uint32_t msgLengthBytes) {
+    uint32_t n;
+    int err;
+    
+    if (m_bufLength >= sizeof(m_buf)) {
+       return MD5::MD5_INVALID_ARG;
+    }
+
+    while (msgLengthBytes > 0) {
+
+        // Process the input msg in 64 byte chunks
+        if (m_bufLength == 0 && msgLengthBytes >= 64) {
+            err = compress (msg);
+            if (err != MD5::MD5_OK) {
+                return err;
+            }
+            m_msgLengthBits += 64 * 8;
+            msg += 64;
+            msgLengthBytes -= 64;
+        } else {
+            n = 64 - m_bufLength;
+            if (msgLengthBytes < n) {
+                n = msgLengthBytes;
+            }
+            memcpy(m_buf + m_bufLength, msg, (size_t)n);
+            m_bufLength += n;
+            msg += n;
+            msgLengthBytes -= n;
+            if (m_bufLength == 64) {
+                err = compress (m_buf);
+                if (err != MD5::MD5_OK) {
+                    return err;
+                }
+                m_msgLengthBits += 64 * 8;
+                m_bufLength = 0;
+            }
+        }
+    }
+    return MD5::MD5_OK;
+}
+
+
+int MD5::finish(uint8_t* out) {
+    int i;
+
+    if (m_bufLength >= sizeof(m_buf)) {
+       return MD5::MD5_INVALID_ARG;
+    }
+
+    m_msgLengthBits += m_bufLength * 8;
+
+    // append a '1' bit (right-padded with zeros)
+    m_buf[m_bufLength++] = (uint8_t)0x80;
+
+    // if the bufLength is > 56 bytes, pad with zeros then compress.  
+    // Then fall back to padding with zeros and length encoding like normal.
+    if (m_bufLength > 56) {
+        while (m_bufLength < 64) {
+            m_buf[m_bufLength++] = (uint8_t)0;
+        }
+        compress(m_buf);
+        m_bufLength = 0;
+    }
+
+    // pad with zeroes up to 56 bytes.
+    // (Why 56? because we store the 8-byte length at the end.)
+    // (What if bufLength == 56? Perfect! No padding prior to 8-byte length needed.)
+    while (m_bufLength < 56) {
+        m_buf[m_bufLength++] = (uint8_t)0;
+    }
+
+    // add the length in an endian-agnostic way
+    m_buf[56] = (uint8_t)((m_msgLengthBits      ) & 255); 
+    m_buf[57] = (uint8_t)((m_msgLengthBits >>  8) & 255);
+    m_buf[58] = (uint8_t)((m_msgLengthBits >> 16) & 255);
+    m_buf[59] = (uint8_t)((m_msgLengthBits >> 24) & 255);
+    m_buf[60] = (uint8_t)((m_msgLengthBits >> 32) & 255);
+    m_buf[61] = (uint8_t)((m_msgLengthBits >> 40) & 255);
+    m_buf[62] = (uint8_t)((m_msgLengthBits >> 48) & 255);
+    m_buf[63] = (uint8_t)((m_msgLengthBits >> 56) & 255);
+
+    compress(m_buf);
+
+    // copy the state to the output in an endian-agnostic way
+    for (i = 0; i < 4; i++) {
+        out[0] =  m_state[i]        & 255;
+        out[1] = (m_state[i] >>  8) & 255;
+        out[2] = (m_state[i] >> 16) & 255;
+        out[3] = (m_state[i] >> 24) & 255;
+        out += 4;
+    }
+    return MD5::MD5_OK;
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbmd5.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbmd5.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/Temboo/src/utility/tmbmd5.h	(revision 136)
@@ -0,0 +1,72 @@
+/*
+###############################################################################
+#
+# Temboo Arduino library
+#
+# Copyright 2014, Temboo Inc.
+# 
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+# http://www.apache.org/licenses/LICENSE-2.0
+# 
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the License.
+#
+###############################################################################
+*/
+
+#ifndef TMBMD5_H_
+#define TMBMD5_H_
+
+#include <stdint.h>
+#include "TembooGlobal.h"
+
+#define MD5_HASH_SIZE_BITS   (128)
+#define MD5_HASH_SIZE_BYTES  (MD5_HASH_SIZE_BITS/8)
+
+#define MD5_BLOCK_SIZE_BITS  (512)
+#define MD5_BLOCK_SIZE_BYTES (MD5_BLOCK_SIZE_BITS/8)
+
+
+#define ROL(x, y) ( (((uint32_t)(x)<<(uint32_t)((y)&31)) | (((uint32_t)(x)&0xFFFFFFFFUL)>>(uint32_t)(32-((y)&31)))) & 0xFFFFFFFFUL)
+class MD5 {
+
+public:
+    MD5();
+    void init();
+    int process(const uint8_t* in, uint32_t inlen);
+    int finish(uint8_t* hash);
+    enum {
+        MD5_OK = 0,
+        MD5_ERROR,
+        MD5_INVALID_ARG,
+        MD5_FAIL_TESTVECTOR
+    };
+
+private:
+    uint64_t m_msgLengthBits;
+    uint32_t m_state[4];
+    uint32_t m_bufLength;
+    uint8_t  m_buf[64];
+
+    int compress(const uint8_t* buf);
+
+    inline uint32_t F_(uint32_t x, uint32_t y, uint32_t z) { return (z ^ (x & (y ^ z))); }
+    inline uint32_t G_(uint32_t x, uint32_t y, uint32_t z) { return (y ^ (z & (y ^ x))); }
+    inline uint32_t H_(uint32_t x, uint32_t y, uint32_t z) { return (x^y^z); }
+    inline uint32_t I_(uint32_t x, uint32_t y, uint32_t z) { return (y^(x|(~z))); }
+
+    
+    inline void FF(uint32_t* a, uint32_t b, uint32_t c, uint32_t d, uint32_t M, uint32_t s, uint32_t t) { *a = (*a + F_(b,c,d) + M + t); *a = ROL(*a, s) + b; }
+    inline void GG(uint32_t* a, uint32_t b, uint32_t c, uint32_t d, uint32_t M, uint32_t s, uint32_t t) { *a = (*a + G_(b,c,d) + M + t); *a = ROL(*a, s) + b; }
+    inline void HH(uint32_t* a, uint32_t b, uint32_t c, uint32_t d, uint32_t M, uint32_t s, uint32_t t) { *a = (*a + H_(b,c,d) + M + t); *a = ROL(*a, s) + b; }
+    inline void II(uint32_t* a, uint32_t b, uint32_t c, uint32_t d, uint32_t M, uint32_t s, uint32_t t) { *a = (*a + I_(b,c,d) + M + t); *a = ROL(*a, s) + b; }
+
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/README.adoc
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/README.adoc	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/README.adoc	(revision 136)
@@ -0,0 +1,24 @@
+= USB Host Library for Arduino =
+
+The USBHost library allows an Arduino Due board to appear as a USB host, enabling it to communicate with peripherals like USB mice and keyboards.
+
+For more information about this library please visit us at
+http://arduino.cc/en/Reference/USBHost
+
+== License ==
+
+Copyright (c) Arduino LLC. All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/examples/ADKTerminalTest/ADKTerminalTest.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/examples/ADKTerminalTest/ADKTerminalTest.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/examples/ADKTerminalTest/ADKTerminalTest.ino	(revision 136)
@@ -0,0 +1,70 @@
+/*
+
+ ADK Terminal Test
+
+ This demonstrates USB Host connectivity between an
+ Android phone and an Arduino Due.
+
+ The ADK for the Arduino Due is a work in progress
+ For additional information on the Arduino ADK visit
+ http://labs.arduino.cc/ADK/Index
+
+ created 27 June 2012
+ by Cristian Maglie
+
+*/
+
+#include "variant.h"
+#include <stdio.h>
+#include <adk.h>
+
+// Accessory descriptor. It's how Arduino identifies itself to Android.
+char applicationName[] = "Arduino_Terminal"; // the app on your phone
+char accessoryName[] = "Arduino Due"; // your Arduino board
+char companyName[] = "Arduino SA";
+
+// Make up anything you want for these
+char versionNumber[] = "1.0";
+char serialNumber[] = "1";
+char url[] = "http://labs.arduino.cc/uploads/ADK/ArduinoTerminal/ThibaultTerminal_ICS_0001.apk";
+
+USBHost Usb;
+ADK adk(&Usb, companyName, applicationName, accessoryName, versionNumber, url, serialNumber);
+
+void setup()
+{
+  cpu_irq_enable();
+  printf("\r\nADK demo start\r\n");
+  delay(200);
+}
+
+#define RCVSIZE 128
+
+void loop()
+{
+  uint8_t buf[RCVSIZE];
+  uint32_t nbread = 0;
+  char helloworld[] = "Hello World!\r\n";
+
+  Usb.Task();
+
+  if (adk.isReady())
+  {
+    /* Write hello string to ADK */
+    adk.write(strlen(helloworld), (uint8_t *)helloworld);
+
+    delay(1000);
+
+    /* Read data from ADK and print to UART */
+    adk.read(&nbread, RCVSIZE, buf);
+    if (nbread > 0)
+    {
+      printf("RCV: ");
+      for (uint32_t i = 0; i < nbread; ++i)
+      {
+        printf("%c", (char)buf[i]);
+      }
+      printf("\r\n");
+    }
+  }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/examples/KeyboardController/KeyboardController.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/examples/KeyboardController/KeyboardController.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/examples/KeyboardController/KeyboardController.ino	(revision 136)
@@ -0,0 +1,83 @@
+/*
+ Keyboard Controller Example
+
+ Shows the output of a USB Keyboard connected to
+ the Native USB port on an Arduino Due Board.
+
+ created 8 Oct 2012
+ by Cristian Maglie
+
+ http://arduino.cc/en/Tutorial/KeyboardController
+
+ This sample code is part of the public domain.
+ */
+
+
+// Require keyboard control library
+#include <KeyboardController.h>
+
+// Initialize USB Controller
+USBHost usb;
+
+// Attach keyboard controller to USB
+KeyboardController keyboard(usb);
+
+// This function intercepts key press
+void keyPressed() {
+  Serial.print("Pressed:  ");
+  printKey();
+}
+
+// This function intercepts key release
+void keyReleased() {
+  Serial.print("Released: ");
+  printKey();
+}
+
+void printKey() {
+  // getOemKey() returns the OEM-code associated with the key
+  Serial.print(" key:");
+  Serial.print(keyboard.getOemKey());
+
+  // getModifiers() returns a bits field with the modifiers-keys
+  int mod = keyboard.getModifiers();
+  Serial.print(" mod:");
+  Serial.print(mod);
+
+  Serial.print(" => ");
+
+  if (mod & LeftCtrl)
+    Serial.print("L-Ctrl ");
+  if (mod & LeftShift)
+    Serial.print("L-Shift ");
+  if (mod & Alt)
+    Serial.print("Alt ");
+  if (mod & LeftCmd)
+    Serial.print("L-Cmd ");
+  if (mod & RightCtrl)
+    Serial.print("R-Ctrl ");
+  if (mod & RightShift)
+    Serial.print("R-Shift ");
+  if (mod & AltGr)
+    Serial.print("AltGr ");
+  if (mod & RightCmd)
+    Serial.print("R-Cmd ");
+
+  // getKey() returns the ASCII translation of OEM key
+  // combined with modifiers.
+  Serial.write(keyboard.getKey());
+  Serial.println();
+}
+
+void setup()
+{
+  Serial.begin(9600);
+  Serial.println("Program started");
+  delay(200);
+}
+
+void loop()
+{
+  // Process USB tasks
+  usb.Task();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/examples/MouseController/MouseController.ino
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/examples/MouseController/MouseController.ino	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/examples/MouseController/MouseController.ino	(revision 136)
@@ -0,0 +1,93 @@
+/*
+ Mouse Controller Example
+
+ Shows the output of a USB Mouse connected to
+ the Native USB port on an Arduino Due Board.
+
+ created 8 Oct 2012
+ by Cristian Maglie
+
+ http://arduino.cc/en/Tutorial/MouseController
+
+ This sample code is part of the public domain.
+ */
+
+// Require mouse control library
+#include <MouseController.h>
+
+// Initialize USB Controller
+USBHost usb;
+
+// Attach mouse controller to USB
+MouseController mouse(usb);
+
+// variables for mouse button states
+boolean leftButton = false;
+boolean middleButton = false;
+boolean rightButton = false;
+
+// This function intercepts mouse movements
+void mouseMoved() {
+  Serial.print("Move: ");
+  Serial.print(mouse.getXChange());
+  Serial.print(", ");
+  Serial.println(mouse.getYChange());
+}
+
+// This function intercepts mouse movements while a button is pressed
+void mouseDragged() {
+  Serial.print("DRAG: ");
+  Serial.print(mouse.getXChange());
+  Serial.print(", ");
+  Serial.println(mouse.getYChange());
+}
+
+// This function intercepts mouse button press
+void mousePressed() {
+  Serial.print("Pressed: ");
+  if (mouse.getButton(LEFT_BUTTON)) {
+    Serial.print("L");
+    leftButton = true;
+  }
+  if (mouse.getButton(MIDDLE_BUTTON)) {
+    Serial.print("M");
+    middleButton = true;
+  }
+  if (mouse.getButton(RIGHT_BUTTON)) {
+    Serial.print("R");
+    Serial.println();
+    rightButton = true;
+  }
+}
+
+// This function intercepts mouse button release
+void mouseReleased() {
+  Serial.print("Released: ");
+  if (!mouse.getButton(LEFT_BUTTON) && leftButton == true) {
+    Serial.print("L");
+    leftButton = false;
+  }
+  if (!mouse.getButton(MIDDLE_BUTTON) && middleButton == true) {
+    Serial.print("M");
+    middleButton = false;
+  }
+  if (!mouse.getButton(RIGHT_BUTTON) && rightButton == true) {
+    Serial.print("R");
+    rightButton = false;
+  }
+  Serial.println();
+}
+
+void setup()
+{
+  Serial.begin(9600);
+  Serial.println("Program started");
+  delay(200);
+}
+
+void loop()
+{
+  // Process USB tasks
+  usb.Task();
+}
+
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/keywords.txt
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/keywords.txt	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/keywords.txt	(revision 136)
@@ -0,0 +1,35 @@
+#######################################
+# Syntax Coloring Map For USBHost
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+MouseController	KEYWORD1
+USBHost	KEYWORD1
+KeyboardController	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+Task	KEYWORD2
+mouseMoved	KEYWORD2
+mouseDragged	KEYWORD2
+mousePressed	KEYWORD2
+mouseReleased	KEYWORD2
+getXChange	KEYWORD2
+getYChange	KEYWORD2
+getButton	KEYWORD2
+keyPressed	KEYWORD2
+keyReleased	KEYWORD2
+getModifiers	KEYWORD2
+getKey	KEYWORD2
+getOemKey	KEYWORD2
+
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/library.properties
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/library.properties	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/library.properties	(revision 136)
@@ -0,0 +1,9 @@
+name=USBHost
+version=1.0
+author=Arduino
+maintainer=Arduino <info@arduino.cc>
+sentence=Allows the communication with USB peripherals like mice, keyboards, and thumbdrives. For Arduino DUE only.
+paragraph=The USBHost library allows an Arduino Due board to appear as a USB host, enabling it to communicate with peripherals like USB mice and keyboards. USBHost does not support devices that are connected through USB hubs. This includes some keyboards that have an internal hub.
+category=Device Control
+url=http://arduino.cc/en/Reference/USBHost
+architectures=sam
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/KeyboardController.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/KeyboardController.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/KeyboardController.cpp	(revision 136)
@@ -0,0 +1,40 @@
+/*
+ Copyright (c) 2012 Arduino.  All right reserved.
+
+ This library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ This library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ See the GNU Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with this library; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <KeyboardController.h>
+
+extern "C" {
+void __keyboardControllerEmptyCallback() { }
+}
+
+void keyPressed()  __attribute__ ((weak, alias("__keyboardControllerEmptyCallback")));
+void keyReleased() __attribute__ ((weak, alias("__keyboardControllerEmptyCallback")));
+
+void KeyboardController::OnKeyDown(uint8_t _mod, uint8_t _oemKey) {
+	modifiers = _mod;
+	keyOem = _oemKey;
+	key = OemToAscii(_mod, _oemKey);
+	keyPressed();
+}
+
+void KeyboardController::OnKeyUp(uint8_t _mod, uint8_t _oemKey) {
+	modifiers = _mod;
+	keyOem = _oemKey;
+	key = OemToAscii(_mod, _oemKey);
+	keyReleased();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/KeyboardController.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/KeyboardController.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/KeyboardController.h	(revision 136)
@@ -0,0 +1,54 @@
+/*
+ Copyright (c) 2012 Arduino.  All right reserved.
+
+ This library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ This library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ See the GNU Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with this library; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#ifndef KEYBOARD_CONTROLLER_H
+#define KEYBOARD_CONTROLLER_H
+
+#include <hidboot.h>
+
+enum KeyboardModifiers {
+	LeftCtrl = 1,
+	LeftShift = 2,
+	Alt = 4,
+	LeftCmd = 8,
+	RightCtrl = 16,
+	RightShift = 32,
+	AltGr = 64,
+	RightCmd = 128
+};
+
+class KeyboardController : public KeyboardReportParser {
+public:
+  KeyboardController(USBHost &usb) : hostKeyboard(&usb), key(0), keyOem(0), modifiers(0) {
+    hostKeyboard.SetReportParser(0, this);
+  };
+
+  uint8_t getKey()       { return key; };
+  uint8_t getModifiers() { return modifiers; };
+  uint8_t getOemKey()    { return keyOem; };
+
+protected:
+  virtual void OnKeyDown(uint8_t mod, uint8_t key);
+  virtual void OnKeyUp(uint8_t mod, uint8_t key);
+
+private:
+  HIDBoot<HID_PROTOCOL_KEYBOARD> hostKeyboard;
+  uint8_t key, keyOem, modifiers;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/MouseController.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/MouseController.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/MouseController.cpp	(revision 136)
@@ -0,0 +1,83 @@
+/*
+ Copyright (c) 2012 Arduino.  All right reserved.
+
+ This library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ This library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ See the GNU Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with this library; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <MouseController.h>
+
+extern "C" {
+void __mouseControllerEmptyCallback() { }
+}
+
+void mouseClicked()  __attribute__ ((weak, alias("__mouseControllerEmptyCallback")));
+void mouseDragged()  __attribute__ ((weak, alias("__mouseControllerEmptyCallback")));
+void mouseMoved()    __attribute__ ((weak, alias("__mouseControllerEmptyCallback")));
+void mousePressed()  __attribute__ ((weak, alias("__mouseControllerEmptyCallback")));
+void mouseReleased() __attribute__ ((weak, alias("__mouseControllerEmptyCallback")));
+
+int MouseController::getXChange() {
+	int r = dx;
+	dx = 0;
+	return r;
+}
+
+int MouseController::getYChange() {
+	int r = dy;
+	dy = 0;
+	return r;
+}
+
+void MouseController::OnMouseMove(MOUSEINFO *mi) {
+	dx += mi->dX;
+	dy += mi->dY;
+	if (buttons != 0)
+		mouseDragged();
+	else
+		mouseMoved();
+}
+
+void MouseController::OnLeftButtonUp(MOUSEINFO *mi) {
+	buttons &= ~LEFT_BUTTON;
+	mouseReleased();
+	mouseClicked();
+}
+
+void MouseController::OnLeftButtonDown(MOUSEINFO *mi) {
+	buttons |= LEFT_BUTTON;
+	mousePressed();
+}
+
+void MouseController::OnMiddleButtonUp(MOUSEINFO *mi) {
+	buttons &= ~MIDDLE_BUTTON;
+	mouseReleased();
+	mouseClicked();
+}
+
+void MouseController::OnMiddleButtonDown(MOUSEINFO *mi) {
+	buttons |= MIDDLE_BUTTON;
+	mousePressed();
+}
+
+void MouseController::OnRightButtonUp(MOUSEINFO *mi) {
+	buttons &= ~RIGHT_BUTTON;
+	mouseReleased();
+	mouseClicked();
+}
+
+void MouseController::OnRightButtonDown(MOUSEINFO *mi) {
+	buttons |= RIGHT_BUTTON;
+	mousePressed();
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/MouseController.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/MouseController.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/MouseController.h	(revision 136)
@@ -0,0 +1,57 @@
+/*
+  Copyright (c) 2012 Arduino.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef MOUSE_CONTROLLER_H
+#define MOUSE_CONTROLLER_H
+
+#include <hidboot.h>
+
+enum MouseButton {
+	LEFT_BUTTON   = 0x01,
+	MIDDLE_BUTTON = 0x02,
+	RIGHT_BUTTON  = 0x04
+};
+
+class MouseController : public MouseReportParser
+{
+public:
+  MouseController(USBHost &usb) : hostMouse(&usb), dx(0), dy(0), buttons(0) {
+    hostMouse.SetReportParser(0, this);
+  };
+
+  bool getButton(MouseButton button) { return (buttons & button) == button; };
+  int getXChange();
+  int getYChange();
+  // int getWheelChange(); // Not implemented
+
+protected:
+  virtual void OnMouseMove(MOUSEINFO *mi);
+  virtual void OnLeftButtonUp(MOUSEINFO *mi);
+  virtual void OnLeftButtonDown(MOUSEINFO *mi);
+  virtual void OnMiddleButtonUp(MOUSEINFO *mi);
+  virtual void OnMiddleButtonDown(MOUSEINFO *mi);
+  virtual void OnRightButtonUp(MOUSEINFO *mi);
+  virtual void OnRightButtonDown(MOUSEINFO *mi);
+
+private:
+  HIDBoot<HID_PROTOCOL_MOUSE> hostMouse;
+  int dx, dy;
+  int buttons;
+};
+
+#endif
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/Usb.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/Usb.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/Usb.cpp	(revision 136)
@@ -0,0 +1,856 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+/* USB functions */
+
+#include "Arduino.h"
+#include "Usb.h"
+#include <stdio.h>
+
+static uint32_t usb_error = 0;
+static uint32_t usb_task_state = USB_DETACHED_SUBSTATE_INITIALIZE;
+
+/**
+ * \brief USBHost class constructor.
+ */
+USBHost::USBHost() : bmHubPre(0)
+{
+	// Set up state machine
+	usb_task_state = USB_DETACHED_SUBSTATE_INITIALIZE;
+
+	// Init host stack
+	init();
+}
+
+/**
+ * \brief Initialize USBHost class.
+ */
+void USBHost::init()
+{
+	devConfigIndex	= 0;
+	bmHubPre		= 0;
+}
+
+
+/**
+ * \brief Get USBHost state.
+ *
+ * \return USB enumeration status (see USBHost::task).
+ */
+uint32_t USBHost::getUsbTaskState(void)
+{
+    return (usb_task_state);
+}
+
+/**
+ * \brief Set USB state.
+ *
+ * \param state New USBHost status to be set.
+ */
+void USBHost::setUsbTaskState(uint32_t state)
+{
+    usb_task_state = state;
+}
+
+/**
+ * \brief Get endpoint info from USB device address and device endpoint.
+ *
+ * \note This function should be used to know which host pipe is being used for
+ * the corresponding device endpoint.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ *
+ * \return Pointer to an EpInfo structure.
+ */
+EpInfo* USBHost::getEpInfoEntry(uint32_t addr, uint32_t ep)
+{
+	UsbDevice *p = addrPool.GetUsbDevicePtr(addr);
+
+	if (!p || !p->epinfo)
+		return NULL;
+
+	EpInfo *pep = p->epinfo;
+
+	for (uint32_t i = 0; i < p->epcount; i++)
+	{
+		if (pep->deviceEpNum == ep)
+			return pep;
+
+		pep++;
+	}
+
+	return NULL;
+}
+
+/**
+ * \brief Set device endpoint entry.
+ *
+ * \note Each device is different and has a different number of endpoints.
+ * This function sets endpoint record structure to the device using address
+ * addr in the address pool.
+ *
+ * \param ul_pipe Pipe address.
+ * \param ul_token_type Token type.
+ *
+ * \retval 0 on success.
+ * \retval USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL device not found.
+ */
+uint32_t USBHost::setEpInfoEntry(uint32_t addr, uint32_t epcount, EpInfo* eprecord_ptr)
+{
+	if (!eprecord_ptr)
+		return USB_ERROR_INVALID_ARGUMENT;
+
+	UsbDevice *p = addrPool.GetUsbDevicePtr(addr);
+
+	if (!p)
+		return USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL;
+
+	p->address	= addr;
+	p->epinfo	= eprecord_ptr;
+	p->epcount	= epcount;
+
+	return 0;
+}
+
+/**
+ * \brief Set host pipe target address and set ppep pointer to the endpoint
+ * structure matching the specified USB device address and endpoint.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ * \param ppep Endpoint info structure pointer set by setPipeAddress.
+ * \param nak_limit Maximum number of NAK permitted.
+ *
+ * \retval 0 on success.
+ * \retval USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL device not found.
+ * \retval USB_ERROR_EPINFO_IS_NULL no endpoint structure found for this device.
+ * \retval USB_ERROR_EP_NOT_FOUND_IN_TBL the specified device endpoint cannot be found.
+ */
+uint32_t USBHost::setPipeAddress(uint32_t addr, uint32_t ep, EpInfo **ppep, uint32_t &nak_limit)
+{
+	UsbDevice *p = addrPool.GetUsbDevicePtr(addr);
+
+	if (!p)
+		return USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL;
+
+ 	if (!p->epinfo)
+		return USB_ERROR_EPINFO_IS_NULL;
+
+	*ppep = getEpInfoEntry(addr, ep);
+
+	if (!*ppep)
+		return USB_ERROR_EP_NOT_FOUND_IN_TBL;
+
+	nak_limit = (0x0001UL << (((*ppep)->bmNakPower > USB_NAK_MAX_POWER ) ? USB_NAK_MAX_POWER : (*ppep)->bmNakPower));
+	nak_limit--;
+
+	// Set peripheral address
+	TRACE_USBHOST(printf("     => SetAddress deviceEP=%lu configued as hostPIPE=%lu sending to address=%lu\r\n", ep, (*ppep)->hostPipeNum, addr);)
+	uhd_configure_address((*ppep)->hostPipeNum, addr);
+
+	return 0;
+}
+
+/**
+ * \brief Send a control request.
+ * Sets address, endpoint, fills control packet with necessary data, dispatches
+ * control packet, and initiates bulk IN transfer depending on request.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ * \param bmReqType Request direction.
+ * \param bRequest Request type.
+ * \param wValLo Value low.
+ * \param wValHi Value high.
+ * \param wInd Index field.
+ * \param total Request length.
+ * \param nbytes Number of bytes to read.
+ * \param dataptr Data pointer.
+ * \param p USB class reader.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::ctrlReq(uint32_t addr, uint32_t ep, uint8_t bmReqType, uint8_t bRequest, uint8_t wValLo, uint8_t wValHi, uint16_t wInd, uint16_t total, uint32_t nbytes, uint8_t* dataptr, USBReadParser *p)
+{
+	// Request direction, IN or OUT
+	uint32_t direction = 0;
+	uint32_t rcode = 0;
+	SETUP_PKT setup_pkt;
+
+	EpInfo *pep = 0;
+	uint32_t nak_limit;
+
+	TRACE_USBHOST(printf("    => ctrlReq\r\n");)
+
+	// Set peripheral address
+	rcode = setPipeAddress(addr, ep, &pep, nak_limit);
+	if (rcode)
+		return rcode;
+
+	// Allocate Pipe0 with default 64 bytes size if not already initialized
+	// TODO : perform a get device descriptor first to get device endpoint size (else data can be missed if device ep0 > host pipe0)
+	rcode = UHD_Pipe0_Alloc(0, 64);
+	if (rcode)
+	{
+		TRACE_USBHOST(printf("/!\\ USBHost::ctrlReq : EP0 allocation error: %lu\r\n", rcode);)
+		return (rcode);
+	}
+
+	// Determine request direction
+	direction = ((bmReqType & 0x80 ) > 0);
+
+	// Fill in setup packet
+    setup_pkt.ReqType_u.bmRequestType	= bmReqType;
+    setup_pkt.bRequest					= bRequest;
+    setup_pkt.wVal_u.wValueLo			= wValLo;
+    setup_pkt.wVal_u.wValueHi			= wValHi;
+    setup_pkt.wIndex					= wInd;
+    setup_pkt.wLength					= total;
+
+	// Configure and write the setup packet into the FIFO
+	uhd_configure_pipe_token(0, tokSETUP);
+	UHD_Pipe_Write(pep->hostPipeNum, 8, (uint8_t *)&setup_pkt);
+
+	// Dispatch packet
+	rcode = dispatchPkt(tokSETUP, pep->hostPipeNum, nak_limit);
+	if (rcode)
+	{
+		// Return HRSLT if not zero
+		TRACE_USBHOST(printf("/!\\ USBHost::ctrlReq : Setup packet error: %lu\r\n", rcode);)
+		return (rcode);
+	}
+
+	// Data stage (if present)
+	if (dataptr != 0)
+	{
+		if (direction)
+		{
+			// IN transfer
+			TRACE_USBHOST(printf("    => ctrlData IN\r\n");)
+			uint32_t left = total;
+
+			while (left)
+			{
+				// Bytes read into buffer
+				uint32_t read = nbytes;
+
+				rcode = InTransfer(pep, nak_limit, &read, dataptr);
+				if (rcode)
+					return rcode;
+
+				// Invoke callback function if inTransfer completed successfuly and callback function pointer is specified
+				if (!rcode && p)
+					((USBReadParser*)p)->Parse(read, dataptr, total - left);
+
+				left -= read;
+
+				if (read < nbytes)
+					break;
+			}
+		}
+		else
+		{
+			// OUT transfer
+			TRACE_USBHOST(printf("    => ctrlData OUT\r\n");)
+			rcode = OutTransfer(pep, nak_limit, nbytes, dataptr);
+		}
+
+		if (rcode)
+		{
+			TRACE_USBHOST(printf("/!\\ USBHost::ctrlData : Data packet error: %lu\r\n", rcode);)
+			return (rcode);
+		}
+	}
+
+	// Status stage
+	return dispatchPkt((direction) ? tokOUTHS : tokINHS, pep->hostPipeNum, nak_limit);
+}
+
+/**
+ * \brief Perform IN request to the specified USB device.
+ *
+ * \note This function handles multiple packets (if necessary) and can
+ * receive a maximum of 'nbytesptr' bytes. It keep sending INs and writes data
+ * to memory area pointed by 'data'. The actual amount of received bytes is
+ * stored in 'nbytesptr'.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ * \param nbytesptr Receive buffer size. It is set to the amount of received
+ * bytes when the function returns.
+ * \param data Buffer to store received data.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+ uint32_t USBHost::inTransfer(uint32_t addr, uint32_t ep, uint32_t *nbytesptr, uint8_t* data)
+{
+	EpInfo *pep = NULL;
+	uint32_t nak_limit = 0;
+
+	uint32_t rcode = setPipeAddress(addr, ep, &pep, nak_limit);
+
+	if (rcode)
+	{
+		return rcode;
+	}
+
+	return InTransfer(pep, nak_limit, nbytesptr, data);
+}
+
+uint32_t USBHost::InTransfer(EpInfo *pep, uint32_t nak_limit, uint32_t *nbytesptr, uint8_t* data)
+{
+	uint32_t rcode = 0;
+	uint32_t pktsize = 0;
+	uint32_t nbytes = *nbytesptr;
+	uint32_t maxpktsize = pep->maxPktSize;
+
+	*nbytesptr = 0;
+
+    while (1)
+	{
+		// Use a 'return' to exit this loop
+		// IN packet to EP-'endpoint'. Function takes care of NAKS.
+        rcode = dispatchPkt(tokIN, pep->hostPipeNum, nak_limit);
+        if (rcode)
+		{
+			if (rcode == 1)
+			{
+				// Pipe freeze is mandatory to avoid sending IN endlessly (else reception becomes messy then)
+				uhd_freeze_pipe(pep->hostPipeNum);
+			}
+			// Should be 1, indicating NAK. Else return error code.
+            return rcode;
+        }
+
+		// Number of received bytes
+		pktsize = uhd_byte_count(pep->hostPipeNum);
+		if (nbytes < pktsize)
+		{
+			TRACE_USBHOST(printf("/!\\ USBHost::InTransfer : receive buffer is too small, size=%lu, expected=%lu\r\n", nbytes, pktsize);)
+		}
+        data += UHD_Pipe_Read(pep->hostPipeNum, pktsize, data);
+
+		// Add this packet's byte count to total transfer length
+        *nbytesptr += pktsize;
+
+        // The transfer is complete under two conditions:
+        // 1. The device sent a short packet (L.T. maxPacketSize)
+        // 2. 'nbytes' have been transferred.
+        if ((pktsize < maxpktsize) || (*nbytesptr >= nbytes))
+		{
+            return 0;
+        }
+	}
+}
+
+/**
+ * \brief Perform OUT request to the specified USB device.
+ *
+ * \note This function handles multiple packets (if necessary) and sends
+ * 'nbytes' bytes.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ * \param nbytes Buffer size to be sent.
+ * \param data Buffer to send.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::outTransfer(uint32_t addr, uint32_t ep, uint32_t nbytes, uint8_t* data)
+{
+	EpInfo *pep = NULL;
+	uint32_t nak_limit = 0;
+
+	uint32_t rcode = setPipeAddress(addr, ep, &pep, nak_limit);
+
+	if (rcode)
+	{
+		return rcode;
+	}
+
+	return OutTransfer(pep, nak_limit, nbytes, data);
+}
+
+uint32_t USBHost::OutTransfer(EpInfo *pep, uint32_t nak_limit, uint32_t nbytes, uint8_t *data)
+{
+	uint32_t rcode = 0;
+	uint32_t bytes_tosend = 0;
+	uint32_t bytes_left = nbytes;
+	uint32_t maxpktsize = pep->maxPktSize;
+
+	if (maxpktsize < 1)
+		return USB_ERROR_INVALID_MAX_PKT_SIZE;
+
+	while (bytes_left)
+	{
+		bytes_tosend = (bytes_left >= maxpktsize) ? maxpktsize : bytes_left;
+
+		// Write FIFO
+		UHD_Pipe_Write(pep->hostPipeNum, bytes_tosend, data);
+
+		// Use a 'return' to exit this loop
+		// OUT packet to EP-'endpoint'. Function takes care of NAKS.
+		rcode = dispatchPkt(tokOUT, pep->hostPipeNum, nak_limit);
+		if (rcode)
+		{
+			// Should be 0, indicating ACK. Else return error code.
+			return rcode;
+		}
+
+		bytes_left -= bytes_tosend;
+		data += bytes_tosend;
+	}
+
+	// Should be 0 in all cases
+	return rcode;
+}
+
+/**
+ * \brief Dispatch USB packet.
+ *
+ * \note Ensure peripheral address is set and relevant buffer is loaded/empty.
+ * If NAK, tries to re-send up to nak_limit times.
+ * If nak_limit == 0, do not count NAKs, exit after timeout.
+ *
+ * \param token Token type (Setup, In or Out).
+ * \param hostPipeNum Host pipe number to use for sending USB packet.
+ * \param nak_limit Maximum number of NAK permitted.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::dispatchPkt(uint32_t token, uint32_t hostPipeNum, uint32_t nak_limit)
+{
+	uint32_t timeout = millis() + USB_XFER_TIMEOUT;
+	uint32_t nak_count = 0;
+	uint32_t rcode = USB_ERROR_TRANSFER_TIMEOUT;
+
+	TRACE_USBHOST(printf("     => dispatchPkt token=%lu pipe=%lu nak_limit=%lu\r\n", token, hostPipeNum, nak_limit);)
+
+	// Launch the transfer
+	UHD_Pipe_Send(hostPipeNum, token);
+
+	// Check timeout but don't hold timeout if VBUS is lost
+	while ((timeout > millis()) && (UHD_GetVBUSState() == UHD_STATE_CONNECTED))
+	{
+		// Wait for transfer completion
+		if (UHD_Pipe_Is_Transfer_Complete(hostPipeNum, token))
+		{
+			return 0;
+		}
+
+		// Is NAK received?
+		if (Is_uhd_nak_received(hostPipeNum))
+		{
+			uhd_ack_nak_received(hostPipeNum);
+			nak_count++;
+
+			if (nak_limit && (nak_count == nak_limit))
+			{
+				// Return NAK
+				return 1;
+			}
+		}
+	}
+
+	return rcode;
+}
+
+/**
+ * \brief Configure device using known device classes.
+ * The device get a new address even if its class remain unknown.
+ *
+ * \param parent USB device address of the device's parent (0 if root).
+ * \param port USB device base address (see AddressPoolImpl).
+ * \param lowspeed Device speed.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::Configuring(uint32_t parent, uint32_t port, uint32_t lowspeed)
+{
+	uint32_t rcode = 0;
+
+	for (; devConfigIndex < USB_NUMDEVICES; ++devConfigIndex)
+	{
+		if (!devConfig[devConfigIndex])
+			continue;
+
+		rcode = devConfig[devConfigIndex]->Init(parent, port, lowspeed);
+
+		if (!rcode)
+		{
+			TRACE_USBHOST(printf("USBHost::Configuring : found device class!\r\n");)
+			devConfigIndex = 0;
+			return 0;
+		}
+
+
+		if (rcode == USB_DEV_CONFIG_ERROR_DEVICE_NOT_SUPPORTED)
+		{
+			TRACE_USBHOST(printf("USBHost::Configuring : ERROR : device not supported!\r\n");)
+		}
+		else if (rcode == USB_ERROR_CLASS_INSTANCE_ALREADY_IN_USE)
+		{
+			TRACE_USBHOST(printf("USBHost::Configuring : ERROR : class instance already in use!\r\n");)
+		}
+		else
+		{
+			// in case of an error devConfigIndex should be reset to 0
+			// in order to start from the very beginning the next time
+			// the program gets here
+			if (rcode != USB_DEV_CONFIG_ERROR_DEVICE_INIT_INCOMPLETE)
+				devConfigIndex = 0;
+
+			return rcode;
+		}
+	}
+
+	// Device class is not supported by any of the registered classes
+	devConfigIndex = 0;
+
+	rcode = DefaultAddressing(parent, port, lowspeed);
+
+	return rcode;
+}
+
+/**
+ * \brief Configure device with unknown USB class.
+ *
+ * \param parent USB device address of the device's parent (0 if root).
+ * \param port USB device base address (see AddressPoolImpl).
+ * \param lowspeed Device speed.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::DefaultAddressing(uint32_t parent, uint32_t port, uint32_t lowspeed)
+{
+	uint32_t rcode = 0;
+	UsbDevice *p0 = 0, *p = 0;
+
+	// Get pointer to pseudo device with address 0 assigned
+	p0 = addrPool.GetUsbDevicePtr(0);
+
+	if (!p0)
+		return USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL;
+
+	if (!p0->epinfo)
+		return USB_ERROR_EPINFO_IS_NULL;
+
+	p0->lowspeed = (lowspeed) ? 1 : 0;
+
+	// Allocate new address according to device class
+	uint32_t bAddress = addrPool.AllocAddress(parent, 0, port);
+
+	if (!bAddress)
+		return USB_ERROR_OUT_OF_ADDRESS_SPACE_IN_POOL;
+
+	p = addrPool.GetUsbDevicePtr(bAddress);
+
+	if (!p)
+		return USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL;
+
+	p->lowspeed = lowspeed;
+
+	// Assign new address to the device
+	rcode = setAddr(0, 0, bAddress);
+
+	if (rcode)
+	{
+		TRACE_USBHOST(printf("/!\\ USBHost::DefaultAddressing : Set address failed with code: %lu\r\n", rcode);)
+		addrPool.FreeAddress(bAddress);
+		bAddress = 0;
+		return rcode;
+	}
+
+	return 0;
+}
+
+/**
+ * \brief Release device and free associated resources.
+ *
+ * \param addr USB device address.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::ReleaseDevice(uint32_t addr)
+{
+	if (!addr)
+		return 0;
+
+	for (uint32_t i = 0; i < USB_NUMDEVICES; ++i)
+	{
+		if (devConfig[i]->GetAddress() == addr)
+		{
+			return devConfig[i]->Release();
+		}
+	}
+
+	return 0;
+}
+
+/**
+ * \brief Get device descriptor.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ * \param nbytes Buffer size.
+ * \param dataptr Buffer to store received descriptor.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::getDevDescr(uint32_t addr, uint32_t ep, uint32_t nbytes, uint8_t* dataptr)
+{
+    return (ctrlReq(addr, ep, bmREQ_GET_DESCR, USB_REQUEST_GET_DESCRIPTOR, 0x00, USB_DESCRIPTOR_DEVICE, 0x0000, nbytes, nbytes, dataptr, 0));
+}
+
+/**
+ * \brief Get configuration descriptor.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ * \param nbytes Buffer size.
+ * \param conf Configuration number.
+ * \param dataptr Buffer to store received descriptor.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::getConfDescr(uint32_t addr, uint32_t ep, uint32_t nbytes, uint32_t conf, uint8_t* dataptr)
+{
+	return (ctrlReq(addr, ep, bmREQ_GET_DESCR, USB_REQUEST_GET_DESCRIPTOR, conf, USB_DESCRIPTOR_CONFIGURATION, 0x0000, nbytes, nbytes, dataptr, 0));
+}
+
+/**
+ * \brief Get configuration descriptor and extract endpoints using USBReadParser object.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ * \param conf Configuration number.
+ * \param p USBReadParser object pointer used to extract endpoints.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::getConfDescr(uint32_t addr, uint32_t ep, uint32_t conf, USBReadParser *p)
+{
+	const uint32_t bufSize = 64;
+	uint8_t buf[bufSize];
+
+	uint32_t ret = getConfDescr(addr, ep, 8, conf, buf);
+
+	if (ret)
+		return ret;
+
+	uint32_t total = ((USB_CONFIGURATION_DESCRIPTOR*)buf)->wTotalLength;
+	delay(100);
+
+    return (ctrlReq(addr, ep, bmREQ_GET_DESCR, USB_REQUEST_GET_DESCRIPTOR, conf, USB_DESCRIPTOR_CONFIGURATION, 0x0000, total, bufSize, buf, p));
+}
+
+/**
+ * \brief Get string descriptor.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ * \param nbytes Buffer size.
+ * \param index String index.
+ * \param langid Language ID.
+ * \param dataptr Buffer to store received descriptor.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::getStrDescr(uint32_t addr, uint32_t ep, uint32_t nbytes, uint8_t index, uint16_t langid, uint8_t* dataptr)
+{
+    return (ctrlReq(addr, ep, bmREQ_GET_DESCR, USB_REQUEST_GET_DESCRIPTOR, index, USB_DESCRIPTOR_STRING, langid, nbytes, nbytes, dataptr, 0));
+}
+
+/**
+ * \brief Set USB device address.
+ *
+ * \param oldaddr Current USB device address.
+ * \param ep USB device endpoint number.
+ * \param addr New USB device address to be set.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::setAddr(uint32_t oldaddr, uint32_t ep, uint32_t newaddr)
+{
+	TRACE_USBHOST(printf("   => USBHost::setAddr\r\n");)
+    return ctrlReq(oldaddr, ep, bmREQ_SET, USB_REQUEST_SET_ADDRESS, newaddr, 0x00, 0x0000, 0x0000, 0x0000, 0, 0);
+}
+
+/**
+ * \brief Set configuration.
+ *
+ * \param addr USB device address.
+ * \param ep USB device endpoint number.
+ * \param conf_value New configuration value to be set.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t USBHost::setConf(uint32_t addr, uint32_t ep, uint32_t conf_value)
+{
+    return (ctrlReq(addr, ep, bmREQ_SET, USB_REQUEST_SET_CONFIGURATION, conf_value, 0x00, 0x0000, 0x0000, 0x0000, 0, 0));
+}
+
+/**
+ * \brief USB main task, responsible for enumeration and clean up stage.
+ *
+ * \note Must be periodically called from loop().
+ */
+void USBHost::Task(void)
+{
+	uint32_t rcode = 0;
+	volatile uint32_t tmpdata = 0;
+	static uint32_t delay = 0;
+	uint32_t lowspeed = 0;
+
+    // Update USB task state on Vbus change
+	tmpdata = UHD_GetVBUSState();
+    switch (tmpdata)
+	{
+        case UHD_STATE_ERROR:
+			// Illegal state
+            usb_task_state = USB_DETACHED_SUBSTATE_ILLEGAL;
+			lowspeed = 0;
+            break;
+
+        case UHD_STATE_DISCONNECTED:
+			// Disconnected state
+            if ((usb_task_state & USB_STATE_MASK) != USB_STATE_DETACHED)
+			{
+                usb_task_state = USB_DETACHED_SUBSTATE_INITIALIZE;
+				lowspeed = 0;
+            }
+            break;
+
+        case UHD_STATE_CONNECTED:
+			// Attached state
+            if ((usb_task_state & USB_STATE_MASK) == USB_STATE_DETACHED)
+			{
+                delay = millis() + USB_SETTLE_DELAY;
+                usb_task_state = USB_ATTACHED_SUBSTATE_SETTLE;
+				//FIXME TODO: lowspeed = 0 ou 1;  already done by hardware?
+            }
+            break;
+	}
+
+	// Poll connected devices (if required)
+	for (uint32_t i = 0; i < USB_NUMDEVICES; ++i)
+		if (devConfig[i])
+			rcode = devConfig[i]->Poll();
+
+	// Perform USB enumeration stage and clean up
+    switch (usb_task_state)
+	{
+        case USB_DETACHED_SUBSTATE_INITIALIZE:
+			TRACE_USBHOST(printf(" + USB_DETACHED_SUBSTATE_INITIALIZE\r\n");)
+
+			// Init USB stack and driver
+			UHD_Init();
+            init();
+
+			// Free all USB resources
+			for (uint32_t i = 0; i < USB_NUMDEVICES; ++i)
+				if (devConfig[i])
+					rcode = devConfig[i]->Release();
+
+            usb_task_state = USB_DETACHED_SUBSTATE_WAIT_FOR_DEVICE;
+            break;
+
+        case USB_DETACHED_SUBSTATE_WAIT_FOR_DEVICE:
+			// Nothing to do
+            break;
+
+        case USB_DETACHED_SUBSTATE_ILLEGAL:
+			// Nothing to do
+            break;
+
+        case USB_ATTACHED_SUBSTATE_SETTLE:
+			// Settle time for just attached device
+            if (delay < millis())
+			{
+				TRACE_USBHOST(printf(" + USB_ATTACHED_SUBSTATE_SETTLE\r\n");)
+                usb_task_state = USB_ATTACHED_SUBSTATE_RESET_DEVICE;
+            }
+            break;
+
+        case USB_ATTACHED_SUBSTATE_RESET_DEVICE:
+			TRACE_USBHOST(printf(" + USB_ATTACHED_SUBSTATE_RESET_DEVICE\r\n");)
+
+			// Trigger Bus Reset
+            UHD_BusReset();
+            usb_task_state = USB_ATTACHED_SUBSTATE_WAIT_RESET_COMPLETE;
+            break;
+
+        case USB_ATTACHED_SUBSTATE_WAIT_RESET_COMPLETE:
+            if (Is_uhd_reset_sent())
+			{
+				TRACE_USBHOST(printf(" + USB_ATTACHED_SUBSTATE_WAIT_RESET_COMPLETE\r\n");)
+
+				// Clear Bus Reset flag
+				uhd_ack_reset_sent();
+
+				// Enable Start Of Frame generation
+                uhd_enable_sof();
+
+                usb_task_state = USB_ATTACHED_SUBSTATE_WAIT_SOF;
+
+				// Wait 20ms after Bus Reset (USB spec)
+                delay = millis() + 20;
+            }
+            break;
+
+        case USB_ATTACHED_SUBSTATE_WAIT_SOF:
+			// Wait for SOF received first
+            if (Is_uhd_sof())
+			{
+				if (delay < millis())
+				{
+					TRACE_USBHOST(printf(" + USB_ATTACHED_SUBSTATE_WAIT_SOF\r\n");)
+
+					// 20ms waiting elapsed
+					usb_task_state = USB_STATE_CONFIGURING;
+				}
+            }
+            break;
+
+        case USB_STATE_CONFIGURING:
+			TRACE_USBHOST(printf(" + USB_STATE_CONFIGURING\r\n");)
+			rcode = Configuring(0, 0, lowspeed);
+
+			if (rcode)
+			{
+				TRACE_USBHOST(printf("/!\\ USBHost::Task : USB_STATE_CONFIGURING failed with code: %lu\r\n", rcode);)
+				if (rcode != USB_DEV_CONFIG_ERROR_DEVICE_INIT_INCOMPLETE)
+				{
+					usb_error = rcode;
+					usb_task_state = USB_STATE_ERROR;
+				}
+			}
+			else
+			{
+				usb_task_state = USB_STATE_RUNNING;
+				TRACE_USBHOST(printf(" + USB_STATE_RUNNING\r\n");)
+			}
+            break;
+
+        case USB_STATE_RUNNING:
+            break;
+
+        case USB_STATE_ERROR:
+            break;
+    }
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/Usb.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/Usb.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/Usb.h	(revision 136)
@@ -0,0 +1,230 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+/* USB functions */
+
+#ifndef USB_H_INCLUDED
+#define USB_H_INCLUDED
+
+//#define TRACE_USBHOST(x)	x
+#define TRACE_USBHOST(x)
+
+#include <stdint.h>
+#include "usb_ch9.h"
+#include "address.h"
+
+/* Common setup data constant combinations  */
+#define bmREQ_GET_DESCR     USB_SETUP_DEVICE_TO_HOST|USB_SETUP_TYPE_STANDARD|USB_SETUP_RECIPIENT_DEVICE     // Get descriptor request type
+#define bmREQ_SET           USB_SETUP_HOST_TO_DEVICE|USB_SETUP_TYPE_STANDARD|USB_SETUP_RECIPIENT_DEVICE     // Set request type for all but 'set feature' and 'set interface'
+#define bmREQ_CL_GET_INTF   USB_SETUP_DEVICE_TO_HOST|USB_SETUP_TYPE_CLASS|USB_SETUP_RECIPIENT_INTERFACE     // Get interface request type
+
+// USB Device Classes
+#define USB_CLASS_USE_CLASS_INFO	0x00	// Use Class Info in the Interface Descriptors
+#define USB_CLASS_AUDIO				0x01	// Audio
+#define USB_CLASS_COM_AND_CDC_CTRL	0x02	// Communications and CDC Control
+#define USB_CLASS_HID				0x03	// HID
+#define USB_CLASS_PHYSICAL			0x05	// Physical
+#define USB_CLASS_IMAGE				0x06	// Image
+#define USB_CLASS_PRINTER			0x07	// Printer
+#define USB_CLASS_MASS_STORAGE		0x08	// Mass Storage
+#define USB_CLASS_HUB				0x09	// Hub
+#define USB_CLASS_CDC_DATA			0x0a	// CDC-Data
+#define USB_CLASS_SMART_CARD		0x0b	// Smart-Card
+#define USB_CLASS_CONTENT_SECURITY	0x0d	// Content Security
+#define USB_CLASS_VIDEO				0x0e	// Video
+#define USB_CLASS_PERSONAL_HEALTH	0x0f	// Personal Healthcare
+#define USB_CLASS_DIAGNOSTIC_DEVICE	0xdc	// Diagnostic Device
+#define USB_CLASS_WIRELESS_CTRL		0xe0	// Wireless Controller
+#define USB_CLASS_MISC				0xef	// Miscellaneous
+#define USB_CLASS_APP_SPECIFIC		0xfe	// Application Specific
+#define USB_CLASS_VENDOR_SPECIFIC	0xff	// Vendor Specific
+
+// Additional Error Codes
+#define USB_DEV_CONFIG_ERROR_DEVICE_NOT_SUPPORTED	0xD1
+#define USB_DEV_CONFIG_ERROR_DEVICE_INIT_INCOMPLETE	0xD2
+#define USB_ERROR_UNABLE_TO_REGISTER_DEVICE_CLASS	0xD3
+#define USB_ERROR_OUT_OF_ADDRESS_SPACE_IN_POOL		0xD4
+#define USB_ERROR_HUB_ADDRESS_OVERFLOW				0xD5
+#define USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL			0xD6
+#define USB_ERROR_EPINFO_IS_NULL					0xD7
+#define USB_ERROR_INVALID_ARGUMENT					0xD8
+#define USB_ERROR_CLASS_INSTANCE_ALREADY_IN_USE		0xD9
+#define USB_ERROR_INVALID_MAX_PKT_SIZE				0xDA
+#define USB_ERROR_EP_NOT_FOUND_IN_TBL				0xDB
+#define USB_ERROR_TRANSFER_TIMEOUT					0xFF
+
+#define USB_XFER_TIMEOUT		5000    //USB transfer timeout in milliseconds, per section 9.2.6.1 of USB 2.0 spec
+//#define USB_NAK_LIMIT			32000   //NAK limit for a transfer. 0 means NAKs are not counted
+#define USB_RETRY_LIMIT			3       //retry limit for a transfer
+#define USB_SETTLE_DELAY		200     //settle delay in milliseconds
+
+#define USB_NUMDEVICES			16		//number of USB devices
+//#define HUB_MAX_HUBS			7		// maximum number of hubs that can be attached to the host controller
+#define HUB_PORT_RESET_DELAY	20		// hub port reset delay 10 ms recomended, can be up to 20 ms
+
+/* USB state machine states */
+#define USB_STATE_MASK                                      0xf0
+
+#define USB_STATE_DETACHED                                  0x10
+#define USB_DETACHED_SUBSTATE_INITIALIZE                    0x11
+#define USB_DETACHED_SUBSTATE_WAIT_FOR_DEVICE               0x12
+#define USB_DETACHED_SUBSTATE_ILLEGAL                       0x13
+#define USB_ATTACHED_SUBSTATE_SETTLE                        0x20
+#define USB_ATTACHED_SUBSTATE_RESET_DEVICE                  0x30
+#define USB_ATTACHED_SUBSTATE_WAIT_RESET_COMPLETE           0x40
+#define USB_ATTACHED_SUBSTATE_WAIT_SOF                      0x50
+#define USB_ATTACHED_SUBSTATE_GET_DEVICE_DESCRIPTOR_SIZE    0x60
+#define USB_STATE_ADDRESSING                                0x70
+#define USB_STATE_CONFIGURING                               0x80
+#define USB_STATE_RUNNING                                   0x90
+#define USB_STATE_ERROR                                     0xa0
+#define USB_STATE_MASK                                      0xf0
+
+// USB Setup Packet Structure
+typedef struct
+{
+    union
+	{                          // offset   description
+        uint8_t bmRequestType;         //   0      Bit-map of request type
+        struct
+		{
+            uint8_t    recipient:  5;  //          Recipient of the request
+            uint8_t    type:       2;  //          Type of request
+            uint8_t    direction:  1;  //          Direction of data X-fer
+        };
+    } ReqType_u;
+    uint8_t    bRequest;               //   1      Request
+    union
+	{
+        uint16_t    wValue;             //   2      Depends on bRequest
+        struct
+		{
+			uint8_t    wValueLo;
+			uint8_t    wValueHi;
+        };
+    } wVal_u;
+    uint16_t    wIndex;                 //   4      Depends on bRequest
+    uint16_t    wLength;                //   6      Depends on bRequest
+} SETUP_PKT, *PSETUP_PKT;
+
+/**
+ * \class USBReadParser
+ *
+ * \brief Base class used for USB descriptor parsing.
+ */
+class USBReadParser
+{
+public:
+	virtual void Parse(const uint32_t len, const uint8_t *pbuf, const uint32_t &offset) = 0;
+};
+
+/**
+ * \class USBDeviceConfig
+ *
+ * \brief Device configuration class used for managing device life cycle.
+ */
+class USBDeviceConfig
+{
+public:
+	//! @brief Perform final enumeration stage.
+	virtual uint32_t Init(uint32_t parent, uint32_t port, uint32_t lowspeed) = 0;
+
+	//! @brief Free USB allocated resources (pipes and address).
+	virtual uint32_t Release()		= 0;
+
+	//! @brief Poll USB device. Call is made for each connected USB device on USBHost.task() call.
+	virtual uint32_t Poll()			= 0;
+
+	//! @brief Retrieve USB device address.
+	virtual uint32_t GetAddress()	= 0;
+};
+
+/**
+ * \class USBHost
+ *
+ * \brief Main USB host class.
+ */
+class USBHost
+{
+	AddressPoolImpl<USB_NUMDEVICES>		addrPool;
+	USBDeviceConfig*					devConfig[USB_NUMDEVICES];
+	uint32_t							devConfigIndex;
+	uint32_t							bmHubPre;
+
+    public:
+        USBHost(void);
+
+		//void SetHubPreMask()	{ bmHubPre |= bmHUBPRE; };
+		//void ResetHubPreMask()	{ bmHubPre &= (~bmHUBPRE); };
+
+		AddressPool& GetAddressPool()
+		{
+			return (AddressPool&)addrPool;
+		};
+
+		uint32_t RegisterDeviceClass(USBDeviceConfig *pdev)
+		{
+			for (uint32_t i = 0; i < USB_NUMDEVICES; ++i)
+			{
+				if (!devConfig[i])
+				{
+					devConfig[i] = pdev;
+					return 0;
+				}
+			}
+			return USB_ERROR_UNABLE_TO_REGISTER_DEVICE_CLASS;
+		};
+
+		void ForEachUsbDevice(UsbDeviceHandleFunc pfunc)
+		{
+			addrPool.ForEachUsbDevice(pfunc);
+		};
+
+		uint32_t getUsbTaskState(void);
+        void setUsbTaskState(uint32_t state);
+
+		EpInfo* getEpInfoEntry(uint32_t addr, uint32_t ep);
+		uint32_t setEpInfoEntry(uint32_t addr, uint32_t epcount, EpInfo* eprecord_ptr);
+
+		/* Control requests */
+        uint32_t getDevDescr(uint32_t addr, uint32_t ep, uint32_t nbytes, uint8_t* dataptr);
+        uint32_t getConfDescr(uint32_t addr, uint32_t ep, uint32_t nbytes, uint32_t conf, uint8_t* dataptr);
+		uint32_t getConfDescr(uint32_t addr, uint32_t ep, uint32_t conf, USBReadParser *p);
+		uint32_t getStrDescr(uint32_t addr, uint32_t ep, uint32_t nbytes, uint8_t index, uint16_t langid, uint8_t* dataptr);
+		uint32_t setAddr(uint32_t oldaddr, uint32_t ep, uint32_t newaddr);
+		uint32_t setConf(uint32_t addr, uint32_t ep, uint32_t conf_value);
+		uint32_t ctrlReq(uint32_t addr, uint32_t ep, uint8_t bmReqType, uint8_t bRequest, uint8_t wValLo, uint8_t wValHi,
+						uint16_t wInd, uint16_t total, uint32_t nbytes, uint8_t* dataptr, USBReadParser *p);
+
+        /* Transfer requests */
+        uint32_t inTransfer(uint32_t addr, uint32_t ep, uint32_t *nbytesptr, uint8_t* data);
+		uint32_t outTransfer(uint32_t addr, uint32_t ep, uint32_t nbytes, uint8_t* data);
+        uint32_t dispatchPkt(uint32_t token, uint32_t ep, uint32_t nak_limit);
+
+        void Task(void);
+
+		uint32_t DefaultAddressing(uint32_t parent, uint32_t port, uint32_t lowspeed);
+		uint32_t Configuring(uint32_t parent, uint32_t port, uint32_t lowspeed);
+		uint32_t ReleaseDevice(uint32_t addr);
+
+    private:
+        void init();
+		uint32_t setPipeAddress(uint32_t addr, uint32_t ep, EpInfo **ppep, uint32_t &nak_limit);
+		uint32_t OutTransfer(EpInfo *pep, uint32_t nak_limit, uint32_t nbytes, uint8_t *data);
+		uint32_t InTransfer(EpInfo *pep, uint32_t nak_limit, uint32_t *nbytesptr, uint8_t* data);
+};
+
+#endif /* USB_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/address.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/address.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/address.h	(revision 136)
@@ -0,0 +1,392 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+#ifndef ADDRESS_H_INCLUDED
+#define ADDRESS_H_INCLUDED
+
+#include <stdint.h>
+
+/* NAK powers. To save space in endpoint data structure, amount of retries before giving up and returning 0x4 is stored in */
+/* bmNakPower as a power of 2. The actual nak_limit is then calculated as nak_limit = ( 2^bmNakPower - 1) */
+#define USB_NAK_MAX_POWER		16		//NAK binary order maximum value
+#define USB_NAK_DEFAULT			14		//default 16K-1 NAKs before giving up
+#define USB_NAK_NOWAIT			1		//Single NAK stops transfer
+#define USB_NAK_NONAK			0		//Do not count NAKs, stop retrying after USB Timeout
+
+/**
+ * \brief Device endpoint definition.
+ *
+ * \note hostPipeNum is the allocated pipe used for the communication with
+ * deviceEpNum remote device endpoint.
+ * There is exactly one hostPipeNum corresponding to a deviceEpNum.
+ *
+ * \note The number of host pipe is limited by the hardware (10 on SAM3X).
+ * Moreover hostPipeNum allocation is static, meaning that only a limited
+ * amount of device endpoints can be opened at the same time, thus limitating
+ * the maximum number of connected devices at the same time.
+ */
+struct EpInfo
+{
+	uint32_t		deviceEpNum;					// Device endpoint number
+	uint32_t		hostPipeNum;					// Host corresponding pipe number
+	uint32_t		maxPktSize;						// Maximum packet size
+
+	union
+	{
+		uint8_t		epAttribs;
+
+		struct
+		{
+			uint8_t		bmSndToggle	:	1;		// Send toggle, when zero bmSNDTOG0, bmSNDTOG1 otherwise
+			uint8_t		bmRcvToggle	:	1;		// Send toggle, when zero bmRCVTOG0, bmRCVTOG1 otherwise
+			uint8_t		bmNakPower	:	6;		// Binary order for NAK_LIMIT value
+		};
+	};
+};
+
+/**
+ * \brief USB device address definition.
+ *
+ * \note The 8 bits USB address is defined like this:
+ *
+ *	  7   6   5   4   3   2   1   0
+ *  ---------------------------------
+ *  |   | H | P | P | P | A | A | A |
+ *  ---------------------------------
+ *
+ * H - if 1 the address is a hub address
+ * P - parent hub address
+ * A - device address / port number in case of hub
+ */
+struct UsbDeviceAddress
+{
+	union
+	{
+		struct
+		{
+			uint32_t		bmAddress	: 3;	// device address/port number
+			uint32_t		bmParent	: 3;	// parent hub address
+			uint32_t		bmHub		: 1;	// hub flag
+			uint32_t		bmReserved	: 25;	// reserved, must be zerro
+		};
+		uint32_t	devAddress;
+	};
+};
+
+#define bmUSB_DEV_ADDR_ADDRESS		0x07
+#define bmUSB_DEV_ADDR_PARENT		0x38
+#define bmUSB_DEV_ADDR_HUB			0x40
+
+/**
+ * \brief USB device definition.
+ *
+ * \note epinfo is used to store the list of device endpoints currently used
+ * by the USBHost stack. This field is set during enumeration process when
+ * a supported USB class is found. See any USB classes implementing
+ * USBDeviceConfig and init() method for reference.
+ */
+struct UsbDevice
+{
+	EpInfo			*epinfo;		// endpoint info pointer
+	uint32_t		address;		// address
+	uint32_t		epcount;		// number of endpoints
+	uint32_t		lowspeed;		// indicates if a device is the low speed one
+};
+
+/**
+ * \class Abstract AddressPool definition.
+ */
+class AddressPool
+{
+public:
+	virtual UsbDevice* GetUsbDevicePtr(uint32_t addr) = 0;
+	virtual uint32_t AllocAddress(uint32_t parent, uint32_t is_hub = 0, uint32_t port = 0) = 0;
+	virtual void FreeAddress(uint32_t addr) = 0;
+};
+
+typedef void (*UsbDeviceHandleFunc)(UsbDevice *pdev);
+
+#define ADDR_ERROR_INVALID_INDEX		0xFF
+#define ADDR_ERROR_INVALID_ADDRESS		0xFF
+
+/**
+ * \class AddressPoolImpl definition.
+ * Used to store the list of connected devices and to keep track of free USB
+ * addresses.
+ */
+template <const uint32_t MAX_DEVICES_ALLOWED>
+class AddressPoolImpl : public AddressPool
+{
+private:
+
+	EpInfo dev0ep;						// Endpoint data structure used during enumeration for uninitialized device
+
+	uint32_t hubCounter;				// hub counter is kept
+										// in order to avoid hub address duplication
+
+	UsbDevice thePool[MAX_DEVICES_ALLOWED];
+
+	/**
+	 * \brief Initialize the specified address pool entry.
+	 *
+	 * \param index Index pointing to a UsbDevice instance in the address pool.
+	 */
+	void InitEntry(uint32_t index)
+	{
+		thePool[index].address = 0;
+		thePool[index].epcount = 1;
+		thePool[index].lowspeed = 0;
+		thePool[index].epinfo = &dev0ep;
+	};
+
+	/**
+	 * \brief Return an address pool index for a given  address. This index can
+	 * further be used to retrieve the corresponding USB device instance
+	 * UsbDevice.
+	 *
+	 * \param index Index pointing to a UsbDevice instance in the address pool.
+	 *
+	 * \return Index number if found, 0 otherwise.
+	 * \note Index 0 is reserved for address 0 and shall never be used.
+	 */
+	uint32_t FindAddressIndex(uint32_t address = 0)
+	{
+		for (uint8_t i = 1; i < MAX_DEVICES_ALLOWED; i++)
+		{
+			if (thePool[i].address == address)
+				return i;
+		}
+		return 0;
+	};
+
+	/**
+	 * \brief Return address pool child index for a given parent. This index can
+	 * further be used to retrieve the corresponding USB device instance
+	 * UsbDevice.
+	 *
+	 * \param addr Parent USB address.
+	 * \param start Search in the pool from this index. Calling multiple time
+	 * this function with the returned index + 1 can be used to walk through
+	 * all children.
+	 *
+	 * \return Child index number if found, 0 otherwise.
+	 * \note Index 0 is reserved for address 0 and shall never be used.
+	 */
+	uint32_t FindChildIndex(UsbDeviceAddress addr, uint32_t start = 1)
+	{
+		for (uint32_t i = (start < 1 || start >= MAX_DEVICES_ALLOWED) ? 1 : start; i < MAX_DEVICES_ALLOWED; ++i)
+		{
+			if (((UsbDeviceAddress*)&thePool[i].address)->bmParent == addr.bmAddress)
+				return i;
+		}
+
+		return 0;
+	};
+
+	/**
+	 * \brief Free address entry specified by index parameter.
+	 *
+	 * \note Calling FreeAddressByIndex only frees the USB address for possible
+	 * further assignement. However, it does not free the actual USB resources
+	 * used by the device. This can be made by calling the release() method
+	 * from any UsbDevice class implementing USBDeviceConfig.
+	 *
+	 * \param index Index pointing to a UsbDevice instance in the address pool.
+	 *
+	 * \note Calling FreeAddressByIndex with a 0 index param has no effect.
+	 */
+	void FreeAddressByIndex(uint32_t index)
+	{
+		// Zero field is reserved and should not be affected
+		if (index == 0)
+			return;
+
+		// If a hub was switched off all port addresses should be freed
+		if (((UsbDeviceAddress*)&thePool[index].address)->bmHub == 1)
+		{
+			for (uint32_t i = 1; (i = FindChildIndex(*((UsbDeviceAddress*)&thePool[index].address), i) > 0); )
+				FreeAddressByIndex(i);
+
+			// If the hub had the last allocated address, hubCounter should be decremented
+			if (hubCounter == ((UsbDeviceAddress*)&thePool[index].address)->bmAddress)
+				hubCounter --;
+		}
+
+		InitEntry(index);
+	}
+
+	/**
+	 * \brief Initialize all address poll entries at once.
+	 */
+	void InitAllAddresses()
+	{
+		for (uint32_t i = 1; i < MAX_DEVICES_ALLOWED; i++)
+			InitEntry(i);
+
+		hubCounter = 0;
+	};
+
+public:
+	/**
+	 * \brief AddressPoolImpl class constructor.
+	 */
+	AddressPoolImpl() : hubCounter(0)
+	{
+		// Init address zero (reserved)
+		InitEntry(0);
+
+		// Init all remaing addresses
+		InitAllAddresses();
+
+		// Configure ep0 used for enumeration
+		dev0ep.deviceEpNum = 0;
+		dev0ep.hostPipeNum = 0;
+		dev0ep.maxPktSize = 8;
+	};
+
+	/**
+	 * \brief Get a UsbDevice pointer from a USB device address.
+	 *
+	 * \param addr USB device address.
+	 *
+	 * \return UsbDevice pointer on success, 0 otherwise.
+	 */
+	virtual UsbDevice* GetUsbDevicePtr(uint32_t addr)
+	{
+		if (!addr)
+			return thePool;
+
+		uint32_t index = FindAddressIndex(addr);
+
+		return (!index) ? 0 : (thePool + index);
+	};
+
+	/**
+	 * \brief Perform an operation specified by pfunc for each addressed
+	 * USB device.
+	 *
+	 * \param pfunc Any function pointer with type UsbDeviceHandleFunc.
+	 */
+	void ForEachUsbDevice(UsbDeviceHandleFunc pfunc)
+	{
+		if (!pfunc)
+			return;
+
+		for (uint32_t i = 1; i < MAX_DEVICES_ALLOWED; i++)
+			if (thePool[i].address)
+				pfunc(thePool + i);
+	};
+
+	/**
+	 * \brief Allocate a new USB device address.
+	 *
+	 * \note See UsbDeviceAddress definition for better understanding.
+	 *
+	 * \param parent USB device address of the Parent device.
+	 * \param is_hub Set to true if the corresponding device is a Hub, false
+	 * otherwise.
+	 * \param port USB device base address.
+	 *
+	 * \return UsbDevice pointer on success, 0 otherwise.
+	 */
+	virtual uint32_t AllocAddress(uint32_t parent, uint32_t is_hub = 0, uint32_t port = 0)
+	{
+		if (parent > 127 || port > 7)
+			return 0;
+
+		if (is_hub && hubCounter == 7)
+			return 0;
+
+		// Finds first empty address entry starting from one
+		uint32_t index = FindAddressIndex(0);
+
+		// If empty entry is not found
+		if (!index)
+			return 0;
+
+		if (parent == 0)
+		{
+			if (is_hub)
+			{
+				thePool[index].address = 0x41;
+				hubCounter++;
+			}
+			else
+				thePool[index].address = 1;
+
+			return thePool[index].address;
+		}
+
+		UsbDeviceAddress addr;
+
+		addr.bmParent = ((UsbDeviceAddress*)&parent)->bmAddress;
+
+		if (is_hub)
+		{
+			addr.bmHub		= 1;
+			addr.bmAddress	= hubCounter++;
+		}
+		else
+		{
+			addr.bmHub		= 0;
+			addr.bmAddress	= port;
+		}
+
+		thePool[index].address = *((uint8_t*)&addr);
+
+		return thePool[index].address;
+	};
+
+	/**
+	 * \brief Free the specified USB device address.
+	 *
+	 * \param addr USB device address to free.
+	 */
+	virtual void FreeAddress(uint32_t addr)
+	{
+		// If the root hub is disconnected all the addresses should be initialized
+		if (addr == 0x41)
+		{
+			InitAllAddresses();
+			return;
+		}
+
+		uint32_t index = FindAddressIndex(addr);
+		FreeAddressByIndex(index);
+	};
+
+	// Returns number of hubs attached
+	// It can be rather helpfull to find out if there are hubs attached than getting the exact number of hubs.
+	/*uint32_t GetNumHubs()
+	{
+		return hubCounter;
+	};
+
+	uint32_t GetNumDevices()
+	{
+		uint32_t counter = 0;
+
+		for (uint32_t i = 1; i < MAX_DEVICES_ALLOWED; ++i)
+			if (thePool[i].address != 0);
+				counter++;
+
+		return counter;
+	};*/
+
+};
+
+#endif /* ADDRESS_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/adk.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/adk.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/adk.cpp	(revision 136)
@@ -0,0 +1,405 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+/* Google ADK interface */
+
+#include "adk.h"
+
+const uint32_t ADK::epDataInIndex  = 1;
+const uint32_t ADK::epDataOutIndex = 2;
+
+/**
+ * \brief ADK class constructor.
+ */
+ADK::ADK(USBHost *p, const char* pmanufacturer,
+				const char* pmodel,
+				const char* pdescription,
+				const char* pversion,
+				const char* puri,
+				const char* pserial) :
+		manufacturer(pmanufacturer),
+		model(pmodel),
+		description(pdescription),
+		version(pversion),
+		uri(puri),
+		serial(pserial),
+		pUsb(p),
+		bAddress(0),
+		bNumEP(1),
+		ready(false)
+{
+	// Initialize endpoint data structures
+	for (uint32_t i = 0; i < ADK_MAX_ENDPOINTS; ++i)
+	{
+		epInfo[i].deviceEpNum	= 0;
+		epInfo[i].hostPipeNum	= 0;
+		epInfo[i].maxPktSize	= (i) ? 0 : 8;
+		epInfo[i].epAttribs		= 0;
+		epInfo[i].bmNakPower  	= (i) ? USB_NAK_NOWAIT : USB_NAK_MAX_POWER;
+	}
+
+	// Register in USB subsystem
+	if (pUsb)
+	{
+		pUsb->RegisterDeviceClass(this);
+	}
+}
+
+/**
+ * \brief Initialize connection to an Android Phone.
+ *
+ * \param parent USB device address of the Parent device.
+ * \param port USB device base address.
+ * \param lowspeed USB device speed.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t ADK::Init(uint32_t parent, uint32_t port, uint32_t lowspeed)
+{
+
+	uint8_t		buf[sizeof(USB_DEVICE_DESCRIPTOR)];
+	uint32_t	rcode = 0;
+	UsbDevice	*p = NULL;
+	EpInfo		*oldep_ptr = NULL;
+	uint32_t 	adkproto = -1;
+	uint32_t	num_of_conf = 0;
+
+	// Get memory address of USB device address pool
+	AddressPool	&addrPool = pUsb->GetAddressPool();
+
+	TRACE_USBHOST(printf("ADK::Init\r\n");)
+
+    // Check if address has already been assigned to an instance
+    if (bAddress)
+	{
+		return USB_ERROR_CLASS_INSTANCE_ALREADY_IN_USE;
+	}
+
+    // Get pointer to pseudo device with address 0 assigned
+	p = addrPool.GetUsbDevicePtr(0);
+
+	if (!p)
+	{
+		return USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL;
+    }
+
+	if (!p->epinfo)
+	{
+		return USB_ERROR_EPINFO_IS_NULL;
+	}
+
+	// Save old pointer to EP_RECORD of address 0
+	oldep_ptr = p->epinfo;
+
+	// Temporary assign new pointer to epInfo to p->epinfo in order to avoid toggle inconsistence
+	p->epinfo = epInfo;
+
+	p->lowspeed = lowspeed;
+
+	// Get device descriptor
+	rcode = pUsb->getDevDescr(0, 0, sizeof(USB_DEVICE_DESCRIPTOR), (uint8_t*)buf);
+
+	// Restore p->epinfo
+	p->epinfo = oldep_ptr;
+
+	if (rcode)
+	{
+		goto FailGetDevDescr;
+	}
+
+	// Allocate new address according to device class
+	bAddress = addrPool.AllocAddress(parent, false, port);
+
+	// Extract Max Packet Size from device descriptor
+	epInfo[0].maxPktSize = (uint8_t)((USB_DEVICE_DESCRIPTOR*)buf)->bMaxPacketSize0;
+
+	// Assign new address to the device
+	rcode = pUsb->setAddr(0, 0, bAddress);
+	if (rcode)
+	{
+		p->lowspeed = false;
+		addrPool.FreeAddress(bAddress);
+		bAddress = 0;
+		TRACE_USBHOST(printf("ADK::Init : setAddr failed with rcode %lu\r\n", rcode);)
+		return rcode;
+	}
+
+	TRACE_USBHOST(printf("ADK::Init : device address is now %lu\r\n", bAddress);)
+
+	p->lowspeed = false;
+
+	//get pointer to assigned address record
+	p = addrPool.GetUsbDevicePtr(bAddress);
+	if (!p)
+	{
+		return USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL;
+	}
+
+	p->lowspeed = lowspeed;
+
+	// Assign epInfo to epinfo pointer - only EP0 is known
+	rcode = pUsb->setEpInfoEntry(bAddress, 1, epInfo);
+	if (rcode)
+	{
+		goto FailSetDevTblEntry;
+	}
+
+	// Check if ADK device is already in accessory mode; if yes, configure and exit
+	if (((USB_DEVICE_DESCRIPTOR*)buf)->idVendor == ADK_VID &&
+		(((USB_DEVICE_DESCRIPTOR*)buf)->idProduct == ADK_PID || ((USB_DEVICE_DESCRIPTOR*)buf)->idProduct == ADB_PID))
+	{
+		TRACE_USBHOST(printf("ADK::Init : Accessory mode device detected\r\n");)
+
+		/* Go through configurations, find first bulk-IN, bulk-OUT EP, fill epInfo and quit */
+		num_of_conf = ((USB_DEVICE_DESCRIPTOR*)buf)->bNumConfigurations;
+
+		TRACE_USBHOST(printf("ADK::Init : number of configuration is %lu\r\n", num_of_conf);)
+
+		for (uint32_t i = 0; i < num_of_conf; ++i)
+		{
+			ConfigDescParser<0, 0, 0, 0> confDescrParser(this);
+
+			delay(1);
+			rcode = pUsb->getConfDescr(bAddress, 0, i, &confDescrParser);
+
+#if defined(XOOM)
+			//Added by Jaylen Scott Vanorden
+			if (rcode)
+			{
+				TRACE_USBHOST(printf("ADK::Init : Got 1st bad code for config: %lu\r\n", rcode);)
+
+				// Try once more
+				rcode = pUsb->getConfDescr(bAddress, 0, i, &confDescrParser);
+			}
+#endif
+
+			if (rcode)
+			{
+				goto FailGetConfDescr;
+			}
+
+			if (bNumEP > 2)
+			{
+				break;
+			}
+		}
+
+		if (bNumEP == 3)
+		{
+			// Assign epInfo to epinfo pointer - this time all 3 endpoins
+			rcode = pUsb->setEpInfoEntry(bAddress, 3, epInfo);
+			if (rcode)
+			{
+				goto FailSetDevTblEntry;
+			}
+		}
+
+		// Set Configuration Value
+		rcode = pUsb->setConf(bAddress, 0, bConfNum);
+		if (rcode)
+		{
+			goto FailSetConf;
+		}
+
+		TRACE_USBHOST(printf("ADK::Init : ADK device configured successfully\r\n");)
+		ready = true;
+
+		return 0;
+	}
+
+	// Probe device - get accessory protocol revision
+	delay(1);
+	rcode = getProto((uint8_t*)&adkproto);
+
+#if defined(XOOM)
+	// Added by Jaylen Scott Vanorden
+	if (rcode)
+	{
+		TRACE_USBHOST(printf("ADK::Init : Got 1st bad code for config: %lu\r\n", rcode);)
+
+		// Try once more
+		rcode = getProto((uint8_t*)&adkproto );
+	}
+#endif
+
+	if (rcode)
+	{
+		goto FailGetProto;
+	}
+	TRACE_USBHOST(printf("ADK::Init : DK protocol rev. %lu", adkproto);)
+
+	// Send ID strings
+	sendStr(ACCESSORY_STRING_MANUFACTURER, manufacturer);
+	sendStr(ACCESSORY_STRING_MODEL, model);
+	sendStr(ACCESSORY_STRING_DESCRIPTION, description);
+	sendStr(ACCESSORY_STRING_VERSION, version);
+	sendStr(ACCESSORY_STRING_URI, uri);
+	sendStr(ACCESSORY_STRING_SERIAL, serial);
+
+	// Switch to accessory mode
+	// The Android phone will reset
+	rcode = switchAcc();
+	if (rcode)
+	{
+		goto FailSwAcc;
+	}
+	rcode = -1;
+	goto SwAttempt;   // Switch to accessory mode
+
+	// Diagnostic messages
+FailGetDevDescr:
+	TRACE_USBHOST(printf("ADK::Init getDevDescr : ");)
+	goto Fail;
+
+FailSetDevTblEntry:
+	TRACE_USBHOST(printf("ADK::Init setDevTblEn : ");)
+	goto Fail;
+
+FailGetProto:
+	TRACE_USBHOST(printf("ADK::Init getProto : ");)
+	goto Fail;
+
+FailSwAcc:
+	TRACE_USBHOST(printf("ADK::Init swAcc : ");)
+	goto Fail;
+
+SwAttempt:
+	TRACE_USBHOST(printf("ADK::Init Accessory mode switch attempt : ");)
+	goto Fail;
+
+FailGetConfDescr:
+	TRACE_USBHOST(printf("ADK::Init getConf : ");)
+	goto Fail;
+
+FailSetConf:
+	TRACE_USBHOST(printf("ADK::Init setConf : ");)
+	goto Fail;
+
+Fail:
+	TRACE_USBHOST(printf("error code: %lu\r\n", rcode);)
+	Release();
+	return rcode;
+}
+
+/**
+ * \brief Extract bulk-IN and bulk-OUT endpoint information from configuration
+ * descriptor.
+ *
+ * \param conf Configuration number.
+ * \param iface Interface number.
+ * \param alt Alternate setting.
+ * \param proto Protocol version used.
+ * \param pep Pointer to endpoint descriptor.
+ */
+void ADK::EndpointXtract(uint32_t conf, uint32_t iface, uint32_t alt, uint32_t proto, const USB_ENDPOINT_DESCRIPTOR *pep)
+{
+	if (bNumEP == 3)
+	{
+		return;
+	}
+
+	bConfNum = conf;
+
+	uint32_t index = 0;
+	uint32_t pipe = 0;
+
+	if ((pep->bmAttributes & 0x02) == 2)
+	{
+		index = ((pep->bEndpointAddress & 0x80) == 0x80) ? epDataInIndex : epDataOutIndex;
+	}
+
+	// Fill in the endpoint info structure
+	epInfo[index].deviceEpNum = pep->bEndpointAddress & 0x0F;
+	epInfo[index].maxPktSize = pep->wMaxPacketSize;
+
+	TRACE_USBHOST(printf("ADK::EndpointXtract : Found new endpoint\r\n");)
+	TRACE_USBHOST(printf("ADK::EndpointXtract : deviceEpNum: %lu\r\n", epInfo[index].deviceEpNum);)
+	TRACE_USBHOST(printf("ADK::EndpointXtract : maxPktSize: %lu\r\n", epInfo[index].maxPktSize);)
+	TRACE_USBHOST(printf("ADK::EndpointXtract : index: %lu\r\n", index);)
+
+	if (index == epDataInIndex)
+		pipe = UHD_Pipe_Alloc(bAddress, epInfo[index].deviceEpNum, UOTGHS_HSTPIPCFG_PTYPE_BLK, UOTGHS_HSTPIPCFG_PTOKEN_IN, epInfo[index].maxPktSize, 0, UOTGHS_HSTPIPCFG_PBK_1_BANK);
+	else if (index == epDataOutIndex)
+		pipe = UHD_Pipe_Alloc(bAddress, epInfo[index].deviceEpNum, UOTGHS_HSTPIPCFG_PTYPE_BLK, UOTGHS_HSTPIPCFG_PTOKEN_OUT, epInfo[index].maxPktSize, 0, UOTGHS_HSTPIPCFG_PBK_1_BANK);
+
+	// Ensure pipe allocation is okay
+	if (pipe == 0)
+	{
+		TRACE_USBHOST(printf("ADK::EndpointXtract : Pipe allocation failure\r\n");)
+		// Enumeration failed, so user should not perform write/read since isConnected will return false
+		return;
+	}
+
+	epInfo[index].hostPipeNum = pipe;
+
+	bNumEP++;
+}
+
+/**
+ * \brief Release USB allocated resources (pipes and address).
+ *
+ * \note Release call is made from USBHost.task() on disconnection events.
+ * \note Release call is made from Init() on enumeration failure.
+ *
+ * \return Always 0.
+ */
+uint32_t ADK::Release()
+{
+	// Free allocated host pipes
+	UHD_Pipe_Free(epInfo[epDataInIndex].hostPipeNum);
+	UHD_Pipe_Free(epInfo[epDataOutIndex].hostPipeNum);
+
+	// Free allocated USB address
+	pUsb->GetAddressPool().FreeAddress(bAddress);
+
+	// Must have to be reset to 1
+	bNumEP = 1;
+
+	bAddress = 0;
+	ready = false;
+
+	return 0;
+}
+
+/**
+ * \brief Read from ADK.
+ *
+ * \param nreadbytes Return value containing the number of read bytes.
+ * \param datalen Buffer length.
+ * \param dataptr Buffer to store the incoming data.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t ADK::read(uint32_t *nreadbytes, uint32_t datalen, uint8_t *dataptr)
+{
+	*nreadbytes = datalen;
+	return pUsb->inTransfer(bAddress, epInfo[epDataInIndex].deviceEpNum, nreadbytes, dataptr);
+}
+
+/**
+ * \brief Write to ADK.
+ *
+ * \param datalen Amount of data to send. This parameter shall not exceed
+ * dataptr length.
+ * \param dataptr Buffer containing the data to be sent.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t ADK::write(uint32_t datalen, uint8_t *dataptr)
+{
+	return pUsb->outTransfer(bAddress, epInfo[epDataOutIndex].deviceEpNum, datalen, dataptr);
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/adk.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/adk.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/adk.h	(revision 136)
@@ -0,0 +1,150 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+/* Google ADK interface support header */
+
+#ifndef ADK_H_INCLUDED
+#define ADK_H_INCLUDED
+
+#include <stdint.h>
+#include "usb_ch9.h"
+#include "Usb.h"
+#include "hid.h"
+#include "Arduino.h"
+#include "confdescparser.h"
+
+#define ADK_VID   0x18D1
+#define ADK_PID   0x2D00
+#define ADB_PID   0x2D01
+
+#define XOOM  //enables repeating getProto() and getConf() attempts
+              //necessary for slow devices such as Motorola XOOM
+              //defined by default, can be commented out to save memory
+
+/* Requests */
+
+#define ADK_GETPROTO      51  //check USB accessory protocol version
+#define ADK_SENDSTR       52  //send identifying string
+#define ADK_ACCSTART      53  //start device in accessory mode
+
+#define bmREQ_ADK_GET     USB_SETUP_DEVICE_TO_HOST|USB_SETUP_TYPE_VENDOR|USB_SETUP_RECIPIENT_DEVICE
+#define bmREQ_ADK_SEND    USB_SETUP_HOST_TO_DEVICE|USB_SETUP_TYPE_VENDOR|USB_SETUP_RECIPIENT_DEVICE
+
+#define ACCESSORY_STRING_MANUFACTURER   0
+#define ACCESSORY_STRING_MODEL          1
+#define ACCESSORY_STRING_DESCRIPTION    2
+#define ACCESSORY_STRING_VERSION        3
+#define ACCESSORY_STRING_URI            4
+#define ACCESSORY_STRING_SERIAL         5
+
+#define ADK_MAX_ENDPOINTS 3 //endpoint 0, bulk_IN, bulk_OUT
+
+/**
+ * \class ADK definition.
+ */
+class ADK : public USBDeviceConfig, public UsbConfigXtracter
+{
+private:
+	/* ID strings */
+	const char* manufacturer;
+	const char* model;
+	const char* description;
+	const char* version;
+	const char* uri;
+	const char* serial;
+
+	/* ADK proprietary requests */
+	uint32_t getProto(uint8_t* adkproto);
+	uint32_t sendStr(uint32_t index, const char* str);
+	uint32_t switchAcc(void);
+
+protected:
+	static const uint32_t epDataInIndex;			// DataIn endpoint index
+	static const uint32_t epDataOutIndex;			// DataOUT endpoint index
+
+	/* Mandatory members */
+	USBHost		*pUsb;
+	uint32_t	bAddress;							// Device USB address
+	uint32_t	bConfNum;							// configuration number
+
+	uint32_t	bNumEP;								// total number of EP in the configuration
+	bool		ready;
+
+	/* Endpoint data structure describing the device EP */
+	EpInfo		epInfo[ADK_MAX_ENDPOINTS];
+
+public:
+	ADK(USBHost *pUsb, const char* pmanufacturer,
+                  const char* pmodel,
+                  const char* pdescription,
+                  const char* pversion,
+                  const char* puri,
+                  const char* pserial);
+
+	// Methods for receiving and sending data
+	uint32_t read(uint32_t *nreadbytes, uint32_t datalen, uint8_t *dataptr);
+	uint32_t write(uint32_t datalen, uint8_t *dataptr);
+
+
+	// USBDeviceConfig implementation
+	virtual uint32_t Init(uint32_t parent, uint32_t port, uint32_t lowspeed);
+	virtual uint32_t Release();
+	virtual uint32_t Poll() { return 0; };	// not implemented
+	virtual uint32_t GetAddress() { return bAddress; };
+	virtual bool isReady() { return ready; };
+
+	// UsbConfigXtracter implementation
+	virtual void EndpointXtract(uint32_t conf, uint32_t iface, uint32_t alt, uint32_t proto, const USB_ENDPOINT_DESCRIPTOR *ep);
+};
+
+/**
+ * \brief Get ADK protocol version.
+ *
+ * \param adkproto Empty buffer to be filled by getProto (2 bytes) with the ADK
+ * protocol version value.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+inline uint32_t ADK::getProto(uint8_t* adkproto)
+{
+	return (pUsb->ctrlReq(bAddress, 0, bmREQ_ADK_GET, ADK_GETPROTO, 0, 0, 0, 2, 2, adkproto, NULL));
+}
+
+/**
+ * \brief Send ADK string.
+ *
+ * \param index String index.
+ * \param str String to send.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+inline uint32_t ADK::sendStr(uint32_t index, const char* str)
+{
+	return (pUsb->ctrlReq(bAddress, 0, bmREQ_ADK_SEND, ADK_SENDSTR, 0, 0, index, strlen(str) + 1, strlen(str) + 1, (uint8_t*)str, NULL));
+}
+
+/**
+ * \brief Send a switch to accessory mode request.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+inline uint32_t ADK::switchAcc(void)
+{
+	return (pUsb->ctrlReq(bAddress, 0, bmREQ_ADK_SEND, ADK_ACCSTART, 0, 0, 0, 0, 0, NULL, NULL));
+}
+
+#endif /* ADK_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/confdescparser.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/confdescparser.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/confdescparser.h	(revision 136)
@@ -0,0 +1,241 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+#ifndef CONFDESCPARSER_H_INCLUDED
+#define CONFDESCPARSER_H_INCLUDED
+
+#include <stdint.h>
+#include "parsetools.h"
+
+/**
+ * \class Abstract UsbConfigXtracter definition.
+ *
+ * \note This class is used for extracting USB endpoint descriptors.
+ */
+class UsbConfigXtracter
+{
+public:
+	virtual void EndpointXtract(uint32_t conf, uint32_t iface, uint32_t alt, uint32_t proto, const USB_ENDPOINT_DESCRIPTOR *ep) = 0;
+};
+
+#define CP_MASK_COMPARE_CLASS			1
+#define CP_MASK_COMPARE_SUBCLASS		2
+#define CP_MASK_COMPARE_PROTOCOL		4
+#define CP_MASK_COMPARE_ALL				7
+
+/**
+ * \class ConfigDescParser definition.
+ *
+ * \note This class is used for parsing configuration descriptors.
+ */
+template <const uint8_t CLASS_ID, const uint8_t SUBCLASS_ID, const uint8_t PROTOCOL_ID, const uint8_t MASK>
+class ConfigDescParser : public USBReadParser
+{
+	UsbConfigXtracter		*theXtractor;
+    MultiValueBuffer		theBuffer;
+	MultiByteValueParser	valParser;
+	ByteSkipper				theSkipper;
+	uint8_t					varBuffer[16 /*sizeof(USB_CONFIGURATION_DESCRIPTOR)*/];
+
+	uint32_t				stateParseDescr;	// ParseDescriptor state
+
+	uint32_t				dscrLen;			// Descriptor length
+	uint32_t				dscrType;			// Descriptor type
+
+	bool					isGoodInterface;	// Apropriate interface flag
+	uint32_t				confValue;			// Configuration value
+	uint32_t				protoValue;			// Protocol value
+	uint32_t				ifaceNumber;		// Interface number
+	uint32_t				ifaceAltSet;		// Interface alternate settings
+
+	bool ParseDescriptor(uint8_t **pp, uint32_t *pcntdn);
+
+	void PrintHidDescriptor(const USB_HID_DESCRIPTOR *pDesc);
+
+public:
+	ConfigDescParser(UsbConfigXtracter *xtractor);
+	virtual void Parse(const uint32_t len, const uint8_t *pbuf, const uint32_t &offset);
+};
+
+/**
+ * \brief ConfigDescParser class constructor.
+ *
+ * \param xtractor Is saved as ConfigDescParser attribute and later used as a
+ * callback for parsing the endpoint descriptors.
+ *
+ * \note During enumeration stage, all supported USB classes invoke
+ * ConfigDescParser with "this" as parameter, meaning that one class is also
+ * responsible for parsing its endpoint descriptors. This makes sense since
+ * each USB class handles different number of endpoints and configurations.
+ * For instance see ADK::Init from ADK class.
+ */
+template <const uint8_t CLASS_ID, const uint8_t SUBCLASS_ID, const uint8_t PROTOCOL_ID, const uint8_t MASK>
+ConfigDescParser<CLASS_ID, SUBCLASS_ID, PROTOCOL_ID, MASK>::ConfigDescParser(UsbConfigXtracter *xtractor) :
+	theXtractor(xtractor),
+	stateParseDescr(0),
+	dscrLen(0),
+	dscrType(0)
+{
+	theBuffer.pValue = varBuffer;
+	valParser.Initialize(&theBuffer);
+	theSkipper.Initialize(&theBuffer);
+};
+
+/**
+ * \brief Parse a complete USB configuration descriptor.
+ *
+ * \param len Buffer length.
+ * \param pbuf Buffer containing the configuration descriptor.
+ * \param offset Current offset position.
+ */
+template <const uint8_t CLASS_ID, const uint8_t SUBCLASS_ID, const uint8_t PROTOCOL_ID, const uint8_t MASK>
+void ConfigDescParser<CLASS_ID, SUBCLASS_ID, PROTOCOL_ID, MASK>::Parse(const uint32_t len, const uint8_t *pbuf, const uint32_t &offset)
+{
+	uint32_t	cntdn	= len;
+	uint8_t		*p		= (uint8_t*)pbuf;
+
+	while (cntdn)
+		if (!ParseDescriptor(&p, &cntdn))
+			return;
+}
+
+/**
+ * \brief Parse a USB configuration descriptor.
+ * Takes values for class, subclass, protocol fields in interface descriptor
+ * and compare masks for them. When the match is found, calls EndpointXtract
+ * passing buffer containing endpoint descriptor.
+ *
+ * \note This method should not be called directly, use Parse() instead.
+ *
+ * \param pcntdn Buffer length.
+ * \param pp Buffer containing the configuration descriptor.
+ *
+ * \return true if data remains in the buffer for parsing, false otherwise.
+ */
+template <const uint8_t CLASS_ID, const uint8_t SUBCLASS_ID, const uint8_t PROTOCOL_ID, const uint8_t MASK>
+bool ConfigDescParser<CLASS_ID, SUBCLASS_ID, PROTOCOL_ID, MASK>::ParseDescriptor(uint8_t **pp, uint32_t *pcntdn)
+{
+	switch (stateParseDescr)
+	{
+		case 0:
+			theBuffer.valueSize = 2;
+			valParser.Initialize(&theBuffer);
+			stateParseDescr		= 1;
+		case 1:
+			if (!valParser.Parse(pp, pcntdn))
+				return false;
+			dscrLen			= *((uint8_t*)theBuffer.pValue);
+			dscrType		= *((uint8_t*)theBuffer.pValue + 1);
+			stateParseDescr	= 2;
+		case 2:
+			// This is a sort of hack. Assuming that two bytes are already in the buffer
+			//	the pointer is positioned two bytes ahead in order for the rest of descriptor
+			//	to be read right after the size and the type fields.
+			// This should be used carefuly. varBuffer should be used directly to handle data
+			//	in the buffer.
+			theBuffer.pValue	= varBuffer + 2;
+			stateParseDescr		= 3;
+		case 3:
+			switch (dscrType)
+			{
+				case USB_DESCRIPTOR_INTERFACE:
+					isGoodInterface = false;
+				case USB_DESCRIPTOR_CONFIGURATION:
+					theBuffer.valueSize = sizeof(USB_CONFIGURATION_DESCRIPTOR) - 2;
+					break;
+				case USB_DESCRIPTOR_ENDPOINT:
+					theBuffer.valueSize = sizeof(USB_ENDPOINT_DESCRIPTOR) - 2;
+					break;
+				case HID_DESCRIPTOR_HID:
+					theBuffer.valueSize = dscrLen - 2;
+					break;
+			}
+			valParser.Initialize(&theBuffer);
+			stateParseDescr		= 4;
+		case 4:
+			switch (dscrType)
+			{
+				case USB_DESCRIPTOR_CONFIGURATION:
+					if (!valParser.Parse(pp, pcntdn))
+						return false;
+					confValue = ((USB_CONFIGURATION_DESCRIPTOR*)varBuffer)->bConfigurationValue;
+					break;
+				case USB_DESCRIPTOR_INTERFACE:
+					if (!valParser.Parse(pp, pcntdn))
+						return false;
+					if ((MASK & CP_MASK_COMPARE_CLASS) && ((USB_INTERFACE_DESCRIPTOR*)varBuffer)->bInterfaceClass != CLASS_ID)
+						break;
+					if ((MASK & CP_MASK_COMPARE_SUBCLASS) && ((USB_INTERFACE_DESCRIPTOR*)varBuffer)->bInterfaceSubClass != SUBCLASS_ID)
+						break;
+					if ((MASK & CP_MASK_COMPARE_PROTOCOL) && ((USB_INTERFACE_DESCRIPTOR*)varBuffer)->bInterfaceProtocol != PROTOCOL_ID)
+						break;
+
+					isGoodInterface = true;
+					ifaceNumber = ((USB_INTERFACE_DESCRIPTOR*)varBuffer)->bInterfaceNumber;
+					ifaceAltSet = ((USB_INTERFACE_DESCRIPTOR*)varBuffer)->bAlternateSetting;
+					protoValue  = ((USB_INTERFACE_DESCRIPTOR*)varBuffer)->bInterfaceProtocol;
+					break;
+				case USB_DESCRIPTOR_ENDPOINT:
+					if (!valParser.Parse(pp, pcntdn))
+						return false;
+					if (isGoodInterface)
+						if (theXtractor)
+							theXtractor->EndpointXtract(confValue, ifaceNumber, ifaceAltSet, protoValue, (USB_ENDPOINT_DESCRIPTOR*)varBuffer);
+					break;
+				//case HID_DESCRIPTOR_HID:
+				//	if (!valParser.Parse(pp, pcntdn))
+				//		return false;
+				//	PrintHidDescriptor((const USB_HID_DESCRIPTOR*)varBuffer);
+				//	break;
+				default:
+					if (!theSkipper.Skip(pp, pcntdn, dscrLen - 2))
+						return false;
+			}
+			theBuffer.pValue = varBuffer;
+			stateParseDescr = 0;
+	}
+	return true;
+}
+
+/**
+ * \brief Print HID descriptor.
+ *
+ * \note TRACE_USBHOST macro must be enabled. See Usb.h for reference.
+ *
+ * \param pDesc Pointer to HID descriptor.
+ */
+template <const uint8_t CLASS_ID, const uint8_t SUBCLASS_ID, const uint8_t PROTOCOL_ID, const uint8_t MASK>
+void ConfigDescParser<CLASS_ID, SUBCLASS_ID, PROTOCOL_ID, MASK>::PrintHidDescriptor(const USB_HID_DESCRIPTOR *pDesc)
+{
+	TRACE_USBHOST(printf("ConfigDescParser::PrintHidDescriptor : bDescLength: %d\r\n", pDesc->bLength);)
+	TRACE_USBHOST(printf("ConfigDescParser::PrintHidDescriptor : bDescriptorType: %d\r\n", pDesc->bDescriptorType);)
+	TRACE_USBHOST(printf("ConfigDescParser::PrintHidDescriptor : bcdHID: %d\r\n", pDesc->bcdHID);)
+	TRACE_USBHOST(printf("ConfigDescParser::PrintHidDescriptor : bCountryCode: %d\r\n", pDesc->bCountryCode);)
+	TRACE_USBHOST(printf("ConfigDescParser::PrintHidDescriptor : bNumDescriptors: %d\r\n", pDesc->bNumDescriptors);)
+	TRACE_USBHOST(printf("ConfigDescParser::PrintHidDescriptor : bDescrType: %d\r\n", pDesc->bDescrType);)
+	TRACE_USBHOST(printf("ConfigDescParser::PrintHidDescriptor : wDescriptorLength: %d\r\n", pDesc->wDescriptorLength);)
+
+	for (uint32_t i = 0; i < pDesc->bNumDescriptors; ++i)
+	{
+		HID_CLASS_DESCRIPTOR_LEN_AND_TYPE	*pLT = (HID_CLASS_DESCRIPTOR_LEN_AND_TYPE*)&(pDesc->bDescrType);
+
+		TRACE_USBHOST(printf("ConfigDescParser::PrintHidDescriptor : bDescrType: %d\r\n", pLT[i].bDescrType);)
+		TRACE_USBHOST(printf("ConfigDescParser::PrintHidDescriptor : wDescriptorLength: %d\r\n", pLT[i].wDescriptorLength);)
+	}
+}
+
+#endif /* CONFDESCPARSER_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hid.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hid.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hid.h	(revision 136)
@@ -0,0 +1,202 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+#ifndef HID_H_INCLUDED
+#define HID_H_INCLUDED
+
+#include <stdint.h>
+#include "usb_ch9.h"
+#include "Usb.h"
+#include "Arduino.h"
+#include "confdescparser.h"
+#include "hidusagestr.h"
+
+#define DATA_SIZE_MASK           0x03
+#define TYPE_MASK                0x0C
+#define TAG_MASK                 0xF0
+
+#define DATA_SIZE_0              0x00
+#define DATA_SIZE_1              0x01
+#define DATA_SIZE_2              0x02
+#define DATA_SIZE_4              0x03
+
+#define TYPE_MAIN                0x00
+#define TYPE_GLOBAL              0x04
+#define TYPE_LOCAL               0x08
+
+#define TAG_MAIN_INPUT           0x80
+#define TAG_MAIN_OUTPUT          0x90
+#define TAG_MAIN_COLLECTION      0xA0
+#define TAG_MAIN_FEATURE         0xB0
+#define TAG_MAIN_ENDCOLLECTION   0xC0
+
+#define TAG_GLOBAL_USAGEPAGE     0x00
+#define TAG_GLOBAL_LOGICALMIN    0x10
+#define TAG_GLOBAL_LOGICALMAX    0x20
+#define TAG_GLOBAL_PHYSMIN       0x30
+#define TAG_GLOBAL_PHYSMAX       0x40
+#define TAG_GLOBAL_UNITEXP       0x50
+#define TAG_GLOBAL_UNIT          0x60
+#define TAG_GLOBAL_REPORTSIZE    0x70
+#define TAG_GLOBAL_REPORTID      0x80
+#define TAG_GLOBAL_REPORTCOUNT   0x90
+#define TAG_GLOBAL_PUSH          0xA0
+#define TAG_GLOBAL_POP           0xB0
+
+#define TAG_LOCAL_USAGE          0x00
+#define TAG_LOCAL_USAGEMIN       0x10
+#define TAG_LOCAL_USAGEMAX       0x20
+
+/* HID requests */
+#define bmREQ_HIDOUT        USB_SETUP_HOST_TO_DEVICE|USB_SETUP_TYPE_CLASS|USB_SETUP_RECIPIENT_INTERFACE
+#define bmREQ_HIDIN         USB_SETUP_DEVICE_TO_HOST|USB_SETUP_TYPE_CLASS|USB_SETUP_RECIPIENT_INTERFACE
+#define bmREQ_HIDREPORT     USB_SETUP_DEVICE_TO_HOST|USB_SETUP_TYPE_STANDARD|USB_SETUP_RECIPIENT_INTERFACE
+
+/* HID constants. Not part of chapter 9 */
+/* Class-Specific Requests */
+#define HID_REQUEST_GET_REPORT      0x01
+#define HID_REQUEST_GET_IDLE        0x02
+#define HID_REQUEST_GET_PROTOCOL    0x03
+#define HID_REQUEST_SET_REPORT      0x09
+#define HID_REQUEST_SET_IDLE        0x0A
+#define HID_REQUEST_SET_PROTOCOL    0x0B
+
+/* Class Descriptor Types */
+#define HID_DESCRIPTOR_HID			0x21
+#define HID_DESCRIPTOR_REPORT		0x22
+#define HID_DESRIPTOR_PHY			0x23
+
+/* Protocol Selection */
+#define HID_BOOT_PROTOCOL			0x00
+#define HID_RPT_PROTOCOL			0x01
+
+/* HID Interface Class Code */
+#define HID_INTF                    0x03
+
+/* HID Interface Class SubClass Codes */
+#define HID_BOOT_INTF_SUBCLASS      0x01
+
+/* HID Interface Class Protocol Codes */
+#define HID_PROTOCOL_NONE           0x00
+#define HID_PROTOCOL_KEYBOARD       0x01
+#define HID_PROTOCOL_MOUSE          0x02
+
+/**
+ * \brief HidItemPrefix definition.
+ */
+struct HidItemPrefix				// Not used
+{
+	uint8_t		bSize : 2;
+	uint8_t		bType : 2;
+	uint8_t		bTag  : 4;
+};
+
+#define HID_ITEM_TYPE_MAIN							0
+#define HID_ITEM_TYPE_GLOBAL						1
+#define HID_ITEM_TYPE_LOCAL							2
+#define HID_ITEM_TYPE_RESERVED						3
+
+#define HID_LONG_ITEM_PREFIX						0xfe		// Long item prefix value
+
+#define bmHID_MAIN_ITEM_TAG							0xfc		// Main item tag mask
+
+#define bmHID_MAIN_ITEM_INPUT						0x80		// Main item Input tag value
+#define bmHID_MAIN_ITEM_OUTPUT						0x90		// Main item Output tag value
+#define bmHID_MAIN_ITEM_FEATURE						0xb0		// Main item Feature tag value
+#define bmHID_MAIN_ITEM_COLLECTION					0xa0		// Main item Collection tag value
+#define bmHID_MAIN_ITEM_END_COLLECTION				0xce		// Main item End Collection tag value
+
+#define HID_MAIN_ITEM_COLLECTION_PHYSICAL			0
+#define HID_MAIN_ITEM_COLLECTION_APPLICATION		1
+#define HID_MAIN_ITEM_COLLECTION_LOGICAL			2
+#define HID_MAIN_ITEM_COLLECTION_REPORT				3
+#define HID_MAIN_ITEM_COLLECTION_NAMED_ARRAY		4
+#define HID_MAIN_ITEM_COLLECTION_USAGE_SWITCH		5
+#define HID_MAIN_ITEM_COLLECTION_USAGE_MODIFIER		6
+
+/**
+ * \brief MainItemIOFeature definition.
+ */
+struct MainItemIOFeature			// Not used
+{
+	uint8_t		bmIsConstantOrData			: 1;
+	uint8_t		bmIsArrayOrVariable			: 1;
+	uint8_t		bmIsRelativeOrAbsolute		: 1;
+	uint8_t		bmIsWrapOrNoWrap			: 1;
+	uint8_t		bmIsNonLonearOrLinear		: 1;
+	uint8_t		bmIsNoPreferedOrPrefered	: 1;
+	uint8_t		bmIsNullOrNoNull			: 1;
+	uint8_t		bmIsVolatileOrNonVolatile	: 1;
+};
+
+class HID;
+
+/**
+ * \class Abstract HIDReportParser definition.
+ *
+ * \note This class is used to implement HID report parsing.
+ */
+class HIDReportParser
+{
+public:
+	virtual void Parse(HID *hid, bool is_rpt_id, uint32_t len, uint8_t *buf) = 0;
+};
+
+#define MAX_REPORT_PARSERS					2
+#define HID_MAX_HID_CLASS_DESCRIPTORS		5
+
+/**
+ * \class HID definition.
+ */
+class HID : public USBDeviceConfig, public UsbConfigXtracter
+{
+protected:
+	USBHost		*pUsb;					// USB class instance pointer
+	uint32_t	bAddress;				// address
+
+protected:
+	static const uint32_t	epInterruptInIndex	= 1;	// InterruptIN  endpoint index
+	static const uint32_t	epInterruptOutIndex	= 2;	// InterruptOUT endpoint index
+
+	static const uint32_t	maxHidInterfaces	= 3;
+	static const uint32_t	maxEpPerInterface	= 2;
+	static const uint32_t	totalEndpoints		= (maxHidInterfaces * maxEpPerInterface + 1);
+
+	void PrintEndpointDescriptor(const USB_ENDPOINT_DESCRIPTOR* ep_ptr);
+	void PrintHidDescriptor(const USB_HID_DESCRIPTOR *pDesc);
+
+	virtual HIDReportParser* GetReportParser(uint32_t id) { return 0; };
+
+public:
+	HID(USBHost *pusb) : pUsb(pusb) {};
+
+	const USBHost* GetUsb() { return pUsb; };
+	virtual bool SetReportParser(uint32_t id, HIDReportParser *prs) { return false; };
+
+	uint32_t SetProtocol(uint32_t iface, uint32_t protocol);
+    uint32_t GetProtocol(uint32_t iface, uint8_t* dataptr);
+    uint32_t GetIdle(uint32_t iface, uint32_t reportID, uint8_t* dataptr);
+    uint32_t SetIdle(uint32_t iface, uint32_t reportID, uint32_t duration);
+
+    uint32_t GetReportDescr(uint32_t ep, USBReadParser *parser = NULL);
+
+    uint32_t GetHidDescr(uint32_t ep, uint32_t nbytes, uint8_t* dataptr);
+    uint32_t GetReport(uint32_t ep, uint32_t iface, uint32_t report_type, uint32_t report_id, uint32_t nbytes, uint8_t* dataptr);
+    uint32_t SetReport(uint32_t ep, uint32_t iface, uint32_t report_type, uint32_t report_id, uint32_t nbytes, uint8_t* dataptr);
+};
+
+#endif /* HID_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hid2.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hid2.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hid2.cpp	(revision 136)
@@ -0,0 +1,141 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+#include "hid.h"
+
+/**
+ * \brief Get HID report descriptor and parse it.
+ *
+ * \param ep USB device endpoint.
+ * \param parser Parser used to decode report.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t HID::GetReportDescr(uint32_t ep, USBReadParser *parser)
+{
+	const uint32_t	constBufLen = 64;
+	uint8_t			buf[constBufLen];
+
+	return (pUsb->ctrlReq(bAddress, ep, bmREQ_HIDREPORT, USB_REQUEST_GET_DESCRIPTOR, 0x00,
+			HID_DESCRIPTOR_REPORT, 0x0000, 128, constBufLen, buf, (USBReadParser*)parser));
+}
+
+/**
+ * \brief Set HID report descriptor.
+ *
+ * \param ep USB device endpoint.
+ * \param iface Interface number.
+ * \param report_type HID report type.
+ * \param report_id HID report ID.
+ * \param nbytes Buffer length.
+ * \param dataptr Buffer containing the HID report to send.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t HID::SetReport(uint32_t ep, uint32_t iface, uint32_t report_type, uint32_t report_id, uint32_t nbytes, uint8_t* dataptr)
+{
+    return (pUsb->ctrlReq(bAddress, ep, bmREQ_HIDOUT, HID_REQUEST_SET_REPORT, report_id, report_type, iface, nbytes, nbytes, dataptr, NULL));
+}
+
+/**
+ * \brief Get HID report descriptor.
+ *
+ * \param ep USB device endpoint.
+ * \param iface Interface number.
+ * \param report_type HID report type.
+ * \param report_id HID report ID.
+ * \param nbytes Buffer length.
+ * \param dataptr Buffer containing the HID report to send.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t HID::GetReport(uint32_t ep, uint32_t iface, uint32_t report_type, uint32_t report_id, uint32_t nbytes, uint8_t* dataptr)
+{
+	return (pUsb->ctrlReq(bAddress, ep, bmREQ_HIDIN, HID_REQUEST_GET_REPORT, report_id, report_type, iface, nbytes, nbytes, dataptr, NULL));
+}
+
+/**
+ * \brief Get HID idle status.
+ *
+ * \param iface Interface number.
+ * \param report_id HID report ID.
+ * \param dataptr Buffer to receive data. Size must be >= 1.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t HID::GetIdle(uint32_t iface, uint32_t report_id, uint8_t* dataptr)
+{
+    return (pUsb->ctrlReq(bAddress, 0, bmREQ_HIDIN, HID_REQUEST_GET_IDLE, report_id, 0, iface, 0x0001, 0x0001, dataptr, NULL));
+}
+
+/**
+ * \brief Set HID idle status.
+ *
+ * \param iface Interface number.
+ * \param report_id HID report ID.
+ * \param duration Status duration.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t HID::SetIdle(uint32_t iface, uint32_t report_id, uint32_t duration)
+{
+    return (pUsb->ctrlReq(bAddress, 0, bmREQ_HIDOUT, HID_REQUEST_SET_IDLE, report_id, duration, iface, 0x0000, 0x0000, NULL, NULL));
+}
+
+/**
+ * \brief Set HID protocol.
+ *
+ * \param iface Interface number.
+ * \param protocol Protocol value.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t HID::SetProtocol(uint32_t iface, uint32_t protocol)
+{
+	return (pUsb->ctrlReq(bAddress, 0, bmREQ_HIDOUT, HID_REQUEST_SET_PROTOCOL, protocol, 0x00, iface, 0x0000, 0x0000, NULL, NULL));
+}
+
+/**
+ * \brief Get HID protocol.
+ *
+ * \param iface Interface number.
+ * \param dataptr Buffer used to store protocol value. Size must be >= 1.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint32_t HID::GetProtocol(uint32_t iface, uint8_t* dataptr)
+{
+	return (pUsb->ctrlReq(bAddress, 0, bmREQ_HIDIN, HID_REQUEST_GET_PROTOCOL, 0x00, 0x00, iface, 0x0001, 0x0001, dataptr, NULL));
+}
+
+/**
+ * \brief Print HID descriptor.
+ *
+ * \note TRACE_USBHOST macro must be enabled. See Usb.h for reference.
+ *
+ * \param pDesc Pointer to HID descriptor.
+ */
+void HID::PrintHidDescriptor(const USB_HID_DESCRIPTOR *pDesc)
+{
+	TRACE_USBHOST(printf("HID::PrintHidDescriptor : bDescLength: %d\r\n", pDesc->bLength);)
+	TRACE_USBHOST(printf("HID::PrintHidDescriptor : bDescriptorType: %d\r\n", pDesc->bDescriptorType);)
+	TRACE_USBHOST(printf("HID::PrintHidDescriptor : bcdHID: %d\r\n", pDesc->bcdHID);)
+	TRACE_USBHOST(printf("HID::PrintHidDescriptor : bCountryCode: %d\r\n", pDesc->bCountryCode);)
+	TRACE_USBHOST(printf("HID::PrintHidDescriptor : bNumDescriptors: %d\r\n", pDesc->bNumDescriptors);)
+	TRACE_USBHOST(printf("HID::PrintHidDescriptor : bDescrType: %d\r\n", pDesc->bDescrType);)
+	TRACE_USBHOST(printf("HID::PrintHidDescriptor : wDescriptorLength: %d\r\n", pDesc->wDescriptorLength);)
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hidboot.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hidboot.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hidboot.cpp	(revision 136)
@@ -0,0 +1,192 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+#include "hidboot.h"
+
+/**
+ * \brief Parse HID mouse report.
+ *
+ * \param hid HID device pointer.
+ * \param is_rpt_id True if this is a report ID.
+ * \param len Buffer length.
+ * \param buf Buffer containing report data.
+ */
+void MouseReportParser::Parse(HID *hid, bool is_rpt_id, uint32_t len, uint8_t *buf)
+{
+	MOUSEINFO *pmi = (MOUSEINFO*)buf;
+
+	if (prevState.mouseInfo.bmLeftButton == 0 && pmi->bmLeftButton == 1)
+		OnLeftButtonDown(pmi);
+
+	if (prevState.mouseInfo.bmLeftButton == 1 && pmi->bmLeftButton == 0)
+		OnLeftButtonUp(pmi);
+
+	if (prevState.mouseInfo.bmRightButton == 0 && pmi->bmRightButton == 1)
+		OnRightButtonDown(pmi);
+
+	if (prevState.mouseInfo.bmRightButton == 1 && pmi->bmRightButton == 0)
+		OnRightButtonUp(pmi);
+
+	if (prevState.mouseInfo.bmMiddleButton == 0 && pmi->bmMiddleButton == 1)
+		OnMiddleButtonDown(pmi);
+
+	if (prevState.mouseInfo.bmMiddleButton == 1 && pmi->bmMiddleButton == 0)
+		OnMiddleButtonUp(pmi);
+
+	if (prevState.mouseInfo.dX != pmi->dX || prevState.mouseInfo.dY != pmi->dY)
+		OnMouseMove(pmi);
+
+	for (uint32_t i = 0; i < 3; ++i)
+		prevState.bInfo[i] = buf[i];
+};
+
+/**
+ * \brief Parse HID keyboard report.
+ *
+ * \param hid HID device pointer.
+ * \param is_rpt_id True if this is a report ID.
+ * \param len Buffer length.
+ * \param buf Buffer containing report data.
+ */
+void KeyboardReportParser::Parse(HID *hid, bool is_rpt_id, uint32_t len, uint8_t *buf)
+{
+	// On error - return
+	if (buf[2] == 1)
+		return;
+
+	//KBDINFO	*pki = (KBDINFO*)buf;
+
+	for (uint32_t i = 2; i < 8; ++i)
+	{
+		bool down = false;
+		bool up	  = false;
+
+		for (uint8_t j=2; j<8; j++)
+		{
+			if (buf[i] == prevState.bInfo[j] && buf[i] != 1)
+				down = true;
+			if (buf[j] == prevState.bInfo[i] && prevState.bInfo[i] != 1)
+				up = true;
+		}
+
+		if (!down)
+		{
+			HandleLockingKeys(hid, buf[i]);
+			OnKeyDown(*buf, buf[i]);
+		}
+
+		if (!up)
+			OnKeyUp(prevState.bInfo[0], prevState.bInfo[i]);
+	}
+
+	for (uint32_t i = 0; i < 8; ++i)
+		prevState.bInfo[i] = buf[i];
+};
+
+/**
+ * \brief Handle keyboard locking keys and manage keyboard leds using USB
+ * report.
+ *
+ * \param hid HID device pointer.
+ * \param key Locking key.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+uint8_t KeyboardReportParser::HandleLockingKeys(HID *hid, uint8_t key)
+{
+	uint8_t old_keys = kbdLockingKeys.bLeds;
+
+	switch (key)
+	{
+		case KEY_NUM_LOCK:
+			kbdLockingKeys.kbdLeds.bmNumLock = ~kbdLockingKeys.kbdLeds.bmNumLock;
+			break;
+		case KEY_CAPS_LOCK:
+			kbdLockingKeys.kbdLeds.bmCapsLock = ~kbdLockingKeys.kbdLeds.bmCapsLock;
+			break;
+		case KEY_SCROLL_LOCK:
+			kbdLockingKeys.kbdLeds.bmScrollLock = ~kbdLockingKeys.kbdLeds.bmScrollLock;
+			break;
+	}
+
+	if (old_keys != kbdLockingKeys.bLeds && hid)
+		return (hid->SetReport(0, 0/*hid->GetIface()*/, 2, 0, 1, &kbdLockingKeys.bLeds));
+
+	return 0;
+}
+
+const uint8_t KeyboardReportParser::numKeys[] = { '!', '@', '#', '$', '%', '^', '&', '*', '(', ')' };
+const uint8_t KeyboardReportParser::symKeysUp[] = { '_', '+', '{', '}', '|', '~', ':', '"', '~', '<', '>', '?' };
+const uint8_t KeyboardReportParser::symKeysLo[] = { '-', '=', '[', ']', '\\', ' ', ';', '\'', '`', ',', '.', '/' };
+const uint8_t KeyboardReportParser::padKeys[] = { '/', '*', '-', '+', 0x13 };
+
+/**
+ * \brief Manage keyboard OEM to ASCII conversion.
+ *
+ * \param mod Keyboard modifier.
+ * \param key Key value to convert.
+ *
+ * \return Keyboard corresponding ASCII value on success, 0 otherwise.
+ */
+uint8_t KeyboardReportParser::OemToAscii(uint8_t mod, uint8_t key)
+{
+	uint8_t shift = (mod & 0x22);
+
+	// [a-z]
+	if (key > 0x03 && key < 0x1e)
+	{
+		// Upper case letters
+		if ( (kbdLockingKeys.kbdLeds.bmCapsLock == 0 && (mod & 2)) ||
+			 (kbdLockingKeys.kbdLeds.bmCapsLock == 1 && (mod & 2) == 0) )
+			return (key - 4 + 'A');
+
+		// Lower case letters
+		else
+			return (key - 4 + 'a');
+	}
+	// Numbers
+	else if (key > 0x1d && key < 0x27)
+	{
+		if (shift)
+			return (numKeys[key - 0x1e]);
+		else
+			return (key - 0x1e + '1');
+	}
+	// Keypad Numbers
+	else if (key > 0x58 && key < 0x62)
+	{
+		if (kbdLockingKeys.kbdLeds.bmNumLock == 1)
+			return (key - 0x59 + '1');
+	}
+	else if (key > 0x2c && key < 0x39)
+		return ((shift) ? symKeysUp[key-0x2d] : symKeysLo[key-0x2d]);
+	else if (key > 0x53 && key < 0x59)
+		return padKeys[key - 0x54];
+	else
+	{
+		switch (key)
+		{
+			case KEY_SPACE:		return (0x20);
+			case KEY_ENTER:		return (0x13);
+			case KEY_ZERO:		return ((shift) ? ')' : '0');
+			case KEY_ZERO2:		return ((kbdLockingKeys.kbdLeds.bmNumLock == 1) ? '0' : 0);
+			case KEY_PERIOD:	return ((kbdLockingKeys.kbdLeds.bmNumLock == 1) ? '.' : 0);
+		}
+	}
+
+	return 0;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hidboot.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hidboot.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hidboot.h	(revision 136)
@@ -0,0 +1,553 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+#ifndef HIDBOOT_H_INCLUDED
+#define HIDBOOT_H_INCLUDED
+
+#include <stdint.h>
+#include "usb_ch9.h"
+#include "Usb.h"
+#include "hid.h"
+#include "Arduino.h"
+#include "confdescparser.h"
+
+#define KEY_SPACE					0x2c
+#define KEY_ZERO					0x27
+#define KEY_ZERO2					0x62
+#define KEY_ENTER					0x28
+#define KEY_PERIOD					0x63
+
+/**
+ * \brief MOUSEINFO definition.
+ */
+struct MOUSEINFO
+{
+	struct
+	{
+		uint8_t		bmLeftButton	: 1;
+		uint8_t		bmRightButton	: 1;
+		uint8_t		bmMiddleButton	: 1;
+		uint8_t		bmDummy			: 1;
+	};
+	int8_t			dX;
+	int8_t			dY;
+};
+
+/**
+ * \class MouseReportParser definition.
+ */
+class MouseReportParser : public HIDReportParser
+{
+	union
+	{
+		MOUSEINFO	mouseInfo;
+		uint8_t		bInfo[3];
+	}	prevState;
+
+public:
+	virtual void Parse(HID *hid, bool is_rpt_id, uint32_t len, uint8_t *buf);
+
+protected:
+	virtual void OnMouseMove		(MOUSEINFO *mi)	{};
+	virtual void OnLeftButtonUp		(MOUSEINFO *mi)	{};
+	virtual void OnLeftButtonDown	(MOUSEINFO *mi)	{};
+	virtual void OnRightButtonUp	(MOUSEINFO *mi)	{};
+	virtual void OnRightButtonDown	(MOUSEINFO *mi)	{};
+	virtual void OnMiddleButtonUp	(MOUSEINFO *mi)	{};
+	virtual void OnMiddleButtonDown	(MOUSEINFO *mi)	{};
+};
+
+/**
+ * \brief MODIFIERKEYS definition.
+ */
+struct MODIFIERKEYS
+{
+	uint8_t		bmLeftCtrl		: 1;
+	uint8_t		bmLeftShift		: 1;
+	uint8_t		bmLeftAlt		: 1;
+	uint8_t		bmLeftGUI		: 1;
+	uint8_t		bmRightCtrl		: 1;
+	uint8_t		bmRightShift	: 1;
+	uint8_t		bmRightAlt		: 1;
+	uint8_t		bmRightGUI		: 1;
+};
+
+/**
+ * \brief KBDINFO definition.
+ */
+struct KBDINFO
+{
+	struct
+	{
+		uint8_t		bmLeftCtrl		: 1;
+		uint8_t		bmLeftShift		: 1;
+		uint8_t		bmLeftAlt		: 1;
+		uint8_t		bmLeftGUI		: 1;
+		uint8_t		bmRightCtrl		: 1;
+		uint8_t		bmRightShift	: 1;
+		uint8_t		bmRightAlt		: 1;
+		uint8_t		bmRightGUI		: 1;
+	};
+	uint8_t			bReserved;
+	uint8_t			Keys[6];
+};
+
+/**
+ * \brief KBDLEDS definition.
+ */
+struct KBDLEDS
+{
+	uint8_t		bmNumLock		: 1;
+	uint8_t		bmCapsLock		: 1;
+	uint8_t		bmScrollLock	: 1;
+	uint8_t		bmCompose		: 1;
+	uint8_t		bmKana			: 1;
+	uint8_t		bmReserved		: 3;
+};
+
+#define KEY_NUM_LOCK				0x53
+
+// Clear compiler warning
+#ifdef KEY_CAPS_LOCK
+#undef KEY_CAPS_LOCK
+#endif
+
+#define KEY_CAPS_LOCK				0x39
+#define KEY_SCROLL_LOCK				0x47
+
+/**
+ * \class KeyboardReportParser definition.
+ */
+class KeyboardReportParser : public HIDReportParser
+{
+	static const uint8_t numKeys[];
+	static const uint8_t symKeysUp[];
+	static const uint8_t symKeysLo[];
+	static const uint8_t padKeys[];
+
+protected:
+	union
+	{
+		KBDINFO		kbdInfo;
+		uint8_t		bInfo[sizeof(KBDINFO)];
+	}	prevState;
+
+	union
+	{
+		KBDLEDS		kbdLeds;
+		uint8_t		bLeds;
+	}	kbdLockingKeys;
+
+	uint8_t OemToAscii(uint8_t mod, uint8_t key);
+
+public:
+	KeyboardReportParser() { kbdLockingKeys.bLeds = 0; };
+
+	virtual void Parse(HID *hid, bool is_rpt_id, uint32_t len, uint8_t *buf);
+
+protected:
+	uint8_t HandleLockingKeys(HID* hid, uint8_t key);
+
+	virtual void OnKeyDown	(uint8_t mod, uint8_t key)	{};
+	virtual void OnKeyUp	(uint8_t mod, uint8_t key)	{};
+};
+
+#define totalEndpoints						2
+
+#define HID_MAX_HID_CLASS_DESCRIPTORS		5
+
+/**
+ * \class HIDBoot definition.
+ */
+template <const uint8_t BOOT_PROTOCOL>
+class HIDBoot : public HID
+{
+	EpInfo		epInfo[totalEndpoints];
+
+	HIDReportParser	*pRptParser;
+
+	uint32_t	bConfNum;				// configuration number
+	uint32_t	bIfaceNum;				// Interface Number
+	uint32_t	bNumIface;				// number of interfaces in the configuration
+	uint32_t	bNumEP;					// total number of EP in the configuration
+	uint32_t	qNextPollTime;			// next poll time
+	bool		bPollEnable;			// poll enable flag
+
+	void Initialize();
+
+	virtual HIDReportParser* GetReportParser(uint32_t id) { return pRptParser; };
+
+public:
+	HIDBoot(USBHost *p);
+
+	virtual bool SetReportParser(uint32_t id, HIDReportParser *prs) { pRptParser = prs; return true; };
+
+	// USBDeviceConfig implementation
+	virtual uint32_t Init(uint32_t parent, uint32_t port, uint32_t lowspeed);
+	virtual uint32_t Release();
+	virtual uint32_t Poll();
+	virtual uint32_t GetAddress() { return bAddress; };
+
+	// UsbConfigXtracter implementation
+	virtual void EndpointXtract(uint32_t conf, uint32_t iface, uint32_t alt, uint32_t proto, const USB_ENDPOINT_DESCRIPTOR *ep);
+};
+
+/**
+ * \brief HIDBoot class constructor.
+ */
+template <const uint8_t BOOT_PROTOCOL>
+HIDBoot<BOOT_PROTOCOL>::HIDBoot(USBHost *p) :
+		HID(p),
+		pRptParser(NULL),
+		qNextPollTime(0),
+		bPollEnable(false)
+{
+	Initialize();
+
+	if (pUsb)
+		pUsb->RegisterDeviceClass(this);
+}
+
+/**
+ * \brief Initialize HIDBoot class.
+ */
+template <const uint8_t BOOT_PROTOCOL>
+void HIDBoot<BOOT_PROTOCOL>::Initialize()
+{
+	for (uint32_t i = 0; i < totalEndpoints; ++i)
+	{
+		epInfo[i].deviceEpNum	= 0;
+		epInfo[i].hostPipeNum	= 0;
+		epInfo[i].maxPktSize	= (i) ? 0 : 8;
+		epInfo[i].epAttribs		= 0;
+		epInfo[i].bmNakPower	= (i) ? USB_NAK_NOWAIT : USB_NAK_MAX_POWER;
+	}
+
+	bNumEP		= 1;
+	bNumIface	= 0;
+	bConfNum	= 0;
+}
+
+/**
+ * \brief Initialize connection to an HID device.
+ *
+ * \param parent USB device address of the Parent device.
+ * \param port USB device base address.
+ * \param lowspeed USB device speed.
+ *
+ * \return 0 on success, error code otherwise.
+ */
+template <const uint8_t BOOT_PROTOCOL>
+uint32_t HIDBoot<BOOT_PROTOCOL>::Init(uint32_t parent, uint32_t port, uint32_t lowspeed)
+{
+	const uint32_t constBufSize = sizeof(USB_DEVICE_DESCRIPTOR);
+
+	uint8_t		buf[constBufSize];
+	uint32_t	rcode = 0;
+	UsbDevice	*p = 0;
+	EpInfo		*oldep_ptr = 0;
+	uint32_t	len = 0;
+
+	uint32_t	num_of_conf = 0;	// number of configurations
+
+	AddressPool	&addrPool = pUsb->GetAddressPool();
+
+	TRACE_USBHOST(printf("HIDBoot::Init\r\n");)
+
+	if (bAddress)
+		return USB_ERROR_CLASS_INSTANCE_ALREADY_IN_USE;
+
+	// Get pointer to pseudo device with address 0 assigned
+	p = addrPool.GetUsbDevicePtr(0);
+
+	if (!p)
+		return USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL;
+
+	if (!p->epinfo)
+	{
+		TRACE_USBHOST(printf("HIDBoot::Init : epinfo is null!\r\n");)
+		return USB_ERROR_EPINFO_IS_NULL;
+	}
+
+	// Save old pointer to EP_RECORD of address 0
+	oldep_ptr = p->epinfo;
+
+	// Temporary assign new pointer to epInfo to p->epinfo in order to avoid toggle inconsistence
+	p->epinfo = epInfo;
+
+	p->lowspeed = lowspeed;
+
+	// Get device descriptor
+	rcode = pUsb->getDevDescr(0, 0, 8, (uint8_t*)buf);
+
+	if (!rcode)
+		len = (buf[0] > constBufSize) ? constBufSize : buf[0];
+
+	if (rcode)
+	{
+		// Restore p->epinfo
+		p->epinfo = oldep_ptr;
+
+		goto FailGetDevDescr;
+	}
+
+	// Restore p->epinfo
+	p->epinfo = oldep_ptr;
+
+	// Allocate new address according to device class
+	bAddress = addrPool.AllocAddress(parent, false, port);
+
+	if (!bAddress)
+		return USB_ERROR_OUT_OF_ADDRESS_SPACE_IN_POOL;
+
+	// Extract Max Packet Size from the device descriptor
+	epInfo[0].maxPktSize = (uint8_t)((USB_DEVICE_DESCRIPTOR*)buf)->bMaxPacketSize0;
+
+	// Assign new address to the device
+	rcode = pUsb->setAddr(0, 0, bAddress);
+
+	if (rcode)
+	{
+		p->lowspeed = false;
+		addrPool.FreeAddress(bAddress);
+		bAddress = 0;
+		TRACE_USBHOST(printf("HIDBoot::Init : setAddr failed with rcode %lu\r\n", rcode);)
+		return rcode;
+	}
+
+	TRACE_USBHOST(printf("HIDBoot::Init : device address is now %lu\r\n", bAddress);)
+
+	p->lowspeed = false;
+
+	p = addrPool.GetUsbDevicePtr(bAddress);
+
+	if (!p)
+		return USB_ERROR_ADDRESS_NOT_FOUND_IN_POOL;
+
+	p->lowspeed = lowspeed;
+
+	if (len)
+		rcode = pUsb->getDevDescr(bAddress, 0, len, (uint8_t*)buf);
+
+	if(rcode)
+		goto FailGetDevDescr;
+
+	num_of_conf = ((USB_DEVICE_DESCRIPTOR*)buf)->bNumConfigurations;
+
+	// Assign epInfo to epinfo pointer
+	rcode = pUsb->setEpInfoEntry(bAddress, 1, epInfo);
+
+	if (rcode)
+		goto FailSetDevTblEntry;
+
+	TRACE_USBHOST(printf("HIDBoot::Init : number of configuration is %lu\r\n", num_of_conf);)
+
+	for (uint32_t i = 0; i < num_of_conf; ++i)
+	{
+		ConfigDescParser<
+			USB_CLASS_HID,
+			HID_BOOT_INTF_SUBCLASS,
+			BOOT_PROTOCOL,
+			CP_MASK_COMPARE_ALL>	confDescrParser(this);
+
+		rcode = pUsb->getConfDescr(bAddress, 0, i, &confDescrParser);
+
+		if (bNumEP > 1)
+			break;
+	}
+
+	if (bNumEP < 2)
+		return USB_DEV_CONFIG_ERROR_DEVICE_NOT_SUPPORTED;
+
+	TRACE_USBHOST(printf("HIDBoot::Init : bAddress: %lu\r\n", bAddress);)
+	TRACE_USBHOST(printf("HIDBoot::Init : bNumEP: %lu\r\n", bNumEP);)
+
+	// Assign epInfo to epinfo pointer
+	rcode = pUsb->setEpInfoEntry(bAddress, bNumEP, epInfo);
+
+	TRACE_USBHOST(printf("HIDBoot::Init : bConfNum: %lu\r\n", bConfNum);)
+
+	// Set Configuration Value
+	rcode = pUsb->setConf(bAddress, 0, bConfNum);
+
+	if (rcode)
+		goto FailSetConfDescr;
+
+	TRACE_USBHOST(printf("HIDBoot::Init : bIfaceNum: %lu\r\n", bIfaceNum);)
+
+	rcode = SetProtocol(bIfaceNum, HID_BOOT_PROTOCOL);
+
+	if (rcode)
+		goto FailSetProtocol;
+
+	if (BOOT_PROTOCOL == 1)
+	{
+		rcode = SetIdle(bIfaceNum, 0, 0);
+
+		if (rcode)
+			goto FailSetIdle;
+	}
+
+	TRACE_USBHOST(printf("HIDBoot::Init : HID device configured successfully\r\n");)
+
+	bPollEnable = true;
+	return 0;
+
+FailGetDevDescr:
+	TRACE_USBHOST(printf("HIDBoot::Init getDevDescr : ");)
+	goto Fail;
+
+FailSetDevTblEntry:
+	TRACE_USBHOST(printf("HIDBoot::Init setDevTblEn : ");)
+	goto Fail;
+
+FailSetProtocol:
+	TRACE_USBHOST(printf("HIDBoot::Init SetProto : ");)
+	goto Fail;
+
+FailSetIdle:
+	TRACE_USBHOST(printf("HIDBoot::Init SetIdle : ");)
+	goto Fail;
+
+FailSetConfDescr:
+	TRACE_USBHOST(printf("HIDBoot::Init setConf : ");)
+	goto Fail;
+
+Fail:
+	TRACE_USBHOST(printf("error code: %lu\r\n", rcode);)
+	Release();
+	return rcode;
+}
+
+/**
+ * \brief Extract interrupt-IN endpoint information from configuration
+ * descriptor.
+ *
+ * \param conf Configuration number.
+ * \param iface Interface number.
+ * \param alt Alternate setting.
+ * \param proto Protocol version used.
+ * \param pep Pointer to endpoint descriptor.
+ */
+template <const uint8_t BOOT_PROTOCOL>
+void HIDBoot<BOOT_PROTOCOL>::EndpointXtract(uint32_t conf, uint32_t iface, uint32_t alt, uint32_t proto, const USB_ENDPOINT_DESCRIPTOR *pep)
+{
+	// If the first configuration satisfies, the others are not considered.
+	if (bNumEP > 1 && conf != bConfNum)
+		return;
+
+	bConfNum = conf;
+	bIfaceNum = iface;
+
+	uint32_t index = 0;
+	uint32_t pipe = 0;
+
+	if ((pep->bmAttributes & 0x03) == 3 && (pep->bEndpointAddress & 0x80) == 0x80)
+	{
+		index = epInterruptInIndex;
+
+		// Fill in the endpoint info structure
+		epInfo[index].deviceEpNum		= (pep->bEndpointAddress & 0x0F);
+		epInfo[index].maxPktSize	= (uint8_t)pep->wMaxPacketSize;
+		epInfo[index].epAttribs		= 0;
+
+		TRACE_USBHOST(printf("HIDBoot::EndpointXtract : Found new endpoint\r\n");)
+		TRACE_USBHOST(printf("HIDBoot::EndpointXtract : deviceEpNum: %lu\r\n", epInfo[index].deviceEpNum);)
+		TRACE_USBHOST(printf("HIDBoot::EndpointXtract : maxPktSize: %lu\r\n", epInfo[index].maxPktSize);)
+		TRACE_USBHOST(printf("HIDBoot::EndpointXtract : index: %lu\r\n", index);)
+
+		// Ensure pipe allocation is okay
+		pipe = UHD_Pipe_Alloc(bAddress, epInfo[index].deviceEpNum, UOTGHS_HSTPIPCFG_PTYPE_INTRPT, UOTGHS_HSTPIPCFG_PTOKEN_IN, epInfo[index].maxPktSize, 10, UOTGHS_HSTPIPCFG_PBK_1_BANK);
+		if (pipe == 0)
+		{
+			TRACE_USBHOST(printf("HIDBoot::EndpointXtract : Pipe allocation failure\r\n");)
+			// Enumeration failed
+			return;
+		}
+
+		epInfo[index].hostPipeNum = pipe;
+
+		bNumEP++;
+	}
+}
+
+/**
+ * \brief Release USB allocated resources (pipes and address).
+ *
+ * \note Release call is made from USBHost.task() on disconnection events.
+ * \note Release call is made from Init() on enumeration failure.
+ *
+ * \return Always 0.
+ */
+template <const uint8_t BOOT_PROTOCOL>
+uint32_t HIDBoot<BOOT_PROTOCOL>::Release()
+{
+	// Free allocated host pipes
+	UHD_Pipe_Free(epInfo[epInterruptInIndex].hostPipeNum);
+
+	// Free allocated USB address
+	pUsb->GetAddressPool().FreeAddress(bAddress);
+
+	bConfNum			= 0;
+	bIfaceNum			= 0;
+	bNumEP				= 1;
+	bAddress			= 0;
+	qNextPollTime		= 0;
+	bPollEnable			= false;
+
+	return 0;
+}
+
+/**
+ * \brief Poll USB device activity.
+ *
+ * \note Poll call is periodically made from USBHost.task().
+ *
+ * \return 0 on success, error code otherwise.
+ */
+template <const uint8_t BOOT_PROTOCOL>
+uint32_t HIDBoot<BOOT_PROTOCOL>::Poll()
+{
+	uint32_t rcode = 0;
+
+	if (!bPollEnable)
+		return 0;
+
+	if (qNextPollTime <= millis())
+	{
+		qNextPollTime = millis() + 10;
+
+		const uint32_t const_buff_len = 16;
+		uint8_t buf[const_buff_len];
+
+		uint32_t read = epInfo[epInterruptInIndex].maxPktSize;
+
+		rcode = pUsb->inTransfer(bAddress, epInfo[epInterruptInIndex].deviceEpNum, &read, buf);
+
+		if (rcode)
+		{
+			return rcode;
+		}
+
+		if (pRptParser)
+			pRptParser->Parse((HID*)this, 0, (uint32_t)read, buf);
+	}
+
+	return rcode;
+}
+
+#endif /* HIDBOOT_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hidusagestr.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hidusagestr.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/hidusagestr.h	(revision 136)
@@ -0,0 +1,976 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+#ifndef HIDUSAGESTR_H_INCLUDED
+#define HIDUSAGESTR_H_INCLUDED
+
+const char pstrSpace							[] = " ";
+const char pstrCRLF								[] = "\r\n";
+const char pstrSingleTab						[] = "\t";
+const char pstrDoubleTab						[] = "\t\t";
+const char pstrTripleTab						[] = "\t\t\t";
+
+// Usage Page String Titles
+const char pstrUsagePageUndefined				[] = "Undef";
+const char pstrUsagePageGenericDesktopControls	[] = "Gen Desktop Ctrls";
+const char pstrUsagePageSimulationControls		[] = "Simu Ctrls";
+const char pstrUsagePageVRControls				[] = "VR Ctrls";
+const char pstrUsagePageSportControls			[] = "Sport Ctrls";
+const char pstrUsagePageGameControls			[] = "Game Ctrls";
+const char pstrUsagePageGenericDeviceControls	[] = "Gen Dev Ctrls";
+const char pstrUsagePageKeyboardKeypad			[] = "Kbrd/Keypad";
+const char pstrUsagePageLEDs					[] = "LEDs";
+const char pstrUsagePageButton					[] = "Button";
+const char pstrUsagePageOrdinal					[] = "Ordinal";
+const char pstrUsagePageTelephone				[] = "Tel";
+const char pstrUsagePageConsumer				[] = "Consumer";
+const char pstrUsagePageDigitizer				[] = "Digitizer";
+const char pstrUsagePagePID						[] = "PID";
+const char pstrUsagePageUnicode					[] = "Unicode";
+const char pstrUsagePageAlphaNumericDisplay		[] = "Alpha Num Disp";
+const char pstrUsagePageMedicalInstruments		[] = "Medical Instr";
+const char pstrUsagePageMonitor					[] = "Monitor";
+const char pstrUsagePagePower					[] = "Power";
+const char pstrUsagePageBarCodeScanner			[] = "Bar Code Scan";
+const char pstrUsagePageScale					[] = "Scale";
+const char pstrUsagePageMSRDevices				[] = "Magn Stripe Read Dev";
+const char pstrUsagePagePointOfSale				[] = "POS";
+const char pstrUsagePageCameraControl			[] = "Cam Ctrl";
+const char pstrUsagePageArcade					[] = "Arcade";
+const char pstrUsagePageReserved				[] = "Reserved";
+const char pstrUsagePageVendorDefined			[] = "Vendor Def";
+
+// Generic Desktop Controls Page
+const char pstrUsagePointer						[] = "Pointer";
+const char pstrUsageMouse						[] = "Mouse";
+const char pstrUsageJoystick					[] = "Joystick";
+const char pstrUsageGamePad						[] = "Game Pad";
+const char pstrUsageKeyboard					[] = "Kbrd";
+const char pstrUsageKeypad						[] = "Keypad";
+const char pstrUsageMultiAxisController			[] = "Multi-axis Ctrl";
+const char pstrUsageTabletPCSystemControls		[] = "Tablet PC Sys Ctrls";
+const char pstrUsageX							[] = "X";
+const char pstrUsageY							[] = "Y";
+const char pstrUsageZ							[] = "Z";
+const char pstrUsageRx							[] = "Rx";
+const char pstrUsageRy							[] = "Ry";
+const char pstrUsageRz							[] = "Rz";
+const char pstrUsageSlider						[] = "Slider";
+const char pstrUsageDial						[] = "Dial";
+const char pstrUsageWheel						[] = "Wheel";
+const char pstrUsageHatSwitch					[] = "Hat Switch";
+const char pstrUsageCountedBuffer				[] = "Counted Buf";
+const char pstrUsageByteCount					[] = "Byte Count";
+const char pstrUsageMotionWakeup				[] = "Motion Wakeup";
+const char pstrUsageStart						[] = "Start";
+const char pstrUsageSelect						[] = "Sel";
+const char pstrUsageVx							[] = "Vx";
+const char pstrUsageVy							[] = "Vy";
+const char pstrUsageVz							[] = "Vz";
+const char pstrUsageVbrx						[] = "Vbrx";
+const char pstrUsageVbry						[] = "Vbry";
+const char pstrUsageVbrz						[] = "Vbrz";
+const char pstrUsageVno							[] = "Vno";
+const char pstrUsageFeatureNotification			[] = "Feature Notif";
+const char pstrUsageResolutionMultiplier		[] = "Res Mult";
+const char pstrUsageSystemControl				[] = "Sys Ctrl";
+const char pstrUsageSystemPowerDown				[] = "Sys Pwr Down";
+const char pstrUsageSystemSleep					[] = "Sys Sleep";
+const char pstrUsageSystemWakeup				[] = "Sys Wakeup";
+const char pstrUsageSystemContextMenu			[] = "Sys Context Menu";
+const char pstrUsageSystemMainMenu				[] = "Sys Main Menu";
+const char pstrUsageSystemAppMenu				[] = "Sys App Menu";
+const char pstrUsageSystemMenuHelp				[] = "Sys Menu Help";
+const char pstrUsageSystemMenuExit				[] = "Sys Menu Exit";
+const char pstrUsageSystemMenuSelect			[] = "Sys Menu Select";
+const char pstrUsageSystemMenuRight				[] = "Sys Menu Right";
+const char pstrUsageSystemMenuLeft				[] = "Sys Menu Left";
+const char pstrUsageSystemMenuUp				[] = "Sys Menu Up";
+const char pstrUsageSystemMenuDown				[] = "Sys Menu Down";
+const char pstrUsageSystemColdRestart			[] = "Sys Cold Restart";
+const char pstrUsageSystemWarmRestart			[] = "Sys Warm Restart";
+const char pstrUsageDPadUp						[] = "D-pad Up";
+const char pstrUsageDPadDown					[] = "D-pad Down";
+const char pstrUsageDPadRight					[] = "D-pad Right";
+const char pstrUsageDPadLeft					[] = "D-pad Left";
+const char pstrUsageSystemDock					[] = "Sys Dock";
+const char pstrUsageSystemUndock				[] = "Sys Undock";
+const char pstrUsageSystemSetup					[] = "Sys Setup";
+const char pstrUsageSystemBreak					[] = "Sys Break";
+const char pstrUsageSystemDebuggerBreak			[] = "Sys Dbg Brk";
+const char pstrUsageApplicationBreak			[] = "App Break";
+const char pstrUsageApplicationDebuggerBreak	[] = "App Dbg Brk";
+const char pstrUsageSystemSpeakerMute			[] = "Sys Spk Mute";
+const char pstrUsageSystemHibernate				[] = "Sys Hiber";
+const char pstrUsageSystemDisplayInvert			[] = "Sys Disp Inv";
+const char pstrUsageSystemDisplayInternal		[] = "Sys Disp Int";
+const char pstrUsageSystemDisplayExternal		[] = "Sys Disp Ext";
+const char pstrUsageSystemDisplayBoth			[] = "Sys Disp Both";
+const char pstrUsageSystemDisplayDual			[] = "Sys Disp Dual";
+const char pstrUsageSystemDisplayToggleIntExt	[] = "Sys Disp Tgl Int/Ext";
+const char pstrUsageSystemDisplaySwapPriSec		[] = "Sys Disp Swap Pri/Sec";
+const char pstrUsageSystemDisplayLCDAutoscale	[] = "Sys Disp LCD Autoscale";
+
+// Simulation Controls Page
+const char pstrUsageFlightSimulationDevice		[] = "Flight Simu Dev";
+const char pstrUsageAutomobileSimulationDevice	[] = "Auto Simu Dev";
+const char pstrUsageTankSimulationDevice		[] = "Tank Simu Dev";
+const char pstrUsageSpaceshipSimulationDevice	[] = "Space Simu Dev";
+const char pstrUsageSubmarineSimulationDevice	[] = "Subm Simu Dev";
+const char pstrUsageSailingSimulationDevice		[] = "Sail Simu Dev";
+const char pstrUsageMotocicleSimulationDevice	[] = "Moto Simu Dev";
+const char pstrUsageSportsSimulationDevice		[] = "Sport Simu Dev";
+const char pstrUsageAirplaneSimulationDevice	[] = "Airp Simu Dev";
+const char pstrUsageHelicopterSimulationDevice	[] = "Heli Simu Dev";
+const char pstrUsageMagicCarpetSimulationDevice	[] = "Magic Carpet Simu Dev";
+const char pstrUsageBicycleSimulationDevice		[] = "Bike Simu Dev";
+const char pstrUsageFlightControlStick			[] = "Flight Ctrl Stick";
+const char pstrUsageFlightStick					[] = "Flight Stick";
+const char pstrUsageCyclicControl				[] = "Cyclic Ctrl";
+const char pstrUsageCyclicTrim					[] = "Cyclic Trim";
+const char pstrUsageFlightYoke					[] = "Flight Yoke";
+const char pstrUsageTrackControl				[] = "Track Ctrl";
+const char pstrUsageAileron						[] = "Aileron";
+const char pstrUsageAileronTrim					[] = "Aileron Trim";
+const char pstrUsageAntiTorqueControl			[] = "Anti-Torque Ctrl";
+const char pstrUsageAutopilotEnable				[] = "Autopilot Enable";
+const char pstrUsageChaffRelease				[] = "Chaff Release";
+const char pstrUsageCollectiveControl			[] = "Collective Ctrl";
+const char pstrUsageDiveBrake					[] = "Dive Brake";
+const char pstrUsageElectronicCountermeasures	[] = "El Countermeasures";
+const char pstrUsageElevator					[] = "Elevator";
+const char pstrUsageElevatorTrim				[] = "Elevator Trim";
+const char pstrUsageRudder						[] = "Rudder";
+const char pstrUsageThrottle					[] = "Throttle";
+const char pstrUsageFlightCommunications		[] = "Flight Comm";
+const char pstrUsageFlareRelease				[] = "Flare Release";
+const char pstrUsageLandingGear					[] = "Landing Gear";
+const char pstrUsageToeBrake					[] = "Toe Brake";
+const char pstrUsageTrigger						[] = "Trigger";
+const char pstrUsageWeaponsArm					[] = "Weapons Arm";
+const char pstrUsageWeaponsSelect				[] = "Weapons Sel";
+const char pstrUsageWingFlaps					[] = "Wing Flaps";
+const char pstrUsageAccelerator					[] = "Accel";
+const char pstrUsageBrake						[] = "Brake";
+const char pstrUsageClutch						[] = "Clutch";
+const char pstrUsageShifter						[] = "Shifter";
+const char pstrUsageSteering					[] = "Steering";
+const char pstrUsageTurretDirection				[] = "Turret Dir";
+const char pstrUsageBarrelElevation				[] = "Barrel Ele";
+const char pstrUsageDivePlane					[] = "Dive Plane";
+const char pstrUsageBallast						[] = "Ballast";
+const char pstrUsageBicycleCrank				[] = "Bicycle Crank";
+const char pstrUsageHandleBars					[] = "Handle Bars";
+const char pstrUsageFrontBrake					[] = "Front Brake";
+const char pstrUsageRearBrake					[] = "Rear Brake";
+
+// VR Controls Page
+const char pstrUsageBelt						[] = "Belt";
+const char pstrUsageBodySuit					[] = "Body Suit";
+const char pstrUsageFlexor						[] = "Flexor";
+const char pstrUsageGlove						[] = "Glove";
+const char pstrUsageHeadTracker					[] = "Head Track";
+const char pstrUsageHeadMountedDisplay			[] = "Head Disp";
+const char pstrUsageHandTracker					[] = "Hand Track";
+const char pstrUsageOculometer					[] = "Oculometer";
+const char pstrUsageVest						[] = "Vest";
+const char pstrUsageAnimatronicDevice			[] = "Animat Dev";
+const char pstrUsageStereoEnable				[] = "Stereo Enbl";
+const char pstrUsageDisplayEnable				[] = "Display Enbl";
+
+// Sport Controls Page
+const char pstrUsageBaseballBat					[] = "Baseball Bat";
+const char pstrUsageGolfClub					[] = "Golf Club";
+const char pstrUsageRowingMachine				[] = "Rowing Mach";
+const char pstrUsageTreadmill					[] = "Treadmill";
+const char pstrUsageOar							[] = "Oar";
+const char pstrUsageSlope						[] = "Slope";
+const char pstrUsageRate						[] = "Rate";
+const char pstrUsageStickSpeed					[] = "Stick Speed";
+const char pstrUsageStickFaceAngle				[] = "Stick Face Ang";
+const char pstrUsageStickHeelToe				[] = "Stick Heel/Toe";
+const char pstrUsageStickFollowThough			[] = "Stick Flw Thru";
+const char pstrUsageStickTempo					[] = "Stick Tempo";
+const char pstrUsageStickType					[] = "Stick Type";
+const char pstrUsageStickHeight					[] = "Stick Hght";
+const char pstrUsagePutter						[] = "Putter";
+const char pstrUsage1Iron						[] = "1 Iron";
+const char pstrUsage2Iron						[] = "2 Iron";
+const char pstrUsage3Iron						[] = "3 Iron";
+const char pstrUsage4Iron						[] = "4 Iron";
+const char pstrUsage5Iron						[] = "5 Iron";
+const char pstrUsage6Iron						[] = "6 Iron";
+const char pstrUsage7Iron						[] = "7 Iron";
+const char pstrUsage8Iron						[] = "8 Iron";
+const char pstrUsage9Iron						[] = "9 Iron";
+const char pstrUsage10Iron						[] = "10 Iron";
+const char pstrUsage11Iron						[] = "11 Iron";
+const char pstrUsageSandWedge					[] = "Sand Wedge";
+const char pstrUsageLoftWedge					[] = "Loft Wedge";
+const char pstrUsagePowerWedge					[] = "Pwr Wedge";
+const char pstrUsage1Wood						[] = "1 Wood";
+const char pstrUsage3Wood						[] = "3 Wood";
+const char pstrUsage5Wood						[] = "5 Wood";
+const char pstrUsage7Wood						[] = "7 Wood";
+const char pstrUsage9Wood						[] = "9 Wood";
+
+// Game Controls Page
+const char pstrUsage3DGameController			[] = "3D Game Ctrl";
+const char pstrUsagePinballDevice				[] = "Pinball Dev";
+const char pstrUsageGunDevice					[] = "Gun Dev";
+const char pstrUsagePointOfView					[] = "POV";
+const char pstrUsageTurnRightLeft				[] = "Turn Right Left";
+const char pstrUsagePitchForwardBackward		[] = "Pitch Fwd/Back";
+const char pstrUsageRollRightLeft				[] = "Roll Right/Left";
+const char pstrUsageMoveRightLeft				[] = "Move Right/Left";
+const char pstrUsageMoveForwardBackward			[] = "Move Fwd/Back";
+const char pstrUsageMoveUpDown					[] = "Move Up/Down";
+const char pstrUsageLeanRightLeft				[] = "Lean Right/Left";
+const char pstrUsageLeanForwardBackward			[] = "Lean Fwd/Back";
+const char pstrUsageHeightOfPOV					[] = "Height of POV";
+const char pstrUsageFlipper						[] = "Flipper";
+const char pstrUsageSecondaryFlipper			[] = "Second Flipper";
+const char pstrUsageBump						[] = "Bump";
+const char pstrUsageNewGame						[] = "New Game";
+const char pstrUsageShootBall					[] = "Shoot Ball";
+const char pstrUsagePlayer						[] = "Player";
+const char pstrUsageGunBolt						[] = "Gun Bolt";
+const char pstrUsageGunClip						[] = "Gun Clip";
+const char pstrUsageGunSelector					[] = "Gun Sel";
+const char pstrUsageGunSingleShot				[] = "Gun Sngl Shot";
+const char pstrUsageGunBurst					[] = "Gun Burst";
+const char pstrUsageGunAutomatic				[] = "Gun Auto";
+const char pstrUsageGunSafety					[] = "Gun Safety";
+const char pstrUsageGamepadFireJump				[] = "Gamepad Fire/Jump";
+const char pstrUsageGamepadTrigger				[] = "Gamepad Trig";
+
+// Generic Device Controls Page
+const char pstrUsageBatteryStrength				[] = "Bat Strength";
+const char pstrUsageWirelessChannel				[] = "Wireless Ch";
+const char pstrUsageWirelessID					[] = "Wireless ID";
+const char pstrUsageDiscoverWirelessControl		[] = "Discover Wireless Ctrl";
+const char pstrUsageSecurityCodeCharEntered		[] = "Sec Code Char Entrd";
+const char pstrUsageSecurityCodeCharErased		[] = "Sec Code Char Erased";
+const char pstrUsageSecurityCodeCleared			[] = "Sec Code Cleared";
+
+// LED Page
+const char pstrUsageNumLock						[] = "Num Lock";
+const char pstrUsageCapsLock					[] = "Caps Lock";
+const char pstrUsageScrollLock					[] = "Scroll Lock";
+const char pstrUsageCompose						[] = "Compose";
+const char pstrUsageKana						[] = "Kana";
+const char pstrUsagePower						[] = "Pwr";
+const char pstrUsageShift						[] = "Shift";
+const char pstrUsageDoNotDisturb				[] = "DND";
+const char pstrUsageMute						[] = "Mute";
+const char pstrUsageToneEnable					[] = "Tone Enbl";
+const char pstrUsageHighCutFilter				[] = "High Cut Fltr";
+const char pstrUsageLowCutFilter				[] = "Low Cut Fltr";
+const char pstrUsageEqualizerEnable				[] = "Eq Enbl";
+const char pstrUsageSoundFieldOn				[] = "Sound Field On";
+const char pstrUsageSurroundOn					[] = "Surround On";
+const char pstrUsageRepeat						[] = "Repeat";
+const char pstrUsageStereo						[] = "Stereo";
+const char pstrUsageSamplingRateDetect			[] = "Smpl Rate Detect";
+const char pstrUsageSpinning					[] = "Spinning";
+const char pstrUsageCAV							[] = "CAV";
+const char pstrUsageCLV							[] = "CLV";
+const char pstrUsageRecordingFormatDetect		[] = "Rec Format Detect";
+const char pstrUsageOffHook						[] = "Off Hook";
+const char pstrUsageRing						[] = "Ring";
+const char pstrUsageMessageWaiting				[] = "Msg Wait";
+const char pstrUsageDataMode					[] = "Data Mode";
+const char pstrUsageBatteryOperation			[] = "Bat Op";
+const char pstrUsageBatteryOK					[] = "Bat OK";
+const char pstrUsageBatteryLow					[] = "Bat Low";
+const char pstrUsageSpeaker						[] = "Speaker";
+const char pstrUsageHeadSet						[] = "Head Set";
+const char pstrUsageHold						[] = "Hold";
+const char pstrUsageMicrophone					[] = "Mic";
+const char pstrUsageCoverage					[] = "Coverage";
+const char pstrUsageNightMode					[] = "Night Mode";
+const char pstrUsageSendCalls					[] = "Send Calls";
+const char pstrUsageCallPickup					[] = "Call Pickup";
+const char pstrUsageConference					[] = "Conf";
+const char pstrUsageStandBy						[] = "Stand-by";
+const char pstrUsageCameraOn					[] = "Cam On";
+const char pstrUsageCameraOff					[] = "Cam Off";
+const char pstrUsageOnLine						[] = "On-Line";
+const char pstrUsageOffLine						[] = "Off-Line";
+const char pstrUsageBusy						[] = "Busy";
+const char pstrUsageReady						[] = "Ready";
+const char pstrUsagePaperOut					[] = "Paper Out";
+const char pstrUsagePaperJam					[] = "Paper Jam";
+const char pstrUsageRemote						[] = "Remote";
+const char pstrUsageForward						[] = "Fwd";
+const char pstrUsageReverse						[] = "Rev";
+const char pstrUsageStop						[] = "Stop";
+const char pstrUsageRewind						[] = "Rewind";
+const char pstrUsageFastForward					[] = "Fast Fwd";
+const char pstrUsagePlay						[] = "Play";
+const char pstrUsagePause						[] = "Pause";
+const char pstrUsageRecord						[] = "Rec";
+const char pstrUsageError						[] = "Error";
+const char pstrUsageSelectedIndicator			[] = "Usage Sel Ind";
+const char pstrUsageInUseIndicator				[] = "Usage In Use Ind";
+const char pstrUsageMultiModeIndicator			[] = "Usage Multi Mode Ind";
+const char pstrUsageIndicatorOn					[] = "Ind On";
+const char pstrUsageIndicatorFlash				[] = "Ind Flash";
+const char pstrUsageIndicatorSlowBlink			[] = "Ind Slow Blk";
+const char pstrUsageIndicatorFastBlink			[] = "Ind Fast Blk";
+const char pstrUsageIndicatorOff				[] = "Ind Off";
+const char pstrUsageFlashOnTime					[] = "Flash On Time";
+const char pstrUsageSlowBlinkOnTime				[] = "Slow Blk On Time";
+const char pstrUsageSlowBlinkOffTime			[] = "Slow Blk Off Time";
+const char pstrUsageFastBlinkOnTime				[] = "Fast Blk On Time";
+const char pstrUsageFastBlinkOffTime			[] = "Fast Blk Off Time";
+const char pstrUsageIndicatorColor				[] = "Usage Ind Color";
+const char pstrUsageIndicatorRed				[] = "Ind Red";
+const char pstrUsageIndicatorGreen				[] = "Ind Green";
+const char pstrUsageIndicatorAmber				[] = "Ind Amber";
+const char pstrUsageGenericIndicator			[] = "Gen Ind";
+const char pstrUsageSystemSuspend				[] = "Sys Suspend";
+const char pstrUsageExternalPowerConnected		[] = "Ext Pwr Conn";
+
+// Telephony Usage Page
+const char pstrUsagePhone						[] = "Phone";
+const char pstrUsageAnsweringMachine			[] = "Answ Mach";
+const char pstrUsageMessageControls				[] = "Msg Ctrls";
+const char pstrUsageHandset						[] = "Handset";
+const char pstrUsageHeadset						[] = "Headset";
+const char pstrUsageTelephonyKeyPad				[] = "Tel Key Pad";
+const char pstrUsageProgrammableButton			[] = "Prog Button";
+const char pstrUsageHookSwitch					[] = "Hook Sw";
+const char pstrUsageFlash						[] = "Flash";
+const char pstrUsageFeature						[] = "Feature";
+//const char pstrUsageHold						[] = "Hold";
+const char pstrUsageRedial						[] = "Redial";
+const char pstrUsageTransfer					[] = "Transfer";
+const char pstrUsageDrop						[] = "Drop";
+const char pstrUsagePark						[] = "Park";
+const char pstrUsageForwardCalls				[] = "Fwd Calls";
+const char pstrUsageAlternateFunction			[] = "Alt Func";
+const char pstrUsageLine						[] = "Line";
+const char pstrUsageSpeakerPhone				[] = "Spk Phone";
+//const char pstrUsageConference					[] = "Conference";
+const char pstrUsageRingEnable					[] = "Ring Enbl";
+const char pstrUsageRingSelect					[] = "Ring Sel";
+const char pstrUsagePhoneMute					[] = "Phone Mute";
+const char pstrUsageCallerID					[] = "Caller ID";
+const char pstrUsageSend						[] = "Send";
+const char pstrUsageSpeedDial					[] = "Speed Dial";
+const char pstrUsageStoreNumber					[] = "Store Num";
+const char pstrUsageRecallNumber				[] = "Recall Num";
+const char pstrUsagePhoneDirectory				[] = "Phone Dir";
+const char pstrUsageVoiceMail					[] = "Voice Mail";
+const char pstrUsageScreenCalls					[] = "Screen Calls";
+//const char pstrUsageDoNotDisturb				[] = "Do Not Disturb";
+const char pstrUsageMessage						[] = "Msg";
+const char pstrUsageAnswerOnOff					[] = "Answer On/Off";
+const char pstrUsageInsideDialTone				[] = "Inside Dial Tone";
+const char pstrUsageOutsideDialTone				[] = "Outside Dial Tone";
+const char pstrUsageInsideRingTone				[] = "Inside Ring Tone";
+const char pstrUsageOutsideRingTone				[] = "Outside Ring Tone";
+const char pstrUsagePriorityRingTone			[] = "Prior Ring Tone";
+const char pstrUsageInsideRingback				[] = "Inside Ringback";
+const char pstrUsagePriorityRingback			[] = "Priority Ringback";
+const char pstrUsageLineBusyTone				[] = "Ln Busy Tone";
+const char pstrUsageReorderTone					[] = "Reorder Tone";
+const char pstrUsageCallWaitingTone				[] = "Call Wait Tone";
+const char pstrUsageConfirmationTone1			[] = "Cnfrm Tone1";
+const char pstrUsageConfirmationTone2			[] = "Cnfrm Tone2";
+const char pstrUsageTonesOff					[] = "Tones Off";
+const char pstrUsageOutsideRingback				[] = "Outside Ringback";
+const char pstrUsageRinger						[] = "Ringer";
+const char pstrUsagePhoneKey0					[] = "0";
+const char pstrUsagePhoneKey1					[] = "1";
+const char pstrUsagePhoneKey2					[] = "2";
+const char pstrUsagePhoneKey3					[] = "3";
+const char pstrUsagePhoneKey4					[] = "4";
+const char pstrUsagePhoneKey5					[] = "5";
+const char pstrUsagePhoneKey6					[] = "6";
+const char pstrUsagePhoneKey7					[] = "7";
+const char pstrUsagePhoneKey8					[] = "8";
+const char pstrUsagePhoneKey9					[] = "9";
+const char pstrUsagePhoneKeyStar				[] = "*";
+const char pstrUsagePhoneKeyPound				[] = "#";
+const char pstrUsagePhoneKeyA					[] = "A";
+const char pstrUsagePhoneKeyB					[] = "B";
+const char pstrUsagePhoneKeyC					[] = "C";
+const char pstrUsagePhoneKeyD					[] = "D";
+
+// Consumer Usage Page
+const char pstrUsageConsumerControl				[] = "Consumer Ctrl";
+const char pstrUsageNumericKeyPad				[] = "Num Key Pad";
+//const char pstrUsageProgrammableButton			[] = "Prog Btn";
+//const char pstrUsageMicrophone					[] = "Mic";
+const char pstrUsageHeadphone					[] = "Headphone";
+const char pstrUsageGraphicEqualizer			[] = "Graph Eq";
+const char pstrUsagePlus10						[] = "+10";
+const char pstrUsagePlus100						[] = "+100";
+const char pstrUsageAMPM						[] = "AM/PM";
+//const char pstrUsagePower						[] = "Pwr";
+const char pstrUsageReset						[] = "Reset";
+const char pstrUsageSleep						[] = "Sleep";
+const char pstrUsageSleepAfter					[] = "Sleep After";
+const char pstrUsageSleepMode					[] = "Sleep Mode";
+const char pstrUsageIllumination				[] = "Illumin";
+const char pstrUsageFunctionButtons				[] = "Func Btns";
+const char pstrUsageMenu						[] = "Menu";
+const char pstrUsageMenuPick					[] = "Menu Pick";
+const char pstrUsageMenuUp						[] = "Menu Up";
+const char pstrUsageMenuDown					[] = "Menu Down";
+const char pstrUsageMenuLeft					[] = "Menu Left";
+const char pstrUsageMenuRight					[] = "Menu Right";
+const char pstrUsageMenuEscape					[] = "Menu Esc";
+const char pstrUsageMenuValueIncrease			[] = "Menu Val Inc";
+const char pstrUsageMenuValueDecrease			[] = "Menu Val Dec";
+const char pstrUsageDataOnScreen				[] = "Data On Scr";
+const char pstrUsageClosedCaption				[] = "Closed Cptn";
+const char pstrUsageClosedCaptionSelect			[] = "Closed Cptn Sel";
+const char pstrUsageVCRTV						[] = "VCR/TV";
+const char pstrUsageBroadcastMode				[] = "Brdcast Mode";
+const char pstrUsageSnapshot					[] = "Snapshot";
+const char pstrUsageStill						[] = "Still";
+const char pstrUsageSelection					[] = "Sel";
+const char pstrUsageAssignSelection				[] = "Assign Sel";
+const char pstrUsageModeStep					[] = "Mode Step";
+const char pstrUsageRecallLast					[] = "Recall Last";
+const char pstrUsageEnterChannel				[] = "Entr Channel";
+const char pstrUsageOrderMovie					[] = "Ord Movie";
+const char pstrUsageChannel						[] = "Channel";
+const char pstrUsageMediaSelection				[] = "Med Sel";
+const char pstrUsageMediaSelectComputer			[] = "Med Sel Comp";
+const char pstrUsageMediaSelectTV				[] = "Med Sel TV";
+const char pstrUsageMediaSelectWWW				[] = "Med Sel WWW";
+const char pstrUsageMediaSelectDVD				[] = "Med Sel DVD";
+const char pstrUsageMediaSelectTelephone		[] = "Med Sel Tel";
+const char pstrUsageMediaSelectProgramGuide		[] = "Med Sel PG";
+const char pstrUsageMediaSelectVideoPhone		[] = "Med Sel Vid";
+const char pstrUsageMediaSelectGames			[] = "Med Sel Games";
+const char pstrUsageMediaSelectMessages			[] = "Med Sel Msg";
+const char pstrUsageMediaSelectCD				[] = "Med Sel CD";
+const char pstrUsageMediaSelectVCR				[] = "Med Sel VCR";
+const char pstrUsageMediaSelectTuner			[] = "Med Sel Tuner";
+const char pstrUsageQuit						[] = "Quit";
+const char pstrUsageHelp						[] = "Help";
+const char pstrUsageMediaSelectTape				[] = "Med Sel Tape";
+const char pstrUsageMediaSelectCable			[] = "Med Sel Cbl";
+const char pstrUsageMediaSelectSatellite		[] = "Med Sel Sat";
+const char pstrUsageMediaSelectSecurity			[] = "Med Sel Secur";
+const char pstrUsageMediaSelectHome				[] = "Med Sel Home";
+const char pstrUsageMediaSelectCall				[] = "Med Sel Call";
+const char pstrUsageChannelIncrement			[] = "Ch Inc";
+const char pstrUsageChannelDecrement			[] = "Ch Dec";
+const char pstrUsageMediaSelectSAP				[] = "Med Sel SAP";
+const char pstrUsageVCRPlus						[] = "VCR+";
+const char pstrUsageOnce						[] = "Once";
+const char pstrUsageDaily						[] = "Daily";
+const char pstrUsageWeekly						[] = "Weekly";
+const char pstrUsageMonthly						[] = "Monthly";
+//const char pstrUsagePlay						[] = "Play";
+//const char pstrUsagePause						[] = "Pause";
+//const char pstrUsageRecord						[] = "Rec";
+//const char pstrUsageFastForward					[] = "FF";
+//const char pstrUsageRewind						[] = "Rewind";
+const char pstrUsageScanNextTrack				[] = "Next Track";
+const char pstrUsageScanPreviousTrack			[] = "Prev Track";
+//const char pstrUsageStop						[] = "Stop";
+const char pstrUsageEject						[] = "Eject";
+const char pstrUsageRandomPlay					[] = "Random";
+const char pstrUsageSelectDisk					[] = "Sel Disk";
+const char pstrUsageEnterDisk					[] = "Ent Disk";
+//const char pstrUsageRepeat						[] = "Repeat";
+const char pstrUsageTracking					[] = "Tracking";
+const char pstrUsageTrackNormal					[] = "Trk Norm";
+const char pstrUsageSlowTracking				[] = "Slow Trk";
+const char pstrUsageFrameForward				[] = "Frm Fwd";
+const char pstrUsageFrameBackwards				[] = "Frm Back";
+const char pstrUsageMark						[] = "Mark";
+const char pstrUsageClearMark					[] = "Clr Mark";
+const char pstrUsageRepeatFromMark				[] = "Rpt Mark";
+const char pstrUsageReturnToMark				[] = "Ret to Mark";
+const char pstrUsageSearchMarkForward			[] = "Search Mark Fwd";
+const char pstrUsageSearchMarkBackwards			[] = "Search Mark Back";
+const char pstrUsageCounterReset				[] = "Counter Reset";
+const char pstrUsageShowCounter					[] = "Show Counter";
+const char pstrUsageTrackingIncrement			[] = "Track Inc";
+const char pstrUsageTrackingDecrement			[] = "Track Dec";
+const char pstrUsageStopEject					[] = "Stop/Eject";
+const char pstrUsagePlayPause					[] = "Play/Pause";
+const char pstrUsagePlaySkip					[] = "Play/Skip";
+const char pstrUsageVolume						[] = "Vol";
+const char pstrUsageBalance						[] = "Balance";
+//const char pstrUsageMute						[] = "Mute";
+const char pstrUsageBass						[] = "Bass";
+const char pstrUsageTreble						[] = "Treble";
+const char pstrUsageBassBoost					[] = "Bass Boost";
+const char pstrUsageSurroundMode				[] = "Surround";
+const char pstrUsageLoudness					[] = "Loud";
+const char pstrUsageMPX							[] = "MPX";
+const char pstrUsageVolumeIncrement				[] = "Vol Inc";
+const char pstrUsageVolumeDecrement				[] = "Vol Dec";
+const char pstrUsageSpeedSelect					[] = "Speed";
+const char pstrUsagePlaybackSpeed				[] = "Play Speed";
+const char pstrUsageStandardPlay				[] = "Std Play";
+const char pstrUsageLongPlay					[] = "Long Play";
+const char pstrUsageExtendedPlay				[] = "Ext Play";
+const char pstrUsageSlow						[] = "Slow";
+const char pstrUsageFanEnable					[] = "Fan Enbl";
+const char pstrUsageFanSpeed					[] = "Fan Speed";
+const char pstrUsageLightEnable					[] = "Light Enbl";
+const char pstrUsageLightIlluminationLevel		[] = "Light Illum Lev";
+const char pstrUsageClimateControlEnable		[] = "Climate Enbl";
+const char pstrUsageRoomTemperature				[] = "Room Temp";
+const char pstrUsageSecurityEnable				[] = "Secur Enbl";
+const char pstrUsageFireAlarm					[] = "Fire Alm";
+const char pstrUsagePoliceAlarm					[] = "Police Alm";
+const char pstrUsageProximity					[] = "Prox";
+const char pstrUsageMotion						[] = "Motion";
+const char pstrUsageDuresAlarm					[] = "Dures Alm";
+const char pstrUsageHoldupAlarm					[] = "Holdup Alm";
+const char pstrUsageMedicalAlarm				[] = "Med Alm";
+const char pstrUsageBalanceRight				[] = "Balance Right";
+const char pstrUsageBalanceLeft					[] = "Balance Left";
+const char pstrUsageBassIncrement				[] = "Bass Inc";
+const char pstrUsageBassDecrement				[] = "Bass Dec";
+const char pstrUsageTrebleIncrement				[] = "Treble Inc";
+const char pstrUsageTrebleDecrement				[] = "Treble Dec";
+const char pstrUsageSpeakerSystem				[] = "Spk Sys";
+const char pstrUsageChannelLeft					[] = "Ch Left";
+const char pstrUsageChannelRight				[] = "Ch Right";
+const char pstrUsageChannelCenter				[] = "Ch Center";
+const char pstrUsageChannelFront				[] = "Ch Front";
+const char pstrUsageChannelCenterFront			[] = "Ch Cntr Front";
+const char pstrUsageChannelSide					[] = "Ch Side";
+const char pstrUsageChannelSurround				[] = "Ch Surround";
+const char pstrUsageChannelLowFreqEnhancement	[] = "Ch Low Freq Enh";
+const char pstrUsageChannelTop					[] = "Ch Top";
+const char pstrUsageChannelUnknown				[] = "Ch Unk";
+const char pstrUsageSubChannel					[] = "Sub-ch";
+const char pstrUsageSubChannelIncrement			[] = "Sub-ch Inc";
+const char pstrUsageSubChannelDecrement			[] = "Sub-ch Dec";
+const char pstrUsageAlternateAudioIncrement		[] = "Alt Aud Inc";
+const char pstrUsageAlternateAudioDecrement		[] = "Alt Aud Dec";
+const char pstrUsageApplicationLaunchButtons	[] = "App Launch Btns";
+const char pstrUsageALLaunchButtonConfigTool	[] = "AL Launch Conf Tl";
+const char pstrUsageALProgrammableButton		[] = "AL Pgm Btn";
+const char pstrUsageALConsumerControlConfig		[] = "AL Cons Ctrl Cfg";
+const char pstrUsageALWordProcessor				[] = "AL Word Proc";
+const char pstrUsageALTextEditor				[] = "AL Txt Edtr";
+const char pstrUsageALSpreadsheet				[] = "AL Sprdsheet";
+const char pstrUsageALGraphicsEditor			[] = "AL Graph Edtr";
+const char pstrUsageALPresentationApp			[] = "AL Present App";
+const char pstrUsageALDatabaseApp				[] = "AL DB App";
+const char pstrUsageALEmailReader				[] = "AL E-mail Rdr";
+const char pstrUsageALNewsreader				[] = "AL Newsrdr";
+const char pstrUsageALVoicemail					[] = "AL Voicemail";
+const char pstrUsageALContactsAddressBook		[] = "AL Addr Book";
+const char pstrUsageALCalendarSchedule			[] = "AL Clndr/Schdlr";
+const char pstrUsageALTaskProjectManager		[] = "AL Task/Prj Mgr";
+const char pstrUsageALLogJournalTimecard		[] = "AL Log/Jrnl/Tmcrd";
+const char pstrUsageALCheckbookFinance			[] = "AL Chckbook/Fin";
+const char pstrUsageALCalculator				[] = "AL Calc";
+const char pstrUsageALAVCapturePlayback			[] = "AL A/V Capt/Play";
+const char pstrUsageALLocalMachineBrowser		[] = "AL Loc Mach Brow";
+const char pstrUsageALLANWANBrow				[] = "AL LAN/WAN Brow";
+const char pstrUsageALInternetBrowser			[] = "AL I-net Brow";
+const char pstrUsageALRemoteNetISPConnect		[] = "AL Rem Net Con";
+const char pstrUsageALNetworkConference			[] = "AL Net Conf";
+const char pstrUsageALNetworkChat				[] = "AL Net Chat";
+const char pstrUsageALTelephonyDialer			[] = "AL Tel/Dial";
+const char pstrUsageALLogon						[] = "AL Logon";
+const char pstrUsageALLogoff					[] = "AL Logoff";
+const char pstrUsageALLogonLogoff				[] = "AL Logon/Logoff";
+const char pstrUsageALTermLockScrSav			[] = "AL Term Lock/Scr Sav";
+const char pstrUsageALControlPannel				[] = "AL Ctrl Pan";
+const char pstrUsageALCommandLineProcessorRun	[] = "AL Cmd/Run";
+const char pstrUsageALProcessTaskManager		[] = "AL Task Mgr";
+const char pstrUsageALSelectTaskApplication		[] = "AL Sel App";
+const char pstrUsageALNextTaskApplication		[] = "AL Next App";
+const char pstrUsageALPreviousTaskApplication	[] = "AL Prev App";
+const char pstrUsageALPreemptiveHaltTaskApp		[] = "AL Prmpt Halt App";
+const char pstrUsageALIntegratedHelpCenter		[] = "AL Hlp Cntr";
+const char pstrUsageALDocuments					[] = "AL Docs";
+const char pstrUsageALThesaurus					[] = "AL Thsrs";
+const char pstrUsageALDictionary				[] = "AL Dict";
+const char pstrUsageALDesktop					[] = "AL Desktop";
+const char pstrUsageALSpellCheck				[] = "AL Spell Chk";
+const char pstrUsageALGrammarCheck				[] = "AL Gram Chk";
+const char pstrUsageALWirelessStatus			[] = "AL Wireless Sts";
+const char pstrUsageALKeyboardLayout			[] = "AL Kbd Layout";
+const char pstrUsageALVirusProtection			[] = "AL Vir Protect";
+const char pstrUsageALEncryption				[] = "AL Encrypt";
+const char pstrUsageALScreenSaver				[] = "AL Scr Sav";
+const char pstrUsageALAlarms					[] = "AL Alarms";
+const char pstrUsageALClock						[] = "AL Clock";
+const char pstrUsageALFileBrowser				[] = "AL File Brow";
+const char pstrUsageALPowerStatus				[] = "AL Pwr Sts";
+const char pstrUsageALImageBrowser				[] = "AL Img Brow";
+const char pstrUsageALAudioBrowser				[] = "AL Aud Brow";
+const char pstrUsageALMovieBrowser				[] = "AL Mov Brow";
+const char pstrUsageALDigitalRightsManager		[] = "AL Dig Rights Mgr";
+const char pstrUsageALDigitalWallet				[] = "AL Dig Wallet";
+const char pstrUsageALInstantMessaging			[] = "AL Inst Msg";
+const char pstrUsageALOEMFeaturesBrowser		[] = "AL OEM Tips Brow";
+const char pstrUsageALOEMHelp					[] = "AL OEM Hlp";
+const char pstrUsageALOnlineCommunity			[] = "AL Online Com";
+const char pstrUsageALEntertainmentContentBrow	[] = "AL Ent Cont Brow";
+const char pstrUsageALOnlineShoppingBrowser		[] = "AL Online Shop Brow";
+const char pstrUsageALSmartCardInfoHelp			[] = "AL SmartCard Inf";
+const char pstrUsageALMarketMonitorFinBrowser	[] = "AL Market Brow";
+const char pstrUsageALCustomCorpNewsBrowser		[] = "AL Cust Corp News Brow";
+const char pstrUsageALOnlineActivityBrowser		[] = "AL Online Act Brow";
+const char pstrUsageALResearchSearchBrowser		[] = "AL Search Brow";
+const char pstrUsageALAudioPlayer				[] = "AL Aud Player";
+const char pstrUsageGenericGUIAppControls		[] = "Gen GUI App Ctrl";
+const char pstrUsageACNew						[] = "AC New";
+const char pstrUsageACOpen						[] = "AC Open";
+const char pstrUsageACClose						[] = "AC Close";
+const char pstrUsageACExit						[] = "AC Exit";
+const char pstrUsageACMaximize					[] = "AC Max";
+const char pstrUsageACMinimize					[] = "AC Min";
+const char pstrUsageACSave						[] = "AC Save";
+const char pstrUsageACPrint						[] = "AC Print";
+const char pstrUsageACProperties				[] = "AC Prop";
+const char pstrUsageACUndo						[] = "AC Undo";
+const char pstrUsageACCopy						[] = "AC Copy";
+const char pstrUsageACCut						[] = "AC Cut";
+const char pstrUsageACPaste						[] = "AC Paste";
+const char pstrUsageACSelectAll					[] = "AC Sel All";
+const char pstrUsageACFind						[] = "AC Find";
+const char pstrUsageACFindAndReplace			[] = "AC Find/Replace";
+const char pstrUsageACSearch					[] = "AC Search";
+const char pstrUsageACGoto						[] = "AC Goto";
+const char pstrUsageACHome						[] = "AC Home";
+const char pstrUsageACBack						[] = "AC Back";
+const char pstrUsageACForward					[] = "AC Fwd";
+const char pstrUsageACStop						[] = "AC Stop";
+const char pstrUsageACRefresh					[] = "AC Refresh";
+const char pstrUsageACPreviousLink				[] = "AC Prev Link";
+const char pstrUsageACNextLink					[] = "AC Next Link";
+const char pstrUsageACBookmarks					[] = "AC Bkmarks";
+const char pstrUsageACHistory					[] = "AC Hist";
+const char pstrUsageACSubscriptions				[] = "AC Subscr";
+const char pstrUsageACZoomIn					[] = "AC Zoom In";
+const char pstrUsageACZoomOut					[] = "AC Zoom Out";
+const char pstrUsageACZoom						[] = "AC Zoom";
+const char pstrUsageACFullScreenView			[] = "AC Full Scr";
+const char pstrUsageACNormalView				[] = "AC Norm View";
+const char pstrUsageACViewToggle				[] = "AC View Tgl";
+const char pstrUsageACScrollUp					[] = "AC Scroll Up";
+const char pstrUsageACScrollDown				[] = "AC Scroll Down";
+const char pstrUsageACScroll					[] = "AC Scroll";
+const char pstrUsageACPanLeft					[] = "AC Pan Left";
+const char pstrUsageACPanRight					[] = "AC Pan Right";
+const char pstrUsageACPan						[] = "AC Pan";
+const char pstrUsageACNewWindow					[] = "AC New Wnd";
+const char pstrUsageACTileHoriz					[] = "AC Tile Horiz";
+const char pstrUsageACTileVert					[] = "AC Tile Vert";
+const char pstrUsageACFormat					[] = "AC Frmt";
+const char pstrUsageACEdit						[] = "AC Edit";
+const char pstrUsageACBold						[] = "AC Bold";
+const char pstrUsageACItalics					[] = "AC Ital";
+const char pstrUsageACUnderline					[] = "AC Under";
+const char pstrUsageACStrikethrough				[] = "AC Strike";
+const char pstrUsageACSubscript					[] = "AC Sub";
+const char pstrUsageACSuperscript				[] = "AC Super";
+const char pstrUsageACAllCaps					[] = "AC All Caps";
+const char pstrUsageACRotate					[] = "AC Rotate";
+const char pstrUsageACResize					[] = "AC Resize";
+const char pstrUsageACFlipHorizontal			[] = "AC Flp H";
+const char pstrUsageACFlipVertical				[] = "AC Flp V";
+const char pstrUsageACMirrorHorizontal			[] = "AC Mir H";
+const char pstrUsageACMirrorVertical			[] = "AC Mir V";
+const char pstrUsageACFontSelect				[] = "AC Fnt Sel";
+const char pstrUsageACFontColor					[] = "AC Fnt Clr";
+const char pstrUsageACFontSize					[] = "AC Fnt Size";
+const char pstrUsageACJustifyLeft				[] = "AC Just Left";
+const char pstrUsageACJustifyCenterH			[] = "AC Just Cent H";
+const char pstrUsageACJustifyRight				[] = "AC Just Right";
+const char pstrUsageACJustifyBlockH				[] = "AC Just Block H";
+const char pstrUsageACJustifyTop				[] = "AC Just Top";
+const char pstrUsageACJustifyCenterV			[] = "AC Just Cent V";
+const char pstrUsageACJustifyBottom				[] = "AC Just Bot";
+const char pstrUsageACJustifyBlockV				[] = "AC Just Block V";
+const char pstrUsageACIndentDecrease			[] = "AC Indent Dec";
+const char pstrUsageACIndentIncrease			[] = "AC Indent Inc";
+const char pstrUsageACNumberedList				[] = "AC Num List";
+const char pstrUsageACRestartNumbering			[] = "AC Res Num";
+const char pstrUsageACBulletedList				[] = "AC Blt List";
+const char pstrUsageACPromote					[] = "AC Promote";
+const char pstrUsageACDemote					[] = "AC Demote";
+const char pstrUsageACYes						[] = "AC Yes";
+const char pstrUsageACNo						[] = "AC No";
+const char pstrUsageACCancel					[] = "AC Cancel";
+const char pstrUsageACCatalog					[] = "AC Ctlg";
+const char pstrUsageACBuyChkout					[] = "AC Buy";
+const char pstrUsageACAddToCart					[] = "AC Add2Cart";
+const char pstrUsageACExpand					[] = "AC Xpnd";
+const char pstrUsageACExpandAll					[] = "AC Xpand All";
+const char pstrUsageACCollapse					[] = "AC Collapse";
+const char pstrUsageACCollapseAll				[] = "AC Collapse All";
+const char pstrUsageACPrintPreview				[] = "AC Prn Prevw";
+const char pstrUsageACPasteSpecial				[] = "AC Paste Spec";
+const char pstrUsageACInsertMode				[] = "AC Ins Mode";
+const char pstrUsageACDelete					[] = "AC Del";
+const char pstrUsageACLock						[] = "AC Lock";
+const char pstrUsageACUnlock					[] = "AC Unlock";
+const char pstrUsageACProtect					[] = "AC Prot";
+const char pstrUsageACUnprotect					[] = "AC Unprot";
+const char pstrUsageACAttachComment				[] = "AC Attach Cmnt";
+const char pstrUsageACDeleteComment				[] = "AC Del Cmnt";
+const char pstrUsageACViewComment				[] = "AC View Cmnt";
+const char pstrUsageACSelectWord				[] = "AC Sel Word";
+const char pstrUsageACSelectSentence			[] = "AC Sel Sntc";
+const char pstrUsageACSelectParagraph			[] = "AC Sel Para";
+const char pstrUsageACSelectColumn				[] = "AC Sel Col";
+const char pstrUsageACSelectRow					[] = "AC Sel Row";
+const char pstrUsageACSelectTable				[] = "AC Sel Tbl";
+const char pstrUsageACSelectObject				[] = "AC Sel Obj";
+const char pstrUsageACRedoRepeat				[] = "AC Redo";
+const char pstrUsageACSort						[] = "AC Sort";
+const char pstrUsageACSortAscending				[] = "AC Sort Asc";
+const char pstrUsageACSortDescending			[] = "AC Sort Desc";
+const char pstrUsageACFilter					[] = "AC Filt";
+const char pstrUsageACSetClock					[] = "AC Set Clk";
+const char pstrUsageACViewClock					[] = "AC View Clk";
+const char pstrUsageACSelectTimeZone			[] = "AC Sel Time Z";
+const char pstrUsageACEditTimeZone				[] = "AC Edt Time Z";
+const char pstrUsageACSetAlarm					[] = "AC Set Alm";
+const char pstrUsageACClearAlarm				[] = "AC Clr Alm";
+const char pstrUsageACSnoozeAlarm				[] = "AC Snz Alm";
+const char pstrUsageACResetAlarm				[] = "AC Rst Alm";
+const char pstrUsageACSyncronize				[] = "AC Sync";
+const char pstrUsageACSendReceive				[] = "AC Snd/Rcv";
+const char pstrUsageACSendTo					[] = "AC Snd To";
+const char pstrUsageACReply						[] = "AC Reply";
+const char pstrUsageACReplyAll					[] = "AC Reply All";
+const char pstrUsageACForwardMessage			[] = "AC Fwd Msg";
+const char pstrUsageACSend						[] = "AC Snd";
+const char pstrUsageACAttachFile				[] = "AC Att File";
+const char pstrUsageACUpload					[] = "AC Upld";
+const char pstrUsageACDownload					[] = "AC Dnld";
+const char pstrUsageACSetBorders				[] = "AC Set Brd";
+const char pstrUsageACInsertRow					[] = "AC Ins Row";
+const char pstrUsageACInsertColumn				[] = "AC Ins Col";
+const char pstrUsageACInsertFile				[] = "AC Ins File";
+const char pstrUsageACInsertPicture				[] = "AC Ins Pic";
+const char pstrUsageACInsertObject				[] = "AC Ins Obj";
+const char pstrUsageACInsertSymbol				[] = "AC Ins Sym";
+const char pstrUsageACSaveAndClose				[] = "AC Sav&Cls";
+const char pstrUsageACRename					[] = "AC Rename";
+const char pstrUsageACMerge						[] = "AC Merge";
+const char pstrUsageACSplit						[] = "AC Split";
+const char pstrUsageACDistributeHorizontaly		[] = "AC Dist Hor";
+const char pstrUsageACDistributeVerticaly		[] = "AC Dist Ver";
+
+// Digitaizers
+const char pstrUsageDigitizer					[] = "Digitizer";
+const char pstrUsagePen							[] = "Pen";
+const char pstrUsageLightPen					[] = "Light Pen";
+const char pstrUsageTouchScreen					[] = "Touch Scr";
+const char pstrUsageTouchPad					[] = "Touch Pad";
+const char pstrUsageWhiteBoard					[] = "White Brd";
+const char pstrUsageCoordinateMeasuringMachine	[] = "Coord Meas Mach";
+const char pstrUsage3DDigitizer					[] = "3D Dgtz";
+const char pstrUsageStereoPlotter				[] = "Stereo Plot";
+const char pstrUsageArticulatedArm				[] = "Art Arm";
+const char pstrUsageArmature					[] = "Armature";
+const char pstrUsageMultiplePointDigitizer		[] = "Multi Point Dgtz";
+const char pstrUsageFreeSpaceWand				[] = "Free Space Wand";
+const char pstrUsageStylus						[] = "Stylus";
+const char pstrUsagePuck						[] = "Puck";
+const char pstrUsageFinger						[] = "Finger";
+const char pstrUsageTipPressure					[] = "Tip Press";
+const char pstrUsageBarrelPressure				[] = "Brl Press";
+const char pstrUsageInRange						[] = "In Range";
+const char pstrUsageTouch						[] = "Touch";
+const char pstrUsageUntouch						[] = "Untouch";
+const char pstrUsageTap							[] = "Tap";
+const char pstrUsageQuality						[] = "Qlty";
+const char pstrUsageDataValid					[] = "Data Valid";
+const char pstrUsageTransducerIndex				[] = "Transducer Ind";
+const char pstrUsageTabletFunctionKeys			[] = "Tabl Func Keys";
+const char pstrUsageProgramChangeKeys			[] = "Pgm Chng Keys";
+//const char pstrUsageBatteryStrength				[] = "Bat Strength";
+const char pstrUsageInvert						[] = "Invert";
+const char pstrUsageXTilt						[] = "X Tilt";
+const char pstrUsageYTilt						[] = "Y Tilt";
+const char pstrUsageAzimuth						[] = "Azimuth";
+const char pstrUsageAltitude					[] = "Altitude";
+const char pstrUsageTwist						[] = "Twist";
+const char pstrUsageTipSwitch					[] = "Tip Sw";
+const char pstrUsageSecondaryTipSwitch			[] = "Scnd Tip Sw";
+const char pstrUsageBarrelSwitch				[] = "Brl Sw";
+const char pstrUsageEraser						[] = "Eraser";
+const char pstrUsageTabletPick					[] = "Tbl Pick";
+
+// Alphanumeric Display Page
+const char pstrUsageAlphanumericDisplay			[] = "Alphanum Disp";
+const char pstrUsageBitmappedDisplay			[] = "Bmp Disp";
+const char pstrUsageDisplayAttributesReport		[] = "Disp Attr Rpt";
+const char pstrUsageASCIICharacterSet			[] = "ASCII chset";
+const char pstrUsageDataReadBack				[] = "Data Rd Back";
+const char pstrUsageFontReadBack				[] = "Fnt Rd Back";
+const char pstrUsageDisplayControlReport		[] = "Disp Ctrl Rpt";
+const char pstrUsageClearDisplay				[] = "Clr Disp";
+//const char pstrUsageDisplayEnable				[] = "Disp Enbl";
+const char pstrUsageScreenSaverDelay			[] = "Scr Sav Delay";
+const char pstrUsageScreenSaverEnable			[] = "Scr Sav Enbl";
+const char pstrUsageVerticalScroll				[] = "V Scroll";
+const char pstrUsageHorizontalScroll			[] = "H Scroll";
+const char pstrUsageCharacterReport				[] = "Char Rpt";
+const char pstrUsageDisplayData					[] = "Disp Data";
+const char pstrUsageDisplayStatus				[] = "Disp Stat";
+const char pstrUsageStatusNotReady				[] = "Stat !Ready";
+const char pstrUsageStatusReady					[] = "Stat Ready";
+const char pstrUsageErrorNotALoadableCharacter	[] = "Err Not Ld Char";
+const char pstrUsageErrorFotDataCanNotBeRead	[] = "Fnt Data Rd Err";
+const char pstrUsageCursorPositionReport		[] = "Cur Pos Rpt";
+const char pstrUsageRow							[] = "Row";
+const char pstrUsageColumn						[] = "Col";
+const char pstrUsageRows						[] = "Rows";
+const char pstrUsageColumns						[] = "Cols";
+const char pstrUsageCursorPixelPosition			[] = "Cur Pix Pos";
+const char pstrUsageCursorMode					[] = "Cur Mode";
+const char pstrUsageCursorEnable				[] = "Cur Enbl";
+const char pstrUsageCursorBlink					[] = "Cur Blnk";
+const char pstrUsageFontReport					[] = "Fnt Rpt";
+const char pstrUsageFontData					[] = "Fnt Data";
+const char pstrUsageCharacterWidth				[] = "Char Wdth";
+const char pstrUsageCharacterHeight				[] = "Char Hght";
+const char pstrUsageCharacterSpacingHorizontal	[] = "Char Space H";
+const char pstrUsageCharacterSpacingVertical	[] = "Char Space V";
+const char pstrUsageUnicodeCharset				[] = "Unicode Char";
+const char pstrUsageFont7Segment				[] = "Fnt 7-seg";
+const char pstrUsage7SegmentDirectMap			[] = "7-seg map";
+const char pstrUsageFont14Segment				[] = "Fnt 14-seg";
+const char pstrUsage14SegmentDirectMap			[] = "14-seg map";
+const char pstrUsageDisplayBrightness			[] = "Disp Bright";
+const char pstrUsageDisplayContrast				[] = "Disp Cntrst";
+const char pstrUsageCharacterAttribute			[] = "Char Attr";
+const char pstrUsageAttributeReadback			[] = "Attr Readbk";
+const char pstrUsageAttributeData				[] = "Attr Data";
+const char pstrUsageCharAttributeEnhance		[] = "Char Attr Enh";
+const char pstrUsageCharAttributeUnderline		[] = "Char Attr Undl";
+const char pstrUsageCharAttributeBlink			[] = "Char Attr Blnk";
+const char pstrUsageBitmapSizeX					[] = "Bmp Size X";
+const char pstrUsageBitmapSizeY					[] = "Bmp Size Y";
+const char pstrUsageBitDepthFormat				[] = "Bit Dpth Fmt";
+const char pstrUsageDisplayOrientation			[] = "Disp Ornt";
+const char pstrUsagePaletteReport				[] = "Pal Rpt";
+const char pstrUsagePaletteDataSize				[] = "Pal Data Size";
+const char pstrUsagePaletteDataOffset			[] = "Pal Data Off";
+const char pstrUsagePaletteData					[] = "Pal Data";
+const char pstrUsageBlitReport					[] = "Blit Rpt";
+const char pstrUsageBlitRectangleX1				[] = "Blit Rect X1";
+const char pstrUsageBlitRectangleY1				[] = "Blit Rect Y1";
+const char pstrUsageBlitRectangleX2				[] = "Blit Rect X2";
+const char pstrUsageBlitRectangleY2				[] = "Blit Rect Y2";
+const char pstrUsageBlitData					[] = "Blit Data";
+const char pstrUsageSoftButton					[] = "Soft Btn";
+const char pstrUsageSoftButtonID				[] = "Soft Btn ID";
+const char pstrUsageSoftButtonSide				[] = "Soft Btn Side";
+const char pstrUsageSoftButtonOffset1			[] = "Soft Btn Off1";
+const char pstrUsageSoftButtonOffset2			[] = "Soft Btn Off2";
+const char pstrUsageSoftButtonReport			[] = "Soft Btn Rpt";
+
+// Medical Instrument Page
+const char pstrUsageMedicalUltrasound			[] = "Med Ultrasnd";
+const char pstrUsageVCRAcquisition				[] = "VCR/Acq";
+const char pstrUsageFreezeThaw					[] = "Freeze";
+const char pstrUsageClipStore					[] = "Clip Store";
+const char pstrUsageUpdate						[] = "Update";
+const char pstrUsageNext						[] = "Next";
+const char pstrUsageSave						[] = "Save";
+const char pstrUsagePrint						[] = "Print";
+const char pstrUsageMicrophoneEnable			[] = "Mic Enbl";
+const char pstrUsageCine						[] = "Cine";
+const char pstrUsageTransmitPower				[] = "Trans Pwr";
+//const char pstrUsageVolume						[] = "Vol";
+const char pstrUsageFocus						[] = "Focus";
+const char pstrUsageDepth						[] = "Depth";
+const char pstrUsageSoftStepPrimary				[] = "Soft Stp-Pri";
+const char pstrUsageSoftStepSecondary			[] = "Soft Stp-Sec";
+const char pstrUsageDepthGainCompensation		[] = "Dpth Gain Comp";
+const char pstrUsageZoomSelect					[] = "Zoom Sel";
+const char pstrUsageZoomAdjust					[] = "Zoom Adj";
+const char pstrUsageSpectralDopplerModeSelect	[] = "Spec Dop Mode Sel";
+const char pstrUsageSpectralDopplerModeAdjust	[] = "Spec Dop Mode Adj";
+const char pstrUsageColorDopplerModeSelect		[] = "Color Dop Mode Sel";
+const char pstrUsageColorDopplerModeAdjust		[] = "Color Dop Mode Adj";
+const char pstrUsageMotionModeSelect			[] = "Motion Mode Sel";
+const char pstrUsageMotionModeAdjust			[] = "Motion Mode Adj";
+const char pstrUsage2DModeSelect				[] = "2D Mode Sel";
+const char pstrUsage2DModeAdjust				[] = "2D Mode Adj";
+const char pstrUsageSoftControlSelect			[] = "Soft Ctrl Sel";
+const char pstrUsageSoftControlAdjust			[] = "Soft Ctrl Adj";
+
+//extern const char *usagePageTitles0[15];
+//const char *usagePageTitles1[];
+//const char *genDesktopTitles0[];
+//const char *genDesktopTitles1[];
+//const char *genDesktopTitles2[];
+//const char *genDesktopTitles3[];
+//const char *genDesktopTitles4[];
+//const char *simuTitles0[];
+//const char *simuTitles1[];
+//const char *simuTitles2[];
+//const char *vrTitles0[];
+//const char *vrTitles1[];
+//const char *sportsCtrlTitles0[];
+//const char *sportsCtrlTitles1[];
+//const char *sportsCtrlTitles2[];
+//const char *gameTitles0[];
+//const char *gameTitles1[];
+//const char *genDevCtrlTitles[];
+//const char *ledTitles[];
+//const char *telTitles0[];
+//const char *telTitles1[];
+//const char *telTitles2[];
+//const char *telTitles3[];
+//const char *telTitles4[];
+//const char *telTitles5[];
+//const char *consTitles0[];
+//const char *consTitles1[];
+//const char *consTitles2[];
+//const char *consTitles3[];
+//const char *consTitles4[];
+//const char *consTitles5[];
+//const char *consTitles6[];
+//const char *consTitles7[];
+//const char *consTitles8[];
+//const char *consTitles9[];
+//const char *consTitlesA[];
+//const char *consTitlesB[];
+//const char *consTitlesC[];
+//const char *consTitlesD[];
+//const char *consTitlesE[];
+//const char *digitTitles0[];
+//const char *digitTitles1[];
+//const char *digitTitles2[];
+//const char *aplphanumTitles0[];
+//const char *aplphanumTitles1[];
+//const char *aplphanumTitles2[];
+//const char *medInstrTitles0[];
+//const char *medInstrTitles1[];
+//const char *medInstrTitles2[];
+//const char *medInstrTitles3[];
+//const char *medInstrTitles4[];
+
+#endif /* HIDUSAGESTR_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/parsetools.cpp
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/parsetools.cpp	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/parsetools.cpp	(revision 136)
@@ -0,0 +1,73 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+#include "parsetools.h"
+
+bool MultiByteValueParser::Parse(uint8_t **pp, uint32_t *pcntdn)
+{
+	if (!pBuf)
+	{
+		//Notify(PSTR("Buffer pointer is NULL!\r\n"));
+		return false;
+	}
+	for (; countDown && (*pcntdn); countDown--, (*pcntdn)--, (*pp)++)
+		pBuf[valueSize-countDown] = (**pp);
+
+	if (countDown)
+		return false;
+
+	countDown = valueSize;
+	return true;
+}
+
+bool PTPListParser::Parse(uint8_t **pp, uint32_t *pcntdn, PTP_ARRAY_EL_FUNC pf, const void *me)
+{
+	switch (nStage)
+	{
+	case 0:
+		pBuf->valueSize = lenSize;
+		theParser.Initialize(pBuf);
+		nStage = 1;
+
+	case 1:
+		if (!theParser.Parse(pp, pcntdn))
+			return false;
+
+		arLen = 0;
+		arLen = (pBuf->valueSize >= 4) ? *((uint32_t*)pBuf->pValue) : (uint32_t)(*((uint16_t*)pBuf->pValue));
+		arLenCntdn = arLen;
+		nStage = 2;
+
+	case 2:
+		pBuf->valueSize = valSize;
+		theParser.Initialize(pBuf);
+		nStage = 3;
+
+	case 3:
+		for (; arLenCntdn; arLenCntdn--)
+		{
+			if (!theParser.Parse(pp, pcntdn))
+				return false;
+
+			if (pf)
+				pf(pBuf, (arLen - arLenCntdn), me);
+		}
+
+		nStage = 0;
+	}
+	return true;
+}
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/parsetools.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/parsetools.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/parsetools.h	(revision 136)
@@ -0,0 +1,143 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+
+#ifndef PARSETOOLS_H_INCLUDED
+#define PARSETOOLS_H_INCLUDED
+
+#include <stdint.h>
+#include "Arduino.h"
+
+struct MultiValueBuffer
+{
+	uint8_t		valueSize;
+	void		*pValue;
+};
+
+class MultiByteValueParser
+{
+	uint8_t				*pBuf;
+	uint32_t			countDown;
+	uint32_t			valueSize;
+
+public:
+	MultiByteValueParser() : pBuf(NULL), countDown(0), valueSize(0) {};
+
+	const uint8_t* GetBuffer() { return pBuf; };
+
+	void Initialize(MultiValueBuffer * const pbuf)
+	{
+		pBuf = (uint8_t*)pbuf->pValue;
+		countDown = valueSize = pbuf->valueSize;
+	};
+
+	bool Parse(uint8_t **pp, uint32_t *pcntdn);
+};
+
+class ByteSkipper
+{
+	uint8_t				*pBuf;
+	uint32_t			nStage;
+	uint32_t			countDown;
+
+public:
+	ByteSkipper() : pBuf(NULL), nStage(0), countDown(0) {};
+
+	void Initialize(MultiValueBuffer *pbuf)
+	{
+		pBuf = (uint8_t*)pbuf->pValue;
+		countDown = 0;
+	};
+
+	bool Skip(uint8_t **pp, uint32_t *pcntdn, uint32_t bytes_to_skip)
+	{
+		switch (nStage)
+		{
+		case 0:
+			countDown = bytes_to_skip;
+			nStage ++;
+		case 1:
+			for (; countDown && (*pcntdn); countDown--, (*pp)++, (*pcntdn)--);
+
+			if (!countDown)
+				nStage = 0;
+		};
+		return (!countDown);
+	};
+};
+
+// Pointer to a callback function triggered for each element of PTP array when used with PTPArrayParser
+typedef void (*PTP_ARRAY_EL_FUNC)(const MultiValueBuffer * const p, uint32_t count, const void *me);
+
+class PTPListParser
+{
+public:
+	enum ParseMode { modeArray, modeRange/*, modeEnum*/ };
+
+private:
+	uint32_t				nStage;
+	uint32_t				enStage;
+
+	uint32_t				arLen;
+	uint32_t				arLenCntdn;
+
+	uint32_t				lenSize;		// size of the array length field in bytes
+	uint32_t				valSize;		// size of the array element in bytes
+
+	MultiValueBuffer		*pBuf;
+
+	// The only parser for both size and array element parsing
+	MultiByteValueParser	theParser;
+
+	uint32_t /*ParseMode*/	prsMode;
+
+public:
+	PTPListParser() :
+		nStage(0),
+		enStage(0),
+		arLen(0),
+		arLenCntdn(0),
+		lenSize(0),
+		valSize(0),
+		pBuf(NULL),
+		prsMode(modeArray)
+		{};
+
+	void Initialize(const uint32_t len_size, const uint32_t val_size, MultiValueBuffer * const p, const uint32_t mode = modeArray)
+	{
+		pBuf	= p;
+		lenSize	= len_size;
+		valSize = val_size;
+		prsMode = mode;
+
+		if (prsMode == modeRange)
+		{
+			arLenCntdn = arLen = 3;
+			nStage = 2;
+		}
+		else
+		{
+			arLenCntdn = arLen = 0;
+			nStage = 0;
+		}
+		enStage = 0;
+		theParser.Initialize(p);
+	};
+
+	bool Parse(uint8_t **pp, uint32_t *pcntdn, PTP_ARRAY_EL_FUNC pf, const void *me = NULL);
+};
+
+#endif /* PARSETOOLS_H_INCLUDED */
Index: rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/usb_ch9.h
===================================================================
--- rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/usb_ch9.h	(revision 136)
+++ rtos_arduino/trunk/arduino_lib/libraries/USBHost/src/usb_ch9.h	(revision 136)
@@ -0,0 +1,176 @@
+/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
+
+This software may be distributed and modified under the terms of the GNU
+General Public License version 2 (GPL2) as published by the Free Software
+Foundation and appearing in the file GPL2.TXT included in the packaging of
+this file. Please note that GPL2 Section 2[b] requires that all works based
+on this software must also be made publicly available under the terms of
+the GPL2 ("Copyleft").
+
+Contact information
+-------------------
+
+Circuits At Home, LTD
+Web      :  http://www.circuitsathome.com
+e-mail   :  support@circuitsathome.com
+*/
+/* USB chapter 9 structures */
+
+#ifndef USB_CH9_H_INCLUDED
+#define USB_CH9_H_INCLUDED
+
+#include <stdint.h>
+
+/* Misc.USB constants */
+#define DEV_DESCR_LEN   18      //device descriptor length
+#define CONF_DESCR_LEN  9       //configuration descriptor length
+#define INTR_DESCR_LEN  9       //interface descriptor length
+#define EP_DESCR_LEN    7       //endpoint descriptor length
+
+/* Standard Device Requests */
+
+#define USB_REQUEST_GET_STATUS                  0       // Standard Device Request - GET STATUS
+#define USB_REQUEST_CLEAR_FEATURE               1       // Standard Device Request - CLEAR FEATURE
+#define USB_REQUEST_SET_FEATURE                 3       // Standard Device Request - SET FEATURE
+#define USB_REQUEST_SET_ADDRESS                 5       // Standard Device Request - SET ADDRESS
+#define USB_REQUEST_GET_DESCRIPTOR              6       // Standard Device Request - GET DESCRIPTOR
+#define USB_REQUEST_SET_DESCRIPTOR              7       // Standard Device Request - SET DESCRIPTOR
+#define USB_REQUEST_GET_CONFIGURATION           8       // Standard Device Request - GET CONFIGURATION
+#define USB_REQUEST_SET_CONFIGURATION           9       // Standard Device Request - SET CONFIGURATION
+#define USB_REQUEST_GET_INTERFACE               10      // Standard Device Request - GET INTERFACE
+#define USB_REQUEST_SET_INTERFACE               11      // Standard Device Request - SET INTERFACE
+#define USB_REQUEST_SYNCH_FRAME                 12      // Standard Device Request - SYNCH FRAME
+
+#define USB_FEATURE_ENDPOINT_HALT               0       // CLEAR/SET FEATURE - Endpoint Halt
+#define USB_FEATURE_DEVICE_REMOTE_WAKEUP        1       // CLEAR/SET FEATURE - Device remote wake-up
+#define USB_FEATURE_TEST_MODE                   2       // CLEAR/SET FEATURE - Test mode
+
+/* Setup Data Constants */
+
+#define USB_SETUP_HOST_TO_DEVICE                0x00    // Device Request bmRequestType transfer direction - host to device transfer
+#define USB_SETUP_DEVICE_TO_HOST                0x80    // Device Request bmRequestType transfer direction - device to host transfer
+#define USB_SETUP_TYPE_STANDARD                 0x00    // Device Request bmRequestType type - standard
+#define USB_SETUP_TYPE_CLASS                    0x20    // Device Request bmRequestType type - class
+#define USB_SETUP_TYPE_VENDOR                   0x40    // Device Request bmRequestType type - vendor
+#define USB_SETUP_RECIPIENT_DEVICE              0x00    // Device Request bmRequestType recipient - device
+#define USB_SETUP_RECIPIENT_INTERFACE           0x01    // Device Request bmRequestType recipient - interface
+#define USB_SETUP_RECIPIENT_ENDPOINT            0x02    // Device Request bmRequestType recipient - endpoint
+#define USB_SETUP_RECIPIENT_OTHER               0x03    // Device Request bmRequestType recipient - other
+
+/* USB descriptors  */
+
+#define USB_DESCRIPTOR_DEVICE           0x01    // bDescriptorType for a Device Descriptor.
+#define USB_DESCRIPTOR_CONFIGURATION    0x02    // bDescriptorType for a Configuration Descriptor.
+#define USB_DESCRIPTOR_STRING           0x03    // bDescriptorType for a String Descriptor.
+#define USB_DESCRIPTOR_INTERFACE        0x04    // bDescriptorType for an Interface Descriptor.
+#define USB_DESCRIPTOR_ENDPOINT         0x05    // bDescriptorType for an Endpoint Descriptor.
+#define USB_DESCRIPTOR_DEVICE_QUALIFIER 0x06    // bDescriptorType for a Device Qualifier.
+#define USB_DESCRIPTOR_OTHER_SPEED      0x07    // bDescriptorType for a Other Speed Configuration.
+#define USB_DESCRIPTOR_INTERFACE_POWER  0x08    // bDescriptorType for Interface Power.
+#define USB_DESCRIPTOR_OTG              0x09    // bDescriptorType for an OTG Descriptor.
+
+#define HID_DESCRIPTOR_HID			0x21
+
+
+
+/* OTG SET FEATURE Constants    */
+#define OTG_FEATURE_B_HNP_ENABLE                3       // SET FEATURE OTG - Enable B device to perform HNP
+#define OTG_FEATURE_A_HNP_SUPPORT               4       // SET FEATURE OTG - A device supports HNP
+#define OTG_FEATURE_A_ALT_HNP_SUPPORT           5       // SET FEATURE OTG - Another port on the A device supports HNP
+
+/* USB Endpoint Transfer Types  */
+#define USB_TRANSFER_TYPE_CONTROL               0x00    // Endpoint is a control endpoint.
+#define USB_TRANSFER_TYPE_ISOCHRONOUS           0x01    // Endpoint is an isochronous endpoint.
+#define USB_TRANSFER_TYPE_BULK                  0x02    // Endpoint is a bulk endpoint.
+#define USB_TRANSFER_TYPE_INTERRUPT             0x03    // Endpoint is an interrupt endpoint.
+#define bmUSB_TRANSFER_TYPE                     0x03    // bit mask to separate transfer type from ISO attributes
+
+
+/* Standard Feature Selectors for CLEAR_FEATURE Requests    */
+#define USB_FEATURE_ENDPOINT_STALL              0       // Endpoint recipient
+#define USB_FEATURE_DEVICE_REMOTE_WAKEUP        1       // Device recipient
+#define USB_FEATURE_TEST_MODE                   2       // Device recipient
+
+_Pragma("pack(1)")
+
+/* descriptor data structures */
+
+/* Device descriptor structure */
+typedef struct
+{
+    uint8_t		bLength;               // Length of this descriptor.
+    uint8_t		bDescriptorType;       // DEVICE descriptor type (USB_DESCRIPTOR_DEVICE).
+    uint16_t	bcdUSB;				   // USB Spec Release Number (BCD).
+    uint8_t		bDeviceClass;          // Class code (assigned by the USB-IF). 0xFF-Vendor specific.
+    uint8_t		bDeviceSubClass;       // Subclass code (assigned by the USB-IF).
+    uint8_t		bDeviceProtocol;       // Protocol code (assigned by the USB-IF). 0xFF-Vendor specific.
+    uint8_t		bMaxPacketSize0;       // Maximum packet size for endpoint 0.
+    uint16_t	idVendor;			   // Vendor ID (assigned by the USB-IF).
+    uint16_t	idProduct;			   // Product ID (assigned by the manufacturer).
+    uint16_t	bcdDevice;			   // Device release number (BCD).
+    uint8_t		iManufacturer;         // Index of String Descriptor describing the manufacturer.
+    uint8_t		iProduct;              // Index of String Descriptor describing the product.
+    uint8_t		iSerialNumber;         // Index of String Descriptor with the device's serial number.
+    uint8_t		bNumConfigurations;    // Number of possible configurations.
+} USB_DEVICE_DESCRIPTOR;
+
+/* Configuration descriptor structure */
+typedef struct
+{
+    uint8_t bLength;               // Length of this descriptor.
+    uint8_t bDescriptorType;       // CONFIGURATION descriptor type (USB_DESCRIPTOR_CONFIGURATION).
+    uint16_t wTotalLength;          // Total length of all descriptors for this configuration.
+    uint8_t bNumInterfaces;        // Number of interfaces in this configuration.
+    uint8_t bConfigurationValue;   // Value of this configuration (1 based).
+    uint8_t iConfiguration;        // Index of String Descriptor describing the configuration.
+    uint8_t bmAttributes;          // Configuration characteristics.
+    uint8_t bMaxPower;             // Maximum power consumed by this configuration.
+} USB_CONFIGURATION_DESCRIPTOR;
+
+/* Interface descriptor structure */
+typedef struct
+{
+    uint8_t bLength;               // Length of this descriptor.
+    uint8_t bDescriptorType;       // INTERFACE descriptor type (USB_DESCRIPTOR_INTERFACE).
+    uint8_t bInterfaceNumber;      // Number of this interface (0 based).
+    uint8_t bAlternateSetting;     // Value of this alternate interface setting.
+    uint8_t bNumEndpoints;         // Number of endpoints in this interface.
+    uint8_t bInterfaceClass;       // Class code (assigned by the USB-IF).  0xFF-Vendor specific.
+    uint8_t bInterfaceSubClass;    // Subclass code (assigned by the USB-IF).
+    uint8_t bInterfaceProtocol;    // Protocol code (assigned by the USB-IF).  0xFF-Vendor specific.
+    uint8_t iInterface;            // Index of String Descriptor describing the interface.
+} USB_INTERFACE_DESCRIPTOR;
+
+/* Endpoint descriptor structure */
+typedef struct
+{
+    uint8_t bLength;               // Length of this descriptor.
+    uint8_t bDescriptorType;       // ENDPOINT descriptor type (USB_DESCRIPTOR_ENDPOINT).
+    uint8_t bEndpointAddress;      // Endpoint address. Bit 7 indicates direction (0=OUT, 1=IN).
+    uint8_t bmAttributes;          // Endpoint transfer type.
+    uint16_t wMaxPacketSize;       // Maximum packet size.
+    uint8_t bInterval;             // Polling interval in frames.
+} USB_ENDPOINT_DESCRIPTOR;
+
+
+/* HID descriptor */
+typedef struct
+{
+    uint8_t		bLength;
+	uint8_t		bDescriptorType;
+	uint16_t	bcdHID;					// HID class specification release
+    uint8_t		bCountryCode;
+	uint8_t		bNumDescriptors;		// Number of additional class specific descriptors
+	uint8_t		bDescrType;				// Type of class descriptor
+    uint16_t	wDescriptorLength;		// Total size of the Report descriptor
+} USB_HID_DESCRIPTOR;
+
+typedef struct
+{
+	uint8_t		bDescrType;				// Type of class descriptor
+    uint16_t	wDescriptorLength;		// Total size of the Report descriptor
+} HID_CLASS_DESCRIPTOR_LEN_AND_TYPE;
+
+_Pragma("pack()")
+
+#endif /* USB_CH9_H_INCLUDED */
Index: rtos_arduino/trunk/asp_1.9.2/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/MANIFEST	(revision 136)
@@ -0,0 +1,112 @@
+PACKAGE asp
+VERSION 1.9.2
+
+configure
+MANIFEST
+README.txt
+
+doc/asp_spec.txt
+doc/configurator.txt
+doc/design.txt
+doc/extension.txt
+doc/porting.txt
+doc/user.txt
+doc/version.txt
+
+include/histogram.h
+include/itron.h
+include/kernel.h
+include/log_output.h
+include/queue.h
+include/sil.h
+include/t_stddef.h
+include/t_stdlib.h
+include/t_syslog.h
+include/test_lib.h
+
+kernel/Makefile.kernel
+kernel/alarm.c
+kernel/alarm.h
+kernel/allfunc.h
+kernel/check.h
+kernel/cyclic.c
+kernel/cyclic.h
+kernel/dataqueue.c
+kernel/dataqueue.h
+kernel/eventflag.c
+kernel/eventflag.h
+kernel/exception.c
+kernel/exception.h
+kernel/genoffset.tf
+kernel/interrupt.c
+kernel/interrupt.h
+kernel/kernel.tf
+kernel/kernel_api.csv
+kernel/kernel_check.tf
+kernel/kernel_def.csv
+kernel/kernel_impl.h
+kernel/kernel_int.h
+kernel/kernel_rename.def
+kernel/kernel_rename.h
+kernel/kernel_unrename.h
+kernel/mailbox.c
+kernel/mailbox.h
+kernel/mempfix.c
+kernel/mempfix.h
+kernel/pridataq.c
+kernel/pridataq.h
+kernel/semaphore.c
+kernel/semaphore.h
+kernel/startup.c
+kernel/sys_manage.c
+kernel/task.c
+kernel/task.h
+kernel/task_except.c
+kernel/task_manage.c
+kernel/task_refer.c
+kernel/task_sync.c
+kernel/time_event.c
+kernel/time_event.h
+kernel/time_manage.c
+kernel/wait.c
+kernel/wait.h
+
+library/histogram.c
+library/log_output.c
+library/strerror.c
+library/t_perror.c
+library/test_lib.c
+library/vasyslog.c
+
+sample/Makefile
+sample/sample1.c
+sample/sample1.cfg
+sample/sample1.h
+
+syssvc/banner.c
+syssvc/banner.cfg
+syssvc/banner.h
+syssvc/logtask.c
+syssvc/logtask.cfg
+syssvc/logtask.h
+syssvc/serial.c
+syssvc/serial.cfg
+syssvc/serial.h
+syssvc/syslog.c
+syssvc/syslog.cfg
+syssvc/syslog.h
+
+utils/applyrename
+utils/genoffset
+utils/genrename
+utils/gentest
+utils/makedep
+utils/makerelease
+
+INCLUDE target/dve68k_gcc/MANIFEST
+INCLUDE arch/m68k_gcc/MANIFEST
+INCLUDE arch/gcc/MANIFEST
+INCLUDE arch/logtrace/MANIFEST
+INCLUDE pdic/upd72001/MANIFEST
+INCLUDE test/MANIFEST
+INCLUDE extension/MANIFEST
Index: rtos_arduino/trunk/asp_1.9.2/README.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/README.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/README.txt	(revision 136)
@@ -0,0 +1,50 @@
+
+	TOPPERS/ASP Kernelï¼Release 1.9.2ï¼
+		Toyohashi Open Platform for Embedded Real-Time Systems/
+		Advanced Standard Profile Kernel
+
+TOPPERS/ASPã«ã¼ãã«ï¼ä»¥ä¸ï¼ASPã«ã¼ãã«ï¼ã¯ï¼TOPPERSæ°ä¸ä»£ã«ã¼ãã«ã®åºç¤
+ã¨ãªããã®ã¨ãã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«ããã¦éçºãããªã¢ã«ã¿ã¤ã ã«ã¼ã
+ã«ã§ãï¼Î¼ITRON4.0ä»æ§ã®ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«æºæ ã®ãªã¢ã«ã¿ã¤ã ã«ã¼
+ãã«ã§ããTOPPERS/JSPã«ã¼ãã«ãæ¡å¼µã»æ¹è¯ããå½¢ã§éçºãã¾ããï¼
+
+ãæåã«èª­ãã¹ããã­ã¥ã¡ã³ãã
+
+ASPã«ã¼ãã«ã®ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ãï¼doc/user.txtã«ããã¾ãï¼ASPã«ã¼ã
+ã«ãä½¿ç¨ããå ´åã«ã¯ï¼ã¾ãã¯ãã®ãã­ã¥ã¡ã³ããããèª­ã¿ä¸ããï¼
+
+ããã¡ã¤ã«ã®é²è¦§ã«ããã£ã¦ã
+
+ASPã«ã¼ãã«ã®ãã­ã¥ã¡ã³ãï¼ãã¬ã¼ã³ãã­ã¹ããã¡ã¤ã«ï¼ããã³ã½ã¼ã¹ãã¡ã¤
+ã«ãèª­ãéã«ã¯ï¼TABã4ã«è¨­å®ãã¦ãã ããï¼
+
+ãå©ç¨æ¡ä»¶ã
+
+ASPã«ã¼ãã«ã®å©ç¨æ¡ä»¶ã¯ï¼åãã¡ã¤ã«ã®å
+é ­ã«è¡¨ç¤ºããã¦ããTOPPERSã©ã¤ã»
+ã³ã¹ã§ãï¼TOPPERSã©ã¤ã»ã³ã¹ã«é¢ããFAQãï¼ä»¥ä¸ã®ãã¼ã¸ã«ããã¾ãï¼
+
+	http://www.toppers.jp/faq/faq_ct12.html
+
+ãè³ªåã»ãã°ã¬ãã¼ãã»æè¦ç­ã®éä»å
+ã
+
+ASPã«ã¼ãã«ãããè¯ããã®ã«ããããã®ãæè¦ç­ãæ­è¿ãã¾ãï¼ASPã«ã¼ãã«
+ã«é¢ããè³ªåããã°ã¬ãã¼ãï¼ãæè¦ç­ã¯ï¼TOPPERSãã­ã¸ã§ã¯ãã®ä¼å¡ã¯
+TOPPERSéçºè
+ã¡ã¼ãªã³ã°ãªã¹ãï¼dev@toppers.jpï¼å®ã¾ãã¯ASPã«ã¼ãã«ã®ã
+ã°ãã©ãã­ã³ã°ã·ã¹ãã ï¼Tracï¼ã«ï¼ãã®ä»ã®æ¹ã¯TOPPERSã¦ã¼ã¶ã¼ãºã¡ã¼ãªã³
+ã°ãªã¹ãï¼users@toppers.jpï¼å®ã«ãé¡ããã¾ãï¼
+
+TOPPERSã¦ã¼ã¶ã¼ãºã¡ã¼ãªã³ã°ãªã¹ãã¸ã®ç»é²æ¹æ³ã«ã¤ãã¦ã¯ï¼ä»¥ä¸ã®ãã¼ã¸ã«
+èª¬æãããã¾ãï¼
+
+	http://www.toppers.jp/community.html
+
+ããã¼ãã£ã³ã°ã«ããã£ã¦ã
+
+ASPã«ã¼ãã«ãï¼TOPPERSãã­ã¸ã§ã¯ããããªã¼ãã³ã½ã¼ã¹ã«ãããã¨ãåæã«ï¼
+æªãµãã¼ãã®ã¿ã¼ã²ããã«ãã¼ãã£ã³ã°ãããå ´åã«ã¯ï¼ããããããç¸è«ã
+ã ããã¨å¹¸ãã§ãï¼
+
+ä»¥ä¸
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/MANIFEST	(revision 136)
@@ -0,0 +1,33 @@
+PACKAGE asp_arch_arm_m_gcc
+VERSION 1.9.2
+
+MANIFEST
+README.txt
+
+common/arm_m.h
+common/core.tf
+common/core_asm.inc
+common/core_cfg1_out.h
+common/core_check.tf
+common/core_config.c
+common/core_config.h
+common/core_config_v6m.h
+common/core_def.csv
+common/core_design.txt
+common/core_insn.h
+common/core_kernel.h
+common/core_offset.tf
+common/core_rename.def
+common/core_rename.h
+common/core_sil.h
+common/core_stddef.h
+common/core_support.S
+common/core_support_v6m.S
+common/core_test.h
+common/core_timer.c
+common/core_timer.cfg
+common/core_timer.h
+common/core_unrename.h
+common/core_user.txt
+common/Makefile.core
+common/start.S
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/README.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/README.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/README.txt	(revision 136)
@@ -0,0 +1,28 @@
+                  ARM-Mä¾å­é¨(GCCç) ãã£ã¬ã¯ããªè§£èª¬
+
+                                   Last Modified:2015 Nov 04 11:43:49
+
+
+æ¬ãã£ã¬ã¯ããªï¼./arch/arm_m_gccï¼ã¯ï¼ARMv7-M/ARMv6-Mã¢ã¼ã­ãã¯ãã£ã®
+ã³ã¢åã³ï¼ARMv7-M/ARMv6-Mã¢ã¼ã­ãã¯ãã£ã®ã³ã¢ãç¨ãããããã«ä¾å­ãï¼
+ã³ã³ãã¤ã©ã¨ãã¦GCCãå¯¾è±¡ããè¨è¿°ãç½®ãããã®ãã£ã¬ã¯ããªã§ããï¼
+
+ã¿ã¼ã²ãããã£ã¬ã¯ããªï¼./targetï¼ã¨ã®åãåãã¯ï¼æ¬ãã£ã¬ã¯ããªã¯ï¼ç¹
+å®ã®ãã¼ãã«ä¾å­ããªãåå©ç¨å¯è½ãªè¨è¿°ãç½®ãã¨ã¨ãï¼ã¿ã¼ã²ãããã£ã¬ã¯
+ããªã¯åå©ç¨ã®å¯è½æ§ãä½ããã¼ãã«ä¾å­ããè¨è¿°ãç½®ããã¨ã¨ããï¼
+
+åå©ç¨å¯è½ãªç¯å²ã¨ãã¦ã¯ï¼ARMv7-M/ARMv6-Mã¢ã¼ã­ãã¯ãã£ã®ã³ã¢ãç¨ãã
+ããããã¾ã§ãæ³å®ãã¦ããï¼ãã®ããï¼æ¬ãã£ã¬ã¯ããªã«ç½®ãä¾å­é¨ããã
+ãä¾å­é¨ã¨å¼ã¶ï¼åãããä¾å­é¨ã¯ãããåã§ãã£ã¬ã¯ããªãä½æãï¼ãã®ä¸
+ã«é¢é£ãããã¡ã¤ã«ãç½®ãï¼
+
+ä¸æ¹ï¼ARMv7-M/ARMv6-Mã¢ã¼ã­ãã¯ãã£ã®ã³ã¢ã«ä¾å­ããè¨è¿°ã¯ï¼ã³ã¢ä¾å­é¨
+ã¨å¼ã³ï¼commonãã£ã¬ã¯ããªä»¥ä¸ã«ç½®ãï¼åãããä¾å­é¨ã¯å¿
+è¦ã«å¿ãã¦ã³ã¢
+ä¾å­é¨ã®ãã¡ã¤ã«ãä½¿ç¨ããï¼ã³ã¢ä¾å­é¨ã«é¢ãã¦ã¯ï¼common/core_user.txt 
+ãåç
+§ã®ãã¨ï¼
+
+ãããã«ãã£ã¦ã¯ï¼ã³ã¢ä¾å­é¨ã¨åç­ã®æ©è½ãæããªãå ´åãããï¼ãã®å ´å
+ã¯ï¼ãããä¾å­é¨ãä½æããï¼ã¿ã¼ã²ããä¾å­é¨ã¨ã³ã¢ä¾å­é¨ã®ãã¡ã¤ã«ãçµ
+ã¿åãããã°ããï¼
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/MANIFEST	(revision 136)
@@ -0,0 +1,18 @@
+PACKAGE asp_arch_stm32f4xx_gcc
+
+MANIFEST
+Makefile.chip
+cmsis_f4.h
+stm32f4xx.h
+chip_config.c
+chip_config.h
+chip_kernel.h
+chip_rename.def
+chip_rename.h
+chip_sil.h
+chip_timer.cfg
+chip_timer.h
+chip_unrename.h
+chip_serial.c
+chip_serial.cfg
+chip_serial.h
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/Makefile.chip
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/Makefile.chip	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/Makefile.chip	(revision 136)
@@ -0,0 +1,66 @@
+#
+#		Makefile ã®ã¿ã¼ã²ããä¾å­é¨ï¼stm32f4xxç¨ï¼
+#
+
+#
+#  ã¢ã¼ã­ãã¯ãã£ã¼
+#
+ARM_ARCH = ARMV7M
+
+#
+#  ã³ã³ãã¤ã«ãªãã·ã§ã³
+#
+INCLUDES := $(INCLUDES) -I$(SRCDIR)/arch/$(PRC)_$(TOOL)/$(CHIP)
+COPTS := $(COPTS) -mlittle-endian -nostartfiles 
+LDFLAGS := $(LDFLAGS) -mlittle-endian
+LIBS := $(LIBS)
+
+ifeq ($(CHIP), stm32f4xx)
+	CORE_TYPE = CORTEX_M4
+endif
+
+#
+#  ã«ã¼ãã«ã«é¢ããå®ç¾©
+#
+KERNEL_DIR := $(KERNEL_DIR) $(SRCDIR)/arch/$(PRC)_$(TOOL)/$(CHIP)
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS)
+KERNEL_COBJS := $(KERNEL_COBJS) core_timer.o chip_config.o
+
+#
+#  ã·ã¹ãã ãµã¼ãã¹ã«é¢ããå®ç¾©
+#
+SYSSVC_DIR := $(SYSSVC_DIR) $(SRCDIR)/arch/$(PRC)_$(TOOL)/$(CHIP)
+SYSSVC_COBJS := $(SYSSVC_COBJS) chip_serial.o
+
+#
+#  ãªã³ã«ã¹ã¯ãªããã®å®ç¾©
+#
+ifeq ($(DBGENV),RAM)
+LDSCRIPT = $(SRCDIR)/target/$(BOARD)/stm32f4xx_ram.ld
+COPTS := $(COPTS) -DTOPPERS_RAM_EXEC
+else
+LDSCRIPT = $(SRCDIR)/target/$(BOARD)/stm32f4xx_rom.ld
+endif
+
+#
+#  ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã«é¢ããå®ç¾©
+#
+#  stm32f4xx_xxx.ldã«ãSTARTUP(start.o)ããè¨è¿°ããããï¼
+#  ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®ååãHIDDEN_OBJSã«å®ç¾©ããï¼
+#  ã¾ãï¼LDFLAGSã«-nostdlibãè¿½å ãã¦ããï¼
+#
+HIDDEN_OBJS = start.o
+
+$(HIDDEN_OBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(HIDDEN_OBJS:.o=.d): %.d: %.S
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
+		-O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+
+LDFLAGS := -nostdlib $(LDFLAGS)
+
+#
+#  ã³ã¢ä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ã
+#
+include $(SRCDIR)/arch/$(PRC)_$(TOOL)/common/Makefile.core
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_config.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_config.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_config.c	(revision 136)
@@ -0,0 +1,86 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: chip_config.c 698 2015-07-27 22:51:58Z roi $
+ */
+
+/*
+ * ã¿ã¼ã²ããä¾å­ã¢ã¸ã¥ã¼ã«ï¼stm32f4xxç¨ï¼
+ */
+#include "kernel_impl.h"
+#include <sil.h>
+
+/*
+ *  ãããä¾å­ã®åæå
+ */
+void
+chip_initialize(void)
+{
+	/*
+	 *  ãã­ã»ããµä¾å­é¨ã®åæå
+	 */
+	core_initialize();
+}
+
+/*
+ *  ãããä¾å­ã®çµäºå¦ç
+ */
+void
+chip_exit(void)
+{
+	/*
+	 * ãã­ã»ããµä¾å­é¨ã®çµäºå¦ç
+	 */
+	core_terminate();
+}
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_config.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_config.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_config.h	(revision 136)
@@ -0,0 +1,99 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+#ifndef TOPPERS_CHIP_CONFIG_H
+#define TOPPERS_CHIP_CONFIG_H
+
+/*
+ * ã¿ã¼ã²ããä¾å­é¨ã¢ã¸ã¥ã¼ã«ï¼STM32Fç¨ï¼
+ *
+ * ã«ã¼ãã«ã®ã¿ã¼ã²ããä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ï¼kernel_impl.hã®ã¿ã¼
+ * ã²ããä¾å­é¨ã®ä½ç½®ä»ãã¨ãªãï¼
+ */
+
+/*
+ * ã¿ã¼ã²ããã·ã¹ãã ã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
+ */
+//#include "stm32f.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã«é¢ããè¨­å®
+ */
+#ifdef TOPPERS_ENABLE_TRACE
+#include "logtrace/trace_config.h"
+#endif /* TOPPERS_ENABLE_TRACE */
+
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ãããä¾å­ã®åæå
+ */
+extern void	chip_initialize(void);
+
+/*
+ *  ãããä¾å­ã®çµäºå¦ç
+ */
+extern void	chip_exit(void);
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ã³ã¢ä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARM-Mç¨ï¼
+ */
+#include <core_config.h>
+
+#endif /* TOPPERS_CHIP_CONFIG_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_kernel.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_kernel.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_kernel.h	(revision 136)
@@ -0,0 +1,98 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: chip_kernel.h 698 2015-07-27 22:49:30Z roi $
+ */
+
+/*
+ *  kernel.hã®ãããä¾å­é¨ï¼stm32f4xxç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼kernel.hã§ã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡
+ *  ã¤ã«ããç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ã
+ *  ããåã«ï¼t_stddef.hãã¤ã³ã¯ã«ã¼ããããã®ã§ï¼ãããã«ä¾å­ãã¦ãã
+ *  ãï¼
+ */
+
+#ifndef TOPPERS_CHIP_KERNEL_H
+#define TOPPERS_CHIP_KERNEL_H
+
+/*
+ *  ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿åªå
+åº¦ã®ç¯å²
+ *
+ *  TMIN_INTPRIã®å®ç¾©ãå¤æ´ãããã¨ã§ï¼ãã®ã¬ãã«ãããé«ãå²è¾¼ã¿åªå
+åº¦
+ *  ãæã¤ãã®ãã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã¨ããããå¤æ´ã§ããï¼
+ */
+#define TMIN_INTPRI		(-15)		/* å²è¾¼ã¿åªå
+åº¦ã®æå°å¤ï¼æé«å¤ï¼*/
+
+/*
+ *  ãµãã¼ãããæ©è½ã®å®ç¾©
+ */
+#define TOPPERS_TARGET_SUPPORT_GET_UTM	/* get_utmããµãã¼ããã */
+
+/*
+ *  ã¿ã¤ã ãã£ãã¯ã®å®ç¾©
+ */
+#define TIC_NUME   1U            /* ã¿ã¤ã ãã£ãã¯ã®å¨æã®åå­ */
+#define TIC_DENO   1U            /* ã¿ã¤ã ãã£ãã¯ã®å¨æã®åæ¯ */
+
+/*
+ *  ã³ã¢ä¾å­ã§å
+±éãªå®ç¾©
+ */
+#include "arm_m_gcc/common/core_kernel.h"
+
+#endif /* TOPPERS_CHIP_KERNEL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_rename.def
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_rename.def	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_rename.def	(revision 136)
@@ -0,0 +1,5 @@
+INCLUDE "arm_m_gcc/common/core"
+
+#chip_config.c
+target_initialize
+target_exit
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_rename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_rename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_rename.h	(revision 136)
@@ -0,0 +1,26 @@
+/* This file is generated from target_rename.def by genrename. */
+
+#ifndef TOPPERS_CHIP_RENAME_H
+#define TOPPERS_CHIP_RENAME_H
+
+
+/*
+ * chip_config.c
+ */
+#define target_initialize			_kernel_target_initialize
+#define target_exit					_kernel_target_exit
+
+#ifdef TOPPERS_LABEL_ASM
+
+
+/*
+ * chip_config.c
+ */
+#define _target_initialize			__kernel_target_initialize
+#define _target_exit				__kernel_target_exit
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "arm_m_gcc/common/core_rename.h"
+
+#endif /* TOPPERS_CHIP_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_serial.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_serial.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_serial.c	(revision 136)
@@ -0,0 +1,589 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: chip_serial.c 698 2015-07-27 22:47:16Z roi $
+ */
+
+/*
+ *  ã·ãªã¢ã«I/Oããã¤ã¹ï¼SIOï¼ãã©ã¤ãï¼stm32f4xxç¨ï¼
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include "target_stddef.h"
+#include "target_serial.h"
+#include "target_syssvc.h"
+
+/*
+ * ã¬ã¸ã¹ã¿è¨­å®å¤
+ */
+#define PORT2SIOPID(x)	((x) + 1)
+#define INDEX_PORT(x)	((x) - 1)
+#define GET_SIOPCB(x)	(&siopcb_table[INDEX_PORT(x)])
+
+/*
+ *  GPIO Configuration Mode enumeration
+ */
+#define GPIO_Mode_IN    0x0					/* GPIO Input Mode */
+#define GPIO_Mode_OUT   GPIO_MODER_MODER0	/* GPIO Output Mode */
+#define GPIO_Mode_AF    GPIO_MODER_MODER1	/* GPIO Alternate function Mode */
+#define GPIO_Mode_AN    GPIO_MODER_MODER2	/* GPIO Analog Mode */
+
+/*
+ *  GPIO Output Maximum frequency enumeration
+ */
+#define GPIO_Speed_2MHz   0x0						/* Low speed */
+#define GPIO_Speed_25MHz  GPIO_OSPEEDER_OSPEEDR0	/* Medium speed */
+#define GPIO_Speed_50MHz  GPIO_OSPEEDER_OSPEEDR1	/* Fast speed */
+#define GPIO_Speed_100MHz GPIO_OSPEEDER_OSPEEDR2	/* High speed on 30 pF (80 MHz Output max speed on 15 pF) */
+
+/*
+ *  GPIO Output type enumeration
+ */
+#define GPIO_OType_PP   0x0
+#define GPIO_OType_OD   0x1
+
+/*
+ *  GPIO Configuration PullUp PullDown enumeration
+ */
+#define GPIO_PuPd_NOPULL 0x0
+#define GPIO_PuPd_UP     GPIO_PUPDR_PUPDR0
+#define GPIO_PuPd_DOWN   GPIO_PUPDR_PUPDR1
+
+/*
+ *  AF 7 selection
+ */
+#define GPIO_AF7                0x07	/* AF7 value */
+
+/*
+ *  USART Word Length
+ */
+#define USART_WordLength_8b     0x0000
+#define USART_WordLength_9b     USART_CR1_M
+
+/*
+ *  USART Stop Bits
+ */ 
+#define USART_StopBits_1        0x0000
+#define USART_StopBits_0_5      USART_CR2_STOP_0
+#define USART_StopBits_2        USART_CR2_STOP_1
+#define USART_StopBits_1_5      USART_CR2_STOP
+
+/*
+ *  USART Parity
+ */
+#define USART_Parity_No         0x0000
+#define USART_Parity_Even       USART_CR1_PCE
+#define USART_Parity_Odd        (USART_CR1_PCE | USART_CR1_PS) 
+
+/*
+ *  USART MODE
+ */
+#define USART_Mode_Rx           USART_CR1_RE
+#define USART_Mode_Tx           USART_CR1_TE
+
+/** @defgroup USART_Hardware_Flow_Control 
+  * @{
+  */ 
+#define USART_HardwareFlowControl_None       0x0000
+#define USART_HardwareFlowControl_RTS        USART_CR3_RTSE
+#define USART_HardwareFlowControl_CTS        USART_CR3_CTSE
+#define USART_HardwareFlowControl_RTS_CTS    (USART_CR3_RTSE | USART_CR3_CTSE)
+
+#define CR1_CLEAR_MASK          (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE)
+#define CR3_CLEAR_MASK          (USART_CR3_RTSE | USART_CR3_CTSE)
+
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯ã®å®ç¾©
+ */
+typedef struct sio_port_initialization_block {
+	uint32_t base;
+	INTNO    intno_usart;
+} SIOPINIB;
+
+/*
+ *  å
+¼ç¨GPIOãã¼ãåæåãã­ãã¯ã®å®ç¾©
+ */
+typedef struct gpio_port_initialization_block {
+	uint32_t clockbase/* pfr*/;		/* PFRxã¬ã¸ã¹ã¿ã¢ãã¬ã¹ */
+	uint32_t clock_set;
+	uint32_t portbase;
+	uint32_t port_set;
+
+	uint32_t txportbase;
+	uint32_t txpinport;
+	uint32_t txmode_msk;
+	uint32_t txmode_set;
+	uint32_t txspeed_msk;
+	uint32_t txspeed_set;
+	uint32_t txtype_msk;
+	uint32_t txtype_set;
+	uint32_t txpupd_msk;
+	uint32_t txpupd_set;
+
+	uint32_t rxportbase;
+	uint32_t rxpinport;
+	uint32_t rxmode_msk;
+	uint32_t rxmode_set;
+	uint32_t rxspeed_msk;
+	uint32_t rxspeed_set;
+	uint32_t rxtype_msk;
+	uint32_t rxtype_set;
+	uint32_t rxpupd_msk;
+	uint32_t rxpupd_set;
+} GPIOINIB;
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®å®ç¾©
+ */
+struct sio_port_control_block {
+	const SIOPINIB  *p_siopinib;  /* ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯ */
+	const GPIOINIB  *p_gpioinib;  /* å
+¼ç¨GPIOãã¼ãåæåãã­ãã¯ */
+	intptr_t        exinf;        /* æ¡å¼µæ
+å ± */
+	bool_t          opnflg;       /* ãªã¼ãã³æ¸ã¿ãã©ã° */
+};
+
+/*
+ * ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯
+ */
+const SIOPINIB siopinib_table[TNUM_SIOP] = {
+	{(uint32_t)USART1_BASE, (INTNO)INTNO_SIO1},
+#if TNUM_SIOP >= 2
+	{(uint32_t)USART2_BASE, (INTNO)INTNO_SIO2},
+#endif
+};
+
+/*
+ * å
+¼ç¨GPIOãã¼ãåæåãã­ãã¯
+ */
+const GPIOINIB gpioinib_table[TNUM_SIOP] = {
+	{(uint32_t)(TADR_RCC_BASE+TOFF_U1_APBNER), (uint32_t)ENABLE_U1_PORT,
+     (uint32_t)(TADR_RCC_BASE+TOFF_RCC_AHB1ENR), (uint32_t)ENABLE_U1_GPIO,
+     (uint32_t)TADR_U1_GPIO_BASE, (uint32_t)TX1_PINPOS,
+     (uint32_t)~(GPIO_MODER_MODER2 << (TX1_PINPOS*2)), (uint32_t)(GPIO_Mode_AF << (TX1_PINPOS*2)),
+     (uint32_t)~(GPIO_OSPEEDER_OSPEEDR2 << (TX1_PINPOS*2)), (uint32_t)(GPIO_Speed_50MHz << (TX1_PINPOS*2)),
+     (uint32_t)~(GPIO_OTYPER_OT << TX1_PINPOS), (uint32_t)(GPIO_OType_PP << TX1_PINPOS),
+     (uint32_t)~(GPIO_PUPDR_PUPDR2 << (TX1_PINPOS*2)), (uint32_t)(GPIO_PuPd_UP << (TX1_PINPOS*2)),
+     (uint32_t)TADR_U1_GPIO_BASE, (uint32_t)RX1_PINPOS,
+     (uint32_t)~(GPIO_MODER_MODER2 << (RX1_PINPOS*2)), (uint32_t)(GPIO_Mode_AF << (RX1_PINPOS*2)),
+     (uint32_t)~(GPIO_OSPEEDER_OSPEEDR2 << (RX1_PINPOS*2)), (uint32_t)(GPIO_Speed_50MHz << (RX1_PINPOS*2)),
+     (uint32_t)~(GPIO_OTYPER_OT << RX1_PINPOS), (uint32_t)(GPIO_OType_PP << RX1_PINPOS),
+     (uint32_t)~(GPIO_PUPDR_PUPDR2 << (RX1_PINPOS*2)), (uint32_t)(GPIO_PuPd_UP << (RX1_PINPOS*2))
+#if TNUM_SIOP >= 2
+    },
+	{(uint32_t)(TADR_RCC_BASE+TOFF_U2_APBNER), (uint32_t)ENABLE_U2_PORT,
+     (uint32_t)(TADR_RCC_BASE+TOFF_RCC_AHB1ENR), (uint32_t)ENABLE_U2_GPIO,
+     (uint32_t)TADR_U2_GPIO_BASE, (uint32_t)TX2_PINPOS,
+     (uint32_t)~(GPIO_MODER_MODER2 << (TX2_PINPOS*2)), (uint32_t)(GPIO_Mode_AF << (TX2_PINPOS*2)),
+     (uint32_t)~(GPIO_OSPEEDER_OSPEEDR2 << (TX2_PINPOS*2)), (uint32_t)(GPIO_Speed_50MHz << (TX2_PINPOS*2)),
+     (uint32_t)~(GPIO_OTYPER_OT << TX2_PINPOS), (uint32_t)(GPIO_OType_PP << TX2_PINPOS),
+     (uint32_t)~(GPIO_PUPDR_PUPDR2 << (TX2_PINPOS*2)), (uint32_t)(GPIO_PuPd_UP << (TX2_PINPOS*2)),
+     (uint32_t)TADR_U2_GPIO_BASE, (uint32_t)RX2_PINPOS,
+     (uint32_t)~(GPIO_MODER_MODER2 << (RX2_PINPOS*2)), (uint32_t)(GPIO_Mode_AF << (RX2_PINPOS*2)),
+     (uint32_t)~(GPIO_OSPEEDER_OSPEEDR2 << (RX2_PINPOS*2)), (uint32_t)(GPIO_Speed_50MHz << (RX2_PINPOS*2)),
+     (uint32_t)~(GPIO_OTYPER_OT << RX2_PINPOS), (uint32_t)(GPIO_OType_PP << RX2_PINPOS),
+     (uint32_t)~(GPIO_PUPDR_PUPDR2 << (RX2_PINPOS*2)), (uint32_t)(GPIO_PuPd_UP << (RX2_PINPOS*2)),
+#endif
+    }
+};
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®ã¨ãªã¢
+ */
+SIOPCB	siopcb_table[TNUM_SIOP];
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãIDããç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_SIOP(siopid)	((uint_t)((siopid) - 1))
+#define get_siopcb(siopid)	(&(siopcb_table[INDEX_SIOP(siopid)]))
+
+static void setup_gpio_source(uint32_t base, uint8_t source, uint8_t select)
+{
+	uint32_t tmpreg, regoff;
+	regoff = TOFF_GPIO_AFR0+((source>>1) & 0x4);
+	tmpreg = (sil_rew_mem((uint32_t *)(base+regoff)) & ~(0xF << ((source & 0x07) * 4)))
+			    | (select << ((source & 0x07) * 4));
+	sil_wrw_mem((uint32_t *)(base+regoff), tmpreg);
+}
+
+void put_hex(char a, int val)
+{
+	int i, j;
+	target_fput_log(a);
+	target_fput_log(' ');
+	for(i = 28 ; i >= 0 ; i-= 4){
+		j = (val >> i) & 0xf;;
+		if(j > 9)
+			j += ('A'-10);
+		else
+			j += '0';
+		target_fput_log(j);
+	}
+	target_fput_log('\n');
+}
+
+/*
+ *  SIOãã©ã¤ãã®åæå
+ */
+void
+sio_initialize(intptr_t exinf)
+{
+	SIOPCB	*p_siopcb;
+	uint_t	i;
+
+	/*
+	 *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®åæå
+	 */
+	for (p_siopcb = siopcb_table, i = 0; i < TNUM_SIOP; p_siopcb++, i++) {
+		p_siopcb->p_siopinib = &(siopinib_table[i]);
+		p_siopcb->p_gpioinib = &(gpioinib_table[i]);
+		p_siopcb->opnflg = false;
+	}
+}
+
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
+ */
+SIOPCB *
+sio_opn_por(ID siopid, intptr_t exinf)
+{
+	SIOPCB          *p_siopcb;
+	const SIOPINIB  *p_siopinib;
+	const GPIOINIB  *p_gpioinib;
+	bool_t   opnflg;
+	ER       ercd;
+	uint32_t base, txbase, rxbase;
+	uint32_t apbclock, integerdivider, fractionaldivider, tmp;
+
+	p_siopcb = get_siopcb(siopid);
+	p_siopinib = p_siopcb->p_siopinib;
+	p_gpioinib = p_siopcb->p_gpioinib;
+
+	/*
+	 *  ãªã¼ãã³ãããã¼ããããããopnflgã«èª­ãã§ããï¼
+	 */
+	opnflg = p_siopcb->opnflg;
+
+	p_siopcb->exinf = exinf;
+	txbase = p_gpioinib->txportbase;
+	rxbase = p_gpioinib->rxportbase;
+
+	if(txbase == 0 || rxbase == 0)	/* no usart port */
+		goto sio_opn_exit;
+
+	/*
+	 *  ãã¼ãã¦ã§ã¢ã®åæå
+	 */
+	sil_wrw_mem((uint32_t *)p_gpioinib->clockbase, sil_rew_mem((uint32_t *)p_gpioinib->clockbase) | p_gpioinib->clock_set);
+	sil_wrw_mem((uint32_t *)p_gpioinib->portbase, sil_rew_mem((uint32_t *)p_gpioinib->portbase) | p_gpioinib->port_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_MODER), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_MODER)) & p_gpioinib->txmode_msk) | p_gpioinib->txmode_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_OSPEEDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_OSPEEDR)) & p_gpioinib->txspeed_msk) | p_gpioinib->txspeed_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_OTYPER), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_OTYPER)) & p_gpioinib->txtype_msk) | p_gpioinib->txtype_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR)) & p_gpioinib->txpupd_msk) | p_gpioinib->txpupd_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_MODER), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_MODER)) & p_gpioinib->rxmode_msk) | p_gpioinib->rxmode_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_OSPEEDR), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_OSPEEDR)) & p_gpioinib->rxspeed_msk) | p_gpioinib->rxspeed_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_OTYPER), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_OTYPER)) & p_gpioinib->rxtype_msk) | p_gpioinib->rxtype_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR)) & p_gpioinib->rxpupd_msk) | p_gpioinib->rxpupd_set);
+	setup_gpio_source(txbase, p_gpioinib->txpinport, GPIO_AF7);
+	setup_gpio_source(rxbase, p_gpioinib->rxpinport, GPIO_AF7);
+
+	base = p_siopinib->base;
+
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & ~USART_CR1_UE);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR2)) & ~USART_CR2_STOP;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR2), tmp | USART_StopBits_1);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & ~CR1_CLEAR_MASK;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), tmp | USART_WordLength_8b | USART_Parity_No | USART_Mode_Rx | USART_Mode_Tx);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR3)) & ~CR3_CLEAR_MASK;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR3), tmp | USART_HardwareFlowControl_None);
+
+	if ((base == TADR_USART1_BASE) || (base == TADR_USART6_BASE))
+		apbclock = SysFrePCLK2;
+	else
+		apbclock = SysFrePCLK1;
+
+	if ((sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & USART_CR1_OVER8) != 0){
+		integerdivider = ((25 * apbclock) / (2 * BPS_SETTING));	/* 8 Samples */
+		tmp = (integerdivider / 100) << 4;
+		fractionaldivider = integerdivider - (100 * (tmp >> 4));
+		tmp |= ((((fractionaldivider * 8) + 50) / 100)) & 0x07;
+	}
+	else{ /* if ((USARTx->CR1 & USART_CR1_OVER8) == 0) */
+		integerdivider = ((25 * apbclock) / (4 * BPS_SETTING));	/* 16 Samples */
+		tmp = (integerdivider / 100) << 4;
+		fractionaldivider = integerdivider - (100 * (tmp >> 4));
+		tmp |= ((((fractionaldivider * 16) + 50) / 100)) & 0x0F;
+	}
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_BRR), tmp);
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) | USART_CR1_RXNEIE);
+	p_siopcb->opnflg = true;
+
+	/*
+	 *  ã·ãªã¢ã«I/Oå²è¾¼ã¿ã®ãã¹ã¯ãè§£é¤ããï¼
+	 */
+	if (!opnflg) {
+		ercd = ena_int(p_siopinib->intno_usart);
+		assert(ercd == E_OK);
+	}
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) | USART_CR1_UE);
+
+sio_opn_exit:;
+	return(p_siopcb);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ã¯ã­ã¼ãº
+ */
+void
+sio_cls_por(SIOPCB *p_siopcb)
+{
+	/*
+	 *  ã·ãªã¢ã«I/Oå²è¾¼ã¿ããã¹ã¯ããï¼
+	 */
+	if ((p_siopcb->opnflg)) {
+		dis_int(p_siopcb->p_siopinib->intno_usart);
+	}
+	p_siopcb->opnflg = false;
+}
+
+/*
+ *  SIOã®å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³
+ */
+
+Inline bool_t
+sio_putready(SIOPCB* p_siopcb)
+{
+	uint16_t cr1 = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1));
+	uint16_t ssr = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_SR));
+
+	if ((cr1 & USART_CR1_TXEIE) != 0 && (ssr & USART_SR_TC) != 0)
+	{
+		return 1;
+	}
+	return 0;
+}
+
+Inline bool_t
+sio_getready(SIOPCB* p_siopcb)
+{
+	uint16_t cr1 = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1));
+	uint16_t ssr = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_SR));
+
+	if ((ssr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE | USART_SR_PE)) != 0)
+	{
+		return 0;
+	}
+	if ((cr1 & USART_CR1_RXNEIE) != 0 && (ssr & USART_SR_RXNE) != 0)
+	{
+		return 1;
+	}
+	return 0;
+}
+
+void
+sio_usart_isr(intptr_t exinf)
+{
+	SIOPCB          *p_siopcb;
+
+	p_siopcb = get_siopcb(exinf);
+
+	if (sio_getready(p_siopcb)) {
+		sio_irdy_rcv(p_siopcb->exinf);
+	}
+	if (sio_putready(p_siopcb)) {
+		sio_irdy_snd(p_siopcb->exinf);
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã¸ã®æå­éä¿¡
+ */
+bool_t
+sio_snd_chr(SIOPCB *p_siopcb, char c)
+{
+	if (sio_putready(p_siopcb)) {
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_DR), (uint16_t)c);
+		return true;
+	}
+	return false;
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®æå­åä¿¡
+ */
+int_t
+sio_rcv_chr(SIOPCB *p_siopcb)
+{
+	int_t c = -1;
+
+	if (sio_getready(p_siopcb)) {
+		c = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_DR)) & 0xFF;
+	}
+	return c;
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+void
+sio_ena_cbr(SIOPCB *p_siopcb, uint_t cbrtn)
+{
+	switch (cbrtn) {
+	case SIO_RDY_SND:
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1)) | USART_CR1_TXEIE);
+		break;
+	case SIO_RDY_RCV:
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1)) | USART_CR1_RXNEIE);
+		break;
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+void
+sio_dis_cbr(SIOPCB *p_siopcb, uint_t cbrtn)
+{
+	switch (cbrtn) {
+	case SIO_RDY_SND:
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1)) & ~USART_CR1_TXEIE);
+		break;
+	case SIO_RDY_RCV:
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1)) & ~USART_CR1_RXNEIE);
+		break;
+	}
+}
+
+/*
+ *  1æå­åºåï¼ãã¼ãªã³ã°ã§ã®åºåï¼
+ */
+void sio_pol_snd_chr(int8_t c, ID siopid)
+{
+	uint32_t base = siopinib_table[INDEX_PORT(siopid)].base;
+
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_DR), (uint16_t)c);
+	while(0 == (sil_reh_mem((uint16_t *)(base+TOFF_USART_SR)) & USART_SR_TC));
+
+	/*
+	 *  åºåãå®å
+¨ã«çµããã¾ã§å¾
+ã¤
+	 */
+	volatile int n = 300000000/BPS_SETTING;
+	while(n--);
+}
+
+/*
+ *  ã¿ã¼ã²ããã®ã·ãªã¢ã«åæå
+ */
+void chip_uart_init(ID siopid)
+{
+	const GPIOINIB  *p_gpioinib = &gpioinib_table[INDEX_PORT(siopid)];
+	const SIOPINIB  *p_siopinib = &siopinib_table[INDEX_PORT(siopid)];
+	uint32_t base, txbase, rxbase;
+	uint32_t apbclock, integerdivider, fractionaldivider, tmp;
+
+	txbase = p_gpioinib->txportbase;
+	rxbase = p_gpioinib->rxportbase;
+
+	sil_wrw_mem((uint32_t *)p_gpioinib->clockbase, sil_rew_mem((uint32_t *)p_gpioinib->clockbase) | p_gpioinib->clock_set);
+	sil_wrw_mem((uint32_t *)p_gpioinib->portbase, sil_rew_mem((uint32_t *)p_gpioinib->portbase) | p_gpioinib->port_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_MODER), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_MODER)) & p_gpioinib->txmode_msk) | p_gpioinib->txmode_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_OSPEEDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_OSPEEDR)) & p_gpioinib->txspeed_msk) | p_gpioinib->txspeed_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_OTYPER), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_OTYPER)) & p_gpioinib->txtype_msk) | p_gpioinib->txtype_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR)) & p_gpioinib->txpupd_msk) | p_gpioinib->txpupd_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_MODER), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_MODER)) & p_gpioinib->rxmode_msk) | p_gpioinib->rxmode_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_OSPEEDR), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_OSPEEDR)) & p_gpioinib->rxspeed_msk) | p_gpioinib->rxspeed_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_OTYPER), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_OTYPER)) & p_gpioinib->rxtype_msk) | p_gpioinib->rxtype_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR)) & p_gpioinib->rxpupd_msk) | p_gpioinib->rxpupd_set);
+	setup_gpio_source(txbase, p_gpioinib->txpinport, GPIO_AF7);
+	setup_gpio_source(rxbase, p_gpioinib->rxpinport, GPIO_AF7);
+
+	base = p_siopinib->base;
+
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR2)) & ~USART_CR2_STOP;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR2), tmp | USART_StopBits_1);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & ~CR1_CLEAR_MASK;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), tmp | USART_WordLength_8b | USART_Parity_No | USART_Mode_Rx | USART_Mode_Tx);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR3)) & ~CR3_CLEAR_MASK;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR3), tmp | USART_HardwareFlowControl_None);
+
+	if ((base == TADR_USART1_BASE) || (base == TADR_USART6_BASE))
+		apbclock = SysFrePCLK2;
+	else
+		apbclock = SysFrePCLK1;
+
+	if ((sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & USART_CR1_OVER8) != 0){
+		integerdivider = ((25 * apbclock) / (2 * BPS_SETTING));	/* 8 Samples */
+		tmp = (integerdivider / 100) << 4;
+		fractionaldivider = integerdivider - (100 * (tmp >> 4));
+		tmp |= ((((fractionaldivider * 8) + 50) / 100)) & 0x07;
+	}
+	else{ /* if ((USARTx->CR1 & USART_CR1_OVER8) == 0) */
+		integerdivider = ((25 * apbclock) / (4 * BPS_SETTING));	/* 16 Samples */
+		tmp = (integerdivider / 100) << 4;
+		fractionaldivider = integerdivider - (100 * (tmp >> 4));
+		tmp |= ((((fractionaldivider * 16) + 50) / 100)) & 0x0F;
+	}
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_BRR), tmp);
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & ~(USART_CR1_TXEIE | USART_CR1_RXNEIE));
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) | USART_CR1_UE);
+}
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_serial.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_serial.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_serial.h	(revision 136)
@@ -0,0 +1,139 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: chip_serial.h 698 2015-08-12 18:17:21Z roi $
+ */
+
+/*
+ *    ã·ãªã¢ã«I/Oããã¤ã¹ï¼SIOï¼ãã©ã¤ã
+ */
+
+#ifndef TOPPERS_CHIP_SERIAL_H
+#define TOPPERS_CHIP_SERIAL_H
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®å®ç¾©
+ */
+typedef struct sio_port_control_block    SIOPCB;
+
+/*
+ *  ã³ã¼ã«ããã¯ã«ã¼ãã³ã®è­å¥çªå·
+ */
+#define SIO_RDY_SND    1U        /* éä¿¡å¯è½ã³ã¼ã«ããã¯ */
+#define SIO_RDY_RCV    2U        /* åä¿¡éç¥ã³ã¼ã«ããã¯ */
+
+/*
+ *  SIOãã©ã¤ãã®åæå
+ */
+extern void sio_initialize(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
+ */
+extern SIOPCB *sio_opn_por(ID siopid, intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ã¯ã­ã¼ãº
+ */
+extern void sio_cls_por(SIOPCB *p_siopcb);
+
+/*
+ *  SIOã®å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³
+ */
+extern void sio_usart_isr(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã¸ã®æå­éä¿¡
+ */
+extern bool_t sio_snd_chr(SIOPCB *p_siopcb, char c);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®æå­åä¿¡
+ */
+extern int_t sio_rcv_chr(SIOPCB *p_siopcb);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+extern void sio_ena_cbr(SIOPCB *p_siopcb, uint_t cbrtn);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+extern void sio_dis_cbr(SIOPCB *p_siopcb, uint_t cbrtn);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®éä¿¡å¯è½ã³ã¼ã«ããã¯
+ */
+extern void sio_irdy_snd(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®åä¿¡éç¥ã³ã¼ã«ããã¯
+ */
+extern void sio_irdy_rcv(intptr_t exinf);
+
+/*
+ *  1æå­éä¿¡ï¼ãã¼ãªã³ã°ã§ã®åºåï¼
+ */
+extern void sio_pol_snd_chr(int8_t c, ID siopid);
+
+/*
+ *  ã¿ã¼ã²ããã®ã·ãªã¢ã«åæå
+ */
+extern void chip_uart_init(ID siopid);
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_CHIP_SERIAL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_sil.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_sil.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_sil.h	(revision 136)
@@ -0,0 +1,89 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_sil.h 698 2015-07-27 22:44:45Z roi $
+ */
+
+/*
+ *   sil.hã®ãããä¾å­é¨ï¼stm32f4xxç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼sil.hã®å
+é ­ã§ã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡
+ *  ã¤ã«ããã¯ç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼
+ *  ãããåã«ï¼t_stddef.hãã¤ã³ã¯ã«ã¼ããããã®ã§ï¼ãããã«ä¾å­ãã¦ã
+ *  ããï¼
+ */
+
+#ifndef TOPPERS_CHIP_SIL_H
+#define TOPPERS_CHIP_SIL_H
+
+/*
+ *  ãã­ã»ããµã®ã¨ã³ãã£ã¢ã³
+ */
+#define SIL_ENDIAN_LITTLE
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+(core_sil.hã§åç
+§ããããããã§å®ç¾©)
+ */
+#define TBITW_IPRI     4
+
+/*
+ *  ã³ã¢ä¾å­ã§å
+±éãªå®ç¾©
+ */
+#include "core_sil.h"
+
+#endif /* TOPPERS_CHIP_SIL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_unrename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_unrename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/chip_unrename.h	(revision 136)
@@ -0,0 +1,27 @@
+/* This file is generated from target_rename.def by genrename. */
+
+/* This file is included only when target_rename.h has been included. */
+#ifdef TOPPERS_CHIP_RENAME_H
+#undef TOPPERS_CHIP_RENAME_H
+
+
+/*
+ * chip_config.c
+ */
+#undef target_initialize
+#undef target_exit
+
+#ifdef TOPPERS_LABEL_ASM
+
+
+/*
+ * chip_config.c
+ */
+#undef _target_initialize
+#undef _target_exit
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "arm_m_gcc/common/core_unrename.h"
+
+#endif /* TOPPERS_CHIP_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/cmsis_f4.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/cmsis_f4.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/cmsis_f4.h	(revision 136)
@@ -0,0 +1,123 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Just Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ *
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã® (1)ï½(4) ã®æ¡ä»¶ãï¼Free Software Foundation 
+ *  ã«ãã£ã¦å
+¬è¡¨ããã¦ãã GNU General Public License ã® Version 2 ã«è¨
+ *  è¿°ããã¦ããæ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§ã¢ï¼æ¬ã½ããã¦ã§ã¢
+ *  ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼
+ *  å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ãã®é©ç¨å¯è½æ§ã
+ *  å«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´
+ *  æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: cmsis.h,v 1.1 2015/07/27 22:56:07 roi Exp $
+ */
+
+#ifndef _CMSIS_F4_H_
+#define _CMSIS_F4_H_
+
+#define __NVIC_PRIO_BITS          4       /* STM32F4XX uses 4 Bits for the Priority Levels */
+
+/* Memory mapping of Cortex-M4 Hardware */
+#define TADR_ITM_BASE       (0xE0000000UL)	/* ITM Base Address */
+  #define TOFF_ITM_PORT     0x0000		/* (W)  ITM Stimulus Port Registers */
+  #define TOFF_ITM_TER      0x0E00		/* (RW) ITM Trace Enable Register */
+  #define TOFF_ITM_TPR      0x0E40		/* (RW) ITM Trace Privilege Register */
+  #define TOFF_ITM_TCR      0x0E80		/* (RW) ITM Trace Control Register */
+#define TADR_SCS_BASE       (0xE000E000UL)	/* System Control Space Base Address  */
+  #define TOFF_SCS_ICTR     0x0004		/* (R)  Interrupt Controller Type Register */
+  #define TOFF_SCS_ACTLR    0x0008		/* (RW) Auxiliary Control Register */
+#define TADR_COREDEBUG_BASE (0xE000EDF0UL)				/* Core Debug Base Address */
+#define TADR_SYSTICK_BASE   (TADR_SCS_BASE+0x0010UL)	/* SysTick Base Address */
+  #define TOFF_SYSTICK_CTRL 0x0000		/* (RW) SysTick Control and Status Register */
+  #define TOFF_SYSTICK_LOAD 0x0004		/* (RW) SysTick Reload Value Register */
+  #define TOFF_SYSTICK_VAL  0x0008		/* (RW) SysTick Current Value Register */
+  #define TOFF_SYSTICK_CALIB 0x000C		/* (R)  SysTick Calibration Register */
+#define TADR_NVIC_BASE      (TADR_SCS_BASE+0x0100UL)	/* NVIC Base Address */
+  #define TOFF_NVIC_ISER    0x0000		/* (RW) Interrupt Set Enable Register */
+  #define TOFF_NVIC_ICER    0x0080		/* (RW) Interrupt Clear Enable Register */
+  #define TOFF_NVIC_ISPR    0x0100		/* (RW) Interrupt Set Pending Register */
+  #define TOFF_NVIC_ICPR    0x0180		/* (RW) Interrupt Clear Pending Register */
+  #define TOFF_NVIC_IABR    0x0200		/* (RW) Interrupt Active bit Register */
+  #define TOFF_NVIC_IP      0x0300		/* (RW) Interrupt Priority Register (8Bit wide) */
+  #define TOFF_NVIC_STIR    0x0E00		/* (W)  Software Trigger Interrupt Register */
+#define TADR_SCB_BASE       (TADR_SCS_BASE+0x0D00UL)	/* System Control Block Base Address  */
+  #define TOFF_SCB_CPUID    0x0000		/* (R)  CPUID Base Register */
+  #define TOFF_SCB_ICSR     0x0004		/* (RW) Interrupt Control and State Register */
+  #define TOFF_SCB_VTOR     0x0008		/* (RW) Vector Table Offset Register */
+  #define TOFF_SCB_AIRCR    0x000C		/* (RW) Application Interrupt and Reset Control Register */
+  #define TOFF_SCB_SCR      0x0010		/* (RW) System Control Register */
+  #define TOFF_SCB_CCR      0x0014		/* (RW) Configuration Control Register */
+  #define TOFF_SCB_SHP4     0x0018		/* (RW-8) System Handlers Priority Registers 4 */
+  #define TOFF_SCB_SHP5     0x0019		/* (RW-8) System Handlers Priority Registers 5 */
+  #define TOFF_SCB_SHP6     0x001A		/* (RW-8) System Handlers Priority Registers 6 */
+  #define TOFF_SCB_SHP7     0x001B		/* (RW-8) System Handlers Priority Registers 7 */
+  #define TOFF_SCB_SHP8     0x001C		/* (RW-8) System Handlers Priority Registers 8 */
+  #define TOFF_SCB_SHP9     0x001D		/* (RW-8) System Handlers Priority Registers 9 */
+  #define TOFF_SCB_SHP10    0x001E		/* (RW-8) System Handlers Priority Registers 10 */
+  #define TOFF_SCB_SHP11    0x001F		/* (RW-8) System Handlers Priority Registers 11 */
+  #define TOFF_SCB_SHP12    0x0020		/* (RW-8) System Handlers Priority Registers 12 */
+  #define TOFF_SCB_SHP13    0x0021		/* (RW-8) System Handlers Priority Registers 13 */
+  #define TOFF_SCB_SHP14    0x0022		/* (RW-8) System Handlers Priority Registers 14 */
+  #define TOFF_SCB_SHP15    0x0023		/* (RW-8) System Handlers Priority Registers 15 */
+  #define TOFF_SCB_SHCSR    0x0024		/* (RW) System Handler Control and State Register */
+  #define TOFF_SCB_CFSR     0x0028		/* (RW) Configurable Fault Status Register */
+  #define TOFF_SCB_HFSR     0x002C		/* (RW) HardFault Status Register */
+  #define TOFF_SCB_DFSR     0x0030		/* (RW) Debug Fault Status Register */
+  #define TOFF_SCB_MMFAR    0x0034		/* (RW) MemManage Fault Address Register */
+  #define TOFF_SCB_BFAR     0x0038		/* (RW) BusFault Address Register */
+  #define TOFF_SCB_AFSR     0x003C		/* (RW) Auxiliary Fault Status Register */
+  #define TOFF_SCB_PFR0     0x0040		/* (R)  Processor Feature Register 0 */
+  #define TOFF_SCB_PFR1     0x0044		/* (R)  Processor Feature Register 1 */
+  #define TOFF_SCB_DFR      0x0048		/* (R)  Debug Feature Register */
+  #define TOFF_SCB_ADR      0x004C		/* (R)  Auxiliary Feature Register */
+  #define TOFF_SCB_MMFR0    0x0050		/* (R)  Memory Model Feature Register 0 */
+  #define TOFF_SCB_MMFR1    0x0054		/* (R)  Memory Model Feature Register 1 */
+  #define TOFF_SCB_MMFR2    0x0058		/* (R)  Memory Model Feature Register 2 */
+  #define TOFF_SCB_MMFR3    0x005C		/* (R)  Memory Model Feature Register 3 */
+  #define TOFF_SCB_ISAR0    0x0060		/* (R)  Instruction Set Attributes Register 0 */
+  #define TOFF_SCB_ISAR1    0x0064		/* (R)  Instruction Set Attributes Register 1 */
+  #define TOFF_SCB_ISAR2    0x0068		/* (R)  Instruction Set Attributes Register 2 */
+  #define TOFF_SCB_ISAR3    0x006C		/* (R)  Instruction Set Attributes Register 3 */
+  #define TOFF_SCB_ISAR4    0x0070		/* (R)  Instruction Set Attributes Register 4 */
+  #define TOFF_SCB_CPACR    0x0088		/* (RW) Coprocessor Access Control Register */
+
+#endif  /* _CMSIS_F4_H_ */
+
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/stm32f4xx.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/stm32f4xx.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/_stm32f4xx/stm32f4xx.h	(revision 136)
@@ -0,0 +1,1299 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Just Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ *
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã® (1)ï½(4) ã®æ¡ä»¶ãï¼Free Software Foundation 
+ *  ã«ãã£ã¦å
+¬è¡¨ããã¦ãã GNU General Public License ã® Version 2 ã«è¨
+ *  è¿°ããã¦ããæ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§ã¢ï¼æ¬ã½ããã¦ã§ã¢
+ *  ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼
+ *  å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ãã®é©ç¨å¯è½æ§ã
+ *  å«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´
+ *  æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: stm32f4xx.h,v 1.1 2015/07/18 21:48:24 roi Exp $
+ */
+
+#ifndef _STM32F4XX_H_
+#define _STM32F4XX_H_
+
+#include <sil.h>
+#include "cmsis_f4.h"
+
+/*
+ *  å²è¾¼ã¿çªå·ã®æå¤§å¤
+ */
+#define TMAX_INTNO          (16 + 82)
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+
+ */
+#define TBITW_IPRI          4
+
+/*
+ *  INTERRUPT NUMBER
+ */
+#define IRQ_VECTOR_WWDG             (16 + 0)	/* Window WatchDog Interrupt */
+#define IRQ_VECTOR_PVD              (16 + 1)	/* PVD through EXTI Line detection Interrupt */
+#define IRQ_VECTOR_TAMP_STAMP       (16 + 2)	/* Tamper and TimeStamp interrupts through the EXTI line */
+#define IRQ_VECTOR_RTC_WKUP         (16 + 3)	/* RTC Wakeup interrupt through the EXTI line */
+#define IRQ_VECTOR_FLASH            (16 + 4)	/* FLASH global Interrupt */
+#define IRQ_VECTOR_RCC              (16 + 5)	/* RCC global Interrupt */
+#define IRQ_VECTOR_EXTI0            (16 + 6)	/* EXTI Line0 Interrupt */
+#define IRQ_VECTOR_EXTI1            (16 + 7)	/* EXTI Line1 Interrupt */
+#define IRQ_VECTOR_EXTI2            (16 + 8)	/* EXTI Line2 Interrupt */
+#define IRQ_VECTOR_EXTI3            (16 + 9)	/* EXTI Line3 Interrupt */
+#define IRQ_VECTOR_EXTI4            (16 + 10)	/* EXTI Line4 Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM0     (16 + 11)	/* DMA1 Stream 0 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM1     (16 + 12)	/* DMA1 Stream 1 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM2     (16 + 13)	/* DMA1 Stream 2 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM3     (16 + 14)	/* DMA1 Stream 3 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM4     (16 + 15)	/* DMA1 Stream 4 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM5     (16 + 16)	/* DMA1 Stream 5 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM6     (16 + 17)	/* DMA1 Stream 6 global Interrupt */
+#define IRQ_VECTOR_ADC              (16 + 18)	/* ADC1, ADC2 and ADC3 global Interrupts */
+#define IRQ_VECTOR_CAN1_TX          (16 + 19)	/* CAN1 TX Interrupt */
+#define IRQ_VECTOR_CAN1_RX0         (16 + 20)	/* CAN1 RX0 Interrupt */
+#define IRQ_VECTOR_CAN1_RX1         (16 + 21)	/* CAN1 RX1 Interrupt */
+#define IRQ_VECTOR_CAN1_SCE         (16 + 22)	/* CAN1 SCE Interrupt */
+#define IRQ_VECTOR_EXTI9_5          (16 + 23)	/* External Line[9:5] Interrupts */
+#define IRQ_VECTOR_TIM1_BRK_TIM9    (16 + 24)	/* TIM1 Break interrupt and TIM9 global interrupt */
+#define IRQ_VECTOR_TIM1_UP_TIM10    (16 + 25)	/* TIM1 Update Interrupt and TIM10 global interrupt */
+#define IRQ_VECTOR_TIM1_TRG_COM_TIM11 (16+26)	/* TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */
+#define IRQ_VECTOR_TIM1_CC          (16 + 27)	/* TIM1 Capture Compare Interrupt */
+#define IRQ_VECTOR_TIM2             (16 + 28)	/* TIM2 global Interrupt */
+#define IRQ_VECTOR_TIM3             (16 + 29)	/* TIM3 global Interrupt */
+#define IRQ_VECTOR_TIM4             (16 + 30)	/* TIM4 global Interrupt */
+#define IRQ_VECTOR_I2C1_EV          (16 + 31)	/* I2C1 Event Interrupt */
+#define IRQ_VECTOR_I2C1_ER          (16 + 32)	/* I2C1 Error Interrupt */
+#define IRQ_VECTOR_I2C2_EV          (16 + 33)	/* I2C2 Event Interrupt */
+#define IRQ_VECTOR_I2C2_ER          (16 + 34)	/* I2C2 Error Interrupt */
+#define IRQ_VECTOR_SPI1             (16 + 35)	/* SPI1 global Interrupt */
+#define IRQ_VECTOR_SPI2             (16 + 36)	/* SPI2 global Interrupt */
+#define IRQ_VECTOR_USART1           (16 + 37)	/* USART1 global Interrupt */
+#define IRQ_VECTOR_USART2           (16 + 38)	/* USART2 global Interrupt */
+#define IRQ_VECTOR_USART3           (16 + 39)	/* USART3 global Interrupt */
+#define IRQ_VECTOR_EXTI15_10        (16 + 40)	/* External Line[15:10] Interrupts */
+#define IRQ_VECTOR_RTC_ALARM        (16 + 41)	/* RTC Alarm (A and B) through EXTI Line Interrupt */
+#define IRQ_VECTOR_OTG_FS_WKUP      (16 + 42)	/* USB OTG FS Wakeup through EXTI line interrupt */
+#define IRQ_VECTOR_TIM8_BRK_TIM12   (16 + 43)	/* TIM8 Break Interrupt and TIM12 global interrupt */
+#define IRQ_VECTOR_TIM8_UP_TIM13    (16 + 44)	/* TIM8 Update Interrupt and TIM13 global interrupt */
+#define IRQ_VECTOR_TIM8_TRG_COM_TIM14 (16+45)	/* TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
+#define IRQ_VECTOR_TIM8_CC          (16 + 46)	/* TIM8 Capture Compare Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM7     (16 + 47)	/* DMA1 Stream7 Interrupt */
+#define IRQ_VECTOR_FSMC             (16 + 48)	/* FSMC global Interrupt */
+#define IRQ_VECTOR_SDIO             (16 + 49)	/* SDIO global Interrupt */
+#define IRQ_VECTOR_TIM5             (16 + 50)	/* TIM5 global Interrupt */
+#define IRQ_VECTOR_SPI3             (16 + 51)	/* SPI3 global Interrupt */
+#define IRQ_VECTOR_UART4            (16 + 52)	/* UART4 global Interrupt */
+#define IRQ_VECTOR_UART5            (16 + 53)	/* UART5 global Interrupt */
+#define IRQ_VECTOR_TIM6_DAC         (16 + 54)	/* TIM6 global and DAC1&2 underrun error interrupts */
+#define IRQ_VECTOR_TIM7             (16 + 55)	/* TIM7 global interrupt */
+#define IRQ_VECTOR_DMA2_STREAM0     (16 + 56)	/* DMA2 Stream 0 global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM1     (16 + 57)	/* DMA2 Stream 1 global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM2     (16 + 58)	/* DMA2 Stream 2 global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM3     (16 + 59)	/* DMA2 Stream 3 global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM4     (16 + 60)	/* DMA2 Stream 4 global Interrupt */
+#define IRQ_VECTOR_ETH              (16 + 61)	/* Ethernet global Interrupt */
+#define IRQ_VECTOR_ETH_WKUP         (16 + 62)	/* Ethernet Wakeup through EXTI line Interrupt */
+#define IRQ_VECTOR_CAN2_TX          (16 + 63)	/* CAN2 TX Interrupt */
+#define IRQ_VECTOR_CAN2_RX0         (16 + 64)	/* CAN2 RX0 Interrupt */
+#define IRQ_VECTOR_CAN2_RX1         (16 + 65)	/* CAN2 RX1 Interrupt */
+#define IRQ_VECTOR_CAN2_SCE         (16 + 66)	/* CAN2 SCE Interrupt */
+#define IRQ_VECTOR_OTG_FS           (16 + 67)	/* USB OTG FS global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM5     (16 + 68)	/* DMA2 Stream 5 global interrupt */
+#define IRQ_VECTOR_DMA2_STREAM6     (16 + 69)	/* DMA2 Stream 6 global interrupt */
+#define IRQ_VECTOR_DMA2_STREAM7     (16 + 70)	/* DMA2 Stream 7 global interrupt */
+#define IRQ_VECTOR_USART6           (16 + 71)	/* USART6 global interrupt */
+#define IRQ_VECTOR_I2C3_EV          (16 + 72)	/* I2C3 event interrupt */
+#define IRQ_VECTOR_I2C3_ER          (16 + 73)	/* I2C3 error interrupt */
+#define IRQ_VECTOR_OTG_HS_EP1_OUT   (16 + 74)	/* USB OTG HS End Point 1 Out global interrupt */
+#define IRQ_VECTOR_OTG_HS_EP1_IN    (16 + 75)	/* USB OTG HS End Point 1 In global interrupt */
+#define IRQ_VECTOR_OTG_HS_WKUP      (16 + 76)	/* USB OTG HS Wakeup through EXTI interrupt */
+#define IRQ_VECTOR_OTG_HS           (16 + 77)	/* USB OTG HS global interrupt */
+#define IRQ_VECTOR_DCMI             (16 + 78)	/* DCMI global interrupt */
+#define IRQ_VECTOR_CRYP             (16 + 79)	/* CRYP crypto global interrupt */
+#define IRQ_VECTOR_HASH_RNG         (16 + 80)	/* Hash and Rng global interrupt */
+#define IRQ_VECTOR_FPU              (16 + 81)	/* FPU global interrupt */
+
+/*
+ *  PERIPHERAL MEMORY MAP
+ */
+#define FLASH_BASE          0x08000000	/*!< FLASH(up to 1 MB) base address in the alias region                         */
+#define CCMDATARAM_BASE     0x10000000	/*!< CCM(core coupled memory) data RAM(64 KB) base address in the alias region  */
+#define SRAM1_BASE          0x20000000	/*!< SRAM1(112 KB) base address in the alias region                             */
+#define SRAM2_BASE          0x2001C000	/*!< SRAM2(16 KB) base address in the alias region                              */
+#define PERIPH_BASE         0x40000000	/*!< Peripheral base address in the alias region                                */
+#define BKPSRAM_BASE        0x40024000	/*!< Backup SRAM(4 KB) base address in the alias region                         */
+#define FSMC_R_BASE         0xA0000000	/*!< FSMC registers base address                                                */
+
+#define CCMDATARAM_BB_BASE  0x12000000	/*!< CCM(core coupled memory) data RAM(64 KB) base address in the bit-band region  */
+#define SRAM1_BB_BASE       0x22000000	/*!< SRAM1(112 KB) base address in the bit-band region                             */
+#define SRAM2_BB_BASE       0x2201C000	/*!< SRAM2(16 KB) base address in the bit-band region                              */
+#define PERIPH_BB_BASE      0x42000000	/*!< Peripheral base address in the bit-band region                                */
+#define BKPSRAM_BB_BASE     0x42024000	/*!< Backup SRAM(4 KB) base address in the bit-band region                         */
+
+/*!< Peripheral memory map */
+#define APB1PERIPH_BASE     PERIPH_BASE
+#define APB2PERIPH_BASE     (PERIPH_BASE + 0x00010000)
+#define AHB1PERIPH_BASE     (PERIPH_BASE + 0x00020000)
+#define AHB2PERIPH_BASE     (PERIPH_BASE + 0x10000000)
+
+/*
+ *  TIM
+ */
+#define TADR_TIM2_BASE      (APB1PERIPH_BASE + 0x0000)
+#define TADR_TIM3_BASE      (APB1PERIPH_BASE + 0x0400)
+#define TADR_TIM4_BASE      (APB1PERIPH_BASE + 0x0800)
+#define TADR_TIM5_BASE      (APB1PERIPH_BASE + 0x0C00)
+#define TADR_TIM6_BASE      (APB1PERIPH_BASE + 0x1000)
+#define TADR_TIM7_BASE      (APB1PERIPH_BASE + 0x1400)
+#define TADR_TIM12_BASE     (APB1PERIPH_BASE + 0x1800)
+#define TADR_TIM13_BASE     (APB1PERIPH_BASE + 0x1C00)
+#define TADR_TIM14_BASE     (APB1PERIPH_BASE + 0x2000)
+#define TADR_TIM1_BASE      (APB2PERIPH_BASE + 0x0000)
+#define TADR_TIM8_BASE      (APB2PERIPH_BASE + 0x0400)
+#define TADR_TIM9_BASE      (APB2PERIPH_BASE + 0x4000)
+#define TADR_TIM10_BASE     (APB2PERIPH_BASE + 0x4400)
+#define TADR_TIM11_BASE     (APB2PERIPH_BASE + 0x4800)
+#define TOFF_TIM_CR1        0x0000		/* (RW-16) TIM control register 1 */
+  #define TIM_CR1_CEN        0x0001		/* Counter enable */
+  #define TIM_CR1_UDIS       0x0002		/* Update disable */
+  #define TIM_CR1_URS        0x0004		/* Update request source */
+  #define TIM_CR1_OPM        0x0008		/* One pulse mode */
+  #define TIM_CR1_DIR        0x0010		/* Direction */
+  #define TIM_CR1_CMS_0      0x0020		/* CMS[1:0] bit 0 */
+  #define TIM_CR1_CMS_1      0x0040		/* CMS[1:0] bit 1 */
+  #define TIM_CR1_ARPE       0x0080		/* Auto-reload preload enable */
+  #define TIM_CR1_CKD_0      0x0100		/* CKD[1:0] bit 0 */
+  #define TIM_CR1_CKD_1      0x0200		/* CKD[1:0] bit 1 */
+#define TOFF_TIM_CR2        0x0004		/* (RW-16) TIM control register 2 */
+#define TOFF_TIM_SMCR       0x0008		/* (RW-16) TIM slave mode control register */
+#define TOFF_TIM_DIER       0x000C		/* (RW-16) TIM DMA/interrupt enable register */
+  #define TIM_DIER_UIE       0x0001		/* Update interrupt enable */
+  #define TIM_DIER_CC1IE     0x0002		/* Capture/Compare 1 interrupt enable */
+  #define TIM_DIER_CC2IE     0x0004		/* Capture/Compare 2 interrupt enable */
+  #define TIM_DIER_CC3IE     0x0008		/* Capture/Compare 3 interrupt enable */
+  #define TIM_DIER_CC4IE     0x0010		/* Capture/Compare 4 interrupt enable */
+  #define TIM_DIER_COMIE     0x0020		/* COM interrupt enable */
+  #define TIM_DIER_TIE       0x0040		/* Trigger interrupt enable */
+  #define TIM_DIER_BIE       0x0080		/* Break interrupt enable */
+  #define TIM_DIER_UDE       0x0100		/* Update DMA request enable */
+  #define TIM_DIER_CC1DE     0x0200		/* Capture/Compare 1 DMA request enable */
+  #define TIM_DIER_CC2DE     0x0400		/* Capture/Compare 2 DMA request enable */
+  #define TIM_DIER_CC3DE     0x0800		/* Capture/Compare 3 DMA request enable */
+  #define TIM_DIER_CC4DE     0x1000		/* Capture/Compare 4 DMA request enable */
+  #define TIM_DIER_COMDE     0x2000		/* COM DMA request enable */
+  #define TIM_DIER_TDE       0x4000		/* Trigger DMA request enable */
+#define TOFF_TIM_SR         0x0010		/* (RW-16) TIM status register */
+  #define TIM_SR_UIF         0x0001		/* Update interrupt Flag */
+  #define TIM_SR_CC1IF       0x0002		/* Capture/Compare 1 interrupt Flag */
+  #define TIM_SR_CC2IF       0x0004		/* Capture/Compare 2 interrupt Flag */
+  #define TIM_SR_CC3IF       0x0008		/* Capture/Compare 3 interrupt Flag */
+  #define TIM_SR_CC4IF       0x0010		/* Capture/Compare 4 interrupt Flag */
+  #define TIM_SR_COMIF       0x0020		/* COM interrupt Flag */
+  #define TIM_SR_TIF         0x0040		/* Trigger interrupt Flag */
+  #define TIM_SR_BIF         0x0080		/* Break interrupt Flag */
+  #define TIM_SR_CC1OF       0x0200		/* Capture/Compare 1 Overcapture Flag */
+  #define TIM_SR_CC2OF       0x0400		/* Capture/Compare 2 Overcapture Flag */
+  #define TIM_SR_CC3OF       0x0800		/* Capture/Compare 3 Overcapture Flag */
+  #define TIM_SR_CC4OF       0x1000		/* Capture/Compare 4 Overcapture Flag */
+#define TOFF_TIM_EGR        0x0014		/* (RW-16) TIM event generation register */
+#define TOFF_TIM_CCMR1      0x0018		/* (RW-16) TIM capture/compare mode register 1 */
+#define TOFF_TIM_CCMR2      0x001C		/* (RW-16) TIM capture/compare mode register 2 */
+#define TOFF_TIM_CCER       0x0020		/* (RW-16) TIM capture/compare enable register */
+#define TOFF_TIM_CNT        0x0024		/* (RW)    TIM counter register */
+#define TOFF_TIM_PSC        0x0028		/* (RW-16) TIM prescaler */
+#define TOFF_TIM_ARR        0x002C		/* (RW)    TIM auto-reload register */
+#define TOFF_TIM_RCR        0x0030		/* (RW-16) TIM repetition counter register */
+#define TOFF_TIM_CCR1       0x0034		/* (RW)    TIM capture/compare register 1 */
+#define TOFF_TIM_CCR2       0x0038		/* (RW)    TIM capture/compare register 2 */
+#define TOFF_TIM_CCR3       0x003C		/* (RW)    TIM capture/compare register 3 */
+#define TOFF_TIM_CCR4       0x0040		/* (RW)    TIM capture/compare register 4 */
+#define TOFF_TIM_BDTR       0x0044		/* (RW-16) TIM break and dead-time register */
+#define TOFF_TIM_DCR        0x0048		/* (RW-16) TIM DMA control register */
+#define TOFF_TIM_DMAR       0x004C		/* (RW-16) TIM DMA address for full transfer */
+#define TOFF_TIM_OR         0x0050		/* (RW-16) TIM option register */
+
+/*
+ *  REAL-TIME CLOCK
+ */
+#define TADR_RTC_BASE       (APB1PERIPH_BASE + 0x2800)
+#define TOFF_RTC_TR         0x0000		/* (RW) RTC time register */
+#define TOFF_RTC_DR         0x0004		/* (RW) RTC date register */
+#define TOFF_RTC_CR         0x0008		/* (RW) RTC control register */
+#define TOFF_RTC_ISR        0x000C		/* (RW) RTC initialization and status register */
+#define TOFF_RTC_PRER       0x0010		/* (RW) RTC prescaler register */
+#define TOFF_RTC_WUTR       0x0014		/* (RW) RTC wakeup timer register */
+#define TOFF_RTC_CALIBR     0x0018		/* (RW) RTC calibration register */
+#define TOFF_RTC_ALRMAR     0x001C		/* (RW) RTC alarm A register */
+#define TOFF_RTC_ALRMBR     0x0020		/* (RW) RTC alarm B register */
+#define TOFF_RTC_WPR        0x0024		/* (RW) RTC write protection register */
+#define TOFF_RTC_SSR        0x0028		/* (RW) RTC sub second register */
+#define TOFF_RTC_SHIFTR     0x002C		/* (RW) RTC shift control register */
+#define TOFF_RTC_TSTR       0x0030		/* (RW) RTC time stamp time register */
+#define TOFF_RTC_TSDR       0x0034		/* (RW) RTC time stamp date register */
+#define TOFF_RTC_TSSSR      0x0038		/* (RW) RTC time-stamp sub second register */
+#define TOFF_RTC_CALR       0x003C		/* (RW) RTC calibration register */
+#define TOFF_RTC_TAFCR      0x0040		/* (RW) RTC tamper and alternate function configuration register */
+#define TOFF_RTC_ALRMASSR   0x0044		/* (RW) RTC alarm A sub second register */
+#define TOFF_RTC_ALRMBSSR   0x0048		/* (RW) RTC alarm B sub second register */
+#define TOFF_RTC_BKP0R      0x0050		/* (RW) RTC backup register 0 */
+#define TOFF_RTC_BKP1R      0x0054		/* (RW) RTC backup register 1 */
+#define TOFF_RTC_BKP2R      0x0058		/* (RW) RTC backup register 2 */
+#define TOFF_RTC_BKP3R      0x005C		/* (RW) RTC backup register 3 */
+#define TOFF_RTC_BKP4R      0x0060		/* (RW) RTC backup register 4 */
+#define TOFF_RTC_BKP5R      0x0064		/* (RW) RTC backup register 5 */
+#define TOFF_RTC_BKP6R      0x0068		/* (RW) RTC backup register 6 */
+#define TOFF_RTC_BKP7R      0x006C		/* (RW) RTC backup register 7 */
+#define TOFF_RTC_BKP8R      0x0070		/* (RW) RTC backup register 8 */
+#define TOFF_RTC_BKP9R      0x0074		/* (RW) RTC backup register 9 */
+#define TOFF_RTC_BKP10R     0x0078		/* (RW) RTC backup register 10 */
+#define TOFF_RTC_BKP11R     0x007C		/* (RW) RTC backup register 11 */
+#define TOFF_RTC_BKP12R     0x0080		/* (RW) RTC backup register 12 */
+#define TOFF_RTC_BKP13R     0x0084		/* (RW) RTC backup register 13 */
+#define TOFF_RTC_BKP14R     0x0088		/* (RW) RTC backup register 14 */
+#define TOFF_RTC_BKP15R     0x008C		/* (RW) RTC backup register 15 */
+#define TOFF_RTC_BKP16R     0x0090		/* (RW) RTC backup register 16 */
+#define TOFF_RTC_BKP17R     0x0094		/* (RW) RTC backup register 17 */
+#define TOFF_RTC_BKP18R     0x0098		/* (RW) RTC backup register 18 */
+#define TOFF_RTC_BKP19R     0x009C		/* (RW) RTC backup register 19 */
+
+/*
+ *  WINDOW WATCHDOG
+ */
+#define TADR_WWDG_BASE      (APB1PERIPH_BASE + 0x2C00)
+#define TOFF_WWDG_CR        0x0000		/* (RW) WWDG Control register */
+#define TOFF_WWDG_CFR       0x0004		/* (RW) WWDG Configuration register */
+#define TOFF_WWDG_SR        0x0008		/* (R)  WWDG Status register */
+
+/*
+ *  INDEPENDENT WATCHDOG
+ */
+#define TADR_IWDG_BASE      (APB1PERIPH_BASE + 0x3000)
+#define TOFF_IWDG_KR        0x0000		/* (RW) IWDG Key register */
+#define TOFF_IWDG_PR        0x0004		/* (RW) IWDG Prescaler register */
+#define TOFF_IWDG_RLR       0x0008		/* (RW) IWDG Reload register */
+#define TOFF_IWDG_SR        0x000C		/* (RW) IWDG Status register */
+
+/*
+ *  SERIAL PERIPHERAL IINTERFACE
+ */
+#define TADR_I2S2EXTt_BASE  (APB1PERIPH_BASE + 0x3400)
+#define TADR_SPI2_BASE      (APB1PERIPH_BASE + 0x3800)
+#define TADR_SPI3_BASE      (APB1PERIPH_BASE + 0x3C00)
+#define TADR_I2S3EXT_BASE   (APB1PERIPH_BASE + 0x4000)
+#define TADR_SPI1_BASE      (APB2PERIPH_BASE + 0x3000)
+#define TOFF_SPI_CR1        0x0000		/* (RW-16) SPI control register 1 (not used in I2S mode) */
+#define TOFF_SPI_CR2        0x0004		/* (RW-16) SPI control register 2 */
+#define TOFF_SPI_SR         0x0008		/* (RW-16) SPI status register */
+#define TOFF_SPI_DR         0x000C		/* (RW-16) SPI data register */
+#define TOFF_SPI_CRCPR      0x0010		/* (RW-16) SPI CRC polynomial register (not used in I2S mode) */
+#define TOFF_SPI_RXCRCR     0x0014		/* (RW-16) SPI RX CRC register (not used in I2S mode) */
+#define TOFF_SPI_TXCRCR     0x0018		/* (RW-16) SPI TX CRC register (not used in I2S mode) */
+#define TOFF_SPI_I2SCFGR    0x001C		/* (RW-16) SPI_I2S configuration register */
+#define TOFF_SPI_I2SPR      0x0020		/* (RW-16) SPI_I2S prescaler register */
+
+/*
+ *  UNIVERSAL SYNCHRONOUS ASYNCHORONOUS RECEIVER TRANSMITTER
+ */
+#define TADR_USART2_BASE    (APB1PERIPH_BASE + 0x4400)
+#define TADR_USART3_BASE    (APB1PERIPH_BASE + 0x4800)
+#define TADR_UART4_BASE     (APB1PERIPH_BASE + 0x4C00)
+#define TADR_UART5_BASE     (APB1PERIPH_BASE + 0x5000)
+#define TADR_USART1_BASE    (APB2PERIPH_BASE + 0x1000)
+#define TADR_USART6_BASE    (APB2PERIPH_BASE + 0x1400)
+#define TOFF_USART_SR       0x0000		/* (RW-16) USART Status register */
+  #define USART_SR_PE        0x0001		/* Parity Error */
+  #define USART_SR_FE        0x0002		/* Framing Error */
+  #define USART_SR_NE        0x0004		/* Noise Error Flag */
+  #define USART_SR_ORE       0x0008		/* OverRun Error */
+  #define USART_SR_IDLE      0x0010		/* IDLE line detected */
+  #define USART_SR_RXNE      0x0020		/* Read Data Register Not Empty */
+  #define USART_SR_TC        0x0040		/* Transmission Complete */
+  #define USART_SR_TXE       0x0080		/* Transmit Data Register Empty */
+  #define USART_SR_LBD       0x0100		/* LIN Break Detection Flag */
+  #define USART_SR_CTS       0x0200		/* CTS Flag */
+#define TOFF_USART_DR       0x0004		/* (RW-16) USART Data register */
+#define TOFF_USART_BRR      0x0008		/* (RW-16) USART Baud rate register */
+#define TOFF_USART_CR1      0x000C		/* (RW-16) USART Control register 1 */
+  #define USART_CR1_SBK      0x0001		/* Send Break */
+  #define USART_CR1_RWU      0x0002		/* Receiver wakeup */
+  #define USART_CR1_RE       0x0004		/* Receiver Enable */
+  #define USART_CR1_TE       0x0008		/* Transmitter Enable */
+  #define USART_CR1_IDLEIE   0x0010		/* IDLE Interrupt Enable */
+  #define USART_CR1_RXNEIE   0x0020		/* RXNE Interrupt Enable */
+  #define USART_CR1_TCIE     0x0040		/* Transmission Complete Interrupt Enable */
+  #define USART_CR1_TXEIE    0x0080		/* PE Interrupt Enable */
+  #define USART_CR1_PEIE     0x0100		/* PE Interrupt Enable */
+  #define USART_CR1_PS       0x0200		/* Parity Selection */
+  #define USART_CR1_PCE      0x0400		/* Parity Control Enable */
+  #define USART_CR1_WAKE     0x0800		/* Wakeup method */
+  #define USART_CR1_M        0x1000		/* Word length */
+  #define USART_CR1_UE       0x2000		/* USART Enable */
+  #define USART_CR1_OVER8    0x8000		/* USART Oversampling by 8 enable */
+#define TOFF_USART_CR2      0x0010		/* (RW-16) USART Control register 2 */
+  #define USART_CR2_ADD      0x000F		/* Address of the USART node */
+  #define USART_CR2_LBDL     0x0020		/* LIN Break Detection Length */
+  #define USART_CR2_LBDIE    0x0040		/* LIN Break Detection Interrupt Enable */
+  #define USART_CR2_LBCL     0x0100		/* Last Bit Clock pulse */
+  #define USART_CR2_CPHA     0x0200		/* Clock Phase */
+  #define USART_CR2_CPOL     0x0400		/* Clock Polarity */
+  #define USART_CR2_CLKEN    0x0800		/* Clock Enable */
+  #define USART_CR2_STOP     0x3000		/* STOP[1:0] bits (STOP bits) */
+  #define USART_CR2_STOP_0   0x1000		/* Bit 0 */
+  #define USART_CR2_STOP_1   0x2000		/* Bit 1 */
+  #define USART_CR2_LINEN    0x4000		/* LIN mode enable */
+#define TOFF_USART_CR3      0x0014		/* (RW-16) USART Control register 3 */
+  #define USART_CR3_EIE      0x0001		/* Error Interrupt Enable */
+  #define USART_CR3_IREN     0x0002		/* IrDA mode Enable */
+  #define USART_CR3_IRLP     0x0004		/* IrDA Low-Power */
+  #define USART_CR3_HDSEL    0x0008		/* Half-Duplex Selection */
+  #define USART_CR3_NACK     0x0010		/* Smartcard NACK enable */
+  #define USART_CR3_SCEN     0x0020		/* Smartcard mode enable */
+  #define USART_CR3_DMAR     0x0040		/* DMA Enable Receiver */
+  #define USART_CR3_DMAT     0x0080		/* DMA Enable Transmitter */
+  #define USART_CR3_RTSE     0x0100		/* RTS Enable */
+  #define USART_CR3_CTSE     0x0200		/* CTS Enable */
+  #define USART_CR3_CTSIE    0x0400		/* CTS Interrupt Enable */
+  #define USART_CR3_ONEBIT   0x0800		/* USART One bit method enable */
+#define TOFF_USART_GTPR     0x0018		/* (RW-16) USART Guard time and prescaler register */
+  #define USART_GTPR_PSC     0x00FF		/* PSC[7:0] bits (Prescaler value) */
+  #define USART_GTPR_PSC_0   0x0001		/* Bit 0 */
+  #define USART_GTPR_PSC_1   0x0002		/* Bit 1 */
+  #define USART_GTPR_PSC_2   0x0004		/* Bit 2 */
+  #define USART_GTPR_PSC_3   0x0008		/* Bit 3 */
+  #define USART_GTPR_PSC_4   0x0010		/* Bit 4 */
+  #define USART_GTPR_PSC_5   0x0020		/* Bit 5 */
+  #define USART_GTPR_PSC_6   0x0040		/* Bit 6 */
+  #define USART_GTPR_PSC_7   0x0080		/* Bit 7 */
+  #define USART_GTPR_GT      0xFF00		/* Guard time value */
+
+/*
+ *  INTER-INTERATED CIRCUIT IINTERFACE(16)
+ */
+#define TADR_I2C1_BASE      (APB1PERIPH_BASE + 0x5400)
+#define TADR_I2C2_BASE      (APB1PERIPH_BASE + 0x5800)
+#define TADR_I2C3_BASE      (APB1PERIPH_BASE + 0x5C00)
+#define TOFF_I2C_CR1        0x0000		/* (RW-16) I2C Control register 1 */
+#define TOFF_I2C_CR2        0x0004		/* (RW-16) I2C Control register 2 */
+#define TOFF_I2C_OAR1       0x0008		/* (RW-16) I2C Own address register 1 */
+#define TOFF_I2C_OAR2       0x000C		/* (RW-16) I2C Own address register 2 */
+#define TOFF_I2C_DR         0x0010		/* (RW-16) I2C Data register */
+#define TOFF_I2C_SR1        0x0014		/* (R-16)  I2C Status register 1 */
+#define TOFF_I2C_SR2        0x0018		/* (R-16)  I2C Status register 2 */
+#define TOFF_I2C_CCR        0x001C		/* (RW-16) I2C Clock control register */
+#define TOFF_I2C_TRISE      0x0020		/* (RW-16) I2C TRISE register */
+
+/*
+ *  CONTROLLER AREA NETWORK
+ */
+#define TADR_CAN1_BASE      (APB1PERIPH_BASE + 0x6400)
+#define TADR_CAN2_BASE      (APB1PERIPH_BASE + 0x6800)
+#define TOFF_CAN_MCR        0x0000		/* (RW) CAN master control register */
+#define TOFF_CAN_MSR        0x0004		/* (R)  CAN master status register */
+#define TOFF_CAN_TSR        0x0008		/* (R)  CAN transmit status register */
+#define TOFF_CAN_RF0R       0x000C		/* (RW) CAN receive FIFO 0 register */
+#define TOFF_CAN_RF1R       0x0010		/* (RW) CAN receive FIFO 1 register */
+#define TOFF_CAN_IER        0x0014		/* (RW) CAN interrupt enable register */
+#define TOFF_CAN_ESR        0x0018		/* (RW) CAN error status register */
+#define TOFF_CAN_BTR        0x001C		/* (RW) CAN bit timing register */
+										/* CAN TX MailBox */
+#define TOFF_CAN_TIR1       0x0180		/* (RW) CAN(1) TX mailbox identifier register */
+#define TOFF_CAN_TDTR1      0x0184		/* (RW) CAN(1) mailbox data length control and time stamp register */
+#define TOFF_CAN_TDLR1      0x0188		/* (RW) CAN(1) mailbox data low register */
+#define TOFF_CAN_TDHR1      0x018C		/* (RW) CAN(1) mailbox data high register */
+#define TOFF_CAN_TIR2       0x0190		/* (RW) CAN(2) TX mailbox identifier register */
+#define TOFF_CAN_TDTR2      0x0194		/* (RW) CAN(2) mailbox data length control and time stamp register */
+#define TOFF_CAN_TDLR2      0x0198		/* (RW) CAN(2) mailbox data low register */
+#define TOFF_CAN_TDHR2      0x019C		/* (RW) CAN(2) mailbox data high register */
+#define TOFF_CAN_TIR3       0x01A0		/* (RW) CAN(3) TX mailbox identifier register */
+#define TOFF_CAN_TDTR3      0x01A4		/* (RW) CAN(3) mailbox data length control and time stamp register */
+#define TOFF_CAN_TDLR3      0x01A8		/* (RW) CAN(3) mailbox data low register */
+#define TOFF_CAN_TDHR3      0x01AC		/* (RW) CAN(3) mailbox data high register */
+										/* CAN FIFO MailBox */
+#define TOFF_CAN_RIR1       0x01B0		/* (RW) CAN(1) receive FIFO mailbox identifier register */
+#define TOFF_CAN_RDTR1      0x01B4		/* (RW) CAN(1) receive FIFO mailbox data length control and time stamp register */
+#define TOFF_CAN_RDLR1      0x01B8		/* (RW) CAN(1) receive FIFO mailbox data low register */
+#define TOFF_CAN_RDHR1      0x01BC		/* (RW) CAN(1) receive FIFO mailbox data high register */
+#define TOFF_CAN_RIR2       0x01C0		/* (RW) CAN(2) receive FIFO mailbox identifier register */
+#define TOFF_CAN_RDTR2      0x01C4		/* (RW) CAN(2) receive FIFO mailbox data length control and time stamp register */
+#define TOFF_CAN_RDLR2      0x01C8		/* (RW) CAN(2) receive FIFO mailbox data low register */
+#define TOFF_CAN_RDHR2      0x01CC		/* (RW) CAN(2) receive FIFO mailbox data high register */
+#define TOFF_CAN_FMR        0x0200		/* (RW) CAN filter master register */
+#define TOFF_CAN_FM1R       0x0204		/* (RW) CAN filter mode register */
+#define TOFF_CAN_FS1R       0x020C		/* (RW) CAN filter scale register */
+#define TOFF_CAN_FFA1R      0x0214		/* (RW) CAN filter FIFO assignment register */
+#define TOFF_CAN_FA1R       0x0218		/* (RW) CAN filter activation register */
+#define TOFF_CAN_FR_BASE    0x0240
+#define TOFF_CAN_FR1        0x0240		/* (RW) CAN Filter bank register 1 */
+#define TOFF_CAN_FR2        0x0244		/* (RW) CAN Filter bank register 1 */
+
+/*
+ *  POWER CONTROL
+ */
+#define TADR_PWR_BASE       (APB1PERIPH_BASE + 0x7000)
+#define TOFF_PWR_CR         0x0000		/* (RW) PWR power control register */
+  #define PWR_CR_LPDS              0x00000001	/* Low-Power Deepsleep */
+  #define PWR_CR_PDDS              0x00000002	/* Power Down Deepsleep */
+  #define PWR_CR_CWUF              0x00000004	/* Clear Wakeup Flag */
+  #define PWR_CR_CSBF              0x00000008	/* Clear Standby Flag */
+  #define PWR_CR_PVDE              0x00000010	/* Power Voltage Detector Enable */
+  #define PWR_CR_PLS_0             0x00000020	/* Bit 0 */
+  #define PWR_CR_PLS_1             0x00000040	/* Bit 1 */
+  #define PWR_CR_PLS_2             0x00000080	/* Bit 2 */
+  #define PWR_CR_DBP               0x00000100	/* Disable Backup Domain write protection */
+  #define PWR_CR_FPDS              0x00000200	/* Flash power down in Stop mode */
+  #define PWR_CR_VOS               0x00004000	/* Regulator voltage scaling output selection */
+  #define PWR_CR_ODEN              0x00010000	/*  Over Drive enable */
+  #define PWR_CR_ODSWEN            0x00020000	/* Over Drive switch enabled */
+  #define PWR_CR_UDEN_0            0x00040000	/* Under Drive enable in stop mode Bit 0 */
+  #define PWR_CR_UDEN_1            0x00080000	/* Under Drive enable in stop mode Bit 1 */
+  /* Legacy define */
+  #define PWR_CR_PMODE             PWR_CR_VOS
+#define TOFF_PWR_CSR        0x0004		/* (RW) PWR power control/status register */
+  #define PWR_CSR_WUF              0x00000001	/* Wakeup Flag */
+  #define PWR_CSR_SBF              0x00000002	/* Standby Flag */
+  #define PWR_CSR_PVDO             0x00000004	/* PVD Output */
+  #define PWR_CSR_BRR              0x00000008	/* Backup regulator ready */
+  #define PWR_CSR_EWUP             0x00000100	/* Enable WKUP pin */
+  #define PWR_CSR_BRE              0x00000200	/* Backup regulator enable */
+  #define PWR_CSR_VOSRDY           0x00004000	/* Regulator voltage scaling output selection ready */
+  #define PWR_CSR_ODRDY            0x00010000	/* Over Drive generator ready */
+  #define PWR_CSR_ODSWRDY          0x00020000	/* Over Drive Switch ready */
+  #define PWR_CSR_UDSWRDY          0x000C0000	/* Under Drive ready */
+  /* Legacy define */
+  #define PWR_CSR_REGRDY           PWR_CSR_VOSRDY
+
+/*
+ *  DIGITAL TO ANALOG CONVTER
+ */
+#define TADR_DAC_BASE       (APB1PERIPH_BASE + 0x7400)
+#define TOFF_DAC_CR         0x0000		/* (RW) DAC control register */
+#define TOFF_DAC_SWTRIGR	0x0004		/* (RW) DAC software trigger register */
+#define TOFF_DAC_DHR12R1    0x0008		/* (RW) DAC channel1 12-bit right-aligned data holding register */
+#define TOFF_DAC_DHR12L1    0x000C		/* (RW) DAC channel1 12-bit left aligned data holding register */
+#define TOFF_DAC_DHR8R1     0x0010		/* (RW) DAC channel1 8-bit right aligned data holding register */
+#define TOFF_DAC_DHR12R2    0x0014		/* (RW) DAC channel2 12-bit right aligned data holding register */
+#define TOFF_DAC_DHR12L2    0x0018		/* (RW) DAC channel2 12-bit left aligned data holding register */
+#define TOFF_DAC_DHR8R2     0x001C		/* (RW) DAC channel2 8-bit right-aligned data holding register */
+#define TOFF_DAC_DHR12RD    0x0020		/* (RW) Dual DAC 12-bit right-aligned data holding register */
+#define TOFF_DAC_DHR12LD    0x0024		/* (RW) DUAL DAC 12-bit left aligned data holding register */
+#define TOFF_DAC_DHR8RD     0x0028		/* (RW) DUAL DAC 8-bit right aligned data holding register */
+#define TOFF_DAC_DOR1       0x002C		/* (RW) DAC channel1 data output register */
+#define TOFF_DAC_DOR2       0x0030		/* (RW) DAC channel2 data output register */
+#define TOFF_DAC_SR         0x0034		/* (RW) DAC status register */
+
+
+/*
+ *  ANALOG TO DIGITAL CONVERTER
+ */
+#define TADR_ADC1_BASE      (APB2PERIPH_BASE + 0x2000)
+#define TADR_ADC2_BASE      (APB2PERIPH_BASE + 0x2100)
+#define TADR_ADC3_BASE      (APB2PERIPH_BASE + 0x2200)
+#define TOFF_ADC_SR         0x0000		/* (RW) ADC status register */
+#define TOFF_ADC_CR1        0x0004		/* (RW) ADC control register 1 */
+#define TOFF_ADC_CR2        0x0008		/* (RW) ADC control register 2 */
+#define TOFF_ADC_SMPR1      0x000C		/* (RW) ADC sample time register 1 */
+#define TOFF_ADC_SMPR2      0x0010		/* (RW) ADC sample time register 2 */
+#define TOFF_ADC_JOFR1      0x0014		/* (RW) ADC injected channel data offset register 1 */
+#define TOFF_ADC_JOFR2      0x0018		/* (RW) ADC injected channel data offset register 2 */
+#define TOFF_ADC_JOFR3      0x001C		/* (RW) ADC injected channel data offset register 3 */
+#define TOFF_ADC_JOFR4      0x0020		/* (RW) ADC injected channel data offset register 4 */
+#define TOFF_ADC_HTR        0x0024		/* (RW) ADC watchdog higher threshold register */
+#define TOFF_ADC_LTR        0x0028		/* (RW) ADC watchdog lower threshold register */
+#define TOFF_ADC_SQR1       0x002C		/* (RW) ADC regular sequence register 1 */
+#define TOFF_ADC_SQR2       0x0030		/* (RW) ADC regular sequence register 2 */
+#define TOFF_ADC_SQR3       0x0034		/* (RW) ADC regular sequence register 3 */
+#define TOFF_ADC_JSQR       0x0038		/* (RW) ADC injected sequence register */
+#define TOFF_ADC_JDR1       0x003C		/* (RW) ADC injected data register 1 */
+#define TOFF_ADC_JDR2       0x0040		/* (RW) ADC injected data register 2 */
+#define TOFF_ADC_JDR3       0x0044		/* (RW) ADC injected data register 3 */
+#define TOFF_ADC_JDR4       0x0048		/* (RW) ADC injected data register 4 */
+#define TOFF_ADC_DR         0x004C		/* (RW) ADC regular data register */
+
+#define TADR_ADC_BASE       (APB2PERIPH_BASE + 0x2300)
+#define TOFF_ADC_CSR        0x0000		/* (RW) ADC Common status register */
+#define TOFF_ADC_CCR        0x0004		/* (RW) ADC common control register */
+#define TOFF_ADC_CDR        0x0008		/* (RW) ADC common regular data register for dual AND triple modes */
+
+/*
+ *  SD HOST INTERFACE
+ */
+#define TADR_SDIO_BASE      (APB2PERIPH_BASE + 0x2C00)
+#define TOFF_SDIO_POWER     0x0000		/* (RW) SDIO power control register */
+#define TOFF_SDIO_CLKCR     0x0004		/* (RW) SDI clock control register */
+#define TOFF_SDIO_ARG       0x0008		/* (RW) SDIO argument register */
+#define TOFF_SDIO_CMD       0x000C		/* (RW) SDIO command register */
+#define TOFF_SDIO_RESPCMD   0x0018		/* (R)  SDIO command response register */
+#define TOFF_SDIO_RESP      0x0014		/* (R)  SDIO response 1 register */
+#define TOFF_SDIO_RESP2     0x0018		/* (R)  SDIO response 2 register */
+#define TOFF_SDIO_RESP3     0x001C		/* (R)  SDIO response 3 register */
+#define TOFF_SDIO_RESP4     0x0020		/* (R)  SDIO response 4 register */
+#define TOFF_SDIO_DTIMER    0x0024		/* (RW) SDIO data timer register */
+#define TOFF_SDIO_DLEN      0x0028		/* (RW) SDIO data length register */
+#define TOFF_SDIO_DCTRL     0x002C		/* (RW) SDIO data control register */
+#define TOFF_SDIO_DCOUNT    0x0030		/* (R)  SDIO data counter register */
+#define TOFF_SDIO_STA       0x0034		/* (R)  SDIO status register */
+#define TOFF_SDIO_ICR       0x0038		/* (RW) SDIO interrupt clear register */
+#define TOFF_SDIO_MASK      0x003C		/* (RW) SDIO mask register */
+#define TOFF_SDIO_FIFOCNT   0x0048		/* (R)  SDIO FIFO counter register */
+#define TOFF_SDIO_FIFO      0x0080		/* (RW) SDIO data FIFO register */
+
+/*
+ *  SYSTEM CONFIGURATION CONTROLLER
+ */
+#define TADR_SYSCFG_BASE    (APB2PERIPH_BASE + 0x3800)
+#define TOFF_SYSCFG_MEMRMP  0x0000		/* (RW) SYSCFG memory remap register */
+#define TOFF_SYSCFG_PMC     0x0004		/* (RW) SYSCFG peripheral mode configuration register */
+#define TOFF_SYSCFG_EXTICR0 0x0008		/* (RW) SYSCFG external interrupt configuration registers 0 */
+#define TOFF_SYSCFG_EXTICR1 0x000C		/* (RW) SYSCFG external interrupt configuration registers 1 */
+#define TOFF_SYSCFG_EXTICR2 0x0010		/* (RW) SYSCFG external interrupt configuration registers 2 */
+#define TOFF_SYSCFG_EXTICR3 0x0014		/* (RW) SYSCFG external interrupt configuration registers 3 */
+#define TOFF_SYSCFG_CMPCR   0x0020		/* (RW) SYSCFG Compensation cell control register */
+
+/*
+ *  EXTERNAL INTERRUPT/EVENT CONTROLLER
+ */
+#define TADR_EXTI_BASE      (APB2PERIPH_BASE + 0x3C00)
+#define TOFF_EXTI_IMR       0x0000		/* (RW) EXTI Interrupt mask register */
+#define TOFF_EXTI_EMR       0x0004		/* (RW) EXTI Event mask register */
+#define TOFF_EXTI_RTSR      0x0008		/* (RW) EXTI Rising trigger selection register */
+#define TOFF_EXTI_FTSR      0x000C		/* (RW) EXTI Falling trigger selection register */
+#define TOFF_EXTI_SWIER     0x0010		/* (RW) EXTI Software interrupt event register */
+#define TOFF_EXTI_PR        0x0014		/* (RW) EXTI Pending register */
+
+/*
+ *  GENERAL PURPOSE I/O
+ */
+#define TADR_GPIOA_BASE     (AHB1PERIPH_BASE + 0x0000)
+#define TADR_GPIOB_BASE     (AHB1PERIPH_BASE + 0x0400)
+#define TADR_GPIOC_BASE     (AHB1PERIPH_BASE + 0x0800)
+#define TADR_GPIOD_BASE     (AHB1PERIPH_BASE + 0x0C00)
+#define TADR_GPIOE_BASE     (AHB1PERIPH_BASE + 0x1000)
+#define TADR_GPIOF_BASE     (AHB1PERIPH_BASE + 0x1400)
+#define TADR_GPIOG_BASE     (AHB1PERIPH_BASE + 0x1800)
+#define TADR_GPIOH_BASE     (AHB1PERIPH_BASE + 0x1C00)
+#define TADR_GPIOI_BASE     (AHB1PERIPH_BASE + 0x2000)
+#define TOFF_GPIO_MODER     0x0000		/* (RW) GPIO port mode register */
+  #define GPIO_MODER_MODER0  0x1
+  #define GPIO_MODER_MODER1  0x2
+  #define GPIO_MODER_MODER2  0x3
+#define TOFF_GPIO_OTYPER    0x0004		/* (RW) GPIO port output type register */
+  #define GPIO_OTYPER_OT     0x1
+#define TOFF_GPIO_OSPEEDR   0x0008		/* (RW) GPIO port output speed register */
+  #define GPIO_OSPEEDER_OSPEEDR0 0x1
+  #define GPIO_OSPEEDER_OSPEEDR1 0x2
+  #define GPIO_OSPEEDER_OSPEEDR2 0x3
+#define TOFF_GPIO_PUPDR     0x000C		/* (RW) GPIO port pull-up/pull-down register */
+  #define GPIO_PUPDR_PUPDR0  0x1
+  #define GPIO_PUPDR_PUPDR1  0x2
+  #define GPIO_PUPDR_PUPDR2  0x3
+#define TOFF_GPIO_IDR       0x0010		/* (R)  GPIO port input data register */
+#define TOFF_GPIO_ODR       0x0014		/* (RW) GPIO port output data register */
+#define TOFF_GPIO_BSRRL     0x0018		/* (RW-16) GPIO port bit set/reset low register */
+#define TOFF_GPIO_BSRRH     0x001A		/* (RW-16) GPIO port bit set/reset high register */
+#define TOFF_GPIO_LCKR      0x001C		/* (RW) GPIO port configuration lock register */
+#define TOFF_GPIO_AFR0      0x0020		/* (RW) GPIO alternate function registers */
+#define TOFF_GPIO_AFR1      0x0024		/* (RW) GPIO alternate function registers */
+
+/*
+ *  CRC CALCULATION UNIT
+ */
+#define TADR_CRC_BASE       (AHB1PERIPH_BASE + 0x3000)
+#define TOFF_CRC_DR         0x0000		/* (RW) CRC Data register */
+#define TOFF_CRC_IDR        0x0004		/* (RW-8) CRC Independent data register */
+#define TOFF_CRC_CR         0x0008		/* (RW) CRC Control register */
+
+/*
+ *  RESET AND CLOCK CONTROL
+ */
+#define TADR_RCC_BASE       (AHB1PERIPH_BASE + 0x3800)
+#define TOFF_RCC_CR         0x0000		/* (RW) RCC clock control register */
+  #define RCC_CR_HSION             0x00000001
+  #define RCC_CR_HSIRDY            0x00000002
+  #define RCC_CR_HSITRIM_0         0x00000008	/* Bit 0 */
+  #define RCC_CR_HSITRIM_1         0x00000010	/* Bit 1 */
+  #define RCC_CR_HSITRIM_2         0x00000020	/* Bit 2 */
+  #define RCC_CR_HSITRIM_3         0x00000040	/* Bit 3 */
+  #define RCC_CR_HSITRIM_4         0x00000080	/* Bit 4 */
+  #define RCC_CR_HSICAL_0          0x00000100	/* Bit 0 */
+  #define RCC_CR_HSICAL_1          0x00000200	/* Bit 1 */
+  #define RCC_CR_HSICAL_2          0x00000400	/* Bit 2 */
+  #define RCC_CR_HSICAL_3          0x00000800	/* Bit 3 */
+  #define RCC_CR_HSICAL_4          0x00001000	/* Bit 4 */
+  #define RCC_CR_HSICAL_5          0x00002000	/* Bit 5 */
+  #define RCC_CR_HSICAL_6          0x00004000	/* Bit 6 */
+  #define RCC_CR_HSICAL_7          0x00008000	/* Bit 7 */
+  #define RCC_CR_HSEON             0x00010000
+  #define RCC_CR_HSERDY            0x00020000
+  #define RCC_CR_HSEBYP            0x00040000
+  #define RCC_CR_CSSON             0x00080000
+  #define RCC_CR_PLLON             0x01000000
+  #define RCC_CR_PLLRDY            0x02000000
+  #define RCC_CR_PLLI2SON          0x04000000
+  #define RCC_CR_PLLI2SRDY         0x08000000
+#define TOFF_RCC_PLLCFGR    0x0004		/* (RW) RCC PLL configuration register */
+  #define  RCC_PLLCFGR_PLLM_0      0x00000001
+  #define  RCC_PLLCFGR_PLLM_1      0x00000002
+  #define  RCC_PLLCFGR_PLLM_2      0x00000004
+  #define  RCC_PLLCFGR_PLLM_3      0x00000008
+  #define  RCC_PLLCFGR_PLLM_4      0x00000010
+  #define  RCC_PLLCFGR_PLLM_5      0x00000020
+  #define  RCC_PLLCFGR_PLLN_0      0x00000040
+  #define  RCC_PLLCFGR_PLLN_1      0x00000080
+  #define  RCC_PLLCFGR_PLLN_2      0x00000100
+  #define  RCC_PLLCFGR_PLLN_3      0x00000200
+  #define  RCC_PLLCFGR_PLLN_4      0x00000400
+  #define  RCC_PLLCFGR_PLLN_5      0x00000800
+  #define  RCC_PLLCFGR_PLLN_6      0x00001000
+  #define  RCC_PLLCFGR_PLLN_7      0x00002000
+  #define  RCC_PLLCFGR_PLLN_8      0x00004000
+  #define  RCC_PLLCFGR_PLLP_0      0x00010000
+  #define  RCC_PLLCFGR_PLLP_1      0x00020000
+  #define  RCC_PLLCFGR_PLLSRC_HSE  0x00400000
+  #define  RCC_PLLCFGR_PLLSRC_HSI  0x00000000
+  #define  RCC_PLLCFGR_PLLQ_0      0x01000000
+  #define  RCC_PLLCFGR_PLLQ_1      0x02000000
+  #define  RCC_PLLCFGR_PLLQ_2      0x04000000
+  #define  RCC_PLLCFGR_PLLQ_3      0x08000000
+#define TOFF_RCC_CFGR       0x0008		/* (RW) RCC clock configuration register */
+  #define RCC_CFGR_SW_0            0x00000001	/* Bit 0 */
+  #define RCC_CFGR_SW_1            0x00000002	/* Bit 1 */
+  #define RCC_CFGR_SW_HSI          0x00000000	/* HSI selected as system clock */
+  #define RCC_CFGR_SW_HSE          0x00000001	/* HSE selected as system clock */
+  #define RCC_CFGR_SW_PLL          0x00000002	/* PLL selected as system clock */
+  #define RCC_CFGR_SWS_0           0x00000004	/* Bit 0 */
+  #define RCC_CFGR_SWS_1           0x00000008	/* Bit 1 */
+  #define RCC_CFGR_SWS_HSI         0x00000000	/* HSI oscillator used as system clock */
+  #define RCC_CFGR_SWS_HSE         0x00000004	/* HSE oscillator used as system clock */
+  #define RCC_CFGR_SWS_PLL         0x00000008	/* PLL used as system clock */
+  #define RCC_CFGR_HPRE_0          0x00000010	/* Bit 0 */
+  #define RCC_CFGR_HPRE_1          0x00000020	/* Bit 1 */
+  #define RCC_CFGR_HPRE_2          0x00000040	/* Bit 2 */
+  #define RCC_CFGR_HPRE_3          0x00000080	/* Bit 3 */
+  #define RCC_CFGR_HPRE_DIV1       0x00000000	/* SYSCLK not divided */
+  #define RCC_CFGR_HPRE_DIV2       0x00000080	/* SYSCLK divided by 2 */
+  #define RCC_CFGR_HPRE_DIV4       0x00000090	/* SYSCLK divided by 4 */
+  #define RCC_CFGR_HPRE_DIV8       0x000000A0	/* SYSCLK divided by 8 */
+  #define RCC_CFGR_HPRE_DIV16      0x000000B0	/* SYSCLK divided by 16 */
+  #define RCC_CFGR_HPRE_DIV64      0x000000C0	/* SYSCLK divided by 64 */
+  #define RCC_CFGR_HPRE_DIV128     0x000000D0	/* SYSCLK divided by 128 */
+  #define RCC_CFGR_HPRE_DIV256     0x000000E0	/* SYSCLK divided by 256 */
+  #define RCC_CFGR_HPRE_DIV512     0x000000F0	/* SYSCLK divided by 512 */
+  #define RCC_CFGR_PPRE1_0         0x00000400	/* Bit 0 */
+  #define RCC_CFGR_PPRE1_1         0x00000800	/* Bit 1 */
+  #define RCC_CFGR_PPRE1_2         0x00001000	/* Bit 2 */
+  #define RCC_CFGR_PPRE1_DIV1      0x00000000	/* HCLK not divided */
+  #define RCC_CFGR_PPRE1_DIV2      0x00001000	/* HCLK divided by 2 */
+  #define RCC_CFGR_PPRE1_DIV4      0x00001400	/* HCLK divided by 4 */
+  #define RCC_CFGR_PPRE1_DIV8      0x00001800	/* HCLK divided by 8 */
+  #define RCC_CFGR_PPRE1_DIV16     0x00001C00	/* HCLK divided by 16 */
+  #define RCC_CFGR_PPRE2_0         0x00002000	/* Bit 0 */
+  #define RCC_CFGR_PPRE2_1         0x00004000	/* Bit 1 */
+  #define RCC_CFGR_PPRE2_2         0x00008000	/* Bit 2 */
+  #define RCC_CFGR_PPRE2_DIV1      0x00000000	/* HCLK not divided */
+  #define RCC_CFGR_PPRE2_DIV2      0x00008000	/* HCLK divided by 2 */
+  #define RCC_CFGR_PPRE2_DIV4      0x0000A000	/* HCLK divided by 4 */
+  #define RCC_CFGR_PPRE2_DIV8      0x0000C000	/* HCLK divided by 8 */
+  #define RCC_CFGR_PPRE2_DIV16     0x0000E000	/* HCLK divided by 16 */
+  #define RCC_CFGR_RTCPRE_0        0x00010000
+  #define RCC_CFGR_RTCPRE_1        0x00020000
+  #define RCC_CFGR_RTCPRE_2        0x00040000
+  #define RCC_CFGR_RTCPRE_3        0x00080000
+  #define RCC_CFGR_RTCPRE_4        0x00100000
+  #define RCC_CFGR_MCO1_0          0x00200000
+  #define RCC_CFGR_MCO1_1          0x00400000
+  #define RCC_CFGR_I2SSRC          0x00800000
+  #define RCC_CFGR_MCO1PRE_0       0x01000000
+  #define RCC_CFGR_MCO1PRE_1       0x02000000
+  #define RCC_CFGR_MCO1PRE_2       0x04000000
+  #define RCC_CFGR_MCO2PRE_0       0x08000000
+  #define RCC_CFGR_MCO2PRE_1       0x10000000
+  #define RCC_CFGR_MCO2PRE_2       0x20000000
+  #define RCC_CFGR_MCO2_0          0x40000000
+  #define RCC_CFGR_MCO2_1          0x80000000
+#define TOFF_RCC_CIR        0x000C		/* (RW) RCC clock interrupt register */
+  #define RCC_CIR_LSIRDYF          0x00000001
+  #define RCC_CIR_LSERDYF          0x00000002
+  #define RCC_CIR_HSIRDYF          0x00000004
+  #define RCC_CIR_HSERDYF          0x00000008
+  #define RCC_CIR_PLLRDYF          0x00000010
+  #define RCC_CIR_PLLI2SRDYF       0x00000020
+  #define RCC_CIR_CSSF             0x00000080
+  #define RCC_CIR_LSIRDYIE         0x00000100
+  #define RCC_CIR_LSERDYIE         0x00000200
+  #define RCC_CIR_HSIRDYIE         0x00000400
+  #define RCC_CIR_HSERDYIE         0x00000800
+  #define RCC_CIR_PLLRDYIE         0x00001000
+  #define RCC_CIR_PLLI2SRDYIE      0x00002000
+  #define RCC_CIR_LSIRDYC          0x00010000
+  #define RCC_CIR_LSERDYC          0x00020000
+  #define RCC_CIR_HSIRDYC          0x00040000
+  #define RCC_CIR_HSERDYC          0x00080000
+  #define RCC_CIR_PLLRDYC          0x00100000
+  #define RCC_CIR_PLLI2SRDYC       0x00200000
+  #define RCC_CIR_CSSC             0x00800000
+#define TOFF_RCC_AHB1RSTR   0x0010		/* (RW) RCC AHB1 peripheral reset register */
+  #define RCC_AHB1RSTR_GPIOARST    0x00000001
+  #define RCC_AHB1RSTR_GPIOBRST    0x00000002
+  #define RCC_AHB1RSTR_GPIOCRST    0x00000004
+  #define RCC_AHB1RSTR_GPIODRST    0x00000008
+  #define RCC_AHB1RSTR_GPIOERST    0x00000010
+  #define RCC_AHB1RSTR_GPIOFRST    0x00000020
+  #define RCC_AHB1RSTR_GPIOGRST    0x00000040
+  #define RCC_AHB1RSTR_GPIOHRST    0x00000080
+  #define RCC_AHB1RSTR_GPIOIRST    0x00000100
+  #define RCC_AHB1RSTR_CRCRST      0x00001000
+  #define RCC_AHB1RSTR_DMA1RST     0x00200000
+  #define RCC_AHB1RSTR_DMA2RST     0x00400000
+  #define RCC_AHB1RSTR_ETHMACRST   0x02000000
+  #define RCC_AHB1RSTR_OTGHRST     0x10000000
+#define TOFF_RCC_AHB2RSTR   0x0014		/* (RW) RCC AHB2 peripheral reset register */
+  #define RCC_AHB2RSTR_DCMIRST     0x00000001
+  #define RCC_AHB2RSTR_CRYPRST     0x00000010
+  #define RCC_AHB2RSTR_HSAHRST     0x00000020
+  #define RCC_AHB2RSTR_RNGRST      0x00000040
+  #define RCC_AHB2RSTR_OTGFSRST    0x00000080
+#define TOFF_RCC_AHB3RSTR   0x0018		/* (RW) RCC AHB3 peripheral reset register */
+  #define RCC_AHB3RSTR_FSMCRST     0x00000001
+#define TOFF_RCC_APB1RSTR   0x0020		/* (RW) RCC APB1 peripheral reset register */
+  #define RCC_APB1RSTR_TIM2RST     0x00000001
+  #define RCC_APB1RSTR_TIM3RST     0x00000002
+  #define RCC_APB1RSTR_TIM4RST     0x00000004
+  #define RCC_APB1RSTR_TIM5RST     0x00000008
+  #define RCC_APB1RSTR_TIM6RST     0x00000010
+  #define RCC_APB1RSTR_TIM7RST     0x00000020
+  #define RCC_APB1RSTR_TIM12RST    0x00000040
+  #define RCC_APB1RSTR_TIM13RST    0x00000080
+  #define RCC_APB1RSTR_TIM14RST    0x00000100
+  #define RCC_APB1RSTR_WWDGEN      0x00000800
+  #define RCC_APB1RSTR_SPI2RST     0x00008000
+  #define RCC_APB1RSTR_SPI3RST     0x00010000
+  #define RCC_APB1RSTR_USART2RST   0x00020000
+  #define RCC_APB1RSTR_USART3RST   0x00040000
+  #define RCC_APB1RSTR_UART4RST    0x00080000
+  #define RCC_APB1RSTR_UART5RST    0x00100000
+  #define RCC_APB1RSTR_I2C1RST     0x00200000
+  #define RCC_APB1RSTR_I2C2RST     0x00400000
+  #define RCC_APB1RSTR_I2C3RST     0x00800000
+  #define RCC_APB1RSTR_CAN1RST     0x02000000
+  #define RCC_APB1RSTR_CAN2RST     0x04000000
+  #define RCC_APB1RSTR_PWRRST      0x10000000
+  #define RCC_APB1RSTR_DACRST      0x20000000
+#define TOFF_RCC_APB2RSTR   0x0024		/* (RW) RCC APB2 peripheral reset register */
+  #define RCC_APB2RSTR_TIM1RST     0x00000001
+  #define RCC_APB2RSTR_TIM8RST     0x00000002
+  #define RCC_APB2RSTR_USART1RST   0x00000010
+  #define RCC_APB2RSTR_USART6RST   0x00000020
+  #define RCC_APB2RSTR_ADCRST      0x00000100
+  #define RCC_APB2RSTR_SDIORST     0x00000800
+  #define RCC_APB2RSTR_SPI1RST     0x00001000
+  #define RCC_APB2RSTR_SYSCFGRST   0x00004000
+  #define RCC_APB2RSTR_TIM9RST     0x00010000
+  #define RCC_APB2RSTR_TIM10RST    0x00020000
+  #define RCC_APB2RSTR_TIM11RST    0x00040000
+  /* Old SPI1RST bit definition, maintained for legacy purpose */
+  #define RCC_APB2RSTR_SPI1        RCC_APB2RSTR_SPI1RST
+#define TOFF_RCC_AHB1ENR    0x0030		/* (RW) RCC AHB1 peripheral clock register */
+  #define RCC_AHB1ENR_GPIOAEN      0x00000001
+  #define RCC_AHB1ENR_GPIOBEN      0x00000002
+  #define RCC_AHB1ENR_GPIOCEN      0x00000004
+  #define RCC_AHB1ENR_GPIODEN      0x00000008
+  #define RCC_AHB1ENR_GPIOEEN      0x00000010
+  #define RCC_AHB1ENR_GPIOFEN      0x00000020
+  #define RCC_AHB1ENR_GPIOGEN      0x00000040
+  #define RCC_AHB1ENR_GPIOHEN      0x00000080
+  #define RCC_AHB1ENR_GPIOIEN      0x00000100
+  #define RCC_AHB1ENR_CRCEN        0x00001000
+  #define RCC_AHB1ENR_BKPSRAMEN    0x00040000
+  #define RCC_AHB1ENR_CCMDATARAMEN 0x00100000
+  #define RCC_AHB1ENR_DMA1EN       0x00200000
+  #define RCC_AHB1ENR_DMA2EN       0x00400000
+  #define RCC_AHB1ENR_ETHMACEN     0x02000000
+  #define RCC_AHB1ENR_ETHMACTXEN   0x04000000
+  #define RCC_AHB1ENR_ETHMACRXEN   0x08000000
+  #define RCC_AHB1ENR_ETHMACPTPEN  0x10000000
+  #define RCC_AHB1ENR_OTGHSEN      0x20000000
+  #define RCC_AHB1ENR_OTGHSULPIEN  0x40000000
+#define TOFF_RCC_AHB2ENR    0x0034		/* (RW) RCC AHB2 peripheral clock register */
+  #define RCC_AHB2ENR_DCMIEN       0x00000001
+  #define RCC_AHB2ENR_CRYPEN       0x00000010
+  #define RCC_AHB2ENR_HASHEN       0x00000020
+  #define RCC_AHB2ENR_RNGEN        0x00000040
+  #define RCC_AHB2ENR_OTGFSEN      0x00000080
+#define TOFF_RCC_AHB3ENR    0x0038		/* (RW) RCC AHB3 peripheral clock register */
+  #define RCC_AHB3ENR_FSMCEN       0x00000001
+#define TOFF_RCC_APB1ENR    0x0040		/* (RW) RCC APB1 peripheral clock enable register */
+  #define RCC_APB1ENR_TIM2EN       0x00000001
+  #define RCC_APB1ENR_TIM3EN       0x00000002
+  #define RCC_APB1ENR_TIM4EN       0x00000004
+  #define RCC_APB1ENR_TIM5EN       0x00000008
+  #define RCC_APB1ENR_TIM6EN       0x00000010
+  #define RCC_APB1ENR_TIM7EN       0x00000020
+  #define RCC_APB1ENR_TIM12EN      0x00000040
+  #define RCC_APB1ENR_TIM13EN      0x00000080
+  #define RCC_APB1ENR_TIM14EN      0x00000100
+  #define RCC_APB1ENR_WWDGEN       0x00000800
+  #define RCC_APB1ENR_SPI2EN       0x00004000
+  #define RCC_APB1ENR_SPI3EN       0x00008000
+  #define RCC_APB1ENR_USART2EN     0x00020000
+  #define RCC_APB1ENR_USART3EN     0x00040000
+  #define RCC_APB1ENR_UART4EN      0x00080000
+  #define RCC_APB1ENR_UART5EN      0x00100000
+  #define RCC_APB1ENR_I2C1EN       0x00200000
+  #define RCC_APB1ENR_I2C2EN       0x00400000
+  #define RCC_APB1ENR_I2C3EN       0x00800000
+  #define RCC_APB1ENR_CAN1EN       0x02000000
+  #define RCC_APB1ENR_CAN2EN       0x04000000
+  #define RCC_APB1ENR_PWREN        0x10000000
+  #define RCC_APB1ENR_DACEN        0x20000000
+#define TOFF_RCC_APB2ENR    0x0044		/* (RW) RCC APB2 peripheral clock enable register */
+  #define RCC_APB2ENR_TIM1EN       0x00000001
+  #define RCC_APB2ENR_TIM8EN       0x00000002
+  #define RCC_APB2ENR_USART1EN     0x00000010
+  #define RCC_APB2ENR_USART6EN     0x00000020
+  #define RCC_APB2ENR_ADC1EN       0x00000100
+  #define RCC_APB2ENR_ADC2EN       0x00000200
+  #define RCC_APB2ENR_ADC3EN       0x00000400
+  #define RCC_APB2ENR_SDIOEN       0x00000800
+  #define RCC_APB2ENR_SPI1EN       0x00001000
+  #define RCC_APB2ENR_SYSCFGEN     0x00004000
+  #define RCC_APB2ENR_TIM11EN      0x00040000
+  #define RCC_APB2ENR_TIM10EN      0x00020000
+  #define RCC_APB2ENR_TIM9EN       0x00010000
+#define TOFF_RCC_AHB1LPENR  0x0050		/* (RW) RCC AHB1 peripheral clock enable in low power mode register */
+  #define RCC_AHB1LPENR_GPIOALPEN     0x00000001
+  #define RCC_AHB1LPENR_GPIOBLPEN     0x00000002
+  #define RCC_AHB1LPENR_GPIOCLPEN     0x00000004
+  #define RCC_AHB1LPENR_GPIODLPEN     0x00000008
+  #define RCC_AHB1LPENR_GPIOELPEN     0x00000010
+  #define RCC_AHB1LPENR_GPIOFLPEN     0x00000020
+  #define RCC_AHB1LPENR_GPIOGLPEN     0x00000040
+  #define RCC_AHB1LPENR_GPIOHLPEN     0x00000080
+  #define RCC_AHB1LPENR_GPIOILPEN     0x00000100
+  #define RCC_AHB1LPENR_CRCLPEN       0x00001000
+  #define RCC_AHB1LPENR_FLITFLPEN     0x00008000
+  #define RCC_AHB1LPENR_SRAM1LPEN     0x00010000
+  #define RCC_AHB1LPENR_SRAM2LPEN     0x00020000
+  #define RCC_AHB1LPENR_BKPSRAMLPEN   0x00040000
+  #define RCC_AHB1LPENR_DMA1LPEN      0x00200000
+  #define RCC_AHB1LPENR_DMA2LPEN      0x00400000
+  #define RCC_AHB1LPENR_ETHMACLPEN    0x02000000
+  #define RCC_AHB1LPENR_ETHMACTXLPEN  0x04000000
+  #define RCC_AHB1LPENR_ETHMACRXLPEN  0x08000000
+  #define RCC_AHB1LPENR_ETHMACPTPLPEN 0x10000000
+  #define RCC_AHB1LPENR_OTGHSLPEN     0x20000000
+  #define RCC_AHB1LPENR_OTGHSULPILPEN 0x40000000
+#define TOFF_RCC_AHB2LPENR  0x0054		/* (RW) RCC AHB2 peripheral clock enable in low power mode register */
+  #define RCC_AHB2LPENR_DCMILPEN   0x00000001
+  #define RCC_AHB2LPENR_CRYPLPEN   0x00000010
+  #define RCC_AHB2LPENR_HASHLPEN   0x00000020
+  #define RCC_AHB2LPENR_RNGLPEN    0x00000040
+  #define RCC_AHB2LPENR_OTGFSLPEN  0x00000080
+#define TOFF_RCC_AHB3LPENR  0x0058		/* (RW) RCC AHB3 peripheral clock enable in low power mode register */
+  #define RCC_AHB3LPENR_FSMCLPEN   0x00000001
+#define TOFF_RCC_APB1LPENR  0x0060		/* (RW) RCC APB1 peripheral clock enable in low power mode register */
+  #define RCC_APB1LPENR_TIM2LPEN   0x00000001
+  #define RCC_APB1LPENR_TIM3LPEN   0x00000002
+  #define RCC_APB1LPENR_TIM4LPEN   0x00000004
+  #define RCC_APB1LPENR_TIM5LPEN   0x00000008
+  #define RCC_APB1LPENR_TIM6LPEN   0x00000010
+  #define RCC_APB1LPENR_TIM7LPEN   0x00000020
+  #define RCC_APB1LPENR_TIM12LPEN  0x00000040
+  #define RCC_APB1LPENR_TIM13LPEN  0x00000080
+  #define RCC_APB1LPENR_TIM14LPEN  0x00000100
+  #define RCC_APB1LPENR_WWDGLPEN   0x00000800
+  #define RCC_APB1LPENR_SPI2LPEN   0x00004000
+  #define RCC_APB1LPENR_SPI3LPEN   0x00008000
+  #define RCC_APB1LPENR_USART2LPEN 0x00020000
+  #define RCC_APB1LPENR_USART3LPEN 0x00040000
+  #define RCC_APB1LPENR_UART4LPEN  0x00080000
+  #define RCC_APB1LPENR_UART5LPEN  0x00100000
+  #define RCC_APB1LPENR_I2C1LPEN   0x00200000
+  #define RCC_APB1LPENR_I2C2LPEN   0x00400000
+  #define RCC_APB1LPENR_I2C3LPEN   0x00800000
+  #define RCC_APB1LPENR_CAN1LPEN   0x02000000
+  #define RCC_APB1LPENR_CAN2LPEN   0x04000000
+  #define RCC_APB1LPENR_PWRLPEN    0x10000000
+  #define RCC_APB1LPENR_DACLPEN    0x20000000
+#define TOFF_RCC_APB2LPENR  0x0064		/* (RW) RCC APB2 peripheral clock enable in low power mode register */
+  #define RCC_APB2LPENR_TIM1LPEN   0x00000001
+  #define RCC_APB2LPENR_TIM8LPEN   0x00000002
+  #define RCC_APB2LPENR_USART1LPEN 0x00000010
+  #define RCC_APB2LPENR_USART6LPEN 0x00000020
+  #define RCC_APB2LPENR_ADC1LPEN   0x00000100
+  #define RCC_APB2LPENR_ADC2PEN    0x00000200
+  #define RCC_APB2LPENR_ADC3LPEN   0x00000400
+  #define RCC_APB2LPENR_SDIOLPEN   0x00000800
+  #define RCC_APB2LPENR_SPI1LPEN   0x00001000
+  #define RCC_APB2LPENR_SYSCFGLPEN 0x00004000
+  #define RCC_APB2LPENR_TIM9LPEN   0x00010000
+  #define RCC_APB2LPENR_TIM10LPEN  0x00020000
+  #define RCC_APB2LPENR_TIM11LPEN  0x00040000
+#define TOFF_RCC_BDCR       0x0070		/* (RW) RCC Backup domain control register */
+  #define RCC_BDCR_LSEON           0x00000001
+  #define RCC_BDCR_LSERDY          0x00000002
+  #define RCC_BDCR_LSEBYP          0x00000004
+  #define RCC_BDCR_RTCSEL          0x00000300
+  #define RCC_BDCR_RTCSEL_0        0x00000100
+  #define RCC_BDCR_RTCSEL_1        0x00000200
+  #define RCC_BDCR_RTCEN           0x00008000
+  #define RCC_BDCR_BDRST           0x00010000
+#define TOFF_RCC_CSR        0x0074		/* (RW) RCC clock control & status register */
+  #define RCC_CSR_LSION            0x00000001
+  #define RCC_CSR_LSIRDY           0x00000002
+  #define RCC_CSR_RMVF             0x01000000
+  #define RCC_CSR_BORRSTF          0x02000000
+  #define RCC_CSR_PADRSTF          0x04000000
+  #define RCC_CSR_PORRSTF          0x08000000
+  #define RCC_CSR_SFTRSTF          0x10000000
+  #define RCC_CSR_WDGRSTF          0x20000000
+  #define RCC_CSR_WWDGRSTF         0x40000000
+  #define RCC_CSR_LPWRRSTF         0x80000000
+#define TOFF_RCC_SSCGR      0x0080		/* (RW) RCC spread spectrum clock generation register */
+  #define RCC_SSCGR_MODPER         0x00001FFF
+  #define RCC_SSCGR_INCSTEP        0x0FFFE000
+  #define RCC_SSCGR_SPREADSEL      0x40000000
+  #define RCC_SSCGR_SSCGEN         0x80000000
+#define TOFF_RCC_PLLI2SCFGR 0x0084		/* (RW) RCC PLLI2S configuration register */
+  #define RCC_PLLI2SCFGR_PLLI2SN   0x00007FC0
+  #define RCC_PLLI2SCFGR_PLLI2SR   0x70000000
+
+/*
+ *  FLASH REGISTERS
+ */
+#define TADR_FLASH_R_BASE   (AHB1PERIPH_BASE + 0x3C00)
+#define TOFF_FLASH_ACR      0x0000		/* (RW) FLASH access control register */
+  #define FLASH_ACR_LATENCY_0WS    0x00000000
+  #define FLASH_ACR_LATENCY_1WS    0x00000001
+  #define FLASH_ACR_LATENCY_2WS    0x00000002
+  #define FLASH_ACR_LATENCY_3WS    0x00000003
+  #define FLASH_ACR_LATENCY_4WS    0x00000004
+  #define FLASH_ACR_LATENCY_5WS    0x00000005
+  #define FLASH_ACR_LATENCY_6WS    0x00000006
+  #define FLASH_ACR_LATENCY_7WS    0x00000007
+  #define FLASH_ACR_PRFTEN         0x00000100
+  #define FLASH_ACR_ICEN           0x00000200
+  #define FLASH_ACR_DCEN           0x00000400
+  #define FLASH_ACR_ICRST          0x00000800
+  #define FLASH_ACR_DCRST          0x00001000
+  #define FLASH_ACR_BYTE0_ADDRESS  0x40023C00
+  #define FLASH_ACR_BYTE2_ADDRESS  0x40023C03
+#define TOFF_FLASH_KEYR     0x0004		/* (RW) FLASH key register */
+#define TOFF_FLASH_OPTKEYR  0x0008		/* (RW) FLASH option key register */
+#define TOFF_FLASH_SR       0x000C		/* (RW) FLASH status register */
+  #define FLASH_SR_EOP             0x00000001
+  #define FLASH_SR_SOP             0x00000002
+  #define FLASH_SR_WRPERR          0x00000010
+  #define FLASH_SR_PGAERR          0x00000020
+  #define FLASH_SR_PGPERR          0x00000040
+  #define FLASH_SR_PGSERR          0x00000080
+  #define FLASH_SR_BSY             0x00010000
+#define TOFF_FLASH_CR       0x0010		/* (RW) FLASH control register */
+  #define FLASH_CR_PG              0x00000001
+  #define FLASH_CR_SER             0x00000002
+  #define FLASH_CR_MER             0x00000004
+  #define FLASH_CR_SNB_0           0x00000008
+  #define FLASH_CR_SNB_1           0x00000010
+  #define FLASH_CR_SNB_2           0x00000020
+  #define FLASH_CR_SNB_3           0x00000040
+  #define FLASH_CR_PSIZE_0         0x00000100
+  #define FLASH_CR_PSIZE_1         0x00000200
+  #define FLASH_CR_STRT            0x00010000
+  #define FLASH_CR_EOPIE           0x01000000
+  #define FLASH_CR_LOCK            0x80000000
+#define TOFF_FLASH_OPTCR    0x0014		/* (RW) FLASH option control register */
+  #define FLASH_OPTCR_OPTLOCK      0x00000001
+  #define FLASH_OPTCR_OPTSTRT      0x00000002
+  #define FLASH_OPTCR_BOR_LEV_0    0x00000004
+  #define FLASH_OPTCR_BOR_LEV_1    0x00000008
+  #define FLASH_OPTCR_BOR_LEV      0x0000000C
+  #define FLASH_OPTCR_WDG_SW       0x00000020
+  #define FLASH_OPTCR_nRST_STOP    0x00000040
+  #define FLASH_OPTCR_nRST_STDBY   0x00000080
+  #define FLASH_OPTCR_RDP_0        0x00000100
+  #define FLASH_OPTCR_RDP_1        0x00000200
+  #define FLASH_OPTCR_RDP_2        0x00000400
+  #define FLASH_OPTCR_RDP_3        0x00000800
+  #define FLASH_OPTCR_RDP_4        0x00001000
+  #define FLASH_OPTCR_RDP_5        0x00002000
+  #define FLASH_OPTCR_RDP_6        0x00004000
+  #define FLASH_OPTCR_RDP_7        0x00008000
+  #define FLASH_OPTCR_nWRP_0       0x00010000
+  #define FLASH_OPTCR_nWRP_1       0x00020000
+  #define FLASH_OPTCR_nWRP_2       0x00040000
+  #define FLASH_OPTCR_nWRP_3       0x00080000
+  #define FLASH_OPTCR_nWRP_4       0x00100000
+  #define FLASH_OPTCR_nWRP_5       0x00200000
+  #define FLASH_OPTCR_nWRP_6       0x00400000
+  #define FLASH_OPTCR_nWRP_7       0x00800000
+  #define FLASH_OPTCR_nWRP_8       0x01000000
+  #define FLASH_OPTCR_nWRP_9       0x02000000
+  #define FLASH_OPTCR_nWRP_10      0x04000000
+  #define FLASH_OPTCR_nWRP_11      0x08000000
+
+/* 
+ *  DMA CONTROLLER
+ */
+#define TADR_DMA1_BASE      (AHB1PERIPH_BASE + 0x6000)
+#define TADR_DMA2_BASE      (AHB1PERIPH_BASE + 0x6400)
+#define TOFF_DMAI_LISR      0x0000		/* (RW) DMA low interrupt status register */
+#define TOFF_DMAI_HISR      0x0004		/* (RW) DMA high interrupt status register */
+#define TOFF_DMAI_LIFCR     0x0008		/* (RW) DMA low interrupt flag clear register */
+#define TOFF_DMAI_HIFCR     0x000C		/* (RW) DMA high interrupt flag clear register */
+
+#define TADR_DMA1_STM0_BASE (DMA1_BASE + 0x010)
+#define TADR_DMA1_STM1_BASE (DMA1_BASE + 0x028)
+#define TADR_DMA1_STM2_BASE (DMA1_BASE + 0x040)
+#define TADR_DMA1_STM3_BASE (DMA1_BASE + 0x058)
+#define TADR_DMA1_STM4_BASE (DMA1_BASE + 0x070)
+#define TADR_DMA1_STM5_BASE (DMA1_BASE + 0x088)
+#define TADR_DMA1_STM6_BASE (DMA1_BASE + 0x0A0)
+#define TADR_DMA1_STM7_BASE (DMA1_BASE + 0x0B8)
+#define TADR_DMA2_STM0_BASE (DMA2_BASE + 0x010)
+#define TADR_DMA2_STM1_BASE (DMA2_BASE + 0x028)
+#define TADR_DMA2_STM2_BASE (DMA2_BASE + 0x040)
+#define TADR_DMA2_STM3_BASE (DMA2_BASE + 0x058)
+#define TADR_DMA2_STM4_BASE (DMA2_BASE + 0x070)
+#define TADR_DMA2_STM5_BASE (DMA2_BASE + 0x088)
+#define TADR_DMA2_STM6_BASE (DMA2_BASE + 0x0A0)
+#define TADR_DMA2_STM7_BASE (DMA2_BASE + 0x0B8)
+#define TOFF_DMAS_CR        0x0000		/* (RW) DMA stream x configuration register      */
+#define TOFF_DMAS_NDTR      0x0004		/* (RW) DMA stream x number of data register     */
+#define TOFF_DMAS_PAR       0x0008		/* (RW) DMA stream x peripheral address register */
+#define TOFF_DMAS_M0AR      0x000C		/* (RW) DMA stream x memory 0 address register   */
+#define TOFF_DMAS_M1AR      0x0010		/* (RW) DMA stream x memory 1 address register   */
+#define TOFF_DMAS_FCR       0x0014		/* (RW) DMA stream x FIFO control register       */
+
+
+
+
+#define ETH_BASE            (AHB1PERIPH_BASE + 0x8000)
+#define ETH_MAC_BASE        (ETH_BASE)
+#define ETH_MMC_BASE        (ETH_BASE + 0x0100)
+#define ETH_PTP_BASE        (ETH_BASE + 0x0700)
+#define ETH_DMA_BASE        (ETH_BASE + 0x1000)
+
+
+
+/*
+ *  DCMI
+ */
+#define TADR_DCMI_BASE      (AHB2PERIPH_BASE + 0x50000)
+#define TOFF_DCMI_CR        0x0000		/* (RW) DCMI control register 1 */
+#define TOFF_DCMI_SR        0x0004		/* (R)  DCMI status register */
+#define TOFF_DCMI_RISR      0x0008		/* (R)  DCMI raw interrupt status register */
+#define TOFF_DCMI_IER       0x000C		/* (RW) DCMI interrupt enable register */
+#define TOFF_DCMI_MISR      0x0010		/* (RW) DCMI masked interrupt status register */
+#define TOFF_DCMI_ICR       0x0014		/* (RW) DCMI interrupt clear register */
+#define TOFF_DCMI_ESCR      0x0018		/* (RW) DCMI embedded synchronization code register */
+#define TOFF_DCMI_ESUR      0x001C		/* (RW) DCMI embedded synchronization unmask register */
+#define TOFF_DCMI_CWSTRTR   0x0020		/* (RW) DCMI crop window start */
+#define TOFF_DCMI_CWSIZER   0x0024		/* (RW) DCMI crop window size */
+#define TOFF_DCMI_DR        0x0028		/* (RW) DCMI data register */
+
+/*
+ *  CRYPTO PROCESSER
+ */
+#define TADR_CRYP_BASE      (AHB2PERIPH_BASE + 0x60000)
+#define TOFF_CRYP_CR        0x0000		/* (RW) CRYP control register */
+#define TOFF_CRYP_SR        0x0004		/* (R)  CRYP status register */
+#define TOFF_CRYP_DR        0x0008		/* (RW) CRYP data input register */
+#define TOFF_CRYP_DOUT      0x000C		/* (RW) CRYP data output register */
+#define TOFF_CRYP_DMACR     0x0010		/* (RW) CRYP DMA control register */
+#define TOFF_CRYP_IMSCR     0x0014		/* (RW) CRYP interrupt mask set/clear register */
+#define TOFF_CRYP_RISR      0x0018		/* (RW) CRYP raw interrupt status register */
+#define TOFF_CRYP_MISR      0x001C		/* (RW) CRYP masked interrupt status register */
+#define TOFF_CRYP_K0LR      0x0020		/* (RW) CRYP key left  register 0 */
+#define TOFF_CRYP_K0RR      0x0024		/* (RW) CRYP key right register 0 */
+#define TOFF_CRYP_K1LR      0x0028		/* (RW) CRYP key left  register 1 */
+#define TOFF_CRYP_K1RR      0x002C		/* (RW) CRYP key right register 1 */
+#define TOFF_CRYP_K2LR      0x0030		/* (RW) CRYP key left  register 2 */
+#define TOFF_CRYP_K2RR      0x0034		/* (RW) CRYP key right register 2 */
+#define TOFF_CRYP_K3LR      0x0038		/* (RW) CRYP key left  register 3 */
+#define TOFF_CRYP_K3RR      0x003C		/* (RW) CRYP key right register 3 */
+#define TOFF_CRYP_IV0LR     0x0040		/* (RW) CRYP initialization vector left-word  register 0 */
+#define TOFF_CRYP_IV0RR     0x0044		/* (RW) CRYP initialization vector right-word register 0 */
+#define TOFF_CRYP_IV1LR     0x0048		/* (RW) CRYP initialization vector left-word  register 1 */
+#define TOFF_CRYP_IV1RR     0x004C		/* (RW) CRYP initialization vector right-word register 1 */
+
+/*
+ *  HASH
+ */
+#define TADR_HASH_BASE      (AHB2PERIPH_BASE + 0x60400)
+#define TOFF_HASH_CR        0x0000		/* (RW) HASH control register */
+#define TOFF_HASH_DIN       0x0004		/* (RW) HASH data input register */
+#define TOFF_HASH_STR       0x0008		/* (RW) HASH start register */
+#define TOFF_HASH_HR0       0x000C		/* (RW) HASH digest registers 0 */
+#define TOFF_HASH_HR1       0x0010		/* (RW) HASH digest registers 1 */
+#define TOFF_HASH_HR2       0x0014		/* (RW) HASH digest registers 2 */
+#define TOFF_HASH_HR3       0x0018		/* (RW) HASH digest registers 3 */
+#define TOFF_HASH_HR4       0x001C		/* (RW) HASH digest registers 4 */
+#define TOFF_HASH_IMR       0x0020		/* (RW) HASH interrupt enable register */
+#define TOFF_HASH_SR        0x0024		/* (R)  HASH status register */
+#define TOFF_HASH_CSR0      0x00F8		/* (RW) HASH context swap registers 0 */
+#define TOFF_HASH_CSR1      0x00FC		/* (RW) HASH context swap registers 1 */
+#define TOFF_HASH_CSR2      0x0100		/* (RW) HASH context swap registers 2 */
+#define TOFF_HASH_CSR3      0x0104		/* (RW) HASH context swap registers 3 */
+#define TOFF_HASH_CSR4      0x0108		/* (RW) HASH context swap registers 4 */
+#define TOFF_HASH_CSR5      0x010C		/* (RW) HASH context swap registers 5 */
+#define TOFF_HASH_CSR6      0x0110		/* (RW) HASH context swap registers 6 */
+#define TOFF_HASH_CSR7      0x0114		/* (RW) HASH context swap registers 7 */
+#define TOFF_HASH_CSR8      0x0118		/* (RW) HASH context swap registers 8 */
+#define TOFF_HASH_CSR9      0x011C		/* (RW) HASH context swap registers 9 */
+#define TOFF_HASH_CSR10     0x0120		/* (RW) HASH context swap registers 10 */
+#define TOFF_HASH_CSR11     0x0124		/* (RW) HASH context swap registers 11 */
+#define TOFF_HASH_CSR12     0x0128		/* (RW) HASH context swap registers 12 */
+#define TOFF_HASH_CSR13     0x012C		/* (RW) HASH context swap registers 13 */
+#define TOFF_HASH_CSR14     0x0130		/* (RW) HASH context swap registers 14 */
+#define TOFF_HASH_CSR15     0x0134		/* (RW) HASH context swap registers 15 */
+#define TOFF_HASH_CSR16     0x0138		/* (RW) HASH context swap registers 16 */
+#define TOFF_HASH_CSR17     0x013C		/* (RW) HASH context swap registers 17 */
+#define TOFF_HASH_CSR18     0x0140		/* (RW) HASH context swap registers 18 */
+#define TOFF_HASH_CSR19     0x0144		/* (RW) HASH context swap registers 19 */
+#define TOFF_HASH_CSR20     0x0148		/* (RW) HASH context swap registers 20 */
+#define TOFF_HASH_CSR21     0x014C		/* (RW) HASH context swap registers 21 */
+#define TOFF_HASH_CSR22     0x0150		/* (RW) HASH context swap registers 22 */
+#define TOFF_HASH_CSR23     0x0154		/* (RW) HASH context swap registers 23 */
+#define TOFF_HASH_CSR24     0x0158		/* (RW) HASH context swap registers 24 */
+#define TOFF_HASH_CSR25     0x015C		/* (RW) HASH context swap registers 25 */
+#define TOFF_HASH_CSR26     0x0160		/* (RW) HASH context swap registers 26 */
+#define TOFF_HASH_CSR27     0x0164		/* (RW) HASH context swap registers 27 */
+#define TOFF_HASH_CSR28     0x0168		/* (RW) HASH context swap registers 28 */
+#define TOFF_HASH_CSR29     0x016C		/* (RW) HASH context swap registers 29 */
+#define TOFF_HASH_CSR30     0x0170		/* (RW) HASH context swap registers 30 */
+#define TOFF_HASH_CSR31     0x0174		/* (RW) HASH context swap registers 31 */
+#define TOFF_HASH_CSR32     0x0178		/* (RW) HASH context swap registers 32 */
+#define TOFF_HASH_CSR33     0x017C		/* (RW) HASH context swap registers 33 */
+#define TOFF_HASH_CSR34     0x0180		/* (RW) HASH context swap registers 34 */
+#define TOFF_HASH_CSR35     0x0184		/* (RW) HASH context swap registers 35 */
+#define TOFF_HASH_CSR36     0x0188		/* (RW) HASH context swap registers 36 */
+#define TOFF_HASH_CSR37     0x018C		/* (RW) HASH context swap registers 37 */
+#define TOFF_HASH_CSR38     0x0190		/* (RW) HASH context swap registers 38 */
+#define TOFF_HASH_CSR39     0x0194		/* (RW) HASH context swap registers 39 */
+#define TOFF_HASH_CSR40     0x0198		/* (RW) HASH context swap registers 40 */
+#define TOFF_HASH_CSR41     0x019C		/* (RW) HASH context swap registers 41 */
+#define TOFF_HASH_CSR42     0x01A0		/* (RW) HASH context swap registers 42 */
+#define TOFF_HASH_CSR43     0x01A4		/* (RW) HASH context swap registers 43 */
+#define TOFF_HASH_CSR44     0x01A8		/* (RW) HASH context swap registers 44 */
+#define TOFF_HASH_CSR45     0x01AC		/* (RW) HASH context swap registers 45 */
+#define TOFF_HASH_CSR46     0x01B0		/* (RW) HASH context swap registers 46 */
+#define TOFF_HASH_CSR47     0x01B4		/* (RW) HASH context swap registers 47 */
+#define TOFF_HASH_CSR48     0x01B8		/* (RW) HASH context swap registers 48 */
+#define TOFF_HASH_CSR49     0x01BC		/* (RW) HASH context swap registers 49 */
+#define TOFF_HASH_CSR50     0x01C0		/* (RW) HASH context swap registers 50 */
+
+/*
+ *  RNG
+ */
+#define TADR_RNG_BASE       (AHB2PERIPH_BASE + 0x60800)
+#define TOFF_RNG_CR         0x0000		/* (RW) RNG control register */
+#define TOFF_RNG_SR         0x0004		/* (RW) RNG status register */
+#define TOFF_RNG_DR         0x0008		/* (RW) RNG data register */
+
+/*
+ *  FLEXIBLE STATIC MEMORY
+ */
+#define TADR_FSMC_R_BASE    (FSMC_R_BASE + 0x0000)
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER
+ */
+#define TOFF_FSMC_R_BTCR0   0x0000		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 0 */
+#define TOFF_FSMC_R_BTCR1   0x0004		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 1 */
+#define TOFF_FSMC_R_BTCR2   0x0008		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 2 */
+#define TOFF_FSMC_R_BTCR3   0x000C		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 3 */
+#define TOFF_FSMC_R_BTCR4   0x0010		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 4 */
+#define TOFF_FSMC_R_BTCR5   0x0014		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 5 */
+#define TOFF_FSMC_R_BTCR6   0x0018		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 6 */
+#define TOFF_FSMC_R_BTCR7   0x001C		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 7 */
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER BANK1E
+ */
+#define TOFF_FSMC_R_BWTR0   0x0104		/* (RW) NOR/PSRAM write timing registers 0 */
+#define TOFF_FSMC_R_BWTR1   0x0108		/* (RW) NOR/PSRAM write timing registers 1 */
+#define TOFF_FSMC_R_BWTR2   0x010C		/* (RW) NOR/PSRAM write timing registers 2 */
+#define TOFF_FSMC_R_BWTR3   0x0110		/* (RW) NOR/PSRAM write timing registers 3 */
+#define TOFF_FSMC_R_BWTR4   0x0114		/* (RW) NOR/PSRAM write timing registers 4 */
+#define TOFF_FSMC_R_BWTR5   0x0118		/* (RW) NOR/PSRAM write timing registers 5 */
+#define TOFF_FSMC_R_BWTR6   0x011C		/* (RW) NOR/PSRAM write timing registers 6 */
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER BANK2
+ */
+#define TOFF_FSMC_R_PCR2    0x0060		/* (RW) NAND Flash control register 2 */
+#define TOFF_FSMC_R_SR2     0x0064		/* (RW) NAND Flash FIFO status and interrupt register 2 */
+#define TOFF_FSMC_R_PMEM2   0x0068		/* (RW) NAND Flash Common memory space timing register 2 */
+#define TOFF_FSMC_R_PATT2   0x006C		/* (RW) NAND Flash Attribute memory space timing register 2 */
+#define TOFF_FSMC_R_ECCR2   0x0074		/* (RW) NAND Flash ECC result registers 2 */
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER BANK3
+ */
+#define TOFF_FSMC_R_PCR3    0x0080		/* (RW) NAND Flash control register 3 */
+#define TOFF_FSMC_R_SR3     0x0084		/* (RW) NAND Flash FIFO status and interrupt register 3 */
+#define TOFF_FSMC_R_PMEM3   0x0088		/* (RW) NAND Flash Common memory space timing register 3 */
+#define TOFF_FSMC_R_PATT3   0x008C		/* (RW) NAND Flash Attribute memory space timing register 3 */
+#define TOFF_FSMC_R_ECCR3   0x0094		/* (RW) NAND Flash ECC result registers 3 */
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER BANK4
+ */
+#define TOFF_FSMC_R_PCR4    0x00A0		/* (RW) PC Card  control register 4 */
+#define TOFF_FSMC_R_SR4     0x00A4		/* (RW) PC Card  FIFO status and interrupt register 4 */
+#define TOFF_FSMC_R_PMEM4   0x00A8		/* (RW) PC Card  Common memory space timing register 4 */
+#define TOFF_FSMC_R_PATT4   0x00AC		/* (RW) PC Card  Attribute memory space timing register 4 */
+#define TOFF_FSMC_R_PIO4    0x00B0		/* (RW) PC Card  I/O space timing register 4 */
+
+/*
+ *  DEBUG MCU
+ */
+#define TADR_DBGMCU_BASE    0xE0042000
+#define TOFF_DBGMCU_IDCODE  0x0000		/* (RW) MCU device ID code */
+#define TOFF_DBGMCU_CR      0x0004		/* (RW) Debug MCU configuration register */
+#define TOFF_DBGMCU_APB1FZ  0x0008		/* (RW) Debug MCU APB1 freeze register */
+#define TOFF_DBGMCU_APB2FZ  0x000C		/* (RW) Debug MCU APB2 freeze register */
+
+
+#endif  /* _STM32F4XX_H_ */
+
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/Makefile.core
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/Makefile.core	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/Makefile.core	(revision 136)
@@ -0,0 +1,97 @@
+#
+#  @(#) $Id: Makefile.core 2712 2015-11-23 06:50:34Z ertl-honda $
+# 
+
+#
+#		Makefile ã®ãã­ã»ããµä¾å­é¨ï¼ARM-Mç¨ï¼
+#
+
+# 
+#  ã³ã¢ä¾å­é¨ãã£ã¬ã¯ããªåã®å®ç¾© 
+# 
+COREDIR = $(SRCDIR)/arch/$(PRC)_$(TOOL)/common
+
+#
+#  ãã¼ã«ä¾å­é¨ãã£ã¬ã¯ããªåã®å®ç¾© 
+#
+TOOLDIR = $(SRCDIR)/arch/$(TOOL)
+
+#
+#  ã³ã³ãã¤ã«ãªãã·ã§ã³
+#
+COPTS := $(COPTS) -mthumb 
+INCLUDES := $(INCLUDES) -I$(COREDIR) -I$(TOOLDIR)
+LDFLAGS := $(LDFLAGS) 
+CDEFS := $(CDEFS)
+LIBS := $(LIBS)  -lgcc
+
+#
+#  ã«ã¼ãã«ã«é¢ããå®ç¾©
+#
+KERNEL_DIR := $(KERNEL_DIR) $(COREDIR)
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS)
+KERNEL_COBJS := $(KERNEL_COBJS) core_config.o
+
+#
+#  ã³ã¢ã®ã¿ã¤ãã«ããéã
+#
+ifeq ($(CORE_TYPE),CORTEX_M4)
+	ARM_ARCH = ARMV7M
+	COPTS := $(COPTS) -mcpu=cortex-m4
+	CDEFS := $(CDEFS) -DTOPPERS_CORTEX_M4
+	FPU_ARCH_MACRO = __TARGET_FPU_FPV4_SP
+	FPU_ARCH_OPT   = fpv4-sp-d16
+else ifeq ($(CORE_TYPE),CORTEX_M0PLUS)
+	ARM_ARCH = ARMV6M
+	COPTS := $(COPTS) -mcpu=cortex-m0plus
+	CDEFS := $(CDEFS) -DTOPPERS_CORTEX_M0PLUS
+else ifeq ($(CORE_TYPE),CORTEX_M0)
+	ARM_ARCH = ARMV6M
+	COPTS := $(COPTS) -mcpu=cortex-m0
+	CDEFS := $(CDEFS) -DTOPPERS_CORTEX_M0
+else ifeq ($(CORE_TYPE),CORTEX_M3)
+	ARM_ARCH = ARMV7M
+	COPTS := $(COPTS) -mcpu=cortex-m3
+	CDEFS := $(CDEFS) -DTOPPERS_CORTEX_M3
+endif
+
+#
+#  ã¢ã¼ã­ãã¯ãã£æ¯ã«ç°ãªãè¨­å®
+#
+ifeq ($(ARM_ARCH),ARMV7M)
+	KERNEL_ASMOBJS := $(KERNEL_ASMOBJS) core_support.o
+	CDEFS := $(CDEFS) -D__TARGET_ARCH_THUMB=4
+else ifeq ($(ARM_ARCH),ARMV6M)
+	KERNEL_ASMOBJS := $(KERNEL_ASMOBJS) core_support_v6m.o
+	CDEFS := $(CDEFS) -D__TARGET_ARCH_THUMB=3
+endif
+
+#
+#  FPUã®è¨­å®
+#
+ifeq ($(FPU_ABI),)
+	FPU_ABI = softfp
+endif 
+
+ifeq ($(FPU_USAGE),FPU_NO_PRESERV)
+	COPTS := $(COPTS) -mfloat-abi=$(FPU_ABI) -mfpu=$(FPU_ARCH_OPT)
+	CDEFS := $(CDEFS) -D$(FPU_ARCH_MACRO) -DTOPPERS_FPU_ENABLE
+else ifeq ($(FPU_USAGE),FPU_NO_LAZYSTACKING)
+	COPTS := $(COPTS) -mfloat-abi=$(FPU_ABI) -mfpu=$(FPU_ARCH_OPT)
+	CDEFS := $(CDEFS) -D$(FPU_ARCH_MACRO) -DTOPPERS_FPU_ENABLE -DTOPPERS_FPU_NO_LAZYSTACKING -DTOPPERS_FPU_CONTEXT
+else ifeq ($(FPU_USAGE),FPU_LAZYSTACKING)
+	COPTS := $(COPTS) -mfloat-abi=$(FPU_ABI) -mfpu=$(FPU_ARCH_OPT)
+	CDEFS := $(CDEFS) -D$(FPU_ARCH_MACRO) -DTOPPERS_FPU_ENABLE -DTOPPERS_FPU_LAZYSTACKING -DTOPPERS_FPU_CONTEXT
+endif
+
+
+#
+#  ä¾å­é¢ä¿ã®å®ç¾©
+#
+cfg1_out.c: $(COREDIR)/core_def.csv
+kernel_cfg.timestamp: $(COREDIR)/core.tf
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿é¢ä¿ã®å¤æ°ã®å®ç¾©
+#
+CFG_TABS := $(CFG_TABS) --cfg1-def-table $(COREDIR)/core_def.csv
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/arm_m.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/arm_m.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/arm_m.h	(revision 136)
@@ -0,0 +1,254 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: arm_m.h 2711 2015-11-23 01:07:27Z ertl-honda $
+ */
+
+/*
+ *  ARMVx-Mã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
+ */
+
+#ifndef ARM_M_H
+#define ARM_M_H
+
+#if !((__TARGET_ARCH_THUMB == 4) || (__TARGET_ARCH_THUMB == 3))
+#error __TARGET_ARCH_THUMB is not defined or other than 4(ARMv7)/3(ARMv6)
+#endif /* __TARGET_ARCH_THUMB == 4 */
+
+/*
+ *  EPSRã®Tããã
+ */
+#define EPSR_T   0x01000000
+
+/*
+ * IPSRã® ISR NUMBER
+ */
+#define IPSR_ISR_NUMBER 0x1ff
+
+/*
+ *  ä¾å¤ã»å²è¾¼ã¿çºçæã«ã¹ã¿ãã¯ä¸ã«ç©ã¾ããä¿å­é åã®ãµã¤ãº
+ *  æ¬ã«ã¼ãã«ã§ã¯ä¾å¤ãã¬ã¼ã ã¨å¼ã¶
+ */
+#define EXC_FRAME_SIZE         (8*4)
+
+/*
+ *  ä¾å¤ã»å²è¾¼ã¿çºçæã«LRã«è¨­å®ãããEXC_RETURNã®å¤
+ */
+#define EXC_RETURN_PSP          0x04
+#define EXC_RETURN_HANDLER_MSP  0x00
+#define EXC_RETURN_TREAD_MSP    0x09
+#define EXC_RETURN_TREAD_PSP    0x0d
+#define EXC_RETURN_FP           0x10
+#define EXC_RETURN_FP_USED      0x00
+#define EXC_RETURN_FP_NONUSED   0x10
+#define EXC_RETURN_OTHER        0xFFFFFFE0
+
+/*
+ *  CONTROLã¬ã¸ã¹ã¿
+ */
+#define CONTROL_PSP            0x02
+#define CONTROL_MSP            0x00
+#define CONTROL_FPCA           0x04
+
+/*
+ *  ä¾å¤çªå·
+ */
+#define EXCNO_NMI         2
+#define EXCNO_HARD        3
+#define EXCNO_MPU         4
+#define EXCNO_BUS         5
+#define EXCNO_USAGE       6
+#define EXCNO_SVCALL     11          
+#define EXCNO_DEBUG      12
+#define EXCNO_PENDSV     14
+
+/*
+ *  ä¾å¤çªå·ã®æå°å¤ã¨æå¤§å¤
+ */
+#define TMIN_EXCNO   2
+#define TMAX_EXCNO  14
+
+/*
+ *  å²è¾¼ã¿çªå·
+ */
+#define IRQNO_SYSTICK    15
+
+/*
+ *  å²è¾¼ã¿çªå·ã®æå°å¤
+ */
+#define TMIN_INTNO       15
+
+/*
+ *  ä¾å¤ãã¬ã¼ã ã®ãªãã»ãã
+ */
+#define P_EXCINF_OFFSET_EXC_RETURN  0x01
+#define P_EXCINF_OFFSET_IIPM        0x00
+#define P_EXCINF_OFFSET_XPSR        0x09
+#define P_EXCINF_OFFSET_PC          0x08
+
+/*
+ *  NVICé¢é£
+ */
+
+/*
+ *  ã·ã¹ãã ãã³ãã©ã¼ã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿
+ */
+#define NVIC_SYS_HND_CTRL   0xE000ED24
+
+/*
+ *  åä¾å¤ã®è¨±å¯ããã
+ */
+#define NVIC_SYS_HND_CTRL_USAGE 0x00040000
+#define NVIC_SYS_HND_CTRL_BUS   0x00020000
+#define NVIC_SYS_HND_CTRL_MEM   0x00010000
+
+/*
+ *  åªå
+åº¦è¨­å®ã¬ã¸ã¹ã¿
+ */
+#define NVIC_SYS_PRI1       0xE000ED18  // Sys. Handlers 4 to 7 Priority
+#define NVIC_SYS_PRI2       0xE000ED1C  // Sys. Handlers 8 to 11 Priority
+#define NVIC_SYS_PRI3       0xE000ED20  // Sys. Handlers 12 to 15 Priority
+#define NVIC_PRI0           0xE000E400  // IRQ 0 to 3 Priority Register
+
+/*
+ *  å²è¾¼ã¿è¨±å¯ã¬ã¸ã¹ã¿
+ */
+#define NVIC_SETENA0        0xE000E100  // IRQ 0 to 31 Set Enable Register
+
+/*
+ *  å²è¾¼ã¿ç¦æ­¢ã¬ã¸ã¹ã¿
+ */
+#define NVIC_CLRENA0        0xE000E180  // IRQ 0 to 31 Set Disable Register
+
+/*
+ *  å²è¾¼ã¿ã»ãããã³ãã£ã³ã°ã¬ã¸ã¹ã¿
+ */
+#define NVIC_ISER0          0xE000E200  // IRQ 0 to 31 Set-Pending Register
+
+/*
+ *  å²è¾¼ã¿ã¯ãªã¢ãã³ãã£ã³ã°ã¬ã¸ã¹ã¿
+ */
+#define NVIC_ICER0          0xE000E280  // IRQ 0 to 31 Clear-Pending Register
+
+/*
+ *  ãã¯ã¿ãã¼ãã«ãªãã»ããã¬ã¸ã¹ã¿
+ */
+#define NVIC_VECTTBL        0xE000ED08
+
+/*
+ *  å²ãè¾¼ã¿å¶å¾¡ã¨ç¶æ
+ã¬ã¸ã¹ã¿
+ */
+#define NVIC_ICSR           0xE000ED04
+#define NVIC_PENDSVSET          (1 << 28)       /*  PenvSVCä¾å¤ */
+#define NVIC_PENDSTSET          (1 << 26)       /*  SYSTickä¾å¤ */
+
+
+/*
+ *  SYSTICé¢é£ã¬ã¸ã¹ã¿
+ */
+#define SYSTIC_CONTROL_STATUS 0xE000E010
+#define SYSTIC_RELOAD_VALUE   0xE000E014
+#define SYSTIC_CURRENT_VALUE  0xE000E018
+#define SYSTIC_CALIBRATION    0xE000E01C
+
+#define SYSTIC_ENABLE    0x01
+#define SYSTIC_TICINT    0x02
+#define SYSTIC_CLKSOURCE 0x04
+#define SYSTIC_COUNTFLAG 0x10000
+
+#define SYSTIC_SKEW      0x40000000
+#define SYSTIC_NOREF     0x80000000
+#define SYSTIC_TENMS     0x00ffffff
+
+/*
+ * FPUé¢é£ã¬ã¸ã¹ã¿
+ */
+#if __TARGET_ARCH_THUMB == 4
+
+#define CPACR 0xE000ED88
+#define FPCCR 0xE000EF34
+
+#define CPACR_FPU_ENABLE 0x00f00000
+#define FPCCR_NO_PRESERV       0x00000000
+#define FPCCR_NO_LAZYSTACKING  0x80000000
+#define FPCCR_LAZYSTACKING     0xC0000000
+
+#endif /* __TARGET_ARCH_THUMB == 4 */
+
+
+#if defined(TOPPERS_CORTEX_M0) || defined(TOPPERS_CORTEX_M0PLUS)
+/*
+ *  M0/M0+åºæã®å
+å®¹
+ */
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ã®ç¯å²
+ */
+#define TMIN_INTPRI		(-4)	/* å²è¾¼ã¿åªå
+åº¦ã®æå°å¤ï¼æé«å¤ï¼*/
+#define TMAX_INTPRI		(-1)	/* å²è¾¼ã¿åªå
+åº¦ã®æå¤§å¤ï¼æä½å¤ï¼*/
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+
+ */
+#define TBITW_IPRI		2
+
+#endif /* defined(TOPPERS_CORTEX_M0) || defined(TOPPERS_CORTEX_M0PLUS) */
+
+#endif  /* ARM_M_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core.tf	(revision 136)
@@ -0,0 +1,231 @@
+$ 
+$     ãã¹2ã®ã¢ã¼ã­ãã¯ãã£ä¾å­ãã³ãã¬ã¼ãï¼ARM-Mç¨ï¼
+$ 
+
+$ 
+$  æå¹ãªå²è¾¼ã¿çªå·ï¼å²è¾¼ã¿ãã³ãã©çªå·
+$ 
+$INTNO_VALID = RANGE(15, TMAX_INTNO)$
+$INHNO_VALID = INTNO_VALID$
+
+$ 
+$  æå¹ãªCPUä¾å¤çªå·
+$ 
+$EXCNO_VALID = { 2,3,4,5,6,11,12,14 }$
+
+$ 
+$  ATT_ISRã§ä½¿ç¨ã§ããå²è¾¼ã¿çªå·ã¨ããã«å¯¾å¿ããå²è¾¼ã¿ãã³ãã©çªå·
+$ 
+$INTNO_ATTISR_VALID = INTNO_VALID$
+$INHNO_ATTISR_VALID = INHNO_VALID$
+
+$ 
+$  DEF_INTï¼DEF_EXCã§ä½¿ç¨ã§ããå²è¾¼ã¿ãã³ãã©çªå·ï¼CPUä¾å¤ãã³ãã©çªå·
+$ 
+$INHNO_DEFINH_VALID = INHNO_VALID$
+$EXCNO_DEFEXC_VALID = EXCNO_VALID$
+
+$ 
+$  CFG_INTã§ä½¿ç¨ã§ããå²è¾¼ã¿çªå·ã¨å²è¾¼ã¿åªå
+åº¦
+$  æå¤§åªå
+åº¦ã¯BASEPRIã¬ã¸ã¹ã¿ã§ãã¹ã¯ã§ããªãåªå
+åº¦ï¼å
+é¨åªå
+åº¦'0'ï¼
+$  ãã®ããï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã§ã®ã¿æå®å¯è½ï¼
+$INTNO_CFGINT_VALID = INTNO_VALID$
+$INTPRI_CFGINT_VALID = RANGE(-(1 << TBITW_IPRI),-1)$
+           
+$ 
+$  æ¨æºãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ã
+$ 
+$INCLUDE "kernel/kernel.tf"$
+
+/*$NL$
+$SPC$*  Target-dependent Definitions (ARM-M)$NL$
+$SPC$*/$NL$
+$NL$
+
+$ 
+$  ãã¯ã¿ã¼ãã¼ãã«
+$ 
+$FILE "kernel_cfg.c"$
+$NL$
+
+$IF ISFUNCTION("GEN_VECTOR_TABLE_VARNAME")$
+	$GEN_VECTOR_TABLE_VARNAME()$
+$ELSE$
+	$IF ISFUNCTION("VECTOR_ATTRIBUTE")$
+		$VECTOR_ATTRIBUTE()$
+	$ELSE$
+		__attribute__ ((section(".vector"))) $NL$
+	$END$
+	const FP _kernel_vector_table[] =      $NL$ 
+$END$
+{                                    $NL$
+	$TAB$(FP)(TOPPERS_ISTKPT(TOPPERS_ISTK, TOPPERS_ISTKSZ)), /* 0 The initial stack pointer */$NL$
+	$TAB$(FP)_kernel__start,                    /* 1 The reset handler */$NL$
+
+$FOREACH excno {2,3,...,14}$ 
+	$IF (excno == 11) && (__TARGET_ARCH_THUMB == 4) $
+		$TAB$(FP)(_kernel_svc_handler),        /* 11 SVCall handler */$NL$
+	$ELSE$
+		$IF (excno == 14) && (__TARGET_ARCH_THUMB == 3) $
+			$TAB$(FP)(pendsvc_handler),        /* 14 PandSVCall handler */$NL$
+		$ELSE$
+			$TAB$(FP)(_kernel_core_exc_entry),$SPC$$FORMAT("/* %d */", +excno)$$NL$
+		$END$
+	$END$
+$END$
+
+$FOREACH inhno INTNO_VALID$ 
+	$IF LENGTH(INH.INHNO[inhno]) && ((INH.INHATR[inhno] & TA_NONKERNEL) != 0)$
+		$TAB$(FP)($INH.INTHDR[inhno]$),
+	$ELSE$
+		$TAB$(FP)(_kernel_core_int_entry),
+	$END$
+	$SPC$$FORMAT("/* %d */", +inhno)$$NL$
+$END$
+
+
+$NL$};$NL$
+$NL$
+
+$NL$
+const FP _kernel_exc_tbl[] = $NL$
+{$NL$
+$FOREACH excno {0,1,...,14}$
+	$IF LENGTH(EXC.EXCNO[excno])$
+		$TAB$(FP)($EXC.EXCHDR[excno]$),
+	$ELSE$
+		$TAB$(FP)(_kernel_default_exc_handler),
+	$END$
+	$SPC$$FORMAT("/* %d */", +excno)$$NL$
+$END$
+
+
+$FOREACH inhno INTNO_VALID$
+	$IF LENGTH(INH.INHNO[inhno])$
+		$TAB$(FP)($INH.INTHDR[inhno]$),
+	$ELSE$
+		$TAB$(FP)(_kernel_default_int_handler),
+	$END$
+	$SPC$$FORMAT("/* %d */", +inhno)$$NL$
+$END$
+
+
+$NL$};$NL$
+$NL$
+
+$ 
+$  _kernel_bitpat_cfgintã®çæ
+$ 
+
+$bitpat_cfgint_num = 0$
+$bitpat_cfgint = 0$
+
+
+const uint32_t _kernel_bitpat_cfgint[
+$IF (TMAX_INTNO & 0x0f) == 0x00 $
+	$bitpat_cfgint_num = (TMAX_INTNO >> 4)$
+$ELSE$
+	$bitpat_cfgint_num = (TMAX_INTNO >> 4) + 1$
+$END$
+	$bitpat_cfgint_num$
+] = {$NL$
+$FOREACH num RANGE(0,(bitpat_cfgint_num-1))$
+$   //boost ã®ãã¼ã¸ã§ã³ã«ãã£ã¦æåãå¤ããããã®å¯¾ç­
+$   //http://www.toppers.jp/TOPPERS-USERS/201004/msg00034.html
+	$bitpat_cfgint = 1-1$
+	$FOREACH inhno RANGE(num*32, (num*32)+31)$
+		$IF LENGTH(INH.INHNO[inhno])$
+			$bitpat_cfgint = bitpat_cfgint | (1 << (inhno & 0x01f))$
+		$END$
+	$END$
+	$TAB$UINT32_C($FORMAT("0x%08x", bitpat_cfgint)$), $NL$
+$END$
+
+$NL$};$NL$
+$NL$
+
+
+
+
+$IF __TARGET_ARCH_THUMB == 4 $
+
+$ 
+$  å²è¾¼ã¿åªå
+åº¦ãã¼ãã«ï¼å
+é¨è¡¨ç¾ï¼
+$ 
+const uint32_t _kernel_int_iipm_tbl[] = {$NL$
+$FOREACH excno {0,1,...,14}$
+	$TAB$$FORMAT("UINT32_C(0x%08x), /* 0x%03x */", 0, +excno)$$NL$
+$END$
+
+$FOREACH intno INTNO_VALID$
+	$IF LENGTH(INT.INTNO[intno])$
+		$intpri = (((1 << TBITW_IPRI) + INT.INTPRI[intno]) << (8 - TBITW_IPRI))$
+	$ELSE$
+$		// LSBã1ã«ãã¦ããã®ã¯ï¼å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããªããã¨ãå¤
+$		// å¥ããããã§ããï¼
+		$intpri = 0 $
+	$END$
+	$TAB$$FORMAT("UINT32_C(0x%08x), /* 0x%03x */", intpri, +intno)$$NL$
+$END$
+$NL$};$NL$
+$NL$
+
+$END$
+
+$IF __TARGET_ARCH_THUMB == 3 $
+
+$ 
+$  å²è¾¼ã¿åªå
+åº¦ãã¼ãã«ï¼å
+é¨è¡¨ç¾ï¼
+$ 
+const uint8_t _kernel_int_iipm_tbl[] = {$NL$
+$FOREACH excno {0,1,...,14}$
+	$TAB$$FORMAT("UINT8_C(0x%02x), /* 0x%03x */", 0, +excno)$$NL$
+$END$
+
+$FOREACH intno INTNO_VALID$
+	$IF LENGTH(INT.INTNO[intno])$
+		$intpri = (((1 << TBITW_IPRI) + INT.INTPRI[intno]))$
+	$ELSE$
+		$intpri = +255 $
+	$END$
+	$TAB$$FORMAT("UINT8_C(0x%02x), /* 0x%03x */", intpri, +intno)$$NL$
+$END$
+};$NL$
+$NL$
+
+$ 
+$  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯æ¯ã®å²è¾¼ã¿ãè¨±å¯ããå²è¾¼ã¿
+$ 
+const uint32_t _kernel_iipm_enable_irq_tbl[]={$NL$
+$FOREACH intpri {-4,-3,...,0}$
+	$enable_mask = 0$
+	$FOREACH intno RANGE(16, TMAX_INTNO)$
+		$IF LENGTH(INT.INTNO[intno]) && (INT.INTPRI[intno] < intpri)$
+			$enable_mask = enable_mask | (1 << (intno - 16))$
+		$END$
+	$END$
+	$TAB$$FORMAT("UINT32_C(0x%08x), /* %d(%d) */", enable_mask, intpri+4, intpri)$$NL$
+$END$
+};$NL$
+$NL$
+
+const uint8_t _kernel_iipm_enable_systic_tbl[]={$NL$
+$FOREACH intpri {-4,-3,...,0}$
+	$enable_mask = 0$
+	$IF LENGTH(INT.INTNO[15]) && (INT.INTPRI[15] < intpri)$
+		$enable_mask = 1$
+	$END$
+	$TAB$$FORMAT("UINT8_C(0x%02x), /* %d(%d) */", enable_mask, intpri+4, intpri)$$NL$
+$END$
+};$NL$
+$END$
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_asm.inc
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_asm.inc	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_asm.inc	(revision 136)
@@ -0,0 +1,92 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_asm.inc 2448 2013-02-05 12:27:28Z ertl-honda $
+ */
+
+#ifndef TOPPERS_CORE_ASM_INC
+#define TOPPERS_CORE_ASM_INC
+
+/*
+ *  ATHUMBç¸å½ã®å®ç¾©
+ */
+.macro __athumb name
+	.syntax unified
+	.thumb
+	.thumb_func
+	.type name, function
+.endm
+
+/*
+ *  ãã£ã¬ã¯ãã£ãã®ãã¯ã­å®ç¾©
+ */
+#define ASECTION(name) .section name,"a"
+#define ATEXT          .text
+#define AGLOBAL(name)  .global name
+#define ABALIGN(x)     .balign x
+#define ALONG          .long
+#define ALABEL(label)  label:
+#define AOR            |
+#define ATHUMB(name)        __athumb name
+#define AWEAK(name)    .weak name
+
+/*
+ *  ã»ã¯ã·ã§ã³æ
+å ±
+ */
+#define DATA_START  __data_start
+#define IDATA_START __idata_start
+#define IDATA_END   __idata_end
+#define BSS_START   __bss_start
+#define BSS_END     __bss_end
+
+#endif /* TOPPERS_CORE_ASM_INC */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_cfg1_out.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_cfg1_out.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_cfg1_out.h	(revision 136)
@@ -0,0 +1,35 @@
+/*
+ *  @(#) $Id: core_cfg1_out.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *		cfg1_out.cããªã³ã¯ããããã«å¿
+è¦ãªã¹ã¿ãã®å®ç¾©
+ */
+void sta_ker(void){}
+
+/* 
+ *  ãªãã»ãããã¡ã¤ã«ãçæããããã®å®ç¾© 
+ */ 
+const uint8_t   MAGIC_1 = 0x12; 
+const uint16_t  MAGIC_2 = 0x1234; 
+const uint32_t  MAGIC_4 = 0x12345678;
+
+const TCB	TCB_enatex = {
+	{ NULL, NULL },			/* task_queue */
+	NULL,					/* p_tinib */
+	0U,						/* tstat */
+#ifdef TOPPERS_SUPPORT_MUTEX
+	0U,						/* bpriority */
+#endif /* TOPPERS_SUPPORT_MUTEX */
+	0U,						/* priority */
+	false,					/* acqeue */
+	false,					/* wupque */
+	true,					/* enatex */
+	0U,						/* texprn */
+	NULL,					/* p_winifo */
+#ifdef TOPPERS_SUPPORT_MUTEX
+	{ NULL, NULL },			/* mutex_queue */
+#endif /* TOPPERS_SUPPORT_MUTEX */
+	{ NULL, NULL }			/* tskctxb */
+};
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_check.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_check.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_check.tf	(revision 136)
@@ -0,0 +1,8 @@
+$ 
+$ 		ãã¹3ã®ãã­ã»ããµä¾å­ãã³ãã¬ã¼ãï¼ARM-Mç¨ï¼
+$ 
+
+$ 
+$  æ¨æºãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ã
+$ 
+$INCLUDE "kernel/kernel_check.tf"$
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_config.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_config.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_config.c	(revision 136)
@@ -0,0 +1,334 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_config.c 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *		ã³ã¢ä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARM-Mç¨ï¼
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+
+/*
+ *  TOPPERSæ¨æºå²è¾¼ã¿å¦çã¢ãã«å®ç¾ã®ããã®å¤æ°ã¨åæåå¦ç
+ *  ARMv6-Mã¨ARMv7-Mã§ç°ãªãããifdefã«åãåãã¦ãã
+ */
+
+#if __TARGET_ARCH_THUMB == 4
+
+volatile bool_t		lock_flag;		/* CPUã­ãã¯ãã©ã°ã®å¤ãä¿æããå¤æ° */
+volatile uint32_t	saved_iipm;		/* å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãä¿å­ããå¤æ° */
+
+static void
+init_intmodel(void){
+	lock_flag = true;
+	saved_iipm = IIPM_ENAALL;
+}
+
+#else /* __TARGET_ARCH_THUMB == 3 */
+
+uint32_t ief;			/* IRQã®å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°ã®ç¶æ
+ */
+uint8_t  ief_systick;	/* SysTickã®å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°ã®ç¶æ
+ */
+uint8_t  iipm;			/* ç¾å¨ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤ */
+
+static void
+init_intmodel(void){
+	ief = 0x00;
+	ief_systick = 0x00;
+	iipm = INT_IPM(0);
+}
+
+#endif /* __TARGET_ARCH_THUMB == 4 */
+
+/*
+ *  ãã¯ã¿ãã¼ãã«(kernel_cfg.c)
+ */
+extern const FP vector_table[];
+
+/*
+ *  ã·ã¹ãã ä¾å¤ã»å²è¾¼ã¿ã®ï¼ä¾å¤çªå· 4ï½15ï¼
+ *  å²è¾¼ã¿åªå
+åº¦è¨­å®ã¬ã¸ã¹ã¿ã¸ã®ã¢ã¯ã»ã¹ã®ããã®é
+å
+ */
+static const unsigned int nvic_sys_pri_reg[] = {
+	0,
+	NVIC_SYS_PRI1,
+	NVIC_SYS_PRI2,
+	NVIC_SYS_PRI3
+};
+
+/*
+ *  ä¾å¤ã¨å²è¾¼ã¿ã®å²è¾¼ã¿åªå
+åº¦ãã»ãã
+ *
+ *  excnoã¯ARM-Mã§å®ãããã¦ãã Exception Number ãæå®ï¼
+ */
+void
+set_exc_int_priority(uint32_t excno, uint32_t nvic_ipm){
+	uint32_t tmp, reg;
+
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦è¨­å®ã¬ã¸ã¹ã¿ã®æ±ºå®
+	 */
+	if ((EXCNO_MPU <= excno) && (excno <= IRQNO_SYSTICK)) {
+		/*
+		 * Exception Number 4(Memory Management)ãã
+		 * Exception Number 15(SysTick)ã¾ã§ã®å²è¾¼ã¿åªå
+åº¦ã¯ã·ã¹ãã åªå
+åº¦
+		 * ã¬ã¸ã¹ã¿ã«ããè¨­å®ï¼
+		 */
+		reg = nvic_sys_pri_reg[excno >> 2];
+	}
+	else if ((TMIN_INTNO < excno) && (excno <= TMAX_INTNO)){
+		/*
+		 * IRQå²è¾¼ã¿ãªã
+		 */
+		reg = NVIC_PRI0 + (((excno - (TMIN_INTNO + 1)) >> 2) * 4);
+	}
+	else {
+		return ;
+	}
+
+	tmp = sil_rew_mem((void *)reg);
+	tmp &= ~(0xFF << (8 * (excno & 0x03)));
+	tmp |= nvic_ipm << (8 * (excno & 0x03));
+	sil_wrw_mem((void *)reg, tmp);
+}
+
+/*
+ *  ä¾å¤ã®è¨±å¯
+ *
+ *  Memory Management, Bus Fault, Usage Fault ã¯ç¦æ­¢ã»è¨±å¯ãå¯è½
+ */
+void
+enable_exc(EXCNO excno)
+{
+	uint32_t tmp;
+
+	switch (excno) {
+	  case EXCNO_MPU:
+		tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
+		tmp |= NVIC_SYS_HND_CTRL_MEM;
+		sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
+		break;
+	  case EXCNO_BUS:
+		tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
+		tmp |= NVIC_SYS_HND_CTRL_BUS;
+		sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
+		break;
+	  case EXCNO_USAGE:
+		tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
+		tmp |= NVIC_SYS_HND_CTRL_USAGE;
+		sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
+		break;
+	}
+}
+
+/*
+ *  ä¾å¤ã®ç¦æ­¢
+ */
+void
+disable_exc(EXCNO excno)
+{
+	uint32_t tmp;
+
+	switch (excno) {
+	  case EXCNO_MPU:
+		tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
+		tmp &= ~NVIC_SYS_HND_CTRL_MEM;
+		sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
+		break;
+	  case EXCNO_BUS:
+		tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
+		tmp &= ~NVIC_SYS_HND_CTRL_BUS;
+		sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
+		break;
+	  case EXCNO_USAGE:
+		tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
+		tmp &= ~NVIC_SYS_HND_CTRL_USAGE;
+		sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
+		break;
+	}
+}
+
+
+/*
+ *  ã³ã¢ä¾å­ã®åæå
+ */
+void
+core_initialize(void)
+{
+	/*
+	 *  ãã¯ã¿ãã¼ãã«ãè¨­å®
+	 */
+	sil_wrw_mem((void*)NVIC_VECTTBL, (uint32_t)vector_table);
+
+	/*
+	 *  åä¾å¤ã®åªå
+åº¦ãè¨­å®
+	 *  CPUã­ãã¯ç¶æ
+ã§ãçºçããããã«ï¼BASEPRIã¬ã¸ã¹ã¿ã§ãã¹ã¯ã§ã
+	 *  ãªã'0'ã¨ããï¼
+	 */
+	set_exc_int_priority(EXCNO_HARD, 0);
+	set_exc_int_priority(EXCNO_MPU, 0);
+	set_exc_int_priority(EXCNO_BUS, 0);
+	set_exc_int_priority(EXCNO_USAGE, 0);
+	set_exc_int_priority(EXCNO_SVCALL, 0);
+	set_exc_int_priority(EXCNO_DEBUG, 0);
+	set_exc_int_priority(EXCNO_PENDSV, 0);
+
+	/*
+	 *  å²è¾¼ã¿å¦çã¢ãã«é¢é£ã®åæå
+	 */
+	init_intmodel();
+}
+
+/*
+ *  ã³ã¢ä¾å­ã®çµäºå¦ç
+ */
+void
+core_terminate(void)
+{
+	extern void    software_term_hook(void);
+	void (*volatile fp)(void) = software_term_hook;
+
+	/*
+	 *  software_term_hookã¸ã®ãã¤ã³ã¿ãï¼ä¸æ¦volatileæå®ã®ããfpã«ä»£
+	 *  å
+¥ãã¦ããä½¿ãã®ã¯ï¼0ã¨ã®æ¯è¼ãæé©åã§åé¤ãããªãããã«ããã
+	 *  ãã§ããï¼
+	 */
+	if (fp != 0) {
+		(*fp)();
+	}
+}
+
+/*
+ *  å²è¾¼ã¿è¦æ±ã©ã¤ã³å±æ§ã®è¨­å®
+ */
+void
+x_config_int(INTNO intno, ATR intatr, PRI intpri)
+{
+	assert(VALID_INTNO_CFGINT(intno));
+	assert(TMIN_INTPRI <= intpri && intpri <= TMAX_INTPRI);
+
+	/* 
+	 *  ä¸æ¦å²è¾¼ã¿ãç¦æ­¢ãã
+	 */    
+	(void)x_disable_int(intno);
+
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã»ãã
+	 */
+	set_exc_int_priority(intno, INT_NVIC_PRI(intpri));
+
+	/*
+	 *  å²è¾¼ã¿è¦æ±ãã¹ã¯è§£é¤(å¿
+è¦ãªå ´å)
+	 */
+	if ((intatr & TA_ENAINT) != 0U) {
+		(void) x_enable_int(intno);
+	}    
+}
+
+
+#ifndef OMIT_DEFAULT_EXC_HANDLER
+/*
+ *  æªå®ç¾©ã®ä¾å¤ãçºçããã¨å¼ã³åºããã
+ */
+void
+default_exc_handler(void *p_excinf)
+{
+	uint32_t basepri = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_IIPM);
+	uint32_t pc      = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_PC);
+	uint32_t xpsr    = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_XPSR);
+	uint32_t excno   = get_ipsr() & IPSR_ISR_NUMBER;
+
+	syslog(LOG_EMERG, "\nUnregistered Exception occurs.");
+	syslog(LOG_EMERG, "Excno = 0x%08X, PC = 0x%08X, XPSR = 0x%08X, iipm = 0x%08X, p_excinf = 0x%08X",
+		   excno, pc, xpsr, basepri, p_excinf);	
+
+	target_exit();
+}
+#endif /* OMIT_DEFAULT_EXC_HANDLER */
+
+#ifndef OMIT_DEFAULT_INT_HANDLER
+/*
+ *  æªç»é²ã®å²è¾¼ã¿ãçºçããå ´åã«å¼ã³åºããã
+ */
+void
+default_int_handler(void *p_excinf)
+{
+	uint32_t basepri = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_IIPM);
+	uint32_t pc      = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_PC);
+	uint32_t xpsr    = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_XPSR);
+	uint32_t excno   = get_ipsr() & IPSR_ISR_NUMBER;
+
+	syslog(LOG_EMERG, "\nUnregistered Interrupt occurs.");
+	syslog(LOG_EMERG, "Excno = 0x%08X, PC = 0x%08X, XPSR = 0x%08X, iipm = 0x%08X, p_excinf = 0x%08X",
+		   excno, pc, xpsr, basepri, p_excinf);	
+
+	target_exit();
+}
+#endif /* OMIT_DEFAULT_INT_HANDLER */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_config.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_config.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_config.h	(revision 136)
@@ -0,0 +1,808 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011,2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_config.h 2704 2015-11-21 15:50:12Z ertl-honda $
+ */
+
+/*
+ *		ãã­ã»ããµä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARM-Mç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼target_config.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯
+ *  ã«ã¼ãããããã¡ã¤ã«ï¼ã®ã¿ããã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡ã¤ã«ãã
+ *  ç´æ¥ã¤ã³ã¯ã«ã¼ããã¦ã¯ãªããªãï¼
+ */
+#ifndef TOPPERS_CORE_CONFIG_H
+#define TOPPERS_CORE_CONFIG_H
+
+/*
+ *  ã¨ã©ã¼ãã§ãã¯æ¹æ³ã®æå®
+ */
+#define CHECK_STKSZ_ALIGN	8	/* ã¹ã¿ãã¯ãµã¤ãºã®ã¢ã©ã¤ã³åä½ */
+#define CHECK_FUNC_ALIGN	1	/* é¢æ°ã®ã¢ã©ã¤ã³åä½ */
+#define CHECK_FUNC_NONNULL		/* é¢æ°ã®éNULLãã§ãã¯ */
+#define CHECK_STACK_ALIGN	8	/* ã¹ã¿ãã¯é åã®ã¢ã©ã¤ã³åä½ */
+#define CHECK_STACK_NONNULL		/* ã¹ã¿ãã¯é åã®éNULLãã§ãã¯ */
+#define CHECK_MPF_ALIGN		4	/* åºå®é·ã¡ã¢ãªãã¼ã«é åã®ã¢ã©ã¤ã³åä½ */
+#define CHECK_MPF_NONNULL		/* åºå®é·ã¡ã¢ãªãã¼ã«é åã®éNULLãã§ãã¯ */
+#define CHECK_MB_ALIGN		4	/* ç®¡çé åã®ã¢ã©ã¤ã³åä½ */
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ãã­ã»ããµã®ç¹æ®å½ä»¤ã®ã¤ã³ã©ã¤ã³é¢æ°å®ç¾©
+ */
+#include <core_insn.h>
+
+/*
+ *  éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯åæå¤
+ */
+#define TOPPERS_ISTKPT(istk, istksz) ((STK_T *)((uint8_t *)(istk) + (istksz)))
+
+/*
+ *  ã¿ã¹ã¯ã³ã³ãã­ã¹ããã­ãã¯ã®å®ç¾©
+ */
+typedef struct task_context_block {
+	void	*sp;		/* ã¹ã¿ãã¯ãã¤ã³ã¿ */
+	FP		pc;			/* ãã­ã°ã©ã ã«ã¦ã³ã¿ */
+} TSKCTXB;
+
+/*
+ *  ã³ã³ãã­ã¹ãã®åç
+§
+ *
+ */
+Inline bool_t
+sense_context(void)
+{
+	/*
+	 *  PSPãæå¹ãªãã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼MSPãæå¹ãªãéã¿ã¹ã¯ã³ã³ãã­ã¹ã
+	 *  ã¨ããï¼ 
+	 */
+	if ((get_control() & CONTROL_PSP) == CONTROL_PSP){
+		return false;
+	}
+	else {
+		return true;
+	}
+}
+
+/*
+ *  ã¹ã¿ã¼ãã¢ããã«ã¼ãã³ï¼start.Sï¼
+ */
+extern void _start(void);
+
+/*
+ *  æé«åªå
+é ä½ã¿ã¹ã¯ã¸ã®ãã£ã¹ãããï¼core_support.Sï¼
+ *
+ *  dispatchã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãããå¼ã³åºããããµã¼ãã¹ã³ã¼ã«å¦çã
+ *  ãå¼ã³åºãã¹ããã®ã§ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»ãã£ã¹ãã
+ *  ãè¨±å¯ç¶æ
+ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§å¼ã³åºããª
+ *  ããã°ãªããªãï¼
+ */
+extern void dispatch(void);
+
+/*
+ *  ãã£ã¹ãããã£ã®åä½éå§ï¼core_support.Sï¼
+ *
+ *  start_dispatchã¯ï¼ã«ã¼ãã«èµ·åæã«å¼ã³åºãã¹ããã®ã§ï¼ãã¹ã¦ã®å²è¾¼
+ *  ã¿ãç¦æ­¢ããç¶æ
+ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨åç­ã®ç¶æ
+ï¼ã§å¼ã³åºããªããã°
+ *  ãªããªãï¼
+ */
+extern void start_dispatch(void) NoReturn;
+
+/*
+ *  ç¾å¨ã®ã³ã³ãã­ã¹ããæ¨ã¦ã¦ãã£ã¹ãããï¼core_support.Sï¼
+ *
+ *  exit_and_dispatchã¯ï¼ext_tskããå¼ã³åºãã¹ããã®ã§ï¼ã¿ã¹ã¯ã³ã³ãã­
+ *  ã¹ãã»CPUã­ãã¯ç¶æ
+ã»ãã£ã¹ãããè¨±å¯ç¶æ
+ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+
+ *  åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§å¼ã³åºããªããã°ãªããªãï¼
+ */
+extern void exit_and_dispatch(void) NoReturn;
+
+/*
+ *  ã«ã¼ãã«ã®çµäºå¦çã®å¼åºãï¼core_support.Sï¼
+ *
+ *  call_exit_kernelã¯ï¼ã«ã¼ãã«ã®çµäºæã«å¼ã³åºãã¹ããã®ã§ï¼éã¿ã¹ã¯
+ *  ã³ã³ãã­ã¹ãã«åãæãã¦ï¼ã«ã¼ãã«ã®çµäºå¦çï¼exit_kernelï¼ãå¼ã³åº
+ *  ãï¼
+ */
+extern void call_exit_kernel(void) NoReturn;
+
+/*
+ *  ã¿ã¹ã¯ã³ã³ãã­ã¹ãã®åæå
+ *
+ *  ã¿ã¹ã¯ãä¼æ­¢ç¶æ
+ããå®è¡ã§ããç¶æ
+ã«ç§»è¡ããæã«å¼ã°ããï¼ãã®æç¹
+ *  ã§ã¹ã¿ãã¯é åãä½¿ã£ã¦ã¯ãªããªãï¼
+ *
+ *  activate_contextãï¼ã¤ã³ã©ã¤ã³é¢æ°ã§ã¯ãªããã¯ã­å®ç¾©ã¨ãã¦ããã®ã¯ï¼
+ *  ãã®æç¹ã§ã¯TCBãå®ç¾©ããã¦ããªãããã§ããï¼
+ */
+extern void start_r(void);
+
+#define activate_context(p_tcb)											\
+{																		\
+	(p_tcb)->tskctxb.sp = (void *)((uint8_t *)((p_tcb)->p_tinib->stk)	\
+								+ (p_tcb)->p_tinib->stksz);				\
+	(p_tcb)->tskctxb.pc = (FP) start_r;									\
+}
+
+/*
+ *  calltexã¯ä½¿ç¨ããªã
+ */
+#define OMIT_CALLTEX
+
+/*
+ *  å²è¾¼ã¿çªå·ã»å²è¾¼ã¿ãã³ãã©çªå·
+ *
+ *  å²è¾¼ã¿ãã³ãã©çªå·(inhno)ã¨å²è¾¼ã¿çªå·(intno)ã¯ï¼å²ãè¾¼ã¿çºçæã«
+ *  IPSRã«è¨­å®ãããä¾å¤çªå·ã¨ããï¼ 
+ */
+
+/*
+ *  å²è¾¼ã¿çªå·ã®ç¯å²ã®å¤å®
+ */
+#define VALID_INTNO(intno)           ((TMIN_INTNO <= (intno)) && ((intno) <= TMAX_INTNO))
+#define VALID_INTNO_DISINT(intno)    VALID_INTNO(intno)
+#define VALID_INTNO_CFGINT(intno)    VALID_INTNO(intno)
+
+/*
+ *  å²è¾¼ã¿ãã³ãã©ã®è¨­å®
+ *
+ *  ãã¯ãã«çªå·inhnoã®å²è¾¼ã¿ãã³ãã©ã®èµ·åçªå°int_entryã«è¨­å®ããï¼å²è¾¼ã¿
+ *  ãã³ãã©ãã¼ãã«
+ */
+Inline void
+x_define_inh(INHNO inhno, FP int_entry)
+{
+
+}
+
+/*
+ *  å²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦çã®çæãã¯ã­
+ *
+ */
+#define INT_ENTRY(inhno, inthdr)    inthdr
+#define INTHDR_ENTRY(inhno, inhno_num, inthdr) extern void inthdr(void);
+
+/*
+ *  å²è¾¼ã¿è¦æ±ã©ã¤ã³ã®å±æ§ã®è¨­å®
+ */
+extern void x_config_int(INTNO intno, ATR intatr, PRI intpri);
+
+/*
+ *  å²è¾¼ã¿ãã³ãã©å
+¥å£ã§å¿
+è¦ãªIRCæä½
+ */
+Inline void
+i_begin_int(INTNO intno)
+{
+}
+
+/*
+ *  å²è¾¼ã¿ãã³ãã©ã®åºå£ã§å¿
+è¦ãªIRCæä½
+ */
+Inline void
+i_end_int(INTNO intno)
+{
+}
+
+/*
+ *  CPUä¾å¤ã¨ã³ããªï¼core_support.Sï¼
+ */
+extern void core_exc_entry(void);
+
+/*
+ *  å²è¾¼ã¿ã¨ã³ããªï¼core_support.Sï¼
+ */
+extern void core_int_entry(void);
+
+/*
+ *  ãã­ã»ããµä¾å­ã®åæå
+ */
+extern void core_initialize(void);
+
+/*
+ *  ãã­ã»ããµä¾å­ã®çµäºæå¦ç
+ */
+extern void core_terminate(void);
+
+/*
+ * ç»é²ããã¦ããªãä¾å¤ãçºçããã¨å¼ã³åºããã
+ */
+extern void default_exc_handler(void *p_excinf);
+
+/*
+ * æªç»é²ã®å²è¾¼ã¿ãçºçããå ´åã«å¼ã³åºããã
+ */
+extern void default_int_handler(void *p_excinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ARMv7-Mã¨ARMv6-Mã§ç°ãªãå¦ç
+ *  ARMv6-Mã®å¦çã¯core_config_armv6m.hã«è¨è¿°ãã
+ */
+#if __TARGET_ARCH_THUMB == 4
+
+/*
+ *  ARMv7-Mã«é¢ããå¦ç
+ */
+  
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®ãªãã¸ã§ã¯ãå±æ§
+ */
+#define TARGET_INHATR  TA_NONKERNEL /* ã¿ã¼ã²ããå®ç¾©ã®å²è¾¼ã¿ãã³ãã©å±æ§ */
+
+/*
+ *  TOPPERSæ¨æºå²è¾¼ã¿å¦çã¢ãã«ã®å®ç¾
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã¨ãã¦ã¯ï¼BASEPRIãç¨ããï¼å
+¨å²è¾¼ã¿ãç¦æ­¢ãã
+ *  æ©è½ã¨ãã¦ï¼FAULTMASKãPRIMASKããããï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã
+ *  ãµãã¼ãããããï¼ãããã¯CPUã­ãã¯ã®ããã«ç¨ããªãï¼
+ *  ãã®ããï¼BASEPRIãç¨ãã¦æ¬ä¼¼çã«CPUã­ãã¯ãã©ã°ãå®ç¾ããï¼
+ *
+ *  ã¾ãï¼CPUã­ãã¯ç¶æ
+ãç®¡çãããã®å¤æ°(lock_flag)ãç¨æããï¼
+ *
+ *  CPUã­ãã¯ãã©ã°ãã¯ãªã¢ããã¦ããéã¯ï¼BASEPRIãã¢ãã«ä¸ã®å²è¾¼ã¿
+ *  åªå
+åº¦ãã¹ã¯ã®å¤ã«è¨­å®ããï¼ãã®éã¯ï¼ã¢ãã«ä¸ã®å²è¾¼ã¿åªå
+åº¦ãã¹
+ *  ã¯ã¯ï¼BASEPRIãç¨ããï¼
+ * 
+ *  ããã«å¯¾ãã¦CPUã­ãã¯ãã©ã°ãã»ããããããéã¯ï¼BASEPRIãï¼ã«ã¼ã
+ *  ã«ç®¡çå¤ã®ãã®ãé¤ããã¹ã¦ã®å²è¾¼ã¿è¦æ±ããã¹ã¯ããå¤(TIPM_LOCK)ã¨ï¼
+ *  ã¢ãã«ä¸ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã¨ã®é«ãæ¹ã«è¨­å®ããï¼ãã®éã®ã¢ãã«ä¸
+ *  ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã¯ï¼ãã®ããã®å¤æ°(saved_iipm, å
+é¨è¡¨ç¾ã§ä¿æ)
+ *  ãç¨æãã¦ä¿æããï¼
+ */
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤é¨è¡¨ç¾ã¨å
+é¨è¡¨ç¾ã®å¤æ
+ *
+ *  ã¢ã»ã³ããªè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ããã¤ã³ã¯ã«ã¼ãããå ´åã®ããã«ï¼
+ *  CASTãä½¿ç¨
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+(TBITW_IPRI)ã 8 ã®å ´åã¯ï¼å
+é¨åªå
+åº¦ 255
+ *  ã¯ï¼å¤é¨åªå
+åº¦ -1 ã«å¯¾å¿ããï¼
+ */
+#define EXT_IPM(iipm)   (CAST(PRI,((iipm >> (8 - TBITW_IPRI)) - (1 << TBITW_IPRI))))       /* å
+é¨è¡¨ç¾ãå¤é¨è¡¨ç¾ã« */
+#define INT_IPM(ipm)    (((1 << TBITW_IPRI) - CAST(uint8_t, -(ipm)))  << (8 - TBITW_IPRI)) /* å¤é¨è¡¨ç¾ãå
+é¨è¡¨ç¾ã« */
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãNVICã®åªå
+åº¦ã«å¤æ
+ */
+#define INT_NVIC_PRI(ipm)    INT_IPM(ipm)
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã§ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯
+ */
+#define TIPM_LOCK    TMIN_INTPRI
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã§ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å
+é¨è¡¨ç¾
+ *
+ *  TIPM_LOCKã¯ï¼CPUã­ãã¯ç¶æ
+ã§ã®BASEPRIã®å¤ï¼ã«ã¼ãã«ç®¡çå¤ã®ãã®ã
+ *  é¤ããã¹ã¦ã®å²è¾¼ã¿ããã¹ã¯ããå¤ã«å®ç¾©ããï¼  
+ */
+#define IIPM_LOCK    INT_IPM(TIPM_LOCK)
+
+/*
+ *  TIPM_ENAALLï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ï¼ã®å
+é¨è¡¨ç¾
+ *
+ *  BASEPRIã« '0' ãè¨­å®ãããã¨ã§ï¼å
+¨å²è¾¼ã¿ãè¨±å¯ããï¼
+ */
+#define IIPM_ENAALL  (0)
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  CPUã­ãã¯ãã©ã°å®ç¾ã®ããã®å¤æ°
+ * 
+ *  ãããã®å¤æ°ã¯ï¼CPUã­ãã¯ç¶æ
+ã®æã®ã¿æ¸ãæãã¦ãããã¨ããï¼
+ *  ã¤ã³ã©ã¤ã³é¢æ°ä¸­ã§ï¼ã¢ã¯ã»ã¹ã®é åºãå¤åããªãããï¼volatile ãæå®ï¼ 
+ */
+extern volatile bool_t  lock_flag;    /* CPUã­ãã¯ãã©ã°ã®å¤ãä¿æããå¤æ° */
+extern volatile uint32_t saved_iipm;  /* å²è¾¼ã¿åªå
+åº¦ããã¹ã¯ããå¤æ° */
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã¸ã®ç§»è¡
+ *
+ *  BASEPRIï¼ãã¼ãã¦ã§ã¢ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼ãï¼saved_iipmã«ä¿å­ãï¼
+ *  ã«ã¼ãã«ç®¡çå¤ã®ãã®ãé¤ããã¹ã¦ã®å²è¾¼ã¿ããã¹ã¯ããå¤ï¼TIPM_LOCKï¼
+ *  ã«è¨­å®ããï¼ã¾ãï¼lock_flagãtrueã«ããï¼
+ *
+ *  BASEPRIãï¼æåããTIPM_LOCKã¨åããããããé«ãå ´åã«ã¯ï¼ããã
+ *  saved_iipmã«ä¿å­ããã®ã¿ã§ï¼TIPM_LOCKã«ã¯è¨­å®ããªãï¼ããã¯ï¼ã¢ãã«
+ *  ä¸ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãï¼TIPM_LOCKã¨åããããããé«ãã¬ãã«ã«è¨­å®
+ *  ããã¦ããç¶æ
+ã«ãããï¼
+ *
+ *  ãã®é¢æ°ã¯ï¼CPUã­ãã¯ç¶æ
+ï¼lock_flagãtrueã®ç¶æ
+ï¼ã§å¼ã°ãããã¨ã¯
+ *  ãªããã®ã¨æ³å®ãã¦ããï¼
+ */
+Inline void
+x_lock_cpu(void)
+{
+	uint32_t iipm;
+
+	/*
+	 *  get_basepri()ã®è¿ãå¤ãç´æ¥saved_iipmã«ä¿å­ããï¼ä¸æå¤æ°iipm
+	 *  ãç¨ãã¦ããã®ã¯ï¼get_baespri()ãå¼ãã ç´å¾ã«å²è¾¼ã¿ãçºçãï¼
+	 *  èµ·åãããå²è¾¼ã¿å¦çã§saved_iipmãå¤æ´ãããå¯è½æ§ãããããã§
+	 *  ããï¼
+	 */
+	iipm = get_basepri();
+	/*
+	 *  BASEPRIã¬ã¸ã¹ã¿ã¯å¤ãå°ããã»ã©åªå
+åº¦ãé«ããï¼IIPM_ENAALL ã
+	 *  '0'ã§ããããï¼åç´ã«åªå
+åº¦æ¯è¼ã ãã§ã¯ä¸ååã§ããï¼
+	 */
+	if ((IIPM_LOCK < iipm) || (IIPM_ENAALL == iipm)) {
+		set_basepri(IIPM_LOCK);
+	}
+	saved_iipm = iipm;
+	lock_flag = true;
+
+	/* ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åå¾ã§ã¡ã¢ãªãæ¸ãæããå¯è½æ§ããã */
+	ARM_MEMORY_CHANGED;    
+}
+
+#define t_lock_cpu()    x_lock_cpu()
+#define i_lock_cpu()    x_lock_cpu()
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã®è§£é¤
+ *
+ *  lock_flagãfalseã«ãï¼IPMï¼ãã¼ãã¦ã§ã¢ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼ãï¼
+ *  saved_iipmã«ä¿å­ããå¤ã«æ»ãï¼
+ *
+ *  ãã®é¢æ°ã¯ï¼CPUã­ãã¯ç¶æ
+ï¼lock_flagãtrueã®ç¶æ
+ï¼ã§ã®ã¿å¼ã°ããã
+ *  ã®ã¨æ³å®ãã¦ããï¼
+ */
+Inline void
+x_unlock_cpu(void)
+{
+	/* ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åå¾ã§ã¡ã¢ãªãæ¸ãæããå¯è½æ§ããã */
+	ARM_MEMORY_CHANGED;
+	lock_flag = false;
+	set_basepri(saved_iipm);
+}
+
+#define t_unlock_cpu()    x_unlock_cpu()
+#define i_unlock_cpu()    x_unlock_cpu()
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã®åç
+§
+ */
+Inline bool_t
+x_sense_lock(void)
+{
+	return(lock_flag);
+}
+
+#define t_sense_lock()    x_sense_lock()
+#define i_sense_lock()    x_sense_lock()
+
+/*
+ *  chg_ipmã§æå¹ãªå²è¾¼ã¿åªå
+åº¦ã®ç¯å²ã®å¤å®
+ *
+ *  TMIN_INTPRIã®å¤ã«ãããï¼chg_ipmã§ã¯ï¼-(1 << TBITW_IPRI)ï½TIPM_ENAALLï¼ï¼0ï¼
+ *  ã®ç¯å²ã«è¨­å®ã§ãããã¨ã¨ããï¼ã¿ã¼ã²ããå®ç¾©ã®æ¡å¼µï¼ï¼
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+(TBITW_IPRI)ã 8 ã®å ´åã¯ï¼-256 ï½ 0 ãæå®å¯è½ã§ããï¼
+ *   
+ */
+#define VALID_INTPRI_CHGIPM(intpri) \
+				((-((1 << TBITW_IPRI) - 1) <= (intpri) && (intpri) <= TIPM_ENAALL))
+
+/*
+ * ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®è¨­å®
+ *
+ *  CPUã­ãã¯ãã©ã°ãã¯ãªã¢ããã¦ããæã¯ï¼ãã¼ãã¦ã§ã¢ã®å²è¾¼ã¿åªå
+åº¦ã
+ *  ã¹ã¯ãè¨­å®ããï¼CPUã­ãã¯ãã©ã°ãã»ããããã¦ããæã¯ï¼saved_iipm
+ *  ãè¨­å®ãï¼ããã«ï¼ãã¼ãã¦ã§ã¢ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãï¼è¨­å®ãããã¨
+ *  ããï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã¨TIPM_LOCKã®é«ãæ¹ã«è¨­å®ããï¼
+ */
+Inline void
+x_set_ipm(PRI intpri)
+{
+	uint8_t   iipm = INT_IPM(intpri);
+
+	if (intpri == TIPM_ENAALL){
+		iipm = IIPM_ENAALL;
+	}
+
+	if (!lock_flag) {
+		set_basepri(iipm);
+	}
+	else {
+		saved_iipm = iipm;
+		/*
+		 *  BASEPRIã¬ã¸ã¹ã¿ã¯å¤ãå°ããã»ã©åªå
+åº¦ãé«ããï¼IIPM_ENAALL ã
+		 *  '0'ã§ããããï¼åç´ã«åªå
+åº¦æ¯è¼ã ãã§ã¯ä¸ååã§ããï¼
+		 */
+		if ((iipm < IIPM_LOCK ) && (IIPM_ENAALL != iipm)) {
+			set_basepri(iipm);
+		}
+		else {
+			set_basepri(IIPM_LOCK);
+		}
+	}
+}
+
+#define t_set_ipm(intpri)    x_set_ipm(intpri)
+#define i_set_ipm(intpri)    x_set_ipm(intpri)
+
+/*
+ * ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®åç
+§
+ *
+ *  CPUã­ãã¯ãã©ã°ãã¯ãªã¢ããã¦ããæã¯ãã¼ãã¦ã§ã¢ã®å²è¾¼ã¿åªå
+åº¦ã
+ *  ã¹ã¯ãï¼ã»ããããã¦ããæã¯saved_iipmãåç
+§ããï¼
+ */
+Inline PRI
+x_get_ipm(void)
+{
+	uint8_t iipm;
+
+	if (!lock_flag) {
+		iipm = get_basepri();
+	}
+	else {
+		iipm = saved_iipm;
+	}
+
+	if (iipm == IIPM_ENAALL) {
+		return(TIPM_ENAALL);
+	}
+	else {
+		return(EXT_IPM(iipm));
+	}
+}
+
+#define t_get_ipm()    x_get_ipm()
+#define i_get_ipm()    x_get_ipm()
+
+/*
+ *  å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°
+ */
+
+/*
+ *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããããå¤å¥ããããã®å¤æ°ï¼kernel_cfg.cï¼
+ */
+extern const uint32_t	bitpat_cfgint[];
+
+/*
+ *  å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°ã®ã»ãã
+ *
+ *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããªãå²è¾¼ã¿è¦æ±ã©ã¤ã³ã«å¯¾ãã¦å²è¾¼ã¿è¦æ±ç¦æ­¢
+ *  ãã©ã°ãã¯ãªã¢ãããã¨ããå ´åã«ã¯ï¼falseãè¿ãï¼  
+ */
+Inline bool_t
+x_disable_int(INTNO intno)
+{
+	uint32_t tmp;
+
+	/*
+	 *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããªãå ´å
+	 */
+	if ((bitpat_cfgint[intno >> 5] & (1 << (intno & 0x1f))) == 0x00) {
+		return(false);
+	}
+
+	if (intno == IRQNO_SYSTICK) {
+		tmp = sil_rew_mem((void *)SYSTIC_CONTROL_STATUS);
+		tmp &= ~SYSTIC_TICINT;
+		sil_wrw_mem((void *)SYSTIC_CONTROL_STATUS, tmp);
+	}else {
+		tmp = intno - 16;
+		sil_wrw_mem((void *)((uint32_t *)NVIC_CLRENA0 + (tmp >> 5)),
+					(1 << (tmp & 0x1f)));
+	}
+
+	return(true);
+}
+
+#define t_disable_int(intno) x_disable_int(intno)
+#define i_disable_int(intno) x_disable_int(intno)
+
+/*
+ *  å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°ã®è§£é¤
+ *
+ *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããªãå²è¾¼ã¿è¦æ±ã©ã¤ã³ã«å¯¾ãã¦å²è¾¼ã¿è¦æ±ç¦æ­¢
+ *  ãã©ã°ãã¯ãªã¢ãããã¨ããå ´åã«ã¯ï¼falseãè¿ãï¼
+ */
+Inline bool_t
+x_enable_int(INTNO intno)
+{
+	uint32_t tmp;
+
+	/*
+	 *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããªãå ´å
+	 */
+	if ((bitpat_cfgint[intno >> 5] & (1 << (intno & 0x1f))) == 0x00) {
+		return(false);
+	}
+
+	if (intno == IRQNO_SYSTICK) {
+		tmp = sil_rew_mem((void *)SYSTIC_CONTROL_STATUS);
+		tmp |= SYSTIC_TICINT;
+		sil_wrw_mem((void *)SYSTIC_CONTROL_STATUS, tmp);
+	}else {
+		tmp = intno - 16;
+		sil_wrw_mem((void *)((uint32_t *)NVIC_SETENA0 + (tmp >> 5)),
+					(1 << (tmp & 0x1f)));
+	}
+	return(true);
+}
+
+#define t_enable_int(intno) x_enable_int(intno)
+#define i_enable_int(intno) x_enable_int(intno)
+
+/*
+ *  SVCãã³ãã©ï¼core_support.Sï¼
+ */
+extern void svc_handler(void);
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  FPUé¢é£ã®å®ç¾©
+ */
+
+/*
+ *  FPCCRã®åæå¤
+ */
+#if defined(TOPPERS_FPU_NO_PRESERV)
+#define FPCCR_INIT FPCCR_NO_PRESERV
+#elif defined(TOPPERS_FPU_NO_LAZYSTACKING)
+#define FPCCR_INIT FPCCR_NO_LAZYSTACKING
+#elif defined(TOPPERS_FPU_LAZYSTACKING)
+#define FPCCR_INIT FPCCR_LAZYSTACKING
+#endif /* defined(TOPPERS_FPU_NO_PRESERV) */
+
+#else /* __TARGET_ARCH_THUMB == 3 */
+
+/*
+ *  ARMv6-Mã«é¢ããå¦ç
+ */
+#include "core_config_v6m.h"
+
+#endif /* __TARGET_ARCH_THUMB == 4 */
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  CPUä¾å¤ãã³ãã©é¢ä¿
+ */ 
+
+/*
+ *  CPUä¾å¤ãã³ãã©çªå·
+ */
+#define VALID_EXCNO_DEFEXC(excno)    (TMIN_EXCNO <= (excno) && (excno) <= TMAX_EXCNO)
+
+/*
+ *  CPUä¾å¤ãã³ãã©ã®è¨±å¯
+ */
+extern void enable_exc(EXCNO excno);
+
+/*
+ *  CPUä¾å¤ãã³ãã©ã®ç¦æ­¢
+ */
+extern void disable_exc(EXCNO excno);
+
+/*
+ *  CPUä¾å¤ãã³ãã©ã®è¨­å®
+ */
+Inline void
+x_define_exc(EXCNO excno, FP exc_entry)
+{
+	/*
+	 *  ä¸é¨ã®ä¾å¤ã¯è¨±å¯ãè¡ãå¿
+è¦ããã
+	 */
+	enable_exc(excno);
+}
+
+/*
+ *  CPUä¾å¤ãã³ãã©ã®å
+¥å£å¦çã®çæãã¯ã­
+ */
+#define EXC_ENTRY(excno, exchdr)    exchdr
+#define EXCHDR_ENTRY(excno, excno_num, exchdr) extern void exchdr(void *p_excinf);
+
+/*
+ *  CPUä¾å¤ã®çºçããæã®ã³ã³ãã­ã¹ãã®åç
+§
+ *
+ *  CPUä¾å¤ã®çºçããæã®ã³ã³ãã­ã¹ããï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã®æã«falseï¼
+ *  ããã§ãªãæã«trueãè¿ãï¼
+ */
+Inline bool_t
+exc_sense_context(void *p_excinf)
+{
+	uint32_t exc_return;
+
+	exc_return = *((uint32_t *)p_excinf + P_EXCINF_OFFSET_EXC_RETURN);
+	if ((exc_return & EXC_RETURN_PSP) == EXC_RETURN_PSP){
+		return false;
+	}
+	else {
+		return true;
+	}
+}
+
+/*
+ *  CPUä¾å¤ã®çºçããæã®IPMï¼ãã¼ãã¦ã§ã¢ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼å
+é¨è¡¨
+ *  ç¾ï¼ã®åç
+§
+ */
+Inline uint32_t
+exc_get_iipm(void *p_excinf)
+{
+	return(*((uint32_t *)p_excinf + P_EXCINF_OFFSET_IIPM));
+}
+
+/*
+ *  CPUä¾å¤ã®çºçããæã®ã³ã³ãã­ã¹ãã¨å²è¾¼ã¿ã®ãã¹ã¯ç¶æ
+ã®åç
+§
+ *
+ *  CPUä¾å¤ã®çºçããæã®ã·ã¹ãã ç¶æ
+ãï¼ã«ã¼ãã«å®è¡ä¸­ã§ãªãï¼ã¿ã¹ã¯ã³
+ *  ã³ãã­ã¹ãã§ããï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§ãªãï¼CPUã­ãã¯ç¶æ
+ã§ãªãï¼ï¼ã¢
+ *  ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§ããæã«trueï¼ããã§ãªãæ
+ *  ã«falseãè¿ãï¼CPUä¾å¤ãã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿å¦çä¸­ã§çºçããå ´å
+ *  ã«ãfalseãè¿ãï¼ï¼
+ *
+ *  PUä¾å¤ã®çºçããæã®BASEPRIï¼ãã¼ãã¦ã§ã¢ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼
+ *  ããã¹ã¦ã®å²è¾¼ã¿ãè¨±å¯ããç¶æ
+ã§ãããã¨ããã§ãã¯ãããã¨ã§ï¼ã«ã¼
+ *  ãã«å®è¡ä¸­ã§ãªããã¨ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§ãªããã¨ï¼CPUã­ãã¯ç¶æ
+ã§ãª
+ *  ããã¨ï¼ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§ãããã¨ã®4ã¤ã®
+ *  æ¡ä»¶ããã§ãã¯ãããã¨ãã§ããï¼CPUä¾å¤ãçºçããæã®lock_flagãå
+ *  ç
+§ããå¿
+è¦ã¯ãªãï¼ï¼
+ */
+Inline bool_t
+exc_sense_intmask(void *p_excinf)
+{
+	return(!exc_sense_context(p_excinf)
+		   && (exc_get_iipm(p_excinf) == IIPM_ENAALL) && !x_sense_lock());   
+}
+#endif /* TOPPERS_MACRO_ONLY */
+
+#endif /* TOPPERS_CORE_CONFIG_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_config_v6m.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_config_v6m.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_config_v6m.h	(revision 136)
@@ -0,0 +1,320 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_config_v6m.h 2695 2015-11-05 07:28:01Z ertl-honda $
+ */
+
+/*
+ *		å²è¾¼ã¿å¦çã¢ãã«ï¼ARMv6-Mç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼core_config.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯
+ *  ã«ã¼ãããããã¡ã¤ã«ï¼ã®ã¿ããã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡ã¤ã«ãã
+ *  ç´æ¥ã¤ã³ã¯ã«ã¼ããã¦ã¯ãªããªãï¼
+ */
+
+#ifndef TOPPERS_CORE_INTMODEL_V6M_H
+#define TOPPERS_CORE_INTMODEL_V6M_H
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®ãªãã¸ã§ã¯ãå±æ§
+ */
+#define TARGET_INHATR  TA_NONKERNEL /* ã¿ã¼ã²ããå®ç¾©ã®å²è¾¼ã¿ãã³ãã©å±æ§ */
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤é¨è¡¨ç¾ã¨å
+é¨è¡¨ç¾ã®å¤æ
+ *
+ *  ã¢ã»ã³ããªè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ããã¤ã³ã¯ã«ã¼ãããå ´åã®ããã«ï¼
+ *  CASTãä½¿ç¨
+ *   å¤é¨è¡¨ç¾ : TMIN_INTPRI  ï½       0  
+ *   å
+é¨è¡¨ç¾ :      0       ï½  -TMIN_INTPRI
+ */
+#define EXT_IPM(iipm)   (CAST(PRI,iipm + TMIN_INTPRI))     /* å
+é¨è¡¨ç¾ãå¤é¨è¡¨ç¾ã« */
+#define INT_IPM(ipm)    (CAST(uint8_t, ipm - TMIN_INTPRI)) /* å¤é¨è¡¨ç¾ãå
+é¨è¡¨ç¾ã« */
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãNVICã®åªå
+åº¦ã«å¤æ
+ */
+#define INT_NVIC_PRI(ipm)    (((1 << TBITW_IPRI) - CAST(uint8_t, -(ipm)))  << (8 - TBITW_IPRI))
+
+/*
+ *  TIPM_ENAALLï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ï¼ã®å
+é¨è¡¨ç¾
+ *
+ */
+#define IIPM_ENAALL  (-TMIN_INTPRI)
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°ã®å®ç¾ã®ããã®å¤æ°
+ */
+extern uint32_t ief;			/* IRQã®å²è¾¼ã¿è¦æ±è¨±å¯ãã©ã°ã®ç¶æ
+ */
+extern uint8_t  ief_systick;	/* SysTickã®å²è¾¼ã¿è¦æ±è¨±å¯ãã©ã°ã®ç¶æ
+ */
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å®ç¾ã®ããã®å¤æ°
+ */
+extern uint8_t iipm;		/* ç¾å¨ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤ */ 
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å®ç¾ã®ããã®å¤æ°ï¼kernel_cfg.cï¼
+ */
+extern const uint32_t iipm_enable_irq_tbl[];
+extern const uint8_t iipm_enable_systic_tbl[];
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã¸ã®ç§»è¡
+ *
+ */
+Inline void
+x_lock_cpu(void)
+{
+	set_primask();
+	/* ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åå¾ã§ã¡ã¢ãªãæ¸ãæããå¯è½æ§ããã */
+	ARM_MEMORY_CHANGED;    
+}
+
+#define t_lock_cpu()    x_lock_cpu()
+#define i_lock_cpu()    x_lock_cpu()
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã®è§£é¤
+ *
+ */
+Inline void
+x_unlock_cpu(void)
+{
+	/* ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åå¾ã§ã¡ã¢ãªãæ¸ãæããå¯è½æ§ããã */
+	ARM_MEMORY_CHANGED;
+	clear_primask();
+}
+
+#define t_unlock_cpu()    x_unlock_cpu()
+#define i_unlock_cpu()    x_unlock_cpu()
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã®åç
+§
+ */
+Inline bool_t
+x_sense_lock(void)
+{
+	return(read_primask() == 0x1u);
+}
+
+#define t_sense_lock()    x_sense_lock()
+#define i_sense_lock()    x_sense_lock()
+
+/*
+ *  chg_ipmã§æå¹ãªå²è¾¼ã¿åªå
+åº¦ã®ç¯å²ã®å¤å®
+ *
+ *  TMIN_INTPRIã®å¤ã«ãããï¼chg_ipmã§ã¯ï¼-(1 << TBITW_IPRI)ï½TIPM_ENAALLï¼ï¼0ï¼
+ *  ã®ç¯å²ã«è¨­å®ã§ãããã¨ã¨ããï¼ã¿ã¼ã²ããå®ç¾©ã®æ¡å¼µï¼ï¼
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+(TBITW_IPRI)ã 2 ã®å ´åã¯ï¼-4 ï½ 0 ãæå®å¯è½ã§ããï¼
+ *   
+ */
+#define VALID_INTPRI_CHGIPM(intpri) \
+				((-((1 << TBITW_IPRI) - 1) <= (intpri) && (intpri) <= TIPM_ENAALL))
+
+/*
+ * ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®è¨­å®
+ *
+ */
+Inline void
+x_set_ipm(PRI intpri)
+{
+	uint32_t tmp;
+	iipm = INT_IPM(intpri);
+
+	tmp = sil_rew_mem((void *)SYSTIC_CONTROL_STATUS);
+	if ((iipm_enable_systic_tbl[iipm] & ief_systick) ==  0x01) {
+		tmp |= SYSTIC_TICINT;
+	}else{
+		tmp &= ~SYSTIC_TICINT;
+	}
+	sil_wrw_mem((void *)SYSTIC_CONTROL_STATUS, tmp);
+
+	/* ä¸æ¦å
+¨å²è¾¼ã¿ç¦æ­¢ */
+	sil_wrw_mem((void *)NVIC_CLRENA0, 0xffffffff);
+	sil_wrw_mem((void *)NVIC_SETENA0, (iipm_enable_systic_tbl[iipm] & ief));
+}
+
+#define t_set_ipm(intpri)    x_set_ipm(intpri)
+#define i_set_ipm(intpri)    x_set_ipm(intpri)
+
+/*
+ * ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®åç
+§
+ *
+ */
+Inline PRI
+x_get_ipm(void)
+{
+	return EXT_IPM(iipm);
+}
+
+#define t_get_ipm()    x_get_ipm()
+#define i_get_ipm()    x_get_ipm()
+
+/*
+ *  å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°
+ */
+
+/*
+ *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããããå¤å¥ããããã®å¤æ°ï¼kernel_cfg.cï¼
+ */
+extern const uint32_t	bitpat_cfgint[];
+
+/*
+ *  å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°ã®ã»ãã
+ *
+ *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããªãå²è¾¼ã¿è¦æ±ã©ã¤ã³ã«å¯¾ãã¦å²è¾¼ã¿è¦æ±ç¦æ­¢
+ *  ãã©ã°ãã¯ãªã¢ãããã¨ããå ´åã«ã¯ï¼falseãè¿ãï¼  
+ */
+Inline bool_t
+x_disable_int(INTNO intno)
+{
+	uint32_t tmp;
+
+	/*
+	 *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããªãå ´å
+	 */
+	if ((bitpat_cfgint[intno >> 5] & (1 << (intno & 0x1f))) == 0x00) {
+		return(false);
+	}
+
+	if (intno == IRQNO_SYSTICK) {
+		tmp = sil_rew_mem((void *)SYSTIC_CONTROL_STATUS);
+		tmp &= ~SYSTIC_TICINT;
+		sil_wrw_mem((void *)SYSTIC_CONTROL_STATUS, tmp);
+		ief_systick &= ~0x01;
+	}else {
+		tmp = intno - 16;
+		sil_wrw_mem((void *)(NVIC_CLRENA0), (1 << (tmp & 0x1f)));
+		ief &= ~(1 << (tmp & 0x1f));
+	}
+
+	return(true);
+}
+
+#define t_disable_int(intno) x_disable_int(intno)
+#define i_disable_int(intno) x_disable_int(intno)
+
+/*
+ *  å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°ã®è§£é¤
+ *
+ *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããªãå²è¾¼ã¿è¦æ±ã©ã¤ã³ã«å¯¾ãã¦å²è¾¼ã¿è¦æ±ç¦æ­¢
+ *  ãã©ã°ãã¯ãªã¢ãããã¨ããå ´åã«ã¯ï¼falseãè¿ãï¼
+ */
+Inline bool_t
+x_enable_int(INTNO intno)
+{
+	uint32_t tmp;
+
+	/*
+	 *  å²è¾¼ã¿å±æ§ãè¨­å®ããã¦ããªãå ´å
+	 */
+	if ((bitpat_cfgint[intno >> 5] & (1 << (intno & 0x1f))) == 0x00) {
+		return(false);
+	}
+
+	if (intno == IRQNO_SYSTICK) {
+		ief_systick |= 0x01;
+		if ((iipm_enable_systic_tbl[iipm] & ief_systick) ==  0x01) {
+			tmp = sil_rew_mem((void *)SYSTIC_CONTROL_STATUS);
+			tmp |= SYSTIC_TICINT;;
+			sil_wrw_mem((void *)SYSTIC_CONTROL_STATUS, tmp);
+		}
+	}else {
+		tmp = intno - 16;
+		ief |= (1 << (tmp & 0x1f));
+		if ((iipm_enable_irq_tbl[iipm] & (1 << (tmp & 0x1f))) != 0) {
+			sil_wrw_mem((void *)(NVIC_SETENA0), (1 << (tmp & 0x1f)));
+		}
+	}
+
+	return(true);
+}
+
+#define t_enable_int(intno) x_enable_int(intno)
+#define i_enable_int(intno) x_enable_int(intno)
+
+/*
+ *  PendSVCãã³ãã©ï¼core_support.Sï¼
+ */
+extern void pendsvc_handler(void);
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_CORE_INTMODEL_V6M_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_def.csv
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_def.csv	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_def.csv	(revision 136)
@@ -0,0 +1,8 @@
+TMAX_INTNO,TMAX_INTNO
+TBITW_IPRI,TBITW_IPRI
+__TARGET_ARCH_THUMB,__TARGET_ARCH_THUMB
+sizeof_TCB,sizeof(TCB)
+offsetof_TCB_p_tinib,"offsetof(TCB,p_tinib)"
+offsetof_TCB_texptn,"offsetof(TCB,texptn)"
+offsetof_TCB_sp,"offsetof(TCB,tskctxb.sp)"
+offsetof_TCB_pc,"offsetof(TCB,tskctxb.pc)"
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_design.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_design.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_design.txt	(revision 136)
@@ -0,0 +1,1061 @@
+=====================================================================
+                         ARM-Mãã­ã»ããµä¾å­é¨è¨­è¨ã¡ã¢
+                                  Last Modified:2015 Nov 23 08:57:56
+=====================================================================
+
+âãã®ãã­ã¥ã¡ã³ãã®ä½ç½®ã¥ã
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASPã«ã¼ãã«ãARMvX-Mãã­ã»ããµã«ç§»æ¤ãããã
+ã®è¨­è¨ã¡ã¢ã§ããï¼
+
+
+âARMVx-Mã®ä»æ§ã¾ã¨ã(FPUä»¥å¤)
+
+ARMvX-Mã®ä»æ§ã®ãã¡ï¼ã«ã¼ãã«ã®è¨­è¨ã«é¢ä¿ããäºé 
+ã«ã¤ãã¦ï¼ã¾ãARMv7-M
+ã«ã¤ãã¦ã¾ã¨ããï¼ARMv6-Mã¯æå¾ã«ARMv7-Mã¨ã®å·®åã¨ãã¦èª¬æããï¼
+
+âåèè³æ
+
+ARMv7-M Architecture Reference Manual E.b
+DDI0403E_B_armv7m_arm.pdf 
+
+âã¬ã¸ã¹ã¿
+
+æ±ç¨ã¬ã¸ã¹ã¿ã¯R0ï½R15ã®16ç¨®é¡ããï¼R13ã®ã¿ã2ãã³ã¯æ§æï¼PSP,MSPï¼ã¨ãª
+ã£ã¦ããï¼R15ã¯PC, R14ã¯ãªã³ã¯ã¬ã¸ã¹ã¿ï¼LRï¼ã¨ãªã£ã¦ããï¼R0ï½R3,R12ã¯
+ã¹ã¯ã©ããã¬ã¸ã¹ã¿ã§ããï¼
+
+âã³ã¼ãªã³ã°ã³ã³ãã³ã·ã§ã³
+
+R0ï½R4ãå¼æ°ï¼ããä»¥ä¸ã¯ã¹ã¿ãã¯ï¼æ»ãå¤ã¯ï¼R0ï½R1ã«æ ¼ç´ãããï¼(ARMã«
+ããè¦å®ããã¦ããããï¼ã³ã³ãã¤ã©ã«ä¾å­ãããã®ã«ã¼ã«ã¨ãªãï¼)
+
+âCONTROLã¬ã¸ã¹ã¿
+
+PSP,MSPã®åãæ¿ãï¼Privilageã¨Userã¢ã¼ãã®ã¬ã¸ã¹ã¿ï¼å¤æ´å¾ã¯ï¼ã¤ã³ã¹ã
+ã©ã¯ã·ã§ã³ãããã¡ãã©ãã·ã¥å½ä»¤ãå®è¡ããå¿
+è¦ãããï¼isbï¼ï¼CONTROLã¬
+ã¸ã¹ã¿ã®è©³ç´°ã¯ï¼ARMv7-M Architecture Application Level Reference 
+Manual ã® B1-9 ãåç
+§ã®ãã¨ï¼
+
+âå²è¾¼ã¿ãã¯ã¿
+
+ãã¯ã¿ãã¼ãã«åã§ï¼ãã¯ã¿ãã¼ãã«ã®ã¢ãã¬ã¹ã¯ï¼ãªã»ããæã¯0x00ã§ï¼
+Vector Table Offset Registerï¼ã¡ã¢ãªããããã¬ã¸ã¹ã¿ï¼ ãæä½ãããã¨
+ã§ï¼ä»»æã®ã¢ãã¬ã¹ã«é
+ç½®å¯è½ã§ããï¼
+
+âåªå
+åº¦
+
+å¤ãå°ããæ¹ãé«åªå
+åº¦ã¨ãªãï¼0ãæé«åªå
+åº¦ã¨ãªãï¼ä¸æ¹ï¼å¾è¿°ãããã­
+ã»ããµã®å²è¾¼ã¿åªå
+åº¦ãè¨­å®ããBASEPRIã¬ã¸ã¹ã¿ã¯'0'ãã»ããããã¨ï¼å
+¨ã¦
+ã®å²è¾¼ã¿ãè¨±å¯ããããï¼æé«åªå
+åº¦ã¯ï¼æå¹ãªãããã®LSBã'1'ã¨ããå¤ã§
+ããï¼3bitã®å ´åã¯0x20ï¼ï¼ã¾ãï¼å²è¾¼ã¿ã®åªå
+åº¦ã«'0'ãè¨­å®ããã¨ï¼
+BASEPRIã¬ã¸ã¹ã¿ã§ãã¹ã¯ã§ããªãå²è¾¼ã¿ã¨ãªãï¼
+
+åªå
+åº¦ã¯æå¤§8bitã§ããï¼SoCæ¯ã«å®è£
+ããã¦ãããããå¹
+ãç°ãªãï¼å®è£
+ã
+ãããããã8bitä»¥ä¸ã®å ´åã¯ï¼LSBããç¡å¹ã«ãªãï¼ä¾ãã°ï¼å®è£
+ããã¦ã
+ããããå¹
+ã7bitã®å ´åã¯ï¼ããã0ãç¡å¹ã¨ãªãï¼
+
+åªå
+åº¦ã®ããããã£ã¼ã«ãã®LSBããæ°ãããããµãåªå
+åº¦ã¨å¼ã¶ãã£ã¼ã«ã
+ã«è¨­å®ãããã¨ãå¯è½ã§ããï¼æ®ãã®ä¸ä½ããããããªã¨ã³ãã·ã§ã³åªå
+åº¦ã¨
+å¼ã¶ï¼ããªã¨ã³ãã·ã§ã³åªå
+åº¦ãåãã§ï¼ãµãåªå
+åº¦ãç°ãªãåªå
+åº¦ã®ã°ã«ã¼
+ãã¯ï¼ãäºããããªã¨ã³ãããããã¨ãã§ããªãï¼
+
+Reset,NMI,Hard Fault ä»¥å¤ã®ä¾å¤ã¯å²è¾¼ã¿ã¨åæ§ã«åªå
+åº¦ãè¨­å®å¯è½ã§ããï¼
+å²è¾¼ã¿ãã¹ã¯æ©è½ã«ããï¼çºçãç¦æ­¢ãããã¨ãå¯è½ã§ããï¼
+
+
+âCPUã¢ã¼ã
+
+ãã­ã»ããµã¯ï¼Threadã¢ã¼ããããã¯Handlerã¢ã¼ãã®ããããã®ã¢ã¼ãã¨ãª
+ãï¼
+
+âãªã»ããæã®ç¶æ
+
+
+ãªã»ããæã¯Threadã¢ã¼ãï¼MSPãæå¹ã¨ãªã£ã¦ããï¼
+
+âHandlerã¢ã¼ã
+
+ä¾å¤/å²è¾¼ã¿ãåãä»ããã¨é·ç§»ããã¢ã¼ãï¼åãä»ããä¾å¤/å²è¾¼ã¿ã®ä¾å¤çª
+å·ãï¼IPSRã«ã»ãããããï¼ä¾å¤çªå·ã¯ï¼TRMã§å®ãããã¦ããçªå·ã§ããï¼
+
+        ä¾å¤              ä¾å¤çªå·
+  Reset                      1
+  Non-makable Interrupt      2
+  Hard Fault                 3
+  Memory Management          4
+  Bus Fault                  5
+  Usage Fault                6
+  SVCall                    11
+  Debug Monitor             12
+  PendSV                    14
+  SysTick                   15
+  IRQ0                      16
+  IRQ1                      17
+  ..
+
+ä¾å¤/å²è¾¼ã¿ãåãä»ããã¨ï¼åãä»ããä¾å¤/å²è¾¼ã¿ã®åªå
+åº¦ä»¥ä¸ã®ä¾å¤/å²
+è¾¼ã¿ãç¦æ­¢ããï¼ãã®åªå
+åº¦ãã¹ã¯ã"NVICåªå
+åº¦ãã¹ã¯"ã¨å¼ã¶ï¼ãã®åªå
+åº¦
+ã¯ï¼ã½ããã¦ã§ã¢ããå¤æ´ãããã¨ãã§ããï¼ä¾å¤/å²è¾¼ã¿ã®ãªã¿ã¼ã³ã«ãã
+å²è¾¼ã¿åã®å¤ã«èªåçã«æ»ãï¼
+
+âã¹ã¿ãã¯ãã¤ã³ã¿ï¼PSPã¨MSPï¼
+
+ã¹ã¿ãã¯ãã¤ã³ã¿ã¯ï¼PSPã¨MSPãããï¼æä»çã«ä½¿ç¨å¯è½ã§ããï¼Handlerã¢
+ã¼ãã§ã¯MSPã®ã¿ä½¿ç¨å¯è½ã§ããï¼Threadã¢ã¼ãã§ã¯CONTROLã¬ã¸ã¹ã¿ã§é¸æå¯
+è½ã§ããï¼CONTROLã¬ã¸ã¹ã¿ã®1ãããç®ãã»ããããã¨PSPãæå¹ã«ï¼ã¯ãªã¢
+ããã¨ï¼MSPãæå¹ã«ãªãï¼
+
+âThreadã¢ã¼ãã¨Handlerã¢ã¼ãã®é·ç§»
+
+Threadã¢ã¼ãããHandlerã¢ã¼ãã¸ã®é·ç§»ã¯ï¼ä¾å¤/å²è¾¼ã¿ãåãä»ãããã¨ã§
+çºçããï¼ä¸æ¹ï¼Handlerã¢ã¼ãããThreadã¢ã¼ãã¸ã®é·ç§»ã¯ï¼PCã«
+EXC_RETURN(0xfffffffx)ã®å¤ãè¨­å®ãããã¨ã«ããè¡ãï¼ä¾å¤ãªã¿ã¼ã³å¦çã¨
+å¼ã¶ï¼ï¼EXC_RETURNã®ä¸ä½4bitã«ããï¼é·ç§»å
+ã®ã¢ã¼ããä½¿ç¨ããã¹ã¿ãã¯ã
+ã¤ã³ã¿ãå¤æ´å¯è½ã§ããï¼ä¾å¤ãªã¿ã¼ã³ã«ããï¼PRIMASKãBASEPRIã®å¤ã¯å¤å
+ããªãï¼ä¸æ¹ï¼FAULTMASKã®å¤ã¯'0'ã«ã¯ãªã¢ãããï¼
+
+âEXC_RETURN
+
+ä¾å¤/å²è¾¼ã¿åä»ãæã«lrã«è¨­å®ãããå¤ï¼ããã31ï½4ãããã¯å
+¨ã¦'1'ã§ï¼
+ä¸ä½4bitã¯ï¼åä»ãæã®CPUã¢ã¼ããã¹ã¿ãã¯ãåæ ããå¤ã¨ãªã£ã¦ããï¼
+
+ 0b0001 : Handlerã¢ã¼ã
+ 0b1001 : Threadã¢ã¼ã with MSP
+ 0b1101 : Threadã¢ã¼ã with PSP
+
+âThreadã¢ã¼ãã¨Handlerã¢ã¼ãã®å¤å®
+
+ç¾ç¶ã®ã¢ã¼ããå¤å®ããã«ã¯ï¼IPSRãè¦ã¦ï¼'0'ãªãThreadã¢ã¼ãï¼ããä»¥å¤
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+
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+
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+åº¦ãã¹ã¯ã
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+åªå
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+åº¦ãã¹ã¯ã¨BASEPRIã®è¨­å®å¤ã®é«ãæ¹ï¼å¤ãå°ãã
+æ¹ï¼ã¨ãªãï¼
+
+âFAULTMASK
+
+FAULTMASKã¯'1'ãã»ãããããã¨ã«ããï¼NMIä»¥å¤ã®å
+¨ã¦ã®å²è¾¼ã¿ãç¦æ­¢ããï¼
+FAULTMASKã¯ï¼ä¾å¤ã®ãªã¿ã¼ã³å¦çã«ãã'0'ã«ã¯ãªã¢ãããï¼
+
+âPRIMASKã¨WFI
+
+PRIMASKã'1'ã«è¨­å®ããã¨ï¼NMI ã¨ Hardware Fault ä»¥å¤ã®ä¾å¤/å²è¾¼ã¿ãç¦
+æ­¢ããï¼PRIMASKã¯å²è¾¼ã¿ã®è¨±å¯ã¨å²è¾¼ã¿å¾
+ã¡ãã¢ãããã¯ã«è¡ãããã«ç¨ã
+ãï¼å
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+ã§wfiãå®è¡ããã¨ï¼å²ãè¾¼
+ã¿å¾
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+ã¦ããï¼
+
+âä¾å¤/å²è¾¼ã¿ã®åä»
+
+ã»ä¾å¤/å²è¾¼ã¿ãåä»ããã¨ï¼åä»ãæã«ã¢ã¯ãã£ããªã¹ã¿ãã¯ä¸ã«ä»¥ä¸ã®ã³
+  ã³ãã­ã¹ããä¿å­ãã(ä¾å¤ãã¬ã¼ã ã¨å¼ã¶)ï¼
+
+   -----------
+  |    R0     |  <- new SP
+   -----------
+  |    R1     |
+   -----------
+  |    R2     |
+   -----------
+  |    R3     |
+   -----------
+  |    R12    |
+   -----------
+  |    LR     |
+   -----------
+  |    PC     |
+   -----------
+  |   xPSR    |
+   -----------
+  |           | <- old SP
+
+ã»ãã­ã»ããµãHandlerã¢ã¼ãã¨ããï¼MSPãæå¹ã¨ãªãï¼
+ã»åä»ããä¾å¤/å²è¾¼ã¿ã®ä¾å¤çªå·ãIPSRã«è¨­å®ããï¼
+ã»NVICå²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãåä»ããä¾å¤/å²è¾¼ã¿ã®åªå
+åº¦ã«è¨­å®ããï¼
+ã»lrã«EXC_RETURNã®å¤ãè¨­å®ãããï¼
+ã»ãã¯ã¿ãã¼ãã«ãèª­ã¿è¾¼ã¿ãã³ãã©ãå®è¡ããï¼
+ã»ã¹ã¿ãã¯ãã¬ã¼ã ã¯ï¼Configureation and Control Register(CCR)ã®
+  STKALIGNã'1'ã®å ´åã¯ï¼8byteå¢çã«ã¢ã©ã¤ã³ãããï¼
+
+âä¾å¤/å²è¾¼ã¿ããã®ãªã¿ã¼ã³
+
+pcã«EXC_RETURNã®å¤ãè¨­å®ãããã¨ã«ããï¼ä¾å¤/å²è¾¼ã¿ãããªã¿ã¼ã³ããï¼
+pcã¸ã®è¨­å®ã«ä½¿ç¨å¯è½ãªå½ä»¤ã«ã¯å¶éãããï¼ä»¥ä¸å½ä»¤ãä½¿ç¨å¯è½ã§ããï¼
+
+  ã»POP/LDM, LDR, BX
+
+âæªè§£æ±ºèª²é¡
+
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+ARMv7-M Architecture Reference Manual E.b
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+Cortex-M4(F) Lazy Stacking and Context Switching Application Note 298
+DAI0298A_cortex_m4f_lazy_stacking_and_context_switching.pdf
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+âæ¦è¦
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+è©³ç´°ã¯ ARMv7-M Architecture Reference Manual E.bã® B1.5.6 Exception 
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+
+FPU_NO_LAZYSTACKINGæã®ã³ã¼ãããã®ã¾ã¾ä½¿ç¨ããã¨FPU_LAZYSTACKINGã®å ´
+åã¯ï¼å²è¾¼ã¿ã»ä¾å¤çºçå¾ã«æ¬¡ã®ã¿ã¤ãã³ã°ã§ä¾å¤ãã¬ã¼ã ã«FPUã®ã³ã³ãã­
+ã¹ãããã¼ãã¦ã§ã¢ã«ãã£ã¦èªåçã«ä¿å­ãããï¼
+
+ä¾å¤ã»å²è¾¼ã¿ãã³ãã©å®è¡ä¸­
+FPUãä½¿ç¨ããã¿ã¹ã¯/ISRå®è¡ä¸­ã«ä¾å¤ã»å²è¾¼ã¿ãçºçãï¼ä¾å¤ã»å²è¾¼ã¿ãã³
+ãã©ã§FPUå½ä»¤ãå®è¡ããå ´åï¼FPCCR.LSPACT==1 ã¨ãªã£ã¦ããããï¼
+
+é
+å»¶ãã£ã¹ãããæ(ret_int_4)
+ä¾å¤ã»å²è¾¼ã¿ãã³ãã©ã§FPUãä½¿ç¨ããªãã£ãå ´åã¯ï¼ret_int_4å®è¡æã«ã¯ã³
+ã³ãã­ã¹ãã¯ä¿å­ããã¦ããªãï¼ããã«åã¬ã¸ã¹ã¿ã®å¤ã¯æ¬¡ã®ããã«ãªã£ã¦ã
+ãï¼
+ã»FPCCR.LSPACT == '1'
+ã»FPCAR = ä¾å¤ãã¬ã¼ã ã®FPUã¬ã¸ã¹ã¿ã®ä¿å­ã¢ãã¬ã¹(S0ã®ã¢ãã¬ã¹)
+ret_int_4ã§ã¯ï¼s16-s31 ãã¿ã¹ã¯ã¹ã¿ãã¯ã«ä¿å­ããï¼ããã§FPUãä½¿ç¨ãã
+ããï¼s0-s15,FPSRã¯ä¾å¤ãã¬ã¼ã ã«ä¿å­ãããï¼
+
+ä»¥ä¸ã®ç®æã¯FPU_LAZYSTACKINGã®å ´åã«ã®ã¿å¿
+è¦ã§ããï¼
+
+å²è¾¼ã¿åºå£ã§ã®ã¿ã¹ã¯ä¾å¤å¼ã³åºãæ
+FPUãä½¿ç¨ããã¿ã¹ã¯å®è¡ä¸­ã«ä¾å¤/å²è¾¼ã¿ãçºçãï¼ä¾å¤/å²è¾¼ã¿ã®åºå£ãã
+ã¿ã¹ã¯ä¾å¤å¦çãå¼ã³åºããå ´åã«ã¯ï¼FPCCR.LSPACT == '1' ã¨FPUã³ã³ãã­
+ã¹ããä¿å­ããã¦ããªãç¶æ
+ã§ã¿ã¹ã¯ä¾å¤ãå¼ã³åºãããå¯è½æ§ãããï¼ã¿ã¹
+ã¯ä¾å¤ã§ext_tsk()ãå¼ã³åºããå ´åãä»ã®ã¿ã¹ã¯ã«ãã£ã¹ãããããï¼
+ter_tsk()ã§çµäºãããããå ´åã«ã¯ï¼FPCCR.LSPACT ã '0'ã«ã¯ãªã¢ããå¿
+è¦
+ãããï¼ext_tsk()ã®ã±ã¼ã¹ã¯ã¿ã¼ã²ããä¾å­é¨exit_and_dispatch()ãå¼ã³åº
+ãããããï¼ããã§ã¯ãªã¢ããã°è¯ããï¼ter_tsk()ã§ã¯ã¿ã¼ã²ããä¾å­é¨ã
+å¼ã³åºããªãããï¼ã¯ãªã¢ãããã¨ãåºæ¥ãªãï¼ãã®ããï¼å²è¾¼ã¿åºå£ã§ã®ã¿
+ã¹ã¯ä¾å¤å¼ã³åºãã¿ã¤ãã³ã°ã§FPUã³ã³ãã­ã¹ããã¹ã¿ãã¯ã«æ ¼ç´ããããï¼
+å¯ä½ç¨ã®ãªãFPUå½ä»¤ãçºè¡ããï¼
+ãªãï¼ä»ã®ã¿ã¹ã¯ã«ãã£ã¹ããããããå ´åã¯ï¼CONTROL.FPCAã'1'ã§ç¡ãã
+ã(ã¿ã¹ã¯ä¾å¤ã§FPUãä½¿ç¨ããªãã£ãå ´å)ï¼s16ï½s31ã®FPUã¬ã¸ã¹ã¿ã®ä¿å­ã
+è¡ãããï¼ä¾å¤ãã¬ã¼ã ã¸ã®æ¸ãæ»ããçºçããªãï¼
+
+CONTROL.FPCAã®ã»ããã»ã¯ãªã¢ã®ã¿ã¤ãã³ã°
+
+ã¯ãªã¢ããç®æãè¤æ°ç®æã«ãªãã¨ææ¡ãå°é£ã§ããããï¼ãã£ã¹ãããã£ã®å
+é ­ã§
+ã¯ä¸å¾CONTROL.FPCAã'0'ã«ã¯ãªã¢ããï¼
+
+dispatchãå¼ã³åºããã¿ã¹ã¯ã¸ã®ãªã¿ã¼ã³ããéã«ã¯ï¼æ»ãå
+ã®ã¿ã¹ã¯ãFPU
+ãä½¿ç¨ãããå ´åã¯ï¼s16ï½s31ã®å¾©å¸°ãè¡ãããï¼ãã®å¦çã«ãã
+CONTROL.FPCAã'1'ã«ã»ãããããï¼
+
+ã¾ãï¼EXC_RETURNã«ãããªã¼ã¿ã³æã¯EXC_RETURNã®å¤ã«ãã£ã¦ãªã¼ã¿ã¼ã³æã«
+ãã¼ãã¦ã§ã¢çã«èªåçã«CONTROL.FPCAãå
+ã®ç¶æ
+ã«å¾©å¸°ãããã®ã§ã½ããã¦
+ã§ã¢ã«ããå¦çã¯å¿
+è¦ãªãï¼
+
+ã¿ã¹ã¯ä¾å¤ã®æ±ã
+
+ã¿ã¹ã¯ä¾å¤ã§FPUãä½¿ç¨ãã¦ï¼éå¸¸ã®å¦çã§FPUãä½¿ç¨ããªãå ´åã¯ï¼ã¿ã¹ã¯ä¾
+å¤ã®å¼ã³åºãã®åå¾ã§ CONTROL.FPCA ãä¿å­å¾©å¸°ããæ¹æ³ããããï¼ã¬ã¢ã±ã¼
+ã¹ã§ããã¨èãããããããµãã¼ãããªãï¼
+
+ABI
+
+GCCã§ã¯3ç¨®é¡é¸æå¯è½ï¼
+
+hard    : æµ®åå°æ°ç¹å½ä»¤ãä½¿ç¨ãã¦ABIã¯FPUã¬ã¸ã¹ã¿ãä½¿ç¨ï¼
+soft    : æµ®åå°æ°ç¹å½ä»¤ãä½¿ç¨ããªãï¼
+softfp  : æµ®åå°æ°ç¹å½ä»¤ãä½¿ç¨ãããABIã¯softã¨åãï¼
+
+æ¢å­ã®ã©ã¤ãã©ãªã¨ãªã³ã¯ããå ´åã¯softfpãæå¹ã ãï¼ã¦ã¼ã¶ã¼ã«ã¹ã¿ãã¤
+ãºã¨ãã¦ãã£ãã©ã«ãã¯ï¼hardã¨ããï¼
+
+ãã¯ã­
+
+FPUã³ã³ãã­ã¹ãå¾©å¸°ä¿å­ãæå¹åãããã¯ã­ï¼
+
+TOPPERS_FPU_CONTEXT
+
+FPUã®ä½¿ç¨ãæå¹åãããã¯ã­ï¼
+
+TOPPERS_FPU_ENABLE
+
+FPUã®ã¢ã¼ã­ãã¯ãã£ãæå®ãããã¯ã­ï¼ARMCCã¨åããã¦æ¬¡ã®ãã¯ã­ãä½¿ç¨ããï¼
+__TARGET_FPU_FPV4_SP
+
+FPU_NO_PRESERV/FPU_NO_LAZYSTACKING/FPU_LAZYSTACKINGã®å ´åã¯æ¬¡ã®ãã¯ã­ãå®ç¾©ããï¼
+
+TOPPERS_FPU_NO_PRESERV
+
+TOPPERS_FPU_NO_LAZYSTACKING
+
+TOPPERS_FPU_LAZYSTACKING
+
+
+16. æªè§£æ±ºèª²é¡
+ã»å²è¾¼ã¿ã­ãã¯ã¨CPUä¾å¤ã®é¢ä¿
+  BASEPRIãä½¿ã£ãã¨ãã¦ãï¼ããCPUä¾å¤å¦çä¸­ã«ä»ã®ä¾å¤ãçºçããã¨ï¼ã
+  ã®ä¾å¤ã¯åãä»ããããªãããï¼ITRONä»æ§ã¯æºãããªãï¼
+  ->ããããã¦ããã¥ã¢ã«è¨è¼ã«éããã.
+  ã¡ã¢ãªãã­ãã¯ã·ã§ã³ã®ä¾å¤ããã¹ã¯å¯è½ã§ããããè¦ä»¶ç­ï¼
+
+ä»¥ä¸ï¼
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_insn.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_insn.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_insn.h	(revision 136)
@@ -0,0 +1,168 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_insn.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+
+/*
+ *  ã³ã¢ä¾å­ã®ç¹æ®å½ä»¤ã®ã¤ã³ã©ã¤ã³é¢æ°å®ç¾©ï¼ARM-Mç¨ï¼
+ */
+
+#ifndef CORE_INSN_H
+#define CORE_INSN_H
+
+#include <arm_m.h>
+
+/*
+ *  ã¡ã¢ãªãå¤æ´ããããã¨ãã³ã³ãã¤ã©ã«ä¼ããããã®ãã¯ã­
+ */
+#define ARM_MEMORY_CHANGED Asm("":::"memory")
+
+/*
+ *  FAULTMASKã®ã»ãã
+ */
+Inline void
+set_faultmask(void){
+	Asm("cpsid f":::"memory");
+}
+
+/*
+ *  FAULTMASKã®ã¯ãªã¢
+ */
+Inline void
+clear_faultmask(void){
+	Asm("cpsie f":::"memory");
+}
+
+/*
+ *  PRIMASKã®ã»ãã
+ */
+Inline void
+set_primask(void){
+	Asm("cpsid i":::"memory");
+}
+
+/*
+ *  PRIMASKã®ã¯ãªã¢
+ */
+Inline void
+clear_primask(void){
+	Asm("cpsie i":::"memory");
+}
+
+/*
+ *  PRIMASKã®ãªã¼ã
+ */
+Inline uint32_t
+read_primask(void){
+	uint32_t val;
+
+	Asm("mrs  %0, PRIMASK" : "=r"(val));
+	return val;
+}
+
+/*
+ *  BASEPRIã®ã»ãã
+ */
+Inline void
+set_basepri(uint32_t val){
+	Asm("msr BASEPRI, %0" : : "r"(val) : "memory");
+}
+
+/*
+ *  BASEPRIã®åå¾
+ */
+Inline uint32_t
+get_basepri(void){
+	uint32_t val;
+	Asm("mrs  %0, BASEPRI" : "=r"(val));
+	return(val);
+}
+
+/*
+ *  CONTROLã®ã»ãã
+ */
+Inline void
+set_control(uint32_t val){
+	/*
+	 *  controlã¬ã¸ã¹ã¿ã»ããå¾ã«ã¯isbãå¿
+é 
+	 *  [ARMv7-M Architecture Reference Manaual(DDI0403B) A3-37]
+	 */
+	Asm("msr control, %0 \n"
+		" isb"
+		: : "r"(val) : "memory");
+}
+
+/*
+ *  CONTROLã®åå¾
+ */
+Inline uint32_t
+get_control(void){
+	uint32_t val;
+	Asm("mrs  %0, CONTROL" : "=r"(val));
+	return(val);
+}
+
+/*
+ *  ã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿ï¼CPSRï¼ã®ç¾å¨å¤ã®èª­åºã
+ */
+Inline uint32_t
+get_ipsr(void)
+{
+    uint32_t sr;
+    Asm("mrs  %0, ipsr" : "=r"(sr));
+    return(sr);
+}
+
+#endif /* CORE_INSN_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_kernel.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_kernel.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_kernel.h	(revision 136)
@@ -0,0 +1,80 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_kernel.h 2189 2011-07-24 13:16:06Z ertl-honda $
+ */
+
+/*
+ *		kernel.hã®ã³ã¢ä¾å­é¨ï¼ARM-Mç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼target_kernel.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯
+ *  ã«ã¼ãããããã¡ã¤ã«ï¼ã®ã¿ããã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡ã¤ã«ãã
+ *  ç´æ¥ã¤ã³ã¯ã«ã¼ããã¦ã¯ãªããªãï¼
+ */
+
+#ifndef TOPPERS_CORE_KERNEL_H
+#define TOPPERS_CORE_KERNEL_H
+
+/*
+ *  ãµãã¼ãããæ©è½ã®å®ç¾©
+ */
+#define TOPPERS_TARGET_SUPPORT_DIS_INT      /* dis_intããµãã¼ããã */
+#define TOPPERS_TARGET_SUPPORT_ENA_INT      /* ena_intããµãã¼ããã */
+
+#define TMAX_INTPRI		(-1)		/* å²è¾¼ã¿åªå
+åº¦ã®æå¤§å¤ï¼æä½å¤ï¼*/
+
+#ifndef TOPPERS_MACRO_ONLY
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+#endif /* TOPPERS_CORE_KERNEL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_offset.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_offset.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_offset.tf	(revision 136)
@@ -0,0 +1,19 @@
+$
+$       ãªãã»ãããã¡ã¤ã«çæç¨ãã³ãã¬ã¼ããã¡ã¤ã«ï¼ARM-Mç¨ï¼
+$
+
+$
+$  ãªãã»ããå¤ã®ãã¯ã­å®ç¾©ã®çæ
+$
+$DEFINE("TCB_p_tinib", offsetof_TCB_p_tinib)$
+$DEFINE("TCB_texptn", offsetof_TCB_texptn)$
+$DEFINE("TCB_sp", offsetof_TCB_sp)$
+$DEFINE("TCB_pc", offsetof_TCB_pc)$
+
+$DEFINE("TINIB_exinf", offsetof_TINIB_exinf)$
+$DEFINE("TINIB_task", offsetof_TINIB_task)$
+
+$
+$  ããããªãã»ããå¤ç­ã®ãã¯ã­å®ç¾©ã®çæ
+$
+$DEFINE_BIT("TCB_enatex", sizeof_TCB, "B")$
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_rename.def
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_rename.def	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_rename.def	(revision 136)
@@ -0,0 +1,34 @@
+# core_config.c
+exc_tbl
+vector_table
+lock_flag
+saved_iipm
+default_exc_handler
+default_int_handler
+x_config_int
+core_initialize
+core_terminate
+bitpat_cfgint
+set_exc_int_priority
+enable_exc
+disable_exc
+iipm_enable_irq_tbl
+iipm_enable_systic_tbl
+iipm
+ief
+ief_systick
+
+# core_support.S
+core_int_entry
+core_exc_entry
+ret_int
+ret_exc
+svc_handler
+start_r
+dispatch
+start_dispatch
+exit_and_dispatch
+call_exit_kernel
+
+# start.S
+_start
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_rename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_rename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_rename.h	(revision 136)
@@ -0,0 +1,93 @@
+/* This file is generated from core_rename.def by genrename. */
+
+#ifndef TOPPERS_CORE_RENAME_H
+#define TOPPERS_CORE_RENAME_H
+
+/*
+ *  core_config.c
+ */
+#define exc_tbl						_kernel_exc_tbl
+#define vector_table				_kernel_vector_table
+#define lock_flag					_kernel_lock_flag
+#define saved_iipm					_kernel_saved_iipm
+#define default_exc_handler			_kernel_default_exc_handler
+#define default_int_handler			_kernel_default_int_handler
+#define x_config_int				_kernel_x_config_int
+#define core_initialize				_kernel_core_initialize
+#define core_terminate				_kernel_core_terminate
+#define bitpat_cfgint				_kernel_bitpat_cfgint
+#define set_exc_int_priority		_kernel_set_exc_int_priority
+#define enable_exc					_kernel_enable_exc
+#define disable_exc					_kernel_disable_exc
+#define iipm_enable_irq_tbl			_kernel_iipm_enable_irq_tbl
+#define iipm_enable_systic_tbl		_kernel_iipm_enable_systic_tbl
+#define iipm						_kernel_iipm
+#define ief							_kernel_ief
+#define ief_systick					_kernel_ief_systick
+
+/*
+ *  core_support.S
+ */
+#define core_int_entry				_kernel_core_int_entry
+#define core_exc_entry				_kernel_core_exc_entry
+#define ret_int						_kernel_ret_int
+#define ret_exc						_kernel_ret_exc
+#define svc_handler					_kernel_svc_handler
+#define start_r						_kernel_start_r
+#define dispatch					_kernel_dispatch
+#define start_dispatch				_kernel_start_dispatch
+#define exit_and_dispatch			_kernel_exit_and_dispatch
+#define call_exit_kernel			_kernel_call_exit_kernel
+
+/*
+ *  start.S
+ */
+#define _start						_kernel__start
+
+#ifdef TOPPERS_LABEL_ASM
+
+/*
+ *  core_config.c
+ */
+#define _exc_tbl					__kernel_exc_tbl
+#define _vector_table				__kernel_vector_table
+#define _lock_flag					__kernel_lock_flag
+#define _saved_iipm					__kernel_saved_iipm
+#define _default_exc_handler		__kernel_default_exc_handler
+#define _default_int_handler		__kernel_default_int_handler
+#define _x_config_int				__kernel_x_config_int
+#define _core_initialize			__kernel_core_initialize
+#define _core_terminate				__kernel_core_terminate
+#define _bitpat_cfgint				__kernel_bitpat_cfgint
+#define _set_exc_int_priority		__kernel_set_exc_int_priority
+#define _enable_exc					__kernel_enable_exc
+#define _disable_exc				__kernel_disable_exc
+#define _iipm_enable_irq_tbl		__kernel_iipm_enable_irq_tbl
+#define _iipm_enable_systic_tbl		__kernel_iipm_enable_systic_tbl
+#define _iipm						__kernel_iipm
+#define _ief						__kernel_ief
+#define _ief_systick				__kernel_ief_systick
+
+/*
+ *  core_support.S
+ */
+#define _core_int_entry				__kernel_core_int_entry
+#define _core_exc_entry				__kernel_core_exc_entry
+#define _ret_int					__kernel_ret_int
+#define _ret_exc					__kernel_ret_exc
+#define _svc_handler				__kernel_svc_handler
+#define _start_r					__kernel_start_r
+#define _dispatch					__kernel_dispatch
+#define _start_dispatch				__kernel_start_dispatch
+#define _exit_and_dispatch			__kernel_exit_and_dispatch
+#define _call_exit_kernel			__kernel_call_exit_kernel
+
+/*
+ *  start.S
+ */
+#define __start						__kernel__start
+
+#endif /* TOPPERS_LABEL_ASM */
+
+
+#endif /* TOPPERS_CORE_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_sil.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_sil.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_sil.h	(revision 136)
@@ -0,0 +1,121 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008-2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_sil.h 2702 2015-11-14 08:41:24Z ertl-honda $
+ */
+
+/*
+ *   sil.hã®ã³ã¢ä¾å­é¨ï¼ARM-Mç¨ï¼
+ */
+
+#ifndef TOPPERS_CORE_SIL_H
+#define TOPPERS_CORE_SIL_H
+
+#ifndef TOPPERS_MACRO_ONLY
+
+#if __TARGET_ARCH_THUMB == 4
+static uint32_t pre_basepri;
+#endif /* __TARGET_ARCH_THUMB == 4 */
+
+/*
+ *  NMIãé¤ããã¹ã¦ã®å²è¾¼ã¿ã®ç¦æ­¢
+ */
+Inline bool_t
+TOPPERS_disint(void)
+{
+	uint32_t val;
+#if __TARGET_ARCH_THUMB == 4
+	Asm("mrs  %0, BASEPRI" : "=r"(val));
+	if(val != (1 << (8 - TBITW_IPRI))){
+		pre_basepri = val;
+		val = (1 << (8 - TBITW_IPRI));
+		Asm("msr BASEPRI, %0" : : "r"(val) : "memory");
+		return (false);
+	} else {
+		return (true);
+	}
+#else /* __TARGET_ARCH_THUMB == 3 */
+	Asm("mrs  %0, PRIMASK" : "=r"(val));
+	Asm("cpsid i":::"memory");
+#endif /* __TARGET_ARCH_THUMB == 4 */
+
+	if (val == 1) {
+		return (true);
+	}
+	else {
+		return (false);
+	}
+}
+
+Inline void
+TOPPERS_enaint(bool_t locked)
+{
+	if (!locked) {
+#if __TARGET_ARCH_THUMB == 4
+		Asm("msr BASEPRI, %0" : : "r"(pre_basepri) : "memory");
+#else /* __TARGET_ARCH_THUMB == 3 */
+		Asm("cpsie i":::"memory");
+#endif /* __TARGET_ARCH_THUMB == 4 */
+	}
+}
+
+/*
+ *  å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
+ã®å¶å¾¡
+ */
+#define SIL_PRE_LOC      bool_t  TOPPERS_locked
+#define SIL_LOC_INT()    ((void)(TOPPERS_locked = TOPPERS_disint()))
+#define SIL_UNL_INT()    (TOPPERS_enaint(TOPPERS_locked))
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+#endif /* TOPPERS_CORE_SIL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_stddef.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_stddef.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_stddef.h	(revision 136)
@@ -0,0 +1,79 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_stddef.h 2183 2011-07-23 10:29:36Z ertl-honda $
+ */
+
+/*
+ *  t_stddef.hã®ã³ã¢ä¾å­é¨ï¼ARM-Mç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼target_stddef.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯
+ *  ã«ã¼ãããããã¡ã¤ã«ï¼ã®ã¿ããã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡ã¤ã«ãã
+ *  ç´æ¥ã¤ã³ã¯ã«ã¼ããã¦ã¯ãªããªãï¼
+ */
+
+#ifndef TOPPERS_CORE_STDDEF_H
+#define TOPPERS_CORE_STDDEF_H
+
+/*
+ *  ã¿ã¼ã²ãããè­å¥ããããã®ãã¯ã­ã®å®ç¾©
+ */
+#define TOPPERS_ARM_M           /* ã³ã¢ç¥ç§° */
+
+/*
+ *  ã¹ã¿ãã¯ã®å
+ *  ARMã§ã¯ï¼ã¹ã¿ãã¯ã8byteå¢çã«é
+ç½®ããå¿
+è¦ããã
+ */
+#define TOPPERS_STK_T  long long
+
+#endif /* TOPPERS_CORE_STDDEF_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_support.S
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_support.S	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_support.S	(revision 136)
@@ -0,0 +1,999 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_support.S 2704 2015-11-21 15:50:12Z ertl-honda $
+ */
+
+/*
+ *  ãã­ã»ããµä¾å­ã¢ã¸ã¥ã¼ã« ã¢ã»ã³ããªè¨èªé¨ï¼ARM-Mç¨ï¼
+ */
+
+#define TOPPERS_MACRO_ONLY
+#define UINT_C(val)		(val)		/* uint_tåã®å®æ°ãä½ããã¯ã­ */
+#define ULONG_C(val)	(val)		/* ulong_tåã®å®æ°ãä½ããã¯ã­ */
+#define CAST(type, val)	(val)		/* åã­ã£ã¹ããè¡ããã¯ã­ */
+
+#include "kernel_impl.h"
+#include "arm_m.h"
+#include "offset.h"
+#include "target_asm.inc"
+
+/*
+ *  ã¿ã¹ã¯ãã£ã¹ãããã£
+ */
+	ATEXT
+	ABALIGN(4)
+	ATHUMB(dispatch)
+	AGLOBAL(dispatch)
+ALABEL(dispatch)
+	/*
+	 *
+	 *  ãã®ã«ã¼ãã³ã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»ãã£ãããè¨±å¯ç¶æ
+
+	 *  ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨éç¶æ
+ã§å¼ã³åºãããï¼
+	 */
+	stmfd sp!,{r4-r11,lr}         /* ã¬ã¸ã¹ã¿ã®ä¿å­ */
+#ifdef TOPPERS_FPU_CONTEXT
+	/* 
+	 * ãã£ã¹ãããå
+ã®ã¿ã¹ã¯FPUãä½¿ç¨ããå ´åã¯FPUã¬ã¸ã¹ã¿ãä¿å­
+	 */ 
+	mrs   r0, control             /* CONTROL.FPCA == 0(FPUæªä½¿ç¨)ãªãã°ã¹ã­ãã */ 
+	tst   r0, #CONTROL_FPCA
+	beq   dispatch_1
+	vpush {s16-s31}               /* FPUã¬ã¸ã¹ã¿ã®ä¿å­ */ 
+ALABEL(dispatch_1)
+	push  {r0}                    /* å¾©å¸°æã®å¤å®ç¨ã«CONTROLãä¿å­ */  
+#endif /* TOPPERS_FPU_CONTEXT */
+	ldr   r0, =p_runtsk           /* p_runtskãèª­ã¿è¾¼ã */
+	ldr   r1, [r0]
+	str   sp, [r1,#TCB_sp]        /* ã¿ã¹ã¯ã¹ã¿ãã¯ãä¿å­ */
+	ldr   lr, =dispatch_r         /* å®è¡åéçªå°ãä¿å­ */
+	str   lr, [r1,#TCB_pc]        
+	b     dispatcher
+
+	ATHUMB(dispatch_r)
+	AGLOBAL(dispatch_r)
+ALABEL(dispatch_r)
+#ifdef TOPPERS_FPU_CONTEXT 
+	/* 
+	 * ãã£ã¹ãããå
+ã®ã¿ã¹ã¯ã§FPUãä½¿ç¨ãã¦ããå ´åã¯FPUã¬ã¸ã¹ã¿ãå¾©å¸°
+	 * ã¹ã¿ãã¯ã«ä¿å­ããCONTROL.FPCAããã§ãã¯ 
+	 */ 
+	pop   {r3}
+	tst   r3, #CONTROL_FPCA /* CONTROL.FPCA == 0(FPUæªä½¿ç¨)ãªãã°ã¹ã­ãã */ 
+	beq   dispatch_r_0
+	vpop {s16-s31}          /* FPUã¬ã¸ã¹ã¿ã®å¾©å¸° */ 
+ALABEL(dispatch_r_0)
+#endif /* TOPPERS_FPU_CONTEXT */
+	ldmfd sp!,{r4 - r11,lr}       /* ã¬ã¸ã¹ã¿ã®å¾©å¸° */
+	/*
+	 * ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®èµ·å
+	 * dispatcherããå¼ã³åºãããããï¼TCBã®ã¢ãã¬ã¹ã¯r1ã«å
+¥ã£ã¦ãã
+	 */
+	ldrb  r0,[r1,#TCB_enatex]
+	tst   r0,#TCB_enatex_mask
+	beq   dispatch_r_1            /* enatex ã false ãªããªã¿ã¼ã³ */
+	ldr   r0,[r1,#TCB_texptn]     /* texptn ã 0 ãªããªã¿ã¼ã³     */
+	tst   r0,r0
+	beq   dispatch_r_1            
+	ldr   r1, =ipmflg             /* ipmflgã false ãªããªã¿ã¼ã³  */
+	ldr   r0, [r1]
+	tst   r0,r0
+	beq   dispatch_r_1
+	ldr   r0, =call_texrtn        /* ã¿ã¹ã¯ä¾å¤ã«ã¼ãã³ã®å¼ã³åºã */
+	bx    r0
+ALABEL(dispatch_r_1)              /* ã¿ã¹ã¯ã¸ã®call_textnããæ»ã */
+	bx    lr
+
+/*
+ *  CPUä¾å¤ã¨ã³ããª
+ *
+ *  å²è¾¼ã¿ã¨ã³ããªã¨å¦çã®å
+å®¹ã¯åç­ã ãï¼ã­ã°ã®ç¨®é¡ãç°ãªãããï¼
+ *  åãã¦ããï¼
+ */
+	ABALIGN(4)
+	ATEXT
+	ATHUMB(core_exc_entry)
+	AGLOBAL(core_exc_entry)
+ALABEL(core_exc_entry)
+	/*
+	 *  ä¾å¤/å²è¾¼ã¿ãçºçããã¨ï¼çºçæã«ã¢ã¯ãã£ããªã¹ã¿ãã¯ã«ã¹ã¯ã©
+	 *  ããã¬ã¸ã¹ã¿ç­ãä¿å­ãããï¼
+	 *  ãã®å
+å®¹ã«å ãã¦ï¼CPUä¾å¤ãã³ãã©ã¸ã®æ
+å ±ã¨ãã¦ï¼basepri ã®å¤ã¨ï¼
+	 *  EXC_RETURNã®æ
+å ±ãå ãã¦ä¿å­ããï¼basepriã®å¤ã¯ï¼CPUä¾å¤ããã®
+	 *  ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤ãå
+ã«æ»ãããã«ãç¨ããããï¼
+	 *
+	 *   -----------
+	 *  |  basepri  |
+	 *   -----------
+	 *  | EXC_RETURN|
+	 *   -----------
+	 *  |    R0     |  
+	 *   -----------
+	 *  |    R1     |
+	 *   -----------
+	 *  |    R2     |
+	 *   -----------
+	 *  |    R3     |
+	 *   -----------
+	 *  |    R12    |
+	 *   -----------
+	 *  |    LR     |
+	 *   -----------
+	 *  |    PC     |
+	 *   -----------
+	 *  |   xPSR    |
+	 *   -----------
+	 *
+	 */
+
+	/*
+	 *  ã«ã¼ãã«ç®¡çå¤ã®ä¾å¤ããã§ãã¯
+	 *  ã«ã¼ãã«å
+ã®ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®å®è¡ä¸­ï¼å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
+ï¼
+	 *  CPUã­ãã¯ç¶æ
+ï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãã³ãã©å®è¡ä¸­ã®ããããã§
+	 *  çºçããCPUä¾å¤ãï¼ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ã¨å¼ã¶
+	 *  å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¯FAULTMASKã'1'ã®å ´å
+	 *  CPUã­ãã¯ç¶æ
+ã¯basepriãIIPM_LOCKãã§å¤æ­ããï¼
+	 */
+	mrs   r2, FAULTMASK           /* å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
+ãªãã«ã¼ãã«ç®¡çå¤ä¾å¤å¦çã¸ */
+	cbnz  r2, core_nonkernel_exc_entry
+
+	mrs   r0, basepri             /* baepriã®å¤ãåå¾ */
+	cmp   r0, #IIPM_LOCK          /* CPUã­ãã¯ç¶æ
+ãªãã«ã¼ãã«ç®¡çå¤ä¾å¤å¦çã¸ */
+	beq   core_nonkernel_exc_entry
+
+	/*
+	 * ã¹ã¿ãã¯ãå¤æ´ããå¿
+è¦ãããããã§ãã¯
+	 * EXC_RETURNï¼å²è¾¼ã¿æã«LRã«è¨­å®ãããå¤ï¼ããã§ãã¯ãã¦ï¼ä¾å¤çºçæã«
+	 * ã¢ã¯ãã£ããªã¹ã¿ãã¯ãç¹å®ãããã¨ã§å¤éå²è¾¼ã¿ãå¤å®ããï¼
+	 */
+	tst   lr, #EXC_RETURN_PSP    /* å²è¾¼ã¿å
+ãMSPãªãå¤éå²è¾¼ã¿ */
+	beq   core_exc_entry_1       /* å¤éå²è¾¼ã¿ãªãcore_exc_entry_1ã¸ */
+	mrs   r3, psp                /* ä¸æ®µç®ã®å²è¾¼ã¿ã®å ´åã¯PSPä¸ã« */
+	stmfd r3!, {r0, lr}          /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(lr)ã®é ã«PSPä¸ã«ç©ã */
+	msr   psp, r3                
+	push  {r0,lr}                /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(lr)ã®é ã«MSPä¸ã«ç©ã */
+	mov   r0, r3                 /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
+	b     core_exc_entry_2
+ALABEL(core_exc_entry_1)         /* å¤éå²è¾¼ã¿ã®å ´å */
+	push  {r0,lr}                /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(lr)ã®é ã«PSPä¸ã«ç©ã */
+	mov   r0, sp                 /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
+
+	/*
+	 *  å
+±éå¦ç
+	 */
+ALABEL(core_exc_entry_2)
+	mrs   r3, ipsr               /* ãã³ãã©ã¢ãã¬ã¹ãåå¾ */
+	ldr   r1, =_kernel_exc_tbl
+	ldr   r2, [r1, r3, lsl #2]
+
+#ifdef LOG_EXC_ENTER
+	push  {r0,r2,r3}
+	mov   r0, r3                 /* ä¾å¤çªå·ããã©ã¡ã¼ã¿ã«  */
+	bl    log_exc_enter          /* log_exc_enterãå¼ã³åºã */
+	pop   {r0,r2,r3}
+	push  {r3}                   /* ä¾å¤çªå·ãã¹ã¿ãã¯ã¸    */
+#endif /* LOG_EXC_ENTER */
+
+	/*
+	 *  CPUä¾å¤ãã³ãã©ã®å¼ã³åºã
+	 */
+	blx   r2
+
+#ifdef LOG_EXC_ENTER
+	pop   {r0}                   /* ä¾å¤çªå·ãå¼æ°ã«        */
+	bl    log_exc_leave          /* log_exc_leaveãå¼ã³åºã */
+#endif /* LOG_EXC_ENTER */
+
+	b     ret_exc
+
+/*
+ *  ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ã®åºå
+¥å£å¦ç
+ */
+ALABEL(core_nonkernel_exc_entry)
+	tst   lr, #EXC_RETURN_PSP    /* å²è¾¼ã¿å
+ãMSPãªãå¤éå²è¾¼ã¿ */
+	beq   core_nonkernel_exc_entry_1  /* å¤éå²è¾¼ã¿ãªã */
+	mrs   r3, psp                /* ä¸æ®µç®ã®å²è¾¼ã¿ã®å ´åã¯PSPä¸ã« */
+	stmfd r3!, {r0, lr}          /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(lr)ã®é ã«PSPä¸ã«ç©ã */
+	msr   psp, r3                
+	push  {r0,lr}                /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(lr)ã®é ã«MSPä¸ã«ç©ã */
+	mov   r0, r3                 /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
+	b     core_nonkernel_exc_entry_2
+ALABEL(core_nonkernel_exc_entry_1) /* å¤éå²è¾¼ã¿ã®å ´å */
+	push  {r0,lr}                /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(lr)ã®é ã«PSPä¸ã«ç©ã */
+	mov   r0, sp                 /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
+
+ALABEL(core_nonkernel_exc_entry_2)
+	mrs   r3, ipsr               /* CPUä¾å¤ãã³ãã©ã®ã¢ãã¬ã¹ãåå¾ */
+	ldr   r1, =_kernel_exc_tbl
+	ldr   r2, [r1, r3, lsl #2]
+
+	/*
+	 *  CPUä¾å¤ãã³ãã©ã®å¼ã³åºã
+	 */
+	blx   r2
+
+	/*
+	 *  å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨ããï¼
+	 */
+	cpsid f
+
+	/*
+	 *  æ»ãå
+ã®ã³ã³ãã­ã¹ãã®å¤å®
+	 * 
+	 *  å²è¾¼ã¿ãã³ãã©å®è¡ã«LRã«ã»ãããããEXC_RETURNããã§ãã¯ãã¦ï¼æ»ã
+	 *  å
+ã§MSPãä½¿ããã¦ããã°ï¼å²è¾¼ã¿å
+ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãã¨å¤å®ããï¼
+	 */
+	pop   {r1,r3}                  /* å
+ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(basepri)ãr1ã¸ï¼EXC_RETURNãr3ã¸ */
+	tst   r3, #EXC_RETURN_PSP      /* æ»ãå
+ãPSPãªã              */
+	bne   core_nonkernel_ret_exc_1
+	b     core_nonkernel_ret_exc_2 /* ã®å¤ãMSPããåå¾ */
+
+ALABEL(core_nonkernel_ret_exc_1)
+	/*
+	 *  PSPä¸ããï¼EXC_RETURN(r0)ã¨å
+ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(basepri)åãåé¤
+	 */
+	mrs   r2, psp
+	add   r2, r2, #(0x04*2)
+	msr   psp, r2
+
+ALABEL(core_nonkernel_ret_exc_2)
+	msr   basepri, r1             /* å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå²è¾¼ã¿åã«ç¶æ
+ã¸ */
+	bx    r3                      /* ãªã¿ã¼ã³ */
+
+/*
+ *  å²è¾¼ã¿ã¨ã³ããª
+ */
+	ATHUMB(core_int_entry)
+	AGLOBAL(core_int_entry)
+ALABEL(core_int_entry)
+	/*
+	 *  å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãã¹ã¿ãã¯ã«ä¿å­ããããåå¾
+	 */
+	mrs   r0, basepri             /* baepriã®å¤ãåå¾ */
+
+	/*
+	 * å¤éå²è¾¼ã¿ããã§ãã¯
+	 * EXC_RETURNï¼å²è¾¼ã¿æã«LRã«è¨­å®ãããå¤ï¼ããã§ãã¯ãã¦ï¼ä¾å¤çºçæã«
+	 * ã¢ã¯ãã£ããªã¹ã¿ãã¯ãç¹å®ãããã¨ã§å¤éå²è¾¼ã¿ãå¤å®ããï¼
+	 */
+	tst   lr, #EXC_RETURN_PSP    /* å²è¾¼ã¿å
+ãMSPãªãå¤éå²è¾¼ã¿ */
+	beq   core_int_entry_1       /* å¤éå²è¾¼ã¿ãªãcore_int_entry_1ã¸ */
+	mrs   r3, psp                /* ä¸æ®µç®ã®å²è¾¼ã¿ã®å ´åã¯PSPä¸ã« */
+	stmfd r3!, {r0, lr}          /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(lr)ã®é ã«PSPä¸ã«ç©ã */
+	msr   psp, r3                
+	push  {r0,lr}                /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(lr)ã®é ã«MSPä¸ã«ç©ã */
+	mov   r0, r3                 /* æªå®ç¾©ã®å²è¾¼ã¿ãçºçããå ´åã®æ
+å ±ã¨ãã */
+	b     core_int_entry_2
+ALABEL(core_int_entry_1)         /* å¤éå²è¾¼ã¿ã®å ´å */
+	push  {r0,lr}                /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(lr)ã®é ã«PSPä¸ã«ç©ã */
+	mov   r0, sp                 /* æªå®ç¾©ã®å²è¾¼ã¿ãçºçããå ´åã®æ
+å ±ã¨ãã */
+
+	/*
+	 *  å
+±éå¦ç
+	 */
+ALABEL(core_int_entry_2)
+	mrs   r3, ipsr               /* ãã³ãã©ã¢ãã¬ã¹ãåå¾ */
+	ldr   r1, =_kernel_exc_tbl
+	ldr   r2, [r1, r3, lsl #2]
+
+	/*
+	 *  basepriã®è¨­å®
+	 *  NVICåªå
+åº¦ãã¹ã¯ãèªåçã«è¨­å®ãããããåªå
+åº¦ãã¹ã¯ã®ç¹ã§ã¯å¿
+è¦ãª
+	 *  ããï¼x_get_ipm()ãbasepriãåç
+§ããããï¼basepriãæ´æ°ããï¼
+	 */
+	ldr   r1, =_kernel_int_iipm_tbl
+	ldr   lr, [r1, r3, lsl #2]
+	msr   basepri, lr
+
+#ifdef LOG_INH_ENTER
+	push  {r0,r2,r3}
+	mov   r0, r3                 /* ä¾å¤çªå·ããã©ã¡ã¼ã¿ã«  */
+	bl    log_inh_enter          /* log_exc_enterãå¼ã³åºã */
+	pop   {r0,r2,r3}
+#endif /* LOG_EXC_ENTER */
+
+#ifdef LOG_INH_LEAVE
+	push  { r3 }                   /* ä¾å¤çªå·ãã¹ã¿ãã¯ã¸    */
+#endif /* LOG_INT_LEAVE */
+
+	/*
+	 *  å²è¾¼ã¿ãã³ãã©ã®å¼ã³åºã
+	 */
+	blx   r2
+
+#ifdef LOG_INH_LEAVE
+	pop   {r0}                   /* ä¾å¤çªå·ãå¼æ°ã«        */
+	bl    log_exc_leave          /* log_exc_leaveãå¼ã³åºã */
+#endif /* LOG_INH_LEAVE */
+
+/*
+ *  å²è¾¼ã¿/ä¾å¤åºå£
+ *
+ *  ret_exc/ret_intã¯ï¼CPUä¾å¤/å²è¾¼ã¿ãã³ãã©ããæ»ã£ãç´å¾ã«å®è¡ãã
+ *  ã«ã¼ãã³ã§ããï¼
+ */
+ALABEL(ret_exc)
+ALABEL(ret_int)
+	/*
+	 *  å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨ããï¼ãã®æç¹ã§ã¯ï¼CPUã­ãã¯ç¶æ
+ã«ã¯ãªããªã
+	 * ï¼basepriã¨lock_flagã¨saved_iipmã¯æ´æ°ããªãï¼ï¼
+	 *
+	 *  å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨ããã®ã¯ï¼æ»ãå
+ã®ã³ã³ãã­ã¹ãã®ãã§ãã¯ã¨ï¼
+	 *  æ»ãå
+ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãã§ãã£ãå ´åã®ãªã¿ã¼ã³ãã¢ãããã¯
+	 *  ã«è¡ãããã§ããï¼bsepriãCPUã­ãã¯ã®å¤ã«ãããã¨ã§ãã¢ããã
+	 *  ã¯ãªãã§ãã¯ã¨å¾©å¸°ã¯å¯è½ã§ãããï¼å²è¾¼ã¿ãããªã¿ã¼ã³ãã¦ãï¼
+	 *  basepri ã®è¨­å®å
+å®¹ã¯å
+ã«æ»ããªãããï¼ä½¿ç¨ãããã¨ãã§ããªãï¼ 
+	 *  ä¸æ¹ï¼FAULTMASKã¯ï¼å²è¾¼ã¿ããã®ãªã¿ã¼ã³å¦çã«ãã£ã¦ï¼'0'ã«ã¯ãª
+	 *  ã¢ãããï¼
+	 */
+	cpsid f
+
+	/*
+	 *  æ»ãå
+ã®ã³ã³ãã­ã¹ãã®å¤å®
+	 * 
+	 *  å²è¾¼ã¿ãã³ãã©å®è¡ã«LRã«ã»ãããããEXC_RETURNããã§ãã¯ãã¦ï¼æ»ã
+	 *  å
+ã§MSPãä½¿ããã¦ããã°ï¼å²è¾¼ã¿å
+ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãã¨å¤å®ããï¼
+	 */
+	pop   {r1,r3}                  /* å
+ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(basepri)ãr1ã¸ï¼EXC_RETURNãr3ã¸ */
+	tst   r3, #EXC_RETURN_PSP      /* æ»ãå
+ãPSPãªã ret_int_1 ã¸ */
+	bne   ret_int_1
+	b     ret_int_2                /* ã®å¤ãMSPããåå¾ */
+
+	/*
+	 *  ä¸æ®µç®ã®å²è¾¼ã¿ã®åºå£å¦ç
+	 */
+ALABEL(ret_int_1)
+	/*
+	 *  reqflgããã§ãã¯ãã
+	 * 
+	 *  ã«ã¼ãã«ç®¡çå
+ã®å²è¾¼ã¿ã¯ç¦æ­¢ããç¶æ
+ã§å®è¡ããå¿
+è¦ãããããï¼
+	 *  FAULTMASKã'1'ã«ããç¶æ
+ã§å®è¡ããï¼
+	 *  reqflgããã§ãã¯ããåã«å²è¾¼ã¿ãç¦æ­¢ããã®ã¯ï¼reqflgããã§ãã¯
+	 *  ããç´å¾ã«å²è¾¼ã¿ãã³ãã©ãèµ·åããï¼ãã®ä¸­ã§ãã£ã¹ããããè¦æ±
+	 *  ãããå ´åã«ï¼ããã«ãã£ã¹ããããããªãã¨ããåé¡ãçãããã
+	 *  ã§ããï¼
+	 */
+	ldr   r0, =reqflg             /* reqflgãfalseãªããã®ã¾ã¾æ»ã */
+	ldr   r2, [r0]
+	cbnz  r2, ret_int_3           /* trueãªãret_int_3ã¸           */
+
+	/*
+	 *  PSPä¸ããï¼EXC_RETURN(r0)ã¨å
+ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(basepri)åãåé¤
+	 */
+	mrs   r2, psp
+	add   r2, r2, #(0x04*2)
+	msr   psp, r2
+
+ALABEL(ret_int_2)
+	/*
+	 *  ããã«ã¯å²è¾¼ã¿ã­ãã¯ç¶æ
+ï¼FAULTMASKãã»ããï¼ãããç¶æ
+ã§æ¥ãï¼
+	 *  Threadã¢ã¼ãããã®ãªã¿ã¼ã³ã«ããèªåçã«å²è¾¼ã¿ã­ãã¯è§£é¤ç¶æ
+ã«ãªãï¼
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã¯å²è¾¼ã¿åã«ç¶æ
+ã«æ»ãï¼
+	 */ 
+	msr   basepri, r1             /* å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå²è¾¼ã¿åã®ç¶æ
+ã¸ */
+	bx    r3                      /* ãªã¿ã¼ã³ */
+
+ALABEL(ret_int_3)
+	/*
+	 *  ããã§ã¯ï¼æ»ãå
+ãã¿ã¹ã¯ã§ããï¼PSPä¸ã«ã¹ã¯ã©ããã¬ã¸ã¹ã¿ã¨å²
+	 *  è¾¼ã¿åªå
+åº¦ãã¹ã¯(basepri)ãä¿å­ãããç¶æ
+ã«ãªã£ã¦ããï¼ã¾ãï¼
+	 *  ãã­ã»ããµã¯ï¼Handlerã¢ã¼ãã»å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨ãªã£ã¦ããï¼
+	 *  ã¾ãï¼r0ã«ã¯ï¼reqflgã®ã¢ãã¬ã¹ï¼r3ã«ã¯å²è¾¼ã¿åä»æã®lrã®å¤ãä¿
+	 *  æããã¦ããï¼
+	 */
+	/*
+	 *  ã¿ã¹ã¯ä¾å¤ãã³ãã©ããã£ã¹ããããããéã«Threadã¢ã¼ãã¸é·ç§»ãã
+	 *  ããã¼ã®ã¹ã¿ãã¯ãã¬ã¼ã ãä½æãã¦ï¼bxå½ä»¤ã§Handlerã¢ã¼ããããª
+	 *  ã¿ã¼ã³ããï¼ã¾ãï¼é
+å»¶ãã£ã¹ãããããå ´åãï¼åã³å²ãè¾¼ãã ã¿ã¹
+	 *  ã¯ã«æ»ãéã«ã¯ï¼svcå½ä»¤ã§ï¼svc_handlerãå¼ã³åºãï¼
+	 *  ã¹ã¿ãã¯ãã¬ã¼ã ã¯ï¼Configureation and Control Register(CCR)ã®
+	 *  STKALIGNã'1'ã®å ´åã¯ï¼8byteå¢çã«ã¢ã©ã¤ã³ãããï¼
+	 *  åè : DDI0403B_arm_architecture_v7m_reference_manual(P.220)
+	 *  ãã®ããï¼ãã®æç¹ã®ã¹ã¿ãã¯ã¯å²è¾¼ã¿ãä¾å¤çºçæã«ä½æããã
+	 *  ã¹ã¿ãã¯ãã¬ã¼ã ããï¼8byteå¢çã®ãµã¤ãºã«ãã¦ããã¨ï¼svc_handler
+	 *  ç­ã§ã¹ã¿ãã¯ãã¬ã¼ã ã®ã¢ã©ã¤ã¡ã³ãã®æç¡ã®ç¢ºèªãçç¥ã§ããï¼
+	 *  ãã ãï¼ã·ã¹ãã èµ·åå¾ã¯ï¼åçã«CCRã®STKALIGNã®è¨­å®ãå¤æ´ããã®ã¯
+	 *  ç¦æ­¢ã¨ããï¼
+	 *  ãã®æç¹ã¯æ¨æºã®ã¹ã¿ãã¯ãã¬ã¼ã ã¯ï¼å²è¾¼ã¿ã»ä¾å¤çºçæã¨åç­ã§ã
+	 *  ãããï¼ã¿ã¹ã¯ã¹ã¿ãã¯(PSP)ã¯8byteå¢çã«ãªã£ã¦ããï¼
+	 */
+	mov   r1, #0                   /* reqflgãfalseã« */
+	str   r1, [r0]
+
+	/*
+	 *  CPUã­ãã¯ç¶æ
+ã«ç§»è¡ããï¼
+	 *
+	 *  ã«ã¼ãã«ã®ç®¡çå
+ã®å²è¾¼ã¿ãç¦æ­¢ããããã«basepriãè¨­å®ãï¼
+	 *  lock_flag ã¨ saved_iipm ãæ´æ°ããï¼saved_iipmã¯ï¼æ»ãå
+ã®å²è¾¼ã¿
+	 *  åªå
+åº¦ãã¹ã¯ï¼ã®å
+é¨è¡¨ç¾ï¼ã«è¨­å®ããï¼
+	 *  ãã®æç¹ã§CPUã­ãã¯ç¶æ
+ã¨ããã®ã¯ï¼dispatcherã¸åå²ããæã¨ï¼
+	 *  call_texrtnãå¼ã³åºãæã«ï¼CPUã­ãã¯ç¶æ
+ã«ãªã£ã¦ããå¿
+è¦ããã
+	 *  ããã§ããï¼
+	 *  ãªãï¼ãã®å¦çã®å¾ï¼Threadã¢ã¼ãã¸ã®ç§»è¡å¦çãè¡ãªãããï¼å²è¾¼ã¿
+	 *  ã­ãã¯ç¶æ
+(FAULTMASKã"1")ã¯ä¿æããï¼
+	 */
+	ldr   r1, =IIPM_LOCK          /* CPUã­ãã¯ç¶æ
+ */ 
+	msr   basepri, r1          
+	mov   r1, #0x01               /* lock_flag ã trueã« */
+	ldr   r0, =lock_flag          
+	str   r1, [r0]
+
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãï¼å
+¨è§£é¤ç¶æ
+ï¼TIPM_ENAALLï¼ã«è¨­å®ãã
+	 *  ãã§ã«CPUã­ãã¯ç¶æ
+ãªã®ã§ï¼saved_iipmãIIPM_ENAALLã¨ããï¼
+	 */
+	ldr   r1, =IIPM_ENAALL
+	ldr   r0, =saved_iipm
+	str   r1, [r0]
+
+	/*
+	 *  Threadã¢ã¼ãã¸ç§»è¡ããï¼
+	 *
+	 *  dispatcherãcall_texrnãå¼ã³åºãå ´åã¯ï¼Threadã¢ã¼ãã§ããå¿
+
+	 *  è¦ãããããï¼PSPã¹ã¿ãã¯ä¸ã«ããã¼ã®ä¾å¤ãã¬ã¼ã ãç½®ãã¦ï¼
+	 *  æ¬ä¼¼çã«å²è¾¼ã¿ãã³ãã©ãããªã¿ã¼ã³ããï¼
+	 *  ãªã¿ã¼ã³ã¨åæã«FAULTMASKãèªåçã«ã¯ãªã¢ããï¼ã«ã¼ãã«ç®¡çå¤ã®
+	 *  å²è¾¼ã¿ãè¨±å¯ãããï¼
+	 */
+	ldr   r0, =ret_int_4          /* PC   */
+	ldr   r1, =EPSR_T             /* xPSR(Tãããã'1'ã§ããå¿
+è¦ããã) */
+	mrs   r2, psp
+	stmfd r2!, {r0-r1}            /* ããã¼ãã¬ã¼ã ãã¹ã¿ãã¯ä¸ã«ç©ã   */
+	subs  r2, #(EXC_FRAME_SIZE - (4*2)) /* r0-r3,r12,lrã®å
+å®¹ã¯è¨­å®ããå¿
+è¦ããªã */
+	msr   psp,r2       
+	/* Basicãã¬ã¼ã ï¼THREADã¢ã¼ãï¼PSPã®ããã® EXC_RETURN */
+	mov   r0, #(EXC_RETURN_TREAD_PSP|EXC_RETURN_OTHER|EXC_RETURN_FP_NONUSED)
+	bx    r0                      /* Threadã¢ã¼ãã¸ç§»è¡ */
+    
+ALABEL(ret_int_4)
+	/*
+	 *  ä¸è¨ã®å¦çã«ããï¼Threadã¢ã¼ãã§å®è¡ãããï¼
+	 *  dspflgãfalseã§ããå ´åã¨ï¼p_runtskã¨p_schedtskãåãå ´åã«ã¯ï¼
+	 *  ãã£ã¹ããããè¡ããªãï¼ãã®ãã§ãã¯ãå¿
+è¦ãªã®ã¯ï¼ã¿ã¹ã¯ä¾å¤å¦
+	 *  çã«ã¼ãã³ã®å¼åºããå¿
+è¦ãªå ´åã«ï¼ãã£ã¹ããããå¿
+è¦ãªãã¦ãï¼
+	 *  reqflgãtrueã«ããããã§ããï¼
+	 */
+	ldr   r0, =p_runtsk       /* ãã£ã¹ããããè¡ããªãå ´åã§ãï¼r1ã«p_runtsk ã®å¤(TCB) */
+	ldr   r1, [r0]            /* ãå
+¥ã£ã¦ããå¿
+è¦ãããã®ã§ï¼å
+ã«èª­ã¿è¾¼ã */
+	ldr   r0, =dspflg         
+	ldr   r2, [r0]
+	cbz   r2, ret_int_r_1     /* dspflgãfalseãªãret_int_r_1ã¸ */
+	ldr   r0, =p_schedtsk     
+	ldr   r2, [r0]
+	cmp   r1, r2              /* p_runtskã¨p_schedtskãåããªã */
+	beq   ret_int_r_1         /*                  ret_int_r_1ã¸ */
+#ifdef TOPPERS_FPU_CONTEXT
+	ldr  r3, [sp,4]          /*  ãã£ã¹ãããå
+ã®EXC_RETURNãåå¾ */ 
+	/* 
+	 * ãã£ã¹ãããå
+ã®ã¿ã¹ã¯FPUãä½¿ç¨ããå ´åã¯FPUã¬ã¸ã¹ã¿ãä¿å­
+	 */ 
+	tst   r3, #EXC_RETURN_FP
+	bne   ret_int_5         /* EXC_RETURN[4] == 1(FPUæªä½¿ç¨)ãªãã°ã¹ã­ãã */ 
+	vpush {s16-s31}         /* FPUã¬ã¸ã¹ã¿ã®ä¿å­ */ 
+ALABEL(ret_int_5) 
+	push {r3}               /*  æ»ãå
+ã®EXC_RETURNãä¿å­ */ 
+#endif /* TOPPERS_FPU_CONTEXT */ 
+	stmfd sp!, {r4-r11}       /* æ®ãã®ã¬ã¸ã¹ã¿ãä¿å­ */
+	str   sp, [r1,#TCB_sp]    /* ã¿ã¹ã¯ã¹ã¿ãã¯ãä¿å­ */
+	ldr   lr, =ret_int_r      /* å®è¡åéçªå°ãä¿å­   */
+	str   lr, [r1,#TCB_pc]
+	b     dispatcher          /* ãã£ã¹ãããã£ã¸ */
+
+/*
+ * å²è¾¼ã¿ã«ããããªã¨ã³ãããããã¿ã¹ã¯ã¸ã®ãªã¿ã¼ã³å¦ç
+ *
+ * Threadã¢ã¼ãã§ï¼ãã£ã¹ãããã£ãå²è¾¼ã¿ã®åºå£å¦çããå¼ã³åºãããï¼
+ * å²è¾¼ã¿ã«ããããªã¨ã³ãããããã¿ã¹ã¯ã¸ãªã¿ã¼ã³ããã«ã¯ï¼ãã£ãã
+ * Handlerã¢ã¼ãã«ç§»è¡ãï¼PCã«0xfffffffdãä»£å
+¥ãã¦ãªã¿ã¼ã³ããå¿
+è¦
+ * ãããï¼ãã®ããï¼SVCã«ããï¼SVCãã³ãã©ãå¼ã³åºãï¼Handlerã¢ã¼
+ * ãã¸ç§»è¡ããï¼
+ */
+	ATHUMB(ret_int_r)
+	AGLOBAL(ret_int_r)
+ALABEL(ret_int_r)
+	pop {r4-r11}                  /* ã¬ã¸ã¹ã¿ã®å¾©å¸° */
+#ifdef TOPPERS_FPU_CONTEXT 
+	pop {r3}     /*  æ»ãå
+ã®EXC_RETURNãåå¾ */ 
+	/* 
+	 * ãã£ã¹ãããå
+ã®ã¿ã¹ã¯FPUãä½¿ç¨ããå ´åã¯FPUã¬ã¸ã¹ã¿ãå¾©å¸°
+	 */ 
+	tst r3, #EXC_RETURN_FP
+	bne ret_int_r_1      /* EXC_RETURN[4] == 1(FPUæªä½¿ç¨)ãªãã°ã¹ã­ãã */ 
+	vpop {s16-s31}       /* FPUã¬ã¸ã¹ã¿ã®å¾©å¸° */ 
+#endif /* TOPPERS_FPU_CONTEXT */ 
+ALABEL(ret_int_r_1)
+	/*
+	 *  enatexãtrueã§ï¼texptnã0ã§ãªããã°ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã
+	 *  å¼ã³åºãï¼
+	 *  dispatcherããå¼ã³åºãããããï¼TCBã®ã¢ãã¬ã¹ã¯r1ã«å
+¥ã£ã¦ãã
+	 */
+	ldrb  r0, [r1,#TCB_enatex]
+	tst   r0, #TCB_enatex_mask
+	beq   ret_int_r_2           /* enatex ã false ãªã ret_int_r_2ã¸ */
+	ldr   r0, [r1,#TCB_texptn]  /* texptn ã 0 ãªããªã¿ã¼ã³     */
+	cbz   r0, ret_int_r_2
+	ldr   r1, =ipmflg           /* ipmflgã false ãªããªã¿ã¼ã³  */
+	ldr   r0, [r1]
+	cbz   r0, ret_int_r_2
+#ifdef TOPPERS_FPU_LAZYSTACKING
+	/*  
+	 *  Lazy Stacking ãã¤ å²è¾¼ã¿ã®åºå£å¦çããã®åå²ã§æ¥ãå ´åã¯
+	 *  ããã§FPUå½ä»¤ãå®è¡ãã¦ä¾å¤ãã¬ã¼ã ã«FPUã®ã³ã³ãã­ã¹ããæ¸ãæ»ãå¿
+è¦ããã
+	 *  ä»ã®ç¶æ³ã§ã¯å¿
+è¦ãªããï¼å¤æ­ãå°é£ãªããä¸å¾å®è¡ããï¼
+	 */
+	vmov r3, s15
+#endif /* TOPPERS_FPU_LAZYSTACKING */ 
+	bl    call_texrtn           /* ã¿ã¹ã¯ä¾å¤ã«ã¼ãã³ã®å¼ã³åºã */
+ALABEL(ret_int_r_2)
+#ifdef TOPPERS_FPU_CONTEXT
+	/*
+	 *  SVCã®å®è¡ã§FPUã³ã³ãã­ã¹ããã¹ã¿ãã¯ã«ç©ã¾ãªãããã«
+	 *  CONTROL.FPCAãã¯ãªã¢
+	 */
+	mrs   r3, control       
+	bic   r3, r3, #CONTROL_FPCA
+	msr   control, r3
+#endif /* TOPPERS_FPU_CONTEXT */
+	svc   0                     /* SVCã®å¼ã³åºã */
+
+/*
+ *  SVCãã³ãã©
+ */
+	ATHUMB(svc_handler)
+	AGLOBAL(svc_handler)
+ALABEL(svc_handler)
+	/*
+	 *  å²è¾¼ã¿å¦çããã®ãªã¿ã¼ã³ã«ããï¼CPUã­ãã¯è§£é¤ç¶æ
+ã«ç§»è¡ããã
+	 *  ãæºåããï¼
+	 */
+	cpsid f                       /* å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¸ */
+	mrs   r0, psp
+	adds  r0, #EXC_FRAME_SIZE     /* ã¹ã¿ãã¯ãæ¨ã¦ã   */
+	ldmfd r0!,{r1,lr}             /* EXC_RETURNã¯ï¼FPUä½¿ç¨æã»æªä½¿ç¨æã§ç°ãªãããã¹ã¿ãã¯ããåå¾ */
+	msr   psp, r0
+	mov   r0, #0
+	ldr   r1, =lock_flag          /* CPUã­ãã¯è§£é¤ç¶æ
+ã¸ */
+	str   r0, [r1]
+	ldr   r1, =IIPM_ENAALL        /* å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+¨è§£é¤ç¶æ
+ã«è¨­å® */
+	msr   basepri, r1             
+	bx    lr                      /* ãªã¿ã¼ã³     */
+
+/*
+ *  ãã£ã¹ãããã£ã®åä½éå§
+ */
+	ATHUMB(start_dispatch)
+	AGLOBAL(start_dispatch)
+ALABEL(start_dispatch)
+	/*
+	 *  ãã®ã«ã¼ãã³ã¯ï¼ã«ã¼ãã«èµ·åæã«ï¼ãã¹ã¦ã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+
+	 * ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨åç­ï¼ã§å¼ã³åºãããï¼ã¾ãï¼å²è¾¼ã¿ã¢ã¼ãï¼é
+	 *  ã¿ã¹ã¯ã³ã³ãã­ã¹ãã¨åç­ï¼ã§å¼ã³åºããããã¨ãæ³å®ãã¦ããï¼
+	 *
+	 *  core_initializeã§ï¼lock_flagãtrueã«ï¼saved_iipmãIIPM_ENAALLã«
+	 *  åæåãã¦ããããï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãè¨±å¯ãããã¨ã§ï¼
+	 *  CPUã­ãã¯ç¶æ
+ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã«ãªãï¼
+	 *  ã¾ãï¼task_initializeã§disdspãfalseã«åæåãã¦ããããï¼ãã£
+	 *  ã¹ãããè¨±å¯ç¶æ
+ã«ãªã£ã¦ããï¼
+	 */
+	ldr   r0,=istkpt              /* MSPãåæå   */
+	ldr   r1,[r0]                 /* start_dispatchå¼ã³åºãæã«å¼ã³åºãç¨ã« */
+	msr   msp, r1                 /* ä½¿ç¨ãã¦ããããåæåãã             */
+	ldr   r1, =IIPM_LOCK          /* ã«ã¼ãã«ç®¡çå
+ã®å²è¾¼ã¿ãç¦æ­¢ */
+	msr   basepri, r1 
+	cpsie f                       /* ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãè¨±å¯ */
+	mov   r0, #CONTROL_PSP        /* PSPãæå¹ã«  */
+	msr   control, r0
+	isb                           /* control ã®æä½å¾ã«å¿
+è¦ */
+
+/*
+ *  ç¾å¨ã®ã³ã³ãã­ã¹ããæ¨ã¦ã¦ãã£ã¹ããã
+ */
+	ATHUMB(exit_and_dispatch)
+	AGLOBAL(exit_and_dispatch)
+ALABEL(exit_and_dispatch)
+	/* ãã£ã¹ãããã£æ¬ä½ï¼dispatcherï¼ã¸ */ 
+
+/*
+ *  ãã£ã¹ãããã£æ¬ä½
+ */
+ALABEL(dispatcher)
+	/*
+	 *  ãã®ã«ã¼ãã³ã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»ãã£ã¹ããã
+	 *  è¨±å¯ç¶æ
+ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§å¼ã³åºã
+	 *  ããï¼
+	 *
+	 *  ããªãã¡ï¼Threadã¢ã¼ãã»lock_flagãtrueã»disdspãfalseã»dspflg
+	 *  ãtrueã»saved_iipmãIIPM_ENAALLã¨ãªã£ã¦ããï¼å®è¡åéçªå°ã¸ãã
+	 *  ã®ç¶æ
+ã®ã¾ã¾åå²ããï¼
+	 */
+#ifdef TOPPERS_FPU_CONTEXT
+	mrs   r3, control       /* ãã£ã¹ãããã£å®è¡æã¯FPCAãä¸å¾ã¯ãªã¢ãã */
+	bic   r3, r3, #CONTROL_FPCA
+	msr   control, r3
+#endif /* TOPPERS_FPU_CONTEXT */
+#ifdef LOG_DSP_ENTER
+	ldr   r1, =p_runtsk     /* p_runtskããã©ã¡ã¼ã¿ã« */
+	ldr   r0, [r1]        
+	bl    log_dsp_enter
+#endif /* LOG_DSP_ENTER */
+ALABEL(dispatcher_0)
+	ldr   r0, =p_schedtsk   /* p_schedtskãp_runtskã« */
+	ldr   r1, [r0]
+	ldr   r2, =p_runtsk   
+	str   r1, [r2]        
+	cbz   r1, dispatcher_1  /* p_runtskãNULLãªãdispatcher_1ã¸ */           
+	ldr   sp, [r1,#TCB_sp]  /* ã¿ã¹ã¯ã¹ã¿ãã¯ãå¾©å¸° */
+#ifdef LOG_DSP_LEAVE
+	mov   r0, r1            /* p_runtskããã©ã¡ã¼ã¿ã« */
+	mov   r4, r1            /* r1ã¯ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãªã®ã§ä¿å­ */
+	bl    log_dsp_leave
+	mov   r1, r4
+#endif /* LOG_DSP_LEAVE */
+	ldr   pc, [r1,#TCB_pc]  /* å®è¡åéçªå°ãå¾©å¸°   */    
+ALABEL(dispatcher_1)
+	/*
+	 * CPUã­ãã¯ç¶æ
+ã®è§£é¤ã¨ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãå®è¡ç¶æ
+ã¸ã®
+	 * æºåããã
+	 */
+	mov   r0, #CONTROL_MSP  /* MSPãæå¹ã«  */
+	msr   control, r0       
+	isb                     /* control ã®æä½å¾ã«å¿
+è¦ */
+	mov   r4, #0            /* r4 <- '0' */
+	ldr   r5, =IIPM_LOCK    /* r5 <- å²è¾¼ã¿ã­ãã¯ç¶æ
+ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤ */
+	ldr   r6, =reqflg       /* r6 <- reqflg */
+	ldr   r7, =lock_flag    /* r7 <- lock_flg */
+	str   r4, [r7]          /* CPUã­ãã¯è§£é¤ç¶æ
+ã¸ */
+ALABEL(dispatcher_2)
+	/*
+	 *  å²è¾¼ã¿ãè¨±å¯ãï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãå®è¡ç¶æ
+ã¨ãå²è¾¼ã¿ãå¾
+ã¤ï¼
+	 *
+	 *  ããã§éã¿ã¹ã¯ã³ã³ãã­ã¹ãå®è¡ç¶æ
+ã«åãæããã®ã¯ï¼ããã§çºç
+	 *  ããå²è¾¼ã¿å¦çã«ã©ã®ã¹ã¿ãã¯ãä½¿ããã¨ããåé¡ã®è§£æ±ºã¨ï¼å²è¾¼ã¿
+	 *  ãã³ãã©å
+ã§ã®ã¿ã¹ã¯ãã£ã¹ãããã®é²æ­¢ã¨ãã2ã¤ã®æå³ãããï¼
+	 *
+	 *  ãã­ã»ããµãå²è¾¼ã¿å¾
+ã¡ã«ç§»è¡ãããå¦çã¨ï¼å²è¾¼ã¿è¨±å¯ã¨ã¯ï¼ä¸å¯
+	 *  åã«è¡ãªãå¿
+è¦ãããï¼
+	 *  ãããä¸å¯åã«è¡ãªããªãå ´åï¼å²è¾¼ã¿ãè¨±å¯ããç´å¾ã«å²è¾¼
+	 *  ã¿ãå
+¥ãï¼ãã®ä¸­ã§ã¿ã¹ã¯ãå®è¡å¯è½ç¶æ
+ã«ãªãã¨ï¼å®è¡ãã¹ãã¿ã¹
+	 *  ã¯ãããã«ãããããããã­ã»ããµãå²è¾¼ã¿å¾
+ã¡ã«ãªã£ã¦ãã¾ãï¼
+	 *  ARM-Mã§ã¯ï¼PRIMASKãã»ããããç¶æ
+ã§WFIãå¼ã³åºããã¨ã§å®ç¾ã§ããï¼
+	 *  ãã®ç¶æ
+ã§å²è¾¼ã¿ãå
+¥ãã¨ï¼å²è¾¼ã¿ã¯å®è¡ãããï¼WFIãããªã¿ã¼ã³ã
+	 *  ããã¨ã«ãªãã®ã§ï¼ä¸æ¦å²è¾¼ã¿ãè¨±å¯ãã¦å²è¾¼ã¿ãã³ãã©ãå®è¡ããï¼
+	 *
+	 *  å²è¾¼ã¿å¾
+ã¡ã®éã¯ï¼p_runtskãNULLï¼ï¼0ï¼ã«è¨­å®ããªããã°ãªããª
+	 *  ãï¼ãã®ããã«è¨­å®ããªãã¨ï¼å²è¾¼ã¿ãã³ãã©ããiget_tidãå¼ã³åº
+	 *  ããéã®åä½ãä»æ§ã«åè´ããªããªãï¼
+	 *
+	 *  ã¿ã¼ã²ããã«ãã£ã¦ã¯ï¼çé»åã¢ã¼ãç­ã«ç§»è¡ããããï¼æ¨æºã®æ¹æ³ã¨
+	 *  ç°ãªãæé ãå¿
+è¦ãªå ´åãããï¼
+	 *  ãã®ãããªã¿ã¼ã²ããã§ã¯ï¼ã¿ã¼ã²ããä¾å­ã«ããã¦ï¼TOPPERS_CUSTOM_IDLE
+	 *  ãå®ç¾©ãï¼ã¢ã»ã³ãã©ãã¯ã­ã¨ãã¦ï¼toppers_asm_custom_idle ãç¨æ
+	 *  ããã°ããï¼
+	 *
+	 *  ãªãï¼toppers_asm_custom_idle ã®è¨è¿°ã«ããã£ã¦ã¯ï¼æ¬¡ã®ã¬ã¸ã¹ã¿ã¯
+	 *  toppers_asm_custom_idleã®åå¾ã§ä½¿ç¨ããããï¼
+	 *  toppers_asm_custom_idle å
+ã§ä½¿ç¨ããå ´åã¯ï¼åå¾ã§ä¿å­å¾©å¸°ãããã¨ï¼
+	 *  ãããã®ã¬ã¸ã¹ã¿ã¯ Calee saved ã¬ã¸ã¹ã¿ã§ããããï¼ 
+	 *  toppers_asm_custom_idle ã¨ãã¦é¢æ°å¼ã³åºããããå ´åã¯ï¼å¼ã³åºãã
+	 *  é¢æ°ã§èªåçã«ä¿å­å¾©å¸°ãããããï¼ã¢ã»ã³ãã©ã¬ãã«ã§ã®ä¿å­å¾©å¸°ã¯å¿
+
+	 *  è¦ãªãï¼
+	 *
+	 *  ã¬ã¸ã¹ã¿ : å
+å®¹
+	 *   r4      : '0'
+	 *   r5      : 'IIPM_LOCK'
+	 *   r6      : reqflgã®ã¢ãã¬ã¹
+	 *   r7      : lock_flgã®ã¢ãã¬ã¹
+	 *   sp      : éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã®å
+é ­ã¢ãã¬ã¹(msp)
+	 */
+#ifdef TOPPERS_CUSTOM_IDLE
+	toppers_asm_custom_idle
+#else
+	cpsid i               /* PRIMASK ãã»ãã */
+	msr   basepri, r4     /* å
+¨å²è¾¼ã¿è¨±å¯ */ 
+	wfi
+	cpsie i               /* PRIMASK ãã¯ãªã¢ï¼å²è¾¼ã¿ãåãä»ããï¼ */
+	msr   basepri, r5     /* CPUã­ãã¯ç¶æ
+ã¸ */ 
+#endif /* TOPPERS_CUSTOM_IDLE */
+
+	ldr   r0, [r6]        /* reqflgãfalseãªãdispatcher_2ã¸ */
+	cmp   r0, #0
+	beq   dispatcher_2
+	str   r4, [r6]        /* reqflgãfalseã« */
+
+	/*
+	 *  CPUã­ãã¯ç¶æ
+ã«æ»ãï¼å²è¾¼ã¿å¾
+ã¡ã®éã«å®è¡ããå²è¾¼ã¿ãã³ãã©ã«ã
+	 *  ãï¼saved_iipmãæ¸ãæããããå¯è½æ§ãããããï¼å
+ã®å¤ã«æ»ãå¿
+
+	 *  è¦ãããï¼dispatcherãå®è¡ãããæã¯ï¼saved_iipmãIIPM_ENAALL
+	 *  ã¨ãªã£ã¦ããããï¼ããã§ã¯saved_iipmãIIPM_ENAALLï¼ï¼0ï¼ã«æ»ã
+	 *  ã°ããï¼
+	 */
+	mov   r0, #CONTROL_PSP  /* PSPãæå¹ã«  */ 
+	msr   control, r0      
+	isb                     /* control ã®æä½å¾ã«å¿
+è¦ */
+	mov   r2, #1            /* lock_flagãtrueã¸ */
+	str   r2, [r7]
+	ldr   r0, =saved_iipm   /* saved_iipm ã0ã« */
+	str   r4, [r0]
+	b     dispatcher_0
+
+
+/*
+ *  ã«ã¼ãã«ã®çµäºå¦çã®å¼åºã
+ *
+ *  ã¹ã¿ãã¯ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã«åãæ¿ãï¼
+ *  
+ */
+	ATHUMB(call_exit_kernel)
+	AGLOBAL(call_exit_kernel)
+ALABEL(call_exit_kernel)
+	mov   r0, #CONTROL_MSP
+	msr   control, r0       /* MSPãæå¹ã«  */
+	isb                     /* control ã®æä½å¾ã«å¿
+è¦ */
+	ldr   r0, =exit_kernel  /* ã«ã¼ãã«ã®çµäºå¦çãå¼ã¶ */
+	bx    r0
+
+
+/*
+ *  ã¿ã¹ã¯èµ·åå¦ç
+ *
+ *  dispatcherããå¼ã³åºãããããï¼TCBã®ã¢ãã¬ã¹ã¯r1ã«å
+¥ã£ã¦ãã
+ *
+ */ 
+	ATHUMB(start_r)
+	AGLOBAL(start_r)
+ALABEL(start_r)
+	mov   r0, #0
+	ldr   r4, =lock_flag                    /* CPUã­ãã¯è§£é¤ç¶æ
+ã¸ */
+	str   r0, [r4]
+	msr   basepri, r0                       /* å²è¾¼ã¿è¨±å¯   */
+	ldr   lr, =ext_tsk                      /* æ»ãçªå°è¨­å® */
+	ldr   r2, [r1, #TCB_p_tinib]            /* p_runtsk->p_tinibãr2ã«  */
+	ldr   r0, [r2, #TINIB_exinf]            /* exinfãå¼æ°ã¬ã¸ã¹ã¿r0ã«  */
+	ldr   r1, [r2, #TINIB_task]             /* ã¿ã¹ã¯èµ·åçªå°ã«ã¸ã£ã³ã */
+	bx    r1
+
+/*
+ *  å¾®å°æéå¾
+ã¡
+ */
+	ABALIGN(4)
+	ATEXT
+	ATHUMB(sil_dly_nse)
+	AGLOBAL(sil_dly_nse)
+ALABEL(sil_dly_nse)
+	subs  r0, r0, #SIL_DLY_TIM1
+	cmp   r0, #0
+	bgt   sil_dly_nse1
+	bx    lr
+ALABEL(sil_dly_nse1)
+	subs  r0, r0, #SIL_DLY_TIM2
+	cmp   r0, #0
+	bgt   sil_dly_nse1
+	bx    lr
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_support_v6m.S
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_support_v6m.S	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_support_v6m.S	(revision 136)
@@ -0,0 +1,1031 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_support_v6m.S 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *  ãã­ã»ããµä¾å­ã¢ã¸ã¥ã¼ã« ã¢ã»ã³ããªè¨èªé¨ï¼ARMv6-Mç¨ï¼
+ */
+
+#define TOPPERS_MACRO_ONLY
+#define UINT_C(val)		(val)		/* uint_tåã®å®æ°ãä½ããã¯ã­ */
+#define ULONG_C(val)	(val)		/* ulong_tåã®å®æ°ãä½ããã¯ã­ */
+#define CAST(type, val)	(val)		/* åã­ã£ã¹ããè¡ããã¯ã­ */
+
+#include "kernel_impl.h"
+#include "arm_m.h"
+#include "offset.h"
+#include "target_asm.inc"
+
+#if __TARGET_ARCH_THUMB != 3
+#error The core_support.S support ARMv6-M only.
+#endif /* __TARGET_ARCH_THUMB != 3 */
+
+/*
+ *  ã¿ã¹ã¯ãã£ã¹ãããã£
+ */
+	ATEXT
+	ABALIGN(4)
+	ATHUMB(dispatch)
+	AGLOBAL(dispatch)
+ALABEL(dispatch)
+	/*
+	 *
+	 *  ãã®ã«ã¼ãã³ã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»ãã£ãããè¨±å¯ç¶æ
+
+	 *  ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨éç¶æ
+ã§å¼ã³åºãããï¼
+	 */
+	mov  r0, r8                  /* ã¬ã¸ã¹ã¿ã®ä¿å­ */
+	mov  r1, r9
+	mov  r2, r10
+	mov  r3, r11
+	push {r0-r7,lr}
+	ldr  r0, =p_runtsk           /* p_runtskãèª­ã¿è¾¼ã */
+	ldr  r1, [r0]
+	mov  r2, sp
+	str  r2, [r1,#TCB_sp]        /* ã¿ã¹ã¯ã¹ã¿ãã¯ãä¿å­ */
+	ldr  r3, =dispatch_r         /* å®è¡åéçªå°ãä¿å­ */
+	str  r3, [r1,#TCB_pc]        
+	b    dispatcher
+
+	ATHUMB(dispatch_r)
+	AGLOBAL(dispatch_r)
+ALABEL(dispatch_r)
+	pop  {r0-r7}                 /* ã¬ã¸ã¹ã¿ã®å¾©å¸° */
+	mov  r8,  r0
+	mov  r9,  r1
+	mov  r10, r2
+	mov  r11, r3
+	/*
+	 * ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®èµ·å
+	 */
+	ldr  r0, =p_runtsk           /* p_runtskãèª­ã¿è¾¼ã */
+	ldr  r1, [r0]
+	ldrb r0, [r1,#TCB_enatex]
+	movs r2, #TCB_enatex_mask
+	tst  r0, r2
+	beq  dispatch_r_1            /* enatex ã false ãªããªã¿ã¼ã³ */
+	ldr  r0, [r1,#TCB_texptn]    /* texptn ã 0 ãªããªã¿ã¼ã³     */
+	tst  r0, r0
+	beq  dispatch_r_1            
+	ldr  r1, =ipmflg             /* ipmflgã false ãªããªã¿ã¼ã³  */
+	ldr  r0, [r1]
+	tst  r0, r0
+	beq  dispatch_r_1
+	ldr  r0, =call_texrtn        /* ã¿ã¹ã¯ä¾å¤ã«ã¼ãã³ã®å¼ã³åºã */
+	bx   r0
+ALABEL(dispatch_r_1)             /* ã¿ã¹ã¯ã¸ã®call_textnããæ»ã */
+	pop  {pc}
+
+/*
+ *  CPUä¾å¤ã¨ã³ããª
+ *
+ *  å²è¾¼ã¿ã¨ã³ããªã¨å¦çã®å
+å®¹ã¯åç­ã ãï¼ã­ã°ã®ç¨®é¡ãç°ãªãããï¼
+ *  åãã¦ããï¼
+ */
+	ABALIGN(4)
+	ATEXT
+	ATHUMB(core_exc_entry)
+	AGLOBAL(core_exc_entry)
+ALABEL(core_exc_entry)
+	/*
+	 *  ä¾å¤/å²è¾¼ã¿ãçºçããã¨ï¼çºçæã«ã¢ã¯ãã£ããªã¹ã¿ãã¯ã«ã¹ã¯ã©
+	 *  ããã¬ã¸ã¹ã¿ç­ãä¿å­ãããï¼
+	 *  ãã®å
+å®¹ã«å ãã¦ï¼CPUä¾å¤ãã³ãã©ã¸ã®æ
+å ±ã¨ãã¦ï¼basepri ã®å¤ã¨ï¼
+	 *  EXC_RETURNã®æ
+å ±ãå ãã¦ä¿å­ããï¼basepriã®å¤ã¯ï¼CPUä¾å¤ããã®
+	 *  ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤ãå
+ã«æ»ãããã«ãç¨ããããï¼
+	 *
+	 *   -----------
+	 *  |   iipm    |
+	 *   -----------
+	 *  | EXC_RETURN|
+	 *   -----------
+	 *  |    R0     |  
+	 *   -----------
+	 *  |    R1     |
+	 *   -----------
+	 *  |    R2     |
+	 *   -----------
+	 *  |    R3     |
+	 *   -----------
+	 *  |    R12    |
+	 *   -----------
+	 *  |    LR     |
+	 *   -----------
+	 *  |    PC     |
+	 *   -----------
+	 *  |   xPSR    |
+	 *   -----------
+	 *
+	 */
+
+	/*
+	 *  ã«ã¼ãã«ç®¡çå¤ã®ä¾å¤ããã§ãã¯
+	 *  ã«ã¼ãã«å
+ã®ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®å®è¡ä¸­ï¼å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
+ï¼
+	 *  CPUã­ãã¯ç¶æ
+ï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãã³ãã©å®è¡ä¸­ã®ããããã§
+	 *  çºçããCPUä¾å¤ãï¼ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ã¨å¼ã¶
+	 *  å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¯FAULTMASKã'1'ã®å ´å
+	 *  CPUã­ãã¯ç¶æ
+ã¯basepriãIIPM_LOCKãã§å¤æ­ããï¼
+	 */
+	ldr   r3, =iipm               /* å¾ã§ä½¿ç¨ããããèª­ã¿è¾¼ã */
+	ldrb  r0, [r3]
+	mrs   r2, primask             /* CPUã­ãã¯ç¶æ
+ãªãã«ã¼ãã«ç®¡çå¤ä¾å¤å¦çã¸ */
+	cmp   r1, #1
+	beq   core_nonkernel_exc_entry
+
+	/*
+	 * ã¹ã¿ãã¯ãå¤æ´ããå¿
+è¦ãããããã§ãã¯
+	 * EXC_RETURNï¼å²è¾¼ã¿æã«LRã«è¨­å®ãããå¤ï¼ããã§ãã¯ãã¦ï¼ä¾å¤çºçæã«
+	 * ã¢ã¯ãã£ããªã¹ã¿ãã¯ãç¹å®ãããã¨ã§å¤éå²è¾¼ã¿ãå¤å®ããï¼
+	 */
+	movs  r1, #EXC_RETURN_PSP    /* å²è¾¼ã¿å
+ãMSPãªãå¤éå²è¾¼ã¿ */
+	mov   r2, lr
+	tst   r2, r1
+	beq   core_exc_entry_1       /* å¤éå²è¾¼ã¿ãªãcore_exc_entry_1ã¸ */
+	mrs   r3, psp                /* ä¸æ®µç®ã®å²è¾¼ã¿ã®å ´åã¯PSPä¸ã« */
+	subs  r3, #(0x04*2)          /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r2)ï¼EXC_RETURN(r0)ã®é ã«PSPä¸ã«ç©ã */
+	str   r2, [r3, 0x04]
+	str   r0, [r3, 0x00]
+	msr   psp, r3
+	push  {r0, r2}               /* MSPã«ãå²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ã¨EXC_RETURN(r2)ãç©ã */
+	mov   lr, r3                 /* æªå®ç¾©ã®å²è¾¼ã¿ãçºçããå ´åã®æ
+å ±ã¨ãã */
+	b     core_exc_entry_2
+ALABEL(core_exc_entry_1)         /* å¤éå²è¾¼ã¿ã®å ´å */
+	push  {r0,r2}                /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ï¼EXC_RETURN(r2)ã®é ã«PSPä¸ã«ç©ã */
+	mov   lr, sp                 /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
+
+	/*
+	 *  å
+±éå¦ç
+	 */
+ALABEL(core_exc_entry_2)
+	/*
+	 *  CPUä¾å¤ãããªã¿ã¼ã³ããéã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãæ»ãããã®ãã¼ã¿ãä¿å­
+	 */
+	ldr  r3, =SYSTIC_CONTROL_STATUS
+	ldr  r2,[r3] 
+	ldr  r3, =NVIC_SETENA0
+	ldr  r1,[r3] 
+	push {r1,r2}
+
+	mrs   r3, ipsr               /* ãã³ãã©ã¢ãã¬ã¹ãåå¾ */
+	ldr   r1, =_kernel_exc_tbl
+	lsls  r0, r3, #2
+	ldr   r2, [r1, r0]
+
+#ifdef LOG_EXC_ENTER
+	push  {r0,r2,r3}
+	mov   r0, r3                 /* ä¾å¤çªå·ããã©ã¡ã¼ã¿ã«  */
+	bl    log_exc_enter          /* log_exc_enterãå¼ã³åºã */
+	pop   {r0,r2,r3}
+	push  {r3}                   /* ä¾å¤çªå·ãã¹ã¿ãã¯ã¸    */
+#endif /* LOG_EXC_ENTER */
+
+	/*
+	 *  CPUä¾å¤ãã³ãã©ã®å¼ã³åºã
+	 */
+	mov   r0, lr
+	blx   r2
+
+#ifdef LOG_EXC_ENTER
+	pop   {r0}                   /* ä¾å¤çªå·ãå¼æ°ã«        */
+	bl    log_exc_leave          /* log_exc_leaveãå¼ã³åºã */
+#endif /* LOG_EXC_ENTER */
+
+	b     ret_exc
+
+/*
+ *  ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ã®åºå
+¥å£å¦ç
+ */
+ALABEL(core_nonkernel_exc_entry)
+	movs  r1, #EXC_RETURN_PSP    /* å²è¾¼ã¿å
+ãMSPãªãå¤éå²è¾¼ã¿ */
+	mov   r2, lr
+	tst   r2, r1
+	beq   core_nonkernel_exc_entry_1  /* å¤éå²è¾¼ã¿ãªã */
+	mrs   r3, psp                /* ä¸æ®µç®ã®å²è¾¼ã¿ã®å ´åã¯PSPä¸ã« */
+	subs  r3, #(0x04*2)
+	str   r2, [r3, 0x04]
+	str   r0, [r3, 0x00]
+	msr   psp, r3                
+	push  {r0, r2}               /* MSPã«ãå²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ã¨EXC_RETURN(r2)ãç©ã */
+	mov   r0,  r3                /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
+	b     core_nonkernel_exc_entry_2
+ALABEL(core_nonkernel_exc_entry_1) /* å¤éå²è¾¼ã¿ã®å ´å */
+	push  {r0, r2}               /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ã¨EXC_RETURN(r2)ãç©ã */
+	mov   r0, sp                 /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
+
+	/*
+	 *  å
+±éå¦ç
+	 */
+ALABEL(core_nonkernel_exc_entry_2)
+	/*
+	 *  å²è¾¼ã¿ãããªã¿ã¼ã³ããéã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãæ»ãããã®ãã¼ã¿ãä¿å­
+	 */
+	ldr  r3, =SYSTIC_CONTROL_STATUS
+	ldr  r2,[r3] 
+	ldr  r3, =NVIC_SETENA0
+	ldr  r1,[r3] 
+	push {r1,r2}
+
+	mrs   r3, ipsr               /* CPUä¾å¤ãã³ãã©ã®ã¢ãã¬ã¹ãåå¾ */
+	ldr   r1, =_kernel_exc_tbl
+	lsls  r4, r3, #2
+	ldr   r2, [r1, r4]
+
+	/*
+	 *  CPUä¾å¤ãã³ãã©ã®å¼ã³åºã
+	 */
+	blx   r2
+
+	/*
+	 *  CPUã­ãã¯ç¶æ
+ã®å ´åã«å¼ã³åºããã¦ããããï¼CPUä¾å¤ãã³ãã©ããã®ãªã¿ã¼ã³
+	 *  ã®ããã«å
+ã«æ»ã
+	 */
+	cpsid i
+
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ã
+	 */
+	ldr  r1, =0xffffffff
+	ldr  r2, =NVIC_CLRENA0  /* ä¸æ¦IRQå²ãè¾¼ã¿ãå
+¨ã¦ç¦æ­¢ */
+	str  r1, [r2]
+	pop  {r0,r1}            /* ã¹ã¿ãã¯ããä¾å¤çºçæã®NVIC_SETENA0(r0),SYSTIC_CONTROL_STATUS(r1)ã®å¤ãåå¾ */
+	ldr  r2, =NVIC_SETENA0  /* NVIC_SETENA0ãå
+ã«æ»ã */
+	str  r0, [r2]
+	ldr  r3, =SYSTIC_CONTROL_STATUS  /* SYSTIC_CONTROL_STATUSãå
+ã«æ»ã */
+	ldr  r0,[r3] 
+	movs r2, #SYSTIC_TICINT
+	orrs r1, r1, r2
+	bics r0, r2
+	orrs r0, r1
+	str  r0, [r3]
+	pop  {r0}               /* iipmãæ»ã */
+	ldr  r1, =iipm
+	strb r0, [r1]
+
+	/*
+	 *  æ»ãå
+ã®ã³ã³ãã­ã¹ãã®å¤å®
+	 * 
+	 *  å²è¾¼ã¿ãã³ãã©å®è¡ã«LRã«ã»ãããããEXC_RETURNããã§ãã¯ãã¦ï¼æ»ã
+	 *  å
+ã§MSPãä½¿ããã¦ããã°ï¼å²è¾¼ã¿å
+ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãã¨å¤å®ããï¼
+	 */
+	pop   {r3}                   /* lrãã¹ã¿ãã¯ããåå¾        */
+	movs  r1, #EXC_RETURN_PSP    /* å²è¾¼ã¿å
+ãMSPãªãå¤éå²è¾¼ã¿ */
+	tst   r3, r1
+	bne   core_nonkernel_ret_exc_1
+	b     core_nonkernel_ret_exc_2 /* ã®å¤ãMSPããåå¾ */
+ALABEL(core_nonkernel_ret_exc_1)
+	/*
+	 *  PSPä¸ããEXC_RETURN/å
+ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(iipm)ãåé¤
+	 */
+	mrs   r2, psp
+	adds  r2, r2, #8
+	msr   psp, r2
+
+ALABEL(core_nonkernel_ret_exc_2)
+	bx    r3                      /* ãªã¿ã¼ã³ */
+
+/*
+ *  å²è¾¼ã¿ã¨ã³ããª
+ */
+	ATHUMB(core_int_entry)
+	AGLOBAL(core_int_entry)
+ALABEL(core_int_entry)
+	/*
+	 *  å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãã¹ã¿ãã¯ã«ä¿å­ããããåå¾
+	 */
+	ldr   r3, =iipm               /* å¾ã§ä½¿ç¨ããããèª­ã¿è¾¼ã */
+	ldrb  r0, [r3]
+
+	/*
+	 * å¤éå²è¾¼ã¿ããã§ãã¯
+	 * EXC_RETURNï¼å²è¾¼ã¿æã«LRã«è¨­å®ãããå¤ï¼ããã§ãã¯ãã¦ï¼ä¾å¤çºçæã«
+	 * ã¢ã¯ãã£ããªã¹ã¿ãã¯ãç¹å®ãããã¨ã§å¤éå²è¾¼ã¿ãå¤å®ããï¼
+	 */
+	movs  r1, #EXC_RETURN_PSP    /* å²è¾¼ã¿å
+ãMSPãªãå¤éå²è¾¼ã¿ */
+	mov   r2, lr
+	tst   r2, r1
+	beq   core_int_entry_1       /* å¤éå²è¾¼ã¿ãªãcore_int_entry_1ã¸ */
+	mrs   r3, psp                /* ä¸æ®µç®ã®å²è¾¼ã¿ã®å ´åã¯PSPä¸ã« */
+	subs  r3, #(0x04*2)
+	str   r2, [r3, 0x04]
+	str   r0, [r3, 0x00]
+	msr   psp, r3
+	push  {r0, r2}               /* MSPã«ãå²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ã¨EXC_RETURN(r2)ãç©ã */
+	mov   lr, r3                 /* æªå®ç¾©ã®å²è¾¼ã¿ãçºçããå ´åã®æ
+å ±ã¨ãã */
+	b     core_int_entry_2
+ALABEL(core_int_entry_1)         /* å¤éå²è¾¼ã¿ã®å ´å */
+	push  {r0, r2}               /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(r0)ã¨EXC_RETURN(r2)ãç©ã */
+	mov   lr, sp                 /* æªå®ç¾©ã®å²è¾¼ã¿ãçºçããå ´åã®æ
+å ±ã¨ãã */
+
+	/*
+	 *  å
+±éå¦ç
+	 */
+ALABEL(core_int_entry_2)
+	/*
+	 *  å²è¾¼ã¿ãããªã¿ã¼ã³ããéã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãæ»ãããã®ãã¼ã¿ãä¿å­
+	 */
+	ldr  r3, =SYSTIC_CONTROL_STATUS
+	ldr  r2,[r3] 
+	ldr  r3, =NVIC_SETENA0
+	ldr  r1,[r3] 
+	push {r1,r2}
+
+	mrs   r3, ipsr   /* å²è¾¼ã¿è¦å çªå·ã®åå¾ */
+
+	/*
+	 *  basepriã®è¨­å®
+	 *  NVICåªå
+åº¦ãã¹ã¯ãèªåçã«è¨­å®ãããããåªå
+åº¦ãã¹ã¯ã®ç¹ã§ã¯å¿
+è¦ãª
+	 *  ããï¼x_get_ipm()ãbasepriãåç
+§ããããï¼basepriãæ´æ°ããï¼
+	 */
+	ldr   r1, =_kernel_int_iipm_tbl
+	ldrb  r2, [r1, r3]
+	ldr   r0, =iipm
+	strb  r2, [r0]
+
+	ldr   r1, =_kernel_exc_tbl   /* ãã³ãã©ã¢ãã¬ã¹ãåå¾ */
+	lsls  r0, r3, #2
+	ldr   r2, [r1, r0]
+
+#ifdef LOG_INH_ENTER
+	push  {r0,r2,r3}
+	mov   r0, r3                 /* ä¾å¤çªå·ããã©ã¡ã¼ã¿ã«  */
+	bl    log_inh_enter          /* log_exc_enterãå¼ã³åºã */
+	pop   {r0,r2,r3}
+#endif /* LOG_EXC_ENTER */
+
+#ifdef LOG_INH_LEAVE
+	mrs   r3, ipsr               /* å²è¾¼ã¿è¦å çªå·ã®åå¾ */
+	push  { r3 }                 /* å²è¾¼ã¿çªå·ãã¹ã¿ãã¯ã¸    */
+#endif /* LOG_INT_LEAVE */
+
+	/*
+	 *  å²è¾¼ã¿ãã³ãã©ã®å¼ã³åºã
+	 */
+	mov   r0, lr
+	blx   r2
+
+#ifdef LOG_INH_LEAVE
+	pop   {r0}                   /* ä¾å¤çªå·ãå¼æ°ã«        */
+	bl    log_exc_leave          /* log_exc_leaveãå¼ã³åºã */
+#endif /* LOG_INH_LEAVE */
+
+
+/*
+ *  å²è¾¼ã¿/ä¾å¤åºå£
+ *
+ *  ret_exc/ret_intã¯ï¼CPUä¾å¤/å²è¾¼ã¿ãã³ãã©ããæ»ã£ãç´å¾ã«å®è¡ãã
+ *  ã«ã¼ãã³ã§ããï¼
+ */
+ALABEL(ret_exc)
+ALABEL(ret_int)
+	/*
+	 *  å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨ããï¼ãã®æç¹ã§ã¯ï¼CPUã­ãã¯ç¶æ
+ã«ã¯ãªããªã
+	 * ï¼basepriã¨lock_flagã¨saved_iipmã¯æ´æ°ããªãï¼ï¼
+	 *
+	 *  å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨ããã®ã¯ï¼æ»ãå
+ã®ã³ã³ãã­ã¹ãã®ãã§ãã¯ã¨ï¼
+	 *  æ»ãå
+ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãã§ãã£ãå ´åã®ãªã¿ã¼ã³ãã¢ãããã¯
+	 *  ã«è¡ãããã§ããï¼bsepriãCPUã­ãã¯ã®å¤ã«ãããã¨ã§ãã¢ããã
+	 *  ã¯ãªãã§ãã¯ã¨å¾©å¸°ã¯å¯è½ã§ãããï¼å²è¾¼ã¿ãããªã¿ã¼ã³ãã¦ãï¼
+	 *  basepri ã®è¨­å®å
+å®¹ã¯å
+ã«æ»ããªãããï¼ä½¿ç¨ãããã¨ãã§ããªãï¼ 
+	 *  ä¸æ¹ï¼FAULTMASKã¯ï¼å²è¾¼ã¿ããã®ãªã¿ã¼ã³å¦çã«ãã£ã¦ï¼'0'ã«ã¯ãª
+	 *  ã¢ãããï¼
+	 */
+	cpsid i
+
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ã
+	 */
+	ldr  r1, =0xffffffff
+	ldr  r2, =NVIC_CLRENA0  /* ä¸æ¦IRQå²ãè¾¼ã¿ãå
+¨ã¦ç¦æ­¢ */
+	str  r1, [r2]
+	pop  {r0,r1}            /* ã¹ã¿ãã¯ããä¾å¤/å²è¾¼ã¿çºçæã®NVIC_SETENA0(r0),SYSTIC_CONTROL_STATUS(r1)ã®å¤ãåå¾ */
+	ldr  r2, =NVIC_SETENA0  /* NVIC_SETENA0ãå
+ã«æ»ã */
+	str  r0, [r2]
+	ldr  r3, =SYSTIC_CONTROL_STATUS  /* SYSTIC_CONTROL_STATUSãå
+ã«æ»ã */
+	ldr  r0,[r3] 
+	movs r2, #SYSTIC_TICINT
+	orrs r1, r1, r2
+	bics r0, r2
+	orrs r0, r1
+	str  r0, [r3]
+	pop  {r0}               /* iipmãæ»ã */
+	ldr  r1, =iipm
+	strb r0, [r1]
+
+	/*
+	 *  æ»ãå
+ã®ã³ã³ãã­ã¹ãã®å¤å®
+	 * 
+	 *  å²è¾¼ã¿ãã³ãã©å®è¡ã«LRã«ã»ãããããEXC_RETURNããã§ãã¯ãã¦ï¼æ»ã
+	 *  å
+ã§MSPãä½¿ããã¦ããã°ï¼å²è¾¼ã¿å
+ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãã¨å¤å®ããï¼
+	 */
+	pop   {r3}                     /* lrãã¹ã¿ãã¯ããåå¾         */
+	movs  r1, #EXC_RETURN_PSP      /* æ»ãå
+ãPSPãªã ret_int_1 ã¸ */
+	tst   r3, r1
+	bne   ret_int_1
+	b     ret_int_2
+
+	/*
+	 *  ä¸æ®µç®ã®å²è¾¼ã¿ã®åºå£å¦ç
+	 */
+ALABEL(ret_int_1)
+	/*
+	 *  PSPä¸ããï¼EXC_RETURN(r0)ã¨å
+ã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯(basepri)(r1)
+	 *  ãåå¾
+	 */
+	mrs   r2, psp
+	adds  r2, r2, #(0x04*2)  
+	msr   psp, r2
+
+	/*
+	 *  reqflgããã§ãã¯ãã
+	 * 
+	 *  ã«ã¼ãã«ç®¡çå
+ã®å²è¾¼ã¿ã¯ç¦æ­¢ããç¶æ
+ã§å®è¡ããå¿
+è¦ãããããï¼
+	 *  FAULTMASKã'1'ã«ããç¶æ
+ã§å®è¡ããï¼
+	 *  reqflgããã§ãã¯ããåã«å²è¾¼ã¿ãç¦æ­¢ããã®ã¯ï¼reqflgããã§ãã¯
+	 *  ããç´å¾ã«å²è¾¼ã¿ãã³ãã©ãèµ·åããï¼ãã®ä¸­ã§ãã£ã¹ããããè¦æ±
+	 *  ãããå ´åã«ï¼ããã«ãã£ã¹ããããããªãã¨ããåé¡ãçãããã
+	 *  ã§ããï¼
+	 */
+	ldr   r0, =reqflg             /* reqflgãfalseãªããã®ã¾ã¾æ»ã */
+	ldr   r2, [r0]
+	cmp   r2, #1                  /* trueãªãret_int_3ã¸           */
+	beq   ret_int_3
+
+ALABEL(ret_int_2)
+	/*
+	 *  ããã«ã¯å²è¾¼ã¿ã­ãã¯ç¶æ
+ï¼FAULTMASKãã»ããï¼ãããç¶æ
+ã§æ¥ãï¼
+	 *  Threadã¢ã¼ãããã®ãªã¿ã¼ã³ã«ããèªåçã«å²è¾¼ã¿ã­ãã¯è§£é¤ç¶æ
+ã«ãªãï¼
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã¯å²è¾¼ã¿åã«ç¶æ
+ã«æ»ãï¼
+	 */ 
+	cpsie i                       /* å²è¾¼ã¿ã®ãªã¿ã¼ã³ã§ã¯ãªã¢ãããªãããã¯ãªã¢ */
+	bx    r3                      /* ãªã¿ã¼ã³ */
+
+ALABEL(ret_int_3)
+	/*
+	 *  ããã§ã¯ï¼æ»ãå
+ãã¿ã¹ã¯ã§ããï¼PSPä¸ã«ã¹ã¯ã©ããã¬ã¸ã¹ã¿ã¨å²
+	 *  è¾¼ã¿åªå
+åº¦ãã¹ã¯(basepri)ãä¿å­ãããç¶æ
+ã«ãªã£ã¦ããï¼ã¾ãï¼
+	 *  ãã­ã»ããµã¯ï¼Handlerã¢ã¼ãã»å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨ãªã£ã¦ããï¼
+	 *  ã¾ãï¼r0ã«ã¯ï¼reqflgã®ã¢ãã¬ã¹ï¼r3ã«ã¯å²è¾¼ã¿åä»æã®lrã®å¤ãä¿
+	 *  æããã¦ããï¼
+	 */
+	/*
+	 *  ã¿ã¹ã¯ä¾å¤ãã³ãã©ããã£ã¹ããããããéã«Threadã¢ã¼ãã¸é·ç§»ãã
+	 *  ããã¼ã®ã¹ã¿ãã¯ãã¬ã¼ã ãä½æãã¦ï¼bxå½ä»¤ã§Handlerã¢ã¼ããããª
+	 *  ã¿ã¼ã³ããï¼ã¾ãï¼é
+å»¶ãã£ã¹ãããããå ´åãï¼åã³å²ãè¾¼ãã ã¿ã¹
+	 *  ã¯ã«æ»ãéã«ã¯ï¼svcå½ä»¤ã§ï¼svc_handlerãå¼ã³åºãï¼
+	 *  ã¹ã¿ãã¯ãã¬ã¼ã ã¯ï¼Configureation and Control Register(CCR)ã®
+	 *  STKALIGNã'1'ã®å ´åã¯ï¼8byteå¢çã«ã¢ã©ã¤ã³ãããï¼
+	 *  åè : DDI0403B_arm_architecture_v7m_reference_manual(P.220)
+	 *  ãã®ããï¼ãã®æç¹ã®ã¹ã¿ãã¯ã¯å²è¾¼ã¿ãä¾å¤çºçæã«ä½æããã
+	 *  ã¹ã¿ãã¯ãã¬ã¼ã ããï¼8byteå¢çã®ãµã¤ãºã«ãã¦ããã¨ï¼svc_handler
+	 *  ç­ã§ã¹ã¿ãã¯ãã¬ã¼ã ã®ã¢ã©ã¤ã¡ã³ãã®æç¡ã®ç¢ºèªãçç¥ã§ããï¼
+	 *  ãã ãï¼ã·ã¹ãã èµ·åå¾ã¯ï¼åçã«CCRã®STKALIGNã®è¨­å®ãå¤æ´ããã®ã¯
+	 *  ç¦æ­¢ã¨ããï¼
+	 *  ãã®æç¹ã¯æ¨æºã®ã¹ã¿ãã¯ãã¬ã¼ã ã¯ï¼å²è¾¼ã¿ã»ä¾å¤çºçæã¨åç­ã§ã
+	 *  ãããï¼ã¿ã¹ã¯ã¹ã¿ãã¯(PSP)ã¯8byteå¢çã«ãªã£ã¦ããï¼
+	 */
+	movs  r1, #0                   /* reqflgãfalseã« */
+	str   r1, [r0]
+
+	/*
+	 *  CPUã­ãã¯ç¶æ
+ã«ç§»è¡ããï¼
+	 *
+	 *  ã«ã¼ãã«ã®ç®¡çå
+ã®å²è¾¼ã¿ãç¦æ­¢ããããã«basepriãè¨­å®ãï¼
+	 *  lock_flag ã¨ saved_iipm ãæ´æ°ããï¼saved_iipmã¯ï¼æ»ãå
+ã®å²è¾¼ã¿
+	 *  åªå
+åº¦ãã¹ã¯ï¼ã®å
+é¨è¡¨ç¾ï¼ã«è¨­å®ããï¼
+	 *  ãã®æç¹ã§CPUã­ãã¯ç¶æ
+ã¨ããã®ã¯ï¼dispatcherã¸åå²ããæã¨ï¼
+	 *  call_texrtnãå¼ã³åºãæã«ï¼CPUã­ãã¯ç¶æ
+ã«ãªã£ã¦ããå¿
+è¦ããã
+	 *  ããã§ããï¼
+	 *  ãªãï¼ãã®å¦çã®å¾ï¼Threadã¢ã¼ãã¸ã®ç§»è¡å¦çãè¡ãªãããï¼å²è¾¼ã¿
+	 *  ã­ãã¯ç¶æ
+(FAULTMASKã"1")ã¯ä¿æããï¼
+	 */
+
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãï¼å
+¨è§£é¤ç¶æ
+ï¼TIPM_ENAALLï¼ã«è¨­å®ãã
+	 *  ãã§ã«CPUã­ãã¯ç¶æ
+ãªã®ã§ï¼saved_iipmãIIPM_ENAALLã¨ããï¼
+	 */
+
+	/*
+	 *  Threadã¢ã¼ãã¸ç§»è¡ããï¼
+	 *
+	 *  dispatcherãcall_texrnãå¼ã³åºãå ´åã¯ï¼Threadã¢ã¼ãã§ããå¿
+
+	 *  è¦ãããããï¼PSPã¹ã¿ãã¯ä¸ã«ããã¼ã®ä¾å¤ãã¬ã¼ã ãç½®ãã¦ï¼
+	 *  æ¬ä¼¼çã«å²è¾¼ã¿ãã³ãã©ãããªã¿ã¼ã³ããï¼
+	 *  ãªã¿ã¼ã³ã¨åæã«FAULTMASKãèªåçã«ã¯ãªã¢ããï¼ã«ã¼ãã«ç®¡çå¤ã®
+	 *  å²è¾¼ã¿ãè¨±å¯ãããï¼
+	 */
+	ldr   r0, =ret_int_4          /* PC   */
+	ldr   r1, =EPSR_T             /* xPSR(Tãããã'1'ã§ããå¿
+è¦ããã) */
+	mrs   r2, psp
+	subs  r2, #(0x04*2)
+	str   r1, [r2, 0x04]
+	str   r0, [r2, 0x00]
+	subs  r2, #(EXC_FRAME_SIZE - (4*2)) /* r0-r3,r12,lrã®å
+å®¹ã¯è¨­å®ããå¿
+è¦ããªã */
+	msr   psp,r2                  
+	bx    r3                      /* Threadã¢ã¼ãã¸ç§»è¡ */
+    
+ALABEL(ret_int_4)
+	/*
+	 *  ä¸è¨ã®å¦çã«ããï¼Threadã¢ã¼ãã§å®è¡ãããï¼
+	 *  dspflgãfalseã§ããå ´åã¨ï¼p_runtskã¨p_schedtskãåãå ´åã«ã¯ï¼
+	 *  ãã£ã¹ããããè¡ããªãï¼ãã®ãã§ãã¯ãå¿
+è¦ãªã®ã¯ï¼ã¿ã¹ã¯ä¾å¤å¦
+	 *  çã«ã¼ãã³ã®å¼åºããå¿
+è¦ãªå ´åã«ï¼ãã£ã¹ããããå¿
+è¦ãªãã¦ãï¼
+	 *  reqflgãtrueã«ããããã§ããï¼
+	 */
+	ldr   r0, =p_runtsk       /* ãã£ã¹ããããè¡ããªãå ´åã§ãï¼r1ã«p_runtsk ã®å¤(TCB) */
+	ldr   r1, [r0]            /* ãå
+¥ã£ã¦ããå¿
+è¦ãããã®ã§ï¼å
+ã«èª­ã¿è¾¼ã */
+	ldr   r0, =dspflg         
+	ldr   r2, [r0]
+	cmp   r2, #0x01           /* dspflgãfalseãªãret_int_r_1ã¸ */
+	bne   ret_int_r_1     
+	ldr   r0, =p_schedtsk     
+	ldr   r2, [r0]
+	cmp   r1, r2              /* p_runtskã¨p_schedtskãåããªã */
+	beq   ret_int_r_1         /*                  ret_int_r_1ã¸ */
+	mov  r0, r8
+	mov  r1, r9
+	mov  r2, r10
+	mov  r3, r11
+	push {r0-r7}
+	ldr   r2, =p_runtsk
+	ldr   r1, [r2]
+	mov   r0, sp
+	str   r0, [r1,#TCB_sp]    /* ã¿ã¹ã¯ã¹ã¿ãã¯ãä¿å­ */
+	ldr   r2, =ret_int_r      /* å®è¡åéçªå°ãä¿å­   */
+	str   r2, [r1,#TCB_pc]
+	b     dispatcher          /* ãã£ã¹ãããã£ã¸ */
+
+/*
+ * å²è¾¼ã¿ã«ããããªã¨ã³ãããããã¿ã¹ã¯ã¸ã®ãªã¿ã¼ã³å¦ç
+ *
+ * Threadã¢ã¼ãã§ï¼ãã£ã¹ãããã£ãå²è¾¼ã¿ã®åºå£å¦çããå¼ã³åºãããï¼
+ * å²è¾¼ã¿ã«ããããªã¨ã³ãããããã¿ã¹ã¯ã¸ãªã¿ã¼ã³ããã«ã¯ï¼ãã£ãã
+ * Handlerã¢ã¼ãã«ç§»è¡ãï¼PCã«0xfffffffdãä»£å
+¥ãã¦ãªã¿ã¼ã³ããå¿
+è¦
+ * ãããï¼ãã®ããï¼SVCã«ããï¼SVCãã³ãã©ãå¼ã³åºãï¼Handlerã¢ã¼
+ * ãã¸ç§»è¡ããï¼
+ */
+	ATHUMB(ret_int_r)
+	AGLOBAL(ret_int_r)
+ALABEL(ret_int_r)
+	pop  {r0-r7}
+	mov  r8,  r0
+	mov  r9,  r1
+	mov  r10, r2
+	mov  r11, r3
+ALABEL(ret_int_r_1)
+	/*
+	 *  enatexãtrueã§ï¼texptnã0ã§ãªããã°ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã
+	 *  å¼ã³åºãï¼
+	 *  dispatcherããå¼ã³åºãããããï¼TCBã®ã¢ãã¬ã¹ã¯r1ã«å
+¥ã£ã¦ãã
+	 */
+	ldr   r2, =p_runtsk
+	ldr   r1, [r2]
+	ldrb  r0, [r1,#TCB_enatex]
+	movs  r2, #TCB_enatex_mask
+	tst   r0, r2
+	beq   ret_int_r_2           /* enatex ã false ãªã ret_int_r_2ã¸ */
+	ldr   r0, [r1,#TCB_texptn]  /* texptn ã 0 ãªããªã¿ã¼ã³     */
+	cmp   r0, #0x00
+	beq   ret_int_r_2
+	ldr   r1, =ipmflg             /* ipmflgã false ãªããªã¿ã¼ã³  */
+	ldr   r0, [r1]
+	cmp   r0, #0x00
+	beq   ret_int_r_2 
+	bl    call_texrtn           /* ã¿ã¹ã¯ä¾å¤ã«ã¼ãã³ã®å¼ã³åºã */
+ALABEL(ret_int_r_2)
+	ldr   r0, =NVIC_ICSR
+	ldr   r1, =NVIC_PENDSVSET
+	str   r1, [r0]
+	cpsie i                     /* PRIMASKãã¯ãªã¢ãã¦PendSVCãåãä»ãã */                
+1:                              /* ããã«ã¯æ¥ãªã */
+	b  1b
+
+/*
+ *  SVCãã³ãã©
+ */
+	ATHUMB(svc_handler)
+	AGLOBAL(svc_handler)
+ALABEL(svc_handler)
+1:
+	b  1b
+
+/*
+ *  PendSVCãã³ãã©
+ */
+	ATHUMB(pendsvc_handler)
+	AGLOBAL(pendsvc_handler)
+ALABEL(pendsvc_handler)
+	/*
+	 *  å²è¾¼ã¿å¦çããã®ãªã¿ã¼ã³ã«ããï¼CPUã­ãã¯è§£é¤ç¶æ
+ã«ç§»è¡ããã
+	 *  ãæºåããï¼
+	 */
+	mrs   r0, psp
+	adds  r0, #EXC_FRAME_SIZE     /* ã¹ã¿ãã¯ãæ¨ã¦ã   */
+	msr   psp, r0
+	movs  r0, #0
+	bx    lr                      /* ãªã¿ã¼ã³     */
+
+/*
+ *  ãã£ã¹ãããã£ã®åä½éå§
+ */
+	ATHUMB(start_dispatch)
+	AGLOBAL(start_dispatch)
+ALABEL(start_dispatch)
+	/*
+	 *  ãã®ã«ã¼ãã³ã¯ï¼ã«ã¼ãã«èµ·åæã«ï¼ãã¹ã¦ã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+
+	 * ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨åç­ï¼ã§å¼ã³åºãããï¼ã¾ãï¼å²è¾¼ã¿ã¢ã¼ãï¼é
+	 *  ã¿ã¹ã¯ã³ã³ãã­ã¹ãã¨åç­ï¼ã§å¼ã³åºããããã¨ãæ³å®ãã¦ããï¼
+	 *
+	 *  core_initializeã§ï¼lock_flagãtrueã«ï¼saved_iipmãIIPM_ENAALLã«
+	 *  åæåãã¦ããããï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãè¨±å¯ãããã¨ã§ï¼
+	 *  CPUã­ãã¯ç¶æ
+ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã«ãªãï¼
+	 *  ã¾ãï¼task_initializeã§disdspãfalseã«åæåãã¦ããããï¼ãã£
+	 *  ã¹ãããè¨±å¯ç¶æ
+ã«ãªã£ã¦ããï¼
+	 */
+	ldr   r0,=istkpt              /* MSPãåæå   */
+	ldr   r1,[r0]                 /* start_dispatchå¼ã³åºãæã«å¼ã³åºãç¨ã« */
+	msr   msp, r1                 /* ä½¿ç¨ãã¦ããããåæåãã             */
+	movs  r0, #CONTROL_PSP        /* PSPãæå¹ã«  */
+	msr   control, r0
+	isb                           /* control ã®æä½å¾ã«å¿
+è¦ */
+
+/*
+ *  ç¾å¨ã®ã³ã³ãã­ã¹ããæ¨ã¦ã¦ãã£ã¹ããã
+ */
+	ATHUMB(exit_and_dispatch)
+	AGLOBAL(exit_and_dispatch)
+ALABEL(exit_and_dispatch)
+	/* ãã£ã¹ãããã£æ¬ä½ï¼dispatcherï¼ã¸ */ 
+
+
+/*
+ *  ãã£ã¹ãããã£æ¬ä½
+ */
+ALABEL(dispatcher)
+	/*
+	 *  ãã®ã«ã¼ãã³ã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»ãã£ã¹ããã
+	 *  è¨±å¯ç¶æ
+ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§å¼ã³åºã
+	 *  ããï¼
+	 *
+	 *  ããªãã¡ï¼Threadã¢ã¼ãã»lock_flagãtrueã»disdspãfalseã»dspflg
+	 *  ãtrueã»saved_iipmãIIPM_ENAALLã¨ãªã£ã¦ããï¼å®è¡åéçªå°ã¸ãã
+	 *  ã®ç¶æ
+ã®ã¾ã¾åå²ããï¼
+	 */
+#ifdef LOG_DSP_ENTER
+	ldr   r1, =p_runtsk     /* p_runtskããã©ã¡ã¼ã¿ã« */
+	ldr   r0, [r1]        
+	bl    log_dsp_enter
+#endif /* LOG_DSP_ENTER */
+ALABEL(dispatcher_0)
+	ldr   r0, =p_schedtsk   /* p_schedtskãp_runtskã« */
+	ldr   r1, [r0]
+	ldr   r2, =p_runtsk   
+	str   r1, [r2]        
+	cmp   r1, #0x00         /* p_runtskãNULLãªãdispatcher_1ã¸ */
+	beq   dispatcher_1  
+	ldr   r2, [r1,#TCB_sp]  /* ã¿ã¹ã¯ã¹ã¿ãã¯ãå¾©å¸° */
+	mov   sp, r2
+#ifdef LOG_DSP_LEAVE
+	mov   r0, r1            /* p_runtskããã©ã¡ã¼ã¿ã« */
+	mov   r4, r1            /* r1ã¯ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãªã®ã§ä¿å­ */
+	bl    log_dsp_leave
+	mov   r1, r4
+#endif /* LOG_DSP_LEAVE */
+	ldr   r2, [r1,#TCB_pc]  /* å®è¡åéçªå°ãå¾©å¸°   */    
+	mov   pc, r2
+ALABEL(dispatcher_1)
+	/*
+	 * CPUã­ãã¯ç¶æ
+ã®è§£é¤ã¨ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãå®è¡ç¶æ
+ã¸ã®
+	 * æºåããã
+	 */
+	movs  r0, #CONTROL_MSP  /* MSPãæå¹ã«  */
+	msr   control, r0       
+	isb                     /* control ã®æä½å¾ã«å¿
+è¦ */
+	movs  r4, #0            /* r4 <- '0' */
+	ldr   r6, =reqflg       /* r6 <- reqflg */
+ALABEL(dispatcher_2)
+	/*
+	 *  å²è¾¼ã¿ãè¨±å¯ãï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãå®è¡ç¶æ
+ã¨ãå²è¾¼ã¿ãå¾
+ã¤ï¼
+	 *
+	 *  ããã§éã¿ã¹ã¯ã³ã³ãã­ã¹ãå®è¡ç¶æ
+ã«åãæããã®ã¯ï¼ããã§çºç
+	 *  ããå²è¾¼ã¿å¦çã«ã©ã®ã¹ã¿ãã¯ãä½¿ããã¨ããåé¡ã®è§£æ±ºã¨ï¼å²è¾¼ã¿
+	 *  ãã³ãã©å
+ã§ã®ã¿ã¹ã¯ãã£ã¹ãããã®é²æ­¢ã¨ãã2ã¤ã®æå³ãããï¼
+	 *
+	 *  ãã­ã»ããµãå²è¾¼ã¿å¾
+ã¡ã«ç§»è¡ãããå¦çã¨ï¼å²è¾¼ã¿è¨±å¯ã¨ã¯ï¼ä¸å¯
+	 *  åã«è¡ãªãå¿
+è¦ãããï¼
+	 *  ãããä¸å¯åã«è¡ãªããªãå ´åï¼å²è¾¼ã¿ãè¨±å¯ããç´å¾ã«å²è¾¼
+	 *  ã¿ãå
+¥ãï¼ãã®ä¸­ã§ã¿ã¹ã¯ãå®è¡å¯è½ç¶æ
+ã«ãªãã¨ï¼å®è¡ãã¹ãã¿ã¹
+	 *  ã¯ãããã«ãããããããã­ã»ããµãå²è¾¼ã¿å¾
+ã¡ã«ãªã£ã¦ãã¾ãï¼
+	 *  ARM-Mã§ã¯ï¼PRIMASKãã»ããããç¶æ
+ã§WFIãå¼ã³åºããã¨ã§å®ç¾ã§ããï¼
+	 *  ãã®ç¶æ
+ã§å²è¾¼ã¿ãå
+¥ãã¨ï¼å²è¾¼ã¿ã¯å®è¡ãããï¼WFIãããªã¿ã¼ã³ã
+	 *  ããã¨ã«ãªãã®ã§ï¼ä¸æ¦å²è¾¼ã¿ãè¨±å¯ãã¦å²è¾¼ã¿ãã³ãã©ãå®è¡ããï¼
+	 *
+	 *  å²è¾¼ã¿å¾
+ã¡ã®éã¯ï¼p_runtskãNULLï¼ï¼0ï¼ã«è¨­å®ããªããã°ãªããª
+	 *  ãï¼ãã®ããã«è¨­å®ããªãã¨ï¼å²è¾¼ã¿ãã³ãã©ããiget_tidãå¼ã³åº
+	 *  ããéã®åä½ãä»æ§ã«åè´ããªããªãï¼
+	 *
+	 *  ã¿ã¼ã²ããã«ãã£ã¦ã¯ï¼çé»åã¢ã¼ãç­ã«ç§»è¡ããããï¼æ¨æºã®æ¹æ³ã¨
+	 *  ç°ãªãæé ãå¿
+è¦ãªå ´åãããï¼
+	 *  ãã®ãããªã¿ã¼ã²ããã§ã¯ï¼ã¿ã¼ã²ããä¾å­ã«ããã¦ï¼TOPPERS_CUSTOM_IDLE
+	 *  ãå®ç¾©ãï¼ã¢ã»ã³ãã©ãã¯ã­ã¨ãã¦ï¼toppers_asm_custom_idle ãç¨æ
+	 *  ããã°ããï¼
+	 *
+	 *  ãªãï¼toppers_asm_custom_idle ã®è¨è¿°ã«ããã£ã¦ã¯ï¼æ¬¡ã®ã¬ã¸ã¹ã¿ã¯
+	 *  toppers_asm_custom_idleã®åå¾ã§ä½¿ç¨ããããï¼
+	 *  toppers_asm_custom_idle å
+ã§ä½¿ç¨ããå ´åã¯ï¼åå¾ã§ä¿å­å¾©å¸°ãããã¨ï¼
+	 *  ãããã®ã¬ã¸ã¹ã¿ã¯ Calee saved ã¬ã¸ã¹ã¿ã§ããããï¼ 
+	 *  toppers_asm_custom_idle ã¨ãã¦é¢æ°å¼ã³åºããããå ´åã¯ï¼å¼ã³åºãã
+	 *  é¢æ°ã§èªåçã«ä¿å­å¾©å¸°ãããããï¼ã¢ã»ã³ãã©ã¬ãã«ã§ã®ä¿å­å¾©å¸°ã¯å¿
+
+	 *  è¦ãªãï¼
+	 *
+	 *  ã¬ã¸ã¹ã¿ : å
+å®¹
+	 *   r4      : '0'
+	 *   r5      : 'IIPM_LOCK'
+	 *   r6      : reqflgã®ã¢ãã¬ã¹
+	 *   r7      : lock_flgã®ã¢ãã¬ã¹
+	 *   sp      : éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã®å
+é ­ã¢ãã¬ã¹(msp)
+	 */
+#ifdef TOPPERS_CUSTOM_IDLE
+	toppers_asm_custom_idle
+#else
+	wfi
+	cpsie i               /* PRIMASK ãã¯ãªã¢ï¼å²è¾¼ã¿ãåãä»ããï¼ */
+	cpsid i               /* PRIMASK ãã»ãã */
+#endif /* TOPPERS_CUSTOM_IDLE */
+
+	ldr   r0, [r6]        /* reqflgãfalseãªãdispatcher_2ã¸ */
+	cmp   r0, #0
+	beq   dispatcher_2
+	str   r4, [r6]        /* reqflgãfalseã« */
+
+	/*
+	 *  CPUã­ãã¯ç¶æ
+ã«æ»ãï¼å²è¾¼ã¿å¾
+ã¡ã®éã«å®è¡ããå²è¾¼ã¿ãã³ãã©ã«ã
+	 *  ãï¼saved_iipmãæ¸ãæããããå¯è½æ§ãããããï¼å
+ã®å¤ã«æ»ãå¿
+
+	 *  è¦ãããï¼dispatcherãå®è¡ãããæã¯ï¼saved_iipmãIIPM_ENAALL
+	 *  ã¨ãªã£ã¦ããããï¼ããã§ã¯saved_iipmãIIPM_ENAALLï¼ï¼0ï¼ã«æ»ã
+	 *  ã°ããï¼
+	 */
+	movs  r0, #CONTROL_PSP  /* PSPãæå¹ã«  */ 
+	msr   control, r0      
+	isb                     /* control ã®æä½å¾ã«å¿
+è¦ */
+	b     dispatcher_0
+
+/*
+ *  ã«ã¼ãã«ã®çµäºå¦çã®å¼åºã
+ *
+ *  ã¹ã¿ãã¯ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã«åãæ¿ãï¼
+ *  
+ */
+	ATHUMB(call_exit_kernel)
+	AGLOBAL(call_exit_kernel)
+ALABEL(call_exit_kernel)
+	movs  r0, #CONTROL_MSP
+	msr   control, r0       /* MSPãæå¹ã«  */
+	isb                     /* control ã®æä½å¾ã«å¿
+è¦ */
+	ldr   r0, =exit_kernel  /* ã«ã¼ãã«ã®çµäºå¦çãå¼ã¶ */
+	bx    r0
+
+/*
+ *  ã¿ã¹ã¯èµ·åå¦ç
+ *
+ *  dispatcherããå¼ã³åºãããããï¼TCBã®ã¢ãã¬ã¹ã¯r1ã«å
+¥ã£ã¦ãã
+ *
+ */ 
+	ATHUMB(start_r)
+	AGLOBAL(start_r)
+ALABEL(start_r)
+	movs  r0, #0
+	cpsie i                                 /* å²è¾¼ã¿è¨±å¯   */
+	ldr   r0, =ext_tsk                      /* æ»ãçªå°è¨­å® */
+	mov   lr, r0
+	ldr   r2, [r1, #TCB_p_tinib]            /* p_runtsk->p_tinibãr2ã«  */
+	ldr   r0, [r2, #TINIB_exinf]            /* exinfãå¼æ°ã¬ã¸ã¹ã¿r0ã«  */
+	ldr   r1, [r2, #TINIB_task]             /* ã¿ã¹ã¯èµ·åçªå°ã«ã¸ã£ã³ã */
+	bx    r1
+
+/*
+ *  å¾®å°æéå¾
+ã¡
+ */
+	ABALIGN(4)
+	ATEXT
+	ATHUMB(sil_dly_nse)
+	AGLOBAL(sil_dly_nse)
+ALABEL(sil_dly_nse)
+	subs  r0, r0, #SIL_DLY_TIM1
+	cmp   r0, #0
+	bgt   sil_dly_nse1
+	bx    lr
+ALABEL(sil_dly_nse1)
+	subs  r0, r0, #SIL_DLY_TIM2
+	cmp   r0, #0
+	bgt   sil_dly_nse1
+	bx    lr
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_test.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_test.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_test.h	(revision 136)
@@ -0,0 +1,73 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008,2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_test.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *		ãã¹ããã­ã°ã©ã ã®ãããä¾å­å®ç¾©ï¼ARM-Mç¨ï¼
+ */
+
+#ifndef TOPPERS_CORE_TEST_H
+#define TOPPERS_CORE_TEST_H
+
+#if __TARGET_ARCH_THUMB == 4
+#define CPUEXC1				6		/* Usage Fault */
+#define RAISE_CPU_EXCEPTION Asm("mcr p15, 0, r1, c2, c0, 0");
+#define CANNOT_RETURN_CPUEXC
+#else /* __TARGET_ARCH_THUMB == 3 */
+#define CPUEXC1				3		/* Hard Fault */
+#define RAISE_CPU_EXCEPTION *(volatile int*)(0x1) = 0x11;
+#define CANNOT_RETURN_CPUEXC
+#endif /* __TARGET_ARCH_THUMB == 4 */
+
+#endif /* TOPPERS_CORE_TEST_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_timer.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_timer.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_timer.c	(revision 136)
@@ -0,0 +1,123 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_timer.c 2308 2012-01-31 12:08:18Z ertl-honda $
+ */
+
+/*
+ *  ã¿ã¤ããã©ã¤ãï¼SYSTICç¨ï¼
+ */
+#include <sil.h>
+#include "kernel_impl.h"
+#include "time_event.h"
+#include "target_timer.h"
+
+/*
+ *  ã¿ã¤ãã®èµ·åå¦ç
+ */
+void
+target_timer_initialize(intptr_t exinf)
+{
+	CLOCK    cyc;
+	uint32_t tmp;
+
+#ifdef SYSTIC_USE_CALIBRATION
+	/* CALIBRATIONã¬ã¸ã¹ã¿ã®å¤ãä½¿ç¨ */
+	cyc = (sil_rew_mem((void *)SYSTIC_CALIBRATION) & SYSTIC_TENMS) / 10;
+#else 
+	cyc = TO_CLOCK(TIC_NUME, TIC_DENO) - 1;
+#endif /* SYSTIC_USE_CALIBRATION */
+
+	/* åæ­¢ */
+	tmp = sil_rew_mem((void *)SYSTIC_CONTROL_STATUS);
+	tmp &= ~SYSTIC_ENABLE;
+	sil_wrw_mem((void *)SYSTIC_CONTROL_STATUS, tmp);
+
+	sil_wrw_mem((void *)SYSTIC_RELOAD_VALUE, cyc);
+	sil_wrw_mem((void *)SYSTIC_CURRENT_VALUE, cyc);
+
+	tmp = sil_rew_mem((void *)SYSTIC_CONTROL_STATUS);
+
+#ifdef SYSTIC_USE_STCLK
+	/* å¤é¨ã¯ã­ãã¯ã®ä½¿ç¨ */
+	tmp |= SYSTIC_ENABLE;
+#else
+	/* ãã­ã»ããµã¯ã­ãã¯ã®ä½¿ç¨ */
+	tmp |= SYSTIC_ENABLE|SYSTIC_CLKSOURCE;
+#endif /* SYSTIC_USE_STCLK */
+
+	sil_wrw_mem((void *)SYSTIC_CONTROL_STATUS, tmp);
+}
+
+/*
+ *  ã¿ã¤ãã®åæ­¢å¦ç
+ */
+void
+target_timer_terminate(intptr_t exinf)
+{
+	/* ã¿ã¤ããåæ­¢ */
+	sil_wrw_mem((void*)SYSTIC_CONTROL_STATUS, 0x00);
+}
+
+/*
+ *  ã¿ã¤ãå²è¾¼ã¿ãã³ãã©
+ */
+void
+target_timer_handler(void)
+{
+	/* probe_int ã®ããï¼COUNTFLAGãã¯ãªã¢ */
+	sil_rew_mem((void *)SYSTIC_CONTROL_STATUS);
+
+	i_begin_int(INTNO_TIMER);
+	signal_time();                    /* ã¿ã¤ã ãã£ãã¯ã®ä¾çµ¦ */
+	i_end_int(INTNO_TIMER);
+}
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_timer.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_timer.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_timer.cfg	(revision 136)
@@ -0,0 +1,11 @@
+/*
+ *  @(#) $Id: core_timer.cfg 2178 2011-07-23 09:58:56Z ertl-honda $
+ */
+
+/*
+ *		ã¿ã¤ããã©ã¤ãã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+ATT_INI({ TA_NULL, 0, target_timer_initialize });
+ATT_TER({ TA_NULL, 0, target_timer_terminate });
+DEF_INH(INHNO_TIMER, { TA_NULL, target_timer_handler });
+CFG_INT(INTNO_TIMER, { TA_ENAINT|INTATR_TIMER, INTPRI_TIMER });
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_timer.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_timer.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_timer.h	(revision 136)
@@ -0,0 +1,131 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: core_timer.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *  ã¿ã¤ããã©ã¤ãï¼SYSTICç¨ï¼
+ */
+
+#ifndef TOPPERS_CORE_TIMER_H
+#define TOPPERS_CORE_TIMER_H
+
+#include <sil.h>
+
+/*
+ *  ã¿ã¤ãå²è¾¼ã¿ãã³ãã©ç»é²ã®ããã®å®æ°
+ */
+#define INHNO_TIMER     IRQNO_SYSTICK /* å²è¾¼ã¿ãã³ãã©çªå· */
+#define INTNO_TIMER     IRQNO_SYSTICK /* å²è¾¼ã¿çªå· */
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã¿ã¤ãå¤ã®å
+é¨è¡¨ç¾ã®å
+ */
+typedef uint32_t    CLOCK;
+
+/*
+ *  ã¿ã¤ãå¤ã®å
+é¨è¡¨ç¾ã¨ããªç§ã»Î¼ç§åä½ã¨ã®å¤æ
+ *
+ */
+#define TO_CLOCK(nume, deno)    ((CLOCK)(TIMER_CLOCK * (nume) / (deno)))
+#define TO_USEC(clock)          (((SYSUTM) clock) * 1000U / TIMER_CLOCK)
+
+/*
+ *  è¨­å®ã§ããæå¤§ã®ã¿ã¤ãå¨æï¼åä½ã¯å
+é¨è¡¨ç¾ï¼
+ */
+#define MAX_CLOCK    ((CLOCK) 0x00ffffffU)
+
+/*
+ *  ã¿ã¤ãã®èµ·åå¦ç
+ *
+ *  ã¿ã¤ããåæåãï¼å¨æçãªã¿ã¤ãå²è¾¼ã¿è¦æ±ãçºçãããï¼
+ */
+extern void target_timer_initialize(intptr_t exinf);
+
+/*
+ *  ã¿ã¤ãã®åæ­¢å¦ç
+ *
+ *  ã¿ã¤ãã®åä½ãåæ­¢ãããï¼
+ */
+extern void target_timer_terminate(intptr_t exinf);
+
+/*
+ *  ã¿ã¤ãã®ç¾å¨å¤ã®èª­åºã
+ */
+Inline CLOCK
+target_timer_get_current(void)
+{
+	return(TO_CLOCK(TIC_NUME, TIC_DENO) - sil_rew_mem((void*)SYSTIC_CURRENT_VALUE));
+}
+
+/*
+ *  ã¿ã¤ãå²è¾¼ã¿è¦æ±ã®ãã§ãã¯
+ */
+Inline bool_t
+target_timer_probe_int(void)
+{
+	return((sil_rew_mem((void*)NVIC_ICSR) & NVIC_PENDSTSET) == NVIC_PENDSTSET);
+}
+
+/*
+ *  ã¿ã¤ãå²è¾¼ã¿ãã³ãã©
+ */
+extern void target_timer_handler(void);
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_CORE_TIMER_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_unrename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_unrename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_unrename.h	(revision 136)
@@ -0,0 +1,94 @@
+/* This file is generated from core_rename.def by genrename. */
+
+/* This file is included only when core_rename.h has been included. */
+#ifdef TOPPERS_CORE_RENAME_H
+#undef TOPPERS_CORE_RENAME_H
+
+/*
+ *  core_config.c
+ */
+#undef exc_tbl
+#undef vector_table
+#undef lock_flag
+#undef saved_iipm
+#undef default_exc_handler
+#undef default_int_handler
+#undef x_config_int
+#undef core_initialize
+#undef core_terminate
+#undef bitpat_cfgint
+#undef set_exc_int_priority
+#undef enable_exc
+#undef disable_exc
+#undef iipm_enable_irq_tbl
+#undef iipm_enable_systic_tbl
+#undef iipm
+#undef ief
+#undef ief_systick
+
+/*
+ *  core_support.S
+ */
+#undef core_int_entry
+#undef core_exc_entry
+#undef ret_int
+#undef ret_exc
+#undef svc_handler
+#undef start_r
+#undef dispatch
+#undef start_dispatch
+#undef exit_and_dispatch
+#undef call_exit_kernel
+
+/*
+ *  start.S
+ */
+#undef _start
+
+#ifdef TOPPERS_LABEL_ASM
+
+/*
+ *  core_config.c
+ */
+#undef _exc_tbl
+#undef _vector_table
+#undef _lock_flag
+#undef _saved_iipm
+#undef _default_exc_handler
+#undef _default_int_handler
+#undef _x_config_int
+#undef _core_initialize
+#undef _core_terminate
+#undef _bitpat_cfgint
+#undef _set_exc_int_priority
+#undef _enable_exc
+#undef _disable_exc
+#undef _iipm_enable_irq_tbl
+#undef _iipm_enable_systic_tbl
+#undef _iipm
+#undef _ief
+#undef _ief_systick
+
+/*
+ *  core_support.S
+ */
+#undef _core_int_entry
+#undef _core_exc_entry
+#undef _ret_int
+#undef _ret_exc
+#undef _svc_handler
+#undef _start_r
+#undef _dispatch
+#undef _start_dispatch
+#undef _exit_and_dispatch
+#undef _call_exit_kernel
+
+/*
+ *  start.S
+ */
+#undef __start
+
+#endif /* TOPPERS_LABEL_ASM */
+
+
+#endif /* TOPPERS_CORE_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_user.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_user.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/core_user.txt	(revision 136)
@@ -0,0 +1,709 @@
+=====================================================================
+                         ARM-Mãã­ã»ããµä¾å­é¨
+                                  Last Modified:2015 Nov 23 09:31:43
+=====================================================================
+
+
+(1) å¯¾å¿ãã¦ããã¿ã¼ã²ããã·ã¹ãã ã®ç¨®é¡ã»æ§æ
+
+ARM-Mä¾å­é¨ã¯ï¼ARMvx-Mã¢ã¼ã­ãã¯ãã£ãã¿ã¼ã²ããã¨ãã¦ããï¼ARMvx-Mã¯ï¼
+ARMã¨ã¯ç°ãªãï¼ARMå½ä»¤ãå®è¡ã§ããªãããï¼ARMä¾å­é¨ã¨åãã¦ããï¼ç¾ç¶
+ãµãã¼ããã¦ããã³ã¢ã¯æ¬¡ã®éãã§ããï¼
+
+ã»Cortex-M0
+ã»Cortex-M0+
+ã»Cortex-M3
+ã»Cortex-M4
+
+(2) ä½¿ç¨ããéçºç°å¢ã¨åä½æ¤è¨¼ããæ¡ä»¶ï¼ãã¼ã¸ã§ã³ï¼ãªãã·ã§ã³ç­ï¼
+
+ã«ã¼ãã«ã¯GCCãç¨ãã¦ã³ã³ãã¤ã«ããï¼åä½ç¢ºèªãããã¼ã¸ã§ã³ã¯åã¿ã¼ã²
+ããä¾å­é¨ã®ãã­ã¥ã¡ã³ãã«è¨è¼ããï¼
+
+
+(3) ã¿ã¼ã²ããå®ç¾©äºé 
+ã®è¦å®
+
+(3-1) ãã¼ã¿åã«é¢ããè¦å®
+
+ãã¼ã¿åã¯ arch/gcc/tool_stddef.h ã§å®ç¾©ããã¦ããå
+å®¹ã§ï¼floatåã¨
+doubleåã¯ï¼ããããIEEE754æºæ ã®åç²¾åº¦æµ®åå°æ°ç¹æ°ã¨åç²¾åº¦æµ®åå°æ°ç¹
+æ°ã§ããï¼
+
+(3-2) å²è¾¼ã¿å¦çã«é¢ããè¦å®
+
+âå²è¾¼ã¿ãã³ãã©çªå·ã¨å²è¾¼ã¿çªå·ã®å²å½ã¦ï¼ä¸¡è
+ã®å¯¾å¿
+
+å²è¾¼ã¿ãã³ãã©çªå·ã¨å²è¾¼ã¿çªå·ã¯ï¼ä¾å¤çºçæã«IPSRã«ã»ãããããä¾å¤çª
+å·ãç¨ããï¼SYSTICKã¯15çªã§ï¼å¤é¨å²è¾¼ã¿ã¯16çªããã®çªå·ãå²ãä»ããã
+ã¦ããï¼
+
+âå²è¾¼ã¿åªå
+åº¦ã®æ®µéæ°ã¨TMIN_INTPRIã®å¤
+
+å²è¾¼ã¿åªå
+åº¦ã®æ®µéæ°ã¯ï¼SoCæ¯ã«ãã¼ãã¦ã§ã¢çã«ãµãã¼ãããå²è¾¼ã¿åªå
+
+åº¦ãããå¹
+ãç°ãªãã®ã§ï¼ã¿ã¼ã²ããä¾å­é¨æ¯ã«ç°ãªãï¼ã¿ã¼ã²ããä¾å­é¨ã§
+ã¯ï¼å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+ï¼TBITW_IPRIï¼ã¨ãã®å²è¾¼ã¿åªå
+åº¦ä¸­ã®ãµãåªå
+
+åº¦ã®ãããå¹
+ï¼TBITW_SUBPRIï¼ãå®ç¾©ããï¼
+
+åãããå¹
+ã®å¤ã¨CFG_INTã§ä½¿ç¨å¯è½ãªå²è¾¼ã¿åªå
+åº¦ã®ç¯å²ã¯æ¬¡ã®éãã§ããï¼
+
+   -(2^(TBIW_IPRI)) + (2^TBITW_SUBIPRI) ï½ -1
+
+ä¾ãã°åªå
+åº¦ã®ãããå¹
+(TBITW_IPRI)ã8bitï¼ãµãåªå
+åº¦ã®ãããå¹
+
+(TBITW_SUBIPRI) ã1bitã®å ´åã¯ï¼-254 ï½ -1 ã®ç¯å²ã§ããï¼
+
+åªå
+åº¦ã®ãããå¹
+(TBITW_IPRI)ã3bitï¼ãµãåªå
+åº¦ã®ãããå¹
+(TBITW_SUBIPRI) 
+ã0bitã®å ´åã¯ï¼-8 ï½ -1 ã®ç¯å²ã§ããï¼
+
+æå¤§åªå
+åº¦(3bitã®ä¾ã§ã¯-8)ã¯ï¼å
+é¨åªå
+åº¦ã¨ãã¦ã¯"0x00"ã¨ãªãï¼ãã®åªå
+
+åº¦ã¯CPUã­ãã¯ã§ç¨ããBASEPRIã¬ã¸ã¹ã¿ã§ã¯ãã¹ã¯ã§ããªãããï¼ã«ã¼ãã«ç®¡
+çå
+ã®å²è¾¼ã¿ã®æé«åªå
+åº¦ï¼TMIN_INTPRIï¼ã¯ï¼æå¤§å¤ãã1ã¤åªå
+åº¦ãä½ãå¤
+ä»¥ä¸ã®å¤ãæå®ããï¼
+
+ãã®ç¯å²ã§ï¼ã«ã¼ãã«ç®¡çå
+ã®å²è¾¼ã¿ã®æé«åªå
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+  Hard Fault                 3
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+  Bus Fault                  5
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+    ./core_cfg1_out.h
+    ./core_check.tf
+    ./core_config.c
+    ./core_config.h
+    ./core_def.csv
+    ./core_insn.h
+    ./core_kernel.h
+    ./core_rename.def
+    ./core_rename.h
+    ./core_sil.h
+    ./core_stddef.h
+    ./core_support.S
+    ./core_test.h
+    ./core_timer.c
+    ./core_timer.cfg
+    ./core_timer.h
+    ./core_unrename.h
+    ./core_user.txt
+    ./start.S
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+  ä¿å­ãstfmdã§è¡ãã«ãããï¼ã¹ã¿ãã¯ã¸ã®ç©ã¿æ¹ãlr,r2ã¨ãªã£ã¦ãããã
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+  ãã¨ã¯ãªã¢ãããããï¼å²è¾¼ã¿ç­ã§è¤æ°åèª­ã¿è¾¼ãä½¿ãæ¹ã«ã¯é©å¿ããªãï¼
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+ ã®ä¿å­ãstmfd1å½ä»¤ã§å®æ½ããããã«å¤æ´ï¼
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+  sub/addã¯ã¢ã»ã³ãã©ã«ãã32bitå½ä»¤ï½sub.w/add.wã¨å¤æãããï¼16bitå½
+  ä»¤ã®subs/addsã§ãåé¡ãªãããï¼å¤æ´ï¼
+
+2012/06/18
+ã»xxx_stddef.h ãç¸å¯¾ãã¹ã§ã¯ãªããã¡ã¤ã«åã®ã¿ã§æå®ããããã«å¤æ´ï¼
+  ã©ã®ãã¡ã¤ã«ãç¨ãããã¯ä»ã®ãã¡ã¤ã«ã¨åæ§ã«ã³ã³ãã¤ã©ã¸ã®ã¤ã³ã¯ã«ã¼
+  ãæå®ã®é åºã¨ããï¼
+ã»core.tf ã§ _kernel_vector_table ã®é
+åã®å¤æ°ã®å®£è¨é¨åãçæããéã«ï¼
+  GEN_VECTOR_TABLE_VARNAME ã¨ããé¢æ°ãå®ç¾©ããã¦ããã°ï¼å¼ã³åºããã
+  ã«å¤æ´ï¼
+  ã»ã¯ã·ã§ã³æå®æ¹æ³ãã³ã³ãã¤ã©æ¯ã«ç°ãªãããç¨æï¼
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+2012/02/29
+ã»Makefile.core
+  ã»CDEFSã«TOPPERS_LABEL_ASMãæå®ãã¦ãããï¼ARMç¨ã®gccã§ã¯ã¢ã»ã³ãã©
+    ã®ã·ã³ãã«ã®åã«_ãä»ããªãããåé¤ï¼
+  
+2012/02/02
+ã»core_config.h
+  ã»x_set_ipm()ã§ï¼iipmã'0'(IIPM_ENAALL)ã®æã®åé¡ãä¿®æ­£ï¼
+ã»core_support.S
+  ã»toppers_asm_custom_idleã®åå¾ã§ä½¿ç¨ããã¬ã¸ã¹ã¿ãå¤æ´ï¼ãã®å¤æ´ã«
+    ããï¼toppers_asm_custom_idle ã§é¢æ°å¼ã³åºããããå ´åã¯ï¼ã¢ã»ã³ã
+    ã©ã¬ãã«ã§ã®ã¬ã¸ã¹ã¿ã®ä¿å­ãå¿
+è¦ãªããªã£ãï¼
+    
+2012/02/23
+ã»core_support.S
+  ã»core_exc_entryã§basepriãèª­ã¿è¾¼ãã ãã¨ï¼å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
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+    ãã¯ããã«ä¸æ¸ããã¦ããåé¡ãä¿®æ­£
+  ã»call_texrtnã¨call_texrtnã®å¼ã³åºããbå½ä»¤ã§è¨è¿°ããã¨ï¼16bitå½ä»¤ã¨
+    ãã¦è§£éããã³ã³ãã¤ã©ãããããï¼ã¡ã¢ãªé
+ç½®ã«ãã£ã¦ã¯ã¬ã³ã¸ãè¶³ã
+    ãªããªãï¼bxå½ä»¤ã«å¤æ´ãããã¨ã§åé¡ãä¿®æ­£ï¼
+
+2012/01/31
+ã»core_timer.c
+ ã»ã¿ã¤ãå²è¾¼ã¿ãã³ãã©ã«ã¦ï¼probe_int ã®ããï¼COUNTFLAGãã¯ãªã¢ããã
+   ãã«èª­ã¿è¾¼ãã§ããã¬ã¸ã¹ã¿ãèª¤ã£ã¦ããåé¡ãä¿®æ­£ï¼
+ 
+2011/12/03
+ã»core_test.h ã®å¤éã¤ã³ã¯ã«ã¼ãé²æ­¢ãã¯ã­ã®åç§°ä¿®æ­£
+ ã»CHIP ã CORE ã«ä¿®æ­£ï¼
+
+ã»ARMCCå¯¾å¿ã«ä¼´ãå¤æ´
+  ã»core_asm.inc(è¿½å )
+    ã»GCCã®ã¢ã»ã³ãã©ã®ãã£ã¬ã¯ãã£ãã®å®ç¾©ãè¨è¿°ãããã¡ã¤ã«ãè¿½å ï¼
+  ã»core_config.h(å¤æ´)
+    ã»core_insn.h ã®ã¤ã³ã¯ã«ã¼ãæ¹æ³ã""ãã<>ã«å¤æ´ãã¦ï¼ã³ã³ãã¤ã©ã®
+      å¼æ°ã§æå®ãããé ã§ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ããµã¼ãããããå¤æ´ï¼
+   ã»ã¡ã¢ãªããªã¢å½ä»¤(Asm("":::"memory"))ããã¯ã­åãã¦core_insn.h ã«
+     å®ç¾©ãä½¿ç¨ããããå¤æ´ï¼     
+  ã»core_insn.h(å¤æ´)
+   ã»ã¡ã¢ãªããªã¢å½ä»¤(Asm("":::"memory"))ã®ãã¯ã­å®ç¾©ãè¿½å 
+  ã»core_support.S(å¤æ´)
+   ã»ARMCCã¨ãã¡ã¤ã«ãå
+±æããããï¼ãã£ã¬ã¯ãã£ãããã¯ã­ã«æ¸ãæãï¼      
+  ã»start.S(å¤æ´)
+   ã»ARMCCã¨ãã¡ã¤ã«ãå
+±æããããï¼ãã£ã¬ã¯ãã£ãããã¯ã­ã«æ¸ãæãï¼  
+   
+2011/07/26
+ã»CCRã®STKALIGNã'1'ã®å ´åã¸ã®å¯¾å¿
+  å²è¾¼ã¿ã»ä¾å¤ã®åºå
+¥å£å¦çã§ã¯ï¼ã¹ã¿ãã¯ã¯å¸¸ã«8byteå¢çã¨ãªãããã«å¤
+  æ´ï¼
+  
+2011/07/25
+ã»CPUä¾å¤ã®åªå
+åº¦ã®åæå
+  CPUã­ãã¯ã§ãã¹ã¯ã§ããªãåªå
+åº¦ï¼å
+é¨åªå
+åº¦0ï¼ã«åæåããå¦çãè¿½å ï¼
+  
+ã»CFG_INTã§ä½¿ç¨ã§ããå²è¾¼ã¿åªå
+åº¦ã®æå¤§å¤ã®ä¿®æ­£(core.tf)
+  ã»æå¤§å¤ã1ã¤å¤§ããªå¤ã¨ãªã£ã¦ããï¼
+  
+ã»ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã®æ±ãã®å¤æ´
+  ã»å
+±éé¨ã§ã®æ±ãã®å¤æ´ã«ä¼´ãå¤æ´ï¼
+  
+ã»ã¿ã¤ãå²è¾¼ã¿ãã³ãã©ã§ã®COUNTFLAGã®ã¯ãªã¢å¦çã®ä¿®æ­£
+  SYSTIC_CONTROL_STATUSã¬ã¸ã¹ã¿ã®COUNTFLAGãã¯ãªã¢ããã«ã¯ï¼
+  SYSTIC_CURRENT_VALUEã¬ã¸ã¹ã¿ãèª­ã¿è¾¼ãå¿
+è¦ããããï¼èª¤ã£ã¦
+  SYSTIC_CONTROL_STATUSã¬ã¸ã¹ã¿ãèª­ã¿è¾¼ãã§ããï¼
+
+ã»core_int_entryã«ãããbasepriã®è¨­å®
+  NVICåªå
+åº¦ãã¹ã¯ãèªåçã«è¨­å®ãããããåªå
+åº¦ãã¹ã¯ã®ç¹ã§ã¯å¿
+è¦ãª
+  ããï¼x_get_ipm()ãbasepriãåç
+§ããããï¼basepriãæ´æ°ããããå¤æ´ï¼
+
+2011/07/24
+ã»_ret_int_2/svc_handler ã®å¤æ´
+  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+¨è§£é¤ç¶æ
+ã§ããã¿ã¹ã¯ä¾å¤ãå¼ã³åºããªãããã«
+  ä»æ§ãå¤æ´ãããããï¼_ret_int_2ã§ã¯ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãï¼å
+¨è§£é¤
+  ç¶æ
+ï¼TIPM_ENAALLï¼ã«è¨­å®ããããå¤æ´ï¼
+  svc_handlerã¯ã¿ã¹ã¯ã«ãªã¿ã¼ã³ããæã«basepriãIIPM_ENAALLã«ãããã
+  ã«å¤æ´ï¼
+  
+ã»x_config_int()/set_exc_int_priority()ã®ä¿®æ­£  
+  x_config_int()ããï¼set_exc_int_priority()ã«å¯¾ãã¦å¤é¨åªå
+åº¦ãå¼æ°ã«
+  ãã¦å¼ã³åºãããããï¼å
+é¨åªå
+åº¦ãå¼æ°ã§å¼ã³åºãããä¿®æ­£ï¼
+  set_exc_int_priority()ãåãåã£ãå¼æ°ãå
+é¨åªå
+åº¦ã¨ãã¦åªå
+åº¦ãè¨­å®
+  ããããã«ä¿®æ­£ï¼
+
+2011/07/23
+ã»å
+±éé¨ã1.4.0ã«update.
+
+ã»armä¾å­é¨ã¨åæ§ã«ãããä¾å­é¨ãç½®ããããã«ãã£ã¬ã¯ããªæ§é ãå¤æ´
+
+ã»armä¾å­é¨ã¨åæ§ã«ãã¡ã¤ã«åã®ããªãã£ãã¯ã¹ãcoreã«å¤æ´ï¼
+
+ã»call_atexitã®åé¤
+  software_term_hook ã®å¼ã³åºãã¯ï¼core_terminate()ã«ç§»åï¼
+  
+ã»å
+±éé¨ã1.7.0ã«update.  
+
+ã»ã¿ã¹ã¯ã³ã³ãã­ã¹ããã­ãã¯ã®ååã®å¤æ´
+  CTXBåãTSKCTXBåã«åç§°å¤æ´ï¼
+
+ã»ã¿ã¼ã²ããä¾å­é¨ã§ãµãã¼ãããæ©è½ãç¤ºããã¯ã­ã®å¤æ´
+  TOPPERS_SUPPORT_DIS_INTãTOPPERS_TARGET_SUPPORT_DIS_INTã«ï¼
+  TOPPERS_SUPPORT_ENA_INTãTOPPERS_TARGET_SUPPORT_ENA_INTã«ï¼
+  å¤æ´ï¼
+  
+ã»exc_sense_unlockã®å®ç¾©ãåé¤ï¼  
+  
+ã»ãªãã»ãããã¡ã¤ã«ãã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã§çæããæ¹æ³ã¸ã®å¯¾å¿
+
+ã»CHECK_FUNC_ALIGNï¼CHECK_FUNC_NONNULLï¼CHECK_STACK_ALIGNï¼
+  CHECK_STACK_NONNULLï¼CHECK_MPF_ALIGNï¼CHECK_MPF_NONNULLã®å®ç¾©ãï¼ã¿
+  ã¼ã²ããä¾å­é¨ã®ãã³ãã¬ã¼ããã¡ã¤ã«ï¼ãã¹3ï¼ããããããã¡ã¤ã«ã«ç§»
+  åï¼
+
+ã»å²è¾¼ã¿ã¨ä¾å¤ã®å
+¥ãå£å¦çã®ååãå¤æ´
+  int_entryãcore_int_entryã¸exc_entryãcore_exc_entryã«å¤æ´ï¼
+  ãªãã»ããã®åå¾æ¹æ³ãå¤æ´ã¨ãªã£ãããï¼å
+ã®ååã®ã¾ã¾ã ã¨cfg1_out.c
+  ãã³ã³ãã¤ã«ã¨ã©ã¼ã¨ãªãããã«å¤æ´ï¼
+  
+ã»ã¿ã¼ã²ããä¾å­é¨ã§å®ç¾©ããåç§°ã®ãªãã¼ã ã®è¿½å 
+
+ã»call_texrtnãå¼ã³åºãæ¡ä»¶ã«ãipmflgãtrueããè¿½å 
+ 
+ã»ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ã®æ±ãã®å¤æ´
+
+2011/07/22
+ã»x_disable_int() : prc_config.h ã®ä¿®æ­£   
+ å²è¾¼ã¿ç¦æ­¢ã¬ã¸ã¹ã¿ã®ã¢ãã¬ã¹ãåå¾ããéã«ï¼ãã¼ã¹ã®å¤ãuint32_tã®
+ ãã¤ã³ã¿ã«ã­ã£ã¹ããã¦ããªã£ãããï¼æ­£ããã¢ãã¬ã¹ãçæã§ãã¦ããª
+ ãã£ãåé¡ãä¿®æ­£ï¼
+ 
+ã»éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã®åæå¤ãã¯ã­(TOPPERS_ISTKPT)ã®ä¿®æ­£ 
+  : prc_config.h
+ ãã¤ãåä½ã§åå¾ããããã«ï¼(char_t *) ã«ã­ã£ã¹ããã¦æ²è¼ããããã«ä¿®
+ æ­£ï¼
+  
+ã»LOG_INH_ENTRYã¨LOG_INH_LEAVEã®èª¤è¨ : prc_support.S
+  LOG_INH_ENTRYã¨LOG_INH_LEAVEã§ããã¹ãç®æã LOG_EXC_ENTRYã¨
+  LOG_EXC_ENTRYã«ãªã£ã¦ããåé¡ãä¿®æ­£ï¼
+
+ã»TOPPERS_CUSTOM_IDLE ã®typoã®ä¿®æ­£ : prc_support.S
+
+ã»svn_hanlderã®ä¿®æ­£ :  prc_support.S
+  ä¸å¾EXC_FRAME_SIZEåã®ã¹ã¿ãã¯ãæ¨ã¦ã¦ãããï¼Configureation and 
+  Control Register(CCR)ã®STKALIGNã'1'ã®å ´  åã¯ï¼8byteå¢çã«ã¢ã©ã¤ã³
+  ãããããï¼æ¨ã¦ããµã¤ãºãç°ãªãï¼ã¢ã©ã¤ã³ããããã¯ï¼xPSRã®9ãã
+  ãããã§ãã¯ãããã¨ã«ããå¤å®ããï¼
+  
+ã»prc.tfã®ä¿®æ­£
+  boostã®ãã¼ã¸ã§ã³ã«ãã£ã¦å¤ããæåãå¸åï¼
+  http://www.toppers.jp/TOPPERS-USERS/201004/msg00034.html
+  
+ã»_kernel_istkpt ã®åé¤ : prc_cfg1_out.h
+  _kernel_istkpt ãå¿
+è¦ãªãã¿ã¼ã²ãããå­å¨ããããï¼å¿
+è¦ãªãï¼ã¿ã¼ã²
+  ããä¾å­é¨ã§å®ç¾©ããããã«å¤æ´ï¼
+
+2008/08/22
+ã»prc_user.txt/prc_design.txt
+  ã»2008/8/21ã®æè¡æ¤è¨ä¼ã§ã®è­°è«çµæãåæ ï¼
+  
+ã»prc_support.S/prc_config.c/prc_config.h/arm_m.h
+  ã»ã³ã³ãã­ã¹ãå¤å®ãexc_ncntããã¢ã¯ãã£ããªã¹ã¿ãã¯ã«å¤æ´
+  
+ã»prc_config.c
+  ã»set_exc_int_priority() ã§ãµãã¼ãå¯è½ãªIRQã®ä¸éã239ã«æ¡å¼µï¼
+  
+ã»start.S 
+  ã»èµ·åæã¯Threadã¢ã¼ããåæã¨ãã¦ãããã¨ãæè¨ï¼
+  ã»ãã¼ãã­ã¼ãã¼ç­ããèµ·åãããå ´åãæ³å®ãï¼MSPãæå¹ã«ããããã«
+    å¤æ´ï¼
+    
+ã»prc_timer.c
+  ã»ã³ã¡ã³ããä¿®æ­£
+  ã»ãããã°ç¨ã³ã¼ããåé¤
+
+2008/07/11
+ã»æåã®ãªãªã¼ã¹
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/start.S
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/start.S	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/common/start.S	(revision 136)
@@ -0,0 +1,178 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: start.S 2704 2015-11-21 15:50:12Z ertl-honda $
+ */
+                
+/*
+ *   ã«ã¼ãã«ç¨ã®ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«(ARM-Mç¨)
+ */
+#define TOPPERS_MACRO_ONLY
+#define UINT_C(val)		(val)		/* uint_tåã®å®æ°ãä½ããã¯ã­ */
+#define ULONG_C(val)	(val)		/* ulong_tåã®å®æ°ãä½ããã¯ã­ */
+#define CAST(type, val)	(val)		/* åã­ã£ã¹ããè¡ããã¯ã­ */
+
+#include "kernel_impl.h"
+#include "arm_m.h"
+#include "target_asm.inc"
+
+/*
+ *  ã¹ã¿ã¼ãã¢ããã«ã¼ãã³
+ *
+ *  Threadã¢ã¼ãã§å¼ã³åºããããã¨ãåæã¨ãã¦ãï¼
+ */
+	ATEXT
+	ABALIGN(4)
+	ATHUMB(_start)
+	AGLOBAL(_start) 
+ALABEL(_start)
+	cpsid f                 /* å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¸ */
+
+#ifdef INIT_MSP
+	/*
+	 * MSPã®è¨­å®
+	 */
+	mov   r0, #CONTROL_MSP  /* MSPãæå¹ã«  */
+	msr   control, r0
+	isb                     /* control ã®æä½å¾ã«å¿
+è¦ */
+	ldr  r0,=_kernel_istkpt
+	ldr  r1,[r0]
+	msr  msp, r1
+#endif /* INIT_MSP */
+
+#ifdef TOPPERS_FPU_ENABLE
+	/*
+	 *  FPUã®æå¹å
+	 */
+	ldr  r0,=(CPACR)
+	ldr  r1,=(CPACR_FPU_ENABLE)
+	ldr  r2,[r0]
+	orr  r2,r2,r1    
+	str  r2,[r0]
+
+	/*
+	 *  FPCAãåæå
+	 */ 
+	ldr r0, =(FPCCR_INIT)
+	ldr r1, =(FPCCR)
+	str r0, [r1] 
+#endif /* TOPPERS_FPU_ENABLE */
+
+	/*
+	 * hardware_init_hookã®å¼ã³åºã ï¼0ã§ãªãå ´åï¼
+	 *
+	 * ã¿ã¼ã²ãããã¼ãã¦ã§ã¢ã«ä¾å­ãã¦å¿
+è¦ãªåæåå¦çãããå ´å
+	 * ã¯ï¼hardware_init_hook ã¨ããé¢æ°ãç¨æãã
+	 */
+	ldr  r0, =hardware_init_hook
+	cbz  r0, start_1
+	blx  r0
+
+ALABEL(start_1)
+#ifndef OMIT_BSS_INIT
+	/*
+	 *  BSSã»ã¯ã·ã§ã³åæå
+	 */
+	mov  r0, #0
+	ldr  r1, =BSS_START
+	ldr  r2, =BSS_END
+	cmp  r1, r2
+	bhs  start_3
+ALABEL(start_2)
+	str  r0, [r1]
+	add  r1,r1, #4    
+	cmp  r1, r2
+	blo  start_2
+#endif /* OMIT_BSS_INIT */
+
+
+ALABEL(start_3)
+#ifndef OMIT_DATA_INIT
+	/*
+	 *  DATAã»ã¯ã·ã§ã³åæå
+	 *  __idata_start ãã __idata_end ã¾ã§ãï¼__data_start ä»¥éã«
+	 *  ã³ãã¼ãã
+	 */
+	ldr  r1, =IDATA_START
+	ldr  r2, =IDATA_END
+	cmp  r1, r2
+	bhs  start_5
+	ldr  r3, =DATA_START
+ALABEL(start_4)
+	ldr  r0, [r1]
+	str  r0, [r3]
+	add  r1, #4
+	add  r3, #4
+	cmp  r1, r2
+	blo  start_4
+#endif /* OMIT_DATA_INIT */
+
+	/*
+	 *  software_init_hook ãå¼åºãï¼0 ã§ãªãå ´åï¼
+	 *
+	 *  ã½ããã¦ã§ã¢ç°å¢ï¼ç¹ã«ã©ã¤ãã©ãªï¼ã«ä¾å­ãã¦å¿
+è¦ãªåæåå¦
+	 *  çãããå ´åã¯ï¼software_init_hook ã¨ããé¢æ°ãç¨æããã°
+	 *  ããï¼
+	 */
+ALABEL(start_5)
+	ldr  r0, =software_init_hook
+	cbz  r0, start_6
+	blx  r0
+
+ALABEL(start_6)
+	bl   sta_ker
+
+ALABEL(l_end)
+	b   l_end
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/MANIFEST	(revision 136)
@@ -0,0 +1,20 @@
+chip.tf
+chip_cfg1_out.h
+chip_check.tf
+chip_config.c
+chip_config.h
+chip_kernel.h
+chip_offset.tf
+chip_rename.def
+chip_rename.h
+chip_sil.h
+chip_stddef.h
+chip_syssvc.h
+chip_test.h
+chip_unrename.h
+chip_user.txt
+Makefile.chip
+MANIFEST
+stm32f.h
+usart.c
+usart.h
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/Makefile.chip
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/Makefile.chip	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/Makefile.chip	(revision 136)
@@ -0,0 +1,59 @@
+#
+#		Makefile ã®ã¿ã¼ã²ããä¾å­é¨ï¼STM32Fç¨ï¼
+#
+
+# 
+#  ãããä¾å­é¨ãã£ã¬ã¯ããªåã®å®ç¾© 
+# 
+CHIPDIR = $(SRCDIR)/arch/$(PRC)_$(TOOL)/$(CHIP)
+
+#
+#  ã³ã¢ã¿ã¤ã
+#
+CORE_TYPE = CORTEX_M3
+
+#
+#  ã³ã³ãã¤ã«ãªãã·ã§ã³
+#
+INCLUDES := $(INCLUDES) -I$(CHIPDIR)
+CDEFS := $(CDEFS) 
+COPTS := $(COPTS) 
+
+#
+#  ã«ã¼ãã«ã«é¢ããå®ç¾©
+#
+KERNEL_DIR := $(KERNEL_DIR) $(CHIPDIR)
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS)
+KERNEL_COBJS := $(KERNEL_COBJS) chip_config.o core_timer.o
+KERNEL_CFLAGS := $(KERNEL_CFLAGS) -fno-strict-aliasing
+
+#
+#  ã·ã¹ãã ãµã¼ãã¹ã«é¢ããå®ç¾©
+#
+SYSSVC_DIR := $(SYSSVC_DIR)
+SYSSVC_COBJS := $(SYSSVC_COBJS)
+
+#
+#  ãã¬ã¼ã¹ã­ã°ã«é¢ããè¨­å®
+#
+ifeq ($(ENABLE_TRACE),true)
+	COPTS := $(COPTS) -DTOPPERS_ENABLE_TRACE
+	KERNEL_DIR := $(KERNEL_DIR) $(SRCDIR)/arch/logtrace
+	KERNEL_COBJS := $(KERNEL_COBJS) trace_config.o trace_dump.o
+endif
+
+#
+#  ä¾å­é¢ä¿ã®å®ç¾©
+#
+kernel_cfg.timestamp: $(CHIPDIR)/chip.tf
+$(OBJFILE): $(CHIPDIR)/chip_check.tf
+
+# 
+#  ãªãã»ãããã¡ã¤ã«çæã®ããã®å®ç¾© 
+# 
+OFFSET_TF := $(CHIPDIR)/chip_offset.tf
+
+#
+#  ã³ã¢ä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ã
+#
+include $(SRCDIR)/arch/$(PRC)_$(TOOL)/common/Makefile.core
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip.tf	(revision 136)
@@ -0,0 +1,8 @@
+$ 
+$     ãã¹2ã®ã¿ã¼ã²ããä¾å­ãã³ãã¬ã¼ãï¼STM32Fç¨ï¼
+$ 
+
+$ 
+$  ã³ã¢ä¾å­ã®ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ã
+$ 
+$INCLUDE"arm_m_gcc/common/core.tf"$
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_cfg1_out.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_cfg1_out.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_cfg1_out.h	(revision 136)
@@ -0,0 +1,11 @@
+/*
+ *		cfg1_out.cããªã³ã¯ããããã«å¿
+è¦ãªã¹ã¿ãã®å®ç¾©
+ */
+
+STK_T *const	_kernel_istkpt = 0x00;
+
+/*
+ *  ã³ã¢ä¾å­ã®ã¹ã¿ãã®å®ç¾© 
+ */
+#include <core_cfg1_out.h>
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_check.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_check.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_check.tf	(revision 136)
@@ -0,0 +1,8 @@
+$ 
+$     ãã¹3ã®ã¿ã¼ã²ããä¾å­ãã³ãã¬ã¼ãï¼STM32Fç¨ï¼
+$ 
+
+$ 
+$  ãã¹3ã®ãã­ã»ããµä¾å­ã®ãã³ãã¬ã¼ãã®ã¤ã³ã¯ã«ã¼ã
+$ 
+$INCLUDE"arm_m_gcc/common/core_check.tf"$
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_config.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_config.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_config.c	(revision 136)
@@ -0,0 +1,88 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+/*
+ * ã¿ã¼ã²ããä¾å­ã¢ã¸ã¥ã¼ã«ï¼STM32Fç¨ï¼
+ */
+#include "kernel_impl.h"
+#include <sil.h>
+#include "stm32f.h"
+#include "usart.h"
+#include "target_syssvc.h"
+
+/*
+ *  ãããä¾å­ã®åæå
+ */
+void
+chip_initialize(void)
+{
+	/*
+	 *  ãã­ã»ããµä¾å­é¨ã®åæå
+	 */
+	core_initialize();
+}
+
+/*
+ *  ãããä¾å­ã®çµäºå¦ç
+ */
+void
+chip_exit(void)
+{
+	/*
+	 * ãã­ã»ããµä¾å­é¨ã®çµäºå¦ç
+	 */
+	core_terminate();
+}
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_config.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_config.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_config.h	(revision 136)
@@ -0,0 +1,99 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+#ifndef TOPPERS_CHIP_CONFIG_H
+#define TOPPERS_CHIP_CONFIG_H
+
+/*
+ * ã¿ã¼ã²ããä¾å­é¨ã¢ã¸ã¥ã¼ã«ï¼STM32Fç¨ï¼
+ *
+ * ã«ã¼ãã«ã®ã¿ã¼ã²ããä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ï¼kernel_impl.hã®ã¿ã¼
+ * ã²ããä¾å­é¨ã®ä½ç½®ä»ãã¨ãªãï¼
+ */
+
+/*
+ * ã¿ã¼ã²ããã·ã¹ãã ã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
+ */
+#include "stm32f.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã«é¢ããè¨­å®
+ */
+#ifdef TOPPERS_ENABLE_TRACE
+#include "logtrace/trace_config.h"
+#endif /* TOPPERS_ENABLE_TRACE */
+
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ãããä¾å­ã®åæå
+ */
+extern void	chip_initialize(void);
+
+/*
+ *  ãããä¾å­ã®çµäºå¦ç
+ */
+extern void	chip_exit(void);
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ã³ã¢ä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARM-Mç¨ï¼
+ */
+#include <core_config.h>
+
+#endif /* TOPPERS_CHIP_CONFIG_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_kernel.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_kernel.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_kernel.h	(revision 136)
@@ -0,0 +1,95 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2007,2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+/*
+ *  kernel.hã®ã¿ã¼ã²ããä¾å­é¨ï¼STM32Fç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼kernel.hã§ã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡
+ *  ã¤ã«ããç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ã
+ *  ããåã«ï¼t_stddef.hãã¤ã³ã¯ã«ã¼ããããã®ã§ï¼ãããã«ä¾å­ãã¦ãã
+ *  ãï¼
+ */
+
+#ifndef TOPPERS_CHIP_KERNEL_H
+#define TOPPERS_CHIP_KERNEL_H
+
+/*
+ *  ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿åªå
+åº¦ã®ç¯å²
+ *
+ *  TMIN_INTPRIã®å®ç¾©ãå¤æ´ãããã¨ã§ï¼ãã®ã¬ãã«ãããé«ãå²è¾¼ã¿åªå
+åº¦
+ *  ãæã¤ãã®ãã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã¨ããããå¤æ´ã§ããï¼
+ */
+#define TMIN_INTPRI		(-15)		/* å²è¾¼ã¿åªå
+åº¦ã®æå°å¤ï¼æé«å¤ï¼*/
+
+/*
+ *  ãµãã¼ãããæ©è½ã®å®ç¾©
+ */
+#define TOPPERS_TARGET_SUPPORT_GET_UTM		/* get_utmããµãã¼ããã */
+
+/*
+ *  ã¿ã¤ã ãã£ãã¯ã®å®ç¾©
+ */
+#define TIC_NUME			1U		/* ã¿ã¤ã ãã£ãã¯ã®å¨æã®åå­ */
+#define TIC_DENO			1U		/* ã¿ã¤ã ãã£ãã¯ã®å¨æã®åæ¯ */
+
+/*
+ *  ã³ã¢ä¾å­ã§å
+±éãªå®ç¾©
+ */
+#include "arm_m_gcc/common/core_kernel.h"
+
+#endif /* TOPPERS_CHIP_KERNEL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_offset.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_offset.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_offset.tf	(revision 136)
@@ -0,0 +1,13 @@
+$
+$       ãªãã»ãããã¡ã¤ã«çæç¨ãã³ãã¬ã¼ããã¡ã¤ã«ï¼STM32FXXXç¨ï¼
+$
+
+$
+$  æ¨æºãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ã
+$
+$INCLUDE "kernel/genoffset.tf"$
+
+$ 
+$  ã³ã¢ä¾å­ãã³ãã¬ã¼ãã®ã¤ã³ã¯ã«ã¼ãï¼ARM-Mç¨ï¼
+$ 
+$INCLUDE"../../arch/arm_m_gcc/common/core_offset.tf"$
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_rename.def
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_rename.def	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_rename.def	(revision 136)
@@ -0,0 +1,5 @@
+INCLUDE	"arm_m_gcc/common/core"
+
+#chip_config.c
+chip_initialize
+chip_exit
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_rename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_rename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_rename.h	(revision 136)
@@ -0,0 +1,26 @@
+/* This file is generated from chip_rename.def by genrename. */
+
+#ifndef TOPPERS_CHIP_RENAME_H
+#define TOPPERS_CHIP_RENAME_H
+
+
+/*
+ * chip_config.c
+ */
+#define chip_initialize				_kernel_chip_initialize
+#define chip_exit					_kernel_chip_exit
+
+#ifdef TOPPERS_LABEL_ASM
+
+
+/*
+ * chip_config.c
+ */
+#define _chip_initialize			__kernel_chip_initialize
+#define _chip_exit					__kernel_chip_exit
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "arm_m_gcc/common/core_rename.h"
+
+#endif /* TOPPERS_CHIP_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_sil.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_sil.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_sil.h	(revision 136)
@@ -0,0 +1,98 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007,2011-2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+/*
+ *  sil.hã®ã¿ã¼ã²ããä¾å­é¨ï¼STM32Fç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼sil.hã®å
+é ­ã§ã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡
+ *  ã¤ã«ããã¯ç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼
+ *  ãããåã«ï¼t_stddef.hãã¤ã³ã¯ã«ã¼ããããã®ã§ï¼ãããã«ä¾å­ãã¦ã
+ *  ããï¼
+ */
+
+#ifndef TOPPERS_CHIP_SIL_H
+#define TOPPERS_CHIP_SIL_H
+
+/*
+ *  ãã­ã»ããµã®ã¤ã³ãã£ã¢ã³å®ç¾©
+ *    STM32Fã¯ãªãã«ã¨ã³ãã£ã¢ã³
+ */
+#define SIL_ENDIAN_LITTLE
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+(core_sil.hã§åç
+§ããããããã§å®ç¾©)
+ */
+#define TBITW_IPRI     4
+
+/*
+ *  ãã­ã»ããµã§å
+±éãªå®ç¾© 
+ */
+#include <core_sil.h>
+
+/*
+ *  ä¸è¬å
+±éã¬ã¸ã¹ã¿æä½é¢æ°
+ */
+#define sil_orb( mem, val )		sil_wrb_mem( mem, sil_reb_mem( mem ) | val )
+#define sil_andb( mem, val )	sil_wrb_mem( mem, sil_reb_mem( mem ) & val )
+#define sil_orh( mem, val )		sil_wrh_mem( mem, sil_reh_mem( mem ) | val )
+#define sil_andh( mem, val )	sil_wrh_mem( mem, sil_reh_mem( mem ) & val )
+#define sil_orw( mem, val )		sil_wrw_mem( mem, sil_rew_mem( mem ) | val )
+#define sil_andw( mem, val )	sil_wrw_mem( mem, sil_rew_mem( mem ) & val )
+
+#endif /* TOPPERS_CHIP_SIL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_stddef.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_stddef.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_stddef.h	(revision 136)
@@ -0,0 +1,99 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007,2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+/*
+ *  t_stddef.hã®ã¿ã¼ã²ããä¾å­é¨ï¼STM32Fç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼t_stddef.hã®å
+é ­ã§ã¤ã³ã¯ã«ã¼ããããï¼
+ *  ä»ã®ãã¡ã¤ã«ããã¯ç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ä»ã®ã¤ã³ã¯ã«ã¼ã
+ *  ãã¡ã¤ã«ã«å
+ç«ã£ã¦å¦çãããããï¼ä»ã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã«ä¾å­ã
+ *  ã¦ã¯ãªããªãï¼
+ */
+
+#ifndef TOPPERS_CHIP_STDDEF_H
+#define TOPPERS_CHIP_STDDEF_H
+
+/*
+ *  ã¿ã¼ã²ãããè­å¥ããããã®ãã¯ã­ã®å®ç¾©
+ */
+#define TOPPERS_STM32F			/* ã·ã¹ãã ç¥ç§° */
+
+/*
+ *  éçºç°å¢ã§å
+±éãªå®ç¾©
+ */
+#define TOPPERS_STDINT_TYPE1
+#define TOPPERS_STDFLOAT_TYPE1
+#include <tool_stddef.h>
+
+/*
+ *  ãã­ã»ããµã§å
+±éãªå®ç¾©
+ */
+#include <core_stddef.h>
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã¢ãµã¼ã·ã§ã³ã®å¤±ææã®å®è¡ä¸­æ­å¦çï¼T.B.Dï¼
+ */
+Inline void
+TOPPERS_assert_abort(void)
+{
+    while(1);
+}
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_CHIP_STDDEF_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_syssvc.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_syssvc.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_syssvc.h	(revision 136)
@@ -0,0 +1,93 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2007,2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+/*
+ *  ã·ã¹ãã ãµã¼ãã¹ã®ã¿ã¼ã²ããä¾å­é¨ï¼STM32Fç¨ï¼
+ *
+ *  ã·ã¹ãã ãµã¼ãã¹ã®ã¿ã¼ã²ããä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ï¼ãã®ãã¡
+ *  ã¤ã«ã®å
+å®¹ã¯ï¼ã³ã³ãã¼ãã³ãè¨è¿°ãã¡ã¤ã«ã«è¨è¿°ããï¼ãã®ãã¡ã¤ã«ã¯
+ *  ç¡ããªãè¦è¾¼ã¿ï¼
+ */
+
+#ifndef TOPPERS_CHIP_SYSSVC_H
+#define TOPPERS_CHIP_SYSSVC_H
+
+/*
+ *  ã¿ã¼ã²ããã·ã¹ãã ã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
+ */
+#include "stm32f.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã«é¢ããè¨­å®
+ */
+#ifdef TOPPERS_TRACE_ENABLE
+#include "logtrace/trace_config.h"
+#endif /* TOPPERS_TRACE_ENABLE */
+
+/*
+ *  èµ·åã¡ãã»ã¼ã¸ã«ã¿ã¼ã²ããä¾å­é¨ã®èä½æ¨©è¡¨ç¤ºã
+ *  è¿½å ããããã®ãã¯ã­ï¼
+ */
+#ifdef PRC_COPYRIGHT
+#define TARGET_COPYRIGHT	PRC_COPYRIGHT
+#endif /* PRC_COPYRIGHT */
+
+/*
+ *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯é¢é£ã®å®æ°ã®å®ç¾©
+ *
+ *  ããã©ã«ãå¤ã®éãï¼
+ */
+
+#endif /* TOPPERS_CHIP_SYSSVC_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_test.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_test.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_test.h	(revision 136)
@@ -0,0 +1,67 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2007,2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+/*
+ *		ãã¹ããã­ã°ã©ã ã®ã¿ã¼ã²ããä¾å­å®ç¾©ï¼STM32Fç¨ï¼
+ */
+
+#ifndef TOPPERS_CHIP_TEST_H
+#define TOPPERS_CHIP_TEST_H
+
+/*
+ *  ãã­ã»ããµä¾å­ã¢ã¸ã¥ã¼ã«(ARM-Mç¨)
+ */
+#include "arm_m_gcc/common/core_test.h"
+
+#endif /* TOPPERS_CHIP_TEST_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_unrename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_unrename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_unrename.h	(revision 136)
@@ -0,0 +1,27 @@
+/* This file is generated from chip_rename.def by genrename. */
+
+/* This file is included only when chip_rename.h has been included. */
+#ifdef TOPPERS_CHIP_RENAME_H
+#undef TOPPERS_CHIP_RENAME_H
+
+
+/*
+ * chip_config.c
+ */
+#undef chip_initialize
+#undef chip_exit
+
+#ifdef TOPPERS_LABEL_ASM
+
+
+/*
+ * chip_config.c
+ */
+#undef _chip_initialize
+#undef _chip_exit
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "arm_m_gcc/common/core_unrename.h"
+
+#endif /* TOPPERS_CHIP_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_user.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_user.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/chip_user.txt	(revision 136)
@@ -0,0 +1,277 @@
+=====================================================================
+                    ST32F(GCC)ãã­ã»ããµä¾å­é¨ 
+                                  Last Modified:2015 Nov 14 17:35:26
+=====================================================================
+
+âæ¦è¦
+
+STM32Fã¿ã¼ã²ããä¾å­é¨ã¯ï¼STç¤¾ã®ST32Fã·ãªã¼ãºããµãã¼ããã¦ããï¼ç¾ç¶
+ã§ã¯ï¼ä¸é¨ã®STM32Fã·ãªã¼ãºã®ã¿ããµãã¼ããã¦ããï¼ä»å¾ãµãã¼ããããã
+å¢ããäºå®ã§ããï¼ST32Fã·ãªã¼ãºãç¢ºèªæ¸ã¿ã®ãããã§åä½ãããæ¹ã¯ï¼é£
+çµ¡ãããã ããã¨å¹¸ãã§ãï¼
+
+
+âç¢ºèªæ¸ã¿ã®ããã
+
+ã»STM32F103VB(Cortex-M3)
+
+
+âã«ã¼ãã«ã®ä½¿ç¨ãªã½ã¼ã¹
+
+ã«ã¼ãã«ã¯ä»¥ä¸ã®ãªã½ã¼ã¹ãä½¿ç¨ããï¼
+
+  ã»ROM
+     ã³ã¼ããé
+ç½®ããï¼
+     ä½¿ç¨éã¯ä½¿ç¨ããAPIã®æ°ã«ä¾å­ããï¼
+
+  ã»RAM
+     ãã¼ã¿ãé
+ç½®ããï¼
+     ä½¿ç¨éã¯ãªãã¸ã§ã¯ãæ°ã«ä¾å­ããï¼
+  
+  ã»SysTick
+     ã«ã¼ãã«å
+é¨ã®ãã£ãã¯ã®çæã«ç¨ããï¼
+
+          
+âã³ã³ãã¤ã©
+
+GCC 4.4.1  (Sourcery G++ Lite 2010q1-188) ã§åä½ç¢ºèªãè¡ã£ãï¼
+
+
+âå²è¾¼ã¿åªå
+åº¦
+
+å²è¾¼ã¿åªå
+åº¦ã¨ãã¦æå®å¯è½ãªç¯å²ã¯ï¼-15 ï½ -1 ã§ããï¼
+
+
+âã¿ã¼ã²ãããã¼ãä¾å­é¨ã®ä½ææ¹æ³
+
+ä»¥ä¸ã®å
+å®¹ãã¿ã¼ã²ãããã¼ãä¾å­é¨ã«è¿½å ãããã¨ï¼STBEE(GCC)ã¿ã¼ã²ãã
+ä¾å­é¨ã®å
+å®¹ãã³ãã¼ãã¦å¤æ´ããã¨ä½æãå®¹æã§ããï¼
+
+âåæåå¦ç
+
+ä»¥ä¸ã®åæåã«ã¼ãã³ã«ã¿ã¼ã²ããæ¯ã®åæåãè¿½å ããï¼STM32Fã¿ã¼ã²ãã
+ä¾å­é¨ã§ã¯ãã­ã»ããµã¯ã­ãã¯(RCC)ãI/Oãã¼ãã®åæåã¯è¡ããªãããï¼ã¿
+ã¼ã²ãããã¼ãä¾å­é¨ã§åæåãè¡ããã¨ï¼
+
+  ã»target_initialize() : target_config.c
+    ã¿ã¼ã²ããä¾å­é¨ã®åæåï¼Cè¨èªï¼
+    
+  ã»_hardware_init_hook : target_support.S(å¿
+è¦ãªå ´å)
+    ä½ã¬ãã«ã®ã¿ã¼ã²ããä¾å­ã®åæå
+    ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®ä¸­ã§ï¼ã¡ã¢ãªã®åæåã®åã«å¼ã³åºããã
+
+âMakefile.target ã®è¨­å®é 
+ç®
+
+ãã¼ãå, ãããåï¼ã³ã¢åï¼éçºç°å¢åã®å®ç¾©
+ã»BOARD
+  ãã¼ãåãè¨­å®
+ã»CHIP
+  "stm32f"ãè¨­å®
+ã»PRC
+  "arm_m"ãè¨­å®
+ã»TOOL
+  "gcc"ãè¨­å®
+  
+GNUéçºç°å¢ã®ã¿ã¼ã²ããã¢ã¼ã­ãã¯ãã£ã®å®ç¾©  
+ã»GCC_TARGET
+  ä½¿ç¨ããã³ã³ãã¤ã©ã®ããªãã£ãã¯ã¹ãè¿½å ï¼
+  
+ã³ã³ãã¤ã«ãªãã·ã§ã³  
+ã»INCLUDES
+  ã¤ã³ã¯ã«ã¼ãæå®
+ã»COPTS
+  Cã³ã³ãã¤ã©ã¸ã®ãªãã·ã§ã³
+ã»LDFLAGS
+  ãªã³ã«ã¸ã®ãªãã·ã§ã³
+  æ¨æºã©ã¤ãã©ãªããªã³ã¯ããªãå ´åã¯"-nostdlib"ãæå®ããï¼
+  
+ã«ã¼ãã«ã«é¢ããå®ç¾©
+ã»KERNEL_DIR
+  ã«ã¼ãã«ãã£ã¬ã¯ããªã®æå®ï¼
+ã»KERNEL_ASMOBJS
+  ã«ã¼ãã«ã¢ã»ã³ãã©ãªãã¸ã§ã¯ãã®æå®
+ã»KERNEL_COBJS
+  ã«ã¼ãã«Cãªãã¸ã§ã¯ãã®æå®
+ã»KERNEL_CFLAGS
+  ã«ã¼ãã«ãªãã¸ã§ã¯ãã³ã³ãã¤ã«æã®Cã³ã³ãã¤ã©ã¸ã®ãªãã·ã§ã³
+  
+ã·ã¹ãã ãµã¼ãã¹ã«é¢ããå®ç¾©
+ã»SYSSVC_DIR
+  ã·ã¹ãã ãµã¼ãã¹ã®ãã£ã¬ã¯ããªã®æå®
+ã»SYSSVC_COBJS
+  ã·ã¹ãã ãµã¼ãã¹ã®ãªãã¸ã§ã¯ãã®æå®
+  stm32fãã­ã»ããµä¾å­é¨ã®USARTã®ãã©ã¤ããä½¿ç¨ããå ´åã¯ï¼usart.oãæ
+  å®ããï¼
+  
+ãªã³ã«ã¹ã¯ãªããã®å®ç¾©
+ã»LDSCRIPT
+  ä½¿ç¨ãããªã³ã«ã¹ã¯ãªãããæå®ããï¼
+  
+ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã«é¢ããå®ç¾©  
+ã»HIDDEN_OBJS
+  ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®æå®
+  ARM_Mãã­ã»ããµä¾å­é¨ã®ã¹ã¿ã¼ãã¢ããã«ã¼ãã³ãç¨ããå ´åã«ã¯ï¼
+  start.oãæå®ï¼
+
+ã»ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®çæã«ã¼ã«
+  ä»¥ä¸ã®å
+å®¹ãè¿½å ããï¼
+---------------------------------------------------------------
+$(HIDDEN_OBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(HIDDEN_OBJS:.o=.d): %.d: %.S
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
+		-O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+---------------------------------------------------------------
+
+ãããä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ã
+ã»ä»¥ä¸ã®å
+å®¹ãè¿½å ããï¼
+ include $(SRCDIR)/arch/$(PRC)_$(TOOL)/$(CHIP)/Makefile.chip
+      
+âtarget_config.h ã®è¨­å®é 
+ç®
+
+ã»DEFAULT_ISTKSZ
+  ãã£ãã©ã«ãã®éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ãµã¤ãº
+
+ã»SIL_DLY_TIM1/2
+  å¾®å°æéå¾
+ã¡ã®ããã®å®ç¾©
+
+ã»SIO_PORTID
+  ä½¿ç¨ããã·ãªã¢ã«ãã¼ãID
+  
+ã»IDLEå¦çã®å®ç¾©(ãªãã·ã§ã³)  
+  ã¢ã¤ãã«æã®å¦çãå¤æ´ãããå ´åã«å®ç¾©ï¼
+  
+ã»chip_config.h ã®ã¤ã³ã¯ã«ã¼ã
+  
+âtarget_config.c ã®è¨­å®é 
+ç®
+ã»åæåé¢æ°ã®å®ç¾©
+  target_initialize()
+  
+ã»çµäºå¦çé¢æ°ã®å®ç¾©
+  target_exit()
+  
+ã»ã·ã¹ãã ã­ã°ã®ä½ã¬ãã«åºåã®ããã®æå­åºå
+  target_fput_log()
+  
+âtarget_syssvc.h ã®è¨­å®é 
+ç®
+
+ã»TARGET_NAME
+  èµ·åã¡ãã»ã¼ã¸ã®ã¿ã¼ã²ããã·ã¹ãã å
+  
+ã»TNUM_PORT/TNUM_SIOP 
+  ã·ãªã¢ã«ãã¼ãæ°ã®å®ç¾©
+  
+ã»LOGTASK_PORTID
+  ã­ã°ã¿ã¹ã¯ãä½¿ç¨ãããã¼ãIDã®æå®
+
+ã»BPS_SETTING
+  ã³ã³ã½ã¼ã«ã«ä½¿ç¨ãããã¼ãã®ãã¼ã¬ã¼ã
+
+ã»chip_syssvc.h ã®ã¤ã³ã¯ã«ã¼ã
+
+âtarget_timer.h ã®è¨­å®é 
+ç®
+
+ã»TIMER_CLOCK
+  ã¿ã¤ãå¤ã®å
+é¨è¡¨ç¾ã¨ï¾ï¾ç§åä½ã¨ã®å¤æ
+  
+ã»INTPRI_TIMER
+  ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿åªå
+åº¦
+  
+ã»INTATR_TIMER
+  ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿å±æ§
+  
+âtarget_timer.cfg ã®è¨­å®é 
+ç®  
+
+ã»ã³ã¢ä¾å­é¨ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ãï¼
+  INCLUDE("arm_m_gcc/common/core_timer.cfg");
+  
+âtarget_stddef.h ã®è¨­å®é 
+ç®  
+ã»ã·ã¹ãã ç¥ç§°ã®å®ç¾©
+
+ã»chip_stddef.hã®ã¤ã³ã¯ã«ã¼ã
+
+âtarget_serial.h ã®è¨­å®é 
+ç®  
+ã»INTPRI_SIO
+  ã·ãªã¢ã«ãã¼ãã®åªå
+åº¦
+
+ã»INTATR_SIO
+  ã·ãªã¢ã«ãã¼ãã®å²ãè¾¼ã¿å±æ§
+
+âtarget_serial.cfgã®è¨­å®é 
+ç®
+ã»åæåã«ã¼ãã³ã®ç»é²
+  ATT_INI({ TA_NULL, 0, sio_initialize });
+  
+ã»å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®ç»é²
+  ATT_ISR({ TA_NULL, SIO_PORTID, INTNO_SIO, sio_isr, 1 });
+  
+ã»å²è¾¼ã¿è¦æ±ã©ã¤ã³ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³
+  CFG_INT(INTNO_SIO, { TA_ENAINT|INTATR_SIO, INTPRI_SIO });
+
+âtarget_kernel.h          
+ã»chip_kernel.hã®ã¤ã³ã¯ã«ã¼ã
+
+âtarget_check.tf
+ã»chip_check.t ã®ã¤ã³ã¯ã«ã¼ãï¼
+
+âtarget_cfg1_out.h
+ã»chip_cfg1_out.h ã®ã¤ã³ã¯ã«ã¼ã
+
+âtarget_asm.inc
+ã»chip_cfg1_out.hã®ã¤ã³ã¯ã«ã¼ã
+
+âtarget.tf
+ã»chip.tfã®ã¤ã³ã¯ã«ã¼ã
+
+âtarget_test.h
+ã»STACK_SIZE(ãªãã·ã§ã³)
+  ãµã³ãã«ãã­ã°ã©ã ã®ãã£ãã©ã«ãã®ã¹ã¿ãã¯ãµã¤ãºã®å¤æ´ï¼
+  
+âå¤æ´å±¥æ­´
+2015/11/14
+ã»chip_sil.h/stm32f.h
+  ã»core_sil.hã§TBITW_IPRIãåç
+§ããããï¼å®ç¾©å ´æãstm32f.hãã
+    chip_sio.hã«ç§»åï¼
+
+2015/11/04
+ã»Makefile.chip
+  ã»ã¢ã¼ã­ãã¯ãã£ã¼ãæå®ããããã«å¤æ´
+
+2012/10/17
+ã»1.8.0å¯¾å¿ã®ããï¼char_t ã®ç®æãä»ã®åã«å¤æ´ï¼
+
+2012/06/18
+ã»xxx_stddef.h ãç¸å¯¾ãã¹ã§ã¯ãªããã¡ã¤ã«åã®ã¿ã§æå®ããããã«å¤æ´ï¼
+  ã©ã®ãã¡ã¤ã«ãç¨ãããã¯ä»ã®ãã¡ã¤ã«ã¨åæ§ã«ã³ã³ãã¤ã©ã¸ã®ã¤ã³ã¯ã«ã¼
+  ãæå®ã®é åºã¨ããï¼
+
+2012/02/23
+ã»uart.h
+  ã»SIO_PORTIDãSIO_PORIDã¨è¨è¿°ãã¦ããåé¡ãä¿®æ­£ï¼
+
+2011/11/28
+ã»æ°è¦è¿½å  
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/stm32f.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/stm32f.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/stm32f.h	(revision 136)
@@ -0,0 +1,278 @@
+/*
+ *  TOPPERS/JSP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Just Standard Profile Kernel
+ *
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼Free Software Foundation ã«ãã£ã¦å
+¬è¡¨ããã¦ãã 
+ *  GNU General Public License ã® Version 2 ã«è¨è¿°ããã¦ããæ¡ä»¶ãï¼ä»¥
+ *  ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§ã¢ï¼æ¬ã½ããã¦ã§
+ *  ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼
+ *  å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãåå©ç¨å¯è½ãªãã¤ããªã³ã¼ãï¼ãªã­ã±ã¼ã¿ãã«ãªã
+ *      ã¸ã§ã¯ããã¡ã¤ã«ãã©ã¤ãã©ãªãªã©ï¼ã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼å©ç¨
+ *      ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼
+ *      ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãåå©ç¨ä¸å¯è½ãªãã¤ããªã³ã¼ãã®å½¢ã¾ãã¯æ©å¨ã«çµ
+ *      ã¿è¾¼ãã å½¢ã§å©ç¨ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºãããã¨ï¼
+ *    (a) å©ç¨ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½
+ *        æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) å©ç¨ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼ä¸è¨èä½æ¨©è
+ã«å ±åãã
+ *        ãã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ãå
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã¯ï¼
+ *  æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ãã®é©ç¨å¯è½æ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ã
+ *  ãªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çããã
+ *  ããªãæå®³ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+#ifndef TOPPERS_ST32F_H
+#define TOPPERS_ST32F_H
+
+#include <sil.h>
+
+/*
+ * ARM-Mä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ã
+ */
+#include "arm_m_gcc/common/arm_m.h"
+
+/*
+ *  å²è¾¼ã¿çªå·ã®æå¤§å¤
+ */
+#define TMAX_INTNO   (16 + 42)
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãããå¹
+ä¸­ã®ãµãåªå
+åº¦ã®ãããå¹
+
+ */
+#define TBITW_SUBIPRI  0
+
+/*
+ *  å²è¾¼ã¿ãã¯ã¿çªå·å®ç¾©
+ */
+#define IRQ_VECTOR_USART1		(16 + 37)
+#define IRQ_VECTOR_USART2		(16 + 38)
+
+
+/*
+ * ããªãã§ã©ã«ã¬ã¸ã¹ã¿å®ç¾©
+ */
+#define PERIPH_REG_BASE			(0x40000000UL)
+#define SRAM_BASE				(0x20000000UL)
+
+#define APB1_PERIPH				(PERIPH_REG_BASE)
+#define APB2_PERIPH				(PERIPH_REG_BASE + 0x10000)
+#define AHB_PERIPH				(PERIPH_REG_BASE + 0x20000)
+
+/* BUS:APB1 */
+#define TIM2_BASE				(APB1_PERIPH)
+#define TIM3_BASE				(APB1_PERIPH + 0x400)
+#define TIM4_BASE				(APB1_PERIPH + 0x800)
+#define RTC_BASE				(APB1_PERIPH + 0x2800)
+#define WWDG_BASE				(APB1_PERIPH + 0x2C00)
+#define IWDG_BASE				(APB1_PERIPH + 0x3000)
+#define SPI2_BASE				(APB1_PERIPH + 0x3800)
+#define USART2_BASE				(APB1_PERIPH + 0x4400)
+#define USART3_BASE				(APB1_PERIPH + 0x4800)
+#define I2C1_BASE				(APB1_PERIPH + 0x5400)
+#define I2C2_BASE				(APB1_PERIPH + 0x5800)
+#define USB_BASE				(APB1_PERIPH + 0x5C00)
+#define CAN_BASE				(APB1_PERIPH + 0x6400)
+#define BKP_BASE				(APB1_PERIPH + 0x6C00)
+#define PWR_BASE				(APB1_PERIPH + 0x7000)
+
+/* BUS:APB2 */
+#define AFIO_BASE				(APB2_PERIPH)
+#define EXTI_BASE				(APB2_PERIPH + 0x400)
+#define GPIOA_BASE				(APB2_PERIPH + 0x800)
+#define GPIOB_BASE				(APB2_PERIPH + 0xC00)
+#define GPIOC_BASE				(APB2_PERIPH + 0x1000)
+#define GPIOD_BASE				(APB2_PERIPH + 0x1400)
+#define GPIOE_BASE				(APB2_PERIPH + 0x1800)
+#define ADC1_BASE				(APB2_PERIPH + 0x2400)
+#define ADC2_BASE				(APB2_PERIPH + 0x2800)
+#define TIM1_BASE				(APB2_PERIPH + 0x2C00)
+#define SPI1_BASE				(APB2_PERIPH + 0x3000)
+#define USART1_BASE				(APB2_PERIPH + 0x3800)
+
+/* BUS:AHB */
+#define DMA_BASE				(AHB_PERIPH)
+#define RCC_BASE				(AHB_PERIPH + 0x1000)
+#define FLASH_BASE				(AHB_PERIPH + 0x2000)
+
+/* System Control space */
+#define SCS_BASE				(0xE000E000)
+#define SYSTM_BASE				(SCS_BASE + 0x0010)
+#define NVIC_BASE				(SCS_BASE + 0x0100)
+#define SYSCB_BASE				(SCS_BASE + 0x0D00)
+
+/* RCC */
+#define RCC_CR					(RCC_BASE)
+#define RCC_CFGR				(RCC_BASE + 0x04)
+#define RCC_CIR					(RCC_BASE + 0x08)
+#define RCC_APB2RSTR			(RCC_BASE + 0x0C)
+#define RCC_APB1RSTR			(RCC_BASE + 0x10)
+#define RCC_AHBENR				(RCC_BASE + 0x14)
+#define RCC_APB2ENR				(RCC_BASE + 0x18)
+#define RCC_APB1ENR				(RCC_BASE + 0x1C)
+#define RCC_BDCR				(RCC_BASE + 0x20)
+#define RCC_CSR					(RCC_BASE + 0x24)
+
+
+/* NVIC */
+#define NVIC_ENAVLE_REG(ch)		(NVIC_BASE + ((ch) >> 5))
+#define NVIC_DISABLE_REG(ch)	(NVIC_BASE + 0x80 + ((ch) >> 5))
+#define NVIC_SET_PEND_REG(ch)	(NVIC_BASE + 0x100 + ((ch) >> 5))
+#define NVIC_CLEAR_PEND_REG(ch)	(NVIC_BASE + 0x180 + ((ch) >> 5))
+#define NVIC_ACTIVE_REG(ch)		(NVIC_BASE + 0x200 + ((ch) >> 5))
+#define NVIC_PRIO_REG(ch)		(NVIC_BASE + 0x300 + ((ch) >> 2))
+
+/* GPIOx */
+#define GPIO_CRL(x)				(x)
+#define GPIO_CRH(x)				((x) + 0x04)
+#define GPIO_IDR(x)				((x) + 0x08)
+#define GPIO_ODR(x)				((x) + 0x0C)
+#define GPIO_BSRR(x)			((x) + 0x10)
+#define GPIO_BRR(x)				((x) + 0x14)
+#define GPIO_LCKR(x)			((x) + 0x18)
+
+/* AFIO */
+#define AFIO_EVCR				(AFIO_BASE)
+#define AFIO_MAPR				(AFIO_BASE + 0x04)
+#define AFIO_EXTICR1			(AFIO_BASE + 0x08)
+#define AFIO_EXTICR2			(AFIO_BASE + 0x0C)
+#define AFIO_EXTICR3			(AFIO_BASE + 0x10)
+#define AFIO_EXTICR4			(AFIO_BASE + 0x14)
+
+/* FLASH */
+#define FLASH_ACR				(FLASH_BASE)
+
+/* RCCã¬ã¸ã¹ã¿å®ç¾© */
+#define CR_PLL_RDY				(0x02000000)
+#define CR_PLL_ON				(0x01000000)
+#define CR_HSE_RDY				(0x00020000)
+#define CR_HSE_ON				(0x00010000)
+#define CR_HSI_RDY				(0x00000002)
+#define CR_HSI_ON				(0x00000001)
+#define CFGR_PLLMUL_MASK		(0x003C0000)
+#define CFGR_PLL_XTPRE			(0x00020000)
+#define CFGR_PLL_SRC			(0x00010000)
+#define CFGR_HPRE_MASK			(0x000000F0)
+#define CFGR_PPRE2_MASK			(0x00003800)
+#define CFGR_PPRE1_MASK			(0x00000700)
+#define CFGR_SWS_MASK			(0x0000000C)
+#define CFGR_SW_MASK			(0x00000003)
+#define CFGR_SW_PLL				(0x02)
+#define APB1ENR_USART2_EN		(0x00020000)
+#define APB2ENR_ADC3_EN			(0x8000)
+#define APB2ENR_USART1_EN		(0x4000)
+#define APB2ENR_TIM8_EN			(0x2000)
+#define APB2ENR_SPI1_EN			(0x1000)
+#define APB2ENR_TIM1_EN			(0x0800)
+#define APB2ENR_ADC2_EN			(0x0400)
+#define APB2ENR_ADC1_EN			(0x0200)
+#define APB2ENR_IOPG_EN			(0x0100)
+#define APB2ENR_IOPF_EN			(0x0080)
+#define APB2ENR_IOPE_EN			(0x0040)
+#define APB2ENR_IOPD_EN			(0x0020)
+#define APB2ENR_IOPC_EN			(0x0010)
+#define APB2ENR_IOPB_EN			(0x0008)
+#define APB2ENR_IOPA_EN			(0x0004)
+#define APB2ENR_AFIO_EN			(0x0001)
+#define AHBENR_SDIO_EN			(0x0400)
+#define AHBENR_FSMC_EN			(0x0100)
+#define AHBENR_CRCE_EN			(0x0040)
+#define AHBENR_FLITF_EN			(0x0010)
+#define AHBENR_SRAM_EN			(0x0004)
+#define AHBENR_DMA_EN			(0x0001)
+
+/* FLASHã¬ã¸ã¹ã¿å®ç¾© */
+#define ACR_PRFTBE				(0x10)
+#define ACR_LATENCY_MASK		(0x07)
+#define ACR_LATENCY_ZERO		(0x00)
+#define ACR_LATENCY_ONE			(0x01)
+#define ACR_LATENCY_TWO			(0x02)
+
+/* GPIOxã¬ã¸ã¹ã¿å®ç¾© */
+#define CNF_IN_ANALOG			(0x00)
+#define CNF_IN_FLOATING			(0x01)
+#define CNF_IN_PULL				(0x02)
+#define CNF_OUT_GP_PP			(0x00)
+#define CNF_OUT_GP_OD			(0x01)
+#define CNF_OUT_AF_PP			(0x02)
+#define CNF_OUT_AF_OD			(0x03)
+#define MODE_INPUT				(0x00)
+#define MODE_OUTPUT_10MHZ		(0x01)
+#define MODE_OUTPUT_2MHZ		(0x02)
+#define MODE_OUTPUT_50MHZ		(0x03)
+
+#define CR_MODE_MASK(x)			(0x03 << ((x) << 2))
+#define CR_CNF_MASK(x)			(0x0C << ((x) << 2))
+#define CR_MODE(x,v)			(((v) & 0x03) << ((x) << 2))
+#define CR_CNF(x,v)				((((v) << 2) & 0x0C) << ((x) << 2))
+
+/* AFIOã¬ã¸ã¹ã¿å®ç¾© */
+#define MAPR_USART2_REMAP		(0x0008)
+
+#ifndef TOPPERS_MACRO_ONLY
+/*
+ * GPIOã¬ã¸ã¹ã¿æä½é¢æ°
+ */
+Inline void
+set_cr_mode(uint32_t reg, uint_t p, int_t v)
+{
+	if (p < 8) {
+		sil_andw((void*)GPIO_CRL(reg), ~CR_MODE_MASK(p));
+		sil_orw((void*)GPIO_CRL(reg), CR_MODE(p, v));
+	} else if (8 <= p && p < 16) {
+		sil_andw((void*)GPIO_CRH(reg), ~CR_MODE_MASK(p - 8));
+		sil_orw((void*)GPIO_CRH(reg), CR_MODE(p - 8, v));
+	}
+}
+
+Inline void
+set_cr_cnf(uint32_t reg, uint_t p, int_t v)
+{
+	if (p < 8) {
+		sil_andw((void*)GPIO_CRL(reg), ~CR_CNF_MASK(p));
+		sil_orw((void*)GPIO_CRL(reg), CR_CNF(p, v));
+	} else if (8 <= p && p < 16) {
+		sil_andw((void*)GPIO_CRH(reg), ~CR_CNF_MASK(p - 8));
+		sil_orw((void*)GPIO_CRH(reg), CR_CNF(p - 8, v));
+	}
+}
+
+Inline void
+set_port_pull(uint32_t reg, uint_t p, bool_t up)
+{
+	if (up) {
+		sil_wrw_mem((void*)GPIO_BSRR(reg), 0x01 << p);
+	} else {
+		sil_wrw_mem((void*)GPIO_BRR(reg), 0x01 << p);
+	}
+}
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_ST32F_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/usart.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/usart.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/usart.c	(revision 136)
@@ -0,0 +1,320 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2007,2011,2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+/*
+ * ã·ãªã¢ã«ãã©ã¤ãï¼STM32F USARTç¨ï¼
+ */
+
+#include <kernel.h>
+#include <sil.h>
+#include "usart.h"
+#include "target_syssvc.h"
+
+/*
+ * ã¬ã¸ã¹ã¿è¨­å®å¤
+ */
+#define PORT2SIOPID(x)	((x) + 1)
+#define INDEX_PORT(x)	((x) - 1)
+#define GET_SIOPCB(x)	(&siopcb_table[INDEX_PORT(x)])
+
+/*
+ * USARTã¬ã¸ã¹ã¿å®ç¾©
+ */
+#define USART_SR(x)		(x)
+#define USART_DR(x)		(x + 0x04)
+#define USART_BRR(x)	(x + 0x08)
+#define USART_CR1(x)	(x + 0x0C)
+#define USART_CR2(x)	(x + 0x10)
+#define USART_CR3(x)	(x + 0x14)
+#define USART_GTPR(x)	(x + 0x18)
+
+#define SR_TXE			(0x0080)
+#define SR_RXNE			(0x0020)
+#define SR_ORE			(0x0008)
+#define SR_FE			(0x0002)
+#define SR_PE			(0x0001)
+#define CR1_UE			(0x2000)
+#define CR1_TXEIE		(0x0080)
+#define CR1_RXNEIE		(0x0020)
+#define CR1_TE			(0x0008)
+#define CR1_RE			(0x0004)
+#define CR3_EIE			(0x0001)
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãã®ç®¡çãã­ãã¯
+ */
+struct sio_port_control_block {
+	ID port;
+	uint32_t reg;
+	intptr_t exinf;
+};
+
+/*
+ * ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã¨ãªã¢
+ */
+SIOPCB siopcb_table[TNUM_PORT];
+
+static const uint32_t sioreg_table[TNUM_PORT] = {
+	USART1_BASE,
+#if (TNUM_PORT >= 2)
+	USART2_BASE
+#endif
+};
+
+Inline bool_t
+sio_putready(SIOPCB* siopcb)
+{
+	return (sil_rew_mem((void*)USART_SR(siopcb->reg)) & SR_TXE) != 0;
+}
+
+Inline bool_t
+sio_getready(SIOPCB* siopcb)
+{
+	return (sil_rew_mem((void*)USART_SR(siopcb->reg)) & SR_RXNE) != 0;
+}
+
+/*
+ *  ã¿ã¼ã²ããã®ã·ãªã¢ã«åæå
+ */
+void
+usart_init(ID siopid)
+{
+	uint32_t tmp, usartdiv, fraction;
+	uint32_t reg = sioreg_table[INDEX_PORT(siopid)];
+	uint32_t src_clock;
+
+	/* USARTã®ç¡å¹å */
+	sil_andw((void*)USART_CR1(reg), ~CR1_UE);
+
+	/* 1STOP BIT */
+	sil_wrw_mem((void*)USART_CR2(reg), 0);
+
+	/* 1START BIT, 8DATA bits, Parityãªã */
+	sil_wrw_mem((void*)USART_CR1(reg), 0);
+
+	/* CR3åæå */
+	sil_wrw_mem((void*)USART_CR3(reg), 0);
+
+	/* éä¿¡éåº¦è¨­å® */
+	if (siopid == 1) {
+		/* USART1ã®ã¿PCLK2ãä½¿ç¨ãã */
+		src_clock = PCLK2_CLOCK;
+	} else {
+		src_clock = PCLK1_CLOCK;
+	}
+	tmp = (1000 * (src_clock / 100)) / ((BPS_SETTING / 100) * 16);
+	usartdiv = (tmp / 1000) << 4;
+	fraction = tmp - ((usartdiv >> 4) * 1000);
+	fraction = ((16 * fraction) + 500) / 1000;
+	usartdiv |= (fraction & 0x0F);
+	sil_wrw_mem((void*)USART_BRR(reg), usartdiv);
+
+	/* éåä¿¡ã®æå¹åãã¨ã©ã¼å²è¾¼ã¿ã®æå¹å */
+	sil_orw((void*)USART_CR1(reg), CR1_RE | CR1_TE);
+	sil_orw((void*)USART_CR3(reg), CR3_EIE);
+
+	/* USARTã®æå¹å */
+	sil_orw((void*)USART_CR1(reg), CR1_UE);
+}
+
+/*
+ *  ã¿ã¼ã²ããã®ã·ãªã¢ã«çµäº
+ */
+static void
+usart_term(ID siopid)
+{
+	uint32_t reg = sioreg_table[INDEX_PORT(siopid)];
+
+	/* USARTã®ç¡å¹å */
+	sil_andw((void*)USART_CR1(reg),  ~CR1_UE);
+}
+
+/*
+ *  SIOåæå
+ */
+void
+sio_initialize(intptr_t exinf)
+{
+	int i;
+
+	for (i = 0; i < TNUM_PORT; i++) {
+		siopcb_table[i].port = i;
+		siopcb_table[i].reg = sioreg_table[i];
+		siopcb_table[i].exinf = 0;
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«ãªã¼ãã³
+ */
+SIOPCB
+*sio_opn_por(ID siopid, intptr_t exinf)
+{
+	SIOPCB* siopcb;
+
+	if (siopid > TNUM_PORT) {
+		return NULL;
+	}
+
+	siopcb = GET_SIOPCB(siopid);
+	siopcb->exinf = exinf;
+
+	usart_init(siopid);
+
+	return siopcb;
+}
+
+/*
+ *  ã·ãªã¢ã«ã¯ã­ã¼ãº
+ */
+void
+sio_cls_por(SIOPCB *p_siopcb)
+{
+	usart_term(PORT2SIOPID(p_siopcb->port));
+}
+
+/*
+ *  å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³
+ */
+void
+sio_isr(intptr_t exinf)
+{
+	SIOPCB* siopcb = GET_SIOPCB(exinf);
+
+	if (sio_putready(siopcb)) {
+		sio_irdy_snd(siopcb->exinf);
+	}
+	if (sio_getready(siopcb)) {
+		sio_irdy_rcv(siopcb->exinf);
+	}
+}
+
+/*
+ *  1æå­éä¿¡
+ */
+bool_t
+sio_snd_chr(SIOPCB *siopcb, char c)
+{
+	if (sio_putready(siopcb)) {
+		sil_wrw_mem((void*)USART_DR(siopcb->reg), c);
+
+		return true;
+	}
+
+	return false;
+}
+
+/*
+ *  1æå­åä¿¡
+ */
+int_t
+sio_rcv_chr(SIOPCB *siopcb)
+{
+	int_t c = -1;
+
+	if (sio_getready(siopcb)) {
+		c = sil_rew_mem((void*)USART_DR(siopcb->reg)) & 0xFF;
+	}
+
+	return c;
+}
+
+/*
+ *  ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+void
+sio_ena_cbr(SIOPCB *siopcb, uint_t cbrtn)
+{
+	switch (cbrtn) {
+	case SIO_RDY_SND:
+		sil_orw((void*)USART_CR1(siopcb->reg), CR1_TXEIE);
+		break;
+	case SIO_RDY_RCV:
+		sil_orw((void*)USART_CR1(siopcb->reg), CR1_RXNEIE);
+		break;
+	default:
+		break;
+	}
+}
+
+/* 
+ *  ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+void
+sio_dis_cbr(SIOPCB *siopcb, uint_t cbrtn)
+{
+	switch (cbrtn) {
+	case SIO_RDY_SND:
+		sil_andw((void*)USART_CR1(siopcb->reg), ~CR1_TXEIE);
+		break;
+	case SIO_RDY_RCV:
+		sil_andw((void*)USART_CR1(siopcb->reg), ~CR1_RXNEIE);
+		break;
+	default:
+		break;
+	}
+}
+
+/*
+ *  1æå­åºåï¼ãã¼ãªã³ã°ã§ã®åºåï¼
+ */
+void
+sio_pol_snd_chr(char c, ID siopid)
+{
+	uint32_t reg = sioreg_table[INDEX_PORT(siopid)];
+
+	sil_wrw_mem((void*)USART_DR(reg), c);
+
+	while ((sil_rew_mem((void*)USART_SR(reg)) & SR_TXE) == 0) ;
+}
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/usart.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/usart.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f/usart.h	(revision 136)
@@ -0,0 +1,149 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2007,2011,2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ */
+
+/*
+ *  ã·ãªã¢ã«I/Oããã¤ã¹ï¼SIOï¼ãã©ã¤ãï¼STM32F USARTç¨ï¼
+ */
+
+#ifndef TOPPERS_USART_H
+#define TOPPERS_USART_H
+
+#include "stm32f.h"
+
+/*
+ *  SIOã®å²è¾¼ã¿ãã¯ã¿çªå·
+ */
+#if (SIO_PORTID == 1)
+#define INHNO_SIO		IRQ_VECTOR_USART1
+#define INTNO_SIO		IRQ_VECTOR_USART1
+#elif (SIO_PORTID == 2)
+#define INHNO_SIO		IRQ_VECTOR_USART2
+#define INTNO_SIO		IRQ_VECTOR_USART2
+#endif
+
+/*
+ *  ã³ã¼ã«ããã¯ã«ã¼ãã³ã®è­å¥çªå·
+ */
+#define SIO_RDY_SND    1U        /* éä¿¡å¯è½ã³ã¼ã«ããã¯ */
+#define SIO_RDY_RCV    2U        /* åä¿¡éç¥ã³ã¼ã«ããã¯ */
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®å®ç¾©
+ */
+typedef struct sio_port_control_block    SIOPCB;
+
+/*
+ *  SIOåæå
+ */
+extern void sio_initialize(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«ãªã¼ãã³
+ */
+extern SIOPCB *sio_opn_por(ID siopid, intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«ã¯ã­ã¼ãº
+ */
+extern void sio_cls_por(SIOPCB *p_siopcb);
+
+/*
+ *  å²è¾¼ã¿ãã³ãã©
+ */
+extern void sio_isr(intptr_t exinf);
+
+/*
+ *  1æå­éä¿¡
+ */
+extern bool_t sio_snd_chr(SIOPCB *siopcb, char c);
+
+/*
+ *  1æå­åä¿¡
+ */
+extern int_t sio_rcv_chr(SIOPCB *siopcb);
+
+/*
+ *  ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+extern void sio_ena_cbr(SIOPCB *siopcb, uint_t cbrtn);
+
+/* 
+ *  ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+extern void sio_dis_cbr(SIOPCB *siopcb, uint_t cbrtn);
+
+/*
+ *  éä¿¡å¯è½ã³ã¼ã«ããã¯
+ */
+extern void sio_irdy_snd(intptr_t exinf);
+
+/*
+ *  åä¿¡éç¥ã³ã¼ã«ããã¯
+ */
+extern void sio_irdy_rcv(intptr_t exinf);
+
+/*
+ *  1æå­éä¿¡ï¼ãã¼ãªã³ã°ã§ã®åºåï¼
+ */
+extern void sio_pol_snd_chr(char c, ID siopid);
+
+/*
+ *  ã¿ã¼ã²ããã®ã·ãªã¢ã«åæå
+ */
+extern void usart_init(ID siopid);
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_USART_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/MANIFEST	(revision 136)
@@ -0,0 +1,18 @@
+PACKAGE asp_arch_stm32f4xx_gcc
+
+MANIFEST
+Makefile.chip
+cmsis_f4.h
+stm32f4xx.h
+chip_config.c
+chip_config.h
+chip_kernel.h
+chip_rename.def
+chip_rename.h
+chip_sil.h
+chip_timer.cfg
+chip_timer.h
+chip_unrename.h
+chip_serial.c
+chip_serial.cfg
+chip_serial.h
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/Makefile.chip
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/Makefile.chip	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/Makefile.chip	(revision 136)
@@ -0,0 +1,61 @@
+#
+#		Makefile ã®ã¿ã¼ã²ããä¾å­é¨ï¼stm32f4xxç¨ï¼
+#
+
+#
+#  ã³ã³ãã¤ã«ãªãã·ã§ã³
+#
+INCLUDES := $(INCLUDES) -I$(SRCDIR)/arch/$(PRC)_$(TOOL)/$(CHIP)
+COPTS := $(COPTS) -mlittle-endian -nostartfiles
+LDFLAGS := $(LDFLAGS) -mlittle-endian
+LIBS := $(LIBS)
+
+ifeq ($(CHIP), stm32f4xx)
+	CORE_TYPE = CORTEX_M4
+endif
+
+#
+#  ã«ã¼ãã«ã«é¢ããå®ç¾©
+#
+KERNEL_DIR := $(KERNEL_DIR) $(SRCDIR)/arch/$(PRC)_$(TOOL)/$(CHIP)
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS)
+KERNEL_COBJS := $(KERNEL_COBJS) core_timer.o chip_config.o
+
+#
+#  ã·ã¹ãã ãµã¼ãã¹ã«é¢ããå®ç¾©
+#
+SYSSVC_DIR := $(SYSSVC_DIR) $(SRCDIR)/arch/$(PRC)_$(TOOL)/$(CHIP)
+SYSSVC_COBJS := $(SYSSVC_COBJS) chip_serial.o
+
+#
+#  ãªã³ã«ã¹ã¯ãªããã®å®ç¾©
+#
+ifeq ($(DBGENV),RAM)
+LDSCRIPT = $(SRCDIR)/target/$(BOARD)/stm32f4xx_ram.ld
+COPTS := $(COPTS) -DTOPPERS_RAM_EXEC
+else
+LDSCRIPT = $(SRCDIR)/target/$(BOARD)/stm32f4xx_rom.ld
+endif
+
+#
+#  ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã«é¢ããå®ç¾©
+#
+#  stm32f4xx_xxx.ldã«ãSTARTUP(start.o)ããè¨è¿°ããããï¼
+#  ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®ååãHIDDEN_OBJSã«å®ç¾©ããï¼
+#  ã¾ãï¼LDFLAGSã«-nostdlibãè¿½å ãã¦ããï¼
+#
+HIDDEN_OBJS = start.o
+
+$(HIDDEN_OBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(HIDDEN_OBJS:.o=.d): %.d: %.S
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
+		-O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+
+LDFLAGS := -nostdlib $(LDFLAGS)
+
+#
+#  ã³ã¢ä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ã
+#
+include $(SRCDIR)/arch/$(PRC)_$(TOOL)/common/Makefile.core
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_config.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_config.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_config.c	(revision 136)
@@ -0,0 +1,118 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: chip_config.c 698 2015-07-27 22:51:58Z roi $
+ */
+
+/*
+ * ã¿ã¼ã²ããä¾å­ã¢ã¸ã¥ã¼ã«ï¼stm32f4xxç¨ï¼
+ */
+#include "kernel_impl.h"
+#include <sil.h>
+
+#include "stm32f4xx.h"
+#include "chip_serial.h"
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®åæå
+ */
+void
+target_initialize(void){
+
+	/*
+	 * ã³ã¢ä¾å­ã®åæå
+	 */
+	core_initialize();
+
+	/*
+	 *  ããã¼åºåç¨ã®ã·ãªã¢ã«åæå
+	 */
+	chip_uart_init(SIO_PORTID);
+
+	/*
+	 *  ã¿ã¤ãã®å²è¾¼ã¿ã¬ãã«ã®è¨­å®
+	 */
+	sil_wrb_mem((uint8_t *)(TADR_SCB_BASE+TOFF_SCB_SHP15), (14 << (8 - 4)) & 0xff);
+} 
+
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®çµäºå¦ç
+ */
+void
+target_exit(void)
+{
+	/*
+	 *  ã³ã¢ä¾å­ã®çµäºå¦ç
+	 */
+	core_terminate();
+
+	/*
+	 *  éçºç°å¢ä¾å­ã®çµäºå¦ç
+	 */
+	while(1);
+}
+
+
+/*
+ *  ã·ã¹ãã ã­ã°ã®ä½ã¬ãã«åºåã®ããã®æå­åºå
+ */
+void
+target_fput_log(int8_t c)
+{
+	if (c == '\n') {
+		sio_pol_snd_chr('\r', SIO_PORTID);
+	}
+	sio_pol_snd_chr(c, SIO_PORTID);
+}
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_config.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_config.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_config.h	(revision 136)
@@ -0,0 +1,113 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_config.h 698 2015-07-27 22:50:32Z roi $
+ */
+
+/*
+ *  ãããä¾å­ã¢ã¸ã¥ã¼ã«ï¼stm32f4xxç¨ï¼
+ *
+ *  ã«ã¼ãã«ã®ã¿ã¼ã²ããä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ï¼kernel_impl.hã®ã¿ã¼
+ *  ã²ããä¾å­é¨ã®ä½ç½®ä»ãã¨ãªãï¼
+ */
+
+#ifndef TOPPERS_CHIP_CONFIG_H
+#define TOPPERS_CHIP_CONFIG_H
+
+/*
+ *  ã¿ã¼ã²ããä¾å­é¨ã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
+ */
+#include "stm32f4xx.h"
+
+/*
+ *  RAMå®è¡ããå ´åãQEMUå®è¡æROMãããã°æã¯MSPãåæåãã
+ *  å¿
+è¦ããããã,ã¹ã¿ã¼ãã¢ããã«ã¼ãã³ã§MSPãåæåããï¼ 
+ */
+#define INIT_MSP
+
+/*
+ *  ããã©ã«ãã®éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã®å®ç¾©
+ */
+#define DEFAULT_ISTKSZ      (0x1000U)   /* 4KByte */
+
+/*
+ *  ä½¿ç¨ããã·ãªã¢ã«ãã¼ãID
+ */
+#ifndef SIO_PORTID
+#define SIO_PORTID		(1)
+#endif /* SIO_PORTID */
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã¿ã¼ã²ããã·ã¹ãã ä¾å­ã®åæå
+ */
+extern void	target_initialize(void);
+
+/*
+ *  ã¿ã¼ã²ããã·ã¹ãã ã®çµäº
+ *
+ *  ã·ã¹ãã ãçµäºããæã«ä½¿ãï¼
+ */
+extern void	target_exit(void) NoReturn;
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ã³ã¢ä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARM-Mç¨ï¼
+ */
+#include "core_config.h"
+
+#endif /* TOPPERS_CHIP_CONFIG_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_kernel.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_kernel.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_kernel.h	(revision 136)
@@ -0,0 +1,98 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: chip_kernel.h 698 2015-07-27 22:49:30Z roi $
+ */
+
+/*
+ *  kernel.hã®ãããä¾å­é¨ï¼stm32f4xxç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼kernel.hã§ã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡
+ *  ã¤ã«ããç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ã
+ *  ããåã«ï¼t_stddef.hãã¤ã³ã¯ã«ã¼ããããã®ã§ï¼ãããã«ä¾å­ãã¦ãã
+ *  ãï¼
+ */
+
+#ifndef TOPPERS_CHIP_KERNEL_H
+#define TOPPERS_CHIP_KERNEL_H
+
+/*
+ *  ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿åªå
+åº¦ã®ç¯å²
+ *
+ *  TMIN_INTPRIã®å®ç¾©ãå¤æ´ãããã¨ã§ï¼ãã®ã¬ãã«ãããé«ãå²è¾¼ã¿åªå
+åº¦
+ *  ãæã¤ãã®ãã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã¨ããããå¤æ´ã§ããï¼
+ */
+#define TMIN_INTPRI		(-15)		/* å²è¾¼ã¿åªå
+åº¦ã®æå°å¤ï¼æé«å¤ï¼*/
+
+/*
+ *  ãµãã¼ãããæ©è½ã®å®ç¾©
+ */
+#define TOPPERS_TARGET_SUPPORT_GET_UTM	/* get_utmããµãã¼ããã */
+
+/*
+ *  ã¿ã¤ã ãã£ãã¯ã®å®ç¾©
+ */
+#define TIC_NUME   1U            /* ã¿ã¤ã ãã£ãã¯ã®å¨æã®åå­ */
+#define TIC_DENO   1U            /* ã¿ã¤ã ãã£ãã¯ã®å¨æã®åæ¯ */
+
+/*
+ *  ã³ã¢ä¾å­ã§å
+±éãªå®ç¾©
+ */
+#include "arm_m_gcc/common/core_kernel.h"
+
+#endif /* TOPPERS_CHIP_KERNEL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_rename.def
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_rename.def	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_rename.def	(revision 136)
@@ -0,0 +1,5 @@
+INCLUDE "arm_m_gcc/common/core"
+
+#chip_config.c
+target_initialize
+target_exit
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_rename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_rename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_rename.h	(revision 136)
@@ -0,0 +1,26 @@
+/* This file is generated from target_rename.def by genrename. */
+
+#ifndef TOPPERS_CHIP_RENAME_H
+#define TOPPERS_CHIP_RENAME_H
+
+
+/*
+ * chip_config.c
+ */
+#define target_initialize			_kernel_target_initialize
+#define target_exit					_kernel_target_exit
+
+#ifdef TOPPERS_LABEL_ASM
+
+
+/*
+ * chip_config.c
+ */
+#define _target_initialize			__kernel_target_initialize
+#define _target_exit				__kernel_target_exit
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "arm_m_gcc/common/core_rename.h"
+
+#endif /* TOPPERS_CHIP_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_serial.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_serial.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_serial.c	(revision 136)
@@ -0,0 +1,589 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: chip_serial.c 698 2015-07-27 22:47:16Z roi $
+ */
+
+/*
+ *  ã·ãªã¢ã«I/Oããã¤ã¹ï¼SIOï¼ãã©ã¤ãï¼stm32f4xxç¨ï¼
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include "target_stddef.h"
+#include "target_serial.h"
+#include "target_syssvc.h"
+
+/*
+ * ã¬ã¸ã¹ã¿è¨­å®å¤
+ */
+#define PORT2SIOPID(x)	((x) + 1)
+#define INDEX_PORT(x)	((x) - 1)
+#define GET_SIOPCB(x)	(&siopcb_table[INDEX_PORT(x)])
+
+/*
+ *  GPIO Configuration Mode enumeration
+ */
+#define GPIO_Mode_IN    0x0					/* GPIO Input Mode */
+#define GPIO_Mode_OUT   GPIO_MODER_MODER0	/* GPIO Output Mode */
+#define GPIO_Mode_AF    GPIO_MODER_MODER1	/* GPIO Alternate function Mode */
+#define GPIO_Mode_AN    GPIO_MODER_MODER2	/* GPIO Analog Mode */
+
+/*
+ *  GPIO Output Maximum frequency enumeration
+ */
+#define GPIO_Speed_2MHz   0x0						/* Low speed */
+#define GPIO_Speed_25MHz  GPIO_OSPEEDER_OSPEEDR0	/* Medium speed */
+#define GPIO_Speed_50MHz  GPIO_OSPEEDER_OSPEEDR1	/* Fast speed */
+#define GPIO_Speed_100MHz GPIO_OSPEEDER_OSPEEDR2	/* High speed on 30 pF (80 MHz Output max speed on 15 pF) */
+
+/*
+ *  GPIO Output type enumeration
+ */
+#define GPIO_OType_PP   0x0
+#define GPIO_OType_OD   0x1
+
+/*
+ *  GPIO Configuration PullUp PullDown enumeration
+ */
+#define GPIO_PuPd_NOPULL 0x0
+#define GPIO_PuPd_UP     GPIO_PUPDR_PUPDR0
+#define GPIO_PuPd_DOWN   GPIO_PUPDR_PUPDR1
+
+/*
+ *  AF 7 selection
+ */
+#define GPIO_AF7                0x07	/* AF7 value */
+
+/*
+ *  USART Word Length
+ */
+#define USART_WordLength_8b     0x0000
+#define USART_WordLength_9b     USART_CR1_M
+
+/*
+ *  USART Stop Bits
+ */ 
+#define USART_StopBits_1        0x0000
+#define USART_StopBits_0_5      USART_CR2_STOP_0
+#define USART_StopBits_2        USART_CR2_STOP_1
+#define USART_StopBits_1_5      USART_CR2_STOP
+
+/*
+ *  USART Parity
+ */
+#define USART_Parity_No         0x0000
+#define USART_Parity_Even       USART_CR1_PCE
+#define USART_Parity_Odd        (USART_CR1_PCE | USART_CR1_PS) 
+
+/*
+ *  USART MODE
+ */
+#define USART_Mode_Rx           USART_CR1_RE
+#define USART_Mode_Tx           USART_CR1_TE
+
+/** @defgroup USART_Hardware_Flow_Control 
+  * @{
+  */ 
+#define USART_HardwareFlowControl_None       0x0000
+#define USART_HardwareFlowControl_RTS        USART_CR3_RTSE
+#define USART_HardwareFlowControl_CTS        USART_CR3_CTSE
+#define USART_HardwareFlowControl_RTS_CTS    (USART_CR3_RTSE | USART_CR3_CTSE)
+
+#define CR1_CLEAR_MASK          (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE)
+#define CR3_CLEAR_MASK          (USART_CR3_RTSE | USART_CR3_CTSE)
+
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯ã®å®ç¾©
+ */
+typedef struct sio_port_initialization_block {
+	uint32_t base;
+	INTNO    intno_usart;
+} SIOPINIB;
+
+/*
+ *  å
+¼ç¨GPIOãã¼ãåæåãã­ãã¯ã®å®ç¾©
+ */
+typedef struct gpio_port_initialization_block {
+	uint32_t clockbase/* pfr*/;		/* PFRxã¬ã¸ã¹ã¿ã¢ãã¬ã¹ */
+	uint32_t clock_set;
+	uint32_t portbase;
+	uint32_t port_set;
+
+	uint32_t txportbase;
+	uint32_t txpinport;
+	uint32_t txmode_msk;
+	uint32_t txmode_set;
+	uint32_t txspeed_msk;
+	uint32_t txspeed_set;
+	uint32_t txtype_msk;
+	uint32_t txtype_set;
+	uint32_t txpupd_msk;
+	uint32_t txpupd_set;
+
+	uint32_t rxportbase;
+	uint32_t rxpinport;
+	uint32_t rxmode_msk;
+	uint32_t rxmode_set;
+	uint32_t rxspeed_msk;
+	uint32_t rxspeed_set;
+	uint32_t rxtype_msk;
+	uint32_t rxtype_set;
+	uint32_t rxpupd_msk;
+	uint32_t rxpupd_set;
+} GPIOINIB;
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®å®ç¾©
+ */
+struct sio_port_control_block {
+	const SIOPINIB  *p_siopinib;  /* ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯ */
+	const GPIOINIB  *p_gpioinib;  /* å
+¼ç¨GPIOãã¼ãåæåãã­ãã¯ */
+	intptr_t        exinf;        /* æ¡å¼µæ
+å ± */
+	bool_t          opnflg;       /* ãªã¼ãã³æ¸ã¿ãã©ã° */
+};
+
+/*
+ * ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯
+ */
+const SIOPINIB siopinib_table[TNUM_SIOP] = {
+	{(uint32_t)USART1_BASE, (INTNO)INTNO_SIO1},
+#if TNUM_SIOP >= 2
+	{(uint32_t)USART2_BASE, (INTNO)INTNO_SIO2},
+#endif
+};
+
+/*
+ * å
+¼ç¨GPIOãã¼ãåæåãã­ãã¯
+ */
+const GPIOINIB gpioinib_table[TNUM_SIOP] = {
+	{(uint32_t)(TADR_RCC_BASE+TOFF_U1_APBNER), (uint32_t)ENABLE_U1_PORT,
+     (uint32_t)(TADR_RCC_BASE+TOFF_RCC_AHB1ENR), (uint32_t)ENABLE_U1_GPIO,
+     (uint32_t)TADR_U1_GPIO_BASE, (uint32_t)TX1_PINPOS,
+     (uint32_t)~(GPIO_MODER_MODER2 << (TX1_PINPOS*2)), (uint32_t)(GPIO_Mode_AF << (TX1_PINPOS*2)),
+     (uint32_t)~(GPIO_OSPEEDER_OSPEEDR2 << (TX1_PINPOS*2)), (uint32_t)(GPIO_Speed_50MHz << (TX1_PINPOS*2)),
+     (uint32_t)~(GPIO_OTYPER_OT << TX1_PINPOS), (uint32_t)(GPIO_OType_PP << TX1_PINPOS),
+     (uint32_t)~(GPIO_PUPDR_PUPDR2 << (TX1_PINPOS*2)), (uint32_t)(GPIO_PuPd_UP << (TX1_PINPOS*2)),
+     (uint32_t)TADR_U1_GPIO_BASE, (uint32_t)RX1_PINPOS,
+     (uint32_t)~(GPIO_MODER_MODER2 << (RX1_PINPOS*2)), (uint32_t)(GPIO_Mode_AF << (RX1_PINPOS*2)),
+     (uint32_t)~(GPIO_OSPEEDER_OSPEEDR2 << (RX1_PINPOS*2)), (uint32_t)(GPIO_Speed_50MHz << (RX1_PINPOS*2)),
+     (uint32_t)~(GPIO_OTYPER_OT << RX1_PINPOS), (uint32_t)(GPIO_OType_PP << RX1_PINPOS),
+     (uint32_t)~(GPIO_PUPDR_PUPDR2 << (RX1_PINPOS*2)), (uint32_t)(GPIO_PuPd_UP << (RX1_PINPOS*2))
+#if TNUM_SIOP >= 2
+    },
+	{(uint32_t)(TADR_RCC_BASE+TOFF_U2_APBNER), (uint32_t)ENABLE_U2_PORT,
+     (uint32_t)(TADR_RCC_BASE+TOFF_RCC_AHB1ENR), (uint32_t)ENABLE_U2_GPIO,
+     (uint32_t)TADR_U2_GPIO_BASE, (uint32_t)TX2_PINPOS,
+     (uint32_t)~(GPIO_MODER_MODER2 << (TX2_PINPOS*2)), (uint32_t)(GPIO_Mode_AF << (TX2_PINPOS*2)),
+     (uint32_t)~(GPIO_OSPEEDER_OSPEEDR2 << (TX2_PINPOS*2)), (uint32_t)(GPIO_Speed_50MHz << (TX2_PINPOS*2)),
+     (uint32_t)~(GPIO_OTYPER_OT << TX2_PINPOS), (uint32_t)(GPIO_OType_PP << TX2_PINPOS),
+     (uint32_t)~(GPIO_PUPDR_PUPDR2 << (TX2_PINPOS*2)), (uint32_t)(GPIO_PuPd_UP << (TX2_PINPOS*2)),
+     (uint32_t)TADR_U2_GPIO_BASE, (uint32_t)RX2_PINPOS,
+     (uint32_t)~(GPIO_MODER_MODER2 << (RX2_PINPOS*2)), (uint32_t)(GPIO_Mode_AF << (RX2_PINPOS*2)),
+     (uint32_t)~(GPIO_OSPEEDER_OSPEEDR2 << (RX2_PINPOS*2)), (uint32_t)(GPIO_Speed_50MHz << (RX2_PINPOS*2)),
+     (uint32_t)~(GPIO_OTYPER_OT << RX2_PINPOS), (uint32_t)(GPIO_OType_PP << RX2_PINPOS),
+     (uint32_t)~(GPIO_PUPDR_PUPDR2 << (RX2_PINPOS*2)), (uint32_t)(GPIO_PuPd_UP << (RX2_PINPOS*2)),
+#endif
+    }
+};
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®ã¨ãªã¢
+ */
+SIOPCB	siopcb_table[TNUM_SIOP];
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãIDããç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_SIOP(siopid)	((uint_t)((siopid) - 1))
+#define get_siopcb(siopid)	(&(siopcb_table[INDEX_SIOP(siopid)]))
+
+static void setup_gpio_source(uint32_t base, uint8_t source, uint8_t select)
+{
+	uint32_t tmpreg, regoff;
+	regoff = TOFF_GPIO_AFR0+((source>>1) & 0x4);
+	tmpreg = (sil_rew_mem((uint32_t *)(base+regoff)) & ~(0xF << ((source & 0x07) * 4)))
+			    | (select << ((source & 0x07) * 4));
+	sil_wrw_mem((uint32_t *)(base+regoff), tmpreg);
+}
+
+void put_hex(char a, int val)
+{
+	int i, j;
+	target_fput_log(a);
+	target_fput_log(' ');
+	for(i = 28 ; i >= 0 ; i-= 4){
+		j = (val >> i) & 0xf;;
+		if(j > 9)
+			j += ('A'-10);
+		else
+			j += '0';
+		target_fput_log(j);
+	}
+	target_fput_log('\n');
+}
+
+/*
+ *  SIOãã©ã¤ãã®åæå
+ */
+void
+sio_initialize(intptr_t exinf)
+{
+	SIOPCB	*p_siopcb;
+	uint_t	i;
+
+	/*
+	 *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®åæå
+	 */
+	for (p_siopcb = siopcb_table, i = 0; i < TNUM_SIOP; p_siopcb++, i++) {
+		p_siopcb->p_siopinib = &(siopinib_table[i]);
+		p_siopcb->p_gpioinib = &(gpioinib_table[i]);
+		p_siopcb->opnflg = false;
+	}
+}
+
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
+ */
+SIOPCB *
+sio_opn_por(ID siopid, intptr_t exinf)
+{
+	SIOPCB          *p_siopcb;
+	const SIOPINIB  *p_siopinib;
+	const GPIOINIB  *p_gpioinib;
+	bool_t   opnflg;
+	ER       ercd;
+	uint32_t base, txbase, rxbase;
+	uint32_t apbclock, integerdivider, fractionaldivider, tmp;
+
+	p_siopcb = get_siopcb(siopid);
+	p_siopinib = p_siopcb->p_siopinib;
+	p_gpioinib = p_siopcb->p_gpioinib;
+
+	/*
+	 *  ãªã¼ãã³ãããã¼ããããããopnflgã«èª­ãã§ããï¼
+	 */
+	opnflg = p_siopcb->opnflg;
+
+	p_siopcb->exinf = exinf;
+	txbase = p_gpioinib->txportbase;
+	rxbase = p_gpioinib->rxportbase;
+
+	if(txbase == 0 || rxbase == 0)	/* no usart port */
+		goto sio_opn_exit;
+
+	/*
+	 *  ãã¼ãã¦ã§ã¢ã®åæå
+	 */
+	sil_wrw_mem((uint32_t *)p_gpioinib->clockbase, sil_rew_mem((uint32_t *)p_gpioinib->clockbase) | p_gpioinib->clock_set);
+	sil_wrw_mem((uint32_t *)p_gpioinib->portbase, sil_rew_mem((uint32_t *)p_gpioinib->portbase) | p_gpioinib->port_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_MODER), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_MODER)) & p_gpioinib->txmode_msk) | p_gpioinib->txmode_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_OSPEEDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_OSPEEDR)) & p_gpioinib->txspeed_msk) | p_gpioinib->txspeed_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_OTYPER), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_OTYPER)) & p_gpioinib->txtype_msk) | p_gpioinib->txtype_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR)) & p_gpioinib->txpupd_msk) | p_gpioinib->txpupd_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_MODER), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_MODER)) & p_gpioinib->rxmode_msk) | p_gpioinib->rxmode_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_OSPEEDR), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_OSPEEDR)) & p_gpioinib->rxspeed_msk) | p_gpioinib->rxspeed_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_OTYPER), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_OTYPER)) & p_gpioinib->rxtype_msk) | p_gpioinib->rxtype_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR)) & p_gpioinib->rxpupd_msk) | p_gpioinib->rxpupd_set);
+	setup_gpio_source(txbase, p_gpioinib->txpinport, GPIO_AF7);
+	setup_gpio_source(rxbase, p_gpioinib->rxpinport, GPIO_AF7);
+
+	base = p_siopinib->base;
+
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & ~USART_CR1_UE);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR2)) & ~USART_CR2_STOP;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR2), tmp | USART_StopBits_1);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & ~CR1_CLEAR_MASK;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), tmp | USART_WordLength_8b | USART_Parity_No | USART_Mode_Rx | USART_Mode_Tx);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR3)) & ~CR3_CLEAR_MASK;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR3), tmp | USART_HardwareFlowControl_None);
+
+	if ((base == TADR_USART1_BASE) || (base == TADR_USART6_BASE))
+		apbclock = SysFrePCLK2;
+	else
+		apbclock = SysFrePCLK1;
+
+	if ((sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & USART_CR1_OVER8) != 0){
+		integerdivider = ((25 * apbclock) / (2 * BPS_SETTING));	/* 8 Samples */
+		tmp = (integerdivider / 100) << 4;
+		fractionaldivider = integerdivider - (100 * (tmp >> 4));
+		tmp |= ((((fractionaldivider * 8) + 50) / 100)) & 0x07;
+	}
+	else{ /* if ((USARTx->CR1 & USART_CR1_OVER8) == 0) */
+		integerdivider = ((25 * apbclock) / (4 * BPS_SETTING));	/* 16 Samples */
+		tmp = (integerdivider / 100) << 4;
+		fractionaldivider = integerdivider - (100 * (tmp >> 4));
+		tmp |= ((((fractionaldivider * 16) + 50) / 100)) & 0x0F;
+	}
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_BRR), tmp);
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) | USART_CR1_RXNEIE);
+	p_siopcb->opnflg = true;
+
+	/*
+	 *  ã·ãªã¢ã«I/Oå²è¾¼ã¿ã®ãã¹ã¯ãè§£é¤ããï¼
+	 */
+	if (!opnflg) {
+		ercd = ena_int(p_siopinib->intno_usart);
+		assert(ercd == E_OK);
+	}
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) | USART_CR1_UE);
+
+sio_opn_exit:;
+	return(p_siopcb);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ã¯ã­ã¼ãº
+ */
+void
+sio_cls_por(SIOPCB *p_siopcb)
+{
+	/*
+	 *  ã·ãªã¢ã«I/Oå²è¾¼ã¿ããã¹ã¯ããï¼
+	 */
+	if ((p_siopcb->opnflg)) {
+		dis_int(p_siopcb->p_siopinib->intno_usart);
+	}
+	p_siopcb->opnflg = false;
+}
+
+/*
+ *  SIOã®å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³
+ */
+
+Inline bool_t
+sio_putready(SIOPCB* p_siopcb)
+{
+	uint16_t cr1 = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1));
+	uint16_t ssr = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_SR));
+
+	if ((cr1 & USART_CR1_TXEIE) != 0 && (ssr & USART_SR_TC) != 0)
+	{
+		return 1;
+	}
+	return 0;
+}
+
+Inline bool_t
+sio_getready(SIOPCB* p_siopcb)
+{
+	uint16_t cr1 = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1));
+	uint16_t ssr = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_SR));
+
+	if ((ssr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE | USART_SR_PE)) != 0)
+	{
+		return 0;
+	}
+	if ((cr1 & USART_CR1_RXNEIE) != 0 && (ssr & USART_SR_RXNE) != 0)
+	{
+		return 1;
+	}
+	return 0;
+}
+
+void
+sio_usart_isr(intptr_t exinf)
+{
+	SIOPCB          *p_siopcb;
+
+	p_siopcb = get_siopcb(exinf);
+
+	if (sio_getready(p_siopcb)) {
+		sio_irdy_rcv(p_siopcb->exinf);
+	}
+	if (sio_putready(p_siopcb)) {
+		sio_irdy_snd(p_siopcb->exinf);
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã¸ã®æå­éä¿¡
+ */
+bool_t
+sio_snd_chr(SIOPCB *p_siopcb, char c)
+{
+	if (sio_putready(p_siopcb)) {
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_DR), (uint16_t)c);
+		return true;
+	}
+	return false;
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®æå­åä¿¡
+ */
+int_t
+sio_rcv_chr(SIOPCB *p_siopcb)
+{
+	int_t c = -1;
+
+	if (sio_getready(p_siopcb)) {
+		c = sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_DR)) & 0xFF;
+	}
+	return c;
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+void
+sio_ena_cbr(SIOPCB *p_siopcb, uint_t cbrtn)
+{
+	switch (cbrtn) {
+	case SIO_RDY_SND:
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1)) | USART_CR1_TXEIE);
+		break;
+	case SIO_RDY_RCV:
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1)) | USART_CR1_RXNEIE);
+		break;
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+void
+sio_dis_cbr(SIOPCB *p_siopcb, uint_t cbrtn)
+{
+	switch (cbrtn) {
+	case SIO_RDY_SND:
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1)) & ~USART_CR1_TXEIE);
+		break;
+	case SIO_RDY_RCV:
+		sil_wrh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(p_siopcb->p_siopinib->base+TOFF_USART_CR1)) & ~USART_CR1_RXNEIE);
+		break;
+	}
+}
+
+/*
+ *  1æå­åºåï¼ãã¼ãªã³ã°ã§ã®åºåï¼
+ */
+void sio_pol_snd_chr(int8_t c, ID siopid)
+{
+	uint32_t base = siopinib_table[INDEX_PORT(siopid)].base;
+
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_DR), (uint16_t)c);
+	while(0 == (sil_reh_mem((uint16_t *)(base+TOFF_USART_SR)) & USART_SR_TC));
+
+	/*
+	 *  åºåãå®å
+¨ã«çµããã¾ã§å¾
+ã¤
+	 */
+	volatile int n = 300000000/BPS_SETTING;
+	while(n--);
+}
+
+/*
+ *  ã¿ã¼ã²ããã®ã·ãªã¢ã«åæå
+ */
+void chip_uart_init(ID siopid)
+{
+	const GPIOINIB  *p_gpioinib = &gpioinib_table[INDEX_PORT(siopid)];
+	const SIOPINIB  *p_siopinib = &siopinib_table[INDEX_PORT(siopid)];
+	uint32_t base, txbase, rxbase;
+	uint32_t apbclock, integerdivider, fractionaldivider, tmp;
+
+	txbase = p_gpioinib->txportbase;
+	rxbase = p_gpioinib->rxportbase;
+
+	sil_wrw_mem((uint32_t *)p_gpioinib->clockbase, sil_rew_mem((uint32_t *)p_gpioinib->clockbase) | p_gpioinib->clock_set);
+	sil_wrw_mem((uint32_t *)p_gpioinib->portbase, sil_rew_mem((uint32_t *)p_gpioinib->portbase) | p_gpioinib->port_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_MODER), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_MODER)) & p_gpioinib->txmode_msk) | p_gpioinib->txmode_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_OSPEEDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_OSPEEDR)) & p_gpioinib->txspeed_msk) | p_gpioinib->txspeed_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_OTYPER), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_OTYPER)) & p_gpioinib->txtype_msk) | p_gpioinib->txtype_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR)) & p_gpioinib->txpupd_msk) | p_gpioinib->txpupd_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_MODER), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_MODER)) & p_gpioinib->rxmode_msk) | p_gpioinib->rxmode_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_OSPEEDR), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_OSPEEDR)) & p_gpioinib->rxspeed_msk) | p_gpioinib->rxspeed_set);
+	sil_wrw_mem((uint32_t *)(rxbase+TOFF_GPIO_OTYPER), (sil_rew_mem((uint32_t *)(rxbase+TOFF_GPIO_OTYPER)) & p_gpioinib->rxtype_msk) | p_gpioinib->rxtype_set);
+	sil_wrw_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR), (sil_rew_mem((uint32_t *)(txbase+TOFF_GPIO_PUPDR)) & p_gpioinib->rxpupd_msk) | p_gpioinib->rxpupd_set);
+	setup_gpio_source(txbase, p_gpioinib->txpinport, GPIO_AF7);
+	setup_gpio_source(rxbase, p_gpioinib->rxpinport, GPIO_AF7);
+
+	base = p_siopinib->base;
+
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR2)) & ~USART_CR2_STOP;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR2), tmp | USART_StopBits_1);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & ~CR1_CLEAR_MASK;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), tmp | USART_WordLength_8b | USART_Parity_No | USART_Mode_Rx | USART_Mode_Tx);
+	tmp = sil_reh_mem((uint16_t *)(base+TOFF_USART_CR3)) & ~CR3_CLEAR_MASK;
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR3), tmp | USART_HardwareFlowControl_None);
+
+	if ((base == TADR_USART1_BASE) || (base == TADR_USART6_BASE))
+		apbclock = SysFrePCLK2;
+	else
+		apbclock = SysFrePCLK1;
+
+	if ((sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & USART_CR1_OVER8) != 0){
+		integerdivider = ((25 * apbclock) / (2 * BPS_SETTING));	/* 8 Samples */
+		tmp = (integerdivider / 100) << 4;
+		fractionaldivider = integerdivider - (100 * (tmp >> 4));
+		tmp |= ((((fractionaldivider * 8) + 50) / 100)) & 0x07;
+	}
+	else{ /* if ((USARTx->CR1 & USART_CR1_OVER8) == 0) */
+		integerdivider = ((25 * apbclock) / (4 * BPS_SETTING));	/* 16 Samples */
+		tmp = (integerdivider / 100) << 4;
+		fractionaldivider = integerdivider - (100 * (tmp >> 4));
+		tmp |= ((((fractionaldivider * 16) + 50) / 100)) & 0x0F;
+	}
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_BRR), tmp);
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) & ~(USART_CR1_TXEIE | USART_CR1_RXNEIE));
+	sil_wrh_mem((uint16_t *)(base+TOFF_USART_CR1), sil_reh_mem((uint16_t *)(base+TOFF_USART_CR1)) | USART_CR1_UE);
+}
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_serial.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_serial.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_serial.h	(revision 136)
@@ -0,0 +1,139 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: chip_serial.h 698 2015-08-12 18:17:21Z roi $
+ */
+
+/*
+ *    ã·ãªã¢ã«I/Oããã¤ã¹ï¼SIOï¼ãã©ã¤ã
+ */
+
+#ifndef TOPPERS_CHIP_SERIAL_H
+#define TOPPERS_CHIP_SERIAL_H
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®å®ç¾©
+ */
+typedef struct sio_port_control_block    SIOPCB;
+
+/*
+ *  ã³ã¼ã«ããã¯ã«ã¼ãã³ã®è­å¥çªå·
+ */
+#define SIO_RDY_SND    1U        /* éä¿¡å¯è½ã³ã¼ã«ããã¯ */
+#define SIO_RDY_RCV    2U        /* åä¿¡éç¥ã³ã¼ã«ããã¯ */
+
+/*
+ *  SIOãã©ã¤ãã®åæå
+ */
+extern void sio_initialize(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
+ */
+extern SIOPCB *sio_opn_por(ID siopid, intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ã¯ã­ã¼ãº
+ */
+extern void sio_cls_por(SIOPCB *p_siopcb);
+
+/*
+ *  SIOã®å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³
+ */
+extern void sio_usart_isr(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã¸ã®æå­éä¿¡
+ */
+extern bool_t sio_snd_chr(SIOPCB *p_siopcb, char c);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®æå­åä¿¡
+ */
+extern int_t sio_rcv_chr(SIOPCB *p_siopcb);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+extern void sio_ena_cbr(SIOPCB *p_siopcb, uint_t cbrtn);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+extern void sio_dis_cbr(SIOPCB *p_siopcb, uint_t cbrtn);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®éä¿¡å¯è½ã³ã¼ã«ããã¯
+ */
+extern void sio_irdy_snd(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®åä¿¡éç¥ã³ã¼ã«ããã¯
+ */
+extern void sio_irdy_rcv(intptr_t exinf);
+
+/*
+ *  1æå­éä¿¡ï¼ãã¼ãªã³ã°ã§ã®åºåï¼
+ */
+extern void sio_pol_snd_chr(int8_t c, ID siopid);
+
+/*
+ *  ã¿ã¼ã²ããã®ã·ãªã¢ã«åæå
+ */
+extern void chip_uart_init(ID siopid);
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_CHIP_SERIAL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_sil.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_sil.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_sil.h	(revision 136)
@@ -0,0 +1,88 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_sil.h 698 2015-07-27 22:44:45Z roi $
+ */
+
+/*
+ *   sil.hã®ãããä¾å­é¨ï¼stm32f4xxç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼sil.hã®å
+é ­ã§ã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡
+ *  ã¤ã«ããã¯ç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼
+ *  ãããåã«ï¼t_stddef.hãã¤ã³ã¯ã«ã¼ããããã®ã§ï¼ãããã«ä¾å­ãã¦ã
+ *  ããï¼
+ */
+
+#ifndef TOPPERS_CHIP_SIL_H
+#define TOPPERS_CHIP_SIL_H
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+
+ */
+#define TBITW_IPRI          4
+
+/*
+ *  ãã­ã»ããµã®ã¨ã³ãã£ã¢ã³
+ */
+#define SIL_ENDIAN_LITTLE
+
+/*
+ *  ã³ã¢ä¾å­ã§å
+±éãªå®ç¾©
+ */
+#include "core_sil.h"
+
+#endif /* TOPPERS_CHIP_SIL_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_timer.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_timer.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_timer.cfg	(revision 136)
@@ -0,0 +1,5 @@
+/*
+ *    ã¿ã¤ããã©ã¤ãã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+#include "target_timer.h"
+INCLUDE("arm_m_gcc/common/core_timer.cfg");
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_timer.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_timer.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_timer.h	(revision 136)
@@ -0,0 +1,83 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_timer.h 698 2015-07-27 22:39:08Z roi $
+ */
+
+/*
+ *  ã¿ã¤ããã©ã¤ãï¼stm32f4xxç¨ï¼
+ */
+
+#ifndef TOPPERS_CHIP_TIMER_H
+#define TOPPERS_CHIP_TIMER_H
+
+/*
+ *  ã¿ã¤ãå¤ã®å
+é¨è¡¨ç¾ã¨ããªç§åä½ã¨ã®å¤æ
+ */
+#define TIMER_CLOCK		(SYS_CLOCK / 1000)
+
+/*
+ *  ã¿ã¤ãå²è¾¼ã¿ãã³ãã©ç»é²ã®ããã®å®æ°
+ */
+#define INTPRI_TIMER    (-6)          /* å²è¾¼ã¿åªå
+åº¦ */
+#define INTATR_TIMER    0U            /* å²è¾¼ã¿å±æ§ */
+
+/*
+ *  ã³ã¢ä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARM-Mç¨ï¼
+ */
+#include "arm_m_gcc/common/core_timer.h"
+
+#endif /* TOPPERS_CHIP_TIMER_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_unrename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_unrename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/chip_unrename.h	(revision 136)
@@ -0,0 +1,27 @@
+/* This file is generated from target_rename.def by genrename. */
+
+/* This file is included only when target_rename.h has been included. */
+#ifdef TOPPERS_CHIP_RENAME_H
+#undef TOPPERS_CHIP_RENAME_H
+
+
+/*
+ * chip_config.c
+ */
+#undef target_initialize
+#undef target_exit
+
+#ifdef TOPPERS_LABEL_ASM
+
+
+/*
+ * chip_config.c
+ */
+#undef _target_initialize
+#undef _target_exit
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "arm_m_gcc/common/core_unrename.h"
+
+#endif /* TOPPERS_CHIP_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/cmsis_f4.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/cmsis_f4.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/cmsis_f4.h	(revision 136)
@@ -0,0 +1,123 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Just Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ *
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã® (1)ï½(4) ã®æ¡ä»¶ãï¼Free Software Foundation 
+ *  ã«ãã£ã¦å
+¬è¡¨ããã¦ãã GNU General Public License ã® Version 2 ã«è¨
+ *  è¿°ããã¦ããæ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§ã¢ï¼æ¬ã½ããã¦ã§ã¢
+ *  ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼
+ *  å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ãã®é©ç¨å¯è½æ§ã
+ *  å«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´
+ *  æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: cmsis.h,v 1.1 2015/07/27 22:56:07 roi Exp $
+ */
+
+#ifndef _CMSIS_F4_H_
+#define _CMSIS_F4_H_
+
+#define __NVIC_PRIO_BITS          4       /* STM32F4XX uses 4 Bits for the Priority Levels */
+
+/* Memory mapping of Cortex-M4 Hardware */
+#define TADR_ITM_BASE       (0xE0000000UL)	/* ITM Base Address */
+  #define TOFF_ITM_PORT     0x0000		/* (W)  ITM Stimulus Port Registers */
+  #define TOFF_ITM_TER      0x0E00		/* (RW) ITM Trace Enable Register */
+  #define TOFF_ITM_TPR      0x0E40		/* (RW) ITM Trace Privilege Register */
+  #define TOFF_ITM_TCR      0x0E80		/* (RW) ITM Trace Control Register */
+#define TADR_SCS_BASE       (0xE000E000UL)	/* System Control Space Base Address  */
+  #define TOFF_SCS_ICTR     0x0004		/* (R)  Interrupt Controller Type Register */
+  #define TOFF_SCS_ACTLR    0x0008		/* (RW) Auxiliary Control Register */
+#define TADR_COREDEBUG_BASE (0xE000EDF0UL)				/* Core Debug Base Address */
+#define TADR_SYSTICK_BASE   (TADR_SCS_BASE+0x0010UL)	/* SysTick Base Address */
+  #define TOFF_SYSTICK_CTRL 0x0000		/* (RW) SysTick Control and Status Register */
+  #define TOFF_SYSTICK_LOAD 0x0004		/* (RW) SysTick Reload Value Register */
+  #define TOFF_SYSTICK_VAL  0x0008		/* (RW) SysTick Current Value Register */
+  #define TOFF_SYSTICK_CALIB 0x000C		/* (R)  SysTick Calibration Register */
+#define TADR_NVIC_BASE      (TADR_SCS_BASE+0x0100UL)	/* NVIC Base Address */
+  #define TOFF_NVIC_ISER    0x0000		/* (RW) Interrupt Set Enable Register */
+  #define TOFF_NVIC_ICER    0x0080		/* (RW) Interrupt Clear Enable Register */
+  #define TOFF_NVIC_ISPR    0x0100		/* (RW) Interrupt Set Pending Register */
+  #define TOFF_NVIC_ICPR    0x0180		/* (RW) Interrupt Clear Pending Register */
+  #define TOFF_NVIC_IABR    0x0200		/* (RW) Interrupt Active bit Register */
+  #define TOFF_NVIC_IP      0x0300		/* (RW) Interrupt Priority Register (8Bit wide) */
+  #define TOFF_NVIC_STIR    0x0E00		/* (W)  Software Trigger Interrupt Register */
+#define TADR_SCB_BASE       (TADR_SCS_BASE+0x0D00UL)	/* System Control Block Base Address  */
+  #define TOFF_SCB_CPUID    0x0000		/* (R)  CPUID Base Register */
+  #define TOFF_SCB_ICSR     0x0004		/* (RW) Interrupt Control and State Register */
+  #define TOFF_SCB_VTOR     0x0008		/* (RW) Vector Table Offset Register */
+  #define TOFF_SCB_AIRCR    0x000C		/* (RW) Application Interrupt and Reset Control Register */
+  #define TOFF_SCB_SCR      0x0010		/* (RW) System Control Register */
+  #define TOFF_SCB_CCR      0x0014		/* (RW) Configuration Control Register */
+  #define TOFF_SCB_SHP4     0x0018		/* (RW-8) System Handlers Priority Registers 4 */
+  #define TOFF_SCB_SHP5     0x0019		/* (RW-8) System Handlers Priority Registers 5 */
+  #define TOFF_SCB_SHP6     0x001A		/* (RW-8) System Handlers Priority Registers 6 */
+  #define TOFF_SCB_SHP7     0x001B		/* (RW-8) System Handlers Priority Registers 7 */
+  #define TOFF_SCB_SHP8     0x001C		/* (RW-8) System Handlers Priority Registers 8 */
+  #define TOFF_SCB_SHP9     0x001D		/* (RW-8) System Handlers Priority Registers 9 */
+  #define TOFF_SCB_SHP10    0x001E		/* (RW-8) System Handlers Priority Registers 10 */
+  #define TOFF_SCB_SHP11    0x001F		/* (RW-8) System Handlers Priority Registers 11 */
+  #define TOFF_SCB_SHP12    0x0020		/* (RW-8) System Handlers Priority Registers 12 */
+  #define TOFF_SCB_SHP13    0x0021		/* (RW-8) System Handlers Priority Registers 13 */
+  #define TOFF_SCB_SHP14    0x0022		/* (RW-8) System Handlers Priority Registers 14 */
+  #define TOFF_SCB_SHP15    0x0023		/* (RW-8) System Handlers Priority Registers 15 */
+  #define TOFF_SCB_SHCSR    0x0024		/* (RW) System Handler Control and State Register */
+  #define TOFF_SCB_CFSR     0x0028		/* (RW) Configurable Fault Status Register */
+  #define TOFF_SCB_HFSR     0x002C		/* (RW) HardFault Status Register */
+  #define TOFF_SCB_DFSR     0x0030		/* (RW) Debug Fault Status Register */
+  #define TOFF_SCB_MMFAR    0x0034		/* (RW) MemManage Fault Address Register */
+  #define TOFF_SCB_BFAR     0x0038		/* (RW) BusFault Address Register */
+  #define TOFF_SCB_AFSR     0x003C		/* (RW) Auxiliary Fault Status Register */
+  #define TOFF_SCB_PFR0     0x0040		/* (R)  Processor Feature Register 0 */
+  #define TOFF_SCB_PFR1     0x0044		/* (R)  Processor Feature Register 1 */
+  #define TOFF_SCB_DFR      0x0048		/* (R)  Debug Feature Register */
+  #define TOFF_SCB_ADR      0x004C		/* (R)  Auxiliary Feature Register */
+  #define TOFF_SCB_MMFR0    0x0050		/* (R)  Memory Model Feature Register 0 */
+  #define TOFF_SCB_MMFR1    0x0054		/* (R)  Memory Model Feature Register 1 */
+  #define TOFF_SCB_MMFR2    0x0058		/* (R)  Memory Model Feature Register 2 */
+  #define TOFF_SCB_MMFR3    0x005C		/* (R)  Memory Model Feature Register 3 */
+  #define TOFF_SCB_ISAR0    0x0060		/* (R)  Instruction Set Attributes Register 0 */
+  #define TOFF_SCB_ISAR1    0x0064		/* (R)  Instruction Set Attributes Register 1 */
+  #define TOFF_SCB_ISAR2    0x0068		/* (R)  Instruction Set Attributes Register 2 */
+  #define TOFF_SCB_ISAR3    0x006C		/* (R)  Instruction Set Attributes Register 3 */
+  #define TOFF_SCB_ISAR4    0x0070		/* (R)  Instruction Set Attributes Register 4 */
+  #define TOFF_SCB_CPACR    0x0088		/* (RW) Coprocessor Access Control Register */
+
+#endif  /* _CMSIS_F4_H_ */
+
Index: rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/stm32f4xx.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/stm32f4xx.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/arm_m_gcc/stm32f4xx/stm32f4xx.h	(revision 136)
@@ -0,0 +1,1299 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Just Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015      by 3rd Designing Center
+ *              Imageing System Development Division RICOH COMPANY, LTD.
+ *
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã® (1)ï½(4) ã®æ¡ä»¶ãï¼Free Software Foundation 
+ *  ã«ãã£ã¦å
+¬è¡¨ããã¦ãã GNU General Public License ã® Version 2 ã«è¨
+ *  è¿°ããã¦ããæ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§ã¢ï¼æ¬ã½ããã¦ã§ã¢
+ *  ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼
+ *  å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ãã®é©ç¨å¯è½æ§ã
+ *  å«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´
+ *  æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: stm32f4xx.h,v 1.1 2015/07/18 21:48:24 roi Exp $
+ */
+
+#ifndef _STM32F4XX_H_
+#define _STM32F4XX_H_
+
+#include <sil.h>
+#include "cmsis_f4.h"
+
+/*
+ *  å²è¾¼ã¿çªå·ã®æå¤§å¤
+ */
+#define TMAX_INTNO          (16 + 82)
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãããå¹
+
+ */
+#define TBITW_IPRI          4
+
+/*
+ *  INTERRUPT NUMBER
+ */
+#define IRQ_VECTOR_WWDG             (16 + 0)	/* Window WatchDog Interrupt */
+#define IRQ_VECTOR_PVD              (16 + 1)	/* PVD through EXTI Line detection Interrupt */
+#define IRQ_VECTOR_TAMP_STAMP       (16 + 2)	/* Tamper and TimeStamp interrupts through the EXTI line */
+#define IRQ_VECTOR_RTC_WKUP         (16 + 3)	/* RTC Wakeup interrupt through the EXTI line */
+#define IRQ_VECTOR_FLASH            (16 + 4)	/* FLASH global Interrupt */
+#define IRQ_VECTOR_RCC              (16 + 5)	/* RCC global Interrupt */
+#define IRQ_VECTOR_EXTI0            (16 + 6)	/* EXTI Line0 Interrupt */
+#define IRQ_VECTOR_EXTI1            (16 + 7)	/* EXTI Line1 Interrupt */
+#define IRQ_VECTOR_EXTI2            (16 + 8)	/* EXTI Line2 Interrupt */
+#define IRQ_VECTOR_EXTI3            (16 + 9)	/* EXTI Line3 Interrupt */
+#define IRQ_VECTOR_EXTI4            (16 + 10)	/* EXTI Line4 Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM0     (16 + 11)	/* DMA1 Stream 0 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM1     (16 + 12)	/* DMA1 Stream 1 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM2     (16 + 13)	/* DMA1 Stream 2 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM3     (16 + 14)	/* DMA1 Stream 3 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM4     (16 + 15)	/* DMA1 Stream 4 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM5     (16 + 16)	/* DMA1 Stream 5 global Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM6     (16 + 17)	/* DMA1 Stream 6 global Interrupt */
+#define IRQ_VECTOR_ADC              (16 + 18)	/* ADC1, ADC2 and ADC3 global Interrupts */
+#define IRQ_VECTOR_CAN1_TX          (16 + 19)	/* CAN1 TX Interrupt */
+#define IRQ_VECTOR_CAN1_RX0         (16 + 20)	/* CAN1 RX0 Interrupt */
+#define IRQ_VECTOR_CAN1_RX1         (16 + 21)	/* CAN1 RX1 Interrupt */
+#define IRQ_VECTOR_CAN1_SCE         (16 + 22)	/* CAN1 SCE Interrupt */
+#define IRQ_VECTOR_EXTI9_5          (16 + 23)	/* External Line[9:5] Interrupts */
+#define IRQ_VECTOR_TIM1_BRK_TIM9    (16 + 24)	/* TIM1 Break interrupt and TIM9 global interrupt */
+#define IRQ_VECTOR_TIM1_UP_TIM10    (16 + 25)	/* TIM1 Update Interrupt and TIM10 global interrupt */
+#define IRQ_VECTOR_TIM1_TRG_COM_TIM11 (16+26)	/* TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */
+#define IRQ_VECTOR_TIM1_CC          (16 + 27)	/* TIM1 Capture Compare Interrupt */
+#define IRQ_VECTOR_TIM2             (16 + 28)	/* TIM2 global Interrupt */
+#define IRQ_VECTOR_TIM3             (16 + 29)	/* TIM3 global Interrupt */
+#define IRQ_VECTOR_TIM4             (16 + 30)	/* TIM4 global Interrupt */
+#define IRQ_VECTOR_I2C1_EV          (16 + 31)	/* I2C1 Event Interrupt */
+#define IRQ_VECTOR_I2C1_ER          (16 + 32)	/* I2C1 Error Interrupt */
+#define IRQ_VECTOR_I2C2_EV          (16 + 33)	/* I2C2 Event Interrupt */
+#define IRQ_VECTOR_I2C2_ER          (16 + 34)	/* I2C2 Error Interrupt */
+#define IRQ_VECTOR_SPI1             (16 + 35)	/* SPI1 global Interrupt */
+#define IRQ_VECTOR_SPI2             (16 + 36)	/* SPI2 global Interrupt */
+#define IRQ_VECTOR_USART1           (16 + 37)	/* USART1 global Interrupt */
+#define IRQ_VECTOR_USART2           (16 + 38)	/* USART2 global Interrupt */
+#define IRQ_VECTOR_USART3           (16 + 39)	/* USART3 global Interrupt */
+#define IRQ_VECTOR_EXTI15_10        (16 + 40)	/* External Line[15:10] Interrupts */
+#define IRQ_VECTOR_RTC_ALARM        (16 + 41)	/* RTC Alarm (A and B) through EXTI Line Interrupt */
+#define IRQ_VECTOR_OTG_FS_WKUP      (16 + 42)	/* USB OTG FS Wakeup through EXTI line interrupt */
+#define IRQ_VECTOR_TIM8_BRK_TIM12   (16 + 43)	/* TIM8 Break Interrupt and TIM12 global interrupt */
+#define IRQ_VECTOR_TIM8_UP_TIM13    (16 + 44)	/* TIM8 Update Interrupt and TIM13 global interrupt */
+#define IRQ_VECTOR_TIM8_TRG_COM_TIM14 (16+45)	/* TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
+#define IRQ_VECTOR_TIM8_CC          (16 + 46)	/* TIM8 Capture Compare Interrupt */
+#define IRQ_VECTOR_DMA1_STREAM7     (16 + 47)	/* DMA1 Stream7 Interrupt */
+#define IRQ_VECTOR_FSMC             (16 + 48)	/* FSMC global Interrupt */
+#define IRQ_VECTOR_SDIO             (16 + 49)	/* SDIO global Interrupt */
+#define IRQ_VECTOR_TIM5             (16 + 50)	/* TIM5 global Interrupt */
+#define IRQ_VECTOR_SPI3             (16 + 51)	/* SPI3 global Interrupt */
+#define IRQ_VECTOR_UART4            (16 + 52)	/* UART4 global Interrupt */
+#define IRQ_VECTOR_UART5            (16 + 53)	/* UART5 global Interrupt */
+#define IRQ_VECTOR_TIM6_DAC         (16 + 54)	/* TIM6 global and DAC1&2 underrun error interrupts */
+#define IRQ_VECTOR_TIM7             (16 + 55)	/* TIM7 global interrupt */
+#define IRQ_VECTOR_DMA2_STREAM0     (16 + 56)	/* DMA2 Stream 0 global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM1     (16 + 57)	/* DMA2 Stream 1 global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM2     (16 + 58)	/* DMA2 Stream 2 global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM3     (16 + 59)	/* DMA2 Stream 3 global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM4     (16 + 60)	/* DMA2 Stream 4 global Interrupt */
+#define IRQ_VECTOR_ETH              (16 + 61)	/* Ethernet global Interrupt */
+#define IRQ_VECTOR_ETH_WKUP         (16 + 62)	/* Ethernet Wakeup through EXTI line Interrupt */
+#define IRQ_VECTOR_CAN2_TX          (16 + 63)	/* CAN2 TX Interrupt */
+#define IRQ_VECTOR_CAN2_RX0         (16 + 64)	/* CAN2 RX0 Interrupt */
+#define IRQ_VECTOR_CAN2_RX1         (16 + 65)	/* CAN2 RX1 Interrupt */
+#define IRQ_VECTOR_CAN2_SCE         (16 + 66)	/* CAN2 SCE Interrupt */
+#define IRQ_VECTOR_OTG_FS           (16 + 67)	/* USB OTG FS global Interrupt */
+#define IRQ_VECTOR_DMA2_STREAM5     (16 + 68)	/* DMA2 Stream 5 global interrupt */
+#define IRQ_VECTOR_DMA2_STREAM6     (16 + 69)	/* DMA2 Stream 6 global interrupt */
+#define IRQ_VECTOR_DMA2_STREAM7     (16 + 70)	/* DMA2 Stream 7 global interrupt */
+#define IRQ_VECTOR_USART6           (16 + 71)	/* USART6 global interrupt */
+#define IRQ_VECTOR_I2C3_EV          (16 + 72)	/* I2C3 event interrupt */
+#define IRQ_VECTOR_I2C3_ER          (16 + 73)	/* I2C3 error interrupt */
+#define IRQ_VECTOR_OTG_HS_EP1_OUT   (16 + 74)	/* USB OTG HS End Point 1 Out global interrupt */
+#define IRQ_VECTOR_OTG_HS_EP1_IN    (16 + 75)	/* USB OTG HS End Point 1 In global interrupt */
+#define IRQ_VECTOR_OTG_HS_WKUP      (16 + 76)	/* USB OTG HS Wakeup through EXTI interrupt */
+#define IRQ_VECTOR_OTG_HS           (16 + 77)	/* USB OTG HS global interrupt */
+#define IRQ_VECTOR_DCMI             (16 + 78)	/* DCMI global interrupt */
+#define IRQ_VECTOR_CRYP             (16 + 79)	/* CRYP crypto global interrupt */
+#define IRQ_VECTOR_HASH_RNG         (16 + 80)	/* Hash and Rng global interrupt */
+#define IRQ_VECTOR_FPU              (16 + 81)	/* FPU global interrupt */
+
+/*
+ *  PERIPHERAL MEMORY MAP
+ */
+#define FLASH_BASE          0x08000000	/*!< FLASH(up to 1 MB) base address in the alias region                         */
+#define CCMDATARAM_BASE     0x10000000	/*!< CCM(core coupled memory) data RAM(64 KB) base address in the alias region  */
+#define SRAM1_BASE          0x20000000	/*!< SRAM1(112 KB) base address in the alias region                             */
+#define SRAM2_BASE          0x2001C000	/*!< SRAM2(16 KB) base address in the alias region                              */
+#define PERIPH_BASE         0x40000000	/*!< Peripheral base address in the alias region                                */
+#define BKPSRAM_BASE        0x40024000	/*!< Backup SRAM(4 KB) base address in the alias region                         */
+#define FSMC_R_BASE         0xA0000000	/*!< FSMC registers base address                                                */
+
+#define CCMDATARAM_BB_BASE  0x12000000	/*!< CCM(core coupled memory) data RAM(64 KB) base address in the bit-band region  */
+#define SRAM1_BB_BASE       0x22000000	/*!< SRAM1(112 KB) base address in the bit-band region                             */
+#define SRAM2_BB_BASE       0x2201C000	/*!< SRAM2(16 KB) base address in the bit-band region                              */
+#define PERIPH_BB_BASE      0x42000000	/*!< Peripheral base address in the bit-band region                                */
+#define BKPSRAM_BB_BASE     0x42024000	/*!< Backup SRAM(4 KB) base address in the bit-band region                         */
+
+/*!< Peripheral memory map */
+#define APB1PERIPH_BASE     PERIPH_BASE
+#define APB2PERIPH_BASE     (PERIPH_BASE + 0x00010000)
+#define AHB1PERIPH_BASE     (PERIPH_BASE + 0x00020000)
+#define AHB2PERIPH_BASE     (PERIPH_BASE + 0x10000000)
+
+/*
+ *  TIM
+ */
+#define TADR_TIM2_BASE      (APB1PERIPH_BASE + 0x0000)
+#define TADR_TIM3_BASE      (APB1PERIPH_BASE + 0x0400)
+#define TADR_TIM4_BASE      (APB1PERIPH_BASE + 0x0800)
+#define TADR_TIM5_BASE      (APB1PERIPH_BASE + 0x0C00)
+#define TADR_TIM6_BASE      (APB1PERIPH_BASE + 0x1000)
+#define TADR_TIM7_BASE      (APB1PERIPH_BASE + 0x1400)
+#define TADR_TIM12_BASE     (APB1PERIPH_BASE + 0x1800)
+#define TADR_TIM13_BASE     (APB1PERIPH_BASE + 0x1C00)
+#define TADR_TIM14_BASE     (APB1PERIPH_BASE + 0x2000)
+#define TADR_TIM1_BASE      (APB2PERIPH_BASE + 0x0000)
+#define TADR_TIM8_BASE      (APB2PERIPH_BASE + 0x0400)
+#define TADR_TIM9_BASE      (APB2PERIPH_BASE + 0x4000)
+#define TADR_TIM10_BASE     (APB2PERIPH_BASE + 0x4400)
+#define TADR_TIM11_BASE     (APB2PERIPH_BASE + 0x4800)
+#define TOFF_TIM_CR1        0x0000		/* (RW-16) TIM control register 1 */
+  #define TIM_CR1_CEN        0x0001		/* Counter enable */
+  #define TIM_CR1_UDIS       0x0002		/* Update disable */
+  #define TIM_CR1_URS        0x0004		/* Update request source */
+  #define TIM_CR1_OPM        0x0008		/* One pulse mode */
+  #define TIM_CR1_DIR        0x0010		/* Direction */
+  #define TIM_CR1_CMS_0      0x0020		/* CMS[1:0] bit 0 */
+  #define TIM_CR1_CMS_1      0x0040		/* CMS[1:0] bit 1 */
+  #define TIM_CR1_ARPE       0x0080		/* Auto-reload preload enable */
+  #define TIM_CR1_CKD_0      0x0100		/* CKD[1:0] bit 0 */
+  #define TIM_CR1_CKD_1      0x0200		/* CKD[1:0] bit 1 */
+#define TOFF_TIM_CR2        0x0004		/* (RW-16) TIM control register 2 */
+#define TOFF_TIM_SMCR       0x0008		/* (RW-16) TIM slave mode control register */
+#define TOFF_TIM_DIER       0x000C		/* (RW-16) TIM DMA/interrupt enable register */
+  #define TIM_DIER_UIE       0x0001		/* Update interrupt enable */
+  #define TIM_DIER_CC1IE     0x0002		/* Capture/Compare 1 interrupt enable */
+  #define TIM_DIER_CC2IE     0x0004		/* Capture/Compare 2 interrupt enable */
+  #define TIM_DIER_CC3IE     0x0008		/* Capture/Compare 3 interrupt enable */
+  #define TIM_DIER_CC4IE     0x0010		/* Capture/Compare 4 interrupt enable */
+  #define TIM_DIER_COMIE     0x0020		/* COM interrupt enable */
+  #define TIM_DIER_TIE       0x0040		/* Trigger interrupt enable */
+  #define TIM_DIER_BIE       0x0080		/* Break interrupt enable */
+  #define TIM_DIER_UDE       0x0100		/* Update DMA request enable */
+  #define TIM_DIER_CC1DE     0x0200		/* Capture/Compare 1 DMA request enable */
+  #define TIM_DIER_CC2DE     0x0400		/* Capture/Compare 2 DMA request enable */
+  #define TIM_DIER_CC3DE     0x0800		/* Capture/Compare 3 DMA request enable */
+  #define TIM_DIER_CC4DE     0x1000		/* Capture/Compare 4 DMA request enable */
+  #define TIM_DIER_COMDE     0x2000		/* COM DMA request enable */
+  #define TIM_DIER_TDE       0x4000		/* Trigger DMA request enable */
+#define TOFF_TIM_SR         0x0010		/* (RW-16) TIM status register */
+  #define TIM_SR_UIF         0x0001		/* Update interrupt Flag */
+  #define TIM_SR_CC1IF       0x0002		/* Capture/Compare 1 interrupt Flag */
+  #define TIM_SR_CC2IF       0x0004		/* Capture/Compare 2 interrupt Flag */
+  #define TIM_SR_CC3IF       0x0008		/* Capture/Compare 3 interrupt Flag */
+  #define TIM_SR_CC4IF       0x0010		/* Capture/Compare 4 interrupt Flag */
+  #define TIM_SR_COMIF       0x0020		/* COM interrupt Flag */
+  #define TIM_SR_TIF         0x0040		/* Trigger interrupt Flag */
+  #define TIM_SR_BIF         0x0080		/* Break interrupt Flag */
+  #define TIM_SR_CC1OF       0x0200		/* Capture/Compare 1 Overcapture Flag */
+  #define TIM_SR_CC2OF       0x0400		/* Capture/Compare 2 Overcapture Flag */
+  #define TIM_SR_CC3OF       0x0800		/* Capture/Compare 3 Overcapture Flag */
+  #define TIM_SR_CC4OF       0x1000		/* Capture/Compare 4 Overcapture Flag */
+#define TOFF_TIM_EGR        0x0014		/* (RW-16) TIM event generation register */
+#define TOFF_TIM_CCMR1      0x0018		/* (RW-16) TIM capture/compare mode register 1 */
+#define TOFF_TIM_CCMR2      0x001C		/* (RW-16) TIM capture/compare mode register 2 */
+#define TOFF_TIM_CCER       0x0020		/* (RW-16) TIM capture/compare enable register */
+#define TOFF_TIM_CNT        0x0024		/* (RW)    TIM counter register */
+#define TOFF_TIM_PSC        0x0028		/* (RW-16) TIM prescaler */
+#define TOFF_TIM_ARR        0x002C		/* (RW)    TIM auto-reload register */
+#define TOFF_TIM_RCR        0x0030		/* (RW-16) TIM repetition counter register */
+#define TOFF_TIM_CCR1       0x0034		/* (RW)    TIM capture/compare register 1 */
+#define TOFF_TIM_CCR2       0x0038		/* (RW)    TIM capture/compare register 2 */
+#define TOFF_TIM_CCR3       0x003C		/* (RW)    TIM capture/compare register 3 */
+#define TOFF_TIM_CCR4       0x0040		/* (RW)    TIM capture/compare register 4 */
+#define TOFF_TIM_BDTR       0x0044		/* (RW-16) TIM break and dead-time register */
+#define TOFF_TIM_DCR        0x0048		/* (RW-16) TIM DMA control register */
+#define TOFF_TIM_DMAR       0x004C		/* (RW-16) TIM DMA address for full transfer */
+#define TOFF_TIM_OR         0x0050		/* (RW-16) TIM option register */
+
+/*
+ *  REAL-TIME CLOCK
+ */
+#define TADR_RTC_BASE       (APB1PERIPH_BASE + 0x2800)
+#define TOFF_RTC_TR         0x0000		/* (RW) RTC time register */
+#define TOFF_RTC_DR         0x0004		/* (RW) RTC date register */
+#define TOFF_RTC_CR         0x0008		/* (RW) RTC control register */
+#define TOFF_RTC_ISR        0x000C		/* (RW) RTC initialization and status register */
+#define TOFF_RTC_PRER       0x0010		/* (RW) RTC prescaler register */
+#define TOFF_RTC_WUTR       0x0014		/* (RW) RTC wakeup timer register */
+#define TOFF_RTC_CALIBR     0x0018		/* (RW) RTC calibration register */
+#define TOFF_RTC_ALRMAR     0x001C		/* (RW) RTC alarm A register */
+#define TOFF_RTC_ALRMBR     0x0020		/* (RW) RTC alarm B register */
+#define TOFF_RTC_WPR        0x0024		/* (RW) RTC write protection register */
+#define TOFF_RTC_SSR        0x0028		/* (RW) RTC sub second register */
+#define TOFF_RTC_SHIFTR     0x002C		/* (RW) RTC shift control register */
+#define TOFF_RTC_TSTR       0x0030		/* (RW) RTC time stamp time register */
+#define TOFF_RTC_TSDR       0x0034		/* (RW) RTC time stamp date register */
+#define TOFF_RTC_TSSSR      0x0038		/* (RW) RTC time-stamp sub second register */
+#define TOFF_RTC_CALR       0x003C		/* (RW) RTC calibration register */
+#define TOFF_RTC_TAFCR      0x0040		/* (RW) RTC tamper and alternate function configuration register */
+#define TOFF_RTC_ALRMASSR   0x0044		/* (RW) RTC alarm A sub second register */
+#define TOFF_RTC_ALRMBSSR   0x0048		/* (RW) RTC alarm B sub second register */
+#define TOFF_RTC_BKP0R      0x0050		/* (RW) RTC backup register 0 */
+#define TOFF_RTC_BKP1R      0x0054		/* (RW) RTC backup register 1 */
+#define TOFF_RTC_BKP2R      0x0058		/* (RW) RTC backup register 2 */
+#define TOFF_RTC_BKP3R      0x005C		/* (RW) RTC backup register 3 */
+#define TOFF_RTC_BKP4R      0x0060		/* (RW) RTC backup register 4 */
+#define TOFF_RTC_BKP5R      0x0064		/* (RW) RTC backup register 5 */
+#define TOFF_RTC_BKP6R      0x0068		/* (RW) RTC backup register 6 */
+#define TOFF_RTC_BKP7R      0x006C		/* (RW) RTC backup register 7 */
+#define TOFF_RTC_BKP8R      0x0070		/* (RW) RTC backup register 8 */
+#define TOFF_RTC_BKP9R      0x0074		/* (RW) RTC backup register 9 */
+#define TOFF_RTC_BKP10R     0x0078		/* (RW) RTC backup register 10 */
+#define TOFF_RTC_BKP11R     0x007C		/* (RW) RTC backup register 11 */
+#define TOFF_RTC_BKP12R     0x0080		/* (RW) RTC backup register 12 */
+#define TOFF_RTC_BKP13R     0x0084		/* (RW) RTC backup register 13 */
+#define TOFF_RTC_BKP14R     0x0088		/* (RW) RTC backup register 14 */
+#define TOFF_RTC_BKP15R     0x008C		/* (RW) RTC backup register 15 */
+#define TOFF_RTC_BKP16R     0x0090		/* (RW) RTC backup register 16 */
+#define TOFF_RTC_BKP17R     0x0094		/* (RW) RTC backup register 17 */
+#define TOFF_RTC_BKP18R     0x0098		/* (RW) RTC backup register 18 */
+#define TOFF_RTC_BKP19R     0x009C		/* (RW) RTC backup register 19 */
+
+/*
+ *  WINDOW WATCHDOG
+ */
+#define TADR_WWDG_BASE      (APB1PERIPH_BASE + 0x2C00)
+#define TOFF_WWDG_CR        0x0000		/* (RW) WWDG Control register */
+#define TOFF_WWDG_CFR       0x0004		/* (RW) WWDG Configuration register */
+#define TOFF_WWDG_SR        0x0008		/* (R)  WWDG Status register */
+
+/*
+ *  INDEPENDENT WATCHDOG
+ */
+#define TADR_IWDG_BASE      (APB1PERIPH_BASE + 0x3000)
+#define TOFF_IWDG_KR        0x0000		/* (RW) IWDG Key register */
+#define TOFF_IWDG_PR        0x0004		/* (RW) IWDG Prescaler register */
+#define TOFF_IWDG_RLR       0x0008		/* (RW) IWDG Reload register */
+#define TOFF_IWDG_SR        0x000C		/* (RW) IWDG Status register */
+
+/*
+ *  SERIAL PERIPHERAL IINTERFACE
+ */
+#define TADR_I2S2EXTt_BASE  (APB1PERIPH_BASE + 0x3400)
+#define TADR_SPI2_BASE      (APB1PERIPH_BASE + 0x3800)
+#define TADR_SPI3_BASE      (APB1PERIPH_BASE + 0x3C00)
+#define TADR_I2S3EXT_BASE   (APB1PERIPH_BASE + 0x4000)
+#define TADR_SPI1_BASE      (APB2PERIPH_BASE + 0x3000)
+#define TOFF_SPI_CR1        0x0000		/* (RW-16) SPI control register 1 (not used in I2S mode) */
+#define TOFF_SPI_CR2        0x0004		/* (RW-16) SPI control register 2 */
+#define TOFF_SPI_SR         0x0008		/* (RW-16) SPI status register */
+#define TOFF_SPI_DR         0x000C		/* (RW-16) SPI data register */
+#define TOFF_SPI_CRCPR      0x0010		/* (RW-16) SPI CRC polynomial register (not used in I2S mode) */
+#define TOFF_SPI_RXCRCR     0x0014		/* (RW-16) SPI RX CRC register (not used in I2S mode) */
+#define TOFF_SPI_TXCRCR     0x0018		/* (RW-16) SPI TX CRC register (not used in I2S mode) */
+#define TOFF_SPI_I2SCFGR    0x001C		/* (RW-16) SPI_I2S configuration register */
+#define TOFF_SPI_I2SPR      0x0020		/* (RW-16) SPI_I2S prescaler register */
+
+/*
+ *  UNIVERSAL SYNCHRONOUS ASYNCHORONOUS RECEIVER TRANSMITTER
+ */
+#define TADR_USART2_BASE    (APB1PERIPH_BASE + 0x4400)
+#define TADR_USART3_BASE    (APB1PERIPH_BASE + 0x4800)
+#define TADR_UART4_BASE     (APB1PERIPH_BASE + 0x4C00)
+#define TADR_UART5_BASE     (APB1PERIPH_BASE + 0x5000)
+#define TADR_USART1_BASE    (APB2PERIPH_BASE + 0x1000)
+#define TADR_USART6_BASE    (APB2PERIPH_BASE + 0x1400)
+#define TOFF_USART_SR       0x0000		/* (RW-16) USART Status register */
+  #define USART_SR_PE        0x0001		/* Parity Error */
+  #define USART_SR_FE        0x0002		/* Framing Error */
+  #define USART_SR_NE        0x0004		/* Noise Error Flag */
+  #define USART_SR_ORE       0x0008		/* OverRun Error */
+  #define USART_SR_IDLE      0x0010		/* IDLE line detected */
+  #define USART_SR_RXNE      0x0020		/* Read Data Register Not Empty */
+  #define USART_SR_TC        0x0040		/* Transmission Complete */
+  #define USART_SR_TXE       0x0080		/* Transmit Data Register Empty */
+  #define USART_SR_LBD       0x0100		/* LIN Break Detection Flag */
+  #define USART_SR_CTS       0x0200		/* CTS Flag */
+#define TOFF_USART_DR       0x0004		/* (RW-16) USART Data register */
+#define TOFF_USART_BRR      0x0008		/* (RW-16) USART Baud rate register */
+#define TOFF_USART_CR1      0x000C		/* (RW-16) USART Control register 1 */
+  #define USART_CR1_SBK      0x0001		/* Send Break */
+  #define USART_CR1_RWU      0x0002		/* Receiver wakeup */
+  #define USART_CR1_RE       0x0004		/* Receiver Enable */
+  #define USART_CR1_TE       0x0008		/* Transmitter Enable */
+  #define USART_CR1_IDLEIE   0x0010		/* IDLE Interrupt Enable */
+  #define USART_CR1_RXNEIE   0x0020		/* RXNE Interrupt Enable */
+  #define USART_CR1_TCIE     0x0040		/* Transmission Complete Interrupt Enable */
+  #define USART_CR1_TXEIE    0x0080		/* PE Interrupt Enable */
+  #define USART_CR1_PEIE     0x0100		/* PE Interrupt Enable */
+  #define USART_CR1_PS       0x0200		/* Parity Selection */
+  #define USART_CR1_PCE      0x0400		/* Parity Control Enable */
+  #define USART_CR1_WAKE     0x0800		/* Wakeup method */
+  #define USART_CR1_M        0x1000		/* Word length */
+  #define USART_CR1_UE       0x2000		/* USART Enable */
+  #define USART_CR1_OVER8    0x8000		/* USART Oversampling by 8 enable */
+#define TOFF_USART_CR2      0x0010		/* (RW-16) USART Control register 2 */
+  #define USART_CR2_ADD      0x000F		/* Address of the USART node */
+  #define USART_CR2_LBDL     0x0020		/* LIN Break Detection Length */
+  #define USART_CR2_LBDIE    0x0040		/* LIN Break Detection Interrupt Enable */
+  #define USART_CR2_LBCL     0x0100		/* Last Bit Clock pulse */
+  #define USART_CR2_CPHA     0x0200		/* Clock Phase */
+  #define USART_CR2_CPOL     0x0400		/* Clock Polarity */
+  #define USART_CR2_CLKEN    0x0800		/* Clock Enable */
+  #define USART_CR2_STOP     0x3000		/* STOP[1:0] bits (STOP bits) */
+  #define USART_CR2_STOP_0   0x1000		/* Bit 0 */
+  #define USART_CR2_STOP_1   0x2000		/* Bit 1 */
+  #define USART_CR2_LINEN    0x4000		/* LIN mode enable */
+#define TOFF_USART_CR3      0x0014		/* (RW-16) USART Control register 3 */
+  #define USART_CR3_EIE      0x0001		/* Error Interrupt Enable */
+  #define USART_CR3_IREN     0x0002		/* IrDA mode Enable */
+  #define USART_CR3_IRLP     0x0004		/* IrDA Low-Power */
+  #define USART_CR3_HDSEL    0x0008		/* Half-Duplex Selection */
+  #define USART_CR3_NACK     0x0010		/* Smartcard NACK enable */
+  #define USART_CR3_SCEN     0x0020		/* Smartcard mode enable */
+  #define USART_CR3_DMAR     0x0040		/* DMA Enable Receiver */
+  #define USART_CR3_DMAT     0x0080		/* DMA Enable Transmitter */
+  #define USART_CR3_RTSE     0x0100		/* RTS Enable */
+  #define USART_CR3_CTSE     0x0200		/* CTS Enable */
+  #define USART_CR3_CTSIE    0x0400		/* CTS Interrupt Enable */
+  #define USART_CR3_ONEBIT   0x0800		/* USART One bit method enable */
+#define TOFF_USART_GTPR     0x0018		/* (RW-16) USART Guard time and prescaler register */
+  #define USART_GTPR_PSC     0x00FF		/* PSC[7:0] bits (Prescaler value) */
+  #define USART_GTPR_PSC_0   0x0001		/* Bit 0 */
+  #define USART_GTPR_PSC_1   0x0002		/* Bit 1 */
+  #define USART_GTPR_PSC_2   0x0004		/* Bit 2 */
+  #define USART_GTPR_PSC_3   0x0008		/* Bit 3 */
+  #define USART_GTPR_PSC_4   0x0010		/* Bit 4 */
+  #define USART_GTPR_PSC_5   0x0020		/* Bit 5 */
+  #define USART_GTPR_PSC_6   0x0040		/* Bit 6 */
+  #define USART_GTPR_PSC_7   0x0080		/* Bit 7 */
+  #define USART_GTPR_GT      0xFF00		/* Guard time value */
+
+/*
+ *  INTER-INTERATED CIRCUIT IINTERFACE(16)
+ */
+#define TADR_I2C1_BASE      (APB1PERIPH_BASE + 0x5400)
+#define TADR_I2C2_BASE      (APB1PERIPH_BASE + 0x5800)
+#define TADR_I2C3_BASE      (APB1PERIPH_BASE + 0x5C00)
+#define TOFF_I2C_CR1        0x0000		/* (RW-16) I2C Control register 1 */
+#define TOFF_I2C_CR2        0x0004		/* (RW-16) I2C Control register 2 */
+#define TOFF_I2C_OAR1       0x0008		/* (RW-16) I2C Own address register 1 */
+#define TOFF_I2C_OAR2       0x000C		/* (RW-16) I2C Own address register 2 */
+#define TOFF_I2C_DR         0x0010		/* (RW-16) I2C Data register */
+#define TOFF_I2C_SR1        0x0014		/* (R-16)  I2C Status register 1 */
+#define TOFF_I2C_SR2        0x0018		/* (R-16)  I2C Status register 2 */
+#define TOFF_I2C_CCR        0x001C		/* (RW-16) I2C Clock control register */
+#define TOFF_I2C_TRISE      0x0020		/* (RW-16) I2C TRISE register */
+
+/*
+ *  CONTROLLER AREA NETWORK
+ */
+#define TADR_CAN1_BASE      (APB1PERIPH_BASE + 0x6400)
+#define TADR_CAN2_BASE      (APB1PERIPH_BASE + 0x6800)
+#define TOFF_CAN_MCR        0x0000		/* (RW) CAN master control register */
+#define TOFF_CAN_MSR        0x0004		/* (R)  CAN master status register */
+#define TOFF_CAN_TSR        0x0008		/* (R)  CAN transmit status register */
+#define TOFF_CAN_RF0R       0x000C		/* (RW) CAN receive FIFO 0 register */
+#define TOFF_CAN_RF1R       0x0010		/* (RW) CAN receive FIFO 1 register */
+#define TOFF_CAN_IER        0x0014		/* (RW) CAN interrupt enable register */
+#define TOFF_CAN_ESR        0x0018		/* (RW) CAN error status register */
+#define TOFF_CAN_BTR        0x001C		/* (RW) CAN bit timing register */
+										/* CAN TX MailBox */
+#define TOFF_CAN_TIR1       0x0180		/* (RW) CAN(1) TX mailbox identifier register */
+#define TOFF_CAN_TDTR1      0x0184		/* (RW) CAN(1) mailbox data length control and time stamp register */
+#define TOFF_CAN_TDLR1      0x0188		/* (RW) CAN(1) mailbox data low register */
+#define TOFF_CAN_TDHR1      0x018C		/* (RW) CAN(1) mailbox data high register */
+#define TOFF_CAN_TIR2       0x0190		/* (RW) CAN(2) TX mailbox identifier register */
+#define TOFF_CAN_TDTR2      0x0194		/* (RW) CAN(2) mailbox data length control and time stamp register */
+#define TOFF_CAN_TDLR2      0x0198		/* (RW) CAN(2) mailbox data low register */
+#define TOFF_CAN_TDHR2      0x019C		/* (RW) CAN(2) mailbox data high register */
+#define TOFF_CAN_TIR3       0x01A0		/* (RW) CAN(3) TX mailbox identifier register */
+#define TOFF_CAN_TDTR3      0x01A4		/* (RW) CAN(3) mailbox data length control and time stamp register */
+#define TOFF_CAN_TDLR3      0x01A8		/* (RW) CAN(3) mailbox data low register */
+#define TOFF_CAN_TDHR3      0x01AC		/* (RW) CAN(3) mailbox data high register */
+										/* CAN FIFO MailBox */
+#define TOFF_CAN_RIR1       0x01B0		/* (RW) CAN(1) receive FIFO mailbox identifier register */
+#define TOFF_CAN_RDTR1      0x01B4		/* (RW) CAN(1) receive FIFO mailbox data length control and time stamp register */
+#define TOFF_CAN_RDLR1      0x01B8		/* (RW) CAN(1) receive FIFO mailbox data low register */
+#define TOFF_CAN_RDHR1      0x01BC		/* (RW) CAN(1) receive FIFO mailbox data high register */
+#define TOFF_CAN_RIR2       0x01C0		/* (RW) CAN(2) receive FIFO mailbox identifier register */
+#define TOFF_CAN_RDTR2      0x01C4		/* (RW) CAN(2) receive FIFO mailbox data length control and time stamp register */
+#define TOFF_CAN_RDLR2      0x01C8		/* (RW) CAN(2) receive FIFO mailbox data low register */
+#define TOFF_CAN_RDHR2      0x01CC		/* (RW) CAN(2) receive FIFO mailbox data high register */
+#define TOFF_CAN_FMR        0x0200		/* (RW) CAN filter master register */
+#define TOFF_CAN_FM1R       0x0204		/* (RW) CAN filter mode register */
+#define TOFF_CAN_FS1R       0x020C		/* (RW) CAN filter scale register */
+#define TOFF_CAN_FFA1R      0x0214		/* (RW) CAN filter FIFO assignment register */
+#define TOFF_CAN_FA1R       0x0218		/* (RW) CAN filter activation register */
+#define TOFF_CAN_FR_BASE    0x0240
+#define TOFF_CAN_FR1        0x0240		/* (RW) CAN Filter bank register 1 */
+#define TOFF_CAN_FR2        0x0244		/* (RW) CAN Filter bank register 1 */
+
+/*
+ *  POWER CONTROL
+ */
+#define TADR_PWR_BASE       (APB1PERIPH_BASE + 0x7000)
+#define TOFF_PWR_CR         0x0000		/* (RW) PWR power control register */
+  #define PWR_CR_LPDS              0x00000001	/* Low-Power Deepsleep */
+  #define PWR_CR_PDDS              0x00000002	/* Power Down Deepsleep */
+  #define PWR_CR_CWUF              0x00000004	/* Clear Wakeup Flag */
+  #define PWR_CR_CSBF              0x00000008	/* Clear Standby Flag */
+  #define PWR_CR_PVDE              0x00000010	/* Power Voltage Detector Enable */
+  #define PWR_CR_PLS_0             0x00000020	/* Bit 0 */
+  #define PWR_CR_PLS_1             0x00000040	/* Bit 1 */
+  #define PWR_CR_PLS_2             0x00000080	/* Bit 2 */
+  #define PWR_CR_DBP               0x00000100	/* Disable Backup Domain write protection */
+  #define PWR_CR_FPDS              0x00000200	/* Flash power down in Stop mode */
+  #define PWR_CR_VOS               0x00004000	/* Regulator voltage scaling output selection */
+  #define PWR_CR_ODEN              0x00010000	/*  Over Drive enable */
+  #define PWR_CR_ODSWEN            0x00020000	/* Over Drive switch enabled */
+  #define PWR_CR_UDEN_0            0x00040000	/* Under Drive enable in stop mode Bit 0 */
+  #define PWR_CR_UDEN_1            0x00080000	/* Under Drive enable in stop mode Bit 1 */
+  /* Legacy define */
+  #define PWR_CR_PMODE             PWR_CR_VOS
+#define TOFF_PWR_CSR        0x0004		/* (RW) PWR power control/status register */
+  #define PWR_CSR_WUF              0x00000001	/* Wakeup Flag */
+  #define PWR_CSR_SBF              0x00000002	/* Standby Flag */
+  #define PWR_CSR_PVDO             0x00000004	/* PVD Output */
+  #define PWR_CSR_BRR              0x00000008	/* Backup regulator ready */
+  #define PWR_CSR_EWUP             0x00000100	/* Enable WKUP pin */
+  #define PWR_CSR_BRE              0x00000200	/* Backup regulator enable */
+  #define PWR_CSR_VOSRDY           0x00004000	/* Regulator voltage scaling output selection ready */
+  #define PWR_CSR_ODRDY            0x00010000	/* Over Drive generator ready */
+  #define PWR_CSR_ODSWRDY          0x00020000	/* Over Drive Switch ready */
+  #define PWR_CSR_UDSWRDY          0x000C0000	/* Under Drive ready */
+  /* Legacy define */
+  #define PWR_CSR_REGRDY           PWR_CSR_VOSRDY
+
+/*
+ *  DIGITAL TO ANALOG CONVTER
+ */
+#define TADR_DAC_BASE       (APB1PERIPH_BASE + 0x7400)
+#define TOFF_DAC_CR         0x0000		/* (RW) DAC control register */
+#define TOFF_DAC_SWTRIGR	0x0004		/* (RW) DAC software trigger register */
+#define TOFF_DAC_DHR12R1    0x0008		/* (RW) DAC channel1 12-bit right-aligned data holding register */
+#define TOFF_DAC_DHR12L1    0x000C		/* (RW) DAC channel1 12-bit left aligned data holding register */
+#define TOFF_DAC_DHR8R1     0x0010		/* (RW) DAC channel1 8-bit right aligned data holding register */
+#define TOFF_DAC_DHR12R2    0x0014		/* (RW) DAC channel2 12-bit right aligned data holding register */
+#define TOFF_DAC_DHR12L2    0x0018		/* (RW) DAC channel2 12-bit left aligned data holding register */
+#define TOFF_DAC_DHR8R2     0x001C		/* (RW) DAC channel2 8-bit right-aligned data holding register */
+#define TOFF_DAC_DHR12RD    0x0020		/* (RW) Dual DAC 12-bit right-aligned data holding register */
+#define TOFF_DAC_DHR12LD    0x0024		/* (RW) DUAL DAC 12-bit left aligned data holding register */
+#define TOFF_DAC_DHR8RD     0x0028		/* (RW) DUAL DAC 8-bit right aligned data holding register */
+#define TOFF_DAC_DOR1       0x002C		/* (RW) DAC channel1 data output register */
+#define TOFF_DAC_DOR2       0x0030		/* (RW) DAC channel2 data output register */
+#define TOFF_DAC_SR         0x0034		/* (RW) DAC status register */
+
+
+/*
+ *  ANALOG TO DIGITAL CONVERTER
+ */
+#define TADR_ADC1_BASE      (APB2PERIPH_BASE + 0x2000)
+#define TADR_ADC2_BASE      (APB2PERIPH_BASE + 0x2100)
+#define TADR_ADC3_BASE      (APB2PERIPH_BASE + 0x2200)
+#define TOFF_ADC_SR         0x0000		/* (RW) ADC status register */
+#define TOFF_ADC_CR1        0x0004		/* (RW) ADC control register 1 */
+#define TOFF_ADC_CR2        0x0008		/* (RW) ADC control register 2 */
+#define TOFF_ADC_SMPR1      0x000C		/* (RW) ADC sample time register 1 */
+#define TOFF_ADC_SMPR2      0x0010		/* (RW) ADC sample time register 2 */
+#define TOFF_ADC_JOFR1      0x0014		/* (RW) ADC injected channel data offset register 1 */
+#define TOFF_ADC_JOFR2      0x0018		/* (RW) ADC injected channel data offset register 2 */
+#define TOFF_ADC_JOFR3      0x001C		/* (RW) ADC injected channel data offset register 3 */
+#define TOFF_ADC_JOFR4      0x0020		/* (RW) ADC injected channel data offset register 4 */
+#define TOFF_ADC_HTR        0x0024		/* (RW) ADC watchdog higher threshold register */
+#define TOFF_ADC_LTR        0x0028		/* (RW) ADC watchdog lower threshold register */
+#define TOFF_ADC_SQR1       0x002C		/* (RW) ADC regular sequence register 1 */
+#define TOFF_ADC_SQR2       0x0030		/* (RW) ADC regular sequence register 2 */
+#define TOFF_ADC_SQR3       0x0034		/* (RW) ADC regular sequence register 3 */
+#define TOFF_ADC_JSQR       0x0038		/* (RW) ADC injected sequence register */
+#define TOFF_ADC_JDR1       0x003C		/* (RW) ADC injected data register 1 */
+#define TOFF_ADC_JDR2       0x0040		/* (RW) ADC injected data register 2 */
+#define TOFF_ADC_JDR3       0x0044		/* (RW) ADC injected data register 3 */
+#define TOFF_ADC_JDR4       0x0048		/* (RW) ADC injected data register 4 */
+#define TOFF_ADC_DR         0x004C		/* (RW) ADC regular data register */
+
+#define TADR_ADC_BASE       (APB2PERIPH_BASE + 0x2300)
+#define TOFF_ADC_CSR        0x0000		/* (RW) ADC Common status register */
+#define TOFF_ADC_CCR        0x0004		/* (RW) ADC common control register */
+#define TOFF_ADC_CDR        0x0008		/* (RW) ADC common regular data register for dual AND triple modes */
+
+/*
+ *  SD HOST INTERFACE
+ */
+#define TADR_SDIO_BASE      (APB2PERIPH_BASE + 0x2C00)
+#define TOFF_SDIO_POWER     0x0000		/* (RW) SDIO power control register */
+#define TOFF_SDIO_CLKCR     0x0004		/* (RW) SDI clock control register */
+#define TOFF_SDIO_ARG       0x0008		/* (RW) SDIO argument register */
+#define TOFF_SDIO_CMD       0x000C		/* (RW) SDIO command register */
+#define TOFF_SDIO_RESPCMD   0x0018		/* (R)  SDIO command response register */
+#define TOFF_SDIO_RESP      0x0014		/* (R)  SDIO response 1 register */
+#define TOFF_SDIO_RESP2     0x0018		/* (R)  SDIO response 2 register */
+#define TOFF_SDIO_RESP3     0x001C		/* (R)  SDIO response 3 register */
+#define TOFF_SDIO_RESP4     0x0020		/* (R)  SDIO response 4 register */
+#define TOFF_SDIO_DTIMER    0x0024		/* (RW) SDIO data timer register */
+#define TOFF_SDIO_DLEN      0x0028		/* (RW) SDIO data length register */
+#define TOFF_SDIO_DCTRL     0x002C		/* (RW) SDIO data control register */
+#define TOFF_SDIO_DCOUNT    0x0030		/* (R)  SDIO data counter register */
+#define TOFF_SDIO_STA       0x0034		/* (R)  SDIO status register */
+#define TOFF_SDIO_ICR       0x0038		/* (RW) SDIO interrupt clear register */
+#define TOFF_SDIO_MASK      0x003C		/* (RW) SDIO mask register */
+#define TOFF_SDIO_FIFOCNT   0x0048		/* (R)  SDIO FIFO counter register */
+#define TOFF_SDIO_FIFO      0x0080		/* (RW) SDIO data FIFO register */
+
+/*
+ *  SYSTEM CONFIGURATION CONTROLLER
+ */
+#define TADR_SYSCFG_BASE    (APB2PERIPH_BASE + 0x3800)
+#define TOFF_SYSCFG_MEMRMP  0x0000		/* (RW) SYSCFG memory remap register */
+#define TOFF_SYSCFG_PMC     0x0004		/* (RW) SYSCFG peripheral mode configuration register */
+#define TOFF_SYSCFG_EXTICR0 0x0008		/* (RW) SYSCFG external interrupt configuration registers 0 */
+#define TOFF_SYSCFG_EXTICR1 0x000C		/* (RW) SYSCFG external interrupt configuration registers 1 */
+#define TOFF_SYSCFG_EXTICR2 0x0010		/* (RW) SYSCFG external interrupt configuration registers 2 */
+#define TOFF_SYSCFG_EXTICR3 0x0014		/* (RW) SYSCFG external interrupt configuration registers 3 */
+#define TOFF_SYSCFG_CMPCR   0x0020		/* (RW) SYSCFG Compensation cell control register */
+
+/*
+ *  EXTERNAL INTERRUPT/EVENT CONTROLLER
+ */
+#define TADR_EXTI_BASE      (APB2PERIPH_BASE + 0x3C00)
+#define TOFF_EXTI_IMR       0x0000		/* (RW) EXTI Interrupt mask register */
+#define TOFF_EXTI_EMR       0x0004		/* (RW) EXTI Event mask register */
+#define TOFF_EXTI_RTSR      0x0008		/* (RW) EXTI Rising trigger selection register */
+#define TOFF_EXTI_FTSR      0x000C		/* (RW) EXTI Falling trigger selection register */
+#define TOFF_EXTI_SWIER     0x0010		/* (RW) EXTI Software interrupt event register */
+#define TOFF_EXTI_PR        0x0014		/* (RW) EXTI Pending register */
+
+/*
+ *  GENERAL PURPOSE I/O
+ */
+#define TADR_GPIOA_BASE     (AHB1PERIPH_BASE + 0x0000)
+#define TADR_GPIOB_BASE     (AHB1PERIPH_BASE + 0x0400)
+#define TADR_GPIOC_BASE     (AHB1PERIPH_BASE + 0x0800)
+#define TADR_GPIOD_BASE     (AHB1PERIPH_BASE + 0x0C00)
+#define TADR_GPIOE_BASE     (AHB1PERIPH_BASE + 0x1000)
+#define TADR_GPIOF_BASE     (AHB1PERIPH_BASE + 0x1400)
+#define TADR_GPIOG_BASE     (AHB1PERIPH_BASE + 0x1800)
+#define TADR_GPIOH_BASE     (AHB1PERIPH_BASE + 0x1C00)
+#define TADR_GPIOI_BASE     (AHB1PERIPH_BASE + 0x2000)
+#define TOFF_GPIO_MODER     0x0000		/* (RW) GPIO port mode register */
+  #define GPIO_MODER_MODER0  0x1
+  #define GPIO_MODER_MODER1  0x2
+  #define GPIO_MODER_MODER2  0x3
+#define TOFF_GPIO_OTYPER    0x0004		/* (RW) GPIO port output type register */
+  #define GPIO_OTYPER_OT     0x1
+#define TOFF_GPIO_OSPEEDR   0x0008		/* (RW) GPIO port output speed register */
+  #define GPIO_OSPEEDER_OSPEEDR0 0x1
+  #define GPIO_OSPEEDER_OSPEEDR1 0x2
+  #define GPIO_OSPEEDER_OSPEEDR2 0x3
+#define TOFF_GPIO_PUPDR     0x000C		/* (RW) GPIO port pull-up/pull-down register */
+  #define GPIO_PUPDR_PUPDR0  0x1
+  #define GPIO_PUPDR_PUPDR1  0x2
+  #define GPIO_PUPDR_PUPDR2  0x3
+#define TOFF_GPIO_IDR       0x0010		/* (R)  GPIO port input data register */
+#define TOFF_GPIO_ODR       0x0014		/* (RW) GPIO port output data register */
+#define TOFF_GPIO_BSRRL     0x0018		/* (RW-16) GPIO port bit set/reset low register */
+#define TOFF_GPIO_BSRRH     0x001A		/* (RW-16) GPIO port bit set/reset high register */
+#define TOFF_GPIO_LCKR      0x001C		/* (RW) GPIO port configuration lock register */
+#define TOFF_GPIO_AFR0      0x0020		/* (RW) GPIO alternate function registers */
+#define TOFF_GPIO_AFR1      0x0024		/* (RW) GPIO alternate function registers */
+
+/*
+ *  CRC CALCULATION UNIT
+ */
+#define TADR_CRC_BASE       (AHB1PERIPH_BASE + 0x3000)
+#define TOFF_CRC_DR         0x0000		/* (RW) CRC Data register */
+#define TOFF_CRC_IDR        0x0004		/* (RW-8) CRC Independent data register */
+#define TOFF_CRC_CR         0x0008		/* (RW) CRC Control register */
+
+/*
+ *  RESET AND CLOCK CONTROL
+ */
+#define TADR_RCC_BASE       (AHB1PERIPH_BASE + 0x3800)
+#define TOFF_RCC_CR         0x0000		/* (RW) RCC clock control register */
+  #define RCC_CR_HSION             0x00000001
+  #define RCC_CR_HSIRDY            0x00000002
+  #define RCC_CR_HSITRIM_0         0x00000008	/* Bit 0 */
+  #define RCC_CR_HSITRIM_1         0x00000010	/* Bit 1 */
+  #define RCC_CR_HSITRIM_2         0x00000020	/* Bit 2 */
+  #define RCC_CR_HSITRIM_3         0x00000040	/* Bit 3 */
+  #define RCC_CR_HSITRIM_4         0x00000080	/* Bit 4 */
+  #define RCC_CR_HSICAL_0          0x00000100	/* Bit 0 */
+  #define RCC_CR_HSICAL_1          0x00000200	/* Bit 1 */
+  #define RCC_CR_HSICAL_2          0x00000400	/* Bit 2 */
+  #define RCC_CR_HSICAL_3          0x00000800	/* Bit 3 */
+  #define RCC_CR_HSICAL_4          0x00001000	/* Bit 4 */
+  #define RCC_CR_HSICAL_5          0x00002000	/* Bit 5 */
+  #define RCC_CR_HSICAL_6          0x00004000	/* Bit 6 */
+  #define RCC_CR_HSICAL_7          0x00008000	/* Bit 7 */
+  #define RCC_CR_HSEON             0x00010000
+  #define RCC_CR_HSERDY            0x00020000
+  #define RCC_CR_HSEBYP            0x00040000
+  #define RCC_CR_CSSON             0x00080000
+  #define RCC_CR_PLLON             0x01000000
+  #define RCC_CR_PLLRDY            0x02000000
+  #define RCC_CR_PLLI2SON          0x04000000
+  #define RCC_CR_PLLI2SRDY         0x08000000
+#define TOFF_RCC_PLLCFGR    0x0004		/* (RW) RCC PLL configuration register */
+  #define  RCC_PLLCFGR_PLLM_0      0x00000001
+  #define  RCC_PLLCFGR_PLLM_1      0x00000002
+  #define  RCC_PLLCFGR_PLLM_2      0x00000004
+  #define  RCC_PLLCFGR_PLLM_3      0x00000008
+  #define  RCC_PLLCFGR_PLLM_4      0x00000010
+  #define  RCC_PLLCFGR_PLLM_5      0x00000020
+  #define  RCC_PLLCFGR_PLLN_0      0x00000040
+  #define  RCC_PLLCFGR_PLLN_1      0x00000080
+  #define  RCC_PLLCFGR_PLLN_2      0x00000100
+  #define  RCC_PLLCFGR_PLLN_3      0x00000200
+  #define  RCC_PLLCFGR_PLLN_4      0x00000400
+  #define  RCC_PLLCFGR_PLLN_5      0x00000800
+  #define  RCC_PLLCFGR_PLLN_6      0x00001000
+  #define  RCC_PLLCFGR_PLLN_7      0x00002000
+  #define  RCC_PLLCFGR_PLLN_8      0x00004000
+  #define  RCC_PLLCFGR_PLLP_0      0x00010000
+  #define  RCC_PLLCFGR_PLLP_1      0x00020000
+  #define  RCC_PLLCFGR_PLLSRC_HSE  0x00400000
+  #define  RCC_PLLCFGR_PLLSRC_HSI  0x00000000
+  #define  RCC_PLLCFGR_PLLQ_0      0x01000000
+  #define  RCC_PLLCFGR_PLLQ_1      0x02000000
+  #define  RCC_PLLCFGR_PLLQ_2      0x04000000
+  #define  RCC_PLLCFGR_PLLQ_3      0x08000000
+#define TOFF_RCC_CFGR       0x0008		/* (RW) RCC clock configuration register */
+  #define RCC_CFGR_SW_0            0x00000001	/* Bit 0 */
+  #define RCC_CFGR_SW_1            0x00000002	/* Bit 1 */
+  #define RCC_CFGR_SW_HSI          0x00000000	/* HSI selected as system clock */
+  #define RCC_CFGR_SW_HSE          0x00000001	/* HSE selected as system clock */
+  #define RCC_CFGR_SW_PLL          0x00000002	/* PLL selected as system clock */
+  #define RCC_CFGR_SWS_0           0x00000004	/* Bit 0 */
+  #define RCC_CFGR_SWS_1           0x00000008	/* Bit 1 */
+  #define RCC_CFGR_SWS_HSI         0x00000000	/* HSI oscillator used as system clock */
+  #define RCC_CFGR_SWS_HSE         0x00000004	/* HSE oscillator used as system clock */
+  #define RCC_CFGR_SWS_PLL         0x00000008	/* PLL used as system clock */
+  #define RCC_CFGR_HPRE_0          0x00000010	/* Bit 0 */
+  #define RCC_CFGR_HPRE_1          0x00000020	/* Bit 1 */
+  #define RCC_CFGR_HPRE_2          0x00000040	/* Bit 2 */
+  #define RCC_CFGR_HPRE_3          0x00000080	/* Bit 3 */
+  #define RCC_CFGR_HPRE_DIV1       0x00000000	/* SYSCLK not divided */
+  #define RCC_CFGR_HPRE_DIV2       0x00000080	/* SYSCLK divided by 2 */
+  #define RCC_CFGR_HPRE_DIV4       0x00000090	/* SYSCLK divided by 4 */
+  #define RCC_CFGR_HPRE_DIV8       0x000000A0	/* SYSCLK divided by 8 */
+  #define RCC_CFGR_HPRE_DIV16      0x000000B0	/* SYSCLK divided by 16 */
+  #define RCC_CFGR_HPRE_DIV64      0x000000C0	/* SYSCLK divided by 64 */
+  #define RCC_CFGR_HPRE_DIV128     0x000000D0	/* SYSCLK divided by 128 */
+  #define RCC_CFGR_HPRE_DIV256     0x000000E0	/* SYSCLK divided by 256 */
+  #define RCC_CFGR_HPRE_DIV512     0x000000F0	/* SYSCLK divided by 512 */
+  #define RCC_CFGR_PPRE1_0         0x00000400	/* Bit 0 */
+  #define RCC_CFGR_PPRE1_1         0x00000800	/* Bit 1 */
+  #define RCC_CFGR_PPRE1_2         0x00001000	/* Bit 2 */
+  #define RCC_CFGR_PPRE1_DIV1      0x00000000	/* HCLK not divided */
+  #define RCC_CFGR_PPRE1_DIV2      0x00001000	/* HCLK divided by 2 */
+  #define RCC_CFGR_PPRE1_DIV4      0x00001400	/* HCLK divided by 4 */
+  #define RCC_CFGR_PPRE1_DIV8      0x00001800	/* HCLK divided by 8 */
+  #define RCC_CFGR_PPRE1_DIV16     0x00001C00	/* HCLK divided by 16 */
+  #define RCC_CFGR_PPRE2_0         0x00002000	/* Bit 0 */
+  #define RCC_CFGR_PPRE2_1         0x00004000	/* Bit 1 */
+  #define RCC_CFGR_PPRE2_2         0x00008000	/* Bit 2 */
+  #define RCC_CFGR_PPRE2_DIV1      0x00000000	/* HCLK not divided */
+  #define RCC_CFGR_PPRE2_DIV2      0x00008000	/* HCLK divided by 2 */
+  #define RCC_CFGR_PPRE2_DIV4      0x0000A000	/* HCLK divided by 4 */
+  #define RCC_CFGR_PPRE2_DIV8      0x0000C000	/* HCLK divided by 8 */
+  #define RCC_CFGR_PPRE2_DIV16     0x0000E000	/* HCLK divided by 16 */
+  #define RCC_CFGR_RTCPRE_0        0x00010000
+  #define RCC_CFGR_RTCPRE_1        0x00020000
+  #define RCC_CFGR_RTCPRE_2        0x00040000
+  #define RCC_CFGR_RTCPRE_3        0x00080000
+  #define RCC_CFGR_RTCPRE_4        0x00100000
+  #define RCC_CFGR_MCO1_0          0x00200000
+  #define RCC_CFGR_MCO1_1          0x00400000
+  #define RCC_CFGR_I2SSRC          0x00800000
+  #define RCC_CFGR_MCO1PRE_0       0x01000000
+  #define RCC_CFGR_MCO1PRE_1       0x02000000
+  #define RCC_CFGR_MCO1PRE_2       0x04000000
+  #define RCC_CFGR_MCO2PRE_0       0x08000000
+  #define RCC_CFGR_MCO2PRE_1       0x10000000
+  #define RCC_CFGR_MCO2PRE_2       0x20000000
+  #define RCC_CFGR_MCO2_0          0x40000000
+  #define RCC_CFGR_MCO2_1          0x80000000
+#define TOFF_RCC_CIR        0x000C		/* (RW) RCC clock interrupt register */
+  #define RCC_CIR_LSIRDYF          0x00000001
+  #define RCC_CIR_LSERDYF          0x00000002
+  #define RCC_CIR_HSIRDYF          0x00000004
+  #define RCC_CIR_HSERDYF          0x00000008
+  #define RCC_CIR_PLLRDYF          0x00000010
+  #define RCC_CIR_PLLI2SRDYF       0x00000020
+  #define RCC_CIR_CSSF             0x00000080
+  #define RCC_CIR_LSIRDYIE         0x00000100
+  #define RCC_CIR_LSERDYIE         0x00000200
+  #define RCC_CIR_HSIRDYIE         0x00000400
+  #define RCC_CIR_HSERDYIE         0x00000800
+  #define RCC_CIR_PLLRDYIE         0x00001000
+  #define RCC_CIR_PLLI2SRDYIE      0x00002000
+  #define RCC_CIR_LSIRDYC          0x00010000
+  #define RCC_CIR_LSERDYC          0x00020000
+  #define RCC_CIR_HSIRDYC          0x00040000
+  #define RCC_CIR_HSERDYC          0x00080000
+  #define RCC_CIR_PLLRDYC          0x00100000
+  #define RCC_CIR_PLLI2SRDYC       0x00200000
+  #define RCC_CIR_CSSC             0x00800000
+#define TOFF_RCC_AHB1RSTR   0x0010		/* (RW) RCC AHB1 peripheral reset register */
+  #define RCC_AHB1RSTR_GPIOARST    0x00000001
+  #define RCC_AHB1RSTR_GPIOBRST    0x00000002
+  #define RCC_AHB1RSTR_GPIOCRST    0x00000004
+  #define RCC_AHB1RSTR_GPIODRST    0x00000008
+  #define RCC_AHB1RSTR_GPIOERST    0x00000010
+  #define RCC_AHB1RSTR_GPIOFRST    0x00000020
+  #define RCC_AHB1RSTR_GPIOGRST    0x00000040
+  #define RCC_AHB1RSTR_GPIOHRST    0x00000080
+  #define RCC_AHB1RSTR_GPIOIRST    0x00000100
+  #define RCC_AHB1RSTR_CRCRST      0x00001000
+  #define RCC_AHB1RSTR_DMA1RST     0x00200000
+  #define RCC_AHB1RSTR_DMA2RST     0x00400000
+  #define RCC_AHB1RSTR_ETHMACRST   0x02000000
+  #define RCC_AHB1RSTR_OTGHRST     0x10000000
+#define TOFF_RCC_AHB2RSTR   0x0014		/* (RW) RCC AHB2 peripheral reset register */
+  #define RCC_AHB2RSTR_DCMIRST     0x00000001
+  #define RCC_AHB2RSTR_CRYPRST     0x00000010
+  #define RCC_AHB2RSTR_HSAHRST     0x00000020
+  #define RCC_AHB2RSTR_RNGRST      0x00000040
+  #define RCC_AHB2RSTR_OTGFSRST    0x00000080
+#define TOFF_RCC_AHB3RSTR   0x0018		/* (RW) RCC AHB3 peripheral reset register */
+  #define RCC_AHB3RSTR_FSMCRST     0x00000001
+#define TOFF_RCC_APB1RSTR   0x0020		/* (RW) RCC APB1 peripheral reset register */
+  #define RCC_APB1RSTR_TIM2RST     0x00000001
+  #define RCC_APB1RSTR_TIM3RST     0x00000002
+  #define RCC_APB1RSTR_TIM4RST     0x00000004
+  #define RCC_APB1RSTR_TIM5RST     0x00000008
+  #define RCC_APB1RSTR_TIM6RST     0x00000010
+  #define RCC_APB1RSTR_TIM7RST     0x00000020
+  #define RCC_APB1RSTR_TIM12RST    0x00000040
+  #define RCC_APB1RSTR_TIM13RST    0x00000080
+  #define RCC_APB1RSTR_TIM14RST    0x00000100
+  #define RCC_APB1RSTR_WWDGEN      0x00000800
+  #define RCC_APB1RSTR_SPI2RST     0x00008000
+  #define RCC_APB1RSTR_SPI3RST     0x00010000
+  #define RCC_APB1RSTR_USART2RST   0x00020000
+  #define RCC_APB1RSTR_USART3RST   0x00040000
+  #define RCC_APB1RSTR_UART4RST    0x00080000
+  #define RCC_APB1RSTR_UART5RST    0x00100000
+  #define RCC_APB1RSTR_I2C1RST     0x00200000
+  #define RCC_APB1RSTR_I2C2RST     0x00400000
+  #define RCC_APB1RSTR_I2C3RST     0x00800000
+  #define RCC_APB1RSTR_CAN1RST     0x02000000
+  #define RCC_APB1RSTR_CAN2RST     0x04000000
+  #define RCC_APB1RSTR_PWRRST      0x10000000
+  #define RCC_APB1RSTR_DACRST      0x20000000
+#define TOFF_RCC_APB2RSTR   0x0024		/* (RW) RCC APB2 peripheral reset register */
+  #define RCC_APB2RSTR_TIM1RST     0x00000001
+  #define RCC_APB2RSTR_TIM8RST     0x00000002
+  #define RCC_APB2RSTR_USART1RST   0x00000010
+  #define RCC_APB2RSTR_USART6RST   0x00000020
+  #define RCC_APB2RSTR_ADCRST      0x00000100
+  #define RCC_APB2RSTR_SDIORST     0x00000800
+  #define RCC_APB2RSTR_SPI1RST     0x00001000
+  #define RCC_APB2RSTR_SYSCFGRST   0x00004000
+  #define RCC_APB2RSTR_TIM9RST     0x00010000
+  #define RCC_APB2RSTR_TIM10RST    0x00020000
+  #define RCC_APB2RSTR_TIM11RST    0x00040000
+  /* Old SPI1RST bit definition, maintained for legacy purpose */
+  #define RCC_APB2RSTR_SPI1        RCC_APB2RSTR_SPI1RST
+#define TOFF_RCC_AHB1ENR    0x0030		/* (RW) RCC AHB1 peripheral clock register */
+  #define RCC_AHB1ENR_GPIOAEN      0x00000001
+  #define RCC_AHB1ENR_GPIOBEN      0x00000002
+  #define RCC_AHB1ENR_GPIOCEN      0x00000004
+  #define RCC_AHB1ENR_GPIODEN      0x00000008
+  #define RCC_AHB1ENR_GPIOEEN      0x00000010
+  #define RCC_AHB1ENR_GPIOFEN      0x00000020
+  #define RCC_AHB1ENR_GPIOGEN      0x00000040
+  #define RCC_AHB1ENR_GPIOHEN      0x00000080
+  #define RCC_AHB1ENR_GPIOIEN      0x00000100
+  #define RCC_AHB1ENR_CRCEN        0x00001000
+  #define RCC_AHB1ENR_BKPSRAMEN    0x00040000
+  #define RCC_AHB1ENR_CCMDATARAMEN 0x00100000
+  #define RCC_AHB1ENR_DMA1EN       0x00200000
+  #define RCC_AHB1ENR_DMA2EN       0x00400000
+  #define RCC_AHB1ENR_ETHMACEN     0x02000000
+  #define RCC_AHB1ENR_ETHMACTXEN   0x04000000
+  #define RCC_AHB1ENR_ETHMACRXEN   0x08000000
+  #define RCC_AHB1ENR_ETHMACPTPEN  0x10000000
+  #define RCC_AHB1ENR_OTGHSEN      0x20000000
+  #define RCC_AHB1ENR_OTGHSULPIEN  0x40000000
+#define TOFF_RCC_AHB2ENR    0x0034		/* (RW) RCC AHB2 peripheral clock register */
+  #define RCC_AHB2ENR_DCMIEN       0x00000001
+  #define RCC_AHB2ENR_CRYPEN       0x00000010
+  #define RCC_AHB2ENR_HASHEN       0x00000020
+  #define RCC_AHB2ENR_RNGEN        0x00000040
+  #define RCC_AHB2ENR_OTGFSEN      0x00000080
+#define TOFF_RCC_AHB3ENR    0x0038		/* (RW) RCC AHB3 peripheral clock register */
+  #define RCC_AHB3ENR_FSMCEN       0x00000001
+#define TOFF_RCC_APB1ENR    0x0040		/* (RW) RCC APB1 peripheral clock enable register */
+  #define RCC_APB1ENR_TIM2EN       0x00000001
+  #define RCC_APB1ENR_TIM3EN       0x00000002
+  #define RCC_APB1ENR_TIM4EN       0x00000004
+  #define RCC_APB1ENR_TIM5EN       0x00000008
+  #define RCC_APB1ENR_TIM6EN       0x00000010
+  #define RCC_APB1ENR_TIM7EN       0x00000020
+  #define RCC_APB1ENR_TIM12EN      0x00000040
+  #define RCC_APB1ENR_TIM13EN      0x00000080
+  #define RCC_APB1ENR_TIM14EN      0x00000100
+  #define RCC_APB1ENR_WWDGEN       0x00000800
+  #define RCC_APB1ENR_SPI2EN       0x00004000
+  #define RCC_APB1ENR_SPI3EN       0x00008000
+  #define RCC_APB1ENR_USART2EN     0x00020000
+  #define RCC_APB1ENR_USART3EN     0x00040000
+  #define RCC_APB1ENR_UART4EN      0x00080000
+  #define RCC_APB1ENR_UART5EN      0x00100000
+  #define RCC_APB1ENR_I2C1EN       0x00200000
+  #define RCC_APB1ENR_I2C2EN       0x00400000
+  #define RCC_APB1ENR_I2C3EN       0x00800000
+  #define RCC_APB1ENR_CAN1EN       0x02000000
+  #define RCC_APB1ENR_CAN2EN       0x04000000
+  #define RCC_APB1ENR_PWREN        0x10000000
+  #define RCC_APB1ENR_DACEN        0x20000000
+#define TOFF_RCC_APB2ENR    0x0044		/* (RW) RCC APB2 peripheral clock enable register */
+  #define RCC_APB2ENR_TIM1EN       0x00000001
+  #define RCC_APB2ENR_TIM8EN       0x00000002
+  #define RCC_APB2ENR_USART1EN     0x00000010
+  #define RCC_APB2ENR_USART6EN     0x00000020
+  #define RCC_APB2ENR_ADC1EN       0x00000100
+  #define RCC_APB2ENR_ADC2EN       0x00000200
+  #define RCC_APB2ENR_ADC3EN       0x00000400
+  #define RCC_APB2ENR_SDIOEN       0x00000800
+  #define RCC_APB2ENR_SPI1EN       0x00001000
+  #define RCC_APB2ENR_SYSCFGEN     0x00004000
+  #define RCC_APB2ENR_TIM11EN      0x00040000
+  #define RCC_APB2ENR_TIM10EN      0x00020000
+  #define RCC_APB2ENR_TIM9EN       0x00010000
+#define TOFF_RCC_AHB1LPENR  0x0050		/* (RW) RCC AHB1 peripheral clock enable in low power mode register */
+  #define RCC_AHB1LPENR_GPIOALPEN     0x00000001
+  #define RCC_AHB1LPENR_GPIOBLPEN     0x00000002
+  #define RCC_AHB1LPENR_GPIOCLPEN     0x00000004
+  #define RCC_AHB1LPENR_GPIODLPEN     0x00000008
+  #define RCC_AHB1LPENR_GPIOELPEN     0x00000010
+  #define RCC_AHB1LPENR_GPIOFLPEN     0x00000020
+  #define RCC_AHB1LPENR_GPIOGLPEN     0x00000040
+  #define RCC_AHB1LPENR_GPIOHLPEN     0x00000080
+  #define RCC_AHB1LPENR_GPIOILPEN     0x00000100
+  #define RCC_AHB1LPENR_CRCLPEN       0x00001000
+  #define RCC_AHB1LPENR_FLITFLPEN     0x00008000
+  #define RCC_AHB1LPENR_SRAM1LPEN     0x00010000
+  #define RCC_AHB1LPENR_SRAM2LPEN     0x00020000
+  #define RCC_AHB1LPENR_BKPSRAMLPEN   0x00040000
+  #define RCC_AHB1LPENR_DMA1LPEN      0x00200000
+  #define RCC_AHB1LPENR_DMA2LPEN      0x00400000
+  #define RCC_AHB1LPENR_ETHMACLPEN    0x02000000
+  #define RCC_AHB1LPENR_ETHMACTXLPEN  0x04000000
+  #define RCC_AHB1LPENR_ETHMACRXLPEN  0x08000000
+  #define RCC_AHB1LPENR_ETHMACPTPLPEN 0x10000000
+  #define RCC_AHB1LPENR_OTGHSLPEN     0x20000000
+  #define RCC_AHB1LPENR_OTGHSULPILPEN 0x40000000
+#define TOFF_RCC_AHB2LPENR  0x0054		/* (RW) RCC AHB2 peripheral clock enable in low power mode register */
+  #define RCC_AHB2LPENR_DCMILPEN   0x00000001
+  #define RCC_AHB2LPENR_CRYPLPEN   0x00000010
+  #define RCC_AHB2LPENR_HASHLPEN   0x00000020
+  #define RCC_AHB2LPENR_RNGLPEN    0x00000040
+  #define RCC_AHB2LPENR_OTGFSLPEN  0x00000080
+#define TOFF_RCC_AHB3LPENR  0x0058		/* (RW) RCC AHB3 peripheral clock enable in low power mode register */
+  #define RCC_AHB3LPENR_FSMCLPEN   0x00000001
+#define TOFF_RCC_APB1LPENR  0x0060		/* (RW) RCC APB1 peripheral clock enable in low power mode register */
+  #define RCC_APB1LPENR_TIM2LPEN   0x00000001
+  #define RCC_APB1LPENR_TIM3LPEN   0x00000002
+  #define RCC_APB1LPENR_TIM4LPEN   0x00000004
+  #define RCC_APB1LPENR_TIM5LPEN   0x00000008
+  #define RCC_APB1LPENR_TIM6LPEN   0x00000010
+  #define RCC_APB1LPENR_TIM7LPEN   0x00000020
+  #define RCC_APB1LPENR_TIM12LPEN  0x00000040
+  #define RCC_APB1LPENR_TIM13LPEN  0x00000080
+  #define RCC_APB1LPENR_TIM14LPEN  0x00000100
+  #define RCC_APB1LPENR_WWDGLPEN   0x00000800
+  #define RCC_APB1LPENR_SPI2LPEN   0x00004000
+  #define RCC_APB1LPENR_SPI3LPEN   0x00008000
+  #define RCC_APB1LPENR_USART2LPEN 0x00020000
+  #define RCC_APB1LPENR_USART3LPEN 0x00040000
+  #define RCC_APB1LPENR_UART4LPEN  0x00080000
+  #define RCC_APB1LPENR_UART5LPEN  0x00100000
+  #define RCC_APB1LPENR_I2C1LPEN   0x00200000
+  #define RCC_APB1LPENR_I2C2LPEN   0x00400000
+  #define RCC_APB1LPENR_I2C3LPEN   0x00800000
+  #define RCC_APB1LPENR_CAN1LPEN   0x02000000
+  #define RCC_APB1LPENR_CAN2LPEN   0x04000000
+  #define RCC_APB1LPENR_PWRLPEN    0x10000000
+  #define RCC_APB1LPENR_DACLPEN    0x20000000
+#define TOFF_RCC_APB2LPENR  0x0064		/* (RW) RCC APB2 peripheral clock enable in low power mode register */
+  #define RCC_APB2LPENR_TIM1LPEN   0x00000001
+  #define RCC_APB2LPENR_TIM8LPEN   0x00000002
+  #define RCC_APB2LPENR_USART1LPEN 0x00000010
+  #define RCC_APB2LPENR_USART6LPEN 0x00000020
+  #define RCC_APB2LPENR_ADC1LPEN   0x00000100
+  #define RCC_APB2LPENR_ADC2PEN    0x00000200
+  #define RCC_APB2LPENR_ADC3LPEN   0x00000400
+  #define RCC_APB2LPENR_SDIOLPEN   0x00000800
+  #define RCC_APB2LPENR_SPI1LPEN   0x00001000
+  #define RCC_APB2LPENR_SYSCFGLPEN 0x00004000
+  #define RCC_APB2LPENR_TIM9LPEN   0x00010000
+  #define RCC_APB2LPENR_TIM10LPEN  0x00020000
+  #define RCC_APB2LPENR_TIM11LPEN  0x00040000
+#define TOFF_RCC_BDCR       0x0070		/* (RW) RCC Backup domain control register */
+  #define RCC_BDCR_LSEON           0x00000001
+  #define RCC_BDCR_LSERDY          0x00000002
+  #define RCC_BDCR_LSEBYP          0x00000004
+  #define RCC_BDCR_RTCSEL          0x00000300
+  #define RCC_BDCR_RTCSEL_0        0x00000100
+  #define RCC_BDCR_RTCSEL_1        0x00000200
+  #define RCC_BDCR_RTCEN           0x00008000
+  #define RCC_BDCR_BDRST           0x00010000
+#define TOFF_RCC_CSR        0x0074		/* (RW) RCC clock control & status register */
+  #define RCC_CSR_LSION            0x00000001
+  #define RCC_CSR_LSIRDY           0x00000002
+  #define RCC_CSR_RMVF             0x01000000
+  #define RCC_CSR_BORRSTF          0x02000000
+  #define RCC_CSR_PADRSTF          0x04000000
+  #define RCC_CSR_PORRSTF          0x08000000
+  #define RCC_CSR_SFTRSTF          0x10000000
+  #define RCC_CSR_WDGRSTF          0x20000000
+  #define RCC_CSR_WWDGRSTF         0x40000000
+  #define RCC_CSR_LPWRRSTF         0x80000000
+#define TOFF_RCC_SSCGR      0x0080		/* (RW) RCC spread spectrum clock generation register */
+  #define RCC_SSCGR_MODPER         0x00001FFF
+  #define RCC_SSCGR_INCSTEP        0x0FFFE000
+  #define RCC_SSCGR_SPREADSEL      0x40000000
+  #define RCC_SSCGR_SSCGEN         0x80000000
+#define TOFF_RCC_PLLI2SCFGR 0x0084		/* (RW) RCC PLLI2S configuration register */
+  #define RCC_PLLI2SCFGR_PLLI2SN   0x00007FC0
+  #define RCC_PLLI2SCFGR_PLLI2SR   0x70000000
+
+/*
+ *  FLASH REGISTERS
+ */
+#define TADR_FLASH_R_BASE   (AHB1PERIPH_BASE + 0x3C00)
+#define TOFF_FLASH_ACR      0x0000		/* (RW) FLASH access control register */
+  #define FLASH_ACR_LATENCY_0WS    0x00000000
+  #define FLASH_ACR_LATENCY_1WS    0x00000001
+  #define FLASH_ACR_LATENCY_2WS    0x00000002
+  #define FLASH_ACR_LATENCY_3WS    0x00000003
+  #define FLASH_ACR_LATENCY_4WS    0x00000004
+  #define FLASH_ACR_LATENCY_5WS    0x00000005
+  #define FLASH_ACR_LATENCY_6WS    0x00000006
+  #define FLASH_ACR_LATENCY_7WS    0x00000007
+  #define FLASH_ACR_PRFTEN         0x00000100
+  #define FLASH_ACR_ICEN           0x00000200
+  #define FLASH_ACR_DCEN           0x00000400
+  #define FLASH_ACR_ICRST          0x00000800
+  #define FLASH_ACR_DCRST          0x00001000
+  #define FLASH_ACR_BYTE0_ADDRESS  0x40023C00
+  #define FLASH_ACR_BYTE2_ADDRESS  0x40023C03
+#define TOFF_FLASH_KEYR     0x0004		/* (RW) FLASH key register */
+#define TOFF_FLASH_OPTKEYR  0x0008		/* (RW) FLASH option key register */
+#define TOFF_FLASH_SR       0x000C		/* (RW) FLASH status register */
+  #define FLASH_SR_EOP             0x00000001
+  #define FLASH_SR_SOP             0x00000002
+  #define FLASH_SR_WRPERR          0x00000010
+  #define FLASH_SR_PGAERR          0x00000020
+  #define FLASH_SR_PGPERR          0x00000040
+  #define FLASH_SR_PGSERR          0x00000080
+  #define FLASH_SR_BSY             0x00010000
+#define TOFF_FLASH_CR       0x0010		/* (RW) FLASH control register */
+  #define FLASH_CR_PG              0x00000001
+  #define FLASH_CR_SER             0x00000002
+  #define FLASH_CR_MER             0x00000004
+  #define FLASH_CR_SNB_0           0x00000008
+  #define FLASH_CR_SNB_1           0x00000010
+  #define FLASH_CR_SNB_2           0x00000020
+  #define FLASH_CR_SNB_3           0x00000040
+  #define FLASH_CR_PSIZE_0         0x00000100
+  #define FLASH_CR_PSIZE_1         0x00000200
+  #define FLASH_CR_STRT            0x00010000
+  #define FLASH_CR_EOPIE           0x01000000
+  #define FLASH_CR_LOCK            0x80000000
+#define TOFF_FLASH_OPTCR    0x0014		/* (RW) FLASH option control register */
+  #define FLASH_OPTCR_OPTLOCK      0x00000001
+  #define FLASH_OPTCR_OPTSTRT      0x00000002
+  #define FLASH_OPTCR_BOR_LEV_0    0x00000004
+  #define FLASH_OPTCR_BOR_LEV_1    0x00000008
+  #define FLASH_OPTCR_BOR_LEV      0x0000000C
+  #define FLASH_OPTCR_WDG_SW       0x00000020
+  #define FLASH_OPTCR_nRST_STOP    0x00000040
+  #define FLASH_OPTCR_nRST_STDBY   0x00000080
+  #define FLASH_OPTCR_RDP_0        0x00000100
+  #define FLASH_OPTCR_RDP_1        0x00000200
+  #define FLASH_OPTCR_RDP_2        0x00000400
+  #define FLASH_OPTCR_RDP_3        0x00000800
+  #define FLASH_OPTCR_RDP_4        0x00001000
+  #define FLASH_OPTCR_RDP_5        0x00002000
+  #define FLASH_OPTCR_RDP_6        0x00004000
+  #define FLASH_OPTCR_RDP_7        0x00008000
+  #define FLASH_OPTCR_nWRP_0       0x00010000
+  #define FLASH_OPTCR_nWRP_1       0x00020000
+  #define FLASH_OPTCR_nWRP_2       0x00040000
+  #define FLASH_OPTCR_nWRP_3       0x00080000
+  #define FLASH_OPTCR_nWRP_4       0x00100000
+  #define FLASH_OPTCR_nWRP_5       0x00200000
+  #define FLASH_OPTCR_nWRP_6       0x00400000
+  #define FLASH_OPTCR_nWRP_7       0x00800000
+  #define FLASH_OPTCR_nWRP_8       0x01000000
+  #define FLASH_OPTCR_nWRP_9       0x02000000
+  #define FLASH_OPTCR_nWRP_10      0x04000000
+  #define FLASH_OPTCR_nWRP_11      0x08000000
+
+/* 
+ *  DMA CONTROLLER
+ */
+#define TADR_DMA1_BASE      (AHB1PERIPH_BASE + 0x6000)
+#define TADR_DMA2_BASE      (AHB1PERIPH_BASE + 0x6400)
+#define TOFF_DMAI_LISR      0x0000		/* (RW) DMA low interrupt status register */
+#define TOFF_DMAI_HISR      0x0004		/* (RW) DMA high interrupt status register */
+#define TOFF_DMAI_LIFCR     0x0008		/* (RW) DMA low interrupt flag clear register */
+#define TOFF_DMAI_HIFCR     0x000C		/* (RW) DMA high interrupt flag clear register */
+
+#define TADR_DMA1_STM0_BASE (DMA1_BASE + 0x010)
+#define TADR_DMA1_STM1_BASE (DMA1_BASE + 0x028)
+#define TADR_DMA1_STM2_BASE (DMA1_BASE + 0x040)
+#define TADR_DMA1_STM3_BASE (DMA1_BASE + 0x058)
+#define TADR_DMA1_STM4_BASE (DMA1_BASE + 0x070)
+#define TADR_DMA1_STM5_BASE (DMA1_BASE + 0x088)
+#define TADR_DMA1_STM6_BASE (DMA1_BASE + 0x0A0)
+#define TADR_DMA1_STM7_BASE (DMA1_BASE + 0x0B8)
+#define TADR_DMA2_STM0_BASE (DMA2_BASE + 0x010)
+#define TADR_DMA2_STM1_BASE (DMA2_BASE + 0x028)
+#define TADR_DMA2_STM2_BASE (DMA2_BASE + 0x040)
+#define TADR_DMA2_STM3_BASE (DMA2_BASE + 0x058)
+#define TADR_DMA2_STM4_BASE (DMA2_BASE + 0x070)
+#define TADR_DMA2_STM5_BASE (DMA2_BASE + 0x088)
+#define TADR_DMA2_STM6_BASE (DMA2_BASE + 0x0A0)
+#define TADR_DMA2_STM7_BASE (DMA2_BASE + 0x0B8)
+#define TOFF_DMAS_CR        0x0000		/* (RW) DMA stream x configuration register      */
+#define TOFF_DMAS_NDTR      0x0004		/* (RW) DMA stream x number of data register     */
+#define TOFF_DMAS_PAR       0x0008		/* (RW) DMA stream x peripheral address register */
+#define TOFF_DMAS_M0AR      0x000C		/* (RW) DMA stream x memory 0 address register   */
+#define TOFF_DMAS_M1AR      0x0010		/* (RW) DMA stream x memory 1 address register   */
+#define TOFF_DMAS_FCR       0x0014		/* (RW) DMA stream x FIFO control register       */
+
+
+
+
+#define ETH_BASE            (AHB1PERIPH_BASE + 0x8000)
+#define ETH_MAC_BASE        (ETH_BASE)
+#define ETH_MMC_BASE        (ETH_BASE + 0x0100)
+#define ETH_PTP_BASE        (ETH_BASE + 0x0700)
+#define ETH_DMA_BASE        (ETH_BASE + 0x1000)
+
+
+
+/*
+ *  DCMI
+ */
+#define TADR_DCMI_BASE      (AHB2PERIPH_BASE + 0x50000)
+#define TOFF_DCMI_CR        0x0000		/* (RW) DCMI control register 1 */
+#define TOFF_DCMI_SR        0x0004		/* (R)  DCMI status register */
+#define TOFF_DCMI_RISR      0x0008		/* (R)  DCMI raw interrupt status register */
+#define TOFF_DCMI_IER       0x000C		/* (RW) DCMI interrupt enable register */
+#define TOFF_DCMI_MISR      0x0010		/* (RW) DCMI masked interrupt status register */
+#define TOFF_DCMI_ICR       0x0014		/* (RW) DCMI interrupt clear register */
+#define TOFF_DCMI_ESCR      0x0018		/* (RW) DCMI embedded synchronization code register */
+#define TOFF_DCMI_ESUR      0x001C		/* (RW) DCMI embedded synchronization unmask register */
+#define TOFF_DCMI_CWSTRTR   0x0020		/* (RW) DCMI crop window start */
+#define TOFF_DCMI_CWSIZER   0x0024		/* (RW) DCMI crop window size */
+#define TOFF_DCMI_DR        0x0028		/* (RW) DCMI data register */
+
+/*
+ *  CRYPTO PROCESSER
+ */
+#define TADR_CRYP_BASE      (AHB2PERIPH_BASE + 0x60000)
+#define TOFF_CRYP_CR        0x0000		/* (RW) CRYP control register */
+#define TOFF_CRYP_SR        0x0004		/* (R)  CRYP status register */
+#define TOFF_CRYP_DR        0x0008		/* (RW) CRYP data input register */
+#define TOFF_CRYP_DOUT      0x000C		/* (RW) CRYP data output register */
+#define TOFF_CRYP_DMACR     0x0010		/* (RW) CRYP DMA control register */
+#define TOFF_CRYP_IMSCR     0x0014		/* (RW) CRYP interrupt mask set/clear register */
+#define TOFF_CRYP_RISR      0x0018		/* (RW) CRYP raw interrupt status register */
+#define TOFF_CRYP_MISR      0x001C		/* (RW) CRYP masked interrupt status register */
+#define TOFF_CRYP_K0LR      0x0020		/* (RW) CRYP key left  register 0 */
+#define TOFF_CRYP_K0RR      0x0024		/* (RW) CRYP key right register 0 */
+#define TOFF_CRYP_K1LR      0x0028		/* (RW) CRYP key left  register 1 */
+#define TOFF_CRYP_K1RR      0x002C		/* (RW) CRYP key right register 1 */
+#define TOFF_CRYP_K2LR      0x0030		/* (RW) CRYP key left  register 2 */
+#define TOFF_CRYP_K2RR      0x0034		/* (RW) CRYP key right register 2 */
+#define TOFF_CRYP_K3LR      0x0038		/* (RW) CRYP key left  register 3 */
+#define TOFF_CRYP_K3RR      0x003C		/* (RW) CRYP key right register 3 */
+#define TOFF_CRYP_IV0LR     0x0040		/* (RW) CRYP initialization vector left-word  register 0 */
+#define TOFF_CRYP_IV0RR     0x0044		/* (RW) CRYP initialization vector right-word register 0 */
+#define TOFF_CRYP_IV1LR     0x0048		/* (RW) CRYP initialization vector left-word  register 1 */
+#define TOFF_CRYP_IV1RR     0x004C		/* (RW) CRYP initialization vector right-word register 1 */
+
+/*
+ *  HASH
+ */
+#define TADR_HASH_BASE      (AHB2PERIPH_BASE + 0x60400)
+#define TOFF_HASH_CR        0x0000		/* (RW) HASH control register */
+#define TOFF_HASH_DIN       0x0004		/* (RW) HASH data input register */
+#define TOFF_HASH_STR       0x0008		/* (RW) HASH start register */
+#define TOFF_HASH_HR0       0x000C		/* (RW) HASH digest registers 0 */
+#define TOFF_HASH_HR1       0x0010		/* (RW) HASH digest registers 1 */
+#define TOFF_HASH_HR2       0x0014		/* (RW) HASH digest registers 2 */
+#define TOFF_HASH_HR3       0x0018		/* (RW) HASH digest registers 3 */
+#define TOFF_HASH_HR4       0x001C		/* (RW) HASH digest registers 4 */
+#define TOFF_HASH_IMR       0x0020		/* (RW) HASH interrupt enable register */
+#define TOFF_HASH_SR        0x0024		/* (R)  HASH status register */
+#define TOFF_HASH_CSR0      0x00F8		/* (RW) HASH context swap registers 0 */
+#define TOFF_HASH_CSR1      0x00FC		/* (RW) HASH context swap registers 1 */
+#define TOFF_HASH_CSR2      0x0100		/* (RW) HASH context swap registers 2 */
+#define TOFF_HASH_CSR3      0x0104		/* (RW) HASH context swap registers 3 */
+#define TOFF_HASH_CSR4      0x0108		/* (RW) HASH context swap registers 4 */
+#define TOFF_HASH_CSR5      0x010C		/* (RW) HASH context swap registers 5 */
+#define TOFF_HASH_CSR6      0x0110		/* (RW) HASH context swap registers 6 */
+#define TOFF_HASH_CSR7      0x0114		/* (RW) HASH context swap registers 7 */
+#define TOFF_HASH_CSR8      0x0118		/* (RW) HASH context swap registers 8 */
+#define TOFF_HASH_CSR9      0x011C		/* (RW) HASH context swap registers 9 */
+#define TOFF_HASH_CSR10     0x0120		/* (RW) HASH context swap registers 10 */
+#define TOFF_HASH_CSR11     0x0124		/* (RW) HASH context swap registers 11 */
+#define TOFF_HASH_CSR12     0x0128		/* (RW) HASH context swap registers 12 */
+#define TOFF_HASH_CSR13     0x012C		/* (RW) HASH context swap registers 13 */
+#define TOFF_HASH_CSR14     0x0130		/* (RW) HASH context swap registers 14 */
+#define TOFF_HASH_CSR15     0x0134		/* (RW) HASH context swap registers 15 */
+#define TOFF_HASH_CSR16     0x0138		/* (RW) HASH context swap registers 16 */
+#define TOFF_HASH_CSR17     0x013C		/* (RW) HASH context swap registers 17 */
+#define TOFF_HASH_CSR18     0x0140		/* (RW) HASH context swap registers 18 */
+#define TOFF_HASH_CSR19     0x0144		/* (RW) HASH context swap registers 19 */
+#define TOFF_HASH_CSR20     0x0148		/* (RW) HASH context swap registers 20 */
+#define TOFF_HASH_CSR21     0x014C		/* (RW) HASH context swap registers 21 */
+#define TOFF_HASH_CSR22     0x0150		/* (RW) HASH context swap registers 22 */
+#define TOFF_HASH_CSR23     0x0154		/* (RW) HASH context swap registers 23 */
+#define TOFF_HASH_CSR24     0x0158		/* (RW) HASH context swap registers 24 */
+#define TOFF_HASH_CSR25     0x015C		/* (RW) HASH context swap registers 25 */
+#define TOFF_HASH_CSR26     0x0160		/* (RW) HASH context swap registers 26 */
+#define TOFF_HASH_CSR27     0x0164		/* (RW) HASH context swap registers 27 */
+#define TOFF_HASH_CSR28     0x0168		/* (RW) HASH context swap registers 28 */
+#define TOFF_HASH_CSR29     0x016C		/* (RW) HASH context swap registers 29 */
+#define TOFF_HASH_CSR30     0x0170		/* (RW) HASH context swap registers 30 */
+#define TOFF_HASH_CSR31     0x0174		/* (RW) HASH context swap registers 31 */
+#define TOFF_HASH_CSR32     0x0178		/* (RW) HASH context swap registers 32 */
+#define TOFF_HASH_CSR33     0x017C		/* (RW) HASH context swap registers 33 */
+#define TOFF_HASH_CSR34     0x0180		/* (RW) HASH context swap registers 34 */
+#define TOFF_HASH_CSR35     0x0184		/* (RW) HASH context swap registers 35 */
+#define TOFF_HASH_CSR36     0x0188		/* (RW) HASH context swap registers 36 */
+#define TOFF_HASH_CSR37     0x018C		/* (RW) HASH context swap registers 37 */
+#define TOFF_HASH_CSR38     0x0190		/* (RW) HASH context swap registers 38 */
+#define TOFF_HASH_CSR39     0x0194		/* (RW) HASH context swap registers 39 */
+#define TOFF_HASH_CSR40     0x0198		/* (RW) HASH context swap registers 40 */
+#define TOFF_HASH_CSR41     0x019C		/* (RW) HASH context swap registers 41 */
+#define TOFF_HASH_CSR42     0x01A0		/* (RW) HASH context swap registers 42 */
+#define TOFF_HASH_CSR43     0x01A4		/* (RW) HASH context swap registers 43 */
+#define TOFF_HASH_CSR44     0x01A8		/* (RW) HASH context swap registers 44 */
+#define TOFF_HASH_CSR45     0x01AC		/* (RW) HASH context swap registers 45 */
+#define TOFF_HASH_CSR46     0x01B0		/* (RW) HASH context swap registers 46 */
+#define TOFF_HASH_CSR47     0x01B4		/* (RW) HASH context swap registers 47 */
+#define TOFF_HASH_CSR48     0x01B8		/* (RW) HASH context swap registers 48 */
+#define TOFF_HASH_CSR49     0x01BC		/* (RW) HASH context swap registers 49 */
+#define TOFF_HASH_CSR50     0x01C0		/* (RW) HASH context swap registers 50 */
+
+/*
+ *  RNG
+ */
+#define TADR_RNG_BASE       (AHB2PERIPH_BASE + 0x60800)
+#define TOFF_RNG_CR         0x0000		/* (RW) RNG control register */
+#define TOFF_RNG_SR         0x0004		/* (RW) RNG status register */
+#define TOFF_RNG_DR         0x0008		/* (RW) RNG data register */
+
+/*
+ *  FLEXIBLE STATIC MEMORY
+ */
+#define TADR_FSMC_R_BASE    (FSMC_R_BASE + 0x0000)
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER
+ */
+#define TOFF_FSMC_R_BTCR0   0x0000		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 0 */
+#define TOFF_FSMC_R_BTCR1   0x0004		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 1 */
+#define TOFF_FSMC_R_BTCR2   0x0008		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 2 */
+#define TOFF_FSMC_R_BTCR3   0x000C		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 3 */
+#define TOFF_FSMC_R_BTCR4   0x0010		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 4 */
+#define TOFF_FSMC_R_BTCR5   0x0014		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 5 */
+#define TOFF_FSMC_R_BTCR6   0x0018		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 6 */
+#define TOFF_FSMC_R_BTCR7   0x001C		/* (RW) NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR) 7 */
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER BANK1E
+ */
+#define TOFF_FSMC_R_BWTR0   0x0104		/* (RW) NOR/PSRAM write timing registers 0 */
+#define TOFF_FSMC_R_BWTR1   0x0108		/* (RW) NOR/PSRAM write timing registers 1 */
+#define TOFF_FSMC_R_BWTR2   0x010C		/* (RW) NOR/PSRAM write timing registers 2 */
+#define TOFF_FSMC_R_BWTR3   0x0110		/* (RW) NOR/PSRAM write timing registers 3 */
+#define TOFF_FSMC_R_BWTR4   0x0114		/* (RW) NOR/PSRAM write timing registers 4 */
+#define TOFF_FSMC_R_BWTR5   0x0118		/* (RW) NOR/PSRAM write timing registers 5 */
+#define TOFF_FSMC_R_BWTR6   0x011C		/* (RW) NOR/PSRAM write timing registers 6 */
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER BANK2
+ */
+#define TOFF_FSMC_R_PCR2    0x0060		/* (RW) NAND Flash control register 2 */
+#define TOFF_FSMC_R_SR2     0x0064		/* (RW) NAND Flash FIFO status and interrupt register 2 */
+#define TOFF_FSMC_R_PMEM2   0x0068		/* (RW) NAND Flash Common memory space timing register 2 */
+#define TOFF_FSMC_R_PATT2   0x006C		/* (RW) NAND Flash Attribute memory space timing register 2 */
+#define TOFF_FSMC_R_ECCR2   0x0074		/* (RW) NAND Flash ECC result registers 2 */
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER BANK3
+ */
+#define TOFF_FSMC_R_PCR3    0x0080		/* (RW) NAND Flash control register 3 */
+#define TOFF_FSMC_R_SR3     0x0084		/* (RW) NAND Flash FIFO status and interrupt register 3 */
+#define TOFF_FSMC_R_PMEM3   0x0088		/* (RW) NAND Flash Common memory space timing register 3 */
+#define TOFF_FSMC_R_PATT3   0x008C		/* (RW) NAND Flash Attribute memory space timing register 3 */
+#define TOFF_FSMC_R_ECCR3   0x0094		/* (RW) NAND Flash ECC result registers 3 */
+
+/*
+ *  FLEXIBLE STATIC MEMORY CONTROLLER BANK4
+ */
+#define TOFF_FSMC_R_PCR4    0x00A0		/* (RW) PC Card  control register 4 */
+#define TOFF_FSMC_R_SR4     0x00A4		/* (RW) PC Card  FIFO status and interrupt register 4 */
+#define TOFF_FSMC_R_PMEM4   0x00A8		/* (RW) PC Card  Common memory space timing register 4 */
+#define TOFF_FSMC_R_PATT4   0x00AC		/* (RW) PC Card  Attribute memory space timing register 4 */
+#define TOFF_FSMC_R_PIO4    0x00B0		/* (RW) PC Card  I/O space timing register 4 */
+
+/*
+ *  DEBUG MCU
+ */
+#define TADR_DBGMCU_BASE    0xE0042000
+#define TOFF_DBGMCU_IDCODE  0x0000		/* (RW) MCU device ID code */
+#define TOFF_DBGMCU_CR      0x0004		/* (RW) Debug MCU configuration register */
+#define TOFF_DBGMCU_APB1FZ  0x0008		/* (RW) Debug MCU APB1 freeze register */
+#define TOFF_DBGMCU_APB2FZ  0x000C		/* (RW) Debug MCU APB2 freeze register */
+
+
+#endif  /* _STM32F4XX_H_ */
+
Index: rtos_arduino/trunk/asp_1.9.2/arch/gcc/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/gcc/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/gcc/MANIFEST	(revision 136)
@@ -0,0 +1,4 @@
+PACKAGE asp
+
+MANIFEST
+tool_stddef.h
Index: rtos_arduino/trunk/asp_1.9.2/arch/gcc/tool_stddef.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/gcc/tool_stddef.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/gcc/tool_stddef.h	(revision 136)
@@ -0,0 +1,218 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: tool_stddef.h 2243 2011-08-26 21:56:55Z ertl-hiro $
+ */
+
+/*
+ *		t_stddef.hã®éçºç°å¢ä¾å­é¨ï¼GCCç¨ï¼
+ */
+
+#ifndef TOPPERS_TOOL_STDDEF_H
+#define TOPPERS_TOOL_STDDEF_H
+
+/*
+ *  ã³ã³ãã¤ã©ã®æ¡å¼µæ©è½ã®ããã®ãã¯ã­å®ç¾©
+ */
+#ifndef __cplusplus					/* C++ã«ã¯inline ããã */
+#if !defined(__STDC_VERSION__) || __STDC_VERSION__ < 199901L
+									/* C99ã«ã¯inline ããã */
+#define inline	__inline__			/* ã¤ã³ã©ã¤ã³é¢æ° */
+#endif /* !defined(__STDC_VERSION__) || __STDC_VERSION__ < 199901L */
+#endif /* __cplusplus */
+
+#define Inline	static __inline__	/* ã¤ã³ã©ã¤ã³é¢æ° */
+
+#ifndef __cplusplus					/* C++ã«ã¯asmããã */
+#define asm		__asm__				/* ã¤ã³ã©ã¤ã³ã¢ã»ã³ãã© */
+#endif /* __cplusplus */
+
+#define Asm		__asm__ volatile	/* ã¤ã³ã©ã¤ã³ã¢ã»ã³ãã©ï¼æé©åææ­¢ï¼*/
+
+#define NoReturn	__attribute__((__noreturn__))
+									/* ãªã¿ã¼ã³ããªãé¢æ° */
+
+/*
+ *  éçºç°å¢ã®æ¨æºã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã®å©ç¨
+ *
+ *  NULLã®å®ç¾©ãstddef.hããï¼INT_MAXï¼INT_MINï¼UINT_MAXï¼LONG_MAXï¼
+ *  LONG_MINï¼ULONG_MAXï¼CHAR_BITã®å®ç¾©ãlimits.hããåãè¾¼ãï¼
+ *
+ *  C++/EC++ã§ã¯ï¼æ¨æºä»æ§ä¸ã¯ãããã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ãç¨æããã¦
+ *  ããã¨ã¯éããªãã®ã§æ³¨æãå¿
+è¦ã§ããï¼ã»ã¨ãã©ã®éçºç°å¢ã§ç¨æãã
+ *  ã¦ããï¼ï¼
+ */
+#ifndef TOPPERS_MACRO_ONLY
+#include <stddef.h>
+#include <limits.h>
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  stdint.hã®ä»£ç¨ã¨ãªãå®ç¾©
+ *
+ *  éçºç°å¢ã«stdint.hãç¨æããã¦ãããï¼åæ´æ°åã®ãµã¤ãºããããã¿ã¼
+ *  ã³ã«å½ã¦ã¯ã¾ãå ´åã«ï¼stdint.hã®ä»£ç¨ã¨ãªãå®ç¾©ãä¸ããï¼
+ *
+ *  TOPPERS_STDINT_TYPE1: char/short/int/long longã®ãããé·ããããã
+ *                        8/16/32/64ãããã§ï¼ãã¤ã³ã¿ã®ãããé·ãlong
+ *                        ã®ãããé·ã¨ä¸è´ããå ´å
+ */
+#ifdef TOPPERS_STDINT_TYPE1
+
+/*
+ *  ã³ã³ãã¤ã©ä¾å­ã®ãã¼ã¿åã®å®ç¾©
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+typedef signed char			int8_t;		/* ç¬¦å·ä»ã8ãããæ´æ° */
+typedef unsigned char		uint8_t;	/* ç¬¦å·ç¡ã8ãããæ´æ° */
+
+typedef signed short		int16_t;	/* ç¬¦å·ä»ã16ãããæ´æ° */
+typedef unsigned short		uint16_t;	/* ç¬¦å·ç¡ã16ãããæ´æ° */
+
+typedef signed int			int32_t;	/* ç¬¦å·ä»ã32ãããæ´æ° */
+typedef unsigned int		uint32_t;	/* ç¬¦å·ç¡ã32ãããæ´æ° */
+
+typedef signed long long	int64_t;	/* ç¬¦å·ä»ã64ãããæ´æ° */
+typedef unsigned long long	uint64_t;	/* ç¬¦å·ç¡ã64ãããæ´æ° */
+
+typedef int8_t				int_least8_t;	/* 8ãããä»¥ä¸ã®ç¬¦å·ä»ãæ´æ° */
+typedef uint8_t				uint_least8_t;	/* 8ãããä»¥ä¸ã®ç¬¦å·ç¡ãæ´æ° */
+
+typedef long				intptr_t;	/* ãã¤ã³ã¿ãæ ¼ç´ã§ããç¬¦å·ä»ãæ´æ° */
+typedef unsigned long		uintptr_t;	/* ãã¤ã³ã¿ãæ ¼ç´ã§ããç¬¦å·ç¡ãæ´æ° */
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ã³ã³ãã¤ã©ä¾å­ã®ãã¼ã¿åã®æ´æ°å®æ°ãä½ããã¯ã­
+ */
+#ifndef INT8_C
+#define INT8_C(val)			(val)
+#endif /* INT8_C */
+
+#ifndef UINT8_C
+#define UINT8_C(val)		(val ## U)
+#endif /* UINT8_C */
+
+#ifndef INT16_C
+#define INT16_C(val)		(val)
+#endif /* INT16_C */
+
+#ifndef UINT16_C
+#define UINT16_C(val)		(val ## U)
+#endif /* UINT16_C */
+
+#ifndef INT32_C
+#define INT32_C(val)		(val)
+#endif /* INT32_C */
+
+#ifndef UINT32_C
+#define UINT32_C(val)		(val ## U)
+#endif /* UINT32_C */
+
+#ifndef INT64_C
+#define INT64_C(val)		(val ## LL)
+#endif /* INT64_C */
+
+#ifndef UINT64_C
+#define UINT64_C(val)		(val ## ULL)
+#endif /* UINT64_C */
+
+/*
+ *  ã³ã³ãã¤ã©ä¾å­ã®ãã¼ã¿åã«æ ¼ç´ã§ããæå¤§å¤ã¨æå°å¤ã®å®ç¾©
+ */
+#define INT8_MAX			SCHAR_MAX
+#define INT8_MIN			SCHAR_MIN
+#define UINT8_MAX			UCHAR_MAX
+
+#define INT16_MAX			SHRT_MAX
+#define INT16_MIN			SHRT_MIN
+#define UINT16_MAX			USHRT_MAX
+
+#define INT32_MAX			INT_MAX
+#define INT32_MIN			INT_MIN
+#define UINT32_MAX			UINT_MAX
+
+#define INT64_MAX			LLONG_MAX
+#define INT64_MIN			LLONG_MIN
+#define UINT64_MAX			ULLONG_MAX
+
+#define INT_LEAST8_MAX		INT8_MAX
+#define INT_LEAST8_MIN		INT8_MIN
+#define UINT_LEAST8_MAX		INT8_MAX
+
+#endif /* TOPPERS_STDINT_TYPE1 */
+
+/*
+ *  æµ®åå°æ°ç¹åã«é¢ããå®ç¾©
+ *
+ *  TOPPERS_STDFLOAT_TYPE1: floatãIEEE754æºæ ã®åç²¾åº¦æµ®åå°æ°ç¹æ°ï¼
+ *							doubleãåç²¾åº¦æµ®åå°æ°ç¹æ°ã®å ´å
+ */
+#ifdef TOPPERS_STDFLOAT_TYPE1
+#ifndef TOPPERS_MACRO_ONLY
+
+typedef float		float32_t;			/* IEEE754æºæ ã®åç²¾åº¦æµ®åå°æ°ç¹æ° */
+typedef double		double64_t;			/* IEEE754æºæ ã®åç²¾åº¦æµ®åå°æ°ç¹æ° */
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+#define FLOAT32_MIN		1.17549435e-38F
+#define FLOAT32_MAX		3.40282347e+38F
+#define DOUBLE64_MIN	2.2250738585072014e-308
+#define DOUBLE64_MAX	1.7976931348623157e+308
+
+#endif /* TOPPERS_STDFLOAT_TYPE1 */
+#endif /* TOPPERS_TOOL_STDDEF_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/logtrace/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/logtrace/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/logtrace/MANIFEST	(revision 136)
@@ -0,0 +1,6 @@
+PACKAGE asp
+
+MANIFEST
+trace_config.c
+trace_config.h
+trace_dump.c
Index: rtos_arduino/trunk/asp_1.9.2/arch/logtrace/trace_config.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/logtrace/trace_config.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/logtrace/trace_config.c	(revision 136)
@@ -0,0 +1,265 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: trace_config.c 2420 2012-11-11 06:34:11Z ertl-hiro $
+ */
+
+/*
+ *		ãã¬ã¼ã¹ã­ã°æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "task.h"
+#include "time_event.h"
+#include <sil.h>
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãããã¡ã¨ããã«ã¢ã¯ã»ã¹ããããã®ãã¤ã³ã¿
+ */
+SYSLOG	trace_buffer[TCNT_TRACE_BUFFER];	/* ãã¬ã¼ã¹ã­ã°ãããã¡ */
+uint_t	trace_count;				/* ãã¬ã¼ã¹ã­ã°ãããã¡ä¸­ã®ã­ã°ã®æ° */
+uint_t	trace_head;					/* å
+é ­ã®ãã¬ã¼ã¹ã­ã°ã®æ ¼ç´ä½ç½® */
+uint_t	trace_tail;					/* æ¬¡ã®ãã¬ã¼ã¹ã­ã°ã®æ ¼ç´ä½ç½® */
+MODE	trace_mode;					/* ãã¬ã¼ã¹ã¢ã¼ã */
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°æ©è½ã®åæå
+ */
+void
+trace_initialize(intptr_t exinf)
+{
+	MODE	mode = ((MODE) exinf);
+
+	trace_count = 0U;
+	trace_head = 0U;
+	trace_tail = 0U;
+	trace_mode = mode;
+}     
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã®éå§
+ */
+ER
+trace_sta_log(MODE mode)
+{
+	if ((mode & TRACE_CLEAR) != 0U) {
+		trace_count = 0U;
+		trace_head = 0U;
+		trace_tail = 0U;
+	}
+	trace_mode = mode;
+	return(E_OK);
+}     
+
+/* 
+ *  ãã¬ã¼ã¹ã­ã°ã®æ¸è¾¼ã¿
+ */
+ER
+trace_wri_log(TRACE *p_trace)
+{
+	SIL_PRE_LOC;
+
+	if (trace_mode != TRACE_STOP) {
+		SIL_LOC_INT();
+
+		/*
+		 *  ãã¬ã¼ã¹æå»ã®è¨­å®
+		 *
+		 *  LOG_WRI_LOG_ENTERããå¼ã°ããå ´åã«p_trace->logtimãæ¸ãæ
+		 *  ãã¦ãã¾ãã®ã¯æ°æã¡ãæªããï¼wri_logã®æ¹ã§ä¸æ¸ãããããå
+		 *  é¡ã¯ãªãï¼
+		 */
+		p_trace->logtim = TRACE_GET_TIM();
+
+		/*
+		 *  ãã¬ã¼ã¹ãããã¡ã«è¨é²
+		 */
+		trace_buffer[trace_tail] = *p_trace;
+		trace_tail++;
+		if (trace_tail >= TCNT_TRACE_BUFFER) {
+			trace_tail = 0U;
+		}
+		if (trace_count < TCNT_TRACE_BUFFER) {
+			trace_count++;
+			if (trace_count >= TCNT_TRACE_BUFFER
+						&& (trace_mode & TRACE_AUTOSTOP) != 0U) {
+				trace_mode = TRACE_STOP;
+			}
+		}
+		else {
+			trace_head = trace_tail;
+		}
+
+		SIL_UNL_INT();
+	}
+	return(E_OK);
+}
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã®èª­åºã
+ */
+ER
+trace_rea_log(TRACE *p_trace)
+{
+	ER_UINT	ercd;
+	SIL_PRE_LOC;
+
+	SIL_LOC_INT();
+
+	/*
+	 *  ãã¬ã¼ã¹ã­ã°ãããã¡ããã®ååºã
+	 */
+	if (trace_count > 0U) {
+		*p_trace = trace_buffer[trace_head];
+		trace_count--;
+		trace_head++;
+		if (trace_head >= TCNT_TRACE_BUFFER) {
+			trace_head = 0U;
+		}
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_OBJ;
+	}
+
+	SIL_UNL_INT();
+	return(ercd);
+}
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãåºåããããã®ã©ã¤ãã©ãªé¢æ°
+ */
+
+void
+trace_write_0(uint_t type)
+{
+	TRACE	trace;
+
+	trace.logtype = type;
+	(void) trace_wri_log(&trace);
+}
+
+void
+trace_write_1(uint_t type, intptr_t arg1)
+{
+	TRACE	trace;
+
+	trace.logtype = type;
+	trace.loginfo[0] = arg1;
+	(void) trace_wri_log(&trace);
+}
+
+void
+trace_write_2(uint_t type, intptr_t arg1, intptr_t arg2)
+{
+	TRACE	trace;
+
+	trace.logtype = type;
+	trace.loginfo[0] = arg1;
+	trace.loginfo[1] = arg2;
+	(void) trace_wri_log(&trace);
+}
+
+void
+trace_write_3(uint_t type, intptr_t arg1, intptr_t arg2, intptr_t arg3)
+{
+	TRACE	trace;
+
+	trace.logtype = type;
+	trace.loginfo[0] = arg1;
+	trace.loginfo[1] = arg2;
+	trace.loginfo[2] = arg3;
+	(void) trace_wri_log(&trace);
+}
+
+/*
+ *  ã¢ã»ã³ããªè¨èªã§è¨è¿°ãããã³ã¼ããããã¬ã¼ã¹ã­ã°ãåºåããããã®é¢
+ *  æ°
+ */
+
+void
+log_dsp_enter(TCB *p_tcb)
+{
+	trace_1(LOG_TYPE_DSP|LOG_ENTER, p_tcb);
+}
+
+void
+log_dsp_leave(TCB *p_tcb)
+{
+	trace_1(LOG_TYPE_DSP|LOG_LEAVE, p_tcb);
+}
+
+void
+log_inh_enter(INHNO inhno)
+{
+	trace_1(LOG_TYPE_INH|LOG_ENTER, inhno);
+}
+
+void
+log_inh_leave(INHNO inhno)
+{
+	trace_1(LOG_TYPE_INH|LOG_LEAVE, inhno);
+}
+
+void
+log_exc_enter(EXCNO excno)
+{
+	trace_1(LOG_TYPE_EXC|LOG_ENTER, excno);
+}
+
+void
+log_exc_leave(EXCNO excno)
+{
+	trace_1(LOG_TYPE_EXC|LOG_LEAVE, excno);
+}
Index: rtos_arduino/trunk/asp_1.9.2/arch/logtrace/trace_config.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/logtrace/trace_config.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/logtrace/trace_config.h	(revision 136)
@@ -0,0 +1,199 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2012 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: trace_config.h 2420 2012-11-11 06:34:11Z ertl-hiro $
+ */
+
+/*
+ *		ãã¬ã¼ã¹ã­ã°ã«é¢ããè¨­å®
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼target_config.hããã³target_syssvc.hã®
+ *  ã¿ããã¤ã³ã¯ã«ã¼ããããï¼ã¾ãï¼ãã¬ã¼ã¹ã­ã°æ©è½ã®åæåãè¨é²ã®é
+ *  å§ï¼åæ­¢ï¼ãã¬ã¼ã¹ã­ã°ã®ãã³ããè¡ããã­ã°ã©ã ããã¤ã³ã¯ã«ã¼ããã
+ *  ãã¨ãæ³å®ãã¦ããï¼
+ */
+
+#ifndef TOPPERS_TRACE_CONFIG_H
+#define TOPPERS_TRACE_CONFIG_H
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãããã¡ã®ãµã¤ãº
+ */
+#ifndef TCNT_TRACE_BUFFER
+#define TCNT_TRACE_BUFFER	1024
+#endif /* TCNT_TRACE_BUFFER */
+
+/*
+ *  ãã¬ã¼ã¹æå»ã®åå¾æ¹æ³
+ */
+#ifndef TRACE_GET_TIM
+#define TRACE_GET_TIM()		(current_time)
+#endif /* TRACE_GET_TIM */
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã®ãã¼ã¿æ§é 
+ *
+ *  ã·ã¹ãã ã­ã°æ©è½ã®ã­ã°æ
+å ±ã®ãã¼ã¿æ§é ã¨åããã®ãç¨ããï¼
+ */
+#include <t_syslog.h>
+typedef	SYSLOG	TRACE;
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãããã¡ã¨ããã«ã¢ã¯ã»ã¹ããããã®ãã¤ã³ã¿
+ */
+extern TRACE	trace_buffer[];		/* ãã¬ã¼ã¹ã­ã°ãããã¡ */
+extern uint_t	trace_count;		/* ãã¬ã¼ã¹ã­ã°ãããã¡ä¸­ã®ã­ã°ã®æ° */
+extern uint_t	trace_head;			/* å
+é ­ã®ãã¬ã¼ã¹ã­ã°ã®æ ¼ç´ä½ç½® */
+extern uint_t	trace_tail;			/* æ¬¡ã®ãã¬ã¼ã¹ã­ã°ã®æ ¼ç´ä½ç½® */
+extern uint_t	trace_lost;			/* å¤±ããããã¬ã¼ã¹ã®æ° */
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ãã¬ã¼ã¹ã¢ã¼ãã®å®ç¾©
+ */
+#define TRACE_STOP			UINT_C(0x00)	/* ãã¬ã¼ã¹åæ­¢ */
+#define TRACE_RINGBUF		UINT_C(0x01)	/* ãªã³ã°ãããã¡ã¢ã¼ã */
+#define TRACE_AUTOSTOP		UINT_C(0x02)	/* èªååæ­¢ã¢ã¼ã */
+#define TRACE_CLEAR			UINT_C(0x04)	/* ãã¬ã¼ã¹ã­ã°ã®ã¯ãªã¢ */
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°æ©è½ã®åæå
+ *
+ *  ãã¬ã¼ã¹ã­ã°æ©è½ãåæåããï¼åæåã«ã¼ãã³ã¨ãã¦ç»é²ãããã¨ãæ³
+ *  å®ãã¦ããï¼å¼æ°ã«ããæ¬¡ã®åä½ãè¡ãï¼
+ *
+ *  TRACE_STOPï¼åæåã®ã¿ã§ãã¬ã¼ã¹ã¯éå§ããªãï¼
+ *  TRACE_RINGBUFï¼ãªã³ã°ãããã¡ã¢ã¼ãã§ãã¬ã¼ã¹ãéå§ï¼
+ *  TRACE_AUTOSTOPï¼èªååæ­¢ã¢ã¼ãã§ãã¬ã¼ã¹ãéå§ï¼
+ */
+extern void	trace_initialize(intptr_t exinf);
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã®éå§
+ *
+ *  ãã¬ã¼ã¹ã­ã°ã®è¨é²ãéå§ï¼åæ­¢ããï¼å¼æ°ã«ããæ¬¡ã®åä½ãè¡ãï¼
+ *
+ *  TRACE_STOPï¼ãã¬ã¼ã¹ãåæ­¢ï¼
+ *  TRACE_RINGBUFï¼ãªã³ã°ãããã¡ã¢ã¼ãã§ãã¬ã¼ã¹ãéå§ï¼
+ *  TRACE_AUTOSTOPï¼èªååæ­¢ã¢ã¼ãã§ãã¬ã¼ã¹ãéå§ï¼
+ *  TRACE_CLEARï¼ãã¬ã¼ã¹ã­ã°ãã¯ãªã¢ï¼
+ */
+extern ER	trace_sta_log(MODE mode);
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã®æ¸è¾¼ã¿
+ */
+extern ER	trace_wri_log(TRACE *p_trace);
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã®èª­åºã
+ */
+extern ER	trace_rea_log(TRACE *p_trace);
+
+/* 
+ *  ãã¬ã¼ã¹ã­ã°ã®ãã³ãï¼trace_dump.cï¼
+ *
+ *  ãã¬ã¼ã¹ã­ã°ããã³ãããï¼çµäºå¦çã«ã¼ãã³ã¨ãã¦ç»é²ãããã¨ãæ³å®
+ *  ãã¦ããï¼å¼æ°ã¨ãã¦ï¼ãã³ãå
+ã¨ãªãæå­åºåé¢æ°ã¸ã®ãã¤ã³ã¿ãæ¸¡ãï¼
+ *  ã¿ã¼ã²ããä¾å­ã®ä½ã¬ãã«æå­åºåãå©ç¨ããå ´åã«ã¯ï¼target_putcãæ¸¡
+ *  ãï¼
+ */
+extern void	trace_dump(intptr_t exinf);
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãåºåããããã®ã©ã¤ãã©ãªé¢æ°
+ */
+extern void	trace_write_0(uint_t type);
+extern void	trace_write_1(uint_t type, intptr_t arg1);
+extern void	trace_write_2(uint_t type, intptr_t arg1, intptr_t arg2);
+extern void	trace_write_3(uint_t type, intptr_t arg1, intptr_t arg2,
+														intptr_t arg3);
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãåºåããããã®ãã¯ã­
+ */
+
+#define trace_0(type) \
+				trace_write_0(type)
+
+#define trace_1(type, arg1) \
+				trace_write_1(type, (intptr_t)(arg1))
+
+#define trace_2(type, arg1, arg2) \
+				trace_write_2(type, (intptr_t)(arg1), (intptr_t)(arg2))
+
+#define trace_3(type, arg1, arg2, arg3) \
+				trace_write_3(type, (intptr_t)(arg1), (intptr_t)(arg2), \
+						(intptr_t)(arg3))
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°æ¹æ³ã®è¨­å®
+ */
+#define LOG_TSKSTAT(p_tcb)		trace_2(LOG_TYPE_TSKSTAT, p_tcb, p_tcb->tstat)
+
+#define LOG_DSP_LEAVE(p_tcb)	trace_1(LOG_TYPE_DSP|LOG_LEAVE, p_tcb)
+
+#define LOG_SYSLOG_WRI_LOG_ENTER(prio, p_syslog) \
+								trace_wri_log((TRACE *) p_syslog)
+
+#endif /* TOPPERS_TRACE_CONFIG_H */
Index: rtos_arduino/trunk/asp_1.9.2/arch/logtrace/trace_dump.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/arch/logtrace/trace_dump.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/arch/logtrace/trace_dump.c	(revision 136)
@@ -0,0 +1,170 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: trace_dump.c 2420 2012-11-11 06:34:11Z ertl-hiro $
+ */
+
+/*
+ *		ãã¬ã¼ã¹ã­ã°ã®ãã³ã
+ */
+
+#include "kernel_impl.h"
+#include "task.h"
+#include <log_output.h>
+
+/* 
+ *  ã«ã¼ãã«æ
+å ±ã®ååºã
+ */
+static intptr_t
+get_tskid(intptr_t info)
+{
+	TCB		*p_tcb;
+	ID		tskid;
+
+	p_tcb = (TCB *) info;
+	if (p_tcb == NULL) {
+		tskid = 0;
+	}
+	else {
+		tskid = TSKID(p_tcb);
+	}
+	return((intptr_t) tskid);
+}
+
+static intptr_t
+get_tskstat(intptr_t info)
+{
+	uint_t		tstat;
+	const char	*tstatstr;
+
+	tstat = (uint_t) info;
+	switch (tstat & (TS_RUNNABLE|TS_WAITING|TS_SUSPENDED)) {
+	case TS_DORMANT:
+		tstatstr = "DORMANT";
+		break;
+	case TS_RUNNABLE:
+		tstatstr = "RUNNABLE";
+		break;
+	case TS_WAITING:
+		tstatstr = "WAITING";
+		break;
+	case TS_SUSPENDED:
+		tstatstr = "SUSPENDED";
+		break;
+	case TS_WAITING|TS_SUSPENDED:
+		tstatstr = "WAITING-SUSPENDED";
+		break;
+	default:
+		tstatstr = "unknown state";
+		break;
+	}
+	return((intptr_t) tstatstr);
+}
+
+/* 
+ *  ãã¬ã¼ã¹ã­ã°ã®è¡¨ç¤º
+ */
+static void
+trace_print(TRACE *p_trace, void (*putc)(char))
+{
+	intptr_t	traceinfo[TMAX_LOGINFO + 1];
+	const char	*tracemsg;
+	int_t		i;
+
+	traceinfo[0] = (intptr_t)(p_trace->logtim);
+	syslog_printf("[%d] ", traceinfo, putc);
+
+	switch (p_trace->logtype) {
+	case LOG_TYPE_TSKSTAT:
+		traceinfo[0] = get_tskid(p_trace->loginfo[0]);
+		traceinfo[1] = get_tskstat(p_trace->loginfo[1]);
+		tracemsg = "task %d becomes %s.";
+		break;
+	case LOG_TYPE_DSP|LOG_LEAVE:
+		traceinfo[0] = get_tskid(p_trace->loginfo[0]);
+		tracemsg = "dispatch to task %d.";
+		break;
+	case LOG_TYPE_COMMENT:
+		for (i = 1; i < TMAX_LOGINFO; i++) {
+			traceinfo[i-1] = p_trace->loginfo[i];
+		}
+		tracemsg = (const char *)(p_trace->loginfo[0]);
+		break;
+	case LOG_TYPE_ASSERT:
+		traceinfo[0] = p_trace->loginfo[0];
+		traceinfo[1] = p_trace->loginfo[1];
+		traceinfo[2] = p_trace->loginfo[2];
+		tracemsg = "%s:%u: Assertion `%s' failed.";
+		break;
+	default:
+		traceinfo[0] = p_trace->logtype;
+		tracemsg = "unknown trace log type: %d.";
+		break;
+	}
+	syslog_printf(tracemsg, traceinfo, putc);
+	(*putc)('\n');
+}
+
+/* 
+ *  ãã¬ã¼ã¹ã­ã°ã®ãã³ã
+ */
+void
+trace_dump(intptr_t exinf)
+{
+	TRACE	trace;
+	void	(*putc)(char);
+
+	putc = (void (*)(char)) exinf;
+	while (trace_rea_log(&trace) >= 0) {
+		trace_print(&trace, putc);
+	}
+}
Index: rtos_arduino/trunk/asp_1.9.2/configure
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/configure	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/configure	(revision 136)
@@ -0,0 +1,292 @@
+#! /usr/bin/perl
+#
+#  TOPPERS Software
+#      Toyohashi Open Platform for Embedded Real-Time Systems
+# 
+#  Copyright (C) 2001-2003 by Embedded and Real-Time Systems Laboratory
+#                              Toyohashi Univ. of Technology, JAPAN
+#  Copyright (C) 2006-2012 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  @(#) $Id: configure 2424 2012-11-11 08:23:22Z ertl-hiro $
+# 
+
+use Getopt::Std;
+
+#  ãªãã·ã§ã³ã®å®ç¾©
+#
+#  -T <target>			ã¿ã¼ã²ããåï¼å¿
+é ï¼
+#  -A <applname>		ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã åï¼ããã©ã«ãã¯sample1ï¼
+#  -a <appldir>			ã¢ããªã±ã¼ã·ã§ã³ã®ãã£ã¬ã¯ããªå
+#  -U <applobjs>		ä»ã®ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ãã¡ã¤ã«
+#						ï¼.oãã¡ã¤ã«åã§æå®ï¼è¤æ°æå®å¯ï¼
+#  -S <syssvcobjs>		ã·ã¹ãã ãµã¼ãã¹ã®ãã­ã°ã©ã ãã¡ã¤ã«
+#						ï¼.oãã¡ã¤ã«åã§æå®ï¼è¤æ°æå®å¯ï¼
+#  -L <kernel_lib>		ã«ã¼ãã«ã©ã¤ãã©ãªï¼libkernel.aï¼ã®ãã£ã¬ã¯ããªå
+#						ï¼çç¥ããå ´åï¼ã«ã¼ãã«ã©ã¤ãã©ãªãmakeããï¼
+#  -f					ã«ã¼ãã«ãé¢æ°åä½ã§ã³ã³ãã¤ã«ãããã©ããã®æå®
+#  -D <srcdir>			ã«ã¼ãã«ç­ã®ã½ã¼ã¹ã®ç½®ããã¦ãããã£ã¬ã¯ããª
+#  -l <srclang>			ãã­ã°ã©ãã³ã°è¨èªï¼ç¾æç¹ã§ã¯cã¨c++ã®ã¿ãµãã¼ãï¼
+#  -t <templatedir>		ãã³ãã¬ã¼ããã£ã¬ã¯ããªã®æå®ï¼ããã©ã«ãã¯sampleï¼
+#  -m <makefile>		ãã³ãã¬ã¼ãMakefileåã®æå®ï¼ããã©ã«ãã¯Makefileï¼
+#  -d <dbgenv>			å®è¡ç°å¢ã®åç§°
+#  -r					ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ããä½¿ç¨ãããã©ãã
+#						ã®æå®
+#  -p <perl>			perlã®ãã¹åï¼æç¤ºçã«æå®ããå ´åï¼
+#  -g <cfg>				ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ï¼cfgï¼ã®ãã¹å
+#  -P <num>				ãã­ã»ããµæ°ï¼ãã«ããã­ã»ããµå¯¾å¿ã«ã¼ãã«ã®å ´åï¼
+#  -o <options>			å
+±éã³ã³ãã¤ã«ãªãã·ã§ã³ï¼COPTSã«è¿½å ï¼
+#  -O <options>			å
+±éã·ã³ãã«å®ç¾©ãªãã·ã§ã³ï¼CDEFSã«è¿½å ï¼
+#  -k <options>			å
+±éãªã³ã«ãªãã·ã§ã³ï¼LDFLAGSç­ã«è¿½å ï¼
+
+#  ä½¿ç¨ä¾(1)
+#
+#  % ../configure -T dve68k_gcc -D GDB_STUB -A perf1 -a ../test -U histogram.o
+#
+#  ä½¿ç¨ä¾(2)
+#
+#  % ../configure -T macosx_gcc -L .
+#	ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ã¯ sample1 ã«ãªãï¼
+
+#
+#  ãªãã·ã§ã³ã®å¦ç
+#
+getopt("TAaUSLDltmdpgPoOk");
+
+#
+#  å¤æ°ã®åæå
+#
+
+$target = $opt_T;
+$applname = $opt_A ? $opt_A : "sample1";
+$appldir = $opt_a ? $opt_a : "";
+$applobjs = $opt_U ? $opt_U : "";
+$syssvcobjs = $opt_S ? $opt_S : "";
+$kernel_lib = $opt_L ? $opt_L : "";
+$kernel_funcobjs = $opt_f ? "true" : "";
+$srclang = $opt_l ? $opt_l : "c";
+$makefile = $opt_m ? $opt_m : "Makefile";
+$dbgenv = $opt_d ? "TOPPERS_".$opt_d : "";
+$enable_trace = $opt_r ? "true" : "";
+$prc_num = $opt_P ? $opt_P : "";
+$copts = $opt_o ? $opt_o : "";
+$cdefs = $opt_O ? $opt_O : "";
+$ldflags = $opt_k ? $opt_k : "";
+
+#
+#  ãªãã¸ã§ã¯ããã¡ã¤ã«åã®æ¡å¼µå­ãè¿ã
+#
+sub get_objext {
+	if ($^O eq 'cygwin') {
+		return("exe");
+	}
+	else {
+		return("");
+	}
+}
+
+#
+#  ãã­ã°ã©ã ã®å ´æãæ¤ç´¢ãã
+#
+sub get_path {
+	my($progname, @pathlist) = @_;
+	my($path);
+
+	foreach $path (@pathlist) {
+		if (-x $path."/".$progname) {
+			return($path."/".$progname);
+		}
+	}
+	return("");
+}
+
+#
+#  ãã¡ã¤ã«ãå¤æãã
+#
+sub convert {
+	my($infile, $outfile) = @_;
+	my($line);
+
+	print STDERR "configure: Generating $outfile from $infile.\n";
+	if (-f $outfile) {
+		print STDERR "configure: $outfile exists.",
+						"  Save as $outfile.bak.\n";
+		rename($outfile, $outfile.".bak");
+	}
+	unless (open(INFILE, $infile)) {
+		print STDERR "configure: can't open $infile\n";
+		exit(1);
+	}
+	unless (open(OUTFILE, "> ".$outfile)) {
+		print STDERR "configure: can't open $outfile\n";
+		exit(1);
+	}
+
+	while ($line = <INFILE>) {
+		chop $line;
+		while ($line =~ /^(.*)\@\(([A-Za-z_]+)\)(.*)$/) {
+			$line = $1.$vartable{$2}.$3;
+		}
+		print OUTFILE $line,"\n";
+	}
+
+	close(INFILE);
+	close(OUTFILE);
+}
+
+#
+#  ãµã³ãã«ãè¦ã¤ãã¦ãã¡ã¤ã«ãçæãã
+#
+sub generate {
+	my($file, $mandatory) = @_;
+	my($path);
+
+	$path = $templatedir."/".$file.".".$target;
+	if (-f $path) {
+		convert($path, $file);
+		return;
+	}	
+
+	$path = $templatedir."/".$file;
+	if ($mandatory || -f $path) {
+		convert($path, $file);
+	}	
+}
+
+#
+#  ã½ã¼ã¹ãã£ã¬ã¯ããªåãåãåºã
+#
+$pwd = `pwd`; chop $pwd;
+if ($opt_D) {
+	$srcabsdir = $srcdir = $opt_D;
+}
+elsif ($0 =~ /(.*)\/configure/) {
+	$srcdir = $1;
+	if ($srcdir =~ /^\//) {
+		$srcabsdir = $srcdir;
+	}
+	else {
+		$srcabsdir = $pwd."/".$srcdir;
+	}
+}
+else {
+	$srcabsdir = $srcdir = $pwd;
+}
+
+$perl = $opt_p ? $opt_p : get_path("perl", ("/usr/local/bin", "/usr/bin"));
+$cfg = $opt_g ? $opt_g : "\$(SRCDIR)/cfg/cfg/cfg";
+$cfgfile = $opt_g ? $opt_g : $srcdir."/cfg/cfg/cfg";
+$templatedir = $opt_t ? $opt_t : $srcdir."/sample";
+
+#
+#  -Tãªãã·ã§ã³ã®ç¢ºèª
+#
+unless ($opt_T) {
+	print STDERR "configure: -T option is mandatory\n";
+	print STDERR "Installed targets are:\n";
+	foreach $targetname (<$srcdir/target/[a-zA-Z0-9]*>) {
+		$targetname =~ s|$srcdir/target/||;
+		print STDERR "\t$targetname\n";
+	}
+	exit(1);
+}
+
+#
+#  å¤æ°ãã¼ãã«ã®ä½æ
+#
+%vartable = ();
+$vartable{"TARGET"} = $target;
+$vartable{"APPLNAME"} = $applname;
+$vartable{"APPLDIR"} = $appldir;
+$vartable{"APPLOBJS"} = $applobjs;
+$vartable{"SYSSVCOBJS"} = $syssvcobjs;
+$vartable{"KERNEL_LIB"} = $kernel_lib;
+$vartable{"KERNEL_FUNCOBJS"} = $kernel_funcobjs;
+$vartable{"SRCDIR"} = $srcdir;
+$vartable{"SRCABSDIR"} = $srcabsdir;
+$vartable{"SRCLANG"} = $srclang;
+$vartable{"DBGENV"} = $dbgenv;
+$vartable{"ENABLE_TRACE"} = $enable_trace;
+$vartable{"PERL"} = $perl;
+$vartable{"CFG"} = $cfg;
+$objext = get_objext();
+$vartable{"OBJEXT"} = $objext;
+$vartable{"PRC_NUM"} = $prc_num;
+$vartable{"COPTS"} = $copts;
+$vartable{"CDEFS"} = $cdefs;
+$vartable{"LDFLAGS"} = $ldflags;
+
+#
+#  ã¿ã¼ã²ãããã£ã¬ã¯ããªã®ãã§ãã¯
+#
+
+if (! -d $srcdir."/target/".$target) {
+	print STDERR "configure: $srcdir/target/$target not exist\n";
+	exit(1);
+}
+
+#
+#  Makefile ã¨ã¢ããªã±ã¼ã·ã§ã³ãã¡ã¤ã«ã®çæ
+#
+
+generate($makefile, 1);
+generate($applname.".c", 0);
+generate($applname.".cpp", 0);
+generate($applname.".h", 0);
+generate($applname.".cfg", 0);
+
+#
+#  cfg ãã§ãã¦ãããã®ãã§ãã¯
+#
+
+if (!(-x ($objext eq "" ? $cfgfile : $cfgfile.".".$objext))) {
+	print STDERR "Executable file of the configurator (cfg) is not found.\n";
+}
Index: rtos_arduino/trunk/asp_1.9.2/doc/asp_spec.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/doc/asp_spec.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/doc/asp_spec.txt	(revision 136)
@@ -0,0 +1,575 @@
+
+		TOPPERS/ASPã«ã¼ãã«ã®ä»æ§æ¦è¦
+
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 1.9
+		æçµæ´æ°: 2013å¹´12æ31æ¥
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASPã«ã¼ãã«ã®ä»æ§æ¦è¦ã«ã¤ãã¦èª¬æãããã®ã§
+ããï¼Î¼ITRON4.0ä»æ§ã®ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«ã«å¯¾ããæ¡å¼µããã³å¤æ´ç®
+æãä¸­å¿ã«èª¬æããï¼
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
+   (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ ã®è²¬ä»»ãè² ããªãï¼
+ 
+ $Id: asp_spec.txt 2585 2013-12-31 06:17:36Z ertl-hiro $
+----------------------------------------------------------------------
+
+âåæã¨ãªãææ¸
+
+[1] ãã­ã³åä¼: Î¼ITRON4.0ä»æ§, Ver.4.02.00, 2004å¹´.
+
+[2] ãã­ã³åä¼: Î¼ITRON4.0ä»æ§ ä¿è­·æ©è½æ¡å¼µï¼Î¼ITRON4.0/PXä»æ§ï¼,
+	Ver.1.00.00, 2002å¹´.
+
+[3] TOPPERSãã­ã¸ã§ã¯ã: TOPPERS/JSPã«ã¼ãã« ã¦ã¼ã¶ãºããã¥ã¢ã«
+	Release 1.4.3å¯¾å¿, æçµæ´æ°: 2007å¹´4æ23æ¥.
+
+âä»æ§ã®æ¦ç¥
+
+TOPPERS/ASPã«ã¼ãã«ã®ä»æ§ã¯ï¼Î¼ITRON4.0ä»æ§ã®ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«ã
+ãã¼ã¹ã«ï¼æ¬¡ã®ãããªæ¡å¼µã»æ¹è¯ãå ãããã®ã§ããï¼
+
+ã»å²è¾¼ã¿å¦çæ©è½ã«ã¤ãã¦ã¯ï¼TOPPERSæ¨æºå²è¾¼ã¿å¦çã¢ãã«ã«æºæ ãããï¼
+ã»Î¼ITRON4.0ä»æ§ã®ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«å¤ã®æ©è½ã®ä¸é¨ãå°å
+¥ããï¼
+ã»ä¸é¨ã®ä»æ§ã«ã¤ãã¦ï¼Î¼ITRON4.0ä»æ§ã«å¯¾ãã¦å¤æ´ãå ããï¼
+ã»JSPã«ã¼ãã«ã«ãããç¬èªã®æ¡å¼µæ©è½ãä¸é¨å¤æ´ãã¦å®è£
+ããï¼
+ã»ASPã«ã¼ãã«ã«ãããç¬èªã®æ¡å¼µæ©è½ãæ°ãã«å®è£
+ããï¼
+ã»ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³å¦çãå
+¨é¢çã«è¦ç´ãï¼
+ã»æ¡å¼µæ©è½ãå®è£
+ããããã®æ¡å¼µããã±ã¼ã¸ããµãã¼ãããï¼
+ã»TOPPERSçµè¾¼ã¿ã³ã³ãã¼ãã³ãã·ã¹ãã ï¼TECSï¼ãå°å
+¥ããï¼
+
+ãã®ããASPã«ã¼ãã«ã¯ï¼Î¼ITRON4.0ä»æ§ã«å®å
+¨ã«æºæ ãã¦ããããã§ã¯ãªãï¼
+JSPã«ã¼ãã«ã®ä¸ä½äºæã«ããªã£ã¦ããªãï¼
+
+Î¼ITRON4.0ä»æ§ã§ã¯ï¼å®è£
+ç¬èªã«ç¨æããéçAPIããã³ãµã¼ãã¹ã³ã¼ã«ã®åç§°
+ã«ã¯ï¼å
+é ­ã«ãããã"V"ããã³"v"ã®æå­ãä»å ãããã®ã¨ãã¦ãããï¼ASPã«ã¼
+ãã«ã§ã¯ãã®è¦å®ã¯æ¡ç¨ããªãï¼
+
+ä»¥ä¸ã§ã¯ï¼Î¼ITRON4.0ä»æ§ã®ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«ã«å¯¾ããæ¡å¼µããã³å¤
+æ´ç®æã«ã¤ãã¦èª¬æããï¼
+
+âã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«å¤ã®æ©è½ã®ä¸é¨å°å
+¥
+
+Î¼ITRON4.0ä»æ§ã«ã¯è¦å®ããã¦ãããï¼ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«ã«å«ã¾ããª
+ãï¼ã¾ãã¯ï¼å«ã¾ããã¨ã¯éããªãï¼æ©è½ã¨ãã¦ï¼æ¬¡ã®æ©è½ãå®è£
+ããï¼
+
+(1) ã¤ãã³ããã©ã°ã®è¤æ°ã¿ã¹ã¯å¾
+ã¡
+
+ã¤ãã³ããã©ã°ã«å¯¾ããè¤æ°ã¿ã¹ã¯å¾
+ã¡ã®æ©è½ï¼TA_WMULå±æ§ã®ã¤ãã³ããã©ã°ï¼
+ãå®è£
+ããï¼
+
+ããã«ããï¼ã¤ãã³ããã©ã°ã®ã»ããï¼set_flgï¼iset_flgï¼ã§è¤æ°ã®ã¿ã¹ã¯ã
+èµ·åºãããå¯è½æ§ãçããï¼å¤ãã®ã¿ã¹ã¯ãåæã«å¾
+ã¡è§£é¤ããå ´åï¼ã«ã¼ã
+ã«å
+ã§ã®å²è¾¼ã¿ç¦æ­¢æéãé·ããªãããï¼ä½¿ç¨ã«ããã£ã¦ã¯æ³¨æãå¿
+è¦ã§ããï¼
+
+(2) ã¢ã©ã¼ã ãã³ãã©
+
+ã¢ã©ã¼ã ãã³ãã©ã®æ©è½ãå®è£
+ããï¼ã¢ã©ã¼ã ãã³ãã©æ©è½ã®ããã«å®è£
+ãã
+éçAPIããã³ãµã¼ãã¹ã³ã¼ã«ã¯æ¬¡ã®éãã§ããï¼
+
+	CRE_ALM		ã¢ã©ã¼ã ãã³ãã©ã®çæï¼éçAPIï¼
+	sta_alm		ã¢ã©ã¼ã ãã³ãã©ã®åä½éå§
+	ista_alm	ã¢ã©ã¼ã ãã³ãã©ã®åä½éå§ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+	stp_alm		ã¢ã©ã¼ã ãã³ãã©ã®åä½åæ­¢
+	istp_alm	ã¢ã©ã¼ã ãã³ãã©ã®åä½åæ­¢ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+
+(3) å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³
+
+ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«ã§ã¯ï¼å²è¾¼ã¿ãã³ãã©ã¨å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®
+ããããããµãã¼ãããã°ãããã¨ã«ãªã£ã¦ããï¼JSPã«ã¼ãã«ã§ã¯å²è¾¼ã¿ãã³
+ãã©ã®ã¿ãå®è£
+ãã¦ãããï¼ASPã«ã¼ãã«ã§ã¯ãã®ä¸¡è
+ãå®è£
+ããï¼
+
+å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®ä»æ§ã«ã¤ãã¦ã¯ï¼TOPPERSæ¨æºå²è¾¼ã¿å¦çã¢ãã«ã®è¦
+å®ã«æºæ ããï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ãè¿½å ãããµã¼ãã¹ã³ã¼ã«ã¨ãã¦ï¼æ¬¡
+ã®éçAPIãå®è£
+ããï¼ãã®éçAPIã®ä»æ§ã«ã¤ãã¦ã¯ï¼TOPPERSæ¨æºå²è¾¼ã¿å¦ç
+ã¢ãã«ã«ããã¦ï¼Î¼ITRON4.0ä»æ§ã«å¯¾ãã¦æ¡å¼µãå ãã¦ããï¼
+
+	ATT_ISR		å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®è¿½å ï¼éçAPIï¼
+
+(4) å²è¾¼ã¿ç®¡çæ©è½
+
+ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«ã«å«ã¾ããªãå²è¾¼ã¿ç®¡çæ©è½ã¨ãã¦ï¼æ¬¡ã®ãµã¼ãã¹
+ã³ã¼ã«ãå®è£
+ããï¼JSPã«ã¼ãã«ã§ã¯ï¼ãããã®ãµã¼ãã¹ã³ã¼ã«ãå®è£
+ãããã©
+ããã¯ã¿ã¼ã²ããä¾å­ã¨ãªã£ã¦ãããï¼ASPã«ã¼ãã«ã§ã¯ï¼TOPPERSæ¨æºå²è¾¼ã¿
+å¦çã¢ãã«ã®è¦å®ã«æºæ ãã¦ï¼ã¿ã¼ã²ããéä¾å­ã«å®è£
+ããï¼
+
+	dis_int		å²è¾¼ã¿ã®ç¦æ­¢
+	ena_int		å²è¾¼ã¿ã®è¨±å¯
+	chg_ipm		å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤æ´
+	get_ipm		å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®åç
+§
+
+(5) ãªãã¸ã§ã¯ãã®ç¶æ
+åç
+§æ©è½
+
+ä¸»ã«ãããã°æåãã®æ©è½ã¨ãã¦ï¼ãªãã¸ã§ã¯ãã®ç¶æ
+åç
+§æ©è½ãå®è£
+ããï¼
+å
+·ä½çã«ã¯ï¼æ¬¡ã®ãµã¼ãã¹ã³ã¼ã«ãå®è£
+ããï¼
+
+	ref_tsk		ã¿ã¹ã¯ã®ç¶æ
+åç
+§
+	ref_tex		ã¿ã¹ã¯ä¾å¤å¦çã®ç¶æ
+åç
+§
+	ref_sem		ã»ããã©ã®ç¶æ
+åç
+§
+	ref_flg		ã¤ãã³ããã©ã°ã®ç¶æ
+åç
+§
+	ref_dtq		ãã¼ã¿ã­ã¥ã¼ã®ç¶æ
+åç
+§
+	ref_mbx		ã¡ã¼ã«ããã¯ã¹ã®ç¶æ
+åç
+§
+	ref_mpf		åºå®é·ã¡ã¢ãªãã¼ã«ã®ç¶æ
+åç
+§
+	ref_cyc		å¨æãã³ãã©ã®ç¶æ
+åç
+§
+	ref_alm		ã¢ã©ã¼ã ãã³ãã©ã®ç¶æ
+åç
+§
+
+âÎ¼ITRON4.0ä»æ§ã«å¯¾ããå¤æ´
+
+(1) ITRONæ¨æºãã¼ã¿åã®è¦ç´ã
+
+ãµã¤ãºã®æ±ºã¾ã£ãæ´æ°åï¼Bï¼H, Wãªã©ï¼ãªã©ã«ã¤ãã¦ï¼C99ã«æºæ ããåã®å
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+ITRONæ¨æºãã¼ã¿åï¼Bï¼H, Wãªã©ï¼ãå¿
+è¦ã¨ããã¢ããªã±ã¼ã·ã§ã³ã®ããã«ï¼
+itron.hãç¨æããï¼
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+(2) éã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®ext_tsk
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+éã¿ã¹ã¯ã³ã³ãã­ã¹ãããext_tskãå¼ã°ããå ´åï¼E_CTXã¨ã©ã¼ãè¿ããã®ã¨
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+ãã®ããã®ãµã¼ãã¹ã³ã¼ã«ã¨ãã¦ï¼æ¬¡ã®ãµã¼ãã¹ã³ã¼ã«ãå®è£
+ããï¼
+
+	xsns_dpn	CPUä¾å¤çºçæã®ãã£ã¹ãããä¿çç¶æ
+ã®åç
+§
+	xsns_xpn	CPUä¾å¤çºçæã®ã¿ã¹ã¯ä¾å¤å¦çä¿çç¶æ
+ã®åç
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+¥
+
+ããã¤ã¹ãã©ã¤ããã·ã¹ãã ã­ã°æ©è½ã¨ã®æ¥ç¶ã«TOPPERSçµè¾¼ã¿ã³ã³ãã¼ãã³ã
+ã·ã¹ãã ï¼TECSï¼ãå°å
+¥ããï¼ã¾ãï¼ã«ã¼ãã«ãªãã¸ã§ã¯ããTECSã®ã³ã³ãã¼
+ãã³ãã¨ãã¦æ±ããããã«ããï¼
+
+ãªãï¼TECSã«å¯¾å¿ããããã®ä¿®æ­£ã¯ï¼TECSã®é
+å¸ããã±ã¼ã¸ã«å«ã¾ãã¦ããï¼
+ASPã«ã¼ãã«ã®é
+å¸ããã±ã¼ã¸ã«ã¯å«ã¾ãã¦ããªãï¼
+
+ä»¥ä¸
Index: rtos_arduino/trunk/asp_1.9.2/doc/configurator.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/doc/configurator.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/doc/configurator.txt	(revision 136)
@@ -0,0 +1,1323 @@
+
+		TOPPERS/ASPã«ã¼ãã«
+		ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ä»æ§
+
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 1.9.2
+		æçµæ´æ°: 2013å¹´12æ31æ¥
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASPã«ã¼ãã«ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãæ¨æºçã«ç
+æãã¹ããã¡ã¤ã«ã®å
+å®¹ã«ã¤ãã¦è§£èª¬ãããã®ã§ããï¼ã¿ã¼ã²ããä¾å­ã«çæ
+ããå
+å®¹ã«ã¤ãã¦ã¯ï¼ãã®ãã­ã¥ã¡ã³ãã®ç¯å²å¤ã§ããï¼
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
+   (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ ã®è²¬ä»»ãè² ããªãï¼
+ 
+ $Id: configurator.txt 2676 2015-05-26 15:16:46Z ertl-hiro $
+----------------------------------------------------------------------
+
+âç®æ¬¡
+
+ã»çæãããã¡ã¤ã«ã®ç¨®é¡
+ã»éçAPIä¸è¦§
+ã»ã«ã¼ãã«æ§æã»åæåããããã¡ã¤ã«ï¼kernel_cfg.hï¼
+	(1) åºå®çæé¨å
+	(2) ãªãã¸ã§ã¯ãæ°ã®å®ç¾©
+	(3) ãªãã¸ã§ã¯ãã®IDçªå·ã®å®ç¾©
+ã»ã«ã¼ãã«æ§æã»åæåãã¡ã¤ã«ï¼kernel_cfg.cï¼
+	(1) åºå®çæé¨å
+	(2) ã«ã¼ãã«ã®ç¨®é¡ã®ãã§ãã¯
+	(3) ã¤ã³ã¯ã«ã¼ããã£ã¬ã¯ãã£ãï¼#includeï¼ã®å¦ç
+	(4) ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+	(5) ãªãã¸ã§ã¯ãã®IDçªå·ãä¿æããå¤æ°ã®å®ç¾©
+	(6) åã«ã¼ãã«ãªãã¸ã§ã¯ãã«é¢ããå®ç¾©
+	(7) å²è¾¼ã¿ã«é¢ããå®ç¾©
+	(8) CPUä¾å¤ã«é¢ããå®ç¾©
+	(9) éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã«é¢ããå®ç¾©
+	(10) ã¿ã¤ã ã¤ãã³ãç®¡çã«é¢ããå®ç¾©
+	(11) åã¢ã¸ã¥ã¼ã«ã®åæåé¢æ°ã®å®ç¾©
+	(12) åæåã«ã¼ãã³ã®å®è¡é¢æ°ã®å®ç¾©
+	(13) çµäºå¦çã«ã¼ãã³ã®å®è¡é¢æ°ã®å®ç¾©
+
+
+âçæãããã¡ã¤ã«ã®ç¨®é¡
+
+ASPã«ã¼ãã«ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤
+ã«ãå¦çãã¦ï¼ã«ã¼ãã«æ§æã»åæåãã¡ã¤ã«ï¼kernel_cfg.cï¼ã¨æ§æã»åæ
+åããããã¡ã¤ã«ï¼kernel_cfg.hï¼ãçæããï¼ã¾ãï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®
+å¦çã®éä¸­ã«ï¼å¿
+è¦ãªä¸­éãã¡ã¤ã«ãçæããï¼
+
+
+âéçAPIä¸è¦§
+
+ASPã«ã¼ãã«ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãå¦çããéçAPIã¯æ¬¡ã®éãï¼
+
+(1) ã¿ã¹ã¯ç®¡çæ©è½
+	CRE_TSK(ID tskid, { ATR tskatr, intptr_t exinf, TASK task,
+								PRI itskpri, SIZE stksz, STK_T *stk })
+
+(2) ã¿ã¹ã¯ä¾å¤å¦çæ©è½
+	DEF_TEX(ID tskid, { ATR texatr, TEXRTN texrtn })
+
+(3) åæã»éä¿¡æ©è½
+	CRE_SEM(ID semid, { ATR sematr, uint_t isemcnt, uint_t maxsem })
+	CRE_FLG(ID flgid, { ATR flgatr, FLGPTN iflgptn })
+	CRE_DTQ(ID dtqid, { ATR dtqatr, uint_t dtqcnt, void *dtqmb })
+	CRE_PDQ(ID pdqid, { ATR pdqatr, uint_t pdqcnt, PRI maxdpri, void *pdqmb })
+	CRE_MBX(ID mbxid, { ATR mbxatr, PRI maxmpri, void *mprihd })
+
+â» dtqmbï¼pdqmbï¼mprihdãNULLã§ãªãå ´åã¯ãµãã¼ãããªãï¼
+
+(4) ã¡ã¢ãªãã¼ã«ç®¡çæ©è½
+	CRE_MPF(ID mpfid, { ATR mpfatr, uint_t blkcnt, uint_t blksz,
+										MPF_T *mpf, void *mpfmb })
+
+â» mpfmbãNULLã§ãªãå ´åã¯ãµãã¼ãããªãï¼
+
+(5) æéç®¡çæ©è½
+	CRE_CYC(ID cycid, { ATR cycatr, intptr_t exinf, CYCHDR cychdr,
+								RELTIM cyctim, RELTIM cycphs })
+	CRE_ALM(ID almid, { ATR almatr, intptr_t exinf, ALMHDR almhdr })
+
+(6) å²è¾¼ã¿ç®¡çæ©è½
+	CFG_INT(INTNO intno, { ATR intatr, PRI intpri })
+	ATT_ISR({ ATR isratr, intptr_t exinf, INTNO intno, ISR isr, PRI isrpri })
+	DEF_INH(INHNO inhno, { ATR inhatr, INTHDR inthdr })
+
+(7) CPUä¾å¤ç®¡çæ©è½
+	DEF_EXC(EXCNO excno, { ATR excatr, EXCHDR exchdr })
+
+(8) ã·ã¹ãã æ§æç®¡çæ©è½
+	DEF_ICS({ SIZE istksz, STK_T *istk })
+	ATT_INI({ ATR iniatr, intptr_t exinf, INIRTN inirtn })
+	ATT_TER({ ATR teratr, intptr_t exinf, TERRTN terrtn })
+
+ãããã®éçAPIã®ãã©ã¡ã¼ã¿ã®å
+ï¼IDåã®ãã©ã¡ã¼ã¿ã¯ãªãã¸ã§ã¯ãè­å¥åï¼
+ãã¤ã³ã¿åï¼void *ï¼TASKï¼TEXRTNï¼CYCHDRï¼ALMHDRï¼ISRï¼INTHDRï¼EXCHDRï¼
+INIRTNï¼TERRTNï¼STK_T *ï¼MPF_T *ï¼ããã³intptr_tåã®ãã©ã¡ã¼ã¿ã¯ä¸è¬å®
+æ°å¼ãã©ã¡ã¼ã¿ã¨ããï¼ãã®ä»ã®ãã©ã¡ã¼ã¿ã¯ï¼æ´æ°å®æ°å¼ãã©ã¡ã¼ã¿ã¨ããï¼
+
+
+âã«ã¼ãã«æ§æã»åæåããããã¡ã¤ã«ï¼kernel_cfg.hï¼
+
+ã«ã¼ãã«æ§æã»åæåããããã¡ã¤ã«ï¼kernel_cfg.hï¼ã«ã¯ï¼æ¬¡ã®å®ç¾©ãçæ
+ããï¼
+
+(1) åºå®çæé¨å
+
+kernel_cfg.hãè¤æ°åã¤ã³ã¯ã«ã¼ããããã®ãé²ãããã®è¨è¿°ãçæããï¼å
+·
+ä½çã«ã¯ï¼ãã¡ã¤ã«ã®å
+é ­ã«æ¬¡ã®è¡ãçæããï¼
+
+#ifndef	TOPPERS_KERNEL_CFG_H
+#define	TOPPERS_KERNEL_CFG_H
+
+ã¾ãï¼ãã¡ã¤ã«ã®æ«å°¾ã«æ¬¡ã®è¡ãçæããï¼
+
+#endif	/* TOPPERS_KERNEL_CFG_H */
+
+(2) ãªãã¸ã§ã¯ãæ°ã®å®ç¾©
+
+ã«ã¼ãã«ããµãã¼ããããªãã¸ã§ã¯ãã®æ°ããã¯ã­å®ç¾©ããããªãã­ã»ããµãã£
+ã¬ã¯ãã£ãï¼#defineï¼ãçæããï¼å
+·ä½çã«ã¯ï¼æ¬¡ã®ãããªè¨è¿°ãçæããï¼
+
+#define TNUM_TSKID	<ã¿ã¹ã¯ã®æ°>
+#define TNUM_SEMID	<ã»ããã©ã®æ°>
+#define TNUM_FLGID	<ã¤ãã³ããã©ã°ã®æ°>
+#define TNUM_DTQID	<ãã¼ã¿ã­ã¥ã¼ã®æ°>
+#define TNUM_PDQID	<åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®æ°>
+#define TNUM_MBXID	<ã¡ã¼ã«ããã¯ã¹ã®æ°>
+#define TNUM_MPFID	<åºå®é·ã¡ã¢ãªãã¼ã«ã®æ°>
+#define TNUM_CYCID	<å¨æãã³ãã©ã®æ°>
+#define TNUM_ALMID	<ã¢ã©ã¼ã ãã³ãã©ã®æ°>
+
+(3) ãªãã¸ã§ã¯ãã®IDçªå·ã®å®ç¾©
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãIDçªå·ãå²ãä»ãããªãã¸ã§ã¯ãã®ååãï¼å²ãä»ãã
+IDçªå·ã«ãã¯ã­å®ç¾©ããããªãã­ã»ããµãã£ã¬ã¯ãã£ãï¼#defineï¼ãçæããï¼
+ä¾ãã°ï¼æ¬¡ã®ãããªè¨è¿°ãçæããï¼
+
+#define TASK1	1
+#define TASK2	2
+#define SEM1	1
+
+
+âã«ã¼ãã«æ§æã»åæåãã¡ã¤ã«ï¼kernel_cfg.cï¼
+
+(1) åºå®çæé¨å
+
+kernel_cfg.cç¨ã®ããããã¡ã¤ã«ã¨IDèªåå²ä»ãçµæãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ã
+ããããªãã­ã»ããµãã£ã¬ã¯ãã£ãï¼#includeï¼ãçæããï¼å
+·ä½çã«ã¯ï¼æ¬¡
+ã®è¡ãçæããï¼
+
+#include "kernel/kernel_int.h"
+#include "kernel_cfg.h"
+
+(2) ã«ã¼ãã«ã®ç¨®é¡ã®ãã§ãã¯
+
+kernel_cfg.cã¨ã«ã¼ãã«ã®ç¨®é¡ãä¸è´ãã¦ãããããã§ãã¯ããããã«ï¼æ¬¡ã®
+è¡ãçæããï¼
+
+#if TKERNEL_PRID != 0x07u
+#error The kernel does not match this configuration file.
+#endif
+
+(3) ã¤ã³ã¯ã«ã¼ããã£ã¬ã¯ãã£ãï¼#includeï¼ã®å¦ç
+
+ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«å«ã¾ããCè¨èªããªãã­ã»ããµã®ã¤
+ã³ã¯ã«ã¼ããã£ã¬ã¯ãã£ãï¼#includeï¼ã¨åä¸ã®ãã£ã¬ã¯ãã£ãï¼#includeï¼
+ãçæããï¼ä¾ãã°ï¼
+
+#include "sample1.h"
+
+ã¨ããã¤ã³ã¯ã«ã¼ããã£ã¬ã¯ãã£ãã«å¯¾ãã¦ï¼
+
+#include "sample1.h"
+
+ã¨ãããã£ã¬ã¯ãã£ããçæããï¼çæãããã£ã¬ã¯ãã£ãã®é åºã¯ï¼ã·ã¹ã
+ã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã§ã®ã¤ã³ã¯ã«ã¼ããã£ã¬ã¯ãã£ãã®é åº
+ã«ä¸è´ãããï¼
+
+(4) ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+
+kernel_cfg.cã®ä¸­ã§ä½¿ç¨ãããã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©ãçæããï¼
+å
+·ä½çã«ã¯ï¼æ¬¡ã®è¡ãçæããï¼
+
+#ifndef LOG_ISR_ENTER
+#define LOG_ISR_ENTER(intno)
+#endif /* LOG_ISR_ENTER */
+
+#ifndef LOG_ISR_LEAVE
+#define LOG_ISR_LEAVE(intno)
+#endif /* LOG_ISR_LEAVE */
+
+(5) ãªãã¸ã§ã¯ãã®IDçªå·ãä¿æããå¤æ°ã®å®ç¾©
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«å¯¾ãããªãã·ã§ã³æå®ï¼--external-idï¼ã«ããï¼ã³ã³ãã£
+ã®ã¥ã¬ã¼ã¿ãID çªå·ãå²ãä»ãããªãã¸ã§ã¯ãã®ååã®æ«å°¾ã«"_id"ãä»å ã
+ãååã®å¤æ°ãçæããï¼å¤æ°ã¯ï¼constå±æ§ãä»å ããIDåã®å¤æ°ã¨ãï¼å²ã
+ä»ããIDçªå·ãå¤ã¨ããï¼ä¾ãã°ï¼æ¬¡ã®ãããªè¨è¿°ãçæããï¼
+
+const ID TASK1_id = 1;
+const ID TASK2_id = 2;
+const ID SEM1_id = 1;
+
+(6) åã«ã¼ãã«ãªãã¸ã§ã¯ãã«é¢ããå®ç¾©
+
+ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã«ï¼ãªãã¸ã§ã¯ããçæããéç
+APIãCRE_XXXããå«ã¾ããåã«ã¼ãã«ãªãã¸ã§ã¯ãã«é¢ãã¦ï¼ãªãã¸ã§ã¯ãç
+æã®ããã®å®ç¾©ãçæããï¼
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã¯ï¼åãç¨®é¡ã®ãªãã¸ã§ã¯ããçæããéçAPIãéãï¼å
+ãªãã¸ã§ã¯ãã«IDçªå·ãå²ãä»ããï¼IDçªå·ã¯ï¼ä»ã®ãªãã¸ã§ã¯ãã®IDçªå·ã¨
+éè¤ããªãï¼IDçªå·ãé£ç¶ããããã«å²ãä»ããï¼
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«å¯¾ãããªãã·ã§ã³æå®ï¼--id-input-fileï¼ã«ããï¼ã³ã³
+ãã£ã®ã¥ã¬ã¼ã¿ããªãã¸ã§ã¯ãã«å²ãä»ããIDçªå·ãæå®ãããã¨ãã§ããï¼
+åãç¨®é¡ã®ç°ãªããªãã¸ã§ã¯ãã«å¯¾ãã¦åãIDçªå·ãæå®ãããï¼ã³ã³ãã£ã®ã¥
+ã¬ã¼ã¿ãIDçªå·ãã§ããéãé£ç¶ããããã«å²ãä»ããã¨ãã¦ãIDçªå·ãé£ç¶
+ããªãå ´åã«ã¯ï¼ASPã«ã¼ãã«ã¯ï¼ãªãã¸ã§ã¯ãã®IDçªå·ãé£ç¶ãã¦ãããã¨ã
+ä»®å®ãã¦å®è£
+ãã¦ããï¼ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã¯ã¨ã©ã¼ãå ±åããï¼
+
+ã¾ãï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«å¯¾ãããªãã·ã§ã³æå®ï¼--id-output-fileï¼ã«ã
+ãï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãIDçªå·ãå²ãä»ãããªãã¸ã§ã¯ãã®ååã¨å²ãä»ã
+ãIDçªå·ã®çµãï¼ãªãã·ã§ã³ã§æå®ãããã¡ã¤ã«ã«åºåããï¼
+
+åã«ã¼ãã«ãªãã¸ã§ã¯ãã«é¢ããå®ç¾©ã®æ¨æºçãªæ§æã¯ï¼æ¬¡ã®éãã§ããï¼ãª
+ãã¸ã§ã¯ãã«ãã£ã¦ä¾å¤ãããå ´åã«ã¯ï¼ãªãã¸ã§ã¯ãæ¯ã®é 
+ã§èª¬æããï¼
+
+(a) æå¤§ã®ãªãã¸ã§ã¯ãIDã®å¤æ°ã®å®ç¾©
+
+æå¤§ã®ãªãã¸ã§ã¯ãIDãæã¤å¤æ°ã®å®ç¾©ãçæããï¼å
+·ä½çã«ã¯ï¼ãªãã¸ã§ã¯
+ãã®çç¥è¨å·ããXXXï¼xxxãã¨ããã¨ï¼æ¬¡ã®ãããªè¡ãçæããï¼
+
+const ID _kernel_tmax_xxxid = (TMIN_XXXID + TNUM_XXXID - 1);
+
+(b) ãªãã¸ã§ã¯ãã«å¿
+è¦ãªã¡ã¢ãªé åã®å®ç¾©
+
+ãªãã¸ã§ã¯ãã«ãã£ã¦ã¯ï¼ãªãã¸ã§ã¯ãã«å¿
+è¦ãªã¡ã¢ãªé åã®å®ç¾©ãçæããï¼
+å
+·ä½çã«ã¯ï¼ãªãã¸ã§ã¯ãæ¯ã®é 
+ã§èª¬æããï¼
+
+(c) ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®å®ç¾©
+
+ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®å®ç¾©ãçæããï¼å
+·ä½çã«ã¯ï¼ãªãã¸ã§ã¯ã
+ã®çç¥è¨å·ããXXXï¼xxxãã¨ããã¨ï¼æ¬¡ã®ãããªè¡ãçæããï¼
+
+const XXXINIB _kernel_xxxinib_table[TNUM_XXXID] = {
+	<ãªãã¸ã§ã¯ãIDã1ã®ãªãã¸ã§ã¯ãã®åæåæ
+å ±>,
+	<ãªãã¸ã§ã¯ãIDã2ã®ãªãã¸ã§ã¯ãã®åæåæ
+å ±>,
+				â¦â¦
+	<ãªãã¸ã§ã¯ãIDãTNUM_XXXIDã®ãªãã¸ã§ã¯ãã®åæåæ
+å ±>
+};
+
+ãªãã¸ã§ã¯ãã®åæåæ
+å ±ã®å½¢å¼ã¯ï¼ãªãã¸ã§ã¯ãæ¯ã«ç°ãªãï¼å
+·ä½çã«ã¯ï¼
+ãªãã¸ã§ã¯ãæ¯ã®é 
+ã§èª¬æããï¼
+
+(d) ãªãã¸ã§ã¯ãã®ã³ã³ãã­ã¼ã«ãã­ãã¯ã®å®ç¾©
+
+ãªãã¸ã§ã¯ãã®ã³ã³ãã­ã¼ã«ãã­ãã¯ã®å®ç¾©ãçæããï¼å
+·ä½çã«ã¯ï¼ãªãã¸ã§
+ã¯ãã®çç¥è¨å·ããXXXï¼xxxãã¨ããã¨ï¼æ¬¡ã®ãããªè¡ãçæããï¼
+
+XXXCB _kernel_xxxcb_table[TNUM_XXXID];
+
+(6-1) ã¿ã¹ã¯ã«é¢ããå®ç¾©
+
+ASPã«ã¼ãã«ã¯ï¼ã¿ã¹ã¯ãä¸ã¤ããªãã±ã¼ã¹ã«å¯¾å¿ãã¦ããªãããï¼ã¿ã¹ã¯ã«é¢
+ããå®ç¾©ã¯å¿
+ãçæããªããã°ãªããªãï¼
+
+ã¿ã¹ã¯ã®çç¥è¨å·ã¯ãTSKããtskãã§ããï¼ãã ãï¼ã¿ã¹ã¯åæåãã­ãã¯ã®
+ãã¼ã¿åã¯TINIBï¼ãã®å¤æ°åã¯_kernel_tinib_tableï¼ã¿ã¹ã¯ã³ã³ãã­ã¼ã«ã
+ã­ãã¯ã®ãã¼ã¿åã¯TCBï¼ãã®å¤æ°åã¯_kernel_tcb_table ã§ããï¼ãããã
+ãTSKï¼tskãã«ä»£ãã¦ãTï¼tããç¨ãã¦ããï¼ï¼
+
+ã¿ã¹ã¯åæåãã­ãã¯ã«ã¯ï¼ãCRE_TSKãéçAPIã§æå®ãããæ
+å ±ã«å ãã¦ï¼
+ãDEF_TEXãéçAPIã§æå®ãããæ
+å ±ãå«ããï¼
+
+ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ã
+ã¦ããæã«çæãã¹ãæ
+å ±ã«ã¤ãã¦è¿°ã¹ãï¼
+
+CRE_TSK(tskid, { tskatr, exinf, task, itskpri, stksz, stk });
+DEF_TEX(tskid, { texatr, texrtn });
+
+(6-1-1) ã¿ã¹ã¯ã«å¿
+è¦ãªã¡ã¢ãªé åã®å®ç¾©
+
+ã¿ã¹ã¯ã«å¿
+è¦ãªã¡ã¢ãªé åã¨ãã¦ï¼ã¿ã¹ã¯ã®ã¹ã¿ãã¯é åãããï¼stkãNULLã®
+å ´åã«ã¯ï¼çæããã¿ã¹ã¯æ¯ã«ï¼æå®ããããµã¤ãºã®ã¹ã¿ãã¯é åãç¢ºä¿ããï¼
+å
+·ä½çã«ã¯ï¼ä¸è¨ã®éçAPIã«å¯¾ãã¦ï¼æ¬¡ã®å®ç¾©ãçæããï¼
+
+ï¼stkãNULLã®å ´åã®ã¿çæ
+static STK_T _kernel_stack_<ã¿ã¹ã¯å>[COUNT_STK_T(stksz)];
+
+(6-1-2) ã¿ã¹ã¯ã®åæåæ
+å ±
+
+ã¿ã¹ã¯åæåãã­ãã¯ä¸­ã«çæããã¿ã¹ã¯ã®åæåæ
+å ±ã¯ï¼æ¬¡ã®å½¢å¼ã¨ããï¼
+
+	{ (tskatr), (intptr_t)(exinf), (task), INT_PRIORITY(itskpri),
+								(stksz), (stk), (texatr), (texrtn) }
+
+ããã§ï¼stkãNULLã®å ´åã«ã¯ï¼(stksz)ã«ä»£ãã¦ROUND_STK_T(stksz)ãï¼
+(stk)ã«ä»£ãã¦(_kernel_stack_<ã¿ã¹ã¯å>)ãçæããï¼CRE_TSKã«å¯¾å¿ãã
+DEF_TEXããªãå ´åã«ã¯ï¼texatrãTA_NULLï¼texrtnãNULLã¨ããï¼
+
+(6-1-3) ã¿ã¹ã¯çæé åºãã¼ãã«ã®å®ç¾©
+
+ã¿ã¹ã¯ã«å¯¾ãã¦ã¯ï¼çæãããé åºï¼ã¿ã¹ã¯ãçæããéçAPIãè¨è¿°ããã
+é åºï¼ããã¼ãã«ã«åºåããå¿
+è¦ãããï¼ããã¯ï¼ã¿ã¹ã¯ã®çæãããé åºã§ï¼
+ã¿ã¹ã¯ã®åæåï¼ããå
+·ä½çã«ã¯ï¼ã¿ã¹ã¯ã®èµ·åï¼ãè¡ãå¿
+è¦ãããããã§ã
+ãï¼
+
+å
+·ä½çã«ã¯ï¼æ¬¡ã®ãããªè¡ãçæããï¼
+
+const ID _kernel_torder_table[TNUM_TSKID] = {
+	<æåã«çæãããã¿ã¹ã¯ã®ã¿ã¹ã¯ID>,
+	<2çªç®ã«çæãããã¿ã¹ã¯ã®ã¿ã¹ã¯ID>,
+				â¦â¦
+	<æå¾ã«çæãããã¿ã¹ã¯ã®ã¿ã¹ã¯ID>
+};
+
+(6-1-4) ã¨ã©ã¼æ¡ä»¶
+
+ã¿ã¹ã¯ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿æ¬ä½ãæ¤åºãããã®
+ã»åãtskidã«å¯¾ããCRE_TSKãè¤æ°ããå ´åï¼E_OBJï¼
+ã»DEF_TEXã«å¯¾å¿ããCRE_TSKããªãå ´åï¼E_NOEXSï¼
+ã»åãtskidã«å¯¾ããDEF_TEXãè¤æ°ããå ´åï¼E_OBJï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»tskatrãï¼ï¼»TA_ACTï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+	â» ã¿ã¼ã²ããä¾å­é¨ã§ã¿ã¹ã¯å±æ§ãè¿½å å¯ï¼TARGET_TSKATRï¼
+ã»(TMIN_TPRI <= itskpri && itskpri <= TMAX_TPRI)ã§ãªãå ´åï¼E_PARï¼
+ã»stkszã0ä»¥ä¸ãï¼ã¿ã¼ã²ããå®ç¾©ã®æå°å¤ï¼TARGET_MIN_STKSZï¼ãããå°ã
+ããå ´åï¼E_PARï¼
+ã»stkszãã¹ã¿ãã¯é åã®ãµã¤ãºã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	- ã¿ã¼ã²ããä¾å­ã®å¤ï¼CHECK_STKSZ_ALIGNï¼ã®åæ°ã§ãªãå ´å
+	â» ãã®ã¨ã©ã¼ãã§ãã¯ã¯ï¼stkãNULLã§ãªãå ´åã«ã®ã¿è¡ã
+ã»texatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+
+ï¼ãã¹3ã§æ¤åºãããã®
+ã»taskã¨texrtnããã­ã°ã©ã ã®éå§çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	- ã¿ã¼ã²ããä¾å­ã®å¤ï¼CHECK_FUNC_ALIGNï¼ã®åæ°ã§ãªãå ´å
+	- NULLã®å ´åï¼ã¿ã¼ã²ããä¾å­ï¼CHECK_FUNC_NONNULLï¼
+ã»stkãã¹ã¿ãã¯é åã®å
+é ­çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	- ã¿ã¼ã²ããä¾å­ã®å¤ï¼CHECK_STACK_ALIGNï¼ã®åæ°ã§ãªãå ´å
+	- NULLã®å ´åï¼ã¿ã¼ã²ããä¾å­ï¼CHECK_STACK_NONNULLï¼
+
+(6-2) ã»ããã©ã«é¢ããå®ç¾©
+
+ã»ããã©ã®çç¥è¨å·ã¯ãSEMï¼semãã§ããï¼ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼
+ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ãã¦ããæã«çæãã¹ãæ
+å ±ã«ã¤ãã¦è¿°ã¹
+ãï¼ãªãï¼ã»ããã©ã«å¿
+è¦ãªã¡ã¢ãªé åã¯ãªãï¼
+
+CRE_SEM(semid, { sematr, isemcnt, maxsem });
+
+(6-2-1) ã»ããã©ã®åæåæ
+å ±
+
+ã»ããã©åæåãã­ãã¯ä¸­ã«çæããã»ããã©ã®åæåæ
+å ±ã¯ï¼æ¬¡ã®å½¢å¼ã¨ã
+ãï¼
+
+	{ (sematr), (isemcnt), (maxsem) }
+
+(6-2-2) ã¨ã©ã¼æ¡ä»¶
+
+ã»ããã©ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿æ¬ä½ãæ¤åºãããã®
+ã»åãsemidã«å¯¾ããCRE_SEMãè¤æ°ããå ´åï¼E_OBJï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»sematrãï¼ï¼»TA_TPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+ã»(0 <= isemcnt && isemcnt <= maxsem)ã§ãªãå ´åï¼E_PARï¼
+ã»(1 <= maxsem && maxsem <= TMAX_MAXSEM)ã§ãªãå ´åï¼E_PARï¼
+
+(6-3) ã¤ãã³ããã©ã°ã«é¢ããå®ç¾©
+
+ã¤ãã³ããã©ã°ã®çç¥è¨å·ã¯ãFLGï¼flgãã§ããï¼ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£
+ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ãã¦ããæã«çæãã¹ãæ
+å ±ã«ã¤
+ãã¦è¿°ã¹ãï¼ãªãï¼ã¤ãã³ããã©ã°ã«å¿
+è¦ãªã¡ã¢ãªé åã¯ãªãï¼
+
+CRE_FLG(flgid, { flgatr, iflgptn });
+
+(6-3-1) ã¤ãã³ããã©ã°ã®åæåæ
+å ±
+
+ã¤ãã³ããã©ã°åæåãã­ãã¯ä¸­ã«çæããã¤ãã³ããã©ã°ã®åæåæ
+å ±ã¯ï¼
+æ¬¡ã®å½¢å¼ã¨ããï¼
+
+	{ (flgatr), (iflgptn) }
+
+(6-3-2) ã¨ã©ã¼æ¡ä»¶
+
+ã¤ãã³ããã©ã°ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿æ¬ä½ãæ¤åºãããã®
+ã»åãflgidã«å¯¾ããCRE_FLGãè¤æ°ããå ´åï¼E_OBJï¼
+
+ï¼ãã¹1ã§æ¤åºãããã®
+ã»iflgptnãFLGPTNã«æ ¼ç´ã§ããªãå ´åï¼E_PARï¼
+	â iflgptnãuint32_tã«æ ¼ç´ã§ããªãå ´åã¯ï¼cfg1_out.cã®ã³ã³ãã¤ã«æ
+	   ã«ã¨ã©ã¼ã¨ãªãï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»flgatrãï¼ï¼»TA_TPRIï¼½ï½ï¼»TA_WMULï¼½ï½ï¼»TA_CLRï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+ã»iflgptnãFLGPTNã«æ ¼ç´ã§ããªãå ´åï¼E_PARï¼
+	â iflgptnãuint32_tã«ã¯æ ¼ç´ã§ãããï¼FLGPTNã«æ ¼ç´ã§ããªãå ´åã¯ï¼
+	   ãã¹2ã§ã¨ã©ã¼ãæ¤åºããï¼
+
+(6-4) ãã¼ã¿ã­ã¥ã¼ã«é¢ããå®ç¾©
+
+ãã¼ã¿ã­ã¥ã¼ã®çç¥è¨å·ã¯ãDTQï¼dtqãã§ããï¼ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥
+ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ãã¦ããæã«çæãã¹ãæ
+å ±ã«ã¤ãã¦
+è¿°ã¹ãï¼
+
+CRE_DTQ(dtqid, { dtqatr, dtqcnt, dtqmb });
+
+(6-4-1) ãã¼ã¿ã­ã¥ã¼ã«å¿
+è¦ãªã¡ã¢ãªé åã®å®ç¾©
+
+ãã¼ã¿ã­ã¥ã¼ã«å¿
+è¦ãªã¡ã¢ãªé åã¨ãã¦ï¼ãã¼ã¿ã­ã¥ã¼ç®¡çé åãããï¼çæ
+ãããã¼ã¿ã­ã¥ã¼æ¯ã«ï¼å¿
+è¦ãªãµã¤ãºã®ãã¼ã¿ã­ã¥ã¼ç®¡çé åãå®ç¾©ããï¼å
+·
+ä½çã«ã¯ï¼ä¸è¨ã®éçAPIã«å¯¾ãã¦ï¼æ¬¡ã®å®ç¾©ãçæããï¼
+
+ï¼dtqcntã0ã§ãªãå ´åã®ã¿çæ
+static DTQMB _kernel_dtqmb_<ãã¼ã¿ã­ã¥ã¼å>[dtqcnt];
+
+(6-4-2) ãã¼ã¿ã­ã¥ã¼ã®åæåæ
+å ±
+
+ãã¼ã¿ã­ã¥ã¼åæåãã­ãã¯ä¸­ã«çæãããã¼ã¿ã­ã¥ã¼ã®åæåæ
+å ±ã¯ï¼æ¬¡ã®
+å½¢å¼ã¨ããï¼
+
+	{ (dtqatr), (dtqcnt), (_kernel_dtqmb_<ãã¼ã¿ã­ã¥ã¼å>) }
+
+ããã§ï¼dtqcntã0ã®å ´åã«ã¯ï¼_kernel_dtqmb_<ãã¼ã¿ã­ã¥ã¼å>ã«ä»£ãã¦ï¼
+NULLãç¨ããï¼
+
+(6-4-3) ã¨ã©ã¼æ¡ä»¶
+
+ãã¼ã¿ã­ã¥ã¼ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿æ¬ä½ãæ¤åºãããã®
+ã»åãdtqidã«å¯¾ããCRE_DTQãè¤æ°ããå ´åï¼E_OBJï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»dtqatrãï¼ï¼»TA_TPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+ã»dtqcntãè² ã®å¤ã®å ´åï¼E_PARï¼
+ã»dtqmbãNULLã§ãªãå ´åï¼E_NOSPTï¼
+
+(6-5) åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã«é¢ããå®ç¾©
+
+åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®çç¥è¨å·ã¯ãPDQï¼pdqãã§ããï¼ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³
+ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ãã¦ããæã«çæãã¹ãæ
+
+å ±ã«ã¤ãã¦è¿°ã¹ãï¼
+
+CRE_PDQ(ID pdqid, { pdqatr, pdqcnt, maxdpri, pdqmb });
+
+(6-5-1) åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã«å¿
+è¦ãªã¡ã¢ãªé åã®å®ç¾©
+
+åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã«å¿
+è¦ãªã¡ã¢ãªé åã¨ãã¦ï¼åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çé å
+ãããï¼çæããåªå
+åº¦ãã¼ã¿ã­ã¥ã¼æ¯ã«ï¼å¿
+è¦ãªãµã¤ãºã®åªå
+åº¦ãã¼ã¿ã­ã¥ã¼
+ç®¡çé åãå®ç¾©ããï¼å
+·ä½çã«ã¯ï¼ä¸è¨ã®éçAPIã«å¯¾ãã¦ï¼æ¬¡ã®å®ç¾©ãçæã
+ãï¼
+
+ï¼pdqcntã0ã§ãªãå ´åã®ã¿çæ
+static PDQMB _kernel_pdqmb_<åªå
+åº¦ãã¼ã¿ã­ã¥ã¼å>[pdqcnt];
+
+(6-5-2) åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®åæåæ
+å ±
+
+åªå
+åº¦ãã¼ã¿ã­ã¥ã¼åæåãã­ãã¯ä¸­ã«çæããåªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®åæå
+æ
+å ±ã¯ï¼æ¬¡ã®å½¢å¼ã¨ããï¼
+
+	{ (pdqatr), (pdqcnt), (maxdpri), (_kernel_pdqmb_<åªå
+åº¦ãã¼ã¿ã­ã¥ã¼å>) }
+
+ããã§ï¼pdqcntã0ã®å ´åã«ã¯ï¼_kernel_pdqmb_<åªå
+åº¦ãã¼ã¿ã­ã¥ã¼å>ã«ä»£ã
+ã¦ï¼NULLãç¨ããï¼
+
+(6-5-3) ã¨ã©ã¼æ¡ä»¶
+
+åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿æ¬ä½ãæ¤åºãããã®
+ã»åãpdqidã«å¯¾ããCRE_PDQãè¤æ°ããå ´åï¼E_OBJï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»pdqatrãï¼ï¼»TA_TPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+ã»pdqcntãè² ã®å¤ã®å ´åï¼E_PARï¼
+ã»(TMIN_DPRI <= maxdpri && maxdpri <= TMAX_DPRI)ã§ãªãå ´åï¼E_PARï¼
+ã»pdqmbãNULLã§ãªãå ´åï¼E_NOSPTï¼
+
+(6-6) ã¡ã¼ã«ããã¯ã¹ã«é¢ããå®ç¾©
+
+ã¡ã¼ã«ããã¯ã¹ã®çç¥è¨å·ã¯ãMBXï¼mbxãã§ããï¼ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£
+ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ãã¦ããæã«çæãã¹ãæ
+å ±ã«ã¤
+ãã¦è¿°ã¹ãï¼ãªãï¼ã¡ã¼ã«ããã¯ã¹ã«å¿
+è¦ãªã¡ã¢ãªé åã¯ãªãï¼
+
+CRE_MBX(mbxid, { mbxatr, maxmpri, mprihd });
+
+(6-6-1) ã¡ã¼ã«ããã¯ã¹ã®åæåæ
+å ±
+
+ã¡ã¼ã«ããã¯ã¹åæåãã­ãã¯ä¸­ã«çæããã¡ã¼ã«ããã¯ã¹ã®åæåæ
+å ±ã¯ï¼
+æ¬¡ã®å½¢å¼ã¨ããï¼
+
+	{ (mbxatr), (maxmpri) }
+
+(6-6-2) ã¨ã©ã¼æ¡ä»¶
+
+ã¡ã¼ã«ããã¯ã¹ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿æ¬ä½ãæ¤åºãããã®
+ã»åãmbxidã«å¯¾ããCRE_MBXãè¤æ°ããå ´åï¼E_OBJï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»mbxatrãï¼ï¼»TA_TPRIï¼½ï½ï¼»TA_MPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+ã»(TMIN_MPRI <= maxmpri && maxmpri <= TMAX_MPRI)ã§ãªãå ´åï¼E_PARï¼
+ã»mprihdãNULLã§ãªãå ´åï¼E_NOSPTï¼
+
+(6-7) åºå®é·ã¡ã¢ãªãã¼ã«ã«é¢ããå®ç¾©
+
+åºå®é·ã¡ã¢ãªãã¼ã«ã®çç¥è¨å·ã¯ãMPFï¼mpfãã§ããï¼ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³
+ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ãã¦ããæã«çæãã¹ãæ
+
+å ±ã«ã¤ãã¦è¿°ã¹ãï¼
+
+CRE_MPF(mpfid, { mpfatr, blkcnt, blksz, mpf, mpfmb });
+
+(6-7-1) åºå®é·ã¡ã¢ãªãã¼ã«ã«å¿
+è¦ãªã¡ã¢ãªé åã®å®ç¾©
+
+åºå®é·ã¡ã¢ãªãã¼ã«ã«å¿
+è¦ãªã¡ã¢ãªé åã¨ãã¦ï¼åºå®é·ã¡ã¢ãªãã¼ã«é åã¨åº
+å®é·ã¡ã¢ãªãã¼ã«ç®¡çé åãããï¼çæããåºå®é·ã¡ã¢ãªãã¼ã«æ¯ã«ï¼å¿
+è¦ãª
+ãµã¤ãºã®åºå®é·ã¡ã¢ãªãã¼ã«é åï¼mpfãNULLã®å ´åã®ã¿ï¼ã¨åºå®é·ã¡ã¢ãªãã¼
+ã«ç®¡çé åãç¢ºä¿ããï¼å
+·ä½çã«ã¯ï¼ä¸è¨ã®éçAPIã«å¯¾ãã¦ï¼æ¬¡ã®å®ç¾©ãçæ
+ããï¼
+
+ï¼mpfãNULLã®å ´åã®ã¿çæ
+static MPF_T _kernel_mpf_<åºå®é·ã¡ã¢ãªãã¼ã«å>[(blkcnt) * COUNT_MPF_T(blksz)];
+								
+ï¼å¿
+ãçæ
+static MPFMB _kernel_mpfmb_<åºå®é·ã¡ã¢ãªãã¼ã«å>[blkcnt];
+
+(6-7-2) åºå®é·ã¡ã¢ãªãã¼ã«ã®åæåæ
+å ±
+
+åºå®é·ã¡ã¢ãªãã¼ã«åæåãã­ãã¯ä¸­ã«çæããåºå®é·ã¡ã¢ãªãã¼ã«ã®åæå
+æ
+å ±ã¯ï¼æ¬¡ã®å½¢å¼ã¨ããï¼
+
+	{ (mpfatr), (blkcnt), ROUND_MPF_T(blksz), mpf,
+						(_kernel_mpfmb_<åºå®é·ã¡ã¢ãªãã¼ã«å>) }
+
+ããã§ï¼mpfãNULLã®å ´åã«ã¯ï¼mpfã«ä»£ãã¦ï¼_kernel_mpf_<åºå®é·ã¡ã¢ãªãã¼
+ã«å>ãç¨ããï¼
+
+(6-7-3) ã¨ã©ã¼æ¡ä»¶
+
+åºå®é·ã¡ã¢ãªãã¼ã«ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿æ¬ä½ãæ¤åºãããã®
+ã»åãmpfidã«å¯¾ããCRE_MPFãè¤æ°ããå ´åï¼E_OBJï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»mpfatrãï¼ï¼»TA_TPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+ã»blkcntã0ä»¥ä¸ã®å ´åï¼E_PARï¼
+ã»blkszã0ä»¥ä¸ã®å ´åï¼E_PARï¼
+ã»mpfmbãNULLã§ãªãå ´åï¼E_NOSPTï¼
+
+ï¼ãã¹3ã§æ¤åºãããã®
+ã»mpfãåºå®é·ã¡ã¢ãªãã¼ã«é åã®å
+é ­çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	- ã¿ã¼ã²ããä¾å­ã®å¤ï¼CHECK_MPF_ALIGNï¼ã®åæ°ã§ãªãå ´å
+	- NULLã®å ´åï¼ã¿ã¼ã²ããä¾å­ï¼CHECK_MPF_NONNULLï¼
+
+(6-8) å¨æãã³ãã©ã«é¢ããå®ç¾©
+
+å¨æãã³ãã©ã®çç¥è¨å·ã¯ãCYCï¼cycãã§ããï¼ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£
+ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ãã¦ããæã«çæãã¹ãæ
+å ±ã«ã¤
+ãã¦è¿°ã¹ãï¼ãªãï¼å¨æãã³ãã©ã«å¿
+è¦ãªã¡ã¢ãªé åã¯ãªãï¼
+
+CRE_CYC(cycid, { cycatr, exinf, cychdr, cyctim, cycphs });
+
+(6-8-1) å¨æãã³ãã©ã®åæåæ
+å ±
+
+å¨æãã³ãã©åæåãã­ãã¯ä¸­ã«çæããå¨æãã³ãã©ã®åæåæ
+å ±ã¯ï¼æ¬¡ã®
+å½¢å¼ã¨ããï¼
+
+	{ (cycatr), (intptr_t)(exinf), (cychdr), (cyctim), (cycphs) }
+
+(6-8-2) ã¨ã©ã¼æ¡ä»¶
+
+å¨æãã³ãã©ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿æ¬ä½ãæ¤åºãããã®
+ã»åãcycidã«å¯¾ããCRE_CYCãè¤æ°ããå ´åï¼E_OBJï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»cycatrãï¼ï¼»TA_STAï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+ã»(0 < cyctim && cyctim <= TMAX_RELTIM)ã§ãªãå ´åï¼E_PARï¼
+ã»(0 <= cycphs && cycphs <= TMAX_RELTIM)ã§ãªãå ´åï¼E_PARï¼
+ã»è­¦åï¼cycatrã«TA_STAãè¨­å®ããã¦ãã¦ï¼(cycphs == 0)ã®å ´å
+
+ï¼ãã¹3ã§æ¤åºãããã®
+ã»cychdrããã­ã°ã©ã ã®éå§çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	- ã¿ã¼ã²ããä¾å­ã®å¤ï¼CHECK_FUNC_ALIGNï¼ã®åæ°ã§ãªãå ´å
+	- NULLã®å ´åï¼ã¿ã¼ã²ããä¾å­ï¼CHECK_FUNC_NONNULLï¼
+
+(6-9) ã¢ã©ã¼ã ãã³ãã©ã«é¢ããå®ç¾©
+
+ã¢ã©ã¼ã ãã³ãã©ã®çç¥è¨å·ã¯ãALMï¼almãã§ããï¼ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³
+ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ãã¦ããæã«çæãã¹ãæ
+å ±
+ã«ã¤ãã¦è¿°ã¹ãï¼ãªãï¼ã¢ã©ã¼ã ãã³ãã©ã«å¿
+è¦ãªã¡ã¢ãªé åã¯ãªãï¼
+
+CRE_ALM(ID almid, { almatr, (intptr_t)(exinf), almhdr });
+
+(6-9-1) ã¢ã©ã¼ã ãã³ãã©ã®åæåæ
+å ±
+
+ã¢ã©ã¼ã ãã³ãã©åæåãã­ãã¯ä¸­ã«çæããã¢ã©ã¼ã ãã³ãã©ã®åæåæ
+å ±
+ã¯ï¼æ¬¡ã®å½¢å¼ã¨ããï¼
+
+	{ (almatr), (exinf), (almhdr) }
+
+(6-9-2) ã¨ã©ã¼æ¡ä»¶
+
+ã¢ã©ã¼ã ãã³ãã©ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿æ¬ä½ãæ¤åºãããã®
+ã»åãalmidã«å¯¾ããCRE_ALMãè¤æ°ããå ´åï¼E_OBJï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»almatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+
+ï¼ãã¹3ã§æ¤åºãããã®
+ã»almhdrããã­ã°ã©ã ã®éå§çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	- ã¿ã¼ã²ããä¾å­ã®å¤ï¼CHECK_FUNC_ALIGNï¼ã®åæ°ã§ãªãå ´å
+	- NULLã®å ´åï¼ã¿ã¼ã²ããä¾å­ï¼CHECK_FUNC_NONNULLï¼
+
+(7) å²è¾¼ã¿ã«é¢ããå®ç¾©
+
+å²è¾¼ã¿ã«é¢ãã¦çæããæ
+å ±ã¯ï¼ã¿ã¼ã²ããæ¯ã«å®ãããã¨ãã§ããï¼ã¿ã¼ã²ã
+ãæ¯ã«å®ããªãå ´åã«ã¯ï¼ä»¥ä¸ã§è¿°ã¹ãã¿ã¼ã²ããã«ä¾å­ããªãæ¨æºçãªæ
+å ±
+ãçæããï¼ã¿ã¼ã²ããæ¯ã«å®ããå ´åã«ã¯ï¼(7-1)ã¨(7-3)ã«è¿°ã¹ãæ
+å ±ã¯ç
+æããªãï¼(7-2)ã«è¿°ã¹ãæ
+å ±ã¯çæããï¼ï¼
+
+(7-1) å²è¾¼ã¿è¦æ±ã©ã¤ã³ã«é¢ããå®ç¾©
+
+å²è¾¼ã¿è¦æ±ã©ã¤ã³ã®å±æ§ãè¨­å®ããéçAPIãCFG_INTãã§è¨­å®ããå²è¾¼ã¿è¦æ±
+ã©ã¤ã³ã«é¢ããå®ç¾©ãçæããï¼å
+·ä½çã«ã¯æ¬¡ã®éãï¼
+
+ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ã
+ã¦ããæã«çæãã¹ãæ
+å ±ã«ã¤ãã¦è¿°ã¹ãï¼
+
+CFG_INT(INTNO intno, { intatr, intpri });
+
+(7-1-1) è¨­å®ããå²è¾¼ã¿è¦æ±ã©ã¤ã³ã®æ°
+
+è¨­å®ããå²è¾¼ã¿è¦æ±ã©ã¤ã³ã®æ°ããã¯ã­å®ç¾©ããããªãã­ã»ããµãã£ã¬ã¯ãã£
+ãï¼#defineï¼ãçæããï¼ã¾ãï¼ãã®å¤ãæã¤å¤æ°ã®å®ç¾©ãçæããï¼å
+·ä½ç
+ã«ã¯ï¼æ¬¡ã®ãããªè¡ãçæããï¼
+
+#define TNUM_INTNO <è¨­å®ããå²è¾¼ã¿è¦æ±ã©ã¤ã³ã®æ°>
+const uint_t	_kernel_tnum_intno = TNUM_INTNO;
+
+(7-1-2) å²è¾¼ã¿è¦æ±ã©ã¤ã³åæåãã­ãã¯ã®å®ç¾©
+
+å²è¾¼ã¿è¦æ±ã©ã¤ã³åæåãã­ãã¯ãçæããï¼å
+·ä½çã«ã¯ï¼æ¬¡ã®ãããªè¡ãç
+æããï¼
+
+const INTINIB _kernel_intinib_table[TNUM_INTNO] = {
+	<å²è¾¼ã¿è¦æ±ã©ã¤ã³1ã®åæåæ
+å ±>,
+	<å²è¾¼ã¿è¦æ±ã©ã¤ã³2ã®åæåæ
+å ±>,
+				â¦â¦
+	<å²è¾¼ã¿è¦æ±ã©ã¤ã³TNUM_INTNOã®åæåæ
+å ±>
+};
+
+ãã®ä¸­ã®å²è¾¼ã¿è¦æ±ã©ã¤ã³ã®åæåæ
+å ±ã¯ï¼æ¬¡ã®å½¢å¼ã¨ããï¼
+
+	{ (intno), (intatr), (intpri) }
+
+(7-1-3) ã¨ã©ã¼æ¡ä»¶
+
+å²è¾¼ã¿è¦æ±ã©ã¤ã³ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»intnoãCFG_INTã«å¯¾ããå²è¾¼ã¿çªå·ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+ã»intnoãCFG_INTã«ãã£ã¦è¨­å®æ¸ã¿ã®å ´åï¼E_OBJï¼
+ã»intatrãï¼ï¼»TA_ENAINTï¼½ï½ï¼»TA_EDGEï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+	â» ã¿ã¼ã²ããä¾å­é¨ã§å²è¾¼ã¿å±æ§ãè¿½å å¯ï¼TARGET_INTATRï¼
+ã»ã«ã¼ãã«ç®¡çã«åºå®ããã¦ããintnoã«å¯¾ãã¦ï¼intpriã«TMIN_INTPRIããã
+ãå°ããå¤ãæå®ãããå ´åï¼E_OBJï¼
+ã»ã«ã¼ãã«ç®¡çå¤ã«åºå®ããã¦ããintnoã«å¯¾ãã¦ï¼intpriã«TMIN_INTPRIãã
+ããå°ããå¤ãæå®ãããªãã£ãå ´åï¼E_OBJï¼
+ã»intpriãCFG_INTã«å¯¾ããå²è¾¼ã¿åªå
+åº¦ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+
+ï¼å¿
+è¦ã«å¿ãã¦ã¿ã¼ã²ããä¾å­é¨ã§æ¤åºãããã®
+ã»intatrãå²è¾¼ã¿å±æ§ã¨ãã¦è¨­å®ã§ããªãå¤ã®å ´åï¼E_RSATRï¼
+ã»intpriãå²è¾¼ã¿åªå
+åº¦ã¨ãã¦è¨­å®ã§ããªãå¤ã®å ´åï¼E_PARï¼
+ã»åä¸ã®å²è¾¼ã¿åªå
+åº¦ããè¨­å®ã§ããªãå²è¾¼ã¿è¦æ±ã©ã¤ã³ã«å¯¾ãã¦ï¼ç°ãªãå²
+ãè¾¼ã¿åªå
+åº¦ãè¨­å®ããå ´åï¼E_PARï¼
+
+(7-2) å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã«é¢ããå®ç¾©
+
+(7-2-1) å²è¾¼ã¿ãã³ãã©ã®çæ
+
+ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã«å«ã¾ããå²è¾¼ã¿ãµã¼ãã¹ã«ã¼ã
+ã³ãè¿½å ããéçAPIãATT_ISRãã«å¯¾ãã¦ï¼åä¸ã®å²è¾¼ã¿çªå·ã«å¯¾ãã¦è¿½å ã
+ããå²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ãé ã«å¼ã³åºãé¢æ°ãçæããï¼
+
+å
+·ä½çã«ã¯ï¼åä¸ã®å²è¾¼ã¿çªå·ã«å¯¾ãã¦å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ãè¿½å ãã
+
+ATT_ISR({ isratr_1, exinf_1, intno, isr_1, isrpri_1 });
+ATT_ISR({ isratr_2, exinf_2, intno, isr_2, isrpri_2 });
+	â¦â¦
+ATT_ISR({ isratr_n, exinf_n, intno, isr_n, isrpri_n });
+
+ã¨ããéçAPIã«å¯¾ãã¦ï¼æ¬¡ã®ãããªé¢æ°ãçæããï¼ããã§ï¼isrpri_1ï¼
+isrpri_2ï¼â¦â¦ï¼isrpri_nã¯ï¼å¤ã®å°ããé ã«ä¸¦ã¹æ¿ãããã¦ãããã®ã¨ããï¼
+å¤ãåããã®ã®éã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã§ã®éç
+APIã®é åºã®éãã«ä¸¦ãã§ãããã®ã¨ããï¼
+
+static void
+_kernel_inthdr_<intno>(void)
+{
+	PRI		saved_ipm;
+
+	i_begin_int(intno);
+	saved_ipm = i_get_ipm();
+
+	LOG_ISR_ENTER(<intno>);		/* ISR1ã®å¼åºã */
+	isr_1((intptr_t)(exinf_1));
+	LOG_ISR_LEAVE(intno);
+
+	if (i_sense_lock()) {		/* ISRã®å¼åºãåã®ç¶æ
+ã«æ»ã */
+		i_unlock_cpu();
+	}
+	i_set_ipm(saved_ipm);
+
+	LOG_ISR_ENTER(<intno>);		/* ISR2ã®å¼åºã */
+	isr_2((intptr_t)(exinf_2));
+	LOG_ISR_LEAVE(intno);
+
+	if (i_sense_lock()) {		/* ISRã®å¼åºãåã®ç¶æ
+ã«æ»ã */
+		i_unlock_cpu();
+	}
+	i_set_ipm(saved_ipm);
+
+	â¦â¦
+
+	LOG_ISR_ENTER(<intno>);		/* ISRnã®å¼åºã */
+	isr_n((intptr_t)(exinf_n));
+	LOG_ISR_LEAVE(intno);
+
+	i_end_int(intno);
+}
+
+ããã§ï¼ISRnã®å¼åºãã®å¾ã«å¼åºãåã®ç¶æ
+ã«æ»ããªãã®ã¯ï¼å²è¾¼ã¿ãã³ãã©
+ããã®ãªã¿ã¼ã³ã«ããï¼ã«ã¼ãã«ãå
+ã®ç¶æ
+ã«æ»ãããã§ããï¼
+
+åä¸ã®å²è¾¼ã¿çªå·ã«å¯¾ãã¦è¿½å ãããå²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã1ã¤ã®ã¿ã®å ´å
+ã«ã¯ï¼æ¬¡ã®ãããªé¢æ°ãçæããï¼
+
+static void
+_kernel_inthdr_<intno>(void)
+{
+	i_begin_int(intno);
+	LOG_ISR_ENTER(intno);
+	isr_1((intptr_t)(exinf_1));
+	LOG_ISR_LEAVE(intno);
+	i_end_int(intno);
+}
+
+ãèª²é¡ãããã§ï¼LOG_ISR_ENTERï¼LOG_ISR_LEAVEã®å¼æ°ãã©ãããããèª²é¡ã¨
+ãã¦æ®ã£ã¦ããï¼ATT_ISRã§ç»é²ãããISRã«å¯¾ãã¦ã¯ISR IDãä»ä¸ãããªãã
+ãï¼IDã§ISRãåºå¥ãããã¨ãã§ããªãï¼ãããªãå²è¾¼ã¿çªå·ãæ¸¡ãã¦ãããï¼
+æ¡å¼µæ
+å ±ï¼exinfï¼ãæ¸¡ãã¹ããããããªãï¼
+
+(7-2-2) å²è¾¼ã¿ãã³ãã©ã®å®ç¾©ã«ç¸å½ããå¦ç
+
+ä¸ã®ããã«å²è¾¼ã¿ãã³ãã©ãçæããå ´åã«ã¯ï¼æ¬¡ã«èª¬æããå²è¾¼ã¿ãã³ãã©
+ã«é¢ããå®ç¾©ã«ããã¦ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã«æ¬¡ã®é
+çAPIãå«ã¾ãã¦ããã®ã¨åæ§ã«å¦çããï¼
+
+DEF_INH(inhno, { TA_NULL, _kernel_inthdr_<intno> });
+
+ããã§inhnoã¯ï¼intnoã«å¯¾å¿ããå²è¾¼ã¿ãã³ãã©çªå·ã§ããï¼
+
+(7-2-3) ã¨ã©ã¼æ¡ä»¶
+
+å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»isratrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+	â» ã¿ã¼ã²ããä¾å­é¨ã§å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³å±æ§ãè¿½å å¯ï¼TARGET_ISRATRï¼
+ã»intnoãATT_ISRã«å¯¾ããå²è¾¼ã¿çªå·ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	â» intnoã«å¯¾å¿ããinhnoããªãå ´åãå«ã
+ã»(TMIN_ISRPRI <= isrpri && isrpri <= TMAX_ISRPRI)ã§ãªãå ´åï¼E_PARï¼
+ã»intnoã«å¯¾å¿ããinhnoã«å¯¾ãã¦DEF_INHãããå ´åï¼E_OBJï¼
+ã»intnoã«å¯¾ããCFG_INTããªãå ´åï¼E_OBJï¼
+ã»intnoã«å¯¾ãã¦CFG_INTã§è¨­å®ãããå²è¾¼ã¿åªå
+åº¦ãTMIN_INTPRIãããå°ãã
+ãå ´åï¼E_OBJï¼
+	â» ã«ã¼ãã«ç®¡çå¤ã®ISRã¯ãµãã¼ãããªããã
+
+ï¼å¯è½ã§ããã°ã¿ã¼ã²ããä¾å­é¨ã§æ¤åºãããã®
+ã»isrããã­ã°ã©ã ã®éå§çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+
+(7-3) å²è¾¼ã¿ãã³ãã©ã«é¢ããå®ç¾©
+
+å²è¾¼ã¿ãã³ãã©ãå®ç¾©ããéçAPIãDEF_INHãã§å®ç¾©ããå²è¾¼ã¿ãã³ãã©ï¼ä¸
+è¿°ã®å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®è¿½å ã«ããã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæããå²è¾¼
+ã¿ãã³ãã©ãå«ãï¼ã«é¢ããå®ç¾©ãçæããï¼å
+·ä½çã«ã¯æ¬¡ã®éãï¼
+
+ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ã
+ã¦ããæã«çæãã¹ãæ
+å ±ã«ã¤ãã¦è¿°ã¹ãï¼
+
+DEF_INH(inhno, { inhatr, inthdr });
+
+(7-3-1) å®ç¾©ããå²è¾¼ã¿ãã³ãã©ã®æ°
+
+å®ç¾©ããå²è¾¼ã¿ãã³ãã©ã®æ°ããã¯ã­å®ç¾©ããããªãã­ã»ããµãã£ã¬ã¯ãã£ã
+ï¼#defineï¼ãçæããï¼ã¾ãï¼ãã®å¤ãæã¤å¤æ°ã®å®ç¾©ãçæããï¼å
+·ä½ç
+ã«ã¯ï¼æ¬¡ã®ãããªè¡ãçæããï¼
+
+#define TNUM_INHNO <å®ç¾©ããå²è¾¼ã¿ãã³ãã©ã®æ°>
+const uint_t	_kernel_tnum_inhno = TNUM_INHNO;
+
+(7-3-2) å²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦ç
+
+å®ç¾©ããå²è¾¼ã¿ãã³ãã©æ¯ã«ï¼å²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦çã«ã¼ãã³ãçæã
+ãï¼å
+·ä½çã«ã¯ï¼æ¬¡ã®ãããªè¡ãçæããï¼
+
+INTHDR_ENTRY(inhno, inhno_num, inthdr)
+
+ããã§inhno_numã¯ï¼inhnoï¼å²è¾¼ã¿ãã³ãã©çªå·ï¼ãæ°å¤ã§è¡¨ç¾ãããã®ã§ï¼
+ã¢ã»ã³ããªè¨èªè¨è¿°ã«ä½¿ç¨ããããã®ãã®ã§ããï¼
+
+(7-3-3) å²è¾¼ã¿ãã³ãã©åæåãã­ãã¯ã®å®ç¾©
+
+å²è¾¼ã¿ãã³ãã©åæåãã­ãã¯ãçæããï¼å
+·ä½çã«ã¯ï¼æ¬¡ã®ãããªè¡ãçæ
+ããï¼
+
+const INHINIB _kernel_inhinib_table[TNUM_INHNO] = {
+	<å²è¾¼ã¿ãã³ãã©1ã®åæåæ
+å ±>,
+	<å²è¾¼ã¿ãã³ãã©2ã®åæåæ
+å ±>,
+				â¦â¦
+	<å²è¾¼ã¿ãã³ãã©TNUM_INHNOã®åæåæ
+å ±>
+};
+
+ãã®ä¸­ã®å²è¾¼ã¿ãã³ãã©ã®åæåæ
+å ±ã¯ï¼æ¬¡ã®å½¢å¼ã¨ããï¼
+
+	{ (inhno), (inhatr), (FP)(INT_ENTRY(inhno, inthdr)) }
+
+(7-3-4) ã¨ã©ã¼æ¡ä»¶
+
+å²è¾¼ã¿ãã³ãã©ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»inhnoãDEF_INHã«å¯¾ããå²è¾¼ã¿ãã³ãã©çªå·ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+ã»inhnoãDEF_INHã«ãã£ã¦è¨­å®æ¸ã¿ã®å ´åï¼E_OBJï¼
+#ã»inhnoã«å¯¾å¿ããintnoã«å¯¾ãã¦ATT_ISRãããå ´åï¼E_OBJï¼
+#	â» inhnoã«å¯¾å¿ããintnoããªãå ´åã«ã¯ï¼ãã®ãã§ãã¯ãè¡ããªã
+#	â ãã®ãã§ãã¯ã¯ï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³å´ã§è¡ã
+ã»inhatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+	â» ã¿ã¼ã²ããä¾å­é¨ã§å²è¾¼ã¿ãã³ãã©å±æ§ãè¿½å å¯ï¼TARGET_INHATRï¼
+	â» TA_NONKERNELãä½¿ãå ´åã«ã¯ï¼TARGET_INHATRã«è¨­å®ãã
+ã»ã«ã¼ãã«ç®¡çã«åºå®ããã¦ããinhnoã«å¯¾ãã¦ï¼inhatrã«TA_NONKERNELãæå®
+ãããã¦ããå ´åï¼E_RSATRï¼
+ã»ã«ã¼ãã«ç®¡çå¤ã«åºå®ããã¦ããinhnoã«å¯¾ãã¦ï¼inhatrã«TA_NONKERNELãæ
+ãå®ããã¦ããªãå ´åï¼E_RSATRï¼
+ã»inhnoã«å¯¾å¿ããintnoã«å¯¾ããCFG_INTããªãå ´åï¼E_OBJï¼
+	â» inhnoã«å¯¾å¿ããintnoããªãå ´åã«ã¯ï¼ãã®ãã§ãã¯ãè¡ããªã
+ã»inhatrã«TA_NONKERNELãæå®ããã¦ãããï¼inhnoã«å¯¾å¿ããintnoã«å¯¾ãã¦
+ãCFG_INTã§è¨­å®ãããå²è¾¼ã¿åªå
+åº¦ãTMIN_INTPRIãããå°ããå ´åï¼E_OBJï¼
+	â» inhnoã«å¯¾å¿ããintnoããªãå ´åã«ã¯ï¼ãã®ãã§ãã¯ãè¡ããªã
+ã»inhatrã«TA_NONKERNELãæå®ããã¦ããï¼inhnoã«å¯¾å¿ããintnoã«å¯¾ãã¦
+ãCFG_INTã§è¨­å®ãããå²è¾¼ã¿åªå
+åº¦ãTMIN_INTPRIä»¥ä¸ã§ããå ´åï¼E_OBJï¼
+	â» inhnoã«å¯¾å¿ããintnoããªãå ´åã«ã¯ï¼ãã®ãã§ãã¯ãè¡ããªã
+
+ï¼å¯è½ã§ããã°ã¿ã¼ã²ããä¾å­é¨ã§æ¤åºãããã®
+ã»inthdrããã­ã°ã©ã ã®éå§çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+
+(8) CPUä¾å¤ã«é¢ããå®ç¾©
+
+CPUä¾å¤ã«é¢ãã¦çæããæ
+å ±ã¯ï¼ã¿ã¼ã²ããæ¯ã«å®ãããã¨ãã§ããï¼ã¿ã¼ã²ã
+ãæ¯ã«å®ããªãå ´åã«ã¯ï¼ä»¥ä¸ã§è¿°ã¹ãã¿ã¼ã²ããã«ä¾å­ããªãæ¨æºçãªæ
+å ±
+ãçæããï¼ã¿ã¼ã²ããæ¯ã«å®ããå ´åã«ã¯ï¼ãããã®æ
+å ±ã¯çæãããªãï¼
+
+ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã«ï¼CPUä¾å¤ãã³ãã©ãå®ç¾©ãã
+éçAPIãDEF_EXCããå«ã¾ãã¦ããå ´åã«ï¼CPUä¾å¤ãã³ãã©ã«é¢ããå®ç¾©ã
+çæããï¼
+
+ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ã
+ã¦ããæã«çæãã¹ãæ
+å ±ã«ã¤ãã¦è¿°ã¹ãï¼
+
+DEF_EXC(excno, { excatr, exchdr });
+
+(8-1) å®ç¾©ããCPUä¾å¤ãã³ãã©ã®æ°
+
+å®ç¾©ããCPUä¾å¤ãã³ãã©ã®æ°ããã¯ã­å®ç¾©ããããªãã­ã»ããµãã£ã¬ã¯ãã£
+ãï¼#defineï¼ãçæããï¼ã¾ãï¼ãã®å¤ãæã¤å¤æ°ã®å®ç¾©ãçæããï¼å
+·ä½
+çã«ã¯ï¼æ¬¡ã®ãããªè¡ãçæããï¼
+
+#define TNUM_EXCNO <å®ç¾©ããCPUä¾å¤ãã³ãã©ã®æ°>
+const uint_t	_kernel_tnum_excno = TNUM_EXCNO;
+
+(8-2) CPUä¾å¤ãã³ãã©ã®åºå
+¥å£å¦ç
+
+å®ç¾©ããCPUä¾å¤ãã³ãã©æ¯ã«ï¼CPUä¾å¤ãã³ãã©ã®åºå
+¥å£å¦çã«ã¼ãã³ãçæ
+ããï¼å
+·ä½çã«ã¯ï¼æ¬¡ã®ãããªè¡ãçæããï¼
+
+EXCHDR_ENTRY(excno, excno_num, exchdr)
+
+ããã§excno_numã¯ï¼excnoï¼CPUä¾å¤ãã³ãã©çªå·ï¼ãæ°å¤ã§è¡¨ç¾ãããã®ã§ï¼
+ã¢ã»ã³ããªè¨èªè¨è¿°ã«ä½¿ç¨ããããã®ãã®ã§ããï¼
+
+(8-3) CPUä¾å¤ãã³ãã©åæåãã­ãã¯ã®å®ç¾©
+
+CPUä¾å¤ãã³ãã©åæåãã­ãã¯ãçæããï¼å
+·ä½çã«ã¯ï¼æ¬¡ã®ãããªè¡ãçæ
+ããï¼
+
+const EXCINIB _kernel_excinib_table[TNUM_EXCNO] = {
+	<CPUä¾å¤ãã³ãã©1ã®åæåæ
+å ±>,
+	<CPUä¾å¤ãã³ãã©2ã®åæåæ
+å ±>,
+				â¦â¦
+	<CPUä¾å¤ãã³ãã©TNUM_EXCNOã®åæåæ
+å ±>
+};
+
+ãã®ä¸­ã®CPUä¾å¤ãã³ãã©ã®åæåæ
+å ±ã¯ï¼æ¬¡ã®å½¢å¼ã¨ããï¼
+
+	{ (excno), (excatr), (FP)(EXC_ENTRY(excno, exchdr)) }
+
+(8-4) ã¨ã©ã¼æ¡ä»¶
+
+CPUä¾å¤ãã³ãã©ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»excnoãDEF_EXCã«å¯¾ããCPUä¾å¤ãã³ãã©çªå·ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+ã»excnoãDEF_EXCã«ãã£ã¦è¨­å®æ¸ã¿ã®å ´åï¼E_OBJï¼
+ã»excatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+	â» ã¿ã¼ã²ããä¾å­é¨ã§CPUä¾å¤ãã³ãã©å±æ§ãè¿½å å¯ï¼TARGET_EXCATRï¼
+
+ï¼å¯è½ã§ããã°ã¿ã¼ã²ããä¾å­é¨ã§æ¤åºãããã®
+ã»exchdrããã­ã°ã©ã ã®éå§çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+
+(9) éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã«é¢ããå®ç¾©
+
+éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã«é¢ããå®ç¾©ã¯ï¼å¿
+ãçæããªããã°
+ãªããªãï¼
+
+(9-1) DEF_ICSããªãå ´å
+
+ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«ï¼éçAPIãDEF_ICSããå«ã¾ãã¦
+ããªãå ´åã«ã¯ï¼æ¬¡ã®è¡ãçæããï¼
+
+#ifdef DEFAULT_ISTK
+
+#define TOPPERS_ISTKSZ		DEFAULT_ISTKSZ
+#define TOPPERS_ISTK		DEFAULT_ISTK
+
+#else /* DEFAULT_ISTK */
+
+static STK_T				_kernel_istack[COUNT_STK_T(DEFAULT_ISTKSZ)];
+#define TOPPERS_ISTKSZ		ROUND_STK_T(DEFAULT_ISTKSZ)
+#define TOPPERS_ISTK		_kernel_istack
+
+#endif /* DEFAULT_ISTK */
+
+(9-2) DEF_ICSãããå ´å
+
+ä»¥ä¸ã§ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã«æ¬¡ã®éçAPIãå«ã¾ãã¦
+ããæã«çæãã¹ãæ
+å ±ã«ã¤ãã¦è¿°ã¹ãï¼
+
+DEF_ICS({ istksz, istk });
+
+istkãNULLã®å ´åã«ã¯ï¼æå®ããããµã¤ãºã®éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ã
+ã¯é åãç¢ºä¿ãï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã®åæåæ
+å ±ãçæ
+ããï¼å
+·ä½çã«ã¯ï¼ä¸è¨ã®éçAPIã«å¯¾ãã¦ï¼æ¬¡ã®è¡ãçæããï¼
+
+static STK_T				_kernel_istack[COUNT_STK_T(istksz)];
+#define TOPPERS_ISTKSZ		ROUND_STK_T(istksz)
+#define TOPPERS_ISTK		_kernel_istack
+
+istkãNULLã§ãªãå ´åã«ã¯ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã®åæå
+æ
+å ±ãï¼æ¬¡ã®å½¢å¼ã§çæããï¼
+
+#define TOPPERS_ISTKSZ		(istksz)
+#define TOPPERS_ISTK		(istk)
+
+(9-3) å¤æ°ã®çæ
+
+DEF_ICSã®æç¡ã«ãããï¼æ¬¡ã®å®ç¾©ãçæããï¼
+
+const SIZE		_kernel_istksz = TOPPERS_ISTKSZ;
+STK_T *const	_kernel_istk = TOPPERS_ISTK;
+
+#ifdef TOPPERS_ISTKPT
+STK_T *const	_kernel_istkpt = TOPPERS_ISTKPT(TOPPERS_ISTK, TOPPERS_ISTKSZ);
+#endif /* TOPPERS_ISTKPT */
+
+(9-4) ã¨ã©ã¼æ¡ä»¶
+
+éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»éçAPIãDEF_ICSããè¤æ°ããï¼E_OBJï¼
+ã»istkszã0ä»¥ä¸ãï¼ã¿ã¼ã²ããå®ç¾©ã®æå°å¤ï¼TARGET_MIN_ISTKSZï¼ãããå°
+ãããå ´åï¼E_PARï¼
+ã»istkszãã¹ã¿ãã¯é åã®ãµã¤ãºã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	- ã¿ã¼ã²ããä¾å­ã®å¤ï¼CHECK_STKSZ_ALIGNï¼ã®åæ°ã§ãªãå ´å
+	â» ãã®ã¨ã©ã¼ãã§ãã¯ã¯ï¼istkãNULLã§ãªãå ´åã«ã®ã¿è¡ã
+
+ï¼ãã¹3ã§æ¤åºãããã®
+ã»istkãã¹ã¿ãã¯é åã®å
+é ­çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	- ã¿ã¼ã²ããä¾å­ã®å¤ï¼CHECK_STACK_ALIGNï¼ã®åæ°ã§ãªãå ´å
+	- NULLã®å ´åï¼ã¿ã¼ã²ããä¾å­ï¼CHECK_STACK_NONNULLï¼
+
+(10) ã¿ã¤ã ã¤ãã³ãç®¡çã«é¢ããå®ç¾©
+
+ã¿ã¤ã ã¤ãã³ãç®¡çã«é¢é£ãã¦ï¼æ¬¡ã®å®ç¾©ãçæããï¼
+
+TMEVTN	_kernel_tmevt_heap[TNUM_TSKID + TNUM_CYCID + TNUM_ALMID];
+
+(11) åã¢ã¸ã¥ã¼ã«ã®åæåé¢æ°ã®å®ç¾©
+
+åã«ã¼ãã«ãªãã¸ã§ã¯ãã®ç®¡çï¼å²è¾¼ã¿ç®¡çï¼CPUä¾å¤ãã³ãã©ç®¡çã®åæ©è½ã
+åæåé¢æ°ãé ã«å¼ã³åºãé¢æ°ï¼_kernel_initialize_objectï¼ãçæããï¼æ¬¡
+ã®3ã¤ã®åæåé¢æ°ãé¤ãã¦ã¯ï¼ä½¿ç¨ããªãæ©è½ã®åæåé¢æ°ã¯å¼ã³åºããªãï¼
+
+	_kernel_initialize_task
+	_kernel_initialize_interrupt
+	_kernel_initialize_exception
+
+ãã¹ã¦ã®æ©è½ãä½¿ã£ãå ´åã«çæãããé¢æ°ã¯æ¬¡ã®éãã§ããï¼
+
+void
+_kernel_initialize_object(void)
+{
+	_kernel_initialize_task();
+	_kernel_initialize_semaphore();
+	_kernel_initialize_eventflag();
+	_kernel_initialize_dataqueue();
+	_kernel_initialize_pridataq();
+	_kernel_initialize_mailbox();
+	_kernel_initialize_mempfix();
+	_kernel_initialize_cyclic();
+	_kernel_initialize_alarm();
+	_kernel_initialize_interrupt();
+	_kernel_initialize_exception();
+}
+
+(12) åæåã«ã¼ãã³ã®å®è¡é¢æ°ã®å®ç¾©
+
+ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã«å«ã¾ããåæåã«ã¼ãã³ãè¿½å 
+ããéçAPIãATT_INIãã«å¯¾ãã¦ï¼è¿½å ããåæåã«ã¼ãã³ãé ã«å¼ã³åºãé¢
+æ°ãçæããï¼å
+·ä½çã«ã¯ï¼
+
+ATT_INI({ iniatr, exinf, inirtn });
+
+ã¨ããéçAPIã«å¯¾ãã¦ï¼
+
+	(inirtn)((intptr_t)(exinf));
+
+ãå¼ã³åºãé¢æ°ãï¼_kernel_call_inirtnã¨ããååã§çæããï¼åæåã«ã¼ã
+ã³ãå¼ã³åºãé åºã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã§ã®éç
+APIã®é åºã«ä¸è´ãããï¼
+
+ä¾ãã°ï¼
+
+ATT_INI({ TA_NULL, 0, timer_initialize });
+ATT_INI({ TA_NULL, CONSOLE_PORTID, serial_initialize });
+
+ã¨ãã2ã¤ã®éçAPIããã®é åºã§è¨è¿°ãããæã«çæããé¢æ°ã¯æ¬¡ã®éãã§ã
+ãï¼
+
+void
+_kernel_call_inirtn(void)
+{
+	(timer_initialize)((intptr_t)(0));
+	(serial_initialize)((intptr_t)(CONSOLE_PORTID));
+}
+
+(12-1) ã¨ã©ã¼æ¡ä»¶
+
+åæåã«ã¼ãã³ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»iniatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+
+ï¼å¯è½ã§ããã°ã¿ã¼ã²ããä¾å­é¨ã§æ¤åºãããã®
+ã»inirtnããã­ã°ã©ã ã®éå§çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+
+(13) çµäºå¦çã«ã¼ãã³ã®å®è¡é¢æ°ã®å®ç¾©
+
+ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã«å«ã¾ããçµäºå¦çã«ã¼ãã³ãè¿½
+å ããéçAPIãATT_TERãã«å¯¾ãã¦ï¼è¿½å ããçµäºå¦çã«ã¼ãã³ãé ã«å¼ã³åº
+ãé¢æ°ãçæããï¼å
+·ä½çã«ã¯ï¼
+
+ATT_TER({ teratr, exinf, terrtn });
+
+ã¨ããéçAPIã«å¯¾ãã¦ï¼
+
+	(terrtn)((intptr_t)(exinf));
+
+ãå¼ã³åºãé¢æ°ãï¼_kernel_call_terrtnã¨ããååã§çæããï¼çµäºå¦çã«ã¼
+ãã³ãå¼ã³åºãé åºã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ä¸­ã§ã®éç
+APIã®éé ã«ä¸è´ãããï¼
+
+ä¾ãã°ï¼
+
+ATT_TER({ TA_NULL, 0, timer_terminate });
+ATT_TER({ TA_NULL, CONSOLE_PORTID, serial_terminate });
+
+ã¨ãã2ã¤ã®éçAPIããã®é åºã§è¨è¿°ãããæã«çæããé¢æ°ã¯æ¬¡ã®éãã§ã
+ãï¼
+
+void
+_kernel_call_terrtn(void)
+{
+	(serial_terminate)((intptr_t)(CONSOLE_PORTID));
+	(timer_terminate)((intptr_t)(0));
+}
+
+(13-1) ã¨ã©ã¼æ¡ä»¶
+
+çµäºå¦çã«ã¼ãã³ã«é¢ããã¨ã©ã¼æ¡ä»¶ã¯æ¬¡ã®éãã§ããï¼
+
+ï¼ãã¹2ã§æ¤åºãããã®
+ã»teratrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+
+ï¼å¯è½ã§ããã°ã¿ã¼ã²ããä¾å­é¨ã§æ¤åºãããã®
+ã»terrtnããã­ã°ã©ã ã®éå§çªå°ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+
+ä»¥ä¸
Index: rtos_arduino/trunk/asp_1.9.2/doc/design.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/doc/design.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/doc/design.txt	(revision 136)
@@ -0,0 +1,2042 @@
+
+		TOPPERS/ASPã«ã¼ãã«
+		è¨­è¨ã¡ã¢
+
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 1.9.2
+		æçµæ´æ°: 2014å¹´4æ15æ¥ï¼ä½æä¸­ï¼
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASPã«ã¼ãã«ã®è¨­è¨ã¡ã¢ã§ããï¼ä½æéä¸­ã®ãã®
+ã§ããï¼ç¶²ç¾
+çã§ã¯ãªãï¼
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2005-2014 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
+   (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
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+ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã¯ï¼åè¿°ã®6ã¤ã®æ¡ä»¶ãæã£ãå ´åã«å®è¡éå§ãã¹ãã§
+ããããï¼6ã¤ã®æ¡ä»¶ã®ãããããæ°ãã«æºããããã«ãªãå¯è½æ§ã®ããã¿ã¤ã
+ã³ã°ã§ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å®è¡éå§ãå¿
+è¦ã«ãªãï¼
+
+ä»¥ä¸ã§ã¯ï¼6ã¤ã®æ¡ä»¶ã®ãããããæ°ãã«æºããããã«ãªãã¿ã¤ãã³ã°ã«ã¤ãã¦
+æ¤è¨ããï¼
+
+(1) ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ã§ãã
+
+ã¿ã¹ã¯ä¾å¤å¦çã®è¨±å¯ï¼ena_texï¼ã«ãã£ã¦ï¼ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ã«ãªãï¼
+ã¾ãï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ããã®ãªã¿ã¼ã³ã«ãã£ã¦ãï¼ã¿ã¹ã¯ä¾å¤å¦çè¨±
+å¯ç¶æ
+ã«ãªãï¼
+
+(2) ä¿çä¾å¤è¦å ã0ã§ãªã
+
+ã¿ã¹ã¯ä¾å¤å¦çã®è¦æ±ï¼ras_texï¼iras_texï¼ã«ãã£ã¦ï¼ã¿ã¹ã¯ã®ä¿çä¾å¤è¦å 
+ã0ã§ãªããªãï¼ãã ãï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®ã¿ã¹ã¯ä¾å¤å¦çã®è¦æ±
+ï¼iras_texï¼ã§ã¯ï¼(4)ã®æ¡ä»¶ãæºããããªãããï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®
+å®è¡éå§ã¯å¿
+è¦ãªãï¼
+
+(3) ã¿ã¹ã¯ãå®è¡ç¶æ
+ã§ãã
+
+ã¿ã¹ã¯ãã£ã¹ãããã£ã«ããï¼åæãå¾ã®ã¿ã¹ã¯ãå®è¡ç¶æ
+ã«ãªãï¼
+
+(4) ã¿ã¹ã¯ã³ã³ãã­ã¹ããå®è¡ããã¦ãã
+
+å²è¾¼ã¿ãã³ãã©ããã³CPUä¾å¤ãã³ãã©ããã®ãªã¿ã¼ã³ã«ãã£ã¦ï¼ã¿ã¹ã¯ã³ã³ã
+ã­ã¹ãã«æ»ãå ´åãããï¼
+
+(5) å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§ãã
+
+å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤æ´ï¼chg_ipmï¼ã«ãã£ã¦ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+¨è§£é¤
+ã«ãªãï¼
+
+ã¾ãï¼ã¿ã¹ã¯ã®çµäºï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ããã®ãªã¿ã¼ã³ï¼å²è¾¼ã¿ãã³ã
+ã©ããã®ãªã¿ã¼ã³ï¼CPUä¾å¤ãã³ãã©ããã®ãªã¿ã¼ã³ã«ãã£ã¦ãï¼å²è¾¼ã¿åªå
+åº¦
+ãã¹ã¯ãå
+¨è§£é¤ãããå ´åãããï¼
+
+ãã ãï¼ã¿ã¹ã¯ã®çµäºæã«ã¤ãã¦ã¯ï¼ã¿ã¹ã¯ã®çµäºå¾ã¯å¥ã®ã¿ã¹ã¯ã¸åãæã
+ãããï¼åãæãã£ãå¾ã®ã¿ã¹ã¯ã«å¯¾ããã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å®è¡éå§
+ãï¼ã¿ã¹ã¯ãã£ã¹ãããå¾ã®å¦çã§è¡ãã°ããï¼
+
+(6) CPUã­ãã¯ç¶æ
+ã§ãªã
+
+CPUã­ãã¯ç¶æ
+ã®è§£é¤ï¼unl_cpuï¼iunl_cpuï¼ã«ãã£ã¦ï¼CPUã­ãã¯ç¶æ
+ã§ãªããª
+ãï¼ãã ãï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãã§ã®CPUã­ãã¯ç¶æ
+ã®è§£é¤ï¼iunl_cpuï¼ã§ã¯ï¼
+(4)ã®æ¡ä»¶ãæºããããªãããï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å®è¡éå§ã¯å¿
+è¦ãªãï¼
+
+ã¾ãï¼ã¿ã¹ã¯ã®çµäºï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ããã®ãªã¿ã¼ã³ï¼å²è¾¼ã¿ãã³ã
+ã©ããã®ãªã¿ã¼ã³ï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ããã®ãªã¿ã¼ã³ï¼ã¿ã¤ã ã¤ãã³ã
+ãã³ãã©ããã®ãªã¿ã¼ã³ï¼CPUä¾å¤ãã³ãã©ããã®ãªã¿ã¼ã³ã«ãã£ã¦ï¼CPUã­ã
+ã¯ç¶æ
+ã§ãªããªãå ´åãããï¼
+
+ãã ãï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ããã³ã¿ã¤ã ã¤ãã³ããã³ãã©ããã®ãªã¿ã¼
+ã³ã«ã¤ãã¦ã¯ï¼ãªã¿ã¼ã³å¾ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãã®å®è¡ãç¶ãï¼(4)ã®æ¡ä»¶ã
+æºããããªãããï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å®è¡éå§ã¯å¿
+è¦ãªãï¼
+
+ã¿ã¹ã¯ã®çµäºæã«ã¤ãã¦ã¯ï¼ã¿ã¹ã¯ã®çµäºå¾ã¯å¥ã®ã¿ã¹ã¯ã¸åãæããããï¼
+åãæãã£ãå¾ã®ã¿ã¹ã¯ã«å¯¾ããã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å®è¡éå§ãï¼ã¿ã¹
+ã¯ãã£ã¹ãããå¾ã®å¦çã§è¡ãã°ããï¼
+
+ä»¥ä¸ããï¼éè¤ããã±ã¼ã¹ãèæ
+®ããã¨ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å®è¡éå§
+ãå¿
+è¦ã«ãªãå¯è½æ§ãããã®ã¯ï¼ä»¥ä¸ã®å¦çã§ããï¼
+
+(a) ã¿ã¹ã¯ä¾å¤å¦çã®è¨±å¯ï¼ena_texï¼â¦ (1)
+(b) ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®åºå£å¦ç â¦ (1)(5)(6)
+(c) ã¿ã¹ã¯ä¾å¤å¦çã®è¦æ±ï¼ras_texï¼â¦ (2)
+(d) ã¿ã¹ã¯ãã£ã¹ãããå¾ã®å¦ç â¦ (3)(5)(6)
+	(d-1) dispatch_r
+	(d-2) ret_int_r
+	(d-3) ret_exc_r
+	(d-4) start_r
+(e) å²è¾¼ã¿ãã³ãã©ã®åºå£å¦ç â¦ (4)(5)(6)
+(f) CPUä¾å¤ãã³ãã©ã®åºå£å¦ç â¦ (4)(5)(6)
+(g) å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤æ´ï¼chg_ipmï¼â¦ (5)
+(h) CPUã­ãã¯ç¶æ
+ã®è§£é¤ï¼unl_cpuï¼â¦ (6)
+
+ãã®ä¸­ã§(d-4)ã«é¢ãã¦ã¯ï¼ã¿ã¹ã¯ã®å®è¡éå§ç´å¾ã¯ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ç¶æ
+ã§
+ããï¼èªã¿ã¹ã¯ãena_texããã¾ã§ã¯ï¼ã¿ã¹ã¯ä¾å¤ãè¨±å¯ãããªãï¼ï¼(1)ã®æ¡
+ä»¶ãæºããããªãããï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å®è¡éå§ã¯å¿
+è¦ãªãï¼
+
+ã¾ã(h)ã«é¢ãã¦ã¯ï¼æ¬¡ã«è¿°ã¹ãçç±ã«ããï¼CPUã­ãã¯ç¶æ
+ãç¶ç¶ãã¦ããé
+ã«ä»ã®5ã¤ã®æ¡ä»¶ãæ°ãã«æºãããããã¨ã¯ãªãããï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³
+ã®å®è¡éå§ã¯å¿
+è¦ãªãï¼
+
+CPUã­ãã¯ç¶æ
+ã§ã¯ï¼ã¾ãï¼ã¿ã¹ã¯ä¾å¤å¦çã®è¨±å¯ï¼ena_texï¼ï¼ã¿ã¹ã¯ä¾å¤å¦
+çã®è¦æ±ï¼ras_texï¼iras_texï¼ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤æ´ï¼chg_ipmï¼ãè¡
+ããã¨ã¯ã§ããï¼ã¿ã¹ã¯ãã£ã¹ããããèµ·ãããªãï¼CPUã­ãã¯ç¶æ
+ã§ã¿ã¹ã¯ä¾
+å¤å¦çã«ã¼ãã³ãããªã¿ã¼ã³ãããã¨ã¯ã§ãããï¼ãã®å ´åã¯CPUã­ãã¯ç¶æ
+ã
+è§£é¤ããï¼CPUã­ãã¯ç¶æ
+ãç¶ç¶ããªãï¼CPUã­ãã¯ç¶æ
+ã§å²è¾¼ã¿ãã³ãã©ãã
+ãªã¿ã¼ã³ããå ´åãï¼ããã¨åæ§ã§ããï¼
+
+æå¾ã«ï¼CPUã­ãã¯ç¶æ
+ã§CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ããå ´åãåé¡ã«ãªãï¼
+ããã«ã¤ãã¦ã¯ï¼CPUä¾å¤ãçºçããæã«ï¼CPUã­ãã¯ç¶æ
+ã§ãã£ãå ´åã¨ï¼
+CPUã­ãã¯è§£é¤ç¶æ
+ã§ãã£ãå ´åã«åãã¦èããï¼CPUã­ãã¯è§£é¤ç¶æ
+ã§ãã£ã
+å ´åã«ã¯ï¼CPUä¾å¤ãã³ãã©ããã®ãªã¿ã¼ã³ã«ããï¼CPUã­ãã¯ç¶æ
+ãè§£é¤ãã
+ãããï¼å²è¾¼ã¿ãã³ãã©ãããªã¿ã¼ã³ããå ´åã¨åæ§ã§ããï¼CPUã­ãã¯ç¶æ
+ã§
+ãã£ãå ´åã«ã¯ï¼èµ·åãããCPUä¾å¤ãã³ãã©ã¯ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ãã³
+ãã©ã§ããããï¼ãã®ä¸­ã§(1)ï½(3)ã¨(5)ã®æ¡ä»¶ãæ°ãã«æºãããããã¨ã¯ãªãï¼
+CPUä¾å¤ãã³ãã©ã®å®è¡åå¾ã§(4)ã®æ¡ä»¶ã¯ä¿å­ããããã¨ããï¼CPUä¾å¤ãã³ã
+ã©ããã®ãªã¿ã¼ã³ã«ãã£ã¦ï¼(1)ï½(5)ã®æ¡ä»¶ã¯CPUä¾å¤ã®çºçåã«æ»ãï¼æ°ãã«
+æºãããããã¨ã¯ãªãï¼
+
+âã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å®è¡éå§å¦ç
+
+ããã§ã¯ï¼åã®ç¯ã§æ¤è¨ããã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å®è¡éå§ãå¿
+è¦ãªã¿ã¤
+ãã³ã°ã®ããããã«ã¤ãã¦ï¼å®è¡éå§å¦çã®å®è£
+æ¹æ³ã«ã¤ãã¦è¿°ã¹ãï¼
+
+(a) ã¿ã¹ã¯ä¾å¤å¦çã®è¨±å¯ï¼ena_texï¼
+
+ena_texãã¿ã¹ã¯ããå¼ã³åºãããå ´åã«ã¯ï¼èªã¿ã¹ã¯ã«å¯¾ãã¦ãã¿ã¹ã¯ãå®è¡
+ç¶æ
+ã§ããããã¿ã¹ã¯ã³ã³ãã­ã¹ããå®è¡ããã¦ãããã®2æ¡ä»¶ã¯æºãããã¦ã
+ãï¼ãã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ã§ãããã®æ¡ä»¶ã¯ena_texã®å¦çã«ããæºããã
+ãï¼ã¾ãï¼ãCPUã­ãã¯ç¶æ
+ã§ãªããã®æ¡ä»¶ã¯ena_texã®å
+¥å£ã§ãã§ãã¯ãã¦ã
+ãï¼ãã®ããï¼ãä¿çä¾å¤è¦å ã0ã§ãªããã¨ãå²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+
+ã§ãããã®2æ¡ä»¶ãæºãããã¦ããå ´åã«ã¯ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå¼ã³åº
+ãï¼
+
+ena_texã®æ¬ä½ã®å¦çï¼ã¨ã©ã¼å¦çãé¤ãï¼ã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+		p_runtsk->enatex = true;
+		if (p_runtsk->texptn != 0U && ipmflg) {
+			call_texrtn();
+		}
+----------------------------------------
+
+(b) ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®åºå£å¦ç
+
+ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®åºå£å¦çï¼call_texrtnã®å¾åï¼ã§ã¯ï¼èªã¿ã¹ã¯ã«å¯¾
+ãã¦ãã¿ã¹ã¯ãå®è¡ç¶æ
+ã§ããããã¿ã¹ã¯ã³ã³ãã­ã¹ããå®è¡ããã¦ãããã®
+2æ¡ä»¶ã¯æºãããã¦ããï¼ãã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ã§ããããå²è¾¼ã¿åªå
+åº¦ã
+ã¹ã¯å
+¨è§£é¤ç¶æ
+ã§ããããCPUã­ãã¯ç¶æ
+ã§ãªããã®3æ¡ä»¶ãåºå£å¦çã§æºãã
+ããï¼ãã®ããï¼ãä¿çä¾å¤è¦å ã0ã§ãªãããæºãããã¦ããå ´åã«ã¯ï¼ã¿ã¹
+ã¯ä¾å¤å¦çã«ã¼ãã³ãå¼ã³åºãå¿
+è¦ãããï¼
+
+ãã ãï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®åºå£å¦çã§åç´ã«call_texrtnãå¼ã³åºãã¨ï¼
+call_texrtnã®ä¸­ããcall_texrtnãå¼ã³åºããã¨ã«ãªãï¼ã¿ã¹ã¯ä¾å¤å¦çãç¹°
+ãè¿ãè¦æ±ãããå ´åã«ï¼ã¹ã¿ãã¯ã®ä½¿ç¨éã«ä¸éããªããªãï¼ããã§ï¼ã¿ã¹
+ã¯ä¾å¤å¦çã«ã¼ãã³ã®åºå£å¦çã§ãä¿çä¾å¤è¦å ã0ã§ãªããå ´åã«ã¯ï¼
+call_texrtnã®ä¸­ã§ã«ã¼ããããï¼
+
+ä¿®æ­£ããcall_texrtnã®æµãã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+void
+call_texrtn(void)
+{
+	TEXPTN	texptn;
+
+	ãã£ã¹ãããç¦æ­¢ãã©ã°ãä¿å­ãã â¦ (*3)
+	ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ç¶æ
+ã«ãã â¦ (*6)
+
+	do {
+		texptn = p_runtsk->texptn;
+		p_runtsk->texptn = 0U;
+
+		CPUã­ãã¯è§£é¤ç¶æ
+ã«ãã
+		ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå¼ã³åºã
+		CPUã­ãã¯ç¶æ
+ã«ãã
+
+		å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã«ãã
+		ãã£ã¹ãããç¦æ­¢ãã©ã°ãå
+ã«æ»ã â¦ (*4)
+		ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ç¶æ
+ã«ãã â¦ (*2)
+
+		å¿
+è¦ãªå ´åã«ã¯ãã£ã¹ããããè¡ã â¦ (*1)
+	}  while (p_runtsk->texptn != 0U);
+
+	ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ã«ãã â¦ (*5)
+}
+----------------------------------------
+
+ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å¼åºãåã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãä¿å­ããå¦ç
+ã¯ï¼(*4)ã«ããã¦å
+ã®ç¶æ
+ã«æ»ããã¨ããï¼ã«ã¼ãã®å¤(*3)ã§è¡ãã®ãå¹çã
+ããï¼
+
+ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å¼åºãåã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ç¶æ
+ã«ããå¦çã¯ï¼
+(*2)ã«ããã¦ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ç¶æ
+ã«ãããã¨ããï¼ã«ã¼ãå¤(*6)ã§è¡ãã®
+ãå¹çãããï¼ã¾ãï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å¼åºãå¾ã«ã¿ã¹ã¯ä¾å¤å¦çè¨±
+å¯ç¶æ
+ã«ããå¦çãï¼ã«ã¼ãã®å¤(*5)ã§è¡ãæ¹ãå¹çãããï¼
+
+(c) ã¿ã¹ã¯ä¾å¤å¦çã®è¦æ±ï¼ras_texï¼
+
+ras_texãã¿ã¹ã¯ããå¼ã³åºãããå ´åã§ï¼å¯¾è±¡ã¿ã¹ã¯ãèªã¿ã¹ã¯ã®å ´åã«ã¯ï¼
+èªã¿ã¹ã¯ã«å¯¾ãã¦ãã¿ã¹ã¯ãå®è¡ç¶æ
+ã§ããããã¿ã¹ã¯ã³ã³ãã­ã¹ããå®è¡ã
+ãã¦ãããã®2æ¡ä»¶ã¯æºãããã¦ããï¼ãä¿çä¾å¤è¦å ã0ã§ãªããã®æ¡ä»¶ã¯
+ras_texã®å¦çã«ããæºããããï¼ras_texã®ãã©ã¡ã¼ã¿rasptnã0ã®å ´åã¯ã¨ã©ã¼
+ã¨ãªãããï¼ï¼ã¾ãï¼ãCPUã­ãã¯ç¶æ
+ã§ãªããã®æ¡ä»¶ã¯ras_texã®å
+¥å£ã§ãã§ã
+ã¯ãã¦ããï¼ãã®ããï¼å¯¾è±¡ã¿ã¹ã¯ãèªã¿ã¹ã¯ã§ããï¼ãã¿ã¹ã¯ä¾å¤å¦çè¨±å¯
+ç¶æ
+ã§ãããã¨ãå²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§ãããã®2æ¡ä»¶ãæºãããã¦
+ããå ´åã«ã¯ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå¼ã³åºãï¼
+
+ras_texã®æ¬ä½ã®å¦çï¼ã¨ã©ã¼å¦çãé¤ãï¼ã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+		p_tcb->texptn |= rasptn;
+		if (p_tcb == p_runtsk && p_runtsk->enatex && ipmflg) {
+			call_texrtn();
+		}
+----------------------------------------
+
+(d-1) dispatch_r
+
+dispatch_rã«ããã¦ã¯ï¼dispatch_rããã®ãªã¿ã¼ã³å
+ã®ã¿ã¹ã¯ã«å¯¾ãã¦ï¼ãã¿
+ã¹ã¯ãå®è¡ç¶æ
+ã§ããããã¿ã¹ã¯ã³ã³ãã­ã¹ããå®è¡ããã¦ãããã®2æ¡ä»¶ã¯æº
+ãããã¦ããï¼ã¾ãï¼CPUã­ãã¯ç¶æ
+ã§dispatch_rã«æ¥ããã¨ã¯ãªãããï¼
+ãCPUã­ãã¯ç¶æ
+ã§ãªããã®æ¡ä»¶ãæç«ãã¦ããï¼ãã®ããï¼ãã¿ã¹ã¯ä¾å¤å¦ç
+è¨±å¯ç¶æ
+ã§ããããä¿çä¾å¤è¦å ã0ã§ãªãããå²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+
+ã§ãããã®3æ¡ä»¶ãæºãããã¦ããå ´åã«ã¯ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå¼ã³åº
+ãå¿
+è¦ãããï¼
+
+ãããå®ç¾ããããã«ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®ãã£ã¹ãããå¦çãæ¬¡ã®ã
+ãã«ä¿®æ­£ããï¼
+
+----------------------------------------
+void
+dispatch(void)
+{
+	â¦â¦â¦
+
+  dispatch_r:
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ããå¾©å¸°ãã
+	calltex();
+}
+----------------------------------------
+
+ããã§calltexã¯ï¼ãã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ã§ããããä¿çä¾å¤è¦å ã0ã§ãª
+ãããå²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§ãããã®3æ¡ä»¶ãæºãããã¦ããå ´åã«
+call_texrtnãå¼ã³åºãé¢æ°ã§ããï¼
+
+----------------------------------------
+void
+calltex(void)
+{
+	if (p_runtsk->enatex && p_runtsk->texptn != 0U && ipmflg) {
+		call_texrtn();
+	}
+}
+----------------------------------------
+
+(d-2) ret_int_r
+
+ret_int_rã¯ï¼å²è¾¼ã¿ãã³ãã©ã®åºå£å¦çã§ãã£ã¹ããããè¡ã£ãã¿ã¹ã¯ãï¼å®
+è¡ãåéããéã®å¦çã§ããï¼ãã®ããï¼ret_int_rããã®ãªã¿ã¼ã³å
+ã®ã¿ã¹ã¯
+ã«å¯¾ãã¦ï¼ãã¿ã¹ã¯ãå®è¡ç¶æ
+ã§ããããã¿ã¹ã¯ã³ã³ãã­ã¹ããå®è¡ããã¦ã
+ããã®2æ¡ä»¶ã¯æºãããã¦ããï¼ã¾ãï¼CPUã­ãã¯ç¶æ
+ã§ret_int_rã«æ¥ããã¨ã¯
+ãªãããï¼ãCPUã­ãã¯ç¶æ
+ã§ãªããã®æ¡ä»¶ãæç«ãã¦ããï¼ãã®ããï¼ãã¿ã¹
+ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ã§ããããä¿çä¾å¤è¦å ã0ã§ãªãããï¼å²è¾¼ã¿ãã³ãã©ã
+ãã®ãªã¿ã¼ã³å¾ã«ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
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+ã«ã¼ã«ã§ã¯gotoæã®ä½¿ç¨ãç¦æ­¢ãã¦ããï¼gotoæãä½¿ãã¹ãã§ã¯ãªãã¨ããæ
+è¦ãå¤ãï¼ã¾ãï¼ãã¯ã­ã®å®ç¾©ä¸­ã«gotoæãä½¿ç¨ãããã¨ãåé¡ã§ããã¨ãã
+æè¦ãããï¼
+
+ããã§ã¯ï¼å®ç¾©ä¸­ã«gotoæãå«ãCHECKãã¯ã­ãç¨ããè¨­è¨æå³ã¨ãããä½¿ç¨ã
+ã¦ããæ¡ä»¶ï¼CHECKãã¯ã­ã®ä½¿ç¨ã«ããã½ããã¦ã§ã¢ã®ä¿¡é ¼æ§ã«åé¡ãçããã
+ã¨ããªããã¨ãè«è¨¼ããï¼
+
+ãªãï¼ASPã«ã¼ãã«ã®ã«ã¼ãã«æ¬ä½ã®å®è£
+ã§ã¯ï¼CHECKãã¯ã­ä»¥å¤ã«gotoæãç¨
+ãã¦ããç®æã¯ãªãï¼ä¸é¨ã®ã·ã¹ãã ãµã¼ãã¹ã§ã¯ï¼ããä»¥å¤ã®æ¹æ³ã§gotoæ
+ãç¨ãã¦ããï¼ï¼
+
+âCHECKãã¯ã­ã®å®ç¾©ã¨ãã®ä½¿ç¨æ³
+
+kernel/check.hã«ã¯ï¼25åã®CHECKãã¯ã­ãå®ç¾©ããã¦ãããï¼ããããæ¬¡ã®ã
+ã¿ã¼ã³ã§å®ç¾©ããã¦ããï¼ããã§XXXXXã«ã¯ï¼ãã§ãã¯ãããã¨ã©ã¼ã®ç¨®é¡ãè¡¨
+ãæå­åãå
+¥ãï¼
+
+----------------------------------------
+#define CHECK_XXXXX(<â¦â¦>) {				\
+	if (<ã¨ã©ã¼æ¡ä»¶>) {						\
+		ercd = <ã¨ã©ã¼ã³ã¼ã>;				\
+		goto error_exit;					\
+	}										\
+}
+----------------------------------------
+
+ãããã®CHECKãã¯ã­ã¯ï¼å¤ãã®ãµã¼ãã¹ã³ã¼ã«ã®å¦çé¢æ°ä¸­ã§ï¼æ¬¡ã®ããã«ä½¿
+ç¨ããã¦ããï¼
+
+----------------------------------------
+ER
+<ãµã¼ãã¹ã³ã¼ã«å>(â¦â¦)
+{
+	<ã­ã¼ã«ã«å¤æ°ã®å®£è¨>
+	ER		ercd;
+
+	LOG_XXX_YYY_ENTER(â¦â¦);
+	CHECK_XXXXX(â¦â¦);
+	CHECK_YYYYY(â¦â¦);
+
+	<ãµã¼ãã¹ã³ã¼ã«å¦çæ¬ä½>
+
+  error_exit:
+	LOG_XXX_YYY_LEAVE(â¦â¦);
+	return(ercd);
+}
+----------------------------------------
+
+ãã®ä¾ã§ã¯ï¼CHECKãã¯ã­ã2ã¤ä½¿ç¨ãã¦ãããï¼1ã¤ã®ã¿ä½¿ç¨ãã¦ããå ´åãã
+ãã°ï¼3ã¤ä»¥ä¸ä½¿ç¨ãã¦ããå ´åãããï¼ã¾ãï¼è¤æ°ã®CHECKãã¯ã­ã®éã«ï¼ã­ã¼
+ã«ã«å¤æ°ã¸ã®ä»£å
+¥æãå
+¥ãå ´åãããï¼ä¾ãã°ï¼ter_tskã®å¦çé¢æ°ï¼ï¼
+
+âè¨­è¨æå³
+
+CHECKãã¯ã­ãä½¿ç¨ããæå³ã¯ï¼ã»ã¨ãã©ã®ãµã¼ãã¹ã³ã¼ã«ã§å¿
+è¦ãªéçã¨ã©ã¼
+ã®ãã§ãã¯ã³ã¼ãããã¿ã¼ã³åãï¼ã½ã¼ã¹ã³ã¼ãã®ç°¡æ½ããä¿ã¤ãã¨ã§èª­ã¿ã
+ãããåä¸ãããã¨ã¨ãã«ï¼è¨è¿°ãã¹ã®å¯è½æ§ãæ¸ãããã¨ã§ããï¼
+
+ã¡ãªã¿ã«ï¼CHECKãã¯ã­ãä½¿ç¨ããªãå ´åï¼ä¸ã«ç¤ºãããµã¼ãã¹ã³ã¼ã«ã®å¦çé¢
+æ°ã¯ï¼æ¬¡ã®ããã«è¨è¿°ãããã¨ã«ãªãï¼
+
+----------------------------------------
+ER
+<ãµã¼ãã¹ã³ã¼ã«å>(â¦â¦)
+{
+	<ã­ã¼ã«ã«å¤æ°ã®å®£è¨>
+	ER		ercd;
+
+	LOG_XXX_YYY_ENTER(â¦â¦);
+	if (<XXXXXã®ã¨ã©ã¼æ¡ä»¶>) {
+		ercd = <XXXXXã®ã¨ã©ã¼ã³ã¼ã>;
+	}
+	else {
+		if (<YYYYYã®ã¨ã©ã¼æ¡ä»¶>) {
+			ercd = <YYYYYã®ã¨ã©ã¼ã³ã¼ã>;
+		}
+		else {
+
+			<ãµã¼ãã¹ã³ã¼ã«å¦çæ¬ä½>
+
+		}
+	}
+	LOG_XXX_YYY_LEAVE(â¦â¦);
+	return(ercd);
+}
+----------------------------------------
+
+CHECKãã¯ã­ã®å
+å®¹ãç¥ã£ã¦ããã¨ããåæã®ä¸ã§ã¯ï¼å
+ã®ã½ã¼ã¹ã³ã¼ãã®æ¹ã
+èª­ã¿ãããã®ã¯æããã§ããï¼
+
+ãªãï¼ãã®ãããªCHECKãã¯ã­ã®å®ç¾©ã«ã¯ï¼gotoæã®ä½¿ç¨ãä¸å¯é¿ã§ããï¼
+
+âCHECKãã¯ã­ãä½¿ç¨ãã¦ããæ¡ä»¶
+
+CHECKãã¯ã­ã¯ï¼æ¬¡ã®æ¡ä»¶ãæºããããã«ä½¿ç¨ããªããã°ãªããªãï¼
+
+(1) CHECKãã¯ã­ã¯ï¼ãµã¼ãã¹ã³ã¼ã«å¦çé¢æ°ã®å
+é ­é¨åã§ï¼ãµã¼ãã¹ã³ã¼ã«å
+¥
+ããå£ã®ã­ã°ãåºããå¾ï¼ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã«å
+¥ãåã¾ã§ã«ï¼å¦çé¢æ°
+ããã®ãããã¬ãã«ã§ç¨ããï¼
+
+(2) ãµã¼ãã¹ã³ã¼ã«å¦çé¢æ°ã®æ«å°¾é¨åã§ï¼ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ãæãã
+ããå¾ï¼ãµã¼ãã¹ã³ã¼ã«åºå£ã®ã­ã°ãåºãåã«ï¼å¦çé¢æ°ã®ãããã¬ãã«ã«ï¼
+ããerror_exitã©ãã«ãç½®ãï¼
+
+âåé¡ãçãããã¨ããªãæ ¹æ 
+
+ãã®ãããªæ¹æ³ã§gotoæãä½¿ç¨ãã¦ãï¼ã½ããã¦ã§ã¢ã®ä¿¡é ¼æ§ã«åé¡ãçãã
+ãã¨ããªããã¨ãä¸»å¼µããã«ã¯ï¼ããããï¼MISRA-Cãªã©ã®ã³ã¼ãã£ã³ã°ã«ã¼ã«
+ã§gotoæã®ä½¿ç¨ãç¦æ­¢ãã¦ããæ ¹æ ï¼è¨ãæããã¨ï¼gotoæã®ä½¿ç¨ã«ããã½ã
+ãã¦ã§ã¢ã®ä¿¡é ¼æ§ã«åé¡ãçããå¯è½æ§ã®ããçç±ãæããã«ããå¿
+è¦ãããï¼
+
+MISRA-Cã®ãã­ã¥ã¡ã³ãã§ã¯ï¼gotoæã®ä½¿ç¨ãç¦æ­¢ããæ ¹æ ã«ã¤ãã¦ãã¾ãæç¢º
+ã«ãªã£ã¦ãããï¼ããã§ã¯ãã®æ ¹æ ãæ¬¡ã®ããã«æ¨æ¸¬ããï¼
+
+ã»å¦çã®æµããè¤éã«ãªãï¼ãã­ã°ã©ã ã®æå³ãèª­ã¿ã«ãããªãï¼ããããï¼
+ãã¹ãã²ããã£ãã­ã°ã©ã ã«ãªãï¼ï¼
+
+CHECKãã¯ã­ã®å ´åã«ã¯ï¼gotoæãã¨ã©ã¼çºçæã®å¼·å¶è±åºã«ç¨ãã¦ããï¼ã©ã
+ã«ãerror_exitã¨ãããªã©ï¼ãã­ã°ã©ã ã®æå³ã¯æããã§ããï¼ä¸æ¹ï¼ãã®ã
+ãã«gotoæãã¨ã©ã¼æã®å¼·å¶è±åºã«ç¨ããå ´åã«ã¯ï¼æ¬¡ã®ç¹ãgotoæã®ä½¿ç¨ã
+ç¦æ­¢ããæ ¹æ ã«ãªãããï¼
+
+ã»gotoæã§å¼·å¶è±åºãããã¨ã«ããï¼è±åºæã«è¡ããªããã°ãªããªãå¾å¦çã
+ãé£ã°ãããããããããï¼
+
+ãã ããã®ç¹ã«ã¤ãã¦ãï¼CHECKãã¯ã­ãä¸è¨ã®ä½¿ç¨æ¡ä»¶ãæºããã¦ä½¿ãéãã¯ï¼
+è±åºæã«è¡ããªããã°ãªããªãå¾å¦çã¯ãªãï¼CHECKãã¯ã­ã®ä½¿ç¨ã«ããã½ãã
+ã¦ã§ã¢ã®ä¿¡é ¼æ§ã«åé¡ãçãããã¨ã¯ãªãï¼
+
+åé¡ãçãããã¨ããªããã¨ãè«è¨¼ãããã1ã¤æ¹æ³ã¯ï¼ã³ã¼ãã£ã³ã°ã«ã¼ã«ã«
+åè´ããªããã­ã°ã©ã ãï¼ã³ã¼ãã£ã³ã°ã«ã¼ã«ã«åè´ãããã­ã°ã©ã ã¨ç­ä¾¡ã§
+ãããã¨ãç¤ºãæ¹æ³ã§ããï¼
+
+ãã§ã«ãè¨­è¨æå³ãã®ç¯ã§è¿°ã¹ãããã«ï¼CHECKãã¯ã­ãä½¿ç¨ãããã­ã°ã©ã ã¯ï¼
+gotoæãä½¿ç¨ããªãç­ä¾¡ãªãã­ã°ã©ã ã«æ¸ãæãããã¨ãã§ãããï¼ããä¸è¬
+çã«ã¯ï¼æ¬¡ã®ãã¨ãè¨ããï¼
+
+elseé¨ãæããªãifæã®thené¨ã®æå¾ã«ï¼ifæããä¸ï¼åæ¹ï¼ã«ããï¼ifæã¨
+åããã­ãã¯å
+ã®åãéå±¤ã®ã©ãã«ã¸åå²ããgotoæãããå ´åã«ã¯ï¼ifæã¨
+ã©ãã«ã®éã®æãelseé¨ã«ãããã¨ã«ããï¼gotoæãä½¿ããªãç­ä¾¡ãªãã­ã°ã©
+ã ã«æ¸ãæãããã¨ãã§ããï¼
+
+ä¾ã¨ãã¦ï¼gotoæãä½¿ã£ãæ¬¡ã®ãã­ã°ã©ã ãèããï¼
+
+----------------------------------------
+	{
+		/* ifæã®åã®æ */
+		if (....) {
+			/* thené¨ã®æ */
+			goto <ã©ãã«>;
+		}
+		/* ifæã¨ã©ãã«ã®éã®æ */
+	  <ã©ãã«>:
+		/* ã©ãã«ããå¾ãã®æ */
+	}
+----------------------------------------
+
+ãã®ãã­ã°ã©ã ã¯ï¼gotoæãä½¿ããªãæ¬¡ã®ãã­ã°ã©ã ã¨ç­ä¾¡ã§ããï¼
+
+----------------------------------------
+	{
+		/* ifæã®åã®æ */
+		if (....) {
+			/* thené¨ã®æ */
+		}
+		else {
+			/* ifæã¨ã©ãã«ã®éã®æ */
+		}
+		/* ã©ãã«ããå¾ãã®æ */
+	}
+----------------------------------------
+
+ãã®æ¡ä»¶ã«åè´ããgotoæãè¤æ°ããå ´åã«ã¯ï¼ä¸ã«ããgotoæããé ã«ä¸è¨
+ã®æ¹æ³ã«ãã£ã¦æ¸ãæãããã¨ã§ï¼gotoæãä½¿ããªãç­ä¾¡ãªãã­ã°ã©ã ã«æ¸ã
+æãããã¨ãã§ããï¼
+
+CHECKãã¯ã­ã®ä½¿ç¨æ¹æ³ã¯ï¼ä¸è¨ã®gotoæã®ä½¿ç¨æ¹æ³ã«åè´ããããï¼gotoæã
+ä½¿ç¨ããªãç­ä¾¡ãªãã­ã°ã©ã ã«æ¸ãæãããã¨ãã§ããï¼ãã£ã¦ï¼ãã®CHECKã
+ã¯ã­ã«ããåé¡ãçãããã¨ã¯ãªãï¼
+
+
+âext_tskï¼ext_kerã®è¿ãå¤
+
+Î¼ITRON4.0ä»æ§ã§ã¯ï¼ext_tskã¯ãªã¿ã¼ã³ãããã¨ã®ãªããµã¼ãã¹ã³ã¼ã«ã¨ãªã£
+ã¦ãããï¼TOPPERSæ°ä¸ä»£ã«ã¼ãã«ã«ããã¦ã¯ï¼ãã®ãµã¼ãã¹ã³ã¼ã«ã®è¿ãå¤ã
+ERåã«å¤æ´ãï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãããå¼ã°ããå ´åã«ã¯ï¼E_CTXã¨ã©ã¼ãè¿
+ãå¤ã¨ãã¦ãªã¿ã¼ã³ãããã¨ã¨ããï¼
+
+ãã®ä»æ§ã«å¯¾ããããã¤ãã®å¯¾æ¡ãæ¤è¨ãããï¼ä»¥ä¸ã®çç±ã§æ¡ç¨ããªãï¼
+
+ã»JSPã«ã¼ãã«ã®ããã«ï¼å±éºã®å¯è½æ§ãæ¤åºããªããå®è¡ãç¶ç¶ããæ¹æ³ã¯ï¼
+ãä¿¡é ¼æ§ã»å®å
+¨æ§ãéè¦ããã·ã¹ãã ã§ã¯æã¾ãããªãï¼ä¿¡é ¼æ§ã»å®å
+¨æ§ãé
+ãè¦ããã·ã¹ãã ã§ã¯ï¼å±éºã®å¯è½æ§ãæ¤åºãããï¼æ©æã«ãªã«ããªããã¹ã
+ãã§ããï¼
+
+ã»ASPã«ã¼ãã«ã®å½åæ¡ã®ã«ã¼ãã«ããã¦ã³ãããæ¹æ³ã¯ï¼ã¢ããªã±ã¼ã·ã§ã³å´
+ãã§åå¾©ããä½å°ããªããã¨ããæå³ã§æã¾ãããªãï¼
+
+ã»éå»ã®äºææ§ãä¿ã¤ããã«ï¼åãvoidã¨ããã¾ã¾ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãã
+ããå¼ã°ããå ´åã«ã¯ãªã¿ã¼ã³ããã¨ããæ¹æ³ã¯ï¼ã«ã¼ãã«ã®ä»æ§å¤æ´ã«æ°ã¥
+ããã«ãããªãã¨ããæå³ã§æã¾ãããªãï¼ã¾ãï¼ä»ã®ã¨ã©ã¼ã³ã¼ãï¼ä¾ãã°
+ãE_NOSPTï¼ãè¿ãä½å°ããªããã¦ããï¼
+
+ã»ä¸ç¨®ã®CPUä¾å¤ãå¼ã³åºããã¨ã«ããæ¹æ³ã¯ï¼ã«ã¼ãã«ä»æ§å
+¨ä½ã®æ´åæ§ãè
+ããã¦æ¡ç¨ããªãã£ãï¼ããã§ä¸ç¨®ã®CPUä¾å¤ãå°å
+¥ãããããï¼ãµã¼ãã¹ã³ã¼
+ãã«ãã¨ã©ã¼ãè¿ããå ´åã«å¼ã°ããOSEK/VDX OSä»æ§ã®ã¨ã©ã¼ããã¯ã«ç¸å½ã
+ããæ©è½ãå°å
+¥ããæ¹ãæç¨æ§ãé«ãã¨æãããããã§ããï¼
+
+ãã®å¤æ´ã«ããï¼ããã«ï¼CPUã­ãã¯ç¶æ
+ããã£ã¹ãããç¦æ­¢ç¶æ
+ã§ext_tskã
+å¼ã°ããå ´åã«ãã¨ã©ã¼ãªã¿ã¼ã³ããæ¹æ³ãèãããããï¼ã¿ã¹ã¯ã®ã¡ã¤ã³ã«ã¼
+ãã³ããã®ãªã¿ã¼ã³ã¨ext_tskãç­ä¾¡ã«ãªããªãããï¼æ¡ç¨ããªãï¼ã¾ãï¼ä»ã®
+å¦çåä½ããã®ãªã¿ã¼ã³æ¹æ³ã¨æ´åãããæå³ãããï¼ä¾ãã°ï¼å²è¾¼ã¿ãã³ã
+ã©ããCPUã­ãã¯ç¶æ
+ã®ã¾ã¾ãªã¿ã¼ã³ããå ´åã®æ±ãï¼ï¼
+
+ããã«ãããã¦ï¼ext_kerã«ã¤ãã¦ãï¼è¿ãå¤ãERåã«å¤æ´ããï¼ASPã«ã¼ãã«
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+ãè¿ãå ´åãããï¼
+
+ãªãï¼Î¼ITRON4.0ä»æ§ã§ã¯ï¼exd_tskããªã¿ã¼ã³ãããã¨ã®ãªããµã¼ãã¹ã³ã¼ã«
+ã¨ãªã£ã¦ãããï¼TOPPERSæ°ä¸ä»£ã«ã¼ãã«ã§ã¯ï¼exd_tskã¯ãµãã¼ããã¦ããªãï¼
+
+
+âã«ã¼ãã«ã®ãã¼ã¿æ§é ã«å¯¾ããvolatileå®£è¨ã«ã¤ãã¦ï¼ã¯ãªãã£ã«ã«ã»ã¯ã·ã§
+ã³ã®åºå
+¥å¦çã®å®ç¾ã«é¢ããå¶ç´ï¼
+
+ã«ã¼ãã«å
+ã®ãã¼ã¿æ§é ã¯ï¼ä¸¦è¡å®è¡ãããä»ã®å¦çåä½ï¼å²è¾¼ã¿ãã³ãã©ã
+ã¿ã¹ã¯ï¼ãããã¢ã¯ã»ã¹ãããå¯è½æ§ãããããï¼volatileå®£è¨ãå¿
+è¦ã§ã¯ãª
+ããã¨èããããï¼å®éï¼ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³å
+ã§ã«ã¼ãã«å¤æ°ãèª­ãã³ã¼
+ããï¼ã³ã³ãã¤ã©ã®æé©åã«ããã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³å¤ã«ç§»åããï¼ãã
+ãåå ã¨ãªã£ãåé¡äºä¾ãå ±åããã¦ããï¼
+
+ã«ã¼ãã«å
+ã®ãã¹ã¦ã®ãã¼ã¿æ§é ã«volatileå®£è¨ãã¤ããæ¹æ³ã¯ï¼å®å
+¨ã§ã¯ã
+ããï¼æé©åãææ­¢ãããããã«ï¼ã«ã¼ãã«ã®ãµã¤ãºãæ§è½ã«ã¯æªå½±é¿ãä¸ã
+ãï¼ããã§ASPã«ã¼ãã«ã§ã¯ï¼æ¬¡ã®æ¹æ³ã§volatileå®£è¨ã®å¿
+è¦æ§ããªãããã¨ã¨
+ããï¼
+
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+æ§ã®ãããã¼ã¿æ§é ã¯ï¼ãã¹ã¦ï¼CPUã­ãã¯ç¶æ
+ã¾ãã¯å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
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+ãã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³å
+ã§ã¢ã¯ã»ã¹ãã¦ããï¼ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³å
+
+ã§ã®ãã¼ã¿æ§é ã®ã¢ã¯ã»ã¹ãï¼ã³ã³ãã¤ã©ã®æé©åã«ããã¯ãªãã£ã«ã«ã»ã¯ã·ã§
+ã³å¤ã«ç§»åãããªãããã«ããã«ã¯ï¼ã³ã³ãã¤ã©ã«å¯¾ãã¦ï¼ã¯ãªãã£ã«ã«ã»ã¯
+ã·ã§ã³ã®åºå
+¥å¦çã«ããï¼ã¡ã¢ãªä¸ã®ãã¼ã¿æ§é ãæ¸ãå¤ããå¯è½æ§ãããã
+ã¨ãç¥ãããã°ããï¼
+
+å
+·ä½çã«ã¯ï¼ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åºå
+¥å¦çãé¢æ°ã«ãã£ã¦å®ç¾ããã°ï¼
+ãã®ãããªæé©åãææ­¢ãããã¨ãã§ããï¼ãããï¼ASPã«ã¼ãã«ã®å¤ãã®ã¿ã¼
+ã²ããä¾å­é¨ã«ããã¦ï¼ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åºå
+¥å¦çã¯ãã¯ã­ãã¤ã³ã©
+ã¤ã³é¢æ°ã«ããå®è£
+ããã¦ããï¼ä¸ã®ãããªæé©åãææ­¢ã§ããªãï¼
+
+ããã§ï¼ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åºå
+¥å¦çãå®ç¾ããå ´åã«ã¯ï¼ã¡ã¢ãªä¸ã®
+ãã¼ã¿æ§é ãæ¸ãå¤ããå¯è½æ§ããããã¨ãï¼ä½ããã®æ¹æ³ã§ã³ã³ãã¤ã©ã«ç¥
+ãããªããã°ãªããªãã¨ããå¶ç´ãè¨­ããï¼GNUéçºç°å¢ã§ã¯ï¼æ¬¡ã®ããããã®
+æ¹æ³ã§ãã®å¶ç´ãæºãããã¨ãã§ããï¼
+
+(a) ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åºå
+¥å¦çã®å
+¨ä½ã¾ãã¯åºå
+¥å¦çã®æ¬è³ªçãªé¨å
+	ï¼å
+·ä½çã«ã¯ï¼å²è¾¼ã¿ç¦æ­¢ï¼è¨±å¯ããå¦çï¼ãï¼ã¤ã³ã©ã¤ã³ã§ãªãï¼éå¸¸
+	ã®é¢æ°ã«ããå®ç¾ããï¼
+
+(b) ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åºå
+¥å¦çã®æ¬è³ªçãªé¨åãã¤ã³ã©ã¤ã³ã¢ã»ã³ã
+	ã©ã«ãã£ã¦å®ç¾ãã¦ããå ´åã«ã¯ï¼ãã®ã¤ã³ã©ã¤ã³ã¢ã»ã³ãã©ã®clobberå¤
+	æ°ãªã¹ãã«"memory"ãè¿½å ããï¼
+
+(c) ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åºå
+¥å¦çã®æ¬è³ªçãªé¨åãï¼ãã¯ã­ãã¤ã³ã©ã¤
+	ã³é¢æ°å¼åºãã§å®ç¾ãã¦ããå ´åã«ã¯ï¼ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã«å
+¥ãå¦
+	çã®æå¾ã¨åºãå¦çã®å
+é ­ã«ï¼Asm("":::"memory")ã¨ããè¨è¿°ãå
+¥ããï¼
+
+ãªãï¼ãã®å¶ç´ãé©ç¨ãããã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®åºå
+¥å¦çã¯ï¼ä»¥ä¸ã®ã
+ã®ã§ããï¼
+
+	SIL_LOC_INT
+	SIL_UNL_INT
+	t_lock_cpu, i_lock_cpu, x_lock_cpu
+	t_unlock_cpu, i_unlock_cpu, x_unlock_cpu
+
+
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Index: rtos_arduino/trunk/asp_1.9.2/doc/extension.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/doc/extension.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/doc/extension.txt	(revision 136)
@@ -0,0 +1,514 @@
+
+		TOPPERS/ASPã«ã¼ãã«
+		æ©è½æ¡å¼µã»ãã¥ã¼ãã³ã°ã¬ã¤ã
+
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 1.9.2
+		æçµæ´æ°: 2014å¹´1æ2æ¥
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASPã«ã¼ãã«ãï¼æ©è½æ¡å¼µã»ãã¥ã¼ãã³ã°ããã
+ãã®æ¹æ³ï¼ã¾ãã¯ãã³ãï¼ãèª¬æãããã®ã§ããï¼
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2005-2014 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
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+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
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+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
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+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
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+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
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+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ ã®è²¬ä»»ãè² ããªãï¼
+ 
+ $Id: extension.txt 2676 2015-05-26 15:16:46Z ertl-hiro $
+----------------------------------------------------------------------
+
+âç®æ¬¡
+
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+	- ãªã¼ãã©ã³ãã³ãã©æ©è½æ¡å¼µããã±ã¼ã¸
+	- ã¿ã¹ã¯åªå
+åº¦æ¡å¼µããã±ã¼ã¸
+	- å¶ç´ã¿ã¹ã¯æ¡å¼µããã±ã¼ã¸
+	- åççææ©è½æ¡å¼µããã±ã¼ã¸
+ã»CPUä¾å¤ãã³ãã©ã®ç´æ¥å¼åºã
+	- TA_DIRECTå±æ§ã®å°å
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+	- ã¿ã¼ã²ããä¾å­é¨ã®ä¿®æ­£ç®æ
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+#define CHECK_TSKID(tskid)			((void)(tskid))
+#define CHECK_TSKID_SELF(tskid)		((void)(tskid))
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+åº¦ãå¤æ´ãããµã¼ãã¹ã³ã¼ã«ras_priãå®è£
+ãã¦
+ããï¼å¶ç´ã¿ã¹ã¯æ¡å¼µããã±ã¼ã¸ã¯ï¼extension/rstr_taskãã£ã¬ã¯ããªã«ç½®ã
+ã¦ããï¼
+
+å¶ç´ã¿ã¹ã¯æ¡å¼µããã±ã¼ã¸ã§ã¯ï¼TOPPERS_SUPPORT_RSTR_TASKãkernel.hä¸­ã§å®
+ç¾©ããã¦ããã®ã§ï¼ãããç¨ãã¦å¶ç´ã¿ã¹ã¯ã®æ©è½ãä½¿ç¨ã§ãããã©ãããå¤
+å¥ãããã¨ãã§ããï¼
+
+----------------------------------------------------------------------
+ras_pri		èªã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ã®å¼ãä¸ããTã
+
+ãCè¨èªAPIã
+	ER ercd = ras_pri(PRI tskpri)
+
+ããã©ã¡ã¼ã¿ã
+	PRI			tskpri		ãã¼ã¹åªå
+åº¦
+
+ããªã¿ã¼ã³ãã©ã¡ã¼ã¿ã
+	ER			ercd		æ­£å¸¸çµäºï¼E_OKï¼ã¾ãã¯ã¨ã©ã¼ã³ã¼ã
+
+ãã¨ã©ã¼ã³ã¼ãã
+	E_CTX		ã³ã³ãã­ã¹ãã¨ã©ã¼
+				ã»éã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®å¼åºã
+				ã»CPUã­ãã¯ç¶æ
+ããã®å¼åºã
+	E_PAR		ãã©ã¡ã¼ã¿ã¨ã©ã¼
+				ã»tskpriãæå¹ç¯å²å¤
+	E_ILUSE		ãµã¼ãã¹ã³ã¼ã«ä¸æ­£ä½¿ç¨
+				ã»æ¡ä»¶ã«ã¤ãã¦ã¯æ©è½ã®é 
+ãåç
+§
+
+ãæ©è½ã
+
+èªã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ãï¼tskpriã§æå®ããåªå
+åº¦ã«å¤æ´ããï¼å
+·ä½çãªæ¯
+èãã¯ä»¥ä¸ã®éãï¼
+
+èªã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ãï¼tskpriã§æå®ããåªå
+åº¦ã«å¤æ´ãããï¼ããã«ä¼´ã£
+ã¦ï¼èªã¿ã¹ã¯ã®ç¾å¨åªå
+åº¦ãå¤æ´ãããï¼åãåªå
+åº¦ã®ã¿ã¹ã¯ã®ä¸­ã§ã¯ï¼èªã¿
+ã¹ã¯ãæé«åªå
+é ä½ã¨ãªãï¼
+
+tskpriã«TPRI_INIï¼ï¼0ï¼ãæå®ããã¨ï¼èªã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ãï¼èµ·åæåª
+å
+åº¦ã«å¤æ´ãããï¼
+
+tskpriã¯ï¼èªã¿ã¹ã¯ã®èµ·åæåªå
+åº¦ã¨åãããããããé«ããªããã°ãªããªãï¼
+ããã§ãªãå ´åã«ã¯ï¼E_ILUSEã¨ã©ã¼ã¨ãªãï¼
+----------------------------------------------------------------------
+
+âåççææ©è½æ¡å¼µããã±ã¼ã¸
+
+åççææ©è½æ¡å¼µããã±ã¼ã¸ã¯ï¼ãªãã¸ã§ã¯ãã®åççææ©è½ãè¿½å ãããã
+ã®æ¡å¼µããã±ã¼ã¸ã§ããï¼TOPPERSæ°ä¸ä»£ã«ã¼ãã«çµ±åä»æ§æ¸ã«è¦å®ãããä»¥ä¸
+ã®ãªãã¸ã§ã¯ãçæï¼åé¤ã®ããã®ãµã¼ãã¹ã³ã¼ã«ï¼å²ä»ãå¯è½ãªIDçªå·ã®æ°
+ãæå®ããéçAPIã«å ãã¦ï¼ã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åãè¨­å®ããéç
+API DEF_KMMãå®è£
+ãã¦ããï¼åççææ©è½æ¡å¼µããã±ã¼ã¸ã¯ï¼extension/dcre
+ãã£ã¬ã¯ããªã«ç½®ãã¦ããï¼
+
+ãã ãï¼ã«ã¼ãã«å
+ã§ã®åçã¡ã¢ãªç®¡çã«é¢ãã¦ã¯ï¼ã¿ã¼ã²ããéä¾å­é¨ã§ã¯ï¼
+ã¡ã¢ãªé åãå
+é ­ããé ã«å²ãå½ã¦ï¼è§£æ¾ãããã¡ã¢ãªé åãåå©ç¨ããªãã¡
+ã¢ãªç®¡çã¢ã¸ã¥ã¼ã«ã®ã¿ãå®è£
+ãã¦ããï¼æ¬æ ¼çãªåçã¡ã¢ãªç®¡çãè¡ããã
+å ´åã«ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã¾ãã¯ã¦ã¼ã¶å´ã§ï¼ãã®ããã®é¢æ°ãç¨æããå¿
+
+è¦ãããï¼ç¨æããé¢æ°ç­ã«ã¤ãã¦ã¯ï¼ãTOPPERS/ASPã«ã¼ãã« ã¿ã¼ã²ããä¾
+å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ããã®ã6.15 åçã¡ã¢ãªç®¡çãã®ç¯ãåç
+§ãããã¨ï¼
+
+åçæ©è½æ¡å¼µæ¡å¼µããã±ã¼ã¸ã§ã¯ï¼TOPPERS_SUPPORT_DYNAMIC_CREãkernel.hä¸­
+ã§å®ç¾©ããã¦ããã®ã§ï¼ãããç¨ãã¦åççææ©è½ãä½¿ç¨ã§ãããã©ãããå¤
+å¥ãããã¨ãã§ããï¼
+
+åççææ©è½æ¡å¼µããã±ã¼ã¸ã«ããè¿½å ããããµã¼ãã¹ã³ã¼ã«
+
+	ER_ID tskid = acre_tsk(const T_CTSK *pk_ctsk)
+	ER ercd = del_tsk(ID tskid)
+	ER ercd = def_tex(ID tskid, const T_DTEX *pk_dtex)
+	ER_ID semid = acre_sem(const T_CSEM *pk_csem)
+	ER ercd = del_sem(ID semid)
+	ER_ID flgid = acre_flg(const T_CFLG *pk_cflg)
+	ER ercd = del_flg(ID flgid)
+	ER_ID dtqid = acre_dtq(const T_CDTQ *pk_cdtq)
+	ER ercd = del_dtq(ID dtqid)
+	ER_ID pdqid = acre_pdq(const T_CPDQ *pk_cpdq)
+	ER ercd = del_pdq(ID pdqid)
+	ER_ID mbxid = acre_mbx(const T_CMBX *pk_cmbx)
+	ER ercd = del_mbx(ID mbxid)
+	ER_ID mpfid = acre_mpf(const T_CMPF *pk_cmpf)
+	ER ercd = del_mpf(ID mpfid)
+	ER_ID cycid = acre_cyc(const T_CCYC *pk_ccyc)
+	ER ercd = del_cyc(ID cycid)
+	ER_ID almid = acre_alm(const T_CALM *pk_calm)
+	ER ercd = del_alm(ID almid)
+	ER_ID isrid = acre_isr(const T_CISR *pk_cisr)
+	ER ercd = del_isr(ID isrid)
+
+åççææ©è½æ¡å¼µããã±ã¼ã¸ã«ããè¿½å ãããéçAPI
+
+	AID_TSK(uint_t notsk)
+	AID_SEM(uint_t nosem)
+	AID_FLG(uint_t noflg)
+	AID_DTQ(uint_t nodtq)
+	AID_PDQ(uint_t nopdq)
+	AID_MBX(uint_t nombx)
+	AID_MPF(uint_t nompf)
+	AID_CYC(uint_t nocyc)
+	AID_ALM(uint_t noalm)
+	AID_ISR(uint_t noisr)
+	DEF_KMM({ SIZE kmmsz, STK_T *kmm })
+
+----------------------------------------------------------------------
+DEF_KMM		ã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åã®è¨­å®ãSDã
+
+ãéçAPIã
+	DEF_KMM({ SIZE kmmsz, STK_T *kmm })
+
+ããã©ã¡ã¼ã¿ã
+ãï¼ã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åã®è¨­å®æ
+å ±
+	SIZE		kmmsz		ã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åã®ãµã¤ãºï¼ãã¤ãæ°ï¼
+	STK_T		kmm			ã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åã®å
+é ­çªå°
+
+ãã¨ã©ã¼ã³ã¼ãã
+	E_PAR		ãã©ã¡ã¼ã¿ã¨ã©ã¼
+				ã»kmmszã0ä»¥ä¸
+				ã»ãã®ä»ã®æ¡ä»¶ã«ã¤ãã¦ã¯æ©è½ã®é 
+ãåç
+§
+	E_OBJ		ãªãã¸ã§ã¯ãç¶æ
+ã¨ã©ã¼
+				ã»ã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åãè¨­å®æ¸ã¿
+
+ãæ©è½ã
+
+åãã©ã¡ã¼ã¿ã§æå®ããã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åã®è¨­å®æ
+å ±ã«å¾ã£ã¦ï¼
+ã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åãè¨­å®ããï¼
+
+kmmszã¯æ´æ°å®æ°å¼ãã©ã¡ã¼ã¿ï¼kmmã¯ä¸è¬å®æ°å¼ãã©ã¡ã¼ã¿ã§ããï¼
+
+kmmãNULLã¨ããå ´åï¼kmmszã§æå®ãããµã¤ãºã®ã¡ã¢ãªé åãï¼ã³ã³ãã£ã®ã¥
+ã¬ã¼ã¿ãç¢ºä¿ããï¼kmmszã«ã¿ã¼ã²ããå®ç¾©ã®å¶ç´ã«åè´ããªããµã¤ãºãæå®ã
+ãæã«ã¯ï¼ã¿ã¼ã²ããå®ç¾©ã®å¶ç´ã«åè´ããããã«ãµã¤ãºãå¤§ããæ¹ã«ä¸¸ãã¦
+ç¢ºä¿ããï¼
+
+ã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åãã¢ããªã±ã¼ã·ã§ã³ã§ç¢ºä¿ããå ´åã«ã¯ï¼
+kmmszã§æå®ãããµã¤ãºã®ã¡ã¢ãªé åãç¢ºä¿ãï¼kmmã«ãã®å
+é ­çªå°ãæå®ããï¼
+
+DEF_KMMã«ããã«ã¼ãã«ãå²ãä»ããã¡ã¢ãªé åãè¨­å®ããªãå ´åï¼ã«ã¼ãã«ã
+å²ãä»ããã¡ã¢ãªé åã¯ç¢ºä¿ãããªãï¼
+
+kmmãkmmszã«ã¿ã¼ã²ããå®ç¾©ã®å¶ç´ã«åè´ããªãå
+é ­çªå°ããµã¤ãºãæå®ãã
+æã«ã¯ï¼E_PARã¨ã©ã¼ã¨ãªãï¼
+----------------------------------------------------------------------
+
+
+âCPUä¾å¤ãã³ãã©ã®ç´æ¥å¼åºã
+
+CPUä¾å¤ãã³ãã©ã®åºå
+¥å£å¦çã¯ï¼CPUä¾å¤ãçºçããªãããã«å®è£
+ããªããã°
+ãªããªããï¼ãããé²ããªãã¿ã¼ã²ããã«ããã¦ã¯ï¼CPUä¾å¤ãã³ãã©ã®åºå
+¥å£
+å¦çãçµç±ããã«ï¼ã¢ããªã±ã¼ã·ã§ã³ãç¨æããCPUä¾å¤ãã³ãã©ãç´æ¥å®è¡ã
+ãæ¹æ³ãç¨æããã®ãæã¾ããï¼ãããï¼CPUä¾å¤ãã³ãã©ã®ç´æ¥å¼åºãã¨å¼ã¶ï¼
+
+ããã§ã¯ï¼ãã¼ãã¦ã§ã¢ã§ãã¯ã¿ãã¼ãã«ãæã¤ãã­ã»ããµã«ããã¦ï¼ã¿ã¼ã²ã
+ãä¾å­é¨ã®ã¿ã®ä¿®æ­£ã«ããï¼CPUä¾å¤ãã³ãã©ã®ç´æ¥å¼åºãã®æ©è½ãè¿½å ããæ¹
+æ³ã«ã¤ãã¦èª¬æããï¼
+
+âTA_DIRECTå±æ§ã®å°å
+¥
+
+CPUä¾å¤ãã³ãã©ã®ç´æ¥å¼åºããæå®ããããã«ï¼CPUä¾å¤ãã³ãã©å±æ§ã«ï¼
+TA_DIRECTå±æ§ãå°å
+¥ããï¼
+
+âã¿ã¼ã²ããä¾å­é¨ã®ä¿®æ­£ç®æ
+
+TA_DIRECTã®å¤ãï¼target_kernel.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯ã«ã¼ãããããã¡
+ã¤ã«ï¼ã§å®ç¾©ãï¼ãã®å¤ãã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãåãåºããããã«ï¼
+target_def.csvï¼ã¾ãã¯ï¼ããã«ä»£ãããã¡ã¤ã«ï¼ã«æ¬¡ã®è¡ãè¿½å ããï¼
+
+TA_DIRECT,TA_DIRECT
+
+æ¬¡ã«ï¼target.tfï¼ã¾ãã¯ï¼ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ã§ï¼
+TARGET_EXCATRã«è¨­å®ãããå¤ã«ï¼TA_DIRECTãè¿½å ããï¼ä¾ãã°ï¼ä»ã®ã¿ã¼ã²ã
+ãä¾å­ã®CPUä¾å¤ãã³ãã©å±æ§ããªãå ´åã«ã¯ï¼æ¬¡ã®ããã«è¨­å®ããï¼
+
+$TARGET_EXCATR = TA_DIRECT$
+
+æ¬¡ã«ï¼OMIT_INITILIZE_EXCEPTIONãç¨ãã¦ï¼CPUä¾å¤ãã³ãã©ã®åºå
+¥å£å¦çãç
+æããããã®è¨è¿°ã¨CPUä¾å¤ãã³ãã©åæåãã­ãã¯ã®æ¨æºã®å®ç¾©ãçæããã
+ã®ãææ­¢ãï¼ããã«ãã£ã¦ææ­¢ãããé¨åãtarget.tfã«ã³ãã¼ããä¸ã§ï¼ä»¥ä¸
+ã®ä¿®æ­£ãå ããï¼
+
+CPUä¾å¤ãã³ãã©ã®åºå
+¥å£å¦çãçæããããã®è¨è¿°ï¼EXCHDR_ENTRYã®ãªã¹ãï¼
+ãçæããé¨åã¯ï¼æ¬¡ã®ããã«ä¿®æ­£ããï¼
+
+$FOREACH excno EXC.ORDER_LIST$
+	$IF (EXC.EXCATR[excno] & TA_DIRECT) == 0$
+		EXCHDR_ENTRY($EXC.EXCNO[excno]$, $+EXC.EXCNO[excno]$, $EXC.EXCHDR[excno]$)$NL$
+	$END$
+$END$
+
+ã¾ãï¼CPUä¾å¤ãã³ãã©åæåãã­ãã¯ã®å®ç¾©ãçæããé¨åã¯ï¼æ¬¡ã®ããã«ä¿®
+æ­£ããï¼
+
+$IF LENGTH(EXC.ORDER_LIST)$
+	const EXCINIB _kernel_excinib_table[TNUM_EXCNO] = {$NL$
+	$JOINEACH excno EXC.ORDER_LIST ",\n"$
+		$IF (EXC.EXCATR[excno] & TA_DIRECT) == 0$
+			$TAB${ ($EXC.EXCNO[excno]$), ($EXC.EXCATR[excno]$), (FP)(EXC_ENTRY($EXC.EXCNO[excno]$, $EXC.EXCHDR[excno]$)) }
+		$ELSE$
+			$TAB${ ($EXC.EXCNO[excno]$), ($EXC.EXCATR[excno]$), (FP)($EXC.EXCHDR[excno]$) }
+		$END$
+	$END$$NL$
+	};$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const EXCINIB, _kernel_excinib_table);$NL$
+$END$
+
+ä»¥ä¸
Index: rtos_arduino/trunk/asp_1.9.2/doc/ovrhdr_memo.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/doc/ovrhdr_memo.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/doc/ovrhdr_memo.txt	(revision 136)
@@ -0,0 +1,562 @@
+													TOPPERS Confidential
+		TOPPERSãã­ã¸ã§ã¯ã ãã£ã¹ã«ãã·ã§ã³ã¡ã¢
+		ãªã¼ãã©ã³ãã³ãã©ã«é¢ããè¨­è¨ã¡ã¢
+
+		ä½æè
+: é«ç°åºç« ï¼åå¤å±å¤§å­¦ï¼
+		æçµæ´æ°: 2014å¹´9æ28æ¥
+
+âã¡ã¢ã®ä½ç½®ä»ã
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASPã«ã¼ãã«ã®ãªã¼ãã©ã³ãã³ãã©æ©è½æ¡å¼µã«é¢
+ããè¨­è¨ã¡ã¢ã§ããï¼
+
+âãã¼ã¿åã¨å®æ°ã®å®ç¾©
+
+ãã­ã»ããµæéãè¡¨ç¾ãããã¼ã¿åOVRTIMã®å®ç¾©ãï¼kernel.hã«å«ããï¼
+
+----------------------------------------
+typedef	ulong_t		OVRTIM;		/* ãã­ã»ããµæé */
+----------------------------------------
+
+ãã­ã»ããµæéã«æå®ã§ããæå¤§å¤ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ï¼target_kernel.hã¾
+ãã¯ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ã§å®ç¾©ãããã®ã¨ãããï¼ããã©
+ã«ãã®å®ç¾©ãkernel.hã«å«ããï¼
+
+----------------------------------------
+#ifndef TMAX_OVRTIM
+#define TMAX_OVRTIM		ULONG_MAX
+#endif /* TMAX_OVRTIM */
+----------------------------------------
+
+ã¾ãï¼ãªã¼ãã©ã³ãã³ãã©ã®ãã¼ã¿åOVRHDRã®å®ç¾©ãï¼kernel.hã«å«ããï¼
+
+----------------------------------------
+typedef void	(*OVRHDR)(ID tskid, intptr_t exinf);
+----------------------------------------
+
+ãã®ä»ã«ï¼ãªã¼ãã©ã³ãã³ãã©æ©è½ã®ãµã¼ãã¹ã³ã¼ã«ã®å®£è¨ã¨é¢é£ããå®æ°ã®
+å®ç¾©ãï¼kernelã«å«ããï¼
+
+âç¨ãããã¼ãã¦ã§ã¢è³æºã¨ãµãã¼ãã§ããªãå ´åã®æªç½®
+
+ãªã¼ãã©ã³ãã³ãã©ãå®ç¾ããã«ï¼ã¿ã¤ã ãã£ãã¯ã®å²è¾¼ã¿ãçºçãããã®ã¨
+ã¯å¥ã®ã¿ã¤ãï¼ä»¥ä¸ï¼ããããªã¼ãã©ã³ã¿ã¤ãã¨å¼ã¶ï¼ãç¨ããï¼ãã®ããï¼
+ã¿ã¼ã²ããã«ãã£ã¦ã¯ï¼ãªã¼ãã©ã³ãã³ãã©ããµãã¼ãã§ããªãå ´åãèãã
+ããï¼ã¾ãï¼ãªã¼ãã©ã³ãã³ãã©ããµãã¼ããããã¨ã§ï¼ã¿ã¹ã¯åæãã«ãã
+ããªã¼ãããããåé¡ã«ãªãå ´åãèããããï¼
+
+ããã§ï¼ãªã¼ãã©ã³ãã³ãã©ããµãã¼ãã§ããå ´åã«ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã«
+ããã¦ï¼TOPPERS_TARGET_SUPPORT_OVRHDRããã¯ã­å®ç¾©ãããã®ã¨ããï¼
+
+ãªã¼ãã©ã³ãã³ãã©æ©è½æ¡å¼µã®kernel.hã§ã¯ï¼TOPPERS_TARGET_SUPPORT_OVRHDR
+ããã¯ã­å®ç¾©ããã¦ããã°ï¼TOPPERS_SUPPORT_OVRHDRãå®ç¾©ããï¼
+
+----------------------------------------
+#ifdef TOPPERS_TARGET_SUPPORT_OVRHDR
+#define TOPPERS_SUPPORT_OVRHDR			/* ãªã¼ãã©ã³ãã³ãã©æ©è½æ¡å¼µ */
+#endif /* TOPPERS_TARGET_SUPPORT_OVRHDR */
+----------------------------------------
+
+ãªã¼ãã©ã³ãã³ãã©æ©è½ã¯ï¼TOPPERS_SUPPORT_OVRHDRãå®ç¾©ããã¦ããå ´åã®
+ã¿çµã¿è¾¼ãï¼ããã«ããï¼ãªã¼ãã©ã³ãã³ãã©æ©è½æ¡å¼µãä½¿ç¨ãï¼ã¿ã¼ã²ãã
+ä¾å­é¨ããªã¼ãã©ã³ãã³ãã©ããµãã¼ããã¦ããå ´åã®ã¿ï¼ãªã¼ãã©ã³ãã³ã
+ã©æ©è½ãçµã¿è¾¼ã¾ãããã¨ã«ãªãï¼
+
+âãªã¼ãã©ã³ãã³ãã©ã«é¢é£ãããã¼ã¿æ§é 
+
+ãªã¼ãã©ã³ãã³ãã©ãå®è£
+ããããã«ï¼TCBã«ï¼æ®ããã­ã»ããµæéãè¡¨ããã£ã¼
+ã«ãleftotmãè¨­ããï¼task.hï¼ï¼
+
+----------------------------------------
+typedef struct task_control_block {
+	...
+	OVRTIM	leftotm;				/* æ®ããã­ã»ããµæé */
+	...
+} TCB;
+----------------------------------------
+
+ãªã¼ãã©ã³ãã³ãã©ãåä½ãã¦ããªãç¶æ
+ã®æã¯ï¼leftotmã0ã«è¨­å®ãããã¨
+ã¨ãï¼make_dormantã®ä¸­ã§0ã«åæåããï¼task.cï¼ï¼
+
+----------------------------------------
+void
+make_dormant(TCB *p_tcb)
+{
+	...
+	p_tcb->leftotm = 0U;
+	...
+}
+----------------------------------------
+
+ãªã¼ãã©ã³ãã³ãã©ã«å¯¾ãã¦ã¯ï¼ç®¡çãã­ãã¯ã¯å¿
+è¦ãªãï¼DEF_OVRã§å®ç¾©ãã
+æ
+å ±ãæ ¼ç´ããåæåãã­ãã¯ã®ã¿ãç¨æããï¼åæåãã­ãã¯ãï¼åä¸ã®è¦
+ç´ ã§ååã§ããï¼é
+åã§ããå¿
+è¦ã¯ãªãï¼overrun.hï¼ï¼
+
+----------------------------------------
+typedef struct overrun_handler_initialization_block {
+	ATR			ovratr;			/* ãªã¼ãã©ã³ãã³ãã©å±æ§ */
+	OVRHDR		ovrhdr;			/* ãªã¼ãã©ã³ãã³ãã©ã®èµ·åçªå° */
+} OVRINIB;
+----------------------------------------
+extern const OVRINIB	ovrinib;
+----------------------------------------
+
+ãªã¼ãã©ã³ã¿ã¤ããåä½ä¸­ããç¤ºããã©ã°ã¨ãã¦ï¼boot_tåã®å¤æ°
+ovrtimer_flagãç¨æããï¼overrun.hï¼overrun.cï¼ï¼
+
+----------------------------------------
+extern boot_t	ovrtimer_flag;
+----------------------------------------
+
+ã·ã³ã°ã«ãã­ã»ããµã®å ´åã«ã¯ï¼ãªã¼ãã©ã³ã¿ã¤ããåä½ä¸­ãã¯ï¼æ¬¡ã®æ¹æ³ã§
+å¤å¥ãããã¨ãã§ããï¼
+
+	ã¿ã¹ã¯ã³ã³ãã­ã¹ãã§ã¯ï¼(p_runtsk->leftotm > 0U)ã®æã®ã¿åä½ãã¦ããï¼
+	éã¿ã¹ã¯ã³ã³ãã­ã¹ãã§ã¯ï¼åä½ãã¦ããªãï¼
+
+ãã®ããï¼ãã®ãã©ã°ãç¨ããªãå®è£
+ãå¯è½ã§ãããï¼ãã«ããã­ã»ããµã¸ã®
+æ¡å¼µæ§ãã¿ã¼ã²ããä¾å­æ§ãä¸ããããã«ï¼ãããç¨ããå®è£
+ã¨ãã¦ããï¼å®
+éï¼Mac OS Xã¿ã¼ã²ããä¾å­é¨ã§ã¯ï¼ãããæ´»ç¨ãã¦ããï¼ï¼
+
+âæ®ããã­ã»ããµæéã®ä¿å­ï¼å¾©å¸°å¦çã®å
+å®¹
+
+ãã£ã¹ãããã£ããã³å²è¾¼ã¿å¦çï¼CPUä¾å¤å¦çã®åºå
+¥å£ã§ï¼ã¿ã¹ã¯ã®æ®ããã­
+ã»ããµæéãä¿å­ï¼å¾©å¸°ããå¿
+è¦ãããï¼å
+·ä½çã«ã¯ï¼ä»¥ä¸ã®ãããªå¦çãå¿
+
+è¦ã§ããï¼
+
+(a) dispatchã¸ã®å
+¥å£
+
+ovrtimer_flagãtrueã§ããã°ï¼ã¾ãã¯ï¼p_runtsk->leftotmã0ã§ãªããã°ï¼ï¼
+ãªã¼ãã©ã³ã¿ã¤ããåæ­¢ããï¼æ®ããã­ã»ããµæéãp_runtsk->leftotmã«æ ¼ç´
+ããï¼æ®ããã­ã»ããµæéã0ï¼ã¾ãã¯ããæªæºï¼ã«ãªã£ã¦ããå ´åã«ã¯ï¼
+p_runtsk->leftotmã«1ãæ ¼ç´ããï¼
+
+(b) dispatchããã®åºå£
+
+ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å¼åºãåã«ï¼p_runtsk->leftotmã0ã§ãªããã°ï¼æ®
+ããã­ã»ããµæéãp_runtsk->leftotmã¨ãã¦ãªã¼ãã©ã³ã¿ã¤ããåä½éå§ããï¼
+
+(c) å²è¾¼ã¿å¦çï¼CPUä¾å¤å¦çã®å
+¥å£
+
+ovrtimer_flagãtrueã§ããã°ï¼ãªã¼ãã©ã³ã¿ã¤ããåæ­¢ããï¼æ®ããã­ã»ããµ
+æéãp_runtsk->leftotmã«æ ¼ç´ããï¼æ®ããã­ã»ããµæéã0ï¼ã¾ãã¯ããæª
+æºï¼ã«ãªã£ã¦ããå ´åã«ã¯ï¼p_runtsk->leftotmã«1ãæ ¼ç´ããï¼
+
+ãã®å¦çã¯ï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ããã¹ã¦ç¦æ­¢ããç¶æ
+ã§è¡ãå¿
+è¦ãããï¼
+å²è¾¼ã¿ï¼CPUä¾å¤çºçç´å¾ã«ãã¹ã¦ã®å²è¾¼ã¿ãç¦æ­¢ãããªããã­ã»ããµã§ã¯ï¼å²
+è¾¼ã¿ãç¦æ­¢ããå¾ã«ãã®å¦çãè¡ãå¿
+è¦ãããï¼
+
+(d) å²è¾¼ã¿å¦çï¼CPUä¾å¤å¦çã®åºå£
+
+ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«æ»ãå ´åã«ï¼p_runtsk->leftotmã0ã§ãªããã°ï¼æ®ãã
+ã­ã»ããµæéãp_runtsk->leftotmã¨ãã¦ãªã¼ãã©ã³ã¿ã¤ããåä½éå§ããï¼
+
+(e) ã¿ã¹ã¯ã®çµäºæ
+
+ovrtimer_flagãtrueã§ããã°ï¼ã¾ãã¯ï¼p_runtsk->leftotmã0ã§ãªããã°ï¼ï¼
+ãªã¼ãã©ã³ã¿ã¤ããåæ­¢ãããï¼æ®ããã­ã»ããµæéãp_runtsk->leftotmã«æ ¼
+ç´ããå¿
+è¦ã¯ãªãï¼make_dormantã§0ãæ ¼ç´ãããï¼ï¼
+
+(f) ã¿ã¹ã¯ã®å®è¡éå§æ
+
+p_runtsk->leftotmã0ã§ãªããã°ï¼æ®ããã­ã»ããµæéãp_runtsk->leftotmã¨
+ãã¦ãªã¼ãã©ã³ã¿ã¤ããåä½éå§ããï¼
+
+âã¿ã¼ã²ããä¾å­é¨ã®ã¤ã³ã¿ãã§ã¼ã¹
+
+ãªã¼ãã©ã³ãã³ãã©æ©è½ã®ã¿ã¼ã²ããä¾å­é¨ã§ã¯ï¼ãªã¼ãã©ã³ãã³ãã©ç¨ã®ã¿
+ã¤ãï¼ä»¥ä¸ï¼ãªã¼ãã©ã³ã¿ã¤ãã¨å¼ã¶ï¼ãæä½ããããã®æ©è½ãæä¾ããï¼
+
+ã¾ãï¼æ¬¡ã®å®æ°ããã¯ã­å®ç¾©ããï¼
+
+(1) TMAX_OVRTIM
+
+ãã­ã»ããµæéã¨ãã¦ãªã¼ãã©ã³ãã³ãã©ç¨ã¿ã¤ãã«è¨­å®ã§ããæå¤§ã®å¤ï¼å
+ä½ã¯ãã¤ã¯ã­ç§ã¨ããï¼ã¿ã¼ã²ããä¾å­é¨ã§å®ç¾©ããªãå ´åã«ã¯ï¼kernel.hã§
+ULONG_MAXã«å®ç¾©ããï¼
+
+ã¾ãï¼æ¬¡ã®5ã¤ã®é¢æ°ãç¨æããï¼
+
+(1) void target_ovrtimer_initialize(intptr_t exinf)
+
+ãªã¼ãã©ã³ã¿ã¤ãã®åæåå¦çãè¡ãï¼ã¿ã¤ãã®åä½éå§ã¯è¡ããªãï¼
+
+ãã®é¢æ°ã¯ï¼target_timer.cfgä¸­ã«è¨è¿°ããéçAPIã«ããï¼åæåã«ã¼ãã³ã¨
+ãã¦ã«ã¼ãã«ã«ç»é²ãããã¨ãæ³å®ãã¦ããï¼
+
+(2) void target_ovrtimer_terminate(intptr_t exinf)
+
+ãªã¼ãã©ã³ã¿ã¤ãã®åæ­¢å¦çãè¡ãï¼
+
+ãã®é¢æ°ã¯ï¼target_timer.cfgä¸­ã«è¨è¿°ããéçAPIã«ããï¼çµäºå¦çã«ã¼ãã³
+ã¨ãã¦ã«ã¼ãã«ã«ç»é²ãããã¨ãæ³å®ãã¦ããï¼
+
+(3) void target_ovrtimer_start(OVRTIM ovrtim)
+
+ãªã¼ãã©ã³ã¿ã¤ããï¼ovrtimã§æå®ããæéãçµéãããå²è¾¼ã¿ãçºçããã
+ãã«è¨­å®ãï¼åä½éå§ããï¼ovrtimã®åä½ã¯ãã¤ã¯ã­ç§ã¨ããï¼
+
+(4) OVRTIM target_ovrtimer_stop(void)
+
+ãªã¼ãã©ã³ã¿ã¤ããåæ­¢ãï¼ã¿ã¤ãã®æ®ãæéãèª­ã¿åºãï¼ããæ®ãæéã
+0ï¼ã¾ãã¯ããæªæºï¼ã«ãªã£ã¦ããå ´åã«ã¯ï¼1ãè¿ãï¼ã¾ãï¼ãªã¼ãã©ã³ã¿ã¤
+ãããã®å²è¾¼ã¿ãã¯ãªã¢ããï¼
+
+(5) OVRTIM target_ovrtimer_get_current(void)
+
+ãªã¼ãã©ã³ã¿ã¤ãã®æ®ãæéãèª­ã¿åºãï¼ããæ®ãæéã0ï¼ã¾ãã¯ããæªæºï¼
+ã«ãªã£ã¦ããå ´åã«ã¯ï¼0ãè¿ãï¼ãªã¼ãã©ã³ã¿ã¤ãããã®å²è¾¼ã¿ã¯ã¯ãªã¢ããª
+ãï¼
+
+âæ®ããã­ã»ããµæéã®ä¿å­ï¼å¾©å¸°ã®å®è£
+ï¼ã¿ã¼ã²ããéä¾å­é¨ï¼
+
+åè¨ã®å¦çå
+å®¹ã®ä¸­ã§ï¼(a)ã¨(c)ã¯ï¼å¼åºãæ¡ä»¶ãéãã ãã§å¦çå
+å®¹ã¯åä¸
+ã§ããããï¼ãããå®ç¾ããé¢æ°ovrtimer_stopãã¿ã¼ã²ããéä¾å­é¨ã«è¨­ãï¼
+ã¿ã¼ã²ããä¾å­é¨ã®è©²å½ç®æããå¼ã³åºãããã«ããï¼
+
+----------------------------------------
+void
+ovrtimer_stop(void)
+{
+	if (ovrtimer_flag) {
+		assert(p_runtsk->leftotm > 0U);
+		p_runtsk->leftotm = target_ovrtimer_stop();
+		ovrtimer_flag = false;
+	}
+}
+----------------------------------------
+
+ã¾ã(b),(d),(f)ãï¼å¼åºãæ¡ä»¶ãéãã ãã§å¦çå
+å®¹ã¯åä¸ã§ããããï¼ãã
+ãå®ç¾ããé¢æ°ovrtimer_startãã¿ã¼ã²ããéä¾å­é¨ã«è¨­ãï¼ã¿ã¼ã²ããä¾å­
+é¨ã®è©²å½ç®æããå¼ã³åºãããã«ããï¼
+
+----------------------------------------
+void
+ovrtimer_start(void)
+{
+	if (p_runtsk->leftotm > 0U) {
+		target_ovrtimer_start(p_runtsk->leftotm);
+		ovrtimer_flag = true;
+	}
+}
+----------------------------------------
+
+(e)ã¯ï¼æ®ããã­ã»ããµæéãp_runtsk->leftotmã«æ ¼ç´ããå¿
+è¦ã¯ãªãç¹ã§
+(a),(c)ã¨å¦çå
+å®¹ãç°ãªããï¼p_runtsk->leftotmã¯make_dormantã§0ã«åæå
+ãããããï¼make_dormantãå¼ã³åºãåã§ããã°ï¼ovrtimer_stopãæµç¨ããã
+ã¨ãã§ããï¼ããã§ï¼ext_tskã«æ¬¡ã®ä¿®æ­£ãå ããï¼task_manage.cï¼ï¼
+
+----------------------------------------
+ER
+ext_tsk(void)
+{
+	...
+	(void) make_non_runnable(p_runtsk);
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|	ovrtimer_stop();
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+	make_dormant(p_runtsk);
+	...
+}
+----------------------------------------
+
+âæ®ããã­ã»ããµæéã®ä¿å­ï¼å¾©å¸°ã®å®è£
+ï¼ã¿ã¼ã²ããä¾å­é¨ï¼
+
+(a) dispatchã¸ã®å
+¥å£
+
+----------------------------------------
+void
+dispatch(void)
+{
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|	ovrtimer_stop();					/* ãªã¼ãã©ã³ã¿ã¤ãã®åæ­¢ */
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ã«ä¿å­ãã
+	...
+}
+----------------------------------------
+
+(b) dispatchããã®åºå£
+
+----------------------------------------
+void
+dispatch(void)
+{
+	...
+
+  dispatch_r:
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ããå¾©å¸°ãã
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|	ovrtimer_start();					/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+	calltex(); â¦ (*b)
+}
+----------------------------------------
+
+(c) å²è¾¼ã¿å¦çï¼CPUä¾å¤å¦çã®å
+¥å£
+
+å²è¾¼ã¿å¦çï¼CPUä¾å¤å¦çã®å
+¥å£ã¯æ¬¡ã®éãã«ä¿®æ­£ããï¼
+
+----------------------------------------
+void
+<å²è¾¼ã¿ã®åºå
+¥å£å¦ç>(void)
+{
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ã«ä¿å­ãã
+	if (ã¿ã¹ã¯ã³ã³ãã­ã¹ãã§å²è¾¼ã¿çºç) {
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|		ï¼å°ãªãã¨ãï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+ã«ãã
+|		ovrtimer_stop();				/* ãªã¼ãã©ã³ã¿ã¤ãã®åæ­¢ */
+|		ï¼å¿
+è¦ãªãï¼å
+ã®ç¶æ
+ã«æ»ã
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+		ã¹ã¿ãã¯ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã«åãæãï¼
+								éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã
+	}
+	...
+}
+----------------------------------------
+void
+<CPUä¾å¤ã®åºå
+¥å£å¦ç>(void)
+{
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ã«ä¿å­ãã
+	if (ã¿ã¹ã¯ã³ã³ãã­ã¹ãã§CPUä¾å¤çºç) {
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|		ï¼å°ãªãã¨ãï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+ã«ãã
+|		ovrtimer_stop();				/* ãªã¼ãã©ã³ã¿ã¤ãã®åæ­¢ */
+|		ï¼å¿
+è¦ãªãï¼å
+ã®ç¶æ
+ã«æ»ã
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+		ã¹ã¿ãã¯ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã«åãæãï¼
+								éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã
+	}
+	...
+}
+----------------------------------------
+
+(d) å²è¾¼ã¿å¦çï¼CPUä¾å¤å¦çã®åºå£
+
+å²è¾¼ã¿å¦çï¼CPUä¾å¤å¦çã®åºå£ã¯æ¬¡ã®éãã«ä¿®æ­£ããï¼
+
+----------------------------------------
+void
+<å²è¾¼ã¿ã®åºå
+¥å£å¦ç>(void)
+{
+	...
+
+			  ret_int_r:
+				ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ããå¾©å¸°ãã
+			}
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|			ovrtimer_start();			/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+			calltex(); â¦ (*b)
+		}
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|		else {
+|			ï¼å°ãªãã¨ãï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+ã«ãã
+|			ovrtimer_start();			/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+|		}
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+	}
+	...
+}
+----------------------------------------
+void
+<CPUä¾å¤ã®åºå
+¥å£å¦ç>(void)
+{
+	...
+
+			  ret_exc_r:
+				ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ããå¾©å¸°ãã
+			}
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|			ovrtimer_start();			/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+			calltex(); â¦ (*b)
+		}
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|		else {
+|			ï¼å°ãªãã¨ãï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+ã«ãã
+|			ovrtimer_start();			/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+|		}
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+	}
+	CPUä¾å¤å¦çããã®ãªã¿ã¼ã³ã§ï¼CPUã­ãã¯ç¶æ
+ï¼ã­ãã¯è§£é¤ç¶æ
+ã
+								CPUä¾å¤çºçæã®ç¶æ
+ã«æ»ãããã«æºåãã
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ããå¾©å¸°ãã
+	CPUä¾å¤å¦çããã®ãªã¿ã¼ã³
+}
+----------------------------------------
+
+(e) ã¿ã¹ã¯ã®çµäºæ
+
+ã¿ã¼ã²ããéä¾å­é¨ã®ext_tskã§å¯¾å¿ããï¼
+
+(f) ã¿ã¹ã¯ã®å®è¡éå§æ
+
+----------------------------------------
+void
+activate_context(TCB *p_tcb)
+{
+	...
+
+  start_r:
+|#ifdef TOPPERS_SUPPORT_OVRHDR
+|	ovrtimer_start();					/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+|#endif /* TOPPERS_SUPPORT_OVRHDR */
+	CPUã­ãã¯è§£é¤ç¶æ
+ã«ãã
+	èªã¿ã¹ã¯ï¼p_runtskï¼ã®èµ·åçªå°ãï¼æ¡å¼µæ
+å ±ããã©ã¡ã¼ã¿ã¨ãã¦å¼ã³åºã
+	ext_tskã«åå²ãã ... (*c)
+}
+----------------------------------------
+
+âãªã¼ãã©ã³ãã³ãã©ã®å¼åºãã®å®è£
+
+
+ãªã¼ãã©ã³ã¿ã¤ããæºäºãï¼å²è¾¼ã¿ãçºçããå ´åã«ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã®
+å²è¾¼ã¿ãã³ãã©ï¼ã¾ãã¯ï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ï¼ããï¼ã¿ã¼ã²ããéä¾å­
+é¨ã®call_ovrhdrãå¼ã³åºãï¼
+
+ããã§ï¼ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ãã³ãã©ã®èµ·åã¨ï¼sta_ovrï¼stp_ovrã®å¼åº
+ãã®ç«¶åã®åé¡ãããï¼å
+·ä½ä¾ã¨ãã¦ï¼ãªã¼ãã©ã³ã¿ã¤ããæºäºããç´å¾ã«ï¼
+ä»ã®é«åªå
+åº¦ã®å²è¾¼ã¿ãçºçãï¼ãã®å¦çä¸­ã§ãªã¼ãã©ã³ãã³ãã©ãååä½é
+å§ï¼æ®ããã­ã»ããµã¯æ´æ°ãããï¼ãããå ´åãåæ­¢ãããå ´åãåé¡ã«ãªãï¼
+ãã®å ´åï¼ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ãã³ãã©ã®ä¸­ã§ï¼ãªã¼ãã©ã³ãã³ãã©ãå¼
+ã³åºããªãããã«ãã¹ãã§ããï¼
+
+ã¿ã¼ã²ããéä¾å­é¨ã®call_ovrhdrã®å®è£
+ã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+void
+call_ovrhdr(void)
+{
+	assert(sense_context());
+	assert(!sense_lock());
+	assert(ovrinib.ovrhdr != NULL);
+
+	i_lock_cpu();
+	if (p_runtsk!= NULL && p_runtsk->leftotm == 1U) {
+		p_runtsk->leftotm = 0U;
+		i_unlock_cpu();
+
+		LOG_OVR_ENTER(p_runtsk);
+		((OVRHDR)(ovrinib.ovrhdr))(TSKID(p_runtsk), p_runtsk->p_tinib->exinf);
+		LOG_OVR_LEAVE(p_runtsk);
+	}
+	else {
+		/*
+		 *  ãã®ã«ã¼ãã³ãå¼ã³åºãããåã«ï¼ãªã¼ãã©ã³ãã³ãã©ã®èµ·åã
+		 *  ã­ã£ã³ã»ã«ãããå ´å
+		 */
+		i_unlock_cpu();
+	}
+}
+----------------------------------------
+
+p_runtskãNULLã®å ´åãèæ
+®ãã¦ããã®ã¯ï¼ã¹ããªã¢ã¹å²è¾¼ã¿ã«å¯¾ããã­ãã¹
+ãæ§ãç¢ºä¿ããããã§ããï¼
+
+ãªã¼ãã©ã³ãã³ãã©ã®å¼åºãå¾ã«ï¼å¼åºãåã®ç¶æ
+ï¼CPUã­ãã¯ï¼å²è¾¼ã¿åªå
+åº¦
+ãã¹ã¯ï¼ã«æ»ããªãã®ã¯ï¼ãã®ã«ã¼ãã³ããã®ãªã¿ã¼ã³å¾ã«ï¼å²è¾¼ã¿åºå£å¦ç
+ã§å
+ã®ç¶æ
+ã«æ»ãããã§ããï¼
+
+call_ovrhdrã¯ï¼å²è¾¼ã¿ãã³ãã©ããï¼ã¾ãã¯ï¼å²è¾¼ã¿ãã³ãã©ã¨ãã¦ï¼å¼ã³åº
+ãããããï¼ãã®ã«ã¼ãã³ã«æ¥ãã¾ã§ã«ï¼ovrtimer_stopãå¼ã°ãã¦ããï¼ããª
+ãã¡ï¼ãªã¼ãã©ã³ã¿ã¤ããåæ­¢ãã¦ããï¼ï¼
+
+å²è¾¼ã¿ãã³ãã©ã®è¨­å®ã¯ï¼ä»¥ä¸ã®ãããªéçAPIãï¼target_timer.hä¸­ã«è¨è¿°ã
+ããã¨ã§è¡ããã®ã¨ããï¼ã¿ã¼ã²ããã®äºæ
+ã§å¤æ´ãã¦ããï¼ï¼
+
+----------------------------------------
+#ifdef TOPPERS_SUPPORT_OVRHDR
+ATT_INI({ TA_NULL, 0, target_ovrtimer_initialize });
+ATT_TER({ TA_NULL, 0, target_ovrtimer_terminate });
+CFG_INT(INTNO_OVRTIMER, { TA_ENAINT | INTATR_OVRTIMER, INTPRI_OVRTIMER });
+DEF_INH(INHNO_OVRTIMER, { TA_NULL, target_ovrtimer_handler });
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+----------------------------------------
+
+ãããã®éçAPIä¸­ã®ï¼INHNO_OVRTIMERï¼INTNO_OVRTIMERï¼INTPRI_OVRTIMERï¼
+INTATR_OVRTIMERã®4ã¤ã®å®æ°ã¯ï¼target_timer.hä¸­ã§å®ç¾©ããï¼
+
+âãªã¼ããããã®ä½æ¸æ¹æ³
+
+ä»¥ä¸ã§èª¬æããæ¹æ³ã§ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã®ã¢ã»ã³ããªè¨èªã§è¨è¿°ãããã¨
+ãæ³å®ããã³ã¼ãããï¼ã¿ã¼ã²ããéä¾å­é¨ã®ovrtimer_startã¨
+ovrtimer_stopãå¼ã³åºãã¦ãããï¼ãããã®é¢æ°ã¯ç­ããã®ã§ï¼ã¢ã»ã³ããªè¨
+èªã®ä¸­ã«å±éããæ¹ãå¹çãããï¼ãããã®é¢æ°ãã¢ã»ã³ããªè¨èªã®ä¸­ã«å±é
+ããå ´åã«ã¯ï¼ããããï¼OMIT_OVRTIMER_STARTã¨OMIT_OVRTIMER_STOPããã¯ã­
+å®ç¾©ããï¼
+
+âãã«ããã­ã»ããµå¯¾å¿ã«ã¼ãã«ã¸ã®å¯¾å¿ã«é¢ããã¡ã¢
+
+ãã«ããã­ã»ããµå¯¾å¿ã«ã¼ãã«ã«ããã¦ï¼sta_ovrï¼ista_ovrï¼stp_ovrï¼
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+ãå¯¾è±¡ã«çºè¡ããå ´åã®å®è£
+ã¯å·¥å¤«ãè¦ããï¼
+
+åºæ¬çã«ã¯ï¼å¯¾è±¡ã¿ã¹ã¯ãå²ãä»ãããããã­ã»ããµã«å¯¾ãã¦ãã­ã»ããµéå²
+è¾¼ã¿ãããããã¨ã«ãã£ã¦ï¼å¯¾è±¡ã¿ã¹ã¯ã®ãªã¼ãã©ã³ãã³ãã©ã®åä½ãéå§ï¼
+åæ­¢ããããã¨ãå¿
+è¦ã§ãããï¼å²è¾¼ã¿ã®å
+¥å£å¦çã§å¼ã³åºãovrtimer_stopã§ï¼
+ovrtimer_flagã¨(p_runtsk->leftotm > 0U)ãä¸è²«ããªããªãããï¼å·¥å¤«ãè¦ã
+ããã®ã¨æãããï¼
+
+ä»¥ä¸
Index: rtos_arduino/trunk/asp_1.9.2/doc/porting.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/doc/porting.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/doc/porting.txt	(revision 136)
@@ -0,0 +1,4995 @@
+
+		TOPPERS/ASPã«ã¼ãã«
+		ã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ã
+
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 1.9.2
+		æçµæ´æ°: 2014å¹´11æ17æ¥
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASPã«ã¼ãã«ãï¼æªãµãã¼ãã®ã¿ã¼ã²ããã·ã¹ã
+ã ã«ãã¼ãã£ã³ã°ããããã«å¿
+è¦ã¨ãªãã¿ã¼ã²ããä¾å­é¨ã®å®è£
+æ¹æ³ãèª¬æã
+ããã®ã§ããï¼
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
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+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ ã®è²¬ä»»ãè² ããªãï¼
+ 
+ $Id: porting.txt 2676 2015-05-26 15:16:46Z ertl-hiro $
+----------------------------------------------------------------------
+
+âç®æ¬¡
+
+ï¼ï¼å
+±éäºé 
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+	1.1 ã¿ã¼ã²ããä¾å­é¨ã®æ§æ
+	1.2 ååã®è¡çªã®é²æ­¢
+	1.3 å¤éã¤ã³ã¯ã«ã¼ãã®é²æ­¢
+	1.4 ã¢ã»ã³ããªè¨èªã¨ã®ããããã¡ã¤ã«ã®å
+±ç¨ 
+	1.5 ã¤ã³ã¯ã«ã¼ãè¨è¿°ã®æ¹æ³
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+¥å¦çã®å®ç¾ã«é¢ããå¶ç´
+ï¼ï¼ã·ã¹ãã æ§ç¯ç°å¢ã®ã¿ã¼ã²ããä¾å­é¨
+	2.1 ã¿ã¼ã²ããç¥ç§°ã¨ã¿ã¼ã²ããä¾å­é¨ã®ãã£ã¬ã¯ããª
+	2.2 Makefileã®ã¿ã¼ã²ããä¾å­é¨
+	2.3 éçºç°å¢åã¨ã³ãã³ãåã®è¨­å®
+	2.4 ã³ã³ãã¤ã«ãªãã·ã§ã³ã¨ãªãã¸ã§ã¯ããã¡ã¤ã«ã®è¨­å®
+	2.5 ãªãã»ãããã¡ã¤ã«ã®çææ¹æ³
+		2.5.1 ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãç¨ããæ¹æ³
+		2.5.2 makeoffset.cã¨genoffsetãç¨ããæ¹æ³
+	2.6 ãªã³ã¯æ¹æ³ã®è¨­å®
+	2.7 ä¾å­é¢ä¿ã®å®ç¾©
+	2.8 ãã®ä»ã®è¨­å®
+ï¼ï¼TOPPERSå
+±éå®ç¾©ã®ã¿ã¼ã²ããä¾å­é¨
+	3.1 ã¿ã¼ã²ããè­å¥ãã¯ã­
+	3.2 æ´æ°åã®æå¤§å¤ã»æå°å¤ã»ãããæ°
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+	3.5 ã³ã³ãã¤ã©ã®æ¡å¼µæ©è½ã®ããã®ãã¯ã­å®ç¾©
+	3.6 æ¨æºçãªå®ç¾©ã®ä¸æ¸ã
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+ï¼ï¼ã·ã¹ãã ã¤ã³ã¿ãã§ã¼ã¹ã¬ã¤ã¤ï¼SILï¼ã®ã¿ã¼ã²ããä¾å­é¨
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+ã®ç®¡ç
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+ã¡
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+	4.5 I/Oç©ºéã¢ã¯ã»ã¹é¢æ°
+ï¼ï¼ã«ã¼ãã«APIã®ã¿ã¼ã²ããä¾å­é¨
+	5.1 ã¿ã¼ã²ããå®ç¾©ã§ãµãã¼ãããæ©è½
+	5.2 å²è¾¼ã¿åªå
+åº¦ã®ç¯å²
+	5.3 ã¿ã¤ã ãã£ãã¯ã®å®ç¾©
+	5.4 ã¡ã¢ãªé åç¢ºä¿ã®ããã®åå®ç¾©
+	5.5 ããããã¿ã¼ã³ã®ãããæ°
+	5.6 ã¡ã¢ãªé åç¢ºä¿ã®ããã®ãã¯ã­
+	5.7 ãªã¼ãã©ã³ãã³ãã©æ©è½æ¡å¼µã®ããã®å®ç¾©ï¼ãªãã·ã§ã³ï¼
+ï¼ï¼ã«ã¼ãã«å®è£
+ã®ã¿ã¼ã²ããä¾å­é¨
+	6.1 ã«ã¼ãã«å®è£
+ã®ã¿ã¼ã²ããä¾å­é¨ã®å
+±éäºé 
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+		6.1.1 ã«ã¼ãã«å®è£
+ã®ã¿ã¼ã²ããä¾å­é¨ã®æ§æè¦ç´ 
+		6.1.2 ã¿ã¼ã²ããä¾å­é¨ã®é¢æ°ã®å½åè¦å
+	6.2 ãã¬ã¼ã¹ã­ã°æ©è½ã¸ã®å¯¾å¿
+	6.3 ã·ã¹ãã ç¶æ
+ã®ç®¡ç
+		6.3.1 å
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+		6.3.2 ã³ã³ãã­ã¹ãã®ç®¡ç
+		6.3.3 CPUã­ãã¯ç¶æ
+ã®ç®¡ç
+	6.4 å²è¾¼ã¿ã«é¢é£ããã·ã¹ãã ç¶æ
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+		6.4.1 å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®ç®¡ç
+		6.4.2 å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°ã®ç®¡ç
+		6.4.3 å²è¾¼ã¿è¦æ±ã®ã¯ãªã¢
+		6.4.4 å²è¾¼ã¿è¦æ±ã®ãã­ã¼ã
+		6.4.5 å²è¾¼ã¿ãã³ãã©ã®å
+é ­å¦çã¨æ«å°¾å¦ç
+	6.5 ã¿ã¹ã¯ãã£ã¹ãããã£
+		6.5.1 ã¿ã¹ã¯ã³ã³ãã­ã¹ããã­ãã¯ã¨ã¿ã¹ã¯åæåã³ã³ãã­ã¹ããã­ãã¯
+		6.5.2 ãã£ã¹ãããã£æ¬ä½
+		6.5.3 ã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®ãã£ã¹ããã
+		6.5.4 ãã£ã¹ãããã£ã®åä½éå§
+		6.5.5 ç¾å¨ã®ã³ã³ãã­ã¹ããæ¨ã¦ã¦ãã£ã¹ããã
+		6.5.6 ã¿ã¹ã¯ã®èµ·åå¦ç
+	6.6 å²è¾¼ã¿ãã³ãã©
+		6.6.1 å²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦ç
+		6.6.2 å²è¾¼ã¿ãã³ãã©æ¯ã®åºå
+¥å£å¦çã®çæ
+		6.6.3 å²è¾¼ã¿ãã³ãã©ã®è¨­å®
+		6.6.4 å²è¾¼ã¿è¦æ±ã©ã¤ã³ã®å±æ§ã®è¨­å®
+		6.6.5 å²è¾¼ã¿ç®¡çæ©è½ã®åæåå¦çã®å¤æ´
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+		6.6.7 ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿
+		6.6.8 å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®çæ
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+ã®åç
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+		6.7.1 CPUä¾å¤ãã³ãã©ã®åºå
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+¥å£å¦çã®çæ
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+		6.7.4 CPUä¾å¤ç®¡çæ©è½ã®åæåå¦çã®å¤æ´
+		6.7.5 ããã©ã«ãã®CPUä¾å¤ãã³ãã©
+		6.7.6 CPUä¾å¤çºçæã®ã·ã¹ãã ç¶æ
+ã®åç
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+	6.9 ã«ã¼ãã«å
+é¨ã®ãã¥ã¼ãã³ã°
+		6.9.1 ãããããããµã¼ã
+		6.9.2 ããããã£ã¼ã«ã
+	6.10 ã«ã¼ãã«å®è£
+ã«é¢ãããã®ä»ã®å®ç¾©
+		6.10.1 ãªãã¸ã§ã¯ãå±æ§ã®æ¡å¼µ
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+		6.10.3 éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é å
+		6.10.4 ç©ºã©ãã«ã®å®ç¾©
+	6.11 ãã¬ã¼ã¹ã­ã°æ©è½ã«é¢ããè¨­å®
+		6.11.1 åå¾ã§ãããã¬ã¼ã¹ã­ã°ã®ç¨®é¡ã¨ãã¯ã­
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+	6.12 ã«ã¼ãã«å®è£
+ã®ã¿ã¼ã²ããä¾å­é¨ã®ããã®ãªãã¼ã è¨è¿°
+	6.13 ã¿ã¤ããã©ã¤ã
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+		6.13.2 ã¿ã¤ãã®åæåã»çµäºå¦çã»å²è¾¼ã¿å¦ç
+		6.13.3 æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ã®åç
+§ã®ããã®æ©è½
+	6.14 ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ãï¼ãªãã·ã§ã³ï¼
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+		6.14.2 ãªã¼ãã©ã³ã¿ã¤ãã®æä½ã¨å²è¾¼ã¿å¦ç
+	6.15 åçã¡ã¢ãªç®¡çï¼ãªãã·ã§ã³ï¼
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+ï¼ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿è¨­å®ãã¡ã¤ã«ã®ã¿ã¼ã²ããä¾å­é¨
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+		7.2.2 ã¿ã¼ã²ããéä¾å­é¨ã§å®ç¾©ãããå¤æ°
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+		7.3.2 ã¿ã¼ã²ããä¾å­é¨ã§è¡ãã¹ãã¨ã©ã¼ãã§ãã¯
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+	8.2 ã­ã°ã¿ã¹ã¯ã®ã¿ã¼ã²ããä¾å­å®ç¾©
+	8.3 ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®ã¿ã¼ã²ããä¾å­é¨
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+	8.6 å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ã®ã¿ã¼ã²ããä¾å­å®ç¾©
+ï¼ï¼ãã®ä»
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+ï¼ï¼ï¼ãªãã¡ã¬ã³ã¹
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+ãªãã¸ã§ã¯ããã¡ã¤ã«ã®ãªã¹ãï¼ããããã³ã³ãã¤ã«ããéã«é©ç¨ããã³ã³ã
+ã¤ã«ãªãã·ã§ã³ï¼ãã®æ§æã«å¿
+è¦ãªã©ã¤ãã©ãªãªã³ã¯æå®ãè¿½å ããå ´åã«ã¯ï¼
+ä¸ã«ç¤ºããå¤æ°ã«å®ç¾©ããï¼
+
+(2-4-11) KERNEL_DIR			ã«ã¼ãã«ã®ã½ã¼ã¹ãç½®ããããã£ã¬ã¯ããª
+(2-4-12) KERNEL_ASMOBJS		ã¢ã»ã³ããªè¨èªã§è¨è¿°ãããã«ã¼ãã«ã®ãªãã¸ã§ã¯ã
+(2-4-13) KERNEL_COBJS		Cè¨èªã§è¨è¿°ãããã«ã¼ãã«ã®ãªãã¸ã§ã¯ã
+(2-4-14) KERNEL_CFLAGS		ã«ã¼ãã«ã«å¯¾ããã³ã³ãã¤ã«ãªãã·ã§ã³
+
+ã¿ã¼ã²ããã«ä¾å­ãã¦ï¼ã«ã¼ãã«ã®ã½ã¼ã¹ãç½®ããããã£ã¬ã¯ããªï¼ã«ã¼ãã«
+ãæ§æãããªãã¸ã§ã¯ããã¡ã¤ã«ã®ãªã¹ãï¼ããããã³ã³ãã¤ã«ããéã«é©ç¨
+ããã³ã³ãã¤ã«ãªãã·ã§ã³ãè¿½å ããå ´åã«ã¯ï¼ä¸ã«ç¤ºããå¤æ°ã«å®ç¾©ããï¼
+
+ã»ã¨ãã©ã®å ´åã«ï¼ã¿ã¼ã²ããä¾å­é¨ãã£ã¬ã¯ããªã®Makefile.targetã«ã¯ï¼ä»¥
+ä¸ã®è¨è¿°ãå«ããå¿
+è¦ãããï¼
+
+----------------------------------------
+KERNEL_DIR := $(KERNEL_DIR) $(TARGETDIR)
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS) target_support.o
+KERNEL_COBJS := $(KERNEL_COBJS) target_config.o target_timer.o
+----------------------------------------
+
+(2-4-15) CFG_TABS			ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«å¯¾ãããªãã·ã§ã³
+
+ã¿ã¼ã²ããã«ä¾å­ãã¦ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«å¯¾ãããªãã·ã§ã³ãè¿½å ããå ´
+åã«ã¯ï¼ä¸ã«ç¤ºããå¤æ°ã«å®ç¾©ããï¼å
+·ä½çã«ã¯ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®å¤å
+å¾ã·ã³ãã«ãã¼ãã«ã®ã¿ã¼ã²ããä¾å­é¨ï¼target_def.csvï¼ãããå ´åã«ã¯ï¼
+ãããæå®ãããªãã·ã§ã³ãè¿½å ããå¿
+è¦ãããï¼
+
+ã»ã¨ãã©ã®å ´åã«ï¼ã¿ã¼ã²ããä¾å­é¨ãã£ã¬ã¯ããªã®Makefile.targetã«ã¯ï¼ä»¥
+ä¸ã®è¨è¿°ãå«ããå¿
+è¦ãããï¼
+
+----------------------------------------
+CFG_TABS := $(CFG_TABS) --cfg1-def-table $(TARGETDIR)/target_def.csv
+----------------------------------------
+
+(2-4-16) CFG1_OUT_LDFLAGS	cfg1_out.cã«å¯¾ãããªã³ã¯ãªãã·ã§ã³
+
+ã¿ã¼ã²ããã«ä¾å­ãã¦ï¼cfg1_out.cããªã³ã¯ããéã«é©ç¨ãããªãã·ã§ã³ãè¿½
+å ããå ´åã«ã¯ï¼ä¸ã«ç¤ºããå¤æ°ã«å®ç¾©ããï¼
+
+ãªãï¼LDFLAGSã¯ï¼cfg1_out.cããªã³ã¯ããéã«ã¯é©ç¨ãããªãããï¼LDFLAGS
+ã«å®ç¾©ãããªãã·ã§ã³ã§ï¼cfg1_out.cããªã³ã¯ããéã«ãå¿
+è¦ãªãã®ã¯ï¼
+CFG1_OUT_LDFLAGSã«ãå®ç¾©ããå¿
+è¦ãããï¼
+
+(2-4-17) CFG_ASMOBJS		ã¢ã»ã³ããªè¨èªã§è¨è¿°ãããã·ã¹ãã ã³ã³ãã£
+							ã®ã¥ã¬ã¼ã·ã§ã³ã®ããã®ãªãã¸ã§ã¯ã
+(2-4-18) CFG_COBJS			Cè¨èªã§è¨è¿°ãããã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼
+							ã·ã§ã³ã®ããã®ãªãã¸ã§ã¯ã
+
+ã¿ã¼ã²ããã«ä¾å­ãã¦ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã®ããã®ãªãã¸ã§ã¯
+ããã¡ã¤ã«ãï¼kernel_cfg.oä»¥å¤ã«ï¼è¿½å ããå ´åã«ã¯ï¼ä¸ã«ç¤ºããå¤æ°ã«å®
+ç¾©ããï¼ãã®å ´åï¼è¿½å ãããªãã¸ã§ã¯ããã¡ã¤ã«ã®ä½æã«ã¼ã«ï¼ã³ã³ãã¤ã«ï¼
+ã¢ã»ã³ãã«ã«ã¼ã«ã¨ä¾å­é¢ä¿ä½æã«ã¼ã«ï¼ãï¼Makefileã®ã¿ã¼ã²ããä¾å­é¨ã«
+è¨è¿°ããå¿
+è¦ãããï¼
+
+(2-4-19) CFG2_OUT_SRCS
+
+ã¿ã¼ã²ããã«ä¾å­ãã¦ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ãã¹2ã§kernel_cfg.cã¨
+kernel_cfg.hä»¥å¤ã®ãã¡ã¤ã«ãçæããå ´åã«ã¯ï¼ä¸ã«ç¤ºããå¤æ°ã«å®ç¾©ããï¼
+
+(2-4-20) OMIT_WARNING_ALL
+(2-4-21) OMIT_OPTIMIZATION
+
+ãµã³ãã«ã®Makefileã§ã¯ï¼ã³ã³ãã¤ã©ã«å¯¾ãããªãã·ã§ã³ã«ã-Wall -g -O2ã
+ãè¿½å ããï¼-Wallãè¿½å ããããªãå ´åã«ã¯ï¼Makefileã®ã¿ã¼ã²ããä¾å­é¨ã§
+OMIT_WARNING_ALLã"true"ã«å®ç¾©ããï¼-O2ãè¿½å ããããªãå ´åã«ã¯ï¼
+Makefileã®ã¿ã¼ã²ããä¾å­é¨ã§OMIT_OPTIMIZATIONã"true"ã«å®ç¾©ããï¼
+
+2.5 ãªãã»ãããã¡ã¤ã«ã®çææ¹æ³
+
+ã¢ã»ã³ããªè¨èªã§è¨è¿°ããããã­ã°ã©ã ããï¼Cè¨èªã®æ§é ä½ã«ã¢ã¯ã»ã¹ããå ´
+åã«ã¯ï¼æ§é ä½ã®åãã£ã¼ã«ãã®ãªãã»ããå¤ãåç
+§ãããã¨ãå¿
+è¦ã§ããï¼
+ASPã«ã¼ãã«ã§ã¯ï¼å¿
+è¦ãªãªãã»ããå¤ãæ±ãã¦ãã¡ã¤ã«ï¼æ¨æºã§ã¯offset.hï¼
+ã«çæããããã®ä»çµã¿ãç¨æãã¦ããï¼
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+ãã®ä»çµã¿ãç¨ãããã¨ã§ï¼ä¾ãã°ï¼TCBä¸­ã®texptnãã£ã¼ã«ãã®ãªãã»ããå¤
+ãTCB_texptnã«ãã¯ã­å®ç¾©ãããã¨ãï¼TCBä¸­ã®ã¿ã¹ã¯ã³ã³ãã­ã¹ããã­ãã¯
+ï¼tskctxbï¼ã«å«ã¾ããpcãã£ã¼ã«ãã®ãªãã»ããå¤ãTCB_pcã«ãã¯ã­å®ç¾©ãã
+ãã¨ãã§ããï¼ã¾ãï¼TCBä¸­ã®enatexãã£ã¼ã«ãã®ãªãã»ããå¤ï¼ãããä½ç½®ï¼
+ããããã¹ã¯ãï¼ããããTCB_enatexï¼TCB_enatex_bitï¼TCB_enatex_maskã«ã
+ã¯ã­å®ç¾©ãããã¨ãã§ããï¼
+
+offset.hãçæããããã®ä»çµã¿ã¨ãã¦ï¼ç¾æç¹ã§ã¯ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã
+ç¨ããæ¹æ³ã¨ï¼makeoffset.cã¨genoffsetãç¨ããæ¹æ³ãç¨æãã¦ããï¼å¾è
+ã®
+æ¹æ³ã¯ï¼GNUéçºç°å¢ã«ããå¯¾å¿ãã¦ããªããã¨ããï¼å°æ¥ã®ãã¼ã¸ã§ã³ã§ã¯ï¼
+å¾è
+ã®æ¹æ³ã®ãµãã¼ãããããè¨ç»ã§ããï¼æ°ãã«ãã¼ãã£ã³ã°ããå ´åã«ã¯ï¼
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+ã®æ¹æ³ãç¨ãããã¨ãæ¨å¥¨ããï¼
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+ãããã®ä»çµã¿ã§ãªãã»ãããã¡ã¤ã«ãçæã§ããªãæã«ã¯ï¼offset.hãã¿ã¼
+ã²ããä¾å­é¨ã§ç¨æãï¼Makefileã®ã¿ã¼ã²ããä¾å­é¨ã§OMIT_MAKEOFFSETã
+"true"ã«å®ç¾©ããï¼
+
+æ¡å¼µããã±ã¼ã¸ã®ä¸­ã«ã¯ï¼TCBã«ãã£ã¼ã«ããè¿½å ãããã®ãããããï¼TCBä¸­
+ã®ãã£ã¼ã«ãã®ãªãã»ããå¤ã¯å¤åããï¼offset.hãçæããå ´åã§ãï¼ã¿ã¼
+ã²ããä¾å­é¨ã§ç¨æããå ´åã§ãï¼æ¡å¼µããã±ã¼ã¸ã«å¯¾å¿ããããã«ã¯ï¼ãã®
+ãã¨ãèæ
+®ããå¿
+è¦ãããï¼
+
+2.5.1 ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãç¨ããæ¹æ³
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ãã¹1ã§çæããcfg1_out.cãã³ã³ãã¤ã«ãã¦çæãããª
+ãã¸ã§ã¯ããã¡ã¤ã«ããï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«ãã£ã¦offset.hãçæããæ¹
+æ³ã§ããï¼ãã®æ¹æ³ãç¨ããããã«ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã§ãªãã»ãããã¡ã¤
+ã«çæç¨ãã³ãã¬ã¼ããã¡ã¤ã«ãç¨æãï¼target_cfg1_out.hï¼ã¾ãã¯ï¼ããã
+ãã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ã¨target_def.csvï¼ã¾ãã¯ï¼åç­ã®å½¹å²ãæ
+ã¤ãã¡ã¤ã«ï¼ã«è¨è¿°ãè¿½å ããå¿
+è¦ãããï¼ãªãï¼ãããã®ãã¡ã¤ã«ãæ°ãã«
+ç¨æããéãä¿®æ­£ããéã«ã¯ï¼offset.hã«å¦¥å½ãªå®ç¾©ãçæããã¦ãããã¨ã
+ç¢ºèªãã¹ãã§ããï¼
+
+ãªãã»ãããã¡ã¤ã«çæç¨ãã³ãã¬ã¼ããã¡ã¤ã«ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã§ï¼
+target_offset.tfï¼ã¾ãã¯ï¼ãã­ã»ããµä¾å­é¨ããããä¾å­é¨ã§ç¨æãããã
+ã«ä»£ãããã¡ã¤ã«ï¼ã«ç¨æããï¼ã¾ãï¼Makefileã®ã¿ã¼ã²ããä¾å­é¨ã§ï¼æ¬¡ã®
+ä¾ã®ããã«ï¼OFFSET_TFã«ãªãã»ãããã¡ã¤ã«çæç¨ãã³ãã¬ã¼ããã¡ã¤ã«ã®ãã¡
+ã¤ã«åãå®ç¾©ããï¼
+
+----------------------------------------
+# ãªãã»ãããã¡ã¤ã«çæã®ããã®å®ç¾©
+OFFSET_TF = $(TARGETDIR)/target_offset.tf
+----------------------------------------
+
+ãªãã»ãããã¡ã¤ã«çæç¨ãã³ãã¬ã¼ããã¡ã¤ã«ã«ã¯ï¼ä»¥ä¸ã®å
+å®¹ãè¨è¿°ããï¼
+
+(1) æ¨æºãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ã
+
+ãªãã»ãããã¡ã¤ã«çæç¨ã®æ¨æºãã³ãã¬ã¼ããã¡ã¤ã«ï¼kernel/genoffset.tfï¼
+ãã¤ã³ã¯ã«ã¼ãããï¼æ¨æºãã³ãã¬ã¼ããã¡ã¤ã«ã«ã¯ï¼ä»¥ä¸ã§ç¨ããDEFINEé¢
+æ°ãDEFINE_BITé¢æ°ã®å®ç¾©ãªã©ãå«ã¾ãã¦ããï¼
+
+----------------------------------------
+$ æ¨æºãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ã
+$INCLUDE "kernel/genoffset.tf"$
+----------------------------------------
+
+(2) ãªãã»ããå¤ã®ãã¯ã­å®ç¾©ã®çæ
+
+DEFINEé¢æ°ãç¨ãã¦ï¼ãªãã»ããå¤ã®ãã¯ã­å®ç¾©ãçæããï¼ä¾ãã°ï¼TCBä¸­ã®
+ã¿ã¹ã¯ã³ã³ãã­ã¹ããã­ãã¯ï¼tskctxbï¼ã«å«ã¾ããpcãã£ã¼ã«ãã®ãªãã»ãã
+å¤ãï¼TCB_pcã«ãã¯ã­å®ç¾©ããå ´åã«ã¯ï¼æ¬¡ã®ããã«è¨è¿°ããï¼
+
+----------------------------------------
+$ ãªãã»ããå¤ã®ãã¯ã­å®ç¾©ã®çæ
+$DEFINE("TCB_pc", offsetof_TCB_pc)$
+----------------------------------------
+
+ããã§ï¼DEFINEé¢æ°ã®ç¬¬1ãã©ã¡ã¼ã¿ã¯ãã¯ã­å®ç¾©ããã·ã³ãã«ï¼ç¬¬2ãã©ã¡ã¼
+ã¿ã¯ï¼ãªãã»ããå¤ãä¿æããã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®å¤æ°ã§ããï¼
+
+ã¾ãï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãï¼ãªãã»ããå¤ãä¿æããå¤æ°ï¼ä¸ã®ä¾ã§ã¯
+offsetof_TCB_pcï¼ã«å¤ãè¨­å®ããããã«ï¼target_def.csvï¼ã¾ãã¯ï¼åç­ã®å½¹
+å²ãæã¤ãã¡ã¤ã«ï¼ã«æ¬¡ã®ä¾ã®ãããªè¡ãè¿½å ããï¼
+
+----------------------------------------
+offsetof_TCB_pc,"offsetof(TCB,tskctxb.pc)"
+----------------------------------------
+
+ãã ãï¼åãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®ã¿ã¼ã²ããéä¾å­ã®ãã£ã¼ã«ãã®
+ãªãã»ããå¤ãåå¾ããããã®è¨è¿°ã¯ï¼kernel/kernel_def.csvã«å«ã¾ãã¦ããï¼
+kernel/kernel_def.csvã«å«ã¾ãã¦ããè¨è¿°ã¯ï¼target_def.csvï¼ã¾ãã¯ï¼åç­
+ã®å½¹å²ãæã¤ãã¡ã¤ã«ï¼ã«è¿½å ããå¿
+è¦ã¯ãªãï¼
+
+(3) ããããªãã»ããå¤ç­ã®ãã¯ã­å®ç¾©ã®çæ
+
+DEFINE_BITé¢æ°ãç¨ãã¦ï¼ãããã®ãªãã»ããå¤ï¼ãããä½ç½®ï¼ããããã¹ã¯
+ã®ãã¯ã­å®ç¾©ãçæããï¼ä¾ãã°ï¼TCBä¸­ã®enatexãã£ã¼ã«ãã®ãªãã»ããå¤ï¼
+ãããä½ç½®ï¼ããããã¹ã¯ãï¼ããããTCB_enatexï¼TCB_enatex_bitï¼
+TCB_enatex_maskã«ãã¯ã­å®ç¾©ããå ´åã«ã¯ï¼æ¬¡ã®ããã«è¨è¿°ããï¼
+
+----------------------------------------
+$DEFINE_BIT("TCB_enatex", sizeof_TCB, "B")$
+----------------------------------------
+
+ããã§ï¼DEFINE_BITé¢æ°ã®ç¬¬1ãã©ã¡ã¼ã¿ã¯ãã¯ã­å®ç¾©ããã·ã³ãã«ï¼ã®å
+é ­é¨
+åï¼ï¼ç¬¬2ãã©ã¡ã¼ã¿ã¯æ§é ä½ã®ãµã¤ãºã§ããï¼ç¬¬3ãã©ã¡ã¼ã¿ã«ã¯ï¼ãããã®
+ãªãã»ããï¼ãããä½ç½®ï¼ããããã¹ã¯ãï¼8ãããåä½ï¼ãã¤ãåä½ï¼ã§æ±ã
+ãå ´åã«ã¯"B"ãï¼16ãããåä½ã§æ±ããå ´åã«ã¯"H"ãï¼32ãããåä½ã§æ±ã
+ãå ´åã«ã¯"W"ãæå®ããï¼ãªãï¼ãããä½ç½®ã¯ï¼LSBã0ã¨ããå¤ï¼ããããªã
+ã«ã¨ã³ãã£ã¢ã³ãæ³å®ï¼ãæ±ããï¼
+
+ã¾ãï¼target_cfg1_out.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ã«ï¼
+ããããªãã»ããå¤ç­ãæ±ããããã®æ§é ä½ã®å¤æ°å®ç¾©ãè¿½å ããï¼ãã®æ§é 
+ä½ã®å¤æ°ã¯ï¼åç§°ããã¯ã­å®ç¾©ããã·ã³ãã«ï¼DEFINE_BITé¢æ°ã®ç¬¬1ãã©ã¡ã¼ã¿ï¼
+ã¨ãï¼å¯¾è±¡ã®ãããã®ã¿ã1ã§ï¼ä»ã®ãã¹ã¦ã®ãããã0ã«ãªãããã«åæåã
+ãï¼ã¾ãï¼constä¿®é£¾å­ãä»å ããï¼ä¾ãã°ï¼TCBä¸­ã®enatexãã£ã¼ã«ãã®ãã
+ããªãã»ããå¤ç­ãæ±ããå ´åã«ã¯ï¼æ¬¡ã®ãããªå®ç¾©ãè¿½å ããï¼tskctxbã®å
+æå¤ã¯ï¼ã¿ã¼ã²ããä¾å­ãªã®ã§æ³¨æãããã¨ï¼ï¼
+
+----------------------------------------
+const TCB	TCB_enatex = {
+	{ NULL, NULL },			/* task_queue */
+	NULL,					/* p_tinib */
+	0U,						/* tstat */
+#ifdef TOPPERS_SUPPORT_MUTEX
+	0U,						/* bpriority */
+#endif /* TOPPERS_SUPPORT_MUTEX */
+	0U,						/* priority */
+	false,					/* acqeue */
+	false,					/* wupque */
+	true,					/* enatex */
+	0U,						/* texptn */
+	NULL,					/* p_winifo */
+#ifdef TOPPERS_SUPPORT_MUTEX
+	{ NULL, NULL },			/* mutex_queue */
+#endif /* TOPPERS_SUPPORT_MUTEX */
+#ifdef TOPPERS_SUPPORT_OVRHDR
+	0U,						/* leftotm */
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+	{ NULL, NULL }			/* tskctxb */
+};
+----------------------------------------
+
+ããã«ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãï¼æ§é ä½ã®ãµã¤ãºï¼ä¸ã®ä¾ã§ã¯sizeof_TCBï¼ã«
+å¤ãè¨­å®ããããã«ï¼target_def.csvï¼ã¾ãã¯ï¼åç­ã®å½¹å²ãæã¤ãã¡ã¤ã«ï¼
+ã«æ¬¡ã®ä¾ã®ãããªè¡ãè¿½å ããï¼
+
+----------------------------------------
+sizeof_TCB,sizeof(TCB)
+----------------------------------------
+
+ãã ãï¼åè¿°ããéãï¼kernel/kernel_def.csvã«å«ã¾ãã¦ããè¨è¿°ã¯ï¼
+target_def.csvï¼ã¾ãã¯ï¼åç­ã®å½¹å²ãæã¤ãã¡ã¤ã«ï¼ã«è¿½å ããå¿
+è¦ã¯ãªãï¼
+
+æå¾ã«ï¼target_cfg1_out.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼
+ã«ï¼offset.hãçæããä»çµã¿ãæ­£ããåä½ãã¦ãããã¨ãç¢ºèªããããã®æ¬¡
+ã®è¨è¿°ãè¿½å ããï¼
+
+----------------------------------------
+const uint8_t	MAGIC_1 = 0x12;
+const uint16_t	MAGIC_2 = 0x1234;
+const uint32_t	MAGIC_4 = 0x12345678;
+----------------------------------------
+
+2.5.2 makeoffset.cã¨genoffsetãç¨ããæ¹æ³
+
+makeoffset.cã¯ï¼ã©ã®ãªãã»ããå¤ãoffset.hã«çæããããæå®ãããã¡ã¤
+ã«ã§ï¼ã¿ã¼ã²ããä¾å­é¨ã§ç¨æããï¼genoffsetã¯ï¼makeoffset.cãã³ã³ãã¤ã«
+ãã¦å¾ãããã¢ã»ã³ããªã½ã¼ã¹ãã¡ã¤ã«ããï¼offset.hãçæããã¹ã¯ãªãã
+ã§ããï¼genoffsetã¯ï¼GNUéçºç°å¢ã«ã®ã¿å¯¾å¿ãã¦ããï¼
+
+makeoffset.cãè¨è¿°ããå ´åã«ã¯ï¼æ¢å­ã®ã¿ã¼ã²ããä¾å­é¨ã«å«ã¾ãã
+makeoffset.cãä¿®æ­£ããã®ãè¿éã§ããï¼æ¨æºçãªmakeoffset.cã¯ï¼ä»¥ä¸ã®6ã¤
+ã®é¨åã§æ§æããã¦ããï¼ãªãï¼makeoffset.cãæ°ãã«è¨è¿°ããéã«ã¯ï¼
+offset.hã«å¦¥å½ãªå®ç¾©ãçæããã¦ãããã¨ãç¢ºèªãã¹ãã§ããï¼
+
+(1) å¿
+è¦ãªãã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ã
+
+ãªãã»ããå¤ãæ±ããããã£ã¼ã«ããå«ãæ§é ä½ãå®ç¾©ããããããã¡ã¤ã«ã
+ã¤ã³ã¯ã«ã¼ãããï¼TCBä¸­ã®ãã£ã¼ã«ãã®ãªãã»ããå¤ãæ±ãããå ´åã«ã¯ï¼ä»¥
+ä¸ã®3è¡ãå«ããã°ããï¼
+
+#include "kernel_impl.h"
+#include "task.h"
+#include "sil.h"
+
+(2) ãªãã»ããå¤åºåç¨ãã¯ã­ã®å®ç¾©
+
+æ§é ä½ä¸­ã®ãã£ã¼ã«ãã®ãªãã»ããå¤ã®å®ç¾©ãçæããããã«ç¨ãããã¯ã­
+ï¼OFFSET_DEFã¨OFFSET_DEF2ï¼ã®å®ç¾©ï¼ãããã®ãã¯ã­ã®å®ç¾©ã¯ï¼ä¿®æ­£ããå¿
+è¦
+ããªãï¼
+
+(3) ãªãã»ããå¤åºåç¨é¢æ°ã®å®ç¾©
+
+æ§é ä½ä¸­ã®ãã£ã¼ã«ãã®ãªãã»ããå¤ã®å®ç¾©ãçæããããã®é¢æ°
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+----------------------------------------
+# ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®ãªãã¸ã§ã¯ããã¡ã¤ã«å
+START_OBJS = start.o
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+# ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®ã³ã³ãã¤ã«ã«ã¼ã«
+$(START_OBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+# ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®ä¾å­é¢ä¿ä½æã«ã¼ã«
+$(START_OBJS:.o=.d): %.d: %.S
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+
+# ãªã³ã«ã«å¯¾ãããªãã·ã§ã³
+LDFLAGS := -nostdlib $(LDFLAGS)
+CFG1_OUT_LDFLAGS := -nostdlib $(CFG1_OUT_LDFLAGS)
+LIBS := $(LIBS) -lgcc
+----------------------------------------
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+ã¾ãï¼GNUéçºç°å¢ã§ï¼ã³ã³ãã¤ã©ã«æ¨æºã®crtbegin.oã¨crtend.oãç¨ããå ´å
+ã«ã¯ï¼Makefile ã®ã¿ã¼ã²ããä¾å­é¨ã«æ¬¡ã®ãããªè¨è¿°ãå
+¥ããã¨ããï¼
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+----------------------------------------
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+START_OBJS = $(shell $(CC) -print-file-name=crtbegin.o)
+END_OBJS = $(shell $(CC) -print-file-name=crtend.o)
+
+# ä¾å­é¢ä¿ä½æã«ã¼ã«
+$(START_OBJS:.o=.d): %.d:
+$(END_OBJS:.o=.d): %.d:
+
+# ãªã³ã«ã«å¯¾ãããªãã·ã§ã³
+LDFLAGS := -nostdlib $(LDFLAGS)
+CFG1_OUT_LDFLAGS := -nostdlib $(CFG1_OUT_LDFLAGS)
+LIBS := $(LIBS) -lgcc
+----------------------------------------
+
+ãã®å ´åï¼ãããã®ãã¡ã¤ã«ãã³ã³ãã¤ã«ãããã¨ã¯ãªãããï¼ã³ã³ãã¤ã«ã«ã¼
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+ãä¾å­é¨ã«æ¬¡ã®ãããªè¨è¿°ãå
+¥ããã¨ããï¼
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+----------------------------------------
+# ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®ãªãã¸ã§ã¯ããã¡ã¤ã«å
+HIDDEN_OBJS = start.o
+
+# ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®ã³ã³ãã¤ã«ã«ã¼ã«
+$(HIDDEN_OBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+# ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã®ä¾å­é¢ä¿ä½æã«ã¼ã«
+$(HIDDEN_OBJS:.o=.d): %.d: %.S
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+
+# ãªã³ã«ã«å¯¾ãããªãã·ã§ã³
+LDFLAGS := -nostdlib $(LDFLAGS)
+CFG1_OUT_LDFLAGS := -nostdlib $(CFG1_OUT_LDFLAGS)
+LIBS := $(LIBS) -lgcc
+----------------------------------------
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+----------------------------------------
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+
+dlytimã§æå®ãããä»¥ä¸ã®æéï¼åä½ã¯ããç§ï¼ï¼ã«ã¼ããªã©ã«ãã£ã¦å¾
+ã¤é¢
+æ°ï¼
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+æ¹æ³ã¨ããï¼ã¢ã»ã³ããªè¨èªã§è¨è¿°ããã®ã¯ï¼ã³ã³ãã¤ã©ã®æé©åã«ä¾å­ããª
+ãããã«ããããã§ããï¼ã¾ããã®é¢æ°ã¯ï¼ã­ã£ãã·ã¥ç­ã®å½±é¿ãåããªãã
+ãã«ï¼ã§ããéãã¡ã¢ãªã¢ã¯ã»ã¹ãè¡ããªãããã«å®è£
+ãã¹ãã§ããï¼
+
+	void sil_dly_nse(ulong_t dlytim)
+	{
+		dlytim -= SIL_DLY_TIM1;
+		if (çµæã0ããå¤§ãã) {
+			do {
+				dlytim -= SIL_DLY_TIM2;
+			} while (çµæã0ããå¤§ãã);
+		}
+	}
+
+ãã®é¢æ°ã®åä½ã¯æ¬¡ã®éãã§ããï¼dlytimãSIL_DLY_TIM1ä»¥ä¸ã®å ´åã«ã¯ï¼æ
+åã®ifæã®æ¡ä»¶ãæç«ããï¼ããã«é¢æ°ããæããï¼dlytimãSIL_DLY_TIM1ã
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+æç«ãããï¼doã«ã¼ãã¯1åãåããã«é¢æ°ããæããï¼dlytimã
+(SIL_DLY_TIM1+SIL_DLY_TIM2)ããå¤§ããï¼(SIL_DLY_TIM1+SIL_DLY_TIM2*2)ä»¥
+ä¸ã®å ´åã«ã¯ï¼doã«ã¼ãã1åã ãåã£ã¦é¢æ°ããæããï¼ãã®å¾ï¼dlytimã
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+ãªãï¼ãã®é¢æ°ãã¢ã»ã³ããªè¨èªï¼ã¾ãã¯ï¼Cè¨èªï¼ã§è¨è¿°ããå ´åï¼ã©ã®ãã¡
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+ããããã¨ã«ããï¼
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+(4-2-2) SIL_DLY_TIM1ï¼ãªãã·ã§ã³ï¼
+(4-2-3) SIL_DLY_TIM2ï¼ãªãã·ã§ã³ï¼
+
+sil_dly_nseãä¸è¨ã®æ¨æºçãªæ¹æ³ã§å®ç¾ããå ´åï¼ãã®2ã¤ã®å®æ°ãã¿ã¼ã²ã
+ãä¾å­é¨ã§ãã¯ã­å®ç¾©ããï¼
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+ã«è¨­å®ããï¼ã¿ã¼ã²ãããã­ã»ããµã®å½ä»¤ã»ããã«ããããï¼ããããï¼æ¸ç®
+å½ä»¤ã¨æ¡ä»¶åå²å½ä»¤å1åã®å®è¡æéã«ãªãï¼SIL_DLY_TIM2ãæ±ºã¾ãã°ï¼é¢æ°å¼
+åºããå«ããå
+¨ä½ã®æéãdlytimã§æå®ãããä»¥ä¸ã®æéã«ãªãããã«ï¼
+SIL_DLY_TIM1ãæ±ºããï¼
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+ã¿ã¼ã²ããä¾å­é¨ãã·ã¹ãã ãµã¼ãã¹ã§å¼ã³åºãå¯è½æ§ãé«ãããï¼ç¨æãã
+ãã¨ã¨ãã¦ããï¼ãã®ããï¼ãããã®é¢æ°ãã©ã®ãããªã·ã¹ãã ç¶æ
+ã§å¼ã³åº
+ãããã¯ï¼ã¿ã¼ã²ããä¾å­é¨å
+ã§ä¸è²«ãã¦ããã°ããï¼
+
+6.4.5 å²è¾¼ã¿ãã³ãã©ã®å
+é ­å¦çã¨æ«å°¾å¦ç
+
+(6-4-5-1) void i_begin_int(INTNO intno)
+
+intnoã§æå®ãããå²è¾¼ã¿è¦æ±ã©ã¤ã³ã«å¯¾ããå²è¾¼ã¿ãã³ãã©ã®å
+é ­ã§è¡ãã¹ã
+å¦çãè¡ãé¢æ°ï¼ããã§è¡ãã¹ãå¦çã¨ãã¦ã¯ï¼å²è¾¼ã¿è¦æ±ã©ã¤ã³ãã¨ãã¸ã
+ãªã¬ã§ããå ´åã®ããªã¬ãããå²è¾¼ã¿è¦æ±ã®ã¯ãªã¢ãæããããï¼
+
+intnoã«å¯¾ãã¦ç»é²ãããå²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ãå¼ã³åºãå²è¾¼ã¿ãã³ãã©ã®
+å
+é ­ã§å¼ã³åºãããï¼ãã®ãããã®é¢æ°ã¯ï¼å²è¾¼ã¿ãã³ãã©ã®å
+é ­ï¼éå¸¸ã¯
+CPUã­ãã¯è§£é¤ç¶æ
+ï¼ã§å¼ã³åºããããã«å®è£
+ããªããã°ãªããªãï¼
+
+(6-4-5-2) void i_end_int(INTNO intno)
+
+intnoã§æå®ãããå²è¾¼ã¿è¦æ±ã©ã¤ã³ã«å¯¾ããå²è¾¼ã¿ãã³ãã©ã®æ«å°¾ã§è¡ãã¹ã
+å¦çãè¡ãé¢æ°ï¼ããã§è¡ãã¹ãå¦çã¨ãã¦ã¯ï¼å²è¾¼ã¿ã³ã³ãã­ã¼ã©ï¼IRCï¼ã«
+å¯¾ããå²è¾¼ã¿å¦çã®çµäºéç¥ãæããããï¼
+
+intnoã«å¯¾ãã¦ç»é²ãããå²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ãå¼ã³åºãå²è¾¼ã¿ãã³ãã©ã®
+æ«å°¾ã§å¼ã³åºãããï¼ãã®ãããã®é¢æ°ã¯ï¼å²è¾¼ã¿ãã³ãã©ã®æ«å°¾ï¼éå¸¸ã¯
+CPUã­ãã¯è§£é¤ç¶æ
+ï¼ã§å¼ã³åºããããã«å®è£
+ããªããã°ãªããªãï¼
+
+ã¿ã¼ã²ããã«ãã£ã¦ã¯ï¼IRCã«å¯¾ããå²è¾¼ã¿å¦çã®çµäºéç¥ãè¡ãåã«ï¼ãã¹ã¦
+ã®å²è¾¼ã¿ãç¦æ­¢ããªããã°ãªããªãå ´åãããï¼ãã®å ´åã«ã¯ï¼ãã®é¢æ°ã®ä¸­
+ã§å²è¾¼ã¿ãç¦æ­¢ãï¼ãã®ç¶æ
+ã®ã¾ã¾ï¼å²è¾¼ã¿ãã³ãã©ãããªã¿ã¼ã³ããï¼å²è¾¼
+ã¿ãã³ãã©ããã®ãªã¿ã¼ã³åã«ã¯ï¼å²è¾¼ã¿ç¦æ­¢ãè§£é¤ããã®ãååã§ãããï¼
+å²è¾¼ã¿ãã³ãã©ã®åºå£å¦çã§å
+ã«æ»ãå¦çãè¡ãã®ã§å·®ãæ¯ããªãã¯ãã§ããï¼
+å²è¾¼ã¿ãã³ãã©ã®åºå£å¦çãï¼ããã§å·®ãæ¯ããªãå®è£
+ã«ãªã£ã¦ãããã¨ãç¢º
+èªããã¹ãã§ããï¼
+
+6.5 ã¿ã¹ã¯ãã£ã¹ãããã£
+
+6.5.1 ã¿ã¹ã¯ã³ã³ãã­ã¹ããã­ãã¯ã¨ã¿ã¹ã¯åæåã³ã³ãã­ã¹ããã­ãã¯
+
+(6-5-1-1) TSKCTXB
+
+ã¿ã¼ã²ããä¾å­ã®ã¿ã¹ã¯ã³ã³ãã­ã¹ããä¿å­ããããã«ï¼TCBä¸­ã«æã¤ãã¨ãå¿
+
+è¦ãªãã¼ã¿æ§é ã®åãï¼TSKCTXBã«å®ç¾©ããï¼æ¨æºçã«ã¯ï¼TSKCTXBã«ã¯ï¼ã¿ã¹
+ã¯ã®ã¹ã¿ãã¯ãã¤ã³ã¿ã¨å®è¡åéçªå°ãæ ¼ç´ããï¼
+
+(6-5-1-2) USE_TSKINICTXBï¼ãªãã·ã§ã³ï¼
+(6-5-1-3) TSKINICTXBï¼ãªãã·ã§ã³ï¼
+
+ã¿ã¼ã²ããä¾å­ã®æ
+å ±ãã¿ã¹ã¯åæåãã­ãã¯ï¼TINIBï¼ã«å
+¥ãããå ´åãï¼
+TINIBä¸­ã®ã¹ã¿ãã¯é åã®ãµã¤ãºã¨å
+é ­çªå°ã®æã¡æ¹ãã¿ã¼ã²ããä¾å­ã«å¤æ´ã
+ããå ´åã«ã¯ï¼USE_TSKINICTXBããã¯ã­å®ç¾©ãï¼TINIBä¸­ã«æã¤ãã¨ãå¿
+è¦ãªãã¼
+ã¿æ§é ã®åãï¼TSKINICTXBã«å®ç¾©ããï¼
+
+USE_TSKINICTXBããã¯ã­å®ç¾©ããã¨ï¼TINIBä¸­ã«ã¹ã¿ãã¯é åã¨ãµã¤ãºã¨å
+é ­çª
+å°ãå«ã¾ããªããªãããï¼ããã«ä»£ããæ
+å ±ãTSKINICTXBä¸­ã«æã¤å¿
+è¦ãããï¼
+ã¾ãï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ãã¹2ã®ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¿ã¼ã²ããéä¾å­
+é¨ã§ï¼TSKINICTXBã®åæåæ
+å ±ãçæããããã®GENERATE_TSKINICTXBãï¼ãã¹
+3ã®ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¿ã¼ã²ããéä¾å­é¨ã§ï¼TINIBããã¹ã¿ãã¯é åã®
+å
+é ­çªå°ãåãåºãããã®GET_STK_TSKINICTXBãå®ç¾©ããå¿
+è¦ãããï¼
+
+6.5.2 ãã£ã¹ãããã£æ¬ä½
+
+ãã£ã¹ãããã£æ¬ä½ï¼dispatcherï¼ã¯ï¼ã¿ã¼ã²ããéä¾å­é¨ããç´æ¥å¼ã³åºã
+ãããã¨ã¯ãªãï¼ã«ã¼ãã«ã®ã¿ã¼ã²ããä¾å­é¨ã®å
+é¨ããã®ã¿å¼ã³åºãããï¼
+dispatcherã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£
+é¤ç¶æ
+ã»ãã£ã¹ãããè¨±å¯ç¶æ
+ã§å¼ã³åºãããï¼
+
+dispatcherã®å¦çå
+å®¹ã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+void
+dispatcher(void)
+{
+#ifdef LOG_DSP_ENTER
+	log_dsp_enter(p_runtsk);
+#endif /* LOG_DSP_ENTER */
+  dispatcher_0:
+	while ((p_runtsk = p_schedtsk) == NULL) {
+		å²è¾¼ã¿ãè¨±å¯ãããCPUã­ãã¯è§£é¤ç¶æ
+ã«ãªãããæºåãã
+		éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã â¦ (*1)
+		do {
+			å²è¾¼ã¿ããã¹ã¦è¨±å¯ãï¼å²è¾¼ã¿çºçãå¾
+ã¤ â¦ (*2)
+			å²è¾¼ã¿è¨±å¯åã®ç¶æ
+ã«æ»ãï¼ï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããï¼
+		} while (!reqflg);
+		reqflg = false;
+		ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«æ»ã â¦ (*1)
+		CPUã­ãã¯ç¶æ
+ã«æ»ã ... (*3)
+	}
+	èªã¿ã¹ã¯ï¼p_runtskï¼ã®TCBããã¹ã¿ãã¯ãã¤ã³ã¿ãå¾©å¸°ãã
+#ifdef LOG_DSP_LEAVE
+	log_dsp_leave(p_runtsk);
+#endif /* LOG_DSP_LEAVE */
+	èªã¿ã¹ã¯ã®TCBããå®è¡åéçªå°ãå¾©å¸°ãï¼ããã¸åå²ãã â¦ (*a)
+}
+----------------------------------------
+
+å²è¾¼ã¿çºçãå¾
+ã¤éã«éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæããã®ã¯ï¼ãã®éã«å®è¡
+ãããå²è¾¼ã¿ãã³ãã©å
+ã§ï¼ã¿ã¹ã¯ãã£ã¹ããããããªãããã«ããããã§ã
+ãï¼ãã®æï¼å²è¾¼ã¿ãã³ãã©ãï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ãä½¿ãã
+ãã«ããªããã°ãªããªãï¼éå¸¸ã¯ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæããéã«é
+ã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã«åãæãï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«æ»ãéã«
+å
+ã®ã¹ã¿ãã¯ã«åãæããï¼
+
+ã¿ã¼ã²ããã«ãã£ã¦ã¯ï¼ç¹ã«ï¼ã·ãã¥ã¬ã¼ã·ã§ã³ç°å¢ã®å ´åï¼ï¼å¼·å¶çã«éã¿
+ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãããã¨ãé£ããå ´åãããï¼ãã®å ´åã«ã¯ï¼ãã®
+éã«å®è¡ãããå²è¾¼ã¿ãã³ãã©å
+ã§ã¿ã¹ã¯ãã£ã¹ããããããªããããªä»çµã¿
+ãå®è£
+ãããã¨ã§ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãã¸ã®åæããçç¥ãããã¨ãã§ããï¼
+
+(*1)ã®éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæããå¦çã¨ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«æ»ãå¦
+çã¯ï¼doã«ã¼ãã®ä¸­ã§è¡ã£ã¦ãããï¼ã¿ã¼ã²ããã«ãã£ã¦ã¯ï¼å²è¾¼ã¿ã®è¨±å¯ï¼
+ç¦æ­¢ã¨ã¾ã¨ãã¦å¦çããæ¹ãå¹çãè¯ãï¼ï¼
+
+(*2)ã«ããã¦ï¼å²è¾¼ã¿ãè¨±å¯ããå¦çã¨ï¼å²è¾¼ã¿çºçãå¾
+ã¤å¦çã¨ã¯ï¼ä¸å¯å
+ã«è¡ãªãå¿
+è¦ãããï¼ãããä¸å¯åã«è¡ãªããªãå ´åï¼å²è¾¼ã¿ãè¨±å¯ããç´å¾
+ã«å²è¾¼ã¿ãå
+¥ãï¼ãã®ä¸­ã§ã¿ã¹ã¯ãå®è¡å¯è½ç¶æ
+ã«ãªãã¨ï¼å®è¡ãã¹ãã¿ã¹ã¯
+ãããã«ãããããããã­ã»ããµãå²è¾¼ã¿å¾
+ã¡ã«ãªã£ã¦ãã¾ãï¼
+
+ã¾ãï¼(*2)ã«ããã¦ï¼å²è¾¼ã¿çºçãå¾
+ã¤å½ä»¤ãç¨æããã¦ããªãå ´åãï¼ãã
+ãçºè¡ããã®ãä¸é½åãªå ´åã«ã¯ï¼å²è¾¼ã¿ããã¹ã¦è¨±å¯ãã¦å²è¾¼ã¿ãåãä»ã
+ãããç¶æ
+ã«ãªã£ãå¾ã«ï¼å²è¾¼ã¿çºçãå¾
+ããã«æ¬¡ã«é²ãã§ãããï¼ãã®å ´åï¼
+ãã®å¤å´ã®doã«ã¼ãã«ãã£ã¦ï¼å²è¾¼ã¿çºçãå¾
+ã¤ãã¨ã«ãªãï¼
+
+CPUã­ãã¯ãè§£é¤ããããã®æ
+å ±ï¼ä¾ãã°ï¼CPUã­ãã¯åã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼
+ãå¤æ°ã«ä¿æãã¦ããå ´åã«ã¯ï¼(*3)ã§CPUã­ãã¯ç¶æ
+ã«æ»ãéã«ï¼ãã®å¤æ°ã®
+å¤ãå
+ã«æ»ã£ã¦ããå¿
+è¦ãããï¼ç¹ã«ï¼ãã®å¤æ°ãï¼å²è¾¼ã¿å¾
+ã¡ã®éã«å®è¡ã
+ãå²è¾¼ã¿ãã³ãã©å
+ã§æ¸ãæããããå ´åã¯ï¼å
+ã®å¤ã«æ»ããã¨ãå¿
+è¦ã§ããï¼
+
+å²è¾¼ã¿å¾
+ã¡ã®éã¯ï¼p_runtskãNULLï¼ï¼0ï¼ã«è¨­å®ããªããã°ãªããªãï¼ä¸ã®å¦
+çå
+å®¹ããã®ã¾ã¾å®è£
+ããã°ãããªãï¼ï¼ãã®ããã«è¨­å®ããªãã¨ï¼å²è¾¼ã¿ã
+ã³ãã©ããiget_tidãå¼ã³åºããéã®åä½ãä»æ§ã«åè´ããªããªãï¼
+
+dispatcherãã¢ã»ã³ããªè¨èªã§è¨è¿°ããå ´åã«ã¯ï¼ãã¬ã¼ã¹ã­ã°åå¾å¦çã¯ï¼
+ã6.2 ãã¬ã¼ã¹ã­ã°æ©è½ã¸ã®å¯¾å¿ãã®ç¯ã§è¨è¿°ããæ¹æ³ã§ã³ã¼ãã£ã³ã°ããã
+ã¨ï¼ãªãï¼log_dsp_enterã¯åæãåã®ã¿ã¹ã¯ã®ã¹ã¿ãã¯ã§ï¼log_dsp_leave ã¯
+åæãå¾ã®ã¿ã¹ã¯ã®ã¹ã¿ãã¯ã§å®è¡ããï¼
+
+6.5.3 ã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®ãã£ã¹ããã
+
+(6-5-3-1) void dispatch(void)
+(6-5-3-2) OMIT_CALLTEXï¼ãªãã·ã§ã³ï¼
+
+ã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®ãã£ã¹ãããï¼dispatchï¼ã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ã
+ç¨ã®ãµã¼ãã¹ã³ã¼ã«å¦çã«ããã¦ã¿ã¹ã¯åæããå¿
+è¦ã«ãªã£ãå ´åã«ï¼ã¿ã¼ã²ã
+ãéä¾å­é¨ã®ãµã¼ãã¹ã³ã¼ã«å¦çé¢æ°ããå¼ã³åºãããï¼
+
+dispatchã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤
+ç¶æ
+ã»ãã£ã¹ãããè¨±å¯ç¶æ
+ã§å¼ã³åºãããï¼
+
+dispatchã®å¦çå
+å®¹ã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+void
+dispatch(void)
+{
+#ifdef TOPPERS_SUPPORT_OVRHDR
+	ovrtimer_stop();					/* ãªã¼ãã©ã³ã¿ã¤ãã®åæ­¢ */
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿(*)ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ã«ä¿å­ãã
+	ã¹ã¿ãã¯ãã¤ã³ã¿ãèªã¿ã¹ã¯ï¼p_runtskï¼ã®TCBã«ä¿å­ãã
+	dispatch_rãï¼å®è¡åéçªå°ã¨ãã¦èªã¿ã¹ã¯ã®TCBã«ä¿å­ãã â¦ (*a)
+	dispatcherã«åå²ãã
+
+  dispatch_r:
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ããå¾©å¸°ãã
+#ifdef TOPPERS_SUPPORT_OVRHDR
+	ovrtimer_start();					/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+	calltex(); â¦ (*b)
+}
+----------------------------------------
+
+ããã§ã¹ã¯ã©ããã¬ã¸ã¹ã¿(*)ã¨ã¯ï¼é¢æ°å¼åºãã«ããä¿å­ãããªãã¬ã¸ã¹ã¿ã®
+ãã¨ã§ããï¼å¿
+è¦ãªå ´åã«ã¯ï¼é¢æ°ãå¼ã³åºãå´ã§ä¿å­ããªããã°ãªããªãã
+ãï¼caller saved registerã¨å¼ã°ããå ´åãããï¼
+
+dispatchãå¼ã³åºããã¿ã¹ã¯ãæ¬¡ã«å®è¡ãããæã«ã¯ï¼å®è¡åéçªå°ã¨ãã¦ç»
+é²ããdispatch_rã«æ»ã£ã¦ããï¼dispatch_rã«ã¯ï¼dispatcherã®ã¿ããåå²ãï¼
+ãã®æã®ç¶æ
+ã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨
+è§£é¤ç¶æ
+ã»ãã£ã¹ãããè¨±å¯ç¶æ
+ã§ããï¼
+
+(*b)ã§calltexãå¼ã¶ä»£ããã«ï¼calltexã®å¦çå
+å®¹ï¼p_runtsk->enatexãtrue
+ã§ï¼p_runtsk->texptnã0ã§ãªãï¼ipmflgãtrueã®å ´åã«ï¼call_texrtnãå¼ã¶ï¼
+ãããã«ã¤ã³ã©ã¤ã³å±éããæ¹ãå¹çãããï¼ã¿ã¼ã²ããéä¾å­é¨ã®calltexã
+ä½¿ããªãå ´åã«ã¯ï¼OMIT_CALLTEXããã¯ã­å®ç¾©ãããã¨ã§ï¼ã¿ã¼ã²ããéä¾å­
+é¨ããcalltexãåãé¤ããã¨ãã§ããï¼
+
+6.5.4 ãã£ã¹ãããã£ã®åä½éå§
+
+(6-5-4-1) void start_dispatch(void)
+
+ãã£ã¹ãããã£ã®åä½éå§ï¼start_dispatchï¼ã¯ï¼ã«ã¼ãã«èµ·åæã«ï¼ã«ã¼ã
+ã«ã®åæåå¦çããå¼ã³åºãããï¼start_dispatchã¯ï¼ãªã¿ã¼ã³ãããã¨ã®ãª
+ãé¢æ°ã§ããï¼
+
+start_dispatchã¯ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãã§ï¼NMIãé¤ããã¹ã¦ã®å²è¾¼ã¿ããã¹
+ã¯ããç¶æ
+ï¼å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¨åç­ã®ç¶æ
+ï¼ã§å¼ã³åºãããï¼start_dispatch
+å
+ã§ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãï¼CPUã­ãã¯ç¶æ
+ã»å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨
+è§£é¤ç¶æ
+ã«ããªããã°ãªããªãï¼
+
+start_dispatchã®å¦çå
+å®¹ã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+void
+start_dispatch(void)
+{
+	ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã
+	CPUã­ãã¯ç¶æ
+ã»å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã«ãã
+	dispatcher_0ã«åå²ãã
+}
+----------------------------------------
+
+6.5.5 ç¾å¨ã®ã³ã³ãã­ã¹ããæ¨ã¦ã¦ãã£ã¹ããã
+
+(6-5-5-1) void exit_and_dispatch(void)
+
+ç¾å¨ã®ã³ã³ãã­ã¹ããæ¨ã¦ã¦ãã£ã¹ãããï¼exit_and_dispatchï¼ã¯ï¼èªã¿ã¹ã¯
+ãçµäºããããµã¼ãã¹ã³ã¼ã«å¦çé¢æ°ããå¼ã³åºãããï¼exit_and_dispatchã¯ï¼
+ãªã¿ã¼ã³ãããã¨ã®ãªãé¢æ°ã§ããï¼
+
+exit_and_dispatchã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»å²è¾¼ã¿åªå
+åº¦ã
+ã¹ã¯å
+¨è§£é¤ç¶æ
+ã»ãã£ã¹ãããè¨±å¯ç¶æ
+ã§å¼ã³åºãããï¼
+
+exit_and_dispatchã®å¦çå
+å®¹ã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+void
+exit_and_dispatch(void)
+{
+	dispatcherã«åå²ãã
+}
+----------------------------------------
+
+6.5.6 ã¿ã¹ã¯ã®èµ·åå¦ç
+
+(6-5-6-1) void activate_context(TCB *p_tcb)
+
+ã¿ã¹ã¯ã®èµ·åå¦çï¼activate_contextï¼ã¯ï¼ã¿ã¹ã¯ãä¼æ­¢ç¶æ
+ããå®è¡ã§ãã
+ç¶æ
+ã«ããæã«å¼ã°ãï¼p_tcbã§æå®ãããã¿ã¹ã¯ï¼å¯¾è±¡ã¿ã¹ã¯ï¼ã®TCBä¸­ã®ã¹
+ã¿ãã¯ãã¤ã³ã¿ãåæåãï¼å®è¡åéçªå°ãã¿ã¹ã¯éå§æå¦çï¼start_rï¼ã«è¨­
+å®ããï¼ãã®æç¹ã§ã¯ï¼å¾è¿°ããçç±ã§ï¼å¯¾è±¡ã¿ã¹ã¯ã®ã¹ã¿ãã¯é åãä½¿ã£ã¦
+ã¯ãªããªãï¼
+
+å¯¾è±¡ã¿ã¹ã¯ãæåã«å®è¡ãããæã«ã¯ï¼å¯¾è±¡ã¿ã¹ã¯ãèªã¿ã¹ã¯ã¨ãã¦ï¼å®è¡å
+éçªå°ã¨ãã¦ç»é²ããstart_rã«åå²ãã¦ããï¼start_rã«ã¯ï¼dispatcherã®ã¿
+ããåå²ãï¼ãã®æã®ç¶æ
+ã¯ï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»å²è¾¼ã¿åª
+å
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã»ãã£ã¹ãããè¨±å¯ç¶æ
+ã§ããï¼
+
+start_rã¯ï¼CPUã­ãã¯ç¶æ
+ãè§£é¤ããå¾ï¼ã¿ã¹ã¯ã®èµ·åçªå°ãå¼ã³åºãï¼ãã
+ã«ï¼ã¿ã¹ã¯ã®èµ·åçªå°ããæ»ã£ã¦ããå ´åã«ã¯ï¼ext_tskãå¼ã³åºãï¼
+
+activate_contextã¨start_rã®å¦çå
+å®¹ã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+void
+activate_context(TCB *p_tcb)
+{
+	æå®ãããã¿ã¹ã¯ï¼p_tcbï¼ã®TCBä¸­ã®ã¹ã¿ãã¯ãã¤ã³ã¿ãåæåãã
+	start_rãï¼å®è¡åéçªå°ã¨ãã¦èªã¿ã¹ã¯ã®TCBã«ä¿å­ãã â¦ (*a)
+	return;
+
+  start_r:
+#ifdef TOPPERS_SUPPORT_OVRHDR
+	ovrtimer_start();					/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+	CPUã­ãã¯è§£é¤ç¶æ
+ã«ãã
+	èªã¿ã¹ã¯ï¼p_runtskï¼ã®èµ·åçªå°ãï¼æ¡å¼µæ
+å ±ããã©ã¡ã¼ã¿ã¨ãã¦å¼ã³åºã
+	ext_tskã«åå²ãã ... (*c)
+}
+----------------------------------------
+
+(*c)ã§ext_tskãå¼ã¶ä»£ããã«ï¼èªã¿ã¹ã¯ã®èµ·åçªå°ãå¼ã³åºãæã®è¿ãçªå°ã
+ext_tskã®çªå°ã¨ãã¦ããæ¹æ³ãããï¼
+
+ããã§ï¼ã¿ã¹ã¯ã®èµ·åå¦çã«ããã¦å¯¾è±¡ã¿ã¹ã¯ã®ã¹ã¿ãã¯é åãä½¿ã£ã¦ã¯ãªã
+ãªãçç±ã¯ï¼æ¬¡ã®éãï¼å¶ç´ã¿ã¹ã¯æ¡å¼µããã±ã¼ã¸ã«ããã¦ï¼è¤æ°ã®å¶ç´ã¿ã¹
+ã¯ãã¹ã¿ãã¯é åãå
+±æãã¦ããå ´åã«ï¼ã¿ã¹ã¯ã®èµ·åæç¹ã§ã¯ï¼ãã®ã¿ã¹ã¯
+ã¨ã¹ã¿ãã¯é åãå
+±æãã¦ããã¿ã¹ã¯ãï¼ã¹ã¿ãã¯é åãä½¿ç¨ãã¦ããå¯è½æ§
+ãããããã§ããï¼
+
+ãã®ãã¼ãã£ã³ã°ã¬ã¤ãã§ã¯ï¼ã¿ã¹ã¯ã®å®è¡åéçªå°ãTCBã«ä¿å­ãã¦ãã
+(*a)ããããã¹ã¿ãã¯ã«ä¿å­ããæ¹æ³ãèãããããï¼ã¿ã¹ã¯ã®èµ·åå¦çã§ã¹
+ã¿ãã¯é åãä½¿ããªããã¨ããï¼ã¿ã¹ã¯ã®èµ·åå¦çã ãã¯ä¾å¤æ±ãããªããã°
+ãªããªãï¼ä¾ãã°ï¼ã¿ã¹ã¯ã®èµ·åå¦çã«ããã¦ã¯TCBä¸­ã®ã¹ã¿ãã¯ãã¤ã³ã¿ãç¹
+æ®ãªå¤ï¼ä¾ãã°0ï¼ã«è¨­å®ãã¦ããï¼ãã£ã¹ãããã£æ¬ä½ã§TCBä¸­ã®ã¹ã¿ãã¯ã
+ã¤ã³ã¿ããã®å¤ã®å ´åã«ã¯start_rã«åå²ããï¼start_rã«ããã¦ã¹ã¿ãã¯ãã¤
+ã³ã¿ãåæåããæ¹æ³ãèããããï¼
+
+6.6 å²è¾¼ã¿ãã³ãã©
+
+6.6.1 å²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦ç
+
+ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ã®åºå
+¥å£å¦çã®æ¹æ³ã¯ï¼ãã­ã»ããµã«ãã£ã¦å¤§ããç°ãª
+ããï¼ããããã®å¦çå
+å®¹ã¯æ¬¡ã®éãï¼
+
+----------------------------------------
+void
+<å²è¾¼ã¿ã®åºå
+¥å£å¦ç>(void)
+{
+	å°ãªãã¨ãã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+ã«ãã â¦ (*f)
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ã«ä¿å­ãã
+	if (ã¿ã¹ã¯ã³ã³ãã­ã¹ãã§å²è¾¼ã¿çºç) {
+#ifdef TOPPERS_SUPPORT_OVRHDR
+		ovrtimer_stop();				/* ãªã¼ãã©ã³ã¿ã¤ãã®åæ­¢ */
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+		ã¹ã¿ãã¯ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã«åãæãï¼
+								éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã
+	}
+	å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãï¼åãä»ããå²è¾¼ã¿è¦æ±ã®å²è¾¼åªå
+åº¦ã«è¨­å®ãï¼
+				CPUã­ãã¯è§£é¤ç¶æ
+ã«ããï¼åãä»ããå²è¾¼ã¿ããã
+				åªå
+åº¦ã®é«ãå²è¾¼ã¿ãåãä»ããããã«ããï¼â¦ (*i)
+
+
+#ifdef LOG_INH_ENTER
+	log_inh_enter(å²è¾¼ã¿ãã³ãã©çªå·);
+#endif /* LOG_INH_ENTER */
+	å²è¾¼ã¿ãã³ãã©ãå¼ã³åºã
+#ifdef LOG_INH_LEAVE
+	log_inh_leave(å²è¾¼ã¿ãã³ãã©çªå·);
+#endif /* LOG_INH_LEAVE */
+
+  ret_int:
+	if (ã¿ã¹ã¯ã³ã³ãã­ã¹ãã§å²è¾¼ã¿çºç) {
+		ï¼å°ãªãã¨ãï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+ã«ãã â¦ (*d)
+		ã¹ã¿ãã¯ãã¿ã¹ã¯ç¨ã®ã¹ã¿ãã¯ã«æ»ãï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã
+																â¦ (*g)
+		if (reqflg) {
+			reqflg = false;
+			CPUã­ãã¯ç¶æ
+ã«ãã â¦ (*e)
+			å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãï¼å
+¨è§£é¤ç¶æ
+ï¼TIPM_ENAALLï¼ã«è¨­å®ãã â¦ (*h)
+			if (dspflg && p_runtsk != p_schedtsk) {
+				ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ã«ä¿å­ãã
+				ã¹ã¿ãã¯ãã¤ã³ã¿ãèªã¿ã¹ã¯ï¼p_runtskï¼ã®TCBã«ä¿å­ãã
+				ret_int_rãï¼å®è¡åéçªå°ã¨ãã¦èªã¿ã¹ã¯ã®TCBã«ä¿å­ãã â¦ (*a)
+				dispatcherã«åå²ãã
+
+			  ret_int_r:
+				ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ããå¾©å¸°ãã
+			}
+#ifdef TOPPERS_SUPPORT_OVRHDR
+			ovrtimer_start();			/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+			calltex(); â¦ (*b)
+		}
+#ifdef TOPPERS_SUPPORT_OVRHDR
+		else {
+			ovrtimer_start();			/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+		}
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+	}
+	å²è¾¼ã¿å¦çããã®ãªã¿ã¼ã³å¾ã«ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã
+									å²è¾¼ã¿å¦çåã®å¤ã«æ»ãããã«æºåãã
+	å²è¾¼ã¿å¦çããã®ãªã¿ã¼ã³å¾ã«ï¼CPUã­ãã¯è§£é¤ç¶æ
+ã«æ»ãããã«æºåãã
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ããå¾©å¸°ãã
+	å²è¾¼ã¿å¦çããã®ãªã¿ã¼ã³
+}
+----------------------------------------
+
+å²è¾¼ã¿ã®åä»ãã«ããï¼ã¹ã¿ãã¯ãã¤ã³ã¿ãåãæãããï¼ãã¹ã¦ã®å²è¾¼ã¿ã
+ç¦æ­¢ãããªããã­ã»ããµã§ã¯ï¼(*f)ã«ããã¦ï¼å°ãªãã¨ãã«ã¼ãã«ç®¡çã®å²è¾¼
+ã¿ãç¦æ­¢ããï¼ãã®çç±ã¯æ¬¡ã®éãã§ããï¼
+
+å²è¾¼ã¿ã®å
+¥å£å¦çã«ããã¦ï¼ã¹ã¿ãã¯ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã«
+åãæããåã«å¤éå²è¾¼ã¿ãçºçããã¨ï¼ã¿ã¹ã¯ã®ã¹ã¿ãã¯é åãä½¿ç¨ãããï¼
+ä¸è¨ã®ãããªãã­ã»ããµã§ã¯ï¼ã¹ã¿ãã¯ã®åæãåã«ï¼æå¤§ã§å²è¾¼ã¿åªå
+åº¦ã®
+æ®µæ°åã®å¤éå²è¾¼ã¿ãçºçãããã¨ãé²ããã¨ã¯ã§ããï¼åã¿ã¹ã¯ã®ã¹ã¿ãã¯
+é åãç¢ºä¿ããéã«ï¼ãã®åãè¦è¾¼ãã§ç¢ºä¿ããªããã°ãªããªãï¼åã¿ã¹ã¯ã®
+ã¹ã¿ãã¯é åããªãã¹ãå°ããããããã«ã¯ï¼ã¹ã¿ãã¯ããªãã¹ãä½¿ç¨ããªã
+å
+ã«ï¼å¤éå²è¾¼ã¿ãç¦æ­¢ããã®ãæã¾ããï¼ãã®ããï¼ã¹ã¯ã©ããã¬ã¸ã¹ã¿ã
+ã¹ã¿ãã¯ã«ä¿å­ããåã«ï¼å²è¾¼ã¿ãç¦æ­¢ããï¼ãã ãï¼å²è¾¼ã¿ã®ç¦æ­¢å¦çã«å¿
+
+è¦ãªæä½éã®ã¬ã¸ã¹ã¿ã«ã¤ãã¦ã¯ï¼å²è¾¼ã¿ã®ç¦æ­¢ã«å
+ç«ã£ã¦ã¹ã¿ãã¯ã«ä¿å­ã
+ãå¿
+è¦ãããï¼
+
+åæ§ã®ãã¨ã¯ï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã«ãå½ã¦ã¯ã¾ãï¼ããªãã¡ï¼ã«ã¼ãã«
+ç®¡çå¤ã®å²è¾¼ã¿ã«ã¤ãã¦ãï¼ã¹ã¿ãã¯ããªãã¹ãä½¿ç¨ããªãå
+ã«ç¦æ­¢ããã®ã
+æã¾ããï¼ãã®ãã¨ããï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãä½¿ç¨ããå ´åã«ã¯ï¼(*f)
+ã«ããã¦ï¼ãã¹ã¦ã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+ã«ããã®ãæã¾ãããã¨ã«ãªãï¼ä¸
+æ¹ã§ï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã®ç¦æ­¢æéãé·ããªãã¨ï¼ã«ã¼ãã«ç®¡çå¤ã®å²
+è¾¼ã¿ã®å¿ç­æ§ãä½ä¸ããããï¼ã¦ã¼ã¶ã«æ³¨æãä¿ãå¿
+è¦ãããï¼ã¾ãï¼ã«ã¼ã
+ã«ç®¡çå¤ã®å²è¾¼ã¿å¦çã«ããã¦ãï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ï¼ã¾ã
+ã¯ï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿å¦çç¨ã®ã¹ã¿ãã¯ï¼ã«åãæãããã¨ãæã¾ãã
+ãï¼ããã¯ã«ã¼ãã«ã®ç®¡è½å¤ã§ããï¼
+
+(*i)ã«å«ã¾ããå²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãè¨­å®ããå¦çã¯ï¼ãã­ã»ããµããã¼ãã¦ã§
+ã¢ã§å®ç¾ãã¦ããå ´åãå¤ãï¼
+
+(*d)ã«ããã¦ã¯ï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããã ãã§ï¼CPUã­ãã¯ç¶æ
+ã«ã
+ãå¿
+è¦ã¯ãªãï¼ä¾ãã°ï¼CPUã­ãã¯ç¶æ
+ã§ãããã¨ãç¤ºãå¤æ°ãç¨æãã¦ããå ´
+åã«ã¯ï¼(*d)ã®æç¹ã§ã¯ãã®å¤æ°ãCPUã­ãã¯ç¶æ
+ãç¤ºãå¤ã«å¤æ´ããå¿
+è¦ã¯ãª
+ãï¼(*e)ã«ããã¦å¤æ´ããã°ããï¼
+
+(*g)ã«ããã¦ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæããå¦çã¯ï¼å²è¾¼ã¿å¦çããã®ãªã¿ã¼
+ã³ã«ããã¹ã¿ãã¯ã¨ã³ã³ãã­ã¹ããå
+ã«æ»ããã­ã»ããµã§ã¯ï¼reqflgãtrueã®
+å ´åã«ã®ã¿è¡ãã°ããï¼reqflgãfalseã®æã¯ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãã®ã¾ã¾å¦
+çãç¶ãï¼å²è¾¼ã¿å¦çããã®ãªã¿ã¼ã³ã§ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«æ»ããã¨ã«ãªãï¼
+
+(*e)ã«ããã¦CPUã­ãã¯ç¶æ
+ã«ããã®ã¯ï¼dispatcherã«åå²ããéã¨ï¼(*b)ã«ã
+ãã¦calltexï¼ã¾ãã¯ï¼ãããå±éããå ´åã«ã¯call_texrtnï¼ãå¼ã³åºãéã«ï¼
+CPUã­ãã¯ç¶æ
+ã«ãªã£ã¦ããå¿
+è¦ãããããã§ããï¼
+
+(*h)ã®å¦çãå®è¡ãããã®ã¯ï¼å²è¾¼ã¿å¦çåã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+¨è§£é¤ç¶
+æ
+ï¼TIPM_ENAALLï¼ã§ãã£ãå ´åã«éããï¼ããã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+¨è§£é¤
+ç¶æ
+ã«è¨­å®ããã®ã¯ï¼å²è¾¼ã¿å¦çåã®å¤ã«æ»ãã®ã¨ç­ä¾¡ã§ããï¼ããã§ãã®å¦
+çãè¡ãã®ã¯ï¼dispatcherã«åå²ããéã¨ï¼(*b)ã«ããã¦calltexï¼ã¾ãã¯ï¼ã
+ããå±éããå ´åã«ã¯call_texrtnï¼ãå¼ã³åºãéã«ã¯ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨
+è§£é¤ç¶æ
+ã«ãªã£ã¦ããå¿
+è¦ãããããã§ããï¼
+
+ã¿ã¹ã¯ã®å®è¡ä¸­ã«å²è¾¼ã¿ãçºçãï¼ä¸ã®å¦çä¸­ã§dispatcherã«åå²ããå ´åï¼
+ãã®ã¿ã¹ã¯ãæ¬¡ã«å®è¡ãããæã«ã¯ï¼å®è¡åéçªå°ã¨ãã¦ç»é²ããret_int_rã«
+æ»ã£ã¦ããï¼ret_int_rã«ã¯ï¼dispatcherã®ã¿ããåå²ãï¼ãã®æã®ç¶æ
+ã¯ï¼ã¿
+ã¹ã¯ã³ã³ãã­ã¹ãã»CPUã­ãã¯ç¶æ
+ã»å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã»ãã£ã¹ãã
+ãè¨±å¯ç¶æ
+ã§ããï¼
+
+å²è¾¼ã¿ã®åºå
+¥å£å¦çãã¢ã»ã³ããªè¨èªã§è¨è¿°ããå ´åã«ã¯ï¼ãã¬ã¼ã¹ã­ã°åå¾
+å¦çã¯ï¼ã6.2 ãã¬ã¼ã¹ã­ã°æ©è½ã¸ã®å¯¾å¿ãã®ç¯ã§è¨è¿°ããæ¹æ³ã§ã³ã¼ãã£ã³
+ã°ãããã¨ï¼
+
+6.6.2 å²è¾¼ã¿ãã³ãã©æ¯ã®åºå
+¥å£å¦çã®çæ
+
+å²è¾¼ã¿ãã¯ãã«ããã¼ãã¦ã§ã¢ã§å®ç¾ãã¦ããå ´åãªã©ï¼å²è¾¼ã¿ãã³ãã©æ¯ã«
+åºå
+¥å£å¦çãç¨æããæ¹ãå¹çãè¯ãã¿ã¼ã²ããã®ããã«ï¼å²è¾¼ã¿ãã³ãã©æ¯
+ã«åºå
+¥å£å¦çãçæããæ©æ§ãç¨æãã¦ããï¼
+
+ä»¥ä¸ã®ãã¯ã­ã¯ï¼æ¨æºã®å²è¾¼ã¿ç®¡çæ©è½ã®åæåå¦çãç¨ããå ´åã®ã¿ï¼ã¿ã¼
+ã²ããéä¾å­é¨ã§ä½¿ãããï¼å²è¾¼ã¿ç®¡çæ©è½ã®åæåå¦çãã¿ã¼ã²ããä¾å­é¨
+ã§ç¨æãï¼ãã®ä¸­ã§ãããã®ãã¯ã­ãä½¿ããªãå ´åã«ã¯ï¼ãããã®ãã¯ã­ãç¨
+æããå¿
+è¦ã¯ãªãï¼
+
+(6-6-2-1) INT_ENTRY(inhno, inthdr)
+
+å²è¾¼ã¿ãã³ãã©çªå·ãinhnoï¼å²è¾¼ã¿ãã³ãã©ã®é¢æ°åãinthdrã§ããå²è¾¼ã¿ã
+ã³ãã©ã®åºå
+¥å£å¦çã®ã©ãã«ãä½ããã¯ã­ï¼INTHDR_ENTRYãç¨ãã¦å²è¾¼ã¿ãã³
+ãã©æ¯ã«åºå
+¥å£å¦çãçæããå ´åã«ã¯ï¼æ¬¡ã®ããã«å®ç¾©ããï¼
+
+#define INT_ENTRY(inhno, inthdr)	_kernel_##inthdr##_##inhno
+
+å²è¾¼ã¿ãã³ãã©æ¯ã«åºå
+¥å£å¦çãä½ãå¿
+è¦ããªãå ´åã«ã¯ï¼æ¬¡ã®ããã«å®ç¾©ã
+ã¦ï¼å²è¾¼ã¿ãã³ãã©ã®é¢æ°åããã®ã¾ã¾è¿ãï¼
+
+#define INT_ENTRY(inhno, inthdr)	inthdr
+
+(6-6-2-2) INTHDR_ENTRY(inhno, inhno_num, inthdr)
+
+å²è¾¼ã¿ãã³ãã©çªå·ãinhnoï¼å²è¾¼ã¿ãã³ãã©ã®é¢æ°åãinthdrã§ããå²è¾¼ã¿ã
+ã³ãã©ã®åºå
+¥å£å¦çãçæãããã¯ã­ï¼inhno_numã«ã¯ï¼ã¢ã»ã³ããªè¨èªè¨è¿°ç¨
+ã«ï¼å²è¾¼ã¿ãã³ãã©çªå·ãæ°å¤ã§æ¸¡ãããï¼å²è¾¼ã¿ãã³ãã©æ¯ã«åºå
+¥å£å¦çã
+ä½ãå¿
+è¦ããªãå ´åã«ã¯ï¼ç©ºã«å®ç¾©ããï¼
+
+6.6.3 å²è¾¼ã¿ãã³ãã©ã®è¨­å®
+
+(6-6-3-1) bool_t VALID_INHNO_DEFINH(INHNO inhno)ï¼ãªãã·ã§ã³ï¼
+
+inhnoãï¼DEF_INHã«å¯¾ããå²è¾¼ã¿ãã³ãã©çªå·ã¨ãã¦æå¹ãªå¤ã§ããå ´åã«
+trueï¼ããã§ãªãå ´åã«falseãè¿ããã¯ã­ï¼
+
+ASPã«ã¼ãã«ã®ã¿ã¼ã²ããéä¾å­é¨ã§ã¯ï¼ãã®ãã¯ã­ã¯ä½¿ããã¦ããªãããï¼ã¿ã¼
+ã²ããä¾å­é¨ã§ä½¿ããªããªãï¼ç¨æããå¿
+è¦ããªãï¼
+
+(6-6-3-2) void x_define_inh(INHNO inhno, FP int_entry)
+
+inhnoã§æå®ãããå²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦çã®çªå°ãint_entryã«è¨­å®ããï¼
+
+ãã®é¢æ°ã¯ï¼æ¨æºã®å²è¾¼ã¿ç®¡çæ©è½ã®åæåå¦çãç¨ããå ´åã®ã¿ï¼ã¿ã¼ã²ã
+ãéä¾å­é¨ããå¼ã³åºãããï¼å²è¾¼ã¿ç®¡çæ©è½ã®åæåå¦çãã¿ã¼ã²ããä¾å­
+é¨ã§ç¨æãï¼ãã®ä¸­ã§ãã®é¢æ°ãå¼ã³åºããªãå ´åã«ã¯ï¼ãã®é¢æ°ãç¨æãã
+å¿
+è¦ã¯ãªãï¼
+
+ãã®é¢æ°ã¯ï¼ã¿ã¼ã²ããéä¾å­é¨ã®ã«ã¼ãã«åæåå¦çããå¼ã³åºãããããï¼
+ã«ã¼ãã«ã®åæåå¦çï¼NMIãé¤ããã¹ã¦ã®å²è¾¼ã¿ããã¹ã¯ããã¦ããï¼ããå¼
+ã³åºããããã«å®è£
+ããã°ããï¼
+
+æå®ãããå²è¾¼ã¿ãã³ãã©çªå·ãDEF_INHã«å¯¾ãããã®ã¨ãã¦æå¹ãªå¤ã§ãªãå ´
+åã®åä½ã¯ä¿è¨¼ããå¿
+è¦ããªãï¼assertã§ã¨ã©ã¼ã¨ããã®ãæã¾ããï¼ï¼ãã
+ã¯ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãï¼ãã¹2ã®ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¿ã¼ã²ããä¾å­é¨
+ã§å®ç¾©ããINHNO_DEFINH_VALIDãç¨ãã¦ã¨ã©ã¼ãæ¤åºããããã§ããï¼
+
+6.6.4 å²è¾¼ã¿è¦æ±ã©ã¤ã³ã®å±æ§ã®è¨­å®
+
+(6-6-4-1) bool_t VALID_INTNO_CFGINT(INTNO intno)ï¼ãªãã·ã§ã³ï¼
+
+intnoãï¼å²è¾¼ã¿çªå·ã¨ãã¦æå¹ãªå¤ã§ããå ´åã«trueï¼ããã§ãªãå ´åã«
+falseãè¿ããã¯ã­ï¼CFG_INTã«ã¯ï¼ãã¹ã¦ã®å²è¾¼ã¿çªå·ãæå®ãããã¨ãã§ã
+ãããï¼ãã®ãã¯ã­ã¯ï¼intnoãæå¹ãªå¤ã®å ´åã«ã¯trueï¼intnoãç¡å¹ã®å¤ã®
+å ´åã«ã¯falseãè¿ãããã«ããï¼
+
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+è¦ããªãï¼
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+(6-6-4-2) void x_config_int(INTNO intno, ATR intatr, PRI intpri)
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+è¦ã¯ãªãï¼
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+ãã®é¢æ°ã¯ï¼ã¿ã¼ã²ããéä¾å­é¨ã®ã«ã¼ãã«åæåå¦çããå¼ã³åºãããããï¼
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+ãã®ä»ã«ï¼ã¿ã¼ã²ããå®ç¾©ã§å²è¾¼ã¿å±æ§ãè¿½å ãã¦ãããï¼ã¿ã¼ã²ããå®ç¾©ã§
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+ãããã®å±æ§åãã¿ã¼ã²ããå®ç¾©ã§è¿½å ããå ´åã«ã¯ï¼ãã®å±æ§å¤ãæ±ºå®ãï¼
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+åã®åä½ã¯ä¿è¨¼ããå¿
+è¦ããªãï¼assertã§ã¨ã©ã¼ã¨ããã®ãæã¾ããï¼ï¼ãã®
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+ã®ã¥ã¬ã¼ã¿ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¿ã¼ã²ããéä¾å­é¨ã¯ï¼ãã¹2ã®ãã³ãã¬ã¼
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+6.6.5 å²è¾¼ã¿ç®¡çæ©è½ã®åæåå¦çã®å¤æ´
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+(6-6-5-1) OMIT_INITIALIZE_INTERRUPTï¼ãªãã·ã§ã³ï¼
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+å²è¾¼ã¿ç®¡çæ©è½ã®åæåå¦çãã¿ã¼ã²ããä¾å­é¨ã§ç¨æãï¼ã¿ã¼ã²ããéä¾å­
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+(6-6-5-2) void initialize_interrupt(void)ï¼ãªãã·ã§ã³ï¼
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+(6-6-6-1) void default_int_handler(void)ï¼ãªãã·ã§ã³ï¼
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+6.6.7 ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿
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+ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãã³ãã©ã¯ï¼ã«ã¼ãã«å
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+¥å£å¦çãçµç±ã
+ãã«å®è¡ããã®ãåºæ¬ã§ããï¼
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+ãã ãï¼ãã¹ã¦ã®å²è¾¼ã¿ã§åãã¢ãã¬ã¹ã«åå²ãããã­ã»ããµã§ã¯ï¼ã«ã¼ãã«
+å
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+è¡ãããã¨ãã§ããªãããï¼å²è¾¼ã¿åºå
+¥å£å¦çã®ãªãã¹ãæ©ãã¿ã¤ãã³ã°ã§ï¼
+ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã§ããããå¤å¥ãï¼å¦çå
+å®¹ãåããå¿
+è¦ãããï¼å
+·
+ä½çã«ã¯ï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã®åºå
+¥å£å¦çã§ã¯ï¼ãªã¼ãã©ã³ãã³ãã©ã®
+åæ­¢ã¨åä½éå§ãè¡ã£ã¦ã¯ãªããªãï¼ã¾ãï¼reqflgããã§ãã¯ãï¼ã¿ã¹ã¯åæ
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+è¦ããªãï¼ããã«ï¼NMIã®åºå
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+å¦çã§ã¯ï¼ãã¬ã¼ã¹ã­ã°åå¾å¦çï¼log_inh_enterããã³log_inh_leaveï¼ãå¼
+ã³åºãã¦ã¯ãªããªãï¼
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+ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãã³ãã©ãå®è¡ããéã«ï¼ã«ã¼ãã«å
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+è¦ãããï¼
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+è¦ããªãï¼
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+è¦ã«ãªãï¼
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+åº¦ãå«ããï¼
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+ã»CFG_INTãã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã«å¯¾å¿ã§ããããã«ããï¼æ¨æºã®å²è¾¼ã¿ç®¡
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+è¦ã«ãªãï¼
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+ã»VALID_INTPRI_CHGIPMãï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã¨ãªãåªå
+åº¦ãæå¹ãªå¤ã¨
+ãå¤å®ããããã«ããï¼
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+ã»t_set_ipmãï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ã¨ãªãåªå
+åº¦ãæ±ããããã«ããï¼
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+6.6.8 å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®çæ
+
+(6-6-8-1) bool_t VALID_INTNO_CREISR(INTNO intno)
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+intnoãï¼acre_isrã«å¯¾ããå²è¾¼ã¿çªå·ã¨ãã¦æå¹ãªå¤ã§ããå ´åã«trueï¼ãã
+ã§ãªãå ´åã«falseãè¿ããã¯ã­ï¼åççææ©è½æ¡å¼µããã±ã¼ã¸ãä½¿ç¨ããªãå ´
+åã«ã¯ï¼å®ç¾©ããå¿
+è¦ããªãï¼
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+6.7.1 CPUä¾å¤ãã³ãã©ã®åºå
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+¥å£å¦çã®æ¹æ³ã¯ãã­ã»ããµã«ãã£ã¦å¤§ããç°ãªããï¼ããããã®
+å¦çå
+å®¹ã¯æ¬¡ã®éãï¼
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+----------------------------------------
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+¥å£å¦ç>(void)
+{
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ã«ä¿å­ãã
+	if (ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤) {
+		if (ã¿ã¹ã¯ã³ã³ãã­ã¹ãã§CPUä¾å¤çºç) {
+			ã¹ã¿ãã¯ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã«åãæãï¼
+									éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã â¦ (*j)
+		}
+		ã·ã¹ãã ç¶æ
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+		CPUä¾å¤ãã³ãã©ãï¼CPUä¾å¤ã®æ
+å ±ãè¨æ¶ãã¦ããé åã®å
+é ­çªå°ã
+									ãã©ã¡ã¼ã¿ï¼p_excinfï¼ã¨ãã¦å¼ã³åºã
+		if (ã¿ã¹ã¯ã³ã³ãã­ã¹ãã§CPUä¾å¤çºç) {
+			ã¹ã¿ãã¯ãã¿ã¹ã¯ç¨ã®ã¹ã¿ãã¯ã«æ»ãï¼
+									ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã â¦ (*j)
+		}
+		CPUä¾å¤å¦çããã®ãªã¿ã¼ã³å¾ã«ï¼CPUä¾å¤çºçæã®ã·ã¹ãã ç¶æ
+ã«
+													æ»ãããã«æºåãã
+	}
+	else {
+		if (ã¿ã¹ã¯ã³ã³ãã­ã¹ãã§CPUä¾å¤çºç) {
+			ï¼å°ãªãã¨ãï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+ã«ãã
+#ifdef TOPPERS_SUPPORT_OVRHDR
+			ovrtimer_stop();			/* ãªã¼ãã©ã³ã¿ã¤ãã®åæ­¢ */
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+			ã¹ã¿ãã¯ãéã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã«åãæãï¼
+									éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã
+		}
+		å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãï¼CPUä¾å¤çºçæã®å¤ã«è¨­å®ãï¼
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+ã«ããï¼CPUä¾å¤çºçæã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯
+				ãããåªå
+åº¦ã®é«ãå²è¾¼ã¿ãåãä»ããããã«ããï¼
+
+#ifdef LOG_EXC_ENTER
+		log_exc_enter(CPUä¾å¤ãã³ãã©çªå·);
+#endif /* LOG_EXC_ENTER */
+		CPUä¾å¤ãã³ãã©ãï¼CPUä¾å¤ã®æ
+å ±ãè¨æ¶ãã¦ããé åã®å
+é ­çªå°ã
+									ãã©ã¡ã¼ã¿ï¼p_excinfï¼ã¨ãã¦å¼ã³åºã
+#ifdef LOG_EXC_LEAVE
+		log_exc_leave(CPUä¾å¤ãã³ãã©çªå·);
+#endif /* LOG_EXC_LEAVE */
+
+	  ret_exc:
+		if (ã¿ã¹ã¯ã³ã³ãã­ã¹ãã§CPUä¾å¤çºç) {
+			ï¼å°ãªãã¨ãï¼ã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ãç¦æ­¢ããç¶æ
+ã«ãã â¦ (*d)
+			ã¹ã¿ãã¯ãã¿ã¹ã¯ç¨ã®ã¹ã¿ãã¯ã«æ»ãï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã
+																	â¦ (*g)
+			if (reqflg) {
+				reqflg = false;
+				CPUã­ãã¯ç¶æ
+ã«ãã â¦ (*e)
+				if (dspflg && p_runtsk != p_schedtsk) {
+					ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ã«ä¿å­ãã
+					ã¹ã¿ãã¯ãã¤ã³ã¿ãèªã¿ã¹ã¯ï¼p_runtskï¼ã®TCBã«ä¿å­ãã
+					ret_exc_rãï¼å®è¡åéçªå°ã¨ãã¦èªã¿ã¹ã¯ã®TCBã«ä¿å­ãã
+																	â¦ (*a)
+					dispatcherã«åå²ãã
+
+				  ret_exc_r:
+					ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãé¤ããã¹ã¦ã®ã¬ã¸ã¹ã¿ã
+												ã¹ã¿ãã¯ããå¾©å¸°ãã
+				}
+#ifdef TOPPERS_SUPPORT_OVRHDR
+				ovrtimer_start();		/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+				calltex(); â¦ (*b)
+			}
+#ifdef TOPPERS_SUPPORT_OVRHDR
+			else {
+				ovrtimer_start();		/* ãªã¼ãã©ã³ã¿ã¤ãã®åä½éå§ */
+			}
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+		}
+		CPUä¾å¤å¦çããã®ãªã¿ã¼ã³å¾ã«ï¼CPUã­ãã¯è§£é¤ç¶æ
+ã«æ»ãããã«æºåãã
+	}
+	ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãã¹ã¿ãã¯ããå¾©å¸°ãã
+	CPUä¾å¤å¦çããã®ãªã¿ã¼ã³
+}
+----------------------------------------
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+ã°ãããã¨ï¼
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+¥å£å¦çã®çæ
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+æããå¿
+è¦ã¯ãªãï¼
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+¥å£å¦çãçæããå ´åã«ã¯ï¼æ¬¡ã®ããã«å®ç¾©ããï¼
+
+#define EXC_ENTRY(excno, exchdr)	_kernel_##exchdr##_##excno
+
+CPUä¾å¤ãã³ãã©æ¯ã«åºå
+¥å£å¦çãä½ãå¿
+è¦ããªãå ´åã«ã¯ï¼æ¬¡ã®ããã«å®ç¾©ã
+ã¦ï¼CPUä¾å¤ãã³ãã©ã®é¢æ°åããã®ã¾ã¾è¿ãï¼
+
+#define EXC_ENTRY(excno, exchdr)	exchdr
+
+(6-7-2-2) EXCHDR_ENTRY(excno, excno_num, exchdr)
+
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+è¦ããªãï¼
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+(6-7-3-2) void x_define_exc(EXCNO excno, FP exc_entry)
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+(6-7-6-1) bool_t exc_sense_intmask(void *p_excinf)
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+¨å²è¾¼ã¿ã­ãã¯ç¶æ
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+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
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+(6-8-1) ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«
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+(a) ãã­ã»ããµç¶æ
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+è¦ã®ããã¿ã¼ã²ããã·ã¹ãã ä¾å­ã®åæå
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+è¦ã®ããåæåå¦çãè¿½å ããããã«ï¼ã¢ããª
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+	LOG_KER_ENTER		ã«ã¼ãã«ãåä½ãéå§ããç´åï¼åæåã®å®äºå¾ï¼
+	LOG_KER_LEAVE		ã«ã¼ãã«ã®çµäºï¼ext_kerï¼ãå¼ã°ããç´å¾ï¼çµäºå¦
+						çã®å®è¡åï¼
+
+(b) å¦çåä½ã®å®è¡éå§ã¨çµäº
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+	LOG_<å¦çåä½ç¥å·>_ENTER	å¦çåä½ã®å®è¡éå§ç´å
+	LOG_<å¦çåä½ç¥å·>_LEAVE	å¦çåä½ã®çµäºç´å¾
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+¥å£å¦çãã®ç¯ãåç
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+(c) ã¿ã¹ã¯ç¶æ
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+æ¬¡ã®ãã¯ã­ãå®ç¾©ãããã¨ã§ï¼ã¿ã¹ã¯ç¶æ
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+	LOG_TSKSTAT		ã¿ã¹ã¯ç¶æ
+ã®å¤å
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+(d) ãã£ã¹ãããã£ã®å®è¡éå§ã¨çµäº
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+æ¬¡ã®ãã¯ã­ãå®ç¾©ãããã¨ã§ï¼ãã£ã¹ãããã£ãå®è¡éå§ããæã¨ï¼çµäºãã
+æã®ãã¬ã¼ã¹ã­ã°ãåå¾ãããã¨ãã§ããï¼
+
+	LOG_DSP_ENTER	ãã£ã¹ãããã£ã®å®è¡éå§
+	LOG_DSP_LEAVE	ãã£ã¹ãããã£ã®çµäº
+
+ãã£ã¹ãããã£ã®å®è¡éå§ã¯ï¼ã¿ã¹ã¯ãå®è¡ç¶æ
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+å­é¨ã§å®è£
+ããå¿
+è¦ãããï¼è©³ããã¯ï¼ã6.2 ãã¬ã¼ã¹ã­ã°æ©è½ã¸ã®å¯¾å¿ãã¨
+ã6.5.2 ãã£ã¹ãããã£æ¬ä½ãã®ç¯ãåç
+§ãããã¨ï¼
+
+(e) ãµã¼ãã¹ã³ã¼ã«ã®å
+¥å£ã¨åºå£
+
+æ¬¡ã®ãã¯ã­ãå®ç¾©ãããã¨ã§ï¼åãµã¼ãã¹ã³ã¼ã«ã®å
+¥å£ã¨åºå£ã®ãã¬ã¼ã¹ã­ã°
+ãåå¾ãããã¨ãã§ããï¼
+
+	LOG_<ãµã¼ãã¹ã³ã¼ã«ã®å¤§æå­è¡¨è¨>_ENTER		ãµã¼ãã¹ã³ã¼ã«åã®å
+¥å£
+	LOG_<ãµã¼ãã¹ã³ã¼ã«ã®å¤§æå­è¡¨è¨>_LEAVE		ãµã¼ãã¹ã³ã¼ã«åã®åºå£
+
+ããããã®ãã¯ã­ã®åç§°ããã©ã¡ã¼ã¿ã®è©³ç´°ã«ã¤ãã¦ã¯ï¼ã«ã¼ãã«ã®ã½ã¼ã¹ã³ã¼
+ããåç
+§ãããã¨ï¼
+
+6.11.2 ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ã
+
+ãã¬ã¼ã¹ã­ã°ãè¨é²ããæ¹æ³ã®ä¸ä¾ã¨ãã¦ï¼ã¡ã¢ãªä¸ã«ãã¬ã¼ã¹ã­ã°ãè¨é²ã
+ãããã®ãµã³ãã«ã³ã¼ããarch/logtraceãã£ã¬ã¯ããªã«ç¨æãã¦ããï¼ãã®ãµ
+ã³ãã«ã³ã¼ãã¯ï¼ã·ã¹ãã ã­ã°æ©è½ã¨åæ§ã®ãã¬ã¼ã¹ã­ã°æ©è½ãç¨æãï¼ãã¬ã¼
+ã¹ã­ã°æ
+å ±ãã¡ã¢ãªä¸ã«è¨é²ããã¨ã¨ãã«ï¼ãããèª­ã¿åºãã¦è¡¨ç¤ºããæ©è½ã
+å®ç¾ãã¦ããï¼
+
+ãã®ãµã³ãã«ã³ã¼ããçµã¿è¾¼ãæ¹æ³ã¯æ¬¡ã®éãã§ããï¼
+
+(1) target_config.hããã³target_syssvc.hã«ï¼æ¬¡ã®è¨è¿°ãè¿½å ããï¼
+
+	#ifdef TOPPERS_ENABLE_TRACE
+	#include "logtrace/trace_config.h"
+	#endif /* TOPPERS_ENABLE_TRACE */
+
+(2) Makefile.targetã«ï¼æ¬¡ã®è¨è¿°ãè¿½å ããï¼
+
+	ifeq ($(ENABLE_TRACE),true)
+		COPTS := $(COPTS) -DTOPPERS_ENABLE_TRACE
+		KERNEL_DIR := $(KERNEL_DIR) $(SRCDIR)/arch/logtrace
+		KERNEL_COBJS := $(KERNEL_COBJS) trace_config.o trace_dump.o
+	endif
+
+(3) ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã§ï¼bssã»ã¯ã·ã§ã³ã®ã¯ãªã¢ãçç¥ãã¦ããå ´å
+    ã«ã¯ï¼trace_modeãTRACE_STOPï¼ï¼0ï¼ã«åæåããã³ã¼ããè¿½å ããï¼ã
+    ãã¯ï¼ãã¬ã¼ã¹ã­ã°æ©è½ãåæåãããåã«æ¸ãè¾¼ã¾ãããã¬ã¼ã¹ã­ã°ã
+    ç¡è¦ããããã§ããï¼
+
+ãã®ãµã³ãã«ã³ã¼ããç¨ãã¦ï¼ãã¬ã¼ã¹ã­ã°ãè¨é²ã»ãã³ãããæ¹æ³ã®ä¾ã«ã¤
+ãã¦ã¯ï¼ãTOPPERS/ASPã«ã¼ãã« ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ãã®ã11.6 ãã¬ã¼ã¹ã­
+ã°è¨é²ã®ãµã³ãã«ã³ã¼ãã®ä½¿ç¨æ¹æ³ãã®ç¯ãåç
+§ãããã¨ï¼
+
+ãªãï¼ãã®ãµã³ãã«ã³ã¼ãã§ã¯ï¼ãã£ã¹ãããã£ã®åºå£ï¼ã¿ã¹ã¯ã®ç¶æ
+é·ç§»ï¼
+ã·ã¹ãã ã­ã°ã®åºåã®3ã¤ã®ãã¬ã¼ã¹ã­ã°ã®ã¿ãè¨é²ãã¦ããï¼ä»ã®ãã¬ã¼ã¹ã­
+ã°ãè¨é²ãããå ´åã«ã¯ï¼trace_config.hï¼ããã³trace_dump.cï¼ãä¿®æ­£ãã
+å¿
+è¦ãããï¼ãªãï¼ã«ã¼ãã«ã®ãã¬ã¼ã¹ã­ã°ãç¶²ç¾
+çã«è¨é²ããããã®ã³ã¼ã
+ã¯ï¼TLVï¼TraceLogVisualizerï¼ã®é
+å¸ããã±ã¼ã¸ã«å«ã¾ãã¦ããï¼
+
+6.12 ã«ã¼ãã«å®è£
+ã®ã¿ã¼ã²ããä¾å­é¨ã®ããã®ãªãã¼ã è¨è¿°
+
+ã«ã¼ãã«å
+é¨ã«éãã¦ä½¿ãããé¢æ°ãå¤æ°ãªã©ã®åç§°ã§ï¼ãªãã¸ã§ã¯ããã¡ã¤
+ã«ã®ã·ã³ãã«è¡¨ã«ç»é²ããã¦å¤é¨ããåç
+§ã§ããåç§°ã¯ï¼Cè¨èªã¬ãã«ã§ï¼å
+é ­
+ã"_kernel_"ã¾ãã¯"_KERNEL_"ã§ããåç§°ã¨ããªããã°ãªããªããï¼ASPã«ã¼ã
+ã«ã§ã¯ï¼ã½ã¼ã¹ã³ã¼ããã³ã³ãã¯ãã«ä¿ã¡ã¤ã¤ãããå®ç¾ããããã«ï¼ãªãã¼
+ã è¨è¿°ãã¡ã¤ã«ãå°å
+¥ãã¦ããï¼
+
+å
+·ä½çã«ã¯ï¼ãªãã¼ã ãã¹ãåç§°ããªã¹ãã¢ããããxxx_rename.defãç¨æãï¼
+ãã®ãã¡ã¤ã«ãããã¼ã«ï¼utils/genrenameï¼ã«ããï¼åç§°ããªãã¼ã ãããã
+ã®ãã¯ã­å®ç¾©ãå«ãxxx_rename.hã¨ï¼ãããã®ãã¯ã­å®ç¾©ãè§£é¤ããããã®
+xxx_unrename.hãçæããï¼ãã¼ã«ã®èµ·åæ¹æ³ã¯æ¬¡ã®éãã§ããï¼
+
+	% genrename xxx
+
+xxx_rename.defã«ã¯ï¼ãªãã¼ã ãã¹ãåç§°ã1è¡ã«1ã¤è¨è¿°ããï¼xxxxã¨ããå
+ç§°ãè¨è¿°ããã¦ããå ´åï¼xxx_rename.hã«ã¯æ¬¡ã®ãããªè¨è¿°ãçæãããï¼
+
+#define xxxx				_kernel_xxxx
+#ifdef TOPPERS_LABEL_ASM
+#define _xxxx				__kernel_xxxx
+#endif /* TOPPERS_LABEL_ASM */
+
+ã¾ãï¼xxx_unrename.hã«ã¯æ¬¡ã®ãããªè¨è¿°ãçæãããï¼
+
+#undef xxxx
+#ifdef TOPPERS_LABEL_ASM
+#undef _xxxx
+#endif /* TOPPERS_LABEL_ASM */
+
+xxx_rename.defã®ä¸­ã«ã¯ï¼ä»ã®ãªãã¼ã è¨è¿°ãåãè¾¼ãããã«ï¼ãINCLUDE
+"yyy"ãã¾ãã¯ãINCLUDE <yyy>ãã¨ããè¨è¿°ãå«ãããã¨ãã§ããï¼ãã®è¨è¿°
+ãããã¦ããå ´åï¼xxx_rename.hã«ã¯ã#include "yyy_rename.h"ãã¾ãã¯
+ã#include <yyy_rename.h>ãã¨ããè¨è¿°ãï¼xxx_unrename.hã«ã¯ã#include
+"yyy_unrename.h"ãã¾ãã¯ã#include <yyy_unrename.h>ãã¨ããè¨è¿°ãçæã
+ããï¼
+
+xxx_rename.defã®ä¸­ã®"#"ã§å§ã¾ãè¡ã¯ã³ã¡ã³ãã¨ãã¦èª­ã¿é£ã°ãããï¼ã¾ãï¼
+ç©ºè¡ãç¡è¦ãããï¼
+
+ã«ã¼ãã«ã®ã¿ã¼ã²ããéä¾å­é¨ã§ä½¿ãããåç§°ããªãã¼ã ããããã«ï¼kernel
+ãã£ã¬ã¯ããªã«ï¼kernel_rename.defã¨ï¼ããããçæããkernel_rename.hã
+ãã³kernel_unrename.hãç¨æããã¦ããï¼kernel_rename.defã«ã¯ï¼
+ãINCLUDE "target"ãã¨ããè¨è¿°ãå«ã¾ãã¦ããï¼ã¿ã¼ã²ããä¾å­é¨ã®ãªãã¼
+ã è¨è¿°ãåãè¾¼ãããã«ãªã£ã¦ããï¼ã¿ã¼ã²ããä¾å­é¨ã§å®ç¾©ãï¼ã¿ã¼ã²ãã
+éä¾å­é¨ã§åç
+§ãããåç§°ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã®ãªãã¼ã è¨è¿°ã«å«ããï¼
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+ã¿ã¼ã²ããä¾å­é¨ã§ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã§ä½¿ãããåç§°ããªãã¼ã ãããã
+ã«ï¼target_rename.defã¨ï¼ããããçæããtarget_rename.hããã³
+target_unrename.hãç¨æããï¼ã¿ã¼ã²ããä¾å­é¨ãããã­ã»ããµã»ãããã»é
+çºç°å¢ä¾å­é¨ãåãåããå ´åã«ã¯ï¼target_rename.defã«INCLUDEè¨è¿°ãå
+¥ãï¼
+ãã­ã»ããµã»ãããã»éçºç°å¢ä¾å­é¨ã®ãªãã¼ã è¨è¿°ãåãè¾¼ãããã«ããï¼
+
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+
+ã¿ã¤ããã©ã¤ãã¯ï¼ã«ã¼ãã«ã«ã¿ã¤ã ãã£ãã¯ãéç¥ããããã®ã¿ã¤ããã©ã¤
+ãã§ããï¼
+
+6.13.1 ã¿ã¤ããã©ã¤ãã®ãã¡ã¤ã«æ§æ
+
+ã¿ã¤ããã©ã¤ããçµã¿è¾¼ãããã®éçAPIãè¨è¿°ããã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼
+ã·ã§ã³ãã¡ã¤ã«ãï¼target_timer.cfgã«ç¨æããï¼ãã®ãã¡ã¤ã«ã«ã¯ï¼ã¿ã¤ã
+ãã©ã¤ããåæåããããã®åæåã«ã¼ãã³ã®è¿½å ï¼ã¿ã¤ããã©ã¤ããçµäºã
+ããããã®çµäºå¦çã«ã¼ãã³ã®è¿½å ï¼ã¿ã¤ãå²è¾¼ã¿ã®ããã®å²è¾¼ã¿ãã³ãã©ã®
+å®ç¾©ï¼ã¾ãã¯ï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®è¿½å ï¼ï¼ã¿ã¤ãå²è¾¼ã¿ã®ããã®å²è¾¼
+ã¿è¦æ±ã©ã¤ã³ã®å±æ§ã®è¨­å®ã®éçAPIãªã©ãå«ããã¨ã«ãªãï¼
+
+ã¿ã¤ããã©ã¤ããå¼ã³åºãããã«å¿
+è¦ãªå®ç¾©ãå«ãããããã¡ã¤ã«ãï¼
+target_timer.hã«ç¨æããï¼ã¾ãï¼ã¿ã¤ããã©ã¤ãã®å®è£
+ãã¡ã¤ã«ã
+target_timer.cã«ç¨æããï¼
+
+ã¿ã¤ã ãã£ãã¯ã®éç¥ã«ããè¡ãå¦çã®å¤ãã¯ï¼ã¿ã¹ã¯ã®èµ·åãå¾
+ã¡è§£é¤ãè¡
+ããã®ã§ããããï¼ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿åªå
+åº¦ã¯ï¼å²è¾¼ã¿ã®ä¸­ã§æä½ã®åªå
+
+åº¦ã§ååã§ããï¼ãã ãï¼å¨æãã³ãã©ãã¢ã©ã¼ã ãã³ãã©ã®å®è¡éå§é
+ãã
+åé¡ã«ãªãå ´åã«ã¯ï¼ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿åªå
+åº¦ãããé«ãå¤ã«è¨­å®ãããï¼
+ããã§ï¼ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿åªå
+åº¦ãå¤æ´ããæ¹æ³ãï¼ã¿ã¼ã²ããä¾å­é¨ã®
+ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ã«è¨è¼ãã¹ãã§ããï¼
+
+6.13.2 ã¿ã¤ãã®åæåã»çµäºå¦çã»å²è¾¼ã¿å¦ç
+
+(6-13-2-1) void target_timer_initialize(intptr_t exinf)
+
+ã¿ã¤ããåæåãï¼ã¿ã¤ãå²è¾¼ã¿ãå¨æçã«çºçãããé¢æ°ï¼ã¿ã¤ãå²è¾¼ã¿ã®
+å¨æã¯ï¼TIC_NUMEã¨TIC_DENOã§æå®ãããæéã¨ä¸è´ãããï¼ã5.2 ã¿ã¤ã 
+ãã£ãã¯ã®å®ç¾©ãã®ç¯ãåç
+§ï¼ï¼
+
+ãã®é¢æ°ã¯ï¼target_timer.cfgä¸­ã«è¨è¿°ããéçAPIã«ããï¼åæåã«ã¼ãã³ã¨
+ãã¦ã«ã¼ãã«ã«ç»é²ãããã¨ãæ³å®ãã¦ããï¼
+
+(6-13-2-2) void target_timer_terminate(intptr_t exinf)
+
+ã¿ã¤ãã®åä½ãåæ­¢ããï¼ã¿ã¤ãå²è¾¼ã¿ãçºçããªãããã«ããé¢æ°ï¼
+
+ãã®é¢æ°ã¯ï¼target_timer.cfgä¸­ã«è¨è¿°ããéçAPIã«ããï¼çµäºå¦çã«ã¼ãã³
+ã¨ãã¦ã«ã¼ãã«ã«ç»é²ãããã¨ãæ³å®ãã¦ããï¼
+
+(6-13-2-3) void target_timer_handler(void)
+    ã¾ãã¯ void target_timer_isr(intptr_t exinf)
+
+ã¿ã¤ãå²è¾¼ã¿ã«ããèµ·åãããå²è¾¼ã¿å¦çãã­ã°ã©ã ï¼å²è¾¼ã¿ãã³ãã©ã¨ãã¦
+å®ç¾ããå ´åã«ã¯target_timer_handlerï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã¨ãã¦å®ç¾
+ããå ´åã«ã¯target_timer_isrã®åç§°ã¨ããï¼ã¿ã¼ã²ããéä¾å­é¨ã®
+signal_timeãå¼ã³åºãï¼
+
+target_timer_handlerã¯ï¼æ¨æºçã«ã¯æ¬¡ã®ããã«å®ç¾©ããï¼
+
+----------------------------------------
+void
+target_timer_handler(void)
+{
+	i_begin_int(<ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿çªå·>);
+	signal_time();
+	i_end_int(<ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿çªå·>);
+}
+----------------------------------------
+
+ãã®é¢æ°ã¯ï¼target_timer.cfgä¸­ã«è¨è¿°ããéçAPIã«ããï¼å²è¾¼ã¿ãã³ãã©ã¾
+ãã¯å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã¨ãã¦ã«ã¼ãã«ã«ç»é²ãããã¨ãæ³å®ãã¦ããï¼
+
+6.13.3 æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ã®åç
+§ã®ããã®æ©è½
+
+æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ã®åç
+§æ©è½ï¼get_utmï¼ããµãã¼ãããå ´åã«ã¯ï¼ã¿ã¤
+ããã©ã¤ãã§ï¼ä»¥ä¸ã®ãã¼ã¿åãé¢æ°ãªã©ãç¨æããï¼
+
+(6-13-3-1) OMIT_GET_UTMï¼ãªãã·ã§ã³ï¼
+
+ã¿ã¼ã²ããéä¾å­é¨ã®get_utmã®å®è£
+ãä½¿ç¨ããï¼ã¿ã¼ã²ããä¾å­é¨ã§get_utm
+ãç¨æããå ´åã«ã¯ï¼ãã®ã·ã³ãã«ããã¯ã­å®ç¾©ããï¼ãã®ã·ã³ãã«ããã¯ã­
+å®ç¾©ããå ´åï¼ä»¥ä¸ã®ãã¼ã¿åãé¢æ°ãªã©ãç¨æããå¿
+è¦ã¯ãªãï¼
+
+(6-13-3-2) CLOCK
+
+ã¿ã¤ãå¤ã®å
+é¨è¡¨ç¾ã®ããã®ãã¼ã¿åï¼
+
+(6-13-3-3) CLOCK target_timer_get_current(void)
+
+ã¿ã¤ãã®ç¾å¨å¤ãèª­ã¿åºãï¼å
+é¨è¡¨ç¾ã§è¿ãé¢æ°ï¼ã¿ã¤ãå¤ã¯ï¼æéã®çµéã¨
+ã¨ãã«å¢å ãããã¨ãæ³å®ãã¦ããï¼ãã¼ãã¦ã§ã¢ã®ã¿ã¤ããï¼ã¿ã¤ãå¤ãæ¸
+å°ãããã®ã§ããå ´åã«ã¯ï¼ãã®é¢æ°å
+ã§å¢å ããå¤ã¨ãªãããã«å¤æããï¼
+
+(6-13-3-4) bool_t target_timer_probe_int(void)
+
+ã¿ã¤ãå²è¾¼ã¿è¦æ±ããã§ãã¯ããé¢æ°ï¼ã¿ã¤ãå²è¾¼ã¿ãè¦æ±ããã¦ããå ´åã«
+trueï¼è¦æ±ããã¦ããªãå ´åã«falseãè¿ãï¼
+
+(6-13-3-5) TO_USEC(clock)
+
+ã¿ã¤ãå¤ã®å
+é¨è¡¨ç¾ãï¼1Î¼ç§åä½ã«å¤æããããã®ãã¯ã­ï¼ã¾ãã¯é¢æ°ï¼ï¼
+targettimer_get_currentã§èª­ã¿åºããå¤ãï¼ã¿ã¤ãå²è¾¼ã¿çºçããã®çµéæé
+ï¼åä½: 1Î¼ç§ï¼ã«å¤æããããã«ç¨ããï¼
+
+6.14 ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ãï¼ãªãã·ã§ã³ï¼
+
+ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ãã¯ï¼ãªã¼ãã©ã³ãã³ãã©ãèµ·åããããã®ã¿ã¤ãã®
+ãã©ã¤ãã§ããï¼ãªã¼ãã©ã³ãã³ãã©æ©è½æ¡å¼µããã±ã¼ã¸ããµãã¼ãããªãå ´
+åã«ã¯ï¼ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ããç¨æããå¿
+è¦ã¯ãªãï¼
+
+6.14.1 ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ãã®ãã¡ã¤ã«æ§æ
+
+ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ãã¯ï¼ã¿ã¤ããã©ã¤ãã¨åããã¡ã¤ã«ã®ä¸­ã«è¨è¿°ããï¼
+ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ãã®ããã®è¨è¿°ã¯ï¼TOPPERS_SUPPORT_OVRHDRããã¯ã­
+å®ç¾©ããã¦ããå ´åã«ã®ã¿æå¹ã«ãªãããã«ããï¼
+
+ããªãã¡ï¼ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ããçµã¿è¾¼ãããã®éçAPIã¯
+target_timer.cfgã®ä¸­ã«è¨è¿°ããï¼ãã®ãã¡ã¤ã«ã«ã¯ï¼ãªã¼ãã©ã³ã¿ã¤ããã©
+ã¤ããåæåããããã®åæåã«ã¼ãã³ã®è¿½å ï¼ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ãã
+çµäºãããããã®çµäºå¦çã«ã¼ãã³ã®è¿½å ï¼ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ã®ããã®
+å²è¾¼ã¿ãã³ãã©ã®å®ç¾©ï¼ã¾ãã¯ï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®è¿½å ï¼ï¼ãªã¼ãã©
+ã³ã¿ã¤ãå²è¾¼ã¿ã®ããã®å²è¾¼ã¿è¦æ±ã©ã¤ã³ã®å±æ§ã®è¨­å®ã®éçAPIãªã©ãå«ãã
+ã¨ã«ãªãï¼
+
+ã¾ãï¼ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ããå¼ã³åºãããã«å¿
+è¦ãªå®ç¾©ã¯
+target_timer.hã®ä¸­ã«ï¼ãªã¼ãã©ã³ã¿ã¤ããã©ã¤ãã®å®è£
+ã¯target_timer.cã®
+ä¸­ã«è¨è¿°ããï¼
+
+ãªã¼ãã©ã³ãã³ãã©ã¯ï¼ã¿ã¹ã¯ã®ãªã¼ãã©ã³ã«å¯¾ããå¦çãè¡ããã®ã§ããã
+ãï¼ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿åªå
+åº¦ã¯ï¼å²è¾¼ã¿ã®ä¸­ã§æä½ã®åªå
+åº¦ã§
+ååã§ããï¼ãã ãï¼ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿åªå
+åº¦ãããé«ãå¤ã«
+è¨­å®ãããå ´åããªãã¨ã¯è¨ããªãããï¼ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿åª
+å
+åº¦ãå¤æ´ããæ¹æ³ãï¼ã¿ã¼ã²ããä¾å­é¨ã®ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ã«è¨è¼ãã¹
+ãã§ããï¼
+
+6.14.2 ãªã¼ãã©ã³ã¿ã¤ãã®æä½ã¨å²è¾¼ã¿å¦ç
+
+(6-14-2-1) void target_ovrtimer_initialize(intptr_t exinf)
+
+ãªã¼ãã©ã³ã¿ã¤ãã®åæåå¦çãè¡ãï¼ã¿ã¤ãã®åä½éå§ã¯è¡ããªãï¼
+
+ãã®é¢æ°ã¯ï¼target_timer.cfgä¸­ã«è¨è¿°ããéçAPIã«ããï¼åæåã«ã¼ãã³ã¨
+ãã¦ã«ã¼ãã«ã«ç»é²ãããã¨ãæ³å®ãã¦ããï¼
+
+(6-14-2-2) void target_ovrtimer_terminate(intptr_t exinf)
+
+ãªã¼ãã©ã³ã¿ã¤ããåæ­¢ããï¼ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ãçºçããªãããã«ã
+ãï¼
+
+ãã®é¢æ°ã¯ï¼target_timer.cfgä¸­ã«è¨è¿°ããéçAPIã«ããï¼çµäºå¦çã«ã¼ãã³
+ã¨ãã¦ã«ã¼ãã«ã«ç»é²ãããã¨ãæ³å®ãã¦ããï¼
+
+(6-14-2-3) void target_ovrtimer_start(OVRTIM ovrtim)
+
+ãªã¼ãã©ã³ã¿ã¤ãã«ï¼æ®ãæéovrtimãè¨­å®ãï¼åä½éå§ããï¼ovrtimã®åä½
+ã¯ãã¤ã¯ã­ç§ã¨ããï¼
+
+(6-14-2-4) OVRTIM target_ovrtimer_stop(void)
+
+ãªã¼ãã©ã³ã¿ã¤ããåæ­¢ãï¼ã¿ã¤ãã®æ®ãæéãèª­ã¿åºãï¼ããæ®ãæéã
+0ï¼ã¾ãã¯ããæªæºï¼ã«ãªã£ã¦ããå ´åã«ã¯ï¼1ãè¿ãï¼ã¾ãï¼ãªã¼ãã©ã³ã¿ã¤
+ãããã®å²è¾¼ã¿ãã¯ãªã¢ããï¼
+
+(6-14-2-5) OVRTIM target_ovrtimer_get_current(void)
+
+ãªã¼ãã©ã³ã¿ã¤ãã®æ®ãæéãèª­ã¿åºãï¼ããæ®ãæéã0ï¼ã¾ãã¯ããæªæºï¼
+ã«ãªã£ã¦ããå ´åã«ã¯ï¼0ãè¿ãï¼ãªã¼ãã©ã³ã¿ã¤ãããã®å²è¾¼ã¿ã¯ã¯ãªã¢ããª
+ãï¼
+
+(6-14-2-6) void target_ovrtimer_handler(void)
+    ã¾ãã¯ void target_ovrtimer_isr(intptr_t exinf)
+
+ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ã«ããèµ·åãããå²è¾¼ã¿å¦çãã­ã°ã©ã ï¼å²è¾¼ã¿ãã³
+ãã©ã¨ãã¦å®ç¾ããå ´åã«ã¯target_ovrtimer_handlerï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ã
+ã³ã¨ãã¦å®ç¾ããå ´åã«ã¯target_ovrtimer_isrã®åç§°ã¨ããï¼ã¿ã¼ã²ããéä¾
+å­é¨ã®call_ovrhdrãå¼ã³åºãï¼
+
+target_timer_handlerã¯ï¼æ¨æºçã«ã¯æ¬¡ã®ããã«å®ç¾©ããï¼
+
+----------------------------------------
+void
+target_ovrtimer_handler(void)
+{
+	i_begin_int(<ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿çªå·>);
+	ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿è¦æ±ã®ã¯ãªã¢ï¼å¿
+è¦ãªãï¼
+	call_ovrhdr();
+	i_end_int(<ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ã®å²è¾¼ã¿çªå·>);
+}
+----------------------------------------
+
+ãã®é¢æ°ã¯ï¼target_timer.cfgä¸­ã«è¨è¿°ããéçAPIã«ããï¼å²è¾¼ã¿ãã³ãã©ã¾
+ãã¯å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã¨ãã¦ã«ã¼ãã«ã«ç»é²ãããã¨ãæ³å®ãã¦ããï¼
+
+(6-14-2-7) OMIT_OVRTIMER_START
+(6-14-2-8) OMIT_OVRTIMER_STOP
+
+ã¿ã¼ã²ããä¾å­é¨ããå¼ã³åºãovrtimer_startã¨ovrtimer_stopãï¼ã¢ã»ã³ããª
+è¨èªã®ã½ã¼ã¹ã³ã¼ãä¸­ã«å±éãï¼Cè¨èªã®é¢æ°ãä¸è¦ã«ãªãå ´åã«ã¯ï¼ããããï¼
+OMIT_OVRTIMER_STARTã¨OMIT_OVRTIMER_STOPããã¯ã­å®ç¾©ããï¼
+
+6.15 åçã¡ã¢ãªç®¡çï¼ãªãã·ã§ã³ï¼
+
+åççææ©è½æ¡å¼µããã±ã¼ã¸ãä½¿ç¨ããå ´åã«ã¯ï¼ã«ã¼ãã«å
+ã§ã®åçã¡ã¢ãª
+ç®¡çã®æ¹æ³ãæ±ºããå¿
+è¦ãããï¼
+
+åççææ©è½æ¡å¼µããã±ã¼ã¸ã®ã¿ã¼ã²ããéä¾å­é¨ã§ã¯ï¼ã¡ã¢ãªé åãå
+é ­ã
+ãé ã«å²ãå½ã¦ï¼è§£æ¾ãããã¡ã¢ãªé åãåå©ç¨ããªãã¡ã¢ãªç®¡çã¢ã¸ã¥ã¼ã«
+ã®ã¿ãå®è£
+ãã¦ããï¼ããã©ã«ãã§ã¯ï¼ãã®ã¡ã¢ãªç®¡çã¢ã¸ã¥ã¼ã«ãä½¿ç¨ãã
+ãï¼
+
+æ¬æ ¼çãªåçã¡ã¢ãªç®¡çãè¡ãããå ´åã«ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã¾ãã¯ã¦ã¼ã¶
+å´ã§ï¼ä»¥ä¸ã®é¢æ°ãå®ç¾©ããã¡ã¢ãªç®¡çã¢ã¸ã¥ã¼ã«ãç¨æããå¿
+è¦ãããï¼
+
+(6-15-1) OMIT_KMM_ALLOCONLYï¼ãªãã·ã§ã³ï¼
+
+ã¿ã¼ã²ããéä¾å­é¨ã®ã¡ã¢ãªç®¡çã¢ã¸ã¥ã¼ã«ãä½¿ç¨ããï¼ã¿ã¼ã²ããä¾å­é¨ã¾
+ãã¯ã¦ã¼ã¶å´ã§ç¨æããå ´åã«ã¯ï¼ãã®ã·ã³ãã«ããã¯ã­å®ç¾©ããï¼
+
+(6-15-2) void initialize_kmm(void)ï¼ãªãã·ã§ã³ï¼
+
+ã¡ã¢ãªç®¡çã¢ã¸ã¥ã¼ã«ãåæåããé¢æ°ï¼ã«ã¼ãã«ã®å²ãä»ããã¡ã¢ãªé åã®
+ãµã¤ãºã¨å
+é ­çªå°ã¯ï¼ããããkmmszã¨kmmã«ãã£ã¦åç
+§ã§ããï¼
+
+(6-15-3) void *kernel_malloc(SIZE size)ï¼ãªãã·ã§ã³ï¼
+
+sizeã§æå®ããããµã¤ãºã®ã¡ã¢ãªé åãå²ãä»ãï¼ãã®å
+é ­çªå°ãè¿ãé¢æ°ï¼
+å²ãä»ãããã¨ãã§ããªãå ´åã«ã¯ï¼NULLãè¿ãï¼
+
+(6-15-4) void kernel_free(void *ptr)ï¼ãªãã·ã§ã³ï¼
+
+ptrã§æå®ãããã¡ã¢ãªé åãè§£æ¾ããé¢æ°ï¼
+
+6.15.1 TLSFãç¨ããã¡ã¢ãªç®¡çã¢ã¸ã¥ã¼ã«ã®ä¾
+
+ãªã¼ãã³ã½ã¼ã¹ã®ã¡ã¢ãªå²ä»ãã©ã¤ãã©ãªã§ããTLSFãç¨ãã¦åçã¡ã¢ãªç®¡ç
+ãå®ç¾ããã«ã¯ï¼OMIT_KMM_ALLOCONLYããã¯ã­å®ç¾©ãï¼ä»¥ä¸ã®é¢æ°å®ç¾©ç­ãCè¨
+èªã½ã¼ã¹ãã¡ã¤ã«ã«å«ããã°ããï¼
+
+----------------------------------------
+#include "tlsf.h"
+
+static bool_t	tlsf_initialized = false;
+
+void
+initialize_kmm(void)
+{
+	if (init_memory_pool(kmmsz, kmm) >= 0) {
+		tlsf_initialized = true;
+	}
+}
+
+void *
+kernel_malloc(SIZE size)
+{
+	if (tlsf_initialized) {
+		return(malloc_ex(size, kmm));
+	}
+	else {
+		return(NULL);
+	}
+}
+
+void
+kernel_free(void *ptr)
+{
+	if (tlsf_initialized) {
+		free_ex(ptr, kmm);
+	}
+}
+----------------------------------------
+
+
+ï¼ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿è¨­å®ãã¡ã¤ã«ã®ã¿ã¼ã²ããä¾å­é¨
+
+7.1 è¨­å®ãã¡ã¤ã«ã¨ã¿ã¼ã²ããä¾å­é¨ã®ä½ç½®ä»ã
+
+ASPã«ã¼ãã«ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã¯ï¼è¨­å®ãã¡ã¤ã«ã®è¨è¿°ã«å¾ã£ã¦ãã¡ã¤ã«ã®
+çæããã³ã¨ã©ã¼ãã§ãã¯ãè¡ãï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®è¨­å®ãã¡ã¤ã«ã«ã¯ï¼
+ä»¥ä¸ã®4ã¤ãããï¼
+
+(a) éçAPIãã¼ãã«
+
+éçAPIã®ä¸è¦§ã¨ï¼åéçAPIã®ãã©ã¡ã¼ã¿ã«ã¤ãã¦è¨è¿°ãããã¡ã¤ã«ï¼éç
+APIãæ¡å¼µããå ´åä»¥å¤ã¯å¤æ´ããå¿
+è¦ããªãããï¼ã¿ã¼ã²ããéä¾å­é¨ã§ç¨æ
+ãã¦ããï¼kernel/kernel_api.csvï¼ï¼
+
+(b) å¤åå¾ã·ã³ãã«ãã¼ãã«
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ãã¹1ã«ããã¦ï¼ãã©ã¡ã¼ã¿è¨ç®ç¨Cè¨èªãã¡ã¤ã«ã«åºå
+ãï¼å¤ãæ±ãããã·ã³ãã«ï¼ä¸è¬ã«ã¯å¼ï¼ãè¨è¿°ããããã®ãã¡ã¤ã«ï¼ã¿ã¼ã²ã
+ãéä¾å­é¨ã§ã¯ï¼ã¿ã¼ã²ããã«ä¾å­ããã«å¿
+è¦ã¨ãªãã·ã³ãã«ãè¨è¿°ãããã¡
+ã¤ã«ãç¨æãã¦ããï¼kernel/kernel_def.csvï¼ï¼
+
+ã¿ã¼ã²ããã«ä¾å­ãã¦å¿
+è¦ã¨ãªãã·ã³ãã«ãããå ´åã«ã¯ï¼targetãã£ã¬ã¯ã
+ãªã«ç½®ãããtarget_def.csvä¸­ã«è¨è¿°ããï¼target_def.csvä¸­ã«è¨è¿°ãã¦å¤ã
+æ±ãããã¨ãã§ããã·ã³ãã«ã¯ï¼kernel/kernel_int.hããã³ããããã¤ã³ã¯ã«ã¼
+ãããããã¡ã¤ã«ã§å®ç¾©ããã¦ããªããã°ãªããªãï¼kernel_int.hããã¯ï¼
+target_stddef.hï¼target_kernel.hï¼target_config.hãï¼éæ¥çã«ï¼ã¤ã³ã¯ã«ã¼
+ããã¦ããããï¼ãããã®ãã¡ã¤ã«ããã³ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤
+ã«ã§å®ç¾©ãããã¿ã¼ã²ããä¾å­ã®ã·ã³ãã«ã¯ï¼target_def.csvä¸­ã«è¨è¿°ããã
+ã¨ãã§ããï¼
+
+ããã§å¤ãæ±ããã·ã³ãã«ã®å¤ã¯ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ãã¹2ããã³ãã¹3ã®
+ãã³ãã¬ã¼ããã¡ã¤ã«ä¸­ã§åç
+§ãããã¨ãã§ããï¼
+
+(c) ãã¹2ã®ãã³ãã¬ã¼ããã¡ã¤ã«
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ãã¹2ã¯ï¼ãã³ãã¬ã¼ããã¡ã¤ã«ã«å¾ã£ã¦ï¼ã«ã¼ãã«ã®æ§
+æã»åæåãã¡ã¤ã«ï¼kernel_cfg.cï¼ï¼æ§æã»åæåããããã¡ã¤ã«
+ï¼kernel_cfg.hï¼ãªã©ãçæããï¼ãã®ãã³ãã¬ã¼ããã¡ã¤ã«ã¯ï¼ã¿ã¼ã²ãã
+éä¾å­é¨ã¨ã¿ã¼ã²ããä¾å­é¨ã«åãåãã¦ãããï¼ä»ã®ãã¡ã¤ã«ã®ã¿ã¼ã²ãã
+ä¾å­é¨ã¨ã¯éã«ï¼ã¿ã¼ã²ããä¾å­é¨ããã¿ã¼ã²ããéä¾å­é¨ãã¤ã³ã¯ã«ã¼ãã
+ãå½¢ã«ãªã£ã¦ããï¼
+
+å
+·ä½çã«ã¯ï¼targetãã£ã¬ã¯ããªã«ç½®ãããtarget.tfã§ï¼å¿
+è¦ãªå¤æ°ãå®ç¾©ã
+ãå¾ï¼ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¿ã¼ã²ããéä¾å­é¨ï¼kernel/kernel.tfï¼ãã¤
+ã³ã¯ã«ã¼ãããï¼kernel.tfã§ã¯ï¼ã«ã¼ãã«ã®ã¿ã¼ã²ããéä¾å­é¨ã§ä½¿ç¨ããå¤
+æ°å®ç¾©ç­ãçæããï¼kernel.tfãã¤ã³ã¯ã«ã¼ãããå¾ï¼target.tfã§ã¯ï¼ã«ã¼
+ãã«ã®ã¿ã¼ã²ããä¾å­é¨ã§ä½¿ç¨ããå¤æ°å®ç¾©ç­ãçæããï¼target.tfããï¼ã
+ã­ã»ããµä¾å­é¨ï¼ãããä¾å­é¨ãï¼éçºç°å¢ä¾å­é¨ãåãåãã¦ãããï¼
+
+(d) ãã¹3ã®ãã³ãã¬ã¼ããã¡ã¤ã«
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ãã¹3ã¯ï¼ãã³ãã¬ã¼ããã¡ã¤ã«ã«å¾ã£ã¦ï¼éçAPIã®ä¸
+è¬å®æ°å¼ãã©ã¡ã¼ã¿ã®ãã§ãã¯ãè¡ãï¼ãã®ãã³ãã¬ã¼ããã¡ã¤ã«ãï¼ã¿ã¼ã²ã
+ãéä¾å­é¨ã¨ã¿ã¼ã²ããä¾å­é¨ã«åãåãã¦ããï¼ã¿ã¼ã²ããä¾å­é¨ããã¿ã¼
+ã²ããéä¾å­é¨ãã¤ã³ã¯ã«ã¼ãããå½¢ã«ãªã£ã¦ããï¼
+
+å
+·ä½çã«ã¯ï¼targetãã£ã¬ã¯ããªã«ç½®ãããtarget_check.tfã§ï¼å¿
+è¦ãªå¤æ°ã
+å®ç¾©ããå¾ï¼ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¿ã¼ã²ããéä¾å­é¨
+ï¼kernel/kernel_check.tfï¼ãã¤ã³ã¯ã«ã¼ãããï¼kernel_check.tfã§ã¯ï¼ã«ã¼
+ãã«ã®ã¿ã¼ã²ããéä¾å­é¨ã§åæåãã­ãã¯ã«åºåããä¸è¬å®æ°å¼ãã©ã¡ã¼ã¿
+ã®ãã§ãã¯ãè¡ãï¼kernel_check.tfãã¤ã³ã¯ã«ã¼ãããå¾ï¼target_check.tf
+ã§ã¯ï¼ã¿ã¼ã²ããã«ä¾å­ãããã§ãã¯ãè¡ãï¼target_check.tfããï¼ãã­ã»ã
+ãµä¾å­é¨ï¼ãããä¾å­é¨ãï¼éçºç°å¢ä¾å­é¨ãåãåãã¦ãããï¼
+
+ãªãï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®è©³ç´°ä»æ§ã¨è¨­å®ãã¡ã¤ã«ã®è¨è¿°æ¹æ³ã«ã¤ãã¦ã¯ï¼
+å¥éPDFãã¡ã¤ã«ã®å½¢ã§é
+å¸ãã¦ãããTOPPERSæ°ä¸ä»£ã«ã¼ãã«ç¨ã³ã³ãã£ã®ã¥
+ã¬ã¼ã¿ä»æ§ãããã³ãTOPPERSæ°ä¸ä»£ã«ã¼ãã«ç¨ã³ã³ãã£ã®ã¥ã¬ã¼ã¿å
+èµãã¯ã­
+ãã­ã»ããµä»æ§ããåç
+§ãããã¨ï¼
+
+7.2 ãã¹2ã®ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¿ã¼ã²ããä¾å­é¨
+
+ä»¥ä¸ã§ã¯ï¼ãã¹2ã®ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¿ã¼ã²ããä¾å­é¨ãè¨è¿°ããä¸ã§å¿
+
+è¦ãªäºé 
+ã«ã¤ãã¦èª¬æããï¼
+
+7.2.1 ã¿ã¼ã²ããéä¾å­é¨ãã¤ã³ã¯ã«ã¼ãããåã«å®ç¾©ãã¹ãå¤æ°
+
+target.tfããkernel.tfãã¤ã³ã¯ã«ã¼ãããåã«ï¼æ¬¡ã®å¤æ°ãå®ç¾©ãã¦ãããª
+ããã°ãªããªãï¼
+
+(7-2-1-1) INTNO_ATTISR_VALID	ATT_ISRã§ä½¿ç¨ã§ããå²è¾¼ã¿çªå·
+(7-2-1-2) INHNO_ATTISR_VALID	INTNO_ATTISR_VALIDã«å¯¾å¿ããå²è¾¼ãã³ãã©çªå·
+(7-2-1-3) INHNO_DEFINH_VALID	DEF_INTã§ä½¿ç¨ã§ããå²è¾¼ã¿ãã³ãã©çªå·
+(7-2-1-4) EXCNO_DEFEXC_VALID	DEF_EXCã§ä½¿ç¨ã§ããCPUä¾å¤ãã³ãã©çªå·
+(7-2-1-5) INTNO_CFGINT_VALID	CFG_INTã§ä½¿ç¨ã§ããå²è¾¼ã¿çªå·
+(7-2-1-6) INTPRI_CFGINT_VALID	CFG_INTã§ä½¿ç¨ã§ããå²è¾¼ã¿åªå
+åº¦
+
+APIã§ä½¿ç¨ã§ããå²è¾¼ã¿çªå·ï¼å²è¾¼ã¿ãã³ãã©çªå·ï¼CPUä¾å¤ãã³ãã©çªå·ï¼å²
+è¾¼ã¿åªå
+åº¦ã®ãªã¹ããï¼åå¤æ°ã«å®ç¾©ããï¼INHNO_ATTISR_VALIDã«ã¯ï¼
+INTNO_ATTISR_VALIDã«ãªã¹ãã¢ããããå²è¾¼ã¿çªå·ã«å¯¾å¿ããå²è¾¼ã¿ãã³ãã©
+çªå·ã®ãªã¹ããå®ç¾©ããï¼CFG_INTã«ã¯ï¼ãã¹ã¦ã®å²è¾¼ã¿çªå·ãæå®ãããã¨ã
+ã§ããããï¼INTNO_CFGINT_VALIDã«ã¯ï¼æå¹ãªå²è¾¼ã¿çªå·ããã¹ã¦ãªã¹ãã¢ã
+ãããï¼
+
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+											å²è¾¼ã¿çªå·
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+}
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+{
+}
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+const SIZE		_kernel_istksz = 0;
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+(8-3-1-1) TNUM_PORT
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+(8-3-1-2) void sio_initialize(intptr_t exinf)ï¼ãªãã·ã§ã³ï¼
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+(8-3-1-3) void sio_terminate(intptr_t exinf)ï¼ãªãã·ã§ã³ï¼
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+(8-3-1-4) void sio_isr(intptr_t exinf)
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+(8-3-1-5) SIOPCB
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+(8-3-1-6) SIO_RDY_SNDã¨SIO_RDY_RCV
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+éä¿¡å¯è½ã³ã¼ã«ããã¯ã®è­å¥çªå·ãSIO_RDY_SNDã«ï¼åä¿¡éç¥ã³ã¼ã«ããã¯ã®è­
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+ãã¹ã³ã¼ã«ï¼sio_ena_cbrã¨sio_dis_cbrï¼ã§ç¨ããï¼
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+8.3.2 ããã¤ã¹ãµã¼ãã¹ã«ã¼ãã³
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+ä»¥ä¸ã®ããã¤ã¹ãµã¼ãã«ã«ã¼ãã³ã¯ï¼ï¼å°ãªãã¨ãï¼ã·ãªã¢ã«I/Oãã¼ãããã®
+å²è¾¼ã¿ããã¹ã¯ãããç¶æ
+ã§å¼ã³åºãããï¼ã¾ãï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼éã¿
+ã¹ã¯ã³ã³ãã­ã¹ãã®ãããã§å¼ã³åºãããå ´åãããï¼ãããã§å¼ã³åºããã¦
+ãåä½ããããã«ããªããã°ãªããªãï¼ï¼
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+(8-3-2-1) SIOPCB *sio_opn_por(ID siopid, intptr_t exinf)
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+(8-3-2-2) void sio_cls_por(SIOPCB *siopcb)
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+(8-3-2-3) bool_t sio_snd_chr(SIOPCB *siopcb, char c)
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+æå­ãéä¿¡ã¬ã¸ã¹ã¿ã«å
+¥ããå ´åã«ã¯trueãï¼åã«éä¿¡ããæå­ã®éä¿¡ãçµãã£
+ã¦ããªãããã«ï¼æå­ãéä¿¡ã¬ã¸ã¹ã¿ã«å
+¥ããããªãã£ãå ´åã«ã¯falseãè¿ãï¼
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+(8-3-2-4) int_t sio_rcv_chr(SIOPCB *siopcb)
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+siopcbã§æå®ãããã·ãªã¢ã«I/Oãã¼ãããæå­ãèª­ãé¢æ°ï¼æå­ãåä¿¡ãã¦ã
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+(8-3-2-5) void sio_ena_cbr(SIOPCB *siopcb, uint_t cbrtn)
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+(8-3-2-6) void sio_dis_cbr(SIOPCB *siopcb, uint_t cbrtn)
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+ã¿ã¼ã²ããä¾å­é¨ã¯ï¼å¿
+è¦ãªã¿ã¤ãã³ã°ã§ï¼ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ã
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+ã³ã¼ã«ããã¯ã«ã¼ãã³ã¯ï¼ï¼å°ãªãã¨ãï¼ã·ãªã¢ã«I/Oãã¼ãããã®å²è¾¼ã¿ãç¦
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+(8-3-3-1) void sio_irdy_snd(intptr_t exinf)
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+éä¿¡å¯è½ã³ã¼ã«ããã¯ã«ã¼ãã³ï¼ã·ãªã¢ã«I/Oãã¼ãã«å¯¾ãã¦æå­ãéä¿¡ã§ãã
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+ä¿¡ãã¹ãæå­ããªãå ´åã«ã¯éä¿¡å¯è½ã³ã¼ã«ããã¯ãç¦æ­¢ããï¼
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+(8-3-3-2) void sio_irdy_rcv(intptr_t exinf)
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+8.4 ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºåã®ã¿ã¼ã²ããä¾å­å®ç¾©
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+ã¿ã¼ã²ããä¾å­é¨ã§æä¾ãã¹ãã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºåã®ããã®å®ç¾©ã¯
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+(8-4-1) TARGET_NAME
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+ã¿ã¼ã²ããã®åç§°ã«å®ç¾©ããï¼
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+(8-4-2) TARGET_COPYRIGHTï¼ãªãã·ã§ã³ï¼
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+ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã«ï¼ã¿ã¼ã²ããä¾å­é¨ã®èä½æ¨©è¡¨ç¤ºãè¿½å ããããã®
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+ã¿ã¼ã²ããä¾å­é¨ã§æä¾ãã¹ããµã³ãã«ãã­ã°ã©ã ããã³ãã¹ããã­ã°ã©ã ã®
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+(8-5-1) STACK_SIZEï¼ãªãã·ã§ã³ï¼
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+(8-5-3) RAISE_CPU_EXCEPTIONï¼ãªãã·ã§ã³ï¼
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+(8-5-5) TASK_PORTIDï¼ãªãã·ã§ã³ï¼
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+(8-5-6) LOOP_REFï¼ãªãã·ã§ã³ï¼
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+ãµã³ãã«ãã­ã°ã©ã ã«ããã¦ï¼ãã­ã»ããµã®éåº¦ãè¨æ¸¬ããããã®ã«ã¼ãåæ°
+ãå®ç¾©ãããã¯ã­ï¼å®ç¾©ããªãå ´åã®ããã©ã«ãå¤ã¯1000000ï¼ããã©ã«ãè¨­å®
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+æ°ã«å®ç¾©ããï¼
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+(8-5-7) MEASURE_TWICEï¼ãªãã·ã§ã³ï¼
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+ãµã³ãã«ãã­ã°ã©ã ã«ããã¦ï¼ãã­ã»ããµã®éåº¦ã2åº¦è¨æ¸¬ããå ´åã«å®ç¾©ãã
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+è¨æ¸¬ã§ã¯è¨æ¸¬çµæãå®å®ããªãå ´åã«å®ç¾©ããï¼
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+(8-5-8) TASK_LOOPï¼ãªãã·ã§ã³ï¼
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+ãµã³ãã«ãã­ã°ã©ã ã«ããã¦ï¼ãã­ã»ããµã®éåº¦ãè¨æ¸¬ããã«ï¼ã¿ã¹ã¯å
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+ã«ã¼ãåæ°ãåºå®ããå ´åã«ï¼ã«ã¼ãåæ°ãå®ç¾©ãããã¯ã­ï¼ã«ã¼ãå
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+è¡æéã0.4ç§ç¨åº¦ã«ãªããããªã«ã¼ãåæ°ãï¼ãã®ãã¯ã­ã«å®ç¾©ããï¼
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+8.6 å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ã®ã¿ã¼ã²ããä¾å­å®ç¾©
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+å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ã®è¨­å®ãã¿ã¼ã²ããä¾å­é¨ã§å¤æ´ããå ´åã«ï¼ã¿ã¼
+ã²ããä¾å­é¨ã§æä¾ãã¹ãå®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ã®ããã®å®ç¾©ã¯æ¬¡ã®é
+ãã§ããï¼ãããã®å®ç¾©ã¯ï¼target_test.hï¼ã¾ãã¯ããããã¤ã³ã¯ã«ã¼ããã
+ããã¡ã¤ã«ï¼ã«å«ããï¼ãã®ä»ã«ï¼ã¿ã¼ã²ããä¾å­ã§å¿
+è¦ãªåæåå¦çããã
+å ´åã«ãï¼ã¿ã¼ã²ããä¾å­é¨ã«å«ããï¼
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+(8-6-1) HISTTIMï¼ãªãã·ã§ã³ï¼
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+å®è¡æéè¨æ¸¬ç¨ã®æå»ã®ãã¼ã¿åãå®ç¾©ãããã¯ã­ï¼å®ç¾©ããªãå ´åã®ããã©
+ã«ãã¯SYSUTMï¼
+
+(8-6-2) void HIST_GET_TIM(HISTTIM *p_time)ï¼ãªãã·ã§ã³ï¼
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+å®è¡æéè¨æ¸¬ç¨ã®ç¾å¨æå»ã*p_timeã«åå¾ããå¦çã«å®ç¾©ãããã¯ã­ï¼å®ç¾©ã
+ãªãå ´åã®ããã©ã«ãã¯get_utmï¼
+
+(8-6-3) uint_t HIST_CONV_TIM(HISTTIM time)ï¼ãªãã·ã§ã³ï¼
+
+å®è¡æéè¨æ¸¬ç¨ã®æå»ã®å·®ï¼æéï¼ãï¼å®è¡æéåå¸éè¨ç¨ã®å¤ã«å¤æããå¦
+çã«å®ç¾©ãããã¯ã­ï¼æå»ãéå»ã«æ»ã£ãããªã¼ããã­ã¼ãããã®åºå¥ãã¤ã
+ãªãå ´åã«ã¯ï¼æä¸ä½ãããã1ã®å¤ï¼INT_MAXãããå¤§ããå¤ï¼ãè¿ãï¼å®ç¾©
+ããªãå ´åã®ããã©ã«ãã¯ï¼timeãuint_tã«ã­ã£ã¹ãããå¦çï¼
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+(8-6-4) void HIST_BM_HOOK(void)ï¼ãªãã·ã§ã³ï¼
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+å®è¡æéè¨æ¸¬ç´åã«è¡ãã¹ãå¦çã«å®ç¾©ãããã¯ã­ï¼ã­ã£ãã·ã¥ã®ãã¼ã¸ããã£
+ã«ï¼ã¡ã¢ãªããªã¢å¦çç­ãè¡ãããå ´åã«ã¯ï¼ãã®ãã¯ã­ã«å®ç¾©ããï¼å®ç¾©ã
+ãªãå ´åã®ããã©ã«ãã¯ï¼ç©ºã®å¦çã«ãªãï¼
+
+
+ï¼ï¼ãã®ä»
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+9.1 ãã­ã¥ã¡ã³ã
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+ã¿ã¼ã²ããä¾å­é¨ã®ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ãï¼target_user.txtã«ç¨æããï¼ã
+ã­ã»ããµã»ãããã»éçºç°å¢ä¾å­é¨ã®ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ãåãåãã¦ãã
+ããï¼ãã¡ã¤ã«ãå¤§ãããªãå ´åã«ã¯è¤æ°ã®ãã¡ã¤ã«ã«åå²ãã¦ãããï¼ãã®
+å ´åã«ã¯ï¼target_user.txtä¸­ã«ãããã®ãã¡ã¤ã«åãè¨è¿°ãããã¨ï¼
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+ã¿ã¼ã²ããä¾å­é¨ã®ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ã«ã¯ï¼å°ãªãã¨ãæ¬¡ã®ãããªå
+å®¹ã
+è¨è¿°ãããã¨ãæã¾ããï¼
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+(1) å¯¾å¿ãã¦ããã¿ã¼ã²ããã·ã¹ãã ã®ç¨®é¡ã»æ§æï¼ãã¼ã¸ã§ã³çªå·
+	ã»ã¿ã¼ã²ãããã¼ãã¦ã§ã¢ï¼ãã¼ãç­ï¼ã®åç§°ã¨å¯¾å¿ãã¦ããæ§æ
+	ã»ã¿ã¼ã²ããç¥ç§°
+	ã»ã¿ã¼ã²ããéä¾å­é¨ã®ãã¼ã¸ã§ã³çªå·
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+(2) ä½¿ç¨ããéçºç°å¢ã¨åä½æ¤è¨¼ããæ¡ä»¶ï¼ãã¼ã¸ã§ã³ï¼ãªãã·ã§ã³ç­ï¼
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+	ã»ãããã°ç°å¢
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+(3) ã¿ã¼ã²ããå®ç¾©äºé 
+ã®è¦å®
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+(3-1) ãã¼ã¿åã«é¢ããè¦å®
+	ã»int_tåï¼long_tåã®ãµã¤ãº
+	ã»charåï¼int_least8_tåï¼void *åï¼intptr_tåã®ãµã¤ãº
+	ã»int8_tåï¼uint8_tåï¼int64_tåï¼uint64_tåï¼int128_tåï¼
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+(3-2) å²è¾¼ã¿å¦çã«é¢ããè¦å®
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+åº¦ã®æ®µéæ°ï¼TMIN_INTPRIã®å¤ï¼
+	ã»dis_intã¨ena_intã®ãµãã¼ãã®æç¡ï¼ãã®å¶éäºé 
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Index: rtos_arduino/trunk/asp_1.9.2/doc/rstr_task.txt
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--- rtos_arduino/trunk/asp_1.9.2/doc/rstr_task.txt	(revision 136)
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+å¸¸ã®ã¿ã¹ã¯ã¨æ¯è¼ãã¦ä»¥ä¸ã®å¶éãæã¤ï¼
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+(a) å¾
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+(b) åªå
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+(c) ã¿ã¹ã¯çææã®åæåªå
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+(d) ã¿ã¹ã¯ã®ã¡ã¤ã³ã«ã¼ãã³ããã®ãªã¿ã¼ã³ä»¥å¤ã®æ¹æ³ã§ï¼ã¿ã¹ã¯ãçµäºãã
+    ãã¨ã¯ã§ããªãï¼
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+ã¿ã¹ã¯ãå¶ç´ã¿ã¹ã¯ã§ãããã©ããã¯ï¼ã¿ã¹ã¯ã®çææã«ï¼ã¿ã¹ã¯å±æ§ã«ãã£
+ã¦æå®ããï¼
+----------------------------------------------------------------------
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+(a)ã®å¶éã¯æ¬è³ªçã§ããï¼ä¸ã®è¨è¿°ã¯ï¼èªåè»å¶å¾¡ãã­ãã¡ã¤ã«ã®ç¯å²ã§è¨è¿°
+ãã¦ããããã«ãå¾
+ã¡ç¶æ
+ãã¨ãã¦ãããï¼ASPã«ã¼ãã«ã«é©ç¨ããå ´åã«ã¯ï¼
+ãåºç¾©ã®å¾
+ã¡ç¶æ
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+
+(b)ã®å¶éã¯ï¼ç·©ãããã¨ãå¯è½ã§ããï¼å
+·ä½çã«ã¯ï¼å¶ç´ã¿ã¹ã¯ã®åªå
+åº¦ãï¼
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+åº¦ã¨åããï¼ãããããé«ãå¤ã«è¨­å®ãããã¨ã¯è¨±ãã¦ãããï¼ã
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+ããï¼chg_priãµã¼ãã¹ã³ã¼ã«ã¨ã¯æ¯èããç°ãªããã¨ã«ãªãï¼
+
+(c)ã¯ï¼Î¼ITRON4.0ä»æ§ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³æé ããæ¥ãå¶éã§ããï¼
+TOPPERSæ°ä¸ä»£ã«ã¼ãã«ã§ã¯å¿
+è¦ãªãï¼
+
+(d)ã®å¶éã¯ï¼åãèµ·åæåªå
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+æ¹éã¨ããããï¼åãæã£ã¦ãåé¡ããªãï¼
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+ããã«ã¯è¨è¼ãã¦ããªããï¼å¶ç´ã¿ã¹ã¯ãå«ãã¬ãã£ã­ã¥ã¼ã«å¯¾ããrot_rdqã¯ï¼
+å¶éããªããã°ãªããªãï¼
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+âASPã«ã¼ãã«ã«ãããå¶ç´ã¿ã¹ã¯ã®ä»æ§
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+è¼ãã¦æ¬¡ã®å¶éãæã¤ãã®ã¨ããï¼
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+(a) åºç¾©ã®å¾
+ã¡ç¶æ
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+¥ããã¨ãã§ããªã
+(b) chg_priã«ãããã¼ã¹åªå
+åº¦ãå¤æ´ãããã¨ãã§ããªã
+(c) èªã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ãï¼èµ·åæåªå
+åº¦ã¨åããããããé«ãå¤ã«ï¼å¤
+    æ´ãããµã¼ãã¹ã³ã¼ã«ras_priãæ°è¨­ãã
+
+ã¾ãï¼å¯¾è±¡åªå
+åº¦ã®ä¸­ã®å
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+çºè¡ã§ããªããã®ã¨ããï¼
+
+ä»¥ä¸ããä»æ§ãå
+·ä½åããã¨ï¼æ¬¡ã®ããã«ãªãï¼
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+(1) CRE_TSKã«ããã¦ï¼ã¿ã¹ã¯å±æ§ã«TA_RSTRãæå®ããã¨ï¼çæãããã¿ã¹ã¯
+ã¯å¶ç´ã¿ã¹ã¯ã¨ãªãï¼å¶ç´ã¿ã¹ã¯ã®ã¹ã¿ãã¯é åã®å
+é ­çªå°ã«NULLãæå®ãã
+å ´åï¼åãèµ·åæåªå
+åº¦ãæã¤å¶ç´ã¿ã¹ã¯ã§ï¼åä¸ã®ã¹ã¿ãã¯é åãå
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+(2) å¶ç´ã¿ã¹ã¯ãï¼èªã¿ã¹ã¯ãå¾
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+å¼ã³åºããå ´åï¼E_NOSPTã¨ã©ã¼ã¨ãªãï¼
+
+(3) å¶ç´ã¿ã¹ã¯ãå¯¾è±¡ã¨ãã¦ï¼wup_tskï¼iwup_tskï¼can_wupï¼rel_waiï¼
+irel_waiï¼sus_tskï¼rsm_tskãå¼ã³åºããå ´åï¼E_NOSPTã¨ã©ã¼ã¨ãªãï¼
+
+(4) å¶ç´ã¿ã¹ã¯ãå¯¾è±¡ã¨ãã¦chg_priãå¼ã³åºããå ´åï¼E_NOSPTã¨ã©ã¼ã¨ãªãï¼
+
+(5) rot_rdqï¼irot_rdqã¯ï¼å¯¾è±¡åªå
+åº¦ãæã¤å®è¡ã§ããç¶æ
+ã®ã¿ã¹ã¯ã®ä¸­ã§æ
+ãåªå
+é ä½ãé«ãã¿ã¹ã¯ãå¶ç´ã¿ã¹ã¯ã§ããå ´åï¼E_NOSPTã¨ã©ã¼ã¨ãªãï¼
+
+(6) ä»¥ä¸ã®ä»æ§ã®ãµã¼ãã¹ã³ã¼ã«ras_priãæ°è¨­ããï¼
+
+----------------------------------------------------------------------
+ras_pri		èªã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ã®å¼ãä¸ããTã
+
+ãCè¨èªAPIã
+	ER ercd = ras_pri(PRI tskpri)
+
+ããã©ã¡ã¼ã¿ã
+	PRI			tskpri		ãã¼ã¹åªå
+åº¦
+
+ããªã¿ã¼ã³ãã©ã¡ã¼ã¿ã
+	ER			ercd		æ­£å¸¸çµäºï¼E_OKï¼ã¾ãã¯ã¨ã©ã¼ã³ã¼ã
+
+ãã¨ã©ã¼ã³ã¼ãã
+	E_CTX			ã³ã³ãã­ã¹ãã¨ã©ã¼ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®å¼åº
+					ãï¼CPUã­ãã¯ç¶æ
+ããã®å¼åºãï¼
+	E_PAR			ãã©ã¡ã¼ã¿ã¨ã©ã¼ï¼tskpriãä¸æ­£ï¼
+	E_ILUSE			ãµã¼ãã¹ã³ã¼ã«ä¸æ­£ä½¿ç¨ï¼tskpriãï¼èªã¿ã¹ã¯ã®èµ·åæ
+					åªå
+åº¦ãããä½ãå ´åï¼tskpriãï¼èªã¿ã¹ã¯ãã­ãã¯ã
+					ã¦ãããã­ãã¯ãå¾
+ã£ã¦ããåªå
+åº¦ä¸éãã¥ã¼ããã¯ã¹
+					ã®ä¸éåªå
+åº¦ãããé«ãå ´åï¼
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+ãæ©è½ã
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+èªã¿ã¹ã¯ã®ãã¼ã¹åªå
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+åº¦ã«å¤æ´ããï¼å
+·ä½çãªæ¯
+èãã¯ä»¥ä¸ã®éãï¼
+
+èªã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ãï¼tskpriã§æå®ããåªå
+åº¦ã«å¤æ´ãããï¼ããã«ä¼´ã£
+ã¦ï¼èªã¿ã¹ã¯ã®ç¾å¨åªå
+åº¦ãå¤æ´ãããï¼
+
+èªã¿ã¹ã¯ãï¼åªå
+åº¦ä¸éãã¥ã¼ããã¯ã¹ãã­ãã¯ãã¦ããªãå ´åã«ã¯ï¼åãåª
+å
+åº¦ã®ã¿ã¹ã¯ã®ä¸­ã§æé«åªå
+é ä½ã¨ãªãï¼èªã¿ã¹ã¯ãï¼åªå
+åº¦ä¸éãã¥ã¼ãã
+ã¯ã¹ãã­ãã¯ãã¦ããå ´åã«ã¯ï¼èªã¿ã¹ã¯ã®ç¾å¨åªå
+åº¦ãå¤æ´ããããã¨ã¯ãª
+ãï¼åªå
+é ä½ãå¤æ´ãããªãï¼
+
+tskpriã«TPRI_INIï¼ï¼0ï¼ãæå®ããã¨ï¼èªã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ãï¼èµ·åæåª
+å
+åº¦ã«å¤æ´ãããï¼
+
+tskpriã¯ï¼TPRI_INIã§ãããï¼TMIN_TPRIä»¥ä¸ï¼TMAX_TPRIä»¥ä¸ã§ãªããã°ãªã
+ãªãï¼ã¾ãï¼tskpriã¯ï¼èªã¿ã¹ã¯ã®èµ·åæåªå
+åº¦ã¨åãããããããé«ããªã
+ãã°ãªããªãï¼ããã«ï¼èªã¿ã¹ã¯ãåªå
+åº¦ä¸éãã¥ã¼ããã¯ã¹ãã­ãã¯ãã¦ã
+ããã­ãã¯ãå¾
+ã£ã¦ããå ´åï¼tskpriã¯ï¼ãããã®ãã¥ã¼ããã¯ã¹ã®ä¸éåªå
+
+åº¦ã¨åããããããä½ããªããã°ãªããªãï¼
+----------------------------------------------------------------------
+
+ä»¥ä¸
Index: rtos_arduino/trunk/asp_1.9.2/doc/user.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/doc/user.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/doc/user.txt	(revision 136)
@@ -0,0 +1,2668 @@
+
+		TOPPERS/ASPã«ã¼ãã«
+		ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«
+
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 1.9.2
+		æçµæ´æ°: 2015å¹´2æ8æ¥
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASPã«ã¼ãã«ãä½¿ç¨ããããã«å¿
+è¦ãªäºé 
+ãèª¬æ
+ãããã®ã§ããï¼
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2005-2015 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
+   (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ ã®è²¬ä»»ãè² ããªãï¼
+ 
+ $Id: user.txt 2675 2015-02-08 10:11:33Z ertl-hiro $
+----------------------------------------------------------------------
+
+âç®æ¬¡
+
+ï¼ï¼TOPPERS/ASPã«ã¼ãã«ã®æ¦è¦
+	1.1 TOPPERS/ASPã«ã¼ãã«ã®ä½ç½®ä»ã
+	1.2 TOPPERS/ASPã«ã¼ãã«ã®ä»æ§
+	1.3 ãã¤ã°ã¬ã¼ã·ã§ã³ã¬ã¤ã
+	1.4 æ©è½æ¡å¼µã»ãã¥ã¼ãã³ã°ã¬ã¤ã
+	1.5 æ¢ç¥ã®åé¡
+	1.6 Cygwinç°å¢ã«ãããæ³¨æäºé 
+
+ï¼ï¼ã¿ã¼ã²ããä¾å­é¨
+	2.1 ã¿ã¼ã²ããä¾å­é¨ã®æ¦è¦
+	2.2 ç°¡æããã±ã¼ã¸
+	2.3 åå¥ããã±ã¼ã¸
+ï¼ï¼ã¯ã¤ãã¯ã¹ã¿ã¼ãã¬ã¤ã
+	3.1 éçºç°å¢ã®æºå
+	3.2 ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®æ§ç¯
+	3.3 ãµã³ãã«ãã­ã°ã©ã ã®æ§ç¯ã¨å®è¡
+	3.4 ã«ã¼ãã«ãé¢æ°åä½ã§ã©ã¤ãã©ãªåããæ¹æ³
+	3.5 ã¢ããªã±ã¼ã·ã§ã³ã¨ã«ã¼ãã«ãå¥ã
+ã«æ§ç¯ããæ¹æ³
+ï¼ï¼ãã£ã¬ã¯ããªæ§æã»ãã¡ã¤ã«æ§æ
+	4.1 é
+å¸ããã±ã¼ã¸ã®ãã£ã¬ã¯ããªæ§æ
+	4.2 ã¿ã¼ã²ããéä¾å­é¨ã®ãã¡ã¤ã«æ§æ
+ï¼ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹ã¯ãªããã®ä½¿ãæ¹
+ï¼ï¼Makefileã®ä¿®æ­£æ¹æ³
+	6.1 Makefileã®å¤æ°å®ç¾©
+	6.2 ã³ã³ãã¤ã«ãªãã·ã§ã³
+ï¼ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ä½¿ãæ¹
+ï¼ï¼ã·ã¹ãã ãµã¼ãã¹
+	8.1 ã·ã¹ãã ã­ã°æ©è½
+		8.1.1 ã·ã¹ãã ã­ã°æ©è½ã®ä½ç½®ä»ã
+		8.1.2 ã­ã°ãããã¡ã¸ã®è¨é²ã¨ä½ã¬ãã«åºå
+		8.1.3 ã­ã°æ
+å ±ã®ç¨®å¥
+		8.1.4 ã­ã°æ
+å ±ã®éè¦åº¦
+		8.1.5 ã­ã°æ
+å ±ã®ãã¼ã¿æ§é 
+		8.1.6 ã·ã¹ãã ã­ã°æ©è½ã®ãµã¼ãã¹ã³ã¼ã«
+		8.1.7 ã·ã¹ãã ã­ã°æ©è½ã®ããã®ã©ã¤ãã©ãªé¢æ°ã¨ãã¯ã­
+		8.1.8 ã·ã¹ãã ã­ã°æ©è½ã®ãã®ä»ã®ãµã¼ãã¹
+	8.2 ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ã
+		8.2.1 ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®ãµã¼ãã¹ã³ã¼ã«
+		8.2.2 ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®ãã®ä»ã®ãµã¼ãã¹
+	8.3 ã·ã¹ãã ã­ã°ã¿ã¹ã¯
+		8.3.1 ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ãµã¼ãã¹ã³ã¼ã«
+		8.3.2 ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ãã®ä»ã®ãµã¼ãã¹
+	8.4 ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºå
+ï¼ï¼ãµãã¼ãã©ã¤ãã©ãª
+	9.1 åºæ¬çãªã©ã¤ãã©ãªé¢æ°
+	9.2 ã­ã¥ã¼æä½ã©ã¤ãã©ãªé¢æ°
+	9.3 ã·ã¹ãã ã­ã°åºåç¨ã©ã¤ãã©ãªé¢æ°
+	9.4 å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«
+ï¼ï¼ï¼ãã¹ããã­ã°ã©ã 
+	10.1 ãã¹ããã­ã°ã©ã ç¨ã©ã¤ãã©ãª
+	10.2 ã«ã¼ãã«ã®æ´åæ§æ¤æ»
+	10.3 æ©è½ãã¹ããã­ã°ã©ã 
+	10.4 æ§è½è©ä¾¡ãã­ã°ã©ã 
+ï¼ï¼ï¼ä½¿ç¨ä¸ã®æ³¨æã¨ãã³ã
+	11.1 ã¿ã¤ããã©ã¤ãã®çµè¾¼ã¿
+	11.2 assertãã¯ã­ã®å¦ç
+	11.3 ã·ã¹ãã ã­ã°æ©è½ã®æ±ã
+	11.4 ãªãã¸ã§ã¯ãIDã®ç®¡ç
+	11.5 ã«ã¼ãã«ã®å
+é¨ã·ã³ãã«ã®ãªãã¼ã 
+	11.6 ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ãã®ä½¿ç¨æ¹æ³
+	11.7 ã·ã¹ãã ã®èµ·åæã®åæåå¦ç
+	11.8 rodataã»ã¯ã·ã§ã³ãRAMã«ç½®ãå ´å
+ï¼ï¼ï¼åèæ
+å ±
+	12.1 å©ç¨æ¡ä»¶ã¨å©ç¨å ±å
+	12.2 ä¿è¨¼ã»é©ç¨æ§ã»ãµãã¼ã
+	12.3 ãã°ã¬ãã¼ã
+	12.4 ã¦ã§ããµã¤ã
+	12.5 TOPPERSã¦ã¼ã¶ã¼ãºã¡ã¼ãªã³ã°ãªã¹ã
+	12.6 TOPPERSãã­ã¸ã§ã¯ãã®ã¡ã³ãåãã®ãµã¼ãã¹
+	12.7 TOPPERSãã­ã¸ã§ã¯ãã¸ã®åå 
+ï¼ï¼ï¼ãªãã¡ã¬ã³ã¹
+	13.1 ãµã¼ãã¹ã³ã¼ã«ä¸è¦§
+	13.2 éçAPIä¸è¦§
+	13.3 ãã¼ã¸ã§ã³å±¥æ­´
+
+
+ï¼ï¼TOPPERS/ASPã«ã¼ãã«ã®æ¦è¦
+
+1.1 TOPPERS/ASPã«ã¼ãã«ã®ä½ç½®ä»ã
+
+TOPPERS/ASPã«ã¼ãã«ï¼ä»¥ä¸ï¼ASPã«ã¼ãã«ï¼ã¯ï¼TOPPERSæ°ä¸ä»£ã«ã¼ãã«ã®åºç¤
+ã¨ãªããã®ã¨ãã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«ããã¦éçºãããªã¢ã«ã¿ã¤ã ã«ã¼ã
+ã«ã§ããï¼Î¼ITRON4.0ä»æ§ã®ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«æºæ ã®ãªã¢ã«ã¿ã¤ã ã«ã¼
+ãã«ã§ããTOPPERS/JSPã«ã¼ãã«ãæ¡å¼µã»æ¹è¯ããå½¢ã§éçºããï¼
+
+1.2 TOPPERS/ASPã«ã¼ãã«ã®ä»æ§
+
+ASPã«ã¼ãã«ã®ä»æ§ã®æ¦è¦ã«ã¤ãã¦ã¯ï¼ãTOPPERS/ASPã«ã¼ãã«ã®ä»æ§æ¦è¦ãã
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+	% perl ../configure -T <ã¿ã¼ã²ããç¥ç§°>
+
+ããã§ï¼<ã¿ã¼ã²ããç¥ç§°>ã¯ï¼targetãã£ã¬ã¯ããªã®ä¸ã«ç½®ããã¦ããã¿ã¼ã²ã
+ãä¾å­é¨ãã£ã¬ã¯ããªã®åç§°ã§ããï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹ã¯ãªããã®ãª
+ãã·ã§ã³ã«ã¤ãã¦ã¯ï¼ãï¼ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹ã¯ãªããã®ä½¿ãæ¹ãã®
+ç« ã§èª¬æããï¼
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹ã¯ãªããã®å®è¡ã«ããï¼ã«ã¬ã³ããã£ã¬ã¯ããªã«ã¯ï¼
+ãµã³ãã«ãã­ã°ã©ã ãæ§ç¯ããããã®Makefileï¼ãµã³ãã«ãã­ã°ã©ã ç¨ã®ã³ã³
+ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ï¼sample1.cfgï¼ï¼ãµã³ãã«ãã­ã°ã©ã æ¬ä½
+ï¼sample1.hããã³sample1.cï¼ãçæãããï¼
+
+ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹ã¯ãªããã®å®è¡å¾ï¼å¿
+è¦ã§ããã°Makefileãä¿®æ­£ã
+ãï¼Makefileã®ä¿®æ­£æ¹æ³ã«ã¤ãã¦ã¯ï¼ãï¼ï¼Makefileã®ä¿®æ­£æ¹æ³ãã®ç« ã§èª¬æ
+ããï¼
+
+ãã®å¾ï¼make dependã§ä¾å­é¢ä¿ãã¡ã¤ã«ï¼Makefile.dependï¼ãçæããå¾ï¼
+makeã³ãã³ãã«ãããµã³ãã«ãã­ã°ã©ã ã®ã­ã¼ãã¢ã¸ã¥ã¼ã«ï¼aspã¾ãã¯
+asp.exeï¼ãçæã§ããï¼ä¾å­é¢ä¿ãã¡ã¤ã«ã®çæã«ã¯è¥å¹²æéããããï¼
+
+	% make depend
+	% make
+
+ããã§æ§ç¯ãããµã³ãã«ãã­ã°ã©ã ï¼sample1.hï¼sample1.cï¼sample1.cfgï¼
+ã¯ï¼ASPã«ã¼ãã«ã®åºæ¬çãªåä½ãç¢ºèªããããã®ãã®ã§ããï¼ãã®ãã­ã°ã©
+ã ã®æ¦è¦èª¬æã¯ï¼sample1.cã®å
+é ­ã®ã³ã¡ã³ãã«ããï¼
+
+3.4 ã«ã¼ãã«ãé¢æ°åä½ã§ã©ã¤ãã©ãªåããæ¹æ³
+
+åç¯ã®æé ã§ã¯ï¼ã«ã¼ãã«ããã¡ã¤ã«åä½ã§ã³ã³ãã¤ã«ãï¼ã©ã¤ãã©ãªåãã¦
+ãããï¼ã«ã¼ãã«ã®ã³ã¼ããµã¤ãºãç¸®å°ããããã«ã¯ï¼ä½¿ç¨ããªããµã¼ãã¹ã³ã¼
+ã«ã¯ãªã³ã¯ããªãæ¹ãæã¾ããï¼ããã§ASPã«ã¼ãã«ã§ã¯ï¼ã«ã¼ãã«ãé¢æ°åä½
+ã§ã³ã³ãã¤ã«ãï¼ã©ã¤ãã©ãªåããæ¹æ³ãç¨æãã¦ããï¼
+
+ãã®æ¹æ³ã§ãµã³ãã«ãã­ã°ã©ã ãæ§ç¯ããã«ã¯ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹ã¯
+ãªããã«ï¼ãããæç¤ºãããªãã·ã§ã³ï¼-fï¼ãä»å ããã ãã§ããï¼
+
+	% mkdir OBJ_LIB
+	% cd OBJ_LIB
+	% perl ../configure -T <ã¿ã¼ã²ããç¥ç§°> -f
+
+ããã§ï¼OBJ_LIBã¨ãããã£ã¬ã¯ããªã®å ´æã¨åç§°ã¯ï¼ä»»æã«æ±ºãã¦ããï¼ãã
+ä»¥éã®æé ã¯ï¼åç¯ã¨åãã§ããï¼
+
+3.5 ã¢ããªã±ã¼ã·ã§ã³ã¨ã«ã¼ãã«ãå¥ã
+ã«æ§ç¯ããæ¹æ³
+
+åç¯ã§èª¬æããæ¹æ³ã§ã¯ï¼ã¢ããªã±ã¼ã·ã§ã³ã¨ã«ã¼ãã«ãåæã«çæããããï¼
+ãªãã¸ã§ã¯ããã¡ã¤ã«ãç½®ããã£ã¬ã¯ããªã«éå¸¸ã«å¤ãã®ãã¡ã¤ã«ãä½æãã
+ã¦ï¼æ±ãã«ãããªãï¼ããã§ï¼ã«ã¼ãã«ãä¿®æ­£ããé »åº¦ãä½ãå ´åã«ã¯ï¼ã«ã¼
+ãã«ã¯äºåã«æ§ç¯ãã¦ããï¼å¾ã§ã¢ããªã±ã¼ã·ã§ã³ã ããæ§ç¯ããæ¹æ³ãç¨æ
+ãã¦ããï¼ä»¥ä¸ã§ã¯ï¼ãµã³ãã«ãã­ã°ã©ã ãæ§ç¯ãä¾ã«ï¼ãã®æé ã«ã¤ãã¦èª¬
+æããï¼
+
+ã¾ãï¼ã«ã¼ãã«ãæ§ç¯ãããã£ã¬ã¯ããªãä½æãï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹
+ã¯ãªãããå®è¡ããï¼ä¾ãã°ï¼ã«ã¼ãã«ãæ§ç¯ãããã£ã¬ã¯ããªãï¼ASPã«ã¼
+ãã«ã®ã½ã¼ã¹ãã¡ã¤ã«ãå±éãããã£ã¬ã¯ããªã®ä¸ã®KERNEL_LIBã¨ããåç§°ã®
+ãã£ã¬ã¯ããªã«ããå ´åã«ã¯ï¼æ¬¡ã®ã³ãã³ããå®è¡ããï¼ãã£ã¬ã¯ããªã®å ´æ
+ã¨åç§°ã¯ä»»æã«æ±ºãã¦ããï¼ï¼
+
+	% mkdir KERNEL_LIB
+	% cd KERNEL_LIB
+	% perl ../configure -T <ã¿ã¼ã²ããç¥ç§°> -f
+
+ããã«ããï¼ã«ã¼ãã«ãæ§ç¯ãããã£ã¬ã¯ããªã«ï¼Makefileï¼sample1.cfgï¼
+sample1.hï¼sample1.cãçæããããï¼Makefileä»¥å¤ã¯å®è³ªçã«ã¯ä½¿ç¨ããªãï¼
+
+make dependã§ä¾å­é¢ä¿ãã¡ã¤ã«ï¼Makefile.dependï¼ãçæããå¾ï¼make
+libkernel.aã«ããã«ã¼ãã«ã©ã¤ãã©ãªï¼libkernel.aï¼ãçæã§ããï¼
+
+	% make depend
+	% make libkernel.a
+
+æ¬¡ã«ï¼ã¢ããªã±ã¼ã·ã§ã³ãæ§ç¯ãããã£ã¬ã¯ããªãä½æãï¼ã³ã³ãã£ã®ã¥ã¬ã¼
+ã·ã§ã³ã¹ã¯ãªãããå®è¡ããï¼ä¾ãã°ï¼ã¢ããªã±ã¼ã·ã§ã³ãæ§ç¯ãããã£ã¬ã¯
+ããªãï¼ASPã«ã¼ãã«ã®ã½ã¼ã¹ãã¡ã¤ã«ãå±éãããã£ã¬ã¯ããªã®ä¸ã®APLã¨ã
+ãåç§°ã®ãã£ã¬ã¯ããªã«ããå ´åã«ã¯ï¼æ¬¡ã®ã³ãã³ããå®è¡ããï¼ãã£ã¬ã¯ã
+ãªã®å ´æã¨åç§°ã¯ä»»æã«æ±ºãã¦ããï¼ï¼
+
+	% cd ..
+	% mkdir APL
+	% cd APL
+	% perl ../configure -T <ã¿ã¼ã²ããç¥ç§°> -L ../KERNEL_LIB
+
+ããã§-Lãªãã·ã§ã³ã«ã¯ï¼ã«ã¼ãã«ãæ§ç¯ãããã£ã¬ã¯ããªã®ãã¹ãæå®ããï¼
+
+æå¾ã«ï¼make dependã§ä¾å­é¢ä¿ãã¡ã¤ã«ï¼Makefile.dependï¼ãçæããå¾ï¼
+makeã³ãã³ãã«ãããµã³ãã«ãã­ã°ã©ã ã®ã­ã¼ãã¢ã¸ã¥ã¼ã«ï¼aspã¾ãã¯
+asp.exeï¼ãçæã§ããï¼
+
+	% make depend
+	% make
+
+ãã®æé ã§ã¯ï¼ã¢ããªã±ã¼ã·ã§ã³æ§ç¯æã«ã¯ã«ã¼ãã«ã®åæ§ç¯ãå¿
+è¦ããã§ã
+ã¯ããªãããï¼ã«ã¼ãã«ã®ã½ã¼ã¹ã³ã¼ããä¿®æ­£ããå ´åã«ã¯ï¼ã«ã¼ãã«ãæ§ç¯
+ãããã£ã¬ã¯ããªã§make libkernel.aãåå®è¡ããå¿
+è¦ãããï¼
+
+ä»¥ä¸ã§ã¯ï¼ã«ã¼ãã«ã¨ã¢ããªã±ã¼ã·ã§ã³ãå¥ã
+ã®ãã£ã¬ã¯ããªã§æ§ç¯ãããï¼
+-Lãªãã·ã§ã³ã«ã«ã¬ã³ããã£ã¬ã¯ããªï¼ãã ãï¼"."ã¨ããè¨è¿°ã§ã¯ä¸å¯ï¼ãæ
+å®ãããã¨ã§ï¼ã«ã¼ãã«ã¨ã¢ããªã±ã¼ã·ã§ã³ãåããã£ã¬ã¯ããªã§å¥ã
+ã«æ§ç¯
+ãããã¨ãã§ããï¼å
+·ä½çã«ã¯ï¼æ¬¡ã®æé ã¨ãªãï¼
+
+	% mkdir OBJ
+	% cd OBJ
+	% perl ../configure -T <ã¿ã¼ã²ããç¥ç§°> -L ../OBJ
+	% make depend
+	% make libkernel.a
+	% make cleankernel
+	% make
+
+ããã§ï¼make cleankernelã¯ï¼ã«ã¼ãã«ã©ã¤ãã©ãªãçæããããã®ä¸­éãã¡
+ã¤ã«ãåé¤ãããã®ã§ããï¼ãã®æé ã§ã¯ï¼make dependã«ããã«ã¼ãã«ã©ã¤
+ãã©ãªã«é¢ããä¾å­é¢ä¿ãçæããªãããï¼ã«ã¼ãã«ã®ã½ã¼ã¹ã³ã¼ããä¿®æ­£ã
+ãå ´åã«ã¯ï¼å¿
+ãmake cleankernelï¼ã¾ãã¯ï¼make cleanï¼ãã¦ããï¼make
+libkernel.aããå¿
+è¦ãããã®ã§æ³¨æãããã¨ï¼
+
+ãªãï¼make realcleanããã¨ï¼make dependã¨makeã«ããçæãããã¡ã¤ã«ãã
+ã¹ã¦åé¤ããï¼ããã«å¯¾ãã¦ï¼make cleanã§ã¯ï¼make dependã«ããçæããä¾
+å­é¢ä¿ãã¡ã¤ã«ã¯åé¤ããªãï¼
+
+
+ï¼ï¼ãã£ã¬ã¯ããªæ§æã»ãã¡ã¤ã«æ§æ
+
+4.1 é
+å¸ããã±ã¼ã¸ã®ãã£ã¬ã¯ããªæ§æ
+
+	include/		ã¢ããªã±ã¼ã·ã§ã³åãããããã¡ã¤ã«
+	kernel/			ã«ã¼ãã«ã®ã½ã¼ã¹ãã¡ã¤ã«
+	syssvc/			ã·ã¹ãã ãµã¼ãã¹ã®ããããã¡ã¤ã«ï¼ã½ã¼ã¹ãã¡ã¤ã«
+	library/		ãµãã¼ãã©ã¤ãã©ãªã®ã½ã¼ã¹ãã¡ã¤ã«
+	target/			ã¿ã¼ã²ããä¾å­é¨
+	arch/			ã¿ã¼ã²ããä¾å­é¨ã®å
+±éé¨å
+		gcc/		GCCéçºç°å¢ä¾å­é¨
+		logtrace/	ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ã
+	pdic/			PDICï¼ããã¤ã¹ãã©ã¤ãã®OSéä¾å­é¨åï¼
+	utils/			ã¦ã¼ãã£ãªãã£ãã­ã°ã©ã 
+	sample/			ãµã³ãã«ãã­ã°ã©ã ã¨Makefile
+	doc/			ãã­ã¥ã¡ã³ã
+	test/			ãã¹ããã­ã°ã©ã 
+	extension/		æ¡å¼µããã±ã¼ã¸
+
+4.2 ã¿ã¼ã²ããéä¾å­é¨ã®ãã¡ã¤ã«æ§æ
+
+ã¿ã¼ã²ããéä¾å­é¨ï¼ãã¹ããã­ã°ã©ã ã¨æ¡å¼µããã±ã¼ã¸ã¯é¤ãï¼ã®åãã¡ã¤
+ã«ã®æ¦è¦ã¯æ¬¡ã®éãï¼
+
+	README.txt			TOPPERS/ASPã«ã¼ãã«ã®ç°¡åãªç´¹ä»
+	configure			ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹ã¯ãªããï¼GNUéçºç°å¢ç¨ï¼
+	MANIFEST			åå¥ããã±ã¼ã¸ã®ãã¡ã¤ã«ãªã¹ã
+
+	include/
+		kernel.h		ASPã«ã¼ãã«ãä½¿ç¨ããããã®å®ç¾©
+		sil.h			ã·ã¹ãã ã¤ã³ã¿ãã§ã¼ã¹ã¬ã¤ã¤ãä½¿ç¨ããããã®å®ç¾©
+		t_stddef.h		TOPPERSå
+±éããããã¡ã¤ã«
+		itron.h			ITRONä»æ§å
+±éè¦å®ã®ãã¼ã¿åã»å®æ°ã»ãã¯ã­
+		t_syslog.h		ã·ã¹ãã ã­ã°åºåãè¡ãããã®å®ç¾©
+		t_stdlib.h		åºæ¬çãªã©ã¤ãã©ãªé¢æ°ãä½¿ç¨ããããã®å®ç¾©
+		queue.h			ã­ã¥ã¼æä½ã©ã¤ãã©ãªãä½¿ç¨ããããã®å®ç¾©
+		test_lib.h		ãã¹ããã­ã°ã©ã ç¨ã©ã¤ãã©ãªãä½¿ç¨ããããã®å®ç¾©
+		histogram.h		å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ãä½¿ç¨ããããã®å®ç¾©
+		log_output.h	ã·ã¹ãã ã­ã°ã®ãã©ã¼ãããåºåãä½¿ç¨ããããã®å®ç¾©
+
+	kernel/
+		Makefile.kernel		ã«ã¼ãã«ã®ãã¡ã¤ã«æ§æã®å®ç¾©
+		kernel_impl.h		ã«ã¼ãã«å®è£
+ç¨æ¨æºããããã¡ã¤ã«
+		kernel_int.h		kernel_cfg.cç¨ã®ããããã¡ã¤ã«
+		kernel_rename.def	ã«ã¼ãã«ã®å
+é¨è­å¥åã®ãªãã¼ã å®ç¾©
+		kernel_rename.h		ã«ã¼ãã«ã®å
+é¨è­å¥åã®ãªãã¼ã 
+		kernel_unrename.h	ã«ã¼ãã«ã®å
+é¨è­å¥åã®ãªãã¼ã è§£é¤	
+		kernel_api.csv		ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®éçAPIãã¼ãã«
+		kernel_def.csv		ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®å¤åå¾ã·ã³ãã«ãã¼ãã«
+		kernel.tf			ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ãã¹2ã®ãã³ãã¬ã¼ããã¡ã¤ã«
+		kernel_check.tf		ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ãã¹3ã®ãã³ãã¬ã¼ããã¡ã¤ã«
+		genoffset.tf		ãªãã»ãããã¡ã¤ã«çæç¨ã®ãã³ãã¬ã¼ããã¡ã¤ã«
+		allfunc.h		ãã¹ã¦ã®é¢æ°ãã³ã³ãã¤ã«ããããã®å®ç¾©
+		check.h			ã¨ã©ã¼ãã§ãã¯ç¨ãã¯ã­
+		startup.c		ã«ã¼ãã«ã®åæåã¨çµäºå¦ç
+		task.h			ã¿ã¹ã¯æä½ã«ã¼ãã³é¢é£ã®å®ç¾©
+		task.c			ã¿ã¹ã¯æä½ã«ã¼ãã³
+		wait.h			å¾
+ã¡ç¶æ
+æä½ã«ã¼ãã³é¢é£ã®å®ç¾©
+		wait.c			å¾
+ã¡ç¶æ
+æä½ã«ã¼ãã³
+		time_event.h	ã¿ã¤ã ã¤ãã³ãç®¡çé¢é£ã®å®ç¾©
+		time_event.c	ã¿ã¤ã ã¤ãã³ãç®¡ç
+		task_manage.c	ã¿ã¹ã¯ç®¡çæ©è½
+		task_refer.c	ã¿ã¹ã¯ç¶æ
+åç
+§æ©è½
+		task_sync.c		ã¿ã¹ã¯ä»å±åææ©è½
+		task_except.c	ã¿ã¹ã¯ä¾å¤å¦çæ©è½
+		semaphore.h		ã»ããã©æ©è½é¢é£ã®å®ç¾©
+		semaphore.c		ã»ããã©æ©è½
+		eventflag.h		ã¤ãã³ããã©ã°æ©è½é¢é£ã®å®ç¾©
+		eventflag.c		ã¤ãã³ããã©ã°æ©è½
+		dataqueue.h		ãã¼ã¿ã­ã¥ã¼æ©è½é¢é£ã®å®ç¾©
+		dataqueue.c		ãã¼ã¿ã­ã¥ã¼æ©è½
+		pridataq.h		åªå
+åº¦ãã¼ã¿ã­ã¥ã¼æ©è½é¢é£ã®å®ç¾©
+		pridataq.c		åªå
+åº¦ãã¼ã¿ã­ã¥ã¼æ©è½
+		mailbox.h		ã¡ã¼ã«ããã¯ã¹æ©è½é¢é£ã®å®ç¾©
+		mailbox.c		ã¡ã¼ã«ããã¯ã¹æ©è½
+		mempfix.h		åºå®é·ã¡ã¢ãªãã¼ã«æ©è½é¢é£ã®å®ç¾©
+		mempfix.c		åºå®é·ã¡ã¢ãªãã¼ã«æ©è½
+		time_manage.c	ã·ã¹ãã æå»ç®¡çæ©è½
+		cyclic.h		å¨æãã³ãã©æ©è½é¢é£ã®å®ç¾©
+		cyclic.c		å¨æãã³ãã©æ©è½
+		alarm.h			ã¢ã©ã¼ã ãã³ãã©æ©è½é¢é£ã®å®ç¾©
+		alarm.c			ã¢ã©ã¼ã ãã³ãã©æ©è½
+		sys_manage.c	ã·ã¹ãã ç¶æ
+ç®¡çæ©è½
+		interrupt.h		å²è¾¼ã¿ç®¡çæ©è½é¢é£ã®å®ç¾©
+		interrupt.c		å²è¾¼ã¿ç®¡çæ©è½
+		exception.h		CPUä¾å¤ç®¡çæ©è½é¢é£ã®å®ç¾©
+		exception.c		CPUä¾å¤ç®¡çæ©è½
+
+	syssvc/
+		banner.h		ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºåã®ããã®å®ç¾©
+		banner.c		ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºå
+		banner.cfg		ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºåã®ã³ã³ãã£ã®ã¥ã¬ã¼
+						ã·ã§ã³ãã¡ã¤ã«
+		logtask.h		ã·ã¹ãã ã­ã°ã¿ã¹ã¯ãä½¿ç¨ããããã®å®ç¾©
+		logtask.c		ã·ã¹ãã ã­ã°ã¿ã¹ã¯
+		logtask.cfg		ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+		serial.h		ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ããä½¿ç¨ããããã®å®ç¾©
+		serial.c		ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ã
+		serial.cfg		ã·ãªã¢ã«ãã©ã¤ãã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+		syslog.h		ã·ã¹ãã ã­ã°æ©è½ãä½¿ç¨ããããã®å®ç¾©
+		syslog.c		ã·ã¹ãã ã­ã°æ©è½
+		syslog.cfg		ã·ã¹ãã ã­ã°æ©è½ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+
+	library/
+		histogram.c		å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«
+		log_output.c	ã·ã¹ãã ã­ã°ã®ãã©ã¼ãããåºå
+		strerror.c		ã¨ã©ã¼ã¡ãã»ã¼ã¸æå­åãè¿ãé¢æ°
+		t_perror.c		ã¨ã©ã¼ã¡ãã»ã¼ã¸ã®åºå
+		test_lib.c		ãã¹ããã­ã°ã©ã ç¨ã©ã¤ãã©ãª
+		vasyslog.c		å¯å¤æ°å¼æ°ã®ã·ã¹ãã ã­ã°ã©ã¤ãã©ãª
+
+	arch/gcc/
+		MANIFEST		åå¥ããã±ã¼ã¸ã®ãã¡ã¤ã«ãªã¹ã
+		tool_stddef.h	t_stddef.hã®éçºç°å¢ä¾å­é¨ï¼GCCç¨ï¼
+
+	arch/logtrace/
+		MANIFEST		åå¥ããã±ã¼ã¸ã®ãã¡ã¤ã«ãªã¹ã
+		trace_config.h	ãã¬ã¼ã¹ã­ã°ã«é¢ããè¨­å®
+		trace_config.c	ãã¬ã¼ã¹ã­ã°æ©è½
+		trace_dump.c	ãã¬ã¼ã¹ã­ã°ã®ãã³ã
+
+	utils/
+		applyrename		ãã¡ã¤ã«ã«ãªãã¼ã ãé©ç¨
+		genoffset		offset.hã®çæï¼GNUéçºç°å¢ç¨ï¼
+		genrename		ãªãã¼ã ããããã¡ã¤ã«ã®çæ
+		gentest			ãã¹ããã­ã°ã©ã ã®çæ
+		makedep			ä¾å­é¢ä¿ãªã¹ãã®çæï¼GNUéçºç°å¢ç¨ï¼
+		makerelease		ãªãªã¼ã¹ããã±ã¼ã¸ã®çæ
+
+	sample/
+		Makefile		ãµã³ãã«ã®Makefileï¼GNUéçºç°å¢ç¨ï¼
+		sample1.h		ãµã³ãã«ãã­ã°ã©ã (1)ã«é¢ããå®ç¾©
+		sample1.c		ãµã³ãã«ãã­ã°ã©ã (1)
+		sample1.cfg		ãµã³ãã«ãã­ã°ã©ã (1)ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+
+	doc/
+		user.txt			ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«
+		asp_spec.txt		TOPPERS/ASPã«ã¼ãã«ã®ä»æ§æ¦è¦
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+
+8.1.7 ã·ã¹ãã ã­ã°æ©è½ã®ããã®ã©ã¤ãã©ãªé¢æ°ã¨ãã¯ã­
+
+ã·ã¹ãã ã­ã°åºåã®ããã®ã©ã¤ãã©ãªé¢æ°ã¨ãã¯ã­ã¯æ¬¡ã®éãã§ããï¼ããã
+ã ããå¼ã³åºãã½ã¼ã¹ãã¡ã¤ã«ã§ã¯ï¼t_syslog.hãã¤ã³ã¯ã«ã¼ãããã°ããï¼
+
+(1) void _syslog_n(uint_t prio, uint_t type, intptr_t arg1, ..., intptr_t argn)
+    â» nã¯0ï½6ã®ããããï¼
+
+ã­ã°ç¨®å¥ãtypeï¼ãã©ã¡ã¼ã¿ãarg1ï½argnã®ã­ã°æ
+å ±ãï¼éè¦åº¦prioã§åºåã
+ãããã®é¢æ°ï¼
+
+(2) void syslog_n(uint_t prio, const char *format, arg1, ..., argn)
+    â» nã¯0ï½5ã®ããããï¼
+
+formatæå­åããã³ããã«ç¶ãå¼æ°ããä½æãããã¡ãã»ã¼ã¸ãï¼ã­ã°ç¨®å¥ã
+LOG_TYPE_COMMENTã®ã­ã°æ
+å ±ã¨ãã¦ï¼éè¦åº¦prioã§åºåããããã®ãã¯ã­ï¼
+
+formatã¯ã¡ãã»ã¼ã¸ã®ãã©ã¼ãããè¨è¿°ï¼arg1ï½argnã¯ãã©ã¼ãããè¨è¿°ä¸­ã§
+åç
+§ãããå¤ã§ï¼printfã®ãã©ã¼ãããè¨è¿°ã®ãµãã»ããã¨ãªã£ã¦ããï¼arg1ï½
+argnã¯ï¼ãã®ãã¯ã­ä¸­ã§intptr_tåã«ã­ã£ã¹ããããããï¼intptr_tåã«åå¤
+æã§ããä»»æã®åãæ¸¡ããã¨ãã§ãï¼åãã§ãã¯ã¯ãããªãï¼formatããã³
+arg1ï½argnã«ã¯ï¼æ¬¡ã®å¶éãããï¼
+
+ã»formatã®ãã©ã¼ãããè¨è¿°ã¯ï¼å®æ°æå­åãæ¸¡ããã¨ãæ³å®ãã¦ããï¼ãã®
+ãã¯ã­å¦çãçµããå¾ãå¤åãã¦ã¯ãªããªãï¼
+
+ã»formatä¸­ã«ä½¿ãããã©ã¼ãããæå®ã¯æ¬¡ã®éãï¼
+
+	%d		å¼æ°ãint_tåã¨ã¿ãªãï¼10é²æ°ã§è¡¨ç¤º
+	%u		å¼æ°ãuint_tåã¨ã¿ãªãï¼10é²æ°ã§è¡¨ç¤º
+	%x		å¼æ°ãuint_tåã¨ã¿ãªãï¼16é²æ°ï¼è±æå­ã¯å°æå­ï¼ã§è¡¨ç¤º
+	%X		å¼æ°ãuint_tåã¨ã¿ãªãï¼16é²æ°ï¼è±æå­ã¯å¤§æå­ï¼ã§è¡¨ç¤º
+	%p		å¼æ°ããã¤ã³ã¿ã¨ã¿ãªãï¼16é²æ°ï¼è±æå­ã¯å°æå­ï¼ã§è¡¨ç¤º
+	%c		å¼æ°ãæå­ã³ã¼ãã¨ã¿ãªãï¼æå­ãè¡¨ç¤º
+	%s		å¼æ°ãæå­åãç¤ºããã¤ã³ã¿ã¨ã¿ãªãï¼æå­åãè¡¨ç¤º
+	%%		'%'ãè¡¨ç¤ºï¼å¼æ°ã¯åããªãï¼
+
+%d, %u, %x, %Xã«ããã¦ã¯ï¼'%'ã®ç´å¾ã«è¡¨ç¤ºæ¡æ°ãæå®ãã10é²æ°å¤ãè¨è¿°ã
+ããã¨ãã§ããï¼ãã®å ´åï¼è¡¨ç¤ºãã¹ãæå­åãæå®ããæ¡æ°ã«æºããªãå ´å
+ã«ã¯ï¼æå®ããæ¡æ°å
+ã«å³è©°ãã§è¡¨ç¤ºããï¼10é²æ°å¤ã'0'ã§å§ã¾ãå ´åã«ã¯ï¼
+ãã®éã«'0'ãåããï¼
+
+ã¾ãï¼intptr_tåã®ãµã¤ãºãlongåã®ãµã¤ãºä»¥ä¸ã§ããç°å¢ã«ããã¦ã¯ï¼æ¬¡ã®
+ãã©ã¼ãããæå®ãä½¿ç¨ãããã¨ãã§ããï¼ãã®ä»ã®ãã©ã¼ãããæå®ã«'l'
+ãä»å ããå ´åã«ã¯ç¡è¦ããï¼%lcã¨%lsã«ã¯å¯¾å¿ãã¦ããªãï¼ï¼
+
+	%ld		å¼æ°ãlong_tåã¨ã¿ãªãï¼10é²æ°ã§è¡¨ç¤º
+	%lu		å¼æ°ãulong_tåã¨ã¿ãªãï¼10é²æ°ã§è¡¨ç¤º
+	%lx		å¼æ°ãulong_tåã¨ã¿ãªãï¼16é²æ°ï¼è±æå­ã¯å°æå­ï¼ã§è¡¨ç¤º
+	%lX		å¼æ°ãulong_tåã¨ã¿ãªãï¼16é²æ°ï¼è±æå­ã¯å¤§æå­ï¼ã§è¡¨ç¤º
+
+ã»arg1ï½argnã«ãã¤ã³ã¿ãæ¸¡ãå ´åï¼%sã«å¯¾å¿ããå¼æ°ã®å ´åï¼ã«ï¼ãã¤ã³ã¿
+ã®æããã¼ã¿ã¯ï¼ãã®ãã¯ã­å¦çãçµããå¾ãå¤åãã¦ã¯ãªããªãï¼å®æ°æå­
+åãæ¸¡ããã¨ãæ³å®ãã¦ããï¼
+
+(3) void syslog(uint_t prio, const char *format, ...)
+
+formatæå­åããã³ããã«ç¶ãå¼æ°ããä½æãããã¡ãã»ã¼ã¸ãï¼ã­ã°ç¨®å¥ã
+LOG_TYPE_COMMENTã®ã­ã°æ
+å ±ã¨ãã¦ï¼éè¦åº¦prioã§åºåããããã®é¢æ°ã§ï¼å¼
+æ°ã®æ°ãå¯å¤ã«ãããã®ï¼formatã«ç¶ãå¼æ°ã¯æå¤§5åã¾ã§ï¼formatããã³ãã
+ã«ç¶ãå¼æ°ã«ã¯ï¼syslog_nã¨åæ§ã®å¶éãããï¼
+
+ãã®ã©ã¤ãã©ãªé¢æ°ã¯ï¼å¯å¤æ°å¼æ°ãå¦çããããã«å
+é¨ã§æå­åãã¹ã­ã£ã³
+ããï¼ãã®ããï¼å®è¡æéãé·ããªãå¯è½æ§ãããï¼å²è¾¼ã¿ç¦æ­¢ç¶æ
+ã§å¼ã³åº
+ãã¹ãã§ã¯ãªãï¼ä¸»ã«ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ãç¨ãããã¨ãæ³å®ãã¦ã
+ãï¼
+
+(4) UINT LOG_MASK(UINT prio)
+
+éè¦åº¦prioã®ã¿ã»ããããããããããããä½ããã¯ã­ï¼syslog_msk_logã«æ¸¡
+ãå¼æ°ãä½ãããã«ç¨ããï¼
+
+(5) UINT LOG_UPTO(UINT prio)
+
+éè¦åº¦prioä»¥ä¸ã®éè¦åº¦ããã¹ã¦ã»ããããããããããããä½ããã¯ã­ï¼
+syslog_msk_logã«æ¸¡ãå¼æ°ãä½ãããã«ç¨ããï¼
+
+8.1.8 ã·ã¹ãã ã­ã°æ©è½ã®ãã®ä»ã®ãµã¼ãã¹
+
+ã·ã¹ãã ã­ã°æ©è½ã¯ï¼åè¨ã®ãµã¼ãã¹ã³ã¼ã«ç­ã«å ãã¦ï¼åæåå¦çã®ããã®
+é¢æ°ãæã¤ï¼
+
+(1) void syslog_initialize(intptr_t exinf)
+
+ã·ã¹ãã ã­ã°æ©è½ãåæåããï¼ã­ã°ãããã¡ã«ã­ã°æ
+å ±ãè¨é²ããã¦ããå ´
+åã«ã¯ï¼æ¶å»ãããï¼syslog.cfgã«ãã£ã¦ï¼ã«ã¼ãã«ã«åæåã«ã¼ãã³ã¨ãã¦
+ç»é²ãããï¼exinfã¯ç¡è¦ãããï¼
+
+8.2 ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ã
+
+ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã¯ï¼ã·ãªã¢ã«ãã¼ããæ±ãããã®ãã©ã¤ãã§
+ããï¼
+
+ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤
+ã«ã§serial.cfgãã¤ã³ã¯ã«ã¼ããããã¨ã§ï¼ã·ã¹ãã ã«çµã¿è¾¼ããã¨ãã§ããï¼
+ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ããå¼ã³åºãã½ã¼ã¹ãã¡ã¤ã«ã§ã¯ï¼serial.hã
+ã¤ã³ã¯ã«ã¼ãããï¼
+
+ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã¯ï¼ãã¼ãæ¯ã«ã»ããã©ã2åãã¤ä½¿ç¨ããï¼
+ã»ããã©ãçæããéçAPIã¯ï¼serial.cfgã«å«ã¾ãã¦ããï¼
+
+8.2.1 ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®ãµã¼ãã¹ã³ã¼ã«
+
+ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ããå¼ã³åºããµã¼ãã¹ã³ã¼ã«ã®ä»æ§ã¯æ¬¡ã®éã
+ã§ããï¼ãã®ä¸­ã§ï¼ã·ãªã¢ã«ãã¼ãã®IDçªå·ï¼portidï¼ã®è§£éã¯ã¿ã¼ã²ããä¾
+å­ã¨ãªãï¼
+
+ãããã®ãµã¼ãã¹ã³ã¼ã«ã¯ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãããå¼ã³åºããã¨ã¯ã§ããª
+ãï¼ã¾ãï¼serial_rea_datã¨serial_wri_datã¯ï¼ãã£ã¹ãããä¿çç¶æ
+ã§å¼ã³
+åºããã¨ã¯ã§ããªãï¼ããããï¼å¼ã³åºããå ´åã«ã¯E_CTXã¨ã©ã¼ã¨ãªãï¼
+
+(1) ER serial_opn_por(ID portid)
+
+portidã§æå®ãããã·ãªã¢ã«ãã¼ãããªã¼ãã³ãï¼åä¿¡ï¼éä¿¡ãå¯è½ãªç¶æ
+ã«
+ããï¼
+
+(2) ER serial_cls_por(ID portid)
+
+portidã§æå®ãããã·ãªã¢ã«ãã¼ããã¯ã­ã¼ãºããï¼
+
+(3) ER_UINT serial_rea_dat(ID portid, char *buf, uint_t len)
+
+portidã§æå®ãããã·ãªã¢ã«ãã¼ãããï¼lenãã¤ãã®æå­åãåä¿¡ãï¼bufã
+ãã®é åã«å
+¥ããï¼lenãã¤ãåä¿¡ããã¾ã§ï¼å¾
+ã¡ç¶æ
+ã¨ãªãï¼åä¿¡ããæå­æ°
+ã¾ãã¯ã¨ã©ã¼ã³ã¼ããè¿ãï¼
+
+(4) ER_UINT serial_wri_dat(ID portid, const char *buf, uint_t len)
+
+portidã§æå®ãããã·ãªã¢ã«ãã¼ãã«ï¼bufããã®lenãã¤ãã®æå­åãéä¿¡ã
+ãï¼lenãã¤ãéä¿¡ãããã¡ã«å
+¥ããã¾ã§ï¼å¾
+ã¡ç¶æ
+ã¨ãªãï¼éä¿¡ããæå­æ°ã¾
+ãã¯ã¨ã©ã¼ã³ã¼ããè¿ãï¼
+
+(5) ER serial_ctl_por(ID portid, uint_t ioctl)
+
+portidã§æå®ãããã·ãªã¢ã«ãã¼ãã®å¶å¾¡æ
+å ±ãï¼ioctlã§ç¤ºãããå¤ã«è¨­å®ã
+ãï¼
+
+ioctlã«ã¯ï¼ä»¥ä¸ã®å¶å¾¡æ
+å ±ãè¡¨ãå®æ°ãï¼ãããæ¯ã«è«çåãã¨ã£ããã®ã
+æå®ããï¼
+
+	IOCTL_ECHOï¼ã¨ã³ã¼ããã¯ã¢ã¼ãï¼
+		ãã®ããããè¨­å®ããã¨ï¼ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ããã¨ã³ã¼
+		ããã¯ãè¡ãï¼å
+·ä½çã«ã¯ï¼ãããã¡ããæå­ãåãåºãåº¦ã«ï¼ãã®
+		æå­ãæ¸ãåºãï¼
+
+	IOCTL_CRLFï¼æ¹è¡ã¢ã¼ãï¼
+		LFï¼line feedï¼ãæ¸ãåºãã¨ï¼CRï¼carriage returnï¼ï¼LFã«å¤æã
+		ã¦æ¸ãåºãï¼
+
+	IOCTL_FCSNDï¼éä¿¡ãã­ã¼å¶å¾¡ï¼
+		æå­ãéä¿¡ããå¦çã«å¯¾ãã¦ï¼XON/XOFFã«ãããã­ã¼å¶å¾¡ãè¡ãï¼
+		ããªãã¡ï¼STOPï¼ã³ã³ãã­ã¼ã«-Sï¼ãåä¿¡ããã¨éä¿¡ãåæ­¢ãï¼
+		STARTï¼ã³ã³ãã­ã¼ã«-Qï¼ãåä¿¡ããã¨éä¿¡ãåéããï¼
+
+	IOCTL_FCANYï¼éä¿¡ãã­ã¼å¶å¾¡ã§ä»»æã®æå­ã§éä¿¡åéï¼
+		IOCTL_FCSNDãæå®ãã¦ããæã«ï¼éä¿¡åæ­¢ä¸­ã«åä¿¡ããä»»æã®æå­
+		ã§éä¿¡ãåéããï¼
+
+	IOCTL_FCRCVï¼åä¿¡ãã­ã¼å¶å¾¡ï¼
+		æå­ãåä¿¡ããå¦çã«å¯¾ãã¦ï¼XON/XOFFã«ãããã­ã¼å¶å¾¡ãè¡ãï¼
+		ããªãã¡ï¼åä¿¡ãããã¡ã®æ®ãé åãå°ãªããªãã¨STOPï¼ã³ã³ãã­ã¼
+		ã«-Sï¼ãéåºãï¼æ®ãé åãå¢ããã°STARTï¼ã³ã³ãã­ã¼ã«-Qï¼ãé
+		åºããï¼
+
+ãªãï¼ãªã¼ãã³ç´å¾ã®ããã©ã«ãã®è¨­å®å¤ã¯(IOCTL_ECHO | IOCTL_CRLF |
+IOCTL_FCSND | IOCTL_FCRCV)ã§ããï¼
+
+(6) ER serial_ref_por(ID portid, T_SERIAL_RPOR *pk_rpor)
+
+portidã§æå®ãããã·ãªã¢ã«ãã¼ãã®ç¶æ
+ãåç
+§ãï¼pk_rporã§æå®ããããã±ã
+ãã«è¿ãï¼ãã±ããä¸­ã®reacntã«ã¯åä¿¡ãããã¡ä¸­ã®æå­æ°ãï¼wricntã«ã¯é
+ä¿¡ãããã¡ä¸­ã®æå­æ°ãè¿ãï¼
+
+8.2.2 ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®ãã®ä»ã®ãµã¼ãã¹
+
+ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã¯ï¼åè¨ã®ãµã¼ãã¹ã³ã¼ã«ã«å ãã¦ï¼åæå
+å¦çã¨æªéä¿¡æå­ã®ååºãå¦çãæã¤ï¼åæåå¦çã¯ï¼ã«ã¼ãã«ã«åæåã«ã¼
+ãã³ã¨ãã¦ç»é²ããï¼ã¾ãï¼ã¿ã¼ã²ããä¾å­ã§ï¼åæåå¦çï¼çµäºå¦çï¼å²è¾¼
+ã¿ãµã¼ãã¹ã«ã¼ãã³ãæã¤ï¼ãããã®ç»é²å¦çã¯serial.cfgã«å«ã¾ããï¼
+
+(1) void serial_initialize(intptr_t exinf)
+
+ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ããåæåããï¼ã«ã¼ãã«ã«åæåã«ã¼ãã³ã¨
+ãã¦ç»é²ããï¼exinfã¯ç¡è¦ããï¼
+
+(2) bool_t serial_get_chr(ID portid, char *p_c)
+
+portidã§æå®ãããã·ãªã¢ã«ãã¼ãã®éä¿¡ãããã¡ä¸­ã®æå­ãï¼p_cã®æãçªå°
+ã«åãåºãï¼trueãè¿ãé¢æ°ï¼æå­ããªãã£ãæã«ã¯ï¼falseãè¿ãï¼çµäºå¦ç
+ã«ã¼ãã³ä¸­ã§å¼ã³åºããã¨ãæ³å®ãã¦ããï¼
+
+8.3 ã·ã¹ãã ã­ã°ã¿ã¹ã¯
+
+ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã¯ï¼ã·ã¹ãã ã­ã°æ©è½ããã­ã°æ
+å ±ãåãåºãï¼ãããã·
+ã¹ãã ã®å¤é¨ã«åºåããããã®ãµã¼ãã¹ã§ããï¼
+
+ASPã«ã¼ãã«ã®ãªãªã¼ã¹ããã±ã¼ã¸ã«å«ã¾ããã·ã¹ãã ã­ã°ã¿ã¹ã¯ã¯ï¼ã·ãªã¢ã«
+ãã¼ãã«ã­ã°æ
+å ±ãæå­åã®å½¢ã§åºåãããã®ã§ï¼ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ä¸ä¾
+ã¨ããä½ç½®ä»ãã§æä¾ãã¦ããï¼
+
+ãã®ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã§
+logtask.cfgãã¤ã³ã¯ã«ã¼ããããã¨ã§ï¼ã·ã¹ãã ã«çµã¿è¾¼ããã¨ãã§ããï¼ã·
+ã¹ãã ã­ã°ã¿ã¹ã¯ã®ãµã¼ãã¹ãå¼ã³åºãã½ã¼ã¹ãã¡ã¤ã«ã§ã¯ï¼logtask.hãã¤ã³
+ã¯ã«ã¼ãããï¼
+
+ã·ã¹ãã ã­ã°ã¿ã¹ã¯ãå®è¡éå§ãããã¨ï¼éè¦åº¦ãLOG_EMERGã®ã­ã°æ
+å ±ãä½ã¬
+ãã«åºåæ©è½ãç¨ãã¦åºåãï¼éè¦åº¦ãLOG_NOTICEãããããé«ãã­ã°æ
+å ±ã
+ã­ã°ãããã¡ã«è¨é²ããããã«ï¼ã·ã¹ãã ã­ã°æ©è½ã®è¨­å®ãå¤æ´ãããï¼
+
+8.3.1 ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ãµã¼ãã¹ã³ã¼ã«
+
+ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ãµã¼ãã¹ãå¼ã³åºããµã¼ãã¹ã³ã¼ã«ã®ä»æ§ã¯æ¬¡ã®éãã§
+ããï¼
+
+(1) ER logtask_flush(uint_t count)
+
+ã·ã¹ãã ã­ã°æ©è½ã®ã­ã°ãããã¡ä¸­ã®ã­ã°æ
+å ±ã®æ°ãcountä»¥ä¸ã«ãªãã¾ã§å¾
+ã¤ï¼
+countã0ã®å ´åã«ã¯ï¼ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®éä¿¡ãããã¡ãç©ºã«
+ãªãã®ãå¾
+ã¤ï¼
+
+8.3.2 ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ãã®ä»ã®ãµã¼ãã¹
+
+ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã¯ï¼åè¨ã®ãµã¼ãã¹ã³ã¼ã«ã«å ãã¦ï¼ã¡ã¤ã³å¦çã¨çµäºå¦
+çãæã¤ï¼ã¡ã¤ã³å¦çã¯ã¿ã¹ã¯ã¨ãã¦ï¼çµäºå¦çã¯çµäºå¦çã«ã¼ãã³ã¨ãã¦ç»
+é²ããï¼ãããã®ç»é²å¦çã¯logtask.cfgã«å«ã¾ããï¼
+
+(1) void logtask_main(intptr_t exinf)
+
+ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ã¡ã¤ã³å¦çï¼exinfã«ã¯ï¼ã­ã°æ
+å ±ãåºåããã·ãªã¢ã«ãã¼
+ãã®IDçªå·ãæ¸¡ãï¼
+
+(2) void logtask_terminate(intptr_t exinf)
+
+ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®çµäºå¦çï¼ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®éä¿¡ãã
+ãã¡ã«èç©ããããã¼ã¿ã¨ï¼ã­ã°ãããã¡ã«è¨é²ãããã­ã°æ
+å ±ãï¼ä½ã¬ãã«
+åºåæ©è½ãç¨ãã¦åºåããï¼åºåãã¹ãã­ã°æ
+å ±ãããå ´åã«ã¯ï¼ãããåºå
+ããåã«ï¼"-- buffered messages --"ã¨ããæå­åãåºåããï¼exinfã¯ç¡è¦
+ããï¼
+
+ãã®é¢æ°ãçµäºå¦çã«ã¼ãã³ã¨ãã¦ç»é²ãããã¨ã§ï¼ã«ã¼ãã«çµäºæç¹ã§æªåº
+åã®ã­ã°æ
+å ±ã®ã»ã¨ãã©ãåºåãããã¨ãã§ããï¼ãã ãï¼æªåºåã®ã­ã°æ
+å ±
+ã®å
+ï¼ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ã¡ã¤ã³å¦çãï¼ã­ã°ãããã¡ããåãåºãããï¼
+ã¾ã ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã«éä¿¡ãã¦ããªãæ
+å ±ã¯ï¼ãã®é¢æ°ã§ã¯
+åºåã§ããªãï¼
+
+8.4 ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºå
+
+ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºåã¯ï¼ã«ã¼ãã«ã®èµ·åæã«ï¼ã«ã¼ãã«ã®åç§°ããã¼
+ã¸ã§ã³çªå·ï¼èä½æ¨©è¡¨ç¤ºãªã©ãåºåããããã®æ©è½ã§ããï¼
+
+ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºåã¯ï¼ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ã§banner.cfgãã¤ã³ã¯ã«ã¼ããããã¨ã§ï¼ã·ã¹ãã ã«çµã¿è¾¼ããã¨ãã§ããï¼
+
+ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºåã¯ï¼æ¬¡ã®é¢æ°ã§æ§æãããï¼
+
+(1) void print_banner(intptr_t exinf)
+
+ã·ã¹ãã ã­ã°æ©è½ãç¨ãã¦ï¼ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ãåºåããï¼banner.cfg
+ã«ãã£ã¦ï¼ã«ã¼ãã«ã«åæåã«ã¼ãã³ã¨ãã¦ç»é²ãããï¼exinfã¯ç¡è¦ãããï¼
+
+
+ï¼ï¼ãµãã¼ãã©ã¤ãã©ãª
+
+ãµãã¼ãã©ã¤ãã©ãªã¯ï¼ã¢ããªã±ã¼ã·ã§ã³ãã·ã¹ãã ãµã¼ãã¹ãä½æãããã
+ã«å©ç¨ã§ããã©ã¤ãã©ãªé¢æ°ç¾¤ã§ããï¼
+
+9.1 åºæ¬çãªã©ã¤ãã©ãªé¢æ°
+
+åºæ¬çãªã©ã¤ãã©ãªé¢æ°ãç¨ããå ´åã«ã¯ï¼t_stdlib.hãã¤ã³ã¯ã«ã¼ããï¼å¿
+
+è¦ã«å¿ãã¦strerror.cã¨t_perror.cãã³ã³ãã¤ã«ã»ãªã³ã¯ããï¼
+
+(1) const char *itron_strerror(ER ercd)
+
+ercdã§ç¤ºãããã¨ã©ã¼ã³ã¼ãã«å¯¾å¿ããã¡ã¤ã³ã¨ã©ã¼ã³ã¼ãã®æå­åãè¿ãï¼
+
+(2) void t_perror(uint_t prio, const char *file, int_t line,
+										const char *expr, ER ercd);
+
+ãµã¼ãã¹ã³ã¼ã«ãã¨ã©ã¼ãè¿ããå ´åã«ç¨ãããã¨ãæ³å®ããé¢æ°ã§ï¼ãã¡ã¤
+ã«åï¼è¡çªå·ï¼ã¡ã¤ã³ã¨ã©ã¼ã³ã¼ãç­ãï¼éè¦åº¦prioã§ï¼ã·ã¹ãã ã­ã°æ©è½ã
+ç¨ãã¦åºåããï¼
+
+9.2 ã­ã¥ã¼æä½ã©ã¤ãã©ãªé¢æ°
+
+ã­ã¥ã¼æä½ã©ã¤ãã©ãªã¯ï¼ã­ã¥ã¼ããããå«ããªã³ã°æ§é ã®ããã«ãªã³ã¯ã­ã¥ã¼
+ãæ±ãã©ã¤ãã©ãªã§ããï¼ã­ã¥ã¼ãããã®æ¬¡ã¨ã³ããªã¯ã­ã¥ã¼ã®å
+é ­ã®ã¨ã³ã
+ãªï¼åã¨ã³ããªã¯ã­ã¥ã¼ã®æ«å°¾ã®ã¨ã³ããªã¨ããï¼ã¾ãï¼ã­ã¥ã¼ã®å
+é ­ã®ã¨ã³
+ããªã®åã¨ã³ããªã¨ï¼ã­ã¥ã¼ã®æ«å°¾ã®ã¨ã³ããªã®æ¬¡ã¨ã³ããªã¯ï¼ã­ã¥ã¼ããã
+ã¨ããï¼ç©ºã®ã­ã¥ã¼ã¯ï¼æ¬¡ã¨ã³ããªï¼åã¨ã³ããªã¨ãèªåèªèº«ãæãã­ã¥ã¼ãã
+ãã§ããããï¼
+
+ã­ã¥ã¼æä½ã©ã¤ãã©ãªé¢æ°ãç¨ããå ´åã«ã¯ï¼queue.hãã¤ã³ã¯ã«ã¼ãããï¼
+
+ã­ã¥ã¼ãããã¨ã¨ã³ããªã®ããã®ãã¼ã¿æ§é ã¨ãã¦ï¼QUEUEæ§é ä½ãç¨ããï¼
+QUEUEæ§é ä½ã®å®ç¾©ã¯æ¬¡ã®éãï¼
+
+	typedef struct queue {
+		struct queue *p_next;		/* æ¬¡ã¨ã³ããªã¸ã®ãã¤ã³ã¿ */
+		struct queue *p_prev;		/* åã¨ã³ããªã¸ã®ãã¤ã³ã¿ */
+	} QUEUE;
+
+ã­ã¥ã¼æä½ã®ããã«ç¨æãã¦ããé¢æ°ã¯æ¬¡ã®éãï¼
+
+(1) void queue_initialize(QUEUE *p_queue);
+
+ã­ã¥ã¼ãåæåããï¼p_queueã«ã¯ã­ã¥ã¼ããããæå®ããï¼
+
+(2) void queue_insert_prev(QUEUE *p_queue, QUEUE *p_entry);
+
+p_queueã§æå®ããã¨ã³ããªã®åã«ï¼p_entryã§æå®ããã¨ã³ããªãæ¿å
+¥ããï¼
+p_queueã«ã­ã¥ã¼ããããæå®ããå ´åã«ã¯ï¼ã­ã¥ã¼ã®æ«å°¾ã«p_entryã§æå®ã
+ãã¨ã³ããªãæ¿å
+¥ãããã¨ã«ãªãï¼
+
+(3) void queue_insert_next(QUEUE *p_queue, QUEUE *p_entry);
+
+p_queueã§æå®ããã¨ã³ããªã®æ¬¡ã«ï¼p_entryã§æå®ããã¨ã³ããªãæ¿å
+¥ããï¼
+p_queueã«ã­ã¥ã¼ããããæå®ããå ´åã«ã¯ï¼ã­ã¥ã¼ã®å
+é ­ã«p_entryã§æå®ã
+ãã¨ã³ããªãæ¿å
+¥ãããã¨ã«ãªãï¼
+
+(4) void queue_delete(QUEUE *p_entry);
+
+p_entryã§æå®ããã¨ã³ããªãï¼ã­ã¥ã¼ããåé¤ããï¼
+
+(5) QUEUE *queue_delete_next(QUEUE *p_queue);
+
+p_queueã§æå®ããã¨ã³ããªã®æ¬¡ã®ã¨ã³ããªãã­ã¥ã¼ããåé¤ãï¼åé¤ããã¨ã³
+ããªãè¿ãï¼p_queueã«ã­ã¥ã¼ããããæå®ããå ´åã«ã¯ï¼ã­ã¥ã¼ã®å
+é ­ã®ã¨ã³
+ããªãåãåºããã¨ã«ãªãï¼p_queueã«ç©ºã®ã­ã¥ã¼ãæå®ãã¦å¼ã³åºãã¦ã¯ãªã
+ãªãï¼
+
+(6) bool_t queue_empty(QUEUE *p_queue);
+
+ã­ã¥ã¼ãç©ºã®å ´åã«ã¯trueï¼ããã§ãªãå ´åã«ã¯falseãè¿ãï¼p_queueã«ã¯
+ã­ã¥ã¼ããããæå®ããï¼
+
+9.3 ã·ã¹ãã ã­ã°åºåç¨ã©ã¤ãã©ãªé¢æ°
+
+ã·ã¹ãã ã­ã°åºåç¨ã©ã¤ãã©ãªé¢æ°ã¯ï¼ã­ã°æ
+å ±ããã©ã¼ãããåºåãããã
+ã«ï¼ã·ã¹ãã ã­ã°ã¿ã¹ã¯ããã³ã·ã¹ãã ã­ã°æ©è½ã§ç¨ããããã®é¢æ°ç¾¤ã§ããï¼
+
+ã·ã¹ãã ã­ã°åºåç¨ã©ã¤ãã©ãªé¢æ°ãç¨ããå ´åã«ã¯ï¼log_output.hãã¤ã³ã¯
+ã«ã¼ããï¼log_output.cãã³ã³ãã¤ã«ã»ãªã³ã¯ããï¼
+
+(1) void syslog_printf(const char *format, const intptr_t *p_args,
+												void (*putc)(char))
+
+formatã§æå®ããããã©ã¼ãããè¨è¿°ã¨p_argsã§æå®ãããå¼æ°åããä½æã
+ãã¡ãã»ã¼ã¸ãï¼1æå­åºåé¢æ°putcãç¨ãã¦åºåããï¼
+
+(2) void syslog_print(const SYSLOG *p_syslog, void (*putc)(char))
+
+p_syslogã§æå®ãããã­ã°æ
+å ±ãæå­åã«ç´ãï¼1æå­åºåé¢æ°putcãç¨ãã¦åº
+åããï¼
+
+(3) void syslog_lostmsg(uint_t lost, void (*putc)(char))
+
+loståã®ã­ã°æ
+å ±ãå¤±ãããæ¨ã®ã¡ãã»ã¼ã¸ãï¼1æå­åºåé¢æ°putcãç¨ãã¦åº
+åããï¼
+
+9.4 å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«
+
+å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ã¯ï¼ã·ã¹ãã ã®ãªã¢ã«ã¿ã¤ã æ§è½ãè©ä¾¡ãããã
+ã«ï¼ãã­ã°ã©ã åºéã®å®è¡æéãè¨æ¸¬ãï¼ãã®åå¸ãéè¨ã»è¡¨ç¤ºããããã®ã©
+ã¤ãã©ãªé¢æ°ç¾¤ã§ããï¼
+
+å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ãç¨ããå ´åã«ã¯ï¼histogram.hãã¤ã³ã¯ã«ã¼ããï¼
+histogram.cãã³ã³ãã¤ã«ã»ãªã³ã¯ããï¼
+
+å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ã¯ï¼è¤æ°ã®ãã­ã°ã©ã åºéã®å®è¡æéãè¨æ¸¬ã»é
+è¨ã»è¡¨ç¤ºãããã¨ãã§ããï¼ãã­ã°ã©ã åºéæ¯ã«ï¼å®è¡æéåå¸ãè¨é²ããã
+ãã®ãã¼ã¿æ§é ãæã¤ï¼ã©ã®ãã¼ã¿æ§é ãç¨ããããï¼IDçªå·ï¼histidï¼ã§æ
+å®ããï¼ä½¿ç¨ã§ãããã¼ã¿æ§é ã®æ°ã¯ï¼TNUM_HISTã§å®ç¾©ãããï¼ããªãã¡ï¼
+IDçªå·ã¨ãã¦ï¼1ï½TNUM_HISTãæå®ãããã¨ãã§ããï¼TNUM_HISTã¯ï¼ããã©ã«
+ãå¤ãhistgram.cã®ä¸­ã§å®ç¾©ããã¦ããï¼ã³ã³ãã¤ã«ãªãã·ã§ã³ãã¿ã¼ã²ãã
+ä¾å­é¨ï¼target_test.hã¾ãã¯ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ã«ããå¤
+æ´ãããã¨ãã§ããï¼
+
+ã¿ã¼ã²ããä¾å­é¨ã§è¨­å®ãå¤æ´ãã¦ããªãå ´åï¼å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«
+ã¯ï¼ã«ã¼ãã«ã®æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ãåç
+§ããæ©è½ï¼get_utmï¼ãç¨ãã¦å®
+è¡æéãè¨æ¸¬ããï¼ãã®ããï¼å®è¡æéã¯ãã¤ã¯ã­ç§åä½ã§è¨é²ãããï¼ç²¾åº¦
+ã¯ã¿ã¼ã²ããä¾å­ï¼ï¼ã¾ãï¼è¨é²ãããæéã«ã¯ï¼è¨æ¸¬ã®ããã®ãªã¼ãããã
+ï¼get_utmã®å®è¡æéï¼Î±ï¼ãå«ã¾ããï¼
+
+ã¿ã¼ã²ããä¾å­é¨ã§è¨­å®ãå¤æ´ãã¦ããå ´åã®ä»æ§ã«ã¤ãã¦ã¯ï¼ã¿ã¼ã²ããä¾
+å­é¨ã®ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ãåç
+§ãããã¨ï¼
+
+(1) void init_hist(ID histid, uint_t maxval, uint_t histarea[])
+
+histidã§æå®ããããã¼ã¿æ§é ãåæåããï¼maxvalã«ã¯è¨é²ããæå¤§æéãï¼
+histareaã«ã¯è¨é²é åã®å
+é ­çªå°ãæå®ããï¼histareaã§å§ã¾ãè¨æ¶é åã¯ï¼
+è¦ç´ æ°ãmaxvalã«æå®ããå¤+1ã®uint_tåã®é
+åã¨ãã¦ç¢ºä¿ããï¼ä¾ãã°ï¼
+maxvalã«1000ãæå®ããå ´åã«ã¯ï¼histareaã«ã¯è¦ç´ æ°ã1001ã®uint_tåã®é
+
+åã®å
+é ­çªå°ãæ¸¡ãï¼
+
+(2) void begin_measure(ID histid)
+
+å®è¡æéãè¨æ¸¬ãããã­ã°ã©ã åºéã®ç´åã«å¼ã³åºãé¢æ°ï¼histidã§æå®ãã
+ããã¼ã¿æ§é ã«ï¼ç¾å¨ã®ã·ã¹ãã æå»ãè¨é²ããï¼
+
+(3) void end_measure(ID histid)
+
+å®è¡æéãè¨æ¸¬ãããã­ã°ã©ã åºéã®ç´å¾ã«å¼ã³åºãé¢æ°ï¼ç¾å¨ã®ã·ã¹ãã æ
+å»ã¨ï¼histidã§æå®ããããã¼ã¿æ§é ã«è¨é²ãããéå§æå»ããï¼ãã­ã°ã©ã 
+åºéã®å®è¡æéãæ±ãï¼ãã®çµæãè¨é²ããï¼
+
+(4) void print_hist(ID histid)
+
+ã·ã¹ãã ã­ã°æ©è½ãç¨ãã¦ï¼å®è¡æéåå¸ã®è¨æ¸¬çµæãåºåããï¼
+
+
+ï¼ï¼ï¼ãã¹ããã­ã°ã©ã 
+
+ãã¹ããã­ã°ã©ã ã¯ï¼ã«ã¼ãã«ã®æ©è½ãã¹ãããã³æ§è½è©ä¾¡ãè¡ãããã®ãã­
+ã°ã©ã ç¾¤ã§ããï¼
+
+10.1 ãã¹ããã­ã°ã©ã ç¨ã©ã¤ãã©ãª
+
+ãã¹ããã­ã°ã©ã ç¨ã©ã¤ãã©ãªã¯ï¼ãã­ã°ã©ã ä¸­ã®ãã§ãã¯ãã¤ã³ããæ­£ãã
+é åºã§å®è¡ããããã¨ãªã©ï¼ãã­ã°ã©ã ãæ­£ããåä½ãã¦ãããã¨ããã§ãã¯
+ããããã®é¢æ°ç¾¤ã§ããï¼ãã­ã°ã©ã ãæ­£ããåä½ãã¦ããªããã¨ãæ¤åºãã
+å ´åã«ã¯ï¼ãã­ã°ã©ã ãçµäºãããï¼
+
+ãã¹ããã­ã°ã©ã ç¨ã©ã¤ãã©ãªé¢æ°ãç¨ããå ´åã«ã¯ï¼test_lib.hãã¤ã³ã¯ã«ã¼
+ããï¼test_lib.cãã³ã³ãã¤ã«ã»ãªã³ã¯ããï¼
+
+(1) void check_point(uint_t count)
+
+ãã§ãã¯ãã¤ã³ããééããéã«å¼ã³åºãé¢æ°ï¼countã«ã¯ï¼ä½çªç®ã®ãã§ãã¯
+ãã¤ã³ãã§ããããæå®ããï¼æåã®ãã§ãã¯ãã¤ã³ãã§ã¯1ãæå®ããï¼ï¼
+countã®å¤ãï¼æåã®ãã§ãã¯ãã¤ã³ãã«ããã¦ã¯1ã§ãªãå ´åã«ï¼ããä»¥éã®
+ãã§ãã¯ãã¤ã³ãã«ããã¦ã¯ï¼åã®ãã§ãã¯ãã¤ã³ãééæã«countã«æå®ãã
+å¤ã«1ãå ããå¤ã§ãªãå ´åã«ï¼ãã­ã°ã©ã ãæ­£ããåä½ãã¦ããªãã¨è¦ãªãï¼
+ãã­ã°ã©ã ãçµäºãããï¼
+
+(2) void check_finish(uint_t count)
+
+æå¾ã®ãã§ãã¯ãã¤ã³ãã«å°éããéã«å¼ã³åºãé¢æ°ï¼countã«ã¯ï¼ä½çªç®ã®
+ãã§ãã¯ãã¤ã³ãã§ããããæå®ããï¼æåã®ãã§ãã¯ãã¤ã³ãã§ã¯1ãæå®ã
+ãï¼ï¼countã®å¤ãï¼åã®ãã§ãã¯ãã¤ã³ãééæã«countã«æå®ããå¤ã«1ãå 
+ããå¤ã§ãªãå ´åã«ï¼ãã­ã°ã©ã ãæ­£ããåä½ãã¦ããªãã¨è¦ãªãï¼ãã®é¢æ°
+ã¯ï¼ãã­ã°ã©ã ãæ­£ããåä½ãã¦ããï¼ããªãã«é¢ãããï¼ãã­ã°ã©ã ãçµäº
+ãããï¼
+
+(3) void check_assert(bool_t exp)
+
+expãçã§ãããã¨ããã§ãã¯ãããå ´åã«å¼ã³åºãé¢æ°ï¼expãå½ã§ããå ´å
+ã«ï¼ãã­ã°ã©ã ãæ­£ããåä½ãã¦ããªãã¨è¦ãªãï¼ãã­ã°ã©ã ãçµäºãããï¼
+
+(4) void check_ercd(ER ercd, ER expected_ercd)
+
+ercdãexpected_ercdã«ä¸è´ãã¦ãããã¨ããã§ãã¯ãããå ´åã«å¼ã³åºãé¢æ°ï¼
+ercdãexpected_ercdã«ä¸è´ãã¦ããªãå ´åã«ï¼ãã­ã°ã©ã ãæ­£ããåä½ãã¦ã
+ãªãã¨è¦ãªãï¼ãã­ã°ã©ã ãçµäºãããï¼
+
+(5) void check_state(bool_t ctx, bool_t loc, PRI ipm,
+						bool_t dsp, bool_t dpn, bool_t tex)
+
+ã¿ã¹ã¯ã³ã³ãã­ã¹ãã«ããã¦ï¼ã·ã¹ãã ç¶æ
+ãæå¾
+ãããã®ã«ãªã£ã¦ããã
+ãã§ãã¯ãããæã«å¼ã³åºãé¢æ°ï¼ctxï¼locï¼dspï¼dpnï¼texã«ã¯ãããã
+sns_ctx()ï¼sns_loc()ï¼sns_dsp()ï¼sns_dpn()ï¼sns_tex()ã®è¿å¤ã¨ãã¦æå¾
+ã
+ããå¤ãï¼ipmã«ã¯get_ipm()ã§åç
+§ã§ããå²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã¨ãã¦æå¾
+ãã
+ãå¤ãæå®ããï¼ãã®å
+ã®ãããããæå¾
+ãããå¤ã¨ä¸è´ãã¦ããªãå ´åã«ï¼
+ãã­ã°ã©ã ãæ­£ããåä½ãã¦ããªãã¨è¦ãªãï¼ãã­ã°ã©ã ãçµäºãããï¼
+
+(6) void check_state_i(bool_t ctx, bool_t loc,
+						bool_t dsp, bool_t dpn, bool_t tex)
+
+éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«ããã¦ï¼ã·ã¹ãã ç¶æ
+ãæå¾
+ãããã®ã«ãªã£ã¦ããã
+ãã§ãã¯ãããæã«å¼ã³åºãé¢æ°ï¼ctxï¼locï¼dspï¼dpnï¼texã«ã¯ãããã
+sns_ctx()ï¼sns_loc()ï¼sns_dsp()ï¼sns_dpn()ï¼sns_tex()ã®è¿å¤ã¨ãã¦æå¾
+ã
+ããå¤ãæå®ããï¼ãã®å
+ã®ãããããæå¾
+ãããå¤ã¨ä¸è´ãã¦ããªãå ´åã«ï¼
+ãã­ã°ã©ã ãæ­£ããåä½ãã¦ããªãã¨è¦ãªãï¼ãã­ã°ã©ã ãçµäºãããï¼
+
+(7) void set_bit_func(BIT_FUNC bit_func)
+
+ãã§ãã¯ãã¤ã³ãã«ããã¦å¼ã³åºãèªå·±è¨ºæ­é¢æ°ãè¨­å®ããããã®é¢æ°ï¼
+
+(8) void test_start(char *progname)
+
+ãã¹ãéå§æã«ï¼ãã¹ããã­ã°ã©ã åãåºåããããã®é¢æ°ï¼
+
+(9) void syslog_flush(void)
+
+ã·ã¹ãã ã­ã°æ©è½ã«è¨é²ãããã­ã°æ
+å ±ãï¼ä½ã¬ãã«åºåæ©è½ã«ç¨ããæå­åº
+åé¢æ°ã«ããåºåããï¼
+
+(10) void test_finish(void)
+
+ãã­ã°ã©ã ãçµäºãããé¢æ°ï¼ãã§ãã¯ãã¤ã³ããä½¿ç¨ããªãå ´åã«ï¼ãã®é¢
+æ°ãç¨ããï¼
+
+10.2 ã«ã¼ãã«ã®æ´åæ§æ¤æ»
+
+ãã§ãã¯ãã¤ã³ãã«ããã¦å¼ã³åºãèªå·±è¨ºæ­ã«ä½¿ãããã®ãã­ã°ã©ã ã¨ãã¦ï¼
+ã«ã¼ãã«ã®æ´åæ§æ¤æ»ãç¨æãã¦ããï¼ã«ã¼ãã«ã®æ´åæ§æ¤æ»ã¯ï¼ã«ã¼ãã«å
+
+ã®åãã¼ã¿æ§é ã®ä¸è²«æ§ãæ¤æ»ããï¼ç¾æç¹ã§ã¯æªå®æï¼ï¼
+
+ã«ã¼ãã«ã®æ´åæ§æ¤æ»ãç¨ããå ´åã«ã¯ï¼bit_kernel.cãã³ã³ãã¤ã«ã»ãªã³ã¯
+ããï¼
+
+(1) ER bit_kernel(void)
+
+ã«ã¼ãã«å
+ã®åãã¼ã¿æ§é ã®ä¸è²«æ§ãæ¤æ»ãï¼ä¸è²«æ§ãç¢ºèªã§ããå ´åã«E_OKï¼
+ã§ããªãã£ãå ´åã«E_SYSã¨ã©ã¼ãè¿ãé¢æ°ï¼E_SYSã¨ã©ã¼ãè¿ãéã®ãµãã¨ã©ã¼
+ã³ã¼ãã¨ãã¦ï¼ä¸è²«æ§ãç¢ºèªã§ããªãã£ãé 
+ç®ãç¤ºãã³ã¼ããè¿ãï¼
+
+10.3 æ©è½ãã¹ããã­ã°ã©ã 
+
+testãã£ã¬ã¯ããªã«ç½®ããã"test"ã§å§ã¾ããã­ã°ã©ã ã¯ï¼ã«ã¼ãã«ã®æ©è½ã
+ã¹ããè¡ãããã®ãã­ã°ã©ã ã§ããï¼
+
+æ©è½ãã¹ããã­ã°ã©ã ã¯ãã¹ããã­ã°ã©ã ç¨ã©ã¤ãã©ãªãä½¿ç¨ãã¦ããããï¼
+æ§ç¯ããå ´åã«ã¯ï¼Makefileã®APPL_COBJSã«ï¼test_lib.oãè¿½å ããå¿
+è¦ãã
+ãï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹ã¯ãªãããä½¿ç¨ããå ´åã«ã¯ï¼-Uãªãã·ã§ã³ã§
+test_lib.oãæå®ããï¼å
+·ä½çã«ã¯ï¼æ¬¡ã®ã³ãã³ããå®è¡ããã°ããï¼æ§ç¯ç¨
+ã®ãã£ã¬ã¯ããªãï¼ASPã«ã¼ãã«ã®ã½ã¼ã¹ãã¡ã¤ã«ãå±éãããã£ã¬ã¯ããªã®ç´
+ä¸ã«ããã¨ä»®å®ãã¦ããï¼ï¼
+
+	% perl ../configure -T <ã¿ã¼ã²ããç¥ç§°> -A <æ©è½ãã¹ããã­ã°ã©ã å> \
+											-a ../test -U test_lib.o
+
+ãã ãï¼CPUä¾å¤å¦çã®ãã¹ã(1)ï½(13)ã¯ï¼åä¸ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼
+ã·ã§ã³ãå
+±ç¨ãã¦ããããï¼test_cpuexc.cfgãæ¬¡ã®ããã«ã³ãã¼ãã¦ããå¿
+è¦
+ãããï¼
+
+	% cp ../test/test_cpuexc.cfg test_cpuexc<ãã¹ãçªå·>.cfg
+
+ç¾ãã¼ã¸ã§ã³ã§ç¨æãã¦ããæ©è½ãã¹ããã­ã°ã©ã ã¯æ¬¡ã®éãï¼
+
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+11.5 ã«ã¼ãã«ã®å
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+é¨ã®åç§°ãä»ã®ã¢ã¸ã¥ã¼ã«å
+é¨ã®åç§°ã¨è¡çªã
+ããã¨ãé¿ããããã«ï¼ã«ã¼ãã«ã®å
+é¨ã·ã³ãã«ã¯ï¼Cè¨èªã¬ãã«ã§ï¼å
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+ãç¨ãã¦ï¼ããã"_kernel_"ã¾ãã¯"_KERNEL_"ã§å§ã¾ãååï¼èªç¶ãªååã
+yyyyyã®å ´åã«ã¯ï¼_kernel_yyyyyï¼ã«ãªãã¼ã ããä»çµã¿ãç¨ãã¦ããï¼
+
+å
+·ä½çã«ã¯ï¼é¢é£ãããã£ã¬ã¯ããªã«xxx_rename.defãç½®ãï¼ãããããªãã¼
+ã ã®ããã®ããããã¡ã¤ã«ï¼xxx_rename.hããã³xxx_unrename.hï¼ãçæãã
+ãã¼ã«ï¼utils/genrenameï¼ãç¨æãã¦ããï¼
+
+ãã®ä»çµã¿ã¯ï¼ã½ã¼ã¹ã³ã¼ãã®å¯èª­æ§åä¸ã«å½¹ç«ã¤ä¸æ¹ã§ï¼å¼å®³ãããï¼ä¾ã
+ã°ï¼å¤ãã®ãããã¬ã§ï¼ã½ã¼ã¹ã³ã¼ãä¸­ã®åç§°ã¨ãªãã¸ã§ã¯ãã³ã¼ãä¸­ã®åç§°
+ãç°ãªãããã«ï¼ã½ã¼ã¹ã³ã¼ãä¸­ã®å¤æ°åãæå®ãã¦å¤ãèª­ãã ãï¼é¢æ°åã
+æå®ãã¦ãã¬ã¼ã¯ãã¤ã³ããç½®ãã¨ãã£ããã¨ãã§ããªãï¼
+
+ãã®ç¶æ³ã«å¯¾å¿ããããã«ï¼ASPã«ã¼ãã«ã§ã¯ï¼ã½ã¼ã¹ã³ã¼ãä¸­ã®è©²å½ããåç§°
+ããªãã¼ã ããããã®ã¦ã¼ãã£ãªãã£ï¼utils/applyrenameï¼ãç¨æãã¦ããï¼
+applyrenameã¦ã¼ãã£ãªãã£ã«ï¼ãªãã¼ã å®ç¾©ãã¡ã¤ã«ï¼xxx_rename.defï¼ã®ã
+ãªãã£ãã¯ã¹ï¼xxxã®é¨åï¼ã¨ï¼ãªãã¼ã ããããã¡ã¤ã«ãªã¹ããä¸ããã¨ï¼ãª
+ãã¼ã å¦çãè¡ãªãï¼ä¾ãã°ï¼kernelãã£ã¬ã¯ããªã®ãã¹ã¦ã®ãã¡ã¤ã«ã«å¯¾ã
+ã¦ï¼ã«ã¼ãã«ã®å
+é¨ã·ã³ãã«ããªãã¼ã ããã«ã¯ï¼æ¬¡ã®ã³ãã³ããå®è¡ããã°
+ããï¼
+
+	% cd kernel
+	% ../utils/applyrename kernel *
+
+ã¾ãï¼ã¿ã¼ã²ããä¾å­é¨ã®ãã£ã¬ã¯ããªã®ãã¹ã¦ã®ãã¡ã¤ã«ã«å¯¾ãã¦ï¼ã«ã¼ã
+ã«ã®å
+é¨ã·ã³ãã«ããªãã¼ã ããã«ã¯ï¼æ¬¡ã®ãããªã³ãã³ããå®è¡ããã°ããï¼
+
+	% cd target/dve68k_gcc/
+	% ../../utils/applyrename target *
+	% ../../utils/applyrename ../../kernel/kernel *
+
+11.6 ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ãã®ä½¿ç¨æ¹æ³
+
+ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ããã¿ã¼ã²ããä¾å­é¨ã«çµã¿è¾¼ã¾ãã¦ããå ´
+åã«ã¯ï¼ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¹ã¯ãªããã«ãããä½¿ç¨ãããã¨ãæç¤ºãã
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+ãæå¹ã«ãªãï¼
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+ãã¬ã¼ã¹ã­ã°è¨é²ã®ä½¿ç¨æ¹æ³ã®ä¸ä¾ã¨ãã¦ï¼ã·ã¹ãã èµ·åæã«ãã¬ã¼ã¹ã­ã°ã®
+è¨é²ãéå§ãï¼ã·ã¹ãã çµäºæã«è¨é²ãããã¬ã¼ã¹ã­ã°ããã³ãããããã«ã¯ï¼
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+
+	#include "logtrace/trace_config.h"
+	ATT_INI({ TA_NULL, TRACE_AUTOSTOP, trace_initialize });
+	ATT_TER({ TA_NULL, target_fput_log, trace_dump });
+
+ããã§ï¼åæåã«ã¼ãã³ï¼trace_initializeï¼ã¸ã®å¼æ°ã¯ï¼åæåç´å¾ã®ãã¬ã¼
+ã¹ã­ã°ã®åä½ã¢ã¼ããæå®ãããã®ã§ããï¼æå®ã§ããåä½ã¢ã¼ãã«ã¤ãã¦ã¯ï¼
+arch/logtrace/trace_config.hä¸­ã®ã³ã¡ã³ãã«èª¬æãããï¼
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+ããï¼ãã¬ã¼ã¹ã­ã°ãå¥ã®æ¹æ³ã§åãåºãå ´åã«ã¯ï¼çµäºå¦çã«ã¼ãã³ãç»é²
+ããå¿
+è¦ã¯ãªãï¼
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+ä»¥ä¸ã®æ¹æ³ã§ã¯ï¼trace_initializeãåæåã«ã¼ãã³ã§ï¼trace_dumpãçµäºå¦
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+ã°ï¼ã«ã¼ãã«ãªãã¸ã§ã¯ãã®åæåå¦çãï¼trace_initializeãããå
+ã«ç»é²
+ããåæåã«ã¼ãã³ï¼trace_dumpãããå
+ã«ç»é²ããçµäºå¦çã«ã¼ãã³ï¼ã§ã
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+é©åãªå ´æã§å¼ã¶ããã«ä¿®æ­£ãããã¨ãå¿
+è¦ã§ããï¼
+
+11.7 ã·ã¹ãã ã®èµ·åæã®åæåå¦ç
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+ã·ã¹ãã ã®èµ·åæã«ã¢ããªã±ã¼ã·ã§ã³ã§å¿
+è¦ã¨ãªãåæåå¦çãè¡ãããã®æ©
+è½ã¨ãã¦åæåã«ã¼ãã³ãç¨æããã¦ãããï¼åæåã«ã¼ãã³ãå®è¡ãããã
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+è¦ãªåæåå¦çãããå ´åãããï¼
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+ãã¦ããï¼hardware_init_hookã¯ï¼ã«ã¼ãã«ã®ã¿ã¼ã²ããä¾å­é¨ã§ç¨æããã¦
+ããã®ãæ¨æºã§ãããï¼ãããã¢ããªã±ã¼ã·ã§ã³ã§ç¨æãããã®ã«ç½®ãæãï¼
+ãã®ä¸­ã§ã¢ããªã±ã¼ã·ã§ã³ã§å¿
+è¦ã¨ãªãåæåå¦çãè¡ããã¨ãã§ããï¼
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+ãã ãï¼hardware_init_hookã®ä½æããå ´åã«ã¯ï¼bssã»ã¯ã·ã§ã³ã¨dataã»ã¯ã·ã§
+ã³ãåæåããã¦ããªããã¨ãï¼ã©ã¤ãã©ãªãåæåããã¦ããªããã¨ï¼Cè¨èª
+ã§è¨è¿°ã§ããã¨ã¯éããªããã¨ãªã©ã«æ³¨æãå¿
+è¦ã§ããï¼ä½æã«ããã£ã¦ã¯ï¼
+ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ãããåç
+§ãããã¨ï¼
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+å®è£
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+11.8 rodataã»ã¯ã·ã§ã³ãRAMã«ç½®ãå ´å
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+ä½ããã®çç±ã§rodataã»ã¯ã·ã§ã³ãRAMã«ç½®ãå ´åï¼dataã»ã¯ã·ã§ã³ã¨åæ§ã«ï¼
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+ã¯ãªããã¨ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ãä¿®æ­£ããå¿
+è¦ããããï¼ããã«å ãã¦ï¼
+ä»¥ä¸ã®æªç½®ãå¿
+è¦ã§ããï¼
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+ãã¡ã¤ã«ãç¨ãã¦ï¼ã­ã¼ãã¢ã¸ã¥ã¼ã«å
+ã®rodataã»ã¯ã·ã§ã³ãèª­ã¿è¾¼ããã¨ã§ï¼
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+æ§ã«æ±ãã¨ï¼ãã®ã¢ã¯ã»ã¹ã¢ãã¬ã¹ï¼RAMå
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+ããªã³ã«ã¹ã¯ãªããï¼æ¨æºã®ãªã³ã«ã¹ã¯ãªããã¯ãã®ããã«ãªã£ã¦ããï¼ãç¨
+ããï¼ãµã³ãã«ã®Makefileã§ã¯ï¼LDSCRIPTã«ãããªã³ã«ã¹ã¯ãªãããæå®ãã
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+§ãããã¨ï¼
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+
+ï¼ï¼ï¼åèæ
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+12.1 å©ç¨æ¡ä»¶ã¨å©ç¨å ±å
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+ASPã«ã¼ãã«ã®å©ç¨æ¡ä»¶ã¯ï¼åãã¡ã¤ã«ã®å
+é ­ã«è¡¨ç¤ºããã¦ããï¼èä½æ¨©ã¯ï¼å
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+12.2 ä¿è¨¼ã»é©ç¨æ§ã»ãµãã¼ã
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+		ã»TOPPERSãã­ã¸ã§ã¯ãããã®ãªãªã¼ã¹ã«å¯¾ããæ¹é ç®æï¼ããã°ï¼
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+	ã¿ã¼ã²ããã·ã¹ãã ã«é¢ããæ
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+
+TOPPERSãã­ã¸ã§ã¯ãã®ã¡ã³ãã¯ï¼ãã®ãµã¤ãããï¼ã¦ã§ãã¤ã³ã¿ãã§ã¼ã¹ãã
+ã³subversionãµã¼ãã«ããï¼ASPã«ã¼ãã«ã®éçºä¸­ã®ãã¼ã¸ã§ã³ãå¾ããã¨ãã§
+ããï¼ã¾ãï¼ãã°ãã©ãã­ã³ã°ãã¼ã¿ãã¼ã¹ã«ã¢ã¯ã»ã¹ãããã¨ãã§ãï¼éå»
+ã®ãã°å±¥æ­´ã¸ã®ã¢ã¯ã»ã¹ãï¼ãã°ã®ç»é²ããããã¨ãã§ããï¼
+
+12.7 TOPPERSãã­ã¸ã§ã¯ãã¸ã®åå 
+
+TOPPERSãã­ã¸ã§ã¯ãã§ã¯ï¼ä½ããã®å½¢ã§ãã­ã¸ã§ã¯ãã«è²¢ç®ãã¦ããã ããæ¹ï¼
+ãã­ã¸ã§ã¯ãã§éçºããã½ããã¦ã§ã¢ããä½¿ãã®æ¹ï¼ãã­ã¸ã§ã¯ãã«èå³ãã
+æã¡ã®æ¹ã®åå ãæ±ãã¦ããï¼TOPPERSãã­ã¸ã§ã¯ãã¸ã®åå æ¹æ³ã«ã¤ãã¦ã¯ï¼
+ä»¥ä¸ã®ãã¼ã¸ã«èª¬æãããï¼
+
+	http://www.toppers.jp/joinus.html
+
+
+ï¼ï¼ï¼ãªãã¡ã¬ã³ã¹
+
+13.1 ãµã¼ãã¹ã³ã¼ã«ä¸è¦§
+
+(1) ã¿ã¹ã¯ç®¡çæ©è½
+
+	ER ercd = act_tsk(ID tskid)
+	ER ercd = iact_tsk(ID tskid)
+	ER_UINT	actcnt = can_act(ID tskid)
+	ER ercd = ext_tsk(void)
+	ER ercd = ter_tsk(ID tskid)
+	ER ercd = chg_pri(ID tskid, PRI tskpri)
+	ER ercd = get_pri(ID tskid, PRI *p_tskpri)
+	ER ercd = get_inf(intptr_t *p_exinf)
+	ER ercd = ref_tsk(ID tskid, T_RTSK *pk_rtsk)
+
+(2) ã¿ã¹ã¯ä»å±åææ©è½
+
+	ER ercd = slp_tsk(void)
+	ER ercd = tslp_tsk(TMO tmout)
+	ER ercd = wup_tsk(ID tskid)
+	ER ercd = iwup_tsk(ID tskid)
+	ER_UINT wupcnt = can_wup(ID tskid)
+	ER ercd = rel_wai(ID tskid)
+	ER ercd = irel_wai(ID tskid)
+	ER ercd = sus_tsk(ID tskid)
+	ER ercd = rsm_tsk(ID tskid)
+	ER ercd = dly_tsk(RELTIM dlytim)
+
+(3) ã¿ã¹ã¯ä¾å¤å¦çæ©è½
+
+	ER ercd = ras_tex(ID tskid, TEXPTN rasptn)
+	ER ercd = iras_tex(ID tskid, TEXPTN rasptn)
+	ER ercd = dis_tex(void)
+	ER ercd = ena_tex(void)
+	bool_t state = sns_tex(void)
+	ER ercd = ref_tex(ID tskid, T_RTEX *pk_rtex)
+
+(4) åæã»éä¿¡æ©è½
+
+	ER ercd = sig_sem(ID semid)
+	ER ercd = isig_sem(ID semid)
+	ER ercd = wai_sem(ID semid)
+	ER ercd = pol_sem(ID semid)
+	ER ercd = twai_sem(ID semid, TMO tmout)
+	ER ercd = ini_sem(ID semid)
+	ER ercd = ref_sem(ID semid, T_RSEM *pk_rsem)
+
+	ER ercd = set_flg(ID flgid, FLGPTN setptn)
+	ER ercd = iset_flg(ID flgid, FLGPTN setptn)
+	ER ercd = clr_flg(ID flgid, FLGPTN clrptn)
+	ER ercd = wai_flg(ID flgid, FLGPTN waiptn,
+						MODE wfmode, FLGPTN *p_flgptn)
+	ER ercd = pol_flg(ID flgid, FLGPTN waiptn,
+						MODE wfmode, FLGPTN *p_flgptn)
+	ER ercd = twai_flg(ID flgid, FLGPTN waiptn,
+						MODE wfmode, FLGPTN *p_flgptn, TMO tmout)
+	ER ercd = ini_flg(ID flgid)
+	ER ercd = ref_flg(ID flgid, T_RFLG *pk_rflg)
+
+	ER ercd = snd_dtq(ID dtqid, intptr_t data)
+	ER ercd = psnd_dtq(ID dtqid, intptr_t data)
+	ER ercd = ipsnd_dtq(ID dtqid, intptr_t data)
+	ER ercd = tsnd_dtq(ID dtqid, intptr_t data, TMO tmout)
+	ER ercd = fsnd_dtq(ID dtqid, intptr_t data)
+	ER ercd = ifsnd_dtq(ID dtqid, intptr_t data)
+	ER ercd = rcv_dtq(ID dtqid, intptr_t *p_data)
+	ER ercd = prcv_dtq(ID dtqid, intptr_t *p_data)
+	ER ercd = trcv_dtq(ID dtqid, intptr_t *p_data, TMO tmout)
+	ER ercd = ini_dtq(ID dtqid)
+	ER ercd = ref_dtq(ID dtqid, T_RDTQ *pk_rdtq)
+
+	ER ercd = snd_pdq(ID pdqid, intptr_t data, PRI datapri)
+	ER ercd = psnd_pdq(ID pdqid, intptr_t data, PRI datapri)
+	ER ercd = ipsnd_pdq(ID pdqid, intptr_t data, PRI datapri)
+	ER ercd = tsnd_pdq(ID pdqid, intptr_t data, PRI datapri, TMO tmout)
+	ER ercd = rcv_pdq(ID pdqid, intptr_t *p_data, PRI *p_datapri)
+	ER ercd = prcv_pdq(ID pdqid, intptr_t *p_data, PRI *p_datapri)
+	ER ercd = trcv_pdq(ID pdqid, intptr_t *p_data, PRI *p_datapri, TMO tmout)
+	ER ercd = ini_pdq(ID pdqid)
+	ER ercd = ref_pdq(ID pdqid, T_RPDQ *pk_rpdq)
+
+	ER ercd = snd_mbx(ID mbxid, T_MSG *pk_msg)
+	ER ercd = rcv_mbx(ID mbxid, T_MSG **ppk_msg)
+	ER ercd = prcv_mbx(ID mbxid, T_MSG **ppk_msg)
+	ER ercd = trcv_mbx(ID mbxid, T_MSG **ppk_msg, TMO tmout)
+	ER ercd = ini_mbx(ID mbxid)
+	ER ercd = ref_mbx(ID mbxid, T_RMBX *pk_rmbx)
+
+(5) ã¡ã¢ãªãã¼ã«ç®¡çæ©è½
+
+	ER ercd = get_mpf(ID mpfid, void **p_blk)
+	ER ercd = pget_mpf(ID mpfid, void **p_blk)
+	ER ercd = tget_mpf(ID mpfid, void **p_blk, TMO tmout)
+	ER ercd = rel_mpf(ID mpfid, void *blk)
+	ER ercd = ini_mpf(ID mpfid)
+	ER ercd = ref_mpf(ID mpfid, T_RMPF *pk_rmpf)
+
+(6) æéç®¡çæ©è½
+
+	ER ercd = get_tim(SYSTIM *p_systim)
+	ER ercd = get_utm(SYSUTM *p_sysutm)
+
+	ER ercd = sta_cyc(ID cycid)
+	ER ercd = stp_cyc(ID cycid)
+	ER ercd = ref_cyc(ID cycid, T_RCYC *pk_rcyc)
+
+	ER ercd = sta_alm(ID almid, RELTIM almtim)
+	ER ercd = ista_alm(ID almid, RELTIM almtim)
+	ER ercd = stp_alm(ID almid)
+	ER ercd = istp_alm(ID almid)
+	ER ercd = ref_alm(ID almid, T_RALM *pk_ralm)
+
+(7) ã·ã¹ãã ç¶æ
+ç®¡çæ©è½
+
+	ER ercd = rot_rdq(PRI tskpri)
+	ER ercd = irot_rdq(PRI tskpri)
+	ER ercd = get_tid(ID *p_tskid)
+	ER ercd = iget_tid(ID *p_tskid)
+	ER ercd = loc_cpu(void)
+	ER ercd = iloc_cpu(void)
+	ER ercd = unl_cpu(void)
+	ER ercd = iunl_cpu(void)
+	ER ercd = dis_dsp(void)
+	ER ercd = ena_dsp(void)
+	bool_t state = sns_ctx(void)
+	bool_t state = sns_loc(void)
+	bool_t state = sns_dsp(void)
+	bool_t state = sns_dpn(void)
+	bool_t state = sns_ker(void)
+	ER ercd = ext_ker(void)
+
+(8) å²è¾¼ã¿ç®¡çæ©è½
+
+	ER ercd = dis_int(INTNO intno)
+	ER ercd = ena_int(INTNO intno)
+	ER ercd = chg_ipm(PRI intpri)
+	ER ercd = get_ipm(PRI *p_intpri)
+
+(9) CPUä¾å¤ç®¡çæ©è½
+
+	bool_t stat = xsns_dpn(void *p_excinf)
+	bool_t stat = xsns_xpn(void *p_excinf)
+
+13.2 éçAPIä¸è¦§
+
+(1) ã¿ã¹ã¯ç®¡çæ©è½
+
+	CRE_TSK(ID tskid, { ATR tskatr, intptr_t exinf, TASK task,
+								PRI itskpri, SIZE stksz, STK_T *stk })
+
+(3) ã¿ã¹ã¯ä¾å¤å¦çæ©è½
+
+	DEF_TEX(ID tskid, { ATR texatr, TEXRTN texrtn })
+
+(4) åæã»éä¿¡æ©è½
+
+	CRE_SEM(ID semid, { ATR sematr, uint_t isemcnt, uint_t maxsem })
+	CRE_FLG(ID flgid, { ATR flgatr, FLGPTN iflgptn })
+	CRE_DTQ(ID dtqid, { ATR dtqatr, uint_t dtqcnt, void *dtqmb })
+	CRE_PDQ(ID pdqid, { ATR pdqatr, uint_t pdqcnt, PRI maxdpri, void *pdqmb })
+	CRE_MBX(ID mbxid, { ATR mbxatr, PRI maxmpri, void *mprihd })
+
+(5) ã¡ã¢ãªãã¼ã«ç®¡çæ©è½
+
+	CRE_MPF(ID mpfid, { ATR mpfatr, uint_t blkcnt, uint_t blksz,
+										MPF_T *mpf, void *mpfmb })
+
+(6) æéç®¡çæ©è½
+
+	CRE_CYC(ID cycid, { ATR cycatr, intptr_t exinf, CYCHDR cychdr,
+								RELTIM cyctim, RELTIM cycphs })
+	CRE_ALM(ID almid, { ATR almatr, intptr_t exinf, ALMHDR almhdr })
+
+(8) å²è¾¼ã¿ç®¡çæ©è½
+
+	CFG_INT(INTNO intno, { ATR intatr, PRI intpri })
+	ATT_ISR({ ATR isratr, intptr_t exinf, INTNO intno, ISR isr, PRI isrpri })
+	DEF_INH(INHNO inhno, { ATR inhatr, INTHDR inthdr })
+
+(9) CPUä¾å¤ç®¡çæ©è½
+
+	DEF_EXC(EXCNO excno, { ATR excatr, EXCHDR exchdr })
+
+(10) ã·ã¹ãã æ§æç®¡çæ©è½
+
+	DEF_ICS({ SIZE istksz, STK_T *istk })
+	ATT_INI({ ATR iniatr, intptr_t exinf, INIRTN inirtn })
+	ATT_TER({ ATR teratr, intptr_t exinf, TERRTN terrtn })
+
+13.3 ãã¼ã¸ã§ã³å±¥æ­´
+
+	2006å¹´10æ29æ¥	Release	1.A.0		æåã®ãªãªã¼ã¹
+	2007å¹´2æ20æ¥	Release	1.A.1
+	2007å¹´2æ20æ¥	Release	1.A.2
+	2007å¹´7æ12æ¥	Release	1.B.0		ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãæ°ãã¼ã¸ã§ã³ã«
+	2007å¹´7æ12æ¥	Release	1.B.1		ã©ã¤ã»ã³ã¹æ¡ä»¶ã®å
+¥ãæã
+	2007å¹´7æ16æ¥	Release	1.B.2
+	2007å¹´7æ21æ¥	Release	1.B.3		ãã£ã¬ã¯ããªæ§æã®å¤æ´
+	2007å¹´8æ20æ¥	Release	1.B.4		æ¡å¼µããã±ã¼ã¸ã®è¿½å 
+	2007å¹´10æ16æ¥	Release 1.B.5
+	2007å¹´11æ15æ¥	Release 1.0.0		æ­£å¼çã®ãªãªã¼ã¹
+	2007å¹´12æ23æ¥	Release 1.1.0
+	2008å¹´3æ19æ¥	Release 1.2.0
+	2008å¹´3æ21æ¥	Release 1.2.1
+	2008å¹´4æ12æ¥	Release 1.3.0		ä¸è¬å
+¬éã«åãã¦ã®æçµä¿®æ­£
+	2008å¹´5æ13æ¥	Release 1.3.1		æåã®ä¸è¬å
+¬éç
+	2008å¹´8æ21æ¥	Release 1.3.2
+	2009å¹´5æ11æ¥	Release 1.4.0
+	2010å¹´6æ28æ¥	Release 1.5.0		æ¡å¼µããã±ã¼ã¸ãä¸è¬å
+¬é
+	2010å¹´8æ1æ¥	Release 1.6.0		cfg-1.6ã«å¯¾å¿
+	2011å¹´5æ8æ¥	Release 1.7.0		åççææ©è½æ¡å¼µããã±ã¼ã¸ç­ã®è¿½å 
+	2012å¹´12æ26æ¥	Release 1.8.0
+	2014å¹´1æ6æ¥	Release 1.9.0		ã¡ãã»ã¼ã¸ãããã¡æ©è½æ¡å¼µã®è¿½å 
+	2014å¹´11æ17æ¥	Release 1.9.1
+	2015å¹´  æ  æ¥	Release 1.9.2
+
+ä»¥ä¸
Index: rtos_arduino/trunk/asp_1.9.2/doc/version.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/doc/version.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/doc/version.txt	(revision 136)
@@ -0,0 +1,1259 @@
+
+		TOPPERS/ASPã«ã¼ãã«
+		å¤æ´å±¥æ­´
+
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 1.9.2
+		æçµæ´æ°: 2015å¹´2æ8æ¥
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASPã«ã¼ãã«ã®Release 1.0.0ä»¥éã®å¤æ´å±¥æ­´ãï¼
+æ°ããæ¹ããé ã«è¨è¿°ãããã®ã§ããï¼
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2005-2015 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
+   (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ ã®è²¬ä»»ãè² ããªãï¼
+ 
+ $Id: version.txt 2675 2015-02-08 10:11:33Z ertl-hiro $
+----------------------------------------------------------------------
+
+		TOPPERS/ASPã«ã¼ãã«
+		Release 1.9.1 ãã 1.9.2 ã¸ã®å¤æ´ç¹
+
+âå¤æ´ç¹ã®ãªã¹ã
+
+ã»åççææ©è½æ¡å¼µã®ãã°ãã£ãã¯ã¹
+	- acre_cycã§ï¼å¨æãã³ãã©ãéå§ããå¦çã®ãã°ãä¿®æ­£ï¼
+
+ã»ãã®ä»ã®ãã°ãã£ãã¯ã¹
+	- test_cpuexc10.cã®ãã§ãã¯å¤ã®èª¤ãã®ä¿®æ­£ï¼
+
+ã»ãã­ã¥ã¡ã³ãã®ä¿®æ­£ï¼
+
+ã»ãã¼ã¸ã§ã³çªå·ã®æ´æ°
+	- ã«ã¼ãã«ã®ãã¼ã¸ã§ã³çªå·ãæ´æ°ï¼
+
+----------------------------------------------------------------------
+
+		TOPPERS/ASPã«ã¼ãã«
+		Release 1.9.0 ãã 1.9.1 ã¸ã®å¤æ´ç¹
+
+âå¤æ´ç¹ã®ãªã¹ã
+
+ã»ãã¥ã¼ããã¯ã¹æ©è½æ¡å¼µã®ä»æ§å¤æ´
+	- èªã¿ã¹ã¯ãã­ãã¯ãã¦ãããã¥ã¼ããã¯ã¹ãååº¦ã­ãã¯ãããã¨ããå ´
+	  åã¨ï¼èªã¿ã¹ã¯ãã­ãã¯ãã¦ããªããã¥ã¼ããã¯ã¹ãã­ãã¯è§£é¤ããã
+	  ã¨ããå ´åã®ã¨ã©ã¼ã³ã¼ããE_OBJã«å¤æ´ï¼
+
+ã»ãã¥ã¼ããã¯ã¹æ©è½æ¡å¼µã®ãã°ãã£ãã¯ã¹
+	- ã¿ã¹ã¯çµäºæã®ãã¥ã¼ããã¯ã¹ã®è§£æ¾é åºãéé ã«ï¼
+
+ã»åççææ©è½æ¡å¼µã®ãã°ãã£ãã¯ã¹
+	- ãªãã¸ã§ã¯ãæªç»é²ã¨ã©ã¼ã®ãã§ãã¯ã®æãããã³ãã°ãä¿®æ­£ï¼
+	- ãªãã¸ã§ã¯ãæªç»é²ã®å ´åã®ä»ã®ã¨ã©ã¼ã®ãã§ãã¯å ´æã®ä¿®æ­£ï¼
+
+ã»ãªã¼ãã©ã³ãã³ãã©æ©è½æ¡å¼µã®ãã°ãã£ãã¯ã¹
+	- ãªã¼ãã©ã³ã¿ã¤ãå²è¾¼ã¿ãã³ãã©ã®èµ·åã¨ï¼ãªã¼ãã©ã³ã¿ã¤ãã®ååä½
+	  éå§ï¼åæ­¢ã¨ã®ç«¶åã®åé¡ãä¿®æ­£ï¼
+
+ã»ãã¹ããã­ã°ã©ã é¢ä¿ã®ä¿®æ­£
+
+ã»ãã®ä»ã®ä¿®æ­£
+	- xsns_dpnã¨xsns_xpnã§ï¼kerflgããã§ãã¯ããããã«ä¿®æ­£ï¼å®å
+¨æ§ã®å
+	  ä¸ã®ããã®ä¿®æ­£ï¼ï¼
+	- kernel.tfä¸­ã§ï¼ã¹ã¿ãã¯é åã®ç¢ºä¿ã«ALLOC_STACKãä½¿ãããã«ä¿®æ­£ï¼
+
+ã»ãã­ã¥ã¡ã³ãã®å
+
+å®ï¼ã³ã¡ã³ãã®ä¿®æ­£
+
+ã»ãã¼ã¸ã§ã³çªå·ã®æ´æ°
+	- ã«ã¼ãã«ã®ãã¼ã¸ã§ã³çªå·ãæ´æ°ï¼
+
+----------------------------------------------------------------------
+
+		TOPPERS/ASPã«ã¼ãã«
+		Release 1.8.0 ãã 1.9.0 ã¸ã®å¤æ´ç¹
+
+âå¤æ´ç¹ã®ãªã¹ã
+
+ã»ã¡ãã»ã¼ã¸ãããã¡æ©è½æ¡å¼µããã±ã¼ã¸ã®è¿½å 
+
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+ã»TMAX_RELTIMãã¦ã¼ã¶ããåç
+§ã§ãããã¯ã­ã«
+	- TMAX_RELTIMã®å®ç¾©ãï¼kernel/time_event.hããinclude/t_stddef.hã«
+	  ç§»åï¼
+
+ã»constæå®ã®è¿½å 
+	- syslog_printfï¼syslog_printï¼syslog_wri_logï¼serial_wri_datã®ãã©
+	  ã¡ã¼ã¿ã«constæå®ãè¿½å ï¼
+
+ã»TMIN_ISRPRIï¼TMAX_ISRPRIã®å°å
+¥
+
+ã»å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ã§æéã®éè»¢ãçãããã±ã¼ã¹ã®æ±ã
+	- å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ã§æéã®éè»¢ãçãããåº¦æ°ãè¨æ¸¬ããã
+	  ãã«ä¿®æ­£ï¼
+
+ã»ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®çµäºå¦çã®ä¿®æ­£
+	- ã­ã°ãããã¡ã«æ®ã£ãã­ã°æ
+å ±ã§ãããã¨ãç¤ºãæå­åãåºåããããã«
+	  ä¿®æ­£ï¼
+
+ã»ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ä¿®æ­£
+	- é åºä»ããªã¹ãã®è¦ç´ ã«å¼ãä½¿ããããã«å¤æ´ï¼
+	- éçAPIã®ãã©ã¡ã¼ã¿ã«åã­ã£ã¹ããå«ã¾ããã¨ãã¼ã¹ã§ããªããã°ã®ä¿®æ­£ï¼
+	- #pragma onceãç¨ããã¨è¡çªå·ãããããã°ã®ä¿®æ­£ï¼
+	- cfgãã¡ã¤ã«ãæå®ããªãã£ãå ´åã®ã¨ã©ã¼ã¡ãã»ã¼ã¸ã®ä¿®æ­£ï¼
+
+ã»ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæãããã¡ã¤ã«
+	- ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãkernel_cfg.cä»¥å¤ã®ãã¡ã¤ã«ãçæããå ´åã«å¯¾
+	  å¿ããããã®å¤æ°ï¼CFG_OBJSï¼CFG2_OUTï¼ãå°å
+¥ï¼
+
+ã»realcleanæã«åé¤ãããã¡ã¤ã«
+	- realcleanæã«åé¤ãããã¡ã¤ã«ãï¼ã¿ã¼ã²ããä¾å­é¨ã§å®ç¾©ããããã®
+	  å¤æ°ï¼REALCLEAN_FILESï¼ãå°å
+¥ï¼
+
+ã»ãã¹ããã­ã°ã©ã ã®è¿½å ã»æ¡å
+
+
+	- ã»ããã©æ©è½ã®ãã¹ã(1)ãè¿½å ï¼
+	- ã«ã¼ãã«ã®æ´åæ§æ¤æ»ã«ã»ããã©æ¯ã®æ¤æ»ãè¿½å ï¼
+
+ã»ãã°ãã£ãã¯ã¹
+	- éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã¹ã¿ãã¯ã®ç¢ºä¿æã®ãµã¤ãºã®èª¤ãï¼
+	- kernel.tfä¸­ã®ã¨ã©ã¼ã¡ãã»ã¼ã¸ã®èª¤ãï¼
+	- å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«ã«ãããæå¤§å¤ã®æ±ãã®ãã°ï¼
+	- Makefileä¸­ã®APPLDIRã«è¤æ°ã®ãã£ã¬ã¯ããªãå®ç¾©ããã¦ããæã®æ±ãï¼
+	- test/perf.cã§ï¼è¨æ¸¬åæ°ã10000åã«ãªãããã«ä¿®æ­£ï¼
+	- DVE68Kã¿ã¼ã²ããä¾å­é¨ã®target.tfä¸­ã®ã¨ã©ã¼ã¡ãã»ã¼ã¸ã®èª¤ãï¼
+
+ã»ãã­ã¥ã¡ã³ãã®å
+
+å®ï¼ã³ã¡ã³ãã®ä¿®æ­£
+	- åãã­ã¥ã¡ã³ãã«TOPPERSã©ã¤ã»ã³ã¹ã¨ç®æ¬¡ãè¿½å ï¼
+
+ã»ãã¼ã¸ã§ã³çªå·ã®æ´æ°
+
+âã¿ã¼ã²ããä¾å­é¨ã®è¦ä¿®æ­£ç®æï¼1.3.1 â 1.3.2ï¼
+
+ç¹ã«ãªã
+
+----------------------------------------------------------------------
+
+		TOPPERS/ASPã«ã¼ãã«
+		Release 1.3.0 ãã 1.3.1 ã¸ã®å¤æ´ç¹
+
+âå¤æ´ç¹ã®ãªã¹ã
+
+ã»ã¹ã¿ãã¯ãµã¤ãºã®ã¨ã©ã¼ãã§ãã¯ãè¿½å 
+	- CRE_TSKã®stkï¼ã¿ã¹ã¯ã®ã¹ã¿ãã¯é åã®å
+é ­çªå°ï¼ãNULLã§ãªãå ´åã«ï¼
+	  stkszãé©åãªå¤ï¼ã¿ã¼ã²ããä¾å­ã®å¤ã®åæ°ï¼ã«ä¸¸ããå¦çãããï¼é©
+	  åãªå¤ã§ãªãå ´åã«ã¨ã©ã¼ã¨ããããã«ä¿®æ­£ï¼
+	- DEF_ICSã®istkï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã®å
+é ­çªå°ï¼ã
+	  NULLã§ãªãå ´åã«ï¼istkszãé©åãªå¤ï¼ã¿ã¼ã²ããä¾å­ã®å¤ã®åæ°ï¼ã§
+	  ãªãå ´åã®ã¨ã©ã¼ã®ãã§ãã¯ãè¿½å ï¼
+
+ã»å¼·å¶å¾
+ã¡è¦æ±ãã¹ãã®å»æ­¢ã«ä¼´ãè¿½å ä¿®æ­£
+	- TMAX_SUSCNTã®å®ç¾©ãï¼kernel.hããitron.hã«ç§»åï¼
+	- ref_tskã§åç
+§ã§ããæ
+å ±ï¼T_RTSKã®ãã£ã¼ã«ãï¼ããsuscntãåé¤ï¼
+
+ã»kernel_api.csvã®ä¿®æ­£
+	- åãªãã¸ã§ã¯ãã®å±æ§ã®ãã©ã¡ã¼ã¿ãï¼ç¬¦å·ç¡ãã«ä¿®æ­£ï¼
+
+ã»kernel_def.csvã®ä¿®æ­£
+	- ç¬¦å·ä»ãã®ã·ã³ãã«ã®å®ç¾©ã«",signed"ãä»å ï¼
+
+ã»itron.hã®ä¿®æ­£
+	- frsm_tskã®ã¿ã¤ããã¹ã®ä¿®æ­£ï¼
+
+ã»ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ä¿®æ­£
+	- çµè¾¼ã¿é¢æ°DUMP, TRACE, NOOPãè¿½å ï¼
+	- $FOREACH$ã$IF$ç­ã®ä¸­èº«ãä½ããªãã¨ãã«ï¼internal errorã«ãªãä¸å
+·
+	  åãä¿®æ­£ï¼ã¨ã©ã¼ã¡ãã»ã¼ã¸ã®é©ååï¼ï¼
+	- $INCLUDE$å½ä»¤ã§ã¤ã³ã¯ã«ã¼ãããtfã®è¡çªå·ããããä¸å
+·åãä¿®æ­£ï¼
+	- 64ãããæ´æ°ãå®ç¾©ããã¦ããªãã¨ï¼CSVãã¡ã¤ã«ã§sãã¤ããã¬ã³ã¼ã
+	  ãç¬¦å·ä»ãã¨æ±ãããªãä¸å
+·åã®ä¿®æ­£ï¼
+	- åã­ã£ã¹ãã®ãã¼ã¹å¦çã«é¢ããä¸å
+·åã®ä¿®æ­£ï¼
+	- ã¨ã©ã¼ã®èµ·ãã£ãè¡çªå·ãæ­£ãããªãä¸å
+·åã®ä¿®æ­£ï¼
+	- åãtskidã«å¯¾ãã¦DEF_TEXãè¤æ°ããã¨ã©ã¼ã®ãã§ãã¯ãè¡ãããã«ä¿®æ­£ï¼
+	- DEF_TEXãä½¿ç¨ããæã«ï¼TSK.TSKID[tskid]ã0ã«ãªãä¸å
+·åã®ä¿®æ­£ï¼
+	- DEF_INH,CFG_INT,DEF_EXCã§åããªãã¸ã§ã¯ãçªå·ã«å¯¾ããç»é²ãéè¤ã
+	  ãå ´åã®ã¨ã©ã¼ãã§ãã¯ãäºéã«è¡ã£ã¦ããåé¡ã®ä¿®æ­£ï¼
+
+ã»é
+å¸ãããã¡ã¤ã«ã®ä¿®æ­£
+	- doc/api_spec.txt, ngki_spec.txt, sysstat.txtãé¤å¤ï¼
+	- extensionãã£ã¬ã¯ããªãé¤å¤ï¼
+
+ã»ãã­ã¥ã¡ã³ãã®ä¿®æ­£ï¼ã³ã¡ã³ãã®ä¿®æ­£
+
+ã»ãã¼ã¸ã§ã³çªå·ã®æ´æ°
+
+âã¿ã¼ã²ããä¾å­é¨ã®è¦ä¿®æ­£ç®æï¼1.3.0 â 1.3.1ï¼
+
+(1) ã¹ã¿ãã¯ãµã¤ãºã®ã¨ã©ã¼ãã§ãã¯ã«é¢ããä¿®æ­£ç®æ
+	- target.tfã§kernel.tfãã¤ã³ã¯ã«ã¼ãããåã«ï¼CHECK_STKSZ_ALIGNãï¼
+	  ã¹ã¿ãã¯ãµã¤ãºãã©ã®å¤ã®åæ°ã«ãªã£ã¦ããªããã°ãªããªãããè¨­å®ã
+	  ãï¼
+		ä¾ï¼$CHECK_STKSZ_ALIGN = 4$
+
+(2) ã¿ã¼ã²ããä¾å­é¨ã®ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ã«ã¤ãã¦
+	- ã¿ã¼ã²ããä¾å­é¨ã®ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ã®ãã¡ã¤ã«åã¨ï¼ãã®ãã¡ã¤
+	  ã«ã«è¨è¿°ãã¹ãå
+å®¹ãè¦å®ããï¼ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤
+	  ããã®ã9.1 ãã­ã¥ã¡ã³ããã®ç¯ãåç
+§ãããã¨ï¼
+
+----------------------------------------------------------------------
+
+		TOPPERS/ASPã«ã¼ãã«
+		Release 1.2.1 ãã 1.3.0 ã¸ã®å¤æ´ç¹
+
+âå¤æ´ç¹ã®ãªã¹ã
+
+ã»set_timï¼ã·ã¹ãã æå»ã®è¨­å®ï¼ã®å»æ­¢
+
+ã»å±æ§ã®å¤æ´
+	- TA_DISINTãå»æ­¢ãã¦ï¼TA_ENAINTãå¾©æ´»ï¼
+
+ã»æ¡å¼µæ©è½ã»ã¿ã¼ã²ããå®ç¾©æ©è½ã®æç¡ãå¤å¥ãããã¯ã­åã®å¤æ´
+	- TOPPERS_EXTENSION_MUTEXãTOPPERS_SUPPORT_MUTEXã«ï¼
+	- TOPPERS_EXTENSION_PRI_LEVELãTOPPERS_SUPPORT_PRI_LEVELã«ï¼
+	- SUPPORT_???_???ãTOPPERS_SUPPORT_???_???ã«å¤æ´ãï¼ã¿ã¼ã²ããä¾å­
+	  é¨ã§ã®å®ç¾©ãtarget_kernel.hã«ç§»åããï¼
+
+ã»ååã»å¤æ°åã»å®æ°åã®å¤æ´
+	- SYSUTIM â SYSUTMï¼sysutim â sysutmï¼p_sysutim â p_sysutm
+	- SIO_ERDY_SND â SIO_RDY_SNDï¼SIO_ERDY_RCV â SIO_RDY_RCV
+	- sio_ierdy_snd â sio_irdy_sndï¼sio_ierdy_rcv â sio_irdy_rcv
+
+ã»cfg1_out.cã®ã³ã³ãã¤ã«ï¼ãªã³ã¯æ¹æ³ã®å¤æ´
+	- cfg1_out.cããtarget_cfg1_out.hãã¤ã³ã¯ã«ã¼ãããããã«ï¼ã³ã³ãã£
+	  ã®ã¥ã¬ã¼ã¿ãå¤æ´ï¼
+	- ã¿ã¼ã²ããä¾å­é¨ã§target_cfg1_out.hãç¨æããï¼
+	- cfg1_out.cã®ãªã³ã¯ã¯ï¼ã«ã¼ãã«ã¨åãæ¹æ³ãã¨ãããã«å¤æ´ï¼
+
+ã»ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®ä¿®æ­£
+	- cfg1_out.cã«çæããå
+å®¹ã®å¤æ´ï¼åè¨ã¨é¢é£ï¼ï¼
+	- boost 1.35.0ã«å¯¾å¿ï¼
+
+ã»ãµã³ãã«ãã­ã°ã©ã ã®ä¿®æ­£
+	- ã¿ã¹ã¯å
+ã§ã®ã«ã¼ãåæ°ãåºå®ããæ©è½ï¼TASK_LOOPï¼ãå°å
+¥ï¼
+
+ã»ãã°ãã£ãã¯ã¹
+	- åºå®é·ã¡ã¢ãªãã¼ã«é åã®ç¢ºä¿æ¹æ³ï¼
+	- DEF_TEXã®ã¨ã©ã¼ã§ï¼åé¡ã«ãªã£ãDEF_TEXã®è¡çªå·ãè¡¨ç¤ºããï¼
+
+ã»ç¨èªã®å¤æ´
+	-ãå²è¾¼ã¿ã­ãã¯ãâãå
+¨å²è¾¼ã¿ã­ãã¯ã
+
+ã»ãã­ã¥ã¡ã³ãã®ä¿®æ­£
+
+ã»ãã¼ã¸ã§ã³çªå·ã®æ´æ°ï¼
+
+âã¿ã¼ã²ããä¾å­é¨ã®è¦ä¿®æ­£ç®æï¼1.2.1 â 1.3.0ï¼
+
+(1) TA_DISINTã®å»æ­¢ã»TA_ENAINTã®å¾©æ´»ã«ä¼´ãä¿®æ­£ç®æ
+	- TA_DISINTãä½¿ã£ãå¤å®ãTA_ENAINTãä½¿ã£ãå¤å®ã«å¤æ´ããï¼
+		ä¾ï¼((intatr & TA_DISINT) == 0U) â ((intatr & TA_ENAINT) != 0U)
+	- CFG_INTã®å²è¾¼ã¿å±æ§ã«TA_DISINTãè¨­å®ããã¦ããã°ï¼ãããæ¶ãï¼
+		ä¾ï¼CFG_INT(INTNO_SIO, { TA_DISINT | INTATR_SIO, INTPRI_SIO });
+		â CFG_INT(INTNO_SIO, { INTATR_SIO, INTPRI_SIO });
+	- CFG_INTã®å²è¾¼ã¿å±æ§ã«TA_DISINTãè¨­å®ããã¦ããªããã°ï¼TA_ENAINTã
+	  å ããï¼
+		ä¾ï¼CFG_INT(INTNO_TIMER, { INTATR_TIMER, INTPRI_TIMER });
+		â CFG_INT(INTNO_TIMER, { TA_ENAINT | INTATR_TIMER, INTPRI_TIMER });
+
+(2) æ¡å¼µæ©è½ã»ã¿ã¼ã²ããå®ç¾©æ©è½ã®æç¡ãå¤å¥ãããã¯ã­åã®å¤æ´ã«ä¼´ãä¿®æ­£ç®æ
+	- SUPPORT_???_???ãTOPPERS_SUPPORT_???_???ã«å¤æ´ãï¼ã¿ã¼ã²ããä¾å­
+	  é¨ã§ã®å®ç¾©ãtarget_kernel.hã«ç§»åããï¼
+		TOPPERS_SUPPORT_DIS_INT			dis_intããµãã¼ããã
+		TOPPERS_SUPPORT_ENA_INT			ena_intããµãã¼ããã
+		TOPPERS_SUPPORT_GET_UTM			get_utmããµãã¼ããã
+   - makeoffset.cã§ï¼TOPPERS_EXTENSION_MUTEXãåç
+§ãã¦ããå ´åã«ã¯ï¼
+     TOPPERS_SUPPORT_MUTEXã«å¤æ´ããï¼
+
+(3) ååã»å¤æ°åã»å®æ°åã®å¤æ´ã«ä¼´ãä¿®æ­£ç®æ
+	- SYSUTIM â SYSUTMï¼sysutim â sysutmï¼p_sysutim â p_sysutm
+	- SIO_ERDY_SND â SIO_RDY_SNDï¼SIO_ERDY_RCV â SIO_RDY_RCV
+	- sio_ierdy_snd â sio_irdy_sndï¼sio_ierdy_rcv â sio_irdy_rcv
+	â
+sysutimã¨erdyãå¤§æå­å°æå­ãåºå¥ããã«ãµã¼ãããã¨ããï¼
+
+(4) cfg1_out.cã®ã³ã³ãã¤ã«ï¼ãªã³ã¯æ¹æ³ã®å¤æ´ã«ä¼´ãä¿®æ­£ç®æ
+	- ã¿ã¼ã²ããä¾å­é¨ã§ï¼target_cfg1_out.hãç¨æããï¼è©³ããã¯ï¼ãã¿ã¼
+	  ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ããã®7.4ç¯ãåç
+§ï¼
+	- æ°ãã«ç¨æãããã¡ã¤ã«ãMANIFESTã«è¿½å ããï¼
+
+(5) è­¦åã¡ãã»ã¼ã¸ã¸ã®å¯¾å¦
+	- Makefile.targetã«ï¼ãCOPTS := $(COPTS) -Werrorããè¿½å ãããã¨ã
+	  æ¤è¨ããï¼ã«ã¼ãã«å
+ã§å³å¯ãªå¥åè¦åã«ããè­¦åã¡ãã»ã¼ã¸ãåºãå ´
+	  åã«ã¯ï¼ãKERNEL_CFLAGS := $(KERNEL_CFLAGS) -fno-strict-aliasingã
+	  ãè¿½å ãã¦ãããï¼
+
+(6) ã³ã¡ã³ãã®ä¿®æ­£
+	-ãå²è¾¼ã¿ã­ãã¯ãâãå
+¨å²è¾¼ã¿ã­ãã¯ã
+
+----------------------------------------------------------------------
+
+		TOPPERS/ASPã«ã¼ãã«
+		Release 1.2.0 ãã 1.2.1 ã¸ã®å¤æ´ç¹
+
+âå¤æ´ç¹ã®ãªã¹ã
+
+ã»ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ããçµã¿è¾¼ãæ¹æ³ã®å¤æ´
+	- configureã«-rãªãã·ã§ã³ãè¿½å ï¼
+	- sample/Makefileã®ä¿®æ­£ï¼
+
+ã»Makefileã®ã³ã³ãã£ã®ã¥ã¬ã¼ã¿é¢é£é¨åã®å¤æ´
+	- ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«å¯¾ããã¿ã¼ã²ããä¾å­ã®ãªãã·ã§ã³ãï¼Makefile
+	  ã®ã¿ã¼ã²ããä¾å­é¨ã§è¨è¿°ããããã«å¤æ´ï¼
+	- ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®åãã¹ã®ã¿ã¼ã²ããä¾å­ã®ãã¡ã¤ã«ã¸ã®ä¾å­é¢ä¿
+	  ãï¼Makefileã®ã¿ã¼ã²ããä¾å­é¨ã§è¨è¿°ããããã«å¤æ´ï¼
+
+ã»ãã¼ã¸ã§ã³çªå·ã®æ´æ°ï¼
+
+âã¿ã¼ã²ããä¾å­é¨ã®è¦ä¿®æ­£ç®æï¼1.1.0 â 1.2.1ï¼
+
+(1) æ°ããã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã¸ã®å¯¾å¿
+
+ã»target.tfä¸­ã§ï¼ããããã¡ã¤ã«ã¨éè¤ããå®æ°å¤ã®å®ç¾©ãè¡ã£ã¦ããå ´åã«
+ãã¯ï¼target_def.cvsã«å¤æ°è¨è¿°ãè¡ãï¼éè¤ããå®ç¾©ãåé¤ããï¼
+
+ã»ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«å¯¾ãããªãã·ã§ã³ã«ï¼target_def.cvsãèª­ã¿è¾¼ã¾ãã
+ãæå®ãè¿½å ããï¼ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ãã2.4ç¯ã®
+ã(2-4-15) é 
+ãåç
+§ï¼
+
+ã»target_check.tfãä½æããï¼ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ãã
+ã7.3ç¯åç
+§ï¼
+
+ã»ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®åãã¹ã«å¯¾ãã¦ï¼ã¿ã¼ã²ããä¾å­ã®ãã¡ã¤ã«ã¸ã®ä¾å­
+ãé¢ä¿ãå®ç¾©ããï¼ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ãã2.7ç¯åç
+§ï¼
+
+(2) ãã¼ã¿åã¨å®æ°ã®å¤æ´ã»è¿½å 
+
+ã»BOOLãbool_tã«ï¼TRUEã¨FALSEãããããtrueã¨falseã«å¤æ´ããï¼ER_BOOLãª
+ãã©ãå¤æ´ããªãããã«æ³¨æãããã¨ï¼ã³ã¡ã³ãä¸­ã«è¨è¿°ããããããã®ãã¼
+ãã¿åã¨å®æ°ãå¤æ´ãããã¨ï¼
+
+ã»charãchar_tã«å¤æ´ããï¼ãã ãï¼æå­åå®æ°ãè¨è¿°ããããã¨ãå¤ãå¼æ°
+ãç­ã¯ï¼ã³ã³ãã¤ã©ã®è­¦åãé¿ããããã«ï¼char *ã®ã¾ã¾ã¨ããï¼ã¿ã¼ã²ãã
+ãä¾å­é¨ã§æä½éå¤æ´ããªããã°ãªããªãã®ã¯ï¼ä»¥ä¸ã®2ç®æï¼
+
+	- target_fput_logã®å¼æ°
+	- sio_snd_chrã®ç¬¬2å¼æ°
+
+ã»target_stddef.hï¼ã¾ãã¯ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ã«ï¼ãµã¤ãº
+ãã®æå®ãããæµ®åå°æ°ç¹åï¼float32_tã¨double64_tï¼ï¼ãã®æå¤§å¤ã»æå°å¤
+ãã®ãã¯ã­ã®å®ç¾©ãè¿½å ããï¼ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ãã3.4
+ãç¯åç
+§ï¼éçºç°å¢ãGCCã§arch/gcc/tool_stddef.hãç¨ãã¦ããï¼floatåã¨
+ãdoubleåãããããIEEE754æºæ ã®åç²¾åº¦æµ®åå°æ°ç¹æ°ã¨åç²¾åº¦æµ®åå°æ°ç¹æ°
+ãã§ããå ´åã«ã¯ï¼arch/gcc/tool_stddef.hãã¤ã³ã¯ã«ã¼ãããåã«ï¼
+ãTOPPERS_STDFLOAT_TYPE1ããã¯ã­å®ç¾©ããã°ããï¼
+
+(3) ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ãã®çµè¾¼ã¿ï¼ãªãã·ã§ã³ï¼
+
+ã»ã¿ã¼ã²ããä¾å­é¨ãï¼ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ããä½¿ç¨ããããã«
+ãä¿®æ­£ããï¼ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ãã6.11.2ç¯åç
+§ï¼
+
+(4) TARGETDIRå¤æ°ã®ä½¿ç¨
+
+ã»Makefileã®ã¿ã¼ã²ããä¾å­é¨ã§ï¼ã¿ã¼ã²ããä¾å­é¨ãã£ã¬ã¯ããªãåç
+§ãã¦
+ãããç®æã§ï¼$(SRCDIR)/target/$(TARGET)ãï¼$(TARGETDIR)ã«å¤æ´ããï¼
+
+----------------------------------------------------------------------
+
+		TOPPERS/ASPã«ã¼ãã«
+		Release 1.1.0 ãã 1.2.0 ã¸ã®å¤æ´ç¹
+
+âå¤æ´ç¹ã®ãªã¹ã
+
+ã»ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãæ°ãããã¼ã¸ã§ã³ã«å·®ãæã
+	- ãã¹1ã¨ãã¹3ã«ãã¿ã¼ã²ããä¾å­æ©è½ãè¿½å ï¼
+	- FMPã«ã¼ãã«ã®ã¯ã©ã¹è¨è¿°ã«å¯¾å¿ï¼
+	- è¿½å ãã¡ã¤ã«ï¼ã¿ã¼ã²ããéä¾å­é¨ï¼cfgä»¥ä¸ãé¤ãï¼
+		kernel/kernel_api.csv, kernel_def.csv, kernel_check.tf
+	- è¿½å ãã¡ã¤ã«ï¼ã¿ã¼ã²ããä¾å­é¨ï¼
+		target_def.csv, target_check.tf
+	- sample/Makefileãæ°ããã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«å¯¾å¿ãããï¼
+	- ãã¥ã¼ããã¯ã¹æ©è½æ¡å¼µã§ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã®makeãä¸è¦ã«ï¼
+
+ã»ãã¼ã¿åã¨å®æ°ã®å¤æ´ã»è¿½å 
+	- BOOLåãbool_tåã«å¤æ´ï¼
+		BOOL â bool_tï¼TRUE â trueï¼FALSE â false
+		å¾æ¥ã®å®ç¾©ãitron.hã«è¿½å ï¼
+	- charåãchar_tåã«å¤æ´ï¼
+		ãã ãï¼æå­åå®æ°ãè¨è¿°ããããã¨ãå¤ãå¼æ°ç­ã¯ï¼ã³ã³ãã¤ã©ã®
+		è­¦åãé¿ããããã«ï¼char *ã®ã¾ã¾ã¨ããï¼
+	- float32_t, double64_tã®è¿½å ï¼
+
+ã»ãã¹ããã­ã°ã©ã ã®è¿½å ã»ä¿®æ­£
+	- ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ããã¤ã³ã¯ã«ã¼ãããã³ã³ãã£
+	  ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã®æ´çï¼ããã ã¢ããé åºã«ï¼ï¼
+	- ãã¹ããã­ã°ã©ã ã®çæã¹ã¯ãªããï¼utils/gentestï¼ãä½æï¼
+	- ãã¥ã¼ããã¯ã¹æ©è½ã®ãã¹ããã­ã°ã©ã ãçæã¹ã¯ãªããå¯¾å¿ã«ï¼
+	- ãã¥ã¼ããã¯ã¹æ©è½æ¡å¼µã«test_mutex7ãè¿½å ï¼
+
+ã»ã·ã¹ãã ãµã¼ãã¹ã®ããããã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ãè¨è¿°ã®æ´ç
+	- syssvcã®ä¸ã®ããããã¡ã¤ã«ã¯ï¼#include "syssvc/??????.h"ã§ã¤ã³ã¯
+      ã«ã¼ãããï¼??????.cããã¤ã³ã¯ã«ã¼ãããå ´åãé¤ãï¼ï¼
+	- Makefileããï¼-I$(SRCDIR)/syssvcãåé¤ï¼
+
+ã»ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºåï¼bannerï¼æ©è½ã®ç¬ç«
+	- syssvc/banner.cfg, banner.hãä½æï¼
+	- syslog.cfgããé¢é£ããè¨è¿°ãåé¤ï¼
+
+ã»t_syslog.hã¨syslog.hã®å½¹å²ã®å¤æ´
+	- t_syslog.hã¯ï¼ã·ã¹ãã ã­ã°åºåãè¡ãããã®å®ç¾©ãå«ãããããã¡ã¤
+	  ã«ã¨ãï¼ã·ã¹ãã ã­ã°æ©è½ãæä½ããããã®å®ç¾©ã¯ï¼syslog.hã«ç§»ãï¼
+
+ã»ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®ãã©ãã·ã¥æ¹æ³ã®å¤æ´
+	- ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®å¼·å¶ãã©ãã·ã¥æ©è½ã¯å»æ­¢ãï¼æªé
+	  ä¿¡æå­ã®ååºãæ©è½ãæ°è¨­ï¼ãããç¨ããå¼·å¶ãã©ãã·ã¥å¦çã¯ï¼ã·ã¹
+	  ãã ã­ã°ã¿ã¹ã¯ã®çµäºå¦çã«ã¼ãã³å´ã§å®æ½ï¼
+
+ã»ã¿ã¹ã¯ãã£ã¹ãããã®è¦å¦ã®å¤å®æ¹æ³ã®å¤æ´
+	- ã¿ã¹ã¯ãã£ã¹ãããã®å¿
+è¦ãªç¶æ
+ã«ããé¢æ°ãï¼ãã¹ã¦ï¼ã¿ã¹ã¯ãã£ã¹
+	  ãããã®è¦å¦ãè¿ãããã«ãï¼p_runtskã¨p_schedtskã®æ¯è¼ã«ããå¤å®
+	  ããªãã¹ãä½¿ããªãããã«ä¿®æ­£ï¼
+
+ã»ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ãã®ä½¿ç¨æ¹æ³ãè¦å®
+	- ãã¼ãã£ã³ã°ã¬ã¤ãã®6.11.2ç¯ã«ï¼ã¿ã¼ã²ããä¾å­é¨ã§ãã¬ã¼ã¹ã­ã°è¨
+	  é²ã®ãµã³ãã«ã³ã¼ããä½¿ç¨ããæ¹æ³ãè¦å®ï¼
+	- DVE68Kã¿ã¼ã²ããä¾å­é¨ãããã«å¾ãããã«ä¿®æ­£ï¼
+
+ã»TARGETDIRå¤æ°ã®å°å
+¥
+	- sample/Makefileã§ï¼ã¿ã¼ã²ããä¾å­é¨ãã£ã¬ã¯ããªãç¤ºãå¤æ°
+	  TARGETDIRãå®ç¾©ï¼
+	- ãããä½¿ãããã«ï¼ã¿ã¼ã²ããä¾å­é¨ãä¿®æ­£ï¼
+
+ã»ãã®ä»ã®ãã°ãã£ãã¯ã¹
+	- kernel_rename.defï¼log_???_entry â log_???_enter
+
+ã»ãã®ä»ã®ä¿®æ­£
+	- T_RLOG â T_SYSLOG_RLOG
+	- syssvcã®ä¸ã®ããããã¡ã¤ã«ã«ãthrow()ãå
+¥ããï¼
+	- makereleaseï¼RELEAEãã£ã¬ã¯ããªããªããã°ä½ãï¼
+
+ã»ãã­ã¥ã¡ã³ãã®å
+
+å®ï¼ã³ã¡ã³ãã®è¿½å ã»ä¿®æ­£ï¼
+	- doc/migration.txtãä½æï¼ç¾æç¹ã§ã¯æªå®æï¼ï¼
+
+ã»ãã¼ã¸ã§ã³çªå·ã®æ´æ°ï¼
+
+âã¿ã¼ã²ããä¾å­é¨ã®è¦ä¿®æ­£ç®æï¼1.1.0 â 1.2.0ï¼
+
+(1) æ°ããã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã¸ã®å¯¾å¿
+
+ã»target.tfä¸­ã§ï¼ããããã¡ã¤ã«ã¨éè¤ããå®æ°å¤ã®å®ç¾©ãè¡ã£ã¦ããå ´åã«
+ãã¯ï¼target_def.cvsã«å¤æ°è¨è¿°ãè¡ãï¼éè¤ããå®ç¾©ãåé¤ããï¼
+
+ã»target_check.tfãä½æããï¼ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ãã
+ã7.3ç¯åç
+§ï¼
+
+(2) ãã¼ã¿åã¨å®æ°ã®å¤æ´ã»è¿½å 
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+ã»BOOLãbool_tã«ï¼TRUEã¨FALSEãããããtrueã¨falseã«å¤æ´ããï¼ER_BOOLãª
+ãã©ãå¤æ´ããªãããã«æ³¨æãããã¨ï¼ã³ã¡ã³ãä¸­ã«è¨è¿°ããããããã®ãã¼
+ãã¿åã¨å®æ°ãå¤æ´ãããã¨ï¼
+
+ã»charãchar_tã«å¤æ´ããï¼ãã ãï¼æå­åå®æ°ãè¨è¿°ããããã¨ãå¤ãå¼æ°
+ãç­ã¯ï¼ã³ã³ãã¤ã©ã®è­¦åãé¿ããããã«ï¼char *ã®ã¾ã¾ã¨ããï¼ã¿ã¼ã²ãã
+ãä¾å­é¨ã§æä½éå¤æ´ããªããã°ãªããªãã®ã¯ï¼ä»¥ä¸ã®2ç®æï¼
+
+	- target_fput_logã®å¼æ°
+	- sio_snd_chrã®ç¬¬2å¼æ°
+
+ã»target_stddef.hï¼ã¾ãã¯ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ã«ï¼ãµã¤ãº
+ãã®æå®ãããæµ®åå°æ°ç¹åï¼float32_tã¨double64_tï¼ï¼ãã®æå¤§å¤ã»æå°å¤
+ãã®ãã¯ã­ã®å®ç¾©ãè¿½å ããï¼ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ãã3.4
+ãç¯åç
+§ï¼éçºç°å¢ãGCCã§arch/gcc/tool_stddef.hãç¨ãã¦ããï¼floatåã¨
+ãdoubleåãããããIEEE754æºæ ã®åç²¾åº¦æµ®åå°æ°ç¹æ°ã¨åç²¾åº¦æµ®åå°æ°ç¹æ°
+ãã§ããå ´åã«ã¯ï¼arch/gcc/tool_stddef.hãã¤ã³ã¯ã«ã¼ãããåã«ï¼
+ãTOPPERS_STDFLOAT_TYPE1ããã¯ã­å®ç¾©ããã°ããï¼
+
+(3) ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ãã®ä½¿ç¨æ¹æ³ã«å¾ã£ãä¿®æ­£ï¼ãªãã·ã§ã³ï¼
+
+ã»ã¿ã¼ã²ããä¾å­é¨ãï¼ãã¬ã¼ã¹ã­ã°è¨é²ã®ãµã³ãã«ã³ã¼ããä½¿ç¨ããããã«
+ãä¿®æ­£ããï¼ãã¿ã¼ã²ããä¾å­é¨ ãã¼ãã£ã³ã°ã¬ã¤ãã6.11.2ç¯åç
+§ï¼
+
+(4) TARGETDIRå¤æ°ã®ä½¿ç¨
+
+ã»Makefileã®ã¿ã¼ã²ããä¾å­é¨ã§ï¼ã¿ã¼ã²ããä¾å­é¨ãã£ã¬ã¯ããªãåç
+§ãã¦
+ãããç®æã§ï¼$(SRCDIR)/target/$(TARGET)ãï¼$(TARGETDIR)ã«å¤æ´ããï¼
+
+----------------------------------------------------------------------
+
+		TOPPERS/ASPã«ã¼ãã«
+		Release 1.0.0 ãã 1.1.0 ã¸ã®å¤æ´ç¹
+
+âå¤æ´ç¹ã®ãªã¹ã
+
+ã»frsm_tskãã«ã¼ãã«ããåé¤ï¼itron.hã«ãã¯ã­å®ç¾©ã¨ãã¦æ®ã
+
+ã»ã«ã¼ãã«ã®ãã¬ã¼ã¹ã­ã°æ©è½ã®æ¹ä¿®
+	- ãã¬ã¼ã¹ã­ã°ãã¯ã­ãä½¿ãå´ã®ãã¡ã¤ã«ã§ï¼ããã©ã«ãå®ç¾©ãä¸ããï¼
+	- nulltraceãå»æ­¢ï¼logtraceãä¿®æ­£ï¼
+	- ã¿ã¼ã²ããä¾å­é¨ã§ã®ãã¬ã¼ã¹ã­ã°åå¾æ¹æ³ãæ¨æºåï¼
+	- INTHDR_ENTRYã¨EXCHDR_ENTRYã«ãã©ã¡ã¼ã¿ãè¿½å ï¼
+	- target_putcãï¼target_fput_logã«ãªãã¼ã ï¼
+
+ã»ã·ã¹ãã ã­ã°æ©è½ãã«ã¼ãã«ããå¤ãã¦ï¼ã·ã¹ãã ãµã¼ãã¹ã®ä½ç½®ä»ãã«
+	- syslog.cï¼syslog.hï¼banner.cãï¼kernelããsyssvcã«ç§»åï¼
+	- ã·ã¹ãã ã­ã°æ©è½ã®ãµã¼ãã¹ã³ã¼ã«ã®åç§°ã«syslog_ãä»å ï¼
+
+ã»ã·ã¹ãã ãµã¼ãã¹ã®ãã£ã¬ã¯ããªã®ä½ç½®ä»ãã®æç¢ºå
+	- logtask.hã¨serial.hãï¼includeããsyssvcã«ç§»åï¼
+	- vasyslog.cãï¼libraryããsyssvcã«ç§»åï¼
+
+ã»ãªãªã¼ã¹ããã±ã¼ã¸ã®å½¢æ
+ãæ´å
+	- utils/makereleaseãä½æï¼utils/genmanifestãåé¤ï¼
+	- MANIFESTãã¡ã¤ã«ã«ï¼ããã±ã¼ã¸åã¨ãã¼ã¸ã§ã³çªå·ãè¨è¿°ï¼
+	- MANIFESTãã¡ã¤ã«ã®INCLUDEè¨è¿°ãå¤æ´ï¼
+
+ã»åºå
+¥å£å¦çã®çªå°ã®å¤æ°ï¼ãã£ã¼ã«ãåã®å¤æ´
+	- å²è¾¼ã¿ãã³ãã©ï¼CPUä¾å¤ãã³ãã©ã®åºå
+¥å£å¦çã®çªå°ï¼FPåï¼ã®å¤æ°ï¼
+	  ãã£ã¼ã«ãåãint_entryï¼exc_entryã«å¤æ´ï¼ã³ã¡ã³ããä¿®æ­£ï¼
+
+ã»DVE68Kï¼M68Kä¾å­é¨ã®ä¿®æ­£ï¼
+	- target.tfä¸­ã®ã¨ã©ã¼ã¡ãã»ã¼ã¸ã®ä¿®æ­£ï¼
+	- logtraceãä½¿ãããã«ä¿®æ­£ï¼
+
+ã»ãã®ä»ã®ä¿®æ­£ï¼
+	- åºå®é·ã¡ã¢ãªãã¼ã«åæåãã­ãã¯ã®çæã«é¢ãããã°ãä¿®æ­£ï¼
+	- configureã§ï¼cfgãçæããã¦ãããã®ãã§ãã¯ãå³å¯åï¼
+	- sample/Makefileã«ããã¦ï¼ã©ã¤ãã©ãªã«é¢ããä¾å­è¨è¿°ã®ä¿®æ­£ï¼
+	- sample/sample1.cfgã«ããã¦ï¼ã·ã¹ãã ãµã¼ãã¹ã®å®ç¾©é ãå¤æ´ï¼
+	- extension/MANIFESTã«ï¼MANIFESTãè¿½å ï¼
+
+ã»ãã­ã¥ã¡ã³ãã®å
+
+å®ï¼ã³ã¡ã³ãã®è¿½å ã»ä¿®æ­£ï¼
+
+ã»ãã¼ã¸ã§ã³çªå·ã®æ´æ°ï¼
+
+âã¿ã¼ã²ããä¾å­é¨ã®ä¿®æ­£ç®æï¼1.0.0 â 1.1.0ï¼
+
+ã»ã«ã¼ãã«ã®ãã¬ã¼ã¹ã­ã°æ©è½ã®ä¸­ã§ï¼ã¿ã¼ã²ããä¾å­é¨ã§å®è£
+ããå¿
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+ã6.7.1ç¯ãåç
+§ãããã¨ï¼
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+ã»INTHDR_ENTRYã¨EXCHDR_ENTRYã«2çªç®ã®ãã©ã¡ã¼ã¿ãè¿½å ãããã®ã«å¯¾å¿ããï¼
+
+ã»TARGET_NAMEã¨COPYRIGHT_TARGETãï¼target_config.hããtarget_syssvc.hã«
+ãç§»åããï¼COPYRIGHT_TARGETã¯TARGET_COPYRIGHTã«ãªãã¼ã ããï¼
+
+ã»target_putcãtarget_fput_logã«ãªãã¼ã ãï¼ãã®å®£è¨ãtarget_config.hã
+ããtarget_syssvc.hã«ç§»åããï¼é¢æ°å®ç¾©ã¯ï¼target_config.cã«ç½®ããã¾ã¾
+ãã§ããï¼é¢æ°å®£è¨ã»å®ç¾©ã®ä¸ã®ã³ã¡ã³ããä¿®æ­£ããï¼
+
+ã»å²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦çã®çªå°ï¼FPåï¼ã®å¤æ°ï¼ãã£ã¼ã«ãåãinthdr
+ãããint_entryã«ï¼CPUä¾å¤ãã³ãã©ã®åºå
+¥å£å¦çã®çªå°ï¼FPåï¼ã®å¤æ°ï¼
+ããã£ã¼ã«ãåãexchdrããexct_entryã«ï¼ããããå¤æ´ããï¼ããã«é¢é£ã
+ããx_define_inhã¨x_define_excã®ã³ã¡ã³ããä¿®æ­£ããï¼
+
+ã»ãã¬ã¼ã¹ã­ã°ãè¨é²ããªãå ´åã«ã¯ï¼target_config.hããã#include
+ã"nulltrace/trace_config.h"ããåé¤ããï¼
+
+ã»ãã¬ã¼ã¹ã­ã°ãè¨é²ããå ´åã«ã¯ï¼target_syssvc.hã«ã#include
+ã"logtrace/trace_config.h"ããè¿½å ããï¼ã¾ãï¼target_config.hä¸­ã®
+ãã#include "logtrace/trace_config.h"ãã®ä½ç½®ãåã®æ¹ã«ç§»åããï¼
+
+ã»MANIFESTã¨E_PACKAGEãä½æï¼ä¿®æ­£ããï¼MANIFESTä¸­ã«ï¼å¿
+è¦ã«å¿ãã¦ï¼
+ãPACKAGEãã£ã¬ã¯ãã£ãã¨VERSIONãã£ã¬ã¯ãã£ããè¿½å ããï¼ã¾ãï¼
+ãINCLUDEãã£ã¬ã¯ãã£ãã®ãã©ã¡ã¼ã¿ãï¼ãã£ã¬ã¯ããªåãããã¡ã¤ã«åã«å¤
+ãæ´ããï¼ã¿ã¼ã²ããã·ã¹ãã æ¯ã«ï¼E_PACKAGEãä½æããï¼è©³ããã¯ï¼
+ãuser.txtã®ï¼ç« ã¨porting.txtã®9.1ç¯ãåç
+§ãããã¨ï¼
+
+----------------------------------------------------------------------
Index: rtos_arduino/trunk/asp_1.9.2/include/histogram.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/histogram.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/histogram.h	(revision 136)
@@ -0,0 +1,90 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: histogram.h 2097 2011-06-17 07:57:50Z ertl-hiro $
+ */
+
+/*
+ *		å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«
+ */
+
+#ifndef TOPPERS_HISTOGRAM_H
+#define TOPPERS_HISTOGRAM_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  å®è¡æéåå¸è¨æ¸¬ã®åæå
+ */
+extern void	init_hist(ID histid, uint_t maxval, uint_t histarea[]);
+
+/*
+ *  å®è¡æéè¨æ¸¬ã®éå§
+ */
+extern void	begin_measure(ID histid);
+
+/*
+ *  å®è¡æéè¨æ¸¬ã®çµäº
+ */
+extern void	end_measure(ID histid);
+
+/*
+ *  å®è¡æéåå¸è¨æ¸¬ã®è¡¨ç¤º
+ */
+extern void	print_hist(ID histid);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_HISTOGRAM_H */
Index: rtos_arduino/trunk/asp_1.9.2/include/itron.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/itron.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/itron.h	(revision 136)
@@ -0,0 +1,164 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: itron.h 1762 2010-02-18 02:24:39Z ertl-hiro $
+ */
+
+/*
+ *		ITRONä»æ§å
+±éè¦å®ã®ãã¼ã¿åã»å®æ°ã»ãã¯ã­
+ *
+ *  ãã®ããããã¡ã¤ã«ã¯ï¼ITRONä»æ§å
+±éè¦å®ã®ãã¼ã¿åã»å®æ°ã»ãã¯ã­ã®ä¸­
+ *  ã§ï¼TOPPERSå
+±éããããã¡ã¤ã«ã«å«ã¾ããªããã®ã®å®ç¾©ãå«ãï¼ITRONä»
+ *  æ§ã¨ã®äºææ§ãå¿
+è¦ã¨ããã¢ããªã±ã¼ã·ã§ã³ãã¤ã³ã¯ã«ã¼ããããã¨ãæ³
+ *  å®ãã¦ããï¼
+ *
+ *  ã¢ã»ã³ããªè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ãããã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããæ
+ *  ã¯ï¼TOPPERS_MACRO_ONLYãå®ç¾©ãã¦ããï¼ããã«ããï¼ãã¯ã­å®ç¾©ä»¥å¤ã
+ *  é¤ãããã«ãªã£ã¦ããï¼
+ */
+
+#ifndef TOPPERS_ITRON_H
+#define TOPPERS_ITRON_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  TOPPERSå
+±éããããã¡ã¤ã«
+ */
+#include "t_stddef.h"
+
+/*
+ *  ITRONä»æ§å
+±éãã¼ã¿å
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+#ifdef INT8_MAX
+typedef	int8_t			B;			/* ç¬¦å·ä»ã8ãããæ´æ° */
+#endif /* INT8_MAX */
+
+#ifdef UINT8_MAX
+typedef	uint8_t			UB;			/* ç¬¦å·ç¡ã8ãããæ´æ° */
+typedef	uint8_t			VB;			/* åãå®ã¾ããªã8ãããã®å¤ */
+#endif /* UINT8_MAX */
+
+typedef	int16_t			H;			/* ç¬¦å·ä»ã16ãããæ´æ° */
+typedef	uint16_t		UH;			/* ç¬¦å·ç¡ã16ãããæ´æ° */
+typedef	uint16_t		VH;			/* åãå®ã¾ããªã16ãããã®å¤ */
+
+typedef	int32_t			W;			/* ç¬¦å·ä»ã32ãããæ´æ° */
+typedef	uint32_t		UW;			/* ç¬¦å·ç¡ã32ãããæ´æ° */
+typedef	uint32_t		VW;			/* åãå®ã¾ããªã32ãããã®å¤ */
+
+#ifdef INT64_MAX
+typedef	int64_t			D;			/* ç¬¦å·ä»ã64ãããæ´æ° */
+#endif /* INT64_MAX */
+
+#ifdef UINT64_MAX
+typedef	uint64_t		UD;			/* ç¬¦å·ç¡ã64ãããæ´æ° */
+typedef	uint64_t		VD;			/* åãå®ã¾ããªã64ãããã®å¤ */
+#endif /* UINT64_MAX */
+
+typedef	void			*VP;		/* åãå®ã¾ããªããã®ã¸ã®ãã¤ã³ã¿ */
+
+typedef int_t			INT;		/* èªç¶ãªãµã¤ãºã®ç¬¦å·ä»ãæ´æ° */
+typedef uint_t			UINT;		/* èªç¶ãªãµã¤ãºã®ç¬¦å·ç¡ãæ´æ° */
+
+typedef bool_t			BOOL;		/* çå½å¤ */
+
+typedef	intptr_t		VP_INT;		/* ãã¤ã³ã¿ã¾ãã¯ç¬¦å·ä»ãæ´æ° */
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ITRONä»æ§å
+±éå®æ°
+ */
+#define	TRUE		true			/* ç */
+#define	FALSE		false			/* å½ */
+
+/*
+ *  ãªãã¸ã§ã¯ãå±æ§ã®å®ç¾©
+ */
+#define TA_HLNG			UINT_C(0x00)	/* é«ç´è¨èªç¨ã¤ã³ã¿ãã§ã¼ã¹ */
+#define TA_TFIFO		UINT_C(0x00)	/* ã¿ã¹ã¯ã®å¾
+ã¡è¡åãFIFOé ã« */
+#define TA_MFIFO		UINT_C(0x00)	/* ã¡ãã»ã¼ã¸ã­ã¥ã¼ãFIFOé ã« */
+#define TA_WSGL			UINT_C(0x00)	/* å¾
+ã¡ã¿ã¹ã¯ã¯1ã¤ã®ã¿ */
+
+/*
+ *  ãã¹ãåæ°ã®æå¤§å¤
+ */
+#define TMAX_SUSCNT		UINT_C(1)		/* å¼·å¶å¾
+ã¡è¦æ±ãã¹ãæ°ã®æå¤§å¤ */
+
+/*
+ *  å¼·å¶å¾
+ã¡ç¶æ
+ããã®å¼·å¶åé
+ */
+#define frsm_tsk(tskid)		rsm_tsk(tskid)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_ITRON_H */
Index: rtos_arduino/trunk/asp_1.9.2/include/kernel.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/kernel.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/kernel.h	(revision 136)
@@ -0,0 +1,595 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2014 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: kernel.h 2669 2014-12-02 01:47:14Z ertl-hiro $
+ */
+
+/*
+ *		TOPPERS/ASPã«ã¼ãã« æ¨æºããããã¡ã¤ã«
+ *
+ *  TOPPERS/ASPã«ã¼ãã«ããµãã¼ããããµã¼ãã¹ã³ã¼ã«ã®å®£è¨ã¨ï¼å¿
+è¦ãªãã¼
+ *  ã¿åï¼å®æ°ï¼ãã¯ã­ã®å®ç¾©ãå«ãããããã¡ã¤ã«ï¼
+ *
+ *  ã¢ã»ã³ããªè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ãããã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããæ
+ *  ã¯ï¼TOPPERS_MACRO_ONLYãå®ç¾©ãã¦ããï¼ããã«ããï¼ãã¯ã­å®ç¾©ä»¥å¤ã
+ *  é¤ãããã«ãªã£ã¦ããï¼
+ *
+ *  ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããåã«ã¤ã³ã¯ã«ã¼ããã¦ããã¹ããã¡ã¤ã«
+ *  ã¯ãªãï¼
+ */
+
+#ifndef TOPPERS_KERNEL_H
+#define TOPPERS_KERNEL_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *	TOPPERSå
+±éã®ãã¼ã¿åã»å®æ°ã»ãã¯ã­
+ */
+#include <t_stddef.h>
+
+/*
+ *  ã¿ã¼ã²ããä¾å­é¨
+ */
+#include "target_kernel.h"
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ãã¼ã¿åã®å®ç¾©
+ */
+
+/*
+ *  ããããã¿ã¼ã³ããªãã¸ã§ã¯ãçªå·ã®åå®ç¾©
+ */
+typedef	uint_t		TEXPTN;		/* ã¿ã¹ã¯ä¾å¤è¦å ã®ããããã¿ã¼ã³ */
+typedef	uint_t		FLGPTN;		/* ã¤ãã³ããã©ã°ã®ããããã¿ã¼ã³ */
+typedef	uint_t		INTNO;		/* å²è¾¼ã¿çªå· */
+typedef	uint_t		INHNO;		/* å²è¾¼ã¿ãã³ãã©çªå· */
+typedef	uint_t		EXCNO;		/* CPUä¾å¤ãã³ãã©çªå· */
+
+/*
+ *  å¦çåä½ã®åå®ç¾©
+ */
+typedef void	(*TASK)(intptr_t exinf);
+typedef void	(*TEXRTN)(TEXPTN texptn, intptr_t exinf);
+typedef void	(*CYCHDR)(intptr_t exinf);
+typedef void	(*ALMHDR)(intptr_t exinf);
+typedef void	(*ISR)(intptr_t exinf);
+typedef void	(*INTHDR)(void);
+typedef void	(*EXCHDR)(void *p_excinf);
+typedef void	(*INIRTN)(intptr_t exinf);
+typedef void	(*TERRTN)(intptr_t exinf);
+
+/*
+ *  ã¡ã¢ãªé åç¢ºä¿ã®ããã®åå®ç¾©
+ */
+#ifndef TOPPERS_STK_T
+#define TOPPERS_STK_T	intptr_t
+#endif /* TOPPERS_STK_T */
+typedef	TOPPERS_STK_T	STK_T;	/* ã¹ã¿ãã¯é åãç¢ºä¿ããããã®å */
+
+#ifndef TOPPERS_MPF_T
+#define TOPPERS_MPF_T	intptr_t
+#endif /* TOPPERS_MPF_T */
+typedef	TOPPERS_MPF_T	MPF_T;	/* åºå®é·ã¡ã¢ãªãã¼ã«é åãç¢ºä¿ããããã®å */
+
+/*
+ *  ã¡ãã»ã¼ã¸ãããã®åå®ç¾©
+ */
+typedef	struct t_msg {			/* ã¡ã¼ã«ããã¯ã¹ã®ã¡ãã»ã¼ã¸ããã */
+	struct t_msg	*pk_next;
+} T_MSG;
+
+typedef	struct t_msg_pri {		/* åªå
+åº¦ä»ãã¡ãã»ã¼ã¸ããã */
+	T_MSG	msgque;				/* ã¡ãã»ã¼ã¸ããã */
+	PRI		msgpri;				/* ã¡ãã»ã¼ã¸åªå
+åº¦ */
+} T_MSG_PRI;
+
+/*
+ *  ãã±ããå½¢å¼ã®å®ç¾©
+ */
+typedef struct t_rtsk {
+	STAT	tskstat;	/* ã¿ã¹ã¯ç¶æ
+ */
+	PRI		tskpri;		/* ã¿ã¹ã¯ã®ç¾å¨åªå
+åº¦ */
+	PRI		tskbpri;	/* ã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ */
+	STAT	tskwait;	/* å¾
+ã¡è¦å  */
+	ID		wobjid;		/* å¾
+ã¡å¯¾è±¡ã®ãªãã¸ã§ã¯ãã®ID */
+	TMO		lefttmo;	/* ã¿ã¤ã ã¢ã¦ãããã¾ã§ã®æé */
+	uint_t	actcnt;		/* èµ·åè¦æ±ã­ã¥ã¼ã¤ã³ã°æ° */
+	uint_t	wupcnt;		/* èµ·åºè¦æ±ã­ã¥ã¼ã¤ã³ã°æ° */
+} T_RTSK;
+
+typedef struct t_rtex {
+	STAT	texstat;	/* ã¿ã¹ã¯ä¾å¤å¦çã®ç¶æ
+ */
+	TEXPTN	pndptn;		/* ä¿çä¾å¤è¦å  */
+} T_RTEX;
+
+typedef struct t_rsem {
+	ID		wtskid;		/* ã»ããã©ã®å¾
+ã¡è¡åã®å
+é ­ã®ã¿ã¹ã¯ã®IDçªå· */
+	uint_t	semcnt;		/* ã»ããã©ã®ç¾å¨ã®è³æºæ° */
+} T_RSEM;
+
+typedef struct t_rflg {
+	ID		wtskid;		/* ã¤ãã³ããã©ã°ã®å¾
+ã¡è¡åã®å
+é ­ã®ã¿ã¹ã¯ã®IDçªå· */
+	FLGPTN	flgptn;		/* ã¤ãã³ããã©ã°ã®ç¾å¨ã®ããããã¿ã¼ã³ */
+} T_RFLG;
+
+typedef struct t_rdtq {
+	ID		stskid;		/* ãã¼ã¿ã­ã¥ã¼ã®éä¿¡å¾
+ã¡è¡åã®å
+é ­ã®ã¿ã¹ã¯ã®IDçªå· */
+	ID		rtskid;		/* ãã¼ã¿ã­ã¥ã¼ã®åä¿¡å¾
+ã¡è¡åã®å
+é ­ã®ã¿ã¹ã¯ã®IDçªå· */
+	uint_t	sdtqcnt;	/* ãã¼ã¿ã­ã¥ã¼ç®¡çé åã«æ ¼ç´ããã¦ãããã¼ã¿ã®æ° */
+} T_RDTQ;
+
+typedef struct t_rpdq {
+	ID		stskid;		/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®éä¿¡å¾
+ã¡è¡åã®å
+é ­ã®ã¿ã¹ã¯
+						   ã®IDçªå· */
+	ID		rtskid;		/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®åä¿¡å¾
+ã¡è¡åã®å
+é ­ã®ã¿ã¹ã¯
+						   ã®IDçªå· */
+	uint_t	spdqcnt;	/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çé åã«æ ¼ç´ããã¦ãããã¼
+						   ã¿ã®æ° */
+} T_RPDQ;
+
+typedef struct t_rmbx {
+	ID		wtskid;		/* ã¡ã¼ã«ããã¯ã¹ã®å¾
+ã¡è¡åã®å
+é ­ã®ã¿ã¹ã¯ã®IDçªå· */
+	T_MSG	*pk_msg;	/* ã¡ãã»ã¼ã¸ã­ã¥ã¼ã®å
+é ­ã«ã¤ãªãããã¡ãã»ã¼ã¸
+						   ã®å
+é ­çªå° */
+} T_RMBX;
+
+typedef struct t_rmpf {
+	ID		wtskid;		/* åºå®é·ã¡ã¢ãªãã¼ã«ã®å¾
+ã¡è¡åã®å
+é ­ã®ã¿ã¹ã¯ã®
+						   IDçªå· */
+	uint_t	fblkcnt;	/* åºå®é·ã¡ã¢ãªãã¼ã«é åã®ç©ºãã¡ã¢ãªé åã«å²ã
+						   ä»ãããã¨ãã§ããåºå®é·ã¡ã¢ãªãã­ãã¯ã®æ° */
+} T_RMPF;
+
+typedef struct t_rcyc {
+	STAT	cycstat;	/* å¨æãã³ãã©ã®åä½ç¶æ
+ */
+	RELTIM	lefttim;	/* æ¬¡ã«å¨æãã³ãã©ãèµ·åããæå»ã¾ã§ã®ç¸å¯¾æé */
+} T_RCYC;
+
+typedef struct t_ralm {
+	STAT	almstat;	/* ã¢ã©ã¼ã ãã³ãã©ã®åä½ç¶æ
+ */
+	RELTIM	lefttim;	/* ã¢ã©ã¼ã ãã³ãã©ãèµ·åããæå»ã¾ã§ã®ç¸å¯¾æé */
+} T_RALM;
+
+/*
+ *  ãµã¼ãã¹ã³ã¼ã«ã®å®£è¨
+ */
+
+/*
+ *  ã¿ã¹ã¯ç®¡çæ©è½
+ */
+extern ER		act_tsk(ID tskid) throw();
+extern ER		iact_tsk(ID tskid) throw();
+extern ER_UINT	can_act(ID tskid) throw();
+extern ER		ext_tsk(void) throw();
+extern ER		ter_tsk(ID tskid) throw();
+extern ER		chg_pri(ID tskid, PRI tskpri) throw();
+extern ER		get_pri(ID tskid, PRI *p_tskpri) throw();
+extern ER		get_inf(intptr_t *p_exinf) throw();
+extern ER		ref_tsk(ID tskid, T_RTSK *pk_rtsk) throw();
+
+/*
+ *  ã¿ã¹ã¯ä»å±åææ©è½
+ */
+extern ER		slp_tsk(void) throw();
+extern ER		tslp_tsk(TMO tmout) throw();
+extern ER		wup_tsk(ID tskid) throw();
+extern ER		iwup_tsk(ID tskid) throw();
+extern ER_UINT	can_wup(ID tskid) throw();
+extern ER		rel_wai(ID tskid) throw();
+extern ER		irel_wai(ID tskid) throw();
+extern ER		sus_tsk(ID tskid) throw();
+extern ER		rsm_tsk(ID tskid) throw();
+extern ER		dly_tsk(RELTIM dlytim) throw();
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çæ©è½
+ */
+extern ER		ras_tex(ID tskid, TEXPTN rasptn) throw();
+extern ER		iras_tex(ID tskid, TEXPTN rasptn) throw();
+extern ER		dis_tex(void) throw();
+extern ER		ena_tex(void) throw();
+extern bool_t	sns_tex(void) throw();
+extern ER		ref_tex(ID tskid, T_RTEX *pk_rtex) throw();
+
+/*
+ *  åæã»éä¿¡æ©è½
+ */
+extern ER		sig_sem(ID semid) throw();
+extern ER		isig_sem(ID semid) throw();
+extern ER		wai_sem(ID semid) throw();
+extern ER		pol_sem(ID semid) throw();
+extern ER		twai_sem(ID semid, TMO tmout) throw();
+extern ER		ini_sem(ID semid) throw();
+extern ER		ref_sem(ID semid, T_RSEM *pk_rsem) throw();
+
+extern ER		set_flg(ID flgid, FLGPTN setptn) throw();
+extern ER		iset_flg(ID flgid, FLGPTN setptn) throw();
+extern ER		clr_flg(ID flgid, FLGPTN clrptn) throw();
+extern ER		wai_flg(ID flgid, FLGPTN waiptn,
+						MODE wfmode, FLGPTN *p_flgptn) throw();
+extern ER		pol_flg(ID flgid, FLGPTN waiptn,
+						MODE wfmode, FLGPTN *p_flgptn) throw();
+extern ER		twai_flg(ID flgid, FLGPTN waiptn,
+						MODE wfmode, FLGPTN *p_flgptn, TMO tmout) throw();
+extern ER		ini_flg(ID flgid) throw();
+extern ER		ref_flg(ID flgid, T_RFLG *pk_rflg) throw();
+
+extern ER		snd_dtq(ID dtqid, intptr_t data) throw();
+extern ER		psnd_dtq(ID dtqid, intptr_t data) throw();
+extern ER		ipsnd_dtq(ID dtqid, intptr_t data) throw();
+extern ER		tsnd_dtq(ID dtqid, intptr_t data, TMO tmout) throw();
+extern ER		fsnd_dtq(ID dtqid, intptr_t data) throw();
+extern ER		ifsnd_dtq(ID dtqid, intptr_t data) throw();
+extern ER		rcv_dtq(ID dtqid, intptr_t *p_data) throw();
+extern ER		prcv_dtq(ID dtqid, intptr_t *p_data) throw();
+extern ER		trcv_dtq(ID dtqid, intptr_t *p_data, TMO tmout) throw();
+extern ER		ini_dtq(ID dtqid) throw();
+extern ER		ref_dtq(ID dtqid, T_RDTQ *pk_rdtq) throw();
+
+extern ER		snd_pdq(ID pdqid, intptr_t data, PRI datapri) throw();
+extern ER		psnd_pdq(ID pdqid, intptr_t data, PRI datapri) throw();
+extern ER		ipsnd_pdq(ID pdqid, intptr_t data, PRI datapri) throw();
+extern ER		tsnd_pdq(ID pdqid, intptr_t data,
+										PRI datapri, TMO tmout) throw();
+extern ER		rcv_pdq(ID pdqid, intptr_t *p_data, PRI *p_datapri) throw();
+extern ER		prcv_pdq(ID pdqid, intptr_t *p_data, PRI *p_datapri) throw();
+extern ER		trcv_pdq(ID pdqid, intptr_t *p_data,
+										PRI *p_datapri, TMO tmout) throw();
+extern ER		ini_pdq(ID pdqid) throw();
+extern ER		ref_pdq(ID pdqid, T_RPDQ *pk_rpdq) throw();
+
+extern ER		snd_mbx(ID mbxid, T_MSG *pk_msg) throw();
+extern ER		rcv_mbx(ID mbxid, T_MSG **ppk_msg) throw();
+extern ER		prcv_mbx(ID mbxid, T_MSG **ppk_msg) throw();
+extern ER		trcv_mbx(ID mbxid, T_MSG **ppk_msg, TMO tmout) throw();
+extern ER		ini_mbx(ID mbxid) throw();
+extern ER		ref_mbx(ID mbxid, T_RMBX *pk_rmbx) throw();
+
+/*
+ *  ã¡ã¢ãªãã¼ã«ç®¡çæ©è½
+ */
+extern ER		get_mpf(ID mpfid, void **p_blk) throw();
+extern ER		pget_mpf(ID mpfid, void **p_blk) throw();
+extern ER		tget_mpf(ID mpfid, void **p_blk, TMO tmout) throw();
+extern ER		rel_mpf(ID mpfid, void *blk) throw();
+extern ER		ini_mpf(ID mpfid) throw();
+extern ER		ref_mpf(ID mpfid, T_RMPF *pk_rmpf) throw();
+
+/*
+ *  æéç®¡çæ©è½
+ */
+extern ER		get_tim(SYSTIM *p_systim) throw();
+extern ER		get_utm(SYSUTM *p_sysutm) throw();
+
+extern ER		sta_cyc(ID cycid) throw();
+extern ER		stp_cyc(ID cycid) throw();
+extern ER		ref_cyc(ID cycid, T_RCYC *pk_rcyc) throw();
+
+extern ER		sta_alm(ID almid, RELTIM almtim) throw();
+extern ER		ista_alm(ID almid, RELTIM almtim) throw();
+extern ER		stp_alm(ID almid) throw();
+extern ER		istp_alm(ID almid) throw();
+extern ER		ref_alm(ID almid, T_RALM *pk_ralm) throw();
+
+/*
+ *  ã·ã¹ãã ç¶æ
+ç®¡çæ©è½
+ */
+extern ER		rot_rdq(PRI tskpri) throw();
+extern ER		irot_rdq(PRI tskpri) throw();
+extern ER		get_tid(ID *p_tskid) throw();
+extern ER		iget_tid(ID *p_tskid) throw();
+extern ER		loc_cpu(void) throw();
+extern ER		iloc_cpu(void) throw();
+extern ER		unl_cpu(void) throw();
+extern ER		iunl_cpu(void) throw();
+extern ER		dis_dsp(void) throw();
+extern ER		ena_dsp(void) throw();
+extern bool_t	sns_ctx(void) throw();
+extern bool_t	sns_loc(void) throw();
+extern bool_t	sns_dsp(void) throw();
+extern bool_t	sns_dpn(void) throw();
+extern bool_t	sns_ker(void) throw();
+extern ER		ext_ker(void) throw();
+
+/*
+ *  å²è¾¼ã¿ç®¡çæ©è½
+ */
+extern ER		dis_int(INTNO intno) throw();
+extern ER		ena_int(INTNO intno) throw();
+extern ER		chg_ipm(PRI intpri) throw();
+extern ER		get_ipm(PRI *p_intpri) throw();
+
+/*
+ *  CPUä¾å¤ç®¡çæ©è½
+ */
+extern bool_t	xsns_dpn(void *p_excinf) throw();
+extern bool_t	xsns_xpn(void *p_excinf) throw();
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ãªãã¸ã§ã¯ãå±æ§ã®å®ç¾©
+ */
+#define TA_ACT			UINT_C(0x02)	/* ã¿ã¹ã¯ãèµ·åãããç¶æ
+ã§çæ */
+
+#define TA_TPRI			UINT_C(0x01)	/* ã¿ã¹ã¯ã®å¾
+ã¡è¡åãåªå
+åº¦é ã« */
+#define TA_MPRI			UINT_C(0x02)	/* ã¡ãã»ã¼ã¸ã­ã¥ã¼ãåªå
+åº¦é ã« */
+
+#define TA_WMUL			UINT_C(0x02)	/* è¤æ°ã®å¾
+ã¡ã¿ã¹ã¯ */
+#define TA_CLR			UINT_C(0x04)	/* ã¤ãã³ããã©ã°ã®ã¯ãªã¢æå® */
+
+#define TA_STA			UINT_C(0x02)	/* å¨æãã³ãã©ãåä½ç¶æ
+ã§çæ */
+
+#define TA_NONKERNEL	UINT_C(0x02)	/* ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ */
+
+#define TA_ENAINT		UINT_C(0x01)	/* å²è¾¼ã¿è¦æ±ç¦æ­¢ãã©ã°ãã¯ãªã¢ */
+#define TA_EDGE			UINT_C(0x02)	/* ã¨ãã¸ããªã¬ */
+
+/*
+ *  ãµã¼ãã¹ã³ã¼ã«ã®åä½ã¢ã¼ãã®å®ç¾©
+ */
+#define TWF_ORW			UINT_C(0x01)	/* ã¤ãã³ããã©ã°ã®ORå¾
+ã¡ */
+#define TWF_ANDW		UINT_C(0x02)	/* ã¤ãã³ããã©ã°ã®ANDå¾
+ã¡ */
+
+/*
+ *  ãªãã¸ã§ã¯ãã®ç¶æ
+ã®å®ç¾©
+ */
+#define TTS_RUN			UINT_C(0x01)	/* å®è¡ç¶æ
+ */
+#define TTS_RDY			UINT_C(0x02)	/* å®è¡å¯è½ç¶æ
+ */
+#define TTS_WAI			UINT_C(0x04)	/* å¾
+ã¡ç¶æ
+ */
+#define TTS_SUS			UINT_C(0x08)	/* å¼·å¶å¾
+ã¡ç¶æ
+ */
+#define TTS_WAS			UINT_C(0x0c)	/* äºéå¾
+ã¡ç¶æ
+ */
+#define TTS_DMT			UINT_C(0x10)	/* ä¼æ­¢ç¶æ
+ */
+
+#define TTW_SLP			UINT_C(0x0001)	/* èµ·åºå¾
+ã¡ */
+#define TTW_DLY			UINT_C(0x0002)	/* æéçµéå¾
+ã¡ */
+#define TTW_SEM			UINT_C(0x0004)	/* ã»ããã©ã®è³æºç²å¾å¾
+ã¡ */
+#define TTW_FLG			UINT_C(0x0008)	/* ã¤ãã³ããã©ã°å¾
+ã¡ */
+#define TTW_SDTQ		UINT_C(0x0010)	/* ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡å¾
+ã¡ */
+#define TTW_RDTQ		UINT_C(0x0020)	/* ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡å¾
+ã¡ */
+#define TTW_SPDQ		UINT_C(0x0100)	/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡å¾
+ã¡ */
+#define TTW_RPDQ		UINT_C(0x0200)	/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡å¾
+ã¡ */
+#define TTW_MBX			UINT_C(0x0040)	/* ã¡ã¼ã«ããã¯ã¹ããã®åä¿¡å¾
+ã¡ */
+#define TTW_MPF			UINT_C(0x2000)	/* åºå®é·ã¡ã¢ãªãã­ãã¯ã®ç²å¾å¾
+ã¡ */
+
+#define TTEX_ENA		UINT_C(0x01)	/* ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ */
+#define TTEX_DIS		UINT_C(0x02)	/* ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ç¶æ
+ */
+
+#define TCYC_STP		UINT_C(0x01)	/* å¨æãã³ãã©ãåä½ãã¦ããªã */
+#define TCYC_STA		UINT_C(0x02)	/* å¨æãã³ãã©ãåä½ãã¦ãã */
+
+#define TALM_STP		UINT_C(0x01)	/* ã¢ã©ã¼ã ãã³ãã©ãåä½ãã¦ããªã */
+#define TALM_STA		UINT_C(0x02)	/* ã¢ã©ã¼ã ãã³ãã©ãåä½ãã¦ãã */
+
+/*
+ *  ãã®ä»ã®å®æ°ã®å®ç¾©
+ */
+#define TSK_SELF		0			/* èªã¿ã¹ã¯æå® */
+#define TSK_NONE		0			/* è©²å½ããã¿ã¹ã¯ããªã */
+
+#define TPRI_SELF		0			/* èªã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ */
+#define TPRI_INI		0			/* ã¿ã¹ã¯ã®èµ·åæåªå
+åº¦ */
+
+#define TIPM_ENAALL		0			/* å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ */
+
+/*
+ *  æ§æå®æ°ã¨ãã¯ã­
+ */
+
+/*
+ *  ãµãã¼ãããæ©è½
+ */
+#ifdef TOPPERS_TARGET_SUPPORT_DIS_INT
+#define TOPPERS_SUPPORT_DIS_INT			/* dis_intããµãã¼ãããã¦ãã */
+#endif /* TOPPERS_TARGET_SUPPORT_DIS_INT */
+
+#ifdef TOPPERS_TARGET_SUPPORT_ENA_INT
+#define TOPPERS_SUPPORT_ENA_INT			/* ena_intããµãã¼ãããã¦ãã */
+#endif /* TOPPERS_TARGET_SUPPORT_ENA_INT */
+
+#ifdef TOPPERS_TARGET_SUPPORT_GET_UTM
+#define TOPPERS_SUPPORT_GET_UTM			/* get_utmããµãã¼ãããã¦ãã */
+#endif /* TOPPERS_TARGET_SUPPORT_GET_UTM */
+
+/*
+ *  åªå
+åº¦ã®ç¯å²
+ */
+#define TMIN_TPRI		1			/* ã¿ã¹ã¯åªå
+åº¦ã®æå°å¤ï¼æé«å¤ï¼*/
+#define TMAX_TPRI		16			/* ã¿ã¹ã¯åªå
+åº¦ã®æå¤§å¤ï¼æä½å¤ï¼*/
+#define TMIN_DPRI		1			/* ãã¼ã¿åªå
+åº¦ã®æå°å¤ï¼æé«å¤ï¼*/
+#define TMAX_DPRI		16			/* ãã¼ã¿åªå
+åº¦ã®æå¤§å¤ï¼æä½å¤ï¼*/
+#define TMIN_MPRI		1			/* ã¡ãã»ã¼ã¸åªå
+åº¦ã®æå°å¤ï¼æé«å¤ï¼*/
+#define TMAX_MPRI		16			/* ã¡ãã»ã¼ã¸åªå
+åº¦ã®æå¤§å¤ï¼æä½å¤ï¼*/
+#define TMIN_ISRPRI		1			/* å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³åªå
+åº¦ã®æå°å¤ */
+#define TMAX_ISRPRI		16			/* å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³åªå
+åº¦ã®æå¤§å¤ */
+
+/*
+ *  ãã¼ã¸ã§ã³æ
+å ±
+ */
+#define TKERNEL_MAKER	UINT_C(0x0118)	/* ã«ã¼ãã«ã®ã¡ã¼ã«ã¼ã³ã¼ã */
+#define TKERNEL_PRID	UINT_C(0x0007)	/* ã«ã¼ãã«ã®è­å¥çªå· */
+#define TKERNEL_SPVER	UINT_C(0xf517)	/* ã«ã¼ãã«ä»æ§ã®ãã¼ã¸ã§ã³çªå· */
+#define TKERNEL_PRVER	UINT_C(0x1092)	/* ã«ã¼ãã«ã®ãã¼ã¸ã§ã³çªå· */
+
+/*
+ *  ã­ã¥ã¼ã¤ã³ã°åæ°ã®æå¤§å¤
+ */
+#define TMAX_ACTCNT		UINT_C(1)		/* èµ·åè¦æ±ã­ã¥ã¼ã¤ã³ã°æ°ã®æå¤§å¤ */
+#define TMAX_WUPCNT		UINT_C(1)		/* èµ·åºè¦æ±ã­ã¥ã¼ã¤ã³ã°æ°ã®æå¤§å¤ */
+
+/*
+ *  ããããã¿ã¼ã³ã®ãããæ°
+ */
+#ifndef TBIT_TEXPTN					/* ã¿ã¹ã¯ä¾å¤è¦å ã®ãããæ° */
+#define TBIT_TEXPTN		(sizeof(TEXPTN) * CHAR_BIT)
+#endif /* TBIT_TEXPTN */
+
+#ifndef TBIT_FLGPTN					/* ã¤ãã³ããã©ã°ã®ãããæ° */
+#define TBIT_FLGPTN		(sizeof(FLGPTN) * CHAR_BIT)
+#endif /* TBIT_FLGPTN */
+
+/*
+ *  ã¡ã¢ãªé åç¢ºä¿ã®ããã®ãã¯ã­
+ *
+ *  ä»¥ä¸ã®TOPPERS_COUNT_SZã¨TOPPERS_ROUND_SZã®å®ç¾©ã¯ï¼unitã2ã®å·¾ä¹ã§ã
+ *  ããã¨ãä»®å®ãã¦ããï¼
+ */
+#ifndef TOPPERS_COUNT_SZ
+#define TOPPERS_COUNT_SZ(sz, unit)	(((sz) + (unit) - 1) / (unit))
+#endif /* TOPPERS_COUNT_SZ */
+#ifndef TOPPERS_ROUND_SZ
+#define TOPPERS_ROUND_SZ(sz, unit)	(((sz) + (unit) - 1) & ~((unit) - 1))
+#endif /* TOPPERS_ROUND_SZ */
+
+#define COUNT_STK_T(sz)		TOPPERS_COUNT_SZ(sz, sizeof(STK_T))
+#define ROUND_STK_T(sz)		TOPPERS_ROUND_SZ(sz, sizeof(STK_T))
+
+#define COUNT_MPF_T(blksz)	TOPPERS_COUNT_SZ(blksz, sizeof(MPF_T))
+#define ROUND_MPF_T(blksz)	TOPPERS_ROUND_SZ(blksz, sizeof(MPF_T))
+
+/*
+ *  ãã®ä»ã®æ§æå®æ°
+ */
+#define TMAX_MAXSEM		UINT_MAX	/* ã»ããã©ã®æå¤§è³æºæ°ã®æå¤§å¤ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_KERNEL_H */
Index: rtos_arduino/trunk/asp_1.9.2/include/log_output.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/log_output.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/log_output.h	(revision 136)
@@ -0,0 +1,103 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: log_output.h 2246 2011-08-26 22:39:15Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã­ã°ã®ãã©ã¼ãããåºå
+ */
+
+#ifndef TOPPERS_LOG_OUTPUT_H
+#define TOPPERS_LOG_OUTPUT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <t_syslog.h>
+
+/*
+ *  æå­åæ´å½¢åºå
+ *
+ *  formatã§æå®ããããã©ã¼ãããè¨è¿°ã¨p_argsã§æå®ãããå¼æ°åããä½
+ *  æããã¡ãã»ã¼ã¸ãï¼1æå­åºåé¢æ°putcãç¨ãã¦åºåããï¼
+ */
+extern void	syslog_printf(const char *format, const intptr_t *p_args,
+										void (*putc)(char)) throw();
+
+/*
+ *  ã­ã°æ
+å ±ã®åºå
+ *
+ *  p_syslogã§æå®ãããã­ã°æ
+å ±ãæå­åã«æ´å½¢ãï¼1æå­åºåé¢æ°putcãç¨
+ *  ãã¦åºåããï¼
+ */
+extern void	syslog_print(const SYSLOG *p_syslog, void (*putc)(char)) throw();
+
+/*
+ *  ã­ã°æ
+å ±åªå¤±ã¡ãã»ã¼ã¸æå­å
+ *
+ *  lostlogåã®ã­ã°æ
+å ±ãå¤±ãããæ¨ã®ã¡ãã»ã¼ã¸ãï¼1æå­åºåé¢æ°putcã
+ *  ç¨ãã¦åºåããï¼
+ */
+extern void	syslog_lostmsg(uint_t lostlog, void (*putc)(char)) throw();
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_LOG_OUTPUT_H */
Index: rtos_arduino/trunk/asp_1.9.2/include/queue.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/queue.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/queue.h	(revision 136)
@@ -0,0 +1,187 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2006-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: queue.h 2247 2011-08-26 22:59:55Z ertl-hiro $
+ */
+
+/*
+ *		ã­ã¥ã¼æä½ã©ã¤ãã©ãª
+ *
+ *  ãã®ã­ã¥ã¼æä½ã©ã¤ãã©ãªã§ã¯ï¼ã­ã¥ã¼ããããå«ããªã³ã°æ§é ã®ããã«
+ *  ãªã³ã¯ã­ã¥ã¼ãæ±ãï¼å
+·ä½çã«ã¯ï¼ã­ã¥ã¼ãããã®æ¬¡ã¨ã³ããªã¯ã­ã¥ã¼ã®
+ *  å
+é ­ã®ã¨ã³ããªï¼åã¨ã³ããªã¯ã­ã¥ã¼ã®æ«å°¾ã®ã¨ã³ããªã¨ããï¼ã¾ãï¼ã­
+ *  ã¥ã¼ã®å
+é ­ã®ã¨ã³ããªã®åã¨ã³ããªã¨ï¼ã­ã¥ã¼ã®æ«å°¾ã®ã¨ã³ããªã®æ¬¡ã¨ã³
+ *  ããªã¯ï¼ã­ã¥ã¼ãããã¨ããï¼ç©ºã®ã­ã¥ã¼ã¯ï¼æ¬¡ã¨ã³ããªï¼åã¨ã³ããªã¨
+ *  ãèªåèªèº«ãæãã­ã¥ã¼ãããã§ããããï¼
+ */
+
+#ifndef	TOPPERS_QUEUE_H
+#define	TOPPERS_QUEUE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  ã­ã¥ã¼ã®ãã¼ã¿æ§é ã®å®ç¾©
+ */
+typedef struct queue {
+	struct queue *p_next;		/* æ¬¡ã¨ã³ããªã¸ã®ãã¤ã³ã¿ */
+	struct queue *p_prev;		/* åã¨ã³ããªã¸ã®ãã¤ã³ã¿ */
+} QUEUE;
+
+/*
+ *  ã­ã¥ã¼ã®åæå
+ *
+ *  p_queueã«ã¯ã­ã¥ã¼ããããæå®ããï¼
+ */
+Inline void
+queue_initialize(QUEUE *p_queue)
+{
+	p_queue->p_prev = p_queue;
+	p_queue->p_next = p_queue;
+}
+
+/*
+ *  ã­ã¥ã¼ã®åã¨ã³ããªã¸ã®æ¿å
+¥
+ *
+ *  p_queueã®åã«p_entryãæ¿å
+¥ããï¼p_queueã«ã­ã¥ã¼ããããæå®ããå ´
+ *  åã«ã¯ï¼ã­ã¥ã¼ã®æ«å°¾ã«p_entryãæ¿å
+¥ãããã¨ã«ãªãï¼
+ */
+Inline void
+queue_insert_prev(QUEUE *p_queue, QUEUE *p_entry)
+{
+	p_entry->p_prev = p_queue->p_prev;
+	p_entry->p_next = p_queue;
+	p_queue->p_prev->p_next = p_entry;
+	p_queue->p_prev = p_entry;
+}
+
+/*
+ *  ã­ã¥ã¼ã®æ¬¡ã¨ã³ããªã¸ã®æ¿å
+¥
+ *
+ *  p_queueã®æ¬¡ã«p_entryãæ¿å
+¥ããï¼p_queueã«ã­ã¥ã¼ããããæå®ããå ´
+ *  åã«ã¯ï¼ã­ã¥ã¼ã®å
+é ­ã«p_entryãæ¿å
+¥ãããã¨ã«ãªãï¼
+ */
+Inline void
+queue_insert_next(QUEUE *p_queue, QUEUE *p_entry)
+{
+	p_entry->p_prev = p_queue;
+	p_entry->p_next = p_queue->p_next;
+	p_queue->p_next->p_prev = p_entry;
+	p_queue->p_next = p_entry;
+}
+
+/*
+ *  ã¨ã³ããªã®åé¤
+ *
+ *  p_entryãã­ã¥ã¼ããåé¤ããï¼
+ */
+Inline void
+queue_delete(QUEUE *p_entry)
+{
+	p_entry->p_prev->p_next = p_entry->p_next;
+	p_entry->p_next->p_prev = p_entry->p_prev;
+}
+
+/*
+ *  ã­ã¥ã¼ã®æ¬¡ã¨ã³ããªã®ååºã
+ *
+ *  p_queueã®æ¬¡ã¨ã³ããªãã­ã¥ã¼ããåé¤ãï¼åé¤ããã¨ã³ããªãè¿ãï¼
+ *  p_queueã«ã­ã¥ã¼ããããæå®ããå ´åã«ã¯ï¼ã­ã¥ã¼ã®å
+é ­ã®ã¨ã³ããªã
+ *  åãåºããã¨ã«ãªãï¼p_queueã«ç©ºã®ã­ã¥ã¼ãæå®ãã¦å¼ã³åºãã¦ã¯ãªã
+ *  ãªãï¼
+ */
+Inline QUEUE *
+queue_delete_next(QUEUE *p_queue)
+{
+	QUEUE	*p_entry;
+
+	assert(p_queue->p_next != p_queue);
+	p_entry = p_queue->p_next;
+	p_queue->p_next = p_entry->p_next;
+	p_entry->p_next->p_prev = p_queue;
+	return(p_entry);
+}
+
+/*
+ *  ã­ã¥ã¼ãç©ºãã©ããã®ãã§ãã¯
+ *
+ *  p_queueã«ã¯ã­ã¥ã¼ããããæå®ããï¼
+ */
+Inline bool_t
+queue_empty(QUEUE *p_queue)
+{
+	if (p_queue->p_next == p_queue) {
+		assert(p_queue->p_prev == p_queue);
+		return(true);
+	}
+	return(false);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_QUEUE_H */
Index: rtos_arduino/trunk/asp_1.9.2/include/sil.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/sil.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/sil.h	(revision 136)
@@ -0,0 +1,306 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: sil.h 2242 2011-08-26 21:00:19Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã¤ã³ã¿ãã§ã¼ã¹ã¬ã¤ã¤
+ *
+ *  ã·ã¹ãã ã¤ã³ã¿ãã§ã¼ã¹ã¬ã¤ã¤ã®ãµã¼ãã¹ã³ã¼ã«ã®å®ç¾©ã»å®£è¨ã¨ãã¯ã­ãª
+ *  ã©ã®å®ç¾©ãå«ãããããã¡ã¤ã«ï¼
+ *
+ *  ã¢ã»ã³ããªè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ãããã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããæ
+ *  ã¯ï¼TOPPERS_MACRO_ONLYãå®ç¾©ãã¦ãããã¨ã§ï¼ãã¯ã­å®ç¾©ä»¥å¤ã®è¨è¿°ã
+ *  é¤ããã¨ãã§ããï¼
+ *
+ *  ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããåã«ã¤ã³ã¯ã«ã¼ããã¦ããã¹ããã¡ã¤ã«
+ *  ã¯ãªãï¼
+ */
+
+#ifndef TOPPERS_SIL_H
+#define TOPPERS_SIL_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *	TOPPERSå
+±éã®ãã¼ã¿åã»å®æ°ã»ãã¯ã­
+ */
+#include <t_stddef.h>
+
+/*
+ *  ã¿ã¼ã²ããä¾å­é¨
+ */
+#include "target_sil.h"
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  å
+¨å²è¾¼ã¿ã­ãã¯ç¶æ
+ã®å¶å¾¡
+ *
+ *  SIL_PRE_LOCï¼SIL_LOC_INT()ï¼SIL_UNL_INT()ã¯ï¼ã¿ã¼ã²ããä¾å­é¨ã§ç¨
+ *  æããï¼ããã©ã«ãã®å®ç¾©ã¯ç¨æãã¦ããªãï¼
+ */
+
+/*
+ *  å¾®å°æéå¾
+ã¡
+ */
+extern void	sil_dly_nse(ulong_t dlytim) throw();
+
+/*
+ *  ã¨ã³ãã£ã¢ã³ã®åè»¢
+ */
+#ifndef TOPPERS_SIL_REV_ENDIAN_UINT16
+#define	TOPPERS_SIL_REV_ENDIAN_UINT16(data) \
+				((((data) & 0xffU) << 8) | (((data) >> 8) & 0xffU))
+#endif /* TOPPERS_SIL_REV_ENDIAN_UINT16 */
+
+#ifndef TOPPERS_SIL_REV_ENDIAN_UINT32
+#define	TOPPERS_SIL_REV_ENDIAN_UINT32(data) \
+				((((data) & 0xffU) << 24) | (((data) & 0xff00U) << 8) \
+					| (((data) >> 8) & 0xff00U) | (((data) >> 24) & 0xffU))
+#endif /* TOPPERS_SIL_REV_ENDIAN_UINT32 */
+
+/*
+ *  ã¡ã¢ãªç©ºéã¢ã¯ã»ã¹é¢æ°
+ */
+#ifndef TOPPERS_OMIT_SIL_ACCESS
+
+/*
+ *  8ãããåä½ã®èª­åºãï¼æ¸è¾¼ã¿
+ */
+#ifdef UINT8_MAX
+
+Inline uint8_t
+sil_reb_mem(const uint8_t *mem)
+{
+	uint8_t	data;
+
+	data = *((const volatile uint8_t *) mem);
+	return(data);
+}
+
+Inline void
+sil_wrb_mem(uint8_t *mem, uint8_t data)
+{
+	*((volatile uint8_t *) mem) = data;
+}
+
+#endif /* UINT8_MAX */
+
+/*
+ *  16ãããåä½ã®èª­åºãï¼æ¸è¾¼ã¿
+ */
+
+Inline uint16_t
+sil_reh_mem(const uint16_t *mem)
+{
+	uint16_t	data;
+
+	data = *((const volatile uint16_t *) mem);
+	return(data);
+}
+
+Inline void
+sil_wrh_mem(uint16_t *mem, uint16_t data)
+{
+	*((volatile uint16_t *) mem) = data;
+}
+
+#ifdef SIL_ENDIAN_BIG			/* ããã°ã¨ã³ãã£ã¢ã³ãã­ã»ããµ */
+
+#define	sil_reh_bem(mem)		sil_reh_mem(mem)
+#define	sil_wrh_bem(mem, data)	sil_wrh_mem(mem, data)
+
+#ifndef TOPPERS_OMIT_SIL_REH_LEM
+
+Inline uint16_t
+sil_reh_lem(const uint16_t *mem)
+{
+	uint16_t	data;
+
+	data = *((const volatile uint16_t *) mem);
+	return(TOPPERS_SIL_REV_ENDIAN_UINT16(data));
+}
+
+#endif /* TOPPERS_OMIT_SIL_REH_LEM */
+#ifndef TOPPERS_OMIT_SIL_WRH_LEM
+
+Inline void
+sil_wrh_lem(uint16_t *mem, uint16_t data)
+{
+	*((volatile uint16_t *) mem) = TOPPERS_SIL_REV_ENDIAN_UINT16(data);
+}
+
+#endif /* TOPPERS_OMIT_SIL_WRH_LEM */
+#else /* SIL_ENDIAN_BIG */
+#ifdef SIL_ENDIAN_LITTLE		/* ãªãã«ã¨ã³ãã£ã¢ã³ãã­ã»ããµ */
+
+#define	sil_reh_lem(mem)		sil_reh_mem(mem)
+#define	sil_wrh_lem(mem, data)	sil_wrh_mem(mem, data)
+
+#ifndef TOPPERS_OMIT_SIL_REH_BEM
+
+Inline uint16_t
+sil_reh_bem(const uint16_t *mem)
+{
+	uint16_t	data;
+
+	data = *((const volatile uint16_t *) mem);
+	return(TOPPERS_SIL_REV_ENDIAN_UINT16(data));
+}
+
+#endif /* TOPPERS_OMIT_SIL_REH_BEM */
+#ifndef TOPPERS_OMIT_SIL_WRH_BEM
+
+Inline void
+sil_wrh_bem(uint16_t *mem, uint16_t data)
+{
+	*((volatile uint16_t *) mem) = TOPPERS_SIL_REV_ENDIAN_UINT16(data);
+}
+
+#endif /* TOPPERS_OMIT_SIL_WRH_BEM */
+#else /* SIL_ENDIAN_LITTLE */
+
+#error Neither SIL_ENDIAN_BIG nor SIL_ENDIAN_LITTLE is defined.
+
+#endif /* SIL_ENDIAN_LITTLE */
+#endif /* SIL_ENDIAN_BIG */
+
+/*
+ *  32ãããåä½ã®èª­åºãï¼æ¸è¾¼ã¿
+ */
+
+Inline uint32_t
+sil_rew_mem(const uint32_t *mem)
+{
+	uint32_t	data;
+
+	data = *((const volatile uint32_t *) mem);
+	return(data);
+}
+
+Inline void
+sil_wrw_mem(uint32_t *mem, uint32_t data)
+{
+	*((volatile uint32_t *) mem) = data;
+}
+
+#ifdef SIL_ENDIAN_BIG			/* ããã°ã¨ã³ãã£ã¢ã³ãã­ã»ããµ */
+
+#define	sil_rew_bem(mem)		sil_rew_mem(mem)
+#define	sil_wrw_bem(mem, data)	sil_wrw_mem(mem, data)
+
+#ifndef TOPPERS_OMIT_SIL_REW_LEM
+
+Inline uint32_t
+sil_rew_lem(const uint32_t *mem)
+{
+	uint32_t	data;
+
+	data = *((const volatile uint32_t *) mem);
+	return(TOPPERS_SIL_REV_ENDIAN_UINT32(data));
+}
+
+#endif /* TOPPERS_OMIT_SIL_REW_LEM */
+#ifndef TOPPERS_OMIT_SIL_WRW_LEM
+
+Inline void
+sil_wrw_lem(uint32_t *mem, uint32_t data)
+{
+	*((volatile uint32_t *) mem) = TOPPERS_SIL_REV_ENDIAN_UINT32(data);
+}
+
+#endif /* TOPPERS_OMIT_SIL_WRW_LEM */
+#else /* SIL_ENDIAN_BIG */		/* ãªãã«ã¨ã³ãã£ã¢ã³ãã­ã»ããµ */
+
+#define	sil_rew_lem(mem)		sil_rew_mem(mem)
+#define	sil_wrw_lem(mem, data)	sil_wrw_mem(mem, data)
+
+#ifndef TOPPERS_OMIT_SIL_REW_BEM
+
+Inline uint32_t
+sil_rew_bem(const uint32_t *mem)
+{
+	uint32_t	data;
+
+	data = *((const volatile uint32_t *) mem);
+	return(TOPPERS_SIL_REV_ENDIAN_UINT32(data));
+}
+
+#endif /* TOPPERS_OMIT_SIL_REW_BEM */
+#ifndef TOPPERS_OMIT_SIL_WRW_BEM
+
+Inline void
+sil_wrw_bem(uint32_t *mem, uint32_t data)
+{
+	*((volatile uint32_t *) mem) = TOPPERS_SIL_REV_ENDIAN_UINT32(data);
+}
+
+#endif /* TOPPERS_OMIT_SIL_WRW_BEM */
+#endif /* SIL_ENDIAN_BIG */
+#endif /* TOPPERS_OMIT_SIL_ACCESS */
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_SIL_H */
Index: rtos_arduino/trunk/asp_1.9.2/include/t_stddef.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/t_stddef.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/t_stddef.h	(revision 136)
@@ -0,0 +1,317 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2012 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: t_stddef.h 2406 2012-08-25 06:30:54Z ertl-hiro $
+ */
+
+/*
+ *		TOPPERSå
+±éããããã¡ã¤ã«
+ *
+ *  TOPPERSé¢é£ã®ãã¹ã¦ã®ã½ã¼ã¹ãã¡ã¤ã«ã§ã¤ã³ã¯ã«ã¼ããã¹ãããããã¡ã¤
+ *  ã«ï¼åç¨®ã®ã«ã¼ãã«ãã½ããã¦ã§ã¢é¨åã§å
+±éã«ç¨ãããã¨ãæ³å®ãã¦ã
+ *  ãï¼TOPPERSã®åç¨®ã®ã«ã¼ãã«ãã½ããã¦ã§ã¢é¨åã§å
+±éã«ç¨ãããã¼ã¿åï¼
+ *  å®æ°ï¼ãã¯ã­ã®å®ç¾©ãªã©ãå«ãï¼
+ *
+ *  ã¢ã»ã³ããªè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ãããã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããæ
+ *  ã¯ï¼TOPPERS_MACRO_ONLYãå®ç¾©ãã¦ããï¼ããã«ããï¼ãã¯ã­å®ç¾©ä»¥å¤ã
+ *  é¤ãããã«ãªã£ã¦ããï¼
+ *
+ *  ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããåã«ã¤ã³ã¯ã«ã¼ããã¦ããã¹ããã¡ã¤ã«
+ *  ã¯ãªãï¼
+ */
+
+#ifndef TOPPERS_T_STDDEF_H
+#define TOPPERS_T_STDDEF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  ã¿ã¼ã²ããä¾å­é¨
+ */
+#include "target_stddef.h"
+
+/*
+ *  Cè¨èª/EC++ã§throw()ã«å¯¾å¦ããããã®å®ç¾©
+ */
+#if !defined(__cplusplus) || defined(__embedded_cplusplus)
+#define throw()
+#endif
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®ãã¼ã¿åã®ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef TOPPERS_bool
+#define TOPPERS_bool	int				/* ãã¼ã«å */
+#endif /* TOPPERS_bool */
+
+#ifndef TOPPERS_size
+#define TOPPERS_size	uintptr_t		/* ãµã¤ãºå */
+#endif /* TOPPERS_size */
+
+#ifndef TOPPERS_fp
+struct TOPPERS_dummy_t { int TOPPERS_dummy_field; };
+typedef	void			(*TOPPERS_fp_t)(struct TOPPERS_dummy_t);
+#define TOPPERS_fp		TOPPERS_fp_t	/* ãã­ã°ã©ã ã®èµ·åçªå° */
+#endif /* TOPPERS_fp */
+
+/*
+ *  å
+±éãã¼ã¿å
+ */
+typedef TOPPERS_bool	bool_t;		/* çå½å¤ */
+
+typedef signed int		int_t;		/* èªç¶ãªãµã¤ãºã®ç¬¦å·ä»ãæ´æ° */
+typedef unsigned int	uint_t;		/* èªç¶ãªãµã¤ãºã®ç¬¦å·ç¡ãæ´æ° */
+
+typedef signed long		long_t;		/* é·ãã®ãµã¤ãºã®ç¬¦å·ä»ãæ´æ° */
+typedef unsigned long	ulong_t;	/* é·ãã®ãµã¤ãºã®ç¬¦å·ç¡ãæ´æ° */
+
+typedef int_t			FN;			/* æ©è½ã³ã¼ã */
+typedef	int_t			ER;			/* ã¨ã©ã¼ã³ã¼ã */
+typedef	int_t			ID;			/* ãªãã¸ã§ã¯ãã®IDçªå· */
+typedef	uint_t			ATR;		/* ãªãã¸ã§ã¯ãã®å±æ§ */
+typedef	uint_t			STAT;		/* ãªãã¸ã§ã¯ãã®ç¶æ
+ */
+typedef	uint_t			MODE;		/* ãµã¼ãã¹ã³ã¼ã«ã®åä½ã¢ã¼ã */
+typedef	int_t			PRI;		/* åªå
+åº¦ */
+typedef	TOPPERS_size	SIZE;		/* ã¡ã¢ãªé åã®ãµã¤ãº */
+
+typedef	int_t			TMO;		/* ã¿ã¤ã ã¢ã¦ãæå® */
+typedef	uint_t			RELTIM;		/* ç¸å¯¾æé */
+typedef	ulong_t			SYSTIM;		/* ã·ã¹ãã æå» */
+typedef	ulong_t			SYSUTM;		/* æ§è½è©ä¾¡ç¨ã·ã¹ãã æå» */
+
+typedef	TOPPERS_fp		FP;			/* ãã­ã°ã©ã ã®èµ·åçªå° */
+
+typedef	int_t			ER_BOOL;	/* ã¨ã©ã¼ã³ã¼ãã¾ãã¯çå½å¤ */
+typedef	int_t			ER_ID;		/* ã¨ã©ã¼ã³ã¼ãã¾ãã¯IDçªå· */
+typedef	int_t			ER_UINT;	/* ã¨ã©ã¼ã³ã¼ãã¾ãã¯ç¬¦å·ç¡ãæ´æ° */
+
+typedef uintptr_t		MB_T;		/* ç®¡çé åãç¢ºä¿ããããã®ãã¼ã¿å */
+
+typedef	uint32_t		ACPTN;		/* ã¢ã¯ã»ã¹è¨±å¯ãã¿ã¼ã³ */
+typedef	struct acvct {				/* ã¢ã¯ã»ã¹è¨±å¯ãã¯ã¿ */
+	ACPTN		acptn1;				/* éå¸¸æä½1ã®ã¢ã¯ã»ã¹è¨±å¯ãã¿ã¼ã³ */
+	ACPTN		acptn2;				/* éå¸¸æä½2ã®ã¢ã¯ã»ã¹è¨±å¯ãã¿ã¼ã³ */
+	ACPTN		acptn3;				/* ç®¡çæä½ã®ã¢ã¯ã»ã¹è¨±å¯ãã¿ã¼ã³ */
+	ACPTN		acptn4;				/* åç
+§æä½ã®ã¢ã¯ã»ã¹è¨±å¯ãã¿ã¼ã³ */
+} ACVCT;
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  æ´æ°å®æ°ãä½ããã¯ã­
+ */
+#ifndef UINT_C
+#define UINT_C(val)		(val ## U)		/* uint_tåã®å®æ°ãä½ããã¯ã­ */
+#endif /* UINT_C */
+
+#ifndef ULONG_C
+#define ULONG_C(val)	(val ## UL)		/* ulong_tåã®å®æ°ãä½ããã¯ã­ */
+#endif /* ULONG_C */
+
+/*
+ *  ä¸è¬å®æ°
+ */
+#ifndef NULL
+#define NULL		0			/* ç¡å¹ãã¤ã³ã¿ */
+#endif /* NULL */
+
+#ifndef true
+#define true		1			/* ç */
+#endif /* true */
+
+#ifndef false
+#define false		0			/* å½ */
+#endif /* false */
+
+#define E_OK		0			/* æ­£å¸¸çµäº */
+
+/*
+ *  ã¡ã¤ã³ã¨ã©ã¼ã³ã¼ã
+ */
+#define E_SYS		(-5)		/* ã·ã¹ãã ã¨ã©ã¼ */
+#define E_NOSPT		(-9)		/* æªãµãã¼ãæ©è½ */
+#define E_RSFN		(-10)		/* äºç´æ©è½ã³ã¼ã */
+#define E_RSATR		(-11)		/* äºç´å±æ§ */
+#define E_PAR		(-17)		/* ãã©ã¡ã¼ã¿ã¨ã©ã¼ */
+#define E_ID		(-18)		/* ä¸æ­£IDçªå· */
+#define E_CTX		(-25)		/* ã³ã³ãã­ã¹ãã¨ã©ã¼ */
+#define E_MACV		(-26)		/* ã¡ã¢ãªã¢ã¯ã»ã¹éå */
+#define E_OACV		(-27)		/* ãªãã¸ã§ã¯ãã¢ã¯ã»ã¹éå */
+#define E_ILUSE		(-28)		/* ãµã¼ãã¹ã³ã¼ã«ä¸æ­£ä½¿ç¨ */
+#define E_NOMEM		(-33)		/* ã¡ã¢ãªä¸è¶³ */
+#define E_NOID		(-34)		/* IDçªå·ä¸è¶³ */
+#define E_NORES		(-35)		/* è³æºä¸è¶³ */
+#define E_OBJ		(-41)		/* ãªãã¸ã§ã¯ãç¶æ
+ã¨ã©ã¼ */
+#define E_NOEXS		(-42)		/* ãªãã¸ã§ã¯ãæªçæ */
+#define E_QOVR		(-43)		/* ã­ã¥ã¼ã¤ã³ã°ãªã¼ãã¼ãã­ã¼ */
+#define E_RLWAI		(-49)		/* å¾
+ã¡ç¶æ
+ã®å¼·å¶è§£é¤ */
+#define E_TMOUT		(-50)		/* ãã¼ãªã³ã°å¤±æã¾ãã¯ã¿ã¤ã ã¢ã¦ã */
+#define E_DLT		(-51)		/* å¾
+ã¡ãªãã¸ã§ã¯ãã®åé¤ */
+#define E_CLS		(-52)		/* å¾
+ã¡ãªãã¸ã§ã¯ãã®ç¶æ
+å¤å */
+#define E_WBLK		(-57)		/* ãã³ãã­ãã­ã³ã°åä»ã */
+#define E_BOVR		(-58)		/* ãããã¡ãªã¼ãã¼ãã­ã¼ */
+
+/*
+ *  ãªãã¸ã§ã¯ãå±æ§
+ */
+#define TA_NULL		UINT_C(0)	/* ãªãã¸ã§ã¯ãå±æ§ãæå®ããªã */
+
+/*
+ *  ã¿ã¤ã ã¢ã¦ãæå®
+ */
+#define TMO_POL		0			/* ãã¼ãªã³ã° */
+#define TMO_FEVR	(-1)		/* æ°¸ä¹
+å¾
+ã¡ */
+#define TMO_NBLK	(-2)		/* ãã³ãã­ãã­ã³ã° */
+
+/*
+ *  ã¢ã¯ã»ã¹è¨±å¯ãã¿ã¼ã³
+ */
+#define TACP_KERNEL		(0U)	/* ã«ã¼ãã«ãã¡ã¤ã³ã ãã«ã¢ã¯ã»ã¹ãè¨±å¯ */
+#define TACP_SHARED		(~0U)	/* ãã¹ã¦ã®ãã¡ã¤ã³ããã¢ã¯ã»ã¹ãè¨±å¯ */
+
+/*
+ *  åã«é¢ããæ
+å ±ãåãåºãããã®ãã¯ã­
+ *
+ *  ä»¥ä¸ã®ALIGN_TYPEã®å®ç¾©ã¯ï¼ã¢ã©ã¤ã³ã¡ã³ãã®åä½ã2ã®å·¾ä¹ã§ãããã¨ã
+ *  ä»®å®ãã¦ããï¼
+ */
+#ifndef offsetof
+#define	offsetof(structure, field)	((uintptr_t) &(((structure *) 0)->field))
+#endif /* offsetof */
+
+#ifndef alignof
+#define alignof(type)	offsetof(struct { char field1; type field2; }, field2)
+#endif /* alignof */
+
+#ifndef ALIGN_TYPE				/* ã¢ã©ã¤ã³ã¡ã³ãã®ãã§ãã¯ */
+#define ALIGN_TYPE(addr, type) \
+						((((uintptr_t)(addr)) & (alignof(type) - 1)) == 0U)
+#endif /* ALIGN_TYPE */
+
+/*
+ *  assertãã¯ã­
+ */
+#undef assert
+#ifndef NDEBUG
+#define assert(exp)		((void)((exp) ? 0 : (TOPPERS_assert_fail(#exp, \
+							__FILE__, __LINE__), TOPPERS_assert_abort(), 0)))
+#else /* NDEBUG */
+#define assert(exp)		((void) 0)
+#endif /* NDEBUG */
+
+#ifdef __cplusplus
+}
+#endif
+
+/*
+ *  ã¨ã©ã¼ã³ã¼ãçæã»åè§£ãã¯ã­
+ *
+ *  ä»¥ä¸ã®ãã¯ã­å®ç¾©ã¯ï¼ç¬¦å·ä»ãæ´æ°ã2ã®è£æ°ã§è¡¨ç¾ããã¦ããï¼å³ã·ãã
+ *  æ¼ç®å­ï¼>>ï¼ãç®è¡ã·ããããããã¨ãä»®å®ãã¦ããï¼ããã§ãªãéçºç°
+ *  å¢ã§ã¯ï¼target_stddef.hã§ãããã®å®ç¾©ãä¸æ¸ãããªããã°ãªããªãï¼
+ *
+ *  MERCDãã¯ã­ã®å®ç¾©ã¯ï¼ã¡ã¤ã³ã¨ã©ã¼ã³ã¼ããè² ã§ãããã¨ãä»®å®ãã¦ããï¼
+ *  ããã§ãªãå ´åï¼2ã¤ã®å®ç¾©ãä¸è´ããªããªãï¼
+ */
+#ifndef ERCD
+#define ERCD(mercd, sercd) \
+				((ER)((((uint_t)(sercd)) << 8) | (((uint_t)(mercd)) & 0xffU)))
+#endif /* ERCD */
+
+#ifndef MERCD
+#ifdef INT8_MAX
+#define MERCD(ercd)		((ER)((int8_t)(ercd)))
+#else /* INT8_MAX */
+#define MERCD(ercd)		((ER)(((uint_t) ercd) | ~0xffU))
+#endif /* INT8_MAX */
+#endif /* MERCD */
+
+#ifndef SERCD
+#define SERCD(ercd)		((ER)((ercd) >> 8))
+#endif /* SERCD */
+
+/*
+ *  ã¢ã¯ã»ã¹è¨±å¯ãã¿ã¼ã³çæãã¯ã­
+ */
+#define TACP(domid)		(1U << ((domid) - 1))	/* domidã ãã«ã¢ã¯ã»ã¹ãè¨±å¯ */
+
+/*
+ *  ç¸å¯¾æéï¼RELTIMï¼ã«æå®ã§ããæå¤§å¤
+ */
+#if UINT_MAX < LONG_MAX
+#define TMAX_RELTIM		((RELTIM) UINT_MAX)
+#else /* UINT_MAX < LONG_MAX */
+#define TMAX_RELTIM		((RELTIM) LONG_MAX)
+#endif /* UINT_MAX < LONG_MAX */
+
+#endif /* TOPPERS_T_STDDEF_H */
Index: rtos_arduino/trunk/asp_1.9.2/include/t_stdlib.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/t_stdlib.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/t_stdlib.h	(revision 136)
@@ -0,0 +1,89 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2006 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: t_stdlib.h 264 2007-07-12 08:23:10Z hiro $
+ */
+
+/*
+ *		åºæ¬çãªã©ã¤ãã©ãªé¢æ°
+ */
+
+#ifndef TOPPERS_T_STDLIB_H
+#define TOPPERS_T_STDLIB_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  ã¨ã©ã¼ã¡ãã»ã¼ã¸æå­åãè¿ãé¢æ°
+ *
+ *  ercdã§æå®ãããã¨ã©ã¼ã³ã¼ãã®ã¡ã¤ã³ã¨ã©ã¼ã³ã¼ãã®åç§°ï¼E_PARï¼
+ *  E_OBJãªã©ï¼ã®æå­åãè¿ãé¢æ°ï¼
+ */
+extern const char	*itron_strerror(ER ercd) throw();
+
+/*
+ *  ã¨ã©ã¼ã¡ãã»ã¼ã¸ã®ã­ã°åºå
+ *
+ *  ãµã¼ãã¹ã³ã¼ã«ãã¨ã©ã¼ãè¿ããå ´åã«ï¼ãã®ãã¡ã¤ã«åï¼è¡çªå·ï¼ã¡ã¤
+ *  ã³ã¨ã©ã¼ã³ã¼ãç­ãè¡¨ç¤ºããããã®é¢æ°ï¼
+ */
+extern void		t_perror(uint_t prio, const char *file, int_t line,
+									const char *expr, ER ercd) throw();
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_T_STDLIB_H */
Index: rtos_arduino/trunk/asp_1.9.2/include/t_syslog.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/t_syslog.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/t_syslog.h	(revision 136)
@@ -0,0 +1,372 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: t_syslog.h 2126 2011-06-26 01:07:35Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã­ã°åºåãè¡ãããã®å®ç¾©
+ *
+ *  ã·ã¹ãã ã­ã°ãµã¼ãã¹ã¯ï¼ã·ã¹ãã ã®ã­ã°æ
+å ±ãåºåããããã®ãµã¼ãã¹
+ *  ã§ããï¼ã«ã¼ãã«ããã®ã­ã°æ
+å ±ã®åºåã«ãç¨ããããï¼å
+é¨ã§å¾
+ã¡ç¶æ
+
+ *  ã«ã¯ãããã¨ã¯ãªãï¼
+ *
+ *  ã­ã°æ
+å ±ã¯ï¼ã«ã¼ãã«å
+ã®ã­ã°ãããã¡ã«æ¸ãè¾¼ããï¼ä½ã¬ãã«ã®æå­åº
+ *  åé¢æ°ãç¨ãã¦åºåããï¼ã©ã¡ããä½¿ããã¯ï¼æ¡å¼µãµã¼ãã¹ã³ã¼ã«ã§åã
+ *  æãããã¨ãã§ããï¼
+ *
+ *  ã­ã°ãããã¡é åããªã¼ããã­ã¼ããå ´åã«ã¯ï¼å¤ãã­ã°æ
+å ±ãæ¶ãã¦ä¸
+ *  æ¸ãããï¼
+ *
+ *  ã¢ã»ã³ããªè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ãããã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããæ
+ *  ã¯ï¼TOPPERS_MACRO_ONLYãå®ç¾©ãã¦ãããã¨ã§ï¼ãã¯ã­å®ç¾©ä»¥å¤ã®è¨è¿°ã
+ *  é¤ããã¨ãã§ããï¼
+ *
+ *  ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããåã«ï¼t_stddef.hãã¤ã³ã¯ã«ã¼ããã¦ã
+ *  ããã¨ãå¿
+è¦ã§ããï¼
+ */
+
+#ifndef TOPPERS_T_SYSLOG_H
+#define TOPPERS_T_SYSLOG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  ã­ã°æ
+å ±ã®ç¨®å¥ã®å®ç¾©
+ */
+#define LOG_TYPE_COMMENT	UINT_C(0x01)	/* ã³ã¡ã³ã */
+#define LOG_TYPE_ASSERT		UINT_C(0x02)	/* ã¢ãµã¼ã·ã§ã³ã®å¤±æ */
+
+#define LOG_TYPE_INH		UINT_C(0x11)	/* å²è¾¼ã¿ãã³ãã© */
+#define LOG_TYPE_ISR		UINT_C(0x12)	/* å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ */
+#define LOG_TYPE_CYC		UINT_C(0x13)	/* å¨æãã³ãã© */
+#define LOG_TYPE_ALM		UINT_C(0x14)	/* ã¢ã©ã¼ã ãã³ãã© */
+#define LOG_TYPE_OVR		UINT_C(0x15)	/* ãªã¼ãã©ã³ãã³ãã© */
+#define LOG_TYPE_EXC		UINT_C(0x16)	/* CPUä¾å¤ãã³ãã© */
+#define LOG_TYPE_TEX		UINT_C(0x17)	/* ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ */
+#define LOG_TYPE_TSKSTAT	UINT_C(0x18)	/* ã¿ã¹ã¯ç¶æ
+å¤å */
+#define LOG_TYPE_DSP		UINT_C(0x19)	/* ãã£ã¹ãããã£ */
+#define LOG_TYPE_SVC		UINT_C(0x1a)	/* ãµã¼ãã¹ã³ã¼ã« */
+
+#define LOG_ENTER			UINT_C(0x00)	/* å
+¥å£ï¼éå§ */
+#define LOG_LEAVE			UINT_C(0x80)	/* åºå£ï¼çµäº */
+
+/*
+ *  ã­ã°æ
+å ±ã®éè¦åº¦ã®å®ç¾©
+ */
+#define LOG_EMERG			UINT_C(0)		/* ã·ã£ãããã¦ã³ã«å¤ããã¨ã©ã¼ */
+#define LOG_ALERT			UINT_C(1)
+#define LOG_CRIT			UINT_C(2)
+#define LOG_ERROR			UINT_C(3)		/* ã·ã¹ãã ã¨ã©ã¼ */
+#define LOG_WARNING			UINT_C(4)		/* è­¦åã¡ãã»ã¼ã¸ */
+#define LOG_NOTICE			UINT_C(5)
+#define LOG_INFO			UINT_C(6)
+#define LOG_DEBUG			UINT_C(7)		/* ãããã°ç¨ã¡ãã»ã¼ã¸ */
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã­ã°æ
+å ±ã®ãã¼ã¿æ§é 
+ */
+
+#define TMAX_LOGINFO	6
+
+typedef struct {
+	uint_t		logtype;				/* ã­ã°æ
+å ±ã®ç¨®å¥ */
+	SYSTIM		logtim;					/* ã­ã°æå» */
+	intptr_t	loginfo[TMAX_LOGINFO];	/* ãã®ä»ã®ã­ã°æ
+å ± */
+} SYSLOG;
+
+/*
+ *  ã­ã°æ
+å ±ã®éè¦åº¦ã®ãããããããä½ãããã®ãã¯ã­
+ */
+#define LOG_MASK(prio)		(1U << (prio))
+#define LOG_UPTO(prio)		((1U << ((prio) + 1)) - 1)
+
+/*
+ *  ãã±ããå½¢å¼ã®å®ç¾©
+ */
+typedef struct t_syslog_rlog {
+	uint_t	count;		/* ã­ã°ãããã¡ä¸­ã®ã­ã°ã®æ° */
+	uint_t	lost;		/* å¤±ãããã­ã°ã®æ° */
+	uint_t	logmask;	/* ã­ã°ãããã¡ã«è¨é²ãã¹ãéè¦åº¦ */
+	uint_t	lowmask;	/* ä½ã¬ãã«åºåãã¹ãéè¦åº¦ */
+} T_SYSLOG_RLOG;
+
+/*
+ *  ã­ã°æ
+å ±ãåºåããããã®ã©ã¤ãã©ãªé¢æ°
+ */
+
+#ifndef TOPPERS_OMIT_SYSLOG
+
+extern ER	syslog_wri_log(uint_t prio, const SYSLOG *p_syslog) throw();
+
+Inline void
+_syslog_0(uint_t prio, uint_t type)
+{
+	SYSLOG	logbuf;
+
+	logbuf.logtype = type;
+	(void) syslog_wri_log(prio, &logbuf);
+}
+
+Inline void
+_syslog_1(uint_t prio, uint_t type, intptr_t arg1)
+{
+	SYSLOG	logbuf;
+
+	logbuf.logtype = type;
+	logbuf.loginfo[0] = arg1;
+	(void) syslog_wri_log(prio, &logbuf);
+}
+
+Inline void
+_syslog_2(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2)
+{
+	SYSLOG	logbuf;
+
+	logbuf.logtype = type;
+	logbuf.loginfo[0] = arg1;
+	logbuf.loginfo[1] = arg2;
+	(void) syslog_wri_log(prio, &logbuf);
+}
+
+Inline void
+_syslog_3(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2,
+														intptr_t arg3)
+{
+	SYSLOG	logbuf;
+
+	logbuf.logtype = type;
+	logbuf.loginfo[0] = arg1;
+	logbuf.loginfo[1] = arg2;
+	logbuf.loginfo[2] = arg3;
+	(void) syslog_wri_log(prio, &logbuf);
+}
+
+Inline void
+_syslog_4(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2,
+										intptr_t arg3, intptr_t arg4)
+{
+	SYSLOG	logbuf;
+
+	logbuf.logtype = type;
+	logbuf.loginfo[0] = arg1;
+	logbuf.loginfo[1] = arg2;
+	logbuf.loginfo[2] = arg3;
+	logbuf.loginfo[3] = arg4;
+	(void) syslog_wri_log(prio, &logbuf);
+}
+
+Inline void
+_syslog_5(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2,
+							intptr_t arg3, intptr_t arg4, intptr_t arg5)
+{
+	SYSLOG	logbuf;
+
+	logbuf.logtype = type;
+	logbuf.loginfo[0] = arg1;
+	logbuf.loginfo[1] = arg2;
+	logbuf.loginfo[2] = arg3;
+	logbuf.loginfo[3] = arg4;
+	logbuf.loginfo[4] = arg5;
+	(void) syslog_wri_log(prio, &logbuf);
+}
+
+Inline void
+_syslog_6(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2,
+				intptr_t arg3, intptr_t arg4, intptr_t arg5, intptr_t arg6)
+{
+	SYSLOG	logbuf;
+
+	logbuf.logtype = type;
+	logbuf.loginfo[0] = arg1;
+	logbuf.loginfo[1] = arg2;
+	logbuf.loginfo[2] = arg3;
+	logbuf.loginfo[3] = arg4;
+	logbuf.loginfo[4] = arg5;
+	logbuf.loginfo[5] = arg6;
+	(void) syslog_wri_log(prio, &logbuf);
+}
+
+/*
+ *  ã­ã°æ
+å ±ï¼ã³ã¡ã³ãï¼ãåºåããããã®ã©ã¤ãã©ãªé¢æ°ï¼vasyslog.cï¼
+ */
+extern void	syslog(uint_t prio, const char *format, ...) throw();
+
+#else /* TOPPERS_OMIT_SYSLOG */
+
+/*
+ *  ã·ã¹ãã ã­ã°åºåãææ­¢ããå ´å
+ */
+
+Inline void
+_syslog_0(uint_t prio, uint_t type)
+{
+}
+
+Inline void
+_syslog_1(uint_t prio, uint_t type, intptr_t arg1)
+{
+}
+
+Inline void
+_syslog_2(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2)
+{
+}
+
+Inline void
+_syslog_3(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2,
+														intptr_t arg3)
+{
+}
+
+Inline void
+_syslog_4(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2,
+										intptr_t arg3, intptr_t arg4)
+{
+}
+
+Inline void
+_syslog_5(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2,
+							intptr_t arg3, intptr_t arg4, intptr_t arg5)
+{
+}
+
+Inline void
+_syslog_6(uint_t prio, uint_t type, intptr_t arg1, intptr_t arg2,
+				intptr_t arg3, intptr_t arg4, intptr_t arg5, intptr_t arg6)
+{
+}
+
+Inline void
+syslog(uint_t prio, const char *format, ...)
+{
+}
+
+#endif /* TOPPERS_OMIT_SYSLOG */
+
+/*
+ *  ã­ã°æ
+å ±ï¼ã³ã¡ã³ãï¼ãåºåããããã®ãã¯ã­
+ *
+ *  formatããã³å¾ç¶ã®å¼æ°ããä½æããã¡ãã»ã¼ã¸ãï¼éå¤§åº¦prioã§ã­ã°æ
+
+ *  å ±ã¨ãã¦åºåããããã®ãã¯ã­ï¼arg1ï½argnã¯intptr_tåã«ã­ã£ã¹ããã
+ *  ããï¼intptr_tåã«åå¤æã§ããä»»æã®åã§ããï¼
+ */
+
+#define syslog_0(prio, format) \
+				_syslog_1(prio, LOG_TYPE_COMMENT, (intptr_t)(format))
+
+#define syslog_1(prio, format, arg1) \
+				_syslog_2(prio, LOG_TYPE_COMMENT, (intptr_t)(format), \
+														(intptr_t)(arg1))
+
+#define syslog_2(prio, format, arg1, arg2) \
+				_syslog_3(prio, LOG_TYPE_COMMENT, (intptr_t)(format), \
+										(intptr_t)(arg1), (intptr_t)(arg2))
+
+#define syslog_3(prio, format, arg1, arg2, arg3) \
+				_syslog_4(prio, LOG_TYPE_COMMENT, (intptr_t)(format), \
+						(intptr_t)(arg1), (intptr_t)(arg2), (intptr_t)(arg3))
+
+#define syslog_4(prio, format, arg1, arg2, arg3, arg4) \
+				_syslog_5(prio, LOG_TYPE_COMMENT, (intptr_t)(format), \
+						(intptr_t)(arg1), (intptr_t)(arg2), (intptr_t)(arg3), \
+														(intptr_t)(arg4))
+
+#define syslog_5(prio, format, arg1, arg2, arg3, arg4, arg5) \
+				_syslog_6(prio, LOG_TYPE_COMMENT, (intptr_t)(format), \
+						(intptr_t)(arg1), (intptr_t)(arg2), (intptr_t)(arg3), \
+										(intptr_t)(arg4), (intptr_t)(arg5))
+
+/*
+ *  ã­ã°æ
+å ±ï¼ã¢ãµã¼ã·ã§ã³ã®å¤±æï¼ãåºåããããã®ãã¯ã­
+ */
+#ifndef TOPPERS_assert_fail
+#define TOPPERS_assert_fail(exp, file, line) \
+				_syslog_3(LOG_EMERG, LOG_TYPE_ASSERT, (intptr_t)(file), \
+										(intptr_t)(line), (intptr_t)(exp))
+#endif /* TOPPERS_assert_fail */
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_T_SYSLOG_H */
Index: rtos_arduino/trunk/asp_1.9.2/include/test_lib.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/include/test_lib.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/include/test_lib.h	(revision 136)
@@ -0,0 +1,168 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_lib.h 2673 2015-02-08 10:08:03Z ertl-hiro $
+ */
+
+/* 
+ *		ãã¹ããã­ã°ã©ã ç¨ã©ã¤ãã©ãª
+ */
+
+#ifndef TOPPERS_TEST_LIB_H
+#define TOPPERS_TEST_LIB_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <t_stddef.h>
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *	èªå·±è¨ºæ­é¢æ°ã®å
+ */
+typedef ER (*BIT_FUNC)(void);
+
+/*
+ *	èªå·±è¨ºæ­é¢æ°ã®è¨­å®
+ */
+extern void	set_bit_func(BIT_FUNC bit_func);
+
+/*
+ *  ãã¹ããã­ã°ã©ã ã®éå§
+ */
+extern void	test_start(char *progname);
+
+/*
+ *  ã·ã¹ãã ã­ã°ã®åºåå¦ç
+ */
+extern void	syslog_flush(void);
+
+/*
+ *	ãã¹ããã­ã°ã©ã ã®çµäº
+ */
+extern void	test_finish(void);
+
+/*
+ *	ãã§ãã¯ãã¤ã³ã
+ */
+extern void	check_point(uint_t count);
+
+/*
+ *	å®äºãã§ãã¯ãã¤ã³ã
+ */
+extern void	check_finish(uint_t count);
+
+/*
+ *	æ¡ä»¶ãã§ãã¯
+ */
+extern void	_check_assert(const char *expr, const char *file, int_t line);
+#define check_assert(exp) \
+	((void)(!(exp) ? (_check_assert(#exp, __FILE__, __LINE__), 0) : 0))
+
+/*
+ *	ã¨ã©ã¼ã³ã¼ããã§ãã¯
+ */
+extern void	_check_ercd(ER ercd, const char *file, int_t line);
+#define check_ercd(ercd, expected_ercd) \
+	((void)((ercd) != (expected_ercd) ? \
+					(_check_ercd(ercd, __FILE__, __LINE__), 0) : 0))
+
+/*
+ *	ã·ã¹ãã ç¶æ
+ã®ãã§ãã¯
+ */
+Inline void
+check_state(bool_t ctx, bool_t loc, PRI ipm, bool_t dsp,
+										bool_t dpn, bool_t tex)
+{
+	PRI		intpri;
+	ER		ercd;
+
+	check_assert(sns_ctx() == ctx);
+	check_assert(sns_loc() == loc);
+	if (!loc) {
+		/*
+		 *  IPMã®ãã§ãã¯ã¯ï¼CPUã­ãã¯è§£é¤ç¶æ
+ã®å ´åã«ã®ã¿è¡ãï¼
+		 */
+		ercd = get_ipm(&intpri);
+		check_ercd(ercd, E_OK);
+		check_assert(intpri == ipm);
+	}
+	check_assert(sns_dsp() == dsp);
+	check_assert(sns_dpn() == dpn);
+	check_assert(sns_tex() == tex);
+}
+
+/*
+ *	ã·ã¹ãã ç¶æ
+ã®ãã§ãã¯ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+Inline void
+check_state_i(bool_t ctx, bool_t loc, bool_t dsp, bool_t dpn, bool_t tex)
+{
+	check_assert(sns_ctx() == ctx);
+	check_assert(sns_loc() == loc);
+	check_assert(sns_dsp() == dsp);
+	check_assert(sns_dpn() == dpn);
+	check_assert(sns_tex() == tex);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_TEST_LIB_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/Makefile.kernel
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/Makefile.kernel	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/Makefile.kernel	(revision 136)
@@ -0,0 +1,151 @@
+#
+#  TOPPERS/ASP Kernel
+#      Toyohashi Open Platform for Embedded Real-Time Systems/
+#      Advanced Standard Profile Kernel
+# 
+#  Copyright (C) 2003 by Embedded and Real-Time Systems Laboratory
+#                              Toyohashi Univ. of Technology, JAPAN
+#  Copyright (C) 2005-2008 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  @(#) $Id: Makefile.kernel 877 2008-04-11 10:36:50Z hiro $
+# 
+
+#
+#		ã«ã¼ãã«ã®ãã¡ã¤ã«æ§æã®å®ç¾©
+#
+
+#
+#  1ã¤ã®ã½ã¼ã¹ãã¡ã¤ã«ããè¤æ°ã®ãªãã¸ã§ã¯ããã¡ã¤ã«ãçæããããã«ä½
+#  æãããã½ã¼ã¹ãã¡ã¤ã«ã®ãªã¹ã
+#
+KERNEL_FCSRCS = startup.c task.c wait.c time_event.c \
+				task_manage.c task_refer.c task_sync.c task_except.c \
+				semaphore.c eventflag.c dataqueue.c pridataq.c mailbox.c \
+				mempfix.c time_manage.c cyclic.c alarm.c \
+				sys_manage.c interrupt.c exception.c
+
+#
+#  åã½ã¼ã¹ãã¡ã¤ã«ããçæããããªãã¸ã§ã¯ããã¡ã¤ã«ã®ãªã¹ã
+#
+startup = sta_ker.o ext_ker.o
+
+task = tskini.o tsksched.o tskrun.o tsknrun.o \
+		tskdmt.o tskact.o tskpri.o tskrot.o tsktex.o
+
+wait = waimake.o waicmp.o waitmo.o waitmook.o \
+		wairel.o wobjwai.o wobjwaitmo.o iniwque.o
+
+time_event = tmeini.o tmeup.o tmedown.o tmeins.o tmedel.o tmeltim.o sigtim.o
+
+task_manage = act_tsk.o iact_tsk.o can_act.o ext_tsk.o ter_tsk.o \
+		chg_pri.o get_pri.o get_inf.o
+
+task_refer = ref_tsk.o
+
+task_sync = slp_tsk.o tslp_tsk.o wup_tsk.o iwup_tsk.o can_wup.o \
+		rel_wai.o irel_wai.o sus_tsk.o rsm_tsk.o dly_tsk.o
+
+task_except = ras_tex.o iras_tex.o dis_tex.o ena_tex.o sns_tex.o ref_tex.o
+
+semaphore = semini.o sig_sem.o isig_sem.o \
+		wai_sem.o pol_sem.o twai_sem.o ini_sem.o ref_sem.o
+
+eventflag = flgini.o flgcnd.o set_flg.o iset_flg.o clr_flg.o \
+		wai_flg.o pol_flg.o twai_flg.o ini_flg.o ref_flg.o
+
+dataqueue = dtqini.o dtqenq.o dtqfenq.o dtqdeq.o dtqsnd.o dtqfsnd.o dtqrcv.o \
+		snd_dtq.o psnd_dtq.o ipsnd_dtq.o tsnd_dtq.o fsnd_dtq.o ifsnd_dtq.o \
+		rcv_dtq.o prcv_dtq.o trcv_dtq.o ini_dtq.o ref_dtq.o
+
+pridataq = pdqini.o pdqenq.o pdqdeq.o pdqsnd.o pdqrcv.o \
+		snd_pdq.o psnd_pdq.o ipsnd_pdq.o tsnd_pdq.o \
+		rcv_pdq.o prcv_pdq.o trcv_pdq.o ini_pdq.o ref_pdq.o
+
+mailbox = mbxini.o snd_mbx.o rcv_mbx.o prcv_mbx.o trcv_mbx.o \
+		ini_mbx.o ref_mbx.o
+
+mempfix = mpfini.o mpfget.o get_mpf.o pget_mpf.o tget_mpf.o \
+		rel_mpf.o ini_mpf.o ref_mpf.o
+
+time_manage = get_tim.o get_utm.o
+
+cyclic = cycini.o sta_cyc.o stp_cyc.o ref_cyc.o cyccal.o
+
+alarm = almini.o sta_alm.o ista_alm.o stp_alm.o istp_alm.o ref_alm.o almcal.o
+
+sys_manage = rot_rdq.o irot_rdq.o get_tid.o iget_tid.o \
+		loc_cpu.o iloc_cpu.o unl_cpu.o iunl_cpu.o dis_dsp.o ena_dsp.o \
+		sns_ctx.o sns_loc.o sns_dsp.o sns_dpn.o sns_ker.o
+
+interrupt = intini.o dis_int.o ena_int.o chg_ipm.o get_ipm.o
+
+exception = excini.o xsns_dpn.o xsns_xpn.o
+
+#
+#  çæããããªãã¸ã§ã¯ããã¡ã¤ã«ã®ä¾å­é¢ä¿ã®å®ç¾©
+#
+$(startup) $(startup:.o=.s) $(startup:.o=.d): startup.c
+$(task) $(task:.o=.s) $(task:.o=.d): task.c
+$(wait) $(wait:.o=.s) $(wait:.o=.d): wait.c
+$(time_event) $(time_event:.o=.s) $(time_event:.o=.d): time_event.c
+$(task_manage) $(task_manage:.o=.s) $(task_manage:.o=.d): task_manage.c
+$(task_refer) $(task_refer:.o=.s) $(task_refer:.o=.d): task_refer.c
+$(task_sync) $(task_sync:.o=.s) $(task_sync:.o=.d): task_sync.c
+$(task_except) $(task_except:.o=.s) $(task_except:.o=.d): task_except.c
+$(semaphore) $(semaphore:.o=.s) $(semaphore:.o=.d): semaphore.c
+$(eventflag) $(eventflag:.o=.s) $(eventflag:.o=.d): eventflag.c
+$(dataqueue) $(dataqueue:.o=.s) $(dataqueue:.o=.d): dataqueue.c
+$(pridataq) $(pridataq:.o=.s) $(pridataq:.o=.d): pridataq.c
+$(mailbox) $(mailbox:.o=.s) $(mailbox:.o=.d): mailbox.c
+$(mempfix) $(mempfix:.o=.s) $(mempfix:.o=.d): mempfix.c
+$(time_manage) $(time_manage:.o=.s) $(time_manage:.o=.d): time_manage.c
+$(cyclic) $(cyclic:.o=.s) $(cyclic:.o=.d): cyclic.c
+$(alarm) $(alarm:.o=.s) $(alarm:.o=.d): alarm.c
+$(sys_manage) $(sys_manage:.o=.s) $(sys_manage:.o=.d): sys_manage.c
+$(interrupt) $(interrupt:.o=.s) $(interrupt:.o=.d): interrupt.c
+$(exception) $(exception:.o=.s) $(exception:.o=.d): exception.c
Index: rtos_arduino/trunk/asp_1.9.2/kernel/alarm.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/alarm.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/alarm.c	(revision 136)
@@ -0,0 +1,351 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: alarm.c 2133 2011-06-26 03:14:51Z ertl-hiro $
+ */
+
+/*
+ *		ã¢ã©ã¼ã ãã³ãã©æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "alarm.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_ALM_ENTER
+#define LOG_ALM_ENTER(p_almcb)
+#endif /* LOG_ALM_ENTER */
+
+#ifndef LOG_ALM_LEAVE
+#define LOG_ALM_LEAVE(p_almcb)
+#endif /* LOG_ALM_LEAVE */
+
+#ifndef LOG_STA_ALM_ENTER
+#define LOG_STA_ALM_ENTER(almid, almtim)
+#endif /* LOG_STA_ALM_ENTER */
+
+#ifndef LOG_STA_ALM_LEAVE
+#define LOG_STA_ALM_LEAVE(ercd)
+#endif /* LOG_STA_ALM_LEAVE */
+
+#ifndef LOG_ISTA_ALM_ENTER
+#define LOG_ISTA_ALM_ENTER(almid, almtim)
+#endif /* LOG_ISTA_ALM_ENTER */
+
+#ifndef LOG_ISTA_ALM_LEAVE
+#define LOG_ISTA_ALM_LEAVE(ercd)
+#endif /* LOG_ISTA_ALM_LEAVE */
+
+#ifndef LOG_STP_ALM_ENTER
+#define LOG_STP_ALM_ENTER(almid)
+#endif /* LOG_STP_ALM_ENTER */
+
+#ifndef LOG_STP_ALM_LEAVE
+#define LOG_STP_ALM_LEAVE(ercd)
+#endif /* LOG_STP_ALM_LEAVE */
+
+#ifndef LOG_ISTP_ALM_ENTER
+#define LOG_ISTP_ALM_ENTER(almid)
+#endif /* LOG_ISTP_ALM_ENTER */
+
+#ifndef LOG_ISTP_ALM_LEAVE
+#define LOG_ISTP_ALM_LEAVE(ercd)
+#endif /* LOG_ISTP_ALM_LEAVE */
+
+#ifndef LOG_REF_ALM_ENTER
+#define LOG_REF_ALM_ENTER(almid, pk_ralm)
+#endif /* LOG_REF_ALM_ENTER */
+
+#ifndef LOG_REF_ALM_LEAVE
+#define LOG_REF_ALM_LEAVE(ercd, pk_ralm)
+#endif /* LOG_REF_ALM_LEAVE */
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©ã®æ°
+ */
+#define tnum_alm	((uint_t)(tmax_almid - TMIN_ALMID + 1))
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©IDããã¢ã©ã¼ã ãã³ãã©ç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_ALM(almid)	((uint_t)((almid) - TMIN_ALMID))
+#define get_almcb(almid)	(&(almcb_table[INDEX_ALM(almid)]))
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©æ©è½ã®åæå
+ */
+#ifdef TOPPERS_almini
+
+void
+initialize_alarm(void)
+{
+	uint_t	i;
+	ALMCB	*p_almcb;
+
+	for (i = 0; i < tnum_alm; i++) {
+		p_almcb = &(almcb_table[i]);
+		p_almcb->p_alminib = &(alminib_table[i]);
+		p_almcb->almsta = false;
+	}
+}
+
+#endif /* TOPPERS_almini */
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©ã®åä½éå§
+ */
+#ifdef TOPPERS_sta_alm
+
+ER
+sta_alm(ID almid, RELTIM almtim)
+{
+	ALMCB	*p_almcb;
+	ER		ercd;
+
+	LOG_STA_ALM_ENTER(almid, almtim);
+	CHECK_TSKCTX_UNL();
+	CHECK_ALMID(almid);
+	CHECK_PAR(almtim <= TMAX_RELTIM);
+	p_almcb = get_almcb(almid);
+
+	t_lock_cpu();
+	if (p_almcb->almsta) {
+		tmevtb_dequeue(&(p_almcb->tmevtb));
+	}
+	else {
+		p_almcb->almsta = true;
+	}
+	tmevtb_enqueue(&(p_almcb->tmevtb), almtim,
+								(CBACK) call_almhdr, (void *) p_almcb);
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_STA_ALM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_sta_alm */
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©ã®åä½éå§ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_ista_alm
+
+ER
+ista_alm(ID almid, RELTIM almtim)
+{
+	ALMCB	*p_almcb;
+	ER		ercd;
+
+	LOG_ISTA_ALM_ENTER(almid, almtim);
+	CHECK_INTCTX_UNL();
+	CHECK_ALMID(almid);
+	CHECK_PAR(almtim <= TMAX_RELTIM);
+	p_almcb = get_almcb(almid);
+
+	i_lock_cpu();
+	if (p_almcb->almsta) {
+		tmevtb_dequeue(&(p_almcb->tmevtb));
+	}
+	else {
+		p_almcb->almsta = true;
+	}
+	tmevtb_enqueue(&(p_almcb->tmevtb), almtim,
+								(CBACK) call_almhdr, (void *) p_almcb);
+	ercd = E_OK;
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_ISTA_ALM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ista_alm */
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©ã®åä½åæ­¢
+ */
+#ifdef TOPPERS_stp_alm
+
+ER
+stp_alm(ID almid)
+{
+	ALMCB	*p_almcb;
+	ER		ercd;
+
+	LOG_STP_ALM_ENTER(almid);
+	CHECK_TSKCTX_UNL();
+	CHECK_ALMID(almid);
+	p_almcb = get_almcb(almid);
+
+	t_lock_cpu();
+	if (p_almcb->almsta) {
+		p_almcb->almsta = false;
+		tmevtb_dequeue(&(p_almcb->tmevtb));
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_STP_ALM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_stp_alm */
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©ã®åä½åæ­¢ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_istp_alm
+
+ER
+istp_alm(ID almid)
+{
+	ALMCB	*p_almcb;
+	ER		ercd;
+
+	LOG_ISTP_ALM_ENTER(almid);
+	CHECK_INTCTX_UNL();
+	CHECK_ALMID(almid);
+	p_almcb = get_almcb(almid);
+
+	i_lock_cpu();
+	if (p_almcb->almsta) {
+		p_almcb->almsta = false;
+		tmevtb_dequeue(&(p_almcb->tmevtb));
+	}
+	ercd = E_OK;
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_ISTP_ALM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_istp_alm */
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©ã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_alm
+
+ER
+ref_alm(ID almid, T_RALM *pk_ralm)
+{
+	ALMCB	*p_almcb;
+	ER		ercd;
+    
+	LOG_REF_ALM_ENTER(almid, pk_ralm);
+	CHECK_TSKCTX_UNL();
+	CHECK_ALMID(almid);
+	p_almcb = get_almcb(almid);
+
+	t_lock_cpu();
+	if (p_almcb->almsta) {
+		pk_ralm->almstat = TALM_STA;
+		pk_ralm->lefttim = tmevt_lefttim(&(p_almcb->tmevtb));
+	}
+	else {
+		pk_ralm->almstat = TALM_STP;
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_ALM_LEAVE(ercd, pk_ralm);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_alm */
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©èµ·åã«ã¼ãã³
+ */
+#ifdef TOPPERS_almcal
+
+void
+call_almhdr(ALMCB *p_almcb)
+{
+	PRI		saved_ipm;
+
+	/*
+	 *  ã¢ã©ã¼ã ãã³ãã©ãåæ­¢ç¶æ
+ã«ããï¼
+	 */
+	p_almcb->almsta = false;
+
+	/*
+	 *  ã¢ã©ã¼ã ãã³ãã©ãï¼CPUã­ãã¯è§£é¤ç¶æ
+ã§å¼ã³åºãï¼
+	 */
+	saved_ipm = i_get_ipm();
+	i_unlock_cpu();
+
+	LOG_ALM_ENTER(p_almcb);
+	(*((ALMHDR)(p_almcb->p_alminib->almhdr)))(p_almcb->p_alminib->exinf);
+	LOG_ALM_LEAVE(p_almcb);
+
+	if (!i_sense_lock()) {
+		i_lock_cpu();
+	}
+	i_set_ipm(saved_ipm);
+}
+
+#endif /* TOPPERS_almcal */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/alarm.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/alarm.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/alarm.h	(revision 136)
@@ -0,0 +1,112 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005,2006 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: alarm.h 748 2008-03-07 17:18:06Z hiro $
+ */
+
+/*
+ *		ã¢ã©ã¼ã ãã³ãã©æ©è½
+ */
+
+#ifndef TOPPERS_ALARM_H
+#define TOPPERS_ALARM_H
+
+#include "time_event.h"
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©åæåãã­ãã¯
+ */
+typedef struct alarm_handler_initialization_block {
+	ATR			almatr;			/* ã¢ã©ã¼ã ãã³ãã©å±æ§ */
+	intptr_t	exinf;			/* ã¢ã©ã¼ã ãã³ãã©ã®æ¡å¼µæ
+å ± */
+	ALMHDR		almhdr;			/* ã¢ã©ã¼ã ãã³ãã©ã®èµ·åçªå° */
+} ALMINIB;
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©ç®¡çãã­ãã¯
+ */
+typedef struct alarm_handler_control_block {
+	const ALMINIB *p_alminib;	/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+	bool_t		almsta;			/* ã¢ã©ã¼ã ãã³ãã©ã®åä½ç¶æ
+ */
+	TMEVTB		tmevtb;			/* ã¿ã¤ã ã¤ãã³ããã­ãã¯ */
+} ALMCB;
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©IDã®æå¤§å¤ï¼kernel_cfg.cï¼
+ */
+extern const ID	tmax_almid;
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const ALMINIB	alminib_table[];
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©ç®¡çãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern ALMCB	almcb_table[];
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©æ©è½ã®åæå
+ */
+extern void	initialize_alarm(void);
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©èµ·åã«ã¼ãã³
+ */
+extern void	call_almhdr(ALMCB *p_almcb);
+
+#endif /* TOPPERS_ALARM_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/allfunc.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/allfunc.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/allfunc.h	(revision 136)
@@ -0,0 +1,256 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2005-2008 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: allfunc.h 879 2008-04-11 10:38:16Z hiro $
+ */
+
+/*
+ *		ãã¹ã¦ã®é¢æ°ãã³ã³ãã¤ã«ããããã®å®ç¾©
+ */
+
+#ifndef TOPPERS_ALLFUNC_H
+#define TOPPERS_ALLFUNC_H
+
+/* startup.c */
+#define TOPPERS_sta_ker
+#define TOPPERS_ext_ker
+
+/* task.c */
+#define TOPPERS_tskini
+#define TOPPERS_tsksched
+#define TOPPERS_tskrun
+#define TOPPERS_tsknrun
+#define TOPPERS_tskdmt
+#define TOPPERS_tskact
+#define TOPPERS_tskpri
+#define TOPPERS_tskrot
+#define TOPPERS_tsktex
+
+/* wait.c */
+#define TOPPERS_waimake
+#define TOPPERS_waicmp
+#define TOPPERS_waitmo
+#define TOPPERS_waitmook
+#define TOPPERS_wairel
+#define TOPPERS_wobjwai
+#define TOPPERS_wobjwaitmo
+#define TOPPERS_iniwque
+
+/* time_event.c */
+#define TOPPERS_tmeini
+#define TOPPERS_tmeup
+#define TOPPERS_tmedown
+#define TOPPERS_tmeins
+#define TOPPERS_tmedel
+#define TOPPERS_tmeltim
+#define TOPPERS_sigtim
+
+/* task_manage.c */
+#define TOPPERS_act_tsk
+#define TOPPERS_iact_tsk
+#define TOPPERS_can_act
+#define TOPPERS_ext_tsk
+#define TOPPERS_ter_tsk
+#define TOPPERS_chg_pri
+#define TOPPERS_get_pri
+#define TOPPERS_get_inf
+
+/* task_refer.c */
+#define TOPPERS_ref_tsk
+
+/* task_sync.c */
+#define TOPPERS_slp_tsk
+#define TOPPERS_tslp_tsk
+#define TOPPERS_wup_tsk
+#define TOPPERS_iwup_tsk
+#define TOPPERS_can_wup
+#define TOPPERS_rel_wai
+#define TOPPERS_irel_wai
+#define TOPPERS_sus_tsk
+#define TOPPERS_rsm_tsk
+#define TOPPERS_dly_tsk
+
+/* task_except.c */
+#define TOPPERS_ras_tex
+#define TOPPERS_iras_tex
+#define TOPPERS_dis_tex
+#define TOPPERS_ena_tex
+#define TOPPERS_sns_tex
+#define TOPPERS_ref_tex
+
+/* semaphore.c */
+#define TOPPERS_semini
+#define TOPPERS_sig_sem
+#define TOPPERS_isig_sem
+#define TOPPERS_wai_sem
+#define TOPPERS_pol_sem
+#define TOPPERS_twai_sem
+#define TOPPERS_ini_sem
+#define TOPPERS_ref_sem
+
+/* eventflag.c */
+#define TOPPERS_flgini
+#define TOPPERS_flgcnd
+#define TOPPERS_set_flg
+#define TOPPERS_iset_flg
+#define TOPPERS_clr_flg
+#define TOPPERS_wai_flg
+#define TOPPERS_pol_flg
+#define TOPPERS_twai_flg
+#define TOPPERS_ini_flg
+#define TOPPERS_ref_flg
+
+/* dataqueue.c */
+#define TOPPERS_dtqini
+#define TOPPERS_dtqenq
+#define TOPPERS_dtqfenq
+#define TOPPERS_dtqdeq
+#define TOPPERS_dtqsnd
+#define TOPPERS_dtqfsnd
+#define TOPPERS_dtqrcv
+#define TOPPERS_snd_dtq
+#define TOPPERS_psnd_dtq
+#define TOPPERS_ipsnd_dtq
+#define TOPPERS_tsnd_dtq
+#define TOPPERS_fsnd_dtq
+#define TOPPERS_ifsnd_dtq
+#define TOPPERS_rcv_dtq
+#define TOPPERS_prcv_dtq
+#define TOPPERS_trcv_dtq
+#define TOPPERS_ini_dtq
+#define TOPPERS_ref_dtq
+
+/* pridataq.c */
+#define TOPPERS_pdqini
+#define TOPPERS_pdqenq
+#define TOPPERS_pdqdeq
+#define TOPPERS_pdqsnd
+#define TOPPERS_pdqrcv
+#define TOPPERS_snd_pdq
+#define TOPPERS_psnd_pdq
+#define TOPPERS_ipsnd_pdq
+#define TOPPERS_tsnd_pdq
+#define TOPPERS_rcv_pdq
+#define TOPPERS_prcv_pdq
+#define TOPPERS_trcv_pdq
+#define TOPPERS_ini_pdq
+#define TOPPERS_ref_pdq
+
+/* mailbox.c */
+#define TOPPERS_mbxini
+#define TOPPERS_snd_mbx
+#define TOPPERS_rcv_mbx
+#define TOPPERS_prcv_mbx
+#define TOPPERS_trcv_mbx
+#define TOPPERS_ini_mbx
+#define TOPPERS_ref_mbx
+
+/* mempfix.c */
+#define TOPPERS_mpfini
+#define TOPPERS_mpfget
+#define TOPPERS_get_mpf
+#define TOPPERS_pget_mpf
+#define TOPPERS_tget_mpf
+#define TOPPERS_rel_mpf
+#define TOPPERS_ini_mpf
+#define TOPPERS_ref_mpf
+
+/* time_manage.c */
+#define TOPPERS_get_tim
+#define TOPPERS_get_utm
+
+/* cyclic.c */
+#define TOPPERS_cycini
+#define TOPPERS_sta_cyc
+#define TOPPERS_stp_cyc
+#define TOPPERS_ref_cyc
+#define TOPPERS_cyccal
+
+/* alarm.c */
+#define TOPPERS_almini
+#define TOPPERS_sta_alm
+#define TOPPERS_ista_alm
+#define TOPPERS_stp_alm
+#define TOPPERS_istp_alm
+#define TOPPERS_ref_alm
+#define TOPPERS_almcal
+
+/* sys_manage.c */
+#define TOPPERS_rot_rdq
+#define TOPPERS_irot_rdq
+#define TOPPERS_get_tid
+#define TOPPERS_iget_tid
+#define TOPPERS_loc_cpu
+#define TOPPERS_iloc_cpu
+#define TOPPERS_unl_cpu
+#define TOPPERS_iunl_cpu
+#define TOPPERS_dis_dsp
+#define TOPPERS_ena_dsp
+#define TOPPERS_sns_ctx
+#define TOPPERS_sns_loc
+#define TOPPERS_sns_dsp
+#define TOPPERS_sns_dpn
+#define TOPPERS_sns_ker
+
+/* interrupt.c */
+#define TOPPERS_intini
+#define TOPPERS_dis_int
+#define TOPPERS_ena_int
+#define TOPPERS_chg_ipm
+#define TOPPERS_get_ipm
+
+/* exception.c */
+#define TOPPERS_excini
+#define TOPPERS_xsns_dpn
+#define TOPPERS_xsns_xpn
+
+#endif /* TOPPERS_ALLFUNC_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/check.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/check.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/check.h	(revision 136)
@@ -0,0 +1,304 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: check.h 2229 2011-08-14 08:42:37Z ertl-hiro $
+ */
+
+/*
+ *		ã¨ã©ã¼ãã§ãã¯ç¨ãã¯ã­
+ */
+
+#ifndef TOPPERS_CHECK_H
+#define TOPPERS_CHECK_H
+
+/*
+ *  åªå
+åº¦ã®ç¯å²ã®å¤å®
+ */
+#define VALID_TPRI(tpri)	(TMIN_TPRI <= (tpri) && (tpri) <= TMAX_TPRI)
+
+#ifndef VALID_INTPRI_CHGIPM
+#define VALID_INTPRI_CHGIPM(intpri) \
+				(TMIN_INTPRI <= (intpri) && (intpri) <= TIPM_ENAALL)
+#endif /* VALID_INTPRI_CHGIPM */
+
+/*
+ *  ã¿ã¹ã¯åªå
+åº¦ã®ãã§ãã¯ï¼E_PARï¼
+ */
+#define CHECK_TPRI(tpri) do {								\
+	if (!VALID_TPRI(tpri)) {								\
+		ercd = E_PAR;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_TPRI_INI(tpri) do {							\
+	if (!(VALID_TPRI(tpri) || (tpri) == TPRI_INI)) {		\
+		ercd = E_PAR;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_TPRI_SELF(tpri) do {							\
+	if (!(VALID_TPRI(tpri) || (tpri) == TPRI_SELF)) {		\
+		ercd = E_PAR;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  ã¿ã¤ã ã¢ã¦ãæå®å¤ã®ãã§ãã¯ï¼E_PARï¼
+ */
+#define CHECK_TMOUT(tmout) do {								\
+	if (!(TMO_FEVR <= (tmout))) {							\
+		ercd = E_PAR;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ã®ãã§ãã¯ï¼E_PARï¼
+ */
+#define CHECK_INTPRI_CHGIPM(intpri) do {					\
+	if (!VALID_INTPRI_CHGIPM(intpri)) {						\
+		ercd = E_PAR;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  å²è¾¼ã¿çªå·ã®ãã§ãã¯ï¼E_PARï¼
+ */
+#define CHECK_INTNO_DISINT(intno) do {						\
+	if (!VALID_INTNO_DISINT(intno)) {						\
+		ercd = E_PAR;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  ãã®ä»ã®ãã©ã¡ã¼ã¿ã¨ã©ã¼ã®ãã§ãã¯ï¼E_PARï¼
+ */
+#define CHECK_PAR(exp) do {									\
+	if (!(exp)) {											\
+		ercd = E_PAR;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  ãªãã¸ã§ã¯ãIDã®ç¯å²ã®å¤å®
+ */
+#define VALID_TSKID(tskid)	(TMIN_TSKID <= (tskid) && (tskid) <= tmax_tskid)
+#define VALID_SEMID(semid)	(TMIN_SEMID <= (semid) && (semid) <= tmax_semid)
+#define VALID_FLGID(flgid)	(TMIN_FLGID <= (flgid) && (flgid) <= tmax_flgid)
+#define VALID_DTQID(dtqid)	(TMIN_DTQID <= (dtqid) && (dtqid) <= tmax_dtqid)
+#define VALID_PDQID(pdqid)	(TMIN_PDQID <= (pdqid) && (pdqid) <= tmax_pdqid)
+#define VALID_MBXID(mbxid)	(TMIN_MBXID <= (mbxid) && (mbxid) <= tmax_mbxid)
+#define VALID_MPFID(mpfid)	(TMIN_MPFID <= (mpfid) && (mpfid) <= tmax_mpfid)
+#define VALID_CYCID(cycid)	(TMIN_CYCID <= (cycid) && (cycid) <= tmax_cycid)
+#define VALID_ALMID(almid)	(TMIN_ALMID <= (almid) && (almid) <= tmax_almid)
+
+/*
+ *  ãªãã¸ã§ã¯ãIDã®ãã§ãã¯ï¼E_IDï¼
+ */
+#define CHECK_TSKID(tskid) do {								\
+	if (!VALID_TSKID(tskid)) {								\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_TSKID_SELF(tskid) do {						\
+	if (!(VALID_TSKID(tskid) || (tskid) == TSK_SELF)) {		\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_SEMID(semid) do {								\
+	if (!VALID_SEMID(semid)) {								\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_FLGID(flgid) do {								\
+	if (!VALID_FLGID(flgid)) {								\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_DTQID(dtqid) do {								\
+	if (!VALID_DTQID(dtqid)) {								\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_PDQID(pdqid) do {								\
+	if (!VALID_PDQID(pdqid)) {								\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_MBXID(mbxid) do {								\
+	if (!VALID_MBXID(mbxid)) {								\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_MPFID(mpfid) do {								\
+	if (!VALID_MPFID(mpfid)) {								\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_CYCID(cycid) do {								\
+	if (!VALID_CYCID(cycid)) {								\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_ALMID(almid) do {								\
+	if (!VALID_ALMID(almid)) {								\
+		ercd = E_ID;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  å¼åºãã³ã³ãã­ã¹ãã®ãã§ãã¯ï¼E_CTXï¼
+ */
+#define CHECK_TSKCTX() do {									\
+	if (sense_context()) {									\
+		ercd = E_CTX;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_INTCTX() do {									\
+	if (!sense_context()) {									\
+		ercd = E_CTX;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  å¼åºãã³ã³ãã­ã¹ãã¨CPUã­ãã¯ç¶æ
+ã®ãã§ãã¯ï¼E_CTXï¼
+ */
+#define CHECK_TSKCTX_UNL() do {								\
+	if (sense_context() || t_sense_lock()) {				\
+		ercd = E_CTX;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#define CHECK_INTCTX_UNL() do {								\
+	if (!sense_context() || i_sense_lock()) {				\
+		ercd = E_CTX;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  ãã£ã¹ãããä¿çç¶æ
+ã§ãªããã®ãã§ãã¯ï¼E_CTXï¼
+ */
+#define CHECK_DISPATCH() do {								\
+	if (sense_context() || t_sense_lock() || !dspflg) {		\
+		ercd = E_CTX;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  ãã®ä»ã®ã³ã³ãã­ã¹ãã¨ã©ã¼ã®ãã§ãã¯ï¼E_CTXï¼
+ */
+#define CHECK_CTX(exp) do {									\
+	if (!(exp)) {											\
+		ercd = E_CTX;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  èªã¿ã¹ã¯ãæå®ãã¦ããªããã®ãã§ãã¯ï¼E_ILUSEï¼
+ */
+#define CHECK_NONSELF(p_tcb) do {							\
+	if ((p_tcb) == p_runtsk) {								\
+		ercd = E_ILUSE;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+/*
+ *  ãã®ä»ã®ä¸æ­£ä½¿ç¨ã¨ã©ã¼ã®ãã§ãã¯ï¼E_ILUSEï¼
+ */
+#define CHECK_ILUSE(exp) do {								\
+	if (!(exp)) {											\
+		ercd = E_ILUSE;										\
+		goto error_exit;									\
+	}														\
+} while (false)
+
+#endif /* TOPPERS_CHECK_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/cyclic.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/cyclic.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/cyclic.c	(revision 136)
@@ -0,0 +1,286 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: cyclic.c 2133 2011-06-26 03:14:51Z ertl-hiro $
+ */
+
+/*
+ *		å¨æãã³ãã©æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "cyclic.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_CYC_ENTER
+#define LOG_CYC_ENTER(p_cyccb)
+#endif /* LOG_CYC_ENTER */
+
+#ifndef LOG_CYC_LEAVE
+#define LOG_CYC_LEAVE(p_cyccb)
+#endif /* LOG_CYC_LEAVE */
+
+#ifndef LOG_STA_CYC_ENTER
+#define LOG_STA_CYC_ENTER(cycid)
+#endif /* LOG_STA_CYC_ENTER */
+
+#ifndef LOG_STA_CYC_LEAVE
+#define LOG_STA_CYC_LEAVE(ercd)
+#endif /* LOG_STA_CYC_LEAVE */
+
+#ifndef LOG_STP_CYC_ENTER
+#define LOG_STP_CYC_ENTER(cycid)
+#endif /* LOG_STP_CYC_ENTER */
+
+#ifndef LOG_STP_CYC_LEAVE
+#define LOG_STP_CYC_LEAVE(ercd)
+#endif /* LOG_STP_CYC_LEAVE */
+
+#ifndef LOG_REF_CYC_ENTER
+#define LOG_REF_CYC_ENTER(cycid, pk_rcyc)
+#endif /* LOG_REF_CYC_ENTER */
+
+#ifndef LOG_REF_CYC_LEAVE
+#define LOG_REF_CYC_LEAVE(ercd, pk_rcyc)
+#endif /* LOG_REF_CYC_LEAVE */
+
+/*
+ *  å¨æãã³ãã©ã®æ°
+ */
+#define tnum_cyc	((uint_t)(tmax_cycid - TMIN_CYCID + 1))
+
+/*
+ *  å¨æãã³ãã©IDããå¨æãã³ãã©ç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_CYC(cycid)	((uint_t)((cycid) - TMIN_CYCID))
+#define get_cyccb(cycid)	(&(cyccb_table[INDEX_CYC(cycid)]))
+
+/*
+ *  å¨æãã³ãã©èµ·åã®ããã®ã¿ã¤ã ã¤ãã³ããã­ãã¯ã®ç»é²
+ */
+Inline void
+tmevtb_enqueue_cyc(CYCCB *p_cyccb, EVTTIM evttim)
+{
+	tmevtb_enqueue_evttim(&(p_cyccb->tmevtb), evttim,
+								(CBACK) call_cychdr, (void *) p_cyccb);
+	p_cyccb->evttim = evttim;
+}
+
+/*
+ *  å¨æãã³ãã©æ©è½ã®åæå
+ */
+#ifdef TOPPERS_cycini
+
+void
+initialize_cyclic(void)
+{
+	uint_t	i;
+	CYCCB	*p_cyccb;
+
+	for (i = 0; i < tnum_cyc; i++) {
+		p_cyccb = &(cyccb_table[i]);
+		p_cyccb->p_cycinib = &(cycinib_table[i]);
+		if ((p_cyccb->p_cycinib->cycatr & TA_STA) != 0U) {
+			p_cyccb->cycsta = true;
+			tmevtb_enqueue_cyc(p_cyccb, (EVTTIM)(p_cyccb->p_cycinib->cycphs));
+		}
+		else {
+			p_cyccb->cycsta = false;
+		}
+	}
+}
+
+#endif /* TOPPERS_cycini */
+
+/*
+ *  å¨æãã³ãã©ã®åä½éå§
+ */
+#ifdef TOPPERS_sta_cyc
+
+ER
+sta_cyc(ID cycid)
+{
+	CYCCB	*p_cyccb;
+	ER		ercd;
+
+	LOG_STA_CYC_ENTER(cycid);
+	CHECK_TSKCTX_UNL();
+	CHECK_CYCID(cycid);
+	p_cyccb = get_cyccb(cycid);
+
+	t_lock_cpu();
+	if (p_cyccb->cycsta) {
+		tmevtb_dequeue(&(p_cyccb->tmevtb));
+	}
+	else {
+		p_cyccb->cycsta = true;
+	}
+	tmevtb_enqueue_cyc(p_cyccb, base_time + p_cyccb->p_cycinib->cycphs);
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_STA_CYC_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_sta_cyc */
+
+/*
+ *  å¨æãã³ãã©ã®åä½åæ­¢
+ */
+#ifdef TOPPERS_stp_cyc
+
+ER
+stp_cyc(ID cycid)
+{
+	CYCCB	*p_cyccb;
+	ER		ercd;
+
+	LOG_STP_CYC_ENTER(cycid);
+	CHECK_TSKCTX_UNL();
+	CHECK_CYCID(cycid);
+	p_cyccb = get_cyccb(cycid);
+
+	t_lock_cpu();
+	if (p_cyccb->cycsta) {
+		p_cyccb->cycsta = false;
+		tmevtb_dequeue(&(p_cyccb->tmevtb));
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_STP_CYC_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_stp_cyc */
+
+/*
+ *  å¨æãã³ãã©ã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_cyc
+
+ER
+ref_cyc(ID cycid, T_RCYC *pk_rcyc)
+{
+	CYCCB	*p_cyccb;
+	ER		ercd;
+    
+	LOG_REF_CYC_ENTER(cycid, pk_rcyc);
+	CHECK_TSKCTX_UNL();
+	CHECK_CYCID(cycid);
+	p_cyccb = get_cyccb(cycid);
+
+	t_lock_cpu();
+	if (p_cyccb->cycsta) {
+		pk_rcyc->cycstat = TCYC_STA;
+		pk_rcyc->lefttim = tmevt_lefttim(&(p_cyccb->tmevtb));
+	}
+	else {
+		pk_rcyc->cycstat = TCYC_STP;
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_CYC_LEAVE(ercd, pk_rcyc);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_cyc */
+
+/*
+ *  å¨æãã³ãã©èµ·åã«ã¼ãã³
+ */
+#ifdef TOPPERS_cyccal
+
+void
+call_cychdr(CYCCB *p_cyccb)
+{
+	PRI		saved_ipm;
+
+	/*
+	 *  æ¬¡åã®èµ·åã®ããã®ã¿ã¤ã ã¤ãã³ããã­ãã¯ãç»é²ããï¼
+	 *
+	 *  åãã¿ã¤ã ãã£ãã¯ã§å¨æãã³ãã©ãååº¦èµ·åãã¹ãå ´åã«ã¯ï¼ãã®
+	 *  é¢æ°ããsignal_timeã«æ»ã£ãå¾ã«ï¼ååº¦ãã®é¢æ°ãå¼ã°ãããã¨ã«ãª
+	 *  ãï¼
+	 */
+	tmevtb_enqueue_cyc(p_cyccb, p_cyccb->evttim + p_cyccb->p_cycinib->cyctim);
+
+	/*
+	 *  å¨æãã³ãã©ãï¼CPUã­ãã¯è§£é¤ç¶æ
+ã§å¼ã³åºãï¼
+	 */
+	saved_ipm = i_get_ipm();
+	i_unlock_cpu();
+
+	LOG_CYC_ENTER(p_cyccb);
+	(*((CYCHDR)(p_cyccb->p_cycinib->cychdr)))(p_cyccb->p_cycinib->exinf);
+	LOG_CYC_LEAVE(p_cyccb);
+
+	if (!i_sense_lock()) {
+		i_lock_cpu();
+	}
+	i_set_ipm(saved_ipm);
+}
+
+#endif /* TOPPERS_cyccal */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/cyclic.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/cyclic.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/cyclic.h	(revision 136)
@@ -0,0 +1,115 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005,2006 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: cyclic.h 748 2008-03-07 17:18:06Z hiro $
+ */
+
+/*
+ *		å¨æãã³ãã©æ©è½
+ */
+
+#ifndef TOPPERS_CYCLIC_H
+#define TOPPERS_CYCLIC_H
+
+#include "time_event.h"
+
+/*
+ *  å¨æãã³ãã©åæåãã­ãã¯
+ */
+typedef struct cyclic_handler_initialization_block {
+	ATR			cycatr;			/* å¨æãã³ãã©å±æ§ */
+	intptr_t	exinf;			/* å¨æãã³ãã©ã®æ¡å¼µæ
+å ± */
+	CYCHDR		cychdr;			/* å¨æãã³ãã©ã®èµ·åçªå° */
+	RELTIM		cyctim;			/* å¨æãã³ãã©ã®èµ·åå¨æ */
+	RELTIM		cycphs;			/* å¨æãã³ãã©ã®èµ·åä½ç¸ */
+} CYCINIB;
+
+/*
+ *  å¨æãã³ãã©ç®¡çãã­ãã¯
+ */
+typedef struct cyclic_handler_control_block {
+	const CYCINIB *p_cycinib;	/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+	bool_t		cycsta;			/* å¨æãã³ãã©ã®åä½ç¶æ
+ */
+	EVTTIM		evttim;			/* æ¬¡ã«å¨æãã³ãã©ãèµ·åããæå» */
+	TMEVTB		tmevtb;			/* ã¿ã¤ã ã¤ãã³ããã­ãã¯ */
+} CYCCB;
+
+/*
+ *  å¨æãã³ãã©IDã®æå¤§å¤ï¼kernel_cfg.cï¼
+ */
+extern const ID	tmax_cycid;
+
+/*
+ *  å¨æãã³ãã©åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const CYCINIB	cycinib_table[];
+
+/*
+ *  å¨æãã³ãã©ç®¡çãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern CYCCB	cyccb_table[];
+
+/*
+ *  å¨æãã³ãã©æ©è½ã®åæå
+ */
+extern void	initialize_cyclic(void);
+
+/*
+ *  å¨æãã³ãã©èµ·åã«ã¼ãã³
+ */
+extern void	call_cychdr(CYCCB *p_cyccb);
+
+#endif /* TOPPERS_CYCLIC_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/dataqueue.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/dataqueue.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/dataqueue.c	(revision 136)
@@ -0,0 +1,764 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: dataqueue.c 2629 2014-04-13 09:38:28Z ertl-hiro $
+ */
+
+/*
+ *		ãã¼ã¿ã­ã¥ã¼æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "wait.h"
+#include "dataqueue.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_SND_DTQ_ENTER
+#define LOG_SND_DTQ_ENTER(dtqid, data)
+#endif /* LOG_SND_DTQ_ENTER */
+
+#ifndef LOG_SND_DTQ_LEAVE
+#define LOG_SND_DTQ_LEAVE(ercd)
+#endif /* LOG_SND_DTQ_LEAVE */
+
+#ifndef LOG_PSND_DTQ_ENTER
+#define LOG_PSND_DTQ_ENTER(dtqid, data)
+#endif /* LOG_PSND_DTQ_ENTER */
+
+#ifndef LOG_PSND_DTQ_LEAVE
+#define LOG_PSND_DTQ_LEAVE(ercd)
+#endif /* LOG_PSND_DTQ_LEAVE */
+
+#ifndef LOG_IPSND_DTQ_ENTER
+#define LOG_IPSND_DTQ_ENTER(dtqid, data)
+#endif /* LOG_IPSND_DTQ_ENTER */
+
+#ifndef LOG_IPSND_DTQ_LEAVE
+#define LOG_IPSND_DTQ_LEAVE(ercd)
+#endif /* LOG_IPSND_DTQ_LEAVE */
+
+#ifndef LOG_TSND_DTQ_ENTER
+#define LOG_TSND_DTQ_ENTER(dtqid, data, tmout)
+#endif /* LOG_TSND_DTQ_ENTER */
+
+#ifndef LOG_TSND_DTQ_LEAVE
+#define LOG_TSND_DTQ_LEAVE(ercd)
+#endif /* LOG_TSND_DTQ_LEAVE */
+
+#ifndef LOG_FSND_DTQ_ENTER
+#define LOG_FSND_DTQ_ENTER(dtqid, data)
+#endif /* LOG_FSND_DTQ_ENTER */
+
+#ifndef LOG_FSND_DTQ_LEAVE
+#define LOG_FSND_DTQ_LEAVE(ercd)
+#endif /* LOG_FSND_DTQ_LEAVE */
+
+#ifndef LOG_IFSND_DTQ_ENTER
+#define LOG_IFSND_DTQ_ENTER(dtqid, data)
+#endif /* LOG_IFSND_DTQ_ENTER */
+
+#ifndef LOG_IFSND_DTQ_LEAVE
+#define LOG_IFSND_DTQ_LEAVE(ercd)
+#endif /* LOG_IFSND_DTQ_LEAVE */
+
+#ifndef LOG_RCV_DTQ_ENTER
+#define LOG_RCV_DTQ_ENTER(dtqid, p_data)
+#endif /* LOG_RCV_DTQ_ENTER */
+
+#ifndef LOG_RCV_DTQ_LEAVE
+#define LOG_RCV_DTQ_LEAVE(ercd, data)
+#endif /* LOG_RCV_DTQ_LEAVE */
+
+#ifndef LOG_PRCV_DTQ_ENTER
+#define LOG_PRCV_DTQ_ENTER(dtqid, p_data)
+#endif /* LOG_PRCV_DTQ_ENTER */
+
+#ifndef LOG_PRCV_DTQ_LEAVE
+#define LOG_PRCV_DTQ_LEAVE(ercd, data)
+#endif /* LOG_PRCV_DTQ_LEAVE */
+
+#ifndef LOG_TRCV_DTQ_ENTER
+#define LOG_TRCV_DTQ_ENTER(dtqid, p_data, tmout)
+#endif /* LOG_TRCV_DTQ_ENTER */
+
+#ifndef LOG_TRCV_DTQ_LEAVE
+#define LOG_TRCV_DTQ_LEAVE(ercd, data)
+#endif /* LOG_TRCV_DTQ_LEAVE */
+
+#ifndef LOG_INI_DTQ_ENTER
+#define LOG_INI_DTQ_ENTER(dtqid)
+#endif /* LOG_INI_DTQ_ENTER */
+
+#ifndef LOG_INI_DTQ_LEAVE
+#define LOG_INI_DTQ_LEAVE(ercd)
+#endif /* LOG_INI_DTQ_LEAVE */
+
+#ifndef LOG_REF_DTQ_ENTER
+#define LOG_REF_DTQ_ENTER(dtqid, pk_rdtq)
+#endif /* LOG_REF_DTQ_ENTER */
+
+#ifndef LOG_REF_DTQ_LEAVE
+#define LOG_REF_DTQ_LEAVE(ercd, pk_rdtq)
+#endif /* LOG_REF_DTQ_LEAVE */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã®æ°
+ */
+#define tnum_dtq	((uint_t)(tmax_dtqid - TMIN_DTQID + 1))
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼IDãããã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_DTQ(dtqid)	((uint_t)((dtqid) - TMIN_DTQID))
+#define get_dtqcb(dtqid)	(&(dtqcb_table[INDEX_DTQ(dtqid)]))
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼æ©è½ã®åæå
+ */
+#ifdef TOPPERS_dtqini
+
+void
+initialize_dataqueue(void)
+{
+	uint_t	i;
+	DTQCB	*p_dtqcb;
+
+	for (i = 0; i < tnum_dtq; i++) {
+		p_dtqcb = &(dtqcb_table[i]);
+		queue_initialize(&(p_dtqcb->swait_queue));
+		p_dtqcb->p_dtqinib = &(dtqinib_table[i]);
+		queue_initialize(&(p_dtqcb->rwait_queue));
+		p_dtqcb->count = 0U;
+		p_dtqcb->head = 0U;
+		p_dtqcb->tail = 0U;
+	}
+}
+
+#endif /* TOPPERS_dtqini */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ç®¡çé åã¸ã®ãã¼ã¿ã®æ ¼ç´
+ */
+#ifdef TOPPERS_dtqenq
+
+void
+enqueue_data(DTQCB *p_dtqcb, intptr_t data)
+{
+	(p_dtqcb->p_dtqinib->p_dtqmb + p_dtqcb->tail)->data = data;
+	p_dtqcb->count++;
+	p_dtqcb->tail++;
+	if (p_dtqcb->tail >= p_dtqcb->p_dtqinib->dtqcnt) {
+		p_dtqcb->tail = 0U;
+	}
+}
+
+#endif /* TOPPERS_dtqenq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ç®¡çé åã¸ã®ãã¼ã¿ã®å¼·å¶æ ¼ç´
+ */
+#ifdef TOPPERS_dtqfenq
+
+void
+force_enqueue_data(DTQCB *p_dtqcb, intptr_t data)
+{
+	(p_dtqcb->p_dtqinib->p_dtqmb + p_dtqcb->tail)->data = data;
+	p_dtqcb->tail++;
+	if (p_dtqcb->tail >= p_dtqcb->p_dtqinib->dtqcnt) {
+		p_dtqcb->tail = 0U;
+	}
+	if (p_dtqcb->count < p_dtqcb->p_dtqinib->dtqcnt) {
+		p_dtqcb->count++;
+	}
+	else {
+		p_dtqcb->head = p_dtqcb->tail;
+	}
+}
+
+#endif /* TOPPERS_dtqfenq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ç®¡çé åããã®ãã¼ã¿ã®ååºã
+ */
+#ifdef TOPPERS_dtqdeq
+
+void
+dequeue_data(DTQCB *p_dtqcb, intptr_t *p_data)
+{
+	*p_data = (p_dtqcb->p_dtqinib->p_dtqmb + p_dtqcb->head)->data;
+	p_dtqcb->count--;
+	p_dtqcb->head++;
+	if (p_dtqcb->head >= p_dtqcb->p_dtqinib->dtqcnt) {
+		p_dtqcb->head = 0U;
+	}
+}
+
+#endif /* TOPPERS_dtqdeq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®ãã¼ã¿éä¿¡
+ */
+#ifdef TOPPERS_dtqsnd
+
+bool_t
+send_data(DTQCB *p_dtqcb, intptr_t data, bool_t *p_dspreq)
+{
+	TCB		*p_tcb;
+
+	if (!queue_empty(&(p_dtqcb->rwait_queue))) {
+		p_tcb = (TCB *) queue_delete_next(&(p_dtqcb->rwait_queue));
+		((WINFO_DTQ *)(p_tcb->p_winfo))->data = data;
+		*p_dspreq = wait_complete(p_tcb);
+		return(true);
+	}
+	else if (p_dtqcb->count < p_dtqcb->p_dtqinib->dtqcnt) {
+		enqueue_data(p_dtqcb, data);
+		*p_dspreq = false;
+		return(true);
+	}
+	else {
+		return(false);
+	}
+}
+
+#endif /* TOPPERS_dtqsnd */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®ãã¼ã¿å¼·å¶éä¿¡
+ */
+#ifdef TOPPERS_dtqfsnd
+
+bool_t
+force_send_data(DTQCB *p_dtqcb, intptr_t data)
+{
+	TCB		*p_tcb;
+
+	if (!queue_empty(&(p_dtqcb->rwait_queue))) {
+		p_tcb = (TCB *) queue_delete_next(&(p_dtqcb->rwait_queue));
+		((WINFO_DTQ *)(p_tcb->p_winfo))->data = data;
+		return(wait_complete(p_tcb));
+	}
+	else {
+		force_enqueue_data(p_dtqcb, data);
+		return(false);
+	}
+}
+
+#endif /* TOPPERS_dtqfsnd */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ããã®ãã¼ã¿åä¿¡
+ */
+#ifdef TOPPERS_dtqrcv
+
+bool_t
+receive_data(DTQCB *p_dtqcb, intptr_t *p_data, bool_t *p_dspreq)
+{
+	TCB		*p_tcb;
+	intptr_t data;
+
+	if (p_dtqcb->count > 0U) {
+		dequeue_data(p_dtqcb, p_data);
+		if (!queue_empty(&(p_dtqcb->swait_queue))) {
+			p_tcb = (TCB *) queue_delete_next(&(p_dtqcb->swait_queue));
+			data = ((WINFO_DTQ *)(p_tcb->p_winfo))->data;
+			enqueue_data(p_dtqcb, data);
+			*p_dspreq = wait_complete(p_tcb);
+		}
+		else {
+			*p_dspreq = false;
+		}
+		return(true);
+	}
+	else if (!queue_empty(&(p_dtqcb->swait_queue))) {
+		p_tcb = (TCB *) queue_delete_next(&(p_dtqcb->swait_queue));
+		*p_data = ((WINFO_DTQ *)(p_tcb->p_winfo))->data;
+		*p_dspreq = wait_complete(p_tcb);
+		return(true);
+	}
+	else {
+		return(false);
+	}
+}
+
+#endif /* TOPPERS_dtqrcv */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡
+ */
+#ifdef TOPPERS_snd_dtq
+
+ER
+snd_dtq(ID dtqid, intptr_t data)
+{
+	DTQCB	*p_dtqcb;
+	WINFO_DTQ winfo_dtq;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_SND_DTQ_ENTER(dtqid, data);
+	CHECK_DISPATCH();
+	CHECK_DTQID(dtqid);
+	p_dtqcb = get_dtqcb(dtqid);
+
+	t_lock_cpu();
+	if (send_data(p_dtqcb, data, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		winfo_dtq.data = data;
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_SDTQ);
+		wobj_make_wait((WOBJCB *) p_dtqcb, (WINFO_WOBJ *) &winfo_dtq);
+		dispatch();
+		ercd = winfo_dtq.winfo.wercd;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_SND_DTQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_snd_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡ï¼ãã¼ãªã³ã°ï¼
+ */
+#ifdef TOPPERS_psnd_dtq
+
+ER
+psnd_dtq(ID dtqid, intptr_t data)
+{
+	DTQCB	*p_dtqcb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_PSND_DTQ_ENTER(dtqid, data);
+	CHECK_TSKCTX_UNL();
+	CHECK_DTQID(dtqid);
+	p_dtqcb = get_dtqcb(dtqid);
+
+	t_lock_cpu();
+	if (send_data(p_dtqcb, data, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_PSND_DTQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_psnd_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡ï¼ãã¼ãªã³ã°ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_ipsnd_dtq
+
+ER
+ipsnd_dtq(ID dtqid, intptr_t data)
+{
+	DTQCB	*p_dtqcb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_IPSND_DTQ_ENTER(dtqid, data);
+	CHECK_INTCTX_UNL();
+	CHECK_DTQID(dtqid);
+	p_dtqcb = get_dtqcb(dtqid);
+
+	i_lock_cpu();
+	if (send_data(p_dtqcb, data, &dspreq)) {
+		if (dspreq) {
+			reqflg = true;
+		}
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_IPSND_DTQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ipsnd_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡ï¼ã¿ã¤ã ã¢ã¦ãããï¼
+ */
+#ifdef TOPPERS_tsnd_dtq
+
+ER
+tsnd_dtq(ID dtqid, intptr_t data, TMO tmout)
+{
+	DTQCB	*p_dtqcb;
+	WINFO_DTQ winfo_dtq;
+	TMEVTB	tmevtb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_TSND_DTQ_ENTER(dtqid, data, tmout);
+	CHECK_DISPATCH();
+	CHECK_DTQID(dtqid);
+	CHECK_TMOUT(tmout);
+	p_dtqcb = get_dtqcb(dtqid);
+
+	t_lock_cpu();
+	if (send_data(p_dtqcb, data, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else if (tmout == TMO_POL) {
+		ercd = E_TMOUT;
+	}
+	else {
+		winfo_dtq.data = data;
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_SDTQ);
+		wobj_make_wait_tmout((WOBJCB *) p_dtqcb, (WINFO_WOBJ *) &winfo_dtq,
+														&tmevtb, tmout);
+		dispatch();
+		ercd = winfo_dtq.winfo.wercd;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TSND_DTQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_tsnd_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®å¼·å¶éä¿¡
+ */
+#ifdef TOPPERS_fsnd_dtq
+
+ER
+fsnd_dtq(ID dtqid, intptr_t data)
+{
+	DTQCB	*p_dtqcb;	
+	ER		ercd;
+
+	LOG_FSND_DTQ_ENTER(dtqid, data);
+	CHECK_TSKCTX_UNL();
+	CHECK_DTQID(dtqid);
+	p_dtqcb = get_dtqcb(dtqid);
+	CHECK_ILUSE(p_dtqcb->p_dtqinib->dtqcnt > 0U);
+
+	t_lock_cpu();
+	if (force_send_data(p_dtqcb, data)) {
+		dispatch();
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_FSND_DTQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_fsnd_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®å¼·å¶éä¿¡ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_ifsnd_dtq
+
+ER
+ifsnd_dtq(ID dtqid, intptr_t data)
+{
+	DTQCB	*p_dtqcb;
+	ER		ercd;
+
+	LOG_IFSND_DTQ_ENTER(dtqid, data);
+	CHECK_INTCTX_UNL();
+	CHECK_DTQID(dtqid);
+	p_dtqcb = get_dtqcb(dtqid);
+	CHECK_ILUSE(p_dtqcb->p_dtqinib->dtqcnt > 0U);
+
+	i_lock_cpu();
+	if (force_send_data(p_dtqcb, data)) {
+		reqflg = true;
+	}
+	ercd = E_OK;
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_IFSND_DTQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ifsnd_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡
+ */
+#ifdef TOPPERS_rcv_dtq
+
+ER
+rcv_dtq(ID dtqid, intptr_t *p_data)
+{
+	DTQCB	*p_dtqcb;
+	WINFO_DTQ winfo_dtq;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_RCV_DTQ_ENTER(dtqid, p_data);
+	CHECK_DISPATCH();
+	CHECK_DTQID(dtqid);
+	p_dtqcb = get_dtqcb(dtqid);
+
+	t_lock_cpu();
+	if (receive_data(p_dtqcb, p_data, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_RDTQ);
+		make_wait(&(winfo_dtq.winfo));
+		queue_insert_prev(&(p_dtqcb->rwait_queue), &(p_runtsk->task_queue));
+		winfo_dtq.p_dtqcb = p_dtqcb;
+		LOG_TSKSTAT(p_runtsk);
+		dispatch();
+		ercd = winfo_dtq.winfo.wercd;
+		if (ercd == E_OK) {
+			*p_data = winfo_dtq.data;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_RCV_DTQ_LEAVE(ercd, *p_data);
+	return(ercd);
+}
+
+#endif /* TOPPERS_rcv_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡ï¼ãã¼ãªã³ã°ï¼
+ */
+#ifdef TOPPERS_prcv_dtq
+
+ER
+prcv_dtq(ID dtqid, intptr_t *p_data)
+{
+	DTQCB	*p_dtqcb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_PRCV_DTQ_ENTER(dtqid, p_data);
+	CHECK_TSKCTX_UNL();
+	CHECK_DTQID(dtqid);
+	p_dtqcb = get_dtqcb(dtqid);
+
+	t_lock_cpu();
+	if (receive_data(p_dtqcb, p_data, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_PRCV_DTQ_LEAVE(ercd, *p_data);
+	return(ercd);
+}
+
+#endif /* TOPPERS_prcv_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡ï¼ã¿ã¤ã ã¢ã¦ãããï¼
+ */
+#ifdef TOPPERS_trcv_dtq
+
+ER
+trcv_dtq(ID dtqid, intptr_t *p_data, TMO tmout)
+{
+	DTQCB	*p_dtqcb;
+	WINFO_DTQ winfo_dtq;
+	TMEVTB	tmevtb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_TRCV_DTQ_ENTER(dtqid, p_data, tmout);
+	CHECK_DISPATCH();
+	CHECK_DTQID(dtqid);
+	CHECK_TMOUT(tmout);
+	p_dtqcb = get_dtqcb(dtqid);
+
+	t_lock_cpu();
+	if (receive_data(p_dtqcb, p_data, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else if (tmout == TMO_POL) {
+		ercd = E_TMOUT;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_RDTQ);
+		make_wait_tmout(&(winfo_dtq.winfo), &tmevtb, tmout);
+		queue_insert_prev(&(p_dtqcb->rwait_queue), &(p_runtsk->task_queue));
+		winfo_dtq.p_dtqcb = p_dtqcb;
+		LOG_TSKSTAT(p_runtsk);
+		dispatch();
+		ercd = winfo_dtq.winfo.wercd;
+		if (ercd == E_OK) {
+			*p_data = winfo_dtq.data;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TRCV_DTQ_LEAVE(ercd, *p_data);
+	return(ercd);
+}
+
+#endif /* TOPPERS_trcv_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã®ååæå
+ */
+#ifdef TOPPERS_ini_dtq
+
+ER
+ini_dtq(ID dtqid)
+{
+	DTQCB	*p_dtqcb;
+	bool_t	dspreq;
+	ER		ercd;
+    
+	LOG_INI_DTQ_ENTER(dtqid);
+	CHECK_TSKCTX_UNL();
+	CHECK_DTQID(dtqid);
+	p_dtqcb = get_dtqcb(dtqid);
+
+	t_lock_cpu();
+	dspreq = init_wait_queue(&(p_dtqcb->swait_queue));
+	if (init_wait_queue(&(p_dtqcb->rwait_queue))) {
+		dspreq = true;
+	}
+	p_dtqcb->count = 0U;
+	p_dtqcb->head = 0U;
+	p_dtqcb->tail = 0U;
+	if (dspreq) {
+		dispatch();
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_INI_DTQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ini_dtq */
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_dtq
+
+ER
+ref_dtq(ID dtqid, T_RDTQ *pk_rdtq)
+{
+	DTQCB	*p_dtqcb;
+	ER		ercd;
+    
+	LOG_REF_DTQ_ENTER(dtqid, pk_rdtq);
+	CHECK_TSKCTX_UNL();
+	CHECK_DTQID(dtqid);
+	p_dtqcb = get_dtqcb(dtqid);
+
+	t_lock_cpu();
+	pk_rdtq->stskid = wait_tskid(&(p_dtqcb->swait_queue));
+	pk_rdtq->rtskid = wait_tskid(&(p_dtqcb->rwait_queue));
+	pk_rdtq->sdtqcnt = p_dtqcb->count;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_DTQ_LEAVE(ercd, pk_rdtq);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_dtq */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/dataqueue.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/dataqueue.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/dataqueue.h	(revision 136)
@@ -0,0 +1,194 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: dataqueue.h 2515 2013-06-12 11:56:59Z ertl-hiro $
+ */
+
+/*
+ *		ãã¼ã¿ã­ã¥ã¼æ©è½
+ */
+
+#ifndef TOPPERS_DATAQUEUE_H
+#define TOPPERS_DATAQUEUE_H
+
+#include "wait.h"
+
+/*
+ *  ãã¼ã¿ç®¡çãã­ãã¯
+ */
+typedef struct data_management_block {
+	intptr_t	data;			/* ãã¼ã¿æ¬ä½ */
+} DTQMB;
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼åæåãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WOBJINIBï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct dataqueue_initialization_block {
+	ATR			dtqatr;			/* ãã¼ã¿ã­ã¥ã¼å±æ§ */
+	uint_t		dtqcnt;			/* ãã¼ã¿ã­ã¥ã¼ã®å®¹é */
+	DTQMB		*p_dtqmb;		/* ãã¼ã¿ã­ã¥ã¼ç®¡çé åã®å
+é ­çªå° */
+} DTQINIB;
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã®å
+±éé¨åï¼WOBJCBï¼
+ *  ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼æåã®2ã¤ã®
+ *  ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct dataqueue_control_block {
+	QUEUE		swait_queue;	/* ãã¼ã¿ã­ã¥ã¼éä¿¡å¾
+ã¡ã­ã¥ã¼ */
+	const DTQINIB *p_dtqinib;	/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+	QUEUE		rwait_queue;	/* ãã¼ã¿ã­ã¥ã¼åä¿¡å¾
+ã¡ã­ã¥ã¼ */
+	uint_t		count;			/* ãã¼ã¿ã­ã¥ã¼ä¸­ã®ãã¼ã¿ã®æ° */
+	uint_t		head;			/* æåã®ãã¼ã¿ã®æ ¼ç´å ´æ */
+	uint_t		tail;			/* æå¾ã®ãã¼ã¿ã®æ ¼ç´å ´æã®æ¬¡ */
+} DTQCB;
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼å¾
+ã¡æ
+å ±ãã­ãã¯ã®å®ç¾©
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡æ
+å ±ãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WINFO_WOBJï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®2ã¤ã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡å¾
+ã¡ã¨ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡å¾
+ã¡ã§ï¼åãå¾
+ã¡æ
+
+ *  å ±ãã­ãã¯ãä½¿ãï¼
+ */
+typedef struct dataqueue_waiting_information {
+	WINFO		winfo;			/* æ¨æºã®å¾
+ã¡æ
+å ±ãã­ãã¯ */
+	DTQCB		*p_dtqcb;		/* å¾
+ã£ã¦ãããã¼ã¿ã­ã¥ã¼ã®ç®¡çãã­ãã¯ */
+	intptr_t	data;			/* éåä¿¡ãã¼ã¿ */
+} WINFO_DTQ;
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼IDã®æå¤§å¤ï¼kernel_cfg.cï¼
+ */
+extern const ID	tmax_dtqid;
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const DTQINIB	dtqinib_table[];
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern DTQCB	dtqcb_table[];
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯ãããã¼ã¿ã­ã¥ã¼IDãåãåºãããã®ãã¯ã­
+ */
+#define	DTQID(p_dtqcb)	((ID)(((p_dtqcb) - dtqcb_table) + TMIN_DTQID))
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼æ©è½ã®åæå
+ */
+extern void	initialize_dataqueue(void);
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ç®¡çé åã¸ã®ãã¼ã¿ã®æ ¼ç´
+ */
+extern void	enqueue_data(DTQCB *p_dtqcb, intptr_t data);
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ç®¡çé åã¸ã®ãã¼ã¿ã®å¼·å¶æ ¼ç´
+ */
+extern void	force_enqueue_data(DTQCB *p_dtqcb, intptr_t data);
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ç®¡çé åããã®ãã¼ã¿ã®ååºã
+ */
+extern void	dequeue_data(DTQCB *p_dtqcb, intptr_t *p_data);
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®ãã¼ã¿éä¿¡
+ */
+extern bool_t	send_data(DTQCB *p_dtqcb, intptr_t data, bool_t *p_dspreq);
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ã¸ã®ãã¼ã¿å¼·å¶éä¿¡
+ */
+extern bool_t	force_send_data(DTQCB *p_dtqcb, intptr_t data);
+
+/*
+ *  ãã¼ã¿ã­ã¥ã¼ããã®ãã¼ã¿åä¿¡
+ */
+extern bool_t	receive_data(DTQCB *p_dtqcb, intptr_t *p_data,
+													bool_t *p_dspreq);
+
+#endif /* TOPPERS_DATAQUEUE_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/eventflag.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/eventflag.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/eventflag.c	(revision 136)
@@ -0,0 +1,518 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: eventflag.c 2133 2011-06-26 03:14:51Z ertl-hiro $
+ */
+
+/*
+ *		ã¤ãã³ããã©ã°æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "wait.h"
+#include "eventflag.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_SET_FLG_ENTER
+#define LOG_SET_FLG_ENTER(flgid, setptn)
+#endif /* LOG_SET_FLG_ENTER */
+
+#ifndef LOG_SET_FLG_LEAVE
+#define LOG_SET_FLG_LEAVE(ercd)
+#endif /* LOG_SET_FLG_LEAVE */
+
+#ifndef LOG_ISET_FLG_ENTER
+#define LOG_ISET_FLG_ENTER(flgid, setptn)
+#endif /* LOG_ISET_FLG_ENTER */
+
+#ifndef LOG_ISET_FLG_LEAVE
+#define LOG_ISET_FLG_LEAVE(ercd)
+#endif /* LOG_ISET_FLG_LEAVE */
+
+#ifndef LOG_CLR_FLG_ENTER
+#define LOG_CLR_FLG_ENTER(flgid, clrptn)
+#endif /* LOG_CLR_FLG_ENTER */
+
+#ifndef LOG_CLR_FLG_LEAVE
+#define LOG_CLR_FLG_LEAVE(ercd)
+#endif /* LOG_CLR_FLG_LEAVE */
+
+#ifndef LOG_WAI_FLG_ENTER
+#define LOG_WAI_FLG_ENTER(flgid, waiptn, wfmode, p_flgptn)
+#endif /* LOG_WAI_FLG_ENTER */
+
+#ifndef LOG_WAI_FLG_LEAVE
+#define LOG_WAI_FLG_LEAVE(ercd, flgptn)
+#endif /* LOG_WAI_FLG_LEAVE */
+
+#ifndef LOG_POL_FLG_ENTER
+#define LOG_POL_FLG_ENTER(flgid, waiptn, wfmode, p_flgptn)
+#endif /* LOG_POL_FLG_ENTER */
+
+#ifndef LOG_POL_FLG_LEAVE
+#define LOG_POL_FLG_LEAVE(ercd, flgptn)
+#endif /* LOG_POL_FLG_LEAVE */
+
+#ifndef LOG_TWAI_FLG_ENTER
+#define LOG_TWAI_FLG_ENTER(flgid, waiptn, wfmode, p_flgptn, tmout)
+#endif /* LOG_TWAI_FLG_ENTER */
+
+#ifndef LOG_TWAI_FLG_LEAVE
+#define LOG_TWAI_FLG_LEAVE(ercd, flgptn)
+#endif /* LOG_TWAI_FLG_LEAVE */
+
+#ifndef LOG_INI_FLG_ENTER
+#define LOG_INI_FLG_ENTER(flgid)
+#endif /* LOG_INI_FLG_ENTER */
+
+#ifndef LOG_INI_FLG_LEAVE
+#define LOG_INI_FLG_LEAVE(ercd)
+#endif /* LOG_INI_FLG_LEAVE */
+
+#ifndef LOG_REF_FLG_ENTER
+#define LOG_REF_FLG_ENTER(flgid, pk_rflg)
+#endif /* LOG_REF_FLG_ENTER */
+
+#ifndef LOG_REF_FLG_LEAVE
+#define LOG_REF_FLG_LEAVE(ercd, pk_rflg)
+#endif /* LOG_REF_FLG_LEAVE */
+
+/*
+ *  ã¤ãã³ããã©ã°ã®æ°
+ */
+#define tnum_flg	((uint_t)(tmax_flgid - TMIN_FLGID + 1))
+
+/*
+ *  ã¤ãã³ããã©ã°IDããã¤ãã³ããã©ã°ç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_FLG(flgid)	((uint_t)((flgid) - TMIN_FLGID))
+#define get_flgcb(flgid)	(&(flgcb_table[INDEX_FLG(flgid)]))
+
+/*
+ *  ã¤ãã³ããã©ã°æ©è½ã®åæå
+ */
+#ifdef TOPPERS_flgini
+
+void
+initialize_eventflag(void)
+{
+	uint_t	i;
+	FLGCB	*p_flgcb;
+
+	for (i = 0; i < tnum_flg; i++) {
+		p_flgcb = &(flgcb_table[i]);
+		queue_initialize(&(p_flgcb->wait_queue));
+		p_flgcb->p_flginib = &(flginib_table[i]);
+		p_flgcb->flgptn = p_flgcb->p_flginib->iflgptn;
+	}
+}
+
+#endif /* TOPPERS_flgini */
+
+/*
+ *  ã¤ãã³ããã©ã°å¾
+ã¡è§£é¤æ¡ä»¶ã®ãã§ãã¯
+ */
+#ifdef TOPPERS_flgcnd
+
+bool_t
+check_flg_cond(FLGCB *p_flgcb, FLGPTN waiptn, MODE wfmode, FLGPTN *p_flgptn)
+{
+	if ((wfmode & TWF_ORW) != 0U ? (p_flgcb->flgptn & waiptn) != 0U
+									: (p_flgcb->flgptn & waiptn) == waiptn) {
+		*p_flgptn = p_flgcb->flgptn;
+		if ((p_flgcb->p_flginib->flgatr & TA_CLR) != 0U) {
+			p_flgcb->flgptn = 0U;
+		}
+		return(true);
+	}
+	return(false);
+}
+
+#endif /* TOPPERS_flgcnd */
+
+/*
+ *  ã¤ãã³ããã©ã°ã®ã»ãã
+ */
+#ifdef TOPPERS_set_flg
+
+ER
+set_flg(ID flgid, FLGPTN setptn)
+{
+	FLGCB	*p_flgcb;
+	QUEUE	*p_queue;
+	TCB		*p_tcb;
+	WINFO_FLG *p_winfo_flg;
+	bool_t	dspreq = false;
+	ER		ercd;
+
+	LOG_SET_FLG_ENTER(flgid, setptn);
+	CHECK_TSKCTX_UNL();
+	CHECK_FLGID(flgid);
+	p_flgcb = get_flgcb(flgid);
+
+	t_lock_cpu();
+	p_flgcb->flgptn |= setptn;
+	p_queue = p_flgcb->wait_queue.p_next;
+	while (p_queue != &(p_flgcb->wait_queue)) {
+		p_tcb = (TCB *) p_queue;
+		p_queue = p_queue->p_next;
+		p_winfo_flg = (WINFO_FLG *)(p_tcb->p_winfo);
+		if (check_flg_cond(p_flgcb, p_winfo_flg->waiptn,
+							p_winfo_flg->wfmode, &(p_winfo_flg->flgptn))) {
+			queue_delete(&(p_tcb->task_queue));
+			if (wait_complete(p_tcb)) {
+				dspreq = true;
+			}
+			if ((p_flgcb->p_flginib->flgatr & TA_CLR) != 0U) {
+				break;
+			}
+		}
+	}
+	if (dspreq) {
+		dispatch();
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_SET_FLG_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_set_flg */
+
+/*
+ *  ã¤ãã³ããã©ã°ã®ã»ããï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_iset_flg
+
+ER
+iset_flg(ID flgid, FLGPTN setptn)
+{
+	FLGCB	*p_flgcb;
+	QUEUE	*p_queue;
+	TCB		*p_tcb;
+	WINFO_FLG *p_winfo_flg;
+	ER		ercd;
+
+	LOG_ISET_FLG_ENTER(flgid, setptn);
+	CHECK_INTCTX_UNL();
+	CHECK_FLGID(flgid);
+	p_flgcb = get_flgcb(flgid);
+
+	i_lock_cpu();
+	p_flgcb->flgptn |= setptn;
+	p_queue = p_flgcb->wait_queue.p_next;
+	while (p_queue != &(p_flgcb->wait_queue)) {
+		p_tcb = (TCB *) p_queue;
+		p_queue = p_queue->p_next;
+		p_winfo_flg = (WINFO_FLG *)(p_tcb->p_winfo);
+		if (check_flg_cond(p_flgcb, p_winfo_flg->waiptn,
+							p_winfo_flg->wfmode, &(p_winfo_flg->flgptn))) {
+			queue_delete(&(p_tcb->task_queue));
+			if (wait_complete(p_tcb)) {
+				reqflg = true;
+			}
+			if ((p_flgcb->p_flginib->flgatr & TA_CLR) != 0U) {
+				break;
+			}
+		}
+	}
+	ercd = E_OK;
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_ISET_FLG_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_iset_flg */
+
+/*
+ *  ã¤ãã³ããã©ã°ã®ã¯ãªã¢
+ */
+#ifdef TOPPERS_clr_flg
+
+ER
+clr_flg(ID flgid, FLGPTN clrptn)
+{
+	FLGCB	*p_flgcb;
+	ER		ercd;
+
+	LOG_CLR_FLG_ENTER(flgid, clrptn);
+	CHECK_TSKCTX_UNL();
+	CHECK_FLGID(flgid);
+	p_flgcb = get_flgcb(flgid);
+
+	t_lock_cpu();
+	p_flgcb->flgptn &= clrptn; 
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_CLR_FLG_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_clr_flg */
+
+/*
+ *  ã¤ãã³ããã©ã°å¾
+ã¡
+ */
+#ifdef TOPPERS_wai_flg
+
+ER
+wai_flg(ID flgid, FLGPTN waiptn, MODE wfmode, FLGPTN *p_flgptn)
+{
+	FLGCB	*p_flgcb;
+	WINFO_FLG winfo_flg;
+	ER		ercd;
+
+	LOG_WAI_FLG_ENTER(flgid, waiptn, wfmode, p_flgptn);
+	CHECK_DISPATCH();
+	CHECK_FLGID(flgid);
+	CHECK_PAR(waiptn != 0U);
+	CHECK_PAR(wfmode == TWF_ORW || wfmode == TWF_ANDW);
+	p_flgcb = get_flgcb(flgid);
+
+	t_lock_cpu();
+	if ((p_flgcb->p_flginib->flgatr & TA_WMUL) == 0U
+					&& !queue_empty(&(p_flgcb->wait_queue))) {
+		ercd = E_ILUSE;
+	}
+	else if (check_flg_cond(p_flgcb, waiptn, wfmode, p_flgptn)) {
+		ercd = E_OK;
+	}
+	else {
+		winfo_flg.waiptn = waiptn;
+		winfo_flg.wfmode = wfmode;
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_FLG);
+		wobj_make_wait((WOBJCB *) p_flgcb, (WINFO_WOBJ *) &winfo_flg);
+		dispatch();
+		ercd = winfo_flg.winfo.wercd;
+		if (ercd == E_OK) {
+			*p_flgptn = winfo_flg.flgptn;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_WAI_FLG_LEAVE(ercd, *p_flgptn);
+	return(ercd);
+}
+
+#endif /* TOPPERS_wai_flg */
+
+/*
+ *  ã¤ãã³ããã©ã°å¾
+ã¡ï¼ãã¼ãªã³ã°ï¼
+ */
+#ifdef TOPPERS_pol_flg
+
+ER
+pol_flg(ID flgid, FLGPTN waiptn, MODE wfmode, FLGPTN *p_flgptn)
+{
+	FLGCB	*p_flgcb;
+	ER		ercd;
+
+	LOG_POL_FLG_ENTER(flgid, waiptn, wfmode, p_flgptn);
+	CHECK_TSKCTX_UNL();
+	CHECK_FLGID(flgid);
+	CHECK_PAR(waiptn != 0U);
+	CHECK_PAR(wfmode == TWF_ORW || wfmode == TWF_ANDW);
+	p_flgcb = get_flgcb(flgid);
+
+	t_lock_cpu();
+	if ((p_flgcb->p_flginib->flgatr & TA_WMUL) == 0U
+					&& !queue_empty(&(p_flgcb->wait_queue))) {
+		ercd = E_ILUSE;
+	}
+	else if (check_flg_cond(p_flgcb, waiptn, wfmode, p_flgptn)) {
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_POL_FLG_LEAVE(ercd, *p_flgptn);
+	return(ercd);
+}
+
+#endif /* TOPPERS_pol_flg */
+
+/*
+ *  ã¤ãã³ããã©ã°å¾
+ã¡ï¼ã¿ã¤ã ã¢ã¦ãããï¼
+ */
+#ifdef TOPPERS_twai_flg
+
+ER
+twai_flg(ID flgid, FLGPTN waiptn, MODE wfmode, FLGPTN *p_flgptn, TMO tmout)
+{
+	FLGCB	*p_flgcb;
+	WINFO_FLG winfo_flg;
+	TMEVTB	tmevtb;
+	ER		ercd;
+
+	LOG_TWAI_FLG_ENTER(flgid, waiptn, wfmode, p_flgptn, tmout);
+	CHECK_DISPATCH();
+	CHECK_FLGID(flgid);
+	CHECK_PAR(waiptn != 0U);
+	CHECK_PAR(wfmode == TWF_ORW || wfmode == TWF_ANDW);
+	CHECK_TMOUT(tmout);
+	p_flgcb = get_flgcb(flgid);
+
+	t_lock_cpu();
+	if ((p_flgcb->p_flginib->flgatr & TA_WMUL) == 0U
+					&& !queue_empty(&(p_flgcb->wait_queue))) {
+		ercd = E_ILUSE;
+	}
+	else if (check_flg_cond(p_flgcb, waiptn, wfmode, p_flgptn)) {
+		ercd = E_OK;
+	}
+	else if (tmout == TMO_POL) {
+		ercd = E_TMOUT;
+	}
+	else {
+		winfo_flg.waiptn = waiptn;
+		winfo_flg.wfmode = wfmode;
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_FLG);
+		wobj_make_wait_tmout((WOBJCB *) p_flgcb, (WINFO_WOBJ *) &winfo_flg,
+														&tmevtb, tmout);
+		dispatch();
+		ercd = winfo_flg.winfo.wercd;
+		if (ercd == E_OK) {
+			*p_flgptn = winfo_flg.flgptn;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TWAI_FLG_LEAVE(ercd, *p_flgptn);
+	return(ercd);
+}
+
+#endif /* TOPPERS_twai_flg */
+
+/*
+ *  ã¤ãã³ããã©ã°ã®ååæå
+ */
+#ifdef TOPPERS_ini_flg
+
+ER
+ini_flg(ID flgid)
+{
+	FLGCB	*p_flgcb;
+	bool_t	dspreq;
+	ER		ercd;
+    
+	LOG_INI_FLG_ENTER(flgid);
+	CHECK_TSKCTX_UNL();
+	CHECK_FLGID(flgid);
+	p_flgcb = get_flgcb(flgid);
+
+	t_lock_cpu();
+	dspreq = init_wait_queue(&(p_flgcb->wait_queue));
+	p_flgcb->flgptn = p_flgcb->p_flginib->iflgptn;
+	if (dspreq) {
+		dispatch();
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_INI_FLG_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ini_flg */
+
+/*
+ *  ã¤ãã³ããã©ã°ã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_flg
+
+ER
+ref_flg(ID flgid, T_RFLG *pk_rflg)
+{
+	FLGCB	*p_flgcb;
+	ER		ercd;
+    
+	LOG_REF_FLG_ENTER(flgid, pk_rflg);
+	CHECK_TSKCTX_UNL();
+	CHECK_FLGID(flgid);
+	p_flgcb = get_flgcb(flgid);
+
+	t_lock_cpu();
+	pk_rflg->wtskid = wait_tskid(&(p_flgcb->wait_queue));
+	pk_rflg->flgptn = p_flgcb->flgptn;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_FLG_LEAVE(ercd, pk_rflg);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_flg */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/eventflag.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/eventflag.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/eventflag.h	(revision 136)
@@ -0,0 +1,160 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: eventflag.h 2228 2011-08-14 00:35:44Z ertl-hiro $
+ */
+
+/*
+ *		ã¤ãã³ããã©ã°æ©è½
+ */
+
+#ifndef TOPPERS_EVENTFLAG_H
+#define TOPPERS_EVENTFLAG_H
+
+#include "wait.h"
+
+/*
+ *  ã¤ãã³ããã©ã°åæåãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WOBJINIBï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct eventflag_initialization_block {
+	ATR			flgatr;			/* ã¤ãã³ããã©ã°å±æ§ */
+	FLGPTN		iflgptn;		/* ã¤ãã³ããã©ã°ã®ããããã¿ã¼ã³ã®åæå¤ */
+} FLGINIB;
+
+/*
+ *  ã¤ãã³ããã©ã°ç®¡çãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã®å
+±éé¨åï¼WOBJCBï¼
+ *  ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼æåã®2ã¤ã®
+ *  ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct eventflag_control_block {
+	QUEUE		wait_queue;		/* ã¤ãã³ããã©ã°å¾
+ã¡ã­ã¥ã¼ */
+	const FLGINIB *p_flginib;	/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+	FLGPTN		flgptn;			/* ã¤ãã³ããã©ã°ç¾å¨ãã¿ã¼ã³ */
+} FLGCB;
+
+/*
+ *  ã¤ãã³ããã©ã°å¾
+ã¡æ
+å ±ãã­ãã¯ã®å®ç¾©
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡æ
+å ±ãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WINFO_WOBJï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®2ã¤ã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ *
+ *  flgptnã¯ï¼waiptnããã³wfmodeã¨åæã«ä½¿ããã¨ã¯ãªãããï¼å
+±ç¨ä½ãä½¿
+ *  ãã°ã¡ã¢ãªãç¯ç´ãããã¨ãå¯è½ã§ããï¼
+ */
+typedef struct eventflag_waiting_information {
+	WINFO		winfo;			/* æ¨æºã®å¾
+ã¡æ
+å ±ãã­ãã¯ */
+	FLGCB		*p_flgcb;		/* å¾
+ã£ã¦ããã¤ãã³ããã©ã°ã®ç®¡çãã­ãã¯ */
+	FLGPTN		waiptn;			/* å¾
+ã¡ãã¿ã¼ã³ */
+	MODE		wfmode;			/* å¾
+ã¡ã¢ã¼ã */
+	FLGPTN		flgptn;			/* å¾
+ã¡è§£é¤æã®ãã¿ã¼ã³ */
+} WINFO_FLG;
+
+/*
+ *  ã¤ãã³ããã©ã°IDã®æå¤§å¤ï¼kernel_cfg.cï¼
+ */
+extern const ID	tmax_flgid;
+
+/*
+ *  ã¤ãã³ããã©ã°åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const FLGINIB	flginib_table[];
+
+/*
+ *  ã¤ãã³ããã©ã°ç®¡çãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern FLGCB	flgcb_table[];
+
+/*
+ *  ã¤ãã³ããã©ã°ç®¡çãã­ãã¯ããã¤ãã³ããã©ã°IDãåãåºãããã®ãã¯ã­
+ */
+#define	FLGID(p_flgcb)	((ID)(((p_flgcb) - flgcb_table) + TMIN_FLGID))
+
+/*
+ *  ã¤ãã³ããã©ã°æ©è½ã®åæå
+ */
+extern void	initialize_eventflag(void);
+
+/*
+ *  ã¤ãã³ããã©ã°å¾
+ã¡è§£é¤æ¡ä»¶ã®ãã§ãã¯
+ */
+extern bool_t	check_flg_cond(FLGCB *p_flgcb, FLGPTN waiptn,
+								MODE wfmode, FLGPTN *p_flgptn);
+
+#endif /* TOPPERS_EVENTFLAG_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/exception.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/exception.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/exception.c	(revision 136)
@@ -0,0 +1,160 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: exception.c 2648 2014-04-29 03:47:45Z ertl-hiro $
+ */
+
+/*
+ *		CPUä¾å¤ç®¡çæ©è½
+ */
+
+#include "kernel_impl.h"
+#include "task.h"
+#include "exception.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_XSNS_DPN_ENTER
+#define LOG_XSNS_DPN_ENTER(p_excinf)
+#endif /* LOG_XSNS_DPN_ENTER */
+
+#ifndef LOG_XSNS_DPN_LEAVE
+#define LOG_XSNS_DPN_LEAVE(state)
+#endif /* LOG_XSNS_DPN_LEAVE */
+
+#ifndef LOG_XSNS_XPN_ENTER
+#define LOG_XSNS_XPN_ENTER(p_excinf)
+#endif /* LOG_XSNS_XPN_ENTER */
+
+#ifndef LOG_XSNS_XPN_LEAVE
+#define LOG_XSNS_XPN_LEAVE(state)
+#endif /* LOG_XSNS_XPN_LEAVE */
+
+/* 
+ *  CPUä¾å¤ãã³ãã©ç®¡çæ©è½ã®åæå
+ */
+#ifdef TOPPERS_excini
+#ifndef OMIT_INITIALIZE_EXCEPTION
+
+void
+initialize_exception(void)
+{
+	uint_t			i;
+	const EXCINIB	*p_excinib;
+
+	for (i = 0; i < tnum_excno; i++) {
+		p_excinib = &(excinib_table[i]);
+		x_define_exc(p_excinib->excno, p_excinib->exc_entry);
+	}
+}
+
+#endif /* OMIT_INITIALIZE_EXCEPTION */
+#endif /* TOPPERS_excini */
+
+/*
+ *  CPUä¾å¤ã®çºçããã³ã³ãã­ã¹ãã®åç
+§
+ */
+
+/*
+ *  CPUä¾å¤çºçæã®ãã£ã¹ãããä¿çç¶æ
+ã®åç
+§
+ *
+ *  CPUä¾å¤ãã³ãã©ä¸­ã§disdspãå¤åãããã¨ã¯ãªãããï¼CPUä¾å¤ãçºçã
+ *  ãæã®disdspãä¿å­ãã¦ããå¿
+è¦ã¯ãªãï¼
+ */
+#ifdef TOPPERS_xsns_dpn
+
+bool_t
+xsns_dpn(void *p_excinf)
+{
+	bool_t	state;
+
+	LOG_XSNS_DPN_ENTER(p_excinf);
+	state = (kerflg && exc_sense_intmask(p_excinf)
+									&& !disdsp) ? false : true;
+	LOG_XSNS_DPN_LEAVE(state);
+	return(state);
+}
+
+#endif /* TOPPERS_xsns_dpn */
+
+/*
+ *  CPUä¾å¤çºçæã®ã¿ã¹ã¯ä¾å¤å¦çä¿çç¶æ
+ã®åç
+§
+ *
+ *  CPUä¾å¤ãã³ãã©ä¸­ã§p_runtskã¨p_runtsk->enatexãå¤åãããã¨ã¯ãªã
+ *  ããï¼CPUä¾å¤ãçºçããæã®p_runtsk->enatexãä¿å­ãã¦ããå¿
+è¦ã¯ãª
+ *  ãï¼
+ */
+#ifdef TOPPERS_xsns_xpn
+
+bool_t
+xsns_xpn(void *p_excinf)
+{
+	bool_t	state;
+
+	LOG_XSNS_XPN_ENTER(p_excinf);
+	state = (kerflg && exc_sense_intmask(p_excinf)
+									&& p_runtsk->enatex) ? false : true;
+	LOG_XSNS_XPN_LEAVE(state);
+	return(state);
+}
+
+#endif /* TOPPERS_xsns_xpn */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/exception.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/exception.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/exception.h	(revision 136)
@@ -0,0 +1,94 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: exception.h 648 2007-12-15 09:35:35Z hiro $
+ */
+
+/*
+ *		CPUä¾å¤ç®¡çæ©è½
+ */
+
+#ifndef TOPPERS_EXCEPTION_H
+#define TOPPERS_EXCEPTION_H
+
+#ifndef OMIT_INITIALIZE_EXCEPTION
+
+/*
+ *  CPUä¾å¤ãã³ãã©åæåãã­ãã¯
+ */
+typedef struct cpu_exception_handler_initialization_block {
+	EXCNO		excno;			/* CPUä¾å¤ãã³ãã©çªå· */
+	ATR			excatr;			/* CPUä¾å¤ãã³ãã©å±æ§ */
+	FP			exc_entry;		/* CPUä¾å¤ãã³ãã©ã®åºå
+¥å£å¦çã®çªå° */
+} EXCINIB;
+
+/*
+ *  CPUä¾å¤ãã³ãã©çªå·ã®æ°ï¼kernel_cfg.cï¼
+ */
+extern const uint_t	tnum_excno;
+
+/*
+ *  CPUä¾å¤ãã³ãã©åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const EXCINIB	excinib_table[];
+
+#endif /* OMIT_INITIALIZE_EXCEPTION */
+
+/*
+ *  CPUä¾å¤ãã³ãã©ç®¡çæ©è½ã®åæå
+ */
+extern void	initialize_exception(void);
+
+#endif /* TOPPERS_EXCEPTION_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/genoffset.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/genoffset.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/genoffset.tf	(revision 136)
@@ -0,0 +1,162 @@
+$ ======================================================================
+$ 
+$   TOPPERS/ASP Kernel
+$       Toyohashi Open Platform for Embedded Real-Time Systems/
+$       Advanced Standard Profile Kernel
+$ 
+$   Copyright (C) 2011 by Embedded and Real-Time Systems Laboratory
+$               Graduate School of Information Science, Nagoya Univ., JAPAN
+$  
+$   ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+$   ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+$   å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+$   (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+$       æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+$       ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+$   (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+$       ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+$       è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+$       ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+$   (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+$       ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+$       ã¨ï¼
+$     (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+$         ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+$     (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+$         å ±åãããã¨ï¼
+$   (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+$       å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+$       ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+$       ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+$       å
+è²¬ãããã¨ï¼
+$  
+$   æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+$   ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+$   ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+$   ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+$   ã®è²¬ä»»ãè² ããªãï¼
+$ 
+$   $Id: genoffset.tf 2046 2011-04-03 02:33:08Z ertl-hiro $
+$ 
+$ =====================================================================
+
+$ 
+$  #defineãã£ã¬ã¯ãã£ãã®çæ
+$ 
+$FUNCTION DEFINE$
+	#define $ARGV[1]$$TAB$$FORMAT("%d", +ARGV[2])$$NL$
+$END$
+
+$ 
+$  ãããã®ãµã¼ã
+$ 
+$FUNCTION SEARCH_BIT$
+	$_val = ARGV[1]$
+	$FOREACH _val_bit RANGE(0,7)$
+		$IF (_val & 1) != 0$
+			$RESULT = _val_bit$
+		$END$
+		$_val = _val >> 1$
+	$END$
+$END$
+
+$ 
+$  ããããã£ã¼ã«ãã®ãªãã»ããã¨ãããä½ç½®ã®å®ç¾©ã®çæ
+$ 
+$FUNCTION DEFINE_BIT$
+	$label = ARGV[1]$
+	$struct_size = ARGV[2]$
+	$output_size = ARGV[3]$
+
+	$top = SYMBOL(label)$
+	$IF !LENGTH(top)$
+		$ERROR$$FORMAT("label %1% not found", label)$$END$
+	$ELSE$
+		$val = 0$
+		$FOREACH i RANGE(0,struct_size-1)$
+			$tmp_val = PEEK(top + i, 1)$
+			$IF val == 0 && tmp_val != 0$
+				$val = tmp_val$
+				$offset = i$
+			$END$
+		$END$
+
+		$IF val == 0$
+			$ERROR$$FORMAT("bit not found in %1%", ARGV[1])$$END$
+		$ELSE$
+			$val_bit = SEARCH_BIT(val)$
+			$RESULT = {}$
+			$IF EQ(output_size, "W")$
+				$IF SIL_ENDIAN_BIG$
+					$val_bit = val_bit + 24 - ((offset & 0x03) << 3)$
+				$ELSE$
+					$val_bit = val_bit + ((offset & 0x03) << 3)$
+				$END$
+				$offset = offset & ~0x03$
+			$ELSE$$IF EQ(output_size, "H")$
+				$IF SIL_ENDIAN_BIG$
+					$val_bit = val_bit + 8 - ((offset & 0x01) << 3)$
+				$ELSE$
+					$val_bit = val_bit + ((offset & 0x01) << 3)$
+				$END$
+				$offset = offset & ~0x01$
+			$END$$END$
+		$END$
+
+		#define $label$$TAB$$FORMAT("%d", +offset)$$NL$
+		#define $label$_bit$TAB$$FORMAT("%d", +val_bit)$$NL$
+		#define $label$_mask$TAB$$FORMAT("0x%x", 1 << val_bit)$$NL$
+	$END$
+$END$
+
+$ 
+$  ãã¤ãé
+ç½®ã®ãã§ãã¯
+$ 
+$FUNCTION MAGIC_CHECK$
+	$size = ARGV[1]$
+	$check = ARGV[2]$
+
+	$label = FORMAT("MAGIC_%d", +size)$
+	$top = SYMBOL(label)$
+	$IF !LENGTH(top)$
+		$ERROR$$FORMAT("label %1% not found", label)$$END$
+	$ELSE$
+		$FOREACH offset RANGE(1,size)$
+			$IF SIL_ENDIAN_BIG$
+				$val = PEEK(top + offset - 1, 1)$
+			$ELSE$
+				$val = PEEK(top + size - offset, 1)$
+			$END$
+			$IF val != AT(check, offset - 1)$
+				$ERROR$$FORMAT("value check of %1% failed", label)$$END$
+			$END$
+		$END$
+	$END$
+$END$
+
+$MAGIC_CHECK(1, { 0x12 })$
+$MAGIC_CHECK(2, { 0x12, 0x34 })$
+$MAGIC_CHECK(4, { 0x12, 0x34, 0x56, 0x78 })$
+
+$ 
+$  ãã¡ã¤ã«ãããã®çæ
+$ 
+$FILE "offset.h"$
+/* offset.h */$NL$
+$NL$
Index: rtos_arduino/trunk/asp_1.9.2/kernel/interrupt.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/interrupt.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/interrupt.c	(revision 136)
@@ -0,0 +1,272 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: interrupt.c 2133 2011-06-26 03:14:51Z ertl-hiro $
+ */
+
+/*
+ *		å²è¾¼ã¿ç®¡çæ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "interrupt.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_DIS_INT_ENTER
+#define LOG_DIS_INT_ENTER(intno)
+#endif /* LOG_DIS_INT_ENTER */
+
+#ifndef LOG_DIS_INT_LEAVE
+#define LOG_DIS_INT_LEAVE(ercd)
+#endif /* LOG_DIS_INT_LEAVE */
+
+#ifndef LOG_ENA_INT_ENTER
+#define LOG_ENA_INT_ENTER(intno)
+#endif /* LOG_ENA_INT_ENTER */
+
+#ifndef LOG_ENA_INT_LEAVE
+#define LOG_ENA_INT_LEAVE(ercd)
+#endif /* LOG_ENA_INT_LEAVE */
+
+#ifndef LOG_CHG_IPM_ENTER
+#define LOG_CHG_IPM_ENTER(intpri)
+#endif /* LOG_CHG_IPM_ENTER */
+
+#ifndef LOG_CHG_IPM_LEAVE
+#define LOG_CHG_IPM_LEAVE(ercd)
+#endif /* LOG_CHG_IPM_LEAVE */
+
+#ifndef LOG_GET_IPM_ENTER
+#define LOG_GET_IPM_ENTER(p_intpri)
+#endif /* LOG_GET_IPM_ENTER */
+
+#ifndef LOG_GET_IPM_LEAVE
+#define LOG_GET_IPM_LEAVE(ercd, intpri)
+#endif /* LOG_GET_IPM_LEAVE */
+
+/* 
+ *  å²è¾¼ã¿ç®¡çæ©è½ã®åæå
+ */
+#ifdef TOPPERS_intini
+#ifndef OMIT_INITIALIZE_INTERRUPT
+
+void
+initialize_interrupt(void)
+{
+	uint_t			i;
+	const INHINIB	*p_inhinib;
+	const INTINIB	*p_intinib;
+
+	for (i = 0; i < tnum_inhno; i++) {
+		p_inhinib = &(inhinib_table[i]);
+		x_define_inh(p_inhinib->inhno, p_inhinib->int_entry);
+	}
+	for (i = 0; i < tnum_intno; i++) {
+		p_intinib = &(intinib_table[i]);
+		x_config_int(p_intinib->intno, p_intinib->intatr, p_intinib->intpri);
+	}
+}
+
+#endif /* OMIT_INITIALIZE_INTERRUPT */
+#endif /* TOPPERS_intini */
+
+/*
+ *  å²è¾¼ã¿ã®ç¦æ­¢
+ */
+#ifdef TOPPERS_dis_int
+#ifdef TOPPERS_SUPPORT_DIS_INT
+
+ER
+dis_int(INTNO intno)
+{
+	bool_t	locked;
+	ER		ercd;
+
+	LOG_DIS_INT_ENTER(intno);
+	CHECK_TSKCTX();
+	CHECK_INTNO_DISINT(intno);
+
+	locked = t_sense_lock();
+	if (!locked) {
+		t_lock_cpu();
+	}
+	if (t_disable_int(intno)) {
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_OBJ;
+	}
+	if (!locked) {
+		t_unlock_cpu();
+	}
+
+  error_exit:
+	LOG_DIS_INT_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_SUPPORT_DIS_INT */
+#endif /* TOPPERS_dis_int */
+
+/*
+ *  å²è¾¼ã¿ã®è¨±å¯
+ */
+#ifdef TOPPERS_ena_int
+#ifdef TOPPERS_SUPPORT_ENA_INT
+
+ER
+ena_int(INTNO intno)
+{
+	bool_t	locked;
+	ER		ercd;
+
+	LOG_ENA_INT_ENTER(intno);
+	CHECK_TSKCTX();
+	CHECK_INTNO_DISINT(intno);
+
+	locked = t_sense_lock();
+	if (!locked) {
+		t_lock_cpu();
+	}
+	if (t_enable_int(intno)) {
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_OBJ;
+	}
+	if (!locked) {
+		t_unlock_cpu();
+	}
+
+  error_exit:
+	LOG_ENA_INT_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_SUPPORT_ENA_INT */
+#endif /* TOPPERS_ena_int */
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®å¤æ´
+ */
+#ifdef TOPPERS_chg_ipm
+
+ER
+chg_ipm(PRI intpri)
+{
+	ER		ercd;
+
+	LOG_CHG_IPM_ENTER(intpri);
+	CHECK_TSKCTX_UNL();
+	CHECK_INTPRI_CHGIPM(intpri);
+
+	t_lock_cpu();
+	t_set_ipm(intpri);
+	if (intpri == TIPM_ENAALL) {
+		ipmflg = true;
+		if (!disdsp) {
+			dspflg = true;
+			if (p_runtsk != p_schedtsk) {
+				dispatch();
+			}
+		}
+		if (p_runtsk->enatex && p_runtsk->texptn != 0U) {
+			call_texrtn();
+		}
+	}
+	else {
+		ipmflg = false;
+		dspflg = false;
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_CHG_IPM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_chg_ipm */
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ã®åç
+§
+ */
+#ifdef TOPPERS_get_ipm
+
+ER
+get_ipm(PRI *p_intpri)
+{
+	ER		ercd;
+
+	LOG_GET_IPM_ENTER(p_intpri);
+	CHECK_TSKCTX_UNL();
+
+	t_lock_cpu();
+	*p_intpri = t_get_ipm();
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_GET_IPM_LEAVE(ercd, *p_intpri);
+	return(ercd);
+}
+
+#endif /* TOPPERS_get_ipm */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/interrupt.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/interrupt.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/interrupt.h	(revision 136)
@@ -0,0 +1,114 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: interrupt.h 648 2007-12-15 09:35:35Z hiro $
+ */
+
+/*
+ *		å²è¾¼ã¿ç®¡çæ©è½
+ */
+
+#ifndef TOPPERS_INTERRUPT_H
+#define TOPPERS_INTERRUPT_H
+
+#ifndef OMIT_INITIALIZE_INTERRUPT
+
+/*
+ *  å²è¾¼ã¿ãã³ãã©åæåãã­ãã¯
+ */
+typedef struct interrupt_handler_initialization_block {
+	INHNO		inhno;			/* å²è¾¼ã¿ãã³ãã©çªå· */
+	ATR			inhatr;			/* å²è¾¼ã¿ãã³ãã©å±æ§ */
+	FP			int_entry;		/* å²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦çã®çªå° */
+} INHINIB;
+
+/*
+ *  å²è¾¼ã¿è¦æ±ã©ã¤ã³åæåãã­ãã¯
+ */
+typedef struct interrupt_request_initialization_block {
+	INTNO		intno;			/* å²è¾¼ã¿çªå· */
+	ATR			intatr;			/* å²è¾¼ã¿å±æ§ */
+	PRI			intpri;			/* å²è¾¼ã¿åªå
+åº¦ */
+} INTINIB;
+
+/*
+ *  å²è¾¼ã¿ãã³ãã©çªå·ã®æ°ï¼kernel_cfg.cï¼
+ */
+extern const uint_t	tnum_inhno;
+
+/*
+ *  å²è¾¼ã¿ãã³ãã©åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const INHINIB	inhinib_table[];
+
+/*
+ *  å²è¾¼ã¿è¦æ±ã©ã¤ã³ã®æ°ï¼kernel_cfg.cï¼
+ */
+extern const uint_t	tnum_intno;
+
+/*
+ *  å²è¾¼ã¿è¦æ±ã©ã¤ã³åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const INTINIB	intinib_table[];
+
+#endif /* OMIT_INITIALIZE_INTERRUPT */
+
+/*
+ *  å²è¾¼ã¿ç®¡çæ©è½ã®åæå
+ */
+extern void	initialize_interrupt(void);
+
+#endif /* TOPPERS_INTERRUPT_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/kernel.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/kernel.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/kernel.tf	(revision 136)
@@ -0,0 +1,1130 @@
+$ ======================================================================
+$ 
+$   TOPPERS/ASP Kernel
+$       Toyohashi Open Platform for Embedded Real-Time Systems/
+$       Advanced Standard Profile Kernel
+$ 
+$   Copyright (C) 2007 by TAKAGI Nobuhisa
+$   Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+$               Graduate School of Information Science, Nagoya Univ., JAPAN
+$  
+$   ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+$   ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+$   å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+$   (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+$       æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+$       ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+$   (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+$       ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+$       è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+$       ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+$   (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+$       ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+$       ã¨ï¼
+$     (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+$         ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+$     (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+$         å ±åãããã¨ï¼
+$   (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+$       å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+$       ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+$       ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+$       å
+è²¬ãããã¨ï¼
+$  
+$   æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+$   ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+$   ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+$   ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+$   ã®è²¬ä»»ãè² ããªãï¼
+$ 
+$   $Id: kernel.tf 2663 2014-11-16 18:35:25Z ertl-hiro $
+$  
+$ =====================================================================
+
+$ =====================================================================
+$ kernel_cfg.hã®çæ
+$ =====================================================================
+
+$FILE "kernel_cfg.h"$
+/* kernel_cfg.h */$NL$
+#ifndef TOPPERS_KERNEL_CFG_H$NL$
+#define TOPPERS_KERNEL_CFG_H$NL$
+$NL$
+#define TNUM_TSKID	$LENGTH(TSK.ID_LIST)$$NL$
+#define TNUM_SEMID	$LENGTH(SEM.ID_LIST)$$NL$
+#define TNUM_FLGID	$LENGTH(FLG.ID_LIST)$$NL$
+#define TNUM_DTQID	$LENGTH(DTQ.ID_LIST)$$NL$
+#define TNUM_PDQID	$LENGTH(PDQ.ID_LIST)$$NL$
+#define TNUM_MBXID	$LENGTH(MBX.ID_LIST)$$NL$
+#define TNUM_MPFID	$LENGTH(MPF.ID_LIST)$$NL$
+#define TNUM_CYCID	$LENGTH(CYC.ID_LIST)$$NL$
+#define TNUM_ALMID	$LENGTH(ALM.ID_LIST)$$NL$
+$NL$
+$FOREACH id TSK.ID_LIST$
+	#define $id$	$+id$$NL$
+$END$
+$FOREACH id SEM.ID_LIST$
+	#define $id$	$+id$$NL$
+$END$
+$FOREACH id FLG.ID_LIST$
+	#define $id$	$+id$$NL$
+$END$
+$FOREACH id DTQ.ID_LIST$
+	#define $id$	$+id$$NL$
+$END$
+$FOREACH id PDQ.ID_LIST$
+	#define $id$	$+id$$NL$
+$END$
+$FOREACH id MBX.ID_LIST$
+	#define $id$	$+id$$NL$
+$END$
+$FOREACH id MPF.ID_LIST$
+	#define $id$	$+id$$NL$
+$END$
+$FOREACH id CYC.ID_LIST$
+	#define $id$	$+id$$NL$
+$END$
+$FOREACH id ALM.ID_LIST$
+	#define $id$	$+id$$NL$
+$END$
+$NL$
+#endif /* TOPPERS_KERNEL_CFG_H */$NL$
+
+$ =====================================================================
+$ kernel_cfg.cã®çæ
+$ =====================================================================
+
+$FILE "kernel_cfg.c"$
+/* kernel_cfg.c */$NL$
+#include "kernel/kernel_int.h"$NL$
+#include "kernel_cfg.h"$NL$
+$NL$
+#if TKERNEL_PRID != 0x07u$NL$
+#error The kernel does not match this configuration file.$NL$
+#endif$NL$
+$NL$
+
+$ 
+$  ã¤ã³ã¯ã«ã¼ããã£ã¬ã¯ãã£ãï¼#includeï¼
+$ 
+/*$NL$
+$SPC$*  Include Directives (#include)$NL$
+$SPC$*/$NL$
+$NL$
+$INCLUDES$
+$NL$
+
+$ 
+$  ãªãã¸ã§ã¯ãã®IDçªå·ãä¿æããå¤æ°
+$ 
+$IF USE_EXTERNAL_ID$
+	/*$NL$
+	$SPC$*  Variables for Object ID$NL$
+	$SPC$*/$NL$
+	$NL$
+	$FOREACH id TSK.ID_LIST$
+		const ID $id$_id$SPC$=$SPC$$+id$;$NL$
+	$END$
+	$FOREACH id SEM.ID_LIST$
+		const ID $id$_id$SPC$=$SPC$$+id$;$NL$
+	$END$
+	$FOREACH id FLG.ID_LIST$
+		const ID $id$_id$SPC$=$SPC$$+id$;$NL$
+	$END$
+	$FOREACH id DTQ.ID_LIST$
+		const ID $id$_id$SPC$=$SPC$$+id$;$NL$
+	$END$
+	$FOREACH id PDQ.ID_LIST$
+		const ID $id$_id$SPC$=$SPC$$+id$;$NL$
+	$END$
+	$FOREACH id MBX.ID_LIST$
+		const ID $id$_id$SPC$=$SPC$$+id$;$NL$
+	$END$
+	$FOREACH id MPF.ID_LIST$
+		const ID $id$_id$SPC$=$SPC$$+id$;$NL$
+	$END$
+	$FOREACH id CYC.ID_LIST$
+		const ID $id$_id$SPC$=$SPC$$+id$;$NL$
+	$END$
+	$FOREACH id ALM.ID_LIST$
+		const ID $id$_id$SPC$=$SPC$$+id$;$NL$
+	$END$
+$END$
+
+$
+$  ã¹ã¿ãã¯é åã®ç¢ºä¿é¢æ°
+$
+$IF !ISFUNCTION("ALLOC_STACK")$
+$FUNCTION ALLOC_STACK$
+$	// å¤§ããæ¹ã«ä¸¸ãããµã¤ãºã§ç¢ºä¿ãã
+	static STK_T $ARGV[1]$[COUNT_STK_T($ARGV[2]$)];$NL$
+	$RESULT = FORMAT("ROUND_STK_T(%1%)", ARGV[2])$
+$END$
+$END$
+
+$ 
+$  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+$ 
+/*$NL$
+$SPC$*  Default Definitions of Trace Log Macros$NL$
+$SPC$*/$NL$
+$NL$
+#ifndef LOG_ISR_ENTER$NL$
+#define LOG_ISR_ENTER(intno)$NL$
+#endif /* LOG_ISR_ENTER */$NL$
+$NL$
+#ifndef LOG_ISR_LEAVE$NL$
+#define LOG_ISR_LEAVE(intno)$NL$
+#endif /* LOG_ISR_LEAVE */$NL$
+$NL$
+
+$ 
+$  ã¿ã¹ã¯
+$ 
+/*$NL$
+$SPC$*  Task Management Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ ã¿ã¹ã¯ã1åä»¥ä¸å­å¨ãããã¨ã®ãã§ãã¯
+$IF !LENGTH(TSK.ID_LIST)$
+	$ERROR$$FORMAT(_("no task is registered"))$$END$
+$END$
+
+$ ã¿ã¹ã¯IDçªå·ã®æå¤§å¤
+const ID _kernel_tmax_tskid = (TMIN_TSKID + TNUM_TSKID - 1);$NL$
+$NL$
+
+$ ã¨ã©ã¼ãã§ãã¯
+$FOREACH tskid TSK.ID_LIST$
+$	// tskatrãï¼ï¼»TA_ACTï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+	$IF (TSK.TSKATR[tskid] & ~(TA_ACT|TARGET_TSKATR)) != 0$
+		$ERROR TSK.TEXT_LINE[tskid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "tskatr", TSK.TSKATR[tskid], tskid, "CRE_TSK")$$END$
+	$END$
+
+$	// (TMIN_TPRI <= itskpri && itskpri <= TMAX_TPRI)ã§ãªãå ´åï¼E_PARï¼
+	$IF !(TMIN_TPRI <= TSK.ITSKPRI[tskid] && TSK.ITSKPRI[tskid] <= TMAX_TPRI)$
+		$ERROR TSK.TEXT_LINE[tskid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "itskpri", TSK.ITSKPRI[tskid], tskid, "CRE_TSK")$$END$
+	$END$
+
+$ 	// texatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+	$IF LENGTH(TSK.TEXATR[tskid]) && TSK.TEXATR[tskid] != 0$
+		$ERROR DEF_TEX.TEXT_LINE[tskid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "texatr", TSK.TEXATR[tskid], tskid, "DEF_TEX")$$END$
+	$END$
+$END$
+
+$ ã¹ã¿ãã¯é åã®çæã¨ããã«é¢ããã¨ã©ã¼ãã§ãã¯
+$FOREACH tskid TSK.ID_LIST$
+$	// stkszã0ä»¥ä¸ãï¼ã¿ã¼ã²ããå®ç¾©ã®æå°å¤ï¼TARGET_MIN_STKSZï¼ããã
+$	// å°ããå ´åï¼E_PARï¼
+	$IF TSK.STKSZ[tskid] <= 0 || (TARGET_MIN_STKSZ
+									&& TSK.STKSZ[tskid] < TARGET_MIN_STKSZ)$
+		$ERROR TSK.TEXT_LINE[tskid]$E_PAR: $FORMAT(_("%1% `%2%\' of `%3%\' in %4% is too small"), "stksz", TSK.STKSZ[tskid], tskid, "CRE_TSK")$$END$
+	$END$
+
+$ 	// stkszãã¹ã¿ãã¯é åã®ãµã¤ãºã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	$IF !EQ(TSK.STK[tskid], "NULL") && CHECK_STKSZ_ALIGN
+							&& (TSK.STKSZ[tskid] & (CHECK_STKSZ_ALIGN - 1))$
+		$ERROR TSK.TEXT_LINE[tskid]$E_PAR: $FORMAT(_("%1% `%2%\' of `%3%\' in %4% is not aligned"), "stksz", TSK.STKSZ[tskid], tskid, "CRE_TSK")$$END$
+	$END$
+
+	$IF EQ(TSK.STK[tskid],"NULL")$
+		$TSK.TINIB_STKSZ[tskid] = ALLOC_STACK(CONCAT("_kernel_stack_",
+												tskid), TSK.STKSZ[tskid])$
+		$TSK.TINIB_STK[tskid] = CONCAT("_kernel_stack_", tskid)$
+	$ELSE$
+		$TSK.TINIB_STKSZ[tskid] = FORMAT("(%1%)", TSK.STKSZ[tskid])$
+		$TSK.TINIB_STK[tskid] = FORMAT("(void *)(%1%)", TSK.STK[tskid])$
+	$END$
+$END$
+$NL$
+
+$ ã¿ã¹ã¯åæåãã­ãã¯ã®çæï¼ã¿ã¹ã¯ã¯1åä»¥ä¸å­å¨ããï¼
+const TINIB _kernel_tinib_table[TNUM_TSKID] = {$NL$
+$JOINEACH tskid TSK.ID_LIST ",\n"$
+$	// ã¿ã¹ã¯å±æ§ï¼æ¡å¼µæ
+å ±ï¼èµ·åçªå°ï¼èµ·åæåªå
+åº¦
+	$TAB${
+	$SPC$($TSK.TSKATR[tskid]$), (intptr_t)($TSK.EXINF[tskid]$),
+	$SPC$((TASK)($TSK.TASK[tskid]$)), INT_PRIORITY($TSK.ITSKPRI[tskid]$),
+
+$	// ã¿ã¹ã¯åæåã³ã³ãã­ã¹ããã­ãã¯ï¼ã¹ã¿ãã¯é å
+	$IF USE_TSKINICTXB$
+		$GENERATE_TSKINICTXB(tskid)$
+	$ELSE$
+		$SPC$$TSK.TINIB_STKSZ[tskid]$, $TSK.TINIB_STK[tskid]$,
+	$END$
+
+$	// ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å±æ§ã¨èµ·åçªå°
+	$SPC$($ALT(TSK.TEXATR[tskid],"TA_NULL")$), ($ALT(TSK.TEXRTN[tskid],"NULL")$) }
+$END$$NL$
+};$NL$
+$NL$
+
+$ ã¿ã¹ã¯ç®¡çãã­ãã¯ã®çæ
+TCB _kernel_tcb_table[TNUM_TSKID];$NL$
+$NL$
+
+$ ã¿ã¹ã¯çæé åºãã¼ãã«ã®çæ
+const ID _kernel_torder_table[TNUM_TSKID] = {$NL$
+$TAB$$JOINEACH tskid TSK.ORDER_LIST ", "$$tskid$$END$$NL$
+};$NL$
+$NL$
+
+$ 
+$  ã»ããã©
+$ 
+/*$NL$
+$SPC$*  Semaphore Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ ã»ããã©IDçªå·ã®æå¤§å¤
+const ID _kernel_tmax_semid = (TMIN_SEMID + TNUM_SEMID - 1);$NL$
+$NL$
+
+$ ã»ããã©åæåãã­ãã¯ã®çæ
+$IF LENGTH(SEM.ID_LIST)$
+	const SEMINIB _kernel_seminib_table[TNUM_SEMID] = {$NL$
+	$JOINEACH semid SEM.ID_LIST ",\n"$
+$		// sematrãï¼ï¼»TA_TPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+		$IF (SEM.SEMATR[semid] & ~TA_TPRI) != 0$
+			$ERROR SEM.TEXT_LINE[semid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "sematr", SEM.SEMATR[semid], semid, "CRE_SEM")$$END$
+		$END$
+
+$		// (0 <= isemcnt && isemcnt <= maxsem)ã§ãªãå ´åï¼E_PARï¼
+		$IF !(0 <= SEM.ISEMCNT[semid] && SEM.ISEMCNT[semid] <= SEM.MAXSEM[semid])$
+			$ERROR SEM.TEXT_LINE[semid]$E_PAR: $FORMAT(_("too large %1% `%2%\' of `%3%\' in %4%"), "isemcnt", SEM.ISEMCNT[semid], semid, "CRE_SEM")$$END$
+		$END$
+
+$		// (1 <= maxsem && maxsem <= TMAX_MAXSEM)ã§ãªãå ´åï¼E_PARï¼
+		$IF !(1 <= SEM.MAXSEM[semid] && SEM.MAXSEM[semid] <= TMAX_MAXSEM)$
+			$ERROR SEM.TEXT_LINE[semid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "maxsem", SEM.MAXSEM[semid], semid, "CRE_SEM")$$END$
+		$END$
+
+$		// ã»ããã©åæåãã­ãã¯
+		$TAB${ ($SEM.SEMATR[semid]$), ($SEM.ISEMCNT[semid]$), ($SEM.MAXSEM[semid]$) }
+	$END$$NL$
+	};$NL$
+	$NL$
+
+$	// ã»ããã©ç®¡çãã­ãã¯
+	SEMCB _kernel_semcb_table[TNUM_SEMID];$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const SEMINIB, _kernel_seminib_table);$NL$
+	TOPPERS_EMPTY_LABEL(SEMCB, _kernel_semcb_table);$NL$
+$END$$NL$
+
+$ 
+$  ã¤ãã³ããã©ã°
+$ 
+/*$NL$
+$SPC$*  Eventflag Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ ã¤ãã³ããã©ã°IDçªå·ã®æå¤§å¤
+const ID _kernel_tmax_flgid = (TMIN_FLGID + TNUM_FLGID - 1);$NL$
+$NL$
+
+$ ã¤ãã³ããã©ã°åæåãã­ãã¯ã®çæ
+$IF LENGTH(FLG.ID_LIST)$
+	const FLGINIB _kernel_flginib_table[TNUM_FLGID] = {$NL$
+	$JOINEACH flgid FLG.ID_LIST ",\n"$
+$		// flgatrãï¼ï¼»TA_TPRIï¼½ï½ï¼»TA_WMULï¼½ï½ï¼»TA_CLRï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+		$IF (FLG.FLGATR[flgid] & ~(TA_TPRI|TA_WMUL|TA_CLR)) != 0$
+			$ERROR FLG.TEXT_LINE[flgid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "flgatr", FLG.FLGATR[flgid], flgid, "CRE_FLG")$$END$
+		$END$
+
+$		// iflgptnãFLGPTNã«æ ¼ç´ã§ããªãå ´åï¼E_PARï¼
+		$IF (FLG.IFLGPTN[flgid] & ~((1 << TBIT_FLGPTN) - 1)) != 0$
+			$ERROR FLG.TEXT_LINE[flgid]$E_PAR: $FORMAT(_("too large %1% `%2%\' of `%3%\' in %4%"), "iflgptn", FLG.IFLGPTN[flgid], flgid, "CRE_FLG")$$END$
+		$END$
+
+$		// ã¤ãã³ããã©ã°åæåãã­ãã¯
+		$TAB${ ($FLG.FLGATR[flgid]$), ($FLG.IFLGPTN[flgid]$) }
+	$END$$NL$
+	};$NL$
+	$NL$
+
+$	// ã¤ãã³ããã©ã°ç®¡çãã­ãã¯
+	FLGCB _kernel_flgcb_table[TNUM_FLGID];$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const FLGINIB, _kernel_flginib_table);$NL$
+	TOPPERS_EMPTY_LABEL(FLGCB, _kernel_flgcb_table);$NL$
+$END$$NL$
+
+$ 
+$  ãã¼ã¿ã­ã¥ã¼
+$ 
+/*$NL$
+$SPC$*  Dataqueue Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ ãã¼ã¿ã­ã¥ã¼IDçªå·ã®æå¤§å¤
+const ID _kernel_tmax_dtqid = (TMIN_DTQID + TNUM_DTQID - 1);$NL$
+$NL$
+
+$IF LENGTH(DTQ.ID_LIST)$
+	$FOREACH dtqid DTQ.ID_LIST$
+$		// dtqatrãï¼ï¼»TA_TPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+		$IF (DTQ.DTQATR[dtqid] & ~TA_TPRI) != 0$
+			$ERROR DTQ.TEXT_LINE[dtqid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "dtqatr", DTQ.DTQATR[dtqid], dtqid, "CRE_DTQ")$$END$
+		$END$
+
+$		// dtqcntãè² ã®å ´åï¼E_PARï¼
+		$IF DTQ.DTQCNT[dtqid] < 0$
+			$ERROR DTQ.TEXT_LINE[dtqid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "dtqcnt", DTQ.DTQCNT[dtqid], dtqid, "CRE_DTQ")$$END$
+		$END$
+
+$		// dtqmbãNULLã§ãªãå ´åï¼E_NOSPTï¼
+		$IF !EQ(DTQ.DTQMB[dtqid], "NULL")$
+			$ERROR DTQ.TEXT_LINE[dtqid]$E_NOSPT: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "dtqmb", DTQ.DTQMB[dtqid], dtqid, "CRE_DTQ")$$END$
+		$END$
+
+$		// ãã¼ã¿ã­ã¥ã¼ç®¡çé å
+		$IF DTQ.DTQCNT[dtqid]$
+			static DTQMB _kernel_dtqmb_$dtqid$[$DTQ.DTQCNT[dtqid]$];$NL$
+		$END$
+	$END$
+
+$	// ãã¼ã¿ã­ã¥ã¼åæåãã­ãã¯ã®çæ
+	const DTQINIB _kernel_dtqinib_table[TNUM_DTQID] = {$NL$
+	$JOINEACH dtqid DTQ.ID_LIST ",\n"$
+		$TAB${ ($DTQ.DTQATR[dtqid]$), ($DTQ.DTQCNT[dtqid]$), $IF DTQ.DTQCNT[dtqid]$(_kernel_dtqmb_$dtqid$)$ELSE$NULL$END$ }
+	$END$$NL$
+	};$NL$
+	$NL$
+
+$	// ãã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯
+	DTQCB _kernel_dtqcb_table[TNUM_DTQID];$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const DTQINIB, _kernel_dtqinib_table);$NL$
+	TOPPERS_EMPTY_LABEL(DTQCB, _kernel_dtqcb_table);$NL$
+$END$$NL$
+
+$ 
+$  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼
+$ 
+/*$NL$
+$SPC$*  Priority Dataqueue Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ åªå
+åº¦ãã¼ã¿ã­ã¥ã¼IDçªå·ã®æå¤§å¤
+const ID _kernel_tmax_pdqid = (TMIN_PDQID + TNUM_PDQID - 1);$NL$
+$NL$
+
+$IF LENGTH(PDQ.ID_LIST)$
+	$FOREACH pdqid PDQ.ID_LIST$
+$		// pdqatrãï¼ï¼»TA_TPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+		$IF (PDQ.PDQATR[pdqid] & ~TA_TPRI) != 0$
+			$ERROR PDQ.TEXT_LINE[pdqid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "pdqatr", PDQ.PDQATR[pdqid], pdqid, "CRE_PDQ")$$END$
+		$END$
+
+$		// pdqcntãè² ã®å ´åï¼E_PARï¼
+		$IF PDQ.PDQCNT[pdqid] < 0$
+			$ERROR PDQ.TEXT_LINE[pdqid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "pdqcnt", PDQ.PDQCNT[pdqid], pdqid, "CRE_PDQ")$$END$
+		$END$
+
+$		// (TMIN_DPRI <= maxdpri && maxdpri <= TMAX_DPRI)ã§ãªãå ´åï¼E_PARï¼
+		$IF !(TMIN_DPRI <= PDQ.MAXDPRI[pdqid] && PDQ.MAXDPRI[pdqid] <= TMAX_DPRI)$
+			$ERROR PDQ.TEXT_LINE[pdqid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "maxdpri", PDQ.MAXDPRI[pdqid], pdqid, "CRE_PDQ")$$END$
+		$END$
+
+$		// pdqmbãNULLã§ãªãå ´åï¼E_NOSPTï¼
+		$IF !EQ(PDQ.PDQMB[pdqid], "NULL")$
+			$ERROR PDQ.TEXT_LINE[pdqid]$E_NOSPT: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "pdqmb", PDQ.PDQMB[pdqid], pdqid, "CRE_PDQ")$$END$
+		$END$
+
+$		// åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çé å
+		$IF PDQ.PDQCNT[pdqid]$
+			static PDQMB _kernel_pdqmb_$pdqid$[$PDQ.PDQCNT[pdqid]$];$NL$
+		$END$
+	$END$
+
+$	// åªå
+åº¦ãã¼ã¿ã­ã¥ã¼åæåãã­ãã¯ã®çæ
+	const PDQINIB _kernel_pdqinib_table[TNUM_PDQID] = {$NL$
+	$JOINEACH pdqid PDQ.ID_LIST ",\n"$
+		$TAB${ ($PDQ.PDQATR[pdqid]$), ($PDQ.PDQCNT[pdqid]$), ($PDQ.MAXDPRI[pdqid]$), $IF PDQ.PDQCNT[pdqid]$(_kernel_pdqmb_$pdqid$)$ELSE$NULL$END$ }
+	$END$$NL$
+	};$NL$
+	$NL$
+
+$	// åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯
+	PDQCB _kernel_pdqcb_table[TNUM_PDQID];$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const PDQINIB, _kernel_pdqinib_table);$NL$
+	TOPPERS_EMPTY_LABEL(PDQCB, _kernel_pdqcb_table);$NL$
+$END$$NL$
+
+$ 
+$  ã¡ã¼ã«ããã¯ã¹
+$ 
+/*$NL$
+$SPC$*  Mailbox Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ ã¡ã¼ã«ããã¯ã¹IDçªå·ã®æå¤§å¤
+const ID _kernel_tmax_mbxid = (TMIN_MBXID + TNUM_MBXID - 1);$NL$
+$NL$
+
+$ ã¡ã¼ã«ããã¯ã¹åæåãã­ãã¯ã®çæ
+$IF LENGTH(MBX.ID_LIST)$
+	const MBXINIB _kernel_mbxinib_table[TNUM_MBXID] = {$NL$
+	$JOINEACH mbxid MBX.ID_LIST ",\n"$
+$		// mbxatrãï¼ï¼»TA_TPRIï¼½ï½ï¼»TA_MPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+		$IF (MBX.MBXATR[mbxid] & ~(TA_TPRI|TA_MPRI)) != 0$
+			$ERROR MBX.TEXT_LINE[mbxid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "mbxatr", MBX.MBXATR[mbxid], mbxid, "CRE_MBX")$$END$
+		$END$
+
+$		// (TMIN_MPRI <= maxmpri && maxmpri <= TMAX_MPRI)ã§ãªãå ´åï¼E_PARï¼
+		$IF !(TMIN_MPRI <= MBX.MAXMPRI[mbxid] && MBX.MAXMPRI[mbxid] <= TMAX_MPRI)$
+			$ERROR MBX.TEXT_LINE[mbxid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "maxmpri", MBX.MAXMPRI[mbxid], mbxid, "CRE_MBX")$$END$
+		$END$
+
+$		// mprihdãNULLã§ãªãå ´åï¼E_NOSPTï¼
+		$IF !EQ(MBX.MPRIHD[mbxid], "NULL")$
+			$ERROR MBX.TEXT_LINE[mbxid]$E_NOSPT: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "mprihd", MBX.MPRIHD[mbxid], mbxid, "CRE_MBX")$$END$
+		$END$
+
+$		// ã¡ã¼ã«ããã¯ã¹åæåãã­ãã¯
+		$TAB${ ($MBX.MBXATR[mbxid]$), ($MBX.MAXMPRI[mbxid]$) }
+	$END$$NL$
+	};$NL$
+	$NL$
+
+$	// ã¡ã¼ã«ããã¯ã¹ç®¡çãã­ãã¯
+	MBXCB _kernel_mbxcb_table[TNUM_MBXID];$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const MBXINIB, _kernel_mbxinib_table);$NL$
+	TOPPERS_EMPTY_LABEL(MBXCB, _kernel_mbxcb_table);$NL$
+$END$$NL$
+
+$ 
+$  åºå®é·ã¡ã¢ãªãã¼ã«
+$ 
+/*$NL$
+$SPC$*  Fixed-sized Memorypool Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ åºå®é·ã¡ã¢ãªãã¼ã«IDçªå·ã®æå¤§å¤
+const ID _kernel_tmax_mpfid = (TMIN_MPFID + TNUM_MPFID - 1);$NL$
+$NL$
+
+$IF LENGTH(MPF.ID_LIST)$
+	$FOREACH mpfid MPF.ID_LIST$
+$		// mpfatrãï¼ï¼»TA_TPRIï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+		$IF (MPF.MPFATR[mpfid] & ~TA_TPRI) != 0$
+			$ERROR MPF.TEXT_LINE[mpfid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "mpfatr", MPF.MPFATR[mpfid], mpfid, "CRE_MPF")$$END$
+		$END$
+
+$		// blkcntã0ä»¥ä¸ã®å ´åï¼E_PARï¼
+		$IF MPF.BLKCNT[mpfid] <= 0$
+			$ERROR MPF.TEXT_LINE[mpfid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "blkcnt", MPF.BLKCNT[mpfid], mpfid, "CRE_MPF")$$END$
+		$END$
+
+$		// blkszã0ä»¥ä¸ã®å ´åï¼E_PARï¼
+		$IF MPF.BLKSZ[mpfid] <= 0$
+			$ERROR MPF.TEXT_LINE[mpfid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "blksz", MPF.BLKSZ[mpfid], mpfid, "CRE_MPF")$$END$
+		$END$
+
+$		// åºå®é·ã¡ã¢ãªãã¼ã«é å
+		$IF EQ(MPF.MPF[mpfid], "NULL")$
+			static MPF_T _kernel_mpf_$mpfid$[($MPF.BLKCNT[mpfid]$) * COUNT_MPF_T($MPF.BLKSZ[mpfid]$)];$NL$
+		$END$
+
+$		// mpfmbãNULLã§ãªãå ´åï¼E_NOSPTï¼
+		$IF !EQ(MPF.MPFMB[mpfid], "NULL")$
+			$ERROR MPF.TEXT_LINE[mpfid]$E_NOSPT: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "mpfmb", MPF.MPFMB[mpfid], mpfid, "CRE_MPF")$$END$
+		$END$
+
+$		// åºå®é·ã¡ã¢ãªãã¼ã«ç®¡çé å
+		static MPFMB _kernel_mpfmb_$mpfid$[$MPF.BLKCNT[mpfid]$];$NL$
+	$END$
+
+$	// åºå®é·ã¡ã¢ãªãã¼ã«åæåãã­ãã¯ã®çæ
+	const MPFINIB _kernel_mpfinib_table[TNUM_MPFID] = {$NL$
+	$JOINEACH mpfid MPF.ID_LIST ",\n"$
+		$TAB${ ($MPF.MPFATR[mpfid]$), ($MPF.BLKCNT[mpfid]$), ROUND_MPF_T($MPF.BLKSZ[mpfid]$), $IF EQ(MPF.MPF[mpfid],"NULL")$(_kernel_mpf_$mpfid$)$ELSE$(void *)($MPF.MPF[mpfid]$)$END$, (_kernel_mpfmb_$mpfid$) }
+	$END$$NL$
+	};$NL$
+	$NL$
+
+$	// åºå®é·ã¡ã¢ãªãã¼ã«ç®¡çãã­ãã¯
+	MPFCB _kernel_mpfcb_table[TNUM_MPFID];$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const MPFINIB, _kernel_mpfinib_table);$NL$
+	TOPPERS_EMPTY_LABEL(MPFCB, _kernel_mpfcb_table);$NL$
+$END$$NL$
+
+$ 
+$  å¨æãã³ãã©
+$ 
+/*$NL$
+$SPC$*  Cyclic Handler Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ å¨æãã³ãã©IDçªå·ã®æå¤§å¤
+const ID _kernel_tmax_cycid = (TMIN_CYCID + TNUM_CYCID - 1);$NL$
+$NL$
+
+$ å¨æãã³ãã©åæåãã¼ãã«ã®çæ
+$IF LENGTH(CYC.ID_LIST)$
+	const CYCINIB _kernel_cycinib_table[TNUM_CYCID] = {$NL$
+	$JOINEACH cycid CYC.ID_LIST ",\n"$
+$		// cycatrãï¼ï¼»TA_STAï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+		$IF (CYC.CYCATR[cycid] & ~TA_STA) != 0$
+			$ERROR CYC.TEXT_LINE[cycid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "cycatr", CYC.CYCATR[cycid], cycid, "CRE_CYC")$$END$
+		$END$
+
+$		// (0 < cyctim && cyctim <= TMAX_RELTIM)ã§ãªãå ´åï¼E_PARï¼
+		$IF !(0 < CYC.CYCTIM[cycid] && CYC.CYCTIM[cycid] <= TMAX_RELTIM)$
+			$ERROR CYC.TEXT_LINE[cycid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "cyctim", CYC.CYCTIM[cycid], cycid, "CRE_CYC")$$END$
+		$END$
+
+$		// (0 <= cycphs && cycphs <= TMAX_RELTIM)ã§ãªãå ´åï¼E_PARï¼
+		$IF !(0 <= CYC.CYCPHS[cycid] && CYC.CYCPHS[cycid] <= TMAX_RELTIM)$
+			$ERROR CYC.TEXT_LINE[cycid]$E_PAR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "cycphs", CYC.CYCPHS[cycid], cycid, "CRE_CYC")$$END$
+		$END$
+
+$		// è­¦åï¼cycatrã«TA_STAãè¨­å®ããã¦ãã¦ï¼(cycphs == 0)ã®å ´å
+		$IF (CYC.CYCATR[cycid] & TA_STA) != 0 && CYC.CYCPHS[cycid] == 0$
+			$WARNING CYC.TEXT_LINE[cycid]$$FORMAT(_("%1% is not recommended when %2% is set to %3% in %4%"), "cycphs==0", "TA_STA", "cycatr", "CRE_CYC")$$END$
+		$END$
+
+$		// å¨æãã³ãã©åæåãã­ãã¯
+		$TAB${ ($CYC.CYCATR[cycid]$), (intptr_t)($CYC.EXINF[cycid]$), ($CYC.CYCHDR[cycid]$), ($CYC.CYCTIM[cycid]$), ($CYC.CYCPHS[cycid]$) }
+	$END$$NL$
+	};$NL$
+	$NL$
+
+$	// å¨æãã³ãã©ç®¡çãã­ãã¯
+	CYCCB _kernel_cyccb_table[TNUM_CYCID];$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const CYCINIB, _kernel_cycinib_table);$NL$
+	TOPPERS_EMPTY_LABEL(CYCCB, _kernel_cyccb_table);$NL$
+$END$$NL$
+
+$ 
+$  ã¢ã©ã¼ã ãã³ãã©
+$ 
+/*$NL$
+$SPC$*  Alarm Handler Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ ã¢ã©ã¼ã ãã³ãã©IDçªå·ã®æå¤§å¤
+const ID _kernel_tmax_almid = (TMIN_ALMID + TNUM_ALMID - 1);$NL$
+$NL$
+
+$ ã¢ã©ã¼ã ãã³ãã©åæåãã­ãã¯ã®çæ
+$IF LENGTH(ALM.ID_LIST)$
+	const ALMINIB _kernel_alminib_table[TNUM_ALMID] = {$NL$
+	$JOINEACH almid ALM.ID_LIST ",\n"$
+$		// almatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+		$IF ALM.ALMATR[almid] != 0$
+			$ERROR ALM.TEXT_LINE[almid]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of `%3%\' in %4%"), "almatr", ALM.ALMATR[almid], almid, "CRE_ALM")$$END$
+		$END$
+
+$		// ã¢ã©ã¼ã ãã³ãã©åæåãã­ãã¯
+		$TAB${ ($ALM.ALMATR[almid]$), (intptr_t)($ALM.EXINF[almid]$), ($ALM.ALMHDR[almid]$) }
+	$END$$NL$
+	};$NL$
+	$NL$
+
+$	// ã¢ã©ã¼ã ãã³ãã©ç®¡çãã­ãã¯
+	ALMCB _kernel_almcb_table[TNUM_ALMID];$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const ALMINIB, _kernel_alminib_table);$NL$
+	TOPPERS_EMPTY_LABEL(ALMCB, _kernel_almcb_table);$NL$
+$END$$NL$
+
+$ 
+$  å²è¾¼ã¿ç®¡çæ©è½
+$ 
+/*$NL$
+$SPC$*  Interrupt Management Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ å²è¾¼ã¿çªå·ã¨å²è¾¼ã¿ãã³ãã©çªå·ã®å¤æãã¼ãã«ã®ä½æ
+$IF LENGTH(INTNO_ATTISR_VALID) != LENGTH(INHNO_ATTISR_VALID)$
+	$ERROR$length of `INTNO_ATTISR_VALID' is different from length of `INHNO_ATTISR_VALID'$END$
+$END$
+$i = 0$
+$FOREACH intno INTNO_ATTISR_VALID$
+	$inhno = AT(INHNO_ATTISR_VALID, i)$
+	$INHNO[intno] = inhno$
+	$INTNO[inhno] = intno$
+	$i = i + 1$
+$END$
+
+$ å²è¾¼ã¿è¦æ±ã©ã¤ã³ã«é¢ããã¨ã©ã¼ãã§ãã¯
+$i = 0$
+$FOREACH intno INT.ORDER_LIST$
+$	// intnoãCFG_INTã«å¯¾ããå²è¾¼ã¿çªå·ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	$IF !LENGTH(FIND(INTNO_CFGINT_VALID, INT.INTNO[intno]))$
+		$ERROR INT.TEXT_LINE[intno]$E_PAR: $FORMAT(_("illegal %1% `%2%\' in %3%"), "intno", INT.INTNO[intno], "CFG_INT")$$END$
+	$END$
+
+$	// intnoãCFG_INTã«ãã£ã¦è¨­å®æ¸ã¿ã®å ´åï¼E_OBJï¼
+	$j = 0$
+	$FOREACH intno2 INT.ORDER_LIST$
+		$IF INT.INTNO[intno] == INT.INTNO[intno2] && j < i$
+			$ERROR INT.TEXT_LINE[intno]$E_OBJ: $FORMAT(_("%1% `%2%\' in %3% is duplicated"), "intno", INT.INTNO[intno], "CFG_INT")$$END$
+		$END$
+		$j = j + 1$
+	$END$
+
+$	// intatrãï¼ï¼»TA_ENAINTï¼½ï½ï¼»TA_EDGEï¼½ï¼ã§ãªãå ´åï¼E_RSATRï¼
+	$IF (INT.INTATR[intno] & ~(TA_ENAINT|TA_EDGE|TARGET_INTATR)) != 0$
+		$ERROR INT.TEXT_LINE[intno]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of %3% `%4%\' in %5%"), "intatr", INT.INTATR[intno], "intno", INT.INTNO[intno], "CFG_INT")$$END$
+	$END$
+
+$	// intpriãCFG_INTã«å¯¾ããå²è¾¼ã¿åªå
+åº¦ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	$IF !LENGTH(FIND(INTPRI_CFGINT_VALID, INT.INTPRI[intno]))$
+		$ERROR INT.TEXT_LINE[intno]$E_PAR: $FORMAT(_("illegal %1% `%2%\' in %3%"), "intpri", INT.INTPRI[intno], "CFG_INT")$$END$
+	$END$
+
+$	// ã«ã¼ãã«ç®¡çã«åºå®ããã¦ããintnoã«å¯¾ãã¦ï¼intpriã«TMIN_INTPRI
+$	// ãããå°ããå¤ãæå®ãããå ´åï¼E_OBJï¼
+	$IF LENGTH(FIND(INTNO_FIX_KERNEL, intno))$
+		$IF INT.INTPRI[intno] < TMIN_INTPRI$
+			$ERROR INT.TEXT_LINE[intno]$E_OBJ: $FORMAT(_("%1% `%2%\' must not have higher priority than %3%"), "intno", INT.INTNO[intno], "TMIN_INTPRI")$$END$
+		$END$
+	$END$
+
+$	// ã«ã¼ãã«ç®¡çå¤ã«åºå®ããã¦ããintnoã«å¯¾ãã¦ï¼intpriã«TMIN_INTPRI
+$	// ãããå°ããå¤ãæå®ãããªãã£ãå ´åï¼E_OBJï¼
+	$IF LENGTH(FIND(INTNO_FIX_NONKERNEL, intno))$
+		$IF INT.INTPRI[intno] >= TMIN_INTPRI$
+			$ERROR INT.TEXT_LINE[intno]$E_OBJ: $FORMAT(_("%1% `%2%\' must have higher priority than %3%"), "intno", INT.INTNO[intno], "TMIN_INTPRI")$$END$
+		$END$
+	$END$
+	$i = i + 1$
+$END$
+
+$ å²è¾¼ã¿ãã³ãã©ã«é¢ããã¨ã©ã¼ãã§ãã¯
+$i = 0$
+$FOREACH inhno INH.ORDER_LIST$
+$	// inhnoãDEF_INHã«å¯¾ããå²è¾¼ã¿ãã³ãã©çªå·ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	$IF !LENGTH(FIND(INHNO_DEFINH_VALID, INH.INHNO[inhno]))$
+		$ERROR INH.TEXT_LINE[inhno]$E_PAR: $FORMAT(_("illegal %1% `%2%\' in %3%"), "inhno", INH.INHNO[inhno], "DEF_INH")$$END$
+	$END$
+
+$	// inhnoãDEF_INHã«ãã£ã¦è¨­å®æ¸ã¿ã®å ´åï¼E_OBJï¼
+	$j = 0$
+	$FOREACH inhno2 INH.ORDER_LIST$
+		$IF INH.INHNO[inhno] == INH.INHNO[inhno2] && j < i$
+			$ERROR INH.TEXT_LINE[inhno]$E_OBJ: $FORMAT(_("%1% `%2%\' in %3% is duplicated"), "inhno", INH.INHNO[inhno], "DEF_INH")$$END$
+		$END$
+		$j = j + 1$
+	$END$
+
+$	// inhatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+	$IF (INH.INHATR[inhno] & ~TARGET_INHATR) != 0$
+		$ERROR INH.TEXT_LINE[inhno]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of %3% `%4%\' in %5%"), "inhatr", INH.INHATR[inhno], "inhno", INH.INHNO[inhno], "DEF_INH")$$END$
+	$END$
+
+$	// ã«ã¼ãã«ç®¡çã«åºå®ããã¦ããinhnoã«å¯¾ãã¦ï¼inhatrã«TA_NONKERNEL
+$	//ããæå®ããã¦ããå ´åï¼E_RSATRï¼
+	$IF LENGTH(FIND(INHNO_FIX_KERNEL, inhno))$
+		$IF (INH.INHATR[inhno] & TA_NONKERNEL) != 0$
+			$ERROR INH.TEXT_LINE[inhno]$E_RSATR: $FORMAT(_("%1% `%2%\' must not be non-kernel interrupt"), "inhno", INH.INHNO[inhno])$$END$
+		$END$
+	$END$
+
+$	// ã«ã¼ãã«ç®¡çå¤ã«åºå®ããã¦ããinhnoã«å¯¾ãã¦ï¼inhatrã«TA_NONKERNEL
+$	// ãæå®ããã¦ããªãå ´åï¼E_RSATRï¼
+	$IF LENGTH(FIND(INHNO_FIX_NONKERNEL, inhno))$
+		$IF (INH.INHATR[inhno] & TA_NONKERNEL) == 0$
+			$ERROR INH.TEXT_LINE[inhno]$E_RSATR: $FORMAT(_("%1% `%2%\' must be non-kernel interrupt"), "inhno", INH.INHNO[inhno])$$END$
+		$END$
+	$END$
+
+	$IF LENGTH(INTNO[INH.INHNO[inhno]])$
+		$intno = INTNO[INH.INHNO[inhno]]$
+$		// inhnoã«å¯¾å¿ããintnoã«å¯¾ããCFG_INTããªãå ´åï¼E_OBJï¼
+		$IF !LENGTH(INT.INTNO[intno])$
+			$ERROR INH.TEXT_LINE[inhno]$E_OBJ: $FORMAT(_("%1% `%2%\' corresponding to %3% `%4%\' is not configured with %5%"), "intno", INT.INTNO[intno], "inhno", INH.INHNO[inhno], "CFG_INT")$$END$
+		$ELSE$
+			$IF (INH.INHATR[inhno] & TA_NONKERNEL) == 0$
+$				// inhatrã«TA_NONKERNELãæå®ããã¦ãããï¼inhnoã«å¯¾å¿
+$				// ããintnoã«å¯¾ãã¦CFG_INTã§è¨­å®ãããå²è¾¼ã¿åªå
+åº¦ã
+$				// TMIN_INTPRIãããå°ããå ´åï¼E_OBJï¼
+				$IF INT.INTPRI[intno] < TMIN_INTPRI$
+					$ERROR INT.TEXT_LINE[intno]$E_OBJ: $FORMAT(_("%1% `%2%\' configured for %3% `%4%\' is higher than %5%"), "intpri", INT.INTPRI[intno], "inhno", INH.INHNO[inhno], "TMIN_INTPRI")$$END$
+				$END$
+			$ELSE$
+$				// inhatrã«TA_NONKERNELãæå®ããã¦ããï¼inhnoã«å¯¾å¿
+$				// ããintnoã«å¯¾ãã¦CFG_INTã§è¨­å®ãããå²è¾¼ã¿åªå
+åº¦ã
+$				// TMIN_INTPRIä»¥ä¸ã§ããå ´åï¼E_OBJï¼
+				$IF INT.INTPRI[intno] >= TMIN_INTPRI$
+					$ERROR INT.TEXT_LINE[intno]$E_OBJ: $FORMAT(_("%1% `%2%\' configured for %3% `%4%\' is lower than or equal to %5%"), "intpri", INT.INTPRI[intno], "inhno", INH.INHNO[inhno], "TMIN_INTPRI")$$END$
+				$END$
+			$END$
+		$END$
+	$END$
+	$i = i + 1$
+$END$
+
+$ å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ï¼ISRï¼ã«é¢ããã¨ã©ã¼ãã§ãã¯ã¨å²è¾¼ã¿ãã³ãã©ã®çæ
+$FOREACH order ISR.ORDER_LIST$
+$	// isratrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+	$IF (ISR.ISRATR[order] & ~TARGET_ISRATR) != 0$
+		$ERROR ISR.TEXT_LINE[order]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' in %3%"), "isratr", ISR.ISRATR[order], "ATT_ISR")$$END$
+	$END$
+
+$	// intnoãATT_ISRã«å¯¾ããå²è¾¼ã¿çªå·ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	$IF !LENGTH(FIND(INTNO_ATTISR_VALID, ISR.INTNO[order]))$
+		$ERROR ISR.TEXT_LINE[order]$E_PAR: $FORMAT(_("illegal %1% `%2%\' in %3%"), "intno", ISR.INTNO[order], "ATT_ISR")$$END$
+	$END$
+
+$	// (TMIN_ISRPRI <= isrpri && isrpri <= TMAX_ISRPRI)ã§ãªãå ´åï¼E_PARï¼
+	$IF !(TMIN_ISRPRI <= ISR.ISRPRI[order] && ISR.ISRPRI[order] <= TMAX_ISRPRI)$
+		$ERROR ISR.TEXT_LINE[order]$E_PAR: $FORMAT(_("illegal %1% `%2%\' in %3%"), "isrpri", ISR.ISRPRI[order], "ATT_ISR")$$END$
+	$END$
+$END$
+
+$FOREACH intno INTNO_ATTISR_VALID$
+	$inhno = INHNO[intno]$
+
+$	// å²è¾¼ã¿çªå·intnoã«å¯¾ãã¦ç»é²ãããISRã®ãªã¹ãã®ä½æ
+	$isr_order_list = {}$
+	$FOREACH order ISR.ORDER_LIST$
+		$IF ISR.INTNO[order] == intno$
+			$isr_order_list = APPEND(isr_order_list, order)$
+			$order_for_error = order$
+		$END$
+	$END$
+
+$	// å²è¾¼ã¿çªå·intnoã«å¯¾ãã¦ç»é²ãããISRãå­å¨ããå ´å
+	$IF LENGTH(isr_order_list) > 0$
+$		// intnoã«å¯¾å¿ããinhnoã«å¯¾ãã¦DEF_INHãããå ´åï¼E_OBJï¼
+		$IF LENGTH(INH.INHNO[inhno])$
+			$ERROR ISR.TEXT_LINE[order_for_error]$E_OBJ: $FORMAT(_("%1% `%2%\' in %3% is duplicated with %4% `%5%\'"), "intno", ISR.INTNO[order_for_error], "ATT_ISR", "inhno", INH.INHNO[inhno])$$END$
+		$END$
+
+$		// intnoã«å¯¾ããCFG_INTããªãå ´åï¼E_OBJï¼
+		$IF !LENGTH(INT.INTNO[intno])$
+			$ERROR ISR.TEXT_LINE[order_for_error]$E_OBJ: $FORMAT(_("%1% `%2%\' is not configured with %3%"), "intno", ISR.INTNO[order_for_error], "CFG_INT")$$END$
+		$ELSE$
+$			// intnoã«å¯¾ãã¦CFG_INTã§è¨­å®ãããå²è¾¼ã¿åªå
+åº¦ãTMIN_INTPRI
+$			// ãããå°ããå ´åï¼E_OBJï¼
+			$IF INT.INTPRI[intno] < TMIN_INTPRI$
+				$ERROR INT.TEXT_LINE[intno]$E_OBJ: $FORMAT(_("%1% `%2%\' configured for %3% `%4%\' is higher than %5%"), "intpri", INT.INTPRI[intno], "intno", ISR.INTNO[order_for_error], "TMIN_INTPRI")$$END$
+			$END$
+		$END$
+
+$		// DEF_INH(inhno, { TA_NULL, _kernel_inthdr_<intno> } );
+		$INH.INHNO[inhno] = inhno$
+		$INH.INHATR[inhno] = VALUE("TA_NULL", 0)$
+		$INH.INTHDR[inhno] = CONCAT("_kernel_inthdr_", intno)$
+		$INH.ORDER_LIST = APPEND(INH.ORDER_LIST, inhno)$
+
+$		// ISRç¨ã®å²è¾¼ã¿ãã³ãã©
+		void$NL$
+		_kernel_inthdr_$intno$(void)$NL$
+		{$NL$
+		$IF LENGTH(isr_order_list) > 1$
+			$TAB$PRI	saved_ipm;$NL$
+			$NL$
+			$TAB$i_begin_int($intno$);$NL$
+			$TAB$saved_ipm = i_get_ipm();$NL$
+		$ELSE$
+			$TAB$i_begin_int($intno$);$NL$
+		$END$
+$		// ISRãåªå
+åº¦é ã«å¼ã³åºã
+		$JOINEACH order SORT(isr_order_list, "ISR.ISRPRI") "\tif (i_sense_lock()) {\n\t\ti_unlock_cpu();\n\t}\n\ti_set_ipm(saved_ipm);\n"$
+			$TAB$LOG_ISR_ENTER($intno$);$NL$
+			$TAB$((ISR)($ISR.ISR[order]$))((intptr_t)($ISR.EXINF[order]$));$NL$
+			$TAB$LOG_ISR_LEAVE($intno$);$NL$
+		$END$
+		$TAB$i_end_int($intno$);$NL$
+		}$NL$
+	$END$
+$END$
+$NL$
+
+$ 
+$  å²è¾¼ã¿ç®¡çæ©è½ã®ããã®æ¨æºçãªåæåæ
+å ±ã®çæ
+$ 
+$ å²è¾¼ã¿ãã³ãã©ã®åæåã«å¿
+è¦ãªæ
+å ±
+$IF !OMIT_INITIALIZE_INTERRUPT || ALT(USE_INHINIB_TABLE,0)$
+
+$ å²è¾¼ã¿ãã³ãã©æ°
+#define TNUM_INHNO	$LENGTH(INH.ORDER_LIST)$$NL$
+const uint_t _kernel_tnum_inhno = TNUM_INHNO;$NL$
+$NL$
+$FOREACH inhno INH.ORDER_LIST$
+	$IF (INH.INHATR[inhno] & TA_NONKERNEL) == 0$
+		INTHDR_ENTRY($INH.INHNO[inhno]$, $+INH.INHNO[inhno]$, $INH.INTHDR[inhno]$)$NL$
+	$END$
+$END$
+$NL$
+
+$ å²è¾¼ã¿ãã³ãã©åæåãã¼ãã«
+$IF LENGTH(INH.ORDER_LIST)$
+	const INHINIB _kernel_inhinib_table[TNUM_INHNO] = {$NL$
+	$JOINEACH inhno INH.ORDER_LIST ",\n"$
+		$IF (INH.INHATR[inhno] & TA_NONKERNEL) == 0$
+			$TAB${ ($INH.INHNO[inhno]$), ($INH.INHATR[inhno]$), (FP)(INT_ENTRY($INH.INHNO[inhno]$, $INH.INTHDR[inhno]$)) }
+		$ELSE$
+			$TAB${ ($INH.INHNO[inhno]$), ($INH.INHATR[inhno]$), (FP)($INH.INTHDR[inhno]$) }
+		$END$
+	$END$$NL$
+	};$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const INHINIB, _kernel_inhinib_table);$NL$
+$END$$NL$
+$END$
+
+$ å²è¾¼ã¿è¦æ±ã©ã¤ã³ã®åæåã«å¿
+è¦ãªæ
+å ±
+$IF !OMIT_INITIALIZE_INTERRUPT || ALT(USE_INTINIB_TABLE,0)$
+
+$ å²è¾¼ã¿è¦æ±ã©ã¤ã³æ°
+#define TNUM_INTNO	$LENGTH(INT.ORDER_LIST)$$NL$
+const uint_t _kernel_tnum_intno = TNUM_INTNO;$NL$
+$NL$
+
+$ å²è¾¼ã¿è¦æ±ã©ã¤ã³åæåãã¼ãã«
+$IF LENGTH(INT.ORDER_LIST)$
+	const INTINIB _kernel_intinib_table[TNUM_INTNO] = {$NL$
+	$JOINEACH intno INT.ORDER_LIST ",\n"$
+		$TAB${ ($INT.INTNO[intno]$), ($INT.INTATR[intno]$), ($INT.INTPRI[intno]$) }
+	$END$$NL$
+	};$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const INTINIB, _kernel_intinib_table);$NL$
+$END$$NL$
+$END$
+
+$ 
+$  CPUä¾å¤ç®¡çæ©è½
+$ 
+/*$NL$
+$SPC$*  CPU Exception Management Functions$NL$
+$SPC$*/$NL$
+$NL$
+
+$ CPUä¾å¤ãã³ãã©ã«é¢ããã¨ã©ã¼ãã§ãã¯
+$i = 0$
+$FOREACH excno EXC.ORDER_LIST$
+$	// excnoãDEF_EXCã«å¯¾ããCPUä¾å¤ãã³ãã©çªå·ã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	$IF !LENGTH(FIND(EXCNO_DEFEXC_VALID, EXC.EXCNO[excno]))$
+		$ERROR EXC.TEXT_LINE[excno]$E_PAR: $FORMAT(_("illegal %1% `%2%\' in %3%"), "excno", EXC.EXCNO[excno], "DEF_EXC")$$END$
+	$END$
+
+$	// excnoãDEF_EXCã«ãã£ã¦è¨­å®æ¸ã¿ã®å ´åï¼E_OBJï¼
+	$j = 0$
+	$FOREACH excno2 EXC.ORDER_LIST$
+		$IF EXC.EXCNO[excno] == EXC.EXCNO[excno2] && j < i$
+			$ERROR EXC.TEXT_LINE[excno]$E_OBJ: $FORMAT(_("%1% `%2%\' in %3% is duplicated"), "excno", EXC.EXCNO[excno], "DEF_EXC")$$END$
+		$END$
+		$j = j + 1$
+	$END$
+
+$	// excatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+	$IF (EXC.EXCATR[excno] & ~TARGET_EXCATR) != 0$
+		$ERROR EXC.TEXT_LINE[excno]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of %3% `%4%\' in %5%"), "excatr", EXC.EXCATR[excno], "excno", EXC.EXCNO[excno], "DEF_EXC")$$END$
+	$END$
+	$i = i + 1$
+$END$
+
+$ CPUä¾å¤ãã³ãã©ã®ããã®æ¨æºçãªåæåæ
+å ±ã®çæ
+$IF !OMIT_INITIALIZE_EXCEPTION$
+
+$ CPUä¾å¤ãã³ãã©æ°
+#define TNUM_EXCNO	$LENGTH(EXC.ORDER_LIST)$$NL$
+const uint_t _kernel_tnum_excno = TNUM_EXCNO;$NL$
+$NL$
+$FOREACH excno EXC.ORDER_LIST$
+	EXCHDR_ENTRY($EXC.EXCNO[excno]$, $+EXC.EXCNO[excno]$, $EXC.EXCHDR[excno]$)$NL$
+$END$
+$NL$
+
+$ CPUä¾å¤ãã³ãã©åæåãã¼ãã«
+$IF LENGTH(EXC.ORDER_LIST)$
+	const EXCINIB _kernel_excinib_table[TNUM_EXCNO] = {$NL$
+	$JOINEACH excno EXC.ORDER_LIST ",\n"$
+		$TAB${ ($EXC.EXCNO[excno]$), ($EXC.EXCATR[excno]$), (FP)(EXC_ENTRY($EXC.EXCNO[excno]$, $EXC.EXCHDR[excno]$)) }
+	$END$$NL$
+	};$NL$
+$ELSE$
+	TOPPERS_EMPTY_LABEL(const EXCINIB, _kernel_excinib_table);$NL$
+$END$$NL$
+$END$
+
+$ 
+$  éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é å
+$ 
+/*$NL$
+$SPC$*  Stack Area for Non-task Context$NL$
+$SPC$*/$NL$
+$NL$
+
+$IF !LENGTH(ICS.ORDER_LIST)$
+$	// DEF_ICSããªãå ´åã®ããã©ã«ãå¤ã®è¨­å®
+	#ifdef DEFAULT_ISTK$NL$
+	$NL$
+	#define TOPPERS_ISTKSZ		DEFAULT_ISTKSZ$NL$
+	#define TOPPERS_ISTK		DEFAULT_ISTK$NL$
+	$NL$
+	#else /* DEAULT_ISTK */$NL$
+	$NL$
+	$istksz = ALLOC_STACK("_kernel_istack", "DEFAULT_ISTKSZ")$$NL$
+	#define TOPPERS_ISTKSZ		$istksz$$NL$
+	#define TOPPERS_ISTK		_kernel_istack$NL$
+	$NL$
+	#endif /* DEAULT_ISTK */$NL$
+$ELSE$
+
+$	// éçAPIãDEF_ICSããè¤æ°ããï¼E_OBJï¼
+	$IF LENGTH(ICS.ORDER_LIST) > 1$
+		$ERROR$E_OBJ: $FORMAT(_("too many %1%"), "DEF_ICS")$$END$
+	$END$
+
+$	// istkszã0ä»¥ä¸ãï¼ã¿ã¼ã²ããå®ç¾©ã®æå°å¤ï¼TARGET_MIN_ISTKSZï¼ããã
+$	// å°ããå ´åï¼E_PARï¼
+	$IF ICS.ISTKSZ[1] <= 0 || (TARGET_MIN_ISTKSZ
+									&& ICS.ISTKSZ[1] < TARGET_MIN_ISTKSZ)$
+		$ERROR ICS.TEXT_LINE[1]$E_PAR: $FORMAT(_("%1% `%2%\' in %3% is too small"), "istksz", ICS.ISTKSZ[1], "DEF_ICS")$$END$
+	$END$
+
+$ 	// istkszãã¹ã¿ãã¯é åã®ãµã¤ãºã¨ãã¦æ­£ãããªãå ´åï¼E_PARï¼
+	$IF !EQ(ICS.ISTK[1], "NULL") && CHECK_STKSZ_ALIGN
+							&& (ICS.ISTKSZ[1] & (CHECK_STKSZ_ALIGN - 1))$
+		$ERROR ICS.TEXT_LINE[1]$E_PAR: $FORMAT(_("%1% `%2%\' in %3% is not aligned"), "istksz", ICS.ISTKSZ[1], "DEF_ICS")$$END$
+	$END$
+
+	$IF EQ(ICS.ISTK[1], "NULL")$
+$		// ã¹ã¿ãã¯é åã®èªåå²ä»ã
+		$istksz = ALLOC_STACK("_kernel_istack", ICS.ISTKSZ[1])$$NL$
+		#define TOPPERS_ISTKSZ		$istksz$$NL$
+		#define TOPPERS_ISTK		_kernel_istack$NL$
+	$ELSE$
+		#define TOPPERS_ISTKSZ		($ICS.ISTKSZ[1]$)$NL$
+		#define TOPPERS_ISTK		(void *)($ICS.ISTK[1]$)$NL$
+	$END$
+$END$
+$NL$
+
+$ éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é å
+const SIZE		_kernel_istksz = TOPPERS_ISTKSZ;$NL$
+STK_T *const	_kernel_istk = TOPPERS_ISTK;$NL$
+$NL$
+#ifdef TOPPERS_ISTKPT$NL$
+STK_T *const	_kernel_istkpt = TOPPERS_ISTKPT(TOPPERS_ISTK, TOPPERS_ISTKSZ);$NL$
+#endif /* TOPPERS_ISTKPT */$NL$
+$NL$
+
+$ 
+$  ã¿ã¤ã ã¤ãã³ãç®¡ç
+$ 
+/*$NL$
+$SPC$*  Time Event Management$NL$
+$SPC$*/$NL$
+$NL$
+TMEVTN   _kernel_tmevt_heap[TNUM_TSKID + TNUM_CYCID + TNUM_ALMID];$NL$
+$NL$
+
+$ 
+$  åã¢ã¸ã¥ã¼ã«ã®åæåé¢æ°
+$ 
+/*$NL$
+$SPC$*  Module Initialization Function$NL$
+$SPC$*/$NL$
+$NL$
+void$NL$
+_kernel_initialize_object(void)$NL$
+{$NL$
+$TAB$_kernel_initialize_task();$NL$
+$IF LENGTH(SEM.ID_LIST)$$TAB$_kernel_initialize_semaphore();$NL$$END$
+$IF LENGTH(FLG.ID_LIST)$$TAB$_kernel_initialize_eventflag();$NL$$END$
+$IF LENGTH(DTQ.ID_LIST)$$TAB$_kernel_initialize_dataqueue();$NL$$END$
+$IF LENGTH(PDQ.ID_LIST)$$TAB$_kernel_initialize_pridataq();$NL$$END$
+$IF LENGTH(MBX.ID_LIST)$$TAB$_kernel_initialize_mailbox();$NL$$END$
+$IF LENGTH(MPF.ID_LIST)$$TAB$_kernel_initialize_mempfix();$NL$$END$
+$IF LENGTH(CYC.ID_LIST)$$TAB$_kernel_initialize_cyclic();$NL$$END$
+$IF LENGTH(ALM.ID_LIST)$$TAB$_kernel_initialize_alarm();$NL$$END$
+$TAB$_kernel_initialize_interrupt();$NL$
+$TAB$_kernel_initialize_exception();$NL$
+}$NL$
+$NL$
+
+$ 
+$  åæåã«ã¼ãã³ã®å®è¡é¢æ°
+$ 
+/*$NL$
+$SPC$*  Initialization Routine$NL$
+$SPC$*/$NL$
+$NL$
+void$NL$
+_kernel_call_inirtn(void)$NL$
+{$NL$
+$FOREACH order INI.ORDER_LIST$
+$ 	// iniatrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+	$IF INI.INIATR[order] != 0$
+		$ERROR INI.TEXT_LINE[order]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of %3% `%4%\' in %5%"), "iniatr", INI.INIATR[order], "inirtn", INI.INIRTN[order], "ATT_INI")$$END$
+	$END$
+	$TAB$((INIRTN)($INI.INIRTN[order]$))((intptr_t)($INI.EXINF[order]$));$NL$
+$END$
+}$NL$
+$NL$
+
+$ 
+$  çµäºå¦çã«ã¼ãã³ã®å®è¡é¢æ°
+$ 
+/*$NL$
+$SPC$*  Termination Routine$NL$
+$SPC$*/$NL$
+$NL$
+void$NL$
+_kernel_call_terrtn(void)$NL$
+{$NL$
+$FOREACH rorder TER.RORDER_LIST$
+$ 	// teratrãï¼TA_NULLï¼ã§ãªãå ´åï¼E_RSATRï¼
+	$IF TER.TERATR[rorder] != 0$
+		$ERROR TER.TEXT_LINE[rorder]$E_RSATR: $FORMAT(_("illegal %1% `%2%\' of %3% `%4%\' in %5%"), "teratr", TER.TERATR[rorder], "terrtn", TER.TERRTN[rorder], "ATT_TER")$$END$
+	$END$
+	$TAB$((TERRTN)($TER.TERRTN[rorder]$))((intptr_t)($TER.EXINF[rorder]$));$NL$
+$END$
+}$NL$
+$NL$
Index: rtos_arduino/trunk/asp_1.9.2/kernel/kernel_api.csv
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/kernel_api.csv	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/kernel_api.csv	(revision 136)
@@ -0,0 +1,17 @@
+tsk,CRE_TSK,#tskid { .tskatr &exinf &task +itskpri .stksz &stk },,
+tsk,DEF_TEX,%tskid { .texatr &texrtn },0,1
+sem,CRE_SEM,#semid { .sematr .isemcnt .maxsem },,
+flg,CRE_FLG,#flgid { .flgatr .iflgptn },,
+dtq,CRE_DTQ,#dtqid { .dtqatr .dtqcnt &dtqmb },,
+pdq,CRE_PDQ,#pdqid { .pdqatr .pdqcnt +maxdpri &pdqmb },,
+mbx,CRE_MBX,#mbxid { .mbxatr +maxmpri &mprihd },,
+mpf,CRE_MPF,#mpfid { .mpfatr .blkcnt .blksz &mpf &mpfmb },,
+cyc,CRE_CYC,#cycid { .cycatr &exinf &cychdr .cyctim .cycphs },,
+alm,CRE_ALM,#almid { .almatr &exinf &almhdr },,
+int,CFG_INT,.intno { .intatr +intpri },,
+isr,ATT_ISR,{ .isratr &exinf .intno &isr +isrpri },-1,
+inh,DEF_INH,.inhno { .inhatr &inthdr },,
+exc,DEF_EXC,.excno { .excatr &exchdr },,
+ics,DEF_ICS,{ .istksz &istk },-1,
+ini,ATT_INI,{ .iniatr &exinf &inirtn },-1,
+ter,ATT_TER,{ .teratr &exinf &terrtn },-1,
Index: rtos_arduino/trunk/asp_1.9.2/kernel/kernel_check.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/kernel_check.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/kernel_check.tf	(revision 136)
@@ -0,0 +1,206 @@
+$ ======================================================================
+$ 
+$   TOPPERS/ASP Kernel
+$       Toyohashi Open Platform for Embedded Real-Time Systems/
+$       Advanced Standard Profile Kernel
+$ 
+$   Copyright (C) 2008-2013 by Embedded and Real-Time Systems Laboratory
+$               Graduate School of Information Science, Nagoya Univ., JAPAN
+$  
+$   ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+$   ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+$   å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+$   (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+$       æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+$       ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+$   (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+$       ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+$       è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+$       ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+$   (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+$       ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+$       ã¨ï¼
+$     (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+$         ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+$     (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+$         å ±åãããã¨ï¼
+$   (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+$       å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+$       ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+$       ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+$       å
+è²¬ãããã¨ï¼
+$  
+$   æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+$   ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+$   ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+$   ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+$   ã®è²¬ä»»ãè² ããªãï¼
+$ 
+$   @(#) $Id: kernel_check.tf 2526 2013-09-16 01:32:30Z ertl-hiro $
+$  
+$ =====================================================================
+
+$
+$  ãã¼ã¿ã»ã¯ã·ã§ã³ã®LMAããVMAã¸ã®ã³ãã¼
+$
+$FOREACH lma LMA.ORDER_LIST$
+	$start_data = SYMBOL(LMA.START_DATA[lma])$
+	$end_data = SYMBOL(LMA.END_DATA[lma])$
+	$start_idata = SYMBOL(LMA.START_IDATA[lma])$
+	$IF !LENGTH(start_data)$
+		$ERROR$$FORMAT(_("symbol '%1%' not found"), LMA.START_DATA[lma])$$END$
+	$ELIF !LENGTH(end_data)$
+		$ERROR$$FORMAT(_("symbol '%1%' not found"), LMA.END_DATA[lma])$$END$
+	$ELIF !LENGTH(start_idata)$
+		$ERROR$$FORMAT(_("symbol '%1%' not found"), LMA.START_IDATA[lma])$$END$
+	$ELSE$
+		$BCOPY(start_idata, start_data, end_data - start_data)$
+	$END$
+$END$
+
+$ 
+$  é¢æ°ã®å
+é ­çªå°ã®ãã§ãã¯
+$ 
+$IF CHECK_FUNC_ALIGN || CHECK_FUNC_NONNULL$
+$	// ã¿ã¹ã¯ã¨ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å
+é ­çªå°ã®ãã§ãã¯
+	$tinib = SYMBOL("_kernel_tinib_table")$
+	$FOREACH tskid TSK.ID_LIST$
+		$task = PEEK(tinib + offsetof_TINIB_task, sizeof_FP)$
+		$IF CHECK_FUNC_ALIGN && (task & (CHECK_FUNC_ALIGN - 1)) != 0$
+			$ERROR TSK.TEXT_LINE[tskid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is not aligned"),
+				"task", TSK.TASK[tskid], tskid, "CRE_TSK")$$END$
+		$END$
+		$IF CHECK_FUNC_NONNULL && task == 0$
+			$ERROR TSK.TEXT_LINE[tskid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is null"),
+				"task", TSK.TASK[tskid], tskid, "CRE_TSK")$$END$
+		$END$
+		$texrtn = PEEK(tinib + offsetof_TINIB_texrtn, sizeof_FP)$
+		$IF CHECK_FUNC_ALIGN && (texrtn & (CHECK_FUNC_ALIGN - 1)) != 0$
+			$ERROR DEF_TEX.TEXT_LINE[tskid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is not aligned"),
+				"texrtn", TSK.TEXRTN[tskid], tskid, "DEF_TEX")$$END$
+		$END$
+		$tinib = tinib + sizeof_TINIB$
+	$END$
+
+$	// å¨æãã³ãã©ã®å
+é ­çªå°ã®ãã§ãã¯
+	$cycinib = SYMBOL("_kernel_cycinib_table")$
+	$FOREACH cycid CYC.ID_LIST$
+		$cychdr = PEEK(cycinib + offsetof_CYCINIB_cychdr, sizeof_FP)$
+		$IF CHECK_FUNC_ALIGN && (cychdr & (CHECK_FUNC_ALIGN - 1)) != 0$
+			$ERROR CYC.TEXT_LINE[cycid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is not aligned"),
+				"cychdr", CYC.CYCHDR[cycid], cycid, "CRE_CYC")$$END$
+		$END$
+		$IF CHECK_FUNC_NONNULL && cychdr == 0$
+			$ERROR CYC.TEXT_LINE[cycid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is null"),
+				"cychdr", CYC.CYCHDR[cycid], cycid, "CRE_CYC")$$END$
+		$END$
+		$cycinib = cycinib + sizeof_CYCINIB$
+	$END$
+
+$	// ã¢ã©ã¼ã ãã³ãã©ã®å
+é ­çªå°ã®ãã§ãã¯
+	$alminib = SYMBOL("_kernel_alminib_table")$
+	$FOREACH almid ALM.ID_LIST$
+		$almhdr = PEEK(alminib + offsetof_ALMINIB_almhdr, sizeof_FP)$
+		$IF CHECK_FUNC_ALIGN && (almhdr & (CHECK_FUNC_ALIGN - 1)) != 0$
+			$ERROR ALM.TEXT_LINE[almid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is not aligned"),
+				"almhdr", ALM.ALMHDR[almid], almid, "CRE_ALM")$$END$
+		$END$
+		$IF CHECK_FUNC_NONNULL && almhdr == 0$
+			$ERROR ALM.TEXT_LINE[almid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is null"),
+				"almhdr", ALM.ALMHDR[almid], almid, "CRE_ALM")$$END$
+		$END$
+		$alminib = alminib + sizeof_ALMINIB$
+	$END$
+$END$
+
+$ 
+$  ã¹ã¿ãã¯é åã®å
+é ­çªå°ã®ãã§ãã¯
+$ 
+$IF CHECK_STACK_ALIGN || CHECK_STACK_NONNULL$
+$	// ã¿ã¹ã¯ã®ã¹ã¿ãã¯é åã®å
+é ­çªå°ã®ãã§ãã¯
+	$tinib = SYMBOL("_kernel_tinib_table")$
+	$FOREACH tskid TSK.ID_LIST$
+		$IF USE_TSKINICTXB$
+			$stk = GET_STK_TSKINICTXB(tinib)$
+		$ELSE$
+			$stk = PEEK(tinib + offsetof_TINIB_stk, sizeof_void_ptr)$
+		$END$
+		$IF CHECK_STACK_ALIGN && (stk & (CHECK_STACK_ALIGN - 1)) != 0$
+			$ERROR TSK.TEXT_LINE[tskid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is not aligned"),
+				"stk", TSK.STK[tskid], tskid, "CRE_TSK")$$END$
+		$END$
+		$IF CHECK_STACK_NONNULL && stk == 0$
+			$ERROR TSK.TEXT_LINE[tskid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is null"),
+				"stk", TSK.STK[tskid], tskid, "CRE_TSK")$$END$
+		$END$
+		$tinib = tinib + sizeof_TINIB$
+	$END$
+
+$	// éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã®å
+é ­çªå°ã®ãã§ãã¯
+	$istk = PEEK(SYMBOL("_kernel_istk"), sizeof_void_ptr)$
+	$IF CHECK_STACK_ALIGN && (istk & (CHECK_STACK_ALIGN - 1)) != 0$
+		$ERROR ICS.TEXT_LINE[1]$E_PAR: 
+			$FORMAT(_("%1% `%2%\' in %3% is not aligned"),
+			"istk", ICS.ISTK[1], "DEF_ICS")$$END$
+	$END$
+	$IF CHECK_STACK_NONNULL && istk == 0$
+		$ERROR ICS.TEXT_LINE[1]$E_PAR: 
+			$FORMAT(_("%1% `%2%\' in %3% is null"),
+			"istk", ICS.ISTK[1], "DEF_ICS")$$END$
+	$END$
+$END$
+
+$ 
+$  åºå®é·ã¡ã¢ãªãã¼ã«é åã®å
+é ­çªå°ã®ãã§ãã¯
+$ 
+$IF CHECK_MPF_ALIGN || CHECK_MPF_NONNULL$
+$	// åºå®é·ã¡ã¢ãªãã¼ã«é åã®å
+é ­çªå°ã®ãã§ãã¯
+	$mpfinib = SYMBOL("_kernel_mpfinib_table")$
+	$FOREACH mpfid MPF.ID_LIST$
+		$mpf = PEEK(mpfinib + offsetof_MPFINIB_mpf, sizeof_void_ptr)$
+		$IF CHECK_MPF_ALIGN && (mpf & (CHECK_MPF_ALIGN - 1)) != 0$
+			$ERROR MPF.TEXT_LINE[mpfid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is not aligned"),
+				"mpf", MPF.MPF[mpfid], mpfid, "CRE_MPF")$$END$
+		$END$
+		$IF CHECK_MPF_NONNULL && mpf == 0$
+			$ERROR MPF.TEXT_LINE[mpfid]$E_PAR: 
+				$FORMAT(_("%1% `%2%\' of `%3%\' in %4% is null"),
+				"mpf", MPF.MPF[mpfid], mpfid, "CRE_MPF")$$END$
+		$END$
+		$mpfinib = mpfinib + sizeof_MPFINIB$
+	$END$
+$END$
Index: rtos_arduino/trunk/asp_1.9.2/kernel/kernel_def.csv
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/kernel_def.csv	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/kernel_def.csv	(revision 136)
@@ -0,0 +1,111 @@
+SIL_ENDIAN_BIG,#defined(SIL_ENDIAN_BIG)
+SIL_ENDIAN_LITTLE,#defined(SIL_ENDIAN_LITTLE)
+TA_NULL,TA_NULL
+TA_ACT,TA_ACT
+TA_TPRI,TA_TPRI
+TA_MPRI,TA_MPRI
+TA_WMUL,TA_WMUL
+TA_CLR,TA_CLR
+TA_STA,TA_STA
+TA_NONKERNEL,TA_NONKERNEL
+TA_ENAINT,TA_ENAINT
+TA_EDGE,TA_EDGE
+TMIN_TPRI,TMIN_TPRI,signed
+TMAX_TPRI,TMAX_TPRI,signed
+TMIN_DPRI,TMIN_DPRI,signed
+TMAX_DPRI,TMAX_DPRI,signed
+TMIN_MPRI,TMIN_MPRI,signed
+TMAX_MPRI,TMAX_MPRI,signed
+TMIN_ISRPRI,TMIN_ISRPRI,signed
+TMAX_ISRPRI,TMAX_ISRPRI,signed
+TBIT_TEXPTN,TBIT_TEXPTN
+TBIT_FLGPTN,TBIT_FLGPTN
+TMAX_MAXSEM,TMAX_MAXSEM
+TMAX_RELTIM,TMAX_RELTIM
+TMIN_INTPRI,TMIN_INTPRI,signed
+OMIT_INITIALIZE_INTERRUPT,#defined(OMIT_INITIALIZE_INTERRUPT)
+OMIT_INITIALIZE_EXCEPTION,#defined(OMIT_INITIALIZE_EXCEPTION)
+USE_TSKINICTXB,#defined(USE_TSKINICTXB)
+TARGET_TSKATR,#defined(TARGET_TSKATR),,TARGET_TSKATR
+TARGET_INTATR,#defined(TARGET_INTATR),,TARGET_INTATR
+TARGET_INHATR,#defined(TARGET_INHATR),,TARGET_INHATR
+TARGET_ISRATR,#defined(TARGET_ISRATR),,TARGET_ISRATR
+TARGET_EXCATR,#defined(TARGET_EXCATR),,TARGET_EXCATR
+TARGET_MIN_STKSZ,#defined(TARGET_MIN_STKSZ),,TARGET_MIN_STKSZ
+TARGET_MIN_ISTKSZ,#defined(TARGET_MIN_ISTKSZ),,TARGET_MIN_ISTKSZ
+CHECK_STKSZ_ALIGN,#defined(CHECK_STKSZ_ALIGN),,CHECK_STKSZ_ALIGN
+CHECK_FUNC_ALIGN,#defined(CHECK_FUNC_ALIGN),,CHECK_FUNC_ALIGN
+CHECK_FUNC_NONNULL,#defined(CHECK_FUNC_NONNULL)
+CHECK_STACK_ALIGN,#defined(CHECK_STACK_ALIGN),,CHECK_STACK_ALIGN
+CHECK_STACK_NONNULL,#defined(CHECK_STACK_NONNULL)
+CHECK_MPF_ALIGN,#defined(CHECK_MPF_ALIGN),,CHECK_MPF_ALIGN
+CHECK_MPF_NONNULL,#defined(CHECK_MPF_NONNULL)
+sizeof_ID,sizeof(ID)
+sizeof_uint_t,sizeof(uint_t)
+sizeof_SIZE,sizeof(SIZE)
+sizeof_ATR,sizeof(ATR)
+sizeof_PRI,sizeof(PRI)
+sizeof_void_ptr,sizeof(void*)
+sizeof_VP,sizeof(void*)
+sizeof_intptr_t,sizeof(intptr_t)
+sizeof_FP,sizeof(FP)
+sizeof_INHNO,sizeof(INHNO)
+sizeof_INTNO,sizeof(INTNO)
+sizeof_EXCNO,sizeof(EXCNO)
+sizeof_TINIB,sizeof(TINIB)
+offsetof_TINIB_tskatr,"offsetof(TINIB,tskatr)"
+offsetof_TINIB_exinf,"offsetof(TINIB,exinf)"
+offsetof_TINIB_task,"offsetof(TINIB,task)"
+offsetof_TINIB_ipriority,"offsetof(TINIB,ipriority)"
+offsetof_TINIB_stksz,#!defined(USE_TSKINICTXB),,"offsetof(TINIB,stksz)"
+offsetof_TINIB_stk,#!defined(USE_TSKINICTXB),,"offsetof(TINIB,stk)"
+offsetof_TINIB_texatr,"offsetof(TINIB,texatr)"
+offsetof_TINIB_texrtn,"offsetof(TINIB,texrtn)"
+sizeof_SEMINIB,sizeof(SEMINIB)
+offsetof_SEMINIB_sematr,"offsetof(SEMINIB,sematr)"
+offsetof_SEMINIB_isemcnt,"offsetof(SEMINIB,isemcnt)"
+offsetof_SEMINIB_maxsem,"offsetof(SEMINIB,maxsem)"
+sizeof_FLGPTN,sizeof(FLGPTN)
+sizeof_FLGINIB,sizeof(FLGINIB)
+offsetof_FLGINIB_flgatr,"offsetof(FLGINIB,flgatr)"
+offsetof_FLGINIB_iflgptn,"offsetof(FLGINIB,iflgptn)"
+sizeof_DTQINIB,sizeof(DTQINIB)
+offsetof_DTQINIB_dtqatr,"offsetof(DTQINIB,dtqatr)"
+offsetof_DTQINIB_dtqcnt,"offsetof(DTQINIB,dtqcnt)"
+offsetof_DTQINIB_p_dtqmb,"offsetof(DTQINIB,p_dtqmb)"
+sizeof_PDQINIB,sizeof(PDQINIB)
+offsetof_PDQINIB_pdqatr,"offsetof(PDQINIB,pdqatr)"
+offsetof_PDQINIB_pdqcnt,"offsetof(PDQINIB,pdqcnt)"
+offsetof_PDQINIB_maxdpri,"offsetof(PDQINIB,maxdpri)"
+offsetof_PDQINIB_p_pdqmb,"offsetof(PDQINIB,p_pdqmb)"
+sizeof_MBXINIB,sizeof(MBXINIB)
+offsetof_MBXINIB_mbxatr,"offsetof(MBXINIB,mbxatr)"
+offsetof_MBXINIB_maxmpri,"offsetof(MBXINIB,maxmpri)"
+sizeof_MPFINIB,sizeof(MPFINIB)
+offsetof_MPFINIB_mpfatr,"offsetof(MPFINIB,mpfatr)"
+offsetof_MPFINIB_blkcnt,"offsetof(MPFINIB,blkcnt)"
+offsetof_MPFINIB_blksz,"offsetof(MPFINIB,blksz)"
+offsetof_MPFINIB_mpf,"offsetof(MPFINIB,mpf)"
+offsetof_MPFINIB_p_mpfmb,"offsetof(MPFINIB,p_mpfmb)"
+sizeof_CYCINIB,sizeof(CYCINIB)
+offsetof_CYCINIB_cycatr,"offsetof(CYCINIB,cycatr)"
+offsetof_CYCINIB_exinf,"offsetof(CYCINIB,exinf)"
+offsetof_CYCINIB_cychdr,"offsetof(CYCINIB,cychdr)"
+offsetof_CYCINIB_cyctim,"offsetof(CYCINIB,cyctim)"
+offsetof_CYCINIB_cycphs,"offsetof(CYCINIB,cycphs)"
+sizeof_ALMINIB,sizeof(ALMINIB)
+offsetof_ALMINIB_almatr,"offsetof(ALMINIB,almatr)"
+offsetof_ALMINIB_exinf,"offsetof(ALMINIB,exinf)"
+offsetof_ALMINIB_almhdr,"offsetof(ALMINIB,almhdr)"
+sizeof_INHINIB,#!defined(OMIT_INITIALIZE_INTERRUPT),,sizeof(INHINIB)
+offset_INHINIB_inhno,#!defined(OMIT_INITIALIZE_INTERRUPT),,"offsetof(INHINIB,inhno)"
+offset_INHINIB_inhatr,#!defined(OMIT_INITIALIZE_INTERRUPT),,"offsetof(INHINIB,inhatr)"
+offset_INHINIB_int_entry,#!defined(OMIT_INITIALIZE_INTERRUPT),,"offsetof(INHINIB,int_entry)"
+sizeof_INTINIB,#!defined(OMIT_INITIALIZE_INTERRUPT),,sizeof(INTINIB)
+offset_INTINIB_intno,#!defined(OMIT_INITIALIZE_INTERRUPT),,"offsetof(INTINIB,intno)"
+offset_INTINIB_intatr,#!defined(OMIT_INITIALIZE_INTERRUPT),,"offsetof(INTINIB,intatr)"
+offset_INTINIB_intpri,#!defined(OMIT_INITIALIZE_INTERRUPT),,"offsetof(INTINIB,intpri)"
+sizeof_EXCINIB,#!defined(OMIT_INITIALIZE_EXCEPTION),,sizeof(EXCINIB)
+offset_EXCINIB_excno,#!defined(OMIT_INITIALIZE_EXCEPTION),,"offsetof(EXCINIB,excno)"
+offset_EXCINIB_excatr,#!defined(OMIT_INITIALIZE_EXCEPTION),,"offsetof(EXCINIB,excatr)"
+offset_EXCINIB_exc_entry,#!defined(OMIT_INITIALIZE_EXCEPTION),,"offsetof(EXCINIB,exc_entry)"
Index: rtos_arduino/trunk/asp_1.9.2/kernel/kernel_impl.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/kernel_impl.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/kernel_impl.h	(revision 136)
@@ -0,0 +1,206 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: kernel_impl.h 1713 2010-01-27 13:23:29Z ertl-hiro $
+ */
+
+/*
+ *		TOPPERS/ASPã«ã¼ãã«å
+é¨åãæ¨æºããããã¡ã¤ã«
+ *
+ *  ãã®ããããã¡ã¤ã«ã¯ï¼ã«ã¼ãã«ãæ§æãããã­ã°ã©ã ã®ã½ã¼ã¹ãã¡ã¤ã«
+ *  ã§å¿
+ãã¤ã³ã¯ã«ã¼ãããã¹ãæ¨æºããããã¡ã¤ã«ã§ããï¼
+ *
+ *  ã¢ã»ã³ããªè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ãããã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ãããæ
+ *  ã¯ï¼TOPPERS_MACRO_ONLYãå®ç¾©ãã¦ããï¼ããã«ããï¼ãã¯ã­å®ç¾©ä»¥å¤ã
+ *  é¤ãããã«ãªã£ã¦ããï¼
+ */
+
+#ifndef TOPPERS_KERNEL_IMPL_H
+#define TOPPERS_KERNEL_IMPL_H
+
+/*
+ *  ã«ã¼ãã«ã®å
+é¨è­å¥åã®ãªãã¼ã 
+ */
+#include "kernel_rename.h"
+
+/*
+ *  ã¢ããªã±ã¼ã·ã§ã³ã¨å
+±éã®ããããã¡ã¤ã«
+ */
+#include <kernel.h>
+
+/*
+ *  ã·ã¹ãã ã­ã°æ©è½ã®ããã®å®ç¾©
+ */
+#include <t_syslog.h>
+
+/*
+ *  åã­ã£ã¹ããè¡ããã¯ã­ã®å®ç¾©
+ */
+#ifndef CAST
+#define CAST(type, val)		((type)(val))
+#endif /* CAST */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­æ
+å ±ã®å®ç¾©
+ */
+#include "target_config.h"
+
+/*
+ *  ãã¹ã¦ã®é¢æ°ãã³ã³ãã¤ã«ããããã®å®ç¾©
+ */
+#ifdef ALLFUNC
+#include "allfunc.h"
+#endif /* ALLFUNC */
+
+/*
+ *  ããããã£ã¼ã«ãã§ã®ç¬¦å·ç¡ãæ´æ°å
+ *
+ *  8ãããä»¥ä¸ã®å¹
+ã®ããããã£ã¼ã«ãã§ï¼ç¬¦å·ç¡ãæ´æ°å¤ãä¿æãããå ´å
+ *  ã«ç¨ããã¹ããã¼ã¿åï¼ANSI Cã§ã¯ï¼ããããã£ã¼ã«ãã®ãã¼ã¿åã«ã¯
+ *  intã¨unsigned intããè¨±ãããªãããï¼ããã©ã«ãã®å®ç¾©ã¯unsigned
+ *  intã¨ãã¦ãããï¼ã¿ã¼ã²ããããã³ãã¼ã«ä¾å­ã§ï¼unsigned charã¾ãã¯
+ *  unsigned shortã«å®ç¾©ããæ¹ãå¹çãè¯ãå ´åãããï¼
+ */
+#ifndef BIT_FIELD_UINT
+#define BIT_FIELD_UINT		unsigned int
+#endif /* BIT_FIELD_UINT */
+
+/*
+ *  ããããã£ã¼ã«ãã§ã®ãã¼ã«å
+ *
+ *  1ãããå¹
+ã®ããããã£ã¼ã«ãã§ï¼ãã¼ã«å¤ãä¿æãããå ´åã«ç¨ããã¹ã
+ *  ãã¼ã¿åï¼ããã©ã«ãã§ã¯BIT_FIELD_UINTã¨åä¸ã«å®ç¾©ãã¦ãããï¼ãã¼
+ *  ã«å¤ãä¿æãããã¨ãæç¤ºããããã«å¥ã®åç§°ã¨ãã¦ããï¼
+ */
+#ifndef BIT_FIELD_BOOL
+#define BIT_FIELD_BOOL		BIT_FIELD_UINT
+#endif /* BIT_FIELD_BOOL */
+
+/*
+ *  ãªãã¸ã§ã¯ãIDã®æå°å¤ã®å®ç¾©
+ */
+#define TMIN_TSKID		1		/* ã¿ã¹ã¯IDã®æå°å¤ */
+#define TMIN_SEMID		1		/* ã»ããã©IDã®æå°å¤ */
+#define TMIN_FLGID		1		/* ãã©ã°IDã®æå°å¤ */
+#define TMIN_DTQID		1		/* ãã¼ã¿ã­ã¥ã¼IDã®æå°å¤ */
+#define TMIN_PDQID		1		/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼IDã®æå°å¤ */
+#define TMIN_MBXID		1		/* ã¡ã¼ã«ããã¯ã¹IDã®æå°å¤ */
+#define TMIN_MPFID		1		/* åºå®é·ã¡ã¢ãªãã¼ã«IDã®æå°å¤ */
+#define TMIN_CYCID		1		/* å¨æãã³ãã©IDã®æå°å¤ */
+#define TMIN_ALMID		1		/* ã¢ã©ã¼ã ãã³ãã©IDã®æå°å¤ */
+
+/*
+ *  åªå
+åº¦ã®æ®µéæ°ã®å®ç¾©
+ */
+#define TNUM_TPRI		(TMAX_TPRI - TMIN_TPRI + 1)
+#define TNUM_MPRI		(TMAX_MPRI - TMIN_MPRI + 1)
+#define TNUM_INTPRI		(TMAX_INTPRI - TMIN_INTPRI + 1)
+
+/*
+ *  ããããã¡ã¤ã«ãæããªãã¢ã¸ã¥ã¼ã«ã®é¢æ°ã»å¤æ°ã®å®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  åã¢ã¸ã¥ã¼ã«ã®åæåï¼kernel_cfg.cï¼
+ */
+extern void	initialize_object(void);
+
+/*
+ *  åæåã«ã¼ãã³ã®å®è¡ï¼kernel_cfg.cï¼
+ */
+extern void	call_inirtn(void);
+
+/*
+ *  çµäºå¦çã«ã¼ãã³ã®å®è¡ï¼kernel_cfg.cï¼
+ */
+extern void	call_terrtn(void);
+
+/*
+ *  éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åï¼kernel_cfg.cï¼
+ */
+extern const SIZE	istksz;		/* ã¹ã¿ãã¯é åã®ãµã¤ãºï¼ä¸¸ããå¤ï¼ */
+extern STK_T *const	istk;		/* ã¹ã¿ãã¯é åã®å
+é ­çªå° */
+#ifdef TOPPERS_ISTKPT
+extern STK_T *const	istkpt;		/* ã¹ã¿ãã¯ãã¤ã³ã¿ã®åæå¤ */
+#endif /* TOPPERS_ISTKPT */
+
+/*
+ *  ã«ã¼ãã«åä½ç¶æ
+ãã©ã°ï¼startup.cï¼
+ */
+extern bool_t	kerflg;
+
+/*
+ *  ã«ã¼ãã«ã®èµ·åï¼startup.cï¼
+ */
+extern void	sta_ker(void);
+
+/*
+ *  ã«ã¼ãã«ã®çµäºå¦çï¼startup.cï¼
+ */
+extern void	exit_kernel(void);
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_KERNEL_IMPL_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/kernel_int.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/kernel_int.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/kernel_int.h	(revision 136)
@@ -0,0 +1,101 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2012 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: kernel_int.h 2394 2012-07-18 09:52:17Z ertl-hiro $
+ */
+
+/*
+ *		kernel_cfg.cï¼ããã³cfg1_out.cï¼ç¨ããããã¡ã¤ã«
+ */
+
+#ifndef TOPPERS_KERNEL_INT_H
+#define TOPPERS_KERNEL_INT_H
+
+/*
+ *  ã«ã¼ãã«æ¨æºããããã¡ã¤ã«
+ */
+#include "kernel_impl.h"
+
+/*
+ *  ã«ã¼ãã«ã®åããããã¡ã¤ã«
+ */
+#include "task.h"
+#include "semaphore.h"
+#include "eventflag.h"
+#include "dataqueue.h"
+#include "pridataq.h"
+#include "mailbox.h"
+#include "mempfix.h"
+#include "cyclic.h"
+#include "alarm.h"
+#include "interrupt.h"
+#include "exception.h"
+#include "time_event.h"
+
+/*
+ *  ãªãã¼ã ããã·ã³ãã«ãå
+ã«æ»ãããã®ããããã¡ã¤ã«
+ */
+#include "kernel_unrename.h"
+
+/*
+ *  å
+å®¹ãç©ºã®é
+åãçæããããã®ãã¯ã­
+ */
+#ifndef TOPPERS_EMPTY_LABEL
+#define TOPPERS_EMPTY_LABEL(type, var)		type var[0]
+#endif
+
+#endif /* TOPPERS_KERNEL_INT_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/kernel_rename.def
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/kernel_rename.def	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/kernel_rename.def	(revision 136)
@@ -0,0 +1,136 @@
+# startup.c
+kerflg
+exit_kernel
+
+# task.c
+p_runtsk
+p_schedtsk
+reqflg
+ipmflg
+disdsp
+dspflg
+ready_queue
+ready_primap
+initialize_task
+search_schedtsk
+make_runnable
+make_non_runnable
+make_dormant
+make_active
+change_priority
+rotate_ready_queue
+call_texrtn
+calltex
+
+# wait.c
+make_wait_tmout
+wait_complete
+wait_tmout
+wait_tmout_ok
+wait_release
+wobj_make_wait
+wobj_make_wait_tmout
+init_wait_queue
+
+# time_event.c
+current_time
+min_time
+next_time
+next_subtime
+last_index
+initialize_tmevt
+tmevt_up
+tmevt_down
+tmevtb_insert
+tmevtb_delete
+tmevt_lefttim
+signal_time
+
+# semaphore.c
+initialize_semaphore
+
+# eventflag.c
+initialize_eventflag
+check_flg_cond
+
+# dataqueue.c
+initialize_dataqueue
+enqueue_data
+force_enqueue_data
+dequeue_data
+send_data
+force_send_data
+receive_data
+
+# pridataq.c
+initialize_pridataq
+enqueue_pridata
+dequeue_pridata
+send_pridata
+receive_pridata
+
+# mailbox.c
+initialize_mailbox
+
+# mempfix.c
+initialize_mempfix
+get_mpf_block
+
+# cyclic.c
+initialize_cyclic
+call_cychdr
+
+# alarm.c
+initialize_alarm
+call_almhdr
+
+# interrupt.c
+initialize_interrupt
+
+# exception.c
+initialize_exception
+
+# kernel_cfg.c
+initialize_object
+call_inirtn
+call_terrtn
+tmax_tskid
+tinib_table
+torder_table
+tcb_table
+tmax_semid
+seminib_table
+semcb_table
+tmax_flgid
+flginib_table
+flgcb_table
+tmax_dtqid
+dtqinib_table
+dtqcb_table
+tmax_pdqid
+pdqinib_table
+pdqcb_table
+tmax_mbxid
+mbxinib_table
+mbxcb_table
+tmax_mpfid
+mpfinib_table
+mpfcb_table
+tmax_cycid
+cycinib_table
+cyccb_table
+tmax_almid
+alminib_table
+almcb_table
+tnum_inhno
+inhinib_table
+tnum_intno
+intinib_table
+tnum_excno
+excinib_table
+tmevt_heap
+istksz
+istk
+istkpt
+
+INCLUDE "target"
Index: rtos_arduino/trunk/asp_1.9.2/kernel/kernel_rename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/kernel_rename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/kernel_rename.h	(revision 136)
@@ -0,0 +1,344 @@
+/* This file is generated from kernel_rename.def by genrename. */
+
+#ifndef TOPPERS_KERNEL_RENAME_H
+#define TOPPERS_KERNEL_RENAME_H
+
+/*
+ *  startup.c
+ */
+#define kerflg						_kernel_kerflg
+#define exit_kernel					_kernel_exit_kernel
+
+/*
+ *  task.c
+ */
+#define p_runtsk					_kernel_p_runtsk
+#define p_schedtsk					_kernel_p_schedtsk
+#define reqflg						_kernel_reqflg
+#define ipmflg						_kernel_ipmflg
+#define disdsp						_kernel_disdsp
+#define dspflg						_kernel_dspflg
+#define ready_queue					_kernel_ready_queue
+#define ready_primap				_kernel_ready_primap
+#define initialize_task				_kernel_initialize_task
+#define search_schedtsk				_kernel_search_schedtsk
+#define make_runnable				_kernel_make_runnable
+#define make_non_runnable			_kernel_make_non_runnable
+#define make_dormant				_kernel_make_dormant
+#define make_active					_kernel_make_active
+#define change_priority				_kernel_change_priority
+#define rotate_ready_queue			_kernel_rotate_ready_queue
+#define call_texrtn					_kernel_call_texrtn
+#define calltex						_kernel_calltex
+
+/*
+ *  wait.c
+ */
+#define make_wait_tmout				_kernel_make_wait_tmout
+#define wait_complete				_kernel_wait_complete
+#define wait_tmout					_kernel_wait_tmout
+#define wait_tmout_ok				_kernel_wait_tmout_ok
+#define wait_release				_kernel_wait_release
+#define wobj_make_wait				_kernel_wobj_make_wait
+#define wobj_make_wait_tmout		_kernel_wobj_make_wait_tmout
+#define init_wait_queue				_kernel_init_wait_queue
+
+/*
+ *  time_event.c
+ */
+#define current_time				_kernel_current_time
+#define min_time					_kernel_min_time
+#define next_time					_kernel_next_time
+#define next_subtime				_kernel_next_subtime
+#define last_index					_kernel_last_index
+#define initialize_tmevt			_kernel_initialize_tmevt
+#define tmevt_up					_kernel_tmevt_up
+#define tmevt_down					_kernel_tmevt_down
+#define tmevtb_insert				_kernel_tmevtb_insert
+#define tmevtb_delete				_kernel_tmevtb_delete
+#define tmevt_lefttim				_kernel_tmevt_lefttim
+#define signal_time					_kernel_signal_time
+
+/*
+ *  semaphore.c
+ */
+#define initialize_semaphore		_kernel_initialize_semaphore
+
+/*
+ *  eventflag.c
+ */
+#define initialize_eventflag		_kernel_initialize_eventflag
+#define check_flg_cond				_kernel_check_flg_cond
+
+/*
+ *  dataqueue.c
+ */
+#define initialize_dataqueue		_kernel_initialize_dataqueue
+#define enqueue_data				_kernel_enqueue_data
+#define force_enqueue_data			_kernel_force_enqueue_data
+#define dequeue_data				_kernel_dequeue_data
+#define send_data					_kernel_send_data
+#define force_send_data				_kernel_force_send_data
+#define receive_data				_kernel_receive_data
+
+/*
+ *  pridataq.c
+ */
+#define initialize_pridataq			_kernel_initialize_pridataq
+#define enqueue_pridata				_kernel_enqueue_pridata
+#define dequeue_pridata				_kernel_dequeue_pridata
+#define send_pridata				_kernel_send_pridata
+#define receive_pridata				_kernel_receive_pridata
+
+/*
+ *  mailbox.c
+ */
+#define initialize_mailbox			_kernel_initialize_mailbox
+
+/*
+ *  mempfix.c
+ */
+#define initialize_mempfix			_kernel_initialize_mempfix
+#define get_mpf_block				_kernel_get_mpf_block
+
+/*
+ *  cyclic.c
+ */
+#define initialize_cyclic			_kernel_initialize_cyclic
+#define call_cychdr					_kernel_call_cychdr
+
+/*
+ *  alarm.c
+ */
+#define initialize_alarm			_kernel_initialize_alarm
+#define call_almhdr					_kernel_call_almhdr
+
+/*
+ *  interrupt.c
+ */
+#define initialize_interrupt		_kernel_initialize_interrupt
+
+/*
+ *  exception.c
+ */
+#define initialize_exception		_kernel_initialize_exception
+
+/*
+ *  kernel_cfg.c
+ */
+#define initialize_object			_kernel_initialize_object
+#define call_inirtn					_kernel_call_inirtn
+#define call_terrtn					_kernel_call_terrtn
+#define tmax_tskid					_kernel_tmax_tskid
+#define tinib_table					_kernel_tinib_table
+#define torder_table				_kernel_torder_table
+#define tcb_table					_kernel_tcb_table
+#define tmax_semid					_kernel_tmax_semid
+#define seminib_table				_kernel_seminib_table
+#define semcb_table					_kernel_semcb_table
+#define tmax_flgid					_kernel_tmax_flgid
+#define flginib_table				_kernel_flginib_table
+#define flgcb_table					_kernel_flgcb_table
+#define tmax_dtqid					_kernel_tmax_dtqid
+#define dtqinib_table				_kernel_dtqinib_table
+#define dtqcb_table					_kernel_dtqcb_table
+#define tmax_pdqid					_kernel_tmax_pdqid
+#define pdqinib_table				_kernel_pdqinib_table
+#define pdqcb_table					_kernel_pdqcb_table
+#define tmax_mbxid					_kernel_tmax_mbxid
+#define mbxinib_table				_kernel_mbxinib_table
+#define mbxcb_table					_kernel_mbxcb_table
+#define tmax_mpfid					_kernel_tmax_mpfid
+#define mpfinib_table				_kernel_mpfinib_table
+#define mpfcb_table					_kernel_mpfcb_table
+#define tmax_cycid					_kernel_tmax_cycid
+#define cycinib_table				_kernel_cycinib_table
+#define cyccb_table					_kernel_cyccb_table
+#define tmax_almid					_kernel_tmax_almid
+#define alminib_table				_kernel_alminib_table
+#define almcb_table					_kernel_almcb_table
+#define tnum_inhno					_kernel_tnum_inhno
+#define inhinib_table				_kernel_inhinib_table
+#define tnum_intno					_kernel_tnum_intno
+#define intinib_table				_kernel_intinib_table
+#define tnum_excno					_kernel_tnum_excno
+#define excinib_table				_kernel_excinib_table
+#define tmevt_heap					_kernel_tmevt_heap
+#define istksz						_kernel_istksz
+#define istk						_kernel_istk
+#define istkpt						_kernel_istkpt
+
+
+#ifdef TOPPERS_LABEL_ASM
+
+/*
+ *  startup.c
+ */
+#define _kerflg						__kernel_kerflg
+#define _exit_kernel				__kernel_exit_kernel
+
+/*
+ *  task.c
+ */
+#define _p_runtsk					__kernel_p_runtsk
+#define _p_schedtsk					__kernel_p_schedtsk
+#define _reqflg						__kernel_reqflg
+#define _ipmflg						__kernel_ipmflg
+#define _disdsp						__kernel_disdsp
+#define _dspflg						__kernel_dspflg
+#define _ready_queue				__kernel_ready_queue
+#define _ready_primap				__kernel_ready_primap
+#define _initialize_task			__kernel_initialize_task
+#define _search_schedtsk			__kernel_search_schedtsk
+#define _make_runnable				__kernel_make_runnable
+#define _make_non_runnable			__kernel_make_non_runnable
+#define _make_dormant				__kernel_make_dormant
+#define _make_active				__kernel_make_active
+#define _change_priority			__kernel_change_priority
+#define _rotate_ready_queue			__kernel_rotate_ready_queue
+#define _call_texrtn				__kernel_call_texrtn
+#define _calltex					__kernel_calltex
+
+/*
+ *  wait.c
+ */
+#define _make_wait_tmout			__kernel_make_wait_tmout
+#define _wait_complete				__kernel_wait_complete
+#define _wait_tmout					__kernel_wait_tmout
+#define _wait_tmout_ok				__kernel_wait_tmout_ok
+#define _wait_release				__kernel_wait_release
+#define _wobj_make_wait				__kernel_wobj_make_wait
+#define _wobj_make_wait_tmout		__kernel_wobj_make_wait_tmout
+#define _init_wait_queue			__kernel_init_wait_queue
+
+/*
+ *  time_event.c
+ */
+#define _current_time				__kernel_current_time
+#define _min_time					__kernel_min_time
+#define _next_time					__kernel_next_time
+#define _next_subtime				__kernel_next_subtime
+#define _last_index					__kernel_last_index
+#define _initialize_tmevt			__kernel_initialize_tmevt
+#define _tmevt_up					__kernel_tmevt_up
+#define _tmevt_down					__kernel_tmevt_down
+#define _tmevtb_insert				__kernel_tmevtb_insert
+#define _tmevtb_delete				__kernel_tmevtb_delete
+#define _tmevt_lefttim				__kernel_tmevt_lefttim
+#define _signal_time				__kernel_signal_time
+
+/*
+ *  semaphore.c
+ */
+#define _initialize_semaphore		__kernel_initialize_semaphore
+
+/*
+ *  eventflag.c
+ */
+#define _initialize_eventflag		__kernel_initialize_eventflag
+#define _check_flg_cond				__kernel_check_flg_cond
+
+/*
+ *  dataqueue.c
+ */
+#define _initialize_dataqueue		__kernel_initialize_dataqueue
+#define _enqueue_data				__kernel_enqueue_data
+#define _force_enqueue_data			__kernel_force_enqueue_data
+#define _dequeue_data				__kernel_dequeue_data
+#define _send_data					__kernel_send_data
+#define _force_send_data			__kernel_force_send_data
+#define _receive_data				__kernel_receive_data
+
+/*
+ *  pridataq.c
+ */
+#define _initialize_pridataq		__kernel_initialize_pridataq
+#define _enqueue_pridata			__kernel_enqueue_pridata
+#define _dequeue_pridata			__kernel_dequeue_pridata
+#define _send_pridata				__kernel_send_pridata
+#define _receive_pridata			__kernel_receive_pridata
+
+/*
+ *  mailbox.c
+ */
+#define _initialize_mailbox			__kernel_initialize_mailbox
+
+/*
+ *  mempfix.c
+ */
+#define _initialize_mempfix			__kernel_initialize_mempfix
+#define _get_mpf_block				__kernel_get_mpf_block
+
+/*
+ *  cyclic.c
+ */
+#define _initialize_cyclic			__kernel_initialize_cyclic
+#define _call_cychdr				__kernel_call_cychdr
+
+/*
+ *  alarm.c
+ */
+#define _initialize_alarm			__kernel_initialize_alarm
+#define _call_almhdr				__kernel_call_almhdr
+
+/*
+ *  interrupt.c
+ */
+#define _initialize_interrupt		__kernel_initialize_interrupt
+
+/*
+ *  exception.c
+ */
+#define _initialize_exception		__kernel_initialize_exception
+
+/*
+ *  kernel_cfg.c
+ */
+#define _initialize_object			__kernel_initialize_object
+#define _call_inirtn				__kernel_call_inirtn
+#define _call_terrtn				__kernel_call_terrtn
+#define _tmax_tskid					__kernel_tmax_tskid
+#define _tinib_table				__kernel_tinib_table
+#define _torder_table				__kernel_torder_table
+#define _tcb_table					__kernel_tcb_table
+#define _tmax_semid					__kernel_tmax_semid
+#define _seminib_table				__kernel_seminib_table
+#define _semcb_table				__kernel_semcb_table
+#define _tmax_flgid					__kernel_tmax_flgid
+#define _flginib_table				__kernel_flginib_table
+#define _flgcb_table				__kernel_flgcb_table
+#define _tmax_dtqid					__kernel_tmax_dtqid
+#define _dtqinib_table				__kernel_dtqinib_table
+#define _dtqcb_table				__kernel_dtqcb_table
+#define _tmax_pdqid					__kernel_tmax_pdqid
+#define _pdqinib_table				__kernel_pdqinib_table
+#define _pdqcb_table				__kernel_pdqcb_table
+#define _tmax_mbxid					__kernel_tmax_mbxid
+#define _mbxinib_table				__kernel_mbxinib_table
+#define _mbxcb_table				__kernel_mbxcb_table
+#define _tmax_mpfid					__kernel_tmax_mpfid
+#define _mpfinib_table				__kernel_mpfinib_table
+#define _mpfcb_table				__kernel_mpfcb_table
+#define _tmax_cycid					__kernel_tmax_cycid
+#define _cycinib_table				__kernel_cycinib_table
+#define _cyccb_table				__kernel_cyccb_table
+#define _tmax_almid					__kernel_tmax_almid
+#define _alminib_table				__kernel_alminib_table
+#define _almcb_table				__kernel_almcb_table
+#define _tnum_inhno					__kernel_tnum_inhno
+#define _inhinib_table				__kernel_inhinib_table
+#define _tnum_intno					__kernel_tnum_intno
+#define _intinib_table				__kernel_intinib_table
+#define _tnum_excno					__kernel_tnum_excno
+#define _excinib_table				__kernel_excinib_table
+#define _tmevt_heap					__kernel_tmevt_heap
+#define _istksz						__kernel_istksz
+#define _istk						__kernel_istk
+#define _istkpt						__kernel_istkpt
+
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "target_rename.h"
+
+#endif /* TOPPERS_KERNEL_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/kernel_unrename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/kernel_unrename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/kernel_unrename.h	(revision 136)
@@ -0,0 +1,345 @@
+/* This file is generated from kernel_rename.def by genrename. */
+
+/* This file is included only when kernel_rename.h has been included. */
+#ifdef TOPPERS_KERNEL_RENAME_H
+#undef TOPPERS_KERNEL_RENAME_H
+
+/*
+ *  startup.c
+ */
+#undef kerflg
+#undef exit_kernel
+
+/*
+ *  task.c
+ */
+#undef p_runtsk
+#undef p_schedtsk
+#undef reqflg
+#undef ipmflg
+#undef disdsp
+#undef dspflg
+#undef ready_queue
+#undef ready_primap
+#undef initialize_task
+#undef search_schedtsk
+#undef make_runnable
+#undef make_non_runnable
+#undef make_dormant
+#undef make_active
+#undef change_priority
+#undef rotate_ready_queue
+#undef call_texrtn
+#undef calltex
+
+/*
+ *  wait.c
+ */
+#undef make_wait_tmout
+#undef wait_complete
+#undef wait_tmout
+#undef wait_tmout_ok
+#undef wait_release
+#undef wobj_make_wait
+#undef wobj_make_wait_tmout
+#undef init_wait_queue
+
+/*
+ *  time_event.c
+ */
+#undef current_time
+#undef min_time
+#undef next_time
+#undef next_subtime
+#undef last_index
+#undef initialize_tmevt
+#undef tmevt_up
+#undef tmevt_down
+#undef tmevtb_insert
+#undef tmevtb_delete
+#undef tmevt_lefttim
+#undef signal_time
+
+/*
+ *  semaphore.c
+ */
+#undef initialize_semaphore
+
+/*
+ *  eventflag.c
+ */
+#undef initialize_eventflag
+#undef check_flg_cond
+
+/*
+ *  dataqueue.c
+ */
+#undef initialize_dataqueue
+#undef enqueue_data
+#undef force_enqueue_data
+#undef dequeue_data
+#undef send_data
+#undef force_send_data
+#undef receive_data
+
+/*
+ *  pridataq.c
+ */
+#undef initialize_pridataq
+#undef enqueue_pridata
+#undef dequeue_pridata
+#undef send_pridata
+#undef receive_pridata
+
+/*
+ *  mailbox.c
+ */
+#undef initialize_mailbox
+
+/*
+ *  mempfix.c
+ */
+#undef initialize_mempfix
+#undef get_mpf_block
+
+/*
+ *  cyclic.c
+ */
+#undef initialize_cyclic
+#undef call_cychdr
+
+/*
+ *  alarm.c
+ */
+#undef initialize_alarm
+#undef call_almhdr
+
+/*
+ *  interrupt.c
+ */
+#undef initialize_interrupt
+
+/*
+ *  exception.c
+ */
+#undef initialize_exception
+
+/*
+ *  kernel_cfg.c
+ */
+#undef initialize_object
+#undef call_inirtn
+#undef call_terrtn
+#undef tmax_tskid
+#undef tinib_table
+#undef torder_table
+#undef tcb_table
+#undef tmax_semid
+#undef seminib_table
+#undef semcb_table
+#undef tmax_flgid
+#undef flginib_table
+#undef flgcb_table
+#undef tmax_dtqid
+#undef dtqinib_table
+#undef dtqcb_table
+#undef tmax_pdqid
+#undef pdqinib_table
+#undef pdqcb_table
+#undef tmax_mbxid
+#undef mbxinib_table
+#undef mbxcb_table
+#undef tmax_mpfid
+#undef mpfinib_table
+#undef mpfcb_table
+#undef tmax_cycid
+#undef cycinib_table
+#undef cyccb_table
+#undef tmax_almid
+#undef alminib_table
+#undef almcb_table
+#undef tnum_inhno
+#undef inhinib_table
+#undef tnum_intno
+#undef intinib_table
+#undef tnum_excno
+#undef excinib_table
+#undef tmevt_heap
+#undef istksz
+#undef istk
+#undef istkpt
+
+
+#ifdef TOPPERS_LABEL_ASM
+
+/*
+ *  startup.c
+ */
+#undef _kerflg
+#undef _exit_kernel
+
+/*
+ *  task.c
+ */
+#undef _p_runtsk
+#undef _p_schedtsk
+#undef _reqflg
+#undef _ipmflg
+#undef _disdsp
+#undef _dspflg
+#undef _ready_queue
+#undef _ready_primap
+#undef _initialize_task
+#undef _search_schedtsk
+#undef _make_runnable
+#undef _make_non_runnable
+#undef _make_dormant
+#undef _make_active
+#undef _change_priority
+#undef _rotate_ready_queue
+#undef _call_texrtn
+#undef _calltex
+
+/*
+ *  wait.c
+ */
+#undef _make_wait_tmout
+#undef _wait_complete
+#undef _wait_tmout
+#undef _wait_tmout_ok
+#undef _wait_release
+#undef _wobj_make_wait
+#undef _wobj_make_wait_tmout
+#undef _init_wait_queue
+
+/*
+ *  time_event.c
+ */
+#undef _current_time
+#undef _min_time
+#undef _next_time
+#undef _next_subtime
+#undef _last_index
+#undef _initialize_tmevt
+#undef _tmevt_up
+#undef _tmevt_down
+#undef _tmevtb_insert
+#undef _tmevtb_delete
+#undef _tmevt_lefttim
+#undef _signal_time
+
+/*
+ *  semaphore.c
+ */
+#undef _initialize_semaphore
+
+/*
+ *  eventflag.c
+ */
+#undef _initialize_eventflag
+#undef _check_flg_cond
+
+/*
+ *  dataqueue.c
+ */
+#undef _initialize_dataqueue
+#undef _enqueue_data
+#undef _force_enqueue_data
+#undef _dequeue_data
+#undef _send_data
+#undef _force_send_data
+#undef _receive_data
+
+/*
+ *  pridataq.c
+ */
+#undef _initialize_pridataq
+#undef _enqueue_pridata
+#undef _dequeue_pridata
+#undef _send_pridata
+#undef _receive_pridata
+
+/*
+ *  mailbox.c
+ */
+#undef _initialize_mailbox
+
+/*
+ *  mempfix.c
+ */
+#undef _initialize_mempfix
+#undef _get_mpf_block
+
+/*
+ *  cyclic.c
+ */
+#undef _initialize_cyclic
+#undef _call_cychdr
+
+/*
+ *  alarm.c
+ */
+#undef _initialize_alarm
+#undef _call_almhdr
+
+/*
+ *  interrupt.c
+ */
+#undef _initialize_interrupt
+
+/*
+ *  exception.c
+ */
+#undef _initialize_exception
+
+/*
+ *  kernel_cfg.c
+ */
+#undef _initialize_object
+#undef _call_inirtn
+#undef _call_terrtn
+#undef _tmax_tskid
+#undef _tinib_table
+#undef _torder_table
+#undef _tcb_table
+#undef _tmax_semid
+#undef _seminib_table
+#undef _semcb_table
+#undef _tmax_flgid
+#undef _flginib_table
+#undef _flgcb_table
+#undef _tmax_dtqid
+#undef _dtqinib_table
+#undef _dtqcb_table
+#undef _tmax_pdqid
+#undef _pdqinib_table
+#undef _pdqcb_table
+#undef _tmax_mbxid
+#undef _mbxinib_table
+#undef _mbxcb_table
+#undef _tmax_mpfid
+#undef _mpfinib_table
+#undef _mpfcb_table
+#undef _tmax_cycid
+#undef _cycinib_table
+#undef _cyccb_table
+#undef _tmax_almid
+#undef _alminib_table
+#undef _almcb_table
+#undef _tnum_inhno
+#undef _inhinib_table
+#undef _tnum_intno
+#undef _intinib_table
+#undef _tnum_excno
+#undef _excinib_table
+#undef _tmevt_heap
+#undef _istksz
+#undef _istk
+#undef _istkpt
+
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "target_unrename.h"
+
+#endif /* TOPPERS_KERNEL_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/mailbox.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/mailbox.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/mailbox.c	(revision 136)
@@ -0,0 +1,414 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: mailbox.c 2133 2011-06-26 03:14:51Z ertl-hiro $
+ */
+
+/*
+ *		ã¡ã¼ã«ããã¯ã¹æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "wait.h"
+#include "mailbox.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_SND_MBX_ENTER
+#define LOG_SND_MBX_ENTER(mbxid, pk_msg)
+#endif /* LOG_SND_MBX_ENTER */
+
+#ifndef LOG_SND_MBX_LEAVE
+#define LOG_SND_MBX_LEAVE(ercd)
+#endif /* LOG_SND_MBX_LEAVE */
+
+#ifndef LOG_RCV_MBX_ENTER
+#define LOG_RCV_MBX_ENTER(mbxid, ppk_msg)
+#endif /* LOG_RCV_MBX_ENTER */
+
+#ifndef LOG_RCV_MBX_LEAVE
+#define LOG_RCV_MBX_LEAVE(ercd, pk_msg)
+#endif /* LOG_RCV_MBX_LEAVE */
+
+#ifndef LOG_PRCV_MBX_ENTER
+#define LOG_PRCV_MBX_ENTER(mbxid, ppk_msg)
+#endif /* LOG_PRCV_MBX_ENTER */
+
+#ifndef LOG_PRCV_MBX_LEAVE
+#define LOG_PRCV_MBX_LEAVE(ercd, pk_msg)
+#endif /* LOG_PRCV_MBX_LEAVE */
+
+#ifndef LOG_TRCV_MBX_ENTER
+#define LOG_TRCV_MBX_ENTER(mbxid, ppk_msg, tmout)
+#endif /* LOG_TRCV_MBX_ENTER */
+
+#ifndef LOG_TRCV_MBX_LEAVE
+#define LOG_TRCV_MBX_LEAVE(ercd, pk_msg)
+#endif /* LOG_TRCV_MBX_LEAVE */
+
+#ifndef LOG_INI_MBX_ENTER
+#define LOG_INI_MBX_ENTER(mbxid)
+#endif /* LOG_INI_MBX_ENTER */
+
+#ifndef LOG_INI_MBX_LEAVE
+#define LOG_INI_MBX_LEAVE(ercd)
+#endif /* LOG_INI_MBX_LEAVE */
+
+#ifndef LOG_REF_MBX_ENTER
+#define LOG_REF_MBX_ENTER(mbxid, pk_rmbx)
+#endif /* LOG_REF_MBX_ENTER */
+
+#ifndef LOG_REF_MBX_LEAVE
+#define LOG_REF_MBX_LEAVE(ercd, pk_rmbx)
+#endif /* LOG_REF_MBX_LEAVE */
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ã®æ°
+ */
+#define tnum_mbx	((uint_t)(tmax_mbxid - TMIN_MBXID + 1))
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹IDããã¡ã¼ã«ããã¯ã¹ç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_MBX(mbxid)	((uint_t)((mbxid) - TMIN_MBXID))
+#define get_mbxcb(mbxid)	(&(mbxcb_table[INDEX_MBX(mbxid)]))
+
+/* 
+ *  ã¡ã¼ã«ããã¯ã¹æ©è½ã®åæå
+ */
+#ifdef TOPPERS_mbxini
+
+void
+initialize_mailbox(void)
+{
+	uint_t	i;
+	MBXCB	*p_mbxcb;
+
+	for (i = 0; i < tnum_mbx; i++) {
+		p_mbxcb = &(mbxcb_table[i]);
+		queue_initialize(&(p_mbxcb->wait_queue));
+		p_mbxcb->p_mbxinib = &(mbxinib_table[i]);
+		p_mbxcb->pk_head = NULL;
+	}
+}
+
+#endif /* TOPPERS_mbxini */
+
+/*
+ *  ã¡ãã»ã¼ã¸åªå
+åº¦ã®ååºã
+ */
+#define	MSGPRI(pk_msg)	(((T_MSG_PRI *)(pk_msg))->msgpri)
+
+/*
+ *  åªå
+åº¦é ã¡ãã»ã¼ã¸ã­ã¥ã¼ã¸ã®æ¿å
+¥
+ */
+Inline void
+enqueue_msg_pri(T_MSG **ppk_prevmsg_next, T_MSG *pk_msg)
+{
+	T_MSG	*pk_nextmsg;
+
+	while ((pk_nextmsg = *ppk_prevmsg_next) != NULL) {
+		if (MSGPRI(pk_nextmsg) > MSGPRI(pk_msg)) {
+			break;
+		}
+		ppk_prevmsg_next = &(pk_nextmsg->pk_next);
+	}
+	pk_msg->pk_next = pk_nextmsg;
+	*ppk_prevmsg_next = pk_msg;
+}
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ã¸ã®éä¿¡
+ */
+#ifdef TOPPERS_snd_mbx
+
+ER
+snd_mbx(ID mbxid, T_MSG *pk_msg)
+{
+	MBXCB	*p_mbxcb;
+	TCB		*p_tcb;
+	ER		ercd;
+    
+	LOG_SND_MBX_ENTER(mbxid, pk_msg);
+	CHECK_TSKCTX_UNL();
+	CHECK_MBXID(mbxid);
+	p_mbxcb = get_mbxcb(mbxid);
+	CHECK_PAR((p_mbxcb->p_mbxinib->mbxatr & TA_MPRI) == 0U
+				|| (TMIN_MPRI <= MSGPRI(pk_msg)
+					&& MSGPRI(pk_msg) <= p_mbxcb->p_mbxinib->maxmpri));
+
+	t_lock_cpu();
+	if (!queue_empty(&(p_mbxcb->wait_queue))) {
+		p_tcb = (TCB *) queue_delete_next(&(p_mbxcb->wait_queue));
+		((WINFO_MBX *)(p_tcb->p_winfo))->pk_msg = pk_msg;
+		if (wait_complete(p_tcb)) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else if ((p_mbxcb->p_mbxinib->mbxatr & TA_MPRI) != 0U) {
+		enqueue_msg_pri(&(p_mbxcb->pk_head), pk_msg);
+		ercd = E_OK;
+	}
+	else {
+		pk_msg->pk_next = NULL;
+		if (p_mbxcb->pk_head != NULL) {
+			p_mbxcb->pk_last->pk_next = pk_msg;
+		}
+		else {
+			p_mbxcb->pk_head = pk_msg;
+		}
+		p_mbxcb->pk_last = pk_msg;
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_SND_MBX_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_snd_mbx */
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ããã®åä¿¡
+ */
+#ifdef TOPPERS_rcv_mbx
+
+ER
+rcv_mbx(ID mbxid, T_MSG **ppk_msg)
+{
+	MBXCB	*p_mbxcb;
+	WINFO_MBX winfo_mbx;
+	ER		ercd;
+    
+	LOG_RCV_MBX_ENTER(mbxid, ppk_msg);
+	CHECK_DISPATCH();
+	CHECK_MBXID(mbxid);
+	p_mbxcb = get_mbxcb(mbxid);
+    
+	t_lock_cpu();
+	if (p_mbxcb->pk_head != NULL) {
+		*ppk_msg = p_mbxcb->pk_head;
+		p_mbxcb->pk_head = (*ppk_msg)->pk_next;
+		ercd = E_OK;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_MBX);
+		wobj_make_wait((WOBJCB *) p_mbxcb, (WINFO_WOBJ *) &winfo_mbx);
+		dispatch();
+		ercd = winfo_mbx.winfo.wercd;
+		if (ercd == E_OK) {
+			*ppk_msg = winfo_mbx.pk_msg;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_RCV_MBX_LEAVE(ercd, *ppk_msg);
+	return(ercd);
+}
+
+#endif /* TOPPERS_rcv_mbx */
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ããã®åä¿¡ï¼ãã¼ãªã³ã°ï¼
+ */
+#ifdef TOPPERS_prcv_mbx
+
+ER
+prcv_mbx(ID mbxid, T_MSG **ppk_msg)
+{
+	MBXCB	*p_mbxcb;
+	ER		ercd;
+    
+	LOG_PRCV_MBX_ENTER(mbxid, ppk_msg);
+	CHECK_TSKCTX_UNL();
+	CHECK_MBXID(mbxid);
+	p_mbxcb = get_mbxcb(mbxid);
+    
+	t_lock_cpu();
+	if (p_mbxcb->pk_head != NULL) {
+		*ppk_msg = p_mbxcb->pk_head;
+		p_mbxcb->pk_head = (*ppk_msg)->pk_next;
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_PRCV_MBX_LEAVE(ercd, *ppk_msg);
+	return(ercd);
+}
+
+#endif /* TOPPERS_prcv_mbx */
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ããã®åä¿¡ï¼ã¿ã¤ã ã¢ã¦ãããï¼
+ */
+#ifdef TOPPERS_trcv_mbx
+
+ER
+trcv_mbx(ID mbxid, T_MSG **ppk_msg, TMO tmout)
+{
+	MBXCB	*p_mbxcb;
+	WINFO_MBX winfo_mbx;
+	TMEVTB	tmevtb;
+	ER		ercd;
+    
+	LOG_TRCV_MBX_ENTER(mbxid, ppk_msg, tmout);
+	CHECK_DISPATCH();
+	CHECK_MBXID(mbxid);
+	CHECK_TMOUT(tmout);
+	p_mbxcb = get_mbxcb(mbxid);
+    
+	t_lock_cpu();
+	if (p_mbxcb->pk_head != NULL) {
+		*ppk_msg = p_mbxcb->pk_head;
+		p_mbxcb->pk_head = (*ppk_msg)->pk_next;
+		ercd = E_OK;
+	}
+	else if (tmout == TMO_POL) {
+		ercd = E_TMOUT;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_MBX);
+		wobj_make_wait_tmout((WOBJCB *) p_mbxcb, (WINFO_WOBJ *) &winfo_mbx,
+														&tmevtb, tmout);
+		dispatch();
+		ercd = winfo_mbx.winfo.wercd;
+		if (ercd == E_OK) {
+			*ppk_msg = winfo_mbx.pk_msg;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TRCV_MBX_LEAVE(ercd, *ppk_msg);
+	return(ercd);
+}
+
+#endif /* TOPPERS_trcv_mbx */
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ã®ååæå
+ */
+#ifdef TOPPERS_ini_mbx
+
+ER
+ini_mbx(ID mbxid)
+{
+	MBXCB	*p_mbxcb;
+	bool_t	dspreq;
+	ER		ercd;
+    
+	LOG_INI_MBX_ENTER(mbxid);
+	CHECK_TSKCTX_UNL();
+	CHECK_MBXID(mbxid);
+	p_mbxcb = get_mbxcb(mbxid);
+
+	t_lock_cpu();
+	dspreq = init_wait_queue(&(p_mbxcb->wait_queue));
+	p_mbxcb->pk_head = NULL;
+	if (dspreq) {
+		dispatch();
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_INI_MBX_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ini_mbx */
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_mbx
+
+ER
+ref_mbx(ID mbxid, T_RMBX *pk_rmbx)
+{
+	MBXCB	*p_mbxcb;
+	ER		ercd;
+    
+	LOG_REF_MBX_ENTER(mbxid, pk_rmbx);
+	CHECK_TSKCTX_UNL();
+	CHECK_MBXID(mbxid);
+	p_mbxcb = get_mbxcb(mbxid);
+
+	t_lock_cpu();
+	pk_rmbx->wtskid = wait_tskid(&(p_mbxcb->wait_queue));
+	pk_rmbx->pk_msg = p_mbxcb->pk_head;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_MBX_LEAVE(ercd, pk_rmbx);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_mbx */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/mailbox.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/mailbox.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/mailbox.h	(revision 136)
@@ -0,0 +1,152 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: mailbox.h 2228 2011-08-14 00:35:44Z ertl-hiro $
+ */
+
+/*
+ *		ã¡ã¼ã«ããã¯ã¹æ©è½
+ */
+
+#ifndef TOPPERS_MAILBOX_H
+#define TOPPERS_MAILBOX_H
+
+#include "wait.h"
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹åæåãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WOBJINIBï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct mailbox_initialization_block {
+	ATR			mbxatr;			/* ã¡ã¼ã«ããã¯ã¹å±æ§ */
+	PRI			maxmpri;		/* ã¡ãã»ã¼ã¸åªå
+åº¦ã®æå¤§å¤ */
+} MBXINIB;
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ç®¡çãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã®å
+±éé¨åï¼WOBJCBï¼
+ *  ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼æåã®2ã¤ã®
+ *  ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ *
+ *  ã¡ãã»ã¼ã¸ã­ã¥ã¼ãã¡ãã»ã¼ã¸ã®åªå
+åº¦é ã®å ´åã«ã¯ï¼pk_lastã¯ä½¿ããª
+ *  ãï¼ã¾ãï¼ã¡ãã»ã¼ã¸ã­ã¥ã¼ãç©ºã®å ´åï¼pk_headãNULLã®å ´åï¼ã«ãï¼
+ *  pk_lastã¯ç¡å¹ã§ããï¼
+ */
+typedef struct mailbox_control_block {
+	QUEUE		wait_queue;		/* ã¡ã¼ã«ããã¯ã¹å¾
+ã¡ã­ã¥ã¼ */
+	const MBXINIB *p_mbxinib;	/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+	T_MSG		*pk_head;		/* å
+é ­ã®ã¡ãã»ã¼ã¸ */
+	T_MSG		*pk_last;		/* æ«å°¾ã®ã¡ãã»ã¼ã¸ */
+} MBXCB;
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹å¾
+ã¡æ
+å ±ãã­ãã¯ã®å®ç¾©
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡æ
+å ±ãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WINFO_WOBJï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®2ã¤ã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct mailbox_waiting_information {
+	WINFO		winfo;			/* æ¨æºã®å¾
+ã¡æ
+å ±ãã­ãã¯ */
+	MBXCB		*p_mbxcb;		/* å¾
+ã£ã¦ããã¡ã¼ã«ããã¯ã¹ã®ç®¡çãã­ãã¯ */
+	T_MSG		*pk_msg;		/* åä¿¡ããã¡ãã»ã¼ã¸ */
+} WINFO_MBX;
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹IDã®æå¤§å¤ï¼kernel_cfg.cï¼
+ */
+extern const ID	tmax_mbxid;
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const MBXINIB	mbxinib_table[];
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ç®¡çãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern MBXCB	mbxcb_table[];
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹ç®¡çãã­ãã¯ããã¡ã¼ã«ããã¯ã¹IDãåãåºãããã®ãã¯ã­
+ */
+#define	MBXID(p_mbxcb)	((ID)(((p_mbxcb) - mbxcb_table) + TMIN_MBXID))
+
+/*
+ *  ã¡ã¼ã«ããã¯ã¹æ©è½ã®åæå
+ */
+extern void	initialize_mailbox(void);
+
+#endif /* TOPPERS_MAILBOX_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/mempfix.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/mempfix.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/mempfix.c	(revision 136)
@@ -0,0 +1,418 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: mempfix.c 2632 2014-04-13 11:30:37Z ertl-hiro $
+ */
+
+/*
+ *		åºå®é·ã¡ã¢ãªãã¼ã«æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "wait.h"
+#include "mempfix.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_GET_MPF_ENTER
+#define LOG_GET_MPF_ENTER(mpfid, p_blk)
+#endif /* LOG_GET_MPF_ENTER */
+
+#ifndef LOG_GET_MPF_LEAVE
+#define LOG_GET_MPF_LEAVE(ercd, blk)
+#endif /* LOG_GET_MPF_LEAVE */
+
+#ifndef LOG_PGET_MPF_ENTER
+#define LOG_PGET_MPF_ENTER(mpfid, p_blk)
+#endif /* LOG_PGET_MPF_ENTER */
+
+#ifndef LOG_PGET_MPF_LEAVE
+#define LOG_PGET_MPF_LEAVE(ercd, blk)
+#endif /* LOG_PGET_MPF_LEAVE */
+
+#ifndef LOG_TGET_MPF_ENTER
+#define LOG_TGET_MPF_ENTER(mpfid, p_blk, tmout)
+#endif /* LOG_TGET_MPF_ENTER */
+
+#ifndef LOG_TGET_MPF_LEAVE
+#define LOG_TGET_MPF_LEAVE(ercd, blk)
+#endif /* LOG_TGET_MPF_LEAVE */
+
+#ifndef LOG_REL_MPF_ENTER
+#define LOG_REL_MPF_ENTER(mpfid, blk)
+#endif /* LOG_REL_MPF_ENTER */
+
+#ifndef LOG_REL_MPF_LEAVE
+#define LOG_REL_MPF_LEAVE(ercd)
+#endif /* LOG_REL_MPF_LEAVE */
+
+#ifndef LOG_INI_MPF_ENTER
+#define LOG_INI_MPF_ENTER(mpfid)
+#endif /* LOG_INI_MPF_ENTER */
+
+#ifndef LOG_INI_MPF_LEAVE
+#define LOG_INI_MPF_LEAVE(ercd)
+#endif /* LOG_INI_MPF_LEAVE */
+
+#ifndef LOG_REF_MPF_ENTER
+#define LOG_REF_MPF_ENTER(mpfid, pk_rmpf)
+#endif /* LOG_REF_MPF_ENTER */
+
+#ifndef LOG_REF_MPF_LEAVE
+#define LOG_REF_MPF_LEAVE(ercd, pk_rmpf)
+#endif /* LOG_REF_MPF_LEAVE */
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«ã®æ°
+ */
+#define tnum_mpf	((uint_t)(tmax_mpfid - TMIN_MPFID + 1))
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«IDããåºå®é·ã¡ã¢ãªãã¼ã«ç®¡çãã­ãã¯ãåãåºãã
+ *  ãã®ãã¯ã­
+ */
+#define INDEX_MPF(mpfid)	((uint_t)((mpfid) - TMIN_MPFID))
+#define get_mpfcb(mpfid)	(&(mpfcb_table[INDEX_MPF(mpfid)]))
+
+/*
+ *  ç¹æ®ãªã¤ã³ããã¯ã¹å¤ã®å®ç¾©
+ */
+#define INDEX_NULL		(~0U)		/* ç©ºããã­ãã¯ãªã¹ãã®æå¾ */
+#define INDEX_ALLOC		(~1U)		/* å²å½ã¦æ¸ã¿ã®ãã­ãã¯ */
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«æ©è½ã®åæå
+ */
+#ifdef TOPPERS_mpfini
+
+void
+initialize_mempfix(void)
+{
+	uint_t	i;
+	MPFCB	*p_mpfcb;
+
+	for (i = 0; i < tnum_mpf; i++) {
+		p_mpfcb = &(mpfcb_table[i]);
+		queue_initialize(&(p_mpfcb->wait_queue));
+		p_mpfcb->p_mpfinib = &(mpfinib_table[i]);
+		p_mpfcb->fblkcnt = p_mpfcb->p_mpfinib->blkcnt;
+		p_mpfcb->unused = 0U;
+		p_mpfcb->freelist = INDEX_NULL;
+	}
+}
+
+#endif /* TOPPERS_mpfini */
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«ãããã­ãã¯ãç²å¾
+ */
+#ifdef TOPPERS_mpfget
+
+void
+get_mpf_block(MPFCB *p_mpfcb, void **p_blk)
+{
+	uint_t	blkidx;
+
+	if (p_mpfcb->freelist != INDEX_NULL) {
+		blkidx = p_mpfcb->freelist;
+		p_mpfcb->freelist = (p_mpfcb->p_mpfinib->p_mpfmb + blkidx)->next;
+	}
+	else {
+		blkidx = p_mpfcb->unused;
+		p_mpfcb->unused++;
+	}
+	*p_blk = (void *)((char *)(p_mpfcb->p_mpfinib->mpf)
+								+ p_mpfcb->p_mpfinib->blksz * blkidx);
+	p_mpfcb->fblkcnt--;
+	(p_mpfcb->p_mpfinib->p_mpfmb + blkidx)->next = INDEX_ALLOC;
+}
+
+#endif /* TOPPERS_mpfget */
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã­ãã¯ã®ç²å¾
+ */
+#ifdef TOPPERS_get_mpf
+
+ER
+get_mpf(ID mpfid, void **p_blk)
+{
+	MPFCB	*p_mpfcb;
+	WINFO_MPF winfo_mpf;
+	ER		ercd;
+
+	LOG_GET_MPF_ENTER(mpfid, p_blk);
+	CHECK_DISPATCH();
+	CHECK_MPFID(mpfid);
+	p_mpfcb = get_mpfcb(mpfid);
+
+	t_lock_cpu();
+	if (p_mpfcb->fblkcnt > 0) {
+		get_mpf_block(p_mpfcb, p_blk);
+		ercd = E_OK;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_MPF);
+		wobj_make_wait((WOBJCB *) p_mpfcb, (WINFO_WOBJ *) &winfo_mpf);
+		dispatch();
+		ercd = winfo_mpf.winfo.wercd;
+		if (ercd == E_OK) {
+			*p_blk = winfo_mpf.blk;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_GET_MPF_LEAVE(ercd, *p_blk);
+	return(ercd);
+}
+
+#endif /* TOPPERS_get_mpf */
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã­ãã¯ã®ç²å¾ï¼ãã¼ãªã³ã°ï¼
+ */
+#ifdef TOPPERS_pget_mpf
+
+ER
+pget_mpf(ID mpfid, void **p_blk)
+{
+	MPFCB	*p_mpfcb;
+	ER		ercd;
+
+	LOG_PGET_MPF_ENTER(mpfid, p_blk);
+	CHECK_TSKCTX_UNL();
+	CHECK_MPFID(mpfid);
+	p_mpfcb = get_mpfcb(mpfid);
+
+	t_lock_cpu();
+	if (p_mpfcb->fblkcnt > 0) {
+		get_mpf_block(p_mpfcb, p_blk);
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_PGET_MPF_LEAVE(ercd, *p_blk);
+	return(ercd);
+}
+
+#endif /* TOPPERS_pget_mpf */
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã­ãã¯ã®ç²å¾ï¼ã¿ã¤ã ã¢ã¦ãããï¼
+ */
+#ifdef TOPPERS_tget_mpf
+
+ER
+tget_mpf(ID mpfid, void **p_blk, TMO tmout)
+{
+	MPFCB	*p_mpfcb;
+	WINFO_MPF winfo_mpf;
+	TMEVTB	tmevtb;
+	ER		ercd;
+
+	LOG_TGET_MPF_ENTER(mpfid, p_blk, tmout);
+	CHECK_DISPATCH();
+	CHECK_MPFID(mpfid);
+	CHECK_TMOUT(tmout);
+	p_mpfcb = get_mpfcb(mpfid);
+
+	t_lock_cpu();
+	if (p_mpfcb->fblkcnt > 0) {
+		get_mpf_block(p_mpfcb, p_blk);
+		ercd = E_OK;
+	}
+	else if (tmout == TMO_POL) {
+		ercd = E_TMOUT;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_MPF);
+		wobj_make_wait_tmout((WOBJCB *) p_mpfcb, (WINFO_WOBJ *) &winfo_mpf,
+														&tmevtb, tmout);
+		dispatch();
+		ercd = winfo_mpf.winfo.wercd;
+		if (ercd == E_OK) {
+			*p_blk = winfo_mpf.blk;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TGET_MPF_LEAVE(ercd, *p_blk);
+	return(ercd);
+}
+
+#endif /* TOPPERS_tget_mpf */
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã­ãã¯ã®è¿å´
+ */
+#ifdef TOPPERS_rel_mpf
+
+ER
+rel_mpf(ID mpfid, void *blk)
+{
+	MPFCB	*p_mpfcb;
+	SIZE	blkoffset;
+	uint_t	blkidx;
+	TCB		*p_tcb;
+	ER		ercd;
+    
+	LOG_REL_MPF_ENTER(mpfid, blk);
+	CHECK_TSKCTX_UNL();
+	CHECK_MPFID(mpfid);
+	p_mpfcb = get_mpfcb(mpfid);
+	CHECK_PAR(p_mpfcb->p_mpfinib->mpf <= blk);
+	blkoffset = ((char *) blk) - (char *)(p_mpfcb->p_mpfinib->mpf);
+	CHECK_PAR(blkoffset % p_mpfcb->p_mpfinib->blksz == 0U);
+	CHECK_PAR(blkoffset / p_mpfcb->p_mpfinib->blksz < p_mpfcb->unused);
+	blkidx = (uint_t)(blkoffset / p_mpfcb->p_mpfinib->blksz);
+	CHECK_PAR((p_mpfcb->p_mpfinib->p_mpfmb + blkidx)->next == INDEX_ALLOC);
+
+	t_lock_cpu();
+	if (!queue_empty(&(p_mpfcb->wait_queue))) {
+		p_tcb = (TCB *) queue_delete_next(&(p_mpfcb->wait_queue));
+		((WINFO_MPF *)(p_tcb->p_winfo))->blk = blk;
+		if (wait_complete(p_tcb)) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		p_mpfcb->fblkcnt++;
+		(p_mpfcb->p_mpfinib->p_mpfmb + blkidx)->next = p_mpfcb->freelist;
+		p_mpfcb->freelist = blkidx;
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REL_MPF_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_rel_mpf */
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«ã®ååæå
+ */
+#ifdef TOPPERS_ini_mpf
+
+ER
+ini_mpf(ID mpfid)
+{
+	MPFCB	*p_mpfcb;
+	bool_t	dspreq;
+	ER		ercd;
+    
+	LOG_INI_MPF_ENTER(mpfid);
+	CHECK_TSKCTX_UNL();
+	CHECK_MPFID(mpfid);
+	p_mpfcb = get_mpfcb(mpfid);
+
+	t_lock_cpu();
+	dspreq = init_wait_queue(&(p_mpfcb->wait_queue));
+	p_mpfcb->fblkcnt = p_mpfcb->p_mpfinib->blkcnt;
+	p_mpfcb->unused = 0U;
+	p_mpfcb->freelist = INDEX_NULL;
+	if (dspreq) {
+		dispatch();
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_INI_MPF_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ini_mpf */
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«ã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_mpf
+
+ER
+ref_mpf(ID mpfid, T_RMPF *pk_rmpf)
+{
+	MPFCB	*p_mpfcb;
+	ER		ercd;
+    
+	LOG_REF_MPF_ENTER(mpfid, pk_rmpf);
+	CHECK_TSKCTX_UNL();
+	CHECK_MPFID(mpfid);
+	p_mpfcb = get_mpfcb(mpfid);
+
+	t_lock_cpu();
+	pk_rmpf->wtskid = wait_tskid(&(p_mpfcb->wait_queue));
+	pk_rmpf->fblkcnt = p_mpfcb->fblkcnt;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_MPF_LEAVE(ercd, pk_rmpf);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_mpf */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/mempfix.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/mempfix.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/mempfix.h	(revision 136)
@@ -0,0 +1,169 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: mempfix.h 2228 2011-08-14 00:35:44Z ertl-hiro $
+ */
+
+/*
+ *		åºå®é·ã¡ã¢ãªãã¼ã«æ©è½
+ */
+
+#ifndef TOPPERS_MEMPFIX_H
+#define TOPPERS_MEMPFIX_H
+
+#include "wait.h"
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã­ãã¯ç®¡çãã­ãã¯
+ *
+ *  nextãã£ã¼ã«ãã«ã¯ï¼ã¡ã¢ãªãã­ãã¯ãå²å½ã¦æ¸ã¿ã®å ´åã¯INDEX_ALLOCãï¼
+ *  æªå²å½ã¦ã®å ´åã¯æ¬¡ã®æªå²å½ã¦ãã­ãã¯ã®ã¤ã³ããã¯ã¹çªå·ãæ ¼ç´ããï¼
+ *  æå¾ã®æªå²å½ã¦ãã­ãã¯ã®å ´åã«ã¯ï¼INDEX_NULLãæ ¼ç´ããï¼
+ */
+typedef struct fixed_memoryblock_management_block {
+	uint_t		next;			/* æ¬¡ã®æªå²å½ã¦ãã­ãã¯ */
+} MPFMB;
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«åæåãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WOBJINIBï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct fixed_memorypool_initialization_block {
+	ATR			mpfatr;			/* åºå®é·ã¡ã¢ãªãã¼ã«å±æ§ */
+	uint_t		blkcnt;			/* ã¡ã¢ãªãã­ãã¯æ° */
+	uint_t		blksz;			/* ã¡ã¢ãªãã­ãã¯ã®ãµã¤ãºï¼ä¸¸ããå¤ï¼ */
+	void		*mpf;			/* åºå®é·ã¡ã¢ãªãã¼ã«é åã®å
+é ­çªå° */
+	MPFMB		*p_mpfmb;		/* åºå®é·ã¡ã¢ãªãã¼ã«ç®¡çé åã®å
+é ­çªå° */
+} MPFINIB;
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«ç®¡çãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã®å
+±éé¨åï¼WOBJCBï¼
+ *  ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼æåã®2ã¤ã®
+ *  ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct fixed_memorypool_control_block {
+	QUEUE		wait_queue;		/* åºå®é·ã¡ã¢ãªãã¼ã«å¾
+ã¡ã­ã¥ã¼ */
+	const MPFINIB *p_mpfinib;	/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+	uint_t		fblkcnt;		/* æªå²å½ã¦ãã­ãã¯æ° */
+	uint_t		unused;			/* æªä½¿ç¨ãã­ãã¯ã®å
+é ­ */
+	uint_t		freelist;		/* æªå²å½ã¦ãã­ãã¯ã®ãªã¹ã */
+} MPFCB;
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«å¾
+ã¡æ
+å ±ãã­ãã¯ã®å®ç¾©
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡æ
+å ±ãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WINFO_WOBJï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®2ã¤ã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct fixed_memorypool_waiting_information {
+	WINFO		winfo;			/* æ¨æºã®å¾
+ã¡æ
+å ±ãã­ãã¯ */
+	MPFCB		*p_mpfcb;		/* å¾
+ã£ã¦ããåºå®é·ã¡ã¢ãªãã¼ã«ã®ç®¡çãã­ãã¯*/
+	void		*blk;			/* ç²å¾ããã¡ã¢ãªãã­ãã¯ */
+} WINFO_MPF;
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«IDã®æå¤§å¤ï¼kernel_cfg.cï¼
+ */
+extern const ID	tmax_mpfid;
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const MPFINIB	mpfinib_table[];
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«ç®¡çãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern MPFCB	mpfcb_table[];
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«ç®¡çãã­ãã¯ããåºå®é·ã¡ã¢ãªãã¼ã«IDãåãåºãã
+ *  ãã®ãã¯ã­
+ */
+#define	MPFID(p_mpfcb)	((ID)(((p_mpfcb) - mpfcb_table) + TMIN_MPFID))
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«æ©è½ã®åæå
+ */
+extern void	initialize_mempfix(void);
+
+/*
+ *  åºå®é·ã¡ã¢ãªãã¼ã«ãããã­ãã¯ãç²å¾
+ */
+extern void	get_mpf_block(MPFCB *p_mpfcb, void **p_blk);
+
+#endif /* TOPPERS_MEMPFIX_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/pridataq.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/pridataq.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/pridataq.c	(revision 136)
@@ -0,0 +1,698 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: pridataq.c 2515 2013-06-12 11:56:59Z ertl-hiro $
+ */
+
+/*
+ *		åªå
+åº¦ãã¼ã¿ã­ã¥ã¼æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "wait.h"
+#include "pridataq.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_SND_PDQ_ENTER
+#define LOG_SND_PDQ_ENTER(pdqid, data, datapri)
+#endif /* LOG_SND_PDQ_ENTER */
+
+#ifndef LOG_SND_PDQ_LEAVE
+#define LOG_SND_PDQ_LEAVE(ercd)
+#endif /* LOG_SND_PDQ_LEAVE */
+
+#ifndef LOG_PSND_PDQ_ENTER
+#define LOG_PSND_PDQ_ENTER(pdqid, data, datapri)
+#endif /* LOG_PSND_PDQ_ENTER */
+
+#ifndef LOG_PSND_PDQ_LEAVE
+#define LOG_PSND_PDQ_LEAVE(ercd)
+#endif /* LOG_PSND_PDQ_LEAVE */
+
+#ifndef LOG_IPSND_PDQ_ENTER
+#define LOG_IPSND_PDQ_ENTER(pdqid, data, datapri)
+#endif /* LOG_IPSND_PDQ_ENTER */
+
+#ifndef LOG_IPSND_PDQ_LEAVE
+#define LOG_IPSND_PDQ_LEAVE(ercd)
+#endif /* LOG_IPSND_PDQ_LEAVE */
+
+#ifndef LOG_TSND_PDQ_ENTER
+#define LOG_TSND_PDQ_ENTER(pdqid, data, datapri, tmout)
+#endif /* LOG_TSND_PDQ_ENTER */
+
+#ifndef LOG_TSND_PDQ_LEAVE
+#define LOG_TSND_PDQ_LEAVE(ercd)
+#endif /* LOG_TSND_PDQ_LEAVE */
+
+#ifndef LOG_RCV_PDQ_ENTER
+#define LOG_RCV_PDQ_ENTER(pdqid, p_data, p_datapri)
+#endif /* LOG_RCV_PDQ_ENTER */
+
+#ifndef LOG_RCV_PDQ_LEAVE
+#define LOG_RCV_PDQ_LEAVE(ercd, data, datapri)
+#endif /* LOG_RCV_PDQ_LEAVE */
+
+#ifndef LOG_PRCV_PDQ_ENTER
+#define LOG_PRCV_PDQ_ENTER(pdqid, p_data, p_datapri)
+#endif /* LOG_PRCV_PDQ_ENTER */
+
+#ifndef LOG_PRCV_PDQ_LEAVE
+#define LOG_PRCV_PDQ_LEAVE(ercd, data, datapri)
+#endif /* LOG_PRCV_PDQ_LEAVE */
+
+#ifndef LOG_TRCV_PDQ_ENTER
+#define LOG_TRCV_PDQ_ENTER(pdqid, p_data, p_datapri, tmout)
+#endif /* LOG_TRCV_PDQ_ENTER */
+
+#ifndef LOG_TRCV_PDQ_LEAVE
+#define LOG_TRCV_PDQ_LEAVE(ercd, data, datapri)
+#endif /* LOG_TRCV_PDQ_LEAVE */
+
+#ifndef LOG_INI_PDQ_ENTER
+#define LOG_INI_PDQ_ENTER(pdqid)
+#endif /* LOG_INI_PDQ_ENTER */
+
+#ifndef LOG_INI_PDQ_LEAVE
+#define LOG_INI_PDQ_LEAVE(ercd)
+#endif /* LOG_INI_PDQ_LEAVE */
+
+#ifndef LOG_REF_PDQ_ENTER
+#define LOG_REF_PDQ_ENTER(pdqid, pk_rpdq)
+#endif /* LOG_REF_PDQ_ENTER */
+
+#ifndef LOG_REF_PDQ_LEAVE
+#define LOG_REF_PDQ_LEAVE(ercd, pk_rpdq)
+#endif /* LOG_REF_PDQ_LEAVE */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®æ°
+ */
+#define tnum_pdq	((uint_t)(tmax_pdqid - TMIN_PDQID + 1))
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼IDããåªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯ãåãåºãã
+ *  ãã®ãã¯ã­
+ */
+#define INDEX_PDQ(pdqid)	((uint_t)((pdqid) - TMIN_PDQID))
+#define get_pdqcb(pdqid)	(&(pdqcb_table[INDEX_PDQ(pdqid)]))
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼æ©è½ã®åæå
+ */
+#ifdef TOPPERS_pdqini
+
+void
+initialize_pridataq(void)
+{
+	uint_t	i;
+	PDQCB	*p_pdqcb;
+
+	for (i = 0; i < tnum_pdq; i++) {
+		p_pdqcb = &(pdqcb_table[i]);
+		queue_initialize(&(p_pdqcb->swait_queue));
+		p_pdqcb->p_pdqinib = &(pdqinib_table[i]);
+		queue_initialize(&(p_pdqcb->rwait_queue));
+		p_pdqcb->count = 0U;
+		p_pdqcb->p_head = NULL;
+		p_pdqcb->unused = 0U;
+		p_pdqcb->p_freelist = NULL;
+	}
+}
+
+#endif /* TOPPERS_pdqini */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çé åã¸ã®ãã¼ã¿ã®æ ¼ç´
+ */
+#ifdef TOPPERS_pdqenq
+
+void
+enqueue_pridata(PDQCB *p_pdqcb, intptr_t data, PRI datapri)
+{
+	PDQMB	*p_pdqmb;
+	PDQMB	**pp_prev_next, *p_next;
+
+	if (p_pdqcb->p_freelist != NULL) {
+		p_pdqmb = p_pdqcb->p_freelist;
+		p_pdqcb->p_freelist = p_pdqmb->p_next;
+	}
+	else {
+		p_pdqmb = p_pdqcb->p_pdqinib->p_pdqmb + p_pdqcb->unused;
+		p_pdqcb->unused++;
+	}
+
+	p_pdqmb->data = data;
+	p_pdqmb->datapri = datapri;
+
+	pp_prev_next = &(p_pdqcb->p_head);
+	while ((p_next = *pp_prev_next) != NULL) {
+		if (p_next->datapri > datapri) {
+			break;
+		}
+		pp_prev_next = &(p_next->p_next);
+	}
+	p_pdqmb->p_next = p_next;
+	*pp_prev_next = p_pdqmb;
+	p_pdqcb->count++;
+}
+
+#endif /* TOPPERS_pdqenq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çé åããã®ãã¼ã¿ã®ååºã
+ */
+#ifdef TOPPERS_pdqdeq
+
+void
+dequeue_pridata(PDQCB *p_pdqcb, intptr_t *p_data, PRI *p_datapri)
+{
+	PDQMB	*p_pdqmb;
+
+	p_pdqmb = p_pdqcb->p_head;
+	p_pdqcb->p_head = p_pdqmb->p_next;
+	p_pdqcb->count--;
+
+	*p_data = p_pdqmb->data;
+	*p_datapri = p_pdqmb->datapri;
+
+	p_pdqmb->p_next = p_pdqcb->p_freelist;
+	p_pdqcb->p_freelist = p_pdqmb;
+}
+
+#endif /* TOPPERS_pdqdeq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã¸ã®ãã¼ã¿éä¿¡
+ */
+#ifdef TOPPERS_pdqsnd
+
+bool_t
+send_pridata(PDQCB *p_pdqcb, intptr_t data, PRI datapri, bool_t *p_dspreq)
+{
+	TCB		*p_tcb;
+
+	if (!queue_empty(&(p_pdqcb->rwait_queue))) {
+		p_tcb = (TCB *) queue_delete_next(&(p_pdqcb->rwait_queue));
+		((WINFO_PDQ *)(p_tcb->p_winfo))->data = data;
+		((WINFO_PDQ *)(p_tcb->p_winfo))->datapri = datapri;
+		*p_dspreq = wait_complete(p_tcb);
+		return(true);
+	}
+	else if (p_pdqcb->count < p_pdqcb->p_pdqinib->pdqcnt) {
+		enqueue_pridata(p_pdqcb, data, datapri);
+		*p_dspreq = false;
+		return(true);
+	}
+	else {
+		return(false);
+	}
+}
+
+#endif /* TOPPERS_pdqsnd */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ããã®ãã¼ã¿åä¿¡
+ */
+#ifdef TOPPERS_pdqrcv
+
+bool_t
+receive_pridata(PDQCB *p_pdqcb, intptr_t *p_data,
+									PRI *p_datapri, bool_t *p_dspreq)
+{
+	TCB		*p_tcb;
+	intptr_t data;
+	PRI		datapri;
+
+	if (p_pdqcb->count > 0U) {
+		dequeue_pridata(p_pdqcb, p_data, p_datapri);
+		if (!queue_empty(&(p_pdqcb->swait_queue))) {
+			p_tcb = (TCB *) queue_delete_next(&(p_pdqcb->swait_queue));
+			data = ((WINFO_PDQ *)(p_tcb->p_winfo))->data;
+			datapri = ((WINFO_PDQ *)(p_tcb->p_winfo))->datapri;
+			enqueue_pridata(p_pdqcb, data, datapri);
+			*p_dspreq = wait_complete(p_tcb);
+		}
+		else {
+			*p_dspreq = false;
+		}
+		return(true);
+	}
+	else if (!queue_empty(&(p_pdqcb->swait_queue))) {
+		p_tcb = (TCB *) queue_delete_next(&(p_pdqcb->swait_queue));
+		*p_data = ((WINFO_PDQ *)(p_tcb->p_winfo))->data;
+		*p_datapri = ((WINFO_PDQ *)(p_tcb->p_winfo))->datapri;
+		*p_dspreq = wait_complete(p_tcb);
+		return(true);
+	}
+	else {
+		return(false);
+	}
+}
+
+#endif /* TOPPERS_pdqrcv */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡
+ */
+#ifdef TOPPERS_snd_pdq
+
+ER
+snd_pdq(ID pdqid, intptr_t data, PRI datapri)
+{
+	PDQCB	*p_pdqcb;
+	WINFO_PDQ winfo_pdq;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_SND_PDQ_ENTER(pdqid, data, datapri);
+	CHECK_DISPATCH();
+	CHECK_PDQID(pdqid);
+	p_pdqcb = get_pdqcb(pdqid);
+	CHECK_PAR(TMIN_DPRI <= datapri && datapri <= p_pdqcb->p_pdqinib->maxdpri);
+
+	t_lock_cpu();
+	if (send_pridata(p_pdqcb, data, datapri, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		winfo_pdq.data = data;
+		winfo_pdq.datapri = datapri;
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_SPDQ);
+		wobj_make_wait((WOBJCB *) p_pdqcb, (WINFO_WOBJ *) &winfo_pdq);
+		dispatch();
+		ercd = winfo_pdq.winfo.wercd;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_SND_PDQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_snd_pdq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡ï¼ãã¼ãªã³ã°ï¼
+ */
+#ifdef TOPPERS_psnd_pdq
+
+ER
+psnd_pdq(ID pdqid, intptr_t data, PRI datapri)
+{
+	PDQCB	*p_pdqcb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_PSND_PDQ_ENTER(pdqid, data, datapri);
+	CHECK_TSKCTX_UNL();
+	CHECK_PDQID(pdqid);
+	p_pdqcb = get_pdqcb(pdqid);
+	CHECK_PAR(TMIN_DPRI <= datapri && datapri <= p_pdqcb->p_pdqinib->maxdpri);
+
+	t_lock_cpu();
+	if (send_pridata(p_pdqcb, data, datapri, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_PSND_PDQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_psnd_pdq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡ï¼ãã¼ãªã³ã°ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_ipsnd_pdq
+
+ER
+ipsnd_pdq(ID pdqid, intptr_t data, PRI datapri)
+{
+	PDQCB	*p_pdqcb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_IPSND_PDQ_ENTER(pdqid, data, datapri);
+	CHECK_INTCTX_UNL();
+	CHECK_PDQID(pdqid);
+	p_pdqcb = get_pdqcb(pdqid);
+	CHECK_PAR(TMIN_DPRI <= datapri && datapri <= p_pdqcb->p_pdqinib->maxdpri);
+
+	i_lock_cpu();
+	if (send_pridata(p_pdqcb, data, datapri, &dspreq)) {
+		if (dspreq) {
+			reqflg = true;
+		}
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_IPSND_PDQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ipsnd_pdq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡ï¼ã¿ã¤ã ã¢ã¦ãããï¼
+ */
+#ifdef TOPPERS_tsnd_pdq
+
+ER
+tsnd_pdq(ID pdqid, intptr_t data, PRI datapri, TMO tmout)
+{
+	PDQCB	*p_pdqcb;
+	WINFO_PDQ winfo_pdq;
+	TMEVTB	tmevtb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_TSND_PDQ_ENTER(pdqid, data, datapri, tmout);
+	CHECK_DISPATCH();
+	CHECK_PDQID(pdqid);
+	CHECK_TMOUT(tmout);
+	p_pdqcb = get_pdqcb(pdqid);
+	CHECK_PAR(TMIN_DPRI <= datapri && datapri <= p_pdqcb->p_pdqinib->maxdpri);
+
+	t_lock_cpu();
+	if (send_pridata(p_pdqcb, data, datapri, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else if (tmout == TMO_POL) {
+		ercd = E_TMOUT;
+	}
+	else {
+		winfo_pdq.data = data;
+		winfo_pdq.datapri = datapri;
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_SPDQ);
+		wobj_make_wait_tmout((WOBJCB *) p_pdqcb, (WINFO_WOBJ *) &winfo_pdq,
+														&tmevtb, tmout);
+		dispatch();
+		ercd = winfo_pdq.winfo.wercd;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TSND_PDQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_tsnd_pdq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡
+ */
+#ifdef TOPPERS_rcv_pdq
+
+ER
+rcv_pdq(ID pdqid, intptr_t *p_data, PRI *p_datapri)
+{
+	PDQCB	*p_pdqcb;
+	WINFO_PDQ winfo_pdq;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_RCV_PDQ_ENTER(pdqid, p_data, p_datapri);
+	CHECK_DISPATCH();
+	CHECK_PDQID(pdqid);
+	p_pdqcb = get_pdqcb(pdqid);
+
+	t_lock_cpu();
+	if (receive_pridata(p_pdqcb, p_data, p_datapri, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_RPDQ);
+		make_wait(&(winfo_pdq.winfo));
+		queue_insert_prev(&(p_pdqcb->rwait_queue), &(p_runtsk->task_queue));
+		winfo_pdq.p_pdqcb = p_pdqcb;
+		LOG_TSKSTAT(p_runtsk);
+		dispatch();
+		ercd = winfo_pdq.winfo.wercd;
+		if (ercd == E_OK) {
+			*p_data = winfo_pdq.data;
+			*p_datapri = winfo_pdq.datapri;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_RCV_PDQ_LEAVE(ercd, *p_data, *p_datapri);
+	return(ercd);
+}
+
+#endif /* TOPPERS_rcv_pdq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡ï¼ãã¼ãªã³ã°ï¼
+ */
+#ifdef TOPPERS_prcv_pdq
+
+ER
+prcv_pdq(ID pdqid, intptr_t *p_data, PRI *p_datapri)
+{
+	PDQCB	*p_pdqcb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_PRCV_PDQ_ENTER(pdqid, p_data, p_datapri);
+	CHECK_TSKCTX_UNL();
+	CHECK_PDQID(pdqid);
+	p_pdqcb = get_pdqcb(pdqid);
+
+	t_lock_cpu();
+	if (receive_pridata(p_pdqcb, p_data, p_datapri, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_PRCV_PDQ_LEAVE(ercd, *p_data, *p_datapri);
+	return(ercd);
+}
+
+#endif /* TOPPERS_prcv_pdq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡ï¼ã¿ã¤ã ã¢ã¦ãããï¼
+ */
+#ifdef TOPPERS_trcv_pdq
+
+ER
+trcv_pdq(ID pdqid, intptr_t *p_data, PRI *p_datapri, TMO tmout)
+{
+	PDQCB	*p_pdqcb;
+	WINFO_PDQ winfo_pdq;
+	TMEVTB	tmevtb;
+	bool_t	dspreq;
+	ER		ercd;
+
+	LOG_TRCV_PDQ_ENTER(pdqid, p_data, p_datapri, tmout);
+	CHECK_DISPATCH();
+	CHECK_PDQID(pdqid);
+	CHECK_TMOUT(tmout);
+	p_pdqcb = get_pdqcb(pdqid);
+
+	t_lock_cpu();
+	if (receive_pridata(p_pdqcb, p_data, p_datapri, &dspreq)) {
+		if (dspreq) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else if (tmout == TMO_POL) {
+		ercd = E_TMOUT;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_RPDQ);
+		make_wait_tmout(&(winfo_pdq.winfo), &tmevtb, tmout);
+		queue_insert_prev(&(p_pdqcb->rwait_queue), &(p_runtsk->task_queue));
+		winfo_pdq.p_pdqcb = p_pdqcb;
+		LOG_TSKSTAT(p_runtsk);
+		dispatch();
+		ercd = winfo_pdq.winfo.wercd;
+		if (ercd == E_OK) {
+			*p_data = winfo_pdq.data;
+			*p_datapri = winfo_pdq.datapri;
+		}
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TRCV_PDQ_LEAVE(ercd, *p_data, *p_datapri);
+	return(ercd);
+}
+
+#endif /* TOPPERS_trcv_pdq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®ååæå
+ */
+#ifdef TOPPERS_ini_pdq
+
+ER
+ini_pdq(ID pdqid)
+{
+	PDQCB	*p_pdqcb;
+	bool_t	dspreq;
+	ER		ercd;
+    
+	LOG_INI_PDQ_ENTER(pdqid);
+	CHECK_TSKCTX_UNL();
+	CHECK_PDQID(pdqid);
+	p_pdqcb = get_pdqcb(pdqid);
+
+	t_lock_cpu();
+	dspreq = init_wait_queue(&(p_pdqcb->swait_queue));
+	if (init_wait_queue(&(p_pdqcb->rwait_queue))) {
+		dspreq = true;
+	}
+	p_pdqcb->count = 0U;
+	p_pdqcb->p_head = NULL;
+	p_pdqcb->unused = 0U;
+	p_pdqcb->p_freelist = NULL;
+	if (dspreq) {
+		dispatch();
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_INI_PDQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ini_pdq */
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_pdq
+
+ER
+ref_pdq(ID pdqid, T_RPDQ *pk_rpdq)
+{
+	PDQCB	*p_pdqcb;
+	ER		ercd;
+    
+	LOG_REF_PDQ_ENTER(pdqid, pk_rpdq);
+	CHECK_TSKCTX_UNL();
+	CHECK_PDQID(pdqid);
+	p_pdqcb = get_pdqcb(pdqid);
+
+	t_lock_cpu();
+	pk_rpdq->stskid = wait_tskid(&(p_pdqcb->swait_queue));
+	pk_rpdq->rtskid = wait_tskid(&(p_pdqcb->rwait_queue));
+	pk_rpdq->spdqcnt = p_pdqcb->count;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_PDQ_LEAVE(ercd, pk_rpdq);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_pdq */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/pridataq.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/pridataq.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/pridataq.h	(revision 136)
@@ -0,0 +1,221 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: pridataq.h 2515 2013-06-12 11:56:59Z ertl-hiro $
+ */
+
+/*
+ *		åªå
+åº¦ãã¼ã¿ã­ã¥ã¼æ©è½
+ */
+
+#ifndef TOPPERS_PRIDATAQ_H
+#define TOPPERS_PRIDATAQ_H
+
+#include "wait.h"
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ç®¡çãã­ãã¯
+ */
+typedef struct pridata_management_block PDQMB;
+
+struct pridata_management_block {
+	PDQMB		*p_next;		/* æ¬¡ã®ãã¼ã¿ */
+	intptr_t	data;			/* ãã¼ã¿æ¬ä½ */
+	PRI			datapri;		/* ãã¼ã¿åªå
+åº¦ */
+};
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼åæåãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WOBJINIBï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct pridataq_initialization_block {
+	ATR			pdqatr;			/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼å±æ§ */
+	uint_t		pdqcnt;			/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®å®¹é */
+	PRI			maxdpri;		/* ãã¼ã¿åªå
+åº¦ã®æå¤§å¤ */
+	PDQMB		*p_pdqmb;		/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çé åã®å
+é ­çªå° */
+} PDQINIB;
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã®å
+±éé¨åï¼WOBJCBï¼
+ *  ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼æåã®2ã¤ã®
+ *  ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct pridataq_control_block {
+	QUEUE		swait_queue;	/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼éä¿¡å¾
+ã¡ã­ã¥ã¼ */
+	const PDQINIB *p_pdqinib;	/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+	QUEUE		rwait_queue;	/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼åä¿¡å¾
+ã¡ã­ã¥ã¼ */
+	uint_t		count;			/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ä¸­ã®ãã¼ã¿ã®æ° */
+	PDQMB		*p_head;		/* æåã®ãã¼ã¿ */
+	uint_t		unused;			/* æªä½¿ç¨ãã¼ã¿ç®¡çãã­ãã¯ã®å
+é ­ */
+	PDQMB		*p_freelist;	/* æªå²å½ã¦ãã¼ã¿ç®¡çãã­ãã¯ã®ãªã¹ã */
+} PDQCB;
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼å¾
+ã¡æ
+å ±ãã­ãã¯ã®å®ç¾©
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡æ
+å ±ãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WINFO_WOBJï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®2ã¤ã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡å¾
+ã¡ã¨åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡å¾
+ã¡ã§ï¼
+ *  åãå¾
+ã¡æ
+å ±ãã­ãã¯ãä½¿ãï¼
+ */
+typedef struct pridataq_waiting_information {
+	WINFO		winfo;			/* æ¨æºã®å¾
+ã¡æ
+å ±ãã­ãã¯ */
+	PDQCB		*p_pdqcb;		/* å¾
+ã£ã¦ããåªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã®ç®¡çãã­ãã¯*/
+	intptr_t	data;			/* éåä¿¡ãã¼ã¿ */
+	PRI			datapri;		/* ãã¼ã¿åªå
+åº¦ */
+} WINFO_PDQ;
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼IDã®æå¤§å¤ï¼kernel_cfg.cï¼
+ */
+extern const ID	tmax_pdqid;
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const PDQINIB	pdqinib_table[];
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern PDQCB	pdqcb_table[];
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çãã­ãã¯ããåªå
+åº¦ãã¼ã¿ã­ã¥ã¼IDãåãåºãã
+ *  ãã®ãã¯ã­
+ */
+#define	PDQID(p_pdqcb)	((ID)(((p_pdqcb) - pdqcb_table) + TMIN_PDQID))
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼æ©è½ã®åæå
+ */
+extern void	initialize_pridataq(void);
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çé åã¸ã®ãã¼ã¿ã®æ ¼ç´
+ */
+extern void	enqueue_pridata(PDQCB *p_pdqcb, intptr_t data, PRI datapri);
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ç®¡çé åããã®ãã¼ã¿ã®ååºã
+ */
+extern void	dequeue_pridata(PDQCB *p_pdqcb, intptr_t *p_data, PRI *p_datapri);
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã¸ã®ãã¼ã¿éä¿¡
+ */
+extern bool_t	send_pridata(PDQCB *p_pdqcb, intptr_t data,
+											PRI datapri, bool_t *p_dspreq);
+
+/*
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ããã®ãã¼ã¿åä¿¡
+ */
+extern bool_t	receive_pridata(PDQCB *p_pdqcb, intptr_t *p_data,
+											PRI *p_datapri, bool_t *p_dspreq);
+
+#endif /* TOPPERS_PRIDATAQ_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/semaphore.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/semaphore.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/semaphore.c	(revision 136)
@@ -0,0 +1,416 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: semaphore.c 2133 2011-06-26 03:14:51Z ertl-hiro $
+ */
+
+/*
+ *		ã»ããã©æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "wait.h"
+#include "semaphore.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_SIG_SEM_ENTER
+#define LOG_SIG_SEM_ENTER(semid)
+#endif /* LOG_SIG_SEM_ENTER */
+
+#ifndef LOG_SIG_SEM_LEAVE
+#define LOG_SIG_SEM_LEAVE(ercd)
+#endif /* LOG_SIG_SEM_LEAVE */
+
+#ifndef LOG_ISIG_SEM_ENTER
+#define LOG_ISIG_SEM_ENTER(semid)
+#endif /* LOG_ISIG_SEM_ENTER */
+
+#ifndef LOG_ISIG_SEM_LEAVE
+#define LOG_ISIG_SEM_LEAVE(ercd)
+#endif /* LOG_ISIG_SEM_LEAVE */
+
+#ifndef LOG_WAI_SEM_ENTER
+#define LOG_WAI_SEM_ENTER(semid)
+#endif /* LOG_WAI_SEM_ENTER */
+
+#ifndef LOG_WAI_SEM_LEAVE
+#define LOG_WAI_SEM_LEAVE(ercd)
+#endif /* LOG_WAI_SEM_LEAVE */
+
+#ifndef LOG_POL_SEM_ENTER
+#define LOG_POL_SEM_ENTER(semid)
+#endif /* LOG_POL_SEM_ENTER */
+
+#ifndef LOG_POL_SEM_LEAVE
+#define LOG_POL_SEM_LEAVE(ercd)
+#endif /* LOG_POL_SEM_LEAVE */
+
+#ifndef LOG_TWAI_SEM_ENTER
+#define LOG_TWAI_SEM_ENTER(semid, tmout)
+#endif /* LOG_TWAI_SEM_ENTER */
+
+#ifndef LOG_TWAI_SEM_LEAVE
+#define LOG_TWAI_SEM_LEAVE(ercd)
+#endif /* LOG_TWAI_SEM_LEAVE */
+
+#ifndef LOG_INI_SEM_ENTER
+#define LOG_INI_SEM_ENTER(semid)
+#endif /* LOG_INI_SEM_ENTER */
+
+#ifndef LOG_INI_SEM_LEAVE
+#define LOG_INI_SEM_LEAVE(ercd)
+#endif /* LOG_INI_SEM_LEAVE */
+
+#ifndef LOG_REF_SEM_ENTER
+#define LOG_REF_SEM_ENTER(semid, pk_rsem)
+#endif /* LOG_REF_SEM_ENTER */
+
+#ifndef LOG_REF_SEM_LEAVE
+#define LOG_REF_SEM_LEAVE(ercd, pk_rsem)
+#endif /* LOG_REF_SEM_LEAVE */
+
+/*
+ *  ã»ããã©ã®æ°
+ */
+#define tnum_sem	((uint_t)(tmax_semid - TMIN_SEMID + 1))
+
+/*
+ *  ã»ããã©IDããã»ããã©ç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_SEM(semid)	((uint_t)((semid) - TMIN_SEMID))
+#define get_semcb(semid)	(&(semcb_table[INDEX_SEM(semid)]))
+
+/* 
+ *  ã»ããã©æ©è½ã®åæå
+ */
+#ifdef TOPPERS_semini
+
+void
+initialize_semaphore(void)
+{
+	uint_t	i;
+	SEMCB	*p_semcb;
+
+	for (i = 0; i < tnum_sem; i++) {
+		p_semcb = &(semcb_table[i]);
+		queue_initialize(&(p_semcb->wait_queue));
+		p_semcb->p_seminib = &(seminib_table[i]);
+		p_semcb->semcnt = p_semcb->p_seminib->isemcnt;
+	}
+}
+
+#endif /* TOPPERS_semini */
+
+/*
+ *  ã»ããã©è³æºã®è¿å´
+ */
+#ifdef TOPPERS_sig_sem
+
+ER
+sig_sem(ID semid)
+{
+	SEMCB	*p_semcb;
+	TCB		*p_tcb;
+	ER		ercd;
+    
+	LOG_SIG_SEM_ENTER(semid);
+	CHECK_TSKCTX_UNL();
+	CHECK_SEMID(semid);
+	p_semcb = get_semcb(semid);
+
+	t_lock_cpu();
+	if (!queue_empty(&(p_semcb->wait_queue))) {
+		p_tcb = (TCB *) queue_delete_next(&(p_semcb->wait_queue));
+		if (wait_complete(p_tcb)) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else if (p_semcb->semcnt < p_semcb->p_seminib->maxsem) {
+		p_semcb->semcnt += 1;
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_QOVR;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_SIG_SEM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_sig_sem */
+
+/*
+ *  ã»ããã©è³æºã®è¿å´ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_isig_sem
+
+ER
+isig_sem(ID semid)
+{
+	SEMCB	*p_semcb;
+	TCB		*p_tcb;
+	ER		ercd;
+    
+	LOG_ISIG_SEM_ENTER(semid);
+	CHECK_INTCTX_UNL();
+	CHECK_SEMID(semid);
+	p_semcb = get_semcb(semid);
+
+	i_lock_cpu();
+	if (!queue_empty(&(p_semcb->wait_queue))) {
+		p_tcb = (TCB *) queue_delete_next(&(p_semcb->wait_queue));
+		if (wait_complete(p_tcb)) {
+			reqflg = true;
+		}
+		ercd = E_OK;
+	}
+	else if (p_semcb->semcnt < p_semcb->p_seminib->maxsem) {
+		p_semcb->semcnt += 1;
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_QOVR;
+	}
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_ISIG_SEM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_isig_sem */
+
+/*
+ *  ã»ããã©è³æºã®ç²å¾
+ */
+#ifdef TOPPERS_wai_sem
+
+ER
+wai_sem(ID semid)
+{
+	SEMCB	*p_semcb;
+	WINFO_SEM winfo_sem;
+	ER		ercd;
+
+	LOG_WAI_SEM_ENTER(semid);
+	CHECK_DISPATCH();
+	CHECK_SEMID(semid);
+	p_semcb = get_semcb(semid);
+
+	t_lock_cpu();
+	if (p_semcb->semcnt >= 1) {
+		p_semcb->semcnt -= 1;
+		ercd = E_OK;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_SEM);
+		wobj_make_wait((WOBJCB *) p_semcb, (WINFO_WOBJ *) &winfo_sem);
+		dispatch();
+		ercd = winfo_sem.winfo.wercd;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_WAI_SEM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_wai_sem */
+
+/*
+ *  ã»ããã©è³æºã®ç²å¾ï¼ãã¼ãªã³ã°ï¼
+ */
+#ifdef TOPPERS_pol_sem
+
+ER
+pol_sem(ID semid)
+{
+	SEMCB	*p_semcb;
+	ER		ercd;
+
+	LOG_POL_SEM_ENTER(semid);
+	CHECK_TSKCTX_UNL();
+	CHECK_SEMID(semid);
+	p_semcb = get_semcb(semid);
+
+	t_lock_cpu();
+	if (p_semcb->semcnt >= 1) {
+		p_semcb->semcnt -= 1;
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_TMOUT;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_POL_SEM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_pol_sem */
+
+/*
+ *  ã»ããã©è³æºã®ç²å¾ï¼ã¿ã¤ã ã¢ã¦ãããï¼
+ */
+#ifdef TOPPERS_twai_sem
+
+ER
+twai_sem(ID semid, TMO tmout)
+{
+	SEMCB	*p_semcb;
+	WINFO_SEM winfo_sem;
+	TMEVTB	tmevtb;
+	ER		ercd;
+
+	LOG_TWAI_SEM_ENTER(semid, tmout);
+	CHECK_DISPATCH();
+	CHECK_SEMID(semid);
+	CHECK_TMOUT(tmout);
+	p_semcb = get_semcb(semid);
+
+	t_lock_cpu();
+	if (p_semcb->semcnt >= 1) {
+		p_semcb->semcnt -= 1;
+		ercd = E_OK;
+	}
+	else if (tmout == TMO_POL) {
+		ercd = E_TMOUT;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_SEM);
+		wobj_make_wait_tmout((WOBJCB *) p_semcb, (WINFO_WOBJ *) &winfo_sem,
+														&tmevtb, tmout);
+		dispatch();
+		ercd = winfo_sem.winfo.wercd;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TWAI_SEM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_twai_sem */
+
+/*
+ *  ã»ããã©ã®ååæå
+ */
+#ifdef TOPPERS_ini_sem
+
+ER
+ini_sem(ID semid)
+{
+	SEMCB	*p_semcb;
+	bool_t	dspreq;
+	ER		ercd;
+    
+	LOG_INI_SEM_ENTER(semid);
+	CHECK_TSKCTX_UNL();
+	CHECK_SEMID(semid);
+	p_semcb = get_semcb(semid);
+
+	t_lock_cpu();
+	dspreq = init_wait_queue(&(p_semcb->wait_queue));
+	p_semcb->semcnt = p_semcb->p_seminib->isemcnt;
+	if (dspreq) {
+		dispatch();
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_INI_SEM_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ini_sem */
+
+/*
+ *  ã»ããã©ã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_sem
+
+ER
+ref_sem(ID semid, T_RSEM *pk_rsem)
+{
+	SEMCB	*p_semcb;
+	ER		ercd;
+    
+	LOG_REF_SEM_ENTER(semid, pk_rsem);
+	CHECK_TSKCTX_UNL();
+	CHECK_SEMID(semid);
+	p_semcb = get_semcb(semid);
+
+	t_lock_cpu();
+	pk_rsem->wtskid = wait_tskid(&(p_semcb->wait_queue));
+	pk_rsem->semcnt = p_semcb->semcnt;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_SEM_LEAVE(ercd, pk_rsem);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_sem */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/semaphore.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/semaphore.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/semaphore.h	(revision 136)
@@ -0,0 +1,144 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: semaphore.h 2228 2011-08-14 00:35:44Z ertl-hiro $
+ */
+
+/*
+ *		ã»ããã©æ©è½
+ */
+
+#ifndef TOPPERS_SEMAPHORE_H
+#define TOPPERS_SEMAPHORE_H
+
+#include "wait.h"
+
+/*
+ *  ã»ããã©åæåãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WOBJINIBï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  æåã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct semaphore_initialization_block {
+	ATR			sematr;			/* ã»ããã©å±æ§ */
+	uint_t		isemcnt;		/* ã»ããã©ã®è³æºæ°ã®åæå¤ */
+	uint_t		maxsem;			/* ã»ããã©ã®æå¤§è³æºæ° */
+} SEMINIB;
+
+/*
+ *  ã»ããã©ç®¡çãã­ãã¯
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã®å
+±éé¨åï¼WOBJCBï¼
+ *  ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼æåã®2ã¤ã®
+ *  ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct semaphore_control_block {
+	QUEUE		wait_queue;		/* ã»ããã©å¾
+ã¡ã­ã¥ã¼ */
+	const SEMINIB *p_seminib;	/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+	uint_t		semcnt;			/* ã»ããã©ç¾å¨ã«ã¦ã³ãå¤ */
+} SEMCB;
+
+/*
+ *  ã»ããã©å¾
+ã¡æ
+å ±ãã­ãã¯ã®å®ç¾©
+ *
+ *  ãã®æ§é ä½ã¯ï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡æ
+å ±ãã­ãã¯ã®å
+±éé¨å
+ *  ï¼WINFO_WOBJï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ï¼
+ *  ãã¹ã¦ã®ãã£ã¼ã«ããå
+±éã«ãªã£ã¦ããï¼
+ */
+typedef struct semaphore_waiting_information {
+	WINFO	winfo;			/* æ¨æºã®å¾
+ã¡æ
+å ±ãã­ãã¯ */
+	SEMCB	*p_semcb;		/* å¾
+ã£ã¦ããã»ããã©ã®ç®¡çãã­ãã¯ */
+} WINFO_SEM;
+
+/*
+ *  ã»ããã©IDã®æå¤§å¤ï¼kernel_cfg.cï¼
+ */
+extern const ID	tmax_semid;
+
+/*
+ *  ã»ããã©åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const SEMINIB	seminib_table[];
+
+/*
+ *  ã»ããã©ç®¡çãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern SEMCB	semcb_table[];
+
+/*
+ *  ã»ããã©ç®¡çãã­ãã¯ããã»ããã©IDãåãåºãããã®ãã¯ã­
+ */
+#define	SEMID(p_semcb)	((ID)(((p_semcb) - semcb_table) + TMIN_SEMID))
+
+/*
+ *  ã»ããã©æ©è½ã®åæå
+ */
+extern void	initialize_semaphore(void);
+
+#endif /* TOPPERS_SEMAPHORE_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/startup.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/startup.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/startup.c	(revision 136)
@@ -0,0 +1,192 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2009 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: startup.c 2067 2011-05-05 00:46:29Z ertl-hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«ã®åæåã¨çµäºå¦ç
+ */
+
+#include "kernel_impl.h"
+#include "time_event.h"
+#include <sil.h>
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_KER_ENTER
+#define LOG_KER_ENTER()
+#endif /* LOG_KER_ENTER */
+
+#ifndef LOG_KER_LEAVE
+#define LOG_KER_LEAVE()
+#endif /* LOG_KER_LEAVE */
+
+#ifndef LOG_EXT_KER_ENTER
+#define LOG_EXT_KER_ENTER()
+#endif /* LOG_EXT_KER_ENTER */
+
+#ifndef LOG_EXT_KER_LEAVE
+#define LOG_EXT_KER_LEAVE(ercd)
+#endif /* LOG_EXT_KER_LEAVE */
+
+#ifdef TOPPERS_sta_ker
+
+/*
+ *  ã«ã¼ãã«åä½ç¶æ
+ãã©ã°
+ *
+ *  ã¹ã¿ã¼ãã¢ããã«ã¼ãã³ã§ï¼falseï¼ï¼0ï¼ã«åæåããããã¨ãæå¾
+ãã¦
+ *  ããï¼
+ */
+bool_t	kerflg = false;
+
+/*
+ *  ã«ã¼ãã«ã®èµ·å
+ */
+void
+sta_ker(void)
+{
+	/*
+	 *  ã¿ã¼ã²ããä¾å­ã®åæå
+	 */
+	target_initialize();
+
+	/*
+	 *  åã¢ã¸ã¥ã¼ã«ã®åæå
+	 *
+	 *  ã¿ã¤ã ã¤ãã³ãç®¡çã¢ã¸ã¥ã¼ã«ã¯ä»ã®ã¢ã¸ã¥ã¼ã«ããå
+ã«åæå
+	 *  ããå¿
+è¦ãããï¼
+	 */
+	initialize_tmevt();
+	initialize_object();
+
+	/*
+	 *  åæåã«ã¼ãã³ã®å®è¡
+	 */ 
+	call_inirtn();
+
+	/*
+	 *  ã«ã¼ãã«åä½ã®éå§
+	 */
+	kerflg = true;
+	LOG_KER_ENTER();
+	start_dispatch();
+	assert(0);
+}
+
+#endif /* TOPPERS_sta_ker */
+
+/*
+ *  ã«ã¼ãã«ã®çµäº
+ */
+#ifdef TOPPERS_ext_ker
+
+ER
+ext_ker(void)
+{
+	SIL_PRE_LOC;
+
+	LOG_EXT_KER_ENTER();
+
+	/*
+	 *  å²è¾¼ã¿ã­ãã¯ç¶æ
+ã«ç§»è¡
+	 */
+	SIL_LOC_INT();
+
+	/*
+	 *  ã«ã¼ãã«åä½ã®çµäº
+	 */
+	LOG_KER_LEAVE();
+	kerflg = false;
+
+	/*
+	 *  ã«ã¼ãã«ã®çµäºå¦çã®å¼åºã
+	 *
+	 *  éã¿ã¹ã¯ã³ã³ãã­ã¹ãã«åãæãã¦ï¼exit_kernelãå¼ã³åºãï¼
+	 */
+	call_exit_kernel();
+
+	/*
+	 *  ã³ã³ãã¤ã©ã®è­¦åå¯¾ç­ï¼ããã¸æ¥ããã¨ã¯ãªãã¯ãï¼
+	 */
+	SIL_UNL_INT();
+	LOG_EXT_KER_LEAVE(E_SYS);
+	return(E_SYS);
+}
+
+/*
+ *  ã«ã¼ãã«ã®çµäºå¦ç
+ */
+void
+exit_kernel(void)
+{
+	/*
+	 *  çµäºå¦çã«ã¼ãã³ã®å®è¡
+	 */
+	call_terrtn();
+
+	/*
+	 *  ã¿ã¼ã²ããä¾å­ã®çµäºå¦ç
+	 */
+	target_exit();
+	assert(0);
+}
+
+#endif /* TOPPERS_ext_ker */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/sys_manage.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/sys_manage.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/sys_manage.c	(revision 136)
@@ -0,0 +1,576 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: sys_manage.c 2008 2010-12-31 12:41:42Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ç¶æ
+ç®¡çæ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_ROT_RDQ_ENTER
+#define LOG_ROT_RDQ_ENTER(tskpri)
+#endif /* LOG_ROT_RDQ_ENTER */
+
+#ifndef LOG_ROT_RDQ_LEAVE
+#define LOG_ROT_RDQ_LEAVE(ercd)
+#endif /* LOG_ROT_RDQ_LEAVE */
+
+#ifndef LOG_IROT_RDQ_ENTER
+#define LOG_IROT_RDQ_ENTER(tskpri)
+#endif /* LOG_IROT_RDQ_ENTER */
+
+#ifndef LOG_IROT_RDQ_LEAVE
+#define LOG_IROT_RDQ_LEAVE(ercd)
+#endif /* LOG_IROT_RDQ_LEAVE */
+
+#ifndef LOG_GET_TID_ENTER
+#define LOG_GET_TID_ENTER(p_tskid)
+#endif /* LOG_GET_TID_ENTER */
+
+#ifndef LOG_GET_TID_LEAVE
+#define LOG_GET_TID_LEAVE(ercd, tskid)
+#endif /* LOG_GET_TID_LEAVE */
+
+#ifndef LOG_IGET_TID_ENTER
+#define LOG_IGET_TID_ENTER(p_tskid)
+#endif /* LOG_IGET_TID_ENTER */
+
+#ifndef LOG_IGET_TID_LEAVE
+#define LOG_IGET_TID_LEAVE(ercd, tskid)
+#endif /* LOG_IGET_TID_LEAVE */
+
+#ifndef LOG_LOC_CPU_ENTER
+#define LOG_LOC_CPU_ENTER()
+#endif /* LOG_LOC_CPU_ENTER */
+
+#ifndef LOG_LOC_CPU_LEAVE
+#define LOG_LOC_CPU_LEAVE(ercd)
+#endif /* LOG_LOC_CPU_LEAVE */
+
+#ifndef LOG_ILOC_CPU_ENTER
+#define LOG_ILOC_CPU_ENTER()
+#endif /* LOG_ILOC_CPU_ENTER */
+
+#ifndef LOG_ILOC_CPU_LEAVE
+#define LOG_ILOC_CPU_LEAVE(ercd)
+#endif /* LOG_ILOC_CPU_LEAVE */
+
+#ifndef LOG_UNL_CPU_ENTER
+#define LOG_UNL_CPU_ENTER()
+#endif /* LOG_UNL_CPU_ENTER */
+
+#ifndef LOG_UNL_CPU_LEAVE
+#define LOG_UNL_CPU_LEAVE(ercd)
+#endif /* LOG_UNL_CPU_LEAVE */
+
+#ifndef LOG_IUNL_CPU_ENTER
+#define LOG_IUNL_CPU_ENTER()
+#endif /* LOG_IUNL_CPU_ENTER */
+
+#ifndef LOG_IUNL_CPU_LEAVE
+#define LOG_IUNL_CPU_LEAVE(ercd)
+#endif /* LOG_IUNL_CPU_LEAVE */
+
+#ifndef LOG_DIS_DSP_ENTER
+#define LOG_DIS_DSP_ENTER()
+#endif /* LOG_DIS_DSP_ENTER */
+
+#ifndef LOG_DIS_DSP_LEAVE
+#define LOG_DIS_DSP_LEAVE(ercd)
+#endif /* LOG_DIS_DSP_LEAVE */
+
+#ifndef LOG_ENA_DSP_ENTER
+#define LOG_ENA_DSP_ENTER()
+#endif /* LOG_ENA_DSP_ENTER */
+
+#ifndef LOG_ENA_DSP_LEAVE
+#define LOG_ENA_DSP_LEAVE(ercd)
+#endif /* LOG_ENA_DSP_LEAVE */
+
+#ifndef LOG_SNS_CTX_ENTER
+#define LOG_SNS_CTX_ENTER()
+#endif /* LOG_SNS_CTX_ENTER */
+
+#ifndef LOG_SNS_CTX_LEAVE
+#define LOG_SNS_CTX_LEAVE(state)
+#endif /* LOG_SNS_CTX_LEAVE */
+
+#ifndef LOG_SNS_LOC_ENTER
+#define LOG_SNS_LOC_ENTER()
+#endif /* LOG_SNS_LOC_ENTER */
+
+#ifndef LOG_SNS_LOC_LEAVE
+#define LOG_SNS_LOC_LEAVE(state)
+#endif /* LOG_SNS_LOC_LEAVE */
+
+#ifndef LOG_SNS_DSP_ENTER
+#define LOG_SNS_DSP_ENTER()
+#endif /* LOG_SNS_DSP_ENTER */
+
+#ifndef LOG_SNS_DSP_LEAVE
+#define LOG_SNS_DSP_LEAVE(state)
+#endif /* LOG_SNS_DSP_LEAVE */
+
+#ifndef LOG_SNS_DPN_ENTER
+#define LOG_SNS_DPN_ENTER()
+#endif /* LOG_SNS_DPN_ENTER */
+
+#ifndef LOG_SNS_DPN_LEAVE
+#define LOG_SNS_DPN_LEAVE(state)
+#endif /* LOG_SNS_DPN_LEAVE */
+
+#ifndef LOG_SNS_KER_ENTER
+#define LOG_SNS_KER_ENTER()
+#endif /* LOG_SNS_KER_ENTER */
+
+#ifndef LOG_SNS_KER_LEAVE
+#define LOG_SNS_KER_LEAVE(state)
+#endif /* LOG_SNS_KER_LEAVE */
+
+/*
+ *  ã¿ã¹ã¯ã®åªå
+é ä½ã®åè»¢
+ */
+#ifdef TOPPERS_rot_rdq
+
+ER
+rot_rdq(PRI tskpri)
+{
+	uint_t	pri;
+	ER		ercd;
+
+	LOG_ROT_RDQ_ENTER(tskpri);
+	CHECK_TSKCTX_UNL();
+	CHECK_TPRI_SELF(tskpri);
+
+	t_lock_cpu();
+	pri = (tskpri == TPRI_SELF) ? p_runtsk->priority : INT_PRIORITY(tskpri);
+	if (rotate_ready_queue(pri)) {
+		dispatch();
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_ROT_RDQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_rot_rdq */
+
+/*
+ *  ã¿ã¹ã¯ã®åªå
+é ä½ã®åè»¢ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_irot_rdq
+
+ER
+irot_rdq(PRI tskpri)
+{
+	ER		ercd;
+
+	LOG_IROT_RDQ_ENTER(tskpri);
+	CHECK_INTCTX_UNL();
+	CHECK_TPRI(tskpri);
+
+	i_lock_cpu();
+	if (rotate_ready_queue(INT_PRIORITY(tskpri))) {
+		reqflg = true;
+	}
+	ercd = E_OK;
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_IROT_RDQ_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_irot_rdq */
+
+/*
+ *  å®è¡ç¶æ
+ã®ã¿ã¹ã¯IDã®åç
+§
+ */
+#ifdef TOPPERS_get_tid
+
+ER
+get_tid(ID *p_tskid)
+{
+	ER		ercd;
+
+	LOG_GET_TID_ENTER(p_tskid);
+	CHECK_TSKCTX_UNL();
+
+	t_lock_cpu();
+	*p_tskid = TSKID(p_runtsk);
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_GET_TID_LEAVE(ercd, *p_tskid);
+	return(ercd);
+}
+
+#endif /* TOPPERS_get_tid */
+
+/*
+ *  å®è¡ç¶æ
+ã®ã¿ã¹ã¯IDã®åç
+§ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_iget_tid
+
+ER
+iget_tid(ID *p_tskid)
+{
+	ER		ercd;
+
+	LOG_IGET_TID_ENTER(p_tskid);
+	CHECK_INTCTX_UNL();
+
+	i_lock_cpu();
+	*p_tskid = (p_runtsk == NULL) ? TSK_NONE : TSKID(p_runtsk);
+	ercd = E_OK;
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_IGET_TID_LEAVE(ercd, *p_tskid);
+	return(ercd);
+}
+
+#endif /* TOPPERS_iget_tid */
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã¸ã®ç§»è¡
+ */
+#ifdef TOPPERS_loc_cpu
+
+ER
+loc_cpu(void)
+{
+	ER		ercd;
+
+	LOG_LOC_CPU_ENTER();
+	CHECK_TSKCTX();
+
+	if (!t_sense_lock()) {
+		t_lock_cpu();
+	}
+	ercd = E_OK;
+
+  error_exit:
+	LOG_LOC_CPU_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_loc_cpu */
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã¸ã®ç§»è¡ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_iloc_cpu
+
+ER
+iloc_cpu(void)
+{
+	ER		ercd;
+
+	LOG_ILOC_CPU_ENTER();
+	CHECK_INTCTX();
+
+	if (!i_sense_lock()) {
+		i_lock_cpu();
+	}
+	ercd = E_OK;
+
+  error_exit:
+	LOG_ILOC_CPU_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_iloc_cpu */
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã®è§£é¤
+ *
+ *  CPUã­ãã¯ä¸­ã¯ï¼ãã£ã¹ããããå¿
+è¦ã¨ãªããµã¼ãã¹ã³ã¼ã«ãå¼ã³åºãã
+ *  ã¨ã¯ã§ããªãããï¼CPUã­ãã¯ç¶æ
+ã®è§£é¤æã«ãã£ã¹ãããã£ãèµ·åãã
+ *  å¿
+è¦ã¯ãªãï¼
+ */
+#ifdef TOPPERS_unl_cpu
+
+ER
+unl_cpu(void)
+{
+	ER		ercd;
+
+	LOG_UNL_CPU_ENTER();
+	CHECK_TSKCTX();
+
+	if (t_sense_lock()) {
+		t_unlock_cpu();
+	}
+	ercd = E_OK;
+
+  error_exit:
+	LOG_UNL_CPU_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_unl_cpu */
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã®è§£é¤ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ *
+ *  CPUã­ãã¯ä¸­ã¯ï¼ãã£ã¹ããããå¿
+è¦ã¨ãªããµã¼ãã¹ã³ã¼ã«ãå¼ã³åºãã
+ *  ã¨ã¯ã§ããªãããï¼CPUã­ãã¯ç¶æ
+ã®è§£é¤æã«ãã£ã¹ãããã£ã®èµ·åãè¦
+ *  æ±ããå¿
+è¦ã¯ãªãï¼
+ */
+#ifdef TOPPERS_iunl_cpu
+
+ER
+iunl_cpu(void)
+{
+	ER		ercd;
+
+	LOG_IUNL_CPU_ENTER();
+	CHECK_INTCTX();
+
+	if (i_sense_lock()) {
+		i_unlock_cpu();
+	}
+	ercd = E_OK;
+
+  error_exit:
+	LOG_IUNL_CPU_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_iunl_cpu */
+
+/*
+ *  ãã£ã¹ãããã®ç¦æ­¢
+ */
+#ifdef TOPPERS_dis_dsp
+
+ER
+dis_dsp(void)
+{
+	ER		ercd;
+
+	LOG_DIS_DSP_ENTER();
+	CHECK_TSKCTX_UNL();
+
+	t_lock_cpu();
+	disdsp = true;
+	dspflg = false;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_DIS_DSP_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_dis_dsp */
+
+/*
+ *  ãã£ã¹ãããã®è¨±å¯
+ */
+#ifdef TOPPERS_ena_dsp
+
+ER
+ena_dsp(void)
+{
+	ER		ercd;
+
+	LOG_ENA_DSP_ENTER();
+	CHECK_TSKCTX_UNL();
+
+	t_lock_cpu();
+	disdsp = false;
+	if (ipmflg) {
+		dspflg = true;
+		if (p_runtsk != p_schedtsk) {
+			dispatch();
+		}
+	}
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_ENA_DSP_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ena_dsp */
+
+/*
+ *  ã³ã³ãã­ã¹ãã®åç
+§
+ */
+#ifdef TOPPERS_sns_ctx
+
+bool_t
+sns_ctx(void)
+{
+	bool_t	state;
+
+	LOG_SNS_CTX_ENTER();
+	state = sense_context() ? true : false;
+	LOG_SNS_CTX_LEAVE(state);
+	return(state);
+}
+
+#endif /* TOPPERS_sns_ctx */
+
+/*
+ *  CPUã­ãã¯ç¶æ
+ã®åç
+§
+ */
+#ifdef TOPPERS_sns_loc
+
+bool_t
+sns_loc(void)
+{
+	bool_t	state;
+
+	LOG_SNS_LOC_ENTER();
+	state = x_sense_lock() ? true : false;
+	LOG_SNS_LOC_LEAVE(state);
+	return(state);
+}
+
+#endif /* TOPPERS_sns_loc */
+
+/*
+ *  ãã£ã¹ãããç¦æ­¢ç¶æ
+ã®åç
+§
+ */
+#ifdef TOPPERS_sns_dsp
+
+bool_t
+sns_dsp(void)
+{
+	bool_t	state;
+
+	LOG_SNS_DSP_ENTER();
+	state = disdsp;
+	LOG_SNS_DSP_LEAVE(state);
+	return(state);
+}
+
+#endif /* TOPPERS_sns_dsp */
+
+/*
+ *  ãã£ã¹ãããä¿çç¶æ
+ã®åç
+§
+ */
+#ifdef TOPPERS_sns_dpn
+
+bool_t
+sns_dpn(void)
+{
+	bool_t	state;
+
+	LOG_SNS_DPN_ENTER();
+	state = (sense_context() || t_sense_lock() || !dspflg) ? true : false;
+	LOG_SNS_DPN_LEAVE(state);
+	return(state);
+}
+
+#endif /* TOPPERS_sns_dpn */
+
+/*
+ *  ã«ã¼ãã«éåä½ç¶æ
+ã®åç
+§
+ */
+#ifdef TOPPERS_sns_ker
+
+bool_t
+sns_ker(void)
+{
+	bool_t	state;
+
+	LOG_SNS_KER_ENTER();
+	state = kerflg ? false : true;
+	LOG_SNS_KER_LEAVE(state);
+	return(state);
+}
+
+#endif /* TOPPERS_sns_ker */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/task.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/task.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/task.c	(revision 136)
@@ -0,0 +1,554 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: task.c 2248 2011-08-30 01:05:11Z ertl-hiro $
+ */
+
+/*
+ *		ã¿ã¹ã¯ç®¡çã¢ã¸ã¥ã¼ã«
+ */
+
+#include "kernel_impl.h"
+#include "wait.h"
+#include "task.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_TEX_ENTER
+#define LOG_TEX_ENTER(p_tcb, texptn)
+#endif /* LOG_TEX_ENTER */
+
+#ifndef LOG_TEX_LEAVE
+#define LOG_TEX_LEAVE(p_tcb)
+#endif /* LOG_TEX_LEAVE */
+
+#ifdef TOPPERS_tskini
+
+/*
+ *  å®è¡ç¶æ
+ã®ã¿ã¹ã¯
+ */
+TCB		*p_runtsk;
+
+/*
+ *  æé«åªå
+é ä½ã®ã¿ã¹ã¯
+ */
+TCB		*p_schedtsk;
+
+/*
+ *  ã¿ã¹ã¯ãã£ã¹ãããï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³èµ·åè¦æ±ãã©ã°
+ */
+bool_t	reqflg;
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+
+ */
+bool_t	ipmflg;
+
+/*
+ *  ãã£ã¹ãããç¦æ­¢ç¶æ
+
+ */
+bool_t	disdsp;
+
+/*
+ *  ã¿ã¹ã¯ãã£ã¹ãããå¯è½ç¶æ
+
+ */
+bool_t	dspflg;
+
+/*
+ *  ã¬ãã£ã­ã¥ã¼
+ */
+QUEUE	ready_queue[TNUM_TPRI];
+
+/*
+ *  ã¬ãã£ã­ã¥ã¼ãµã¼ãã®ããã®ãããããã
+ */
+uint16_t	ready_primap;
+
+/*
+ *  ã¿ã¹ã¯ç®¡çã¢ã¸ã¥ã¼ã«ã®åæå
+ */
+void
+initialize_task(void)
+{
+	uint_t	i, j;
+	TCB		*p_tcb;
+
+	p_runtsk = NULL;
+	p_schedtsk = NULL;
+	reqflg = false;
+	ipmflg = true;
+	disdsp = false;
+	dspflg = true;
+
+	for (i = 0; i < TNUM_TPRI; i++) {
+		queue_initialize(&(ready_queue[i]));
+	}
+	ready_primap = 0U;
+
+	for (i = 0; i < tnum_tsk; i++) {
+		j = INDEX_TSK(torder_table[i]);
+		p_tcb = &(tcb_table[j]);
+		p_tcb->p_tinib = &(tinib_table[j]);
+		p_tcb->actque = false;
+		make_dormant(p_tcb);
+		if ((p_tcb->p_tinib->tskatr & TA_ACT) != 0U) {
+			(void) make_active(p_tcb);
+		}
+	}
+}
+
+#endif /* TOPPERS_tskini */
+
+/*
+ *  ãããããããµã¼ãé¢æ°
+ *
+ *  bitmapå
+ã®1ã®ãããã®å
+ï¼æãä¸ä½ï¼å³ï¼ã®ãã®ããµã¼ããï¼ãã®ãã
+ *  ãçªå·ãè¿ãï¼ãããçªå·ã¯ï¼æä¸ä½ãããã0ã¨ããï¼bitmapã«0ãæå®
+ *  ãã¦ã¯ãªããªãï¼ãã®é¢æ°ã§ã¯ï¼bitmapã16ãããã§ãããã¨ãä»®å®ãï¼
+ *  uint16_tåã¨ãã¦ããï¼
+ *
+ *  ããããµã¼ãå½ä»¤ãæã¤ãã­ã»ããµã§ã¯ï¼ããããµã¼ãå½ä»¤ãä½¿ãããã«
+ *  æ¸ãç´ããæ¹ãå¹çãè¯ãå ´åãããï¼ãã®ãããªå ´åã«ã¯ï¼ã¿ã¼ã²ãã
+ *  ä¾å­é¨ã§ããããµã¼ãå½ä»¤ãä½¿ã£ãbitmap_searchãå®ç¾©ãï¼
+ *  OMIT_BITMAP_SEARCHããã¯ã­å®ç¾©ããã°ããï¼ã¾ãï¼ããããµã¼ãå½ä»¤ã®
+ *  ãµã¼ãæ¹åãéãªã©ã®çç±ã§åªå
+åº¦ã¨ãããã¨ã®å¯¾å¿ãå¤æ´ãããå ´åã«
+ *  ã¯ï¼PRIMAP_BITããã¯ã­å®ç¾©ããã°ããï¼
+ *
+ *  ã¾ãï¼ã©ã¤ãã©ãªã«ffsããããªãï¼æ¬¡ã®ããã«å®ç¾©ãã¦ã©ã¤ãã©ãªé¢æ°ã
+ *  ä½¿ã£ãæ¹ãå¹çãè¯ãå¯è½æ§ãããï¼
+ *		#define	bitmap_search(bitmap) (ffs(bitmap) - 1)
+ */
+#ifndef PRIMAP_BIT
+#define	PRIMAP_BIT(pri)		(1U << (pri))
+#endif /* PRIMAP_BIT */
+
+#ifndef OMIT_BITMAP_SEARCH
+
+static const unsigned char bitmap_search_table[] = { 0, 1, 0, 2, 0, 1, 0,
+												3, 0, 1, 0, 2, 0, 1, 0 };
+
+Inline uint_t
+bitmap_search(uint16_t bitmap)
+{
+	uint_t	n = 0U;
+
+	assert(bitmap != 0U);
+	if ((bitmap & 0x00ffU) == 0U) {
+		bitmap >>= 8;
+		n += 8;
+	}
+	if ((bitmap & 0x0fU) == 0U) {
+		bitmap >>= 4;
+		n += 4;
+	}
+	return(n + bitmap_search_table[(bitmap & 0x0fU) - 1]);
+}
+
+#endif /* OMIT_BITMAP_SEARCH */
+
+/*
+ *  åªå
+åº¦ãããããããç©ºãã®ãã§ãã¯
+ */
+Inline bool_t
+primap_empty(void)
+{
+	return(ready_primap == 0U);
+}
+
+/*
+ *  åªå
+åº¦ããããããã®ãµã¼ã
+ */
+Inline uint_t
+primap_search(void)
+{
+	return(bitmap_search(ready_primap));
+}
+
+/*
+ *  åªå
+åº¦ããããããã®ã»ãã
+ */
+Inline void
+primap_set(uint_t pri)
+{
+	ready_primap |= PRIMAP_BIT(pri);
+}
+
+/*
+ *  åªå
+åº¦ããããããã®ã¯ãªã¢
+ */
+Inline void
+primap_clear(uint_t pri)
+{
+	ready_primap &= ~PRIMAP_BIT(pri);
+}
+
+/*
+ *  æé«åªå
+é ä½ã¿ã¹ã¯ã®ãµã¼ã
+ */
+#ifdef TOPPERS_tsksched
+
+TCB *
+search_schedtsk(void)
+{
+	uint_t	schedpri;
+
+	schedpri = primap_search();
+	return((TCB *)(ready_queue[schedpri].p_next));
+}
+
+#endif /* TOPPERS_tsksched */
+
+/*
+ *  å®è¡ã§ããç¶æ
+ã¸ã®é·ç§»
+ *
+ *  æé«åªå
+é ä½ã®ã¿ã¹ã¯ãæ´æ°ããã®ã¯ï¼å®è¡ã§ããã¿ã¹ã¯ããªãã£ãå ´å
+ *  ã¨ï¼p_tcbã®åªå
+åº¦ãæé«åªå
+é ä½ã®ã¿ã¹ã¯ã®åªå
+åº¦ãããé«ãå ´åã§ã
+ *  ãï¼
+ */
+#ifdef TOPPERS_tskrun
+
+bool_t
+make_runnable(TCB *p_tcb)
+{
+	uint_t	pri = p_tcb->priority;
+
+	queue_insert_prev(&(ready_queue[pri]), &(p_tcb->task_queue));
+	primap_set(pri);
+
+	if (p_schedtsk == (TCB *) NULL || pri < p_schedtsk->priority) {
+		p_schedtsk = p_tcb;
+		return(dspflg);
+	}
+	return(false);
+}
+
+#endif /* TOPPERS_tskrun */
+
+/*
+ *  å®è¡ã§ããç¶æ
+ããä»ã®ç¶æ
+ã¸ã®é·ç§»
+ *
+ *  æé«åªå
+é ä½ã®ã¿ã¹ã¯ãæ´æ°ããã®ã¯ï¼p_tcbãæé«åªå
+é ä½ã®ã¿ã¹ã¯ã§
+ *  ãã£ãå ´åã§ããï¼p_tcbã¨åãåªå
+åº¦ã®ã¿ã¹ã¯ãä»ã«ããå ´åã¯ï¼p_tcb
+ *  ã®æ¬¡ã®ã¿ã¹ã¯ãæé«åªå
+é ä½ã«ãªãï¼ããã§ãªãå ´åã¯ï¼ã¬ãã£ã­ã¥ã¼ã
+ *  ãµã¼ãããå¿
+è¦ãããï¼
+ */
+#ifdef TOPPERS_tsknrun
+
+bool_t
+make_non_runnable(TCB *p_tcb)
+{
+	uint_t	pri = p_tcb->priority;
+	QUEUE	*p_queue = &(ready_queue[pri]);
+
+	queue_delete(&(p_tcb->task_queue));
+	if (queue_empty(p_queue)) {
+		primap_clear(pri);
+		if (p_schedtsk == p_tcb) {
+			p_schedtsk = primap_empty() ? (TCB *) NULL : search_schedtsk();
+			return(dspflg);
+		}
+	}
+	else {
+		if (p_schedtsk == p_tcb) {
+			p_schedtsk = (TCB *)(p_queue->p_next);
+			return(dspflg);
+		}
+	}
+	return(false);
+}
+
+#endif /* TOPPERS_tsknrun */
+
+/*
+ *  ä¼æ­¢ç¶æ
+ã¸ã®é·ç§»
+ */
+#ifdef TOPPERS_tskdmt
+
+void
+make_dormant(TCB *p_tcb)
+{
+	p_tcb->tstat = TS_DORMANT;
+	p_tcb->priority = p_tcb->p_tinib->ipriority;
+	p_tcb->wupque = false;
+	p_tcb->enatex = false;
+	p_tcb->texptn = 0U;
+	LOG_TSKSTAT(p_tcb);
+}
+
+#endif /* TOPPERS_tskdmt */
+
+/*
+ *  ä¼æ­¢ç¶æ
+ããå®è¡ã§ããç¶æ
+ã¸ã®é·ç§»
+ */
+#ifdef TOPPERS_tskact
+
+bool_t
+make_active(TCB *p_tcb)
+{
+	activate_context(p_tcb);
+	p_tcb->tstat = TS_RUNNABLE;
+	LOG_TSKSTAT(p_tcb);
+	return(make_runnable(p_tcb));
+}
+
+#endif /* TOPPERS_tskact */
+
+/*
+ *  ã¿ã¹ã¯ã®åªå
+åº¦ã®å¤æ´
+ *
+ *  ã¿ã¹ã¯ãå®è¡ã§ããç¶æ
+ã®å ´åã«ã¯ï¼ã¬ãã£ã­ã¥ã¼ã®ä¸­ã§ã®ä½ç½®ãå¤æ´ã
+ *  ãï¼ãªãã¸ã§ã¯ãã®å¾
+ã¡ã­ã¥ã¼ã®ä¸­ã§å¾
+ã¡ç¶æ
+ã«ãªã£ã¦ããå ´åã«ã¯ï¼å¾
+
+ *  ã¡ã­ã¥ã¼ã®ä¸­ã§ã®ä½ç½®ãå¤æ´ããï¼
+ *
+ *  æé«åªå
+é ä½ã®ã¿ã¹ã¯ãæ´æ°ããã®ã¯ï¼(1) p_tcbãæé«åªå
+é ä½ã®ã¿ã¹
+ *  ã¯ã§ãã£ã¦ï¼ãã®åªå
+åº¦ãä¸ããå ´åï¼(2) p_tcbãæé«åªå
+é ä½ã®ã¿ã¹
+ *  ã¯ã§ã¯ãªãï¼å¤æ´å¾ã®åªå
+åº¦ãæé«åªå
+é ä½ã®ã¿ã¹ã¯ã®åªå
+åº¦ãããé«ã
+ *  å ´åã§ããï¼(1)ã®å ´åã«ã¯ï¼ã¬ãã£ã­ã¥ã¼ããµã¼ãããå¿
+è¦ãããï¼
+ */
+#ifdef TOPPERS_tskpri
+
+bool_t
+change_priority(TCB *p_tcb, uint_t newpri)
+{
+	uint_t	oldpri;
+
+	oldpri = p_tcb->priority;
+	p_tcb->priority = newpri;
+
+	if (TSTAT_RUNNABLE(p_tcb->tstat)) {
+		/*
+		 *  ã¿ã¹ã¯ãå®è¡ã§ããç¶æ
+ã®å ´å
+		 */
+		queue_delete(&(p_tcb->task_queue));
+		if (queue_empty(&(ready_queue[oldpri]))) {
+			primap_clear(oldpri);
+		}
+		queue_insert_prev(&(ready_queue[newpri]), &(p_tcb->task_queue));
+		primap_set(newpri);
+
+		if (p_schedtsk == p_tcb) {
+			if (newpri >= oldpri) {
+				p_schedtsk = search_schedtsk();
+				return(p_schedtsk != p_tcb && dspflg);
+			}
+		}
+		else {
+			if (newpri < p_schedtsk->priority) {
+				p_schedtsk = p_tcb;
+				return(dspflg);
+			}
+		}
+	}
+	else {
+		if (TSTAT_WAIT_WOBJCB(p_tcb->tstat)) {
+			/*
+			 *  ã¿ã¹ã¯ãï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã®å
+±éé¨
+			 *  åï¼WOBJCBï¼ã®å¾
+ã¡ã­ã¥ã¼ã«ã¤ãªããã¦ããå ´å
+			 */
+			wobj_change_priority(((WINFO_WOBJ *)(p_tcb->p_winfo))->p_wobjcb,
+																	p_tcb);
+		}
+	}
+	return(false);
+}
+
+#endif /* TOPPERS_tskpri */
+
+/*
+ *  ã¬ãã£ã­ã¥ã¼ã®åè»¢
+ *
+ *  æé«åªå
+é ä½ã®ã¿ã¹ã¯ãæ´æ°ããã®ã¯ï¼æé«åªå
+é ä½ã®ã¿ã¹ã¯ãã¿ã¹ã¯ã­
+ *  ã¥ã¼ã®æ«å°¾ã«ç§»åããå ´åã§ããï¼
+ */
+#ifdef TOPPERS_tskrot
+
+bool_t
+rotate_ready_queue(uint_t pri)
+{
+	QUEUE	*p_queue = &(ready_queue[pri]);
+	QUEUE	*p_entry;
+
+	if (!queue_empty(p_queue) && p_queue->p_next->p_next != p_queue) {
+		p_entry = queue_delete_next(p_queue);
+		queue_insert_prev(p_queue, p_entry);
+		if (p_schedtsk == (TCB *) p_entry) {
+			p_schedtsk = (TCB *)(p_queue->p_next);
+			return(dspflg);
+		}
+	}
+	return(false);
+}
+
+#endif /* TOPPERS_tskrot */
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å¼åºã
+ *
+ *  ASPã«ã¼ãã«ã§ã¯ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³å
+ã§CPUã­ãã¯ç¶æ
+ã«é·ç§»ãï¼
+ *  å
+ã®ç¶æ
+ã«æ»ããã«ãªã¿ã¼ã³ããå ´åï¼ã«ã¼ãã«ãå
+ã®ç¶æ
+ã«æ»ãï¼
+ */
+#ifdef TOPPERS_tsktex
+
+void
+call_texrtn(void)
+{
+	TEXPTN	texptn;
+	bool_t	saved_disdsp;
+
+	saved_disdsp = disdsp;
+	p_runtsk->enatex = false;
+	do {
+		texptn = p_runtsk->texptn;
+		p_runtsk->texptn = 0U;
+
+		t_unlock_cpu();
+		LOG_TEX_ENTER(p_runtsk, texptn);
+		(*((TEXRTN)(p_runtsk->p_tinib->texrtn)))(texptn,
+												p_runtsk->p_tinib->exinf);
+		LOG_TEX_LEAVE(p_runtsk);
+		if (!t_sense_lock()) {
+			t_lock_cpu();
+		}
+		if (!ipmflg) {
+			t_set_ipm(TIPM_ENAALL);
+			ipmflg = true;
+		}
+		disdsp = saved_disdsp;
+		dspflg = !disdsp;
+		p_runtsk->enatex = false;
+		if (p_runtsk != p_schedtsk && dspflg) {
+			/*
+			 *  ããã§dispatchãå¼ã³åºãå¦çã¯ï¼ç¸äºåå¸°å¼åºãã«ãªã£ã¦
+			 *  ãããï¼dispatchãå¼ã¶åã«p_runtsk->enatexãfalseã«ãã¦
+			 *  ããã°æ¯éããªãï¼ãã®çç±ã«ã¤ãã¦ã¯ï¼ãTOPPERS/ASP ã«ã¼
+			 *  ãã« è¨­è¨ã¡ã¢ããåç
+§ã®ãã¨ï¼
+			 */
+			dispatch();
+		}
+	} while (p_runtsk->texptn != 0U);
+	p_runtsk->enatex = true;
+}
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®èµ·å
+ */
+#ifndef OMIT_CALLTEX
+
+void
+calltex(void)
+{
+	if (p_runtsk->enatex && p_runtsk->texptn != 0U && ipmflg) {
+		call_texrtn();
+	}
+}
+
+#endif /* OMIT_CALLTEX */
+#endif /* TOPPERS_tsktex */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/task.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/task.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/task.h	(revision 136)
@@ -0,0 +1,717 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: task.h 2146 2011-07-03 23:40:01Z ertl-hiro $
+ */
+
+/*
+ *		ã¿ã¹ã¯ç®¡çã¢ã¸ã¥ã¼ã«
+ */
+
+#ifndef TOPPERS_TASK_H
+#define TOPPERS_TASK_H
+
+#include <queue.h>
+#include "time_event.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_TSKSTAT
+#define LOG_TSKSTAT(p_tcb)
+#endif /* LOG_TSKSTAT */
+
+/*
+ *  ã¿ã¹ã¯åªå
+åº¦ã®å
+é¨è¡¨ç¾ã»å¤é¨è¡¨ç¾å¤æãã¯ã­
+ */
+#define INT_PRIORITY(x)		((uint_t)((x) - TMIN_TPRI))
+#define EXT_TSKPRI(x)		((PRI)(x) + TMIN_TPRI)
+
+/*
+ *  ã¿ã¹ã¯ç¶æ
+ã®å
+é¨è¡¨ç¾
+ *
+ *  TCBä¸­ã®ã¿ã¹ã¯ç¶æ
+ã§ã¯ï¼å®è¡ç¶æ
+ï¼RUNNINGï¼ã¨å®è¡å¯è½ç¶æ
+ï¼READYï¼
+ *  ã¯åºå¥ããªãï¼ä¸¡ç¶æ
+ãç·ç§°ãã¦ï¼å®è¡ã§ããç¶æ
+ï¼RUNNABLEï¼ã¨å¼ã¶ï¼
+ *  äºéå¾
+ã¡ç¶æ
+ã¯ï¼(TS_WAITING | TS_SUSPENDED)ã§è¡¨ãï¼TS_WAIT_???ã¯å¾
+
+ *  ã¡è¦å ãè¡¨ãï¼å¾
+ã¡ç¶æ
+ï¼äºéå¾
+ã¡ç¶æ
+ãå«ãï¼ã®å ´åã«ã®ã¿è¨­å®ããï¼
+ */
+#define TS_DORMANT		0x00U			/* ä¼æ­¢ç¶æ
+ */
+#define TS_RUNNABLE		0x01U			/* å®è¡ã§ããç¶æ
+ */
+#define TS_WAITING		0x02U			/* å¾
+ã¡ç¶æ
+ */
+#define TS_SUSPENDED	0x04U			/* å¼·å¶å¾
+ã¡ç¶æ
+ */
+
+#define TS_WAIT_DLY		(0x00U << 3)	/* æéçµéå¾
+ã¡ */
+#define TS_WAIT_SLP		(0x01U << 3)	/* èµ·åºå¾
+ã¡ */
+#define TS_WAIT_RDTQ	(0x02U << 3)	/* ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡å¾
+ã¡ */
+#define TS_WAIT_RPDQ	(0x03U << 3)	/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ããã®åä¿¡å¾
+ã¡ */
+#define TS_WAIT_SEM		(0x04U << 3)	/* ã»ããã©è³æºã®ç²å¾å¾
+ã¡ */
+#define TS_WAIT_FLG		(0x05U << 3)	/* ã¤ãã³ããã©ã°å¾
+ã¡ */
+#define TS_WAIT_SDTQ	(0x06U << 3)	/* ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡å¾
+ã¡ */
+#define TS_WAIT_SPDQ	(0x07U << 3)	/* åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã¸ã®éä¿¡å¾
+ã¡ */
+#define TS_WAIT_MBX		(0x08U << 3)	/* ã¡ã¼ã«ããã¯ã¹ããã®åä¿¡å¾
+ã¡ */
+#define TS_WAIT_MPF		(0x09U << 3)	/* åºå®é·ã¡ã¢ãªãã­ãã¯ã®ç²å¾å¾
+ã¡ */
+
+/*
+ *  ã¿ã¹ã¯ç¶æ
+å¤å¥ãã¯ã­
+ *
+ *  TSTAT_DORMANTã¯ã¿ã¹ã¯ãä¼æ­¢ç¶æ
+ã§ãããã©ãããï¼TSTAT_RUNNABLEã¯
+ *  ã¿ã¹ã¯ãå®è¡ã§ããç¶æ
+ã§ãããã©ãããå¤å¥ããï¼TSTAT_WAITINGã¯å¾
+
+ *  ã¡ç¶æ
+ã¨äºéå¾
+ã¡ç¶æ
+ã®ããããã§ãããã©ãããï¼TSTAT_SUSPENDEDã¯
+ *  å¼·å¶å¾
+ã¡ç¶æ
+ã¨äºéå¾
+ã¡ç¶æ
+ã®ããããã§ãããã©ãããå¤å¥ããï¼
+ */
+#define TSTAT_DORMANT(tstat)	((tstat) == TS_DORMANT)
+#define TSTAT_RUNNABLE(tstat)	(((tstat) & TS_RUNNABLE) != 0U)
+#define TSTAT_WAITING(tstat)	(((tstat) & TS_WAITING) != 0U)
+#define TSTAT_SUSPENDED(tstat)	(((tstat) & TS_SUSPENDED) != 0U)
+
+/*
+ *  ã¿ã¹ã¯å¾
+ã¡è¦å å¤å¥ãã¯ã­
+ *
+ *  TSTAT_WAIT_SLPã¯ã¿ã¹ã¯ãèµ·åºå¾
+ã¡ã§ãããã©ãããï¼TSTAT_WAIT_WOBJ
+ *  ã¯ã¿ã¹ã¯ãåæã»éä¿¡ãªãã¸ã§ã¯ãã«å¯¾ããå¾
+ã¡ã§ãããï¼è¨ãæããã¨ï¼
+ *  åæéä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡ã­ã¥ã¼ã«ã¤ãªããã¦ãããï¼ã©ãããå¤å¥ã
+ *  ãï¼ã¾ãï¼TSTAT_WAIT_WOBJCBã¯ã¿ã¹ã¯ãåæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡ç
+ *  ãã­ãã¯ã®å
+±éé¨åï¼WOBJCBï¼ã®å¾
+ã¡ã­ã¥ã¼ã«ã¤ãªããã¦ãããã©ããã
+ *  å¤å¥ããï¼
+ *
+ *  TSTAT_WAIT_SLPã¯ï¼ä»»æã®ã¿ã¹ã¯ç¶æ
+ã®ä¸­ããï¼ã¿ã¹ã¯ãèµ·åºå¾
+ã¡ã§ãã
+ *  ãã¨ãå¤å¥ã§ããï¼ããªãã¡ï¼TSTAT_WAITINGã«ããå¾
+ã¡ç¶æ
+ã§ãããã¨ã
+ *  å¤å¥ããã«ï¼TSTAT_SLPã ããç¨ãã¦èµ·åºå¾
+ã¡ç¶æ
+ã§ãããã¨ãå¤å¥ã§ããï¼
+ *  ãããå¹ççã«å®ç¾ããããã«ï¼TS_WAIT_SLPã®å¤ãï¼(0x00U << 3)ã§ã¯ãª
+ *  ã(0x01U << 3)ã¨ãã¦ããï¼ãã®ããï¼ã¿ã¹ã¯ãæéçµéå¾
+ã¡ç¶æ
+ã§ãã
+ *  ãã¨ãå¤å¥ããããã®TSTAT_WAIT_DLYãï¼TSTAT_WAIT_SLPã¨åæ§ã®æ¹æ³ã§
+ *  å®ç¾ãããã¨ã¯ã§ããªãï¼
+ */
+#define TS_WAIT_MASK	(0x0fU << 3)	/* å¾
+ã¡è¦å ã®ååºããã¹ã¯ */
+
+#define TSTAT_WAIT_SLP(tstat)		(((tstat) & TS_WAIT_MASK) == TS_WAIT_SLP)
+#define TSTAT_WAIT_WOBJ(tstat)		(((tstat) & TS_WAIT_MASK) >= TS_WAIT_RDTQ)
+#define TSTAT_WAIT_WOBJCB(tstat)	(((tstat) & TS_WAIT_MASK) >= TS_WAIT_SEM)
+
+/*
+ *  å¾
+ã¡æ
+å ±ãã­ãã¯ï¼WINFOï¼ã®å®ç¾©
+ *
+ *  ã¿ã¹ã¯ãå¾
+ã¡ç¶æ
+ã®éã¯ï¼TCBããã³ãã®p_winfoã§æãããWINFOãæ¬¡ã®
+ *  ããã«è¨­å®ããªããã°ãªããªãï¼
+ *
+ *  (a) TCBã®ã¿ã¹ã¯ç¶æ
+ãå¾
+ã¡ç¶æ
+ï¼TS_WAITINGï¼ã«ããï¼ãã®éã«ï¼å¾
+ã¡
+ *  è¦å ï¼TS_WAIT_???ï¼ãè¨­å®ããï¼
+ *
+ *  (b) ã¿ã¤ã ã¢ã¦ããç£è¦ããããã«ï¼ã¿ã¤ã ã¤ãã³ããã­ãã¯ãç»é²ããï¼
+ *  ç»é²ããã¿ã¤ã ã¤ãã³ããã­ãã¯ã¯ï¼å¾
+ã¡ã«å
+¥ããµã¼ãã¹ã³ã¼ã«å¦çé¢æ°
+ *  ã®ã­ã¼ã«ã«å¤æ°ã¨ãã¦ç¢ºä¿ãï¼ããã¸ã®ãã¤ã³ã¿ãWINFOã®p_tmevtbã«è¨
+ *  æ¶ããï¼ã¿ã¤ã ã¢ã¦ãã®ç£è¦ãå¿
+è¦ãªãå ´åï¼æ°¸ä¹
+å¾
+ã¡ã®å ´åï¼ã«ã¯ï¼
+ *  p_tmevtbãNULLã«ããï¼
+ *
+ *  åæã»éä¿¡ãªãã¸ã§ã¯ãã«å¯¾ããå¾
+ã¡ç¶æ
+ã®å ´åã«ã¯ï¼æ¨æºã®WINFOã«
+ *  p_wobjcbãã£ã¼ã«ããè¿½å ããæ§é ä½ï¼WINFO_WOBJï¼wait.hã§å®ç¾©ï¼ãä½¿
+ *  ãï¼ã¾ãï¼ä»¥ä¸ã®(c)ï½(e)ã®è¨­å®ãè¡ãå¿
+è¦ãããï¼åæã»éä¿¡ãªãã¸ã§
+ *  ã¯ãã«é¢ä¿ããªãå¾
+ã¡ï¼èµ·åºå¾
+ã¡ï¼æéçµéå¾
+ã¡ï¼ã®å ´åã«ã¯ï¼(c)ï½(e)
+ *  ã¯å¿
+è¦ãªãï¼
+ *
+ *  (c) TCBãå¾
+ã¡å¯¾è±¡ã®åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡ã­ã¥ã¼ã«ã¤ãªãï¼å¾
+
+ *  ã¡ã­ã¥ã¼ã«ã¤ãªãããã«ï¼task_queueãä½¿ãï¼
+ *
+ *  (d) å¾
+ã¡å¯¾è±¡ã®åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã¸ã®ãã¤ã³ã¿ãï¼
+ *  WINFO_WOBJã®p_wobjcbã«è¨æ¶ããï¼
+ *
+ *  (e) å¾
+ã¡å¯¾è±¡ã®åæã»éä¿¡ãªãã¸ã§ã¯ãã«ä¾å­ãã¦è¨æ¶ãããã¨ãå¿
+è¦ãª
+ *  æ
+å ±ãããå ´åã«ã¯ï¼WINFO_WOBJã«å¿
+è¦ãªæ
+å ±ã®ããã®ãã£ã¼ã«ããè¿½å 
+ *  ããæ§é ä½ãå®ç¾©ãï¼WINFO_WOBJã®ä»£ããã«ç¨ããï¼
+ *
+ *  å¾
+ã¡ç¶æ
+ãè§£é¤ããéã«ã¯ï¼å¾
+ã¡è§£é¤ããã¿ã¹ã¯ã«å¯¾ããè¿å¤ãWINFOã®
+ *  wercdã«è¨­å®ããï¼wercdãå¿
+è¦ãªã®ã¯å¾
+ã¡è§£é¤ä»¥éã§ããã®ã«å¯¾ãã¦ï¼
+ *  p_tmevtbã¯å¾
+ã¡è§£é¤å¾ã¯å¿
+è¦ãªãããï¼ã¡ã¢ãªç¯ç´ã®ããã«å
+±ç¨ä½ãä½¿ã£
+ *  ã¦ããï¼ãã®ããï¼wercdã¸ã¨ã©ã¼ã³ã¼ããè¨­å®ããã®ã¯ï¼ã¿ã¤ã ã¤ãã³ã
+ *  ãã­ãã¯ãç»é²è§£é¤ããå¾ã«ããªããã°ãªããªãï¼
+ */
+typedef union waiting_information {
+	ER		wercd;			/* å¾
+ã¡è§£é¤æã®ã¨ã©ã¼ã³ã¼ã */
+	TMEVTB	*p_tmevtb;		/* å¾
+ã¡ç¶æ
+ç¨ã®ã¿ã¤ã ã¤ãã³ããã­ãã¯ */
+} WINFO;
+
+/*
+ *  ã¿ã¹ã¯åæåãã­ãã¯
+ *
+ *  ã¿ã¹ã¯ã«é¢ããæ
+å ±ãï¼å¤ãå¤ãããªãããã«ROMã«ç½®ããé¨åï¼ã¿ã¹ã¯
+ *  åæåãã­ãã¯ï¼ã¨ï¼å¤ãå¤åããããã«RAMã«ç½®ããªããã°ãªããªãé¨
+ *  åï¼ã¿ã¹ã¯ç®¡çãã­ãã¯ï¼TCBï¼ã«åé¢ãï¼TCBå
+ã«å¯¾å¿ããã¿ã¹ã¯åæå
+ *  ãã­ãã¯ãæããã¤ã³ã¿ãå
+¥ããï¼ã¿ã¹ã¯åæåãã­ãã¯å
+ã«å¯¾å¿ãã
+ *  TCBãæããã¤ã³ã¿ãå
+¥ããæ¹æ³ã®æ¹ãï¼RAMã®ç¯ç´ã®è¦³ç¹ããã¯æã¾ãã
+ *  ãï¼å®è¡å¹çãæªããªãããã«æ¡ç¨ãã¦ããªãï¼ä»ã®ãªãã¸ã§ã¯ãã«ã¤ã
+ *  ã¦ãåæ§ã«æ±ãï¼
+ *
+ *  ã¿ã¹ã¯åæåãã­ãã¯ã«ã¯ï¼DEF_TEXã§å®ç¾©ãããã¿ã¹ã¯ä¾å¤å¦çã«ã¼ã
+ *  ã³ã«é¢ããæ
+å ±ãå«ãï¼
+ */
+typedef struct task_initialization_block {
+	ATR			tskatr;			/* ã¿ã¹ã¯å±æ§ */
+	intptr_t	exinf;			/* ã¿ã¹ã¯ã®æ¡å¼µæ
+å ± */
+	TASK		task;			/* ã¿ã¹ã¯ã®èµ·åçªå° */
+	uint_t		ipriority;		/* ã¿ã¹ã¯ã®èµ·åæåªå
+åº¦ï¼å
+é¨è¡¨ç¾ï¼ */
+
+#ifdef USE_TSKINICTXB
+	TSKINICTXB	tskinictxb;		/* ã¿ã¹ã¯åæåã³ã³ãã­ã¹ããã­ãã¯ */
+#else /* USE_TSKINICTXB */
+	SIZE		stksz;			/* ã¹ã¿ãã¯é åã®ãµã¤ãºï¼ä¸¸ããå¤ï¼ */
+	void		*stk;			/* ã¹ã¿ãã¯é åã®å
+é ­çªå° */
+#endif /* USE_TSKINICTXB */
+
+	ATR			texatr;			/* ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³å±æ§ */
+	TEXRTN		texrtn;			/* ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®èµ·åçªå° */
+} TINIB;
+
+/*
+ *  TCBä¸­ã®ãã£ã¼ã«ãã®ãããå¹
+ã®å®ç¾©
+ *
+ *  ãã­ã»ããµã«ãã£ã¦ã¯ï¼TCBä¸­ã®ãã£ã¼ã«ãã®ãããå¹
+ã§ã¡ã¢ãªä½¿ç¨éã¨
+ *  æ§è½ããã¬ã¼ããªãã«ãªãããï¼ã¿ã¼ã²ããä¾å­ã«ãã£ã¼ã«ãã®ãããå¹
+
+ *  ãå¤æ´ãããã¨ãè¨±ãã¦ããï¼
+ */
+#ifndef TBIT_TCB_PRIORITY
+#define	TBIT_TCB_PRIORITY		8		/* priorityãã£ã¼ã«ãã®ãããå¹
+ */
+#endif /* TBIT_TCB_PRIORITY */
+
+/*
+ *  ã¿ã¹ã¯ç®¡çãã­ãã¯ï¼TCBï¼
+ *
+ *  ASPã«ã¼ãã«ã§ã¯ï¼ã¿ã¹ã¯ã®èµ·åè¦æ±ã­ã¥ã¼ã¤ã³ã°æ°ã®æå¤§å¤ï¼TMAX_ACTCNTï¼
+ *  ã¨èµ·åºè¦æ±ã­ã¥ã¼ã¤ã³ã°æ°ã®æå¤§å¤ï¼TMAX_WUPCNTï¼ã¯1ã«åºå®ããã¦ãã
+ *  ããï¼ã­ã¥ã¼ã¤ã³ã°ããã¦ãããã©ããã®çå½å¤ã§è¡¨ç¾ãããã¨ãã§ããï¼
+ *  ã¾ãï¼å¼·å¶å¾
+ã¡è¦æ±ãã¹ãæ°ã®æå¤§å¤ï¼TMAX_SUSCNTï¼ã1ã«åºå®ããã¦ã
+ *  ãã®ã§ï¼å¼·å¶å¾
+ã¡è¦æ±ãã¹ãæ°ï¼suscntï¼ã¯å¿
+è¦ãªãï¼
+ *
+ *  TCBã®ããã¤ãã®ãã£ã¼ã«ãã¯ï¼ç¹å®ã®ã¿ã¹ã¯ç¶æ
+ã§ã®ã¿æå¹ãªå¤ãä¿æãï¼
+ *  ããä»¥å¤ã®å ´åã¯å¤ãä¿è¨¼ãããªãï¼ãã£ã¦ï¼åç
+§ãã¦ã¯ãªããªãï¼ï¼å
+ *  ãã£ã¼ã«ããæå¹ãªå¤ãä¿æããæ¡ä»¶ã¯æ¬¡ã®éãï¼
+ *
+ *  ã»åæåå¾ã¯å¸¸ã«æå¹ï¼
+ *  		p_tinibï¼tstatï¼actque
+ *  ã»ä¼æ­¢ç¶æ
+ä»¥å¤ã§æå¹ï¼ä¼æ­¢ç¶æ
+ã§ã¯åæå¤ã«ãªã£ã¦ããï¼ï¼
+ *  		priorityï¼wupqueï¼enatexï¼texptn
+ *  ã»å¾
+ã¡ç¶æ
+ï¼äºéå¾
+ã¡ç¶æ
+ãå«ãï¼ã§æå¹ï¼
+ *  		p_winfo
+ *  ã»å®è¡ã§ããç¶æ
+ã¨åæã»éä¿¡ãªãã¸ã§ã¯ãã«å¯¾ããå¾
+ã¡ç¶æ
+ã§æå¹ï¼
+ *  		task_queue
+ *  ã»å®è¡å¯è½ç¶æ
+ï¼å¾
+ã¡ç¶æ
+ï¼å¼·å¶å¾
+ã¡ç¶æ
+ï¼äºéå¾
+ã¡ç¶æ
+ã§æå¹ï¼
+ *  		tskctxb
+ */
+typedef struct task_control_block {
+	QUEUE			task_queue;		/* ã¿ã¹ã¯ã­ã¥ã¼ */
+	const TINIB		*p_tinib;		/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+
+#ifdef UINT8_MAX
+	uint8_t			tstat;			/* ã¿ã¹ã¯ç¶æ
+ï¼å
+é¨è¡¨ç¾ï¼*/
+#else /* UINT8_MAX */
+	BIT_FIELD_UINT	tstat : 8;		/* ã¿ã¹ã¯ç¶æ
+ï¼å
+é¨è¡¨ç¾ï¼*/
+#endif /* UINT8_MAX */
+#if defined(UINT8_MAX) && (TBIT_TCB_PRIORITY == 8)
+	uint8_t			priority;		/* ç¾å¨ã®åªå
+åº¦ï¼å
+é¨è¡¨ç¾ï¼*/
+#else /* defined(UINT8_MAX) && (TBIT_TCB_PRIORITY == 8) */
+	BIT_FIELD_UINT	priority : TBIT_TCB_PRIORITY;
+									/* ç¾å¨ã®åªå
+åº¦ï¼å
+é¨è¡¨ç¾ï¼*/
+#endif /* defined(UINT8_MAX) && (TBIT_TCB_PRIORITY == 8) */
+	BIT_FIELD_BOOL	actque : 1;		/* èµ·åè¦æ±ã­ã¥ã¼ã¤ã³ã° */
+	BIT_FIELD_BOOL	wupque : 1;		/* èµ·åºè¦æ±ã­ã¥ã¼ã¤ã³ã° */
+	BIT_FIELD_BOOL	enatex : 1;		/* ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ */
+
+	TEXPTN			texptn;			/* ä¿çä¾å¤è¦å  */
+	WINFO			*p_winfo;		/* å¾
+ã¡æ
+å ±ãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+	TSKCTXB			tskctxb;		/* ã¿ã¹ã¯ã³ã³ãã­ã¹ããã­ãã¯ */
+} TCB;
+
+/*
+ *  å®è¡ç¶æ
+ã®ã¿ã¹ã¯
+ *
+ *  å®è¡ç¶æ
+ã®ã¿ã¹ã¯ï¼ï¼ãã­ã»ããµãã³ã³ãã­ã¹ããæã£ã¦ããã¿ã¹ã¯ï¼ã®
+ *  TCBãæããã¤ã³ã¿ï¼å®è¡ç¶æ
+ã®ã¿ã¹ã¯ããªãå ´åã¯NULLã«ããï¼
+ *
+ *  ãµã¼ãã¹ã³ã¼ã«ã®å¦çä¸­ã§ï¼èªã¿ã¹ã¯ï¼ãµã¼ãã¹ã³ã¼ã«ãå¼ã³åºããã¿ã¹
+ *  ã¯ï¼ã«é¢ããæ
+å ±ãåç
+§ããå ´åã¯p_runtskãä½¿ãï¼p_runtskãæ¸ãæã
+ *  ãã®ã¯ï¼ãã£ã¹ãããã£ï¼ã¨åæåå¦çï¼ã®ã¿ã§ããï¼
+ */
+extern TCB	*p_runtsk;
+
+/*
+ *  æé«åªå
+é ä½ã®ã¿ã¹ã¯
+ *
+ *  å®è¡ã§ããã¿ã¹ã¯ã®ä¸­ã§æé«åªå
+é ä½ã®ã¿ã¹ã¯ã®TCBãæããã¤ã³ã¿ï¼å®
+ *  è¡ã§ããã¿ã¹ã¯ããªãå ´åã¯NULLã«ããï¼
+ *
+ *  ãã£ã¹ãããç¦æ­¢ç¶æ
+ãªã©ï¼ãã£ã¹ããããä¿çããã¦ããéã¯p_runtsk
+ *  ã¨ä¸è´ãã¦ããã¨ã¯éããªãï¼
+ */
+extern TCB	*p_schedtsk;
+
+/*
+ *  ãã£ã¹ãããï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³èµ·åè¦æ±ãã©ã°
+ *
+ *  å²è¾¼ã¿ãã³ãã©ï¼CPUä¾å¤ãã³ãã©ã®åºå£å¦çã«ï¼ãã£ã¹ãããã¾ãã¯
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®èµ·åãè¦æ±ãããã¨ãç¤ºããã©ã°ï¼
+ */
+extern bool_t	reqflg;
+
+/*
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§ãããã¨ãç¤ºããã©ã°ï¼
+ */
+extern bool_t	ipmflg;
+
+/*
+ *  ãã£ã¹ãããç¦æ­¢ç¶æ
+
+ *
+ *  ãã£ã¹ãããç¦æ­¢ç¶æ
+ã§ãããã¨ãç¤ºããã©ã°ï¼
+ */
+extern bool_t	disdsp;
+
+/*
+ *  ã¿ã¹ã¯ãã£ã¹ãããå¯è½ç¶æ
+
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§ããï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ã§ããï¼ãã£
+ *  ã¹ãããç¦æ­¢ç¶æ
+ã§ãªãï¼ãã¨ãç¤ºããã©ã°ï¼
+ */
+extern bool_t	dspflg;
+
+/*
+ *  ã¬ãã£ã­ã¥ã¼
+ *
+ *  ã¬ãã£ã­ã¥ã¼ã¯ï¼å®è¡ã§ããç¶æ
+ã®ã¿ã¹ã¯ãç®¡çããããã®ã­ã¥ã¼ã§ããï¼
+ *  å®è¡ç¶æ
+ã®ã¿ã¹ã¯ãç®¡çãã¦ããããï¼ã¬ãã£ï¼å®è¡å¯è½ï¼ã­ã¥ã¼ã¨ãã
+ *  åç§°ã¯æ­£ç¢ºã§ã¯ãªããï¼ã¬ãã£ã­ã¥ã¼ã¨ããåç§°ãå®çãã¦ããããï¼ã
+ *  ã®åç§°ã§å¼ã¶ãã¨ã«ããï¼
+ *
+ *  ã¬ãã£ã­ã¥ã¼ã¯ï¼åªå
+åº¦ãã¨ã®ã¿ã¹ã¯ã­ã¥ã¼ã§æ§æããã¦ããï¼ã¿ã¹ã¯ã®
+ *  TCBã¯ï¼è©²å½ããåªå
+åº¦ã®ã­ã¥ã¼ã«ç»é²ãããï¼
+ */
+extern QUEUE	ready_queue[TNUM_TPRI];
+
+/*
+ *  ã¬ãã£ã­ã¥ã¼ãµã¼ãã®ããã®ãããããã
+ *
+ *  ã¬ãã£ã­ã¥ã¼ã®ãµã¼ããå¹çããè¡ãããã«ï¼åªå
+åº¦ãã¨ã®ã¿ã¹ã¯ã­ã¥ã¼
+ *  ã«ã¿ã¹ã¯ãå
+¥ã£ã¦ãããã©ãããç¤ºããããããããç¨æãã¦ããï¼ãã
+ *  ãããããä½¿ããã¨ã§ï¼ã¡ã¢ãªã¢ã¯ã»ã¹ã®åæ°ãæ¸ãããã¨ãã§ãããï¼
+ *  ãããæä½å½ä»¤ãå
+
+å®ãã¦ããªããã­ã»ããµã§ï¼åªå
+åº¦ã®æ®µéæ°ãå°ãªã
+ *  å ´åã«ã¯ï¼ããããããæä½ã®ãªã¼ãã¼ãããã®ããã«ï¼éã«å¹çãè½ã¡
+ *  ãå¯è½æ§ãããï¼
+ *
+ *  åªå
+åº¦ã16æ®µéã§ãããã¨ãä»®å®ãã¦ããããï¼uint16_tåã¨ãã¦ããï¼
+ */
+extern uint16_t	ready_primap;
+
+/*
+ *  ã¿ã¹ã¯IDã®æå¤§å¤ï¼kernel_cfg.cï¼
+ */
+extern const ID	tmax_tskid;
+
+/*
+ *  ã¿ã¹ã¯åæåãã­ãã¯ã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern const TINIB	tinib_table[];
+
+/*
+ *  ã¿ã¹ã¯çæé åºãã¼ãã«ï¼kernel_cfg.cï¼
+ */
+extern const ID	torder_table[];
+
+/*
+ *  TCBã®ã¨ãªã¢ï¼kernel_cfg.cï¼
+ */
+extern TCB	tcb_table[];
+
+/*
+ *  ã¿ã¹ã¯ã®æ°
+ */
+#define tnum_tsk	((uint_t)(tmax_tskid - TMIN_TSKID + 1))
+
+/*
+ *  ã¿ã¹ã¯IDããTCBãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_TSK(tskid)	((uint_t)((tskid) - TMIN_TSKID))
+#define get_tcb(tskid)		(&(tcb_table[INDEX_TSK(tskid)]))
+#define get_tcb_self(tskid)	((tskid) == TSK_SELF ? p_runtsk : get_tcb(tskid))
+
+/*
+ *  TCBããã¿ã¹ã¯IDãåãåºãããã®ãã¯ã­
+ */
+#define	TSKID(p_tcb)	((ID)(((p_tcb) - tcb_table) + TMIN_TSKID))
+
+/*
+ *  ã¿ã¹ã¯ç®¡çã¢ã¸ã¥ã¼ã«ã®åæå
+ */
+extern void	initialize_task(void);
+
+/*
+ *  æé«åªå
+é ä½ã¿ã¹ã¯ã®ãµã¼ã
+ *
+ *  ã¬ãã£ã­ã¥ã¼ä¸­ã®æé«åªå
+é ä½ã®ã¿ã¹ã¯ããµã¼ããï¼ãã®TCBã¸ã®ãã¤ã³ã¿
+ *  ãè¿ãï¼ã¬ãã£ã­ã¥ã¼ãç©ºã®å ´åã«ã¯ï¼ãã®é¢æ°ãå¼ã³åºãã¦ã¯ãªããªãï¼
+ */
+extern TCB	*search_schedtsk(void);
+
+/*
+ *  å®è¡ã§ããç¶æ
+ã¸ã®é·ç§»
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ãã¬ãã£ã­ã¥ã¼ã«æ¿å
+¥ããï¼ã¬ãã£ã­ã¥ã¼ã«æ¿å
+¥
+ *  ããã¿ã¹ã¯ã®åªå
+åº¦ãï¼æé«åªå
+é ä½ã®ã¿ã¹ã¯ã®åªå
+åº¦ãããé«ãå ´åã¯ï¼
+ *  æé«åªå
+é ä½ã®ã¿ã¹ã¯ãæ´æ°ãï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ã§ããã°trueãè¿
+ *  ãï¼ããã§ãªãå ´åã¯falseãè¿ãï¼
+ */
+extern bool_t	make_runnable(TCB *p_tcb);
+
+/*
+ *  å®è¡ã§ããç¶æ
+ããä»ã®ç¶æ
+ã¸ã®é·ç§»
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ãã¬ãã£ã­ã¥ã¼ããåé¤ããï¼p_tcbã§æå®ãã
+ *  ã¿ã¹ã¯ãæé«åªå
+é ä½ã®ã¿ã¹ã¯ã§ãã£ãå ´åã«ã¯ï¼æé«åªå
+é ä½ã®ã¿ã¹ã¯
+ *  ãè¨­å®ããªããï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ã§ããã°trueãè¿ãï¼ããã§ãªã
+ *  å ´åã¯falseãè¿ãï¼ã¿ã¹ã¯ã®ç¶æ
+ã¯æ´æ°ããªãï¼
+ */
+extern bool_t	make_non_runnable(TCB *p_tcb);
+
+/*
+ *  ä¼æ­¢ç¶æ
+ã¸ã®é·ç§»
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ã®ç¶æ
+ãä¼æ­¢ç¶æ
+ã¨ããï¼ã¾ãï¼ã¿ã¹ã¯ã®èµ·å
+ *  æã«åæåãã¹ãå¤æ°ã®åæåã¨ï¼ã¿ã¹ã¯èµ·åã®ããã®ã³ã³ãã­ã¹ããè¨­
+ *  å®ããï¼
+ */
+extern void	make_dormant(TCB *p_tcb);
+
+/*
+ *  ä¼æ­¢ç¶æ
+ããå®è¡ã§ããç¶æ
+ã¸ã®é·ç§»
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ã®ç¶æ
+ãä¼æ­¢ç¶æ
+ããå®è¡ã§ããç¶æ
+ã¨ããï¼
+ *  å®è¡ã§ããç¶æ
+ã«é·ç§»ããã¿ã¹ã¯ã¸ã®ãã£ã¹ããããå¿
+è¦ãªå ´åã¯trueï¼
+ *  ããã§ãªãå ´åã¯falseãè¿ãï¼
+ */
+extern bool_t	make_active(TCB *p_tcb);
+
+/*
+ *  ã¿ã¹ã¯ã®åªå
+åº¦ã®å¤æ´
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ã®åªå
+åº¦ãnewpriï¼å
+é¨è¡¨ç¾ï¼ã«å¤æ´ããï¼ã¾ãï¼
+ *  å¿
+è¦ãªå ´åã«ã¯æé«åªå
+é ä½ã®ã¿ã¹ã¯ãæ´æ°ãï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ã§
+ *  ããã°trueãè¿ãï¼ããã§ãªãå ´åã¯falseãè¿ãï¼
+ */
+extern bool_t	change_priority(TCB *p_tcb, uint_t newpri);
+
+/*
+ *  ã¬ãã£ã­ã¥ã¼ã®åè»¢
+ *
+ *  ã¬ãã£ã­ã¥ã¼ä¸­ã®ï¼priã§æå®ãããåªå
+åº¦ã®ã¿ã¹ã¯ã­ã¥ã¼ãåè»¢ãããï¼
+ *  ã¾ãï¼å¿
+è¦ãªå ´åã«ã¯æé«åªå
+é ä½ã®ã¿ã¹ã¯ãå¤æ´ãï¼ãã£ã¹ããããä¿
+ *  çããã¦ããªããã°trueãè¿ãï¼ããã§ãªãå ´åã¯falseãè¿ãï¼
+ */
+extern bool_t	rotate_ready_queue(uint_t pri);
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å¼åºã
+ *
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå¼ã³åºãï¼å¼ã³åºãåã«ï¼å®è¡ç¶æ
+ã®ã¿ã¹ã¯ã®
+ *  ä¿çä¾å¤è¦å ãã¯ãªã¢ãï¼ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ç¶æ
+ã«ãï¼CPUã­ãã¯ãè§£
+ *  é¤ããï¼
+ *
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ããæ»ãã¨ï¼ã¾ãCPUã­ãã¯ç¶æ
+ã«æ»ãï¼ãã®é
+ *  ã«ä¿çä¾å¤è¦å ã0ã§ãªããªã£ã¦ããã°ï¼åã³ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã
+ *  å¼ã³åºãï¼ä¿çä¾å¤è¦å ã0ã®å ´åã«ã¯ï¼ä¾å¤å¦çè¨±å¯ç¶æ
+ã«ãã¦é¢æ°ã
+ *  ããªã¿ã¼ã³ããï¼
+ *
+ *  ãã®é¢æ°ã¯ï¼å®è¡ç¶æ
+ã®ã¿ã¹ã¯ãï¼ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ç¶æ
+ï¼enatexã
+ *  trueï¼ã§ï¼ä¿çä¾å¤è¦å ã0ã§ãªãï¼texptnã0ã§ãªãï¼å ´åã«å¼ã³åºãã
+ *  ã¨ãæ³å®ãã¦ããï¼ãã®é¢æ°ã¯ï¼CPUã­ãã¯ç¶æ
+ã§å¼ã³åºããªããã°ãªã
+ *  ãªãï¼
+ */
+extern void	call_texrtn(void);
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®èµ·å
+ *
+ *  å®è¡ç¶æ
+ã®ã¿ã¹ã¯ãã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®èµ·åæ¡ä»¶ãæºããã¦ããã°ï¼
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå¼ã³åºãï¼CPUä¾å¤å¦çã«ã¼ãã³ãå¼ã³åºãæ
+ *  ã¯ï¼ä¸æçã«CPUã­ãã¯ãè§£é¤ããï¼
+ *
+ *  ãã®é¢æ°ã¯ï¼ãã£ã¹ãããã£ãå²è¾¼ã¿ãã³ãã©ï¼CPUä¾å¤ãã³ãã©ã®åºå£
+ *  å¦çããå¼ã³åºããããã¨ãæ³å®ãã¦ããï¼ãã®é¢æ°ã¯ï¼CPUã­ãã¯ç¶æ
+
+ *  ã§å¼ã³åºããªããã°ãªããªãï¼
+ *
+ *  å®è¡å¹çãä¸ããããã«ï¼ãã®é¢æ°ãã¿ã¼ã²ããä¾å­é¨ã§è¨è¿°ãã¦ãããï¼
+ *  ãã®å ´åã«ã¯ï¼OMIT_CALLTEXããã¯ã­å®ç¾©ããï¼
+ */
+extern void	calltex(void);
+
+#endif /* TOPPERS_TASK_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/task_except.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/task_except.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/task_except.c	(revision 136)
@@ -0,0 +1,308 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: task_except.c 2023 2011-01-02 08:59:06Z ertl-hiro $
+ */
+
+/*
+ *		ã¿ã¹ã¯ä¾å¤å¦çæ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_RAS_TEX_ENTER
+#define LOG_RAS_TEX_ENTER(tskid, rasptn)
+#endif /* LOG_RAS_TEX_ENTER */
+
+#ifndef LOG_RAS_TEX_LEAVE
+#define LOG_RAS_TEX_LEAVE(ercd)
+#endif /* LOG_RAS_TEX_LEAVE */
+
+#ifndef LOG_IRAS_TEX_ENTER
+#define LOG_IRAS_TEX_ENTER(tskid, rasptn)
+#endif /* LOG_IRAS_TEX_ENTER */
+
+#ifndef LOG_IRAS_TEX_LEAVE
+#define LOG_IRAS_TEX_LEAVE(ercd)
+#endif /* LOG_IRAS_TEX_LEAVE */
+
+#ifndef LOG_DIS_TEX_ENTER
+#define LOG_DIS_TEX_ENTER()
+#endif /* LOG_DIS_TEX_ENTER */
+
+#ifndef LOG_DIS_TEX_LEAVE
+#define LOG_DIS_TEX_LEAVE(ercd)
+#endif /* LOG_DIS_TEX_LEAVE */
+
+#ifndef LOG_ENA_TEX_ENTER
+#define LOG_ENA_TEX_ENTER()
+#endif /* LOG_ENA_TEX_ENTER */
+
+#ifndef LOG_ENA_TEX_LEAVE
+#define LOG_ENA_TEX_LEAVE(ercd)
+#endif /* LOG_ENA_TEX_LEAVE */
+
+#ifndef LOG_SNS_TEX_ENTER
+#define LOG_SNS_TEX_ENTER()
+#endif /* LOG_SNS_TEX_ENTER */
+
+#ifndef LOG_SNS_TEX_LEAVE
+#define LOG_SNS_TEX_LEAVE(state)
+#endif /* LOG_SNS_TEX_LEAVE */
+
+#ifndef LOG_REF_TEX_ENTER
+#define LOG_REF_TEX_ENTER(tskid, pk_rtex)
+#endif /* LOG_REF_TEX_ENTER */
+
+#ifndef LOG_REF_TEX_LEAVE
+#define LOG_REF_TEX_LEAVE(ercd, pk_rtex)
+#endif /* LOG_REF_TEX_LEAVE */
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã®è¦æ±
+ */
+#ifdef TOPPERS_ras_tex
+
+ER
+ras_tex(ID tskid, TEXPTN rasptn)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_RAS_TEX_ENTER(tskid, rasptn);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	CHECK_PAR(rasptn != 0U);
+	p_tcb = get_tcb_self(tskid);
+
+	t_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat) || p_tcb->p_tinib->texrtn == NULL) {
+		ercd = E_OBJ;
+	}
+	else {
+		p_tcb->texptn |= rasptn;
+		if (p_tcb == p_runtsk && p_runtsk->enatex && ipmflg) {
+			call_texrtn();
+		}
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_RAS_TEX_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ras_tex */
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã®è¦æ±ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_iras_tex
+
+ER
+iras_tex(ID tskid, TEXPTN rasptn)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_IRAS_TEX_ENTER(tskid, rasptn);
+	CHECK_INTCTX_UNL();
+	CHECK_TSKID(tskid);
+	CHECK_PAR(rasptn != 0U);
+	p_tcb = get_tcb(tskid);
+
+	i_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat) || p_tcb->p_tinib->texrtn == NULL) {
+		ercd = E_OBJ;
+	}
+	else {
+		p_tcb->texptn |= rasptn;
+		if (p_tcb == p_runtsk && p_runtsk->enatex && ipmflg) {
+			reqflg = true;
+		}
+		ercd = E_OK;
+	}
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_IRAS_TEX_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_iras_tex */
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã®ç¦æ­¢
+ */
+#ifdef TOPPERS_dis_tex
+
+ER
+dis_tex(void)
+{
+	ER		ercd;
+
+	LOG_DIS_TEX_ENTER();
+	CHECK_TSKCTX_UNL();
+
+	t_lock_cpu();
+	if (p_runtsk->p_tinib->texrtn == NULL) {
+		ercd = E_OBJ;
+	}
+	else {
+		p_runtsk->enatex = false;
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_DIS_TEX_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_dis_tex */
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã®è¨±å¯
+ */
+#ifdef TOPPERS_ena_tex
+
+ER
+ena_tex(void)
+{
+	ER		ercd;
+
+	LOG_ENA_TEX_ENTER();
+	CHECK_TSKCTX_UNL();
+
+	t_lock_cpu();
+	if (p_runtsk->p_tinib->texrtn == NULL) {
+		ercd = E_OBJ;
+	}
+	else {
+		p_runtsk->enatex = true;
+		if (p_runtsk->texptn != 0U && ipmflg) {
+			call_texrtn();
+		}
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_ENA_TEX_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ena_tex */
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ç¶æ
+ã®åç
+§
+ */
+#ifdef TOPPERS_sns_tex
+
+bool_t
+sns_tex(void)
+{
+	bool_t	state;
+
+	LOG_SNS_TEX_ENTER();
+	state = (p_runtsk != NULL && p_runtsk->enatex) ? false : true;
+	LOG_SNS_TEX_LEAVE(state);
+	return(state);
+}
+
+#endif /* TOPPERS_sns_tex */
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_tex
+
+ER
+ref_tex(ID tskid, T_RTEX *pk_rtex)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_REF_TEX_ENTER(tskid, pk_rtex);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	p_tcb = get_tcb_self(tskid);
+
+	t_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat) || p_tcb->p_tinib->texrtn == NULL) {
+		ercd = E_OBJ;
+	}
+	else {
+		pk_rtex->texstat = (p_tcb->enatex) ? TTEX_ENA : TTEX_DIS;
+		pk_rtex->pndptn = p_tcb->texptn;
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_TEX_LEAVE(ercd, pk_rtex);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_tex */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/task_manage.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/task_manage.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/task_manage.c	(revision 136)
@@ -0,0 +1,458 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: task_manage.c 2008 2010-12-31 12:41:42Z ertl-hiro $
+ */
+
+/*
+ *		ã¿ã¹ã¯ç®¡çæ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "wait.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_ACT_TSK_ENTER
+#define LOG_ACT_TSK_ENTER(tskid)
+#endif /* LOG_ACT_TSK_ENTER */
+
+#ifndef LOG_ACT_TSK_LEAVE
+#define LOG_ACT_TSK_LEAVE(ercd)
+#endif /* LOG_ACT_TSK_LEAVE */
+
+#ifndef LOG_IACT_TSK_ENTER
+#define LOG_IACT_TSK_ENTER(tskid)
+#endif /* LOG_IACT_TSK_ENTER */
+
+#ifndef LOG_IACT_TSK_LEAVE
+#define LOG_IACT_TSK_LEAVE(ercd)
+#endif /* LOG_IACT_TSK_LEAVE */
+
+#ifndef LOG_CAN_ACT_ENTER
+#define LOG_CAN_ACT_ENTER(tskid)
+#endif /* LOG_CAN_ACT_ENTER */
+
+#ifndef LOG_CAN_ACT_LEAVE
+#define LOG_CAN_ACT_LEAVE(ercd)
+#endif /* LOG_CAN_ACT_LEAVE */
+
+#ifndef LOG_EXT_TSK_ENTER
+#define LOG_EXT_TSK_ENTER()
+#endif /* LOG_EXT_TSK_ENTER */
+
+#ifndef LOG_EXT_TSK_LEAVE
+#define LOG_EXT_TSK_LEAVE(ercd)
+#endif /* LOG_EXT_TSK_LEAVE */
+
+#ifndef LOG_TER_TSK_ENTER
+#define LOG_TER_TSK_ENTER(tskid)
+#endif /* LOG_TER_TSK_ENTER */
+
+#ifndef LOG_TER_TSK_LEAVE
+#define LOG_TER_TSK_LEAVE(ercd)
+#endif /* LOG_TER_TSK_LEAVE */
+
+#ifndef LOG_CHG_PRI_ENTER
+#define LOG_CHG_PRI_ENTER(tskid, tskpri)
+#endif /* LOG_CHG_PRI_ENTER */
+
+#ifndef LOG_CHG_PRI_LEAVE
+#define LOG_CHG_PRI_LEAVE(ercd)
+#endif /* LOG_CHG_PRI_LEAVE */
+
+#ifndef LOG_GET_PRI_ENTER
+#define LOG_GET_PRI_ENTER(tskid, p_tskpri)
+#endif /* LOG_GET_PRI_ENTER */
+
+#ifndef LOG_GET_PRI_LEAVE
+#define LOG_GET_PRI_LEAVE(ercd, tskpri)
+#endif /* LOG_GET_PRI_LEAVE */
+
+#ifndef LOG_GET_INF_ENTER
+#define LOG_GET_INF_ENTER(p_exinf)
+#endif /* LOG_GET_INF_ENTER */
+
+#ifndef LOG_GET_INF_LEAVE
+#define LOG_GET_INF_LEAVE(ercd, exinf)
+#endif /* LOG_GET_INF_LEAVE */
+
+/*
+ *  ã¿ã¹ã¯ã®èµ·å
+ */
+#ifdef TOPPERS_act_tsk
+
+ER
+act_tsk(ID tskid)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_ACT_TSK_ENTER(tskid);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	p_tcb = get_tcb_self(tskid);
+
+	t_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat)) {
+		if (make_active(p_tcb)) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else if (!(p_tcb->actque)) {
+		p_tcb->actque = true;
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_QOVR;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_ACT_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_act_tsk */
+
+/*
+ *  ã¿ã¹ã¯ã®èµ·åï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_iact_tsk
+
+ER
+iact_tsk(ID tskid)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_IACT_TSK_ENTER(tskid);
+	CHECK_INTCTX_UNL();
+	CHECK_TSKID(tskid);
+	p_tcb = get_tcb(tskid);
+
+	i_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat)) {
+		if (make_active(p_tcb)) {
+			reqflg = true;
+		}
+		ercd = E_OK;
+	}
+	else if (!(p_tcb->actque)) {
+		p_tcb->actque = true;
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_QOVR;
+	}
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_IACT_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_iact_tsk */
+
+/*
+ *  ã¿ã¹ã¯èµ·åè¦æ±ã®ã­ã£ã³ã»ã«
+ */
+#ifdef TOPPERS_can_act
+
+ER_UINT
+can_act(ID tskid)
+{
+	TCB		*p_tcb;
+	ER_UINT	ercd;
+
+	LOG_CAN_ACT_ENTER(tskid);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	p_tcb = get_tcb_self(tskid);
+
+	t_lock_cpu();
+	ercd = p_tcb->actque ? 1 : 0;
+	p_tcb->actque = false;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_CAN_ACT_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_can_act */
+
+/*
+ *  èªã¿ã¹ã¯ã®çµäº
+ */
+#ifdef TOPPERS_ext_tsk
+
+ER
+ext_tsk(void)
+{
+	ER		ercd;
+
+	LOG_EXT_TSK_ENTER();
+	CHECK_TSKCTX();
+
+	if (t_sense_lock()) {
+		/*
+		 *  CPUã­ãã¯ç¶æ
+ã§ext_tskãå¼ã°ããå ´åã¯ï¼CPUã­ãã¯ãè§£é¤ã
+		 *  ã¦ããã¿ã¹ã¯ãçµäºããï¼å®è£
+ä¸ã¯ï¼ãµã¼ãã¹ã³ã¼ã«å
+ã§ã®CPU
+		 *  ã­ãã¯ãçç¥ããã°ããã ãï¼
+		 */
+	}
+	else {
+		t_lock_cpu();
+	}
+	if (disdsp) {
+		/*
+		 *  ãã£ã¹ãããç¦æ­¢ç¶æ
+ã§ext_tskãå¼ã°ããå ´åã¯ï¼ãã£ã¹ãã
+		 *  ãè¨±å¯ç¶æ
+ã«ãã¦ããã¿ã¹ã¯ãçµäºããï¼
+		 */
+		disdsp = false;
+	}
+	if (!ipmflg) {
+		/*
+		 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼IPMï¼ãTIPM_ENAALLä»¥å¤ã®ç¶æ
+ã§ext_tsk
+		 *  ãå¼ã°ããå ´åã¯ï¼IPMãTIPM_ENAALLã«ãã¦ããã¿ã¹ã¯ãçµäºã
+		 *  ãï¼
+		 */
+		t_set_ipm(TIPM_ENAALL);
+		ipmflg = true;
+	}
+	dspflg = true;
+
+	(void) make_non_runnable(p_runtsk);
+	make_dormant(p_runtsk);
+	if (p_runtsk->actque) {
+		p_runtsk->actque = false;
+		(void) make_active(p_runtsk);
+	}
+	exit_and_dispatch();
+	ercd = E_SYS;
+
+  error_exit:
+	LOG_EXT_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ext_tsk */
+
+/*
+ *  ã¿ã¹ã¯ã®å¼·å¶çµäº
+ */
+#ifdef TOPPERS_ter_tsk
+
+ER
+ter_tsk(ID tskid)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_TER_TSK_ENTER(tskid);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID(tskid);
+	p_tcb = get_tcb(tskid);
+	CHECK_NONSELF(p_tcb);
+
+	t_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else {
+		if (TSTAT_RUNNABLE(p_tcb->tstat)) {
+			/*
+			 *  p_tcbã¯èªã¿ã¹ã¯ã§ãªãããï¼ï¼ã·ã³ã°ã«ãã­ã»ããµã§ã¯ï¼å®
+			 *  è¡ç¶æ
+ã§ãªãï¼make_non_runnable(p_tcb)ã§ã¿ã¹ã¯ãã£ã¹ãã
+			 *  ããå¿
+è¦ã«ãªããã¨ã¯ãªãï¼
+			 */
+			(void) make_non_runnable(p_tcb);
+		}
+		else if (TSTAT_WAITING(p_tcb->tstat)) {
+			wait_dequeue_wobj(p_tcb);
+			wait_dequeue_tmevtb(p_tcb);
+		}
+		make_dormant(p_tcb);
+		if (p_tcb->actque) {
+			p_tcb->actque = false;
+			if (make_active(p_tcb)) {
+				dispatch();
+			}
+		}
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TER_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ter_tsk */
+
+/*
+ *  ã¿ã¹ã¯ã®ãã¼ã¹åªå
+åº¦ã®å¤æ´
+ */
+#ifdef TOPPERS_chg_pri
+
+ER
+chg_pri(ID tskid, PRI tskpri)
+{
+	TCB		*p_tcb;
+	uint_t	newpri;
+	ER		ercd;
+
+	LOG_CHG_PRI_ENTER(tskid, tskpri);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	CHECK_TPRI_INI(tskpri);
+	p_tcb = get_tcb_self(tskid);
+	newpri = (tskpri == TPRI_INI) ? p_tcb->p_tinib->ipriority
+										: INT_PRIORITY(tskpri);
+
+	t_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else {
+		if (change_priority(p_tcb, newpri)) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_CHG_PRI_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_chg_pri */
+
+/*
+ *  ã¿ã¹ã¯åªå
+åº¦ã®åç
+§
+ */
+#ifdef TOPPERS_get_pri
+
+ER
+get_pri(ID tskid, PRI *p_tskpri)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_GET_PRI_ENTER(tskid, p_tskpri);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	p_tcb = get_tcb_self(tskid);
+
+	t_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else {
+		*p_tskpri = EXT_TSKPRI(p_tcb->priority);
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_GET_PRI_LEAVE(ercd, *p_tskpri);
+	return(ercd);
+}
+
+#endif /* TOPPERS_get_pri */
+
+/*
+ *  èªã¿ã¹ã¯ã®æ¡å¼µæ
+å ±ã®åç
+§
+ */
+#ifdef TOPPERS_get_inf
+
+ER
+get_inf(intptr_t *p_exinf)
+{
+	ER		ercd;
+
+	LOG_GET_INF_ENTER(p_exinf);
+	CHECK_TSKCTX_UNL();
+
+	t_lock_cpu();
+	*p_exinf = p_runtsk->p_tinib->exinf;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_GET_INF_LEAVE(ercd, *p_exinf);
+	return(ercd);
+}
+
+#endif /* TOPPERS_get_inf */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/task_refer.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/task_refer.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/task_refer.c	(revision 136)
@@ -0,0 +1,229 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2005-2008 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: task_refer.c 1016 2008-05-10 08:42:16Z ertl-hiro $
+ */
+
+/*
+ *		ã¿ã¹ã¯ã®ç¶æ
+åç
+§æ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "wait.h"
+#include "semaphore.h"
+#include "eventflag.h"
+#include "dataqueue.h"
+#include "pridataq.h"
+#include "mailbox.h"
+#include "mempfix.h"
+#include "time_event.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_REF_TSK_ENTER
+#define LOG_REF_TSK_ENTER(tskid, pk_rtsk)
+#endif /* LOG_REF_TSK_ENTER */
+
+#ifndef LOG_REF_TSK_LEAVE
+#define LOG_REF_TSK_LEAVE(ercd, pk_rtsk)
+#endif /* LOG_REF_TSK_LEAVE */
+
+/*
+ *  ã¿ã¹ã¯ã®ç¶æ
+åç
+§
+ */
+#ifdef TOPPERS_ref_tsk
+
+ER
+ref_tsk(ID tskid, T_RTSK *pk_rtsk)
+{
+	TCB		*p_tcb;
+	uint_t	tstat;
+	ER		ercd;
+
+	LOG_REF_TSK_ENTER(tskid, pk_rtsk);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	p_tcb = get_tcb_self(tskid);
+
+	t_lock_cpu();
+	tstat = p_tcb->tstat;
+	if (TSTAT_DORMANT(tstat)) {
+		/*
+ 		 *  å¯¾è±¡ã¿ã¹ã¯ãä¼æ­¢ç¶æ
+ã®å ´å
+		 */
+		pk_rtsk->tskstat = TTS_DMT;
+	}
+	else {
+		/*
+ 		 *  ã¿ã¹ã¯ç¶æ
+ã®ååºã
+		 */
+		if (TSTAT_SUSPENDED(tstat)) {
+			if (TSTAT_WAITING(tstat)) {
+				pk_rtsk->tskstat = TTS_WAS;
+			}
+			else {
+				pk_rtsk->tskstat = TTS_SUS;
+			}
+		}
+		else if (TSTAT_WAITING(tstat)) {
+			pk_rtsk->tskstat = TTS_WAI;
+		}
+		else if (p_tcb == p_runtsk) {
+			pk_rtsk->tskstat = TTS_RUN;
+		}
+		else {
+			pk_rtsk->tskstat = TTS_RDY;
+		}
+
+		/*
+ 		 *  ç¾å¨åªå
+åº¦ã¨ãã¼ã¹åªå
+åº¦ã®ååºã
+		 */
+		pk_rtsk->tskpri = EXT_TSKPRI(p_tcb->priority);
+		pk_rtsk->tskbpri = EXT_TSKPRI(p_tcb->priority);
+
+		if (TSTAT_WAITING(tstat)) {
+			/*
+	 		 *  å¾
+ã¡è¦å ã¨å¾
+ã¡å¯¾è±¡ã®ãªãã¸ã§ã¯ãã®IDã®ååºã
+			 */
+			switch (tstat & TS_WAIT_MASK) {
+			case TS_WAIT_SLP:
+				pk_rtsk->tskwait = TTW_SLP;
+				break;
+			case TS_WAIT_DLY:
+				pk_rtsk->tskwait = TTW_DLY;
+				break;
+			case TS_WAIT_SEM:
+				pk_rtsk->tskwait = TTW_SEM;
+				pk_rtsk->wobjid = SEMID(((WINFO_SEM *)(p_tcb->p_winfo))
+																->p_semcb);
+				break;
+			case TS_WAIT_FLG:
+				pk_rtsk->tskwait = TTW_FLG;
+				pk_rtsk->wobjid = FLGID(((WINFO_FLG *)(p_tcb->p_winfo))
+																->p_flgcb);
+				break;
+			case TS_WAIT_SDTQ:
+				pk_rtsk->tskwait = TTW_SDTQ;
+				pk_rtsk->wobjid = DTQID(((WINFO_DTQ *)(p_tcb->p_winfo))
+																->p_dtqcb);
+				break;
+			case TS_WAIT_RDTQ:
+				pk_rtsk->tskwait = TTW_RDTQ;
+				pk_rtsk->wobjid = DTQID(((WINFO_DTQ *)(p_tcb->p_winfo))
+																->p_dtqcb);
+				break;
+			case TS_WAIT_SPDQ:
+				pk_rtsk->tskwait = TTW_SPDQ;
+				pk_rtsk->wobjid = PDQID(((WINFO_PDQ *)(p_tcb->p_winfo))
+																->p_pdqcb);
+				break;
+			case TS_WAIT_RPDQ:
+				pk_rtsk->tskwait = TTW_RPDQ;
+				pk_rtsk->wobjid = PDQID(((WINFO_PDQ *)(p_tcb->p_winfo))
+																->p_pdqcb);
+				break;
+			case TS_WAIT_MBX:
+				pk_rtsk->tskwait = TTW_MBX;
+				pk_rtsk->wobjid = MBXID(((WINFO_MBX *)(p_tcb->p_winfo))
+																->p_mbxcb);
+				break;
+			case TS_WAIT_MPF:
+				pk_rtsk->tskwait = TTW_MPF;
+				pk_rtsk->wobjid = MPFID(((WINFO_MPF *)(p_tcb->p_winfo))
+																->p_mpfcb);
+				break;
+			}
+
+			/*
+	 		 *  ã¿ã¤ã ã¢ã¦ãããã¾ã§ã®æéã®ååºã
+			 */
+			if (p_tcb->p_winfo->p_tmevtb != NULL) {
+				pk_rtsk->lefttmo
+						= (TMO) tmevt_lefttim(p_tcb->p_winfo->p_tmevtb);
+			}
+			else {
+				pk_rtsk->lefttmo = TMO_FEVR;
+			}
+		}
+
+		/*
+ 		 *  èµ·åºè¦æ±ã­ã¥ã¼ã¤ã³ã°æ°ã®ååºã
+		 */
+		pk_rtsk->wupcnt = p_tcb->wupque ? 1U : 0U;
+	}
+
+	/*
+	 *  èµ·åè¦æ±ã­ã¥ã¼ã¤ã³ã°æ°ã®ååºã
+	 */
+	pk_rtsk->actcnt = p_tcb->actque ? 1U : 0U;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REF_TSK_LEAVE(ercd, pk_rtsk);
+	return(ercd);
+}
+
+#endif /* TOPPERS_ref_tsk */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/task_sync.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/task_sync.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/task_sync.c	(revision 136)
@@ -0,0 +1,571 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2009 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: task_sync.c 1453 2009-02-18 09:09:34Z ertl-hiro $
+ */
+
+/*
+ *		ã¿ã¹ã¯ä»å±åææ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "task.h"
+#include "wait.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_SLP_TSK_ENTER
+#define LOG_SLP_TSK_ENTER()
+#endif /* LOG_SLP_TSK_ENTER */
+
+#ifndef LOG_SLP_TSK_LEAVE
+#define LOG_SLP_TSK_LEAVE(ercd)
+#endif /* LOG_SLP_TSK_LEAVE */
+
+#ifndef LOG_TSLP_TSK_ENTER
+#define LOG_TSLP_TSK_ENTER(tmout)
+#endif /* LOG_TSLP_TSK_ENTER */
+
+#ifndef LOG_TSLP_TSK_LEAVE
+#define LOG_TSLP_TSK_LEAVE(ercd)
+#endif /* LOG_TSLP_TSK_LEAVE */
+
+#ifndef LOG_WUP_TSK_ENTER
+#define LOG_WUP_TSK_ENTER(tskid)
+#endif /* LOG_WUP_TSK_ENTER */
+
+#ifndef LOG_WUP_TSK_LEAVE
+#define LOG_WUP_TSK_LEAVE(ercd)
+#endif /* LOG_WUP_TSK_LEAVE */
+
+#ifndef LOG_IWUP_TSK_ENTER
+#define LOG_IWUP_TSK_ENTER(tskid)
+#endif /* LOG_IWUP_TSK_ENTER */
+
+#ifndef LOG_IWUP_TSK_LEAVE
+#define LOG_IWUP_TSK_LEAVE(ercd)
+#endif /* LOG_IWUP_TSK_LEAVE */
+
+#ifndef LOG_CAN_WUP_ENTER
+#define LOG_CAN_WUP_ENTER(tskid)
+#endif /* LOG_CAN_WUP_ENTER */
+
+#ifndef LOG_CAN_WUP_LEAVE
+#define LOG_CAN_WUP_LEAVE(ercd)
+#endif /* LOG_CAN_WUP_LEAVE */
+
+#ifndef LOG_REL_WAI_ENTER
+#define LOG_REL_WAI_ENTER(tskid)
+#endif /* LOG_REL_WAI_ENTER */
+
+#ifndef LOG_REL_WAI_LEAVE
+#define LOG_REL_WAI_LEAVE(ercd)
+#endif /* LOG_REL_WAI_LEAVE */
+
+#ifndef LOG_IREL_WAI_ENTER
+#define LOG_IREL_WAI_ENTER(tskid)
+#endif /* LOG_IREL_WAI_ENTER */
+
+#ifndef LOG_IREL_WAI_LEAVE
+#define LOG_IREL_WAI_LEAVE(ercd)
+#endif /* LOG_IREL_WAI_LEAVE */
+
+#ifndef LOG_SUS_TSK_ENTER
+#define LOG_SUS_TSK_ENTER(tskid)
+#endif /* LOG_SUS_TSK_ENTER */
+
+#ifndef LOG_SUS_TSK_LEAVE
+#define LOG_SUS_TSK_LEAVE(ercd)
+#endif /* LOG_SUS_TSK_LEAVE */
+
+#ifndef LOG_RSM_TSK_ENTER
+#define LOG_RSM_TSK_ENTER(tskid)
+#endif /* LOG_RSM_TSK_ENTER */
+
+#ifndef LOG_RSM_TSK_LEAVE
+#define LOG_RSM_TSK_LEAVE(ercd)
+#endif /* LOG_RSM_TSK_LEAVE */
+
+#ifndef LOG_DLY_TSK_ENTER
+#define LOG_DLY_TSK_ENTER(dlytim)
+#endif /* LOG_DLY_TSK_ENTER */
+
+#ifndef LOG_DLY_TSK_LEAVE
+#define LOG_DLY_TSK_LEAVE(ercd)
+#endif /* LOG_DLY_TSK_LEAVE */
+
+/*
+ *  èµ·åºå¾
+ã¡
+ */
+#ifdef TOPPERS_slp_tsk
+
+ER
+slp_tsk(void)
+{
+	WINFO	winfo;
+	ER		ercd;
+
+	LOG_SLP_TSK_ENTER();
+	CHECK_DISPATCH();
+
+	t_lock_cpu();
+	if (p_runtsk->wupque) {
+		p_runtsk->wupque = false;
+		ercd = E_OK;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_SLP);
+		make_wait(&winfo);
+		LOG_TSKSTAT(p_runtsk);
+		dispatch();
+		ercd = winfo.wercd;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_SLP_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_slp_tsk */
+
+/*
+ *  èµ·åºå¾
+ã¡ï¼ã¿ã¤ã ã¢ã¦ãããï¼
+ */
+#ifdef TOPPERS_tslp_tsk
+
+ER
+tslp_tsk(TMO tmout)
+{
+	WINFO	winfo;
+	TMEVTB	tmevtb;
+	ER		ercd;
+
+	LOG_TSLP_TSK_ENTER(tmout);
+	CHECK_DISPATCH();
+	CHECK_TMOUT(tmout);
+
+	t_lock_cpu();
+	if (p_runtsk->wupque) {
+		p_runtsk->wupque = false;
+		ercd = E_OK;
+	}
+	else if (tmout == TMO_POL) {
+		ercd = E_TMOUT;
+	}
+	else {
+		p_runtsk->tstat = (TS_WAITING | TS_WAIT_SLP);
+		make_wait_tmout(&winfo, &tmevtb, tmout);
+		LOG_TSKSTAT(p_runtsk);
+		dispatch();
+		ercd = winfo.wercd;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_TSLP_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_tslp_tsk */
+
+/*
+ *  ã¿ã¹ã¯ã®èµ·åº
+ */
+#ifdef TOPPERS_wup_tsk
+
+ER
+wup_tsk(ID tskid)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_WUP_TSK_ENTER(tskid);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	p_tcb = get_tcb_self(tskid);
+
+	t_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else if (TSTAT_WAIT_SLP(p_tcb->tstat)) {
+		if (wait_complete(p_tcb)) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else if (!(p_tcb->wupque)) {
+		p_tcb->wupque = true;
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_QOVR;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_WUP_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_wup_tsk */
+
+/*
+ *  ã¿ã¹ã¯ã®èµ·åºï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_iwup_tsk
+
+ER
+iwup_tsk(ID tskid)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_IWUP_TSK_ENTER(tskid);
+	CHECK_INTCTX_UNL();
+	CHECK_TSKID(tskid);
+	p_tcb = get_tcb(tskid);
+
+	i_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else if (TSTAT_WAIT_SLP(p_tcb->tstat)) {
+		if (wait_complete(p_tcb)) {
+			reqflg = true;
+		}
+		ercd = E_OK;
+	}
+	else if (!(p_tcb->wupque)) {
+		p_tcb->wupque = true;
+		ercd = E_OK;
+	}
+	else {
+		ercd = E_QOVR;
+	}
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_IWUP_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_iwup_tsk */
+
+/*
+ *  ã¿ã¹ã¯èµ·åºè¦æ±ã®ã­ã£ã³ã»ã«
+ */
+#ifdef TOPPERS_can_wup
+
+ER_UINT
+can_wup(ID tskid)
+{
+	TCB		*p_tcb;
+	ER_UINT	ercd;
+
+	LOG_CAN_WUP_ENTER(tskid);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	p_tcb = get_tcb_self(tskid);
+
+	t_lock_cpu();
+	if (TSTAT_DORMANT(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else {
+		ercd = p_tcb->wupque ? 1 : 0;
+		p_tcb->wupque = false;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_CAN_WUP_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_can_wup */
+
+/*
+ *  å¾
+ã¡ç¶æ
+ã®å¼·å¶è§£é¤
+ */
+#ifdef TOPPERS_rel_wai
+
+ER
+rel_wai(ID tskid)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_REL_WAI_ENTER(tskid);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID(tskid);
+	p_tcb = get_tcb(tskid);
+
+	t_lock_cpu();
+	if (!TSTAT_WAITING(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else {
+		if (wait_release(p_tcb)) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_REL_WAI_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_rel_wai */
+
+/*
+ *  å¾
+ã¡ç¶æ
+ã®å¼·å¶è§£é¤ï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ï¼
+ */
+#ifdef TOPPERS_irel_wai
+
+ER
+irel_wai(ID tskid)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_IREL_WAI_ENTER(tskid);
+	CHECK_INTCTX_UNL();
+	CHECK_TSKID(tskid);
+	p_tcb = get_tcb(tskid);
+
+	i_lock_cpu();
+	if (!TSTAT_WAITING(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else {
+		if (wait_release(p_tcb)) {
+			reqflg = true;
+		}
+		ercd = E_OK;
+	}
+	i_unlock_cpu();
+
+  error_exit:
+	LOG_IREL_WAI_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_irel_wai */
+
+/*
+ *  å¼·å¶å¾
+ã¡ç¶æ
+ã¸ã®ç§»è¡
+ */
+#ifdef TOPPERS_sus_tsk
+
+ER
+sus_tsk(ID tskid)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_SUS_TSK_ENTER(tskid);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID_SELF(tskid);
+	p_tcb = get_tcb_self(tskid);
+
+	t_lock_cpu();
+	if (p_tcb == p_runtsk && !dspflg) {
+		ercd = E_CTX;
+	}
+	else if (TSTAT_DORMANT(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else if (TSTAT_RUNNABLE(p_tcb->tstat)) {
+		/*
+		 *  å®è¡ã§ããç¶æ
+ããå¼·å¶å¾
+ã¡ç¶æ
+ã¸ã®é·ç§»
+		 */
+		p_tcb->tstat = TS_SUSPENDED;
+		LOG_TSKSTAT(p_tcb);
+		if (make_non_runnable(p_tcb)) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else if (TSTAT_SUSPENDED(p_tcb->tstat)) {
+		ercd = E_QOVR;
+	}
+	else {
+		/*
+		 *  å¾
+ã¡ç¶æ
+ããäºéå¾
+ã¡ç¶æ
+ã¸ã®é·ç§»
+		 */
+		p_tcb->tstat |= TS_SUSPENDED;
+		LOG_TSKSTAT(p_tcb);
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_SUS_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_sus_tsk */
+
+/*
+ *  å¼·å¶å¾
+ã¡ç¶æ
+ããã®åé
+ */
+#ifdef TOPPERS_rsm_tsk
+
+ER
+rsm_tsk(ID tskid)
+{
+	TCB		*p_tcb;
+	ER		ercd;
+
+	LOG_RSM_TSK_ENTER(tskid);
+	CHECK_TSKCTX_UNL();
+	CHECK_TSKID(tskid);
+	p_tcb = get_tcb(tskid);
+
+	t_lock_cpu();
+	if (!TSTAT_SUSPENDED(p_tcb->tstat)) {
+		ercd = E_OBJ;
+	}
+	else if (!TSTAT_WAITING(p_tcb->tstat)) {
+		/*
+		 *  å¼·å¶å¾
+ã¡ç¶æ
+ããå®è¡ã§ããç¶æ
+ã¸ã®é·ç§»
+		 */
+		p_tcb->tstat = TS_RUNNABLE;
+		LOG_TSKSTAT(p_tcb);
+		if (make_runnable(p_tcb)) {
+			dispatch();
+		}
+		ercd = E_OK;
+	}
+	else {
+		/*
+		 *  äºéå¾
+ã¡ç¶æ
+ããå¾
+ã¡ç¶æ
+ã¸ã®é·ç§»
+		 */
+		p_tcb->tstat &= ~TS_SUSPENDED;
+		LOG_TSKSTAT(p_tcb);
+		ercd = E_OK;
+	}
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_RSM_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_rsm_tsk */
+
+/*
+ *  èªã¿ã¹ã¯ã®é
+å»¶
+ */
+#ifdef TOPPERS_dly_tsk
+
+ER
+dly_tsk(RELTIM dlytim)
+{
+	WINFO	winfo;
+	TMEVTB	tmevtb;
+	ER		ercd;
+
+	LOG_DLY_TSK_ENTER(dlytim);
+	CHECK_DISPATCH();
+	CHECK_PAR(dlytim <= TMAX_RELTIM);
+
+	t_lock_cpu();
+	p_runtsk->tstat = (TS_WAITING | TS_WAIT_DLY);
+	(void) make_non_runnable(p_runtsk);
+	p_runtsk->p_winfo = &winfo;
+	winfo.p_tmevtb = &tmevtb;
+	tmevtb_enqueue(&tmevtb, dlytim, (CBACK) wait_tmout_ok, (void *) p_runtsk);
+	LOG_TSKSTAT(p_runtsk);
+	dispatch();
+	ercd = winfo.wercd;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_DLY_TSK_LEAVE(ercd);
+	return(ercd);
+}
+
+#endif /* TOPPERS_dly_tsk */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/time_event.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/time_event.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/time_event.c	(revision 136)
@@ -0,0 +1,437 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: time_event.c 2559 2013-10-19 06:53:19Z ertl-hiro $
+ */
+
+/*
+ *		ã¿ã¤ã ã¤ãã³ãç®¡çã¢ã¸ã¥ã¼ã«
+ */
+
+#include "kernel_impl.h"
+#include "time_event.h"
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãæä½ãã¯ã­
+ */
+#define	PARENT(index)		((index) >> 1)		/* è¦ªãã¼ããæ±ãã */
+#define	LCHILD(index)		((index) << 1)		/* å·¦ã®å­ãã¼ããæ±ãã */
+#define	TMEVT_NODE(index)	(tmevt_heap[(index) - 1])
+
+/*
+ *  ã¤ãã³ãçºçæå»æ¯è¼ãã¯ã­
+ *
+ *  ã¤ãã³ãçºçæå»ã¯ï¼min_timeããã®ç¸å¯¾å¤ã§æ¯è¼ããï¼ããªãã¡ï¼
+ *  min_timeãæå°å¤ï¼æãè¿ãæå»ï¼ï¼mit_time-1ãæå¤§å¤ï¼æãé ãæå»ï¼
+ *  ã¨ã¿ãªãã¦æ¯è¼ããï¼
+ */
+#define	EVTTIM_LT(t1, t2) (((t1) - min_time) < ((t2) - min_time))
+#define	EVTTIM_LE(t1, t2) (((t1) - min_time) <= ((t2) - min_time))
+
+#ifdef TOPPERS_tmeini
+
+/*
+ *  ç¾å¨ã®ã·ã¹ãã æå»ï¼åä½: 1ããªç§ï¼
+ *
+ *  å³å¯ã«ã¯ï¼åã®ã¿ã¤ã ãã£ãã¯ã®ã·ã¹ãã æå»ï¼
+ */
+EVTTIM	current_time;
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãä¸­ã§æå¹ãªæå°ã®ã·ã¹ãã æå»ï¼åä½: 1ããªç§ï¼
+ */
+EVTTIM	min_time;
+
+/*
+ *  æ¬¡ã®ã¿ã¤ã ãã£ãã¯ã®ã·ã¹ãã æå»ï¼åä½: 1ããªç§ï¼
+ */
+EVTTIM	next_time;
+
+/*
+ *  ã·ã¹ãã æå»ç©ç®ç¨å¤æ°ï¼åä½: 1/TIC_DENOããªç§ï¼
+ */
+#if TIC_DENO != 1U
+uint_t	next_subtime;
+#endif /* TIC_DENO != 1U */
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãã®æå¾ã®ä½¿ç¨é åã®ã¤ã³ããã¯ã¹
+ */
+uint_t	last_index;
+
+/*
+ *  ã¿ã¤ãã¢ã¸ã¥ã¼ã«ã®åæå
+ */
+void
+initialize_tmevt(void)
+{
+	current_time = 0U;
+	min_time = 0U;
+	next_time = current_time + TIC_NUME / TIC_DENO;
+#if TIC_DENO != 1U
+	next_subtime = TIC_NUME % TIC_DENO;
+#endif /* TIC_DENO != 1U */
+	last_index = 0U;
+}
+
+#endif /* TOPPERS_tmeini */
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ãã®æ¿å
+¥ä½ç½®ãä¸åãã«æ¢ç´¢
+ *
+ *  æå»timeã«çºçããã¿ã¤ã ã¤ãã³ããæ¿å
+¥ãããã¼ããç©ºããããã«ï¼
+ *  ãã¼ãã®ä¸ã«åãã£ã¦ç©ºãã¼ããç§»åãããï¼ç§»ååã®ç©ºãã¼ãã®ä½ç½®ã
+ *  indexã«æ¸¡ãã¨ï¼ç§»åå¾ã®ç©ºãã¼ãã®ä½ç½®ï¼ããªãã¡æ¿å
+¥ä½ç½®ï¼ãè¿ãï¼
+ */
+#ifdef TOPPERS_tmeup
+
+uint_t
+tmevt_up(uint_t index, EVTTIM time)
+{
+	uint_t	parent;
+
+	while (index > 1) {
+		/*
+		 *  è¦ªãã¼ãã®ã¤ãã³ãçºçæå»ã®æ¹ãæ©ãï¼ã¾ãã¯åãï¼ãªãã°ï¼
+		 *  indexãæ¿å
+¥ä½ç½®ãªã®ã§ã«ã¼ããæããï¼
+		 */
+		parent = PARENT(index);
+		if (EVTTIM_LE(TMEVT_NODE(parent).time, time)) {
+			break;
+		}
+
+		/*
+		 *  è¦ªãã¼ããindexã®ä½ç½®ã«ç§»åãããï¼
+		 */
+		TMEVT_NODE(index) = TMEVT_NODE(parent);
+		TMEVT_NODE(index).p_tmevtb->index = index;
+
+		/*
+		 *  indexãè¦ªãã¼ãã®ä½ç½®ã«æ´æ°ï¼
+		 */
+		index = parent;
+	}
+	return(index);
+}
+
+#endif /* TOPPERS_tmeup */
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ãã®æ¿å
+¥ä½ç½®ãä¸åãã«æ¢ç´¢
+ *
+ *  æå»timeã«çºçããã¿ã¤ã ã¤ãã³ããæ¿å
+¥ãããã¼ããç©ºããããã«ï¼
+ *  ãã¼ãã®ä¸ã«åãã£ã¦ç©ºãã¼ããç§»åãããï¼ç§»ååã®ç©ºãã¼ãã®ä½ç½®ã 
+ *  indexã«æ¸¡ãã¨ï¼ç§»åå¾ã®ç©ºãã¼ãã®ä½ç½®ï¼ããªãã¡æ¿å
+¥ä½ç½®ï¼ãè¿ãï¼
+ */
+#ifdef TOPPERS_tmedown
+
+uint_t
+tmevt_down(uint_t index, EVTTIM time)
+{
+	uint_t	child;
+
+	while ((child = LCHILD(index)) <= last_index) {
+		/*
+		 *  å·¦å³ã®å­ãã¼ãã®ã¤ãã³ãçºçæå»ãæ¯è¼ãï¼æ©ãæ¹ã®å­ãã¼ã
+		 *  ã®ä½ç½®ãchildã«è¨­å®ããï¼ä»¥ä¸ã®å­ãã¼ãã¯ï¼ããã§é¸ã°ããæ¹
+		 *  ã®å­ãã¼ãã®ãã¨ï¼
+		 */
+		if (child + 1 <= last_index
+						&& EVTTIM_LT(TMEVT_NODE(child + 1).time,
+										TMEVT_NODE(child).time)) {
+			child = child + 1;
+		}
+
+		/*
+		 *  å­ãã¼ãã®ã¤ãã³ãçºçæå»ã®æ¹ãé
+ãï¼ã¾ãã¯åãï¼ãªãã°ï¼
+		 *  indexãæ¿å
+¥ä½ç½®ãªã®ã§ã«ã¼ããæããï¼
+		 */
+		if (EVTTIM_LE(time, TMEVT_NODE(child).time)) {
+			break;
+		}
+
+		/*
+		 *  å­ãã¼ããindexã®ä½ç½®ã«ç§»åãããï¼
+		 */
+		TMEVT_NODE(index) = TMEVT_NODE(child);
+		TMEVT_NODE(index).p_tmevtb->index = index;
+
+		/*
+		 *  indexãå­ãã¼ãã®ä½ç½®ã«æ´æ°ï¼
+		 */
+		index = child;
+	}
+	return(index);
+}
+
+#endif /* TOPPERS_tmedown */
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãã¸ã®ç»é²
+ *
+ *  p_tmevtbã§æå®ããã¿ã¤ã ã¤ãã³ããã­ãã¯ãï¼timeã§æå®ããæéãçµ
+ *  éå¾ã«ã¤ãã³ããçºçããããã«ï¼ã¿ã¤ã ã¤ãã³ããã¼ãã«ç»é²ããï¼
+ */
+#ifdef TOPPERS_tmeins
+
+void
+tmevtb_insert(TMEVTB *p_tmevtb, EVTTIM time)
+{
+	uint_t	index;
+
+	/*
+	 *  last_indexãã¤ã³ã¯ãªã¡ã³ããï¼ããããä¸ã«æ¿å
+¥ä½ç½®ãæ¢ãï¼
+	 */
+	index = tmevt_up(++last_index, time);
+
+	/*
+	 *  ã¿ã¤ã ã¤ãã³ããindexã®ä½ç½®ã«æ¿å
+¥ããï¼
+	 */ 
+	TMEVT_NODE(index).time = time;
+	TMEVT_NODE(index).p_tmevtb = p_tmevtb;
+	p_tmevtb->index = index;
+}
+
+#endif /* TOPPERS_tmeins */
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãããã®åé¤
+ */
+#ifdef TOPPERS_tmedel
+
+void
+tmevtb_delete(TMEVTB *p_tmevtb)
+{
+	uint_t	index = p_tmevtb->index;
+	uint_t	parent;
+	EVTTIM	event_time = TMEVT_NODE(last_index).time;
+
+	/*
+	 *  åé¤ã«ããã¿ã¤ã ã¤ãã³ããã¼ããç©ºã«ãªãå ´åã¯ä½ãããªãï¼
+	 */
+	if (--last_index == 0) {
+		return;
+	}
+
+	/*
+	 *  åé¤ãããã¼ãã®ä½ç½®ã«æå¾ã®ãã¼ãï¼last_index+1ã®ä½ç½®ã®ãã¼ãï¼
+	 *  ãæ¿å
+¥ãï¼ãããé©åãªä½ç½®ã¸ç§»åãããï¼å®éã«ã¯ï¼æå¾ã®ãã¼ã
+	 *  ãå®éã«æ¿å
+¥ããã®ã§ã¯ãªãï¼åé¤ãããã¼ãã®ä½ç½®ãç©ºãã¼ãã«ãª
+	 *  ãã®ã§ï¼æå¾ã®ãã¼ããæ¿å
+¥ãã¹ãä½ç½®ã¸åãã¦ç©ºãã¼ããç§»åãã
+	 *  ãï¼
+	 *  æå¾ã®ãã¼ãã®ã¤ãã³ãçºçæå»ãï¼åé¤ãããã¼ãã®è¦ªãã¼ãã®ã¤
+	 *  ãã³ãçºçæå»ããåã®å ´åã«ã¯ï¼ä¸ã«åãã£ã¦æ¿å
+¥ä½ç½®ãæ¢ãï¼ã
+	 *  ãã§ãªãå ´åã«ã¯ï¼ä¸ã«åãã£ã¦æ¢ãï¼
+	 */
+	if (index > 1 && EVTTIM_LT(event_time,
+								TMEVT_NODE(parent = PARENT(index)).time)) {
+		/*
+		 *  è¦ªãã¼ããindexã®ä½ç½®ã«ç§»åãããï¼
+		 */
+		TMEVT_NODE(index) = TMEVT_NODE(parent);
+		TMEVT_NODE(index).p_tmevtb->index = index;
+
+		/*
+		 *  åé¤ãããã¼ãã®è¦ªãã¼ãããä¸ã«åãã£ã¦æ¿å
+¥ä½ç½®ãæ¢ãï¼
+		 */
+		index = tmevt_up(parent, event_time);
+	}
+	else {
+		/*
+		 *  åé¤ãããã¼ãããä¸ã«åãã£ã¦æ¿å
+¥ä½ç½®ãæ¢ãï¼
+		 */
+		index = tmevt_down(index, event_time);
+	}
+
+	/*
+	 *  æå¾ã®ãã¼ããindexã®ä½ç½®ã«æ¿å
+¥ããï¼
+	 */ 
+	TMEVT_NODE(index) = TMEVT_NODE(last_index + 1);
+	TMEVT_NODE(index).p_tmevtb->index = index;
+}
+
+#endif /* TOPPERS_tmedel */
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãã®å
+é ­ã®ãã¼ãã®åé¤
+ */
+Inline void
+tmevtb_delete_top(void)
+{
+	uint_t	index;
+	EVTTIM	event_time = TMEVT_NODE(last_index).time;
+
+	/*
+	 *  åé¤ã«ããã¿ã¤ã ã¤ãã³ããã¼ããç©ºã«ãªãå ´åã¯ä½ãããªãï¼
+	 */
+	if (--last_index == 0) {
+		return;
+	}
+
+	/*
+	 *  ã«ã¼ããã¼ãã«æå¾ã®ãã¼ãï¼last_index + 1 ã®ä½ç½®ã®ãã¼ãï¼ã
+	 *  æ¿å
+¥ãï¼ãããé©åãªä½ç½®ã¸ç§»åãããï¼å®éã«ã¯ï¼æå¾ã®ãã¼ãã
+	 *  å®éã«æ¿å
+¥ããã®ã§ã¯ãªãï¼ã«ã¼ããã¼ããç©ºãã¼ãã«ãªãã®ã§ï¼æ
+	 *  å¾ã®ãã¼ããæ¿å
+¥ãã¹ãä½ç½®ã¸åãã¦ç©ºãã¼ããç§»åãããï¼
+	 */
+	index = tmevt_down(1, event_time);
+
+	/*
+	 *  æå¾ã®ãã¼ããindexã®ä½ç½®ã«æ¿å
+¥ããï¼
+	 */ 
+	TMEVT_NODE(index) = TMEVT_NODE(last_index + 1);
+	TMEVT_NODE(index).p_tmevtb->index = index;
+}
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ãã¾ã§ã®æ®ãæéã®è¨ç®
+ */
+#ifdef TOPPERS_tmeltim
+
+RELTIM
+tmevt_lefttim(TMEVTB *p_tmevtb)
+{
+	EVTTIM	time;
+
+	time = TMEVT_NODE(p_tmevtb->index).time;
+	if (EVTTIM_LE(time, next_time)) {
+		/*
+		 *  æ¬¡ã®ã¿ã¤ã ãã£ãã¯ã§å¦çãããå ´åã«ã¯0ãè¿ãï¼
+		 */
+		return(0U);
+	}
+	else {
+		return((RELTIM)(time - base_time));
+	}
+}
+
+#endif /* TOPPERS_tmeltim */
+
+/*
+ *  ã¿ã¤ã ãã£ãã¯ã®ä¾çµ¦
+ */
+#ifdef TOPPERS_sigtim
+
+void
+signal_time(void)
+{
+	TMEVTB	*p_tmevtb;
+
+	assert(sense_context());
+	assert(!i_sense_lock());
+
+	i_lock_cpu();
+
+	/*
+	 *  current_timeãæ´æ°ããï¼
+	 */
+	current_time = next_time;
+
+	/*
+	 *  next_timeï¼next_subtimeãæ´æ°ããï¼
+	 */
+#if TIC_DENO == 1U
+	next_time = current_time + TIC_NUME;
+#else /* TIC_DENO == 1U */
+	next_subtime += TIC_NUME % TIC_DENO;
+	next_time = current_time + TIC_NUME / TIC_DENO;
+	if (next_subtime >= TIC_DENO) {
+		next_subtime -= TIC_DENO;
+		next_time += 1U;
+	}
+#endif /* TIC_DENO == 1U */
+
+	/*
+	 *  current_timeããã¤ãã³ãçºçæå»ã®æ©ãï¼ã¾ãã¯åãï¼ã¿ã¤ã ã¤ã
+	 *  ã³ããï¼ã¿ã¤ã ã¤ãã³ããã¼ãããåé¤ãï¼ã³ã¼ã«ããã¯é¢æ°ãå¼ã³
+	 *  åºãï¼
+	 */
+	while (last_index > 0 && EVTTIM_LE(TMEVT_NODE(1).time, current_time)) {
+		p_tmevtb = TMEVT_NODE(1).p_tmevtb;
+		tmevtb_delete_top();
+		(*(p_tmevtb->callback))(p_tmevtb->arg);
+	}
+
+	/*
+	 *  min_timeãæ´æ°ããï¼
+	 */
+	min_time = current_time;
+
+	i_unlock_cpu();
+}
+
+#endif /* TOPPERS_sigtim */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/time_event.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/time_event.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/time_event.h	(revision 136)
@@ -0,0 +1,219 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: time_event.h 1774 2010-03-19 12:45:46Z ertl-hiro $
+ */
+
+/*
+ *		ã¿ã¤ã ã¤ãã³ãç®¡çã¢ã¸ã¥ã¼ã«
+ */
+
+#ifndef TOPPERS_TIME_EVENT_H
+#define TOPPERS_TIME_EVENT_H
+
+/*
+ *  ã¤ãã³ãçºçæå»ã®ãã¼ã¿åã®å®ç¾©
+ *
+ *  EVTTIMã¯ï¼RELTIMã¨ãã¦æå®ã§ããç¯å²ãããåºãç¯å²ãè¡¨ç¾ã§ããå¿
+è¦
+ *  ãããï¼Î¼ITRON4.0ä»æ§ã®ã¹ã¿ã³ãã¼ããã­ãã¡ã¤ã«ã§ã¯ï¼RELTIMã16ãã
+ *  ãä»¥ä¸ã§ãªããã°ãªããªãããï¼EVTTIMã¯17ãããä»¥ä¸ã§ãããã¨ãå¿
+è¦
+ *  ã§ããï¼ãã®ããï¼16ãããã«ãªãå ´åãããuint_tã§ã¯ãªãï¼ulong_tã«
+ *  å®ç¾©ãã¦ããï¼
+ */
+typedef ulong_t	EVTTIM;
+
+/* 
+ *  ã¿ã¤ã ã¤ãã³ããã­ãã¯ã®ãã¼ã¿åã®å®ç¾©
+ */
+typedef void	(*CBACK)(void *);	/* ã³ã¼ã«ããã¯é¢æ°ã®å */
+
+typedef struct time_event_block {
+	uint_t	index;			/* ã¿ã¤ã ã¤ãã³ããã¼ãä¸­ã§ã®ä½ç½® */
+	CBACK	callback;		/* ã³ã¼ã«ããã¯é¢æ° */
+	void	*arg;			/* ã³ã¼ã«ããã¯é¢æ°ã¸æ¸¡ãå¼æ° */
+} TMEVTB;
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãä¸­ã®ãã¼ãã®ãã¼ã¿åã®å®ç¾©
+ */
+typedef struct time_event_node {
+	EVTTIM	time;			/* ã¤ãã³ãçºçæå» */
+	TMEVTB	*p_tmevtb;		/* å¯¾å¿ããã¿ã¤ã ã¤ãã³ããã­ãã¯ */
+} TMEVTN;
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãï¼kernel_cfg.cï¼
+ */
+extern TMEVTN	tmevt_heap[];
+
+/*
+ *  ç¾å¨ã®ã·ã¹ãã æå»ï¼åä½: 1ããªç§ï¼
+ *
+ *  ã·ã¹ãã èµ·åæã«0ã«åæåããï¼ä»¥éï¼ã¿ã¤ã ãã£ãã¯ãä¾çµ¦ãããåº¦ã«
+ *  åèª¿ã«å¢å ããï¼
+ */
+extern EVTTIM	current_time;
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãä¸­ã§æå¹ãªæå°ã®ã·ã¹ãã æå»ï¼åä½: 1ããªç§ï¼
+ */
+extern EVTTIM	min_time;
+
+/*
+ *  æ¬¡ã®ã¿ã¤ã ãã£ãã¯ã®ã·ã¹ãã æå»ï¼åä½: 1ããªç§ï¼
+ */
+extern EVTTIM	next_time;
+
+/*
+ *  ã·ã¹ãã æå»ç©ç®ç¨å¤æ°ï¼åä½: 1/TIC_DENOããªç§ï¼
+ *
+ *  æ¬¡ã®ã¿ã¤ã ãã£ãã¯ã®ã·ã¹ãã æå»ã®ä¸ä½æ¡ãç¤ºãï¼ä¸ä½æ¡ã¯next_timeï¼ï¼
+ *  TIC_DENOã1ã®æã¯ï¼ä¸ä½æ¡ã¯å¸¸ã«0ã§ããããï¼ãã®å¤æ°ã¯å¿
+è¦ãªãï¼
+ */
+#if TIC_DENO != 1U
+extern uint_t	next_subtime;
+#endif /* TIC_DENO != 1U */
+
+/*
+ *  ç¸å¯¾æéã®åºæºæå»ï¼åä½: 1ããªç§ï¼
+ *
+ *  æ¬¡ã®ã¿ã¤ã ãã£ãã¯ã®ã·ã¹ãã æå»ãåãä¸ããæå»ï¼TIC_DENOã1ã®æ
+ *  ã¯ï¼next_timeã«ä¸è´ããï¼
+ */
+#if TIC_DENO == 1U
+#define	base_time	(next_time)
+#else /* TIC_DENO == 1U */
+#define	base_time	(next_time + (next_subtime > 0U ? 1U : 0U))
+#endif /* TIC_DENO == 1U */
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãã®æå¾ã®ä½¿ç¨é åã®ã¤ã³ããã¯ã¹
+ *
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãã«ç»é²ããã¦ããã¿ã¤ã ã¤ãã³ãã®æ°ã«ä¸è´ããï¼
+ */
+extern uint_t	last_index;
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ãç®¡çã¢ã¸ã¥ã¼ã«ã®åæå
+ */
+extern void	initialize_tmevt(void);
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ãã®æ¿å
+¥ä½ç½®ã®æ¢ç´¢
+ */
+extern uint_t	tmevt_up(uint_t index, EVTTIM time);
+extern uint_t	tmevt_down(uint_t index, EVTTIM time);
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã¼ãã¸ã®ç»é²ã¨åé¤
+ */
+extern void	tmevtb_insert(TMEVTB *p_tmevtb, EVTTIM time);
+extern void	tmevtb_delete(TMEVTB *p_tmevtb);
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã­ãã¯ã®ç»é²ï¼ç¸å¯¾æéæå®ï¼
+ *
+ *  timeã§æå®ããç¸å¯¾æéãçµéããå¾ã«ï¼argãå¼æ°ã¨ãã¦callbackãå¼
+ *  ã³åºãããããã«ï¼p_tmevtbã§æå®ããã¿ã¤ã ã¤ãã³ããã­ãã¯ãç»é²ã
+ *  ãï¼
+ *  
+ */
+Inline void
+tmevtb_enqueue(TMEVTB *p_tmevtb, RELTIM time, CBACK callback, void *arg)
+{
+	assert(time <= TMAX_RELTIM);
+
+	p_tmevtb->callback = callback;
+	p_tmevtb->arg = arg;
+	tmevtb_insert(p_tmevtb, base_time + time);
+}
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã­ãã¯ã®ç»é²ï¼ã¤ãã³ãçºçæå»æå®ï¼
+ *
+ *  timeã§æå®ããã¤ãã³ãçºçæå»ã«ï¼argãå¼æ°ã¨ãã¦callbackãå¼ã³åº
+ *  ãããããã«ï¼p_tmevtbã§æå®ããã¿ã¤ã ã¤ãã³ããã­ãã¯ãç»é²ããï¼
+ */
+Inline void
+tmevtb_enqueue_evttim(TMEVTB *p_tmevtb, EVTTIM time, CBACK callback, void *arg)
+{
+	p_tmevtb->callback = callback;
+	p_tmevtb->arg = arg;
+	tmevtb_insert(p_tmevtb, time);
+}
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ããã­ãã¯ã®ç»é²è§£é¤
+ */
+Inline void
+tmevtb_dequeue(TMEVTB *p_tmevtb)
+{
+	tmevtb_delete(p_tmevtb);
+}
+
+/*
+ *  ã¿ã¤ã ã¤ãã³ãã¾ã§ã®æ®ãæéã®è¨ç®
+ */
+extern RELTIM	tmevt_lefttim(TMEVTB *p_tmevtb);
+
+/*
+ *  ã¿ã¤ã ãã£ãã¯ã®ä¾çµ¦
+ */
+extern void	signal_time(void);
+
+#endif /* TOPPERS_TIME_EVENT_H */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/time_manage.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/time_manage.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/time_manage.c	(revision 136)
@@ -0,0 +1,161 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: time_manage.c 1747 2010-02-11 18:24:19Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã æå»ç®¡çæ©è½
+ */
+
+#include "kernel_impl.h"
+#include "check.h"
+#include "time_event.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_GET_TIM_ENTER
+#define LOG_GET_TIM_ENTER(p_systim)
+#endif /* LOG_GET_TIM_ENTER */
+
+#ifndef LOG_GET_TIM_LEAVE
+#define LOG_GET_TIM_LEAVE(ercd, systim)
+#endif /* LOG_GET_TIM_LEAVE */
+
+#ifndef LOG_GET_UTM_ENTER
+#define LOG_GET_UTM_ENTER(p_sysutm)
+#endif /* LOG_GET_UTM_ENTER */
+
+#ifndef LOG_GET_UTM_LEAVE
+#define LOG_GET_UTM_LEAVE(ercd, sysutm)
+#endif /* LOG_GET_UTM_LEAVE */
+
+/*
+ *  ã·ã¹ãã æå»ã®åç
+§
+ */
+#ifdef TOPPERS_get_tim
+
+ER
+get_tim(SYSTIM *p_systim)
+{
+	ER		ercd;
+
+	LOG_GET_TIM_ENTER(p_systim);
+	CHECK_TSKCTX_UNL();
+
+	t_lock_cpu();
+	*p_systim = current_time;
+	ercd = E_OK;
+	t_unlock_cpu();
+
+  error_exit:
+	LOG_GET_TIM_LEAVE(ercd, *p_systim);
+	return(ercd);
+}
+
+#endif /* TOPPERS_get_tim */
+
+/*
+ *  æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ã®åç
+§
+ */
+#ifdef TOPPERS_get_utm
+#ifdef TOPPERS_SUPPORT_GET_UTM
+#ifndef OMIT_GET_UTM
+#include "target_timer.h"
+
+ER
+get_utm(SYSUTM *p_sysutm)
+{
+	SYSUTM	utime;
+	SYSTIM	time;
+#if TIC_DENO != 1
+	uint_t	subtime;
+#endif /* TIC_DENO != 1 */
+	CLOCK	clock1, clock2;
+	bool_t	ireq;
+	SIL_PRE_LOC;
+
+	LOG_GET_UTM_ENTER(p_sysutm);
+
+	SIL_LOC_INT();
+	time = next_time;
+#if TIC_DENO != 1
+	subtime = next_subtime;
+#endif /* TIC_DENO != 1 */
+	clock1 = target_timer_get_current();
+	ireq = target_timer_probe_int();
+	clock2 = target_timer_get_current();
+	SIL_UNL_INT();
+
+	utime = ((SYSUTM) time) * 1000U;
+#if TIC_DENO != 1
+	utime += subtime * 1000U / TIC_DENO;
+#endif /* TIC_DENO != 1 */
+
+	if (!ireq || clock1 > clock2) {
+		utime -= TIC_NUME * 1000U / TIC_DENO;
+	}
+	utime += TO_USEC(clock1);
+	*p_sysutm = utime;
+
+	LOG_GET_UTM_LEAVE(E_OK, *p_sysutm);
+	return(E_OK);
+}
+
+#endif /* OMIT_GET_UTM */
+#endif /* TOPPERS_SUPPORT_GET_UTM */
+#endif /* TOPPERS_get_utm */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/wait.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/wait.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/wait.c	(revision 136)
@@ -0,0 +1,247 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: wait.c 2587 2014-01-02 01:54:03Z ertl-hiro $
+ */
+
+/*
+ *		å¾
+ã¡ç¶æ
+ç®¡çã¢ã¸ã¥ã¼ã«
+ */
+
+#include "kernel_impl.h"
+#include "wait.h"
+
+/*
+ *  å¾
+ã¡ç¶æ
+ã¸ã®é·ç§»ï¼ã¿ã¤ã ã¢ã¦ãæå®ï¼
+ */
+#ifdef TOPPERS_waimake
+
+void
+make_wait_tmout(WINFO *p_winfo, TMEVTB *p_tmevtb, TMO tmout)
+{
+	(void) make_non_runnable(p_runtsk);
+	p_runtsk->p_winfo = p_winfo;
+	if (tmout > 0) {
+		p_winfo->p_tmevtb = p_tmevtb;
+		tmevtb_enqueue(p_tmevtb, (RELTIM) tmout,
+						(CBACK) wait_tmout, (void *) p_runtsk);
+	}
+	else {
+		assert(tmout == TMO_FEVR);
+		p_winfo->p_tmevtb = NULL;
+	}
+}
+
+#endif /* TOPPERS_waimake */
+
+/*
+ *  å¾
+ã¡è§£é¤
+ */
+#ifdef TOPPERS_waicmp
+
+bool_t
+wait_complete(TCB *p_tcb)
+{
+	wait_dequeue_tmevtb(p_tcb);
+	p_tcb->p_winfo->wercd = E_OK;
+	return(make_non_wait(p_tcb));
+}
+
+#endif /* TOPPERS_waicmp */
+
+/*
+ *  ã¿ã¤ã ã¢ã¦ãã«ä¼´ãå¾
+ã¡è§£é¤
+ */
+#ifdef TOPPERS_waitmo
+
+void
+wait_tmout(TCB *p_tcb)
+{
+	wait_dequeue_wobj(p_tcb);
+	p_tcb->p_winfo->wercd = E_TMOUT;
+	if (make_non_wait(p_tcb)) {
+		reqflg = true;
+	}
+
+	/*
+	 *  ããã§åªå
+åº¦ã®é«ãå²è¾¼ã¿ãåãä»ããï¼
+	 */
+	i_unlock_cpu();
+	i_lock_cpu();
+}
+
+#endif /* TOPPERS_waitmo */
+#ifdef TOPPERS_waitmook
+
+void
+wait_tmout_ok(TCB *p_tcb)
+{
+	p_tcb->p_winfo->wercd = E_OK;
+	if (make_non_wait(p_tcb)) {
+		reqflg = true;
+	}
+
+	/*
+	 *  ããã§åªå
+åº¦ã®é«ãå²è¾¼ã¿ãåãä»ããï¼
+	 */
+	i_unlock_cpu();
+	i_lock_cpu();
+}
+
+#endif /* TOPPERS_waitmook */
+
+/*
+ *  å¾
+ã¡ç¶æ
+ã®å¼·å¶è§£é¤
+ */
+#ifdef TOPPERS_wairel
+
+bool_t
+wait_release(TCB *p_tcb)
+{
+	wait_dequeue_wobj(p_tcb);
+	wait_dequeue_tmevtb(p_tcb);
+	p_tcb->p_winfo->wercd = E_RLWAI;
+	return(make_non_wait(p_tcb));
+}
+
+#endif /* TOPPERS_wairel */
+
+/*
+ *  å®è¡ä¸­ã®ã¿ã¹ã¯ã®åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡ã­ã¥ã¼ã¸ã®æ¿å
+¥
+ *
+ *  å®è¡ä¸­ã®ã¿ã¹ã¯ãï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡ã­ã¥ã¼ã¸æ¿å
+¥ããï¼ãª
+ *  ãã¸ã§ã¯ãã®å±æ§ã«å¿ãã¦ï¼FIFOé ã¾ãã¯ã¿ã¹ã¯åªå
+åº¦é ã§æ¿å
+¥ããï¼
+ */
+Inline void
+wobj_queue_insert(WOBJCB *p_wobjcb)
+{
+	if ((p_wobjcb->p_wobjinib->wobjatr & TA_TPRI) != 0U) {
+		queue_insert_tpri(&(p_wobjcb->wait_queue), p_runtsk);
+	}
+	else {
+		queue_insert_prev(&(p_wobjcb->wait_queue), &(p_runtsk->task_queue));
+	}
+}
+
+/*
+ *  åæã»éä¿¡ãªãã¸ã§ã¯ãã«å¯¾ããå¾
+ã¡ç¶æ
+ã¸ã®é·ç§»
+ */
+#ifdef TOPPERS_wobjwai
+
+void
+wobj_make_wait(WOBJCB *p_wobjcb, WINFO_WOBJ *p_winfo_wobj)
+{
+	make_wait(&(p_winfo_wobj->winfo));
+	wobj_queue_insert(p_wobjcb);
+	p_winfo_wobj->p_wobjcb = p_wobjcb;
+	LOG_TSKSTAT(p_runtsk);
+}
+
+#endif /* TOPPERS_wobjwai */
+#ifdef TOPPERS_wobjwaitmo
+
+void
+wobj_make_wait_tmout(WOBJCB *p_wobjcb, WINFO_WOBJ *p_winfo_wobj,
+								TMEVTB *p_tmevtb, TMO tmout)
+{
+	make_wait_tmout(&(p_winfo_wobj->winfo), p_tmevtb, tmout);
+	wobj_queue_insert(p_wobjcb);
+	p_winfo_wobj->p_wobjcb = p_wobjcb;
+	LOG_TSKSTAT(p_runtsk);
+}
+
+#endif /* TOPPERS_wobjwaitmo */
+
+/*
+ *  å¾
+ã¡ã­ã¥ã¼ã®åæå
+ */
+#ifdef TOPPERS_iniwque
+
+bool_t
+init_wait_queue(QUEUE *p_wait_queue)
+{
+	TCB		*p_tcb;
+	bool_t	dspreq = false;
+
+	while (!queue_empty(p_wait_queue)) {
+		p_tcb = (TCB *) queue_delete_next(p_wait_queue);
+		wait_dequeue_tmevtb(p_tcb);
+		p_tcb->p_winfo->wercd = E_DLT;
+		if (make_non_wait(p_tcb)) {
+			dspreq = true;
+		}
+	}
+	return(dspreq);
+}
+
+#endif /* TOPPERS_iniwque */
Index: rtos_arduino/trunk/asp_1.9.2/kernel/wait.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/kernel/wait.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/kernel/wait.h	(revision 136)
@@ -0,0 +1,412 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: wait.h 2128 2011-06-26 01:21:05Z ertl-hiro $
+ */
+
+/*
+ *		å¾
+ã¡ç¶æ
+ç®¡çã¢ã¸ã¥ã¼ã«
+ */
+
+#ifndef TOPPERS_WAIT_H
+#define TOPPERS_WAIT_H
+
+#include "task.h"
+#include "time_event.h"
+
+/*
+ *  ã¿ã¹ã¯ã®åªå
+åº¦é ã®å¾
+ã¡ã­ã¥ã¼ã¸ã®æ¿å
+¥
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ãï¼ã¿ã¹ã¯åªå
+åº¦é ã®ã­ã¥ã¼p_queueã«æ¿å
+¥ããï¼
+ *  ã­ã¥ã¼ã®ä¸­ã«åãåªå
+åº¦ã®ã¿ã¹ã¯ãããå ´åã«ã¯ï¼ãã®æå¾ã«æ¿å
+¥ããï¼
+ */
+Inline void
+queue_insert_tpri(QUEUE *p_queue, TCB *p_tcb)
+{
+	QUEUE	*p_entry;
+	uint_t	pri = p_tcb->priority;
+
+	for (p_entry = p_queue->p_next; p_entry != p_queue;
+										p_entry = p_entry->p_next) {
+		if (pri < ((TCB *) p_entry)->priority) {
+			break;
+		}
+	}
+	queue_insert_prev(p_entry, &(p_tcb->task_queue));
+}
+
+/*
+ *  å¾
+ã¡ç¶æ
+ã¸ã®é·ç§»
+ *
+ *  å®è¡ä¸­ã®ã¿ã¹ã¯ãå¾
+ã¡ç¶æ
+ã«é·ç§»ãããï¼å
+·ä½çã«ã¯ï¼å®è¡ä¸­ã®ã¿ã¹ã¯ã
+ *  ã¬ãã£ã­ã¥ã¼ããåé¤ãï¼TCBã®p_winfoãã£ã¼ã«ãï¼WINFOã®p_tmevtbãã£ã¼
+ *  ã«ããè¨­å®ããï¼
+ */
+Inline void
+make_wait(WINFO *p_winfo)
+{
+	(void) make_non_runnable(p_runtsk);
+	p_runtsk->p_winfo = p_winfo;
+	p_winfo->p_tmevtb = NULL;
+}
+
+/*
+ *  å¾
+ã¡ç¶æ
+ã¸ã®é·ç§»ï¼ã¿ã¤ã ã¢ã¦ãæå®ï¼
+ *
+ *  å®è¡ä¸­ã®ã¿ã¹ã¯ãï¼ã¿ã¤ã ã¢ã¦ãæå®ä»ãã§å¾
+ã¡ç¶æ
+ã«é·ç§»ãããï¼å
+·ä½
+ *  çã«ã¯ï¼å®è¡ä¸­ã®ã¿ã¹ã¯ãã¬ãã£ã­ã¥ã¼ããåé¤ãï¼TCBã®p_winfoãã£ã¼
+ *  ã«ãï¼WINFOã®p_tmevtbãã£ã¼ã«ããè¨­å®ããï¼ã¾ãï¼ã¿ã¤ã ã¤ãã³ãã
+ *  ã­ãã¯ãç»é²ããï¼
+ */
+extern void	make_wait_tmout(WINFO *p_winfo, TMEVTB *p_tmevtb, TMO tmout);
+
+/*
+ *  å¾
+ã¡è§£é¤ã®ããã®ã¿ã¹ã¯ç¶æ
+ã®æ´æ°
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ãï¼å¾
+ã¡è§£é¤ããããã¿ã¹ã¯ç¶æ
+ãæ´æ°ããï¼
+ *  å¾
+ã¡è§£é¤ããã¿ã¹ã¯ãå®è¡ã§ããç¶æ
+ã«ãªãå ´åã¯ï¼ã¬ãã£ã­ã¥ã¼ã«ã¤ãª
+ *  ãï¼ã¾ãï¼ãã£ã¹ããããå¿
+è¦ãªå ´åã«ã¯trueãè¿ãï¼
+ */
+Inline bool_t
+make_non_wait(TCB *p_tcb)
+{
+	assert(TSTAT_WAITING(p_tcb->tstat));
+
+	if (!TSTAT_SUSPENDED(p_tcb->tstat)) {
+		/*
+		 *  å¾
+ã¡ç¶æ
+ããå®è¡ã§ããç¶æ
+ã¸ã®é·ç§»
+		 */
+		p_tcb->tstat = TS_RUNNABLE;
+		LOG_TSKSTAT(p_tcb);
+		return(make_runnable(p_tcb));
+	}
+	else {
+		/*
+		 *  äºéå¾
+ã¡ç¶æ
+ããå¼·å¶å¾
+ã¡ç¶æ
+ã¸ã®é·ç§»
+		 */
+		p_tcb->tstat = TS_SUSPENDED;
+		LOG_TSKSTAT(p_tcb);
+		return(false);
+	}
+}
+
+/*
+ *  ãªãã¸ã§ã¯ãå¾
+ã¡ã­ã¥ã¼ããã®åé¤
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ãï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡ã­ã¥ã¼ã«ã¤
+ *  ãªããã¦ããã°ï¼å¾
+ã¡ã­ã¥ã¼ããåé¤ããï¼
+ */
+Inline void
+wait_dequeue_wobj(TCB *p_tcb)
+{
+	if (TSTAT_WAIT_WOBJ(p_tcb->tstat)) {
+		queue_delete(&(p_tcb->task_queue));
+	}
+}
+
+/*
+ *  æéå¾
+ã¡ã®ããã®ã¿ã¤ã ã¤ãã³ããã­ãã¯ã®ç»é²è§£é¤
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ã«å¯¾ãã¦ï¼æéå¾
+ã¡ã®ããã®ã¿ã¤ã ã¤ãã³ãã
+ *  ã­ãã¯ãç»é²ããã¦ããã°ï¼ãããç»é²è§£é¤ããï¼
+ */
+Inline void
+wait_dequeue_tmevtb(TCB *p_tcb)
+{
+	if (p_tcb->p_winfo->p_tmevtb != NULL) {
+		tmevtb_dequeue(p_tcb->p_winfo->p_tmevtb);
+	}
+}
+
+/*
+ *  å¾
+ã¡è§£é¤
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ã®å¾
+ã¡ç¶æ
+ãè§£é¤ããï¼å
+·ä½çã«ã¯ï¼ã¿ã¤ã ã¤
+ *  ãã³ããã­ãã¯ãç»é²ããã¦ããã°ï¼ãããç»é²è§£é¤ããï¼ã¾ãï¼ã¿ã¹ã¯
+ *  ç¶æ
+ãæ´æ°ãï¼å¾
+ã¡è§£é¤ããã¿ã¹ã¯ããã®è¿å¤ãE_OKã¨ããï¼å¾
+ã¡ã­ã¥ã¼
+ *  ããã®åé¤ã¯è¡ããªãï¼å¾
+ã¡è§£é¤ããã¿ã¹ã¯ã¸ã®ãã£ã¹ããããå¿
+è¦ãªå ´
+ *  åã«ã¯trueãè¿ãï¼
+ */
+extern bool_t	wait_complete(TCB *p_tcb);
+
+/*
+ *  ã¿ã¤ã ã¢ã¦ãã«ä¼´ãå¾
+ã¡è§£é¤
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ãï¼å¾
+ã¡ã­ã¥ã¼ã«ã¤ãªããã¦ããã°å¾
+ã¡ã­ã¥ã¼
+ *  ããåé¤ãï¼ã¿ã¹ã¯ç¶æ
+ãæ´æ°ããï¼ã¾ãï¼å¾
+ã¡è§£é¤ããã¿ã¹ã¯ããã®è¿
+ *  å¤ãï¼wait_tmoutã§ã¯E_TMOUTï¼wait_tmout_okã§ã¯E_OKã¨ããï¼å¾
+ã¡è§£é¤
+ *  ããã¿ã¹ã¯ã¸ã®ãã£ã¹ããããå¿
+è¦ãªæã¯ï¼reqflgãtrueã«ããï¼
+ *
+ *  wait_tmout_okã¯ï¼dly_tskã§ä½¿ãããã®ãã®ã§ï¼å¾
+ã¡ã­ã¥ã¼ããåé¤ãã
+ *  å¦çãè¡ããªãï¼
+ *
+ *  ãããã®é¢æ°ãï¼ã¿ã¤ã ã¤ãã³ãã®ã³ã¼ã«ããã¯é¢æ°ã¨ãã¦ç¨ããããã®
+ *  ãã®ã§ï¼å²è¾¼ã¿ãã³ãã©ããå¼ã³åºããããã¨ãæ³å®ãã¦ããï¼
+ */
+extern void	wait_tmout(TCB *p_tcb);
+extern void	wait_tmout_ok(TCB *p_tcb);
+
+/*
+ *  å¾
+ã¡ç¶æ
+ã®å¼·å¶è§£é¤
+ *
+ *  p_tcbã§æå®ãããã¿ã¹ã¯ã®å¾
+ã¡ç¶æ
+ãå¼·å¶çã«è§£é¤ããï¼å
+·ä½çã«ã¯ï¼
+ *  ã¿ã¹ã¯ãå¾
+ã¡ã­ã¥ã¼ã«ã¤ãªããã¦ããã°å¾
+ã¡ã­ã¥ã¼ããåé¤ãï¼ã¿ã¤ã ã¤
+ *  ãã³ããã­ãã¯ãç»é²ããã¦ããã°ãããç»é²è§£é¤ããï¼ã¾ãï¼ã¿ã¹ã¯ã®
+ *  ç¶æ
+ãæ´æ°ãï¼å¾
+ã¡è§£é¤ããã¿ã¹ã¯ããã®è¿å¤ãE_RLWAIã¨ããï¼ã¾ãï¼
+ *  å¾
+ã¡è§£é¤ããã¿ã¹ã¯ã¸ã®ãã£ã¹ããããå¿
+è¦ãªå ´åã«ã¯trueãè¿ãï¼
+ */
+extern bool_t	wait_release(TCB *p_tcb);
+
+/*
+ *  å¾
+ã¡ã­ã¥ã¼ã®å
+é ­ã®ã¿ã¹ã¯ID
+ *
+ *  p_wait_queueã§æå®ããå¾
+ã¡ã­ã¥ã¼ã®å
+é ­ã®ã¿ã¹ã¯IDãè¿ãï¼å¾
+ã¡ã­ã¥ã¼
+ *  ãç©ºã®å ´åã«ã¯ï¼TSK_NONEãè¿ãï¼
+ */
+Inline ID
+wait_tskid(QUEUE *p_wait_queue)
+{
+	if (!queue_empty(p_wait_queue)) {
+		return(TSKID((TCB *) p_wait_queue->p_next));
+	}
+	else {
+		return(TSK_NONE);
+	}
+}
+
+/*
+ *  åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã®å
+±éé¨åæä½ã«ã¼ãã³
+ *
+ *  åæã»éä¿¡ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã¨ç®¡çãã­ãã¯ã®å
+é ­é¨åã¯å
+±
+ *  éã«ãªã£ã¦ããï¼ä»¥ä¸ã¯ï¼ãã®å
+±éé¨åãæ±ãããã®åããã³ã«ã¼ãã³ç¾¤
+ *  ã§ããï¼
+ *
+ *  è¤æ°ã®å¾
+ã¡ã­ã¥ã¼ãæã¤åæã»éä¿¡ãªãã¸ã§ã¯ãã®å ´åï¼å
+é ­ä»¥å¤ã®å¾
+ã¡
+ *  ã­ã¥ã¼ãæä½ããå ´åã«ã¯ï¼ãããã®ã«ã¼ãã³ã¯ä½¿ããªãï¼ã¾ãï¼ãªãã¸ã§
+ *  ã¯ãå±æ§ã®TA_TPRIããããåç
+§ããã®ã§ï¼ãã®ããããä»ã®ç®çã«ä½¿ã£ã¦
+ *  ããå ´åãï¼ãããã®ã«ã¼ãã³ã¯ä½¿ããªãï¼
+ */
+
+/*
+ *  åæã»éä¿¡ãªãã¸ã§ã¯ãã®åæåãã­ãã¯ã®å
+±éé¨å
+ */
+typedef struct wait_object_initialization_block {
+	ATR			wobjatr;		/* ãªãã¸ã§ã¯ãå±æ§ */
+} WOBJINIB;
+
+/*
+ *  åæã»éä¿¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ã®å
+±éé¨å
+ */
+typedef struct wait_object_control_block {
+	QUEUE		wait_queue;		/* å¾
+ã¡ã­ã¥ã¼ */
+	const WOBJINIB *p_wobjinib;	/* åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ */
+} WOBJCB;
+
+/*
+ *  åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡æ
+å ±ãã­ãã¯ã®å
+±éé¨å
+ *
+ *  ãã®æ§é ä½ã¯ï¼å¾
+ã¡æ
+å ±ãã­ãã¯ï¼WINFOï¼ãæ¡å¼µï¼ãªãã¸ã§ã¯ãæåè¨
+ *  èªã®ç¶æ¿ã«ç¸å½ï¼ãããã®ã§ãããï¼WINFOãå
+±ç¨ä½ã§å®ç¾©ããã¦ããã
+ *  ãã«ï¼1ã¤ã®ãã£ã¼ã«ãã¨ãã¦å«ãã¦ããï¼
+ */
+typedef struct wait_object_waiting_information {
+	WINFO	winfo;			/* æ¨æºã®å¾
+ã¡æ
+å ±ãã­ãã¯ */
+	WOBJCB	*p_wobjcb;		/* å¾
+ã¡ãªãã¸ã§ã¯ãã®ç®¡çãã­ãã¯ */
+} WINFO_WOBJ;
+
+/*
+ *  åæã»éä¿¡ãªãã¸ã§ã¯ãã«å¯¾ããå¾
+ã¡ç¶æ
+ã¸ã®é·ç§»
+ *  
+ *  å®è¡ä¸­ã®ã¿ã¹ã¯ãå¾
+ã¡ç¶æ
+ã«é·ç§»ããï¼åæã»éä¿¡ãªãã¸ã§ã¯ãã®å¾
+ã¡ã­ã¥ã¼
+ *  ã«ã¤ãªãï¼ã¾ãï¼å¾
+ã¡æ
+å ±ãã­ãã¯ï¼WINFOï¼ã®p_wobjcbãè¨­å®ããï¼
+ *  wobj_make_wait_tmoutã¯ï¼ã¿ã¤ã ã¤ãã³ããã­ãã¯ã®ç»é²ãè¡ãï¼
+ */
+extern void	wobj_make_wait(WOBJCB *p_wobjcb, WINFO_WOBJ *p_winfo);
+extern void	wobj_make_wait_tmout(WOBJCB *p_wobjcb, WINFO_WOBJ *p_winfo,
+											TMEVTB *p_tmevtb, TMO tmout);
+
+/*
+ *  ã¿ã¹ã¯åªå
+åº¦å¤æ´æã®å¦ç
+ *
+ *  åæã»éä¿¡ãªãã¸ã§ã¯ãã«å¯¾ããå¾
+ã¡ç¶æ
+ã«ããã¿ã¹ã¯ã®åªå
+åº¦ãå¤æ´ã
+ *  ããå ´åã«ï¼å¾
+ã¡ã­ã¥ã¼ã®ä¸­ã§ã®ã¿ã¹ã¯ã®ä½ç½®ãä¿®æ­£ããï¼
+ */
+Inline void
+wobj_change_priority(WOBJCB *p_wobjcb, TCB *p_tcb)
+{
+	if ((p_wobjcb->p_wobjinib->wobjatr & TA_TPRI) != 0U) {
+		queue_delete(&(p_tcb->task_queue));
+		queue_insert_tpri(&(p_wobjcb->wait_queue), p_tcb);
+	}
+}
+
+/*
+ *  å¾
+ã¡ã­ã¥ã¼ã®åæå
+ *
+ *  å¾
+ã¡ã­ã¥ã¼ã«ã¤ãªããã¦ããã¿ã¹ã¯ããã¹ã¦å¾
+ã¡è§£é¤ããï¼å¾
+ã¡è§£é¤ãã
+ *  ã¿ã¹ã¯ããã®è¿å¤ã¯ï¼E_DLTã¨ããï¼å¾
+ã¡è§£é¤ããã¿ã¹ã¯ã¸ã®ãã£ã¹ããã
+ *  ãå¿
+è¦ãªå ´åã¯trueï¼ããã§ãªãå ´åã¯falseãè¿ãï¼
+ */
+extern bool_t	init_wait_queue(QUEUE *p_wait_queue);
+
+#endif /* TOPPERS_WAIT_H */
Index: rtos_arduino/trunk/asp_1.9.2/library/histogram.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/library/histogram.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/library/histogram.c	(revision 136)
@@ -0,0 +1,205 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: histogram.c 2673 2015-02-08 10:08:03Z ertl-hiro $
+ */
+
+/*
+ *		å®è¡æéåå¸éè¨ã¢ã¸ã¥ã¼ã«
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <test_lib.h>
+#include <histogram.h>
+#include "target_test.h"
+
+/*
+ *  å®è¡æéåå¸è¨æ¸¬ã®æ°
+ */
+#ifndef TNUM_HIST
+#define TNUM_HIST		10
+#endif /* TNUM_HIST */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­é¨ã§è¨­å®å¤æ´ããããã®ãã¯ã­
+ */
+#ifndef HISTTIM						/* å®è¡æéè¨æ¸¬ç¨ã®æå»ã®ãã¼ã¿å */
+#define HISTTIM			SYSUTM
+#endif /* HISTTIM */
+
+#ifndef HIST_GET_TIM				/* å®è¡æéè¨æ¸¬ç¨ã®ç¾å¨æå»ã®åå¾ */
+#ifndef TOPPERS_SUPPORT_GET_UTM
+#error get_utm is not supported.
+#endif /* TOPPERS_SUPPORT_GET_UTM */
+#define HIST_GET_TIM(p_time)	((void) get_utm(p_time))
+#endif /* HIST_GET_TIM */
+
+#ifndef HIST_CONV_TIM				/* æå»ã®å·®ããå®è¡æéã¸ã®å¤æ */
+#define HIST_CONV_TIM(time)		((uint_t)(time))
+#endif /* HIST_CONV_TIM */
+
+#ifndef HIST_BM_HOOK				/* å®è¡æéè¨æ¸¬ç´åã«è¡ãã¹ãå¦ç */
+#define HIST_BM_HOOK()			((void) 0)
+#endif
+
+/*
+ *  å®è¡æéåå¸è¨æ¸¬ç®¡çãã­ãã¯
+ */
+typedef struct histogram_control_block {
+	HISTTIM		begin_time;			/* è¨æ¸¬éå§æå» */
+	uint_t		maxval;				/* åå¸ãè¨é²ããæå¤§æé */
+	uint_t		*histarea;			/* åå¸ãè¨é²ããã¡ã¢ãªé å */
+	uint_t		over;				/* æå¤§æéãè¶
+ããåº¦æ° */
+	uint_t		under;				/* æéã®éè»¢ãçãããåº¦æ° */
+} HISTCB;
+
+/*
+ *  å®è¡æéåå¸è¨æ¸¬ç®¡çãã­ãã¯ã®ã¨ãªã¢
+ */
+static HISTCB	histcb_table[TNUM_HIST];
+
+/*
+ *  å®è¡æéåå¸è¨æ¸¬IDã®æå°å¤ã¨æå¤§å¤
+ */
+#define TMIN_HISTID		1
+#define TMAX_HISTID		(TMIN_HISTID + TNUM_HIST - 1)
+
+/*
+ *  å®è¡æéåå¸è¨æ¸¬ã®åæå
+ */
+void
+init_hist(ID histid, uint_t maxval, uint_t histarea[])
+{
+	HISTCB	*p_histcb;
+	uint_t	i;
+
+	assert(TMIN_HISTID <= histid && histid <= TMAX_HISTID);
+	p_histcb = &(histcb_table[histid - TMIN_HISTID]);
+
+	for (i = 0; i <= maxval; i++) {
+		histarea[i] = 0U;
+	}
+	p_histcb->maxval = maxval;
+	p_histcb->histarea = histarea;
+	p_histcb->over = 0U;
+	p_histcb->under = 0U;
+}
+
+/*
+ *  å®è¡æéè¨æ¸¬ã®éå§
+ */
+void
+begin_measure(ID histid)
+{
+	HISTCB	*p_histcb;
+
+	assert(TMIN_HISTID <= histid && histid <= TMAX_HISTID);
+	p_histcb = &(histcb_table[histid - TMIN_HISTID]);
+
+	HIST_BM_HOOK();
+	HIST_GET_TIM(&(p_histcb->begin_time));
+}
+
+/*
+ *  å®è¡æéè¨æ¸¬ã®çµäº
+ */
+void
+end_measure(ID histid)
+{
+	HISTCB	*p_histcb;
+	HISTTIM	end_time;
+	uint_t	val;
+
+	HIST_GET_TIM(&end_time);
+
+	assert(TMIN_HISTID <= histid && histid <= TMAX_HISTID);
+	p_histcb = &(histcb_table[histid - TMIN_HISTID]);
+
+	val = HIST_CONV_TIM(end_time - p_histcb->begin_time);
+	if (val <= p_histcb->maxval) {
+		p_histcb->histarea[val]++;
+	}
+	else if (val <= ((uint_t) INT_MAX)) {
+		p_histcb->over++;
+	}
+	else {
+		p_histcb->under++;
+	}
+}
+
+/*
+ *  å®è¡æéåå¸è¨æ¸¬ã®è¡¨ç¤º
+ */
+void
+print_hist(ID histid)
+{
+	HISTCB	*p_histcb;
+	uint_t	i;
+
+	assert(TMIN_HISTID <= histid && histid <= TMAX_HISTID);
+	p_histcb = &(histcb_table[histid - TMIN_HISTID]);
+
+	for (i = 0; i <= p_histcb->maxval; i++) {
+		if (p_histcb->histarea[i] > 0) {
+			syslog_2(LOG_NOTICE, "%d : %d", i, p_histcb->histarea[i]);
+			syslog_flush();
+		}
+	}
+	if (p_histcb->over > 0) {
+		syslog_2(LOG_NOTICE, "> %d : %d", p_histcb->maxval, p_histcb->over);
+	}
+	if (p_histcb->under > 0) {
+		syslog_1(LOG_NOTICE, "> INT_MAX : %d", p_histcb->under);
+	}
+	syslog_flush();
+}
Index: rtos_arduino/trunk/asp_1.9.2/library/log_output.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/library/log_output.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/library/log_output.c	(revision 136)
@@ -0,0 +1,218 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: log_output.c 2246 2011-08-26 22:39:15Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã­ã°ã®ãã©ã¼ãããåºå
+ */
+
+#include <t_stddef.h>
+#include <t_syslog.h>
+#include <log_output.h>
+
+/*
+ *  æ°å¤ãæå­åã«å¤æ
+ */
+#define CONVERT_BUFLEN	((sizeof(uintptr_t) * CHAR_BIT + 2) / 3)
+										/* uintptr_tåã®æ°å¤ã®æå¤§æå­æ° */
+static void
+convert(uintptr_t val, uint_t radix, const char *radchar,
+			uint_t width, bool_t minus, bool_t padzero, void (*putc)(char))
+{
+	char	buf[CONVERT_BUFLEN];
+	uint_t	i, j;
+
+	i = 0U;
+	do {
+		buf[i++] = radchar[val % radix];
+		val /= radix;
+	} while (i < CONVERT_BUFLEN && val != 0);
+
+	if (minus && width > 0) {
+		width -= 1;
+	}
+	if (minus && padzero) {
+		(*putc)('-');
+	}
+	for (j = i; j < width; j++) {
+		(*putc)(padzero ? '0' : ' ');
+	}
+	if (minus && !padzero) {
+		(*putc)('-');
+	}
+	while (i > 0U) {
+		(*putc)(buf[--i]);
+	}
+}
+
+/*
+ *  æå­åæ´å½¢åºå
+ */
+static const char raddec[] = "0123456789";
+static const char radhex[] = "0123456789abcdef";
+static const char radHEX[] = "0123456789ABCDEF";
+
+void
+syslog_printf(const char *format, const intptr_t *p_args, void (*putc)(char))
+{
+	char		c;
+	uint_t		width;
+	bool_t		padzero;
+	intptr_t	val;
+	const char	*str;
+
+	while ((c = *format++) != '\0') {
+		if (c != '%') {
+			(*putc)(c);
+			continue;
+		}
+
+		width = 0U;
+		padzero = false;
+		if ((c = *format++) == '0') {
+			padzero = true;
+			c = *format++;
+		}
+		while ('0' <= c && c <= '9') {
+			width = width * 10U + c - '0';
+			c = *format++;
+		}
+		if (c == 'l') {
+			c = *format++;
+		}
+		switch (c) {
+		case 'd':
+			val = (intptr_t)(*p_args++);
+			if (val >= 0) {
+				convert((uintptr_t) val, 10U, raddec,
+										width, false, padzero, putc);
+			}
+			else {
+				convert((uintptr_t)(-val), 10U, raddec,
+										width, true, padzero, putc);
+			}
+			break;
+		case 'u':
+			val = (intptr_t)(*p_args++);
+			convert((uintptr_t) val, 10U, raddec, width, false, padzero, putc);
+			break;
+		case 'x':
+		case 'p':
+			val = (intptr_t)(*p_args++);
+			convert((uintptr_t) val, 16U, radhex, width, false, padzero, putc);
+			break;
+		case 'X':
+			val = (intptr_t)(*p_args++);
+			convert((uintptr_t) val, 16U, radHEX, width, false, padzero, putc);
+			break;
+		case 'c':
+			(*putc)((char)(intptr_t)(*p_args++));
+			break;
+		case 's':
+			str = (const char *)(*p_args++);
+			while ((c = *str++) != '\0') {
+				(*putc)(c);
+			}
+			break;
+		case '%':
+			(*putc)('%');
+			break;
+		case '\0':
+			format--;
+			break;
+		default:
+			break;
+		}
+	}
+}
+
+/*
+ *  ã­ã°æ
+å ±ã®åºå
+ */
+void
+syslog_print(const SYSLOG *p_syslog, void (*putc)(char))
+{
+	switch (p_syslog->logtype) {
+	case LOG_TYPE_COMMENT:
+		syslog_printf((const char *)(p_syslog->loginfo[0]),
+								&(p_syslog->loginfo[1]), putc);
+		break;
+	case LOG_TYPE_ASSERT:
+		syslog_printf("%s:%u: Assertion `%s' failed.",
+								&(p_syslog->loginfo[0]), putc);
+		break;
+	default:
+		/*
+		 *  ä»ã®ç¨®å¥ã®ã­ã°æ
+å ±ã«ã¯å¯¾å¿ãã¦ããªãï¼
+		 */
+		break;
+	}
+}
+
+/*
+ *  ã­ã°æ
+å ±åªå¤±ã¡ãã»ã¼ã¸ã®åºå
+ */
+void
+syslog_lostmsg(uint_t lostlog, void (*putc)(char))
+{
+	intptr_t	lostinfo[1];
+
+	lostinfo[0] = (intptr_t) lostlog;
+	syslog_printf("%d messages are lost.", lostinfo, putc);
+	(*putc)('\n');
+}
Index: rtos_arduino/trunk/asp_1.9.2/library/strerror.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/library/strerror.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/library/strerror.c	(revision 136)
@@ -0,0 +1,125 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: strerror.c 1732 2010-02-03 03:15:52Z ertl-hiro $
+ */
+
+/*
+ *		ã¨ã©ã¼ã¡ãã»ã¼ã¸æå­åãè¿ãé¢æ°
+ */
+
+#include <t_stddef.h>
+#include <t_stdlib.h>
+
+const char *
+itron_strerror(ER ercd)
+{
+	switch (MERCD(ercd)) {
+	case E_OK:
+		return("E_OK");
+
+	case E_SYS:
+		return("E_SYS");
+	case E_NOSPT:
+		return("E_NOSPT");
+	case E_RSFN:
+		return("E_RSFN");
+	case E_RSATR:
+		return("E_RSATR");
+
+	case E_PAR:
+		return("E_PAR");
+	case E_ID:
+		return("E_ID");
+
+	case E_CTX:
+		return("E_CTX");
+	case E_MACV:
+		return("E_MACV");
+	case E_OACV:
+		return("E_OACV");
+	case E_ILUSE:
+		return("E_ILUSE");
+
+	case E_NOMEM:
+		return("E_NOMEM");
+	case E_NOID:
+		return("E_NOID");
+	case E_NORES:
+		return("E_NORES");
+
+	case E_OBJ:
+		return("E_OBJ");
+	case E_NOEXS:
+		return("E_NOEXS");
+	case E_QOVR:
+		return("E_QOVR");
+
+	case E_RLWAI:
+		return("E_RLWAI");
+	case E_TMOUT:
+		return("E_TMOUT");
+	case E_DLT:
+		return("E_DLT");
+	case E_CLS:
+		return("E_CLS");
+
+	case E_WBLK:
+		return("E_WBLK");
+	case E_BOVR:
+		return("E_BOVR");
+
+	default:
+		return("unknown error");
+	}
+}
Index: rtos_arduino/trunk/asp_1.9.2/library/t_perror.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/library/t_perror.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/library/t_perror.c	(revision 136)
@@ -0,0 +1,71 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2006 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: t_perror.c 264 2007-07-12 08:23:10Z hiro $
+ */
+
+/*
+ *		ã¨ã©ã¼ã¡ãã»ã¼ã¸ã®åºå
+ */
+
+#include <t_stddef.h>
+#include <t_syslog.h>
+#include <t_stdlib.h>
+
+void
+t_perror(uint_t prio, const char *file, int_t line, const char *expr, ER ercd)
+{
+	syslog_5(prio, "%s (%d) reported by `%s' in line %d of `%s'.",
+						itron_strerror(ercd), SERCD(ercd), expr, line, file);
+
+}
Index: rtos_arduino/trunk/asp_1.9.2/library/test_lib.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/library/test_lib.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/library/test_lib.c	(revision 136)
@@ -0,0 +1,223 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2005-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_lib.c 2673 2015-02-08 10:08:03Z ertl-hiro $
+ */
+
+/* 
+ *		ãã¹ããã­ã°ã©ã ç¨ã©ã¤ãã©ãª
+ */
+
+#include <kernel.h>
+#include <sil.h>
+#include <t_syslog.h>
+#include <t_stdlib.h>
+#include <log_output.h>
+#include "syssvc/syslog.h"
+#include "target_syssvc.h"
+#include <test_lib.h>
+
+/*
+ *	ãã§ãã¯ãã¤ã³ã
+ */
+static uint_t	check_count = 0u;
+
+/*
+ *	èªå·±è¨ºæ­é¢æ°
+ */
+static BIT_FUNC	check_bit_func = NULL;
+
+/*
+ *	èªå·±è¨ºæ­é¢æ°ã®è¨­å®
+ */
+void
+set_bit_func(BIT_FUNC bit_func)
+{
+	check_bit_func = bit_func;
+}
+
+/*
+ *  ãã¹ããã­ã°ã©ã ã®éå§
+ */
+void
+test_start(char *progname)
+{
+	syslog_1(LOG_NOTICE, "Test program: %s", progname);
+}
+
+/*
+ *  ã·ã¹ãã ã­ã°ã®åºåå¦ç
+ */
+void
+syslog_flush(void)
+{
+	SYSLOG	logbuf;
+	ER_UINT	rercd;
+
+	/*
+	 *  ã­ã°ãããã¡ã«è¨é²ãããã­ã°æ
+å ±ãï¼ä½ã¬ãã«åºåæ©è½ãç¨ãã¦åº
+	 *  åããï¼
+	 */
+	while ((rercd = syslog_rea_log(&logbuf)) >= 0) {
+		if (rercd > 0) {
+			syslog_lostmsg((uint_t) rercd, target_fput_log);
+		}
+		if (logbuf.logtype >= LOG_TYPE_COMMENT) {
+			syslog_print(&logbuf, target_fput_log);
+			target_fput_log('\n');
+		}
+	}
+}
+
+/*
+ *	ãã¹ããã­ã°ã©ã ã®çµäº
+ */
+void
+test_finish(void)
+{
+	SIL_PRE_LOC;
+
+	SIL_LOC_INT();
+	syslog_flush();
+	(void) ext_ker();
+
+	/* ããã¸æ¥ããã¨ã¯ãªãã¯ã */
+	SIL_UNL_INT();
+}
+
+/*
+ *	ãã§ãã¯ãã¤ã³ã
+ */
+void
+check_point(uint_t count)
+{
+	bool_t	errorflag = false;
+	ER		rercd;
+	SIL_PRE_LOC;
+
+	/*
+	 *  å²è¾¼ã¿ã­ãã¯ç¶æ
+ã«
+	 */
+	SIL_LOC_INT();
+
+	/*
+	 *  ã·ã¼ã±ã³ã¹ãã§ãã¯
+	 */
+	if (++check_count == count) {
+		syslog_1(LOG_NOTICE, "Check point %d passed.", count);
+	}
+	else {
+		syslog_1(LOG_ERROR, "## Unexpected check point %d.", count);
+		errorflag = true;
+	}
+
+	/*
+	 *  ã«ã¼ãã«ã®å
+é¨ç¶æ
+ã®æ¤æ»
+	 */
+	if (check_bit_func != NULL) {
+		rercd = (*check_bit_func)();
+		if (rercd < 0) {
+			syslog_2(LOG_ERROR, "## Internal inconsistency detected (%s, %d).",
+								itron_strerror(rercd), SERCD(rercd));
+			errorflag = true;
+		}
+	}
+
+	/*
+	 *  ã¨ã©ã¼ãæ¤åºãããå ´åã¯ï¼ãã¹ããã­ã°ã©ã ãçµäºããï¼
+	 */
+	if (errorflag) {
+		test_finish();
+	}
+
+	/*
+	 *  å²è¾¼ã¿ã­ãã¯ç¶æ
+ãè§£é¤
+	 */
+	SIL_UNL_INT();
+}
+
+/*
+ *	å®äºãã§ãã¯ãã¤ã³ã
+ */
+void
+check_finish(uint_t count)
+{
+	check_point(count);
+	syslog_0(LOG_NOTICE, "All check points passed.");
+	test_finish();
+}
+
+/*
+ *	æ¡ä»¶ãã§ãã¯ã®ã¨ã©ã¼å¦ç
+ */
+void
+_check_assert(const char *expr, const char *file, int_t line)
+{
+	syslog_3(LOG_ERROR, "## Assertion `%s' failed at %s:%u.",
+								expr, file, line);
+	test_finish();
+}
+
+/*
+ *	ã¨ã©ã¼ã³ã¼ããã§ãã¯ã®ã¨ã©ã¼å¦ç
+ */
+void
+_check_ercd(ER ercd, const char *file, int_t line)
+{
+	syslog_3(LOG_ERROR, "## Unexpected error %s detected at %s:%u.",
+								itron_strerror(ercd), file, line);
+	test_finish();
+}
Index: rtos_arduino/trunk/asp_1.9.2/library/vasyslog.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/library/vasyslog.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/library/vasyslog.c	(revision 136)
@@ -0,0 +1,126 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: vasyslog.c 2422 2012-11-11 07:26:42Z ertl-hiro $
+ */
+
+/*
+ *		å¯å¤æ°å¼æ°ã®ã·ã¹ãã ã­ã°ã©ã¤ãã©ãª
+ */
+
+#include <t_stddef.h>
+#include <t_syslog.h>
+#include <stdarg.h>
+
+#ifndef TOPPERS_OMIT_SYSLOG
+
+void
+syslog(uint_t prio, const char *format, ...)
+{
+	SYSLOG	logbuf;
+	va_list	ap;
+	uint_t	i;
+	char	c;
+	bool_t	lflag;
+
+	logbuf.logtype = LOG_TYPE_COMMENT;
+	logbuf.loginfo[0] = (intptr_t) format;
+	i = 1U;
+	va_start(ap, format);
+
+	while ((c = *format++) != '\0' && i < TMAX_LOGINFO) {
+		if (c != '%') {
+			continue;
+		}
+
+		lflag = false;
+		c = *format++;
+		while ('0' <= c && c <= '9') {
+			c = *format++;
+		}
+		if (c == 'l') {
+			lflag = true;
+			c = *format++;
+		}
+		switch (c) {
+		case 'd':
+			logbuf.loginfo[i++] = lflag ? (intptr_t) va_arg(ap, long_t)
+										: (intptr_t) va_arg(ap, int_t);
+			break;
+		case 'u':
+		case 'x':
+		case 'X':
+			logbuf.loginfo[i++] = lflag ? (intptr_t) va_arg(ap, ulong_t)
+										: (intptr_t) va_arg(ap, uint_t);
+			break;
+		case 'p':
+			logbuf.loginfo[i++] = (intptr_t) va_arg(ap, void *);
+			break;
+		case 'c':
+			logbuf.loginfo[i++] = (intptr_t) va_arg(ap, int);
+			break;
+		case 's':
+			logbuf.loginfo[i++] = (intptr_t) va_arg(ap, const char *);
+			break;
+		case '\0':
+			format--;
+			break;
+		default:
+			break;
+		}
+	}
+	va_end(ap);
+	(void) syslog_wri_log(prio, &logbuf);
+}
+
+#endif /* TOPPERS_OMIT_SYSLOG */
Index: rtos_arduino/trunk/asp_1.9.2/pdic/upd72001/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/pdic/upd72001/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/pdic/upd72001/MANIFEST	(revision 136)
@@ -0,0 +1,5 @@
+PACKAGE asp
+
+MANIFEST
+upd72001.c
+upd72001.h
Index: rtos_arduino/trunk/asp_1.9.2/pdic/upd72001/upd72001.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/pdic/upd72001/upd72001.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/pdic/upd72001/upd72001.c	(revision 136)
@@ -0,0 +1,472 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2006-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: upd72001.c 2254 2011-10-07 08:28:12Z ertl-hiro $
+ */
+
+/*
+ *		Î¼PD72001ç¨ ç°¡æSIOãã©ã¤ã
+ */
+
+#include <sil.h>
+#include "target_syssvc.h"
+#include "upd72001.h"
+
+/*
+ *  ããã¤ã¹ã¬ã¸ã¹ã¿ã®ã¢ã¯ã»ã¹ééæéï¼nsecåä½ï¼
+ *
+ *  200ã¨ããå¤ã«ãã¾ãæ ¹æ ã¯ãªãï¼
+ */
+#define	UPD72001_DELAY	200U
+
+/*
+ *  Î¼PD72001ã®ã¬ã¸ã¹ã¿ã®çªå·
+ */
+#define	UPD72001_CR0	0x00U		/* ã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿ */
+#define	UPD72001_CR1	0x01U
+#define	UPD72001_CR2	0x02U
+#define	UPD72001_CR3	0x03U
+#define	UPD72001_CR4	0x04U
+#define	UPD72001_CR5	0x05U
+#define	UPD72001_CR10	0x0aU
+#define	UPD72001_CR12	0x0cU
+#define	UPD72001_CR14	0x0eU
+#define	UPD72001_CR15	0x0fU
+
+#define	UPD72001_SR0	0x00U		/* ã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿ */
+
+/*
+ *  ã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿ã®è¨­å®å¤
+ */
+#define CR_RESET	0x18U		/* ãã¼ããªã»ããã³ãã³ã */
+
+#define CR0_EOI		0x38U		/* EOIï¼End of Interruptï¼*/
+
+#define CR1_DOWN	0x00U		/* å
+¨å²è¾¼ã¿ãç¦æ­¢ */
+#define CR1_RECV	0x10U		/* åä¿¡å²è¾¼ã¿è¨±å¯ããã */
+#define CR1_SEND	0x02U		/* éä¿¡å²è¾¼ã¿è¨±å¯ããã */
+
+#define CR3_DEF		0xc1U		/* ãã¼ã¿ 8bitï¼åä¿¡ã¤ãã¼ãã« */
+#define CR4_DEF		0x44U		/* ã¹ãããããã 1bitï¼ããªãã£ãªã */
+#define CR5_DEF		0xeaU		/* ãã¼ã¿ 8bitï¼éä¿¡ã¤ãã¼ãã« */
+
+#define CR10_DEF	0x00U		/* NRZ */
+#define CR14_DEF	0x07U		/* ãã¼ã¬ã¼ãã¸ã§ãã¬ã¼ã¿ã¤ãã¼ãã« */
+#define CR15_DEF	0x56U		/* ãã¼ã¬ã¼ãã¸ã§ãã¬ã¼ã¿ä½¿ç¨ */
+
+#define SR0_RECV	0x01U		/* åä¿¡éç¥ããã */
+#define SR0_SEND	0x04U		/* éä¿¡å¯è½ããã */
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯ã®å®ç¾©
+ */
+typedef struct sio_port_initialization_block {
+	void		*data;			/* ãã¼ã¿ã¬ã¸ã¹ã¿ã®çªå° */
+	void		*ctrl;			/* ã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿ã®çªå° */
+
+	uint8_t		cr3_def;		/* CR3ã®è¨­å®å¤ï¼åä¿¡ãããæ°ï¼*/
+	uint8_t		cr4_def;		/* CR4ã®è¨­å®å¤ï¼ã¹ããããããï¼ããªãã£ï¼*/
+	uint8_t		cr5_def;		/* CR5ã®è¨­å®å¤ï¼éä¿¡ãããæ°ï¼*/
+	uint8_t		brg1_def;		/* ãã¼ã¬ã¼ãä¸ä½ã®è¨­å®å¤ */
+	uint8_t		brg2_def;		/* ãã¼ã¬ã¼ãä¸ä½ã®è¨­å®å¤ */
+} SIOPINIB;
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®å®ç¾©
+ */
+struct sio_port_control_block {
+	const SIOPINIB *p_siopinib;	/* ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯ */
+	intptr_t	exinf;			/* æ¡å¼µæ
+å ± */
+	bool_t		openflag;		/* ãªã¼ãã³æ¸ã¿ãã©ã° */
+	uint8_t		cr1;			/* CR1ã®è¨­å®å¤ï¼å²è¾¼ã¿è¨±å¯ï¼*/
+	bool_t		getready;		/* æå­ãåä¿¡ããç¶æ
+ */
+	bool_t		putready;		/* æå­ãéä¿¡ã§ããç¶æ
+ */
+};
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯
+ */
+const SIOPINIB siopinib_table[TNUM_SIOP] = {
+	{ (void *) TADR_UPD72001_DATAA, (void *) TADR_UPD72001_CTRLA,
+					CR3_DEF, CR4_DEF, CR5_DEF, BRG1_DEF, BRG2_DEF },
+	{ (void *) TADR_UPD72001_DATAB, (void *) TADR_UPD72001_CTRLB,
+					CR3_DEF, CR4_DEF, CR5_DEF, BRG1_DEF, BRG2_DEF }
+};
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®ã¨ãªã¢
+ */
+SIOPCB	siopcb_table[TNUM_SIOP];
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãIDããç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_SIOP(siopid)	((uint_t)((siopid) - 1))
+#define get_siopcb(siopid)	(&(siopcb_table[INDEX_SIOP(siopid)]))
+
+/*
+ *  ããã¤ã¹ã¬ã¸ã¹ã¿ã¸ã®ã¢ã¯ã»ã¹é¢æ°
+ */
+Inline uint8_t
+upd72001_read_reg(void *addr)
+{
+	uint8_t	val;
+
+	val = upd72001_reb_reg(addr);
+	sil_dly_nse(UPD72001_DELAY);
+	return(val);
+}
+
+Inline void
+upd72001_write_reg(void *addr, uint8_t val)
+{
+	upd72001_wrb_reg(addr, val);
+	sil_dly_nse(UPD72001_DELAY);
+}
+
+Inline uint8_t
+upd72001_read_ctrl(void *addr, uint8_t reg)
+{
+	upd72001_write_reg(addr, reg);
+	return(upd72001_read_reg(addr));
+}
+
+Inline void
+upd72001_write_ctrl(void *addr, uint8_t reg, uint8_t val)
+{
+	upd72001_write_reg(addr, reg);
+	upd72001_write_reg(addr, val);
+}
+
+Inline void
+upd72001_write_brg(void *addr, uint8_t reg, uint8_t val,
+									uint8_t brg2, uint8_t brg1)
+{
+	upd72001_write_reg(addr, reg);
+	upd72001_write_reg(addr, val);
+	upd72001_write_reg(addr, brg2);
+	upd72001_write_reg(addr, brg1);
+	(void) upd72001_read_reg(addr);		/* ããã¼ãªã¼ã */
+}
+
+/*
+ *  ç¶æ
+ã®èª­åºãï¼SR0ã®èª­åºãï¼
+ *
+ *  Î¼PD72001ã¯ï¼ç¶æ
+ï¼SR0ï¼ãä¸åº¦èª­ãã¨åä¿¡éç¥ããããè½ã¡ã¦ãã¾ãã
+ *  ãï¼ç¶æ
+ãèª­ã¿åºãé¢æ°ãè¨­ãï¼ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ä¸­ã®
+ *  getreadyã«åä¿¡éç¥ç¶æ
+ï¼putreadyã«éä¿¡å¯è½ç¶æ
+ãä¿å­ãã¦ããï¼éä¿¡
+ *  å¯è½ç¶æ
+ã®ä¿å­ã¯ä¸è¦ãããããªãï¼ï¼
+ *  ç¶æ
+ã¬ã¸ã¹ã¿ãèª­ãã§ãåä¿¡éç¥ããããè½ã¡ãªãããã¤ã¹ï¼ãã¡ããæ®
+ *  éã¨æãããï¼ã§ã¯ï¼ãã®é¢æ°ã¯å¿
+è¦ãªãï¼
+ */
+static void
+upd72001_get_stat(SIOPCB *p_siopcb)
+{
+	uint8_t	sr0;
+
+	sr0 = upd72001_read_ctrl(p_siopcb->p_siopinib->ctrl, UPD72001_SR0);
+	if ((sr0 & SR0_RECV) != 0) {
+		p_siopcb->getready = true;
+	}
+	if ((sr0 & SR0_SEND) != 0) {
+		p_siopcb->putready = true;
+	}
+}
+
+/*
+ *  æå­ãåä¿¡ã§ãããï¼
+ */
+Inline bool_t
+upd72001_getready(SIOPCB *p_siopcb)
+{
+	upd72001_get_stat(p_siopcb);
+	return(p_siopcb->getready);
+}
+
+/*
+ *  æå­ãéä¿¡ã§ãããï¼
+ */
+Inline bool_t
+upd72001_putready(SIOPCB *p_siopcb)
+{
+	upd72001_get_stat(p_siopcb);
+	return(p_siopcb->putready);
+}
+
+/*
+ *  åä¿¡ããæå­ã®ååºã
+ */
+Inline char
+upd72001_getchar(SIOPCB *p_siopcb)
+{
+	p_siopcb->getready = false;
+	return((char) upd72001_read_reg(p_siopcb->p_siopinib->data));
+}
+
+/*
+ *  éä¿¡ããæå­ã®æ¸è¾¼ã¿
+ */
+Inline void
+upd72001_putchar(SIOPCB *p_siopcb, char c)
+{
+	p_siopcb->putready = false;
+	upd72001_write_reg(p_siopcb->p_siopinib->data, (uint8_t) c);
+}
+
+/*
+ *  EOIï¼End Of Interruptï¼çºè¡
+ */
+Inline void
+upd72001_eoi(void)
+{
+	upd72001_write_ctrl((void *) TADR_UPD72001_CTRLA, UPD72001_CR0, CR0_EOI);
+}
+
+/*
+ *  SIOãã©ã¤ãã®åæå
+ */
+void
+upd72001_initialize(void)
+{
+	SIOPCB	*p_siopcb;
+	uint_t	i;
+
+	/*
+	 *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®åæå
+	 */
+	for (i = 0; i < TNUM_SIOP; i++) {
+		p_siopcb = &(siopcb_table[i]);
+		p_siopcb->p_siopinib = &(siopinib_table[i]);
+		p_siopcb->openflag = false;
+	}
+}
+
+/*
+ *  ãªã¼ãã³ãã¦ãããã¼ãããããï¼
+ */
+bool_t
+upd72001_openflag(void)
+{
+	return(siopcb_table[0].openflag || siopcb_table[1].openflag);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
+ */
+SIOPCB *
+upd72001_opn_por(ID siopid, intptr_t exinf)
+{
+	SIOPCB		*p_siopcb;
+	const SIOPINIB	*p_siopinib;
+
+	p_siopcb = get_siopcb(siopid);
+	p_siopinib = p_siopcb->p_siopinib;
+
+	upd72001_write_reg(p_siopinib->ctrl, CR_RESET);
+	if (!upd72001_openflag()) {
+		upd72001_write_ctrl((void *) TADR_UPD72001_CTRLA, UPD72001_CR2, 0x18);
+		upd72001_write_ctrl((void *) TADR_UPD72001_CTRLB, UPD72001_CR2, 0x00);
+	}
+	p_siopcb->cr1 = CR1_DOWN;
+	upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR1, p_siopcb->cr1);
+	upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR4, p_siopinib->cr4_def);
+	upd72001_write_brg(p_siopinib->ctrl, UPD72001_CR12, 0x01U,
+							p_siopinib->brg2_def, p_siopinib->brg1_def);
+	upd72001_write_brg(p_siopinib->ctrl, UPD72001_CR12, 0x02U,
+							p_siopinib->brg2_def, p_siopinib->brg1_def);
+	upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR15, CR15_DEF);
+	upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR14, CR14_DEF);
+	upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR10, CR10_DEF);
+	upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR3, p_siopinib->cr3_def);
+	upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR5, p_siopinib->cr5_def);
+	p_siopcb->exinf = exinf;
+	p_siopcb->getready = false;
+	p_siopcb->putready = false;
+	p_siopcb->openflag = true;
+	return(p_siopcb);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ã¯ã­ã¼ãº
+ */
+void
+upd72001_cls_por(SIOPCB *p_siopcb)
+{
+	upd72001_write_ctrl(p_siopcb->p_siopinib->ctrl, UPD72001_CR1, CR1_DOWN);
+	p_siopcb->openflag = false;
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã¸ã®æå­éä¿¡
+ */
+bool_t
+upd72001_snd_chr(SIOPCB *p_siopcb, char c)
+{
+	if (upd72001_putready(p_siopcb)) {
+		upd72001_putchar(p_siopcb, c);
+		return(true);
+	}
+	return(false);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®æå­åä¿¡
+ */
+int_t
+upd72001_rcv_chr(SIOPCB *p_siopcb)
+{
+	if (upd72001_getready(p_siopcb)) {
+		return((int_t)(uint8_t) upd72001_getchar(p_siopcb));
+	}
+	return(-1);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+void
+upd72001_ena_cbr(SIOPCB *p_siopcb, uint_t cbrtn)
+{
+	uint8_t	cr1_bit;
+
+	switch (cbrtn) {
+	case SIO_RDY_SND:
+		cr1_bit = CR1_SEND;
+		break;
+	case SIO_RDY_RCV:
+		cr1_bit = CR1_RECV;
+		break;
+	default:
+		cr1_bit = 0U;
+		break;
+	}
+	p_siopcb->cr1 |= cr1_bit;
+	upd72001_write_ctrl(p_siopcb->p_siopinib->ctrl,
+									UPD72001_CR1, p_siopcb->cr1);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+void
+upd72001_dis_cbr(SIOPCB *p_siopcb, uint_t cbrtn)
+{
+	uint8_t	cr1_bit;
+
+	switch (cbrtn) {
+	case SIO_RDY_SND:
+		cr1_bit = CR1_SEND;
+		break;
+	case SIO_RDY_RCV:
+		cr1_bit = CR1_RECV;
+		break;
+	default:
+		cr1_bit = 0U;
+		break;
+	}
+	p_siopcb->cr1 &= ~cr1_bit;
+	upd72001_write_ctrl(p_siopcb->p_siopinib->ctrl,
+									UPD72001_CR1, p_siopcb->cr1);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã«å¯¾ããå²è¾¼ã¿å¦ç
+ */
+static void
+upd72001_isr_siop(SIOPCB *p_siopcb)
+{
+	if ((p_siopcb->cr1 & CR1_RECV) != 0U) {
+		if (upd72001_getready(p_siopcb)) {
+			/*
+			 *  åä¿¡éç¥ã³ã¼ã«ããã¯ã«ã¼ãã³ãå¼ã³åºãï¼
+			 */
+			upd72001_irdy_rcv(p_siopcb->exinf);
+		}
+	}
+	if ((p_siopcb->cr1 & CR1_SEND) != 0U) {
+		if (upd72001_putready(p_siopcb)) {
+			/*
+			 *  éä¿¡å¯è½ã³ã¼ã«ããã¯ã«ã¼ãã³ãå¼ã³åºãï¼
+			 */
+			upd72001_irdy_snd(p_siopcb->exinf);
+		}
+	}
+}
+
+/*
+ *  SIOã®å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³
+ */
+void
+upd72001_isr(void)
+{
+	if (siopcb_table[0].openflag) {
+		upd72001_isr_siop(&(siopcb_table[0]));
+	}
+	if (siopcb_table[1].openflag) {
+		upd72001_isr_siop(&(siopcb_table[1]));
+	}
+	upd72001_eoi();
+}
Index: rtos_arduino/trunk/asp_1.9.2/pdic/upd72001/upd72001.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/pdic/upd72001/upd72001.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/pdic/upd72001/upd72001.h	(revision 136)
@@ -0,0 +1,139 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2006-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: upd72001.h 2246 2011-08-26 22:39:15Z ertl-hiro $
+ */
+
+/*
+ *		Î¼PD72001ç¨ ç°¡æSIOãã©ã¤ã
+ */
+
+#ifndef TOPPERS_UPD72001_H
+#define TOPPERS_UPD72001_H
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãæ°ã®å®ç¾©
+ */
+#define TNUM_SIOP		2		/* ãµãã¼ãããã·ãªã¢ã«I/Oãã¼ãã®æ° */
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®å®ç¾©
+ */
+typedef struct sio_port_control_block	SIOPCB;
+
+/*
+ *  ã³ã¼ã«ããã¯ã«ã¼ãã³ã®è­å¥çªå·
+ */
+#define SIO_RDY_SND		1U		/* éä¿¡å¯è½ã³ã¼ã«ããã¯ */
+#define SIO_RDY_RCV		2U		/* åä¿¡éç¥ã³ã¼ã«ããã¯ */
+
+/*
+ *  SIOãã©ã¤ãã®åæåã«ã¼ãã³
+ */
+extern void		upd72001_initialize(void);
+
+/*
+ *  ãªã¼ãã³ãã¦ãããã¼ãããããï¼
+ */
+extern bool_t	upd72001_openflag(void);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
+ */
+extern SIOPCB	*upd72001_opn_por(ID siopid, intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ã¯ã­ã¼ãº
+ */
+extern void		upd72001_cls_por(SIOPCB *p_siopcb);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã¸ã®æå­éä¿¡
+ */
+extern bool_t	upd72001_snd_chr(SIOPCB *p_siopcb, char c);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®æå­åä¿¡
+ */
+extern int_t	upd72001_rcv_chr(SIOPCB *p_siopcb);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+extern void		upd72001_ena_cbr(SIOPCB *p_siopcb, uint_t cbrtn);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+extern void		upd72001_dis_cbr(SIOPCB *p_siopcb, uint_t cbrtn);
+
+/*
+ *  SIOã®å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³
+ */
+extern void		upd72001_isr(void);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®éä¿¡å¯è½ã³ã¼ã«ããã¯
+ */
+extern void		upd72001_irdy_snd(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®åä¿¡éç¥ã³ã¼ã«ããã¯
+ */
+extern void		upd72001_irdy_rcv(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_UPD72001_H */
Index: rtos_arduino/trunk/asp_1.9.2/sample/Makefile
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/sample/Makefile	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/sample/Makefile	(revision 136)
@@ -0,0 +1,589 @@
+#
+#  TOPPERS/ASP Kernel
+#      Toyohashi Open Platform for Embedded Real-Time Systems/
+#      Advanced Standard Profile Kernel
+# 
+#  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+#                              Toyohashi Univ. of Technology, JAPAN
+#  Copyright (C) 2006-2014 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  $Id: Makefile 2594 2014-01-02 07:08:54Z ertl-hiro $
+# 
+
+#
+#  ã¿ã¼ã²ããã®æå®ï¼Makefile.targetã§ä¸æ¸ããããã®ãé²ãããï¼
+#
+all:
+
+#
+#  ã¿ã¼ã²ããç¥ç§°ã®å®ç¾©
+#
+TARGET = @(TARGET)
+
+#
+#  ãã­ã°ã©ãã³ã°è¨èªã®å®ç¾©
+#
+SRCLANG = @(SRCLANG)
+ifeq ($(SRCLANG),c)
+  LIBS = -lc
+endif
+ifeq ($(SRCLANG),c++)
+  USE_CXX = true
+  CXXLIBS = -lstdc++ -lm -lc
+  CXXRTS = cxxrt.o newlibrt.o
+endif
+
+#
+#  ã½ã¼ã¹ãã¡ã¤ã«ã®ãã£ã¬ã¯ããªã®å®ç¾©
+#
+SRCDIR = @(SRCDIR)
+
+#
+#  ãªãã¸ã§ã¯ããã¡ã¤ã«åã®æ¡å¼µå­ã®è¨­å®
+#
+OBJEXT = @(OBJEXT)
+
+#
+#  å®è¡ç°å¢ã®å®ç¾©ï¼ã¿ã¼ã²ããä¾å­ã«ä¸æ¸ããããå ´åãããï¼
+#
+DBGENV := @(DBGENV)
+
+#
+#  ã«ã¼ãã«ã©ã¤ãã©ãªï¼libkernel.aï¼ã®ãã£ã¬ã¯ããªå
+#  ï¼ã«ã¼ãã«ã©ã¤ãã©ãªãmakeå¯¾è±¡ã«ããæã¯ï¼ç©ºã«å®ç¾©ããï¼
+#
+KERNEL_LIB = @(KERNEL_LIB)
+
+#
+#  ã«ã¼ãã«ãé¢æ°åä½ã§ã³ã³ãã¤ã«ãããã©ããã®å®ç¾©
+#
+KERNEL_FUNCOBJS = @(KERNEL_FUNCOBJS)
+
+#
+#  ãã¬ã¼ã¹ã­ã°ãåå¾ãããã©ããã®å®ç¾©
+#
+ENABLE_TRACE = @(ENABLE_TRACE)
+
+#
+#  ã¦ã¼ãã£ãªãã£ãã­ã°ã©ã ã®åç§°
+#
+PERL = @(PERL)
+CFG = @(CFG)
+
+#
+#  ãªãã¸ã§ã¯ããã¡ã¤ã«åã®å®ç¾©
+#
+OBJNAME = asp
+ifdef OBJEXT
+  OBJFILE = $(OBJNAME).$(OBJEXT)
+  CFG1_OUT = cfg1_out.$(OBJEXT)
+else
+  OBJFILE = $(OBJNAME)
+  CFG1_OUT = cfg1_out
+endif
+
+#
+#  ã¿ã¼ã²ããä¾å­é¨ã®ãã£ã¬ã¯ããªã®å®ç¾©
+#
+TARGETDIR = $(SRCDIR)/target/$(TARGET)
+
+#
+#  ã¿ã¼ã²ããä¾å­ã®å®ç¾©ã®ã¤ã³ã¯ã«ã¼ã
+#
+include $(TARGETDIR)/Makefile.target
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿é¢ä¿ã®å¤æ°ã®å®ç¾©
+#
+CFG_TABS := --api-table $(SRCDIR)/kernel/kernel_api.csv \
+			--cfg1-def-table $(SRCDIR)/kernel/kernel_def.csv $(CFG_TABS)
+
+CFG_ASMOBJS := $(CFG_ASMOBJS)
+CFG_COBJS := kernel_cfg.o $(CFG_COBJS)
+CFG_OBJS := $(CFG_ASMOBJS) $(CFG_COBJS)
+CFG2_OUT_SRCS := kernel_cfg.h kernel_cfg.c $(CFG2_OUT_SRCS)
+
+#
+#  å
+±éã³ã³ãã¤ã«ãªãã·ã§ã³ã®å®ç¾©
+#
+COPTS := $(COPTS) -g @(COPTS)
+ifndef OMIT_WARNING_ALL
+  COPTS := $(COPTS) -Wall
+endif
+ifndef OMIT_OPTIMIZATION
+  COPTS := $(COPTS) -O2
+endif
+CDEFS := $(CDEFS) @(CDEFS)
+INCLUDES := -I. -I$(SRCDIR)/include -I$(SRCDIR)/arch -I$(SRCDIR) $(INCLUDES)
+LDFLAGS := $(LDFLAGS) @(LDFLAGS)
+CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) @(LDFLAGS)
+LIBS := $(LIBS) $(CXXLIBS)
+CFLAGS = $(COPTS) $(CDEFS) $(INCLUDES)
+
+#
+#  ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ã«é¢ããå®ç¾©
+#
+APPLNAME = @(APPLNAME)
+APPLDIR = @(APPLDIR)
+APPL_CFG = $(APPLNAME).cfg
+
+APPL_DIR = $(APPLDIR) $(SRCDIR)/library
+APPL_ASMOBJS =
+ifdef USE_CXX
+  APPL_CXXOBJS = $(APPLNAME).o @(APPLOBJS)
+  APPL_COBJS =
+else
+  APPL_COBJS = $(APPLNAME).o @(APPLOBJS)
+endif
+APPL_COBJS := $(APPL_COBJS) log_output.o vasyslog.o t_perror.o strerror.o
+APPL_CFLAGS =
+APPL_LIBS =
+ifdef APPLDIR
+  INCLUDES := $(INCLUDES) $(foreach dir,$(APPLDIR),-I$(dir))
+endif
+
+#
+#  ã·ã¹ãã ãµã¼ãã¹ã«é¢ããå®ç¾©
+#
+SYSSVC_DIR := $(SYSSVC_DIR) $(SRCDIR)/syssvc $(SRCDIR)/library
+SYSSVC_ASMOBJS := $(SYSSVC_ASMOBJS)
+SYSSVC_COBJS := $(SYSSVC_COBJS) banner.o syslog.o serial.o logtask.o \
+				@(SYSSVCOBJS) $(CXXRTS)
+SYSSVC_CFLAGS := $(SYSSVC_CFLAGS)
+SYSSVC_LIBS := $(SYSSVC_LIBS)
+INCLUDES := $(INCLUDES)
+
+#
+#  ã«ã¼ãã«ã«é¢ããå®ç¾©
+#
+#  KERNEL_ASMOBJS: ã«ã¼ãã«ã©ã¤ãã©ãªã«å«ããï¼ã½ã¼ã¹ãã¢ã»ã³ããªè¨èªã®
+#				   ãªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_COBJS: ã«ã¼ãã«ã®ã©ã¤ãã©ãªã«å«ããï¼ã½ã¼ã¹ãCè¨èªã§ï¼ã½ã¼ã¹
+#				 ãã¡ã¤ã«ã¨1å¯¾1ã«å¯¾å¿ãããªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_LCSRCS: ã«ã¼ãã«ã®ã©ã¤ãã©ãªã«å«ããCè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ã§ï¼
+#				  1ã¤ã®ã½ã¼ã¹ãã¡ã¤ã«ããè¤æ°ã®ãªãã¸ã§ã¯ããã¡ã¤ã«ãç
+#				  æãããã®ï¼
+#  KERNEL_LCOBJS: ä¸ã®ã½ã¼ã¹ãã¡ã¤ã«ããçæããããªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_AUX_COBJS: ã­ã¼ãã¢ã¸ã¥ã¼ã«ã«å«ããªããï¼ã«ã¼ãã«ã®ã½ã¼ã¹ãã¡
+#					 ã¤ã«ã¨åããªãã·ã§ã³ãé©ç¨ãã¦ã³ã³ãã¤ã«ãã¹ãï¼ã½ã¼
+#					 ã¹ãCè¨èªã®ãªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#
+KERNEL_DIR := $(KERNEL_DIR) $(SRCDIR)/kernel
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS)
+KERNEL_COBJS := $(KERNEL_COBJS)
+KERNEL_CFLAGS := $(KERNEL_CFLAGS) -I$(SRCDIR)/kernel
+ifdef OMIT_MAKEOFFSET
+  OFFSET_H =
+else
+  OFFSET_H = offset.h
+ifndef OFFSET_TF
+  KERNEL_AUX_COBJS := $(KERNEL_AUX_COBJS) makeoffset.o
+endif
+endif
+
+#
+#  ã¿ã¼ã²ãããã¡ã¤ã«ï¼è¤æ°ãåæã«é¸æãã¦ã¯ãªããªãï¼
+#
+all: $(OBJFILE)
+#all: $(OBJNAME).bin
+#all: $(OBJNAME).srec
+
+##### ä»¥ä¸ã¯ç·¨éããªããã¨ #####
+
+#
+#  ç°å¢ã«ä¾å­ããã³ã³ãã¤ã«ãªãã·ã§ã³ã®å®ç¾©
+#
+ifdef DBGENV
+  CDEFS := $(CDEFS) -D$(DBGENV)
+endif
+
+#
+#  ã«ã¼ãã«ã®ãã¡ã¤ã«æ§æã®å®ç¾©
+#
+include $(SRCDIR)/kernel/Makefile.kernel
+ifdef KERNEL_FUNCOBJS
+  KERNEL_LCSRCS := $(KERNEL_FCSRCS)
+  KERNEL_LCOBJS := $(foreach file,$(KERNEL_FCSRCS),$($(file:.c=)))
+else
+  KERNEL_CFLAGS := -DALLFUNC $(KERNEL_CFLAGS)
+  KERNEL_COBJS := $(KERNEL_COBJS) \
+					$(foreach file,$(KERNEL_FCSRCS),$(file:.c=.o))
+endif
+
+#
+#  ã½ã¼ã¹ãã¡ã¤ã«ã®ãããã£ã¬ã¯ããªã«é¢ããå®ç¾©
+#
+vpath %.c $(KERNEL_DIR) $(SYSSVC_DIR) $(APPL_DIR)
+vpath %.S $(KERNEL_DIR) $(SYSSVC_DIR) $(APPL_DIR)
+vpath %.cfg $(APPL_DIR)
+
+#
+#  ã³ã³ãã¤ã«ã®ããã®å¤æ°ã®å®ç¾©
+#
+KERNEL_LIB_OBJS = $(KERNEL_ASMOBJS) $(KERNEL_COBJS) $(KERNEL_LCOBJS)
+SYSSVC_OBJS = $(SYSSVC_ASMOBJS) $(SYSSVC_COBJS)
+APPL_OBJS = $(APPL_ASMOBJS) $(APPL_COBJS) $(APPL_CXXOBJS)
+ALL_OBJS = $(START_OBJS) $(APPL_OBJS) $(SYSSVC_OBJS) $(CFG_OBJS) \
+											$(END_OBJS) $(HIDDEN_OBJS)
+ifdef KERNEL_LIB
+  ALL_LIBS = $(APPL_LIBS) $(SYSSVC_LIBS) -lkernel $(LIBS)
+  LIBS_DEP = $(filter %.a,$(ALL_LIBS)) $(KERNEL_LIB)/libkernel.a
+  LDFLAGS := $(LDFLAGS) -L$(KERNEL_LIB)
+  REALCLEAN_FILES := libkernel.a $(REALCLEAN_FILES)
+else
+  ALL_LIBS = $(APPL_LIBS) $(SYSSVC_LIBS) libkernel.a $(LIBS)
+  LIBS_DEP = $(filter %.a,$(ALL_LIBS))
+endif
+
+ifdef TEXT_START_ADDRESS
+  LDFLAGS := $(LDFLAGS) -Wl,-Ttext,$(TEXT_START_ADDRESS)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -Wl,-Ttext,$(TEXT_START_ADDRESS)
+endif
+ifdef DATA_START_ADDRESS
+  LDFLAGS := $(LDFLAGS) -Wl,-Tdata,$(DATA_START_ADDRESS)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -Wl,-Tdata,$(DATA_START_ADDRESS)
+endif
+ifdef LDSCRIPT
+  LDFLAGS := $(LDFLAGS) -T $(LDSCRIPT)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -T $(LDSCRIPT)
+endif
+
+#
+#  ãªãã»ãããã¡ã¤ã«ï¼offset.hï¼ã®çæè¦å
+#
+ifdef OFFSET_TF
+offset.h: $(APPL_CFG) kernel_cfg.timestamp
+	$(CFG) --pass 3 --kernel asp $(INCLUDES) \
+				--rom-image cfg1_out.srec --symbol-table cfg1_out.syms \
+				-T $(OFFSET_TF) $(CFG_TABS) $<
+else
+offset.h: makeoffset.s $(SRCDIR)/utils/genoffset
+	$(PERL) $(SRCDIR)/utils/genoffset makeoffset.s > offset.h
+endif
+
+#
+#  ã«ã¼ãã«ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã®çæ
+#
+cfg1_out.c: $(APPL_CFG)
+	$(CFG) --pass 1 --kernel asp $(INCLUDES) $(CFG_TABS) $<
+
+$(CFG2_OUT_SRCS): kernel_cfg.timestamp
+kernel_cfg.timestamp: $(APPL_CFG) \
+						$(START_OBJS) cfg1_out.o $(END_OBJS) $(HIDDEN_OBJS)
+	$(LINK) $(CFLAGS) $(CFG1_OUT_LDFLAGS) -o $(CFG1_OUT) \
+						$(START_OBJS) cfg1_out.o $(END_OBJS)
+	$(NM) -n $(CFG1_OUT) > cfg1_out.syms
+	$(OBJCOPY) -O srec -S $(CFG1_OUT) cfg1_out.srec
+	$(CFG) --pass 2 --kernel asp $(INCLUDES) \
+				-T $(TARGETDIR)/target.tf $(CFG_TABS) $<
+	touch -r kernel_cfg.c kernel_cfg.timestamp
+
+#
+#  ã«ã¼ãã«ã©ã¤ãã©ãªãã¡ã¤ã«ã®çæ
+#
+libkernel.a: $(OFFSET_H) $(KERNEL_LIB_OBJS)
+	rm -f libkernel.a
+	$(AR) -rcs libkernel.a $(KERNEL_LIB_OBJS)
+	$(RANLIB) libkernel.a
+
+#
+#  ç¹å¥ãªä¾å­é¢ä¿ã®å®ç¾©
+#
+banner.o: kernel_cfg.timestamp $(filter-out banner.o,$(ALL_OBJS)) $(LIBS_DEP)
+
+#
+#  å
+¨ä½ã®ãªã³ã¯
+#
+$(OBJFILE): $(APPL_CFG) kernel_cfg.timestamp $(ALL_OBJS) $(LIBS_DEP)
+	$(LINK) $(CFLAGS) $(LDFLAGS) -o $(OBJFILE) $(START_OBJS) \
+			$(APPL_OBJS) $(SYSSVC_OBJS) $(CFG_OBJS) $(ALL_LIBS) $(END_OBJS)
+	$(NM) -n $(OBJFILE) > $(OBJNAME).syms
+	$(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
+	$(CFG) --pass 3 --kernel asp $(INCLUDES) \
+				--rom-image $(OBJNAME).srec --symbol-table $(OBJNAME).syms \
+				-T $(TARGETDIR)/target_check.tf $(CFG_TABS) $<
+
+#
+#  ãã¤ããªãã¡ã¤ã«ã®çæ
+#
+$(OBJNAME).bin: $(OBJFILE)
+	$(OBJCOPY) -O binary -S $(OBJFILE) $(OBJNAME).bin
+
+#
+#  Sã¬ã³ã¼ããã¡ã¤ã«ã®çæ
+#
+$(OBJNAME).srec: $(OBJFILE)
+	$(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
+
+#
+#  ã³ã³ãã¤ã«çµæã®æ¶å»
+#
+.PHONY: clean
+clean:
+	rm -f \#* *~ *.o $(CLEAN_FILES)
+	rm -f $(OBJFILE) $(OBJNAME).syms $(OBJNAME).srec $(OBJNAME).bin
+	rm -f kernel_cfg.timestamp $(CFG2_OUT_SRCS)
+	rm -f cfg1_out.c $(CFG1_OUT) cfg1_out.syms cfg1_out.srec
+ifndef KERNEL_LIB
+	rm -f libkernel.a
+endif
+	rm -f makeoffset.s offset.h
+
+.PHONY: cleankernel
+cleankernel:
+	rm -rf $(KERNEL_LIB_OBJS)
+	rm -f makeoffset.s offset.h
+
+.PHONY: cleandep
+cleandep:
+	if ! [ -f Makefile.depend ]; then \
+		rm -f kernel_cfg.timestamp $(CFG2_OUT_SRCS); \
+		rm -f cfg1_out.c cfg1_out.o $(CFG1_OUT) cfg1_out.syms cfg1_out.srec; \
+		rm -f makeoffset.s offset.h; \
+	fi
+	rm -f Makefile.depend
+
+.PHONY: realclean
+realclean: cleandep clean
+	rm -f $(REALCLEAN_FILES)
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæãããã¡ã¤ã«ã®ã³ã³ãã¤ã«ã«ã¼ã«ã¨ä¾å­é¢ä¿ä½æ
+#  ã«ã¼ã«ã®å®ç¾©
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæãããã¡ã¤ã«ã¯ï¼ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ç¨ï¼
+#  ã·ã¹ãã ãµã¼ãã¹ç¨ï¼ã«ã¼ãã«ç¨ã®ãã¹ã¦ã®ãªãã·ã§ã³ãä»ãã¦ã³ã³ãã¤ã«
+#  ããï¼
+#
+ALL_CFG_COBJS = $(CFG_COBJS) cfg1_out.o
+ALL_CFG_ASMOBJS = $(CFG_ASMOBJS)
+CFG_CFLAGS = $(APPL_CFLAGS) $(SYSSVC_CFLAGS) $(KERNEL_CFLAGS)
+
+$(ALL_CFG_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(CFG_CFLAGS) $<
+
+$(ALL_CFG_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(CFG_CFLAGS) $<
+
+$(ALL_CFG_COBJS:.o=.d): %.d: %.c
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(CFG_CFLAGS)" $< >> Makefile.depend
+
+$(ALL_CFG_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(CFG_CFLAGS) $<
+
+$(ALL_CFG_ASMOBJS:.o=.d): %.d: %.S
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(CFG_CFLAGS)" $< >> Makefile.depend
+
+#
+#  ç¹æ®ãªä¾å­é¢ä¿ä½æã«ã¼ã«ã®å®ç¾©
+#
+cfg1_out.depend: $(APPL_CFG)
+	@$(CFG) -M cfg1_out.c $(INCLUDES) $< >> Makefile.depend
+
+makeoffset.d: makeoffset.c
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-T "makeoffset.s" -O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+
+#
+#  ä¾å­é¢ä¿ãã¡ã¤ã«ã®çæ
+#
+.PHONY: gendepend
+gendepend:
+	@echo "Generating Makefile.depend."
+
+.PHONY: depend
+ifdef KERNEL_LIB
+depend: cleandep kernel_cfg.timestamp gendepend \
+		cfg1_out.depend cfg1_out.d \
+		$(ALL_OBJS:.o=.d)
+else
+depend: cleandep $(OFFSET_H) kernel_cfg.timestamp gendepend \
+		cfg1_out.depend cfg1_out.d \
+		$(KERNEL_AUX_COBJS:.o=.d) $(KERNEL_ASMOBJS:.o=.d) \
+		$(KERNEL_COBJS:.o=.d) $(KERNEL_LCSRCS:.c=.d) $(ALL_OBJS:.o=.d)
+endif
+
+#
+#  ä¾å­é¢ä¿ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ã
+#
+-include Makefile.depend
+
+#
+#  éçºãã¼ã«ã®ã³ãã³ãåã®å®ç¾©
+#
+ifeq ($(TOOL),gcc)
+  #
+  #  GNUéçºç°å¢ç¨
+  #
+  ifdef GCC_TARGET
+    GCC_TARGET_PREFIX = $(GCC_TARGET)-
+  else
+    GCC_TARGET_PREFIX =
+  endif
+  CC = $(GCC_TARGET_PREFIX)gcc
+  CXX = $(GCC_TARGET_PREFIX)g++
+  AS = $(GCC_TARGET_PREFIX)as
+  LD = $(GCC_TARGET_PREFIX)ld
+  AR = $(GCC_TARGET_PREFIX)ar
+  NM = $(GCC_TARGET_PREFIX)nm
+  RANLIB = $(GCC_TARGET_PREFIX)ranlib
+  OBJCOPY = $(GCC_TARGET_PREFIX)objcopy
+  OBJDUMP = $(GCC_TARGET_PREFIX)objdump
+endif
+
+ifdef USE_CXX
+  LINK = $(CXX)
+else
+  LINK = $(CC)
+endif
+
+#
+#  ã³ã³ãã¤ã«ã«ã¼ã«ã®å®ç¾©
+#
+KERNEL_ALL_COBJS = $(KERNEL_COBJS) $(KERNEL_AUX_COBJS)
+
+$(KERNEL_ALL_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_ALL_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_LCOBJS): %.o:
+	$(CC) -DTOPPERS_$(*F) -o $@ -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_LCOBJS:.o=.s): %.s:
+	$(CC) -DTOPPERS_$(*F) -o $@ -S $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(SYSSVC_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(SYSSVC_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(SYSSVC_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(APPL_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_CXXOBJS): %.o: %.cpp
+	$(CXX) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_CXXOBJS:.o=.s): %.s: %.cpp
+	$(CXX) -S $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+#
+#  ä¾å­é¢ä¿ä½æã«ã¼ã«ã®å®ç¾©
+#
+$(KERNEL_COBJS:.o=.d): %.d: %.c
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+
+$(KERNEL_LCSRCS:.c=.d): %.d: %.c
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) -T "$($*)" \
+		-O "-DALLFUNC $(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+
+$(KERNEL_ASMOBJS:.o=.d): %.d: %.S
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+
+$(SYSSVC_COBJS:.o=.d): %.d: %.c
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(SYSSVC_CFLAGS)" $< >> Makefile.depend
+
+$(SYSSVC_ASMOBJS:.o=.d): %.d: %.S
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(SYSSVC_CFLAGS)" $< >> Makefile.depend
+
+$(APPL_COBJS:.o=.d): %.d: %.c
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(APPL_CFLAGS)" $< >> Makefile.depend
+
+$(APPL_CXXOBJS:.o=.d): %.d: %.cpp
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CXX) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(APPL_CFLAGS)" $< >> Makefile.depend
+
+$(APPL_ASMOBJS:.o=.d): %.d: %.S
+	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) $(MAKEDEP_OPTS) \
+		-O "$(CFLAGS) $(APPL_CFLAGS)" $< >> Makefile.depend
+
+#
+#  ããã©ã«ãã³ã³ãã¤ã«ã«ã¼ã«ãä¸æ¸ã
+#
+%.o: %.c
+	@echo "*** Default compile rules should not be used."
+	$(CC) -c $(CFLAGS) $<
+
+%.s: %.c
+	@echo "*** Default compile rules should not be used."
+	$(CC) -S $(CFLAGS) $<
+
+%.o: %.cpp
+	@echo "*** Default compile rules should not be used."
+	$(CXX) -c $(CFLAGS) $<
+
+%.s: %.cpp
+	@echo "*** Default compile rules should not be used."
+	$(CXX) -S $(CFLAGS) $<
+
+%.o: %.S
+	@echo "*** Default compile rules should not be used."
+	$(CC) -c $(CFLAGS) $<
Index: rtos_arduino/trunk/asp_1.9.2/sample/sample1.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/sample/sample1.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/sample/sample1.c	(revision 136)
@@ -0,0 +1,580 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2012 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: sample1.c 2416 2012-09-07 08:06:20Z ertl-hiro $
+ */
+
+/* 
+ *  ãµã³ãã«ãã­ã°ã©ã (1)ã®æ¬ä½
+ *
+ *  ASPã«ã¼ãã«ã®åºæ¬çãªåä½ãç¢ºèªããããã®ãµã³ãã«ãã­ã°ã©ã ï¼
+ *
+ *  ãã­ã°ã©ã ã®æ¦è¦:
+ *
+ *  ã¦ã¼ã¶ã¤ã³ã¿ãã§ã¼ã¹ãåãæã¤ã¡ã¤ã³ã¿ã¹ã¯ï¼ã¿ã¹ã¯ID: MAIN_TASKï¼åª
+ *  å
+åº¦: MAIN_PRIORITYï¼ã¨ï¼3ã¤ã®ä¸¦è¡å®è¡ãããã¿ã¹ã¯ï¼ã¿ã¹ã¯ID:
+ *  TASK1ï½TASK3ï¼åæåªå
+åº¦: MID_PRIORITYï¼ã§æ§æãããï¼ã¾ãï¼èµ·åå¨
+ *  æã2ç§ã®å¨æãã³ãã©ï¼å¨æãã³ãã©ID: CYCHDR1ï¼ãç¨ããï¼
+ *
+ *  ä¸¦è¡å®è¡ãããã¿ã¹ã¯ã¯ï¼task_loopåç©ºã«ã¼ããå®è¡ããåº¦ã«ï¼ã¿ã¹ã¯ã
+ *  å®è¡ä¸­ã§ãããã¨ãããããã¡ãã»ã¼ã¸ãè¡¨ç¤ºããï¼ç©ºã«ã¼ããå®è¡ãã
+ *  ã®ã¯ï¼ç©ºã«ã¼ããªãã§ã¡ãã»ã¼ã¸ãåºåããã¨ï¼å¤éã®ã¡ãã»ã¼ã¸ãåºå
+ *  ããï¼ãã­ã°ã©ã ã®åä½ãç¢ºèªãããããªãããã§ããï¼ã¾ãï¼ä½éãªã·
+ *  ãªã¢ã«ãã¼ããç¨ãã¦ã¡ãã»ã¼ã¸ãåºåããå ´åã«ï¼ãã¹ã¦ã®ã¡ãã»ã¼ã¸
+ *  ãåºåã§ããããã«ï¼ã¡ãã»ã¼ã¸ã®éãå¶éããã¨ããçç±ãããï¼
+ *
+ *  å¨æãã³ãã©ã¯ï¼ä¸ã¤ã®åªå
+åº¦ï¼HIGH_PRIORITYï¼MID_PRIORITYï¼
+ *  LOW_PRIORITYï¼ã®ã¬ãã£ã­ã¥ã¼ãåè»¢ãããï¼ãã­ã°ã©ã ã®èµ·åç´å¾ã¯ï¼
+ *  å¨æãã³ãã©ã¯åæ­¢ç¶æ
+ã«ãªã£ã¦ããï¼
+ *
+ *  ã¡ã¤ã³ã¿ã¹ã¯ã¯ï¼ã·ãªã¢ã«I/Oãã¼ãããã®æå­å
+¥åãè¡ãï¼æå­å
+¥åã
+ *  å¾
+ã£ã¦ããéã¯ï¼ä¸¦è¡å®è¡ãããã¿ã¹ã¯ãå®è¡ããã¦ããï¼ï¼å
+¥åããã
+ *  æå­ã«å¯¾å¿ããå¦çãå®è¡ããï¼å
+¥åãããæå­ã¨å¦çã®é¢ä¿ã¯æ¬¡ã®éãï¼
+ *  Control-Cã¾ãã¯'Q'ãå
+¥åãããã¨ï¼ãã­ã°ã©ã ãçµäºããï¼
+ *
+ *  '1' : å¯¾è±¡ã¿ã¹ã¯ãTASK1ã«åãæããï¼åæè¨­å®ï¼ï¼
+ *  '2' : å¯¾è±¡ã¿ã¹ã¯ãTASK2ã«åãæããï¼
+ *  '3' : å¯¾è±¡ã¿ã¹ã¯ãTASK3ã«åãæããï¼
+ *  'a' : å¯¾è±¡ã¿ã¹ã¯ãact_tskã«ããèµ·åããï¼
+ *  'A' : å¯¾è±¡ã¿ã¹ã¯ã«å¯¾ããèµ·åè¦æ±ãcan_actã«ããã­ã£ã³ã»ã«ããï¼
+ *  'e' : å¯¾è±¡ã¿ã¹ã¯ã«ext_tskãå¼ã³åºããï¼çµäºãããï¼
+ *  't' : å¯¾è±¡ã¿ã¹ã¯ãter_tskã«ããå¼·å¶çµäºããï¼
+ *  '>' : å¯¾è±¡ã¿ã¹ã¯ã®åªå
+åº¦ãHIGH_PRIORITYã«ããï¼
+ *  '=' : å¯¾è±¡ã¿ã¹ã¯ã®åªå
+åº¦ãMID_PRIORITYã«ããï¼
+ *  '<' : å¯¾è±¡ã¿ã¹ã¯ã®åªå
+åº¦ãLOW_PRIORITYã«ããï¼
+ *  'G' : å¯¾è±¡ã¿ã¹ã¯ã®åªå
+åº¦ãget_priã§èª­ã¿åºãï¼
+ *  's' : å¯¾è±¡ã¿ã¹ã¯ã«slp_tskãå¼ã³åºããï¼èµ·åºå¾
+ã¡ã«ãããï¼
+ *  'S' : å¯¾è±¡ã¿ã¹ã¯ã«tslp_tsk(10ç§)ãå¼ã³åºããï¼èµ·åºå¾
+ã¡ã«ãããï¼
+ *  'w' : å¯¾è±¡ã¿ã¹ã¯ãwup_tskã«ããèµ·åºããï¼
+ *  'W' : å¯¾è±¡ã¿ã¹ã¯ã«å¯¾ããèµ·åºè¦æ±ãcan_wupã«ããã­ã£ã³ã»ã«ããï¼
+ *  'l' : å¯¾è±¡ã¿ã¹ã¯ãrel_waiã«ããå¼·å¶çã«å¾
+ã¡è§£é¤ã«ããï¼
+ *  'u' : å¯¾è±¡ã¿ã¹ã¯ãsus_tskã«ããå¼·å¶å¾
+ã¡ç¶æ
+ã«ããï¼
+ *  'm' : å¯¾è±¡ã¿ã¹ã¯ã®å¼·å¶å¾
+ã¡ç¶æ
+ãrsm_tskã«ããè§£é¤ããï¼
+ *  'd' : å¯¾è±¡ã¿ã¹ã¯ã«dly_tsk(10ç§)ãå¼ã³åºããï¼æéçµéå¾
+ã¡ã«ãããï¼
+ *  'x' : å¯¾è±¡ã¿ã¹ã¯ã«ä¾å¤ãã¿ã¼ã³0x0001ã®ä¾å¤å¦çãè¦æ±ããï¼
+ *  'X' : å¯¾è±¡ã¿ã¹ã¯ã«ä¾å¤ãã¿ã¼ã³0x0002ã®ä¾å¤å¦çãè¦æ±ããï¼
+ *  'y' : å¯¾è±¡ã¿ã¹ã¯ã«dis_texãå¼ã³åºããï¼ã¿ã¹ã¯ä¾å¤ãç¦æ­¢ããï¼
+ *  'Y' : å¯¾è±¡ã¿ã¹ã¯ã«ena_texãå¼ã³åºããï¼ã¿ã¹ã¯ä¾å¤ãè¨±å¯ããï¼
+ *  'r' : 3ã¤ã®åªå
+åº¦ï¼HIGH_PRIORITYï¼MID_PRIORITYï¼LOW_PRIORITYï¼ã®ã¬
+ *        ãã£ã­ã¥ã¼ãåè»¢ãããï¼
+ *  'c' : å¨æãã³ãã©ãåä½éå§ãããï¼
+ *  'C' : å¨æãã³ãã©ãåä½åæ­¢ãããï¼
+ *  'b' : ã¢ã©ã¼ã ãã³ãã©ã5ç§å¾ã«èµ·åããããåä½éå§ãããï¼
+ *  'B' : ã¢ã©ã¼ã ãã³ãã©ãåä½åæ­¢ãããï¼
+ *  'z' : å¯¾è±¡ã¿ã¹ã¯ã«CPUä¾å¤ãçºçãããï¼ã¿ã¹ã¯ãçµäºãããï¼ï¼
+ *  'Z' : å¯¾è±¡ã¿ã¹ã¯ã«CPUã­ãã¯ç¶æ
+ã§CPUä¾å¤ãçºçãããï¼ãã­ã°ã©ã ã
+ *        çµäºããï¼ï¼
+ *  'V' : get_utmã§æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ã2åèª­ãï¼
+ *  'v' : çºè¡ããã·ã¹ãã ã³ã¼ã«ãè¡¨ç¤ºããï¼ããã©ã«ãï¼ï¼
+ *  'q' : çºè¡ããã·ã¹ãã ã³ã¼ã«ãè¡¨ç¤ºããªãï¼
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <t_stdlib.h>
+#include "syssvc/serial.h"
+#include "syssvc/syslog.h"
+#include "kernel_cfg.h"
+#include "sample1.h"
+
+/*
+ *  ãµã¼ãã¹ã³ã¼ã«ã®ã¨ã©ã¼ã®ã­ã°åºå
+ */
+Inline void
+svc_perror(const char *file, int_t line, const char *expr, ER ercd)
+{
+	if (ercd < 0) {
+		t_perror(LOG_ERROR, file, line, expr, ercd);
+	}
+}
+
+#define	SVC_PERROR(expr)	svc_perror(__FILE__, __LINE__, #expr, (expr))
+
+/*
+ *  ä¸¦è¡å®è¡ãããã¿ã¹ã¯ã¸ã®ã¡ãã»ã¼ã¸é å
+ */
+char	message[3];
+
+/*
+ *  ã«ã¼ãåæ°
+ */
+ulong_t	task_loop;		/* ã¿ã¹ã¯å
+ã§ã®ã«ã¼ãåæ° */
+ulong_t	tex_loop;		/* ä¾å¤å¦çã«ã¼ãã³å
+ã§ã®ã«ã¼ãåæ° */
+
+/*
+ *  ä¸¦è¡å®è¡ãããã¿ã¹ã¯
+ */
+void task(intptr_t exinf)
+{
+	volatile ulong_t	i;
+	int_t		n = 0;
+	int_t		tskno = (int_t) exinf;
+	const char	*graph[] = { "|", "  +", "    *" };
+	char		c;
+
+	SVC_PERROR(ena_tex());
+	while (true) {
+		syslog(LOG_NOTICE, "task%d is running (%03d).   %s",
+										tskno, ++n, graph[tskno-1]);
+		for (i = 0; i < task_loop; i++);
+		c = message[tskno-1];
+		message[tskno-1] = 0;
+		switch (c) {
+		case 'e':
+			syslog(LOG_INFO, "#%d#ext_tsk()", tskno);
+			SVC_PERROR(ext_tsk());
+			assert(0);
+		case 's':
+			syslog(LOG_INFO, "#%d#slp_tsk()", tskno);
+			SVC_PERROR(slp_tsk());
+			break;
+		case 'S':
+			syslog(LOG_INFO, "#%d#tslp_tsk(10000)", tskno);
+			SVC_PERROR(tslp_tsk(10000));
+			break;
+		case 'd':
+			syslog(LOG_INFO, "#%d#dly_tsk(10000)", tskno);
+			SVC_PERROR(dly_tsk(10000));
+			break;
+		case 'y':
+			syslog(LOG_INFO, "#%d#dis_tex()", tskno);
+			SVC_PERROR(dis_tex());
+			break;
+		case 'Y':
+			syslog(LOG_INFO, "#%d#ena_tex()", tskno);
+			SVC_PERROR(ena_tex());
+			break;
+#ifdef CPUEXC1
+		case 'z':
+			syslog(LOG_NOTICE, "#%d#raise CPU exception", tskno);
+			RAISE_CPU_EXCEPTION;
+			break;
+		case 'Z':
+			SVC_PERROR(loc_cpu());
+			syslog(LOG_NOTICE, "#%d#raise CPU exception", tskno);
+			RAISE_CPU_EXCEPTION;
+			SVC_PERROR(unl_cpu());
+			break;
+#endif /* CPUEXC1 */
+		default:
+			break;
+		}
+	}
+}
+
+/*
+ *  ä¸¦è¡ãã¦å®è¡ãããã¿ã¹ã¯ç¨ã®ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³
+ */
+void tex_routine(TEXPTN texptn, intptr_t exinf)
+{
+	volatile ulong_t	i;
+	int_t	tskno = (int_t) exinf;
+
+	syslog(LOG_NOTICE, "task%d receives exception 0x%04x.", tskno, texptn);
+	for (i = 0; i < tex_loop; i++);
+
+	if ((texptn & 0x8000U) != 0U) {
+		syslog(LOG_INFO, "#%d#ext_tsk()", tskno);
+		SVC_PERROR(ext_tsk());
+		assert(0);
+	}
+}
+
+/*
+ *  CPUä¾å¤ãã³ãã©
+ */
+#ifdef CPUEXC1
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	ID		tskid;
+
+	syslog(LOG_NOTICE, "CPU exception handler (p_excinf = %08p).", p_excinf);
+	if (sns_ctx() != true) {
+		syslog(LOG_WARNING,
+					"sns_ctx() is not true in CPU exception handler.");
+	}
+	if (sns_dpn() != true) {
+		syslog(LOG_WARNING,
+					"sns_dpn() is not true in CPU exception handler.");
+	}
+	syslog(LOG_INFO, "sns_loc = %d sns_dsp = %d sns_tex = %d",
+									sns_loc(), sns_dsp(), sns_tex());
+	syslog(LOG_INFO, "xsns_dpn = %d xsns_xpn = %d",
+									xsns_dpn(p_excinf), xsns_xpn(p_excinf));
+
+	if (xsns_xpn(p_excinf)) {
+		syslog(LOG_NOTICE, "Sample program ends with exception.");
+		SVC_PERROR(ext_ker());
+		assert(0);
+	}
+
+	SVC_PERROR(iget_tid(&tskid));
+	SVC_PERROR(iras_tex(tskid, 0x8000U));
+}
+
+#endif /* CPUEXC1 */
+
+/*
+ *  å¨æãã³ãã©
+ *
+ *  HIGH_PRIORITYï¼MID_PRIORITYï¼LOW_PRIORITY ã®ååªå
+åº¦ã®ã¬ãã£ã­ã¥ã¼
+ *  ãåè»¢ãããï¼
+ */
+void cyclic_handler(intptr_t exinf)
+{
+	SVC_PERROR(irot_rdq(HIGH_PRIORITY));
+	SVC_PERROR(irot_rdq(MID_PRIORITY));
+	SVC_PERROR(irot_rdq(LOW_PRIORITY));
+}
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©
+ *
+ *  HIGH_PRIORITYï¼MID_PRIORITYï¼LOW_PRIORITY ã®ååªå
+åº¦ã®ã¬ãã£ã­ã¥ã¼
+ *  ãåè»¢ãããï¼
+ */
+void alarm_handler(intptr_t exinf)
+{
+	SVC_PERROR(irot_rdq(HIGH_PRIORITY));
+	SVC_PERROR(irot_rdq(MID_PRIORITY));
+	SVC_PERROR(irot_rdq(LOW_PRIORITY));
+}
+
+/*
+ *  ã¡ã¤ã³ã¿ã¹ã¯
+ */
+void main_task(intptr_t exinf)
+{
+	char	c;
+	ID		tskid = TASK1;
+	int_t	tskno = 1;
+	ER_UINT	ercd;
+	PRI		tskpri;
+#ifndef TASK_LOOP
+	volatile ulong_t	i;
+	SYSTIM	stime1, stime2;
+#endif /* TASK_LOOP */
+#ifdef TOPPERS_SUPPORT_GET_UTM
+	SYSUTM	utime1, utime2;
+#endif /* TOPPERS_SUPPORT_GET_UTM */
+
+	SVC_PERROR(syslog_msk_log(LOG_UPTO(LOG_INFO), LOG_UPTO(LOG_EMERG)));
+	syslog(LOG_NOTICE, "Sample program starts (exinf = %d).", (int_t) exinf);
+
+	/*
+	 *  ã·ãªã¢ã«ãã¼ãã®åæå
+	 *
+	 *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã¨åãã·ãªã¢ã«ãã¼ããä½¿ãå ´åãªã©ï¼ã·ãªã¢ã«
+	 *  ãã¼ãããªã¼ãã³æ¸ã¿ã®å ´åã«ã¯ããã§E_OBJã¨ã©ã¼ã«ãªããï¼æ¯éã¯
+	 *  ãªãï¼
+	 */
+	ercd = serial_opn_por(TASK_PORTID);
+	if (ercd < 0 && MERCD(ercd) != E_OBJ) {
+		syslog(LOG_ERROR, "%s (%d) reported by `serial_opn_por'.",
+									itron_strerror(ercd), SERCD(ercd));
+	}
+	SVC_PERROR(serial_ctl_por(TASK_PORTID,
+							(IOCTL_CRLF | IOCTL_FCSND | IOCTL_FCRCV)));
+
+	/*
+ 	 *  ã«ã¼ãåæ°ã®è¨­å®
+	 *
+	 *  ä¸¦è¡å®è¡ãããã¿ã¹ã¯å
+ã§ã®ç©ºã«ã¼ãã®åæ°ï¼task_loopï¼ã¯ï¼ç©ºã«ã¼
+	 *  ãã®å®è¡æéãç´0.4ç§ã«ãªãããã«è¨­å®ããï¼ãã®è¨­å®ã®ããã«ï¼
+	 *  LOOP_REFåã®ç©ºã«ã¼ãã®å®è¡æéãï¼ãã®åå¾ã§get_timãå¼ã¶ãã¨ã§
+	 *  æ¸¬å®ãï¼ãã®æ¸¬å®çµæããç©ºã«ã¼ãã®å®è¡æéã0.4ç§ã«ãªãã«ã¼ãå
+	 *  æ°ãæ±ãï¼task_loopã«è¨­å®ããï¼
+	 *
+	 *  LOOP_REFã¯ï¼ããã©ã«ãã§ã¯1,000,000ã«è¨­å®ãã¦ãããï¼æ³å®ããã
+	 *  ãé
+ããã­ã»ããµã§ã¯ï¼ãµã³ãã«ãã­ã°ã©ã ã®å®è¡éå§ã«æéããã
+	 *  ããããã¨ããåé¡ãçããï¼éã«æ³å®ããããéããã­ã»ããµã§ã¯ï¼
+	 *  LOOP_REFåã®ç©ºã«ã¼ãã®å®è¡æéãç­ããªãï¼task_loopã«è¨­å®ããå¤
+	 *  ã®èª¤å·®ãå¤§ãããªãã¨ããåé¡ãããï¼
+	 *
+	 *  ããã§ï¼ãã®ãããªã¿ã¼ã²ããã§ã¯ï¼target_test.hã§ï¼LOOP_REFãé©
+	 *  åãªå¤ã«å®ç¾©ããã®ãæã¾ããï¼
+	 *
+	 *  ã¾ãï¼task_loopã®å¤ãåºå®ãããå ´åã«ã¯ï¼ãã®å¤ãTASK_LOOPã«ã
+	 *  ã¯ã­å®ç¾©ããï¼TASK_LOOPããã¯ã­å®ç¾©ããã¦ããå ´åï¼ä¸è¨ã®æ¸¬å®ã
+	 *  è¡ããã«ï¼TASK_LOOPã«å®ç¾©ãããå¤ãç©ºã«ã¼ãã®åæ°ã¨ããï¼
+	 *
+	 * ã¿ã¼ã²ããã«ãã£ã¦ã¯ï¼ç©ºã«ã¼ãã®å®è¡æéã®1åç®ã®æ¸¬å®ã§ï¼æ¬æ¥ã
+	 * ããé·ãã«ãªããã®ãããï¼ãã®ãããªã¿ã¼ã²ããã§ã¯ï¼MEASURE_TWICE
+	 * ããã¯ã­å®ç¾©ãããã¨ã§ï¼1åç®ã®æ¸¬å®çµæãæ¨ã¦ã¦ï¼2åç®ã®æ¸¬å®çµæ
+	 * ãä½¿ãï¼
+	 *
+	 *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³å
+ã§ã®ç©ºã«ã¼ãã®åæ°ï¼tex_loopï¼ã¯ï¼
+	 *  task_loopã®4åã®1ã®å¤ï¼ç©ºã«ã¼ãã®å®è¡æéã0.1ç§ã«ãªãã«ã¼ãå
+	 *  æ°ï¼ã«è¨­å®ããï¼
+	 */
+#ifdef TASK_LOOP
+	task_loop = TASK_LOOP;
+#else /* TASK_LOOP */
+
+#ifdef MEASURE_TWICE
+	task_loop = LOOP_REF;
+	SVC_PERROR(get_tim(&stime1));
+	for (i = 0; i < task_loop; i++);
+	SVC_PERROR(get_tim(&stime2));
+#endif /* MEASURE_TWICE */
+
+	task_loop = LOOP_REF;
+	SVC_PERROR(get_tim(&stime1));
+	for (i = 0; i < task_loop; i++);
+	SVC_PERROR(get_tim(&stime2));
+	task_loop = LOOP_REF * 400UL / (stime2 - stime1);
+
+#endif /* TASK_LOOP */
+	tex_loop = task_loop / 4;
+
+	/*
+ 	 *  ã¿ã¹ã¯ã®èµ·å
+	 */
+	SVC_PERROR(act_tsk(TASK1));
+	SVC_PERROR(act_tsk(TASK2));
+	SVC_PERROR(act_tsk(TASK3));
+
+	/*
+ 	 *  ã¡ã¤ã³ã«ã¼ã
+	 */
+	do {
+		SVC_PERROR(serial_rea_dat(TASK_PORTID, &c, 1));
+		switch (c) {
+		case 'e':
+		case 's':
+		case 'S':
+		case 'd':
+		case 'y':
+		case 'Y':
+		case 'z':
+		case 'Z':
+			message[tskno-1] = c;
+			break;
+		case '1':
+			tskno = 1;
+			tskid = TASK1;
+			break;
+		case '2':
+			tskno = 2;
+			tskid = TASK2;
+			break;
+		case '3':
+			tskno = 3;
+			tskid = TASK3;
+			break;
+		case 'a':
+			syslog(LOG_INFO, "#act_tsk(%d)", tskno);
+			SVC_PERROR(act_tsk(tskid));
+			break;
+		case 'A':
+			syslog(LOG_INFO, "#can_act(%d)", tskno);
+			SVC_PERROR(ercd = can_act(tskid));
+			if (ercd >= 0) {
+				syslog(LOG_NOTICE, "can_act(%d) returns %d", tskno, ercd);
+			}
+			break;
+		case 't':
+			syslog(LOG_INFO, "#ter_tsk(%d)", tskno);
+			SVC_PERROR(ter_tsk(tskid));
+			break;
+		case '>':
+			syslog(LOG_INFO, "#chg_pri(%d, HIGH_PRIORITY)", tskno);
+			SVC_PERROR(chg_pri(tskid, HIGH_PRIORITY));
+			break;
+		case '=':
+			syslog(LOG_INFO, "#chg_pri(%d, MID_PRIORITY)", tskno);
+			SVC_PERROR(chg_pri(tskid, MID_PRIORITY));
+			break;
+		case '<':
+			syslog(LOG_INFO, "#chg_pri(%d, LOW_PRIORITY)", tskno);
+			SVC_PERROR(chg_pri(tskid, LOW_PRIORITY));
+			break;
+		case 'G':
+			syslog(LOG_INFO, "#get_pri(%d, &tskpri)", tskno);
+			SVC_PERROR(ercd = get_pri(tskid, &tskpri));
+			if (ercd >= 0) {
+				syslog(LOG_NOTICE, "priority of task %d is %d", tskno, tskpri);
+			}
+			break;
+		case 'w':
+			syslog(LOG_INFO, "#wup_tsk(%d)", tskno);
+			SVC_PERROR(wup_tsk(tskid));
+			break;
+		case 'W':
+			syslog(LOG_INFO, "#can_wup(%d)", tskno);
+			SVC_PERROR(ercd = can_wup(tskid));
+			if (ercd >= 0) {
+				syslog(LOG_NOTICE, "can_wup(%d) returns %d", tskno, ercd);
+			}
+			break;
+		case 'l':
+			syslog(LOG_INFO, "#rel_wai(%d)", tskno);
+			SVC_PERROR(rel_wai(tskid));
+			break;
+		case 'u':
+			syslog(LOG_INFO, "#sus_tsk(%d)", tskno);
+			SVC_PERROR(sus_tsk(tskid));
+			break;
+		case 'm':
+			syslog(LOG_INFO, "#rsm_tsk(%d)", tskno);
+			SVC_PERROR(rsm_tsk(tskid));
+			break;
+		case 'x':
+			syslog(LOG_INFO, "#ras_tex(%d, 0x0001U)", tskno);
+			SVC_PERROR(ras_tex(tskid, 0x0001U));
+			break;
+		case 'X':
+			syslog(LOG_INFO, "#ras_tex(%d, 0x0002U)", tskno);
+			SVC_PERROR(ras_tex(tskid, 0x0002U));
+			break;
+		case 'r':
+			syslog(LOG_INFO, "#rot_rdq(three priorities)");
+			SVC_PERROR(rot_rdq(HIGH_PRIORITY));
+			SVC_PERROR(rot_rdq(MID_PRIORITY));
+			SVC_PERROR(rot_rdq(LOW_PRIORITY));
+			break;
+		case 'c':
+			syslog(LOG_INFO, "#sta_cyc(1)");
+			SVC_PERROR(sta_cyc(CYCHDR1));
+			break;
+		case 'C':
+			syslog(LOG_INFO, "#stp_cyc(1)");
+			SVC_PERROR(stp_cyc(CYCHDR1));
+			break;
+		case 'b':
+			syslog(LOG_INFO, "#sta_alm(1, 5000)");
+			SVC_PERROR(sta_alm(ALMHDR1, 5000));
+			break;
+		case 'B':
+			syslog(LOG_INFO, "#stp_alm(1)");
+			SVC_PERROR(stp_alm(ALMHDR1));
+			break;
+
+		case 'V':
+#ifdef TOPPERS_SUPPORT_GET_UTM
+			SVC_PERROR(get_utm(&utime1));
+			SVC_PERROR(get_utm(&utime2));
+			syslog(LOG_NOTICE, "utime1 = %ld, utime2 = %ld",
+										(ulong_t) utime1, (ulong_t) utime2);
+#else /* TOPPERS_SUPPORT_GET_UTM */
+			syslog(LOG_NOTICE, "get_utm is not supported.");
+#endif /* TOPPERS_SUPPORT_GET_UTM */
+			break;
+
+		case 'v':
+			SVC_PERROR(syslog_msk_log(LOG_UPTO(LOG_INFO),
+										LOG_UPTO(LOG_EMERG)));
+			break;
+		case 'q':
+			SVC_PERROR(syslog_msk_log(LOG_UPTO(LOG_NOTICE),
+										LOG_UPTO(LOG_EMERG)));
+			break;
+
+#ifdef BIT_KERNEL
+		case ' ':
+			SVC_PERROR(loc_cpu());
+			{
+				extern ER	bit_kernel(void);
+
+				SVC_PERROR(ercd = bit_kernel());
+				if (ercd >= 0) {
+					syslog(LOG_NOTICE, "bit_kernel passed.");
+				}
+			}
+			SVC_PERROR(unl_cpu());
+			break;
+#endif /* BIT_KERNEL */
+
+		default:
+			break;
+		}
+	} while (c != '\003' && c != 'Q');
+
+	syslog(LOG_NOTICE, "Sample program ends.");
+	SVC_PERROR(ext_ker());
+	assert(0);
+}
Index: rtos_arduino/trunk/asp_1.9.2/sample/sample1.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/sample/sample1.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/sample/sample1.cfg	(revision 136)
@@ -0,0 +1,26 @@
+/*
+ *  $Id: sample1.cfg 2416 2012-09-07 08:06:20Z ertl-hiro $
+ */
+
+/*
+ *  ãµã³ãã«ãã­ã°ã©ã (1)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+INCLUDE("syssvc/logtask.cfg");
+
+#include "sample1.h"
+CRE_TSK(TASK1, { TA_NULL, 1, task, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK2, { TA_NULL, 2, task, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK3, { TA_NULL, 3, task, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(MAIN_TASK, { TA_ACT, 0, main_task, MAIN_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK1, { TA_NULL, tex_routine });
+DEF_TEX(TASK2, { TA_NULL, tex_routine });
+DEF_TEX(TASK3, { TA_NULL, tex_routine });
+CRE_CYC(CYCHDR1, { TA_NULL, 0, cyclic_handler, 2000, 0 });
+CRE_ALM(ALMHDR1, { TA_NULL, 0, alarm_handler });
+#ifdef CPUEXC1
+DEF_EXC(CPUEXC1, { TA_NULL, cpuexc_handler });
+#endif /* CPUEXC1 */
Index: rtos_arduino/trunk/asp_1.9.2/sample/sample1.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/sample/sample1.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/sample/sample1.h	(revision 136)
@@ -0,0 +1,112 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ *
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ *
+ *  $Id: sample1.h 2416 2012-09-07 08:06:20Z ertl-hiro $
+ */
+
+/*
+ *		ãµã³ãã«ãã­ã°ã©ã (1)ã®ããããã¡ã¤ã«
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+
+#define MAIN_PRIORITY	5		/* ã¡ã¤ã³ã¿ã¹ã¯ã®åªå
+åº¦ */
+								/* HIGH_PRIORITYããé«ããããã¨ */
+
+#define HIGH_PRIORITY	9		/* ä¸¦è¡å®è¡ãããã¿ã¹ã¯ã®åªå
+åº¦ */
+#define MID_PRIORITY	10
+#define LOW_PRIORITY	11
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+
+#ifndef TASK_PORTID
+#define	TASK_PORTID		1			/* æå­å
+¥åããã·ãªã¢ã«ãã¼ãID */
+#endif /* TASK_PORTID */
+
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+#ifndef LOOP_REF
+#define LOOP_REF		ULONG_C(1000000)	/* éåº¦è¨æ¸¬ç¨ã®ã«ã¼ãåæ° */
+#endif /* LOOP_REF */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	task(intptr_t exinf);
+extern void	main_task(intptr_t exinf);
+extern void	tex_routine(TEXPTN texptn, intptr_t exinf);
+#ifdef CPUEXC1
+extern void	cpuexc_handler(void *p_excinf);
+#endif /* CPUEXC1 */
+extern void	cyclic_handler(intptr_t exinf);
+extern void	alarm_handler(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/banner.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/banner.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/banner.c	(revision 136)
@@ -0,0 +1,87 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2014 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: banner.c 2594 2014-01-02 07:08:54Z ertl-hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºå
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include "target_syssvc.h"
+#include "banner.h"
+
+#ifndef TARGET_COPYRIGHT
+#define TARGET_COPYRIGHT
+#endif /* TARGET_COPYRIGHT */
+
+static const char banner[] = "\n"
+"TOPPERS/ASP Kernel Release %d.%X.%d for " TARGET_NAME
+" (" __DATE__ ", " __TIME__ ")\n"
+"Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory\n"
+"                            Toyohashi Univ. of Technology, JAPAN\n"
+"Copyright (C) 2004-2014 by Embedded and Real-Time Systems Laboratory\n"
+"            Graduate School of Information Science, Nagoya Univ., JAPAN\n"
+TARGET_COPYRIGHT;
+
+void
+print_banner(intptr_t exinf)
+{
+	syslog_3(LOG_NOTICE, banner,
+				(TKERNEL_PRVER >> 12) & 0x0fU,
+				(TKERNEL_PRVER >> 4) & 0xffU,
+				TKERNEL_PRVER & 0x0fU);
+}
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/banner.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/banner.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/banner.cfg	(revision 136)
@@ -0,0 +1,10 @@
+/*
+ *  @(#) $Id: banner.cfg 823 2008-03-18 13:02:11Z hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºåã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+
+#include "syssvc/banner.h"
+ATT_INI({ TA_NULL, 0, print_banner });
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/banner.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/banner.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/banner.h	(revision 136)
@@ -0,0 +1,68 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2008 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: banner.h 774 2008-03-08 06:35:57Z hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºå
+ */
+
+#ifndef TOPPERS_BANNER_H
+#define TOPPERS_BANNER_H
+
+/*
+ *  ã«ã¼ãã«èµ·åã¡ãã»ã¼ã¸ã®åºå
+ */
+extern void	print_banner(intptr_t exinf) throw();
+
+#endif /* TOPPERS_BANNER_H */
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/logtask.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/logtask.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/logtask.c	(revision 136)
@@ -0,0 +1,218 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: logtask.c 2246 2011-08-26 22:39:15Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã­ã°ã¿ã¹ã¯
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <log_output.h>
+#include "syssvc/serial.h"
+#include "syssvc/syslog.h"
+#include "logtask.h"
+
+/*
+ *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®åºåå
+ã®ãã¼ãID
+ */
+static ID	logtask_portid;
+
+/*
+ *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ã¸ã®1æå­åºå
+ */
+static void
+logtask_putc(char c)
+{
+	(void) serial_wri_dat(logtask_portid, &c, 1);
+}
+
+/*
+ *  ã·ã¹ãã ã­ã°åºåã®å¾
+ã¡åãã
+ */
+ER
+logtask_flush(uint_t count)
+{
+	T_SYSLOG_RLOG	rlog;
+	T_SERIAL_RPOR	rpor;
+	ER				ercd, rercd;
+
+	if (sns_dpn()) {
+		ercd = E_CTX;
+	}
+	else {
+		for (;;) {
+			if (syslog_ref_log(&rlog) < 0) {
+				ercd = E_SYS;
+				goto error_exit;
+			}
+			if (rlog.count <= count) {
+				if (count == 0U) {
+					/*
+					 *  countã0ã®å ´åã«ã¯ï¼ã·ãªã¢ã«ãããã¡ãç©ºããç¢º
+					 *  èªããï¼
+					 */
+					if (serial_ref_por(logtask_portid, &rpor) < 0) {
+						ercd = E_SYS;
+						goto error_exit;
+					}
+					if (rpor.wricnt == 0U) {
+						ercd = E_OK;
+						goto error_exit;
+					}
+				}
+				else {
+					ercd = E_OK;
+					goto error_exit;
+				}
+			}
+
+			/*
+			 *  LOGTASK_FLUSH_WAITããªç§å¾
+ã¤ï¼
+			 */
+			rercd = dly_tsk(LOGTASK_FLUSH_WAIT);
+			if (rercd < 0) {
+				ercd = (rercd == E_RLWAI) ? rercd : E_SYS;
+				goto error_exit;
+			}
+		}
+	}
+
+  error_exit:
+	return(ercd);
+}
+
+/*
+ *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®æ¬ä½
+ */
+void
+logtask_main(intptr_t exinf)
+{
+	SYSLOG	logbuf;
+	uint_t	lostlog;
+	ER_UINT	rercd;
+
+	logtask_portid = (ID) exinf;
+	(void) serial_opn_por(logtask_portid);
+	(void) syslog_msk_log(LOG_UPTO(LOG_NOTICE), LOG_UPTO(LOG_EMERG));
+	syslog_1(LOG_NOTICE, "System logging task is started on port %d.",
+													logtask_portid);
+	for (;;) {
+		lostlog = 0U;
+		while ((rercd = syslog_rea_log(&logbuf)) >= 0) {
+			lostlog += (uint_t) rercd;
+			if (logbuf.logtype >= LOG_TYPE_COMMENT) {
+				if (lostlog > 0U) {
+					syslog_lostmsg(lostlog, logtask_putc);
+					lostlog = 0U;
+				}
+				syslog_print(&logbuf, logtask_putc);
+				logtask_putc('\n');
+			}
+		}
+		if (lostlog > 0U) {
+			syslog_lostmsg(lostlog, logtask_putc);
+		}
+		(void) dly_tsk(LOGTASK_INTERVAL);
+	}
+}
+
+/*
+ *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®çµäºå¦ç
+ */
+void
+logtask_terminate(intptr_t exinf)
+{
+	char	c;
+	SYSLOG	logbuf;
+	bool_t	msgflg = false;
+	ER_UINT	rercd;
+
+	/*
+	 *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®éä¿¡ãããã¡ã«èç©ããããã¼ã¿
+	 *  ãï¼ä½ã¬ãã«åºåæ©è½ãç¨ãã¦åºåããï¼
+	 */
+	while (serial_get_chr(logtask_portid, &c)) {
+		target_fput_log(c);
+	}
+
+	/*
+	 *  ã­ã°ãããã¡ã«è¨é²ãããã­ã°æ
+å ±ãï¼ä½ã¬ãã«åºåæ©è½ãç¨ãã¦åº
+	 *  åããï¼
+	 */
+	while ((rercd = syslog_rea_log(&logbuf)) >= 0) {
+		if (!msgflg) {
+			/*
+			 *  ã­ã°ãããã¡ã«æ®ã£ãã­ã°æ
+å ±ã§ãããã¨ãç¤ºãæå­åãåº
+			 *  åããï¼
+			 */
+			syslog_printf("-- buffered messages --\n", NULL, target_fput_log);
+			msgflg = true;
+		}
+		if (rercd > 0) {
+			syslog_lostmsg((uint_t) rercd, target_fput_log);
+		}
+		if (logbuf.logtype >= LOG_TYPE_COMMENT) {
+			syslog_print(&logbuf, target_fput_log);
+			target_fput_log('\n');
+		}
+	}
+}
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/logtask.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/logtask.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/logtask.cfg	(revision 136)
@@ -0,0 +1,12 @@
+/*
+ *  @(#) $Id: logtask.cfg 823 2008-03-18 13:02:11Z hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+
+#include "syssvc/logtask.h"
+CRE_TSK(LOGTASK, { TA_ACT, LOGTASK_PORTID, logtask_main,
+						LOGTASK_PRIORITY, LOGTASK_STACK_SIZE, NULL });
+ATT_TER({ TA_NULL, 0, logtask_terminate });
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/logtask.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/logtask.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/logtask.h	(revision 136)
@@ -0,0 +1,121 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2008 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: logtask.h 774 2008-03-08 06:35:57Z hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã­ã°ã¿ã¹ã¯
+ */
+
+#ifndef TOPPERS_LOGTASK_H
+#define TOPPERS_LOGTASK_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "target_syssvc.h"
+
+/*
+ *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯é¢é£ã®å®æ°ã®ããã©ã«ãå¤ã®å®ç¾©
+ */ 
+#ifndef LOGTASK_PRIORITY
+#define LOGTASK_PRIORITY	3		/* åæåªå
+åº¦ */
+#endif /* LOGTASK_PRIORITY */
+
+#ifndef LOGTASK_STACK_SIZE
+#define LOGTASK_STACK_SIZE	1024	/* ã¹ã¿ãã¯é åã®ãµã¤ãº */
+#endif /* LOGTASK_STACK_SIZE */
+
+#ifndef LOGTASK_PORTID
+#define LOGTASK_PORTID		1		/* ã·ã¹ãã ã­ã°ç¨ã®ã·ãªã¢ã«ãã¼ãçªå· */
+#endif /* LOGTASK_PORTID */
+
+#ifndef LOGTASK_INTERVAL
+#define LOGTASK_INTERVAL	10U		/* ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®åä½ééï¼ããªç§ï¼*/
+#endif /* LOGTASK_INTERVAL */
+
+#ifndef LOGTASK_FLUSH_WAIT
+#define LOGTASK_FLUSH_WAIT	1U		/* ãã©ãã·ã¥å¾
+ã¡ã®åä½æéï¼ããªç§ï¼*/
+#endif /* LOGTASK_FLUSH_WAIT */
+
+/*
+ *  ã·ã¹ãã ã­ã°åºåã®å¾
+ã¡åãã
+ *
+ *  ã­ã°ãããã¡ä¸­ã®ã­ã°ã®æ°ãcountä»¥ä¸ã«ãªãã¾ã§å¾
+ã¤ï¼countã0ã®å ´åã«
+ *  ã¯ï¼ã·ãªã¢ã«ãããã¡ãç©ºã«ãªãã®ãå¾
+ã¤ï¼
+ */
+extern ER	logtask_flush(uint_t count) throw();
+
+/*
+ *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®æ¬ä½
+ */
+extern void	logtask_main(intptr_t exinf) throw();
+
+/*
+ *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã®çµäºå¦ç
+ */
+extern void	logtask_terminate(intptr_t exinf) throw();
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_LOGTASK_H */
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/serial.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/serial.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/serial.c	(revision 136)
@@ -0,0 +1,817 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2006-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: serial.c 2524 2013-09-15 17:40:06Z ertl-hiro $
+ */
+
+/*
+ *		ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ã
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include "target_syssvc.h"
+#include "target_serial.h"
+#include "serial.h"
+#include "kernel_cfg.h"
+
+/*
+ *  ãããã¡ãµã¤ãºã®ããã©ã«ãå¤ã¨ãããã¡ã®å®ç¾©
+ */
+#ifndef SERIAL_RCV_BUFSZ1
+#define	SERIAL_RCV_BUFSZ1	256			/* ãã¼ã1ã®åä¿¡ãããã¡ãµã¤ãº */
+#endif /* SERIAL_RCV_BUFSZ1 */
+
+#ifndef SERIAL_SND_BUFSZ1
+#define	SERIAL_SND_BUFSZ1	256			/* ãã¼ã1ã®éä¿¡ãããã¡ãµã¤ãº */
+#endif /* SERIAL_SND_BUFSZ1 */
+
+static char	rcv_buffer1[SERIAL_RCV_BUFSZ1];
+static char	snd_buffer1[SERIAL_SND_BUFSZ1];
+
+#if TNUM_PORT >= 2						/* ãã¼ã2ã«é¢ããå®ç¾© */
+
+#ifndef SERIAL_RCV_BUFSZ2
+#define	SERIAL_RCV_BUFSZ2	256			/* ãã¼ã2ã®åä¿¡ãããã¡ãµã¤ãº */
+#endif /* SERIAL_RCV_BUFSZ2 */
+
+#ifndef SERIAL_SND_BUFSZ2
+#define	SERIAL_SND_BUFSZ2	256			/* ãã¼ã2ã®éä¿¡ãããã¡ãµã¤ãº */
+#endif /* SERIAL_SND_BUFSZ2 */
+
+static char	rcv_buffer2[SERIAL_RCV_BUFSZ2];
+static char	snd_buffer2[SERIAL_SND_BUFSZ2];
+
+#endif /* TNUM_PORT >= 2 */
+
+#if TNUM_PORT >= 3						/* ãã¼ã3ã«é¢ããå®ç¾© */
+
+#ifndef SERIAL_RCV_BUFSZ3
+#define	SERIAL_RCV_BUFSZ3	256			/* ãã¼ã3ã®åä¿¡ãããã¡ãµã¤ãº */
+#endif /* SERIAL_RCV_BUFSZ3 */
+
+#ifndef SERIAL_SND_BUFSZ3
+#define	SERIAL_SND_BUFSZ3	256			/* ãã¼ã3ã®éä¿¡ãããã¡ãµã¤ãº */
+#endif /* SERIAL_SND_BUFSZ3 */
+
+static char	rcv_buffer3[SERIAL_RCV_BUFSZ3];
+static char	snd_buffer3[SERIAL_SND_BUFSZ3];
+
+#endif /* TNUM_PORT >= 3 */
+
+#if TNUM_PORT >= 4						/* ãã¼ã4ã«é¢ããå®ç¾© */
+
+#ifndef SERIAL_RCV_BUFSZ4
+#define	SERIAL_RCV_BUFSZ4	256			/* ãã¼ã4ã®åä¿¡ãããã¡ãµã¤ãº */
+#endif /* SERIAL_RCV_BUFSZ4 */
+
+#ifndef SERIAL_SND_BUFSZ4
+#define	SERIAL_SND_BUFSZ4	256			/* ãã¼ã4ã®éä¿¡ãããã¡ãµã¤ãº */
+#endif /* SERIAL_SND_BUFSZ4 */
+
+static char	rcv_buffer4[SERIAL_RCV_BUFSZ4];
+static char	snd_buffer4[SERIAL_SND_BUFSZ4];
+
+#endif /* TNUM_PORT >= 4 */
+
+#if TNUM_PORT >= 5
+#error Serial interface driver supports up to 4 ports.
+#endif /* TNUM_PORT >= 5 */
+
+/*
+ *  ãã­ã¼å¶å¾¡ã«é¢é£ããå®æ°ã¨ãã¯ã­
+ */
+#define	FC_STOP			'\023'		/* ã³ã³ãã­ã¼ã«-S */
+#define	FC_START		'\021'		/* ã³ã³ãã­ã¼ã«-Q */
+
+#define BUFCNT_STOP(bufsz)		((bufsz) * 3 / 4)	/* STOPãéãåºæºæå­æ° */
+#define BUFCNT_START(bufsz)		((bufsz) / 2)		/* STARTãéãåºæºæå­æ° */
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãåæåãã­ãã¯
+ */
+typedef struct serial_port_initialization_block {
+	ID		rcv_semid;		/* åä¿¡ãããã¡ç®¡çç¨ã»ããã©ã®ID */
+	ID		snd_semid;		/* éä¿¡ãããã¡ç®¡çç¨ã»ããã©ã®ID */
+	uint_t	rcv_bufsz;		/* åä¿¡ãããã¡ãµã¤ãº */
+	char	*rcv_buffer;	/* åä¿¡ãããã¡ */
+	uint_t	snd_bufsz;		/* éä¿¡ãããã¡ãµã¤ãº */
+	char	*snd_buffer;	/* éä¿¡ãããã¡ */
+} SPINIB;
+
+static const SPINIB spinib_table[TNUM_PORT] = {
+	{ SERIAL_RCV_SEM1, SERIAL_SND_SEM1,
+	  SERIAL_RCV_BUFSZ1, rcv_buffer1,
+	  SERIAL_SND_BUFSZ1, snd_buffer1 },
+#if TNUM_PORT >= 2
+	{ SERIAL_RCV_SEM2, SERIAL_SND_SEM2,
+	  SERIAL_RCV_BUFSZ2, rcv_buffer2,
+	  SERIAL_SND_BUFSZ2, snd_buffer2 },
+#endif /* TNUM_PORT >= 2 */
+#if TNUM_PORT >= 3
+	{ SERIAL_RCV_SEM3, SERIAL_SND_SEM3,
+	  SERIAL_RCV_BUFSZ3, rcv_buffer3,
+	  SERIAL_SND_BUFSZ3, snd_buffer3 },
+#endif /* TNUM_PORT >= 3 */
+#if TNUM_PORT >= 4
+	{ SERIAL_RCV_SEM4, SERIAL_SND_SEM4,
+	  SERIAL_RCV_BUFSZ4, rcv_buffer4,
+	  SERIAL_SND_BUFSZ4, snd_buffer4 },
+#endif /* TNUM_PORT >= 4 */
+};
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãç®¡çãã­ãã¯
+ */
+typedef struct serial_port_control_block {
+	const SPINIB *p_spinib;		/* ã·ãªã¢ã«ãã¼ãåæåãã­ãã¯ */
+	SIOPCB	*p_siopcb;			/* ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ */
+	bool_t	openflag;			/* ãªã¼ãã³æ¸ã¿ãã©ã° */
+	bool_t	errorflag;			/* ã¨ã©ã¼ãã©ã° */
+	uint_t	ioctl;				/* åä½å¶å¾¡ã®è¨­å®å¤ */
+
+	uint_t	rcv_read_ptr;		/* åä¿¡ãããã¡èª­åºããã¤ã³ã¿ */
+	uint_t	rcv_write_ptr;		/* åä¿¡ãããã¡æ¸è¾¼ã¿ãã¤ã³ã¿ */
+	uint_t	rcv_count;			/* åä¿¡ãããã¡ä¸­ã®æå­æ° */
+	char	rcv_fc_chr;			/* éãã¹ãSTART/STOP */
+	bool_t	rcv_stopped;		/* STOPãéã£ãç¶æ
+ãï¼ */
+
+	uint_t	snd_read_ptr;		/* éä¿¡ãããã¡èª­åºããã¤ã³ã¿ */
+	uint_t	snd_write_ptr;		/* éä¿¡ãããã¡æ¸è¾¼ã¿ãã¤ã³ã¿ */
+	uint_t	snd_count;			/* éä¿¡ãããã¡ä¸­ã®æå­æ° */
+	bool_t	snd_stopped;		/* STOPãåãåã£ãç¶æ
+ãï¼ */
+} SPCB;
+
+static SPCB	spcb_table[TNUM_PORT];
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãIDããã·ãªã¢ã«ãã¼ãç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_PORT(portid)	((uint_t)((portid) - 1))
+#define get_spcb(portid)	(&(spcb_table[INDEX_PORT(portid)]))
+
+/*
+ *  ãã¤ã³ã¿ã®ã¤ã³ã¯ãªã¡ã³ã
+ */
+#define INC_PTR(ptr, bufsz) do {	\
+	if (++(ptr) == (bufsz)) {		\
+		(ptr) = 0;					\
+	 }								\
+} while (false)
+
+/*
+ *  ãµã¼ãã¹ã³ã¼ã«å¼åºããã¯ã­
+ *
+ *  ãµã¼ãã¹ã³ã¼ã«å¼åºããå«ãå¼expãè©ä¾¡ãï¼è¿å¤ãã¨ã©ã¼ï¼è² ã®å¤ï¼ã®å ´
+ *  åã«ã¯ï¼ercã«ercd_expãè©ä¾¡ããå¤ãä»£å
+¥ãï¼error_exitã«gotoããï¼
+ */
+#define SVC(exp, ercd_exp) do {		\
+	if ((exp) < 0) {				\
+		ercd = (ercd_exp);			\
+		goto error_exit;			\
+	}								\
+} while (false)
+
+/*
+ *  E_SYSã¨ã©ã¼ã®çæ
+ */
+static ER
+gen_ercd_sys(SPCB *p_spcb)
+{
+	p_spcb->errorflag = true;
+	return(E_SYS);
+}
+
+/*
+ *  å¾
+ã¡ã«å
+¥ããµã¼ãã¹ã³ã¼ã«ããã®ã¨ã©ã¼ã®å¤æ
+ */
+static ER
+gen_ercd_wait(ER rercd, SPCB *p_spcb)
+{
+	switch (MERCD(rercd)) {
+	case E_RLWAI:
+	case E_DLT:
+		return(rercd);
+	default:
+		p_spcb->errorflag = true;
+		return(E_SYS);
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®åæåã«ã¼ãã³
+ */
+void
+serial_initialize(intptr_t exinf)
+{
+	uint_t	i;
+	SPCB	*p_spcb;
+
+	for (i = 0; i < TNUM_PORT; i++) {
+		p_spcb = &(spcb_table[i]);
+		p_spcb->p_spinib = &(spinib_table[i]);
+		p_spcb->openflag = false;
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãã®ãªã¼ãã³ï¼ãµã¼ãã¹ã³ã¼ã«ï¼
+ */
+ER
+serial_opn_por(ID portid)
+{
+	SPCB	*p_spcb;
+	ER		ercd;
+
+	if (sns_dpn()) {				/* ã³ã³ãã­ã¹ãã®ãã§ãã¯ */
+		return(E_CTX);
+	}
+	if (!(1 <= portid && portid <= TNUM_PORT)) {
+		return(E_ID);				/* ãã¼ãçªå·ã®ãã§ãã¯ */
+	}
+	p_spcb = get_spcb(portid);
+
+	SVC(dis_dsp(), gen_ercd_sys(p_spcb));
+	if (p_spcb->openflag) {			/* ãªã¼ãã³æ¸ã¿ãã®ãã§ãã¯ */
+		ercd = E_OBJ;
+	}
+	else {
+		/*
+		 *  å¤æ°ã®åæå
+		 */
+		p_spcb->ioctl = (IOCTL_ECHO | IOCTL_CRLF | IOCTL_FCSND | IOCTL_FCRCV);
+
+		p_spcb->rcv_read_ptr = 0U;
+		p_spcb->rcv_write_ptr = 0U;
+		p_spcb->rcv_count = 0U;
+		p_spcb->rcv_fc_chr = '\0';
+		p_spcb->rcv_stopped = false;
+
+		p_spcb->snd_read_ptr = 0U;
+		p_spcb->snd_write_ptr = 0U;
+		p_spcb->snd_count = 0U;
+		p_spcb->snd_stopped = false;
+
+		/*
+		 *  ããä»¥éï¼å²è¾¼ã¿ãç¦æ­¢ããï¼
+		 */
+		if (loc_cpu() < 0) {
+			ercd = E_SYS;
+			goto error_exit_enadsp;
+		}
+
+		/*
+		 *  ãã¼ãã¦ã§ã¢ä¾å­ã®ãªã¼ãã³å¦ç
+		 */
+		p_spcb->p_siopcb = sio_opn_por(portid, (intptr_t) p_spcb);
+
+		/*
+		 *  åä¿¡éç¥ã³ã¼ã«ããã¯ãè¨±å¯ããï¼
+		 */
+		sio_ena_cbr(p_spcb->p_siopcb, SIO_RDY_RCV);
+		p_spcb->openflag = true;
+		p_spcb->errorflag = false;
+
+		if (unl_cpu() < 0) {
+			p_spcb->errorflag = true;
+			ercd = E_SYS;
+			goto error_exit_enadsp;
+		}
+		ercd = E_OK;
+	}
+
+  error_exit_enadsp:
+	SVC(ena_dsp(), gen_ercd_sys(p_spcb));
+
+  error_exit:
+	return(ercd);
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãã®ã¯ã­ã¼ãºï¼ãµã¼ãã¹ã³ã¼ã«ï¼
+ */
+ER
+serial_cls_por(ID portid)
+{
+	SPCB	*p_spcb;
+	ER		ercd;
+	bool_t	eflag = false;
+
+	if (sns_dpn()) {				/* ã³ã³ãã­ã¹ãã®ãã§ãã¯ */
+		return(E_CTX);
+	}
+	if (!(1 <= portid && portid <= TNUM_PORT)) {
+		return(E_ID);				/* ãã¼ãçªå·ã®ãã§ãã¯ */
+	}
+	p_spcb = get_spcb(portid);
+
+	SVC(dis_dsp(), gen_ercd_sys(p_spcb));
+	if (!(p_spcb->openflag)) {		/* ãªã¼ãã³æ¸ã¿ãã®ãã§ãã¯ */
+		ercd = E_OBJ;
+	}
+	else {
+		/*
+		 *  ãã¼ãã¦ã§ã¢ä¾å­ã®ã¯ã­ã¼ãºå¦ç
+		 */
+		if (loc_cpu() < 0) {
+			eflag = true;
+		}
+		sio_cls_por(p_spcb->p_siopcb);
+		p_spcb->openflag = false;
+		if (unl_cpu() < 0) {
+			eflag = true;
+		}
+
+		/*
+		 *  ã»ããã©ã®åæå
+		 */
+		if (ini_sem(p_spcb->p_spinib->snd_semid) < 0) {
+			eflag = true;
+		}
+		if (ini_sem(p_spcb->p_spinib->rcv_semid) < 0) {
+			eflag = true;
+		}
+
+		/*
+		 *  ã¨ã©ã¼ã³ã¼ãã®è¨­å®
+		 */
+		if (eflag) {
+			ercd = gen_ercd_sys(p_spcb);
+		}
+		else {
+			ercd = E_OK;
+		}
+	}
+	SVC(ena_dsp(), gen_ercd_sys(p_spcb));
+
+  error_exit:
+	return(ercd);
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãã¸ã®æå­éä¿¡
+ *
+ *  p_spcbã§æå®ãããã·ãªã¢ã«I/Oãã¼ãã«å¯¾ãã¦ï¼æå­cãéä¿¡ããï¼æå­
+ *  ãéä¿¡ã¬ã¸ã¹ã¿ã«ãããå ´åã«ã¯trueãè¿ãï¼ããã§ãªãå ´åã«ã¯ï¼éä¿¡
+ *  ã¬ã¸ã¹ã¿ãç©ºãããã¨ãéç¥ããã³ã¼ã«ããã¯é¢æ°ãè¨±å¯ãï¼falseãè¿ãï¼
+ *  ãã®é¢æ°ã¯ï¼CPUã­ãã¯ç¶æ
+ã§å¼ã³åºãããï¼
+ */
+Inline bool_t
+serial_snd_chr(SPCB *p_spcb, char c)
+{
+	if (sio_snd_chr(p_spcb->p_siopcb, c)) {
+		return(true);
+	}
+	else {
+		sio_ena_cbr(p_spcb->p_siopcb, SIO_RDY_SND);
+		return(false);
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãã¸ã®1æå­éä¿¡
+ */
+static ER_BOOL
+serial_wri_chr(SPCB *p_spcb, char c)
+{
+	bool_t	buffer_full;
+	ER		ercd, rercd;
+
+	/*
+	 *  LFã®åã«CRãéä¿¡ããï¼
+	 */
+	if (c == '\n' && (p_spcb->ioctl & IOCTL_CRLF) != 0U) {
+		/*
+		 *  ä»¥ä¸ã®ã³ã¼ãã¯åå¸°å¼åºãã«ãªã£ã¦ãããï¼å¼æ°cã'\n'ã®å ´åã«
+		 *  å¼æ°cã'\r'ã¨ãã¦å¼ã³åºããã¨ããï¼ãã®åå¸°å¼åºãã¯2åç®ã®
+		 *  å¼ã³åºãã§å¿
+ãæ­¢ã¾ãï¼
+		 */
+		SVC(rercd = serial_wri_chr(p_spcb, '\r'), rercd);
+		if ((bool_t) rercd) {
+			SVC(rercd = wai_sem(p_spcb->p_spinib->snd_semid),
+										gen_ercd_wait(rercd, p_spcb));
+		}
+	}
+
+	SVC(loc_cpu(), gen_ercd_sys(p_spcb));
+	if (p_spcb->snd_count == 0U && !(p_spcb->snd_stopped)
+								&& serial_snd_chr(p_spcb, c)) {
+		/*
+		 *  ã·ãªã¢ã«I/Oããã¤ã¹ã®éä¿¡ã¬ã¸ã¹ã¿ã«æå­ãå
+¥ãããã¨ã«æåã
+		 *  ãå ´åï¼
+		 */
+		buffer_full = false;
+	}
+	else {
+		/*
+		 *  éä¿¡ãããã¡ã«æå­ãå
+¥ããï¼
+		 */
+		p_spcb->p_spinib->snd_buffer[p_spcb->snd_write_ptr] = c;
+		INC_PTR(p_spcb->snd_write_ptr, p_spcb->p_spinib->snd_bufsz);
+		p_spcb->snd_count++;
+		buffer_full = (p_spcb->snd_count == p_spcb->p_spinib->snd_bufsz);
+	}
+
+	SVC(unl_cpu(), gen_ercd_sys(p_spcb));
+	ercd = (ER_BOOL) buffer_full;
+
+  error_exit:
+	return(ercd);
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãã¸ã®æå­åéä¿¡ï¼ãµã¼ãã¹ã³ã¼ã«ï¼
+ */
+ER_UINT
+serial_wri_dat(ID portid, const char *buf, uint_t len)
+{
+	SPCB	*p_spcb;
+	bool_t	buffer_full;
+	uint_t	wricnt = 0U;
+	ER		ercd, rercd;
+
+	if (sns_dpn()) {				/* ã³ã³ãã­ã¹ãã®ãã§ãã¯ */
+		return(E_CTX);
+	}
+	if (!(1 <= portid && portid <= TNUM_PORT)) {
+		return(E_ID);				/* ãã¼ãçªå·ã®ãã§ãã¯ */
+	}
+
+	p_spcb = get_spcb(portid);
+	if (!(p_spcb->openflag)) {		/* ãªã¼ãã³æ¸ã¿ãã®ãã§ãã¯ */
+		return(E_OBJ);
+	}
+	if (p_spcb->errorflag) {		/* ã¨ã©ã¼ç¶æ
+ãã®ãã§ãã¯ */
+		return(E_SYS);
+	}
+
+	buffer_full = true;				/* ã«ã¼ãã®1åãã¯wai_semãã */
+	while (wricnt < len) {
+		if (buffer_full) {
+			SVC(rercd = wai_sem(p_spcb->p_spinib->snd_semid),
+										gen_ercd_wait(rercd, p_spcb));
+		}
+		SVC(rercd = serial_wri_chr(p_spcb, *buf++), rercd);
+		wricnt++;
+		buffer_full = (bool_t) rercd;
+	}
+	if (!buffer_full) {
+		SVC(sig_sem(p_spcb->p_spinib->snd_semid), gen_ercd_sys(p_spcb));
+	}
+	ercd = E_OK;
+
+  error_exit:
+	return(wricnt > 0U ? (ER_UINT) wricnt : ercd);
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãããã®1æå­åä¿¡
+ */
+static bool_t
+serial_rea_chr(SPCB *p_spcb, char *p_c)
+{
+	bool_t	buffer_empty;
+	ER		ercd;
+
+	SVC(loc_cpu(), gen_ercd_sys(p_spcb));
+
+	/*
+	 *  åä¿¡ãããã¡ããæå­ãåãåºãï¼
+	 */
+	*p_c = p_spcb->p_spinib->rcv_buffer[p_spcb->rcv_read_ptr];
+	INC_PTR(p_spcb->rcv_read_ptr, p_spcb->p_spinib->rcv_bufsz);
+	p_spcb->rcv_count--;
+	buffer_empty = (p_spcb->rcv_count == 0U);
+
+	/*
+	 *  STARTãéä¿¡ããï¼
+	 */
+	if (p_spcb->rcv_stopped && p_spcb->rcv_count
+								<= BUFCNT_START(p_spcb->p_spinib->rcv_bufsz)) {
+		if (!serial_snd_chr(p_spcb, FC_START)) {
+			p_spcb->rcv_fc_chr = FC_START;
+		}
+		p_spcb->rcv_stopped = false;
+	}
+
+	SVC(unl_cpu(), gen_ercd_sys(p_spcb));
+	ercd = (ER_BOOL) buffer_empty;
+
+  error_exit:
+	return(ercd);
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãããã®æå­ååä¿¡ï¼ãµã¼ãã¹ã³ã¼ã«ï¼
+ */
+ER_UINT
+serial_rea_dat(ID portid, char *buf, uint_t len)
+{
+	SPCB	*p_spcb;
+	bool_t	buffer_empty;
+	uint_t	reacnt = 0U;
+	char	c = '\0';		/* ã³ã³ãã¤ã©ã®è­¦åãææ­¢ããããã«åæåãã */
+	ER		ercd, rercd;
+
+	if (sns_dpn()) {				/* ã³ã³ãã­ã¹ãã®ãã§ãã¯ */
+		return(E_CTX);
+	}
+	if (!(1 <= portid && portid <= TNUM_PORT)) {
+		return(E_ID);				/* ãã¼ãçªå·ã®ãã§ãã¯ */
+	}
+
+	p_spcb = get_spcb(portid);
+	if (!(p_spcb->openflag)) {		/* ãªã¼ãã³æ¸ã¿ãã®ãã§ãã¯ */
+		return(E_OBJ);
+	}
+	if (p_spcb->errorflag) {		/* ã¨ã©ã¼ç¶æ
+ãã®ãã§ãã¯ */
+		return(E_SYS);
+	}
+
+	buffer_empty = true;			/* ã«ã¼ãã®1åãã¯wai_semãã */
+	while (reacnt < len) {
+		if (buffer_empty) {
+			SVC(rercd = wai_sem(p_spcb->p_spinib->rcv_semid),
+										gen_ercd_wait(rercd, p_spcb));
+		}
+		SVC(rercd = serial_rea_chr(p_spcb, &c), rercd);
+		*buf++ = c;
+		reacnt++;
+		buffer_empty = (bool_t) rercd;
+
+		/*
+		 *  ã¨ã³ã¼ããã¯å¦çï¼
+		 */
+		if ((p_spcb->ioctl & IOCTL_ECHO) != 0U) {
+			SVC(rercd = wai_sem(p_spcb->p_spinib->snd_semid),
+										gen_ercd_wait(rercd, p_spcb));
+			SVC(rercd = serial_wri_chr(p_spcb, c), rercd);
+			if (!((bool_t) rercd)) {
+				SVC(sig_sem(p_spcb->p_spinib->snd_semid),
+										gen_ercd_sys(p_spcb));
+			}
+		}
+	}
+	if (!buffer_empty) {
+		SVC(sig_sem(p_spcb->p_spinib->rcv_semid), gen_ercd_sys(p_spcb));
+	}
+	ercd = E_OK;
+
+  error_exit:
+	return(reacnt > 0U ? (ER_UINT) reacnt : ercd);
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãã®å¶å¾¡ï¼ãµã¼ãã¹ã³ã¼ã«ï¼
+ */
+ER
+serial_ctl_por(ID portid, uint_t ioctl)
+{
+	SPCB	*p_spcb;
+
+	if (sns_dpn()) {				/* ã³ã³ãã­ã¹ãã®ãã§ãã¯ */
+		return(E_CTX);
+	}
+	if (!(1 <= portid && portid <= TNUM_PORT)) {
+		return(E_ID);				/* ãã¼ãçªå·ã®ãã§ãã¯ */
+	}
+
+	p_spcb = get_spcb(portid);
+	if (!(p_spcb->openflag)) {		/* ãªã¼ãã³æ¸ã¿ãã®ãã§ãã¯ */
+		return(E_OBJ);
+	}
+	if (p_spcb->errorflag) {		/* ã¨ã©ã¼ç¶æ
+ãã®ãã§ãã¯ */
+		return(E_SYS);
+	}
+
+	p_spcb->ioctl = ioctl;
+	return(E_OK);
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãç¶æ
+ã®åç
+§ï¼ãµã¼ãã¹ã³ã¼ã«ï¼
+ */
+ER
+serial_ref_por(ID portid, T_SERIAL_RPOR *pk_rpor)
+{
+	SPCB	*p_spcb;
+
+	if (sns_dpn()) {				/* ã³ã³ãã­ã¹ãã®ãã§ãã¯ */
+		return(E_CTX);
+	}
+	if (!(1 <= portid && portid <= TNUM_PORT)) {
+		return(E_ID);				/* ãã¼ãçªå·ã®ãã§ãã¯ */
+	}
+
+	p_spcb = get_spcb(portid);
+	if (!(p_spcb->openflag)) {		/* ãªã¼ãã³æ¸ã¿ãã®ãã§ãã¯ */
+		return(E_OBJ);
+	}
+	if (p_spcb->errorflag) {		/* ã¨ã©ã¼ç¶æ
+ãã®ãã§ãã¯ */
+		return(E_SYS);
+	}
+
+	pk_rpor->reacnt = p_spcb->rcv_count;
+	pk_rpor->wricnt = p_spcb->snd_count;
+	return(E_OK);
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãããã®éä¿¡å¯è½ã³ã¼ã«ããã¯
+ */
+void
+sio_irdy_snd(intptr_t exinf)
+{
+	SPCB	*p_spcb;
+
+	p_spcb = (SPCB *) exinf;
+	if (p_spcb->rcv_fc_chr != '\0') {
+		/*
+		 *  START/STOP ãéä¿¡ããï¼
+		 */
+		(void) sio_snd_chr(p_spcb->p_siopcb, p_spcb->rcv_fc_chr);
+		p_spcb->rcv_fc_chr = '\0';
+	}
+	else if (!(p_spcb->snd_stopped) && p_spcb->snd_count > 0U) {
+		/*
+		 *  éä¿¡ãããã¡ä¸­ããæå­ãåãåºãã¦éä¿¡ããï¼
+		 */
+		(void) sio_snd_chr(p_spcb->p_siopcb,
+					p_spcb->p_spinib->snd_buffer[p_spcb->snd_read_ptr]);
+		INC_PTR(p_spcb->snd_read_ptr, p_spcb->p_spinib->snd_bufsz);
+		if (p_spcb->snd_count == p_spcb->p_spinib->snd_bufsz) {
+			if (isig_sem(p_spcb->p_spinib->snd_semid) < 0) {
+				p_spcb->errorflag = true;
+			}
+		}
+		p_spcb->snd_count--;
+	}
+	else {
+		/*
+		 *  éä¿¡ãã¹ãæå­ããªãå ´åã¯ï¼éä¿¡å¯è½ã³ã¼ã«ããã¯ãç¦æ­¢ããï¼
+		 */
+		sio_dis_cbr(p_spcb->p_siopcb, SIO_RDY_SND);
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãããã®åä¿¡éç¥ã³ã¼ã«ããã¯
+ */
+void
+sio_irdy_rcv(intptr_t exinf)
+{
+	SPCB	*p_spcb;
+	char	c;
+
+	p_spcb = (SPCB *) exinf;
+	c = (char) sio_rcv_chr(p_spcb->p_siopcb);
+	if ((p_spcb->ioctl & IOCTL_FCSND) != 0U && c == FC_STOP) {
+		/*
+		 *  éä¿¡ãä¸æåæ­¢ããï¼éä¿¡ä¸­ã®æå­ã¯ãã®ã¾ã¾éä¿¡ããï¼
+		 */
+		p_spcb->snd_stopped = true;
+	}
+	else if (p_spcb->snd_stopped && (c == FC_START
+				|| (p_spcb->ioctl & IOCTL_FCANY) != 0U)) {
+		/*
+		 *  éä¿¡ãåéããï¼
+		 */
+		p_spcb->snd_stopped = false;
+		if (p_spcb->snd_count > 0U) {
+			c = p_spcb->p_spinib->snd_buffer[p_spcb->snd_read_ptr];
+			if (serial_snd_chr(p_spcb, c)) {
+				INC_PTR(p_spcb->snd_read_ptr, p_spcb->p_spinib->snd_bufsz);
+				if (p_spcb->snd_count == p_spcb->p_spinib->snd_bufsz) {
+					if (isig_sem(p_spcb->p_spinib->snd_semid) < 0) {
+						p_spcb->errorflag = true;
+					}
+				}
+				p_spcb->snd_count--;
+			}
+		}
+	}
+	else if ((p_spcb->ioctl & IOCTL_FCSND) != 0U && c == FC_START) {
+		/*
+		 *  éä¿¡ã«å¯¾ãã¦ãã­ã¼å¶å¾¡ãã¦ããå ´åï¼START ã¯æ¨ã¦ãï¼
+		 */
+	}
+	else if (p_spcb->rcv_count == p_spcb->p_spinib->rcv_bufsz) {
+		/*
+		 *  ãããã¡ãã«ã®å ´åï¼åä¿¡ããæå­ãæ¨ã¦ãï¼
+		 */
+	}
+	else {
+		/*
+		 *  åä¿¡ããæå­ãåä¿¡ãããã¡ã«å
+¥ããï¼
+		 */
+		p_spcb->p_spinib->rcv_buffer[p_spcb->rcv_write_ptr] = c;
+		INC_PTR(p_spcb->rcv_write_ptr, p_spcb->p_spinib->rcv_bufsz);
+		if (p_spcb->rcv_count == 0U) {
+			if (isig_sem(p_spcb->p_spinib->rcv_semid) < 0) {
+				p_spcb->errorflag = true;
+			}
+		}
+		p_spcb->rcv_count++;
+
+		/*
+		 *  STOPãéä¿¡ããï¼
+		 */
+		if ((p_spcb->ioctl & IOCTL_FCRCV) != 0U && !(p_spcb->rcv_stopped)
+						&& p_spcb->rcv_count
+							>= BUFCNT_STOP(p_spcb->p_spinib->rcv_bufsz)) {
+			if (!serial_snd_chr(p_spcb, FC_STOP)) {
+				p_spcb->rcv_fc_chr = FC_STOP;
+			}
+			p_spcb->rcv_stopped = true;
+		}
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãããã®æªéä¿¡æå­ã®ååºã
+ */
+bool_t
+serial_get_chr(ID portid, char *p_c)
+{
+	SPCB	*p_spcb;
+
+	if (1 <= portid && portid <= TNUM_PORT) {	/* ãã¼ãçªå·ã®ãã§ãã¯ */
+		p_spcb = get_spcb(portid);
+		if (p_spcb->openflag) {					/* ãªã¼ãã³æ¸ã¿ãã®ãã§ãã¯ */
+			if (p_spcb->snd_count > 0U) {
+				*p_c = p_spcb->p_spinib->snd_buffer[p_spcb->snd_read_ptr];
+				INC_PTR(p_spcb->snd_read_ptr, p_spcb->p_spinib->snd_bufsz);
+				p_spcb->snd_count--;
+				return(true);
+			}
+		}
+	}
+	return(false);
+}
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/serial.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/serial.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/serial.cfg	(revision 136)
@@ -0,0 +1,28 @@
+/*
+ *  @(#) $Id: serial.cfg 2060 2011-04-10 15:36:38Z ertl-hiro $
+ */
+
+/*
+ *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+
+#include "target_syssvc.h"
+INCLUDE("target_serial.cfg");
+
+#include "syssvc/serial.h"
+ATT_INI({ TA_NULL, 0, serial_initialize });
+
+CRE_SEM(SERIAL_RCV_SEM1, { TA_TPRI, 0, 1 });
+CRE_SEM(SERIAL_SND_SEM1, { TA_TPRI, 1, 1 });
+#if TNUM_PORT >= 2
+CRE_SEM(SERIAL_RCV_SEM2, { TA_TPRI, 0, 1 });
+CRE_SEM(SERIAL_SND_SEM2, { TA_TPRI, 1, 1 });
+#endif /* TNUM_PORT >= 2 */
+#if TNUM_PORT >= 3
+CRE_SEM(SERIAL_RCV_SEM3, { TA_TPRI, 0, 1 });
+CRE_SEM(SERIAL_SND_SEM3, { TA_TPRI, 1, 1 });
+#endif /* TNUM_PORT >= 3 */
+#if TNUM_PORT >= 4
+CRE_SEM(SERIAL_RCV_SEM4, { TA_TPRI, 0, 1 });
+CRE_SEM(SERIAL_SND_SEM4, { TA_TPRI, 1, 1 });
+#endif /* TNUM_PORT >= 4 */
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/serial.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/serial.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/serial.h	(revision 136)
@@ -0,0 +1,113 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: serial.h 2246 2011-08-26 22:39:15Z ertl-hiro $
+ */
+
+/*
+ *		ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ã
+ */
+
+#ifndef TOPPERS_SERIAL_H
+#define TOPPERS_SERIAL_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®ç¨ãããã±ãã
+ */
+typedef struct {
+	uint_t		reacnt;			/* åä¿¡ãããã¡ä¸­ã®æå­æ° */
+	uint_t		wricnt;			/* éä¿¡ãããã¡ä¸­ã®æå­æ° */
+} T_SERIAL_RPOR;
+
+/*
+ *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®åæåã«ã¼ãã³
+ */
+extern void		serial_initialize(intptr_t exinf) throw();
+
+/*
+ *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãããã®æªéä¿¡æå­ã®ååºã
+ */
+extern bool_t	serial_get_chr(ID portid, char *p_c) throw();
+
+/*
+ *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®ãµã¼ãã¹ã³ã¼ã«
+ */
+extern ER		serial_opn_por(ID portid) throw();
+extern ER		serial_cls_por(ID portid) throw();
+extern ER_UINT	serial_rea_dat(ID portid, char *buf, uint_t len) throw();
+extern ER_UINT	serial_wri_dat(ID portid, const char *buf, uint_t len) throw();
+extern ER		serial_ctl_por(ID portid, uint_t ioctl) throw();
+extern ER		serial_ref_por(ID portid, T_SERIAL_RPOR *pk_rpor) throw();
+
+/*
+ *  ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ãã©ã¤ãã®åä½å¶å¾¡ç¨ã®ããã®å®æ°
+ *
+ *  ä»¥ä¸ã®å®æ°ã¯ï¼ãããæ¯ã«è«çåãã¨ã£ã¦ç¨ããï¼
+ */
+#define	IOCTL_NULL	0U			/* æå®ãªã */
+#define	IOCTL_ECHO	0x0001U		/* åä¿¡ããæå­ãã¨ã³ã¼ããã¯ */
+#define	IOCTL_CRLF	0x0010U		/* LFãéä¿¡ããåã«CRãä»å  */
+#define	IOCTL_FCSND	0x0100U		/* éä¿¡ã«å¯¾ãã¦ãã­ã¼å¶å¾¡ãè¡ã */
+#define	IOCTL_FCANY	0x0200U		/* ã©ã®ãããªæå­ã§ãéä¿¡åé */
+#define	IOCTL_FCRCV	0x0400U		/* åä¿¡ã«å¯¾ãã¦ãã­ã¼å¶å¾¡ãè¡ã */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_SERIAL_H */
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/syslog.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/syslog.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/syslog.c	(revision 136)
@@ -0,0 +1,270 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: syslog.c 2247 2011-08-26 22:59:55Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã­ã°æ©è½
+ */
+
+#include <sil.h>
+#undef TOPPERS_OMIT_SYSLOG
+#include <t_syslog.h>
+#include <log_output.h>
+#include "target_syssvc.h"
+#include "syslog.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ãã¯ã­ã®ããã©ã«ãå®ç¾©
+ */
+#ifndef LOG_SYSLOG_WRI_LOG_ENTER
+#define LOG_SYSLOG_WRI_LOG_ENTER(prio, p_syslog)
+#endif /* LOG_SYSLOG_WRI_LOG_ENTER */
+
+#ifndef LOG_SYSLOG_WRI_LOG_LEAVE
+#define LOG_SYSLOG_WRI_LOG_LEAVE(ercd)
+#endif /* LOG_SYSLOG_WRI_LOG_LEAVE */
+
+#ifndef LOG_SYSLOG_REA_LOG_ENTER
+#define LOG_SYSLOG_REA_LOG_ENTER(p_syslog)
+#endif /* LOG_SYSLOG_REA_LOG_ENTER */
+
+#ifndef LOG_SYSLOG_REA_LOG_LEAVE
+#define LOG_SYSLOG_REA_LOG_LEAVE(ercd, p_syslog)
+#endif /* LOG_SYSLOG_REA_LOG_LEAVE */
+
+#ifndef LOG_SYSLOG_MSK_LOG_ENTER
+#define LOG_SYSLOG_MSK_LOG_ENTER(logmask, lowmask)
+#endif /* LOG_SYSLOG_MSK_LOG_ENTER */
+
+#ifndef LOG_SYSLOG_MSK_LOG_LEAVE
+#define LOG_SYSLOG_MSK_LOG_LEAVE(ercd)
+#endif /* LOG_SYSLOG_MSK_LOG_LEAVE */
+
+#ifndef LOG_SYSLOG_REF_LOG_ENTER
+#define LOG_SYSLOG_REF_LOG_ENTER(pk_rlog)
+#endif /* LOG_SYSLOG_REF_LOG_ENTER */
+
+#ifndef LOG_SYSLOG_REF_LOG_LEAVE
+#define LOG_SYSLOG_REF_LOG_LEAVE(pk_rlog)
+#endif /* LOG_SYSLOG_REF_LOG_LEAVE */
+
+/*
+ *  ç¾å¨ã®ã·ã¹ãã æå»
+ *
+ *  ã­ã°æå»ãåãåºãããã«ï¼ãããªãï¼ã«ã¼ãã«ã®å
+é¨å¤æ°ãåç
+§ãã¦ã
+ *  ãï¼
+ */
+extern ulong_t	_kernel_current_time;
+
+/*
+ *  ã­ã°ãããã¡ã¨ããã«ã¢ã¯ã»ã¹ããããã®ãã¤ã³ã¿
+ */
+static SYSLOG	syslog_buffer[TCNT_SYSLOG_BUFFER];	/* ã­ã°ãããã¡ */
+static uint_t	syslog_count;			/* ã­ã°ãããã¡ä¸­ã®ã­ã°ã®æ° */
+static uint_t	syslog_head;			/* å
+é ­ã®ã­ã°ã®æ ¼ç´ä½ç½® */
+static uint_t	syslog_tail;			/* æ¬¡ã®ã­ã°ã®æ ¼ç´ä½ç½® */
+static uint_t	syslog_lost;			/* å¤±ãããã­ã°ã®æ° */
+
+/*
+ *  åºåãã¹ãã­ã°æ
+å ±ã®éè¦åº¦ï¼ããããããï¼
+ */
+static uint_t	syslog_logmask;			/* ã­ã°ãããã¡ã«è¨é²ãã¹ãéè¦åº¦ */
+static uint_t	syslog_lowmask_not;		/* ä½ã¬ãã«åºåãã¹ãéè¦åº¦ï¼åè»¢ï¼*/
+
+/*
+ *  ã·ã¹ãã ã­ã°æ©è½ã®åæå
+ */
+void
+syslog_initialize(intptr_t exinf)
+{
+	syslog_count = 0U;
+	syslog_head = 0U;
+	syslog_tail = 0U;
+	syslog_lost = 0U;
+	syslog_logmask = 0U;
+	syslog_lowmask_not = 0U;
+}     
+
+/* 
+ *  ã­ã°æ
+å ±ã®åºå
+ *
+ *  CPUã­ãã¯ç¶æ
+ãå®è¡ã³ã³ãã­ã¹ãã«ãããåä½ã§ããããã«å®è£
+ãã¦ããï¼
+ */
+ER
+syslog_wri_log(uint_t prio, const SYSLOG *p_syslog)
+{
+	SIL_PRE_LOC;
+
+	LOG_SYSLOG_WRI_LOG_ENTER(prio, p_syslog);
+	SIL_LOC_INT();
+
+	/*
+	 *  ã­ã°æå»ã®è¨­å®
+	 */
+	((SYSLOG *) p_syslog)->logtim = _kernel_current_time;
+
+	/*
+	 *  ã­ã°ãããã¡ã«è¨é²
+	 */
+	if ((syslog_logmask & LOG_MASK(prio)) != 0U) {
+		syslog_buffer[syslog_tail] = *p_syslog;
+		syslog_tail++;
+		if (syslog_tail >= TCNT_SYSLOG_BUFFER) {
+			syslog_tail = 0U;
+		}
+		if (syslog_count < TCNT_SYSLOG_BUFFER) {
+			syslog_count++;
+		}
+		else {
+			syslog_head = syslog_tail;
+			syslog_lost++;
+		}
+	}
+
+	/*
+	 *  ä½ã¬ãã«åºå
+	 */
+	if (((~syslog_lowmask_not) & LOG_MASK(prio)) != 0U) {
+		syslog_print(p_syslog, target_fput_log);
+		target_fput_log('\n');
+	}
+
+	SIL_UNL_INT();
+	LOG_SYSLOG_WRI_LOG_LEAVE(E_OK);
+	return(E_OK);
+}
+
+/*
+ *  ã­ã°ãããã¡ããã®èª­åºã
+ *
+ *  CPUã­ãã¯ç¶æ
+ãå®è¡ã³ã³ãã­ã¹ãã«ãããåä½ã§ããããã«å®è£
+ãã¦ããï¼
+ */
+ER_UINT
+syslog_rea_log(SYSLOG *p_syslog)
+{
+	ER_UINT	ercd;
+	SIL_PRE_LOC;
+
+	LOG_SYSLOG_REA_LOG_ENTER(p_syslog);
+	SIL_LOC_INT();
+
+	/*
+	 *  ã­ã°ãããã¡ããã®ååºã
+	 */
+	if (syslog_count > 0U) {
+		*p_syslog = syslog_buffer[syslog_head];
+		syslog_count--;
+		syslog_head++;
+		if (syslog_head >= TCNT_SYSLOG_BUFFER) {
+			syslog_head = 0U;
+		}
+		ercd = (ER_UINT) syslog_lost;
+		syslog_lost = 0U;
+	}
+	else {
+		ercd = E_OBJ;
+	}
+
+	SIL_UNL_INT();
+	LOG_SYSLOG_REA_LOG_LEAVE(ercd, p_syslog);
+	return(ercd);
+}
+
+/* 
+ *  åºåãã¹ãã­ã°æ
+å ±ã®éè¦åº¦ã®è¨­å®
+ */
+ER
+syslog_msk_log(uint_t logmask, uint_t lowmask)
+{
+	LOG_SYSLOG_MSK_LOG_ENTER(logmask, lowmask);
+	syslog_logmask = logmask;
+	syslog_lowmask_not = ~lowmask;
+	LOG_SYSLOG_MSK_LOG_LEAVE(E_OK);
+	return(E_OK);
+}
+
+/*
+ *  ã­ã°ãããã¡ã®ç¶æ
+åç
+§
+ */
+ER
+syslog_ref_log(T_SYSLOG_RLOG *pk_rlog)
+{
+	SIL_PRE_LOC;
+
+	LOG_SYSLOG_REF_LOG_ENTER(pk_rlog);
+	SIL_LOC_INT();
+
+	pk_rlog->count = syslog_count;
+	pk_rlog->lost = syslog_lost;
+	pk_rlog->logmask = syslog_logmask;
+	pk_rlog->lowmask = ~syslog_lowmask_not;
+
+	SIL_UNL_INT();
+	LOG_SYSLOG_REF_LOG_LEAVE(pk_rlog);
+	return(E_OK);
+}
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/syslog.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/syslog.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/syslog.cfg	(revision 136)
@@ -0,0 +1,10 @@
+/*
+ *  $Id: syslog.cfg 1788 2010-05-16 21:06:02Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã­ã°æ©è½ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+
+#include "syssvc/syslog.h"
+ATT_INI({ TA_NULL, 0, syslog_initialize });
Index: rtos_arduino/trunk/asp_1.9.2/syssvc/syslog.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/syssvc/syslog.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/syssvc/syslog.h	(revision 136)
@@ -0,0 +1,115 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2005-2008 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: syslog.h 1788 2010-05-16 21:06:02Z ertl-hiro $
+ */
+
+/*
+ *		ã·ã¹ãã ã­ã°æ©è½
+ */
+
+#ifndef TOPPERS_SYSLOG_H
+#define TOPPERS_SYSLOG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  ã·ã¹ãã ã­ã°åºåãè¡ãããã®å®ç¾©
+ */
+#include <t_syslog.h>
+
+/*
+ *  ã­ã°ãããã¡ã¨ããã«ã¢ã¯ã»ã¹ããããã®ãã¤ã³ã¿
+ */
+#ifndef TCNT_SYSLOG_BUFFER
+#define TCNT_SYSLOG_BUFFER	32		/* ã­ã°ãããã¡ã®ãµã¤ãº */
+#endif /* TCNT_SYSLOG_BUFFER */
+
+/*
+ *  ã·ã¹ãã ã­ã°æ©è½ã®åæå
+ */
+extern void	syslog_initialize(intptr_t exinf) throw();
+
+/*
+ *  ã­ã°æ
+å ±ã®åºå
+ */
+extern ER	syslog_wri_log(uint_t prio, const SYSLOG *p_syslog) throw();
+
+/*
+ *  ã­ã°ãããã¡ããã®ã­ã°æ
+å ±ã®èª­åºã
+ */
+extern ER_UINT	syslog_rea_log(SYSLOG *p_syslog) throw();
+
+/* 
+ *  åºåãã¹ãã­ã°æ
+å ±ã®éè¦åº¦ã®è¨­å®
+ */
+extern ER	syslog_msk_log(uint_t logmask, uint_t lowmask) throw();
+
+/* 
+ *  ã­ã°ãããã¡ã®ç¶æ
+åç
+§
+ */
+extern ER	syslog_ref_log(T_SYSLOG_RLOG *pk_rlog) throw();
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOPPERS_SYSLOG_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/E_PACKAGE
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/E_PACKAGE	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/E_PACKAGE	(revision 136)
@@ -0,0 +1,7 @@
+E_PACKAGE asp_arduio_m0_gcc
+VERSION %date
+
+INCLUDE ./MANIFEST
+INCLUDE ../../MANIFEST
+INCLUDE ../../arch/arm_m_gcc/MANIFEST
+../../cfg/cfg/cfg.exe
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/MANIFEST	(revision 136)
@@ -0,0 +1,33 @@
+PACKAGE asp_arch_arm_gcc
+
+arduino_m0.h
+arduino_m0_startup.c
+E_PACKAGE
+gdb.ini
+gdb_noflash.ini
+Makefile
+Makefile.target
+MANIFEST
+start.S
+target.tf
+target_asm.inc
+target_cfg1_out.h
+target_check.tf
+target_config.c
+target_config.h
+target_def.csv
+target_kernel.h
+target_offset.tf
+target_rename.def
+target_rename.h
+target_serial.c
+target_serial.cfg
+target_serial.h
+target_sil.h
+target_stddef.h
+target_syssvc.h
+target_test.h
+target_timer.cfg
+target_timer.h
+target_unrename.h
+target_user.txt
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/Makefile
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/Makefile	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/Makefile	(revision 136)
@@ -0,0 +1,537 @@
+#
+#  TOPPERS/ASP Kernel
+#      Toyohashi Open Platform for Embedded Real-Time Systems/
+#      Advanced Standard Profile Kernel
+# 
+#  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+#                              Toyohashi Univ. of Technology, JAPAN
+#  Copyright (C) 2006-2015 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  $Id: Makefile 2594 2014-01-02 07:08:54Z ertl-hiro $
+# 
+
+#
+#  ã¿ã¼ã²ããã®æå®ï¼Makefile.targetã§ä¸æ¸ããããã®ãé²ãããï¼
+#
+all:
+
+#
+#  ã¿ã¼ã²ããç¥ç§°ã®å®ç¾©
+#
+TARGET = arduino_m0_gcc
+
+#
+#  ãã­ã°ã©ãã³ã°è¨èªã®å®ç¾©
+#
+SRCLANG = c
+ifeq ($(SRCLANG),c)
+  LIBS = -lc
+endif
+ifeq ($(SRCLANG),c++)
+  USE_CXX = true
+  CXXLIBS = -lstdc++ -lm -lc
+  CXXRTS = cxxrt.o newlibrt.o
+endif
+
+#
+#  ã½ã¼ã¹ãã¡ã¤ã«ã®ãã£ã¬ã¯ããªã®å®ç¾©
+#
+SRCDIR = ../..
+
+#
+#  ãªãã¸ã§ã¯ããã¡ã¤ã«åã®æ¡å¼µå­ã®è¨­å®
+#
+OBJEXT = elf
+
+#
+#  å®è¡ç°å¢ã®å®ç¾©ï¼ã¿ã¼ã²ããä¾å­ã«ä¸æ¸ããããå ´åãããï¼
+#
+DBGENV := 
+
+#
+#  ã«ã¼ãã«ã©ã¤ãã©ãªï¼libkernel.aï¼ã®ãã£ã¬ã¯ããªå
+#  ï¼ã«ã¼ãã«ã©ã¤ãã©ãªãmakeå¯¾è±¡ã«ããæã¯ï¼ç©ºã«å®ç¾©ããï¼
+#
+KERNEL_LIB = 
+
+#
+#  ã«ã¼ãã«ãé¢æ°åä½ã§ã³ã³ãã¤ã«ãããã©ããã®å®ç¾©
+#
+KERNEL_FUNCOBJS = 
+
+#
+#  ãã¬ã¼ã¹ã­ã°ãåå¾ãããã©ããã®å®ç¾©
+#
+ENABLE_TRACE = 
+
+#
+#  ã¦ã¼ãã£ãªãã£ãã­ã°ã©ã ã®åç§°
+#
+PERL = /usr/bin/perl
+CFG = "$(SRCDIR)/cfg/cfg/cfg"
+
+#
+#  ãªãã¸ã§ã¯ããã¡ã¤ã«åã®å®ç¾©
+#
+OBJNAME = asp
+ifdef OBJEXT
+  OBJFILE = $(OBJNAME).$(OBJEXT)
+  CFG1_OUT = cfg1_out.$(OBJEXT)
+else
+  OBJFILE = $(OBJNAME)
+  CFG1_OUT = cfg1_out
+endif
+
+#
+#  ã¿ã¼ã²ããä¾å­é¨ã®ãã£ã¬ã¯ããªã®å®ç¾©
+#
+TARGETDIR = $(SRCDIR)/target/$(TARGET)
+
+#
+#  ã¿ã¼ã²ããä¾å­ã®å®ç¾©ã®ã¤ã³ã¯ã«ã¼ã
+#
+include $(TARGETDIR)/Makefile.target
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿é¢ä¿ã®å¤æ°ã®å®ç¾©
+#
+CFG_TABS := --api-table $(SRCDIR)/kernel/kernel_api.csv \
+			--cfg1-def-table $(SRCDIR)/kernel/kernel_def.csv $(CFG_TABS)
+
+CFG_ASMOBJS := $(CFG_ASMOBJS)
+CFG_COBJS := kernel_cfg.o $(CFG_COBJS)
+CFG_OBJS := $(CFG_ASMOBJS) $(CFG_COBJS)
+CFG2_OUT_SRCS := kernel_cfg.h kernel_cfg.c $(CFG2_OUT_SRCS)
+
+#
+#  å
+±éã³ã³ãã¤ã«ãªãã·ã§ã³ã®å®ç¾©
+#
+COPTS := $(COPTS) -g  -MD
+ifndef OMIT_WARNING_ALL
+  COPTS := $(COPTS) -Wall
+endif
+ifndef OMIT_OPTIMIZATION
+  COPTS := $(COPTS) -O2
+endif
+CDEFS := $(CDEFS) 
+INCLUDES := -I. -I$(SRCDIR)/include -I$(SRCDIR)/arch -I$(SRCDIR) $(INCLUDES)
+LDFLAGS := $(LDFLAGS) 
+CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) 
+LIBS := $(LIBS) $(CXXLIBS)
+CFLAGS = $(COPTS) $(CDEFS) $(INCLUDES)
+
+#
+#  ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ã«é¢ããå®ç¾©
+#
+APPLNAME = sample1
+APPLDIR = 
+APPL_CFG = $(APPLNAME).cfg
+
+APPL_DIR = $(APPLDIR) $(SRCDIR)/library
+APPL_ASMOBJS =
+ifdef USE_CXX
+  APPL_CXXOBJS = $(APPLNAME).o 
+  APPL_COBJS =
+else
+  APPL_COBJS = $(APPLNAME).o 
+endif
+APPL_COBJS := $(APPL_COBJS) log_output.o vasyslog.o t_perror.o strerror.o
+APPL_CFLAGS =
+APPL_LIBS =
+ifdef APPLDIR
+  INCLUDES := $(INCLUDES) $(foreach dir,$(APPLDIR),-I$(dir))
+endif
+
+#
+#  ã·ã¹ãã ãµã¼ãã¹ã«é¢ããå®ç¾©
+#
+SYSSVC_DIR := $(SYSSVC_DIR) $(SRCDIR)/syssvc $(SRCDIR)/library
+SYSSVC_ASMOBJS := $(SYSSVC_ASMOBJS)
+SYSSVC_COBJS := $(SYSSVC_COBJS) banner.o syslog.o serial.o logtask.o \
+				 $(CXXRTS)
+SYSSVC_CFLAGS := $(SYSSVC_CFLAGS)
+SYSSVC_LIBS := $(SYSSVC_LIBS)
+INCLUDES := $(INCLUDES)
+
+#
+#  ã«ã¼ãã«ã«é¢ããå®ç¾©
+#
+#  KERNEL_ASMOBJS: ã«ã¼ãã«ã©ã¤ãã©ãªã«å«ããï¼ã½ã¼ã¹ãã¢ã»ã³ããªè¨èªã®
+#				   ãªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_COBJS: ã«ã¼ãã«ã®ã©ã¤ãã©ãªã«å«ããï¼ã½ã¼ã¹ãCè¨èªã§ï¼ã½ã¼ã¹
+#				 ãã¡ã¤ã«ã¨1å¯¾1ã«å¯¾å¿ãããªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_LCSRCS: ã«ã¼ãã«ã®ã©ã¤ãã©ãªã«å«ããCè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ã§ï¼
+#				  1ã¤ã®ã½ã¼ã¹ãã¡ã¤ã«ããè¤æ°ã®ãªãã¸ã§ã¯ããã¡ã¤ã«ãç
+#				  æãããã®ï¼
+#  KERNEL_LCOBJS: ä¸ã®ã½ã¼ã¹ãã¡ã¤ã«ããçæããããªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_AUX_COBJS: ã­ã¼ãã¢ã¸ã¥ã¼ã«ã«å«ããªããï¼ã«ã¼ãã«ã®ã½ã¼ã¹ãã¡
+#					 ã¤ã«ã¨åããªãã·ã§ã³ãé©ç¨ãã¦ã³ã³ãã¤ã«ãã¹ãï¼ã½ã¼
+#					 ã¹ãCè¨èªã®ãªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#
+KERNEL_DIR := $(KERNEL_DIR) $(SRCDIR)/kernel
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS)
+KERNEL_COBJS := $(KERNEL_COBJS)
+KERNEL_CFLAGS := $(KERNEL_CFLAGS) -I$(SRCDIR)/kernel
+ifdef OMIT_MAKEOFFSET
+  OFFSET_H =
+else
+  OFFSET_H = offset.h
+ifndef OFFSET_TF
+  KERNEL_AUX_COBJS := $(KERNEL_AUX_COBJS) makeoffset.o
+endif
+endif
+
+#
+#  ã¿ã¼ã²ãããã¡ã¤ã«ï¼è¤æ°ãåæã«é¸æãã¦ã¯ãªããªãï¼
+#
+all: $(OBJFILE)
+#all: $(OBJNAME).bin
+#all: $(OBJNAME).srec
+
+##### ä»¥ä¸ã¯ç·¨éããªããã¨ #####
+
+#
+#  ç°å¢ã«ä¾å­ããã³ã³ãã¤ã«ãªãã·ã§ã³ã®å®ç¾©
+#
+ifdef DBGENV
+  CDEFS := $(CDEFS) -D$(DBGENV)
+endif
+
+#
+#  ã«ã¼ãã«ã®ãã¡ã¤ã«æ§æã®å®ç¾©
+#
+include $(SRCDIR)/kernel/Makefile.kernel
+ifdef KERNEL_FUNCOBJS
+  KERNEL_LCSRCS := $(KERNEL_FCSRCS)
+  KERNEL_LCOBJS := $(foreach file,$(KERNEL_FCSRCS),$($(file:.c=)))
+else
+  KERNEL_CFLAGS := -DALLFUNC $(KERNEL_CFLAGS)
+  KERNEL_COBJS := $(KERNEL_COBJS) \
+					$(foreach file,$(KERNEL_FCSRCS),$(file:.c=.o))
+endif
+
+#
+#  ã½ã¼ã¹ãã¡ã¤ã«ã®ãããã£ã¬ã¯ããªã«é¢ããå®ç¾©
+#
+vpath %.c $(KERNEL_DIR) $(SYSSVC_DIR) $(APPL_DIR)
+vpath %.S $(KERNEL_DIR) $(SYSSVC_DIR) $(APPL_DIR)
+vpath %.cfg $(APPL_DIR)
+
+#
+#  ã³ã³ãã¤ã«ã®ããã®å¤æ°ã®å®ç¾©
+#
+KERNEL_LIB_OBJS = $(KERNEL_ASMOBJS) $(KERNEL_COBJS) $(KERNEL_LCOBJS)
+SYSSVC_OBJS = $(SYSSVC_ASMOBJS) $(SYSSVC_COBJS)
+APPL_OBJS = $(APPL_ASMOBJS) $(APPL_COBJS) $(APPL_CXXOBJS)
+ALL_OBJS = $(START_OBJS) $(APPL_OBJS) $(SYSSVC_OBJS) $(CFG_OBJS) \
+											$(END_OBJS) $(HIDDEN_OBJS)
+ifdef KERNEL_LIB
+  ALL_LIBS = $(APPL_LIBS) $(SYSSVC_LIBS) -lkernel $(LIBS)
+  LIBS_DEP = $(filter %.a,$(ALL_LIBS)) $(KERNEL_LIB)/libkernel.a
+  LDFLAGS := $(LDFLAGS) -L$(KERNEL_LIB)
+  REALCLEAN_FILES := libkernel.a $(REALCLEAN_FILES)
+else
+  ALL_LIBS = $(APPL_LIBS) $(SYSSVC_LIBS) libkernel.a $(LIBS)
+  LIBS_DEP = $(filter %.a,$(ALL_LIBS))
+endif
+
+ifdef TEXT_START_ADDRESS
+  LDFLAGS := $(LDFLAGS) -Wl,-Ttext,$(TEXT_START_ADDRESS)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -Wl,-Ttext,$(TEXT_START_ADDRESS)
+endif
+ifdef DATA_START_ADDRESS
+  LDFLAGS := $(LDFLAGS) -Wl,-Tdata,$(DATA_START_ADDRESS)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -Wl,-Tdata,$(DATA_START_ADDRESS)
+endif
+ifdef LDSCRIPT
+  LDFLAGS := $(LDFLAGS) -T $(LDSCRIPT)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -T $(LDSCRIPT)
+endif
+
+#
+#  ãªãã»ãããã¡ã¤ã«ï¼offset.hï¼ã®çæè¦å
+#
+ifdef OFFSET_TF
+offset.h: $(APPL_CFG) kernel_cfg.timestamp
+	$(CFG) --pass 3 --kernel asp $(INCLUDES) \
+				--rom-image cfg1_out.srec --symbol-table cfg1_out.syms \
+				-T $(OFFSET_TF) $(CFG_TABS) $<
+else
+offset.h: makeoffset.s $(SRCDIR)/utils/genoffset
+	$(PERL) $(SRCDIR)/utils/genoffset makeoffset.s > offset.h
+endif
+
+ifneq (,$(findstring /cygdrive/,$(PATH)))
+    UNAME := Cygwin
+else
+ifeq ($(OS),Windows_NT)
+    UNAME := Windows
+else
+ifeq ($(UNAME),Linux)
+    UNAME := Linux
+ifeq ($(UNAME),Darwin)
+    UNAME := Darwin
+endif
+endif
+endif
+endif
+
+#
+#  ã«ã¼ãã«ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã®çæ
+#
+cfg1_out.c: $(APPL_CFG)
+	$(CFG) --pass 1 --kernel asp $(INCLUDES) $(CFG_TABS) $<
+	$(CFG) -M cfg1_out.c $(INCLUDES) $< >> cfg1_out.c.d
+
+$(CFG2_OUT_SRCS): kernel_cfg.timestamp
+kernel_cfg.timestamp: $(APPL_CFG) \
+						$(START_OBJS) cfg1_out.o $(END_OBJS) $(HIDDEN_OBJS)
+	$(LINK) $(CFLAGS) $(CFG1_OUT_LDFLAGS) -o $(CFG1_OUT) \
+						$(START_OBJS) cfg1_out.o $(END_OBJS)
+	$(NM) -n $(CFG1_OUT) > cfg1_out.syms
+	$(OBJCOPY) -O srec -S $(CFG1_OUT) cfg1_out.srec
+	$(CFG) --pass 2 --kernel asp $(INCLUDES) \
+				-T $(TARGETDIR)/target.tf $(CFG_TABS) $<
+ifeq ($(UNAME), Windows)
+	copy /B kernel_cfg.c +,,
+	echo  -n > kernel_cfg.timestamp
+else
+	touch -r kernel_cfg.c kernel_cfg.timestamp
+endif
+
+#
+#  ã«ã¼ãã«ã©ã¤ãã©ãªãã¡ã¤ã«ã®çæ
+#
+libkernel.a: $(OFFSET_H) $(KERNEL_LIB_OBJS)
+	rm -f libkernel.a
+	$(AR) -rcs libkernel.a $(KERNEL_LIB_OBJS)
+	$(RANLIB) libkernel.a
+
+#
+#  ç¹å¥ãªä¾å­é¢ä¿ã®å®ç¾©
+#
+banner.o: kernel_cfg.timestamp $(filter-out banner.o,$(ALL_OBJS)) $(LIBS_DEP)
+
+#
+#  å
+¨ä½ã®ãªã³ã¯
+#
+$(OBJFILE): $(APPL_CFG) kernel_cfg.timestamp $(ALL_OBJS) $(LIBS_DEP)
+	$(LINK) $(CFLAGS) $(LDFLAGS) -o $(OBJFILE) $(START_OBJS) \
+			$(APPL_OBJS) $(SYSSVC_OBJS) $(CFG_OBJS) $(ALL_LIBS) $(END_OBJS)
+	$(NM) -n $(OBJFILE) > $(OBJNAME).syms
+	$(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
+	$(CFG) --pass 3 --kernel asp $(INCLUDES) \
+				--rom-image $(OBJNAME).srec --symbol-table $(OBJNAME).syms \
+				-T $(TARGETDIR)/target_check.tf $(CFG_TABS) $<
+
+#
+#  ãã¤ããªãã¡ã¤ã«ã®çæ
+#
+$(OBJNAME).bin: $(OBJFILE)
+	$(OBJCOPY) -O binary -S $(OBJFILE) $(OBJNAME).bin
+
+#
+#  Sã¬ã³ã¼ããã¡ã¤ã«ã®çæ
+#
+$(OBJNAME).srec: $(OBJFILE)
+	$(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
+
+#
+#  ã³ã³ãã¤ã«çµæã®æ¶å»
+#
+.PHONY: clean
+clean:
+	rm -f $(OBJFILE) $(OBJNAME).syms $(OBJNAME).srec $(OBJNAME).bin
+	rm -f kernel_cfg.timestamp $(CFG2_OUT_SRCS)
+	rm -f cfg1_out.c $(CFG1_OUT) cfg1_out.syms cfg1_out.srec
+ifndef KERNEL_LIB
+	rm -f libkernel.a
+endif
+	rm -f makeoffset.s offset.h
+	rm -f $(CLEAN_FILES)
+	rm -f *.o 
+	rm -f *.d 
+
+.PHONY: cleankernel
+cleankernel:
+	rm -rf $(KERNEL_LIB_OBJS)
+	rm -f makeoffset.s offset.h
+
+.PHONY: cleandep
+cleandep:
+	rm -f kernel_cfg.timestamp $(CFG2_OUT_SRCS); \
+	rm -f cfg1_out.c cfg1_out.o $(CFG1_OUT) cfg1_out.syms cfg1_out.srec; \
+	rm -f makeoffset.s offset.h; \
+
+.PHONY: realclean
+realclean: cleandep clean
+	rm -f $(REALCLEAN_FILES)
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæãããã¡ã¤ã«ã®ã³ã³ãã¤ã«ã«ã¼ã«ã¨ä¾å­é¢ä¿ä½æ
+#  ã«ã¼ã«ã®å®ç¾©
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæãããã¡ã¤ã«ã¯ï¼ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ç¨ï¼
+#  ã·ã¹ãã ãµã¼ãã¹ç¨ï¼ã«ã¼ãã«ç¨ã®ãã¹ã¦ã®ãªãã·ã§ã³ãä»ãã¦ã³ã³ãã¤ã«
+#  ããï¼
+#
+ALL_CFG_COBJS = $(CFG_COBJS) cfg1_out.o
+ALL_CFG_ASMOBJS = $(CFG_ASMOBJS)
+CFG_CFLAGS = $(APPL_CFLAGS) $(SYSSVC_CFLAGS) $(KERNEL_CFLAGS)
+
+$(ALL_CFG_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(CFG_CFLAGS) $<
+
+$(ALL_CFG_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(CFG_CFLAGS) $<
+
+$(ALL_CFG_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(CFG_CFLAGS) $<
+
+#
+#  ä¾å­é¢ä¿ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ã
+#
+-include *.d
+
+#
+#  éçºãã¼ã«ã®ã³ãã³ãåã®å®ç¾©
+#
+ifeq ($(TOOL),gcc)
+  #
+  #  GNUéçºç°å¢ç¨
+  #
+  ifdef GCC_TARGET
+    GCC_TARGET_PREFIX = $(GCC_TARGET)-
+  else
+    GCC_TARGET_PREFIX =
+  endif
+  CC = $(GCC_TARGET_PREFIX)gcc
+  CXX = $(GCC_TARGET_PREFIX)g++
+  AS = $(GCC_TARGET_PREFIX)as
+  LD = $(GCC_TARGET_PREFIX)ld
+  AR = $(GCC_TARGET_PREFIX)ar
+  NM = $(GCC_TARGET_PREFIX)nm
+  RANLIB = $(GCC_TARGET_PREFIX)ranlib
+  OBJCOPY = $(GCC_TARGET_PREFIX)objcopy
+  OBJDUMP = $(GCC_TARGET_PREFIX)objdump
+endif
+
+ifdef USE_CXX
+  LINK = $(CXX)
+else
+  LINK = $(CC)
+endif
+
+#
+#  ã³ã³ãã¤ã«ã«ã¼ã«ã®å®ç¾©
+#
+KERNEL_ALL_COBJS = $(KERNEL_COBJS) $(KERNEL_AUX_COBJS)
+
+$(KERNEL_ALL_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_ALL_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_LCOBJS): %.o:
+	$(CC) -DTOPPERS_$(*F) -o $@ -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_LCOBJS:.o=.s): %.s:
+	$(CC) -DTOPPERS_$(*F) -o $@ -S $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(SYSSVC_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(SYSSVC_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(SYSSVC_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(APPL_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_CXXOBJS): %.o: %.cpp
+	$(CXX) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_CXXOBJS:.o=.s): %.s: %.cpp
+	$(CXX) -S $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+#
+#  ããã©ã«ãã³ã³ãã¤ã«ã«ã¼ã«ãä¸æ¸ã
+#
+%.o: %.c
+	@echo "*** Default compile rules should not be used."
+	$(CC) -c $(CFLAGS) $<
+
+%.s: %.c
+	@echo "*** Default compile rules should not be used."
+	$(CC) -S $(CFLAGS) $<
+
+%.o: %.cpp
+	@echo "*** Default compile rules should not be used."
+	$(CXX) -c $(CFLAGS) $<
+
+%.s: %.cpp
+	@echo "*** Default compile rules should not be used."
+	$(CXX) -S $(CFLAGS) $<
+
+%.o: %.S
+	@echo "*** Default compile rules should not be used."
+	$(CC) -c $(CFLAGS) $<
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/Makefile.target
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/Makefile.target	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/Makefile.target	(revision 136)
@@ -0,0 +1,184 @@
+#
+#  @(#) $Id: Makefile.target 2709 2015-11-22 10:35:14Z ertl-honda $
+# 
+
+#
+#		Makefile ã®ã¿ã¼ã²ããä¾å­é¨ï¼ARDUINO_M0ç¨ï¼
+#
+
+#
+#  ãã¼ãåï¼ãã­ã»ããµåï¼éçºç°å¢åã®å®ç¾©
+#
+BOARD = arduino_m0
+PRC = arm_m
+TOOL = gcc
+
+#
+#  ã³ã¢ã¿ã¤ã
+#
+CORE_TYPE = CORTEX_M0PLUS
+
+#
+# Arduinoã®éçºç°å¢ã®ãã¹(Windowsè¡¨è¨)
+#
+ARDUINO_BASE_DIR_WIN = C:\Program Files (x86)\Arduino
+
+#
+# Arduinoã®éçºç°å¢ã¸ã®ã¤ã³ã¯ã«ã¼ããã¹
+#
+ifndef ARDUINO_LIB_DIR
+#
+# ARDUINO_LIB_DIR ãå®ç¾©ããã¦ããªããã°Arduino IDEã§ã¤ã³ã¹ãã¼ã«ããã
+# ã©ã¤ãã©ãªãä½¿ç¨ãã
+#
+ARDUINO_LIB_DIR = $(ARDUINO_BASE_DIR_WIN)
+endif
+
+ARDUINO_INCLUDES = -I"$(ARDUINO_LIB_DIR)/hardware/tools/CMSIS/CMSIS/Include/" \
+                   -I"$(ARDUINO_LIB_DIR)/hardware/tools/CMSIS/Device/ATMEL/" \
+                   -I"$(ARDUINO_LIB_DIR)/hardware/arduino/samd/cores/arduino/" \
+                   -I"$(ARDUINO_LIB_DIR)/hardware/arduino/samd/variants/arduino_zero/"
+
+#
+#  ã³ã³ãã¤ã«ãªãã·ã§ã³
+#
+INCLUDES :=  $(ARDUINO_INCLUDES) $(INCLUDES) -I$(TARGETDIR)
+COPTS := $(COPTS) -mcpu=cortex-m0plus
+LDFLAGS := $(LDFLAGS) -mcpu=cortex-m0plus
+CDEFS := $(CDEFS) -DTOPPERS_CORTEX_M0PLUS -D__SAMD21G18A__
+CFG1_OUT_LDFLAGS := -nostdlib $(CFG1_OUT_LDFLAGS)
+
+#
+# ãã¡ã¤ã«ãµã¤ãºåæ¸ã®ããã®ãªãã·ã§ã³
+#
+COPTS   := $(COPTS) -ffunction-sections -fdata-sections
+LDFLAGS := $(LDFLAGS) -Wl,--gc-sections
+
+#
+#  ã«ã¼ãã«ã«é¢ããå®ç¾©
+#
+KERNEL_DIR := $(KERNEL_DIR) $(TARGETDIR)
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS) start.o
+KERNEL_COBJS := $(KERNEL_COBJS) target_config.o core_timer.o arduino_m0_startup.o
+
+#
+#  ã·ã¹ãã ãµã¼ãã¹ã«é¢ããå®ç¾©
+#
+SYSSVC_DIR := $(SYSSVC_DIR)
+SYSSVC_COBJS := $(SYSSVC_COBJS) target_serial.o 
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿é¢ä¿ã®å¤æ°ã®å®ç¾©
+#
+CFG_TABS := $(CFG_TABS) --cfg1-def-table $(TARGETDIR)/target_def.csv
+
+#
+#  ãã¬ã¼ã¹ã­ã°ã«é¢ããè¨­å®
+#
+ifeq ($(ENABLE_TRACE),true)
+      COPTS := $(COPTS) 
+      CDEFS := $(CDEFS) -DTOPPERS_ENABLE_TRACE
+      KERNEL_DIR := $(KERNEL_DIR) $(SRCDIR)/arch/logtrace
+      KERNEL_COBJS := $(KERNEL_COBJS) trace_config.o trace_dump.o
+endif
+
+#
+#  GNUéçºç°å¢ã®ã¿ã¼ã²ããã¢ã¼ã­ãã¯ãã£ã®å®ç¾©
+#
+GCC_TARGET = arm-none-eabi
+
+#
+#  ãªã³ã«ã¹ã¯ãªããã®å®ç¾©
+#
+LDSCRIPT = "$(ARDUINO_LIB_DIR)/hardware/arduino/samd/variants/arduino_zero/linker_scripts/gcc/flash_with_bootloader.ld"
+#LDSCRIPT = "$(ARDUINO_LIB_DIR)/hardware//arduino/samd/variants/arduino_zero/linker_scripts/gcc/flash.ld"
+
+#
+#  ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ã«é¢ããå®ç¾©
+#
+#  at91skyeye.ldã«ãSTARTUP(start.o)ããè¨è¿°ããããï¼ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼
+#  ã«ã®ååãHIDDEN_OBJSã«å®ç¾©ããï¼
+#
+#HIDDEN_OBJS = start.o
+#
+#$(HIDDEN_OBJS): %.o: %.S
+#	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+#
+#$(HIDDEN_OBJS:.o=.d): %.d: %.S
+#	@$(PERL) $(SRCDIR)/utils/makedep -C $(CC) \
+#		-O "$(CFLAGS) $(KERNEL_CFLAGS)" $< >> Makefile.depend
+#
+#LDFLAGS := $(LDFLAGS)
+
+#
+#  ä¾å­é¢ä¿ã®å®ç¾©
+#
+cfg1_out.c: $(TARGETDIR)/target_def.csv
+kernel_cfg.timestamp: $(TARGETDIR)/target.tf
+$(OBJFILE): $(TARGETDIR)/target_check.tf
+
+# 
+#  ãªãã»ãããã¡ã¤ã«çæã®ããã®å®ç¾© 
+# 
+OFFSET_TF := $(TARGETDIR)/target_offset.tf
+
+#
+#  ãã­ã»ããµä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ã
+#
+include $(SRCDIR)/arch/$(PRC)_$(TOOL)/common/Makefile.core
+
+
+#
+#  ç°å¢ã®å¤å®
+#
+ifneq (,$(findstring /cygdrive/,$(PATH)))
+    UNAME_TARGET := Cygwin
+else
+ifneq (,$(findstring Windows,$(PATH)))
+    UNAME_TARGET := Windows
+else
+    UNAME_TARGET := Unix
+endif
+endif
+
+
+#
+#  ãã©ãã·ã¥ã¸ã®æ¸ãè¾¼ã¿
+#
+OPENOCD_PATH = $(ARDUINO_BASE_DIR_WIN)\hardware\tools\OpenOCD-0.9.0-arduino\bin\openocd.exe
+OPENOCD_SCRIPT_PATH = $(ARDUINO_BASE_DIR_WIN)\hardware\tools\OpenOCD-0.9.0-arduino\share\openocd\scripts
+OPENOCD_SCRIPT  = $(ARDUINO_BASE_DIR_WIN)\hardware\arduino\samd\variants\arduino_zero\openocd_scripts\arduino_zero.cfg
+
+ifeq ($(UNAME_TARGET), Cygwin)
+	GDB = arm-gdb_m0.exe
+else
+	GDB = $(ARDUINO_BASE_DIR_WIN)\hardware\tools\gcc-arm-none-eabi-4.8.3-2014q1\bin\arm-none-eabi-gdb
+endif
+
+run: $(OBJNAME).bin
+ifeq ($(UNAME_TARGET), Cygwin)
+	"`cygpath -u "$(OPENOCD_PATH)"`" -s "$(OPENOCD_SCRIPT_PATH)" -f "$(OPENOCD_SCRIPT)" -c "program ./$(OBJNAME).bin verify 0x4000 reset exit"
+else
+	"$(OPENOCD_PATH)" -s "$(OPENOCD_SCRIPT_PATH)" -f "$(OPENOCD_SCRIPT)" -c "program ./$(OBJNAME).bin verify 0x4000 reset exit"
+endif
+
+ocd: $(OBJNAME).bin
+ifeq ($(UNAME_TARGET), Cygwin)
+	cygstart "$(OPENOCD_PATH)" '-s "$(OPENOCD_SCRIPT_PATH)"' '-f "$(OPENOCD_SCRIPT)"'
+else
+	start /MIN "" "$(OPENOCD_PATH)" -s "$(OPENOCD_SCRIPT_PATH)" -f "$(OPENOCD_SCRIPT)"
+endif
+
+db: $(OBJNAME).bin
+ifeq ($(UNAME_TARGET), Cygwin)
+	$(GDB) $(OBJFILE) -x $(TARGETDIR)/gdb.ini
+else
+	$(GDB) $(OBJFILE) -x $(TARGETDIR)/gdb.ini
+endif
+
+d: $(OBJNAME).bin
+ifeq ($(UNAME_TARGET), Cygwin)
+	$(GDB) $(OBJFILE) -x $(TARGETDIR)/gdb_noflash.ini
+else
+
+endif
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/arduino_m0.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/arduino_m0.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/arduino_m0.h	(revision 136)
@@ -0,0 +1,68 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ *
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: arduino_m0.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+#ifndef TOPPERS_ARDUINO_M0_H
+#define TOPPERS_ARDUINO_M0_H
+
+#include <sil.h>
+
+#define CORE_CLOCK_HZ 48000000
+
+/*
+ *  å²è¾¼ã¿çªå·ã®æå¤§å¤
+ */
+#define TMAX_INTNO   (16 + 28)
+
+#endif /* TOPPERS_ARDUINO_M0_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/arduino_m0_startup.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/arduino_m0_startup.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/arduino_m0_startup.c	(revision 136)
@@ -0,0 +1,72 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ *
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN  
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: arduino_m0_startup.c 2697 2015-11-06 04:00:42Z ertl-honda $
+ */
+
+/*
+ * Arduinoã©ã¤ãã©ãªã®åæåã³ã¼ãã®ä½¿ç¨ï¼ARDUINO_M0ç¨ï¼
+ */
+#include "variant.h"
+
+extern void dummy_Reset_Handler(void);
+
+uint32_t SystemCoreClock  __attribute__((weak));
+void dummy__libc_init_array(void){}
+int dummy_main(void){return 1;}
+
+#define Reset_Handler dummy_Reset_Handler
+#define __libc_init_array dummy__libc_init_array
+#define main dummy_main
+#define section(str)  section(".text.exception_table")
+
+#include "startup.c"
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/Makefile
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/Makefile	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/Makefile	(revision 136)
@@ -0,0 +1,537 @@
+#
+#  TOPPERS/ASP Kernel
+#      Toyohashi Open Platform for Embedded Real-Time Systems/
+#      Advanced Standard Profile Kernel
+# 
+#  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+#                              Toyohashi Univ. of Technology, JAPAN
+#  Copyright (C) 2006-2015 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  $Id: Makefile 2594 2014-01-02 07:08:54Z ertl-hiro $
+# 
+
+#
+#  ã¿ã¼ã²ããã®æå®ï¼Makefile.targetã§ä¸æ¸ããããã®ãé²ãããï¼
+#
+all:
+
+#
+#  ã¿ã¼ã²ããç¥ç§°ã®å®ç¾©
+#
+TARGET = arduino_m0_gcc
+
+#
+#  ãã­ã°ã©ãã³ã°è¨èªã®å®ç¾©
+#
+SRCLANG = c
+ifeq ($(SRCLANG),c)
+  LIBS = -lc
+endif
+ifeq ($(SRCLANG),c++)
+  USE_CXX = true
+  CXXLIBS = -lstdc++ -lm -lc
+  CXXRTS = cxxrt.o newlibrt.o
+endif
+
+#
+#  ã½ã¼ã¹ãã¡ã¤ã«ã®ãã£ã¬ã¯ããªã®å®ç¾©
+#
+SRCDIR = ../../../
+
+#
+#  ãªãã¸ã§ã¯ããã¡ã¤ã«åã®æ¡å¼µå­ã®è¨­å®
+#
+OBJEXT = elf
+
+#
+#  å®è¡ç°å¢ã®å®ç¾©ï¼ã¿ã¼ã²ããä¾å­ã«ä¸æ¸ããããå ´åãããï¼
+#
+DBGENV := 
+
+#
+#  ã«ã¼ãã«ã©ã¤ãã©ãªï¼libkernel.aï¼ã®ãã£ã¬ã¯ããªå
+#  ï¼ã«ã¼ãã«ã©ã¤ãã©ãªãmakeå¯¾è±¡ã«ããæã¯ï¼ç©ºã«å®ç¾©ããï¼
+#
+KERNEL_LIB = 
+
+#
+#  ã«ã¼ãã«ãé¢æ°åä½ã§ã³ã³ãã¤ã«ãããã©ããã®å®ç¾©
+#
+KERNEL_FUNCOBJS = 
+
+#
+#  ãã¬ã¼ã¹ã­ã°ãåå¾ãããã©ããã®å®ç¾©
+#
+ENABLE_TRACE = 
+
+#
+#  ã¦ã¼ãã£ãªãã£ãã­ã°ã©ã ã®åç§°
+#
+PERL = /usr/bin/perl
+CFG = "$(SRCDIR)/cfg/cfg/cfg"
+
+#
+#  ãªãã¸ã§ã¯ããã¡ã¤ã«åã®å®ç¾©
+#
+OBJNAME = asp
+ifdef OBJEXT
+  OBJFILE = $(OBJNAME).$(OBJEXT)
+  CFG1_OUT = cfg1_out.$(OBJEXT)
+else
+  OBJFILE = $(OBJNAME)
+  CFG1_OUT = cfg1_out
+endif
+
+#
+#  ã¿ã¼ã²ããä¾å­é¨ã®ãã£ã¬ã¯ããªã®å®ç¾©
+#
+TARGETDIR = $(SRCDIR)/target/$(TARGET)
+
+#
+#  ã¿ã¼ã²ããä¾å­ã®å®ç¾©ã®ã¤ã³ã¯ã«ã¼ã
+#
+include $(TARGETDIR)/Makefile.target
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿é¢ä¿ã®å¤æ°ã®å®ç¾©
+#
+CFG_TABS := --api-table $(SRCDIR)/kernel/kernel_api.csv \
+			--cfg1-def-table $(SRCDIR)/kernel/kernel_def.csv $(CFG_TABS)
+
+CFG_ASMOBJS := $(CFG_ASMOBJS)
+CFG_COBJS := kernel_cfg.o $(CFG_COBJS)
+CFG_OBJS := $(CFG_ASMOBJS) $(CFG_COBJS)
+CFG2_OUT_SRCS := kernel_cfg.h kernel_cfg.c $(CFG2_OUT_SRCS)
+
+#
+#  å
+±éã³ã³ãã¤ã«ãªãã·ã§ã³ã®å®ç¾©
+#
+COPTS := $(COPTS) -g  -MD
+ifndef OMIT_WARNING_ALL
+  COPTS := $(COPTS) -Wall
+endif
+ifndef OMIT_OPTIMIZATION
+  COPTS := $(COPTS) -O2
+endif
+CDEFS := $(CDEFS) 
+INCLUDES := -I. -I$(SRCDIR)/include -I$(SRCDIR)/arch -I$(SRCDIR) $(INCLUDES)
+LDFLAGS := $(LDFLAGS) 
+CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) 
+LIBS := $(LIBS) $(CXXLIBS)
+CFLAGS = $(COPTS) $(CDEFS) $(INCLUDES)
+
+#
+#  ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ã«é¢ããå®ç¾©
+#
+APPLNAME = sample1
+APPLDIR = 
+APPL_CFG = $(APPLNAME).cfg
+
+APPL_DIR = $(APPLDIR) $(SRCDIR)/library
+APPL_ASMOBJS =
+ifdef USE_CXX
+  APPL_CXXOBJS = $(APPLNAME).o 
+  APPL_COBJS =
+else
+  APPL_COBJS = $(APPLNAME).o 
+endif
+APPL_COBJS := $(APPL_COBJS) log_output.o vasyslog.o t_perror.o strerror.o
+APPL_CFLAGS =
+APPL_LIBS =
+ifdef APPLDIR
+  INCLUDES := $(INCLUDES) $(foreach dir,$(APPLDIR),-I$(dir))
+endif
+
+#
+#  ã·ã¹ãã ãµã¼ãã¹ã«é¢ããå®ç¾©
+#
+SYSSVC_DIR := $(SYSSVC_DIR) $(SRCDIR)/syssvc $(SRCDIR)/library
+SYSSVC_ASMOBJS := $(SYSSVC_ASMOBJS)
+SYSSVC_COBJS := $(SYSSVC_COBJS) banner.o syslog.o serial.o logtask.o \
+				 $(CXXRTS)
+SYSSVC_CFLAGS := $(SYSSVC_CFLAGS)
+SYSSVC_LIBS := $(SYSSVC_LIBS)
+INCLUDES := $(INCLUDES)
+
+#
+#  ã«ã¼ãã«ã«é¢ããå®ç¾©
+#
+#  KERNEL_ASMOBJS: ã«ã¼ãã«ã©ã¤ãã©ãªã«å«ããï¼ã½ã¼ã¹ãã¢ã»ã³ããªè¨èªã®
+#				   ãªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_COBJS: ã«ã¼ãã«ã®ã©ã¤ãã©ãªã«å«ããï¼ã½ã¼ã¹ãCè¨èªã§ï¼ã½ã¼ã¹
+#				 ãã¡ã¤ã«ã¨1å¯¾1ã«å¯¾å¿ãããªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_LCSRCS: ã«ã¼ãã«ã®ã©ã¤ãã©ãªã«å«ããCè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ã§ï¼
+#				  1ã¤ã®ã½ã¼ã¹ãã¡ã¤ã«ããè¤æ°ã®ãªãã¸ã§ã¯ããã¡ã¤ã«ãç
+#				  æãããã®ï¼
+#  KERNEL_LCOBJS: ä¸ã®ã½ã¼ã¹ãã¡ã¤ã«ããçæããããªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_AUX_COBJS: ã­ã¼ãã¢ã¸ã¥ã¼ã«ã«å«ããªããï¼ã«ã¼ãã«ã®ã½ã¼ã¹ãã¡
+#					 ã¤ã«ã¨åããªãã·ã§ã³ãé©ç¨ãã¦ã³ã³ãã¤ã«ãã¹ãï¼ã½ã¼
+#					 ã¹ãCè¨èªã®ãªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#
+KERNEL_DIR := $(KERNEL_DIR) $(SRCDIR)/kernel
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS)
+KERNEL_COBJS := $(KERNEL_COBJS)
+KERNEL_CFLAGS := $(KERNEL_CFLAGS) -I$(SRCDIR)/kernel
+ifdef OMIT_MAKEOFFSET
+  OFFSET_H =
+else
+  OFFSET_H = offset.h
+ifndef OFFSET_TF
+  KERNEL_AUX_COBJS := $(KERNEL_AUX_COBJS) makeoffset.o
+endif
+endif
+
+#
+#  ã¿ã¼ã²ãããã¡ã¤ã«ï¼è¤æ°ãåæã«é¸æãã¦ã¯ãªããªãï¼
+#
+all: $(OBJFILE)
+#all: $(OBJNAME).bin
+#all: $(OBJNAME).srec
+
+##### ä»¥ä¸ã¯ç·¨éããªããã¨ #####
+
+#
+#  ç°å¢ã«ä¾å­ããã³ã³ãã¤ã«ãªãã·ã§ã³ã®å®ç¾©
+#
+ifdef DBGENV
+  CDEFS := $(CDEFS) -D$(DBGENV)
+endif
+
+#
+#  ã«ã¼ãã«ã®ãã¡ã¤ã«æ§æã®å®ç¾©
+#
+include $(SRCDIR)/kernel/Makefile.kernel
+ifdef KERNEL_FUNCOBJS
+  KERNEL_LCSRCS := $(KERNEL_FCSRCS)
+  KERNEL_LCOBJS := $(foreach file,$(KERNEL_FCSRCS),$($(file:.c=)))
+else
+  KERNEL_CFLAGS := -DALLFUNC $(KERNEL_CFLAGS)
+  KERNEL_COBJS := $(KERNEL_COBJS) \
+					$(foreach file,$(KERNEL_FCSRCS),$(file:.c=.o))
+endif
+
+#
+#  ã½ã¼ã¹ãã¡ã¤ã«ã®ãããã£ã¬ã¯ããªã«é¢ããå®ç¾©
+#
+vpath %.c $(KERNEL_DIR) $(SYSSVC_DIR) $(APPL_DIR)
+vpath %.S $(KERNEL_DIR) $(SYSSVC_DIR) $(APPL_DIR)
+vpath %.cfg $(APPL_DIR)
+
+#
+#  ã³ã³ãã¤ã«ã®ããã®å¤æ°ã®å®ç¾©
+#
+KERNEL_LIB_OBJS = $(KERNEL_ASMOBJS) $(KERNEL_COBJS) $(KERNEL_LCOBJS)
+SYSSVC_OBJS = $(SYSSVC_ASMOBJS) $(SYSSVC_COBJS)
+APPL_OBJS = $(APPL_ASMOBJS) $(APPL_COBJS) $(APPL_CXXOBJS)
+ALL_OBJS = $(START_OBJS) $(APPL_OBJS) $(SYSSVC_OBJS) $(CFG_OBJS) \
+											$(END_OBJS) $(HIDDEN_OBJS)
+ifdef KERNEL_LIB
+  ALL_LIBS = $(APPL_LIBS) $(SYSSVC_LIBS) -lkernel $(LIBS)
+  LIBS_DEP = $(filter %.a,$(ALL_LIBS)) $(KERNEL_LIB)/libkernel.a
+  LDFLAGS := $(LDFLAGS) -L$(KERNEL_LIB)
+  REALCLEAN_FILES := libkernel.a $(REALCLEAN_FILES)
+else
+  ALL_LIBS = $(APPL_LIBS) $(SYSSVC_LIBS) libkernel.a $(LIBS)
+  LIBS_DEP = $(filter %.a,$(ALL_LIBS))
+endif
+
+ifdef TEXT_START_ADDRESS
+  LDFLAGS := $(LDFLAGS) -Wl,-Ttext,$(TEXT_START_ADDRESS)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -Wl,-Ttext,$(TEXT_START_ADDRESS)
+endif
+ifdef DATA_START_ADDRESS
+  LDFLAGS := $(LDFLAGS) -Wl,-Tdata,$(DATA_START_ADDRESS)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -Wl,-Tdata,$(DATA_START_ADDRESS)
+endif
+ifdef LDSCRIPT
+  LDFLAGS := $(LDFLAGS) -T $(LDSCRIPT)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -T $(LDSCRIPT)
+endif
+
+#
+#  ãªãã»ãããã¡ã¤ã«ï¼offset.hï¼ã®çæè¦å
+#
+ifdef OFFSET_TF
+offset.h: $(APPL_CFG) kernel_cfg.timestamp
+	$(CFG) --pass 3 --kernel asp $(INCLUDES) \
+				--rom-image cfg1_out.srec --symbol-table cfg1_out.syms \
+				-T $(OFFSET_TF) $(CFG_TABS) $<
+else
+offset.h: makeoffset.s $(SRCDIR)/utils/genoffset
+	$(PERL) $(SRCDIR)/utils/genoffset makeoffset.s > offset.h
+endif
+
+ifneq (,$(findstring /cygdrive/,$(PATH)))
+    UNAME := Cygwin
+else
+ifeq ($(OS),Windows_NT)
+    UNAME := Windows
+else
+ifeq ($(UNAME),Linux)
+    UNAME := Linux
+ifeq ($(UNAME),Darwin)
+    UNAME := Darwin
+endif
+endif
+endif
+endif
+
+#
+#  ã«ã¼ãã«ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã®çæ
+#
+cfg1_out.c: $(APPL_CFG)
+	$(CFG) --pass 1 --kernel asp $(INCLUDES) $(CFG_TABS) $<
+	$(CFG) -M cfg1_out.c $(INCLUDES) $< >> cfg1_out.c.d
+
+$(CFG2_OUT_SRCS): kernel_cfg.timestamp
+kernel_cfg.timestamp: $(APPL_CFG) \
+						$(START_OBJS) cfg1_out.o $(END_OBJS) $(HIDDEN_OBJS)
+	$(LINK) $(CFLAGS) $(CFG1_OUT_LDFLAGS) -o $(CFG1_OUT) \
+						$(START_OBJS) cfg1_out.o $(END_OBJS)
+	$(NM) -n $(CFG1_OUT) > cfg1_out.syms
+	$(OBJCOPY) -O srec -S $(CFG1_OUT) cfg1_out.srec
+	$(CFG) --pass 2 --kernel asp $(INCLUDES) \
+				-T $(TARGETDIR)/target.tf $(CFG_TABS) $<
+ifeq ($(UNAME), Windows)
+	copy /B kernel_cfg.c +,,
+	echo  -n > kernel_cfg.timestamp
+else
+	touch -r kernel_cfg.c kernel_cfg.timestamp
+endif
+
+#
+#  ã«ã¼ãã«ã©ã¤ãã©ãªãã¡ã¤ã«ã®çæ
+#
+libkernel.a: $(OFFSET_H) $(KERNEL_LIB_OBJS)
+	rm -f libkernel.a
+	$(AR) -rcs libkernel.a $(KERNEL_LIB_OBJS)
+	$(RANLIB) libkernel.a
+
+#
+#  ç¹å¥ãªä¾å­é¢ä¿ã®å®ç¾©
+#
+banner.o: kernel_cfg.timestamp $(filter-out banner.o,$(ALL_OBJS)) $(LIBS_DEP)
+
+#
+#  å
+¨ä½ã®ãªã³ã¯
+#
+$(OBJFILE): $(APPL_CFG) kernel_cfg.timestamp $(ALL_OBJS) $(LIBS_DEP)
+	$(LINK) $(CFLAGS) $(LDFLAGS) -o $(OBJFILE) $(START_OBJS) \
+			$(APPL_OBJS) $(SYSSVC_OBJS) $(CFG_OBJS) $(ALL_LIBS) $(END_OBJS)
+	$(NM) -n $(OBJFILE) > $(OBJNAME).syms
+	$(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
+	$(CFG) --pass 3 --kernel asp $(INCLUDES) \
+				--rom-image $(OBJNAME).srec --symbol-table $(OBJNAME).syms \
+				-T $(TARGETDIR)/target_check.tf $(CFG_TABS) $<
+
+#
+#  ãã¤ããªãã¡ã¤ã«ã®çæ
+#
+$(OBJNAME).bin: $(OBJFILE)
+	$(OBJCOPY) -O binary -S $(OBJFILE) $(OBJNAME).bin
+
+#
+#  Sã¬ã³ã¼ããã¡ã¤ã«ã®çæ
+#
+$(OBJNAME).srec: $(OBJFILE)
+	$(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
+
+#
+#  ã³ã³ãã¤ã«çµæã®æ¶å»
+#
+.PHONY: clean
+clean:
+	rm -f $(OBJFILE) $(OBJNAME).syms $(OBJNAME).srec $(OBJNAME).bin
+	rm -f kernel_cfg.timestamp $(CFG2_OUT_SRCS)
+	rm -f cfg1_out.c $(CFG1_OUT) cfg1_out.syms cfg1_out.srec
+ifndef KERNEL_LIB
+	rm -f libkernel.a
+endif
+	rm -f makeoffset.s offset.h
+	rm -f $(CLEAN_FILES)
+	rm -f *.o 
+	rm -f *.d 
+
+.PHONY: cleankernel
+cleankernel:
+	rm -rf $(KERNEL_LIB_OBJS)
+	rm -f makeoffset.s offset.h
+
+.PHONY: cleandep
+cleandep:
+	rm -f kernel_cfg.timestamp $(CFG2_OUT_SRCS); \
+	rm -f cfg1_out.c cfg1_out.o $(CFG1_OUT) cfg1_out.syms cfg1_out.srec; \
+	rm -f makeoffset.s offset.h; \
+
+.PHONY: realclean
+realclean: cleandep clean
+	rm -f $(REALCLEAN_FILES)
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæãããã¡ã¤ã«ã®ã³ã³ãã¤ã«ã«ã¼ã«ã¨ä¾å­é¢ä¿ä½æ
+#  ã«ã¼ã«ã®å®ç¾©
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæãããã¡ã¤ã«ã¯ï¼ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ç¨ï¼
+#  ã·ã¹ãã ãµã¼ãã¹ç¨ï¼ã«ã¼ãã«ç¨ã®ãã¹ã¦ã®ãªãã·ã§ã³ãä»ãã¦ã³ã³ãã¤ã«
+#  ããï¼
+#
+ALL_CFG_COBJS = $(CFG_COBJS) cfg1_out.o
+ALL_CFG_ASMOBJS = $(CFG_ASMOBJS)
+CFG_CFLAGS = $(APPL_CFLAGS) $(SYSSVC_CFLAGS) $(KERNEL_CFLAGS)
+
+$(ALL_CFG_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(CFG_CFLAGS) $<
+
+$(ALL_CFG_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(CFG_CFLAGS) $<
+
+$(ALL_CFG_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(CFG_CFLAGS) $<
+
+#
+#  ä¾å­é¢ä¿ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ã
+#
+-include *.d
+
+#
+#  éçºãã¼ã«ã®ã³ãã³ãåã®å®ç¾©
+#
+ifeq ($(TOOL),gcc)
+  #
+  #  GNUéçºç°å¢ç¨
+  #
+  ifdef GCC_TARGET
+    GCC_TARGET_PREFIX = $(GCC_TARGET)-
+  else
+    GCC_TARGET_PREFIX =
+  endif
+  CC = $(GCC_TARGET_PREFIX)gcc
+  CXX = $(GCC_TARGET_PREFIX)g++
+  AS = $(GCC_TARGET_PREFIX)as
+  LD = $(GCC_TARGET_PREFIX)ld
+  AR = $(GCC_TARGET_PREFIX)ar
+  NM = $(GCC_TARGET_PREFIX)nm
+  RANLIB = $(GCC_TARGET_PREFIX)ranlib
+  OBJCOPY = $(GCC_TARGET_PREFIX)objcopy
+  OBJDUMP = $(GCC_TARGET_PREFIX)objdump
+endif
+
+ifdef USE_CXX
+  LINK = $(CXX)
+else
+  LINK = $(CC)
+endif
+
+#
+#  ã³ã³ãã¤ã«ã«ã¼ã«ã®å®ç¾©
+#
+KERNEL_ALL_COBJS = $(KERNEL_COBJS) $(KERNEL_AUX_COBJS)
+
+$(KERNEL_ALL_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_ALL_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_LCOBJS): %.o:
+	$(CC) -DTOPPERS_$(*F) -o $@ -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_LCOBJS:.o=.s): %.s:
+	$(CC) -DTOPPERS_$(*F) -o $@ -S $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(SYSSVC_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(SYSSVC_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(SYSSVC_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(APPL_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_COBJS:.o=.s): %.s: %.c
+	$(CC) -S $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_CXXOBJS): %.o: %.cpp
+	$(CXX) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_CXXOBJS:.o=.s): %.s: %.cpp
+	$(CXX) -S $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+#
+#  ããã©ã«ãã³ã³ãã¤ã«ã«ã¼ã«ãä¸æ¸ã
+#
+%.o: %.c
+	@echo "*** Default compile rules should not be used."
+	$(CC) -c $(CFLAGS) $<
+
+%.s: %.c
+	@echo "*** Default compile rules should not be used."
+	$(CC) -S $(CFLAGS) $<
+
+%.o: %.cpp
+	@echo "*** Default compile rules should not be used."
+	$(CXX) -c $(CFLAGS) $<
+
+%.s: %.cpp
+	@echo "*** Default compile rules should not be used."
+	$(CXX) -S $(CFLAGS) $<
+
+%.o: %.S
+	@echo "*** Default compile rules should not be used."
+	$(CC) -c $(CFLAGS) $<
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/asp.atsln
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/asp.atsln	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/asp.atsln	(revision 136)
@@ -0,0 +1,22 @@
+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Atmel Studio Solution File, Format Version 11.00
+VisualStudioVersion = 14.0.23107.0
+MinimumVisualStudioVersion = 10.0.40219.1
+Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "asp", "asp.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.ActiveCfg = Debug|ARM
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.Build.0 = Debug|ARM
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.ActiveCfg = Release|ARM
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/asp.componentinfo.xml
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/asp.componentinfo.xml	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/asp.componentinfo.xml	(revision 136)
@@ -0,0 +1,169 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Store xmlns:i="http://www.w3.org/2001/XMLSchema-instance" xmlns="AtmelPackComponentManagement">
+	<ProjectComponents>
+		<ProjectComponent z:Id="i1" xmlns:z="http://schemas.microsoft.com/2003/10/Serialization/">
+			<CApiVersion></CApiVersion>
+			<CBundle></CBundle>
+			<CClass>CMSIS</CClass>
+			<CGroup>CORE</CGroup>
+			<CSub></CSub>
+			<CVariant></CVariant>
+			<CVendor>ARM</CVendor>
+			<CVersion>3.40.0</CVersion>
+			<DefaultRepoPath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs</DefaultRepoPath>
+			<DependentComponents xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
+				<d4p1:anyType z:Id="i2" i:type="ProjectComponent">
+					<CApiVersion></CApiVersion>
+					<CBundle></CBundle>
+					<CClass>Device</CClass>
+					<CGroup>Startup</CGroup>
+					<CSub></CSub>
+					<CVariant></CVariant>
+					<CVendor>Atmel</CVendor>
+					<CVersion>1.0.0</CVersion>
+					<DefaultRepoPath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs</DefaultRepoPath>
+					<DependentComponents />
+					<Description></Description>
+					<Files>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\include</AbsolutePath>
+							<Attribute></Attribute>
+							<Category>include</Category>
+							<Condition>C</Condition>
+							<FileContentHash i:nil="true" />
+							<FileVersion></FileVersion>
+							<Name>samd21a/include</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\include\sam.h</AbsolutePath>
+							<Attribute></Attribute>
+							<Category>header</Category>
+							<Condition>C</Condition>
+							<FileContentHash>wM94EGprD6Od4xKBsAzkFQ==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/include/sam.h</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\templates\main.c</AbsolutePath>
+							<Attribute>template</Attribute>
+							<Category>source</Category>
+							<Condition>C Exe</Condition>
+							<FileContentHash>zHA+pUXLIS43ZqjeqCD/AA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/templates/main.c</Name>
+							<SelectString>Main file (.c)</SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\templates\main.cpp</AbsolutePath>
+							<Attribute>template</Attribute>
+							<Category>source</Category>
+							<Condition>C Exe</Condition>
+							<FileContentHash>nU+WlKcYaWh0AWBBS+WVpA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/templates/main.cpp</Name>
+							<SelectString>Main file (.cpp)</SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\gcc\system_samd21.c</AbsolutePath>
+							<Attribute>config</Attribute>
+							<Category>source</Category>
+							<Condition>GCC Exe</Condition>
+							<FileContentHash>Qjqe1jYsYQB+vQG2A3hhiA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/gcc/system_samd21.c</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\gcc\gcc\startup_samd21.c</AbsolutePath>
+							<Attribute>config</Attribute>
+							<Category>source</Category>
+							<Condition>GCC Exe</Condition>
+							<FileContentHash>pLNlIy+Llw/GLgds0gbQQA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/gcc/gcc/startup_samd21.c</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\gcc\gcc\samd21g18a_flash.ld</AbsolutePath>
+							<Attribute>config</Attribute>
+							<Category>linkerScript</Category>
+							<Condition>GCC Exe</Condition>
+							<FileContentHash>4xbqLG5DtSn/T8pJoWAvNA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/gcc/gcc/samd21g18a_flash.ld</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\gcc\gcc\samd21g18a_sram.ld</AbsolutePath>
+							<Attribute>config</Attribute>
+							<Category>other</Category>
+							<Condition>GCC Exe</Condition>
+							<FileContentHash>K9GWjx6oZkcBnxrHUbvSwA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/gcc/gcc/samd21g18a_sram.ld</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+					</Files>
+					<PackName>SAMD21_DFP</PackName>
+					<PackPath>C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/SAMD21_DFP/1.0.222/Atmel.SAMD21_DFP.pdsc</PackPath>
+					<PackVersion>1.0.222</PackVersion>
+					<PresentInProject>true</PresentInProject>
+					<ReferenceConditionId>ATSAMD21G18A</ReferenceConditionId>
+					<RteComponents>
+						<d4p1:string></d4p1:string>
+					</RteComponents>
+					<Status>Resolved</Status>
+					<VersionMode>Fixed</VersionMode>
+					<IsComponentInAtProject>true</IsComponentInAtProject>
+				</d4p1:anyType>
+			</DependentComponents>
+			<Description></Description>
+			<Files xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
+				<d4p1:anyType i:type="FileInfo">
+					<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\arm\cmsis\4.2.0\CMSIS\Documentation\Core\html\index.html</AbsolutePath>
+					<Attribute></Attribute>
+					<Category>doc</Category>
+					<Condition></Condition>
+					<FileContentHash>Fm1Ae7doPh4708FZQAIEpw==</FileContentHash>
+					<FileVersion></FileVersion>
+					<Name>CMSIS\Documentation\Core\html\index.html</Name>
+					<SelectString></SelectString>
+					<SourcePath></SourcePath>
+				</d4p1:anyType>
+				<d4p1:anyType i:type="FileInfo">
+					<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\arm\cmsis\4.2.0\CMSIS\Include\</AbsolutePath>
+					<Attribute></Attribute>
+					<Category>include</Category>
+					<Condition></Condition>
+					<FileContentHash i:nil="true" />
+					<FileVersion></FileVersion>
+					<Name>CMSIS\Include\</Name>
+					<SelectString></SelectString>
+					<SourcePath></SourcePath>
+				</d4p1:anyType>
+			</Files>
+			<PackName>CMSIS</PackName>
+			<PackPath>C:/Program Files (x86)/Atmel/Studio/7.0/Packs/arm/cmsis/4.2.0/ARM.CMSIS.pdsc</PackPath>
+			<PackVersion>4.2.0</PackVersion>
+			<PresentInProject>true</PresentInProject>
+			<ReferenceConditionId>CMSIS Core</ReferenceConditionId>
+			<RteComponents xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
+				<d4p1:string></d4p1:string>
+			</RteComponents>
+			<Status>Resolved</Status>
+			<VersionMode>Fixed</VersionMode>
+			<IsComponentInAtProject>true</IsComponentInAtProject>
+		</ProjectComponent>
+		<ProjectComponent z:Ref="i2" xmlns:z="http://schemas.microsoft.com/2003/10/Serialization/" />
+	</ProjectComponents>
+</Store>
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/asp.cproj
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/asp.cproj	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/asp.cproj	(revision 136)
@@ -0,0 +1,169 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003" ToolsVersion="14.0">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
+    <ProjectVersion>7.0</ProjectVersion>
+    <ToolchainName>com.Atmel.ARMGCC.C</ToolchainName>
+    <ProjectGuid>dce6c7e3-ee26-4d79-826b-08594b9ad897</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>C</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>asp</AssemblyName>
+    <Name>asp</Name>
+    <RootNamespace>asp</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>true</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <preserveEEPROM>true</preserveEEPROM>
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>4</eraseonlaunchrule>
+    <ExternalProgrammingToolCommand />
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
+        <dependencies>
+          <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.27.3" />
+        </dependencies>
+      </framework-data>
+    </AsfFrameworkConfig>
+    <avrtool>com.atmel.avrdbg.tool.edbg</avrtool>
+    <avrtoolserialnumber>FFFFFFFFFFFFFFFFFFFF</avrtoolserialnumber>
+    <avrdeviceexpectedsignature>0x10010005</avrdeviceexpectedsignature>
+    <avrtoolinterface>SWD</avrtoolinterface>
+    <com_atmel_avrdbg_tool_edbg>
+      <ToolOptions>
+        <InterfaceProperties>
+          <SwdClock>2000000</SwdClock>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.edbg</ToolType>
+      <ToolNumber>FFFFFFFFFFFFFFFFFFFF</ToolNumber>
+      <ToolName>EDBG</ToolName>
+    </com_atmel_avrdbg_tool_edbg>
+    <avrtoolinterfaceclock>2000000</avrtoolinterfaceclock>
+    <UseGdb>False</UseGdb>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
+    <ToolchainSettings>
+      <ArmGcc>
+  <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
+  <armgcc.common.outputfiles.lss>True</armgcc.common.outputfiles.lss>
+  <armgcc.common.outputfiles.eep>True</armgcc.common.outputfiles.eep>
+  <armgcc.common.outputfiles.bin>True</armgcc.common.outputfiles.bin>
+  <armgcc.common.outputfiles.srec>True</armgcc.common.outputfiles.srec>
+  <armgcc.compiler.symbols.DefSymbols>
+    <ListValues>
+      <Value>NDEBUG</Value>
+    </ListValues>
+  </armgcc.compiler.symbols.DefSymbols>
+  <armgcc.compiler.directories.IncludePaths>
+    <ListValues>
+      <Value>%24(PackRepoDir)\atmel\SAMD21_DFP\1.0.222\samd21a\include</Value>
+      <Value>%24(PackRepoDir)\arm\cmsis\4.2.0\CMSIS\Include\</Value>
+    </ListValues>
+  </armgcc.compiler.directories.IncludePaths>
+  <armgcc.compiler.optimization.level>Optimize for size (-Os)</armgcc.compiler.optimization.level>
+  <armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
+  <armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
+  <armgcc.linker.libraries.Libraries>
+    <ListValues>
+      <Value>libm</Value>
+    </ListValues>
+  </armgcc.linker.libraries.Libraries>
+  <armgcc.linker.libraries.LibrarySearchPaths>
+    <ListValues>
+      <Value>%24(ProjectDir)\Device_Startup</Value>
+    </ListValues>
+  </armgcc.linker.libraries.LibrarySearchPaths>
+  <armgcc.linker.optimization.GarbageCollectUnusedSections>True</armgcc.linker.optimization.GarbageCollectUnusedSections>
+  <armgcc.linker.miscellaneous.LinkerFlags>-Tsamd21g18a_flash.ld</armgcc.linker.miscellaneous.LinkerFlags>
+  <armgcc.preprocessingassembler.general.IncludePaths>
+    <ListValues>
+      <Value>%24(PackRepoDir)\atmel\SAMD21_DFP\1.0.222\samd21a\include</Value>
+      <Value>%24(PackRepoDir)\arm\cmsis\4.2.0\CMSIS\Include\</Value>
+    </ListValues>
+  </armgcc.preprocessingassembler.general.IncludePaths>
+</ArmGcc>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
+    <ToolchainSettings>
+      <ArmGcc>
+  <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
+  <armgcc.common.outputfiles.lss>True</armgcc.common.outputfiles.lss>
+  <armgcc.common.outputfiles.eep>True</armgcc.common.outputfiles.eep>
+  <armgcc.common.outputfiles.bin>True</armgcc.common.outputfiles.bin>
+  <armgcc.common.outputfiles.srec>True</armgcc.common.outputfiles.srec>
+  <armgcc.compiler.symbols.DefSymbols>
+    <ListValues>
+      <Value>DEBUG</Value>
+    </ListValues>
+  </armgcc.compiler.symbols.DefSymbols>
+  <armgcc.compiler.directories.IncludePaths>
+    <ListValues>
+      <Value>%24(PackRepoDir)\atmel\SAMD21_DFP\1.0.222\samd21a\include</Value>
+      <Value>%24(PackRepoDir)\arm\cmsis\4.2.0\CMSIS\Include\</Value>
+    </ListValues>
+  </armgcc.compiler.directories.IncludePaths>
+  <armgcc.compiler.optimization.level>Optimize (-O1)</armgcc.compiler.optimization.level>
+  <armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
+  <armgcc.compiler.optimization.DebugLevel>Maximum (-g3)</armgcc.compiler.optimization.DebugLevel>
+  <armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
+  <armgcc.linker.libraries.Libraries>
+    <ListValues>
+      <Value>libm</Value>
+    </ListValues>
+  </armgcc.linker.libraries.Libraries>
+  <armgcc.linker.libraries.LibrarySearchPaths>
+    <ListValues>
+      <Value>%24(ProjectDir)\Device_Startup</Value>
+    </ListValues>
+  </armgcc.linker.libraries.LibrarySearchPaths>
+  <armgcc.linker.optimization.GarbageCollectUnusedSections>True</armgcc.linker.optimization.GarbageCollectUnusedSections>
+  <armgcc.linker.miscellaneous.LinkerFlags>-Tsamd21g18a_flash.ld</armgcc.linker.miscellaneous.LinkerFlags>
+  <armgcc.assembler.debugging.DebugLevel>Default (-g)</armgcc.assembler.debugging.DebugLevel>
+  <armgcc.preprocessingassembler.general.IncludePaths>
+    <ListValues>
+      <Value>%24(PackRepoDir)\atmel\SAMD21_DFP\1.0.222\samd21a\include</Value>
+      <Value>%24(PackRepoDir)\arm\cmsis\4.2.0\CMSIS\Include\</Value>
+    </ListValues>
+  </armgcc.preprocessingassembler.general.IncludePaths>
+  <armgcc.preprocessingassembler.debugging.DebugLevel>Default (-Wa,-g)</armgcc.preprocessingassembler.debugging.DebugLevel>
+</ArmGcc>
+    </ToolchainSettings>
+    <UsesExternalMakeFile>True</UsesExternalMakeFile>
+    <OutputDirectory>
+    </OutputDirectory>
+    <BuildTarget>all</BuildTarget>
+    <CleanTarget>clean</CleanTarget>
+    <ExternalMakeFilePath>Makefile</ExternalMakeFilePath>
+  </PropertyGroup>
+  <ItemGroup>
+    <Compile Include="sample1.c">
+      <SubType>compile</SubType>
+    </Compile>
+    <Compile Include="sample1.h">
+      <SubType>compile</SubType>
+    </Compile>
+  </ItemGroup>
+  <ItemGroup>
+    <None Include="sample1.cfg">
+      <SubType>compile</SubType>
+    </None>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/sample1.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/sample1.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/sample1.c	(revision 136)
@@ -0,0 +1,580 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2012 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: sample1.c 2416 2012-09-07 08:06:20Z ertl-hiro $
+ */
+
+/* 
+ *  ãµã³ãã«ãã­ã°ã©ã (1)ã®æ¬ä½
+ *
+ *  ASPã«ã¼ãã«ã®åºæ¬çãªåä½ãç¢ºèªããããã®ãµã³ãã«ãã­ã°ã©ã ï¼
+ *
+ *  ãã­ã°ã©ã ã®æ¦è¦:
+ *
+ *  ã¦ã¼ã¶ã¤ã³ã¿ãã§ã¼ã¹ãåãæã¤ã¡ã¤ã³ã¿ã¹ã¯ï¼ã¿ã¹ã¯ID: MAIN_TASKï¼åª
+ *  å
+åº¦: MAIN_PRIORITYï¼ã¨ï¼3ã¤ã®ä¸¦è¡å®è¡ãããã¿ã¹ã¯ï¼ã¿ã¹ã¯ID:
+ *  TASK1ï½TASK3ï¼åæåªå
+åº¦: MID_PRIORITYï¼ã§æ§æãããï¼ã¾ãï¼èµ·åå¨
+ *  æã2ç§ã®å¨æãã³ãã©ï¼å¨æãã³ãã©ID: CYCHDR1ï¼ãç¨ããï¼
+ *
+ *  ä¸¦è¡å®è¡ãããã¿ã¹ã¯ã¯ï¼task_loopåç©ºã«ã¼ããå®è¡ããåº¦ã«ï¼ã¿ã¹ã¯ã
+ *  å®è¡ä¸­ã§ãããã¨ãããããã¡ãã»ã¼ã¸ãè¡¨ç¤ºããï¼ç©ºã«ã¼ããå®è¡ãã
+ *  ã®ã¯ï¼ç©ºã«ã¼ããªãã§ã¡ãã»ã¼ã¸ãåºåããã¨ï¼å¤éã®ã¡ãã»ã¼ã¸ãåºå
+ *  ããï¼ãã­ã°ã©ã ã®åä½ãç¢ºèªãããããªãããã§ããï¼ã¾ãï¼ä½éãªã·
+ *  ãªã¢ã«ãã¼ããç¨ãã¦ã¡ãã»ã¼ã¸ãåºåããå ´åã«ï¼ãã¹ã¦ã®ã¡ãã»ã¼ã¸
+ *  ãåºåã§ããããã«ï¼ã¡ãã»ã¼ã¸ã®éãå¶éããã¨ããçç±ãããï¼
+ *
+ *  å¨æãã³ãã©ã¯ï¼ä¸ã¤ã®åªå
+åº¦ï¼HIGH_PRIORITYï¼MID_PRIORITYï¼
+ *  LOW_PRIORITYï¼ã®ã¬ãã£ã­ã¥ã¼ãåè»¢ãããï¼ãã­ã°ã©ã ã®èµ·åç´å¾ã¯ï¼
+ *  å¨æãã³ãã©ã¯åæ­¢ç¶æ
+ã«ãªã£ã¦ããï¼
+ *
+ *  ã¡ã¤ã³ã¿ã¹ã¯ã¯ï¼ã·ãªã¢ã«I/Oãã¼ãããã®æå­å
+¥åãè¡ãï¼æå­å
+¥åã
+ *  å¾
+ã£ã¦ããéã¯ï¼ä¸¦è¡å®è¡ãããã¿ã¹ã¯ãå®è¡ããã¦ããï¼ï¼å
+¥åããã
+ *  æå­ã«å¯¾å¿ããå¦çãå®è¡ããï¼å
+¥åãããæå­ã¨å¦çã®é¢ä¿ã¯æ¬¡ã®éãï¼
+ *  Control-Cã¾ãã¯'Q'ãå
+¥åãããã¨ï¼ãã­ã°ã©ã ãçµäºããï¼
+ *
+ *  '1' : å¯¾è±¡ã¿ã¹ã¯ãTASK1ã«åãæããï¼åæè¨­å®ï¼ï¼
+ *  '2' : å¯¾è±¡ã¿ã¹ã¯ãTASK2ã«åãæããï¼
+ *  '3' : å¯¾è±¡ã¿ã¹ã¯ãTASK3ã«åãæããï¼
+ *  'a' : å¯¾è±¡ã¿ã¹ã¯ãact_tskã«ããèµ·åããï¼
+ *  'A' : å¯¾è±¡ã¿ã¹ã¯ã«å¯¾ããèµ·åè¦æ±ãcan_actã«ããã­ã£ã³ã»ã«ããï¼
+ *  'e' : å¯¾è±¡ã¿ã¹ã¯ã«ext_tskãå¼ã³åºããï¼çµäºãããï¼
+ *  't' : å¯¾è±¡ã¿ã¹ã¯ãter_tskã«ããå¼·å¶çµäºããï¼
+ *  '>' : å¯¾è±¡ã¿ã¹ã¯ã®åªå
+åº¦ãHIGH_PRIORITYã«ããï¼
+ *  '=' : å¯¾è±¡ã¿ã¹ã¯ã®åªå
+åº¦ãMID_PRIORITYã«ããï¼
+ *  '<' : å¯¾è±¡ã¿ã¹ã¯ã®åªå
+åº¦ãLOW_PRIORITYã«ããï¼
+ *  'G' : å¯¾è±¡ã¿ã¹ã¯ã®åªå
+åº¦ãget_priã§èª­ã¿åºãï¼
+ *  's' : å¯¾è±¡ã¿ã¹ã¯ã«slp_tskãå¼ã³åºããï¼èµ·åºå¾
+ã¡ã«ãããï¼
+ *  'S' : å¯¾è±¡ã¿ã¹ã¯ã«tslp_tsk(10ç§)ãå¼ã³åºããï¼èµ·åºå¾
+ã¡ã«ãããï¼
+ *  'w' : å¯¾è±¡ã¿ã¹ã¯ãwup_tskã«ããèµ·åºããï¼
+ *  'W' : å¯¾è±¡ã¿ã¹ã¯ã«å¯¾ããèµ·åºè¦æ±ãcan_wupã«ããã­ã£ã³ã»ã«ããï¼
+ *  'l' : å¯¾è±¡ã¿ã¹ã¯ãrel_waiã«ããå¼·å¶çã«å¾
+ã¡è§£é¤ã«ããï¼
+ *  'u' : å¯¾è±¡ã¿ã¹ã¯ãsus_tskã«ããå¼·å¶å¾
+ã¡ç¶æ
+ã«ããï¼
+ *  'm' : å¯¾è±¡ã¿ã¹ã¯ã®å¼·å¶å¾
+ã¡ç¶æ
+ãrsm_tskã«ããè§£é¤ããï¼
+ *  'd' : å¯¾è±¡ã¿ã¹ã¯ã«dly_tsk(10ç§)ãå¼ã³åºããï¼æéçµéå¾
+ã¡ã«ãããï¼
+ *  'x' : å¯¾è±¡ã¿ã¹ã¯ã«ä¾å¤ãã¿ã¼ã³0x0001ã®ä¾å¤å¦çãè¦æ±ããï¼
+ *  'X' : å¯¾è±¡ã¿ã¹ã¯ã«ä¾å¤ãã¿ã¼ã³0x0002ã®ä¾å¤å¦çãè¦æ±ããï¼
+ *  'y' : å¯¾è±¡ã¿ã¹ã¯ã«dis_texãå¼ã³åºããï¼ã¿ã¹ã¯ä¾å¤ãç¦æ­¢ããï¼
+ *  'Y' : å¯¾è±¡ã¿ã¹ã¯ã«ena_texãå¼ã³åºããï¼ã¿ã¹ã¯ä¾å¤ãè¨±å¯ããï¼
+ *  'r' : 3ã¤ã®åªå
+åº¦ï¼HIGH_PRIORITYï¼MID_PRIORITYï¼LOW_PRIORITYï¼ã®ã¬
+ *        ãã£ã­ã¥ã¼ãåè»¢ãããï¼
+ *  'c' : å¨æãã³ãã©ãåä½éå§ãããï¼
+ *  'C' : å¨æãã³ãã©ãåä½åæ­¢ãããï¼
+ *  'b' : ã¢ã©ã¼ã ãã³ãã©ã5ç§å¾ã«èµ·åããããåä½éå§ãããï¼
+ *  'B' : ã¢ã©ã¼ã ãã³ãã©ãåä½åæ­¢ãããï¼
+ *  'z' : å¯¾è±¡ã¿ã¹ã¯ã«CPUä¾å¤ãçºçãããï¼ã¿ã¹ã¯ãçµäºãããï¼ï¼
+ *  'Z' : å¯¾è±¡ã¿ã¹ã¯ã«CPUã­ãã¯ç¶æ
+ã§CPUä¾å¤ãçºçãããï¼ãã­ã°ã©ã ã
+ *        çµäºããï¼ï¼
+ *  'V' : get_utmã§æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ã2åèª­ãï¼
+ *  'v' : çºè¡ããã·ã¹ãã ã³ã¼ã«ãè¡¨ç¤ºããï¼ããã©ã«ãï¼ï¼
+ *  'q' : çºè¡ããã·ã¹ãã ã³ã¼ã«ãè¡¨ç¤ºããªãï¼
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <t_stdlib.h>
+#include "syssvc/serial.h"
+#include "syssvc/syslog.h"
+#include "kernel_cfg.h"
+#include "sample1.h"
+
+/*
+ *  ãµã¼ãã¹ã³ã¼ã«ã®ã¨ã©ã¼ã®ã­ã°åºå
+ */
+Inline void
+svc_perror(const char *file, int_t line, const char *expr, ER ercd)
+{
+	if (ercd < 0) {
+		t_perror(LOG_ERROR, file, line, expr, ercd);
+	}
+}
+
+#define	SVC_PERROR(expr)	svc_perror(__FILE__, __LINE__, #expr, (expr))
+
+/*
+ *  ä¸¦è¡å®è¡ãããã¿ã¹ã¯ã¸ã®ã¡ãã»ã¼ã¸é å
+ */
+char	message[3];
+
+/*
+ *  ã«ã¼ãåæ°
+ */
+ulong_t	task_loop;		/* ã¿ã¹ã¯å
+ã§ã®ã«ã¼ãåæ° */
+ulong_t	tex_loop;		/* ä¾å¤å¦çã«ã¼ãã³å
+ã§ã®ã«ã¼ãåæ° */
+
+/*
+ *  ä¸¦è¡å®è¡ãããã¿ã¹ã¯
+ */
+void task(intptr_t exinf)
+{
+	volatile ulong_t	i;
+	int_t		n = 0;
+	int_t		tskno = (int_t) exinf;
+	const char	*graph[] = { "|", "  +", "    *" };
+	char		c;
+
+	SVC_PERROR(ena_tex());
+	while (true) {
+		syslog(LOG_NOTICE, "task%d is running (%03d).   %s",
+										tskno, ++n, graph[tskno-1]);
+		for (i = 0; i < task_loop; i++);
+		c = message[tskno-1];
+		message[tskno-1] = 0;
+		switch (c) {
+		case 'e':
+			syslog(LOG_INFO, "#%d#ext_tsk()", tskno);
+			SVC_PERROR(ext_tsk());
+			assert(0);
+		case 's':
+			syslog(LOG_INFO, "#%d#slp_tsk()", tskno);
+			SVC_PERROR(slp_tsk());
+			break;
+		case 'S':
+			syslog(LOG_INFO, "#%d#tslp_tsk(10000)", tskno);
+			SVC_PERROR(tslp_tsk(10000));
+			break;
+		case 'd':
+			syslog(LOG_INFO, "#%d#dly_tsk(10000)", tskno);
+			SVC_PERROR(dly_tsk(10000));
+			break;
+		case 'y':
+			syslog(LOG_INFO, "#%d#dis_tex()", tskno);
+			SVC_PERROR(dis_tex());
+			break;
+		case 'Y':
+			syslog(LOG_INFO, "#%d#ena_tex()", tskno);
+			SVC_PERROR(ena_tex());
+			break;
+#ifdef CPUEXC1
+		case 'z':
+			syslog(LOG_NOTICE, "#%d#raise CPU exception", tskno);
+			RAISE_CPU_EXCEPTION;
+			break;
+		case 'Z':
+			SVC_PERROR(loc_cpu());
+			syslog(LOG_NOTICE, "#%d#raise CPU exception", tskno);
+			RAISE_CPU_EXCEPTION;
+			SVC_PERROR(unl_cpu());
+			break;
+#endif /* CPUEXC1 */
+		default:
+			break;
+		}
+	}
+}
+
+/*
+ *  ä¸¦è¡ãã¦å®è¡ãããã¿ã¹ã¯ç¨ã®ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³
+ */
+void tex_routine(TEXPTN texptn, intptr_t exinf)
+{
+	volatile ulong_t	i;
+	int_t	tskno = (int_t) exinf;
+
+	syslog(LOG_NOTICE, "task%d receives exception 0x%04x.", tskno, texptn);
+	for (i = 0; i < tex_loop; i++);
+
+	if ((texptn & 0x8000U) != 0U) {
+		syslog(LOG_INFO, "#%d#ext_tsk()", tskno);
+		SVC_PERROR(ext_tsk());
+		assert(0);
+	}
+}
+
+/*
+ *  CPUä¾å¤ãã³ãã©
+ */
+#ifdef CPUEXC1
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	ID		tskid;
+
+	syslog(LOG_NOTICE, "CPU exception handler (p_excinf = %08p).", p_excinf);
+	if (sns_ctx() != true) {
+		syslog(LOG_WARNING,
+					"sns_ctx() is not true in CPU exception handler.");
+	}
+	if (sns_dpn() != true) {
+		syslog(LOG_WARNING,
+					"sns_dpn() is not true in CPU exception handler.");
+	}
+	syslog(LOG_INFO, "sns_loc = %d sns_dsp = %d sns_tex = %d",
+									sns_loc(), sns_dsp(), sns_tex());
+	syslog(LOG_INFO, "xsns_dpn = %d xsns_xpn = %d",
+									xsns_dpn(p_excinf), xsns_xpn(p_excinf));
+
+	if (xsns_xpn(p_excinf)) {
+		syslog(LOG_NOTICE, "Sample program ends with exception.");
+		SVC_PERROR(ext_ker());
+		assert(0);
+	}
+
+	SVC_PERROR(iget_tid(&tskid));
+	SVC_PERROR(iras_tex(tskid, 0x8000U));
+}
+
+#endif /* CPUEXC1 */
+
+/*
+ *  å¨æãã³ãã©
+ *
+ *  HIGH_PRIORITYï¼MID_PRIORITYï¼LOW_PRIORITY ã®ååªå
+åº¦ã®ã¬ãã£ã­ã¥ã¼
+ *  ãåè»¢ãããï¼
+ */
+void cyclic_handler(intptr_t exinf)
+{
+	SVC_PERROR(irot_rdq(HIGH_PRIORITY));
+	SVC_PERROR(irot_rdq(MID_PRIORITY));
+	SVC_PERROR(irot_rdq(LOW_PRIORITY));
+}
+
+/*
+ *  ã¢ã©ã¼ã ãã³ãã©
+ *
+ *  HIGH_PRIORITYï¼MID_PRIORITYï¼LOW_PRIORITY ã®ååªå
+åº¦ã®ã¬ãã£ã­ã¥ã¼
+ *  ãåè»¢ãããï¼
+ */
+void alarm_handler(intptr_t exinf)
+{
+	SVC_PERROR(irot_rdq(HIGH_PRIORITY));
+	SVC_PERROR(irot_rdq(MID_PRIORITY));
+	SVC_PERROR(irot_rdq(LOW_PRIORITY));
+}
+
+/*
+ *  ã¡ã¤ã³ã¿ã¹ã¯
+ */
+void main_task(intptr_t exinf)
+{
+	char	c;
+	ID		tskid = TASK1;
+	int_t	tskno = 1;
+	ER_UINT	ercd;
+	PRI		tskpri;
+#ifndef TASK_LOOP
+	volatile ulong_t	i;
+	SYSTIM	stime1, stime2;
+#endif /* TASK_LOOP */
+#ifdef TOPPERS_SUPPORT_GET_UTM
+	SYSUTM	utime1, utime2;
+#endif /* TOPPERS_SUPPORT_GET_UTM */
+
+	SVC_PERROR(syslog_msk_log(LOG_UPTO(LOG_INFO), LOG_UPTO(LOG_EMERG)));
+	syslog(LOG_NOTICE, "Sample program starts (exinf = %d).", (int_t) exinf);
+
+	/*
+	 *  ã·ãªã¢ã«ãã¼ãã®åæå
+	 *
+	 *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯ã¨åãã·ãªã¢ã«ãã¼ããä½¿ãå ´åãªã©ï¼ã·ãªã¢ã«
+	 *  ãã¼ãããªã¼ãã³æ¸ã¿ã®å ´åã«ã¯ããã§E_OBJã¨ã©ã¼ã«ãªããï¼æ¯éã¯
+	 *  ãªãï¼
+	 */
+	ercd = serial_opn_por(TASK_PORTID);
+	if (ercd < 0 && MERCD(ercd) != E_OBJ) {
+		syslog(LOG_ERROR, "%s (%d) reported by `serial_opn_por'.",
+									itron_strerror(ercd), SERCD(ercd));
+	}
+	SVC_PERROR(serial_ctl_por(TASK_PORTID,
+							(IOCTL_CRLF | IOCTL_FCSND | IOCTL_FCRCV)));
+
+	/*
+ 	 *  ã«ã¼ãåæ°ã®è¨­å®
+	 *
+	 *  ä¸¦è¡å®è¡ãããã¿ã¹ã¯å
+ã§ã®ç©ºã«ã¼ãã®åæ°ï¼task_loopï¼ã¯ï¼ç©ºã«ã¼
+	 *  ãã®å®è¡æéãç´0.4ç§ã«ãªãããã«è¨­å®ããï¼ãã®è¨­å®ã®ããã«ï¼
+	 *  LOOP_REFåã®ç©ºã«ã¼ãã®å®è¡æéãï¼ãã®åå¾ã§get_timãå¼ã¶ãã¨ã§
+	 *  æ¸¬å®ãï¼ãã®æ¸¬å®çµæããç©ºã«ã¼ãã®å®è¡æéã0.4ç§ã«ãªãã«ã¼ãå
+	 *  æ°ãæ±ãï¼task_loopã«è¨­å®ããï¼
+	 *
+	 *  LOOP_REFã¯ï¼ããã©ã«ãã§ã¯1,000,000ã«è¨­å®ãã¦ãããï¼æ³å®ããã
+	 *  ãé
+ããã­ã»ããµã§ã¯ï¼ãµã³ãã«ãã­ã°ã©ã ã®å®è¡éå§ã«æéããã
+	 *  ããããã¨ããåé¡ãçããï¼éã«æ³å®ããããéããã­ã»ããµã§ã¯ï¼
+	 *  LOOP_REFåã®ç©ºã«ã¼ãã®å®è¡æéãç­ããªãï¼task_loopã«è¨­å®ããå¤
+	 *  ã®èª¤å·®ãå¤§ãããªãã¨ããåé¡ãããï¼
+	 *
+	 *  ããã§ï¼ãã®ãããªã¿ã¼ã²ããã§ã¯ï¼target_test.hã§ï¼LOOP_REFãé©
+	 *  åãªå¤ã«å®ç¾©ããã®ãæã¾ããï¼
+	 *
+	 *  ã¾ãï¼task_loopã®å¤ãåºå®ãããå ´åã«ã¯ï¼ãã®å¤ãTASK_LOOPã«ã
+	 *  ã¯ã­å®ç¾©ããï¼TASK_LOOPããã¯ã­å®ç¾©ããã¦ããå ´åï¼ä¸è¨ã®æ¸¬å®ã
+	 *  è¡ããã«ï¼TASK_LOOPã«å®ç¾©ãããå¤ãç©ºã«ã¼ãã®åæ°ã¨ããï¼
+	 *
+	 * ã¿ã¼ã²ããã«ãã£ã¦ã¯ï¼ç©ºã«ã¼ãã®å®è¡æéã®1åç®ã®æ¸¬å®ã§ï¼æ¬æ¥ã
+	 * ããé·ãã«ãªããã®ãããï¼ãã®ãããªã¿ã¼ã²ããã§ã¯ï¼MEASURE_TWICE
+	 * ããã¯ã­å®ç¾©ãããã¨ã§ï¼1åç®ã®æ¸¬å®çµæãæ¨ã¦ã¦ï¼2åç®ã®æ¸¬å®çµæ
+	 * ãä½¿ãï¼
+	 *
+	 *  ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³å
+ã§ã®ç©ºã«ã¼ãã®åæ°ï¼tex_loopï¼ã¯ï¼
+	 *  task_loopã®4åã®1ã®å¤ï¼ç©ºã«ã¼ãã®å®è¡æéã0.1ç§ã«ãªãã«ã¼ãå
+	 *  æ°ï¼ã«è¨­å®ããï¼
+	 */
+#ifdef TASK_LOOP
+	task_loop = TASK_LOOP;
+#else /* TASK_LOOP */
+
+#ifdef MEASURE_TWICE
+	task_loop = LOOP_REF;
+	SVC_PERROR(get_tim(&stime1));
+	for (i = 0; i < task_loop; i++);
+	SVC_PERROR(get_tim(&stime2));
+#endif /* MEASURE_TWICE */
+
+	task_loop = LOOP_REF;
+	SVC_PERROR(get_tim(&stime1));
+	for (i = 0; i < task_loop; i++);
+	SVC_PERROR(get_tim(&stime2));
+	task_loop = LOOP_REF * 400UL / (stime2 - stime1);
+
+#endif /* TASK_LOOP */
+	tex_loop = task_loop / 4;
+
+	/*
+ 	 *  ã¿ã¹ã¯ã®èµ·å
+	 */
+	SVC_PERROR(act_tsk(TASK1));
+	SVC_PERROR(act_tsk(TASK2));
+	SVC_PERROR(act_tsk(TASK3));
+
+	/*
+ 	 *  ã¡ã¤ã³ã«ã¼ã
+	 */
+	do {
+		SVC_PERROR(serial_rea_dat(TASK_PORTID, &c, 1));
+		switch (c) {
+		case 'e':
+		case 's':
+		case 'S':
+		case 'd':
+		case 'y':
+		case 'Y':
+		case 'z':
+		case 'Z':
+			message[tskno-1] = c;
+			break;
+		case '1':
+			tskno = 1;
+			tskid = TASK1;
+			break;
+		case '2':
+			tskno = 2;
+			tskid = TASK2;
+			break;
+		case '3':
+			tskno = 3;
+			tskid = TASK3;
+			break;
+		case 'a':
+			syslog(LOG_INFO, "#act_tsk(%d)", tskno);
+			SVC_PERROR(act_tsk(tskid));
+			break;
+		case 'A':
+			syslog(LOG_INFO, "#can_act(%d)", tskno);
+			SVC_PERROR(ercd = can_act(tskid));
+			if (ercd >= 0) {
+				syslog(LOG_NOTICE, "can_act(%d) returns %d", tskno, ercd);
+			}
+			break;
+		case 't':
+			syslog(LOG_INFO, "#ter_tsk(%d)", tskno);
+			SVC_PERROR(ter_tsk(tskid));
+			break;
+		case '>':
+			syslog(LOG_INFO, "#chg_pri(%d, HIGH_PRIORITY)", tskno);
+			SVC_PERROR(chg_pri(tskid, HIGH_PRIORITY));
+			break;
+		case '=':
+			syslog(LOG_INFO, "#chg_pri(%d, MID_PRIORITY)", tskno);
+			SVC_PERROR(chg_pri(tskid, MID_PRIORITY));
+			break;
+		case '<':
+			syslog(LOG_INFO, "#chg_pri(%d, LOW_PRIORITY)", tskno);
+			SVC_PERROR(chg_pri(tskid, LOW_PRIORITY));
+			break;
+		case 'G':
+			syslog(LOG_INFO, "#get_pri(%d, &tskpri)", tskno);
+			SVC_PERROR(ercd = get_pri(tskid, &tskpri));
+			if (ercd >= 0) {
+				syslog(LOG_NOTICE, "priority of task %d is %d", tskno, tskpri);
+			}
+			break;
+		case 'w':
+			syslog(LOG_INFO, "#wup_tsk(%d)", tskno);
+			SVC_PERROR(wup_tsk(tskid));
+			break;
+		case 'W':
+			syslog(LOG_INFO, "#can_wup(%d)", tskno);
+			SVC_PERROR(ercd = can_wup(tskid));
+			if (ercd >= 0) {
+				syslog(LOG_NOTICE, "can_wup(%d) returns %d", tskno, ercd);
+			}
+			break;
+		case 'l':
+			syslog(LOG_INFO, "#rel_wai(%d)", tskno);
+			SVC_PERROR(rel_wai(tskid));
+			break;
+		case 'u':
+			syslog(LOG_INFO, "#sus_tsk(%d)", tskno);
+			SVC_PERROR(sus_tsk(tskid));
+			break;
+		case 'm':
+			syslog(LOG_INFO, "#rsm_tsk(%d)", tskno);
+			SVC_PERROR(rsm_tsk(tskid));
+			break;
+		case 'x':
+			syslog(LOG_INFO, "#ras_tex(%d, 0x0001U)", tskno);
+			SVC_PERROR(ras_tex(tskid, 0x0001U));
+			break;
+		case 'X':
+			syslog(LOG_INFO, "#ras_tex(%d, 0x0002U)", tskno);
+			SVC_PERROR(ras_tex(tskid, 0x0002U));
+			break;
+		case 'r':
+			syslog(LOG_INFO, "#rot_rdq(three priorities)");
+			SVC_PERROR(rot_rdq(HIGH_PRIORITY));
+			SVC_PERROR(rot_rdq(MID_PRIORITY));
+			SVC_PERROR(rot_rdq(LOW_PRIORITY));
+			break;
+		case 'c':
+			syslog(LOG_INFO, "#sta_cyc(1)");
+			SVC_PERROR(sta_cyc(CYCHDR1));
+			break;
+		case 'C':
+			syslog(LOG_INFO, "#stp_cyc(1)");
+			SVC_PERROR(stp_cyc(CYCHDR1));
+			break;
+		case 'b':
+			syslog(LOG_INFO, "#sta_alm(1, 5000)");
+			SVC_PERROR(sta_alm(ALMHDR1, 5000));
+			break;
+		case 'B':
+			syslog(LOG_INFO, "#stp_alm(1)");
+			SVC_PERROR(stp_alm(ALMHDR1));
+			break;
+
+		case 'V':
+#ifdef TOPPERS_SUPPORT_GET_UTM
+			SVC_PERROR(get_utm(&utime1));
+			SVC_PERROR(get_utm(&utime2));
+			syslog(LOG_NOTICE, "utime1 = %ld, utime2 = %ld",
+										(ulong_t) utime1, (ulong_t) utime2);
+#else /* TOPPERS_SUPPORT_GET_UTM */
+			syslog(LOG_NOTICE, "get_utm is not supported.");
+#endif /* TOPPERS_SUPPORT_GET_UTM */
+			break;
+
+		case 'v':
+			SVC_PERROR(syslog_msk_log(LOG_UPTO(LOG_INFO),
+										LOG_UPTO(LOG_EMERG)));
+			break;
+		case 'q':
+			SVC_PERROR(syslog_msk_log(LOG_UPTO(LOG_NOTICE),
+										LOG_UPTO(LOG_EMERG)));
+			break;
+
+#ifdef BIT_KERNEL
+		case ' ':
+			SVC_PERROR(loc_cpu());
+			{
+				extern ER	bit_kernel(void);
+
+				SVC_PERROR(ercd = bit_kernel());
+				if (ercd >= 0) {
+					syslog(LOG_NOTICE, "bit_kernel passed.");
+				}
+			}
+			SVC_PERROR(unl_cpu());
+			break;
+#endif /* BIT_KERNEL */
+
+		default:
+			break;
+		}
+	} while (c != '\003' && c != 'Q');
+
+	syslog(LOG_NOTICE, "Sample program ends.");
+	SVC_PERROR(ext_ker());
+	assert(0);
+}
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/sample1.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/sample1.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/sample1.cfg	(revision 136)
@@ -0,0 +1,26 @@
+/*
+ *  $Id: sample1.cfg 2416 2012-09-07 08:06:20Z ertl-hiro $
+ */
+
+/*
+ *  ãµã³ãã«ãã­ã°ã©ã (1)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+INCLUDE("syssvc/logtask.cfg");
+
+#include "sample1.h"
+CRE_TSK(TASK1, { TA_NULL, 1, task, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK2, { TA_NULL, 2, task, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK3, { TA_NULL, 3, task, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(MAIN_TASK, { TA_ACT, 0, main_task, MAIN_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK1, { TA_NULL, tex_routine });
+DEF_TEX(TASK2, { TA_NULL, tex_routine });
+DEF_TEX(TASK3, { TA_NULL, tex_routine });
+CRE_CYC(CYCHDR1, { TA_NULL, 0, cyclic_handler, 2000, 0 });
+CRE_ALM(ALMHDR1, { TA_NULL, 0, alarm_handler });
+#ifdef CPUEXC1
+DEF_EXC(CPUEXC1, { TA_NULL, cpuexc_handler });
+#endif /* CPUEXC1 */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/sample1.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/sample1.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/atmelstudio/sample1.h	(revision 136)
@@ -0,0 +1,112 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ *
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2004-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ *
+ *  $Id: sample1.h 2416 2012-09-07 08:06:20Z ertl-hiro $
+ */
+
+/*
+ *		ãµã³ãã«ãã­ã°ã©ã (1)ã®ããããã¡ã¤ã«
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+
+#define MAIN_PRIORITY	5		/* ã¡ã¤ã³ã¿ã¹ã¯ã®åªå
+åº¦ */
+								/* HIGH_PRIORITYããé«ããããã¨ */
+
+#define HIGH_PRIORITY	9		/* ä¸¦è¡å®è¡ãããã¿ã¹ã¯ã®åªå
+åº¦ */
+#define MID_PRIORITY	10
+#define LOW_PRIORITY	11
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+
+#ifndef TASK_PORTID
+#define	TASK_PORTID		1			/* æå­å
+¥åããã·ãªã¢ã«ãã¼ãID */
+#endif /* TASK_PORTID */
+
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+#ifndef LOOP_REF
+#define LOOP_REF		ULONG_C(1000000)	/* éåº¦è¨æ¸¬ç¨ã®ã«ã¼ãåæ° */
+#endif /* LOOP_REF */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	task(intptr_t exinf);
+extern void	main_task(intptr_t exinf);
+extern void	tex_routine(TEXPTN texptn, intptr_t exinf);
+#ifdef CPUEXC1
+extern void	cpuexc_handler(void *p_excinf);
+#endif /* CPUEXC1 */
+extern void	cyclic_handler(intptr_t exinf);
+extern void	alarm_handler(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/gdb.ini
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/gdb.ini	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/gdb.ini	(revision 136)
@@ -0,0 +1,4 @@
+target remote localhost:3333
+monitor program ./asp.bin verify 0x4000
+monitor reset halt
+monitor reset init
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/gdb_noflash.ini
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/gdb_noflash.ini	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/gdb_noflash.ini	(revision 136)
@@ -0,0 +1,3 @@
+target remote localhost:3333
+monitor reset halt
+monitor reset init
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/start.S
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/start.S	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/start.S	(revision 136)
@@ -0,0 +1,169 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008,2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ *  Copyright (C) 2013-2015 by Naoki Saito
+ *             Nagoya Municipal Industrial Research Institute, JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: start.S 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+                
+/*
+ *   ã«ã¼ãã«ç¨ã®ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«(ARM-Mç¨)
+ */
+#define TOPPERS_MACRO_ONLY
+#define UINT_C(val)		(val)		/* uint_tåã®å®æ°ãä½ããã¯ã­ */
+#define ULONG_C(val)	(val)		/* ulong_tåã®å®æ°ãä½ããã¯ã­ */
+#define CAST(type, val)	(val)		/* åã­ã£ã¹ããè¡ããã¯ã­ */
+
+#include "kernel_impl.h"
+#include "arm_m.h"
+
+/*
+ *  ã¹ã¿ã¼ãã¢ããã«ã¼ãã³
+ *
+ *  Threadã¢ã¼ãã§å¼ã³åºããããã¨ãåæã¨ãã¦ãï¼
+ */
+	.text
+	.align 2
+	.code 16
+	.syntax unified
+	.globl Reset_Handler
+	.globl _start
+	.type Reset_Handler, function
+	.type _start, function
+Reset_Handler:
+_start:
+	cpsid i                 /* å²è¾¼ã¿ã­ãã¯ç¶æ
+ã¸ */
+
+#ifdef INIT_MSP
+	/*
+	 * MSPã®è¨­å®
+	 */
+	mov   r0, #CONTROL_MSP  /* MSPãæå¹ã«  */
+	msr   control, r0
+	isb                     /* control ã®æä½å¾ã«å¿
+è¦ */
+	ldr  r0,=_kernel_istkpt
+	ldr  r1,[r0]
+	msr  msp, r1
+#endif /* INIT_MSP */
+
+	/*
+	 * hardware_init_hookã®å¼ã³åºã ï¼0ã§ãªãå ´åï¼
+	 *
+	 * ã¿ã¼ã²ãããã¼ãã¦ã§ã¢ã«ä¾å­ãã¦å¿
+è¦ãªåæåå¦çãããå ´å
+	 * ã¯ï¼hardware_init_hook ã¨ããé¢æ°ãç¨æãã
+	 */
+	ldr  r0, =hardware_init_hook
+	cmp  r0, #0
+	beq  start_1
+	blx  r0
+
+start_1:
+#ifndef OMIT_BSS_INIT
+	/*
+	 *  BSSã»ã¯ã·ã§ã³åæå
+	 */
+	movs  r0, #0
+	ldr  r1, =__bss_start__
+	ldr  r2, =__bss_end__
+	cmp  r1, r2
+	bhs  start_3
+start_2:
+	str  r0, [r1]
+	adds r1,r1, #4
+	cmp  r1, r2
+	blo  start_2
+#endif /* OMIT_BSS_INIT */
+
+
+start_3:
+
+#ifndef OMIT_DATA_INIT
+	/*
+	 *  DATAã»ã¯ã·ã§ã³åæå
+	 *  __idata_start ãã __idata_end ã¾ã§ãï¼__data_start ä»¥éã«
+	 *  ã³ãã¼ãã
+	 */
+	ldr  r1, =__etext
+	ldr  r3, =__data_start__
+	ldr  r2, =__data_end__
+	cmp  r3, r2
+	bhs  start_5
+start_4:
+	ldr  r0, [r1]
+	str  r0, [r3]
+	adds  r1, #4
+	adds  r3, #4
+	cmp  r3, r2
+	blo  start_4
+#endif /* OMIT_DATA_INIT */
+
+	/*
+	 *  software_init_hook ãå¼åºãï¼0 ã§ãªãå ´åï¼
+	 *
+	 *  ã½ããã¦ã§ã¢ç°å¢ï¼ç¹ã«ã©ã¤ãã©ãªï¼ã«ä¾å­ãã¦å¿
+è¦ãªåæåå¦
+	 *  çãããå ´åã¯ï¼software_init_hook ã¨ããé¢æ°ãç¨æããã°
+	 *  ããï¼
+	 */
+start_5:
+	ldr  r0, =software_init_hook
+	cmp  r0, #0
+	beq  start_6
+	blx  r0
+
+start_6:
+	bl   sta_ker
+
+l_end:
+	b   l_end
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target.tf	(revision 136)
@@ -0,0 +1,13 @@
+$ 
+$     ãã¹2ã®ã¿ã¼ã²ããä¾å­ãã³ãã¬ã¼ãï¼ARDUINO_M0ç¨ï¼
+$ 
+
+$FUNCTION VECTOR_ATTRIBUTE$
+	__attribute__ ((section(".isr_vector"))) $NL$
+$END$
+
+
+$ 
+$  ã³ã¢ä¾å­ã®ãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ã
+$ 
+$INCLUDE"arm_m_gcc/common/core.tf"$
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_asm.inc
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_asm.inc	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_asm.inc	(revision 136)
@@ -0,0 +1,1 @@
+#include "arm_m_gcc/common/core_asm.inc"
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_cfg1_out.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_cfg1_out.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_cfg1_out.h	(revision 136)
@@ -0,0 +1,15 @@
+/*
+ *  @(#) $Id: target_cfg1_out.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *		cfg1_out.cããªã³ã¯ããããã«å¿
+è¦ãªã¹ã¿ãã®å®ç¾©
+ */
+
+STK_T *const	_kernel_istkpt = 0x00;
+
+/*
+ *  ã³ã¢ä¾å­ã®ã¹ã¿ãã®å®ç¾© 
+ */
+#include "core_cfg1_out.h"
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_check.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_check.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_check.tf	(revision 136)
@@ -0,0 +1,8 @@
+$ 
+$     ãã¹3ã®ã¿ã¼ã²ããä¾å­ãã³ãã¬ã¼ãï¼ARDUINO_M0ç¨ï¼
+$ 
+
+$ 
+$  ãã¹3ã®ã³ã¢ä¾å­ã®ãã³ãã¬ã¼ãã®ã¤ã³ã¯ã«ã¼ã
+$ 
+$INCLUDE"arm_m_gcc/common/core_check.tf"$
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_config.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_config.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_config.c	(revision 136)
@@ -0,0 +1,155 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ *
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN  
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_config.c 2697 2015-11-06 04:00:42Z ertl-honda $
+ */
+
+/*
+ * ãããä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARDUINO_M0ç¨ï¼
+ */
+
+#include "kernel_impl.h"
+#include <sil.h>
+#include "target_serial.h"
+#include "variant.h"
+
+/*
+ *  start.Sããå¼ã³åºããããã¼ãã¦ã§ã¢ã®åæåå¦ç
+ */
+void
+hardware_init_hook(void)
+{
+	/*
+	 *  -fdata-sectionsãä½¿ç¨ããã¨istkãåé¤ããï¼
+	 *  cfgã®ãã¹3ã®ãã§ãã¯ãã¨ã©ã¼ã¨ãªãããï¼
+	 *  åé¤ãããªãããã«ãã 
+	 */
+	SystemCoreClock = (uint32_t)istk;
+}
+
+/*
+ *  start.Sããå¼ã³åºãããã½ããã¦ã§ã¢ç°å¢ã®åæåå¦ç
+ */
+ __attribute__((weak))
+void
+software_init_hook(void)
+{
+	__libc_init_array();
+}
+
+/*
+ *  ã½ããã¦ã§ã¢ç°å¢ã®çµäºå¦ç
+ */
+ __attribute__((weak))
+void
+software_term_hook(void)
+{
+
+}
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®åæå
+ */
+void
+target_initialize(void)
+{
+	SystemInit();
+
+	/*
+	 *  target_fput_logãä½¿ããããã«UARTãåæå
+	 */
+	arduino_m0_init_uart(SIO_PORTID);
+
+	/*
+	 *  ARMä¾å­ã®åæå
+	 */
+	core_initialize();
+}
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®çµäºå¦ç
+ */
+void
+target_exit(void)
+{
+	extern void    software_term_hook(void);
+	void (*volatile fp)(void) = software_term_hook;
+
+	/*
+	 *  software_term_hookã¸ã®ãã¤ã³ã¿ãï¼ä¸æ¦volatileæå®ã®ããfpã«ä»£
+	 *  å
+¥ãã¦ããä½¿ãã®ã¯ï¼0ã¨ã®æ¯è¼ãæé©åã§åé¤ãããªãããã«ããã
+	 *  ãã§ããï¼
+	 */
+	if (fp != 0) {
+		(*fp)();
+	}
+
+	/*
+	 *  ARMä¾å­ã®çµäºå¦ç
+	 */
+	core_terminate();
+
+	while(1);
+}
+
+/*
+ *  ã·ã¹ãã ã­ã°ã®ä½ã¬ãã«åºåã®ããã®æå­åºå
+ */
+void
+target_fput_log(char c)
+{
+	if (c == '\n') {
+		arduino_m0_putc(SIO_PORTID, '\r');
+	}
+	arduino_m0_putc(SIO_PORTID, c);
+}
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_config.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_config.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_config.h	(revision 136)
@@ -0,0 +1,117 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ *
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN  
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_config.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARDUINO_M0ç¨ï¼
+ *
+ *  ã«ã¼ãã«ã®ãããä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ï¼kernel_impl.hã®ã¿ã¼
+ *  ã²ããä¾å­é¨ã®ä½ç½®ä»ãã¨ãªãï¼
+ */
+
+#ifndef TOPPERS_TARGET_CONFIG_H
+#define TOPPERS_TARGET_CONFIG_H
+
+/*
+ *  ã¿ã¼ã²ããã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
+ */
+#include "arduino_m0.h"
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã«é¢ããè¨­å®
+ */
+#ifdef TOPPERS_ENABLE_TRACE
+#include "logtrace/trace_config.h"
+#endif /* TOPPERS_ENABLE_TRACE */
+
+/*
+ *  ããã©ã«ãã®éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯é åã®å®ç¾©
+ */
+#define DEFAULT_ISTKSZ			(0x1000)		/* 4KByte */
+
+/*
+ *  å¾®å°æéå¾
+ã¡ã®ããã®å®ç¾©ï¼æ¬æ¥ã¯SILã®ã¿ã¼ã²ããä¾å­é¨ï¼
+ *  (ToDo) èª¿æ´ãã
+ */
+#define SIL_DLY_TIM1    162
+#define SIL_DLY_TIM2    100
+
+/*
+ *  ä½¿ç¨ããã·ãªã¢ã«ãã¼ãID
+ */
+#define SIO_PORTID		(1)
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã¿ã¼ã²ããã·ã¹ãã ä¾å­ã®åæå
+ */
+extern void	target_initialize(void);
+
+/*
+ *  ã¿ã¼ã²ããã·ã¹ãã ã®çµäº
+ *
+ *  ã·ã¹ãã ãçµäºããæã«ä½¿ãï¼
+ */
+extern void	target_exit(void) NoReturn;
+
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  ã³ã¢ä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARM-Mç¨ï¼
+ */
+#include "core_config.h"
+
+#endif /* TOPPERS_TARGET_CONFIG_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_kernel.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_kernel.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_kernel.h	(revision 136)
@@ -0,0 +1,87 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_kernel.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *  kernel.hã®ãããä¾å­é¨ï¼ARDUINO_M0ç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼kernel.hã§ã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡
+ *  ã¤ã«ããç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ã
+ *  ããåã«ï¼t_stddef.hãã¤ã³ã¯ã«ã¼ããããã®ã§ï¼ãããã«ä¾å­ãã¦ãã
+ *  ãï¼
+ */
+
+#ifndef TOPPERS_TARGET_KERNEL_H
+#define TOPPERS_TARGET_KERNEL_H
+
+/*
+ *  ã³ã¢ä¾å­ã§å
+±éãªå®ç¾©ï¼ARM-Mç¨ï¼
+ */
+#include "arm_m_gcc/common/core_kernel.h"
+
+/*
+ *  ãµãã¼ãããæ©è½ã®å®ç¾©
+ */
+#define TOPPERS_TARGET_SUPPORT_ENA_INT		/* ena_intããµãã¼ããã */
+#define TOPPERS_TARGET_SUPPORT_DIS_INT		/* dis_intããµãã¼ããã */
+#define TOPPERS_TARGET_SUPPORT_GET_UTM		/* get_utmããµãã¼ããã */
+
+/*
+ *  ã¿ã¤ã ãã£ãã¯ã®å®ç¾©
+ */
+#define TIC_NUME		1U		/* ã¿ã¤ã ãã£ãã¯ã®å¨æã®åå­ */
+#define TIC_DENO		1U		/* ã¿ã¤ã ãã£ãã¯ã®å¨æã®åæ¯ */
+
+#endif /* TOPPERS_TARGET_KERNEL_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_offset.tf
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_offset.tf	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_offset.tf	(revision 136)
@@ -0,0 +1,13 @@
+$
+$       ãªãã»ãããã¡ã¤ã«çæç¨ãã³ãã¬ã¼ããã¡ã¤ã«ï¼ARDUINO_M0ç¨ï¼
+$
+
+$
+$  æ¨æºãã³ãã¬ã¼ããã¡ã¤ã«ã®ã¤ã³ã¯ã«ã¼ã
+$
+$INCLUDE "kernel/genoffset.tf"$
+
+$ 
+$  ã³ã¢ä¾å­ãã³ãã¬ã¼ãã®ã¤ã³ã¯ã«ã¼ãï¼ARM-Mç¨ï¼
+$ 
+$INCLUDE"../../arch/arm_m_gcc/common/core_offset.tf"$
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_rename.def
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_rename.def	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_rename.def	(revision 136)
@@ -0,0 +1,35 @@
+# kernel_cfg.c
+ipm_mask_tbl
+inh_tbl
+
+# target_config.c
+idf
+ipm
+inh_ipm_tbl
+bitpat_cfgint
+x_config_int
+target_exit
+target_initialize
+default_int_handler
+
+# target_support.S
+undef_handler
+swi_handler
+prefetch_handler
+data_abort_handler
+interrupt_handler
+fiq_handler
+
+# target_timer.c
+target_timer_get_current
+target_timer_probe_int
+
+# trace_config.c
+log_dsp_enter
+log_dsp_leave
+log_inh_enter
+log_inh_leave
+log_exc_enter
+log_exc_leave
+
+INCLUDE "arm_gcc/common/core"
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_rename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_rename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_rename.h	(revision 136)
@@ -0,0 +1,102 @@
+/* This file is generated from target_rename.def by genrename. */
+
+#ifndef TOPPERS_TARGET_RENAME_H
+#define TOPPERS_TARGET_RENAME_H
+
+/*
+ *  kernel_cfg.c
+ */
+#define ipm_mask_tbl				_kernel_ipm_mask_tbl
+#define inh_tbl						_kernel_inh_tbl
+
+/*
+ *  target_config.c
+ */
+#define idf							_kernel_idf
+#define ipm							_kernel_ipm
+#define inh_ipm_tbl					_kernel_inh_ipm_tbl
+#define bitpat_cfgint				_kernel_bitpat_cfgint
+#define x_config_int				_kernel_x_config_int
+#define target_exit					_kernel_target_exit
+#define target_initialize			_kernel_target_initialize
+#define default_int_handler			_kernel_default_int_handler
+
+/*
+ *  target_support.S
+ */
+#define undef_handler				_kernel_undef_handler
+#define swi_handler					_kernel_swi_handler
+#define prefetch_handler			_kernel_prefetch_handler
+#define data_abort_handler			_kernel_data_abort_handler
+#define interrupt_handler			_kernel_interrupt_handler
+#define fiq_handler					_kernel_fiq_handler
+
+/*
+ *  target_timer.c
+ */
+#define target_timer_get_current	_kernel_target_timer_get_current
+#define target_timer_probe_int		_kernel_target_timer_probe_int
+
+/*
+ *  trace_config.c
+ */
+#define log_dsp_enter				_kernel_log_dsp_enter
+#define log_dsp_leave				_kernel_log_dsp_leave
+#define log_inh_enter				_kernel_log_inh_enter
+#define log_inh_leave				_kernel_log_inh_leave
+#define log_exc_enter				_kernel_log_exc_enter
+#define log_exc_leave				_kernel_log_exc_leave
+
+
+#ifdef TOPPERS_LABEL_ASM
+
+/*
+ *  kernel_cfg.c
+ */
+#define _ipm_mask_tbl				__kernel_ipm_mask_tbl
+#define _inh_tbl					__kernel_inh_tbl
+
+/*
+ *  target_config.c
+ */
+#define _idf						__kernel_idf
+#define _ipm						__kernel_ipm
+#define _inh_ipm_tbl				__kernel_inh_ipm_tbl
+#define _bitpat_cfgint				__kernel_bitpat_cfgint
+#define _x_config_int				__kernel_x_config_int
+#define _target_exit				__kernel_target_exit
+#define _target_initialize			__kernel_target_initialize
+#define _default_int_handler		__kernel_default_int_handler
+
+/*
+ *  target_support.S
+ */
+#define _undef_handler				__kernel_undef_handler
+#define _swi_handler				__kernel_swi_handler
+#define _prefetch_handler			__kernel_prefetch_handler
+#define _data_abort_handler			__kernel_data_abort_handler
+#define _interrupt_handler			__kernel_interrupt_handler
+#define _fiq_handler				__kernel_fiq_handler
+
+/*
+ *  target_timer.c
+ */
+#define _target_timer_get_current	__kernel_target_timer_get_current
+#define _target_timer_probe_int		__kernel_target_timer_probe_int
+
+/*
+ *  trace_config.c
+ */
+#define _log_dsp_enter				__kernel_log_dsp_enter
+#define _log_dsp_leave				__kernel_log_dsp_leave
+#define _log_inh_enter				__kernel_log_inh_enter
+#define _log_inh_leave				__kernel_log_inh_leave
+#define _log_exc_enter				__kernel_log_exc_enter
+#define _log_exc_leave				__kernel_log_exc_leave
+
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "arm_m_gcc/common/core_rename.h"
+
+#endif /* TOPPERS_TARGET_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_serial.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_serial.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_serial.c	(revision 136)
@@ -0,0 +1,465 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ *
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_serial.c 2708 2015-11-22 10:35:09Z ertl-honda $
+ */
+
+/*
+ *  ã·ãªã¢ã«I/Oããã¤ã¹ï¼SIOï¼ãã©ã¤ãï¼ARDUINO_M0ç¨ï¼
+ */
+#include <kernel.h>
+#include <t_syslog.h>
+#include "arduino_m0.h"
+#include "target_serial.h"
+#include "variant.h"
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯ã®å®ç¾©
+ */
+typedef struct sio_port_initialization_block 
+{
+	Sercom*		p_sercom;		/* ä½¿ç¨ããSERCOMã¸ã®ãã¤ã³ã¿ */
+	uint8_t		rx_pin;			/* RXç¨PIN */
+	uint8_t		tx_pin;			/* TXç¨PIN */
+	uint8_t		sample_rate;	/* ãµã³ããªã³ã°ã¬ã¼ã */
+	uint8_t		port;			/* ãã¼ã */
+	int8_t		pio;			/* PIO */
+	uint8_t		gcm;			/* GCM */
+	uint32_t	bps;			/* ãã¼ã¬ã¼ã */
+	uint32_t	pm;				/* PowerManagement */
+}
+SIOPINIB;
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®å®ç¾©
+ */
+struct sio_port_control_block 
+{
+	const SIOPINIB*	p_siopinib;	/* åæåãã­ãã¯ */
+	intptr_t		exinf;		/* æ¡å¼µæ
+å ± */
+	bool_t			openflag;	/* ãªã¼ãã³æ¸ã¿ãã©ã° */
+	bool_t			devinitd;	/* ããã¤ã¹åæåæ¸ã¿ãã©ã° */
+	bool_t			sendflag;	/* éä¿¡å²è¾¼ã¿ã¤ãã¼ãã«ãã©ã° */
+	bool_t			getready;	/* æå­ãåä¿¡ããç¶æ
+ */
+	bool_t			putready;	/* æå­ãéä¿¡ã§ããç¶æ
+ */
+};
+
+/*
+ * ã·ãªã¢ã«I/Oãã¼ãåæåãã­ãã¯
+ */
+const SIOPINIB siopinib_table[TNUM_SIOP] = {
+	{SERCOM5, 23u, 22u, 16u, PORTB, PIO_SERCOM_ALT, GCM_SERCOM5_CORE, 115200, PM_APBCMASK_SERCOM5}
+};
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®ã¨ãªã¢
+ */
+SIOPCB siopcb_table[TNUM_SIOP];
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãIDããç®¡çãã­ãã¯ãåãåºãããã®ãã¯ã­
+ */
+#define INDEX_SIOP(siopid)  ((uint_t)((siopid) - 1))
+#define get_siopcb(siopid)  (&(siopcb_table[INDEX_SIOP(siopid)]))
+
+
+static void
+sercom_uart_devinit(SIOPCB *p_siopcb){
+	Sercom*	p_sercom = p_siopcb->p_siopinib->p_sercom;
+
+	/* ããã¤ã¹ãåæåæ¸ã¿ãªããªã¿ã¼ã³ */
+	if (p_siopcb->devinitd) {
+	  return;
+	}
+
+	p_siopcb->devinitd = true;
+
+	/* RX Pin Initialize */
+	PORT->Group[p_siopcb->p_siopinib->port].PMUX[(p_siopcb->p_siopinib->rx_pin) >> 1].reg =
+	  ((PORT->Group[p_siopcb->p_siopinib->port].PMUX[(p_siopcb->p_siopinib->rx_pin) >> 1].reg) & PORT_PMUX_PMUXE(0xF))
+		|PORT_PMUX_PMUXO(p_siopcb->p_siopinib->pio);
+	PORT->Group[p_siopcb->p_siopinib->port].PINCFG[(p_siopcb->p_siopinib->rx_pin)].reg |= PORT_PINCFG_PMUXEN;
+
+	/* TX Pin Initialize */
+	PORT->Group[p_siopcb->p_siopinib->port].PMUX[(p_siopcb->p_siopinib->tx_pin) >> 1].reg =
+	  ((PORT->Group[p_siopcb->p_siopinib->port].PMUX[(p_siopcb->p_siopinib->tx_pin) >> 1].reg) & PORT_PMUX_PMUXO(0xF))
+		|PORT_PMUX_PMUXE(p_siopcb->p_siopinib->pio);
+	PORT->Group[p_siopcb->p_siopinib->port].PINCFG[(p_siopcb->p_siopinib->tx_pin)].reg |= PORT_PINCFG_PMUXEN;
+
+	/* é»æºã®æå
+¥ */
+	PM->APBCMASK.reg |= p_siopcb->p_siopinib->pm;
+
+	/* Reset Uart */
+	p_sercom->USART.CTRLA.bit.SWRST = 1 ;
+	while(p_sercom->USART.CTRLA.bit.SWRST || p_sercom->USART.SYNCBUSY.bit.SWRST){};
+
+	/* Init Clock */
+	GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(p_siopcb->p_siopinib->gcm)
+	  | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN ;
+	while(GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) {}
+
+	/* Set Baund Rate */
+	p_sercom->USART.CTRLA.reg = SERCOM_USART_CTRLA_MODE(0x01) | SERCOM_USART_CTRLA_SAMPR(p_siopcb->p_siopinib->sample_rate);
+	p_sercom->USART.BAUD.reg = 0xffff - ((0xffff * (((int)p_siopcb->p_siopinib->sample_rate * (int)p_siopcb->p_siopinib->bps)/(CORE_CLOCK_HZ/1000000))) / 1000000u);
+
+	/* Disable All Interrupt */
+	p_sercom->USART.INTENSET.reg = 0;
+
+	/* Set Frame : 8bit, 1Stop, No parity, Lsb first*/
+	p_sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_FORM(0) |
+								(1 << SERCOM_USART_CTRLA_DORD_Pos);
+	p_sercom->USART.CTRLB.reg |= SERCOM_USART_CTRLB_CHSIZE(0) |
+								(0 << SERCOM_USART_CTRLB_SBMODE_Pos) |
+								(0 << SERCOM_USART_CTRLB_PMODE_Pos);
+
+	/* Set Pad */
+	p_sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_TXPO(0x01) | SERCOM_USART_CTRLA_RXPO(0x03);
+
+	/* Tx/Rx Enable */
+	p_sercom->USART.CTRLB.reg |= SERCOM_USART_CTRLB_TXEN | SERCOM_USART_CTRLB_RXEN;
+
+	/* Enable Uart */
+	p_sercom->USART.CTRLA.bit.ENABLE = 0x01;
+	while(p_sercom->USART.SYNCBUSY.bit.ENABLE){};
+}
+
+/*
+ * ã«ã¼ãã«èµ·åæã®ã­ã°åºåç¨ã®åæå
+ */
+void
+arduino_m0_init_uart(uint32_t siopid)
+{
+	SIOPCB  *p_siopcb;
+
+	p_siopcb = get_siopcb(siopid);
+	p_siopcb->p_siopinib = &siopinib_table[INDEX_SIOP(siopid)];
+	sercom_uart_devinit(p_siopcb);
+}
+
+/*
+ *  UARTããã®ãã¼ãªã³ã°åºå
+ */
+void
+arduino_m0_putc(uint32_t siopid, char c)
+{
+	Sercom* p_sercom = (get_siopcb(siopid))->p_siopinib->p_sercom;
+	while(p_sercom->USART.INTFLAG.bit.DRE != SERCOM_USART_INTFLAG_DRE);
+	p_sercom->USART.DATA.reg = (uint16_t)c;
+}
+
+
+/*
+ * æå­ãåä¿¡ããã?
+ */ 
+Inline bool_t
+uart_getready(SIOPCB *p_siopcb)
+{
+	Sercom*	p_sercom = p_siopcb->p_siopinib->p_sercom;
+	return(p_sercom->USART.INTFLAG.bit.RXC);
+}
+
+/*
+ * æå­ãéä¿¡ã§ããã?
+ */
+Inline bool_t
+uart_putready(SIOPCB *p_siopcb)
+{
+	Sercom*	p_sercom = p_siopcb->p_siopinib->p_sercom;
+	return(p_sercom->USART.INTFLAG.bit.DRE == SERCOM_USART_INTFLAG_DRE);
+}
+
+/*
+ *  åä¿¡ããæå­ã®åãåºã
+ */
+Inline uint8_t
+uart_getchar(SIOPCB *p_siopcb)
+{
+	Sercom*	p_sercom = p_siopcb->p_siopinib->p_sercom;
+	return p_sercom->USART.DATA.bit.DATA;
+}
+
+/*
+ *  éä¿¡ããæå­ã®æ¸ãè¾¼ã¿
+ */
+Inline void
+uart_putchar(SIOPCB *p_siopcb, uint8_t c)
+{
+	Sercom*	p_sercom = p_siopcb->p_siopinib->p_sercom;
+	p_sercom->USART.DATA.reg = (uint16_t)c;
+}
+
+/*
+ *  éä¿¡å²è¾¼ã¿è¨±å¯
+ */
+Inline void
+uart_enable_send(SIOPCB *p_siopcb)
+{
+	Sercom*	p_sercom = p_siopcb->p_siopinib->p_sercom;
+	p_sercom->USART.INTENSET.reg = SERCOM_USART_INTENSET_TXC;
+}
+
+/*
+ *  éä¿¡å²è¾¼ã¿ç¦æ­¢
+ */
+Inline void
+uart_disable_send(SIOPCB *p_siopcb)
+{
+	Sercom*	p_sercom = p_siopcb->p_siopinib->p_sercom;
+	p_sercom->USART.INTENCLR.reg = SERCOM_USART_INTENCLR_TXC;
+}
+
+
+/*
+ *  åä¿¡å²è¾¼ã¿è¨±å¯
+ */
+Inline void
+uart_enable_rcv(SIOPCB *p_siopcb)
+{
+	Sercom*	p_sercom = p_siopcb->p_siopinib->p_sercom;
+	p_sercom->USART.INTENSET.reg = SERCOM_USART_INTENSET_RXC;
+}
+
+/*
+ *  åä¿¡å²è¾¼ã¿ç¦æ­¢
+ */
+Inline void
+uart_disable_rcv(SIOPCB *p_siopcb)
+{
+	Sercom*	p_sercom = p_siopcb->p_siopinib->p_sercom;
+	p_sercom->USART.INTENCLR.reg = SERCOM_USART_INTENCLR_RXC;
+}
+
+
+/*
+ *  SIOãã©ã¤ãã®åæå
+ */
+void
+sio_initialize(intptr_t exinf)
+{
+	SIOPCB  *p_siopcb;
+	uint_t  i;
+
+	/*
+	 *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®åæå
+	 */
+	for (p_siopcb = siopcb_table, i = 0; i < TNUM_SIOP; p_siopcb++, i++) {
+		p_siopcb->p_siopinib = &(siopinib_table[i]);
+		p_siopcb->openflag = false;
+		p_siopcb->sendflag = false;
+	}
+}
+
+/*
+ * ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
+ */
+SIOPCB *
+arduino_m0_uart_opn_por(SIOPCB *p_siopcb, intptr_t exinf)
+{
+	p_siopcb->exinf = exinf;
+	p_siopcb->getready = p_siopcb->putready = false;
+	p_siopcb->openflag = true;
+
+	sercom_uart_devinit(p_siopcb);
+
+	return(p_siopcb);
+}
+
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
+ */
+SIOPCB *
+sio_opn_por(ID siopid, intptr_t exinf)
+{
+	SIOPCB  *p_siopcb = get_siopcb(siopid);
+	bool_t    opnflg;
+	ER      ercd;
+
+	/*
+	 *  ãªã¼ãã³ãããã¼ããããããopnflgã«èª­ãã§ããï¼
+	 */
+	opnflg = p_siopcb->openflag;
+
+	/*
+	 *  ããã¤ã¹ä¾å­ã®ãªã¼ãã³å¦çï¼
+	 */
+	arduino_m0_uart_opn_por(p_siopcb, exinf);
+
+	/*
+	 *  ã·ãªã¢ã«I/Oå²è¾¼ã¿ã®ãã¹ã¯ãè§£é¤ããï¼
+	 */
+	if (!opnflg) {
+		ercd = ena_int(INTNO_SIO);
+		assert(ercd == E_OK);
+	}
+	return(p_siopcb);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ã¯ã­ã¼ãº
+ */
+void
+sio_cls_por(SIOPCB *p_siopcb)
+{
+	/*
+	 *  ããã¤ã¹ä¾å­ã®ã¯ã­ã¼ãºå¦çï¼
+	 */
+	p_siopcb->openflag = false;
+    
+	/*
+	 *  ã·ãªã¢ã«I/Oå²è¾¼ã¿ããã¹ã¯ããï¼
+	 */
+	dis_int(INTNO_SIO);
+}
+
+/*
+ *  SIOã®å²è¾¼ã¿ãã³ãã©
+ */
+void
+sio_isr(intptr_t exinf)
+{
+	SIOPCB *p_siopcb = get_siopcb(exinf);
+
+	if (uart_getready(p_siopcb)) {
+		/*
+		 *  åä¿¡éç¥ã³ã¼ã«ããã¯ã«ã¼ãã³ãå¼ã³åºãï¼
+		 */
+		sio_irdy_rcv(p_siopcb->exinf);
+	}
+	if (uart_putready(p_siopcb)) {
+		/*
+		 *  éä¿¡å¯è½ã³ã¼ã«ããã¯ã«ã¼ãã³ãå¼ã³åºãï¼
+		 */
+		sio_irdy_snd(p_siopcb->exinf);
+	}	
+}
+
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã¸ã®æå­éä¿¡
+ */
+bool_t
+sio_snd_chr(SIOPCB *siopcb, char c)
+{	
+	if (uart_putready(siopcb)){
+		uart_putchar(siopcb, c);
+		return(true);
+	}
+	return(false);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®æå­åä¿¡
+ */
+int_t
+sio_rcv_chr(SIOPCB *siopcb)
+{
+	if (uart_getready(siopcb)) {
+		return((int_t)(uint8_t) uart_getchar(siopcb));
+	}
+	return(-1);
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+void
+sio_ena_cbr(SIOPCB *siopcb, uint_t cbrtn)
+{
+	switch (cbrtn) {
+		case SIO_RDY_SND:
+			uart_enable_send(siopcb);
+			break;
+		case SIO_RDY_RCV:
+			uart_enable_rcv(siopcb);
+			break;
+	}
+}
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+void
+sio_dis_cbr(SIOPCB *siopcb, uint_t cbrtn)
+{
+	switch (cbrtn) {
+		case SIO_RDY_SND:
+			uart_disable_send(siopcb);
+			break;
+		case SIO_RDY_RCV:
+			uart_disable_rcv(siopcb);
+			break;
+	}
+}
+
+#define UART_SERCOM   SERCOM5
+
+void
+serial_ena(void){
+	UART_SERCOM->USART.INTENSET.reg |= SERCOM_USART_INTENSET_RXC;
+}
+	
+void
+serial_putc(char c){
+	while(UART_SERCOM->USART.INTFLAG.bit.DRE != SERCOM_USART_INTFLAG_DRE);
+	UART_SERCOM->USART.DATA.reg = (uint16_t)c;
+}
+
+char
+serial_getc(void){
+	while(!UART_SERCOM->USART.INTFLAG.bit.RXC);
+	return UART_SERCOM->USART.DATA.bit.DATA;
+}
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_serial.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_serial.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_serial.cfg	(revision 136)
@@ -0,0 +1,12 @@
+/*
+ *  @(#) $Id: target_serial.cfg 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *  SIOãã©ã¤ãï¼STBEEç¨ï¼ã®ã³ã³ãã£ã°ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+
+#include "target_serial.h"
+ATT_INI({ TA_NULL, 0, sio_initialize });
+ATT_ISR({ TA_NULL, 1, INTNO_SIO, sio_isr, 1 });
+CFG_INT(INTNO_SIO, { TA_ENAINT|INTATR_SIO, INTPRI_SIO});
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_serial.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_serial.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_serial.h	(revision 136)
@@ -0,0 +1,159 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ *
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_serial.h 2708 2015-11-22 10:35:09Z ertl-honda $
+ */
+
+/*
+ * ã·ãªã¢ã«I/Oããã¤ã¹ï¼SIOï¼ãã©ã¤ãï¼ARDUINO_M0ç¨ï¼
+ */
+
+#ifndef TOPPERS_TARGET_SERIAL_H
+#define TOPPERS_TARGET_SERIAL_H
+
+#ifndef TOPPERS_MACRO_ONLY
+#undef CAST
+#include "sam.h"
+#undef CAST
+#define CAST(type, val)		((type)(val))
+#endif /* TOPPERS_MACRO_ONLY */
+
+/*
+ *  SIOã®å²è¾¼ã¿ãã³ãã©ã®ãã¯ã¿çªå·
+ */
+#define INHNO_SIO		(16 + SERCOM5_IRQn)	/* å²è¾¼ã¿ãã³ãã©çªå· */
+#define INTNO_SIO		(16 + SERCOM5_IRQn)	/* å²è¾¼ã¿çªå· */
+#define INTPRI_SIO		-2					/* å²è¾¼ã¿åªå
+åº¦ */
+#define INTATR_SIO		0U					/* å²è¾¼ã¿å±æ§ */
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãæ°ã®å®ç¾©
+ */
+#define TNUM_SIOP		1		/* ãµãã¼ãããã·ãªã¢ã«I/Oãã¼ãã®æ° */
+
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãç®¡çãã­ãã¯ã®å®ç¾©
+ */
+typedef struct sio_port_control_block	SIOPCB;
+
+/*
+ *  ã³ã¼ã«ããã¯ã«ã¼ãã³ã®è­å¥çªå·
+ */
+#define SIO_RDY_SND	1U		/* éä¿¡å¯è½ã³ã¼ã«ããã¯ */
+#define SIO_RDY_RCV	2U		/* åä¿¡éç¥ã³ã¼ã«ããã¯ */
+
+/*
+ * ã«ã¼ãã«èµ·åæã®ã­ã°åºåç¨ã®åæå
+ */
+extern void arduino_m0_init_uart(uint32_t siopid);
+
+/*
+ *  UARTããã®ãã¼ãªã³ã°åºå
+ */
+void arduino_m0_putc(uint32_t siopid, char c);
+
+/*
+ *  SIOãã©ã¤ãã®åæå
+ */
+extern void sio_initialize(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
+ */
+extern SIOPCB *sio_opn_por(ID siopid, intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã®ã¯ã­ã¼ãº
+ */
+extern void sio_cls_por(SIOPCB *p_siopcb);
+
+/*
+ *  å²è¾¼ã¿ãã³ãã©
+ */
+extern void sio_isr(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãã¸ã®æå­éä¿¡
+ */
+extern bool_t sio_snd_chr(SIOPCB *siopcb, char c);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®æå­åä¿¡
+ */
+extern int_t sio_rcv_chr(SIOPCB *siopcb);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
+ */
+extern void sio_ena_cbr(SIOPCB *siopcb, uint_t cbrtn);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ­¢
+ */
+extern void sio_dis_cbr(SIOPCB *siopcb, uint_t cbrtn);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®éä¿¡å¯è½ã³ã¼ã«ããã¯
+ */
+extern void sio_irdy_snd(intptr_t exinf);
+
+/*
+ *  ã·ãªã¢ã«I/Oãã¼ãããã®åä¿¡éç¥ã³ã¼ã«ããã¯
+ */
+extern void sio_irdy_rcv(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_TARGET_SERIAL_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_sil.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_sil.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_sil.h	(revision 136)
@@ -0,0 +1,80 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_sil.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *  sil.hã®ãããä¾å­é¨ï¼ARDUINO_M0ç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼sil.hã®å
+é ­ã§ã¤ã³ã¯ã«ã¼ããããï¼ä»ã®ãã¡
+ *  ã¤ã«ããã¯ç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ãã®ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼
+ *  ãããåã«ï¼t_stddef.hãã¤ã³ã¯ã«ã¼ããããã®ã§ï¼ãããã«ä¾å­ãã¦ã
+ *  ããï¼
+ */
+
+#ifndef TOPPERS_TARGET_SIL_H
+#define TOPPERS_TARGET_SIL_H
+
+/*
+ *  ãããã®ã¨ã³ãã£ã¢ã³
+ */
+#define SIL_ENDIAN_LITTLE	/* ãªãã«ã¨ã³ãã£ã¢ã³ */
+
+/*
+ *  ARM-Mã§å
+±éãªå®ç¾©
+ */
+#include "core_sil.h"
+
+#endif /* TOPPERS_TARGET_SIL_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_stddef.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_stddef.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_stddef.h	(revision 136)
@@ -0,0 +1,102 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_stddef.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *  t_stddef.hã®ãããä¾å­é¨ï¼ARDUINO_M0ç¨ï¼
+ *
+ *  ãã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã¯ï¼t_stddef.hã®å
+é ­ã§ã¤ã³ã¯ã«ã¼ããããï¼
+ *  ä»ã®ãã¡ã¤ã«ããã¯ç´æ¥ã¤ã³ã¯ã«ã¼ããããã¨ã¯ãªãï¼ä»ã®ã¤ã³ã¯ã«ã¼ã
+ *  ãã¡ã¤ã«ã«å
+ç«ã£ã¦å¦çãããããï¼ä»ã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ã«ä¾å­ã
+ *  ã¦ã¯ãªããªãï¼
+ */
+
+#ifndef TOPPERS_TARGET_STDDEF_H
+#define TOPPERS_TARGET_STDDEF_H
+
+/*
+ *  ã¿ã¼ã²ãããè­å¥ããããã®ãã¯ã­ã®å®ç¾©
+ */
+#define TOPPERS_ARDUINO_M0		/* ã·ã¹ãã ç¥ç§° */
+
+/*
+ *  éçºç°å¢ã§å
+±éãªå®ç¾©
+ */
+#ifndef TOPPERS_MACRO_ONLY
+#include <stdint.h>
+#endif /* TOPPERS_MACRO_ONLY */
+#include <tool_stddef.h>
+
+/*
+ *  ã³ã¢ã§å
+±éãªå®ç¾©
+ */
+#include <core_stddef.h>
+
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  ã¢ãµã¼ã·ã§ã³ã®å¤±ææã®å®è¡ä¸­æ­å¦çï¼ToDoï¼
+ */
+Inline void
+TOPPERS_assert_abort(void)
+{    
+}
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_TARGET_STDDEF_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_syssvc.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_syssvc.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_syssvc.h	(revision 136)
@@ -0,0 +1,105 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_syssvc.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *  ã·ã¹ãã ãµã¼ãã¹ã®ãããä¾å­é¨ï¼ARDUINO_M0ç¨ï¼
+ *
+ *  ã·ã¹ãã ãµã¼ãã¹ã®ãããä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ããã¡ã¤ã«ï¼ãã®ãã¡ã¤ã«ã®
+ *  å
+å®¹ã¯ï¼ã³ã³ãã¼ãã³ãè¨è¿°ãã¡ã¤ã«ã«è¨è¿°ããï¼ãã®ãã¡ã¤ã«ã¯ç¡ããªã
+ *  è¦è¾¼ã¿ï¼
+ */
+
+#ifndef TOPPERS_TARGET_SYSSVC_H
+#define TOPPERS_TARGET_SYSSVC_H
+
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã«é¢ããè¨­å®
+ */
+#ifdef TOPPERS_ENABLE_TRACE
+#include "logtrace/trace_config.h"
+#endif /* TOPPERS_ENABLE_TRACE */
+
+/*
+ *  èµ·åã¡ãã»ã¼ã¸ã®ã¿ã¼ã²ããã·ã¹ãã å
+ */
+#define TARGET_NAME		"ARDUINO_M0(Cortex-M0+)"
+
+/*
+ *  ã·ã¹ãã ã­ã°ã®ä½ã¬ãã«åºåã®ããã®æå­åºå
+ *
+ *  ã¿ã¼ã²ããä¾å­ã®æ¹æ³ã§ï¼æå­cãè¡¨ç¤º/åºå/ä¿å­ããï¼
+ */
+extern void target_fput_log(char c);
+
+#ifdef TOPPERS_ENABLE_TRACE
+/*
+ *  ãã¬ã¼ã¹ã­ã°ã®ãã¡ã¤ã«åºå
+ */
+extern void target_fput_log_file(char c);
+#endif /* TOPPERS_ENABLE_TRACE */
+
+/*
+ *  ã·ãªã¢ã«ãã¼ãæ°ã®å®ç¾©
+ */
+#define TNUM_PORT		1		/* ãµãã¼ãããã·ãªã¢ã«ãã¼ãã®æ° */
+
+/*
+ *  ã·ã¹ãã ã­ã°ã¿ã¹ã¯é¢é£ã®å®æ°ã®å®ç¾©
+ *
+ *  ããã©ã«ãå¤ã®éãï¼
+ */
+
+#endif /* TOPPERS_TARGET_SYSSVC_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_test.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_test.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_test.h	(revision 136)
@@ -0,0 +1,70 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2007-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_test.h 2694 2015-11-04 05:43:49Z ertl-honda $
+ */
+
+/*
+ *		ãã¹ããã­ã°ã©ã ã®ãããä¾å­å®ç¾©ï¼ARDUINO_M0ç¨ï¼
+ */
+
+#ifndef TOPPERS_TARGET_TEST_H
+#define TOPPERS_TARGET_TEST_H
+
+#define STACK_SIZE			(1024)
+
+/*
+ *  ã³ã¢ä¾å­ã¢ã¸ã¥ã¼ã«ï¼ARM-Mç¨ï¼
+ */
+#include "arm_m_gcc/common/core_test.h"
+
+#endif /* TOPPERS_TARGET_TEST_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_timer.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_timer.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_timer.cfg	(revision 136)
@@ -0,0 +1,10 @@
+/*
+ *  @(#) $Id: target_timer.cfg 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *    ã¿ã¤ããã©ã¤ãã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+#include "target_timer.h"
+
+INCLUDE("arm_m_gcc/common/core_timer.cfg");
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_timer.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_timer.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_timer.h	(revision 136)
@@ -0,0 +1,81 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: target_timer.h 2693 2015-11-04 03:55:57Z ertl-honda $
+ */
+
+/*
+ *  ã¿ã¤ããã©ã¤ãï¼ARDUINO_M0ç¨ï¼
+ */
+
+#ifndef TOPPERS_TARGET_TIMER_H
+#define TOPPERS_TARGET_TIMER_H
+
+/*
+ *  ã¿ã¤ãå¤ã®å
+é¨è¡¨ç¾ã¨ããªç§åä½ã¨ã®å¤æ
+ */
+#define TIMER_CLOCK		(CORE_CLOCK_HZ / 1000)
+
+/*
+ *  ã¿ã¤ãå²è¾¼ã¿ãã³ãã©ç»é²ã®ããã®å®æ°
+ */
+#define INTPRI_TIMER		(-1)		/* å²è¾¼ã¿åªå
+åº¦ */
+#define INTATR_TIMER		 0U			/* å²è¾¼ã¿å±æ§ */
+
+/*
+ *  ãã­ã»ããµä¾å­é¨ã§å®ç¾©ãã
+ */
+#include "arm_m_gcc/common/core_timer.h"
+
+#endif /* TOPPERS_TARGET_TIMER_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_unrename.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_unrename.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_unrename.h	(revision 136)
@@ -0,0 +1,103 @@
+/* This file is generated from target_rename.def by genrename. */
+
+/* This file is included only when target_rename.h has been included. */
+#ifdef TOPPERS_TARGET_RENAME_H
+#undef TOPPERS_TARGET_RENAME_H
+
+/*
+ *  kernel_cfg.c
+ */
+#undef ipm_mask_tbl
+#undef inh_tbl
+
+/*
+ *  target_config.c
+ */
+#undef idf
+#undef ipm
+#undef inh_ipm_tbl
+#undef bitpat_cfgint
+#undef x_config_int
+#undef target_exit
+#undef target_initialize
+#undef default_int_handler
+
+/*
+ *  target_support.S
+ */
+#undef undef_handler
+#undef swi_handler
+#undef prefetch_handler
+#undef data_abort_handler
+#undef interrupt_handler
+#undef fiq_handler
+
+/*
+ *  target_timer.c
+ */
+#undef target_timer_get_current
+#undef target_timer_probe_int
+
+/*
+ *  trace_config.c
+ */
+#undef log_dsp_enter
+#undef log_dsp_leave
+#undef log_inh_enter
+#undef log_inh_leave
+#undef log_exc_enter
+#undef log_exc_leave
+
+
+#ifdef TOPPERS_LABEL_ASM
+
+/*
+ *  kernel_cfg.c
+ */
+#undef _ipm_mask_tbl
+#undef _inh_tbl
+
+/*
+ *  target_config.c
+ */
+#undef _idf
+#undef _ipm
+#undef _inh_ipm_tbl
+#undef _bitpat_cfgint
+#undef _x_config_int
+#undef _target_exit
+#undef _target_initialize
+#undef _default_int_handler
+
+/*
+ *  target_support.S
+ */
+#undef _undef_handler
+#undef _swi_handler
+#undef _prefetch_handler
+#undef _data_abort_handler
+#undef _interrupt_handler
+#undef _fiq_handler
+
+/*
+ *  target_timer.c
+ */
+#undef _target_timer_get_current
+#undef _target_timer_probe_int
+
+/*
+ *  trace_config.c
+ */
+#undef _log_dsp_enter
+#undef _log_dsp_leave
+#undef _log_inh_enter
+#undef _log_inh_leave
+#undef _log_exc_enter
+#undef _log_exc_leave
+
+
+#endif /* TOPPERS_LABEL_ASM */
+
+#include "arm_m_gcc/common/core_unrename.h"
+
+#endif /* TOPPERS_TARGET_RENAME_H */
Index: rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_user.txt
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_user.txt	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/target/arduino_m0_gcc/target_user.txt	(revision 136)
@@ -0,0 +1,182 @@
+=====================================================================
+                       Arduino M0ã¿ã¼ã²ããä¾å­é¨
+                                  Last Modified:2015 Nov 22 20:06:05
+=====================================================================
+
+âæ¦è¦
+
+Arduino M0ã¿ã¼ã²ããä¾å­é¨ã¯ï¼Arduino M0 Pro ããµãã¼ããã¦ããï¼ã¹ã¿
+ã¼ãã¢ããã®ã³ã¼ãã¯ï¼Arduino IDEã«ä»å±ãã¦ããGPLã©ã¤ã»ã³ã¹ã®ã³ã¼ãã
+ä½¿ç¨ããããæ³¨æãå¿
+è¦ã§ããï¼GPLåãé¿ããã«ã¯ï¼ãããã®ã³ã¼ããç½®ã
+æããå¿
+è¦ãããï¼
+
+âã«ã¼ãã«ã®ä½¿ç¨ãªã½ã¼ã¹
+
+ã«ã¼ãã«ã¯ä»¥ä¸ã®ãªã½ã¼ã¹ãä½¿ç¨ããï¼
+
+  ã»ROM/RAM
+     ã³ã¼ãã¨ãã¼ã¿ãé
+ç½®ããï¼
+     ä½¿ç¨éã¯ãªãã¸ã§ã¯ãæ°ã«ä¾å­ããï¼
+  
+  ã»SysTick
+     ã«ã¼ãã«å
+é¨ã®ãã£ãã¯ã®çæã«ç¨ããï¼
+     
+  ã»SERCOM5
+     ã³ã³ã½ã¼ã«ã®åºåã«ä½¿ç¨ï¼
+
+
+âå®è¡ç°å¢
+
+åä½ç¢ºèªãè¡ã£ãå®è¡ç°å¢ã¯ï¼Widnows 7 ä¸ã® Cygwin ã§ããï¼
+
+ãã«ãã«ã¯ï¼Arduino IDE ãã¤ã³ã¹ãã¼ã«ããå¿
+è¦ãããï¼åä½ç¢ºèªãè¡ã£ã
+ãã¼ã¸ã§ã³ã¯æ¬¡ã®éãã§ããï¼
+
+ Arduino IDE 1.7.7
+
+âãããã°ç°å¢
+
+arm-none-eabi-gdb ã«ãããããã°ã®åä½ç¢ºèªãè¡ã£ãï¼ Arduino IDE ä»å±
+ã¯ï¼Windowsãã¤ãã£ãã¢ããªã§ããããï¼Ctrl-Cã«ããåæ­¢ç­ãã§ããªãï¼
+ãã®ããï¼ã½ã¼ã¹ã³ã¼ããããã«ããã¦ä½¿ç¨ããï¼
+
+åä½ç¢ºèªãè¡ã£ããã¼ã¸ã§ã³ã¯æ¬¡ã®éãã§ããï¼
+
+  GNU gdb (GDB) 7.6.2
+  
+ãããã¬ã®ååã arm-gdb_m0.exe ã¨ãã¦ãã¹ã®éã£ã¦ãããã©ã«ãã«ç½®ãï¼
+  
+ãã«ãæ¹æ³ã¯æ¬¡ã®éãã§ããï¼
+
+ $tar xvfj gdb-7.6.2.tar.bz2
+ $mkdir obj
+ $../gdb-7.6/configure --target=arm-none-eabi
+ $make
+
+âã³ã³ãã¤ã©
+
+åä½ç¢ºèªãã GCC ã¯ï¼Arduino IDE ä»å±ã®ä»¥ä¸ã®ãã¼ã¸ã§ã³ã§ããï¼
+
+  gcc version 4.8.3 20140228 (release) [ARM/embedded-4_8-branch 
+  revision 208322] (GNU Tools for ARM Embedded Processors) 
+
+âãã«ã
+
+ãã«ãã«å½ãã£ã¦ã¯ Arduino IDE ã®ã¤ã³ã¹ãã¼ã«ãã¹ãMakefile.targetã«æ
+å®ãã
+
+ARDUINO_BASE_DIR_WIN = C:\Program Files (x86)\Arduino
+
+âå®è¡
+
+ãã¼ãã®PROGRAMINGãã¼ãã¨PCãæ¥ç¶ããï¼ãã­ã¸ã§ã¯ãããã«ããããã©ã«
+ãã§ä»¥ä¸ã®ã³ãã³ããå®è¡ããã¨ãã©ãã·ã¥ã«æ¸ãè¾¼ã¾ãå®è¡ãéå§ãããï¼
+
+ $make run
+ 
+ 
+âãããã°
+
+OpenOCDã®èµ·å
+ãã­ã¸ã§ã¯ãããã«ããããã©ã«ãã§ä»¥ä¸ã®ã³ãã³ããå®è¡ããï¼
+OpenOCDãèµ·åãã¦ã¿ã¼ã²ããã¨æ¥ç¶ãããï¼
+
+ $make ocd
+ 
+ãããã¬ã®èµ·å
+ãã­ã¸ã§ã¯ãããã«ããããã©ã«ãã§ä»¥ä¸ã®ã³ãã³ããå®è¡ããï¼
+ãã©ãã·ã¥ã¸ã®æ¸ãè¾¼ã¿ãéå§ãããï¼continue ã³ãã³ããå
+¥åããã¨å®è¡
+ãéå§ãããï¼
+
+ $make db
+
+âAtmel Studioã«ãããã«ãã§ãããã°
+
+Atmel Studioã«ããGUIã«ãããã«ãã¨ãããã°ãå¯è½ã§ããï¼
+
+åä½ç¢ºèªãè¡ã£ãã®ã¯æ¬¡ã®ãã¼ã¸ã§ã³ã§ããï¼
+
+Atmel Studio 7.0 (build 594)
+
+Atmel Studio ã¯ã½ã¼ã¹ã³ã¼ãã®ã¨ã³ã³ã¼ããutf8ã§ããå¿
+è¦ãããããï¼ã½ã¼
+ã¹å
+¨ä½ãutf8ã«ãããã¨ãæ¨å¥¨ããï¼
+
+âAtmel Studio ã®ã¤ã³ã¹ãã¼ã«
+ä»¥ä¸ã®ãµã¤ãã«ã¢ã¯ã»ã¹ãã¦
+
+ http://www.atmel.com/ja/jp/tools/ATMELSTUDIO.aspx
+
+ä»¥ä¸ã®ãã¼ã«ãé¸æããï¼
+
+ Atmel Studio 7.0 (build 594) web installer (recommended)
+ 
+ã¡ã¼ã«ã¢ãã¬ã¹ç­ãå
+¥åããã¨ãã¦ã³ã­ã¼ãå¯è½ã§ããï¼
+
+âä»å±ã®ãã­ã¸ã§ã¯ãã«ãããã«ã
+
+./atmelstudio/asp.atslnãéã
+ã¡ãã¥ã¼ -> Build -> Build Solution ãé¸æãã¦ãã«ã
+ã¡ãã¥ã¼ -> Debug -> Start Debugging and Break ãé¸æããã¦ãããã°ã®éå§
+
+âãã­ã¸ã§ã¯ãã®ä½ææ¹æ³
+
+ãã©ã«ããä»¥ä¸ã®å ´æã«ä½æããï¼<asp>ã¯ASPã«ã¼ãã«ã®ã½ã¼ã¹ãå±éããã
+ã©ã«ãã§ããï¼
+
+<asp>/<dir1>/<dir2>/
+
+<dir2>ä»¥ä¸ã«æ¬ãã©ã«ãã®Makefileãã³ãã¼ããï¼<asp>/sampleãã 
+sample1.c/sample1.cfg/sample1.h ãã³ãã¼ããï¼ãã©ã«ãã®å ´æãå¤æ´ãã
+ãå ´åã¯ï¼Makefileã®SRCDIRãå¤æ´ãããã¨ï¼
+
+âAtmelãã­ã¸ã§ã¯ãã®ä½æ
+
+ã¡ãã¥ã¼ -> File -> New -> Project
+
+å·¦ã®ã¡ãã¥ã¼ãã
+
+C/C++  -> GCC C Executable Project ãé¸æ
+
+ä¸ã®ããã¯ã¹ã® Name ã« asp ã¨å
+¥åï¼
+
+Device Selection ã®ç»é¢ãåºãã®ã§ï¼
+
+Device Family : SAMD21
+
+ãé¸æãã¦ï¼ãªã¹ãããï¼
+
+ATSAMD21G18A
+
+ãé¸æï¼
+
+ãã­ã¸ã§ã¯ããä½æãããã®ã§ï¼main.c ç­ã¯ä¸è¦ãªã®ã§åé¤ï¼
+
+ã¡ãã¥ã¼ -> Debug -> asp Properties  ãé¸æ
+
+Build ã¿ããé¸æ
+Use External Makefile ãé¸æ
+Make file Name ã«å®è¡ãããMakefileããã­ã¸ã§ã¯ãããã®ç¸å¯¾ãã¹ã§æå®ï¼
+
+ãã¼ãã®PROGRAMINGãã¼ããæ¥ç¶
+
+Tool ã¿ããé¸æ
+Select debugger/programmer ãã EDBG ãé¸æ
+Programmin settings ã Incremental Programming ãé¸æ
+
+Advanced ã¿ããé¸æ
+Use GDB ã®ãã§ãã¯ãå¤ã
+
+âå¤æ´å±¥æ­´
+
+2015/11/04
+ã»æ°è¦ä½æ
Index: rtos_arduino/trunk/asp_1.9.2/test/MANIFEST
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/MANIFEST	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/MANIFEST	(revision 136)
@@ -0,0 +1,59 @@
+PACKAGE asp
+
+MANIFEST
+bit_kernel.c
+perf0.c
+perf0.cfg
+perf0.h
+perf1.c
+perf1.cfg
+perf1.h
+perf2.c
+perf2.cfg
+perf2.h
+perf3.c
+perf3.cfg
+perf3.h
+perf4.c
+perf4.cfg
+perf4.h
+test_cpuexc.cfg
+test_cpuexc.h
+test_cpuexc.txt
+test_cpuexc1.c
+test_cpuexc2.c
+test_cpuexc3.c
+test_cpuexc4.c
+test_cpuexc5.c
+test_cpuexc6.c
+test_cpuexc7.c
+test_cpuexc8.c
+test_cpuexc9.c
+test_cpuexc10.c
+test_cpuexc11.c
+test_cpuexc12.c
+test_cpuexc13.c
+test_dlynse.c
+test_dlynse.cfg
+test_dlynse.h
+test_sem1.c
+test_sem1.cfg
+test_sem1.h
+test_sem2.c
+test_sem2.cfg
+test_sem2.h
+test_sysstat1.c
+test_sysstat1.cfg
+test_sysstat1.h
+test_task1.c
+test_task1.cfg
+test_task1.h
+test_tex1.c
+test_tex1.cfg
+test_tex1.h
+test_tex2.c
+test_tex2.cfg
+test_tex2.h
+test_utm1.c
+test_utm1.cfg
+test_utm1.h
Index: rtos_arduino/trunk/asp_1.9.2/test/bit_kernel.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/bit_kernel.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/bit_kernel.c	(revision 136)
@@ -0,0 +1,488 @@
+/*
+ *  TOPPERS/ASP Kernel
+ *      Toyohashi Open Platform for Embedded Real-Time Systems/
+ *      Advanced Standard Profile Kernel
+ * 
+ *  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: bit_kernel.c 2128 2011-06-26 01:21:05Z ertl-hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«ã®æ´åæ§æ¤æ»
+ */
+
+#include "kernel/kernel_impl.h"
+#include "kernel/task.h"
+#include "kernel/wait.h"
+#include "kernel/semaphore.h"
+#include "kernel/eventflag.h"
+#include "kernel/dataqueue.h"
+#include "kernel/pridataq.h"
+#include "kernel/mailbox.h"
+#include "kernel/mempfix.h"
+#include "kernel/time_event.h"
+
+/*
+ *   ã¨ã©ã¼ã³ã¼ãã®å®ç¾©
+ */
+#define E_SYS_LINENO	ERCD(E_SYS, -(__LINE__))
+
+/*
+ *  ç®¡çãã­ãã¯ã®ã¢ãã¬ã¹ã®æ­£å½æ§ã®ãã§ãã¯
+ */
+#define VALID_TCB(p_tcb) \
+		((((char *) p_tcb) - ((char *) tcb_table)) % sizeof(TCB) == 0 \
+			&& TMIN_TSKID <= TSKID(p_tcb) && TSKID(p_tcb) <= tmax_tskid)
+
+#define VALID_SEMCB(p_semcb) \
+		((((char *) p_semcb) - ((char *) semcb_table)) % sizeof(SEMCB) == 0 \
+			&& TMIN_SEMID <= SEMID(p_semcb) && SEMID(p_semcb) <= tmax_semid)
+				
+#define VALID_FLGCB(p_flgcb) \
+		((((char *) p_flgcb) - ((char *) flgcb_table)) % sizeof(FLGCB) == 0 \
+			&& TMIN_FLGID <= FLGID(p_flgcb) && FLGID(p_flgcb) <= tmax_flgid)
+
+#define VALID_DTQCB(p_dtqcb) \
+		((((char *) p_dtqcb) - ((char *) dtqcb_table)) % sizeof(DTQCB) == 0 \
+			&& TMIN_DTQID <= DTQID(p_dtqcb) && DTQID(p_dtqcb) <= tmax_dtqid)
+
+#define VALID_PDQCB(p_pdqcb) \
+		((((char *) p_pdqcb) - ((char *) pdqcb_table)) % sizeof(PDQCB) == 0 \
+			&& TMIN_PDQID <= PDQID(p_pdqcb) && PDQID(p_pdqcb) <= tmax_pdqid)
+
+#define VALID_MBXCB(p_mbxcb) \
+		((((char *) p_mbxcb) - ((char *) mbxcb_table)) % sizeof(MBXCB) == 0 \
+			&& TMIN_MBXID <= MBXID(p_mbxcb) && MBXID(p_mbxcb) <= tmax_mbxid)
+
+#define VALID_MPFCB(p_mpfcb) \
+		((((char *) p_mpfcb) - ((char *) mpfcb_table)) % sizeof(MPFCB) == 0 \
+			&& TMIN_MPFID <= MPFID(p_mpfcb) && MPFID(p_mpfcb) <= tmax_mpfid)
+
+/*
+ *  ã­ã¥ã¼ã®ãã§ãã¯ã®ããã®é¢æ°
+ *
+ *  p_queueã«p_entryãå«ã¾ãã¦ããããèª¿ã¹ãï¼å«ã¾ãã¦ããã°trueï¼å«ã¾
+ *  ãã¦ããªãå ´åã«ã¯falseãè¿ãï¼ããã«ãªã³ã¯ã®ä¸æ´åã®å ´åã«ãï¼
+ *  falseãè¿ãï¼
+ */
+static bool_t
+in_queue(QUEUE *p_queue, QUEUE *p_entry)
+{
+	QUEUE	*p_current, *p_next;
+
+	p_current = p_queue->p_next;
+	if (p_current->p_prev != p_queue) {
+		return(false);					/* ããã«ãªã³ã¯ã®ä¸æ´å */
+	}
+	while (p_current != p_queue) {
+		if (p_current == p_entry) {
+			return(true);				/* p_entryãå«ã¾ãã¦ãã */
+		}
+
+		/*
+		 *  ã­ã¥ã¼ã®æ¬¡ã®è¦ç´ ã«é²ã
+		 */
+		p_next = p_current->p_next;
+		if (p_next->p_prev != p_current) {
+			return(false);				 /* ããã«ãªã³ã¯ã®ä¸æ´å */
+		}
+		p_current = p_next;
+	}
+	return(false);
+}
+
+/*
+ *  ã¹ã¿ãã¯ä¸ãæãã¦ãããã®æ¤æ»
+ */
+static bool_t
+on_stack(void *addr, const TINIB *p_tinib)
+{
+	if (p_tinib->stk <= addr
+				&& addr < (void *)((char *)(p_tinib->stk) + p_tinib->stksz)) {
+		return(true);
+	}
+	return(false);
+}
+
+/*
+ *  ã¿ã¹ã¯æ¯ã®æ´åæ§æ¤æ»
+ */
+static ER
+bit_task(ID tskid)
+{
+	TCB			*p_tcb;
+	const TINIB	*p_tinib;
+	uint_t		tstat, tstat_wait, pri;
+	TMEVTB		*p_tmevtb;
+	SEMCB		*p_semcb;
+	FLGCB		*p_flgcb;
+	DTQCB		*p_dtqcb;
+	PDQCB		*p_pdqcb;
+	MBXCB		*p_mbxcb;
+	MPFCB		*p_mpfcb;
+
+	if (!(TMIN_TSKID <= (tskid) && (tskid) <= tmax_tskid)) {
+		return(E_ID);
+	}
+	p_tcb = get_tcb(tskid);
+	p_tinib = p_tcb->p_tinib;
+	tstat = p_tcb->tstat;
+	tstat_wait = (tstat & TS_WAIT_MASK);
+	pri = p_tcb->priority;
+
+	/*
+	 *  åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ã®æ¤æ»
+	 */
+	if (p_tinib != &(tinib_table[INDEX_TSK(tskid)])) {
+		return(E_SYS_LINENO);
+	}
+
+	/*
+	 *  tstatã®æ¤æ»
+	 */
+	switch (tstat & (TS_RUNNABLE | TS_WAITING | TS_SUSPENDED)) {
+	case TS_DORMANT:
+		if (tstat != TS_DORMANT) {
+			return(E_SYS_LINENO);
+		}
+		break;
+	case TS_RUNNABLE:
+		if (tstat != TS_RUNNABLE) {
+			return(E_SYS_LINENO);
+		}
+		break;
+	case TS_WAITING:
+	case (TS_WAITING | TS_SUSPENDED):
+		if (!(TS_WAIT_DLY <= tstat_wait && tstat_wait <= TS_WAIT_MPF)) {
+			return(E_SYS_LINENO);
+		}
+		if ((tstat & ~(TS_WAIT_MASK | TS_RUNNABLE | TS_WAITING | TS_SUSPENDED))
+																	!= 0U) {
+			return(E_SYS_LINENO);
+		}
+		break;
+	case TS_SUSPENDED:
+		if (tstat != TS_SUSPENDED) {
+			return(E_SYS_LINENO);
+		}
+		break;
+	default:
+		return(E_SYS_LINENO);
+	}
+
+	/*
+	 *  actqueã®æ¤æ»
+	 */
+	if (TSTAT_DORMANT(tstat) && p_tcb->actque) {
+		return(E_SYS_LINENO);
+	}
+
+	/*
+	 *  ã¿ã¹ã¯åªå
+åº¦ã®æ¤æ»
+	 */
+	if (pri >= TNUM_TPRI) {
+		return(E_SYS_LINENO);
+	}
+
+	/*
+	 *  texptnã®æ¤æ»
+	 */
+	if (p_tcb->p_tinib->texrtn == NULL && p_tcb->texptn != 0U) {
+		return(E_SYS_LINENO);
+	}
+
+	/*
+	 *  ä¼æ­¢ç¶æ
+ã«ããããã§ãã¯
+	 */
+	if (TSTAT_DORMANT(tstat)) {
+		if (!(pri == p_tinib->ipriority)
+					&& (p_tcb->wupque == false)
+					&& (p_tcb->enatex == false)
+					&& (p_tcb->texptn == 0U)) {
+			return(E_SYS_LINENO);
+		}
+	}
+
+	/*
+	 *  å®è¡ã§ããç¶æ
+ã«ããããã§ãã¯
+	 */
+	if (TSTAT_RUNNABLE(tstat)) {
+		if (!in_queue(&ready_queue[pri], &(p_tcb->task_queue))) {
+			return(E_SYS_LINENO);
+		}
+	}
+
+	/*
+	 *  å¾
+ã¡ç¶æ
+ã«ããããã§ãã¯
+	 */
+	if (TSTAT_WAITING(tstat)) {
+		if (!on_stack(p_tcb->p_winfo, p_tinib)) {
+			return(E_SYS_LINENO);
+		}
+		p_tmevtb = p_tcb->p_winfo->p_tmevtb;
+		if (p_tmevtb != NULL) {
+			if (!on_stack(p_tmevtb, p_tinib)) {
+				return(E_SYS_LINENO);
+			}
+			/*
+			 *  (*p_tmevtb)ã®æ¤æ»ï¼æªå®æï¼
+			 */
+		}
+
+		switch (tstat & TS_WAIT_MASK) {
+			case TS_WAIT_SLP:
+				if (p_tcb->wupque == true) {
+					return(E_SYS_LINENO);
+				}
+				break;
+
+			case TS_WAIT_DLY:
+				if (p_tmevtb == NULL) {
+					return(E_SYS_LINENO);
+				}
+				break;
+
+			case TS_WAIT_SEM:
+				p_semcb = ((WINFO_SEM *)(p_tcb->p_winfo))->p_semcb;
+				if (!VALID_SEMCB(p_semcb)) {
+					return(E_SYS_LINENO);
+				}
+				if (!in_queue(&(p_semcb->wait_queue), &(p_tcb->task_queue))) {
+					return(E_SYS_LINENO);
+				}
+				break;
+
+			case TS_WAIT_FLG:
+				p_flgcb = ((WINFO_FLG *)(p_tcb->p_winfo))->p_flgcb;
+				if (!VALID_FLGCB(p_flgcb)) {
+					return(E_SYS_LINENO);
+				}
+				if (!in_queue(&(p_flgcb->wait_queue), &(p_tcb->task_queue))) {
+					return(E_SYS_LINENO);
+				}
+				break;
+
+			case TS_WAIT_SDTQ:
+				p_dtqcb = ((WINFO_DTQ *)(p_tcb->p_winfo))->p_dtqcb;
+				if (!VALID_DTQCB(p_dtqcb)) {
+					return(E_SYS_LINENO);
+				}
+				if (!in_queue(&(p_dtqcb->swait_queue), &(p_tcb->task_queue))) {
+					return(E_SYS_LINENO);
+				}
+				break;
+
+			case TS_WAIT_RDTQ:
+				p_dtqcb = ((WINFO_DTQ *)(p_tcb->p_winfo))->p_dtqcb;
+				if (!VALID_DTQCB(p_dtqcb)) {
+					return(E_SYS_LINENO);
+				}
+				if (!in_queue(&(p_dtqcb->rwait_queue), &(p_tcb->task_queue))) {
+					return(E_SYS_LINENO);
+				}
+				break;
+
+			case TS_WAIT_SPDQ:
+				p_pdqcb = ((WINFO_PDQ *)(p_tcb->p_winfo))->p_pdqcb;
+				if (!VALID_PDQCB(p_pdqcb)) {
+					return(E_SYS_LINENO);
+				}
+				if (!in_queue(&(p_pdqcb->swait_queue), &(p_tcb->task_queue))) {
+					return(E_SYS_LINENO);
+				}
+				break;
+
+			case TS_WAIT_RPDQ:
+				p_pdqcb = ((WINFO_PDQ *)(p_tcb->p_winfo))->p_pdqcb;
+				if (!VALID_PDQCB(p_pdqcb)) {
+					return(E_SYS_LINENO);
+				}
+				if (!in_queue(&(p_pdqcb->rwait_queue), &(p_tcb->task_queue))) {
+					return(E_SYS_LINENO);
+				}
+				break;
+
+			case TS_WAIT_MBX:
+				p_mbxcb = ((WINFO_MBX *)(p_tcb->p_winfo))->p_mbxcb;
+				if (!VALID_MBXCB(p_mbxcb)) {
+					return(E_SYS_LINENO);
+				}
+				if (!in_queue(&(p_mbxcb->wait_queue), &(p_tcb->task_queue))) {
+					return(E_SYS_LINENO);
+				}
+				break;
+
+			case TS_WAIT_MPF:
+				p_mpfcb = ((WINFO_MPF *)(p_tcb->p_winfo))->p_mpfcb;
+				if (!VALID_MPFCB(p_mpfcb)) {
+					return(E_SYS_LINENO);
+				}
+				if (!in_queue(&(p_mpfcb->wait_queue), &(p_tcb->task_queue))) {
+					return(E_SYS_LINENO);
+				}
+				break;
+		}
+	}
+
+	/*
+	 *  tskctxbã®æ¤æ»
+	 */
+	if (!TSTAT_DORMANT(tstat) && p_tcb != p_runtsk) {
+		/*
+		 *  ã¿ã¼ã²ããä¾å­ã®æ¤æ»
+		 */
+#if 0
+		if (bit_tskctxb(&(p_tcb->tskctxb))) {
+			return(E_SYS_LINENO);
+		}
+#endif
+	}
+	return(E_OK);
+}
+
+/*
+ *  ã»ããã©æ¯ã®æ´åæ§æ¤æ»
+ */
+#define INDEX_SEM(semid)	((uint_t)((semid) - TMIN_SEMID))
+#define get_semcb(semid)	(&(semcb_table[INDEX_SEM(semid)]))
+
+static ER
+bit_semaphore(ID semid)
+{
+	SEMCB			*p_semcb;
+	const SEMINIB	*p_seminib;
+	uint_t			semcnt;
+	QUEUE			*p_queue;
+	TCB				*p_tcb;
+
+	if (!(TMIN_SEMID <= (semid) && (semid) <= tmax_semid)) {
+		return(E_ID);
+	}
+	p_semcb = get_semcb(semid);
+	p_seminib = p_semcb->p_seminib;
+	semcnt = p_semcb->semcnt;
+
+	/*
+	 *  åæåãã­ãã¯ã¸ã®ãã¤ã³ã¿ã®æ¤æ»
+	 */
+	if (p_seminib != &(seminib_table[INDEX_SEM(semid)])) {
+		return(E_SYS_LINENO);
+	}
+
+	/*
+	 *  semcntã®æ¤æ»
+	 */
+	if (semcnt > p_seminib->maxsem) {
+		return(E_SYS_LINENO);
+	}
+
+	/*
+	 *  wait_queueã®æ¤æ»
+	 */
+	if (semcnt == 0) {
+		p_queue = p_semcb->wait_queue.p_next;
+		while (p_queue != &(p_semcb->wait_queue)) {
+			p_tcb = (TCB *) p_queue;
+			p_queue = p_queue->p_next;
+			if (!VALID_TCB(p_tcb)) {
+				return(E_SYS_LINENO);
+			}
+			if (p_tcb->tstat != (TS_WAITING | TS_WAIT_SEM)) {
+				return(E_SYS_LINENO);
+			}
+			if (p_semcb != ((WINFO_SEM *)(p_tcb->p_winfo))->p_semcb) {
+				return(E_SYS_LINENO);
+			}
+		}
+	}
+	else {
+		if (!queue_empty(&(p_semcb->wait_queue))) {
+			return(E_SYS_LINENO);
+		}
+	}
+	return(E_OK);
+}
+
+/*
+ *  æ´åæ§æ¤æ»ã«ã¼ãã³æ¬ä½
+ */
+ER
+bit_kernel(void)
+{
+	ID		tskid;
+	ID		semid;
+	ER		ercd;
+
+	/*
+	 *  ã¿ã¹ã¯æ¯ã®æ¤æ»
+	 */
+	for (tskid = TMIN_TSKID; tskid <= tmax_tskid; tskid++) {
+		ercd = bit_task(tskid);
+		if (ercd != E_OK) {
+			return(ercd);
+		}
+	}
+
+	/*
+	 *  ã»ããã©æ¯ã®æ¤æ»
+	 */
+	for (semid = TMIN_SEMID; semid <= tmax_semid; semid++) {
+		ercd = bit_semaphore(semid);
+		if (ercd != E_OK) {
+			return(ercd);
+		}
+	}
+
+	return(E_OK);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/perf0.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf0.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf0.c	(revision 136)
@@ -0,0 +1,98 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006-2009 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf0.c 2673 2015-02-08 10:08:03Z ertl-hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (0)
+ *
+ *  æéè¨æ¸¬ã®ãªã¼ãããããè¨æ¸¬ããããã®ãã­ã°ã©ã ï¼
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <test_lib.h>
+#include <histogram.h>
+#include "kernel_cfg.h"
+#include "perf0.h"
+
+/*
+ *  è¨æ¸¬åæ°ã¨å®è¡æéåå¸ãè¨é²ããæå¤§æé
+ */
+#define NO_MEASURE	10000U			/* è¨æ¸¬åæ° */
+#define MAX_TIME	1000U			/* å®è¡æéåå¸ãè¨é²ããæå¤§æé */
+
+/*
+ *  å®è¡æéåå¸ãè¨é²ããã¡ã¢ãªé å
+ */
+static uint_t	histarea1[MAX_TIME + 1];
+
+/*
+ *  ã¡ã¤ã³ã¿ã¹ã¯
+ */
+void main_task(intptr_t exinf)
+{
+	uint_t	i;
+
+	syslog_0(LOG_NOTICE, "Performance evaluation program (0)");
+	init_hist(1, MAX_TIME, histarea1);
+	syslog_flush();
+
+	for (i = 0; i < NO_MEASURE; i++) {
+		begin_measure(1);
+		end_measure(1);
+	}
+
+	syslog_0(LOG_NOTICE, "Measurement overhead");
+	print_hist(1);
+	test_finish();
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/perf0.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf0.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf0.cfg	(revision 136)
@@ -0,0 +1,14 @@
+/*
+ *  @(#) $Id: perf0.cfg 1575 2009-05-31 14:15:46Z ertl-hiro $
+ */
+
+/*
+ *  ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (0)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "perf0.h"
+CRE_TSK(MAIN_TASK, { TA_ACT, 0, main_task, MAIN_PRIORITY, STACK_SIZE, NULL });
Index: rtos_arduino/trunk/asp_1.9.2/test/perf0.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf0.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf0.h	(revision 136)
@@ -0,0 +1,81 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006,2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf0.h 329 2007-07-17 07:28:32Z hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (0)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define MAIN_PRIORITY	11		/* ã¡ã¤ã³ã¿ã¹ã¯ã®åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+extern void	main_task(intptr_t exinf);
Index: rtos_arduino/trunk/asp_1.9.2/test/perf1.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf1.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf1.c	(revision 136)
@@ -0,0 +1,134 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006-2009 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf1.c 2673 2015-02-08 10:08:03Z ertl-hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (1)
+ *
+ *  slp_tskï¼wup_tskã«ããã¿ã¹ã¯åæãæéãè¨æ¸¬ããããã®ãã­ã°ã©ã ï¼
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <test_lib.h>
+#include <histogram.h>
+#include "kernel_cfg.h"
+#include "perf1.h"
+
+/*
+ *  è¨æ¸¬åæ°ã¨å®è¡æéåå¸ãè¨é²ããæå¤§æé
+ */
+#define NO_MEASURE	10000U			/* è¨æ¸¬åæ° */
+#define MAX_TIME	1000U			/* å®è¡æéåå¸ãè¨é²ããæå¤§æé */
+
+/*
+ *  å®è¡æéåå¸ãè¨é²ããã¡ã¢ãªé å
+ */
+static uint_t	histarea1[MAX_TIME + 1];
+static uint_t	histarea2[MAX_TIME + 1];
+
+/*
+ *  è¨æ¸¬ã¿ã¹ã¯1ï¼é«åªå
+åº¦ï¼
+ */
+void task1(intptr_t exinf)
+{
+	uint_t	i;
+
+	slp_tsk();
+	end_measure(1);
+	for (i = 1; i < NO_MEASURE; i++) {
+		begin_measure(2);
+		slp_tsk();
+		end_measure(1);
+	}
+	begin_measure(2);
+	slp_tsk();
+}
+
+/*
+ *  è¨æ¸¬ã¿ã¹ã¯2ï¼ä¸­åªå
+åº¦ï¼
+ */
+void task2(intptr_t exinf)
+{
+	uint_t	i;
+
+	for (i = 0; i < NO_MEASURE; i++) {
+		begin_measure(1);
+		wup_tsk(TASK1);
+		end_measure(2);
+	}
+	wup_tsk(TASK1);
+}
+
+/*
+ *  ã¡ã¤ã³ã¿ã¹ã¯ï¼ä½åªå
+åº¦ï¼
+ */
+void main_task(intptr_t exinf)
+{
+	syslog_0(LOG_NOTICE, "Performance evaluation program (1)");
+	init_hist(1, MAX_TIME, histarea1);
+	init_hist(2, MAX_TIME, histarea2);
+	syslog_flush();
+
+	act_tsk(TASK1);
+	act_tsk(TASK2);
+
+	syslog_0(LOG_NOTICE, "Execution times of wup_tsk -> slp_tsk");
+	print_hist(1);
+	syslog_0(LOG_NOTICE, "Execution times of slp_tsk -> wup_tsk");
+	print_hist(2);
+	test_finish();
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/perf1.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf1.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf1.cfg	(revision 136)
@@ -0,0 +1,16 @@
+/*
+ *  @(#) $Id: perf1.cfg 1575 2009-05-31 14:15:46Z ertl-hiro $
+ */
+
+/*
+ *  ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (1)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "perf1.h"
+CRE_TSK(TASK1, { TA_NULL, 1, task1, TASK1_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK2, { TA_NULL, 2, task2, TASK2_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(MAIN_TASK, { TA_ACT, 0, main_task, MAIN_PRIORITY, STACK_SIZE, NULL });
Index: rtos_arduino/trunk/asp_1.9.2/test/perf1.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf1.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf1.h	(revision 136)
@@ -0,0 +1,87 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006,2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf1.h 329 2007-07-17 07:28:32Z hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (1)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define TASK1_PRIORITY	9		/* è¨æ¸¬ã¿ã¹ã¯1ã®åªå
+åº¦ */
+#define TASK2_PRIORITY	10		/* è¨æ¸¬ã¿ã¹ã¯2ã®åªå
+åº¦ */
+#define MAIN_PRIORITY	11		/* ã¡ã¤ã³ã¿ã¹ã¯ã®åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+extern void	task1(intptr_t exinf);
+extern void	task2(intptr_t exinf);
+extern void	main_task(intptr_t exinf);
Index: rtos_arduino/trunk/asp_1.9.2/test/perf2.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf2.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf2.c	(revision 136)
@@ -0,0 +1,132 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2009 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf2.c 2673 2015-02-08 10:08:03Z ertl-hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (2)
+ *
+ *  åªå
+åº¦ãã¼ã¿ã­ã¥ã¼ã«èç©ããã¦ãããã¼ã¿ã®æ°ã«ããï¼snd_pdqã®å¦çæ
+ *  éãã©ã®ããã«å¤åããããè¨æ¸¬ããããã®ãã­ã°ã©ã ï¼
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <test_lib.h>
+#include <histogram.h>
+#include "kernel_cfg.h"
+#include "perf2.h"
+
+/*
+ *  è¨æ¸¬åæ°ã¨å®è¡æéåå¸ãè¨é²ããæå¤§æé
+ */
+#define NO_MEASURE	10000U			/* è¨æ¸¬åæ° */
+#define MAX_TIME	1000U			/* å®è¡æéåå¸ãè¨é²ããæå¤§æé */
+
+/*
+ *  å®è¡æéåå¸ãè¨é²ããã¡ã¢ãªé å
+ */
+static uint_t	histarea1[MAX_TIME + 1];
+
+/*
+ *  è¨æ¸¬ã«ã¼ãã³
+ */
+void
+perf_eval(uint_t n)
+{
+	uint_t		i;
+	intptr_t	data;
+	PRI			pri;
+
+	ini_pdq(PDQ1);
+	init_hist(1, MAX_TIME, histarea1);
+
+	for (i = 0; i < n; i++) {
+		data = i;
+		snd_pdq(PDQ1, data, 1);
+	}
+
+	for (i = 0; i < NO_MEASURE; i++) {
+		data = i;
+		begin_measure(1);
+		snd_pdq(PDQ1, data, 2);
+		end_measure(1);
+		rcv_pdq(PDQ1, &data, &pri);
+	}
+
+	syslog_1(LOG_NOTICE, "Execution times of snd_pdq"
+								" when %d data are queued.", n);
+	print_hist(1);
+	syslog_flush();
+}
+
+/*
+ *  ã¡ã¤ã³ã¿ã¹ã¯ï¼ä½åªå
+åº¦ï¼
+ */
+void main_task(intptr_t exinf)
+{
+	syslog_0(LOG_NOTICE, "Performance evaluation program (2)");
+	syslog_flush();
+
+	perf_eval(0);
+	perf_eval(10);
+	perf_eval(20);
+	perf_eval(30);
+	perf_eval(40);
+	perf_eval(50);
+	perf_eval(100);
+	perf_eval(200);
+	perf_eval(300);
+	test_finish();
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/perf2.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf2.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf2.cfg	(revision 136)
@@ -0,0 +1,15 @@
+/*
+ *  @(#) $Id: perf2.cfg 1575 2009-05-31 14:15:46Z ertl-hiro $
+ */
+
+/*
+ *  ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (2)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "perf2.h"
+CRE_TSK(MAIN_TASK, { TA_ACT, 0, main_task, MAIN_PRIORITY, STACK_SIZE, NULL });
+CRE_PDQ(PDQ1, { TA_NULL, 301, 16, NULL });
Index: rtos_arduino/trunk/asp_1.9.2/test/perf2.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf2.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf2.h	(revision 136)
@@ -0,0 +1,81 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf2.h 459 2007-08-05 14:08:56Z hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (2)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define MAIN_PRIORITY	11		/* ã¡ã¤ã³ã¿ã¹ã¯ã®åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+extern void	main_task(intptr_t exinf);
Index: rtos_arduino/trunk/asp_1.9.2/test/perf3.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf3.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf3.c	(revision 136)
@@ -0,0 +1,159 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2009 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf3.c 2673 2015-02-08 10:08:03Z ertl-hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (3)
+ *
+ *  å¾
+ã¡è§£é¤ããã¿ã¹ã¯ã®æ°ã«ããï¼set_flgã®å¦çæéãã©ã®ããã«å¤åãã
+ *  ããè¨æ¸¬ããããã®ãã­ã°ã©ã ï¼
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <test_lib.h>
+#include <histogram.h>
+#include "kernel_cfg.h"
+#include "perf3.h"
+
+/*
+ *  è¨æ¸¬åæ°ã¨å®è¡æéåå¸ãè¨é²ããæå¤§æé
+ */
+#define NO_MEASURE	10000U			/* è¨æ¸¬åæ° */
+#define MAX_TIME	1000U			/* å®è¡æéåå¸ãè¨é²ããæå¤§æé */
+
+/*
+ *  å®è¡æéåå¸ãè¨é²ããã¡ã¢ãªé å
+ */
+static uint_t	histarea1[MAX_TIME + 1];
+
+/*
+ *  è¨æ¸¬ã¿ã¹ã¯ã®ãªã¹ã
+ */
+static ID task_list[20] = {
+	TASK1, TASK2, TASK3, TASK4, TASK5,
+	TASK6, TASK7, TASK8, TASK9, TASK10,
+	TASK11, TASK12, TASK13, TASK14, TASK15,
+	TASK16, TASK17, TASK18, TASK19, TASK20
+};
+
+/*
+ *  è¨æ¸¬ã¿ã¹ã¯ï¼ä¸­åªå
+åº¦ï¼
+ */
+void task(intptr_t exinf)
+{
+	FLGPTN	flgptn;
+
+	wai_flg(FLG1, 0x01U, TWF_ORW, &flgptn);
+}
+
+/*
+ *  è¨æ¸¬ã«ã¼ãã³
+ */
+void
+perf_eval(uint_t n)
+{
+	uint_t		i, j;
+
+	init_hist(1, MAX_TIME, histarea1);
+
+	for (i = 0; i < NO_MEASURE; i++) {
+		ini_flg(FLG1);
+		for (j = 0; j < n; j++) {
+			act_tsk(task_list[j]);
+		}
+		chg_pri(TSK_SELF, MAIN_PRIORITY_LOW);
+		/* ã¿ã¹ã¯ãå¾
+ã¡ç¶æ
+ã«å
+¥ãã®ãå¾
+ã¤ */
+		chg_pri(TSK_SELF, TPRI_INI);
+
+		begin_measure(1);
+		set_flg(FLG1, 0x01U);
+		end_measure(1);
+
+		chg_pri(TSK_SELF, MAIN_PRIORITY_LOW);
+		/* ã¿ã¹ã¯ãçµäºããã®ãå¾
+ã¤ */
+		chg_pri(TSK_SELF, TPRI_INI);
+	}
+
+	syslog_1(LOG_NOTICE, "Execution times of set_flg"
+							" when %d tasks are released from waiting.", n);
+	print_hist(1);
+	syslog_flush();
+}
+
+/*
+ *  ã¡ã¤ã³ã¿ã¹ã¯ï¼é«åªå
+åº¦ï¼
+ */
+void main_task(intptr_t exinf)
+{
+	syslog_0(LOG_NOTICE, "Performance evaluation program (3)");
+	syslog_flush();
+
+	perf_eval(0);
+	perf_eval(1);
+	perf_eval(2);
+	perf_eval(3);
+	perf_eval(4);
+	perf_eval(5);
+	perf_eval(10);
+	perf_eval(20);
+	test_finish();
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/perf3.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf3.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf3.cfg	(revision 136)
@@ -0,0 +1,35 @@
+/*
+ *  @(#) $Id: perf3.cfg 1575 2009-05-31 14:15:46Z ertl-hiro $
+ */
+
+/*
+ *  ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (3)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "perf3.h"
+CRE_TSK(TASK1, { TA_NULL, 1, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK2, { TA_NULL, 2, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK3, { TA_NULL, 3, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK4, { TA_NULL, 4, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK5, { TA_NULL, 5, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK6, { TA_NULL, 6, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK7, { TA_NULL, 7, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK8, { TA_NULL, 8, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK9, { TA_NULL, 9, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK10, { TA_NULL, 10, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK11, { TA_NULL, 11, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK12, { TA_NULL, 12, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK13, { TA_NULL, 13, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK14, { TA_NULL, 14, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK15, { TA_NULL, 15, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK16, { TA_NULL, 16, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK17, { TA_NULL, 17, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK18, { TA_NULL, 18, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK19, { TA_NULL, 19, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK20, { TA_NULL, 20, task, TASK_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(MAIN_TASK, { TA_ACT, 0, main_task, MAIN_PRIORITY, STACK_SIZE, NULL });
+CRE_FLG(FLG1, { TA_WMUL, 0x00U });
Index: rtos_arduino/trunk/asp_1.9.2/test/perf3.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf3.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf3.h	(revision 136)
@@ -0,0 +1,86 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf3.h 459 2007-08-05 14:08:56Z hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (3)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define TASK_PRIORITY		10		/* ã¿ã¹ã¯ã®åªå
+åº¦ */
+#define MAIN_PRIORITY		9		/* ã¡ã¤ã³ã¿ã¹ã¯ã®åªå
+åº¦ */
+#define MAIN_PRIORITY_LOW	11		/* ã¡ã¤ã³ã¿ã¹ã¯ã®ä½åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+extern void	task(intptr_t exinf);
+extern void	main_task(intptr_t exinf);
Index: rtos_arduino/trunk/asp_1.9.2/test/perf4.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf4.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf4.c	(revision 136)
@@ -0,0 +1,212 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006-2009 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf4.c 2673 2015-02-08 10:08:03Z ertl-hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (4)
+ *
+ *  act_tskï¼iact_tskã®å¦çæéã¨ã¿ã¹ã¯åæãæéãè¨æ¸¬ããããã®ãã­ã°
+ *  ã©ã ï¼ä»¥ä¸ã®3ã¤ã®æéãæ¸¬å®ããï¼
+ *
+ *  (1) ã¿ã¹ã¯åæããèµ·ãããªãact_tskã®å¦çæéï¼èªã¿ã¹ã¯ãããåªå
+åº¦
+ *      ã®ä½ãã¿ã¹ã¯ã«å¯¾ãã¦act_tskãçºè¡ãï¼ä¼æ­¢ç¶æ
+ããå®è¡ã§ããç¶æ
+
+ *      ã«é·ç§»ãããå¦çã®æéï¼
+ *
+ *  (2) ã¿ã¹ã¯åæããèµ·ããact_tskã®å¦çæéï¼èªã¿ã¹ã¯ãããåªå
+åº¦ã®é«
+ *      ãã¿ã¹ã¯ã«å¯¾ãã¦act_tskãçºè¡ãï¼ä¼æ­¢ç¶æ
+ããå®è¡ã§ããç¶æ
+ã«é·
+ *      ç§»ããï¼ã¿ã¹ã¯åæããèµ·ããã¦ï¼é«ãåªå
+åº¦ã®ã¿ã¹ã¯ã®å®è¡ãå§ã¾
+ *      ãã¾ã§ã®æéï¼
+ *
+ *  (3) ã¿ã¹ã¯åæããèµ·ããiact_tskã®å¦çæéï¼å¨æãã³ãã©ããï¼å®è¡
+ *      ç¶æ
+ã®ã¿ã¹ã¯ãããé«ãåªå
+åº¦ã®ã¿ã¹ã¯ã«å¯¾ãã¦act_tskãçºè¡ãï¼ä¼
+ *      æ­¢ç¶æ
+ããå®è¡ã§ããç¶æ
+ã«é·ç§»ããããã¨ã«å¨æãã³ãã©ãããªã¿ã¼
+ *      ã³ãï¼ã¿ã¹ã¯åæããèµ·ããã¦ï¼é«ãåªå
+åº¦ã®ã¿ã¹ã¯ã®å®è¡ãå§ã¾ã
+ *      ã¾ã§ã®æéï¼
+ */
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <test_lib.h>
+#include <histogram.h>
+#include "kernel_cfg.h"
+#include "perf4.h"
+
+/*
+ *  è¨æ¸¬åæ°ã¨å®è¡æéåå¸ãè¨é²ããæå¤§æé
+ */
+#define NO_MEASURE	10000U			/* è¨æ¸¬åæ° */
+#define MAX_TIME	1000U			/* å®è¡æéåå¸ãè¨é²ããæå¤§æé */
+
+/*
+ *  å®è¡æéåå¸ãè¨é²ããã¡ã¢ãªé å
+ */
+static uint_t	histarea1[MAX_TIME + 1];
+static uint_t	histarea2[MAX_TIME + 1];
+static uint_t	histarea3[MAX_TIME + 1];
+
+/*
+ *  è¨æ¸¬ã¿ã¹ã¯1ï¼é«åªå
+åº¦ï¼
+ */
+void task1(intptr_t exinf)
+{
+	end_measure(2);
+	ext_tsk();
+}
+
+/*
+ *  è¨æ¸¬ã¿ã¹ã¯2ã¨ã¡ã¤ã³ã¿ã¹ã¯ã®å
+±æå¤æ°
+ */
+volatile uint_t		task2_count;
+
+/*
+ *  è¨æ¸¬ã¿ã¹ã¯2ï¼é«åªå
+åº¦ï¼
+ */
+void task2(intptr_t exinf)
+{
+	end_measure(3);
+	task2_count++;
+	ext_tsk();
+}
+
+/*
+ *  è¨æ¸¬ã¿ã¹ã¯3ï¼ä½åªå
+åº¦ï¼
+ */
+void task3(intptr_t exinf)
+{
+	ext_tsk();
+}
+
+/*
+ *  è¨æ¸¬ã¿ã¹ã¯4ï¼æä½åªå
+åº¦ï¼
+ */
+void task4(intptr_t exinf)
+{
+	while (true) {
+		wup_tsk(MAIN_TASK);
+	}
+}
+
+/*
+ *  å¨æãã³ãã©
+ */
+void cyclic_handler(intptr_t exinf)
+{
+	begin_measure(3);
+	iact_tsk(TASK2);
+}
+
+/*
+ *  ã¡ã¤ã³ã¿ã¹ã¯ï¼ä¸­åªå
+åº¦ï¼
+ */
+void main_task(intptr_t exinf)
+{
+	uint_t	i;
+
+	syslog_0(LOG_NOTICE, "Performance evaluation program (4)");
+	init_hist(1, MAX_TIME, histarea1);
+	init_hist(2, MAX_TIME, histarea2);
+	init_hist(3, MAX_TIME, histarea3);
+	syslog_flush();
+
+	/*
+	 *  ã¿ã¹ã¯åæããèµ·ãããªãact_tskã®å¦çæéã®æ¸¬å®
+	 */
+	for (i = 0; i < NO_MEASURE; i++) {
+		begin_measure(1);
+		act_tsk(TASK3);
+		end_measure(1);
+		slp_tsk();
+	}
+
+	/*
+	 *  ã¿ã¹ã¯åæããèµ·ããact_tskã®å¦çæéã®æ¸¬å®
+	 */
+	for (i = 0; i < NO_MEASURE; i++) {
+		begin_measure(2);
+		act_tsk(TASK1);
+	}
+
+	/*
+	 *  ã¿ã¹ã¯åæããèµ·ããiact_tskã®å¦çæéã®æ¸¬å®ï¼æ¸¬å®åæ°ã¯10åã®1ï¼
+	 */
+	task2_count = 0;
+	sta_cyc(CYC1);
+	while (task2_count < NO_MEASURE / 10) ;
+	stp_cyc(CYC1);
+
+	syslog_0(LOG_NOTICE, "Execution times of act_tsk without task switch");
+	print_hist(1);
+	syslog_0(LOG_NOTICE, "Execution times of act_tsk with task switch");
+	print_hist(2);
+	syslog_0(LOG_NOTICE, "Execution times of iact_tsk with task switch");
+	print_hist(3);
+	test_finish();
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/perf4.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf4.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf4.cfg	(revision 136)
@@ -0,0 +1,21 @@
+/*
+ *  @(#) $Id: perf4.cfg 1575 2009-05-31 14:15:46Z ertl-hiro $
+ */
+
+/*
+ *  ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (4)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "perf4.h"
+CRE_TSK(TASK1, { TA_NULL, 1, task1, TASK1_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK2, { TA_NULL, 2, task2, TASK2_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK3, { TA_NULL, 3, task3, TASK3_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK4, { TA_ACT, 4, task4, TASK4_PRIORITY, STACK_SIZE, NULL });
+CRE_CYC(CYC1, { TA_NULL, 0, cyclic_handler,
+					(TIC_NUME + TIC_DENO - 1) / TIC_DENO,
+					(TIC_NUME + TIC_DENO - 1) / TIC_DENO });
+CRE_TSK(MAIN_TASK, { TA_ACT, 0, main_task, MAIN_PRIORITY, STACK_SIZE, NULL });
Index: rtos_arduino/trunk/asp_1.9.2/test/perf4.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/perf4.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/perf4.h	(revision 136)
@@ -0,0 +1,94 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006-2009 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: perf4.h 1552 2009-05-12 02:35:57Z ertl-hiro $
+ */
+
+/*
+ *		ã«ã¼ãã«æ§è½è©ä¾¡ãã­ã°ã©ã (4)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define TASK1_PRIORITY	9		/* è¨æ¸¬ã¿ã¹ã¯1ã®åªå
+åº¦ */
+#define TASK2_PRIORITY	9		/* è¨æ¸¬ã¿ã¹ã¯2ã®åªå
+åº¦ */
+#define TASK3_PRIORITY	11		/* è¨æ¸¬ã¿ã¹ã¯3ã®åªå
+åº¦ */
+#define TASK4_PRIORITY	12		/* è¨æ¸¬ã¿ã¹ã¯4ã®åªå
+åº¦ */
+#define MAIN_PRIORITY	10		/* ã¡ã¤ã³ã¿ã¹ã¯ã®åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+extern void	task1(intptr_t exinf);
+extern void	task2(intptr_t exinf);
+extern void	task3(intptr_t exinf);
+extern void	task4(intptr_t exinf);
+extern void	cyclic_handler(intptr_t exinf);
+extern void	main_task(intptr_t exinf);
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc.cfg	(revision 136)
@@ -0,0 +1,22 @@
+/*
+ *  @(#) $Id: test_cpuexc.cfg 1572 2009-05-31 13:40:39Z ertl-hiro $
+ */
+
+/*
+ *  CPUä¾å¤å¦çã®ãã¹ã(1)ï½(13)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "test_cpuexc.h"
+
+CRE_TSK(TASK1, { TA_ACT, 1, task1, MID_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK1, { TA_NULL, tex_task1 });
+
+CRE_TSK(TASK2, { TA_NULL, 2, task2, HIGH_PRIORITY, STACK_SIZE, NULL });
+
+CRE_ALM(ALM1, { TA_NULL, 1, alarm1_handler });
+
+DEF_EXC(CPUEXC1, { TA_NULL, cpuexc_handler });
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc.h	(revision 136)
@@ -0,0 +1,94 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: test_cpuexc.h 329 2007-07-17 07:28:32Z hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(1)ï½(13)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define HIGH_PRIORITY	9		/* é«åªå
+åº¦ */
+#define MID_PRIORITY	10		/* ä¸­åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	task1(intptr_t exinf);
+extern void	tex_task1(TEXPTN texptn, intptr_t exinf);
+
+extern void	task2(intptr_t exinf);
+
+extern void	alarm1_handler(intptr_t exinf);
+
+extern void	cpuexc_handler(void *p_excinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc1.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc1.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc1.c	(revision 136)
@@ -0,0 +1,230 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc1.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(1)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  éã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ã
+ *  ã ç¶æ
+ã®ãã¹ãï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããç¦æ­¢ç¶
+ *  æ
+ï¼ã¿ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§ãã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ã
+ *  ãã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *		ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã§ã¯ï¼ã·ã¹ãã ç¶æ
+ãæ­£ããèª­
+ *		ãããã¨ãä¿è¨¼ãããªãããï¼ãã¹ãã§ããªãï¼
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã§ã¯ï¼ã·ã¹ãã ç¶æ
+ãæ­£ããèª­
+ *		ãããã¨ãä¿è¨¼ãããªãããï¼ãã¹ãã§ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã§ã¯ï¼ã·ã¹ãã ç¶æ
+ãæ­£ããèª­
+ *		ãããã¨ãä¿è¨¼ãããªãããï¼ãã¹ãã§ããªãï¼
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã§ã¯ï¼ã·ã¹ãã ç¶æ
+ãæ­£ããèª­
+ *		ãããã¨ãä¿è¨¼ãããªãããï¼ãã¹ãã§ããªãï¼
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *	ALM1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		dis_dsp()
+ *		ena_tex()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		sta_alm(ALM1, 1U)
+ *		ã¢ã©ã¼ã ãã³ãã©1ã®å®è¡ãå¾
+ã¤
+ *	== ALM1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯
+ *		SIL_LOC_INT()
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	4:	xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	5:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	5:	ãªã¿ã¼ã³
+ *	== ALM1ï¼ç¶ãï¼==
+ *	6:	SIL_UNL_LOC()
+ *	7:	ç¶æ
+ã®ãã§ãã¯				... (E)(G)(H)
+ *		ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	8:	ç¶æ
+ã®ãã§ãã¯				... (F)
+ *	9:	ãã¹ãçµäº
+ */
+
+#include <sil.h>
+#include <kernel.h>
+#include <t_syslog.h>
+#include <test_lib.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+volatile bool_t	alm1_flag = false;
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+	ercd = sta_alm(ALM1, 1U);
+	check_ercd(ercd, E_OK);
+
+	while (!(alm1_flag));
+
+	check_point(8);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+
+	check_finish(9);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	SIL_PRE_LOC;
+
+	check_point(3);
+	check_state_i(true, false, true, true, false);
+	SIL_LOC_INT();
+	RAISE_CPU_EXCEPTION;
+
+	check_point(6);
+	SIL_UNL_INT();
+
+	check_point(7);
+	check_state_i(true, false, true, true, false);
+	alm1_flag = true;
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(4);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(5);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(5);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc10.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc10.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc10.c	(revision 136)
@@ -0,0 +1,197 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2015 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc10.c 2670 2015-01-07 06:32:07Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(10)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TMIN_INTPRI-1ï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤
+ *  è¨±å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼
+ *
+ *  ãã®ãã¹ãã¯ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãTMIN_INTPRI-1ã«è¨­å®ã§ããå ´åã®ã¿
+ *  å®æ½ããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TMIN_INTPRI-1ï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼
+ *  ã¿ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		chg_ipm(TMIN_INTPRI-1)
+ *		ena_tex()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	4:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	4:	ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	5:	ç¶æ
+ã®ãã§ãã¯				... (E)(F)(G)(H)
+ *	6:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = chg_ipm(TMIN_INTPRI - 1);
+	if (ercd == E_PAR) {
+		syslog_0(LOG_NOTICE, "This test program is not necessary.");
+		ext_ker();
+	}
+	check_ercd(ercd, E_OK);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, false, TMIN_INTPRI - 1, false, true, false);
+	RAISE_CPU_EXCEPTION;
+
+	check_point(5);
+	check_state(false, false, TMIN_INTPRI - 1, false, true, false);
+
+	check_finish(6);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(3);
+	check_state_i(true, false, false, true, false);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(4);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(4);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc11.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc11.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc11.c	(revision 136)
@@ -0,0 +1,299 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc11.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(11)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤è¨±
+ *  å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼ã¿ã¹ã¯åæãã«
+ *  ãããªã«ããªã¼ã§ãããã¨ããã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿
+ *  ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(I) xsns_xpnãfalseãè¿ããã¨
+ *	(J) xsns_dpnãfalseãè¿ããã¨
+ *	(K) ã¿ã¹ã¯åæãã«ãããªã«ããªã¼ãã§ãããã¨
+ *	(L) ã¿ã¹ã¯ä¾å¤ã«ãããªã«ããªã¼ãã§ãããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	TASK2: TA_NULLï¼é«åªå
+åº¦
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼1åç®ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		ena_tex()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1ï¼1åç®ï¼==
+ *	3:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == false			... (I)
+ *		xsns_dpn() == false			... (J)
+ *	4:	iact_tsk(TASK2)
+ *		iloc_cpu()
+ *		ãªã¿ã¼ã³
+ *	== TASK2ï¼é«åªå
+åº¦ï¼==
+ *	5:	ç¶æ
+ã®ãã§ãã¯				... (E)(F)(G)(H)
+ *	6:	ter_tsk(TASK1)				... (K)
+ *	7:	act_tsk(TASK1)				... (K)
+ *	8:	ext_tsk()
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼2åç®ï¼==
+ *	9:	ç¶æ
+ã®ãã§ãã¯				... (K)
+ *		ena_tex()
+ *	10:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1ï¼2åç®ï¼==
+ *	11:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == false			... (I)
+ *		xsns_dpn() == false			... (J)
+ *	12:	iras_tex(TASK1, 1U)
+ *		iloc_cpu()
+ *		ãªã¿ã¼ã³
+ *	== TASK1ã®ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ ==
+ *	13:	ç¶æ
+ã®ãã§ãã¯				... (E)(F)(G)(H)
+ *	14:	act_tsk(TASK1)				... (L)
+ *	15:	ext_tsk()					... (L)
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼3åç®ï¼==
+ *	16:	ç¶æ
+ã®ãã§ãã¯				... (L)
+ *	17:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+int_t	task1_count = 0;
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	switch (++task1_count) {
+	case 1:
+		test_start(__FILE__);
+
+		check_point(1);
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+		ercd = ena_tex();
+		check_ercd(ercd, E_OK);
+
+		check_point(2);
+		check_state(false, false, TIPM_ENAALL, false, false, false);
+		RAISE_CPU_EXCEPTION;
+
+		check_point(0);
+		break;
+
+	case 2:
+		check_point(9);
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+		ercd = ena_tex();
+		check_ercd(ercd, E_OK);
+
+		check_point(10);
+		check_state(false, false, TIPM_ENAALL, false, false, false);
+		RAISE_CPU_EXCEPTION;
+
+		check_point(0);
+		break;
+
+	case 3:
+		check_point(16);
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		check_finish(17);
+		break;
+
+	default:
+		check_point(0);
+		break;
+	}
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	ER		ercd;
+
+	check_point(13);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	check_point(14);
+	ercd = act_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(15);
+	ercd = ext_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	ER		ercd;
+
+	check_point(5);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	check_point(6);
+	ercd = ter_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(7);
+	ercd = act_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(8);
+	ercd = ext_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+int_t	cpuexc_count = 0;
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	ER		ercd;
+
+	switch (++cpuexc_count) {
+	case 1:
+		check_point(3);
+		check_state_i(true, false, false, true, false);
+		check_assert(xsns_xpn(p_excinf) == false);
+		check_assert(xsns_dpn(p_excinf) == false);
+
+		check_point(4);
+		ercd = iact_tsk(TASK2);
+		check_ercd(ercd, E_OK);
+		ercd = iloc_cpu();
+		check_ercd(ercd, E_OK);
+		break;
+
+	case 2:
+		check_point(11);
+		check_state_i(true, false, false, true, false);
+		check_assert(xsns_xpn(p_excinf) == false);
+		check_assert(xsns_dpn(p_excinf) == false);
+
+		check_point(12);
+		ercd = iras_tex(TASK1, 1U);
+		check_ercd(ercd, E_OK);
+		ercd = iloc_cpu();
+		check_ercd(ercd, E_OK);
+		break;
+
+	default:
+		check_point(0);
+		break;
+	}
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc12.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc12.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc12.c	(revision 136)
@@ -0,0 +1,186 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc12.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(12)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããç¦æ­¢ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤ç¦
+ *  æ­¢ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããç¦æ­¢ç¶æ
+ï¼ã¿
+ *  ã¹ã¯ä¾å¤ç¦æ­¢ç¶æ
+ã§çºçããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		dis_dsp()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	4:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	4:	ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	5:	ç¶æ
+ã®ãã§ãã¯				... (E)(F)(G)(H)
+ *	6:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, false, TIPM_ENAALL, true, true, true);
+	RAISE_CPU_EXCEPTION;
+
+	check_point(5);
+	check_state(false, false, TIPM_ENAALL, true, true, true);
+
+	check_finish(6);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(3);
+	check_state_i(true, false, true, true, true);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(4);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(4);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc13.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc13.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc13.c	(revision 136)
@@ -0,0 +1,186 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc13.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(13)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TMIN_INTPRIï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤ç¦
+ *  æ­¢ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TMIN_INTPRIï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿
+ *  ã¹ã¯ä¾å¤ç¦æ­¢ç¶æ
+ã§çºçããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		chg_ipm(TMIN_INTPRI)
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	4:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	4:	ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	5:	ç¶æ
+ã®ãã§ãã¯				... (E)(F)(G)(H)
+ *	6:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = chg_ipm(TMIN_INTPRI);
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, false, TMIN_INTPRI, false, true, true);
+	RAISE_CPU_EXCEPTION;
+
+	check_point(5);
+	check_state(false, false, TMIN_INTPRI, false, true, true);
+
+	check_finish(6);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(3);
+	check_state_i(true, false, false, true, true);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(4);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(4);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc2.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc2.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc2.c	(revision 136)
@@ -0,0 +1,216 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc2.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(2)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  éã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯è§£é¤ï¼CPUã­ãã¯ç¶æ
+ã§çºçããCPUä¾
+ *  å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£
+ *  ã¹ãããç¦æ­¢ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§ãã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯è§£é¤ï¼CPUã­ãã¯ç¶æ
+ã§çºç
+ *  ããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *	ALM1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		dis_dsp()
+ *		ena_tex()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		sta_alm(ALM1, 1U)
+ *		ã¢ã©ã¼ã ãã³ãã©1ã®å®è¡ãå¾
+ã¤
+ *	== ALM1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯
+ *		iloc_cpu()
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	4:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	5:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	5:	ãªã¿ã¼ã³
+ *	== ALM1ï¼ç¶ãï¼==
+ *	6:	ç¶æ
+ã®ãã§ãã¯				... (E)(G)(H)
+ *		ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	7:	ç¶æ
+ã®ãã§ãã¯				... (F)
+ *	8:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+volatile bool_t	alm1_flag = false;
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+	ercd = sta_alm(ALM1, 1U);
+	check_ercd(ercd, E_OK);
+
+	while (!(alm1_flag));
+
+	check_point(7);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+
+	check_finish(8);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	ER		ercd;
+
+	check_point(3);
+	check_state_i(true, false, true, true, false);
+	ercd = iloc_cpu();
+	check_ercd(ercd, E_OK);
+	RAISE_CPU_EXCEPTION;
+
+	check_point(6);
+	check_state_i(true, true, true, true, false);
+	alm1_flag = true;
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(4);
+	check_state_i(true, true, true, true, false);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(5);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(5);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc3.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc3.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc3.c	(revision 136)
@@ -0,0 +1,209 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc3.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(3)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  éã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯è§£é¤ï¼CPUã­ãã¯è§£é¤ã§çºçããCPUä¾
+ *  å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£
+ *  ã¹ãããç¦æ­¢ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§ãã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼éã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯è§£é¤ï¼CPUã­ãã¯è§£é¤ã§çºç
+ *  ããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *	ALM1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		dis_dsp()
+ *		ena_tex()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		sta_alm(ALM1, 1U)
+ *		ã¢ã©ã¼ã ãã³ãã©1ã®å®è¡ãå¾
+ã¤
+ *	== ALM1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	4:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	5:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	5:	ãªã¿ã¼ã³
+ *	== ALM1ï¼ç¶ãï¼==
+ *	6:	ç¶æ
+ã®ãã§ãã¯				... (E)(G)(H)
+ *		ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	7:	ç¶æ
+ã®ãã§ãã¯				... (F)
+ *	8:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+volatile bool_t	alm1_flag = false;
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+	ercd = sta_alm(ALM1, 1U);
+	check_ercd(ercd, E_OK);
+
+	while (!(alm1_flag));
+
+	check_point(7);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+
+	check_finish(8);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(3);
+	check_state_i(true, false, true, true, false);
+	RAISE_CPU_EXCEPTION;
+
+	check_point(6);
+	check_state_i(true, false, true, true, false);
+	alm1_flag = true;
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(4);
+	check_state_i(true, false, true, true, false);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(5);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(5);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc4.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc4.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc4.c	(revision 136)
@@ -0,0 +1,207 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc4.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(4)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  ã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ãã 
+ *  ç¶æ
+ã®ãã¹ãï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããç¦æ­¢ç¶æ
+ï¼
+ *  ã¿ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§ãã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ãã
+ *  ã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *		ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã§ã¯ï¼ã·ã¹ãã ç¶æ
+ãæ­£ããèª­
+ *		ãããã¨ãä¿è¨¼ãããªãããï¼ãã¹ãã§ããªãï¼
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã§ã¯ï¼ã·ã¹ãã ç¶æ
+ãæ­£ããèª­
+ *		ãããã¨ãä¿è¨¼ãããªãããï¼ãã¹ãã§ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã§ã¯ï¼ã·ã¹ãã ç¶æ
+ãæ­£ããèª­
+ *		ãããã¨ãä¿è¨¼ãããªãããï¼ãã¹ãã§ããªãï¼
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼å²è¾¼ã¿ã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤ã§ã¯ï¼ã·ã¹ãã ç¶æ
+ãæ­£ããèª­
+ *		ãããã¨ãä¿è¨¼ãããªãããï¼ãã¹ãã§ããªãï¼
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		dis_dsp()
+ *		ena_tex()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		SIL_LOC_INT()
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	3:	xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	4:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	4:	ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	5:	SIL_UNL_LOC()
+ *	6:	ç¶æ
+ã®ãã§ãã¯				... (E)(F)(G)(H)
+ *	7:	ãã¹ãçµäº
+ */
+
+#include <sil.h>
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+	SIL_PRE_LOC;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+	SIL_LOC_INT();
+	RAISE_CPU_EXCEPTION;
+
+	check_point(5);
+	SIL_UNL_INT();
+
+	check_point(6);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+
+	check_finish(7);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(3);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(4);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(4);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc5.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc5.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc5.c	(revision 136)
@@ -0,0 +1,192 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc5.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(5)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  ã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯è§£é¤ï¼CPUã­ãã¯ç¶æ
+ã§çºçããCPUä¾å¤
+ *  ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£
+ *  ã¹ãããç¦æ­¢ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§ãã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼ã¿ã¹ã¯ã³ã³ãã­ã¹ãï¼å²è¾¼ã­ãã¯è§£é¤ï¼CPUã­ãã¯ç¶æ
+ã§çºçã
+ *  ãCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		dis_dsp()
+ *		ena_tex()
+ *		loc_cpu()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	4:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	4:	ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	5:	ç¶æ
+ã®ãã§ãã¯				... (E)(F)(G)(H)
+ *	6:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+	ercd = loc_cpu();
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, true, TIPM_ENAALL, true, true, false);
+	RAISE_CPU_EXCEPTION;
+
+	check_point(5);
+	check_state(false, true, TIPM_ENAALL, true, true, false);
+
+	check_finish(6);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(3);
+	check_state_i(true, true, true, true, false);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(4);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(4);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc6.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc6.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc6.c	(revision 136)
@@ -0,0 +1,220 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc6.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(6)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤ç¦
+ *  æ­¢ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼ã¿ã¹ã¯åæãã«
+ *  ãããªã«ããªã¼ã§ãããã¨ããã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿
+ *  ã¹ã¯ä¾å¤ç¦æ­¢ç¶æ
+ã§çºçããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãfalseãè¿ããã¨
+ *	(K) ã¿ã¹ã¯åæãã«ãããªã«ããªã¼ãã§ãããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	TASK2: TA_NULLï¼é«åªå
+åº¦
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼1åç®ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *	2:	RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯				... (A),(C),(D)
+ *		xsns_xpn() == true			... (I)
+ *		xsns_dpn() == false			... (J)
+ *  4:	iact_tsk(TASK2)
+ *		iloc_cpu()
+ *  	ãªã¿ã¼ã³
+ *	== TASK2ï¼é«åªå
+åº¦ï¼==
+ *	5:	ç¶æ
+ã®ãã§ãã¯				... (E),(F),(G),(H)
+ *	6:	ter_tsk(TASK1)				... (K)
+ *	7:	act_tsk(TASK1)				... (K)
+ *	8:	ext_tsk()
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼2åç®ï¼==
+ *	9:	ç¶æ
+ã®ãã§ãã¯				... (K)
+ *	10:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+int_t	task1_count = 0;
+
+void
+task1(intptr_t exinf)
+{
+	switch (++task1_count) {
+	case 1:
+		test_start(__FILE__);
+
+		check_point(1);
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		check_point(2);
+		RAISE_CPU_EXCEPTION;
+
+		check_point(0);
+		break;
+
+	case 2:
+		check_point(9);
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		check_finish(10);
+		break;
+
+	default:
+		check_point(0);
+		break;
+	}
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	ER		ercd;
+
+	check_point(5);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	check_point(6);
+	ercd = ter_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(7);
+	ercd = act_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(8);
+	ercd = ext_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	ER		ercd;
+
+	check_point(3);
+	check_state_i(true, false, false, true, true);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == false);
+
+	check_point(4);
+	ercd = iact_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+	ercd = iloc_cpu();
+	check_ercd(ercd, E_OK);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc7.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc7.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc7.c	(revision 136)
@@ -0,0 +1,223 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc7.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(7)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããç¦æ­¢ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤è¨±
+ *  å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼ã¿ã¹ã¯ä¾å¤ã«ã
+ *  ããªã«ããªã¼ã§ãããã¨ããã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TIPM_ENAALLï¼ãã£ã¹ãããç¦æ­¢ç¶æ
+ï¼ã¿
+ *  ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(I) xsns_xpnãfalseãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *	(L) ã¿ã¹ã¯ä¾å¤ã«ãããªã«ããªã¼ãã§ãããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼1åç®ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		dis_dsp()
+ *		ena_tex()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯				... (A),(C),(D)
+ *		xsns_xpn() == false			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	4:	iras_tex(TASK1, 1U)
+ *		iloc_cpu()
+ *		ãªã¿ã¼ã³
+ *	== TASK1ã®ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ ==
+ *	5:	ç¶æ
+ã®ãã§ãã¯				... (E),(F),(G),(H)
+ *	6:	act_tsk(TASK1)				... (L)
+ *	7:	ext_tsk()					... (L)
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼2åç®ï¼==
+ *	8:	ç¶æ
+ã®ãã§ãã¯				... (L)
+ *	9:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+int_t	task1_count = 0;
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	switch (++task1_count) {
+	case 1:
+		test_start(__FILE__);
+
+		check_point(1);
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+		ercd = dis_dsp();
+		check_ercd(ercd, E_OK);
+		ercd = ena_tex();
+		check_ercd(ercd, E_OK);
+
+		check_point(2);
+		check_state(false, false, TIPM_ENAALL, true, true, false);
+		RAISE_CPU_EXCEPTION;
+
+		check_point(0);
+		break;
+
+	case 2:
+		check_point(8);
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		check_finish(9);
+		break;
+
+	default:
+		check_point(0);
+		break;
+	}
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	ER		ercd;
+
+	check_point(5);
+	check_state(false, false, TIPM_ENAALL, true, true, true);
+
+	check_point(6);
+	ercd = act_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(7);
+	ercd = ext_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	ER		ercd;
+
+	check_point(3);
+	check_state_i(true, false, true, true, false);
+	check_assert(xsns_xpn(p_excinf) == false);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+	check_point(4);
+	ercd = iras_tex(TASK1, 1U);
+	check_ercd(ercd, E_OK);
+	ercd = iloc_cpu();
+	check_ercd(ercd, E_OK);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc8.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc8.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc8.c	(revision 136)
@@ -0,0 +1,196 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc8.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(8)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TMAX_INTPRIï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤è¨±
+ *  å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼
+ *
+ *  ãã®ãã¹ãã¯ï¼TMAX_INTPRIã¨TMIN_INTPRIãç°ãªãå ´åã®ã¿å®æ½ããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TMAX_INTPRIï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿
+ *  ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		chg_ipm(TMAX_INTPRI)
+ *		ena_tex()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	4:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	4:	ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	5:	ç¶æ
+ã®ãã§ãã¯				... (E)(F)(G)(H)
+ *	6:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	if (TMAX_INTPRI == TMIN_INTPRI) {
+		syslog_0(LOG_NOTICE, "This test program is not necessary.");
+		ext_ker();
+	}
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = chg_ipm(TMAX_INTPRI);
+	check_ercd(ercd, E_OK);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, false, TMAX_INTPRI, false, true, false);
+	RAISE_CPU_EXCEPTION;
+
+	check_point(5);
+	check_state(false, false, TMAX_INTPRI, false, true, false);
+
+	check_finish(6);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(3);
+	check_state_i(true, false, false, true, false);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(4);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(4);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc9.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc9.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_cpuexc9.c	(revision 136)
@@ -0,0 +1,189 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_cpuexc9.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		CPUä¾å¤å¦çã®ãã¹ã(9)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TMIN_INTPRIï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿ã¹ã¯ä¾å¤è¨±
+ *  å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ãããã·ã¹ãã ç¶æ
+ã®ãã¹ãï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *  ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ï¼TMIN_INTPRIï¼ãã£ã¹ãããè¨±å¯ç¶æ
+ï¼ã¿
+ *  ã¹ã¯ä¾å¤è¨±å¯ç¶æ
+ã§çºçããCPUä¾å¤ã«ããã¦ï¼
+ *
+ *	(A) CPUä¾å¤ãã³ãã©å®è¡éå§æã«CPUã­ãã¯ãã©ã°ãå¤åããªããã¨
+ *	(B) CPUä¾å¤ãã³ãã©å®è¡éå§æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ä¸­ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãèª­ããªãããï¼ãã¹ãã§
+ *		ããªãï¼
+ *	(C) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(D) CPUä¾å¤ãã³ãã©å®è¡éå§æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *	(E) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«CPUã­ãã¯ãã©ã°ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(F) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(G) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ãã£ã¹ãããç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(H) CPUä¾å¤ãã³ãã©ãªã¿ã¼ã³æã«ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ãã©ã°ãå¤åããªããã¨
+ *		ï¼CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããå ´åã®ã¿ãã¹ãããï¼
+ *	(I) xsns_xpnãtrueãè¿ããã¨
+ *	(J) xsns_dpnãtrueãè¿ããã¨
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: TA_ACTï¼ä¸­åªå
+åº¦ï¼ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ç»é²
+ *	CPUEXC1: TA_NULL
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼ä¸­åªå
+åº¦ï¼==
+ *	1:	ç¶æ
+ã®ãã§ãã¯
+ *		chg_ipm(TMIN_INTPRI)
+ *		ena_tex()
+ *	2:	ç¶æ
+ã®ãã§ãã¯
+ *		RAISE_CPU_EXCEPTION
+ *	== CPUEXC1 ==
+ *	3:	ç¶æ
+ã®ãã§ãã¯				... (A)(C)(D)
+ *		xsns_xpn() == true			... (I)
+ *		xsns_dpn() == true			... (J)
+ *	4:	CPUä¾å¤ãã³ãã©ãããªã¿ã¼ã³ã§ããªãå ´åã¯ï¼ããã§çµäº
+ *	4:	ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	5:	ç¶æ
+ã®ãã§ãã¯				... (E)(F)(G)(H)
+ *	6:	ãã¹ãçµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_cpuexc.h"
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+	ercd = chg_ipm(TMIN_INTPRI);
+	check_ercd(ercd, E_OK);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(2);
+	check_state(false, false, TMIN_INTPRI, false, true, false);
+	RAISE_CPU_EXCEPTION;
+
+	check_point(5);
+	check_state(false, false, TMIN_INTPRI, false, true, false);
+
+	check_finish(6);
+}
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	check_point(3);
+	check_state_i(true, false, false, true, false);
+	check_assert(xsns_xpn(p_excinf) == true);
+	check_assert(xsns_dpn(p_excinf) == true);
+
+#ifdef CANNOT_RETURN_CPUEXC
+	check_finish(4);
+#endif /* CANNOT_RETURN_CPUEXC */
+
+	check_point(4);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_dlynse.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_dlynse.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_dlynse.c	(revision 136)
@@ -0,0 +1,136 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_dlynse.c 2673 2015-02-08 10:08:03Z ertl-hiro $
+ */
+
+/*
+ *		sil_dly_nseã«é¢ãããã¹ã
+ */
+
+#include <kernel.h>
+#include <sil.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_dlynse.h"
+
+/*
+ *  SIL_DLY_TIM1ã¨SIL_DLY_TIM2ãåç
+§ããããã«ï¼ã«ã¼ãã«ç¨ã®ããããã¡
+ *  ã¤ã«ãã¤ã³ã¯ã«ã¼ãããï¼
+ */
+#include "kernel/kernel_impl.h"
+
+#define	NO_LOOP		ULONG_C(1000000)
+
+SYSTIM	empty_time;
+
+static void
+test_empty(void)
+{
+	SYSTIM	stime, etime;
+	volatile ulong_t	i;
+
+	get_tim(&stime);
+	for (i = 0; i < NO_LOOP; i++) {
+	}
+	get_tim(&etime);
+	empty_time = etime - stime;
+	syslog(LOG_NOTICE, "empty loop: %u", empty_time);
+	syslog_flush();
+}
+
+static void
+test_dly_nse(ulong_t dlytim)
+{
+	SYSTIM	stime, etime, delay_time;
+	volatile ulong_t	i;
+
+	get_tim(&stime);
+	for (i = 0; i < NO_LOOP; i++) {
+		sil_dly_nse(dlytim);
+	}
+	get_tim(&etime);
+	delay_time = (etime - stime) - empty_time;
+	syslog(LOG_NOTICE, "sil_dly_nse(%u): %u %s", (uint_t)(dlytim),
+				(uint_t)(delay_time), delay_time > dlytim ? "OK" : "NG");
+	syslog_flush();
+}
+
+void
+main_task(intptr_t exinf)
+{
+	test_start(__FILE__);
+
+	test_empty();
+
+	syslog(LOG_NOTICE, "-- for fitting parameters --");
+	test_dly_nse(0);
+	test_dly_nse(SIL_DLY_TIM1);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 1);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 2);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 3);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 4);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 5);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 10);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 20);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 50);
+
+	syslog(LOG_NOTICE, "-- for checking boundary conditions --");
+	test_dly_nse(SIL_DLY_TIM1 + 1);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 1 + 1);
+	test_dly_nse(SIL_DLY_TIM1 + SIL_DLY_TIM2 * 2 + 1);
+
+	test_finish();
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_dlynse.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_dlynse.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_dlynse.cfg	(revision 136)
@@ -0,0 +1,14 @@
+/*
+ *  @(#) $Id: test_dlynse.cfg 1572 2009-05-31 13:40:39Z ertl-hiro $
+ */
+
+/*
+ *  sil_dly_nseã«é¢ãããã¹ãã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "test_dlynse.h"
+CRE_TSK(MAIN_TASK, { TA_ACT, 0, main_task, MAIN_PRIORITY, STACK_SIZE, NULL });
Index: rtos_arduino/trunk/asp_1.9.2/test/test_dlynse.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_dlynse.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_dlynse.h	(revision 136)
@@ -0,0 +1,84 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006,2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: test_dlynse.h 329 2007-07-17 07:28:32Z hiro $
+ */
+
+/*
+ *		sil_dly_nseã«é¢ãããã¹ã
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define MAIN_PRIORITY	10
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	main_task(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/test/test_sem1.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_sem1.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_sem1.c	(revision 136)
@@ -0,0 +1,673 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008-2014 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_sem1.c 2606 2014-01-11 14:15:55Z ertl-hiro $
+ */
+
+/* 
+ *		ã»ããã©æ©è½ã®ãã¹ã(1)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  sig_semï¼wai_semï¼CRE_SEMãç¶²ç¾
+çã«ãã¹ãããï¼
+ *  ãã ãï¼CRE_SEMã®ã¨ã©ã¼ã®ãã¹ãã¯é¤ãï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *	(A) sig_semã®éçã¨ã©ã¼ã®ãã¹ã
+ *		(A-1) éã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®å¼åºã
+ *		(A-2) CPUã­ãã¯ç¶æ
+ããã®å¼åºã
+ *		(A-3) semidãä¸æ­£ï¼å°ããããï¼
+ *		(A-4) semidãä¸æ­£ï¼å¤§ããããï¼
+ *	(B) sig_semã«ããã»ããã©å¾
+ã¡ç¶æ
+ã®ã¿ã¹ã¯ãå¾
+ã¡è§£é¤ããã
+ *		(B-1) å¾
+ã¡è§£é¤ãããã¿ã¹ã¯ã«åãæãã
+ *		(B-2) ãã£ã¹ãããä¿çç¶æ
+ã§ï¼åãæãããªã
+ *		(B-3) å¾
+ã¡è§£é¤ãããã¿ã¹ã¯ãå¼·å¶å¾
+ã¡ç¶æ
+ã§ï¼åãæãããªã
+ *		(B-4) å¾
+ã¡è§£é¤ãããã¿ã¹ã¯ãåªå
+åº¦ãä½ãï¼åãæãããªã
+ *	(C) sig_semã«ããã»ããã©ã®è³æºæ°ã1å¢ãã
+ *		(C-1) ã»ããã©ã®è³æºæ°ã0ãã1ã«ãªã
+ *		(C-2) ã»ããã©ã®è³æºæ°ã1ãã2ã«ãªã
+ *	(D) sig_semãE_QOVRã¨ã©ã¼ã¨ãªã
+ *		(D-1) ã»ããã©ã®æå¤§è³æºæ°ã1ã®æ
+ *		(D-2) ã»ããã©ã®æå¤§è³æºæ°ã2ã®æ
+ *	(E) wai_semã®éçã¨ã©ã¼ã®ãã¹ã
+ *		(E-1) éã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®å¼åºã
+ *		(E-2) CPUã­ãã¯ç¶æ
+ããã®å¼åºã
+ *		(E-3) ãã£ã¹ãããç¦æ­¢ç¶æ
+ããã®å¼åºã
+ *		(E-4) å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ã§ãªãç¶æ
+ããã®å¼åºã
+ *		(E-5) semidãä¸æ­£ï¼å°ããããï¼
+ *		(E-6) semidãä¸æ­£ï¼å¤§ããããï¼
+ *	(F) wai_semã«ããã»ããã©ã®è³æºæ°ã1æ¸ã
+ *		(F-1) ã»ããã©ã®è³æºæ°ã1ãã0ã«ãªã
+ *		(F-2) ã»ããã©ã®è³æºæ°ã2ãã1ã«ãªã
+ *	(G) wai_semã«ããã»ããã©å¾
+ã¡ç¶æ
+ã«ãªã
+ *		(G-1) TA_TNULLå±æ§ã®ã»ããã©ã§ï¼å¾
+ã£ã¦ããã¿ã¹ã¯ããªãã£ãå ´å
+ *		(G-2) TA_TNULLå±æ§ã®ã»ããã©ã§ï¼å¾
+ã£ã¦ããã¿ã¹ã¯ããã£ãå ´å
+ *		(G-3) TA_TPRIå±æ§ã®ã»ããã©ã§ï¼å¾
+ã£ã¦ããã¿ã¹ã¯ããªãã£ãå ´å
+ *		(G-4) TA_TPRIå±æ§ã®ã»ããã©ã§ï¼åªå
+åº¦ãé«ãã¿ã¹ã¯ãå¾
+ã£ã¦ããå ´å
+ *		(G-5) TA_TPRIå±æ§ã®ã»ããã©ã§ï¼åªå
+åº¦ãåãã¿ã¹ã¯ãå¾
+ã£ã¦ããå ´å
+ *		(G-6) TA_TPRIå±æ§ã®ã»ããã©ã§ï¼åªå
+åº¦ãä½ãã¿ã¹ã¯ãå¾
+ã£ã¦ããå ´å
+ *	(H) ã»ããã©å¾
+ã¡ç¶æ
+ãå¼·å¶è§£é¤ããã
+ *	(I) ã»ããã©å¾
+ã¡ç¶æ
+ã®éã«ã»ããã©ãåæåããã
+ *	(J) ã»ããã©ã®è³æºæ°ã®åæå¤ãæ­£ããè¨­å®ããã
+ *		(J-1) ã»ããã©ã®è³æºæ°ã®åæå¤ã0
+ *		(J-2) ã»ããã©ã®è³æºæ°ã®åæå¤ã1
+ *		(J-3) ã»ããã©ã®è³æºæ°ã®åæå¤ã2
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: ä¸­åªå
+åº¦ã¿ã¹ã¯ï¼TA_ACTå±æ§
+ *	TASK2: é«åªå
+åº¦ã¿ã¹ã¯
+ *	TASK3: ä½åªå
+åº¦ã¿ã¹ã¯
+ *	TASK4: ä¸­åªå
+åº¦ã¿ã¹ã¯
+ *	TASK5: ä¸­åªå
+åº¦ã¿ã¹ã¯
+ *	ALM1:  ã¢ã©ã¼ã ãã³ãã©
+ *  SEM1:  TA_NULLå±æ§ï¼åæè³æºæ°1ï¼æå¤§è³æºæ°1
+ *  SEM2:  TA_NULLå±æ§ï¼åæè³æºæ°2ï¼æå¤§è³æºæ°2
+ *  SEM3:  TA_TPRIå±æ§ï¼åæè³æºæ°0ï¼æå¤§è³æºæ°1
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼åªå
+åº¦ï¼ä¸­ï¼==
+ *  1:	ref_sem(SEM1, &rsem)
+ *		assert(rsem.wtskid == TSK_NONE)
+ *		assert(rsem.semcnt == 1)			... (J-2)
+ *  	ref_sem(SEM2, &rsem)
+ *		assert(rsem.wtskid == TSK_NONE)
+ *		assert(rsem.semcnt == 2)			... (J-3)
+ *  	ref_sem(SEM3, &rsem)
+ *		assert(rsem.wtskid == TSK_NONE)
+ *		assert(rsem.semcnt == 0)			... (J-1)
+ *	2:	loc_cpu()
+ *		sig_sem(SEM1) -> E_CTX				... (A-2)
+ *		wai_sem(SEM1) -> E_CTX				... (E-2)
+ *		unl_cpu()
+ *		dis_dsp()
+ *		wai_sem(SEM1) -> E_CTX				... (E-3)
+ *		ena_dsp()
+ *		chg_ipm(TMAX_INTPRI)
+ *		wai_sem(SEM1) -> E_CTX				... (E-4)
+ *		chg_ipm(TIPM_ENAALL)
+ *		sig_sem(0) -> E_ID					... (A-3)
+ *		wai_sem(0) -> E_ID					... (E-5)
+ *		sig_sem(TNUM_SEMID+1) -> E_ID		... (A-4)
+ *		wai_sem(TNUM_SEMID+1) -> E_ID		... (E-6)
+ *	3:	act_tsk(TASK3)
+ *	4:	slp_tsk()
+ *	== TASK3ï¼åªå
+åº¦ï¼ä½ï¼==
+ *	5:	wai_sem(SEM1)						... (F-1)
+ *  6:	ref_sem(SEM1, &rsem)
+ *		assert(rsem.wtskid == TSK_NONE)
+ *		assert(rsem.semcnt == 0)
+ *	7:	sta_alm(ALM1, 10)
+ *	8:	wai_sem(SEM1)						... (G-1)
+ *	== ALM1 ==
+ *	9:	sig_sem(SEM1) -> E_CTX				... (A-1)
+ *		wai_sem(SEM1) -> E_CTX				... (E-1)
+ *	10:	iwup_tsk(TASK1)
+ *	11:	RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	12:	act_tsk(TASK2)
+ *	== TASK2ï¼åªå
+åº¦ï¼é«ï¼==
+ *	13:	wai_sem(SEM1)						... (G-2)
+ *	== TASK1ï¼ç¶ãï¼==
+ *  14:	ref_sem(SEM1, &rsem)
+ *		assert(rsem.wtskid == TASK3)
+ *		assert(rsem.semcnt == 0)
+ *	15:	sig_sem(SEM1)						... (B-4)
+ *	16:	sig_sem(SEM1)						... (B-1)
+ *	== TASK2ï¼ç¶ãï¼==
+ *	17:	wai_sem(SEM1)						... (G-1)
+ *	== TASK1ï¼ç¶ãï¼==
+ *	18: dis_dsp()
+ *	19:	sig_sem(SEM1)						... (B-2)
+ *	20:	ena_dsp()
+ *	== TASK2ï¼ç¶ãï¼==
+ *	21:	wai_sem(SEM1)						... (G-1)
+ *	== TASK1ï¼ç¶ãï¼==
+ *	22: sus_tsk(TASK2)
+ *	23:	sig_sem(SEM1)						... (B-3)
+ *	24: sig_sem(SEM1)						... (C-1)
+ *	25: sig_sem(SEM1) -> E_QOVR				... (D-1)
+ *  26:	ref_sem(SEM1, &rsem)
+ *		assert(rsem.wtskid == TSK_NONE)
+ *		assert(rsem.semcnt == 1)
+ *	27:	rsm_tsk(TASK2)
+ *	== TASK2ï¼ç¶ãï¼==
+ *	28:	wai_sem(SEM2)						... (F-2)
+ *  29:	ref_sem(SEM2, &rsem)
+ *		assert(rsem.wtskid == TSK_NONE)
+ *		assert(rsem.semcnt == 1)
+ *	30:	wai_sem(SEM2)						... (F-1)
+ *	31: wai_sem(SEM2)						... (G-1)
+ *	== TASK1ï¼ç¶ãï¼==
+ *	32:	sig_sem(SEM2)						... (B-1)
+ *	== TASK2ï¼ç¶ãï¼==
+ *	33:	wai_sem(SEM3)						... (G-3)
+ *	== TASK1ï¼ç¶ãï¼==
+ *	34:	sig_sem(SEM2)						... (C-1)
+ *	35:	sig_sem(SEM2)						... (C-2)
+ *  36:	ref_sem(SEM2, &rsem)
+ *		assert(rsem.wtskid == TSK_NONE)
+ *		assert(rsem.semcnt == 2)
+ *	37:	sig_sem(SEM2) -> E_QOVR				... (D-2)
+ *  38:	ref_sem(SEM2, &rsem)
+ *		assert(rsem.wtskid == TSK_NONE)
+ *		assert(rsem.semcnt == 2)
+ *	39:	tslp_tsk(10) -> E_TMOUT
+ *	== TASK3ï¼ç¶ãï¼==
+ *	40:	wai_sem(SEM3)						... (G-4)
+ *	== TASK1ï¼ç¶ãï¼==
+ *	41:	act_tsk(TASK4)
+ *	42:	act_tsk(TASK5)
+ *	43:	rot_rdq(TPRI_SELF)
+ *	== TASK4ï¼åªå
+åº¦ï¼ä¸­ï¼==
+ *	44:	wai_sem(SEM3)						... (G-6)
+ *	== TASK5ï¼åªå
+åº¦ï¼ä¸­ï¼==
+ *	45:	wai_sem(SEM3)						... (G-5)
+ *	== TASK1ï¼ç¶ãï¼==
+ *	46:	sig_sem(SEM3)						... (B-1)
+ *	== TASK2ï¼ç¶ãï¼==
+ *	47:	wai_sem(SEM1)
+ *		wai_sem(SEM1) -> E_RLWAI
+ *	== TASK1ï¼ç¶ãï¼==
+ *	48:	sig_sem(SEM3)						... (B-4)
+ *	49:	tslp_tsk(10) -> E_TMOUT
+ *	== TASK4ï¼ç¶ãï¼==
+ *	50:	ext_tsk() -> noreturn
+ *	== TASK1ï¼ç¶ãï¼==
+ *	51:	sig_sem(SEM3)						... (B-4)
+ *	52:	tslp_tsk(10) -> E_TMOUT
+ *	== TASK5ï¼ç¶ãï¼==
+ *	53:	ext_tsk() -> noreturn
+ *	== TASK1ï¼ç¶ãï¼==
+ *	54:	sig_sem(SEM3)						... (B-4)
+ *	55:	tslp_tsk(10) -> E_TMOUT
+ *	== TASK3ï¼ç¶ãï¼==
+ *	56:	ext_tsk() -> noreturn
+ *	== TASK1ï¼ç¶ãï¼==
+ *	57: rel_wai(TASK2)						... (H)
+ *	== TASK2ï¼ç¶ãï¼==
+ *	58:	wai_sem(SEM1) -> E_DLT
+ *	== TASK1ï¼ç¶ãï¼==
+ *	59: ini_sem(SEM1)						... (I)
+ *	== TASK2ï¼ç¶ãï¼==
+ *	60: ext_tsk() -> noreturn
+ *	== TASK1ï¼ç¶ãï¼==
+ *	61: END
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_sem1.h"
+
+/* DO NOT DELETE THIS LINE -- gentest depends on it. */
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(9);
+	ercd = sig_sem(SEM1);
+	check_ercd(ercd, E_CTX);
+
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_CTX);
+
+	check_point(10);
+	ercd = iwup_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(11);
+	return;
+
+	check_point(0);
+}
+
+void
+task1(intptr_t exinf)
+{
+	ER_UINT	ercd;
+	T_RSEM	rsem;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	ercd = ref_sem(SEM1, &rsem);
+	check_ercd(ercd, E_OK);
+
+	check_assert(rsem.wtskid == TSK_NONE);
+
+	check_assert(rsem.semcnt == 1);
+
+	ercd = ref_sem(SEM2, &rsem);
+	check_ercd(ercd, E_OK);
+
+	check_assert(rsem.wtskid == TSK_NONE);
+
+	check_assert(rsem.semcnt == 2);
+
+	ercd = ref_sem(SEM3, &rsem);
+	check_ercd(ercd, E_OK);
+
+	check_assert(rsem.wtskid == TSK_NONE);
+
+	check_assert(rsem.semcnt == 0);
+
+	check_point(2);
+	ercd = loc_cpu();
+	check_ercd(ercd, E_OK);
+
+	ercd = sig_sem(SEM1);
+	check_ercd(ercd, E_CTX);
+
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_CTX);
+
+	ercd = unl_cpu();
+	check_ercd(ercd, E_OK);
+
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_CTX);
+
+	ercd = ena_dsp();
+	check_ercd(ercd, E_OK);
+
+	ercd = chg_ipm(TMAX_INTPRI);
+	check_ercd(ercd, E_OK);
+
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_CTX);
+
+	ercd = chg_ipm(TIPM_ENAALL);
+	check_ercd(ercd, E_OK);
+
+	ercd = sig_sem(0);
+	check_ercd(ercd, E_ID);
+
+	ercd = wai_sem(0);
+	check_ercd(ercd, E_ID);
+
+	ercd = sig_sem(TNUM_SEMID+1);
+	check_ercd(ercd, E_ID);
+
+	ercd = wai_sem(TNUM_SEMID+1);
+	check_ercd(ercd, E_ID);
+
+	check_point(3);
+	ercd = act_tsk(TASK3);
+	check_ercd(ercd, E_OK);
+
+	check_point(4);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(12);
+	ercd = act_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+
+	check_point(14);
+	ercd = ref_sem(SEM1, &rsem);
+	check_ercd(ercd, E_OK);
+
+	check_assert(rsem.wtskid == TASK3);
+
+	check_assert(rsem.semcnt == 0);
+
+	check_point(15);
+	ercd = sig_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(16);
+	ercd = sig_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(18);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(19);
+	ercd = sig_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(20);
+	ercd = ena_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(22);
+	ercd = sus_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+
+	check_point(23);
+	ercd = sig_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(24);
+	ercd = sig_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(25);
+	ercd = sig_sem(SEM1);
+	check_ercd(ercd, E_QOVR);
+
+	check_point(26);
+	ercd = ref_sem(SEM1, &rsem);
+	check_ercd(ercd, E_OK);
+
+	check_assert(rsem.wtskid == TSK_NONE);
+
+	check_assert(rsem.semcnt == 1);
+
+	check_point(27);
+	ercd = rsm_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+
+	check_point(32);
+	ercd = sig_sem(SEM2);
+	check_ercd(ercd, E_OK);
+
+	check_point(34);
+	ercd = sig_sem(SEM2);
+	check_ercd(ercd, E_OK);
+
+	check_point(35);
+	ercd = sig_sem(SEM2);
+	check_ercd(ercd, E_OK);
+
+	check_point(36);
+	ercd = ref_sem(SEM2, &rsem);
+	check_ercd(ercd, E_OK);
+
+	check_assert(rsem.wtskid == TSK_NONE);
+
+	check_assert(rsem.semcnt == 2);
+
+	check_point(37);
+	ercd = sig_sem(SEM2);
+	check_ercd(ercd, E_QOVR);
+
+	check_point(38);
+	ercd = ref_sem(SEM2, &rsem);
+	check_ercd(ercd, E_OK);
+
+	check_assert(rsem.wtskid == TSK_NONE);
+
+	check_assert(rsem.semcnt == 2);
+
+	check_point(39);
+	ercd = tslp_tsk(10);
+	check_ercd(ercd, E_TMOUT);
+
+	check_point(41);
+	ercd = act_tsk(TASK4);
+	check_ercd(ercd, E_OK);
+
+	check_point(42);
+	ercd = act_tsk(TASK5);
+	check_ercd(ercd, E_OK);
+
+	check_point(43);
+	ercd = rot_rdq(TPRI_SELF);
+	check_ercd(ercd, E_OK);
+
+	check_point(46);
+	ercd = sig_sem(SEM3);
+	check_ercd(ercd, E_OK);
+
+	check_point(48);
+	ercd = sig_sem(SEM3);
+	check_ercd(ercd, E_OK);
+
+	check_point(49);
+	ercd = tslp_tsk(10);
+	check_ercd(ercd, E_TMOUT);
+
+	check_point(51);
+	ercd = sig_sem(SEM3);
+	check_ercd(ercd, E_OK);
+
+	check_point(52);
+	ercd = tslp_tsk(10);
+	check_ercd(ercd, E_TMOUT);
+
+	check_point(54);
+	ercd = sig_sem(SEM3);
+	check_ercd(ercd, E_OK);
+
+	check_point(55);
+	ercd = tslp_tsk(10);
+	check_ercd(ercd, E_TMOUT);
+
+	check_point(57);
+	ercd = rel_wai(TASK2);
+	check_ercd(ercd, E_OK);
+
+	check_point(59);
+	ercd = ini_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_finish(61);
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	ER_UINT	ercd;
+	T_RSEM	rsem;
+
+	check_point(13);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(17);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(21);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(28);
+	ercd = wai_sem(SEM2);
+	check_ercd(ercd, E_OK);
+
+	check_point(29);
+	ercd = ref_sem(SEM2, &rsem);
+	check_ercd(ercd, E_OK);
+
+	check_assert(rsem.wtskid == TSK_NONE);
+
+	check_assert(rsem.semcnt == 1);
+
+	check_point(30);
+	ercd = wai_sem(SEM2);
+	check_ercd(ercd, E_OK);
+
+	check_point(31);
+	ercd = wai_sem(SEM2);
+	check_ercd(ercd, E_OK);
+
+	check_point(33);
+	ercd = wai_sem(SEM3);
+	check_ercd(ercd, E_OK);
+
+	check_point(47);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_RLWAI);
+
+	check_point(58);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_DLT);
+
+	check_point(60);
+	ercd = ext_tsk();
+
+	check_point(0);
+}
+
+void
+task3(intptr_t exinf)
+{
+	ER_UINT	ercd;
+	T_RSEM	rsem;
+
+	check_point(5);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(6);
+	ercd = ref_sem(SEM1, &rsem);
+	check_ercd(ercd, E_OK);
+
+	check_assert(rsem.wtskid == TSK_NONE);
+
+	check_assert(rsem.semcnt == 0);
+
+	check_point(7);
+	ercd = sta_alm(ALM1, 10);
+	check_ercd(ercd, E_OK);
+
+	check_point(8);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(40);
+	ercd = wai_sem(SEM3);
+	check_ercd(ercd, E_OK);
+
+	check_point(56);
+	ercd = ext_tsk();
+
+	check_point(0);
+}
+
+void
+task4(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(44);
+	ercd = wai_sem(SEM3);
+	check_ercd(ercd, E_OK);
+
+	check_point(50);
+	ercd = ext_tsk();
+
+	check_point(0);
+}
+
+void
+task5(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(45);
+	ercd = wai_sem(SEM3);
+	check_ercd(ercd, E_OK);
+
+	check_point(53);
+	ercd = ext_tsk();
+
+	check_point(0);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_sem1.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_sem1.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_sem1.cfg	(revision 136)
@@ -0,0 +1,23 @@
+/*
+ *  @(#) $Id: test_sem1.cfg 1572 2009-05-31 13:40:39Z ertl-hiro $
+ */
+
+/*
+ *  ã»ããã©æ©è½ã®ãã¹ã(1)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "test_sem1.h"
+
+CRE_TSK(TASK1, { TA_ACT, 1, task1, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK2, { TA_NULL, 2, task2, HIGH_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK3, { TA_NULL, 3, task3, LOW_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK4, { TA_NULL, 4, task4, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK5, { TA_NULL, 5, task5, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_ALM(ALM1, { TA_NULL, 1, alarm1_handler });
+CRE_SEM(SEM1, { TA_NULL, 1, 1 });
+CRE_SEM(SEM2, { TA_NULL, 2, 2 });
+CRE_SEM(SEM3, { TA_TPRI, 0, 1 });
Index: rtos_arduino/trunk/asp_1.9.2/test/test_sem1.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_sem1.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_sem1.h	(revision 136)
@@ -0,0 +1,94 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: test_sem1.h 1232 2008-08-09 13:30:32Z ertl-hiro $
+ */
+
+/* 
+ *		ã»ããã©æ©è½ã®ãã¹ã(1)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åªå
+åº¦ã®å®ç¾©
+ */
+#define HIGH_PRIORITY	9		/* é«åªå
+åº¦ */
+#define MID_PRIORITY	10		/* ä¸­åªå
+åº¦ */
+#define LOW_PRIORITY	11		/* ä½åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	task1(intptr_t exinf);
+extern void	task2(intptr_t exinf);
+extern void	task3(intptr_t exinf);
+extern void	task4(intptr_t exinf);
+extern void	task5(intptr_t exinf);
+extern void	alarm1_handler(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/test/test_sem2.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_sem2.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_sem2.c	(revision 136)
@@ -0,0 +1,522 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_sem2.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		ã»ããã©æ©è½ã®ãã¹ã(2)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  isig_semãï¼sig_semã¨ã®éããä¸­å¿ã«ãã¹ãããï¼
+ *  pol_semï¼twai_semãï¼wai_semã¨ã®éããä¸­å¿ã«ãã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *	(A) isig_semã®éçã¨ã©ã¼ã®ãã¹ã
+ *		(A-1) ã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®å¼åºã
+ *		(A-2) CPUã­ãã¯ç¶æ
+ããã®å¼åºã
+ *	(B) isig_semã«ããã»ããã©å¾
+ã¡ç¶æ
+ã®ã¿ã¹ã¯ãå¾
+ã¡è§£é¤ããã
+ *		(B-1) ã¢ã¤ãã«ç¶æ
+ããï¼å¾
+ã¡è§£é¤ãããã¿ã¹ã¯ã«åãæãã
+ *		(B-2) å®è¡ç¶æ
+ã®ã¿ã¹ã¯ããï¼å¾
+ã¡è§£é¤ãããã¿ã¹ã¯ã«åãæãã
+ *		(B-3) ãã£ã¹ãããä¿çç¶æ
+ã§ï¼åãæãããªã
+ *		(B-4) å¾
+ã¡è§£é¤ãããã¿ã¹ã¯ãå¼·å¶å¾
+ã¡ç¶æ
+ã§ï¼åãæãããªã
+ *		(B-5) å¾
+ã¡è§£é¤ãããã¿ã¹ã¯ãåªå
+åº¦ãä½ãï¼åãæãããªã
+ *	(C) pol_semã®éçã¨ã©ã¼ã®ãã¹ã
+ *		(C-1) éã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®å¼åºã
+ *		(C-2) CPUã­ãã¯ç¶æ
+ããã®å¼åºã
+ *		(C-3) ãã£ã¹ãããç¦æ­¢ç¶æ
+ããã®å¼åºãï¼E_CTXã¨ã©ã¼ã«ãªããªãï¼
+ *		(C-4) å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ã§ãªãç¶æ
+ããã®å¼åºãï¼E_CTXã¨ã©ã¼
+ *		      ã«ãªããªãï¼
+ *	(D) pol_semã§ãã¼ãªã³ã°å¤±æãã
+ *	(E) twai_semã®éçã¨ã©ã¼ã®ãã¹ã
+ *		(E-1) éã¿ã¹ã¯ã³ã³ãã­ã¹ãããã®å¼åºã
+ *		(E-2) CPUã­ãã¯ç¶æ
+ããã®å¼åºã
+ *		(E-3) ãã£ã¹ãããç¦æ­¢ç¶æ
+ããã®å¼åºã
+ *		(E-4) å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ã§ãªãç¶æ
+ããã®å¼åºã
+ *		(E-5) tmoutãä¸æ­£
+ *	(F) twai_semã§tmout=TMO_POLã®æã«ãã¼ãªã³ã°å¤±æãã
+ *	(G) twai_semã§tmout=TMO_FEVRã®æã«ã»ããã©å¾
+ã¡ç¶æ
+ã«ãªã
+ *	(H) twai_semã§tmoutã«ã¿ã¤ã ã¢ã¦ããè¨­å®ããæã«ï¼ã¿ã¤ã ã¢ã¦ãä»ãã®
+ *		ã»ããã©å¾
+ã¡ç¶æ
+ã«ãªã
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: ä¸­åªå
+åº¦ã¿ã¹ã¯ï¼TA_ACTå±æ§
+ *	TASK2: é«åªå
+åº¦ã¿ã¹ã¯
+ *	TASK3: ä½åªå
+åº¦ã¿ã¹ã¯
+ *	TASK4: ä¸­åªå
+åº¦ã¿ã¹ã¯
+ *	TASK5: ä¸­åªå
+åº¦ã¿ã¹ã¯
+ *	ALM1:  ã¢ã©ã¼ã ãã³ãã©
+ *  SEM1:  TA_NULLå±æ§ï¼åæè³æºæ°1ï¼æå¤§è³æºæ°1
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼åªå
+åº¦ï¼ä¸­ï¼==
+ *  1:	isig_sem(SEM1) -> E_CTX				... (A-1)
+ *	2:	loc_cpu()
+ *		pol_sem(SEM1) -> E_CTX				... (C-2)
+ *		twai_sem(SEM1, TMO_POL) -> E_CTX	... (E-2)
+ *		unl_cpu()
+ *	3:	dis_dsp()
+ *		pol_sem(SEM1)						... (C-3)
+ *		twai_sem(SEM1, TMO_POL) -> E_CTX	... (E-3)
+ *		ena_dsp()
+ *	4:	chg_ipm(TMAX_INTPRI)
+ *		pol_sem(SEM1) -> E_TMOUT			... (C-4)(D)
+ *		twai_sem(SEM1, TMO_POL) -> E_CTX	... (E-4)
+ *		chg_ipm(TIPM_ENAALL)
+ *	5:	twai_sem(SEM1, -2) -> E_PAR			... (E-5)
+ *		twai_sem(SEM1, TMO_POL) -> E_TMOUT	... (F)
+ *	6:	sta_alm(ALM1, 10)
+ *	7:	twai_sem(SEM1, TMO_FEVR)			... (G)
+ *	== ALM1-1 ==
+ *	8:	pol_sem(SEM1) -> E_CTX				... (C-1)
+ *		twai_sem(SEM1, TMO_POL) -> E_CTX	... (E-1)
+ *	9:	iloc_cpu()
+ *		isig_sem(SEM1) -> E_CTX				... (A-2)
+ *		iunl_cpu()
+ *	10:	isig_sem(SEM1)						... (B-1)
+ *		RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	11:	act_tsk(TASK3)
+ *	12:	wai_sem(SEM1)
+ *	== TASK3ï¼åªå
+åº¦ï¼ä½ï¼==
+ *	13:	sta_alm(ALM1, 10)
+ *		call(wait_var())
+ *	== ALM1-2 ==
+ *	14:	isig_sem(SEM1)						... (B-2)
+ *		call(signal_var())
+ *		RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	15:	wai_sem(SEM1)
+ *	== TASK3ï¼ç¶ãï¼==
+ *	16:	sta_alm(ALM1, 10)
+ *		dis_dsp()
+ *		call(wait_var())
+ *	== ALM1-3 ==
+ *	17:	isig_sem(SEM1)						... (B-3)
+ *		call(signal_var())
+ *		RETURN
+ *	== TASK3ï¼ç¶ãï¼==
+ *	18:	ena_dsp()
+ *	== TASK1ï¼ç¶ãï¼==
+ *	19:	wai_sem(SEM1)
+ *	== TASK3ï¼ç¶ãï¼==
+ *	20:	sta_alm(ALM1, 10)
+ *		sus_tsk(TASK1)
+ *		call(wait_var())
+ *	== ALM1-4 ==
+ *	21:	isig_sem(SEM1)						... (B-4)
+ *		call(signal_var())
+ *		RETURN
+ *	== TASK3ï¼ç¶ãï¼==
+ *	22:	rsm_tsk(TASK1)
+ *	== TASK1ï¼ç¶ãï¼==
+ *	23:	act_tsk(TASK2)
+ *	== TASK2ï¼åªå
+åº¦ï¼é«ï¼==
+ *	24:	tslp_tsk(10) -> E_TMOUT
+ *	== TASK1ï¼ç¶ãï¼==
+ *	25:	wai_sem(SEM1)
+ *	== TASK3ï¼ç¶ãï¼==
+ *	26:	ext_tsk() -> noreturn
+ *	== TASK2ï¼ç¶ãï¼==
+ *	27:	sta_alm(ALM1, 10)
+ *		call(wait_var())
+ *	== ALM1-5 ==
+ *	28:	isig_sem(SEM1)						... (B-5)
+ *		call(signal_var())
+ *		RETURN
+ *	== TASK2ï¼ç¶ãï¼==
+ *	29:	ext_tsk() -> noreturn
+ *	== TASK1ï¼ç¶ãï¼==
+ *	30:	sta_alm(ALM1, 10)
+ *	31:	twai_sem(SEM1, 100) -> E_RLWAI
+ *	== ALM1-6 ==
+ *	32:	irel_wai(TASK1)
+ *		RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	33:	sta_alm(ALM1, 100)
+ *	34:	twai_sem(SEM1, 10) -> E_TMOUT		... (H)
+ *	35:	stp_alm(ALM1)
+ *	36:	END
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_sem2.h"
+
+static volatile bool_t	flagvar;
+
+static void
+wait_var(void)
+{
+	flagvar = false;
+	while (!flagvar);
+}
+
+static void
+signal_var(void)
+{
+	flagvar = true;
+}
+
+/* DO NOT DELETE THIS LINE -- gentest depends on it. */
+
+static uint_t	alarm1_count = 0;
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	switch (++alarm1_count) {
+	case 1:
+		check_point(8);
+		ercd = pol_sem(SEM1);
+		check_ercd(ercd, E_CTX);
+
+		ercd = twai_sem(SEM1, TMO_POL);
+		check_ercd(ercd, E_CTX);
+
+		check_point(9);
+		ercd = iloc_cpu();
+		check_ercd(ercd, E_OK);
+
+		ercd = isig_sem(SEM1);
+		check_ercd(ercd, E_CTX);
+
+		ercd = iunl_cpu();
+		check_ercd(ercd, E_OK);
+
+		check_point(10);
+		ercd = isig_sem(SEM1);
+		check_ercd(ercd, E_OK);
+
+		return;
+
+		check_point(0);
+
+	case 2:
+		check_point(14);
+		ercd = isig_sem(SEM1);
+		check_ercd(ercd, E_OK);
+
+		signal_var();
+
+		return;
+
+		check_point(0);
+
+	case 3:
+		check_point(17);
+		ercd = isig_sem(SEM1);
+		check_ercd(ercd, E_OK);
+
+		signal_var();
+
+		return;
+
+		check_point(0);
+
+	case 4:
+		check_point(21);
+		ercd = isig_sem(SEM1);
+		check_ercd(ercd, E_OK);
+
+		signal_var();
+
+		return;
+
+		check_point(0);
+
+	case 5:
+		check_point(28);
+		ercd = isig_sem(SEM1);
+		check_ercd(ercd, E_OK);
+
+		signal_var();
+
+		return;
+
+		check_point(0);
+
+	case 6:
+		check_point(32);
+		ercd = irel_wai(TASK1);
+		check_ercd(ercd, E_OK);
+
+		return;
+
+		check_point(0);
+
+	default:
+		check_point(0);
+	}
+	check_point(0);
+}
+
+void
+task1(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	ercd = isig_sem(SEM1);
+	check_ercd(ercd, E_CTX);
+
+	check_point(2);
+	ercd = loc_cpu();
+	check_ercd(ercd, E_OK);
+
+	ercd = pol_sem(SEM1);
+	check_ercd(ercd, E_CTX);
+
+	ercd = twai_sem(SEM1, TMO_POL);
+	check_ercd(ercd, E_CTX);
+
+	ercd = unl_cpu();
+	check_ercd(ercd, E_OK);
+
+	check_point(3);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+
+	ercd = pol_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	ercd = twai_sem(SEM1, TMO_POL);
+	check_ercd(ercd, E_CTX);
+
+	ercd = ena_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(4);
+	ercd = chg_ipm(TMAX_INTPRI);
+	check_ercd(ercd, E_OK);
+
+	ercd = pol_sem(SEM1);
+	check_ercd(ercd, E_TMOUT);
+
+	ercd = twai_sem(SEM1, TMO_POL);
+	check_ercd(ercd, E_CTX);
+
+	ercd = chg_ipm(TIPM_ENAALL);
+	check_ercd(ercd, E_OK);
+
+	check_point(5);
+	ercd = twai_sem(SEM1, -2);
+	check_ercd(ercd, E_PAR);
+
+	ercd = twai_sem(SEM1, TMO_POL);
+	check_ercd(ercd, E_TMOUT);
+
+	check_point(6);
+	ercd = sta_alm(ALM1, 10);
+	check_ercd(ercd, E_OK);
+
+	check_point(7);
+	ercd = twai_sem(SEM1, TMO_FEVR);
+	check_ercd(ercd, E_OK);
+
+	check_point(11);
+	ercd = act_tsk(TASK3);
+	check_ercd(ercd, E_OK);
+
+	check_point(12);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(15);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(19);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(23);
+	ercd = act_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+
+	check_point(25);
+	ercd = wai_sem(SEM1);
+	check_ercd(ercd, E_OK);
+
+	check_point(30);
+	ercd = sta_alm(ALM1, 10);
+	check_ercd(ercd, E_OK);
+
+	check_point(31);
+	ercd = twai_sem(SEM1, 100);
+	check_ercd(ercd, E_RLWAI);
+
+	check_point(33);
+	ercd = sta_alm(ALM1, 100);
+	check_ercd(ercd, E_OK);
+
+	check_point(34);
+	ercd = twai_sem(SEM1, 10);
+	check_ercd(ercd, E_TMOUT);
+
+	check_point(35);
+	ercd = stp_alm(ALM1);
+	check_ercd(ercd, E_OK);
+
+	check_finish(36);
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(24);
+	ercd = tslp_tsk(10);
+	check_ercd(ercd, E_TMOUT);
+
+	check_point(27);
+	ercd = sta_alm(ALM1, 10);
+	check_ercd(ercd, E_OK);
+
+	wait_var();
+
+	check_point(29);
+	ercd = ext_tsk();
+
+	check_point(0);
+}
+
+void
+task3(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(13);
+	ercd = sta_alm(ALM1, 10);
+	check_ercd(ercd, E_OK);
+
+	wait_var();
+
+	check_point(16);
+	ercd = sta_alm(ALM1, 10);
+	check_ercd(ercd, E_OK);
+
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+
+	wait_var();
+
+	check_point(18);
+	ercd = ena_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(20);
+	ercd = sta_alm(ALM1, 10);
+	check_ercd(ercd, E_OK);
+
+	ercd = sus_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	wait_var();
+
+	check_point(22);
+	ercd = rsm_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(26);
+	ercd = ext_tsk();
+
+	check_point(0);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_sem2.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_sem2.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_sem2.cfg	(revision 136)
@@ -0,0 +1,20 @@
+/*
+ *  @(#) $Id: test_sem2.cfg 1572 2009-05-31 13:40:39Z ertl-hiro $
+ */
+
+/*
+ *  ã»ããã©æ©è½ã®ãã¹ã(2)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "test_sem2.h"
+
+CRE_TSK(TASK1, { TA_ACT, 1, task1, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK2, { TA_NULL, 2, task2, HIGH_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK3, { TA_NULL, 3, task3, LOW_PRIORITY, STACK_SIZE, NULL });
+CRE_ALM(ALM1, { TA_NULL, 1, alarm1_handler });
+CRE_SEM(SEM1, { TA_NULL, 1, 1 });
+CRE_SEM(SEM2, { TA_TPRI, 0, 1 });
Index: rtos_arduino/trunk/asp_1.9.2/test/test_sem2.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_sem2.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_sem2.h	(revision 136)
@@ -0,0 +1,92 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2008 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: test_sem2.h 1390 2008-11-23 14:24:08Z ertl-hiro $
+ */
+
+/* 
+ *		ã»ããã©æ©è½ã®ãã¹ã(2)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åªå
+åº¦ã®å®ç¾©
+ */
+#define HIGH_PRIORITY	9		/* é«åªå
+åº¦ */
+#define MID_PRIORITY	10		/* ä¸­åªå
+åº¦ */
+#define LOW_PRIORITY	11		/* ä½åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	task1(intptr_t exinf);
+extern void	task2(intptr_t exinf);
+extern void	task3(intptr_t exinf);
+extern void	alarm1_handler(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/test/test_sysstat1.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_sysstat1.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_sysstat1.c	(revision 136)
@@ -0,0 +1,278 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_sysstat1.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		ã·ã¹ãã ç¶æ
+ã«é¢ãããã¹ã(1)
+ *
+ *  ãã¹ãã·ã¼ã±ã³ã¹ï¼
+ *
+ *	== TASK1ï¼åªå
+åº¦ï¼10ï¼==
+ *	1:	åæç¶æ
+ã®ãã§ãã¯
+ *	2:	loc_cpu() ... ã·ã¹ãã ç¶æ
+ãã©ã³ãã ã«å¤åããã
+ *		chg_ipm(TMAX_INTPRI) -> E_CTX
+ *	3:	unl_cpu()
+ *	4:	chg_ipm(TMAX_INTPRI)
+ *	5:	dis_dsp()
+ *	6:	ena_tex()
+ *	7:	chg_ipm(TIPM_ENAALL)
+ *	8:	ena_dsp()
+ *	9:	dis_tex()
+ *	10:	dis_dsp() ... ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå¼ã³åºãæºå
+ *		ena_tex()
+ *	11:	ras_tex(TSK_SELF, 0x0001)
+ *	== TASK1ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ï¼1åç®ï¼==
+ *	12:	åæç¶æ
+ã®ãã§ãã¯
+ *	13:	ena_dsp() ... 3ã¤ã®ç¶æ
+ãå¤åããï¼ãªã¿ã¼ã³ã§å
+ã«ãã©ããèª¿ã¹ã
+ *		chg_ipm(TMIN_INTPRI)
+ *		ena_tex()
+ *		ãªã¿ã¼ã³
+ *	== TASK1ï¼ç¶ãï¼==
+ *	14:	æ»ã£ã¦ããç¶æ
+ã®ãã§ãã¯
+ *	15:	loc_cpu() ... CPUã­ãã¯ç¶æ
+ã®ã¾ã¾ã¿ã¹ã¯ãçµäºããã
+ *	16:	ãªã¿ã¼ã³ï¼ï¼ã¿ã¹ã¯çµäºï¼
+ *	== TASK2ï¼åªå
+åº¦ï¼10ï¼	==
+ *	17:	åæç¶æ
+ã®ãã§ãã¯
+ *	18:	çµäº
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_sysstat1.h"
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	ER		ercd;
+
+	switch (texptn) {
+	case 0x0001:
+		check_point(12);
+		check_state(false, false, TIPM_ENAALL, true, true, true);
+
+		/*
+		 *  ãã£ã¹ãããè¨±å¯ï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å¤æ´ï¼ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯
+		 */
+		check_point(13);
+		ercd = ena_dsp();
+		check_ercd(ercd, E_OK);
+		ercd = chg_ipm(TMIN_INTPRI);
+		check_ercd(ercd, E_OK);
+		ercd = ena_tex();
+		check_ercd(ercd, E_OK);
+		check_state(false, false, TMIN_INTPRI, false, true, false);
+		break;
+
+	default:
+		check_point(0);
+		break;
+	}
+}
+
+void
+task1(intptr_t exinf)
+{
+	ER		ercd;
+
+	test_start(__FILE__);
+
+	/*
+	 *  åæç¶æ
+ã®ãã§ãã¯
+	 */
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	/*
+	 *  CPUã­ãã¯ç¶æ
+ã®ãã§ãã¯
+	 */
+	check_point(2);
+	ercd = loc_cpu();
+	check_ercd(ercd, E_OK);
+	check_state(false, true, TIPM_ENAALL, false, true, true);
+
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å¤æ´ã®ãã§ãã¯
+	 */
+	ercd = chg_ipm(TMAX_INTPRI);
+	check_ercd(ercd, E_CTX);
+	check_state(false, true, TIPM_ENAALL, false, true, true);
+
+	/*
+	 *  CPUã­ãã¯è§£é¤ã®ãã§ãã¯
+	 */
+	check_point(3);
+	ercd = unl_cpu();
+	check_ercd(ercd, E_OK);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å¤æ´ã®ãã§ãã¯
+	 */
+	check_point(4);
+	ercd = chg_ipm(TMAX_INTPRI);
+	check_ercd(ercd, E_OK);
+	check_state(false, false, TMAX_INTPRI, false, true, true);
+
+	/*
+	 *  ãã£ã¹ãããç¦æ­¢ã®ãã§ãã¯
+	 */
+	check_point(5);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+	check_state(false, false, TMAX_INTPRI, true, true, true);
+
+	/*
+	 *  ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ã®ãã§ãã¯
+	 */
+	check_point(6);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+	check_state(false, false, TMAX_INTPRI, true, true, false);
+
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ã®ãã§ãã¯
+	 */
+	check_point(7);
+	ercd = chg_ipm(TIPM_ENAALL);
+	check_ercd(ercd, E_OK);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+
+	/*
+	 *  ãã£ã¹ãããè¨±å¯ã®ãã§ãã¯
+	 */
+	check_point(8);
+	ercd = ena_dsp();
+	check_ercd(ercd, E_OK);
+	check_state(false, false, TIPM_ENAALL, false, false, false);
+
+	/*
+	 *  ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢ã®ãã§ãã¯
+	 */
+	check_point(9);
+	ercd = dis_tex();
+	check_ercd(ercd, E_OK);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	/*
+	 *  ãã£ã¹ãããç¦æ­¢ï¼ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯
+	 */
+	check_point(10);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+
+	/*
+	 *  ã¿ã¹ã¯ä¾å¤å¦çãè¦æ±
+	 */
+	check_point(11);
+	ercd = ras_tex(TSK_SELF, 0x0001);
+	/* ããã§ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãåä½ãã */
+	check_ercd(ercd, E_OK);
+
+	/*
+	 *  ã¿ã¹ã¯ä¾å¤å¦çããã®ãªã¿ã¼ã³ã«ããå
+ã®ç¶æ
+ã«æ»ã£ã¦ãããã¨ã
+	 *  ãã§ãã¯
+	 */
+	check_point(14);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+
+	/*
+	 *  CPUã­ãã¯ç¶æ
+ã«
+	 */
+	check_point(15);
+	ercd = loc_cpu();
+	check_ercd(ercd, E_OK);
+
+	/*
+	 *  ãã®ã¾ã¾ã¿ã¹ã¯çµäº
+	 */
+	check_point(16);
+}
+
+void
+task2(intptr_t exinf)
+{
+	/*
+	 *  åæç¶æ
+ã®ãã§ãã¯
+	 */
+	check_point(17);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	check_finish(18);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_sysstat1.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_sysstat1.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_sysstat1.cfg	(revision 136)
@@ -0,0 +1,19 @@
+/*
+ *  @(#) $Id: test_sysstat1.cfg 1572 2009-05-31 13:40:39Z ertl-hiro $
+ */
+
+/*
+ *  ã·ã¹ãã ç¶æ
+ã«é¢ãããã¹ã(1)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "test_sysstat1.h"
+
+CRE_TSK(TASK1, { TA_ACT, 1, task1, TASK1_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK1, { TA_NULL, tex_task1 });
+
+CRE_TSK(TASK2, { TA_ACT, 2, task2, TASK2_PRIORITY, STACK_SIZE, NULL });
Index: rtos_arduino/trunk/asp_1.9.2/test/test_sysstat1.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_sysstat1.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_sysstat1.h	(revision 136)
@@ -0,0 +1,91 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006,2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: test_sysstat1.h 329 2007-07-17 07:28:32Z hiro $
+ */
+
+/* 
+ *		ã·ã¹ãã ç¶æ
+ã«é¢ãããã¹ã(1)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define TASK1_PRIORITY	10		/* ã¿ã¹ã¯1ã®åªå
+åº¦ */
+#define TASK2_PRIORITY	10		/* ã¿ã¹ã¯2ã®åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	tex_task1(TEXPTN texptn, intptr_t exinf);
+extern void	task1(intptr_t exinf);
+
+extern void	task2(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/test/test_task1.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_task1.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_task1.c	(revision 136)
@@ -0,0 +1,448 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_task1.c 2534 2013-10-13 12:27:37Z ertl-hiro $
+ */
+
+/* 
+ *		ã¿ã¹ã¯ç®¡çã¢ã¸ã¥ã¼ã«ã®ãã¹ã(1)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  make_runnableã¨make_non_runnableãç¶²ç¾
+çã«ãã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *	(A) å®è¡ç¶æ
+ã®ã¿ã¹ã¯ãããé«ãåªå
+åº¦ã®ã¿ã¹ã¯ãå®è¡ã§ããç¶æ
+ã«ãã
+ *		(A-1) ãã£ã¹ãããä¿çç¶æ
+ã§ã¯ãªãå ´å
+ *		(A-2) ãã£ã¹ãããä¿çç¶æ
+ã®å ´å
+ *	(B) å®è¡ç¶æ
+ã®ã¿ã¹ã¯ã¨åãåªå
+åº¦ã®ã¿ã¹ã¯ãå®è¡ã§ããç¶æ
+ã«ãã
+ *		ï¼åãåªå
+åº¦ã®ã¿ã¹ã¯ã®ä¸­ã®æ«å°¾ã«å
+¥ããã¨ãç¢ºèªãã
+ *	(C) å®è¡ç¶æ
+ã®ã¿ã¹ã¯ãããä½ãåªå
+åº¦ã®ã¿ã¹ã¯ãå®è¡ã§ããç¶æ
+ã«ãã
+ *		ï¼åãåªå
+åº¦ã®ã¿ã¹ã¯ã®ä¸­ã®æ«å°¾ã«å
+¥ããã¨ãç¢ºèªãã
+ *	(D) å®è¡ã§ããç¶æ
+ã®ã¿ã¹ã¯ããªãç¶æ
+ã§ï¼ã¿ã¹ã¯ãå®è¡ã§ããç¶æ
+ã«ãã
+ *		ï¼ãã®å ´åã¯ï¼ãã£ã¹ãããä¿çç¶æ
+ã§ã¯ãªã
+ *	(E) ãã£ã¹ãããä¿çç¶æ
+ã§ï¼å®è¡ç¶æ
+ã«ãªãã¹ãã ãå®è¡å¯è½ç¶æ
+ã¿ã¹
+ *		ã¯ãããé«ãåªå
+åº¦ã®ã¿ã¹ã¯ãï¼å®è¡ã§ããç¶æ
+ã«ãã
+ *	(F) ãã£ã¹ãããä¿çç¶æ
+ã§ï¼å®è¡ç¶æ
+ã«ãªãã¹ãã ãå®è¡å¯è½ç¶æ
+ã¿ã¹
+ *		ã¯ã¨åãåªå
+åº¦ã®ã¿ã¹ã¯ãï¼å®è¡ã§ããç¶æ
+ã«ãã
+ *	(G) ãã£ã¹ãããä¿çç¶æ
+ã§ï¼å®è¡ç¶æ
+ã«ãªãã¹ãã ãå®è¡å¯è½ç¶æ
+ã¿ã¹
+ *		ã¯ãããä½ãåªå
+åº¦ã®ã¿ã¹ã¯ãï¼å®è¡ã§ããç¶æ
+ã«ãã
+ *	(H) å®è¡ç¶æ
+ã®ã¿ã¹ã¯ãï¼å®è¡ã§ããç¶æ
+ã§ãªãã
+ *		(H-1) å®è¡ã§ããç¶æ
+ã®ã¿ã¹ã¯ããªããªãå ´å
+ *		(H-2) åä¸åªå
+åº¦ã®ã¿ã¹ã¯ããªããªãå ´å
+ *		(H-3) åä¸åªå
+åº¦ã®ã¿ã¹ã¯ããªããªããªãå ´å
+ *	(I) å®è¡å¯è½ç¶æ
+ã®ã¿ã¹ã¯ãï¼å®è¡ã§ããç¶æ
+ã§ãªãã
+ *		(I-1) åä¸åªå
+åº¦ã®ã¿ã¹ã¯ããªããªãå ´å
+ *		(I-2) åä¸åªå
+åº¦ã®ã¿ã¹ã¯ããªããªããªãå ´å
+ *	(J) ãã£ã¹ãããä¿çç¶æ
+ã§ï¼å®è¡ç¶æ
+ã«ãªãã¹ãã ãå®è¡å¯è½ç¶æ
+ã¨ãªã£
+ *		ã¦ããã¿ã¹ã¯ãï¼å®è¡ã§ããç¶æ
+ã§ãªãã
+ *		(J-1) åä¸åªå
+åº¦ã®ã¿ã¹ã¯ããªããªãå ´å
+ *		(J-2) åä¸åªå
+åº¦ã®ã¿ã¹ã¯ããªããªããªãå ´å
+ *	(K) ãã£ã¹ãããä¿çç¶æ
+ã§ï¼å®è¡å¯è½ç¶æ
+ã«ãªãã¹ãã ãå®è¡ç¶æ
+ã®ã¿
+ *		ã¹ã¯ãï¼å®è¡ã§ããç¶æ
+ã§ãªãã
+ *		ï¼ãã£ã¹ãããä¿çã§ã¯ï¼å®è¡ç¶æ
+ã®ã¿ã¹ã¯ãå®è¡ã§ããç¶æ
+ã§ãªã
+ *		ãªããããªé·ç§»ãèµ·ãããã¨ãã§ããªãããï¼ãã®ç¶æ³ã¯èµ·ãããªãï¼
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: ä¸­åªå
+åº¦ã¿ã¹ã¯ï¼ã¡ã¤ã³ã¿ã¹ã¯ï¼æåããèµ·å
+ *	TASK2: é«åªå
+åº¦ã¿ã¹ã¯
+ *	TASK3: ä¸­åªå
+åº¦ã¿ã¹ã¯
+ *	TASK4: ä¸­åªå
+åº¦ã¿ã¹ã¯
+ *	TASK5: ä½åªå
+åº¦ã¿ã¹ã¯
+ *	TASK6: ä½åªå
+åº¦ã¿ã¹ã¯
+ *	ALM1:  ã¢ã©ã¼ã ãã³ãã©
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼åªå
+åº¦ï¼ä¸­ï¼==
+ *	1:	act_tsk(TASK2)					... (A-1)
+ *	== TASK2ï¼åªå
+åº¦ï¼é«ï¼==
+ *	2:	slp_tsk()						... (H-2)
+ *	== TASK1ï¼ç¶ãï¼==
+ *	3:	act_tsk(TASK3)					... (B)
+ *	4:	act_tsk(TASK4)					... (B)
+ *	5:	slp_tsk()						... (H-3)
+ *	== TASK3ï¼åªå
+åº¦ï¼ä¸­ï¼==
+ *	6:	slp_tsk()						... (H-3)
+ *	== TASK4ï¼åªå
+åº¦ï¼ä¸­ï¼==
+ *	7:	wup_tsk(TASK1)
+ *	8:	slp_tsk()						... (H-3)
+ *	== TASK1ï¼ç¶ãï¼==
+ *	9:	act_tsk(TASK5)					... (C)
+ *	10:	act_tsk(TASK6)					... (C)
+ *	11:	sus_tsk(TASK6)					... (I-2)
+ *	12:	sus_tsk(TASK5)					... (I-1)
+ *	13:	rsm_tsk(TASK5)					... (C)
+ *	14:	rsm_tsk(TASK6)					... (C)
+ *	15:	slp_tsk()						... (H-2)
+ *	== TASK5ï¼åªå
+åº¦ï¼ä½ï¼==
+ *	16:	slp_tsk()						... (H-3)
+ *	== TASK6ï¼åªå
+åº¦ï¼ä½ï¼==
+ *	17:	dis_dsp()
+ *	18:	wup_tsk(TASK1)					... (A-2)
+ *	19:	wup_tsk(TASK2)					... (E)
+ *	20:	sus_tsk(TASK2)					... (J-1)
+ *	21:	wup_tsk(TASK3)					... (F)
+ *	22:	wup_tsk(TASK4)					... (F)
+ *	23:	sus_tsk(TASK1)					... (J-2)
+ *	24:	ena_dsp()
+ *	== TASK3ï¼ç¶ãï¼==
+ *	25:	slp_tsk()						... (H-3)
+ *	== TASK4ï¼ç¶ãï¼==
+ *	26:	slp_tsk()						... (H-2)
+ *	== TASK6ï¼ç¶ãï¼==
+ *	27:	dis_dsp()
+ *	28:	rsm_tsk(TASK1)					... (A-2)
+ *	29:	wup_tsk(TASK5)					... (G)
+ *	30:	ena_dsp()
+ *	== TASK1ï¼ç¶ãï¼==
+ *	31:	slp_tsk()						... (H-2)
+ *	== TASK6ï¼ç¶ãï¼==
+ *	32:	slp_tsk()						... (H-3)
+ *	== TASK5ï¼ç¶ãï¼==
+ *	33:	sta_alm(ALM1, 10)
+ *	34:	slp_tsk()						... (H-1)
+ *	== ALM1 ==
+ *	35:	iget_tid(&tskid)
+ *		assert(tskid == TSK_NONE)
+ *	36:	iwup_tsk(TASK1)					... (D)
+ *	37:	RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	38: END
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_task1.h"
+
+/* DO NOT DELETE THIS LINE -- gentest depends on it. */
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	ID		tskid;
+	ER_UINT	ercd;
+
+	check_point(35);
+	ercd = iget_tid(&tskid);
+	check_ercd(ercd, E_OK);
+
+	check_assert(tskid == TSK_NONE);
+
+	check_point(36);
+	ercd = iwup_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(37);
+	return;
+
+	check_point(0);
+}
+
+void
+task1(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	ercd = act_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+
+	check_point(3);
+	ercd = act_tsk(TASK3);
+	check_ercd(ercd, E_OK);
+
+	check_point(4);
+	ercd = act_tsk(TASK4);
+	check_ercd(ercd, E_OK);
+
+	check_point(5);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(9);
+	ercd = act_tsk(TASK5);
+	check_ercd(ercd, E_OK);
+
+	check_point(10);
+	ercd = act_tsk(TASK6);
+	check_ercd(ercd, E_OK);
+
+	check_point(11);
+	ercd = sus_tsk(TASK6);
+	check_ercd(ercd, E_OK);
+
+	check_point(12);
+	ercd = sus_tsk(TASK5);
+	check_ercd(ercd, E_OK);
+
+	check_point(13);
+	ercd = rsm_tsk(TASK5);
+	check_ercd(ercd, E_OK);
+
+	check_point(14);
+	ercd = rsm_tsk(TASK6);
+	check_ercd(ercd, E_OK);
+
+	check_point(15);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(31);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_finish(38);
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(2);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
+
+void
+task3(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(6);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(25);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
+
+void
+task4(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(7);
+	ercd = wup_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(8);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(26);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
+
+void
+task5(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(16);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(33);
+	ercd = sta_alm(ALM1, 10);
+	check_ercd(ercd, E_OK);
+
+	check_point(34);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
+
+void
+task6(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(17);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(18);
+	ercd = wup_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(19);
+	ercd = wup_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+
+	check_point(20);
+	ercd = sus_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+
+	check_point(21);
+	ercd = wup_tsk(TASK3);
+	check_ercd(ercd, E_OK);
+
+	check_point(22);
+	ercd = wup_tsk(TASK4);
+	check_ercd(ercd, E_OK);
+
+	check_point(23);
+	ercd = sus_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(24);
+	ercd = ena_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(27);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(28);
+	ercd = rsm_tsk(TASK1);
+	check_ercd(ercd, E_OK);
+
+	check_point(29);
+	ercd = wup_tsk(TASK5);
+	check_ercd(ercd, E_OK);
+
+	check_point(30);
+	ercd = ena_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(32);
+	ercd = slp_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_task1.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_task1.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_task1.cfg	(revision 136)
@@ -0,0 +1,21 @@
+/*
+ *  @(#) $Id: test_task1.cfg 1569 2009-05-31 13:23:47Z ertl-hiro $
+ */
+
+/*
+ *  ã¿ã¹ã¯ç®¡çã¢ã¸ã¥ã¼ã«ã®ãã¹ã(1)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "test_task1.h"
+
+CRE_TSK(TASK1, { TA_ACT, 1, task1, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK2, { TA_NULL, 2, task2, HIGH_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK3, { TA_NULL, 3, task3, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK4, { TA_NULL, 4, task4, MID_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK5, { TA_NULL, 5, task5, LOW_PRIORITY, STACK_SIZE, NULL });
+CRE_TSK(TASK6, { TA_NULL, 6, task6, LOW_PRIORITY, STACK_SIZE, NULL });
+CRE_ALM(ALM1, { TA_NULL, 1, alarm1_handler });
Index: rtos_arduino/trunk/asp_1.9.2/test/test_task1.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_task1.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_task1.h	(revision 136)
@@ -0,0 +1,95 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: test_task1.h 329 2007-07-17 07:28:32Z hiro $
+ */
+
+/* 
+ *		ã¿ã¹ã¯ç®¡çã¢ã¸ã¥ã¼ã«ã®ãã¹ã(1)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åªå
+åº¦ã®å®ç¾©
+ */
+#define HIGH_PRIORITY	4		/* é«åªå
+åº¦ */
+#define MID_PRIORITY	9		/* ä¸­åªå
+åº¦ */
+#define LOW_PRIORITY	14		/* ä½åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	task1(intptr_t exinf);
+extern void	task2(intptr_t exinf);
+extern void	task3(intptr_t exinf);
+extern void	task4(intptr_t exinf);
+extern void	task5(intptr_t exinf);
+extern void	task6(intptr_t exinf);
+extern void	alarm1_handler(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/test/test_tex1.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_tex1.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_tex1.c	(revision 136)
@@ -0,0 +1,606 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_tex1.c 2596 2014-01-02 12:21:31Z ertl-hiro $
+ */
+
+/* 
+ *		ã¿ã¹ã¯ä¾å¤å¦çã«é¢ãããã¹ã(1)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  ã¿ã¹ã¯ããã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãèµ·åããå¦çãç¶²ç¾
+çã«ãã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *	(A) ras_texã®ã¨ã©ã¼æ¤åº
+ *		(A-1) å¯¾è±¡ã¿ã¹ã¯ãä¼æ­¢ç¶æ
+ï¼»NGKI1413ï¼½
+ *		(A-2) å¯¾è±¡ã¿ã¹ã¯ã®ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå®ç¾©ããã¦ããªãï¼»NGKI1414ï¼½
+ *	(B) dis_texã®ã¨ã©ã¼æ¤åº
+ *		(B-1) èªã¿ã¹ã¯ã®ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå®ç¾©ããã¦ããªãï¼»NGKI1421ï¼½
+ *	(C) ena_texã®ã¨ã©ã¼æ¤åº
+ *		(C-1) èªã¿ã¹ã¯ã®ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå®ç¾©ããã¦ããªãï¼»NGKI1426ï¼½
+ *	(D) ref_texã®ã¨ã©ã¼æ¤åº
+ *		(D-1) å¯¾è±¡ã¿ã¹ã¯ãä¼æ­¢ç¶æ
+ï¼»NGKI1439ï¼½
+ *		(D-2) å¯¾è±¡ã¿ã¹ã¯ã®ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå®ç¾©ããã¦ããªãï¼»NGKI1440ï¼½
+ *	(E) ras_texã®æ­£å¸¸å¦çï¼»NGKI1415ï¼½
+ *		(E-1) å¯¾è±¡ã¿ã¹ã¯ãèªã¿ã¹ã¯ï¼ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ï¼ãã¤å²è¾¼ã¿åªå
+
+ *			  åº¦ãã¹ã¯å
+¨è§£é¤ç¶æ
+ã§ï¼ããã«å®è¡éå§
+ *		(E-2) å¯¾è±¡ã¿ã¹ã¯ãèªã¿ã¹ã¯ã§ãªã
+ *		(E-3) å¯¾è±¡ã¿ã¹ã¯ãèªã¿ã¹ã¯ã ãï¼ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢
+ *		(E-4) å¯¾è±¡ã¿ã¹ã¯ãèªã¿ã¹ã¯ã§ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ã ãï¼å²è¾¼ã¿åªå
+
+ *			  åº¦ãã¹ã¯ãå
+¨è§£é¤ã§ãªã
+ *	(F) ena_texã®æ­£å¸¸å¦çï¼»NGKI1427ï¼½
+ *		(F-1) ã¿ã¹ã¯ä¾å¤å¦çè¦æ±ãããï¼ãã¤å²è¾¼ã¿åªå
+åº¦ãã¹ã¯å
+¨è§£é¤ç¶
+ *			  æ
+ã§ï¼ããã«å®è¡éå§
+ *		(F-2) ã¿ã¹ã¯ä¾å¤å¦çè¦æ±ããªã
+ *		(F-3) ã¿ã¹ã¯ä¾å¤å¦çè¦æ±ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+¨è§£é¤ã§
+ *			  ãªã
+ *	(G) chg_ipmã®æ­£å¸¸å¦ç
+ *		(G-1) ã¿ã¹ã¯ä¾å¤å¦çè¦æ±ãããï¼ãã¤ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯ã§ï¼ãã
+ *			  ã«å®è¡éå§
+ *		(G-2) ã¿ã¹ã¯ä¾å¤å¦çè¦æ±ããªã
+ *		(G-3) ã¿ã¹ã¯ä¾å¤å¦çè¦æ±ããããï¼ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢
+ *		(G-4) ã¿ã¹ã¯ä¾å¤å¦çè¦æ±ããããï¼å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+¨è§£é¤ã§
+ *			  ãªã
+ *	(H) ã¿ã¹ã¯ãã£ã¹ãããã£ã«ããèµ·å
+ *		(H-1) ãã£ã¹ãããå¾ã®ã¿ã¹ã¯ãã¿ã¹ã¯ä¾å¤è¨±å¯ã§ã¿ã¹ã¯ä¾å¤å¦çè¦
+ *			  æ±ãã
+ *	(I) ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ããã®ãªã¿ã¼ã³ã«ããèµ·åï¼é£ç¶èµ·åï¼
+ *	(J) ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ããã®æ»ãæã«ããç¶æ
+å¾©å¸°
+ *		(J-1) ã¿ã¹ã¯ã«æ»ã£ã¦ããæ
+ *		(J-2) ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãé£ç¶èµ·åãããæ
+ *	(K) ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®å¤éèµ·å
+ *	(L) ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ããã®æ»ãæã®ã¿ã¹ã¯åæã
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: ã¡ã¤ã³ã®ã¿ã¹ã¯ï¼èªã¿ã¹ã¯ã«å¯¾ãã¦ã¿ã¹ã¯ä¾å¤å¦çãè¦æ±ãã
+ *	TASK2: ä»ã¿ã¹ã¯ã«å¯¾ãã¦ã¿ã¹ã¯ä¾å¤å¦çãè¦æ±ããå¯¾è±¡ã¿ã¹ã¯
+ *	TASK3: ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå®ç¾©ããã¦ããªãã¿ã¹ã¯
+ *	TASK4: ä¼æ­¢ç¶æ
+ã®ã¿ã¹ã¯
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼åªå
+åº¦ï¼10ï¼==
+ *	1:	state(false, false, TIPM_ENAALL, false, false, true)
+ *		ref_tex(TSK_SELF, &rtex)
+ *		assert((rtex.texstat & TTEX_DIS) != 0U)
+ *		assert(rtex.pndptn == 0U)
+ *		ras_tex(TASK3, 0x0001) -> E_OBJ		... (A-2)
+ *		ras_tex(TASK4, 0x0001) -> E_OBJ		... (A-1)
+ *		ref_tex(TASK3, &rtex) -> E_OBJ		... (D-2)
+ *		ref_tex(TASK4, &rtex) -> E_OBJ		... (D-1)
+ *	2:	ena_tex()							... (F-2)
+ *		state(false, false, TIPM_ENAALL, false, false, false)
+ *		ref_tex(TSK_SELF, &rtex)
+ *		assert((rtex.texstat & TTEX_ENA) != 0U)
+ *		assert(rtex.pndptn == 0U)
+ *	3:	ras_tex(TSK_SELF, 0x0001)			... (E-1)
+ *	== TASK1-TEX-1ï¼1åç®ï¼==
+ *	4:	assert(texptn == 0x0001)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *	5:	dis_dsp() ... 4ã¤ã®ç¶æ
+ãããããå¤åããã
+ *		chg_ipm(TMAX_INTPRI)
+ *		ena_tex()
+ *		loc_cpu()
+ *		state(false, true, TMAX_INTPRI, true, true, false)
+ *		RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	6:	state(false, false, TIPM_ENAALL, false, false, false)	... (J-1)
+ *	7:	dis_dsp() ... ãã£ã¹ãããç¦æ­¢ï¼ã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢
+ *		dis_tex()
+ *		state(false, false, TIPM_ENAALL, true, true, true)
+ *	8:	ras_tex(TASK1, 0x0002)				... (E-3)
+ *		ref_tex(TSK_SELF, &rtex)
+ *		assert((rtex.texstat & TTEX_DIS) != 0)
+ *		assert(rtex.pndptn == 0x0002)
+ *	9:	ena_tex()							... (F-1)
+ *	== TASK1-TEX-2ï¼2åç®ï¼==
+ *	10:	assert(texptn == 0x0002)
+ *		state(false, false, TIPM_ENAALL, true, true, true)
+ *	11:	ras_tex(TASK1, 0x0001)				... (E-3)
+ *		ras_tex(TASK1, 0x0002)				... (E-3)
+ *	12:	ena_dsp() ... 3ã¤ã®ç¶æ
+ãããããå¤åããã
+ *		chg_ipm(TMAX_INTPRI)
+ *		loc_cpu()
+ *		state(false, true, TMAX_INTPRI, false, true, true)
+ *		RETURN								... (I)
+ *	== TASK1-TEX-3ï¼3åç®ï¼==
+ *	13:	assert(texptn == 0x0003)
+ *		state(false, false, TIPM_ENAALL, true, true, true)	... (J-2)
+ *	14:	ena_dsp() ... ãã£ã¹ãããè¨±å¯ï¼ã¿ã¹ã¯ä¾å¤è¨±å¯
+ *		chg_ipm(TMAX_INTPRI)
+ *		ena_tex()
+ *		state(false, false, TMAX_INTPRI, false, true, false)
+ *		chg_ipm(TIPM_ENAALL)				... (G-2)
+ *		chg_ipm(TMAX_INTPRI)
+ *	15: ras_tex(TSK_SELF, 0x0004)			... (E-4)
+ *		chg_ipm(TMAX_INTPRI)				... (G-4)
+ *		dis_tex()
+ *		chg_ipm(TIPM_ENAALL)				... (G-3)
+ *		chg_ipm(TMAX_INTPRI)
+ *		ena_tex()							... (F-3)
+ *	16:	chg_ipm(TIPM_ENAALL)				... (G-1)(K)
+ *	== TASK1-TEX-4ï¼4åç®ï¼==
+ *	17:	assert(texptn == 0x0004)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *	18:	dis_dsp() ... 3ã¤ã®ç¶æ
+ãããããå¤åããã
+ *		chg_ipm(TMAX_INTPRI)
+ *		loc_cpu()
+ *		state(false, true, TMAX_INTPRI, true, true, true)
+ *		RETURN
+ *	== TASK1-TEX-3ï¼3åç®ç¶ãï¼==
+ *	19:	state(false, false, TIPM_ENAALL, false, false, false)
+ *		RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	20:	state(false, false, TIPM_ENAALL, true, true, false)	... (J-1)
+ *	21: ena_dsp()
+ *		rot_rdq(TPRI_SELF)
+ *	== TASK2ï¼åªå
+åº¦ï¼10ï¼	==
+ *	22:	state(false, false, TIPM_ENAALL, false, false, true)
+ *	23:	ena_tex()
+ *		state(false, false, TIPM_ENAALL, false, false, false)
+ *		rot_rdq(TPRI_SELF)
+ *	== TASK3ï¼åªå
+åº¦ï¼10ï¼	==
+ *	24:	state(false, false, TIPM_ENAALL, false, false, true)
+ *	25:	ena_tex() -> E_OBJ					... (C-1)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *	26:	dis_tex() -> E_OBJ					... (B-1)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *		ext_tsk()
+ *	== TASK1ï¼ç¶ãï¼==
+ *	27: ras_tex(TASK2, 0x0001)				... (E-2)
+ *		ref_tex(TASK2, &rtex)
+ *	28:	rot_rdq(TPRI_SELF)					... (H-1)
+ *	== TASK2-TEX-1ï¼1åç®ï¼==
+ *	29:	assert(texptn == 0x0001)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *		RETURN
+ *	== TASK2ï¼ç¶ãï¼==
+ *	30: ras_tex(TSK_SELF, 0x0002)
+ *	== TASK2-TEX-2ï¼2åç®ï¼==
+ *	31:	assert(texptn == 0x0002)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *	32:	dis_dsp()
+ *		rot_rdq(TPRI_SELF)
+ *	33:	RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	34:	RETURN
+ *	== TASK2ï¼ç¶ãï¼==
+ *	35:	END
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_tex1.h"
+
+/*
+ *  task4ã¨tex_task4ã¯çæãããªã
+ */
+
+void
+task4(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+tex_task4(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+/* DO NOT DELETE THIS LINE -- gentest depends on it. */
+
+void
+task1(intptr_t exinf)
+{
+	ER_UINT	ercd;
+	T_RTEX	rtex;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	ercd = ref_tex(TSK_SELF, &rtex);
+	check_ercd(ercd, E_OK);
+
+	check_assert((rtex.texstat & TTEX_DIS) != 0U);
+
+	check_assert(rtex.pndptn == 0U);
+
+	ercd = ras_tex(TASK3, 0x0001);
+	check_ercd(ercd, E_OBJ);
+
+	ercd = ras_tex(TASK4, 0x0001);
+	check_ercd(ercd, E_OBJ);
+
+	ercd = ref_tex(TASK3, &rtex);
+	check_ercd(ercd, E_OBJ);
+
+	ercd = ref_tex(TASK4, &rtex);
+	check_ercd(ercd, E_OBJ);
+
+	check_point(2);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_state(false, false, TIPM_ENAALL, false, false, false);
+
+	ercd = ref_tex(TSK_SELF, &rtex);
+	check_ercd(ercd, E_OK);
+
+	check_assert((rtex.texstat & TTEX_ENA) != 0U);
+
+	check_assert(rtex.pndptn == 0U);
+
+	check_point(3);
+	ercd = ras_tex(TSK_SELF, 0x0001);
+	check_ercd(ercd, E_OK);
+
+	check_point(6);
+	check_state(false, false, TIPM_ENAALL, false, false, false);
+
+	check_point(7);
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+
+	ercd = dis_tex();
+	check_ercd(ercd, E_OK);
+
+	check_state(false, false, TIPM_ENAALL, true, true, true);
+
+	check_point(8);
+	ercd = ras_tex(TASK1, 0x0002);
+	check_ercd(ercd, E_OK);
+
+	ercd = ref_tex(TSK_SELF, &rtex);
+	check_ercd(ercd, E_OK);
+
+	check_assert((rtex.texstat & TTEX_DIS) != 0);
+
+	check_assert(rtex.pndptn == 0x0002);
+
+	check_point(9);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(20);
+	check_state(false, false, TIPM_ENAALL, true, true, false);
+
+	check_point(21);
+	ercd = ena_dsp();
+	check_ercd(ercd, E_OK);
+
+	ercd = rot_rdq(TPRI_SELF);
+	check_ercd(ercd, E_OK);
+
+	check_point(27);
+	ercd = ras_tex(TASK2, 0x0001);
+	check_ercd(ercd, E_OK);
+
+	ercd = ref_tex(TASK2, &rtex);
+	check_ercd(ercd, E_OK);
+
+	check_point(28);
+	ercd = rot_rdq(TPRI_SELF);
+	check_ercd(ercd, E_OK);
+
+	check_point(34);
+	return;
+
+	check_point(0);
+}
+
+static uint_t	tex_task1_count = 0;
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	switch (++tex_task1_count) {
+	case 1:
+		check_point(4);
+		check_assert(texptn == 0x0001);
+
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		check_point(5);
+		ercd = dis_dsp();
+		check_ercd(ercd, E_OK);
+
+		ercd = chg_ipm(TMAX_INTPRI);
+		check_ercd(ercd, E_OK);
+
+		ercd = ena_tex();
+		check_ercd(ercd, E_OK);
+
+		ercd = loc_cpu();
+		check_ercd(ercd, E_OK);
+
+		check_state(false, true, TMAX_INTPRI, true, true, false);
+
+		return;
+
+		check_point(0);
+
+	case 2:
+		check_point(10);
+		check_assert(texptn == 0x0002);
+
+		check_state(false, false, TIPM_ENAALL, true, true, true);
+
+		check_point(11);
+		ercd = ras_tex(TASK1, 0x0001);
+		check_ercd(ercd, E_OK);
+
+		ercd = ras_tex(TASK1, 0x0002);
+		check_ercd(ercd, E_OK);
+
+		check_point(12);
+		ercd = ena_dsp();
+		check_ercd(ercd, E_OK);
+
+		ercd = chg_ipm(TMAX_INTPRI);
+		check_ercd(ercd, E_OK);
+
+		ercd = loc_cpu();
+		check_ercd(ercd, E_OK);
+
+		check_state(false, true, TMAX_INTPRI, false, true, true);
+
+		return;
+
+		check_point(0);
+
+	case 3:
+		check_point(13);
+		check_assert(texptn == 0x0003);
+
+		check_state(false, false, TIPM_ENAALL, true, true, true);
+
+		check_point(14);
+		ercd = ena_dsp();
+		check_ercd(ercd, E_OK);
+
+		ercd = chg_ipm(TMAX_INTPRI);
+		check_ercd(ercd, E_OK);
+
+		ercd = ena_tex();
+		check_ercd(ercd, E_OK);
+
+		check_state(false, false, TMAX_INTPRI, false, true, false);
+
+		ercd = chg_ipm(TIPM_ENAALL);
+		check_ercd(ercd, E_OK);
+
+		ercd = chg_ipm(TMAX_INTPRI);
+		check_ercd(ercd, E_OK);
+
+		check_point(15);
+		ercd = ras_tex(TSK_SELF, 0x0004);
+		check_ercd(ercd, E_OK);
+
+		ercd = chg_ipm(TMAX_INTPRI);
+		check_ercd(ercd, E_OK);
+
+		ercd = dis_tex();
+		check_ercd(ercd, E_OK);
+
+		ercd = chg_ipm(TIPM_ENAALL);
+		check_ercd(ercd, E_OK);
+
+		ercd = chg_ipm(TMAX_INTPRI);
+		check_ercd(ercd, E_OK);
+
+		ercd = ena_tex();
+		check_ercd(ercd, E_OK);
+
+		check_point(16);
+		ercd = chg_ipm(TIPM_ENAALL);
+		check_ercd(ercd, E_OK);
+
+		check_point(19);
+		check_state(false, false, TIPM_ENAALL, false, false, false);
+
+		return;
+
+		check_point(0);
+
+	case 4:
+		check_point(17);
+		check_assert(texptn == 0x0004);
+
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		check_point(18);
+		ercd = dis_dsp();
+		check_ercd(ercd, E_OK);
+
+		ercd = chg_ipm(TMAX_INTPRI);
+		check_ercd(ercd, E_OK);
+
+		ercd = loc_cpu();
+		check_ercd(ercd, E_OK);
+
+		check_state(false, true, TMAX_INTPRI, true, true, true);
+
+		return;
+
+		check_point(0);
+
+	default:
+		check_point(0);
+	}
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(22);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	check_point(23);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_state(false, false, TIPM_ENAALL, false, false, false);
+
+	ercd = rot_rdq(TPRI_SELF);
+	check_ercd(ercd, E_OK);
+
+	check_point(30);
+	ercd = ras_tex(TSK_SELF, 0x0002);
+	check_ercd(ercd, E_OK);
+
+	check_finish(35);
+	check_point(0);
+}
+
+static uint_t	tex_task2_count = 0;
+
+void
+tex_task2(TEXPTN texptn, intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	switch (++tex_task2_count) {
+	case 1:
+		check_point(29);
+		check_assert(texptn == 0x0001);
+
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		return;
+
+		check_point(0);
+
+	case 2:
+		check_point(31);
+		check_assert(texptn == 0x0002);
+
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		check_point(32);
+		ercd = dis_dsp();
+		check_ercd(ercd, E_OK);
+
+		ercd = rot_rdq(TPRI_SELF);
+		check_ercd(ercd, E_OK);
+
+		check_point(33);
+		return;
+
+		check_point(0);
+
+	default:
+		check_point(0);
+	}
+	check_point(0);
+}
+
+void
+task3(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(24);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	check_point(25);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OBJ);
+
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	check_point(26);
+	ercd = dis_tex();
+	check_ercd(ercd, E_OBJ);
+
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	ercd = ext_tsk();
+	check_ercd(ercd, E_OK);
+
+	check_point(0);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_tex1.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_tex1.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_tex1.cfg	(revision 136)
@@ -0,0 +1,24 @@
+/*
+ *  @(#) $Id: test_tex1.cfg 1572 2009-05-31 13:40:39Z ertl-hiro $
+ */
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«é¢ãããã¹ã(1)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "test_tex1.h"
+
+CRE_TSK(TASK1, { TA_ACT, 1, task1, TASK1_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK1, { TA_NULL, tex_task1 });
+
+CRE_TSK(TASK2, { TA_ACT, 2, task2, TASK2_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK2, { TA_NULL, tex_task2 });
+
+CRE_TSK(TASK3, { TA_ACT, 3, task3, TASK3_PRIORITY, STACK_SIZE, NULL });
+
+CRE_TSK(TASK4, { TA_NULL, 4, task4, TASK4_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK4, { TA_NULL, tex_task4 });
Index: rtos_arduino/trunk/asp_1.9.2/test/test_tex1.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_tex1.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_tex1.h	(revision 136)
@@ -0,0 +1,100 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006,2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: test_tex1.h 329 2007-07-17 07:28:32Z hiro $
+ */
+
+/* 
+ *		ã¿ã¹ã¯ä¾å¤å¦çã«é¢ãããã¹ã(1)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define TASK1_PRIORITY	10		/* ã¿ã¹ã¯1ã®åªå
+åº¦ */
+#define TASK2_PRIORITY	10		/* ã¿ã¹ã¯2ã®åªå
+åº¦ */
+#define TASK3_PRIORITY	10		/* ã¿ã¹ã¯3ã®åªå
+åº¦ */
+#define TASK4_PRIORITY	10		/* ã¿ã¹ã¯4ã®åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	tex_task1(TEXPTN texptn, intptr_t exinf);
+extern void	task1(intptr_t exinf);
+
+extern void	tex_task2(TEXPTN texptn, intptr_t exinf);
+extern void	task2(intptr_t exinf);
+
+extern void	task3(intptr_t exinf);
+
+extern void	tex_task4(TEXPTN texptn, intptr_t exinf);
+extern void	task4(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/test/test_tex2.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_tex2.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_tex2.c	(revision 136)
@@ -0,0 +1,511 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007-2013 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_tex2.c 2596 2014-01-02 12:21:31Z ertl-hiro $
+ */
+
+/* 
+ *		ã¿ã¹ã¯ä¾å¤å¦çã«é¢ãããã¹ã(2)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  å²è¾¼ã¿ãã³ãã©ï¼ã¢ã©ã¼ã ãã³ãã©ï¼ããã³CPUä¾å¤ãã³ãã©ããã¿ã¹ã¯ä¾
+ *  å¤å¦çã«ã¼ãã³ãèµ·åããå¦çãç¶²ç¾
+çã«ãã¹ãããï¼
+ *
+ * ããã¹ãé 
+ç®ã
+ *
+ *	(A) iras_texã®ã¨ã©ã¼æ¤åº
+ *		(A-1) å¯¾è±¡ã¿ã¹ã¯ãä¼æ­¢ç¶æ
+
+ *		(A-2) å¯¾è±¡ã¿ã¹ã¯ã®ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå®ç¾©ããã¦ããªã
+ *	(B) å²è¾¼ã¿ãã³ãã©ããå¼ã°ããiras_texã®æ­£å¸¸å¦ç
+ *		(B-1) å¯¾è±¡ã¿ã¹ã¯ãå®è¡ç¶æ
+ã®ã¿ã¹ã¯ãã¤ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯
+ *		(B-2) å¯¾è±¡ã¿ã¹ã¯ãå®è¡ç¶æ
+ã®ã¿ã¹ã¯ã§ãªã
+ *		(B-3) å¯¾è±¡ã¿ã¹ã¯ãå®è¡ç¶æ
+ã®ã¿ã¹ã¯ã ãã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢
+ *	(C) CPUä¾å¤ãã³ãã©ããå¼ã°ããiras_texã®æ­£å¸¸å¦ç
+ *		(C-1) å¯¾è±¡ã¿ã¹ã¯ãå®è¡ç¶æ
+ã®ã¿ã¹ã¯ãã¤ã¿ã¹ã¯ä¾å¤å¦çè¨±å¯
+ *		(C-2) å¯¾è±¡ã¿ã¹ã¯ãå®è¡ç¶æ
+ã®ã¿ã¹ã¯ã§ãªã
+ *		(C-3) å¯¾è±¡ã¿ã¹ã¯ãå®è¡ç¶æ
+ã®ã¿ã¹ã¯ã ãã¿ã¹ã¯ä¾å¤å¦çç¦æ­¢
+ *				â å®æ½ããªãï¼ã¿ã¼ã²ããéä¾å­ã«å®ç¾ã§ããªãï¼
+ *	(D) å²è¾¼ã¿ãã³ãã©ã®åºå£å¦çã«ããèµ·å
+ *		(D-1) ãã£ã¹ãããå¾ã®ã¿ã¹ã¯ãã¿ã¹ã¯ä¾å¤è¨±å¯ã§ã¿ã¹ã¯ä¾å¤å¦çè¦
+ *			  æ±ãã
+ *	(E) CPUä¾å¤ãã³ãã©ã®åºå£å¦çã«ããèµ·å
+ *		(E-1) ãã£ã¹ãããå¾ã®ã¿ã¹ã¯ãã¿ã¹ã¯ä¾å¤è¨±å¯ã§ã¿ã¹ã¯ä¾å¤å¦çè¦
+ *			  æ±ãã
+ *	(F) sns_texã§å®è¡ç¶æ
+ã®ã¿ã¹ã¯ããªã
+ *
+ * ãä½¿ç¨ãªã½ã¼ã¹ã
+ *
+ *	TASK1: ã¡ã¤ã³ã®ã¿ã¹ã¯ï¼å®è¡ç¶æ
+ã®ã¿ã¹ã¯ã«å¯¾ãã¦ã¿ã¹ã¯ä¾å¤å¦çãè¦æ±ã
+ *		   ãå¯¾è±¡ã¿ã¹ã¯
+ *	TASK2: å®è¡ç¶æ
+ã§ãªãã¿ã¹ã¯ã«å¯¾ãã¦ã¿ã¹ã¯ä¾å¤å¦çãè¦æ±ããå¯¾è±¡ã¿ã¹ã¯
+ *	TASK3: ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ãå®ç¾©ããã¦ããªãã¿ã¹ã¯
+ *	TASK4: ä¼æ­¢ç¶æ
+ã®ã¿ã¹ã¯
+ *	ALM1:  ã¢ã©ã¼ã ãã³ãã©1
+ *	ALM2:  ã¢ã©ã¼ã ãã³ãã©2
+ *	ALM3:  ã¢ã©ã¼ã ãã³ãã©3
+ *	CPUEXC: CPUä¾å¤ãã³ãã©
+ *
+ * ããã¹ãã·ã¼ã±ã³ã¹ã
+ *
+ *	== TASK1ï¼åªå
+åº¦ï¼10ï¼==
+ *	1:	state(false, false, TIPM_ENAALL, false, false, true)
+ *		ref_tex(TSK_SELF, &rtex)
+ *		assert((rtex.texstat & TTEX_DIS) != 0U)
+ *		assert(rtex.pndptn == 0U)
+ *	2:	sta_alm(ALM1, 1U)
+ *		DO(while (!(alm1_flag)))	... ã¢ã©ã¼ã ãã³ãã©1ã®å®è¡ãå¾
+ã¤
+ *	== ALM1 ==
+ *	3:	state_i(true, false, false, true, true)
+ *		iras_tex(TASK3, 0x0001) -> E_OBJ		... (A-2)
+ *		iras_tex(TASK4, 0x0001) -> E_OBJ		... (A-1)
+ *		iras_tex(TASK2, 0x0001)					... (B-2)
+ *		iras_tex(TASK1, 0x0001)					... (B-3)
+ *		DO(alm1_flag = true)
+ *		RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	4:	ena_tex()
+ *	== TASK1-TEX-1ï¼1åç®ï¼==
+ *	5:	assert(texptn == 0x0001)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *	6:	dis_dsp() ... 4ã¤ã®ç¶æ
+ãããããå¤åããã
+ *		chg_ipm(TMAX_INTPRI)
+ *		ena_tex()
+ *		loc_cpu()
+ *		state(false, true, TMAX_INTPRI, true, true, false)
+ *		RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	7:	state(false, false, TIPM_ENAALL, false, false, false)
+ *		ref_tex(TSK_SELF, &rtex)
+ *		assert((rtex.texstat & TTEX_ENA) != 0U)
+ *		assert(rtex.pndptn == 0U)
+ *	8:	sta_alm(ALM2, 1U)
+ *		DO(while (!(alm2_flag)))
+ *	== ALM2 ==
+ *	9:	state_i(true, false, false, true, false)
+ *		iras_tex(TASK1, 0x0002)					... (B-1)
+ *		DO(alm2_flag = true)
+ *		RETURN									... (D-1)
+ *	== TASK1-TEX-2ï¼2åç®ï¼==
+ *	10:	assert(texptn == 0x0002)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *		RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	11:	sus_tsk(TASK2)
+ *		sus_tsk(TASK3)
+ *	12:	sta_alm(ALM3, 10U)
+ *	13:	dly_tsk(50U)
+ *	== ALM3 ==
+ *	14:	state_i(true, false, false, true, true)	... (F)ï¼»sns_tex()ãå«ãï¼½
+ *		iget_tid(&tskid)
+ *		assert(tskid == TSK_NONE)
+ *		iras_tex(TASK1, 0x0004)
+ *		DO(alm3_flag = true)
+ *		RETURN
+ *	== TASK1-TEX-3ï¼3åç®ï¼==
+ *	15:	assert(texptn == 0x0004)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *		RETURN
+ *	== TASK1ï¼ç¶ãï¼==
+ *	16:	rsm_tsk(TASK2)
+ *		rsm_tsk(TASK3)
+ *		dis_dsp()
+ *	17:	DO(RAISE_CPU_EXCEPTION)
+ *	== CPUEXC ==
+ *	18:	state_i(true, false, true, true, false)
+ *		assert(xsns_xpn(p_excinf) == false)
+ *		iras_tex(TASK3, 0x0010) -> E_OBJ		... (A-2)
+ *		iras_tex(TASK4, 0x0010) -> E_OBJ		... (A-1)
+ *		iras_tex(TASK2, 0x0010)					... (C-2)
+ *		iras_tex(TASK1, 0x0010)					... (C-1)
+ *		RETURN									... (E-1)
+ *	== TASK1-TEX-4ï¼4åç®ï¼==
+ *	19:	assert(texptn == 0x0010)
+ *		state(false, false, TIPM_ENAALL, true, true, true)
+ *	20:	ext_tsk()
+ *	== TASK2ï¼åªå
+åº¦ï¼10ï¼==
+ *	21:	state(false, false, TIPM_ENAALL, false, false, true)
+ *	22:	ena_tex()
+ *	== TASK2-TEX ==
+ *	23:	assert(texptn == 0x0011)
+ *		state(false, false, TIPM_ENAALL, false, false, true)
+ *		RETURN
+ *	== TASK2ï¼ç¶ãï¼==
+ *	24:	sus_tsk(TASK3)
+ *	25:	END
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_tex2.h"
+
+volatile bool_t	alm1_flag = false;
+volatile bool_t	alm2_flag = false;
+volatile bool_t	alm3_flag = false;
+
+/*
+ *  task3ï¼task4ã¨tex_task4ã¯çæãããªã
+ */
+
+void
+task3(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+task4(intptr_t exinf)
+{
+	check_point(0);
+}
+
+void
+tex_task4(TEXPTN texptn, intptr_t exinf)
+{
+	check_point(0);
+}
+
+/* DO NOT DELETE THIS LINE -- gentest depends on it. */
+
+void
+alarm1_handler(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(3);
+	check_state_i(true, false, false, true, true);
+
+	ercd = iras_tex(TASK3, 0x0001);
+	check_ercd(ercd, E_OBJ);
+
+	ercd = iras_tex(TASK4, 0x0001);
+	check_ercd(ercd, E_OBJ);
+
+	ercd = iras_tex(TASK2, 0x0001);
+	check_ercd(ercd, E_OK);
+
+	ercd = iras_tex(TASK1, 0x0001);
+	check_ercd(ercd, E_OK);
+
+	alm1_flag = true;
+
+	return;
+
+	check_point(0);
+}
+
+void
+alarm2_handler(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(9);
+	check_state_i(true, false, false, true, false);
+
+	ercd = iras_tex(TASK1, 0x0002);
+	check_ercd(ercd, E_OK);
+
+	alm2_flag = true;
+
+	return;
+
+	check_point(0);
+}
+
+void
+alarm3_handler(intptr_t exinf)
+{
+	ID		tskid;
+	ER_UINT	ercd;
+
+	check_point(14);
+	check_state_i(true, false, false, true, true);
+
+	ercd = iget_tid(&tskid);
+	check_ercd(ercd, E_OK);
+
+	check_assert(tskid == TSK_NONE);
+
+	ercd = iras_tex(TASK1, 0x0004);
+	check_ercd(ercd, E_OK);
+
+	alm3_flag = true;
+
+	return;
+
+	check_point(0);
+}
+
+void
+cpuexc_handler(void *p_excinf)
+{
+	ER_UINT	ercd;
+
+	check_point(18);
+	check_state_i(true, false, true, true, false);
+
+	check_assert(xsns_xpn(p_excinf) == false);
+
+	ercd = iras_tex(TASK3, 0x0010);
+	check_ercd(ercd, E_OBJ);
+
+	ercd = iras_tex(TASK4, 0x0010);
+	check_ercd(ercd, E_OBJ);
+
+	ercd = iras_tex(TASK2, 0x0010);
+	check_ercd(ercd, E_OK);
+
+	ercd = iras_tex(TASK1, 0x0010);
+	check_ercd(ercd, E_OK);
+
+	return;
+
+	check_point(0);
+}
+
+void
+task1(intptr_t exinf)
+{
+	ER_UINT	ercd;
+	T_RTEX	rtex;
+
+	test_start(__FILE__);
+
+	check_point(1);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	ercd = ref_tex(TSK_SELF, &rtex);
+	check_ercd(ercd, E_OK);
+
+	check_assert((rtex.texstat & TTEX_DIS) != 0U);
+
+	check_assert(rtex.pndptn == 0U);
+
+	check_point(2);
+	ercd = sta_alm(ALM1, 1U);
+	check_ercd(ercd, E_OK);
+
+	while (!(alm1_flag));
+
+	check_point(4);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(7);
+	check_state(false, false, TIPM_ENAALL, false, false, false);
+
+	ercd = ref_tex(TSK_SELF, &rtex);
+	check_ercd(ercd, E_OK);
+
+	check_assert((rtex.texstat & TTEX_ENA) != 0U);
+
+	check_assert(rtex.pndptn == 0U);
+
+	check_point(8);
+	ercd = sta_alm(ALM2, 1U);
+	check_ercd(ercd, E_OK);
+
+	while (!(alm2_flag));
+
+	check_point(11);
+	ercd = sus_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+
+	ercd = sus_tsk(TASK3);
+	check_ercd(ercd, E_OK);
+
+	check_point(12);
+	ercd = sta_alm(ALM3, 10U);
+	check_ercd(ercd, E_OK);
+
+	check_point(13);
+	ercd = dly_tsk(50U);
+	check_ercd(ercd, E_OK);
+
+	check_point(16);
+	ercd = rsm_tsk(TASK2);
+	check_ercd(ercd, E_OK);
+
+	ercd = rsm_tsk(TASK3);
+	check_ercd(ercd, E_OK);
+
+	ercd = dis_dsp();
+	check_ercd(ercd, E_OK);
+
+	check_point(17);
+	RAISE_CPU_EXCEPTION;
+
+	check_point(0);
+}
+
+static uint_t	tex_task1_count = 0;
+
+void
+tex_task1(TEXPTN texptn, intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	switch (++tex_task1_count) {
+	case 1:
+		check_point(5);
+		check_assert(texptn == 0x0001);
+
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		check_point(6);
+		ercd = dis_dsp();
+		check_ercd(ercd, E_OK);
+
+		ercd = chg_ipm(TMAX_INTPRI);
+		check_ercd(ercd, E_OK);
+
+		ercd = ena_tex();
+		check_ercd(ercd, E_OK);
+
+		ercd = loc_cpu();
+		check_ercd(ercd, E_OK);
+
+		check_state(false, true, TMAX_INTPRI, true, true, false);
+
+		return;
+
+		check_point(0);
+
+	case 2:
+		check_point(10);
+		check_assert(texptn == 0x0002);
+
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		return;
+
+		check_point(0);
+
+	case 3:
+		check_point(15);
+		check_assert(texptn == 0x0004);
+
+		check_state(false, false, TIPM_ENAALL, false, false, true);
+
+		return;
+
+		check_point(0);
+
+	case 4:
+		check_point(19);
+		check_assert(texptn == 0x0010);
+
+		check_state(false, false, TIPM_ENAALL, true, true, true);
+
+		check_point(20);
+		ercd = ext_tsk();
+		check_ercd(ercd, E_OK);
+
+		check_point(0);
+
+	default:
+		check_point(0);
+	}
+	check_point(0);
+}
+
+void
+task2(intptr_t exinf)
+{
+	ER_UINT	ercd;
+
+	check_point(21);
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	check_point(22);
+	ercd = ena_tex();
+	check_ercd(ercd, E_OK);
+
+	check_point(24);
+	ercd = sus_tsk(TASK3);
+	check_ercd(ercd, E_OK);
+
+	check_finish(25);
+	check_point(0);
+}
+
+void
+tex_task2(TEXPTN texptn, intptr_t exinf)
+{
+
+	check_point(23);
+	check_assert(texptn == 0x0011);
+
+	check_state(false, false, TIPM_ENAALL, false, false, true);
+
+	return;
+
+	check_point(0);
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_tex2.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_tex2.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_tex2.cfg	(revision 136)
@@ -0,0 +1,30 @@
+/*
+ *  @(#) $Id: test_tex2.cfg 2393 2012-07-11 02:48:57Z ertl-hiro $
+ */
+
+/*
+ *  ã¿ã¹ã¯ä¾å¤å¦çã«é¢ãããã¹ã(2)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "test_tex2.h"
+
+CRE_TSK(TASK1, { TA_ACT, 1, task1, TASK1_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK1, { TA_NULL, tex_task1 });
+
+CRE_TSK(TASK2, { TA_ACT, 2, task2, TASK2_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK2, { TA_NULL, tex_task2 });
+
+CRE_TSK(TASK3, { TA_ACT, 3, task3, TASK3_PRIORITY, STACK_SIZE, NULL });
+
+CRE_TSK(TASK4, { TA_NULL, 4, task4, TASK4_PRIORITY, STACK_SIZE, NULL });
+DEF_TEX(TASK4, { TA_NULL, tex_task4 });
+
+CRE_ALM(ALM1, { TA_NULL, 1, alarm1_handler });
+CRE_ALM(ALM2, { TA_NULL, 2, alarm2_handler });
+CRE_ALM(ALM3, { TA_NULL, 3, alarm3_handler });
+
+DEF_EXC(CPUEXC1, { TA_NULL, cpuexc_handler });
Index: rtos_arduino/trunk/asp_1.9.2/test/test_tex2.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_tex2.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_tex2.h	(revision 136)
@@ -0,0 +1,105 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2007 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  @(#) $Id: test_tex2.h 329 2007-07-17 07:28:32Z hiro $
+ */
+
+/* 
+ *		ã¿ã¹ã¯ä¾å¤å¦çã«é¢ãããã¹ã(2)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define TASK1_PRIORITY	10		/* ã¿ã¹ã¯1ã®åªå
+åº¦ */
+#define TASK2_PRIORITY	10		/* ã¿ã¹ã¯2ã®åªå
+åº¦ */
+#define TASK3_PRIORITY	10		/* ã¿ã¹ã¯3ã®åªå
+åº¦ */
+#define TASK4_PRIORITY	10		/* ã¿ã¹ã¯4ã®åªå
+åº¦ */
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	tex_task1(TEXPTN texptn, intptr_t exinf);
+extern void	task1(intptr_t exinf);
+
+extern void	tex_task2(TEXPTN texptn, intptr_t exinf);
+extern void	task2(intptr_t exinf);
+
+extern void	task3(intptr_t exinf);
+
+extern void	tex_task4(TEXPTN texptn, intptr_t exinf);
+extern void	task4(intptr_t exinf);
+
+extern void	alarm1_handler(intptr_t exinf);
+extern void	alarm2_handler(intptr_t exinf);
+extern void	alarm3_handler(intptr_t exinf);
+extern void	cpuexc_handler(void *p_excinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/test/test_utm1.c
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_utm1.c	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_utm1.c	(revision 136)
@@ -0,0 +1,142 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+ *                              Toyohashi Univ. of Technology, JAPAN
+ *  Copyright (C) 2007-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_utm1.c 2305 2012-01-29 11:51:08Z ertl-hiro $
+ */
+
+/*
+ *		get_utmã«é¢ãããã¹ã(1)
+ *
+ * ããã¹ãã®ç®çã
+ *
+ *  æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ãéè¡ãããã¨ããªããã¨ããã¹ãããï¼
+ *
+ * ããã¹ãã®å
+å®¹ã
+ *
+ *  ã¡ã¤ã³ã¿ã¹ã¯ã§ã¯ï¼æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ãç¹°ãè¿ãåå¾ãï¼æå»ãå°
+ *  ãããªããªããããã§ãã¯ããï¼ããã¨ä¸¦è¡ãã¦ï¼å¨æãã³ãã©ã1ããªç§
+ *  å¨æã§å®è¡ãï¼ãã®ä¸­ã§ãæ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ãåå¾ãã¦ï¼æå»ãå°
+ *  ãããªããªããããã§ãã¯ããï¼
+ *
+ *  ãªãï¼æ§è½è©ä¾¡ç¨ã·ã¹ãã æå»ãæå¤§å¤ãè¶
+ãã¦0ã«æ»ãç¶æ³ã¯èæ
+®ãã¦ã
+ *  ãªãï¼
+ */
+
+#include <kernel.h>
+#include <test_lib.h>
+#include <t_syslog.h>
+#include "kernel_cfg.h"
+#include "test_utm1.h"
+
+#define	NO_LOOP		ULONG_C(100000)
+
+SYSUTM	recent_sysutm;
+char	*recent_sysutm_pos;
+uint_t	cyclic_count;
+
+void
+cyclic_handler(intptr_t exinf)
+{
+	SYSUTM		sysutm, prev_sysutm;
+	char		*prev_sysutm_pos;
+
+	iloc_cpu();
+	get_utm(&sysutm);
+	prev_sysutm = recent_sysutm;
+	prev_sysutm_pos = recent_sysutm_pos;
+	recent_sysutm = sysutm;
+	recent_sysutm_pos = "CYC";
+	iunl_cpu();
+
+	if (prev_sysutm > sysutm) {
+		syslog(LOG_NOTICE,
+				"system performance time goes back: %ld(%s) %ld(CYC)",
+				((long_t) prev_sysutm), prev_sysutm_pos, ((ulong_t) sysutm));
+	}
+	cyclic_count += 1;
+}
+
+void
+main_task(intptr_t exinf)
+{
+	SYSUTM		sysutm, prev_sysutm;
+	char		*prev_sysutm_pos;
+	ulong_t		i;
+
+	cyclic_count = 0U;
+	get_utm(&recent_sysutm);
+	syslog(LOG_NOTICE, "system performance time test starts.");
+
+	for (i = 0; i < NO_LOOP; i++) {
+		loc_cpu();
+		get_utm(&sysutm);
+		prev_sysutm = recent_sysutm;
+		prev_sysutm_pos = recent_sysutm_pos;
+		recent_sysutm = sysutm;
+		recent_sysutm_pos = "TSK";
+		unl_cpu();
+
+		if (prev_sysutm > sysutm) {
+			syslog(LOG_NOTICE,
+				"system performance time goes back: %ld(%s) %ld(TSK)",
+				((long_t) prev_sysutm), prev_sysutm_pos, ((ulong_t) sysutm));
+		}
+	}
+
+	syslog(LOG_NOTICE, "system performance time test finishes.");
+	syslog(LOG_NOTICE, "number of cyclic handler execution: %d", cyclic_count);
+	test_finish();
+}
Index: rtos_arduino/trunk/asp_1.9.2/test/test_utm1.cfg
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_utm1.cfg	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_utm1.cfg	(revision 136)
@@ -0,0 +1,16 @@
+/*
+ *  $Id: test_utm1.cfg 1746 2010-02-11 18:18:25Z ertl-hiro $
+ */
+
+/*
+ *  get_utmã«é¢ãããã¹ã(1)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("target_timer.cfg");
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
+INCLUDE("syssvc/serial.cfg");
+
+#include "test_utm1.h"
+
+CRE_CYC(CYC1, { TA_STA, 0, cyclic_handler, 2, 1 });
+CRE_TSK(MAIN_TASK, { TA_ACT, 0, main_task, MAIN_PRIORITY, STACK_SIZE, NULL });
Index: rtos_arduino/trunk/asp_1.9.2/test/test_utm1.h
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/test/test_utm1.h	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/test/test_utm1.h	(revision 136)
@@ -0,0 +1,85 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2006-2010 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id: test_utm1.h 1746 2010-02-11 18:18:25Z ertl-hiro $
+ */
+
+/*
+ *		get_utmã«é¢ãããã¹ã(1)
+ */
+
+/*
+ *  ã¿ã¼ã²ããä¾å­ã®å®ç¾©
+ */
+#include "target_test.h"
+
+/*
+ *  åã¿ã¹ã¯ã®åªå
+åº¦ã®å®ç¾©
+ */
+#define MAIN_PRIORITY	10
+
+/*
+ *  ã¿ã¼ã²ããã«ä¾å­ããå¯è½æ§ã®ããå®æ°ã®å®ç¾©
+ */
+#ifndef STACK_SIZE
+#define	STACK_SIZE		4096		/* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãµã¤ãº */
+#endif /* STACK_SIZE */
+
+/*
+ *  é¢æ°ã®ãã­ãã¿ã¤ãå®£è¨
+ */
+#ifndef TOPPERS_MACRO_ONLY
+
+extern void	cyclic_handler(intptr_t exinf);
+extern void	main_task(intptr_t exinf);
+
+#endif /* TOPPERS_MACRO_ONLY */
Index: rtos_arduino/trunk/asp_1.9.2/utils/applyrename
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/utils/applyrename	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/utils/applyrename	(revision 136)
@@ -0,0 +1,134 @@
+#! /usr/bin/perl
+#
+#  TOPPERS Software
+#      Toyohashi Open Platform for Embedded Real-Time Systems
+# 
+#  Copyright (C) 2003 by Embedded and Real-Time Systems Laboratory
+#                              Toyohashi Univ. of Technology, JAPAN
+#  Copyright (C) 2004-2011 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  @(#) $Id: applyrename 2253 2011-09-11 01:23:40Z ertl-hiro $
+# 
+
+#
+#  ãã¡ã¤ã«ã«ãªãã¼ã ãé©ç¨ãã
+#
+sub applyrename
+{
+	local($infile) = @_;
+	local($outfile) = $infile.".new";
+	local($line);
+
+	open(INFILE, "< ".$infile) || die;
+	open(OUTFILE, "> ".$outfile) || die;
+
+	while ($line = <INFILE>) {
+		$line =~ s/\b(_?)($syms)\b/$1_kernel_$2/gc;
+		print OUTFILE $line;
+	}
+
+	close(INFILE);
+	close(OUTFILE);
+
+	if (`cmp $infile $outfile`) {
+		rename($infile, $infile.".bak");
+		rename($outfile, $infile);
+		print STDERR "Modified: ",$infile,"\n";
+	}
+	else {
+		unlink($outfile);
+	}
+}
+
+#
+#  ã¨ã©ã¼ãã§ãã¯
+#
+if ($#ARGV < 1) {
+	die "Usage: appyrename <prefix> <filelist>\n";
+}
+
+#
+#  åæå
+#
+@syms = ();
+$name = $ARGV[0];
+
+#
+#  ã·ã³ãã«ãªã¹ããèª­ã¿è¾¼ã
+#
+$deffile = $name."_rename.def";
+open(INFILE, $deffile) || die "Cannot open $deffile";
+while ($line = <INFILE>) {
+	chomp $line;
+	if ($line =~ /^#(.*)$/) {
+		# do nothing
+	}
+	elsif ($line =~ /^INCLUDE[ \t]+(.*)$/) {
+		# do nothing
+	}
+	elsif ($line ne "") {
+		@syms = (@syms, $line)
+	}
+}
+close(INFILE);
+
+#
+#  æ­£è¦è¡¨ç¾ãä½ã
+#
+$syms = join("|", @syms);
+
+#
+#  ãã¡ã¤ã«ã«ãªãã¼ã ãé©ç¨ãã
+#
+shift @ARGV;
+foreach $infile (@ARGV) {
+	# ãã¡ã¤ã«ã§ãªããã°ã¹ã­ãã
+	next unless (-f $infile);
+
+	applyrename($infile) if ($infile ne $deffile);
+}
Index: rtos_arduino/trunk/asp_1.9.2/utils/genoffset
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/utils/genoffset	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/utils/genoffset	(revision 136)
@@ -0,0 +1,287 @@
+#! /usr/bin/perl
+#
+#  TOPPERS Software
+#      Toyohashi Open Platform for Embedded Real-Time Systems
+# 
+#  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+#                              Toyohashi Univ. of Technology, JAPAN
+#  Copyright (C) 2004-2011 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  @(#) $Id: genoffset 2253 2011-09-11 01:23:40Z ertl-hiro $
+# 
+
+#
+#  åæå
+#
+$infile = $ARGV[0];
+$sil_endian = "";
+
+#
+#  è§£éã§ãããã£ã¬ã¯ãã£ãã®ãã¼ãã«
+#
+%directives = (
+	"long", "",
+	"dword", "",
+	"word", "",
+	"hword", "",
+	"int", "",
+	"short", "",
+	"half", "",
+	"byte", "",
+	"value", "",
+	"uaword", "",
+	"uashort", "",
+	"data32", 4,
+	"data16", 2,
+	"data8", 1,
+	"zero", -1,
+	"space", -1,
+	"globl", 0,
+	"global", 0,
+	"align", 0,
+	"p2align", 0,
+	"even", 0,
+	"data", 0,
+	"stabs", 0,
+	"type", 0,
+	"size", 0,
+	"section", 0,
+	"sdata", 0,
+	"code", 0,
+);
+
+#
+#  ãªãã»ããå¤ã®åºå
+#
+sub parse_offset {
+	my($label, $val) = @_;
+
+	printf "#define %s\t%d\n",$label,$val;
+}
+
+#
+#  ãã£ã¬ã¯ãã£ãã®èª­ã¿åã
+#
+sub ref_bit {
+	my($size) = @_;
+	my($dir, $directive);
+
+	while ($line = <INFILE>) {
+		chomp $line;
+		next if ($line =~ /^[ \t]*[#;].*$/);
+
+		if ($line =~ /[ \t]*\.([a-zA-Z0-9]+)[ \t]*([^ \t]*)[ \t]*/
+						&& defined($dir = $directives{$1})) {
+			$directive = $1;
+			if ($dir eq "") {
+				# ç»é²ãã¹ããã£ã¬ã¯ãã£ã
+				$directives{$directive} = $size;
+			}
+			last;
+		}
+		else {
+			# è§£æã§ããªãè¡
+			print STDERR "genoffset: cannot parse: $line\n";
+			$error = 1;
+		}
+	}
+}
+
+#
+#  ããããµã¼ã
+#
+sub search_bit {
+	my($val) = @_;
+	my($val_bit);
+
+	return(-1) if ($val == 0);
+
+	$val_bit = 0;
+	while (($val & 1) == 0) {
+		$val >>= 1;
+		$val_bit++;
+	}
+	return($val_bit);
+}
+
+#
+#  ãããä½ç½®ã®åºå
+#
+sub parse_bit {
+	my($endian, $size, $label) = @_;
+	my($offset, $dir, $val, $val_bit);
+
+	if ($sil_endian && $endian ne $sil_endian) {
+		# ã¨ã³ãã£ã¢ã³ã®ä¸ä¸è´
+		print STDERR "genoffset: endian mismatch: $line\n";
+		$error = 1;
+	}
+
+	$offset = 0;
+	while ($line = <INFILE>) {
+		chomp $line;
+		next if ($line =~ /^[ \t]*[#;].*$/);
+
+		if ($line =~ /[ \t]*\.([a-zA-Z0-9]+)[ \t]*([^ \t]*)[ \t]*/
+						&& defined($dir = $directives{$1})) {
+			$val = $2;
+
+			# 16é²æ°ã¨8é²æ°ã®æ°å¤ã¸ã®å¤æå¦ç
+			if ($val =~ /^0x(.+)$/) {
+				$val = hex($1);
+			}
+			elsif ($val =~ /^0(.+)$/) {
+				$val = oct($1);
+			}
+
+			if ($dir eq "") {
+				# ãµã¤ãºãç¥ããªããã£ã¬ã¯ãã£ã
+				print STDERR "genoffset: unknown directive: $line\n";
+				$error = 1;
+			}
+			elsif ($dir == 0) {
+				# èª­ã¿é£ã°ãã¹ããã£ã¬ã¯ãã£ã
+			}
+			elsif ($dir == -1) {
+				# .zeroãã£ã¬ã¯ãã£ãã®å¦ç
+				$offset += $val;
+			}
+			elsif ($val == 0) {
+				# å¤ã0ã®ãã£ã¼ã«ãã®å¦ç
+				$offset += $dir;
+			}
+			else {
+				# å¤ã0ã§ãªããã£ã¼ã«ããè¦ã¤ããã°ã«ã¼ããçµäº
+				last;
+			}
+		}
+		else {
+			# è§£æã§ããªãè¡
+			print STDERR "genoffset: cannot parse: $line\n";
+			$error = 1;
+		}
+	}
+
+	# ãããä½ç½®ãæ¢ã
+	$val_bit = search_bit($val);
+
+	# ãã¤ãåä½ã«æç®ãã
+	if ($endian eq "B") {
+		$offset += $dir - 1;
+		$offset -= $val_bit >> 3;
+	}
+	else {
+		$offset += $val_bit >> 3;
+	}
+	$val_bit &= 0x07;
+
+	# åºååä½ã«æç®ãã
+	if ($size eq "W") {
+		if ($endian eq "B") {
+			$val_bit += 24;
+			$val_bit -= ($offset & 0x03) << 3;
+		}
+		else {
+			$val_bit += ($offset & 0x03) << 3;
+		}
+		$offset &= ~0x03;
+	}
+	elsif ($size eq "H") {
+		if ($endian eq "B") {
+			$val_bit += 8;
+			$val_bit -= ($offset & 0x01) << 3;
+		}
+		else {
+			$val_bit += ($offset & 0x01) << 3;
+		}
+		$offset &= ~0x01;
+	}
+
+	# å®ç¾©ã®åºå
+	$label =~ s/^_//;
+	printf "#define %s\t%d\n",$label,$offset;
+	printf "#define %s_bit\t%d\n",$label,$val_bit;
+	printf "#define %s_mask\t0x%x\n",$label,(1 << $val_bit);
+}
+
+#
+#  ã¡ã¤ã³ã«ã¼ãã³
+#
+print "/* This file is generated by genoffset. */\n";
+print "\n";
+
+$error = 0;
+open(INFILE, $infile) || die "Cannot open $infile";
+while ($line = <INFILE>) {
+	chomp $line;
+
+	if ($line =~ /^[ \t]*OFFSET_DEF ([^ \t]+) = [#\$]?([^ \t]+)/) {
+		parse_offset($1, $2);
+	}
+	elsif ($line =~ /^[ \t]*_?BIT_REF_([0-9]+):/) {
+		ref_bit($1);
+	}
+	elsif ($line =~ /^[ \t]*SIL_ENDIAN = ([BL])/) {
+		$sil_endian = $1;
+	}
+}
+#
+#  ã³ã³ãã¤ã©ãã°ã­ã¼ãã«å¤æ°ã®é
+ç½®é åºãå¤æ´ããã¨ï¼BIT_REF_?ãä¸ã«ãª
+#  ãå¯è½æ§ãããããï¼é ­ããèª­ã¿ç´ãï¼
+#
+seek(INFILE, 0, SEEK_SET);
+while ($line = <INFILE>) {
+	chomp $line;
+
+	if ($line =~ /^[ \t]*_?BIT_([BL])([BHW])_([^ \t]+):/) {
+		parse_bit($1, $2, $3);
+	}
+}
+close(INFILE);
+exit($error);
Index: rtos_arduino/trunk/asp_1.9.2/utils/genrename
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/utils/genrename	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/utils/genrename	(revision 136)
@@ -0,0 +1,265 @@
+#! /usr/bin/perl
+#
+#  TOPPERS Software
+#      Toyohashi Open Platform for Embedded Real-Time Systems
+# 
+#  Copyright (C) 2003 by Embedded and Real-Time Systems Laboratory
+#                              Toyohashi Univ. of Technology, JAPAN
+#  Copyright (C) 2005-2011 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  @(#) $Id: genrename 2253 2011-09-11 01:23:40Z ertl-hiro $
+# 
+
+#
+#  å
+é ­ã«ã¤ããæå­å
+#
+sub prefix_string {
+	local($sym) = @_;
+
+	if ($sym =~ /[a-z]/) {
+		return("_kernel_");
+	}
+	else {
+		return("_KERNEL_");
+	}
+}
+
+#
+#  ãªãã¼ã å®ç¾©ãçæãã
+#
+sub generate_define
+{
+	local($sym, $prefix) = @_;
+
+	print FILE "#define ",$prefix,$sym;
+	print FILE "\t" if (length($prefix.$sym) < 4);
+	print FILE "\t" if (length($prefix.$sym) < 8);
+	print FILE "\t" if (length($prefix.$sym) < 12);
+	print FILE "\t" if (length($prefix.$sym) < 16);
+	print FILE "\t" if (length($prefix.$sym) < 20);
+	print FILE "\t" if (length($prefix.$sym) < 24);
+	print FILE "\t",$prefix,prefix_string($sym),$sym,"\n";
+}
+
+#
+#  ãªãã¼ã è§£é¤ãçæãã
+#
+sub generate_undef
+{
+	local($sym, $prefix) = @_;
+
+	print FILE "#undef ",$prefix,$sym,"\n";
+}
+
+#
+#  ã¤ã³ã¯ã«ã¼ããã£ã¬ã¯ãã£ããçæãã
+#
+sub generate_include
+{
+	local($file, $prefix) = @_;
+
+	$file =~ s/([>"])$/_$prefix.h$1/;
+	$includes .= "#include ".$file."\n";
+}
+
+#
+#  ã¨ã©ã¼ãã§ãã¯
+#
+if ($#ARGV != 0) {
+	die "Usage: genrename <prefix>\n";
+}
+
+#
+#  åæå
+#
+@syms = ();
+$name = $ARGV[0];
+$NAME = $name; $NAME =~ y/a-z/A-Z/;
+
+$infile = $name."_rename.def";
+$header_defsym = "TOPPERS_".$NAME."_RENAME_H";
+
+#
+#  ã·ã³ãã«ãªã¹ããèª­ã¿è¾¼ã
+#
+open(INFILE, $infile) || die "Cannot open $infile";
+while ($line = <INFILE>) {
+	chomp $line;
+	@syms = (@syms, $line);
+}
+close(INFILE);
+
+#
+#  ???_rename.h ãçæãã
+#
+$includes = "";
+$file = $name."_rename.h";
+open(FILE, "> ".$file);
+
+print FILE <<END;
+/* This file is generated from $infile by genrename. */
+
+#ifndef $header_defsym
+#define $header_defsym
+
+END
+
+foreach $sym (@syms) {
+	if ($sym =~ /^#(.*)$/) {
+		print FILE "/*\n";
+		print FILE " * ",$1,"\n";
+		print FILE " */\n";
+	}
+	elsif ($sym =~ /^INCLUDE[ \t]+(.*)$/) {
+		generate_include($1, "rename");
+	}
+	elsif ($sym ne "") {
+		generate_define($sym, "");
+	}
+	else {
+		print FILE "\n";
+	}
+}
+
+print FILE <<END;
+
+#ifdef TOPPERS_LABEL_ASM
+
+END
+
+foreach $sym (@syms) {
+	if ($sym =~ /^#(.*)$/) {
+		print FILE "/*\n";
+		print FILE " * ",$1,"\n";
+		print FILE " */\n";
+	}
+	elsif ($sym =~ /^INCLUDE[ \t]+(.*)$/) {
+		# do nothing
+	}
+	elsif ($sym ne "") {
+		generate_define($sym, "_");
+	}
+	else {
+		print FILE "\n";
+	}
+}
+
+print FILE <<END;
+
+#endif /* TOPPERS_LABEL_ASM */
+
+$includes
+#endif /* $header_defsym */
+END
+
+#
+#  ???_unrename.h ãçæãã
+#
+$includes = "";
+$file = $name."_unrename.h";
+open(FILE, "> ".$file);
+
+print FILE <<END;
+/* This file is generated from $infile by genrename. */
+
+/* This file is included only when $name\_rename.h has been included. */
+#ifdef $header_defsym
+#undef $header_defsym
+
+END
+
+foreach $sym (@syms) {
+	if ($sym =~ /^#(.*)$/) {
+		print FILE "/*\n";
+		print FILE " * ",$1,"\n";
+		print FILE " */\n";
+	}
+	elsif ($sym =~ /^INCLUDE[ \t]+(.*)$/) {
+		generate_include($1, "unrename");
+	}
+	elsif ($sym ne "") {
+		generate_undef($sym, "");
+	}
+	else {
+		print FILE "\n";
+	}
+}
+
+print FILE <<END;
+
+#ifdef TOPPERS_LABEL_ASM
+
+END
+
+foreach $sym (@syms) {
+	if ($sym =~ /^#(.*)$/) {
+		print FILE "/*\n";
+		print FILE " * ",$1,"\n";
+		print FILE " */\n";
+	}
+	elsif ($sym =~ /^INCLUDE[ \t]+(.*)$/) {
+		# do nothing
+	}
+	elsif ($sym ne "") {
+		generate_undef($sym, "_");
+	}
+	else {
+		print FILE "\n";
+	}
+}
+
+print FILE <<END;
+
+#endif /* TOPPERS_LABEL_ASM */
+
+$includes
+#endif /* $header_defsym */
+END
+
+close(FILE);
Index: rtos_arduino/trunk/asp_1.9.2/utils/gentest
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/utils/gentest	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/utils/gentest	(revision 136)
@@ -0,0 +1,379 @@
+#! /usr/bin/perl
+#
+#  TOPPERS Software
+#      Toyohashi Open Platform for Embedded Real-Time Systems
+# 
+#  Copyright (C) 2007-2014 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  $Id: gentest 2588 2014-01-02 05:07:24Z ertl-hiro $
+# 
+
+#
+#		ãã¹ããã­ã°ã©ã çæãã¼ã«
+#
+
+use open ":encoding(euc-jp)";
+use encoding "euc-jp";
+
+$infile = $ARGV[0];
+
+%parampos = (
+	"get_pri" => 2,
+	"get_inf" => 1,
+	"ref_tsk" => 2,
+	"ref_tex" => 2,
+	"ref_sem" => 2,
+	"ref_flg" => 2,
+	"ref_dtq" => 2,
+	"ref_pdq" => 2,
+	"ref_mbx" => 2,
+	"ref_mtx" => 2,
+	"ref_mbf" => 2,
+	"ref_mpf" => 2,
+	"get_tim" => 1,
+	"get_utm" => 1,
+	"ref_cyc" => 2,
+	"ref_alm" => 2,
+	"get_tid" => 1,
+	"iget_tid" => 1,
+	"get_ipm" => 1,
+);
+
+%paramtype = (
+	"get_pri" => "PRI",
+	"get_inf" => "intptr_t",
+	"ref_tsk" => "T_RTSK",
+	"ref_tex" => "T_RTEX",
+	"ref_sem" => "T_RSEM",
+	"ref_flg" => "T_RFLG",
+	"ref_dtq" => "T_RDTQ",
+	"ref_pdq" => "T_RPDQ",
+	"ref_mbx" => "T_RMBX",
+	"ref_mtx" => "T_RMTX",
+	"ref_mbf" => "T_RMBF",
+	"ref_mpf" => "T_RMPF",
+	"get_tim" => "SYSTIM",
+	"get_utm" => "SYSUTM",
+	"ref_cyc" => "T_RCYC",
+	"ref_alm" => "T_RALM",
+	"get_tid" => "ID",
+	"iget_tid" => "ID",
+	"get_ipm" => "PRI",
+);
+
+$last_check_point = 0;
+
+sub gen_var_def {
+	local($svc_call) = @_;
+	local($svcname, @params);
+	local($typename, $varname);
+
+	if ($svc_call =~ /^([a-z_]+)\((.*)\)$/) {
+		$svcname = $1;
+		@params = split(/\s*,\s*/, $2);
+
+		if ($parampos{$svcname}) {
+			$varname = $params[@parampos{$svcname} - 1];
+			$varname =~ s/^\&//;
+			$typename = $paramtype{$svcname};
+			${$TASKVAR{$tskid}}{$typename} = ${varname};
+		}
+	}
+}
+
+sub gen_svc_call {
+	local($svc_call, $error_code_string) = @_;
+	local($error_code);
+
+	${$TASKVAR{$tskid}}{"ER_UINT"} = "ercd";
+
+	push(@{$TASKCODE{$tskid}{$tskcnt}}, sprintf("\tercd = %s;", $svc_call));
+	gen_var_def($svc_call);
+
+	if ($error_code_string eq "") {
+		push(@{$TASKCODE{$tskid}{$tskcnt}},
+								sprintf("\tcheck_ercd(ercd, E_OK);"), "");
+	}
+	elsif ($error_code_string =~ /^\-\>\s*noreturn$/) {
+		push(@{$TASKCODE{$tskid}{$tskcnt}}, "");
+	}
+	else {
+		$error_code = $error_code_string;
+		$error_code =~ s/^\-\>\s*([A-Za-z0-9_]*)$/$1/;
+		push(@{$TASKCODE{$tskid}{$tskcnt}},
+						sprintf("\tcheck_ercd(ercd, %s);", $error_code), "");
+	}
+}
+
+sub parse_line {
+	local($line) = @_;
+
+	while ($line =~ s/\\$//) {
+		$line1 = <INFILE>;
+		$output_line .= $line1;
+		chomp $line1;
+		$line1 =~ s/^\s*\*\s*//;
+		$line1 =~ s/\s*\/\/.*$//;
+		$line1 =~ s/\s*\.\.\..*$//;
+		$line .= $line1;
+	}
+
+	if ($line =~ /^\.\./) {
+		# do nothing.
+	}
+	elsif ($line =~ /^==\s*((TASK|ALM|CPUEXC|EXTSVC)[0-9]*)(.*)$/) {
+		$procflag = 1;
+		$tskid = $1;
+		$line2 = $3;
+		if ($line2 =~ /^\-TEX(.*)$/) {
+			$tskid = $tskid."-TEX";
+			$line2 = $1;
+		}
+		if ($line2 =~ /^\-([0-9]+)(.*)$/) {
+			$tskcnt = $1;
+			if (!$TASKCOUNTVAR{$tskid}) {
+				if ($tskid =~ /^TASK([0-9]*)$/) {
+					$countvar = "task$1_count";
+				}
+				elsif ($tskid =~ /^TASK([0-9]*)-TEX$/) {
+					$countvar = "tex_task$1_count";
+				}
+				elsif ($tskid =~ /^ALM([0-9]*)$/) {
+					$countvar = "alarm$1_count";
+				}
+				elsif ($tskid =~ /^CPUEXC([0-9]*)$/) {
+					$countvar = "cpuexc$1_count";
+				}
+				elsif ($tskid =~ /^EXTSVC([0-9]*)$/) {
+					$countvar = "extsvc$1_count";
+				}
+				$TASKCOUNTVAR{$tskid} = $countvar;
+			}
+		}
+		else {
+			$tskcnt = "";
+		}
+		if ($startflag) {
+			push(@{$TASKCODE{$tskid}{$tskcnt}}, "\ttest_start(__FILE__);");
+			push(@{$TASKCODE{$tskid}{$tskcnt}}, "");
+			$startflag = 0;
+		}
+	}
+	elsif (!$procflag) {
+		# do nothing.
+	}
+	elsif ($line =~ /^([0-9]+\:)\s*END$/) {
+		$check_str = $1;
+		$check_no = ++$last_check_point;
+		push(@{$TASKCODE{$tskid}{$tskcnt}},
+								sprintf("\tcheck_finish(%d);", $check_no));
+		$procflag = 0;
+		$output_line =~ s/$check_str/$check_no:/;
+	}
+	else {
+		if ($line =~ /^([0-9]+\:)\s*(.*)/) {
+			$check_str = $1;
+			$line = $2;
+			$check_no = ++$last_check_point;
+			push(@{$TASKCODE{$tskid}{$tskcnt}},
+								sprintf("\tcheck_point(%d);", $check_no));
+			$output_line =~ s/$check_str/$check_no:/;
+		}
+		if ($line =~ /^(assert\(.*\))$/) {
+			$assert_string = $1;
+			push(@{$TASKCODE{$tskid}{$tskcnt}},
+								sprintf("\tcheck_%s;", $assert_string), "");
+		}
+		elsif ($line =~ /^(state(_i)?\(.*\))$/) {
+			$state_string = $1;
+			push(@{$TASKCODE{$tskid}{$tskcnt}},
+								sprintf("\tcheck_%s;", $state_string), "");
+		}
+		elsif ($line =~ /^call\((.*)\)$/ || $line =~ /^DO\((.*)\)$/) {
+			$call_string = $1;
+			push(@{$TASKCODE{$tskid}{$tskcnt}},
+									sprintf("\t%s;", $call_string), "");
+		}
+		elsif ($line =~ /^MISSING$/) {
+			push(@{$TASKCODE{$tskid}{$tskcnt}}, "");
+		}
+		elsif ($line =~ /^RETURN((\(.*\))?)$/) {
+			$return_string = $1;
+			push(@{$TASKCODE{$tskid}{$tskcnt}},
+									"\treturn".$return_string.";", "");
+		}
+		elsif ($line =~ /^GOTO\((.*)\)$/) {
+			$goto_string = $1;
+			push(@{$TASKCODE{$tskid}{$tskcnt}},
+									sprintf("\tgoto %s;", $goto_string), "");
+		}
+		elsif ($line =~ /^LABEL\((.*)\)$/) {
+			$label_string = $1;
+			$indent_string = $indentstr;
+			$indent_string =~ s/\t$//;
+			push(@{$TASKCODE{$tskid}{$tskcnt}},
+									sprintf("%s:", $label_string));
+		}
+		elsif ($line =~ /^([a-z_]+\(.*\))\s*(\-\>\s*[A-Za-z0-9_]*)?\s*$/) {
+			$svc_call = $1;
+			$error_code_string = $2;
+			gen_svc_call($svc_call, $error_code_string);
+		}
+		else {
+			print STDERR "Error: ",$line,"\n";
+		}
+	}
+}
+
+#
+#  ã¹ã¯ãªãããã¡ã¤ã«èª­è¾¼ã¿å¦ç
+#
+$procflag = 0;
+$startflag = 1;
+$outflag = 1;
+open(INFILE, $infile) || die "Cannot open $infile";
+while (($line = <INFILE>) && $outflag) {
+	$output_line = $line;
+	chomp $line;
+	$line =~ s/^\s*\*\s*//;
+	$line =~ s/\s*\/\/.*$//;
+	$line =~ s/\s*\.\.\..*$//;
+	if ($line) {
+		parse_line($line);
+	}
+	print $output_line;
+	if ($output_line =~ /DO NOT DELETE THIS LINE/) {
+		$outflag = 0;
+	}
+}
+close(INFILE);
+
+#
+#  ã¿ã¹ã¯ã®å¤æ°å®ç¾©ã®ã³ã¼ãåºå
+#
+sub output_task_vardef {
+	my($tskid) = @_;
+
+	foreach my $typename (keys(%{$TASKVAR{$tskid}})) {
+		print "\t",$typename, (length($typename) < 4 ? "\t\t" : "\t"),
+								${$TASKVAR{$tskid}}{$typename},";\n";
+	}
+}
+
+#
+#  ã¿ã¹ã¯æ¬ä½ã®ã³ã¼ãåºå
+#
+sub output_task_body {
+	my($tskid) = @_;
+
+	foreach my $tskcnt (sort {$a <=> $b} (keys(%{$TASKCODE{$tskid}}))) {
+		printf "\tcase %d:\n", $tskcnt;
+		foreach my $line (@{$TASKCODE{$tskid}{$tskcnt}}) {
+			print "\t",$line if ($line);
+			print "\n";
+		}
+		printf "\t\tcheck_point(0);\n\n";
+	}
+}
+
+#
+#  ã¿ã¹ã¯ã³ã¼ãã®åºå
+#
+sub output_task {
+	if ($TASKCOUNTVAR{$tskid}) {
+		printf "\nstatic uint_t\t%s = 0;\n", $TASKCOUNTVAR{$tskid};
+	}
+	if ($tskid =~ /^TASK([0-9]*)$/) {
+		print "\nvoid\n";
+		print "task$1(intptr_t exinf)\n";
+	}
+	elsif ($tskid =~ /^TASK([0-9]*)-TEX$/) {
+		print "\nvoid\n";
+		print "tex_task$1(TEXPTN texptn, intptr_t exinf)\n";
+	}
+	elsif ($tskid =~ /^ALM([0-9]*)$/) {
+		print "\nvoid\n";
+		print "alarm$1_handler(intptr_t exinf)\n";
+	}
+	elsif ($tskid =~ /^CPUEXC([0-9]*)$/) {
+		print "\nvoid\n";
+		print "cpuexc$1_handler(void *p_excinf)\n";
+	}
+	elsif ($tskid =~ /^EXTSVC([0-9]*)$/) {
+		print "\nER_UINT\n";
+		print "extsvc$1_routine(intptr_t par1, intptr_t par2, intptr_t par3,\n";
+		print "\t\t\t\t\t\t\t\tintptr_t par4, intptr_t par5, ID cdmid)\n";
+	}
+	print "{\n";
+	output_task_vardef($tskid);
+	print "\n";
+	if ($TASKCOUNTVAR{$tskid}) {
+		printf "\tswitch (++%s) {\n", $TASKCOUNTVAR{$tskid};
+		output_task_body($tskid);
+		printf "\tdefault:\n";
+		printf "\t\tcheck_point(0);\n";
+		printf "\t}\n";
+	}
+	else {
+		foreach my $line (@{$TASKCODE{$tskid}{""}}) {
+			print $line,"\n";
+		}
+	}
+	print "\tcheck_point(0);\n";
+	if ($tskid =~ /^EXTSVC([0-9]*)$/) {
+		print "\treturn(E_SYS);\n";
+	}
+	print "}\n";
+}
+
+#
+#  ãã¹ããã­ã°ã©ã åºåå¦ç
+#
+foreach $tskid (sort(keys(%TASKCODE))) {
+	output_task();
+}
Index: rtos_arduino/trunk/asp_1.9.2/utils/makedep
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/utils/makedep	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/utils/makedep	(revision 136)
@@ -0,0 +1,194 @@
+#! /usr/bin/perl
+#
+#  TOPPERS Software
+#      Toyohashi Open Platform for Embedded Real-Time Systems
+# 
+#  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
+#                              Toyohashi Univ. of Technology, JAPAN
+#  Copyright (C) 2004-2013 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  @(#) $Id: makedep 2510 2013-05-02 08:12:32Z ertl-hiro $
+# 
+
+use Getopt::Std;
+
+#  ãªãã·ã§ã³ã®å®ç¾©
+#
+#  -C <cc_path>		Cã³ã³ãã¤ã©ã®ã³ãã³ãå
+#  -O <cc_opts>		Cã³ã³ãã¤ã©/CPPã«æ¸¡ããªãã·ã§ã³
+#  -X				ã½ã¼ã¹ãã¡ã¤ã«ãå¼·å¶çã«Cããããã¡ã¤ã«ã¨è¦ãªã
+#
+#  -T <target>		ã¿ã¼ã²ããåï¼ã®ãªã¹ãï¼
+#  -D <t_dir>		ã¿ã¼ã²ããã®ãã£ã¬ã¯ããªåãæå®ããï¼-Tãç¨ããå ´
+#					åã¯ç¡å¹ï¼
+#  -d				ã¿ã¼ã²ããã®ãã£ã¬ã¯ããªé¨ãä¿æããï¼-Tãç¨ããå ´
+#					åã¯ç¡å¹ï¼
+#  -S				è¤æ°ã®ã¿ã¼ã²ãããããä¾å­ã«ã¼ã«ãï¼ã¿ã¼ã²ããæ¯ã«
+#					åå²ããï¼ããããªãã¨å¯¾å¿ã§ããªãmakeããããããï¼
+#
+#  -R <dirname>		Cygwinç°å¢ã«ãããã«ã¼ããã£ã¬ã¯ããªåãæå®ãã
+#					ï¼ããã©ã«ãã¯cygdriveï¼
+
+#
+#  ãªãã·ã§ã³ã®å¦ç
+#
+getopt("COTDR");
+
+$cc_path = $opt_C;
+$cc_opts = $opt_O;
+
+if ($opt_T) {
+	$target_name = $opt_T;
+}
+elsif ($opt_D) {
+	$target_dir = $opt_D;
+}
+elsif (!$opt_d) {
+	$target_dir = "";
+}
+
+if ($opt_R) {
+	$cygwin_root = $opt_R;
+}
+else {
+	$cygwin_root = "cygdrive";
+}
+
+#
+#  Cygwinç°å¢ã®å¤å¥
+#
+if ($^O eq 'cygwin') {
+	$cygwin = 1;
+}
+
+#
+#  %dependlist ã«ä½ãããä¾å­é¢ä¿ãåºåãã
+#
+sub output_dependlist {
+	local($target) = @_;
+	local($column, $len, $file);
+
+	print $target, ": ";
+	$column = length($target) + 2;
+
+	foreach $file (keys(%dependlist)) {
+		$len = length($file) + 1;
+		if ($column > 8 && $column + $len >= 70) {
+			print "\\\n\t";
+			$column = 8;
+		}
+		$column += $len;
+		print "$file ";
+	}
+	print "\n";
+}
+
+#
+#  $file ã®ä¾å­é¢ä¿ã %dependlist ã«ä½ã
+#
+sub makedepend_one {
+	local($file) = @_;
+	local($command, $input, $dir, $filename);
+
+	$command = "$cc_path -E $cc_opts";
+	if ($opt_X) {
+		$command .= " -x c-header";
+	}
+	unless (open(INPUT, "$command $file |")) {
+		print STDERR "makedep: can't open $file\n";
+		exit(1);
+	}
+	while ($line = <INPUT>) {
+		if ($line =~ /^\#[a-zA-Z]*\s*([0-9]+)\s*\"([^\"]+)\"/) {
+			$filename = $2;
+			$filename =~ s/ /\\ /g;
+			if ($filename !~ /^\<.*\>$/ && $filename !~ /\/$/) {
+				if ($cygwin) {
+					$filename =~ s/\\\\/\//g;
+					$filename =~ s/^([a-zA-Z]):/\/$cygwin_root\/$1/;
+				}
+				$dependlist{$filename} = 1;
+			}
+		}
+	}
+	unless (close(INPUT)) {
+		print STDERR "makedep: can't execute $command\n";
+		exit(1);
+	}
+}
+
+#
+#  ã¡ã¤ã³ã«ã¼ãã³
+#
+foreach $file (@ARGV) {
+	%dependlist = ();
+	makedepend_one($file);
+	if (%dependlist) {
+		if ($target_name) {
+			if ($opt_S) {
+				foreach $target (split(/[ \t]+/, $target_name)) {
+					output_dependlist($target);
+				}
+			}
+			else {
+				output_dependlist($target_name);
+			}
+		}
+		else {
+			$target = $file;
+			$target =~ s/(.*)\.(.*)/$1.o/;
+			if (defined($target_dir)) {
+				$target =~ s/^.*\/([^\/]+)$/$1/;
+				if ($target_dir) {
+					$target = $target_dir."/".$target;
+				}
+			}
+			output_dependlist($target);
+		}
+	}
+}
Index: rtos_arduino/trunk/asp_1.9.2/utils/makerelease
===================================================================
--- rtos_arduino/trunk/asp_1.9.2/utils/makerelease	(revision 136)
+++ rtos_arduino/trunk/asp_1.9.2/utils/makerelease	(revision 136)
@@ -0,0 +1,171 @@
+#! /usr/bin/perl
+#
+#  TOPPERS Software
+#      Toyohashi Open Platform for Embedded Real-Time Systems
+# 
+#  Copyright (C) 2006-2011 by Embedded and Real-Time Systems Laboratory
+#              Graduate School of Information Science, Nagoya Univ., JAPAN
+# 
+#  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+#  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+#  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+#  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+#      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+#      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+#  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+#      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+#      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+#      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+#      ã¨ï¼
+#    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+#        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+#    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+#        å ±åãããã¨ï¼
+#  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+#      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+#      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+#      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+#      å
+è²¬ãããã¨ï¼
+# 
+#  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+#  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+#  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+#  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+#  ã®è²¬ä»»ãè² ããªãï¼
+# 
+#  @(#) $Id: makerelease 2512 2013-05-19 06:15:05Z ertl-hiro $
+# 
+
+use Cwd;
+
+$cwd = getcwd();
+$cwd =~ s/^.*[\/\\]([^\/\\]+)$/$1/;
+$prefix = "./".$cwd;
+
+@file_list = ();
+%file_list = ();
+
+if ($#ARGV >= 0) {
+	$arg1 = $ARGV[0];
+	$arg1 =~ s/\.\///;
+}
+else {
+	$arg1 = "MANIFEST";
+}
+
+sub gen_path
+{
+	local($base, $path) = @_;
+
+	while ($path =~ /^..\/(.*)$/) {
+		$path = $1;
+		$base =~ s/(\/?)[^\/]*\/$/$1/;
+	}
+	return($base.$path);
+}
+
+sub read_file {
+	local($filename) = @_;
+	local($fh, $dirname);
+
+	if ($filename =~ /^(.*\/)[^\/]*$/) {
+		$dirname = $1;
+	}
+	else {
+		$dirname = "";
+	}
+
+	open($fh, $filename) || die "Cannot open $filename";
+	while ($line = <$fh>) {
+		chomp $line;
+		$line =~ s/\r$//;
+		$line =~ s/[ \t]*\#.*$//;
+		next if ($line =~ /^[ \t]*$/);
+
+		if ($line =~ /^E_PACKAGE[ \t]+(.*)$/) {
+			if ($package) {
+				die "Duplicated E_PACKAGE directive.";
+			}
+			else {
+				$package = $1;
+				$e_package = 1;
+			}
+		}
+		elsif ($line =~ /^PACKAGE[ \t]+(.*)$/) {
+			if ($package) {
+				if (!$e_package && $package != $1) {
+					die "Inconsistent PACKAGE directive.";
+				}
+			}
+			else {
+				$package = $1;
+			}
+		}
+		elsif ($line =~ /^VERSION[ \t]+(.*)$/) {
+			if ($version) {
+				if (!$e_package && $version != $1) {
+					die "Inconsistent VERSION directive.";
+				}
+			}
+			else {
+				$version = $1;
+				if ($version =~ /%date/) {
+					@current_time = localtime();
+					$vdate = sprintf("%04d%02d%02d", $current_time[5]+1900,
+										$current_time[4]+1, $current_time[3]);
+					$version =~ s/%date/$vdate/;
+				}
+			}
+		}
+		elsif ($line =~ /^INCLUDE[ \t]+(.*)$/) {
+			read_file(gen_path($dirname, $1));
+		}
+		else {
+			$filename = $prefix."/".$dirname.$line;
+			while ($filename =~ s|/[^/]+/\.\./|/|) {}
+			if ($file_list{$filename}) {
+				die "$filename is duplicated.";
+			}
+			else {
+				push(@file_list, $filename);
+				$file_list{$filename} = $filename;
+			}
+		}
+	}
+	close($fh);
+}
+
+read_file($arg1);
+unless ($package) {
+	die "PACKAGE/E_PACKAGE directive not found.";
+}
+unless ($version) {
+	die "VERSION directive not found.";
+}
+
+if (! -d "RELEASE") {
+	mkdir("RELEASE");
+}
+
+$archive_name = $package."-".$version.".tar.gz";
+$file_list = join(" ", @file_list);
+$command = "tar cvfz RELEASE/$archive_name -C .. $file_list\n";
+die if (system($command));
+print STDERR "== RELEASE/$archive_name is generated. ==\n";
Index: rtos_arduino/trunk/examples/basic/Makefile
===================================================================
--- rtos_arduino/trunk/examples/basic/Makefile	(revision 136)
+++ rtos_arduino/trunk/examples/basic/Makefile	(revision 136)
@@ -0,0 +1,54 @@
+#
+#  ã¿ã¼ã²ããã®æå®ï¼Makefile.targetã§ä¸æ¸ããããã®ãé²ãããï¼
+#
+all:
+
+#
+#  ã¢ããªã±ã¼ã·ã§ã³ãã¡ã¤ã«
+#
+APPL_CXXOBJS += rca_app.o
+APPL_COBJS   += 
+APPL_CFG      = rca_app.cfg
+
+#
+#  Serialã®æ±ã
+#   ARDUINO_SERIAL
+#    NOUSE_SERIAL
+#    USE_SERIAL
+#    USE_SERIALUSB_AS_SERIAL
+#    USE_SERIAL5_AS_SERIAL
+#
+#ARDUINO_SERIAL = NOUSE_SERIAL
+ARDUINO_SERIAL = USE_SERIAL
+#ARDUINO_SERIAL = USE_SERIALUSB_AS_SERIAL
+#ARDUINO_SERIAL = USE_SERIAL5_AS_SERIAL
+
+#
+#  ã©ã¤ãã©ãªã®ä½¿ç¨
+#  
+#USE_ARDUINO_SPI = true
+#USE_ARDUINO_NCESCAN = true
+#USE_ARDUINO_SD  = true
+#USE_ARDUINO_TFT = true
+#USE_ETHERNET2 = true
+#USE_NAXESMOTION = true
+USE_ARDUINO_RTC = true
+
+#
+#  RCAã®ãã£ã¬ã¯ããªã®å®ç¾©
+#
+RCA_DIR = ../..
+
+#
+#  ASPã½ã¼ã¹ãã¡ã¤ã«ã®ãã£ã¬ã¯ããªã®å®ç¾©
+#
+SRCDIR = ../../asp_1.9.2
+
+#
+#  ãã®ä»ã®ãªãã·ã§ã³
+#
+APPL_CFLAGS =
+APPL_LIBS =
+APPL_DIR = 
+
+include $(RCA_DIR)/lib/Makefile.rca
Index: rtos_arduino/trunk/examples/basic/do_clean.bat
===================================================================
--- rtos_arduino/trunk/examples/basic/do_clean.bat	(revision 136)
+++ rtos_arduino/trunk/examples/basic/do_clean.bat	(revision 136)
@@ -0,0 +1,3 @@
+call ../do_path.bat
+make clean
+pause
Index: rtos_arduino/trunk/examples/basic/do_debug.bat
===================================================================
--- rtos_arduino/trunk/examples/basic/do_debug.bat	(revision 136)
+++ rtos_arduino/trunk/examples/basic/do_debug.bat	(revision 136)
@@ -0,0 +1,4 @@
+call ../do_path.bat
+make ocd
+make db
+taskkill /F /IM openocd.exe
Index: rtos_arduino/trunk/examples/basic/do_make.bat
===================================================================
--- rtos_arduino/trunk/examples/basic/do_make.bat	(revision 136)
+++ rtos_arduino/trunk/examples/basic/do_make.bat	(revision 136)
@@ -0,0 +1,3 @@
+call ../do_path.bat
+make all
+pause
Index: rtos_arduino/trunk/examples/basic/do_run.bat
===================================================================
--- rtos_arduino/trunk/examples/basic/do_run.bat	(revision 136)
+++ rtos_arduino/trunk/examples/basic/do_run.bat	(revision 136)
@@ -0,0 +1,2 @@
+call ../do_path.bat
+make run
Index: rtos_arduino/trunk/examples/basic/pitches.h
===================================================================
--- rtos_arduino/trunk/examples/basic/pitches.h	(revision 136)
+++ rtos_arduino/trunk/examples/basic/pitches.h	(revision 136)
@@ -0,0 +1,90 @@
+#define NOTE_B0  31
+#define NOTE_C1  33
+#define NOTE_CS1 35
+#define NOTE_D1  37
+#define NOTE_DS1 39
+#define NOTE_E1  41
+#define NOTE_F1  44
+#define NOTE_FS1 46
+#define NOTE_G1  49
+#define NOTE_GS1 52
+#define NOTE_A1  55
+#define NOTE_AS1 58
+#define NOTE_B1  62
+#define NOTE_C2  65
+#define NOTE_CS2 69
+#define NOTE_D2  73
+#define NOTE_DS2 78
+#define NOTE_E2  82
+#define NOTE_F2  87
+#define NOTE_FS2 93
+#define NOTE_G2  98
+#define NOTE_GS2 104
+#define NOTE_A2  110
+#define NOTE_AS2 117
+#define NOTE_B2  123
+#define NOTE_C3  131
+#define NOTE_CS3 139
+#define NOTE_D3  147
+#define NOTE_DS3 156
+#define NOTE_E3  165
+#define NOTE_F3  175
+#define NOTE_FS3 185
+#define NOTE_G3  196
+#define NOTE_GS3 208
+#define NOTE_A3  220
+#define NOTE_AS3 233
+#define NOTE_B3  247
+#define NOTE_C4  262
+#define NOTE_CS4 277
+#define NOTE_D4  294
+#define NOTE_DS4 311
+#define NOTE_E4  330
+#define NOTE_F4  349
+#define NOTE_FS4 370
+#define NOTE_G4  392
+#define NOTE_GS4 415
+#define NOTE_A4  440
+#define NOTE_AS4 466
+#define NOTE_B4  494
+#define NOTE_C5  523
+#define NOTE_CS5 554
+#define NOTE_D5  587
+#define NOTE_DS5 622
+#define NOTE_E5  659
+#define NOTE_F5  698
+#define NOTE_FS5 740
+#define NOTE_G5  784
+#define NOTE_GS5 831
+#define NOTE_A5  880
+#define NOTE_AS5 932
+#define NOTE_B5  988
+#define NOTE_C6  1047
+#define NOTE_CS6 1109
+#define NOTE_D6  1175
+#define NOTE_DS6 1245
+#define NOTE_E6  1319
+#define NOTE_F6  1397
+#define NOTE_FS6 1480
+#define NOTE_G6  1568
+#define NOTE_GS6 1661
+#define NOTE_A6  1760
+#define NOTE_AS6 1865
+#define NOTE_B6  1976
+#define NOTE_C7  2093
+#define NOTE_CS7 2217
+#define NOTE_D7  2349
+#define NOTE_DS7 2489
+#define NOTE_E7  2637
+#define NOTE_F7  2794
+#define NOTE_FS7 2960
+#define NOTE_G7  3136
+#define NOTE_GS7 3322
+#define NOTE_A7  3520
+#define NOTE_AS7 3729
+#define NOTE_B7  3951
+#define NOTE_C8  4186
+#define NOTE_CS8 4435
+#define NOTE_D8  4699
+#define NOTE_DS8 4978
+
Index: rtos_arduino/trunk/examples/basic/rca.atsln
===================================================================
--- rtos_arduino/trunk/examples/basic/rca.atsln	(revision 136)
+++ rtos_arduino/trunk/examples/basic/rca.atsln	(revision 136)
@@ -0,0 +1,22 @@
+﻿
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Atmel Studio Solution File, Format Version 11.00
+VisualStudioVersion = 14.0.23107.0
+MinimumVisualStudioVersion = 10.0.40219.1
+Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "rca", "rca.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.ActiveCfg = Debug|ARM
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.Build.0 = Debug|ARM
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.ActiveCfg = Release|ARM
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
Index: rtos_arduino/trunk/examples/basic/rca.componentinfo.xml
===================================================================
--- rtos_arduino/trunk/examples/basic/rca.componentinfo.xml	(revision 136)
+++ rtos_arduino/trunk/examples/basic/rca.componentinfo.xml	(revision 136)
@@ -0,0 +1,169 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Store xmlns:i="http://www.w3.org/2001/XMLSchema-instance" xmlns="AtmelPackComponentManagement">
+	<ProjectComponents>
+		<ProjectComponent z:Id="i1" xmlns:z="http://schemas.microsoft.com/2003/10/Serialization/">
+			<CApiVersion></CApiVersion>
+			<CBundle></CBundle>
+			<CClass>CMSIS</CClass>
+			<CGroup>CORE</CGroup>
+			<CSub></CSub>
+			<CVariant></CVariant>
+			<CVendor>ARM</CVendor>
+			<CVersion>3.40.0</CVersion>
+			<DefaultRepoPath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs</DefaultRepoPath>
+			<DependentComponents xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
+				<d4p1:anyType z:Id="i2" i:type="ProjectComponent">
+					<CApiVersion></CApiVersion>
+					<CBundle></CBundle>
+					<CClass>Device</CClass>
+					<CGroup>Startup</CGroup>
+					<CSub></CSub>
+					<CVariant></CVariant>
+					<CVendor>Atmel</CVendor>
+					<CVersion>1.0.0</CVersion>
+					<DefaultRepoPath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs</DefaultRepoPath>
+					<DependentComponents />
+					<Description></Description>
+					<Files>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\include</AbsolutePath>
+							<Attribute></Attribute>
+							<Category>include</Category>
+							<Condition>C</Condition>
+							<FileContentHash i:nil="true" />
+							<FileVersion></FileVersion>
+							<Name>samd21a/include</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\include\sam.h</AbsolutePath>
+							<Attribute></Attribute>
+							<Category>header</Category>
+							<Condition>C</Condition>
+							<FileContentHash>wM94EGprD6Od4xKBsAzkFQ==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/include/sam.h</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\templates\main.c</AbsolutePath>
+							<Attribute>template</Attribute>
+							<Category>source</Category>
+							<Condition>C Exe</Condition>
+							<FileContentHash>dSS7TLoDl1MS+uFZPgKPWQ==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/templates/main.c</Name>
+							<SelectString>Main file (.c)</SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\templates\main.cpp</AbsolutePath>
+							<Attribute>template</Attribute>
+							<Category>source</Category>
+							<Condition>C Exe</Condition>
+							<FileContentHash>nU+WlKcYaWh0AWBBS+WVpA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/templates/main.cpp</Name>
+							<SelectString>Main file (.cpp)</SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\gcc\system_samd21.c</AbsolutePath>
+							<Attribute>config</Attribute>
+							<Category>source</Category>
+							<Condition>GCC Exe</Condition>
+							<FileContentHash>Qjqe1jYsYQB+vQG2A3hhiA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/gcc/system_samd21.c</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\gcc\gcc\startup_samd21.c</AbsolutePath>
+							<Attribute>config</Attribute>
+							<Category>source</Category>
+							<Condition>GCC Exe</Condition>
+							<FileContentHash>pLNlIy+Llw/GLgds0gbQQA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/gcc/gcc/startup_samd21.c</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\gcc\gcc\samd21g18a_flash.ld</AbsolutePath>
+							<Attribute>config</Attribute>
+							<Category>linkerScript</Category>
+							<Condition>GCC Exe</Condition>
+							<FileContentHash>4xbqLG5DtSn/T8pJoWAvNA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/gcc/gcc/samd21g18a_flash.ld</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+						<d4p1:anyType i:type="FileInfo">
+							<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAMD21_DFP\1.0.222\samd21a\gcc\gcc\samd21g18a_sram.ld</AbsolutePath>
+							<Attribute>config</Attribute>
+							<Category>other</Category>
+							<Condition>GCC Exe</Condition>
+							<FileContentHash>K9GWjx6oZkcBnxrHUbvSwA==</FileContentHash>
+							<FileVersion></FileVersion>
+							<Name>samd21a/gcc/gcc/samd21g18a_sram.ld</Name>
+							<SelectString></SelectString>
+							<SourcePath></SourcePath>
+						</d4p1:anyType>
+					</Files>
+					<PackName>SAMD21_DFP</PackName>
+					<PackPath>C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/SAMD21_DFP/1.0.222/Atmel.SAMD21_DFP.pdsc</PackPath>
+					<PackVersion>1.0.222</PackVersion>
+					<PresentInProject>true</PresentInProject>
+					<ReferenceConditionId>ATSAMD21G18A</ReferenceConditionId>
+					<RteComponents>
+						<d4p1:string></d4p1:string>
+					</RteComponents>
+					<Status>Resolved</Status>
+					<VersionMode>Fixed</VersionMode>
+					<IsComponentInAtProject>true</IsComponentInAtProject>
+				</d4p1:anyType>
+			</DependentComponents>
+			<Description></Description>
+			<Files xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
+				<d4p1:anyType i:type="FileInfo">
+					<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\arm\cmsis\4.2.0\CMSIS\Documentation\Core\html\index.html</AbsolutePath>
+					<Attribute></Attribute>
+					<Category>doc</Category>
+					<Condition></Condition>
+					<FileContentHash>Fm1Ae7doPh4708FZQAIEpw==</FileContentHash>
+					<FileVersion></FileVersion>
+					<Name>CMSIS\Documentation\Core\html\index.html</Name>
+					<SelectString></SelectString>
+					<SourcePath></SourcePath>
+				</d4p1:anyType>
+				<d4p1:anyType i:type="FileInfo">
+					<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\arm\cmsis\4.2.0\CMSIS\Include\</AbsolutePath>
+					<Attribute></Attribute>
+					<Category>include</Category>
+					<Condition></Condition>
+					<FileContentHash i:nil="true" />
+					<FileVersion></FileVersion>
+					<Name>CMSIS\Include\</Name>
+					<SelectString></SelectString>
+					<SourcePath></SourcePath>
+				</d4p1:anyType>
+			</Files>
+			<PackName>CMSIS</PackName>
+			<PackPath>C:/Program Files (x86)/Atmel/Studio/7.0/Packs/arm/cmsis/4.2.0/ARM.CMSIS.pdsc</PackPath>
+			<PackVersion>4.2.0</PackVersion>
+			<PresentInProject>true</PresentInProject>
+			<ReferenceConditionId>CMSIS Core</ReferenceConditionId>
+			<RteComponents xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
+				<d4p1:string></d4p1:string>
+			</RteComponents>
+			<Status>Resolved</Status>
+			<VersionMode>Fixed</VersionMode>
+			<IsComponentInAtProject>true</IsComponentInAtProject>
+		</ProjectComponent>
+		<ProjectComponent z:Ref="i2" xmlns:z="http://schemas.microsoft.com/2003/10/Serialization/" />
+	</ProjectComponents>
+</Store>
Index: rtos_arduino/trunk/examples/basic/rca.cproj
===================================================================
--- rtos_arduino/trunk/examples/basic/rca.cproj	(revision 136)
+++ rtos_arduino/trunk/examples/basic/rca.cproj	(revision 136)
@@ -0,0 +1,168 @@
+﻿<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003" ToolsVersion="14.0">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
+    <ProjectVersion>7.0</ProjectVersion>
+    <ToolchainName>com.Atmel.ARMGCC.C</ToolchainName>
+    <ProjectGuid>dce6c7e3-ee26-4d79-826b-08594b9ad897</ProjectGuid>
+    <avrdevice>ATSAMD21G18A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>C</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>rca</AssemblyName>
+    <Name>rca</Name>
+    <RootNamespace>rca</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>true</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <preserveEEPROM>true</preserveEEPROM>
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>4</eraseonlaunchrule>
+    <ExternalProgrammingToolCommand />
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
+        <dependencies>
+          <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.27.3" />
+        </dependencies>
+      </framework-data>
+    </AsfFrameworkConfig>
+    <UseGdb>False</UseGdb>
+    <avrtool>com.atmel.avrdbg.tool.edbg</avrtool>
+    <avrtoolserialnumber>FFFFFFFFFFFFFFFFFFFF</avrtoolserialnumber>
+    <avrdeviceexpectedsignature>0x10010005</avrdeviceexpectedsignature>
+    <avrtoolinterface>SWD</avrtoolinterface>
+    <com_atmel_avrdbg_tool_edbg>
+      <ToolOptions>
+        <InterfaceProperties>
+          <SwdClock>2000000</SwdClock>
+        </InterfaceProperties>
+        <InterfaceName>SWD</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.edbg</ToolType>
+      <ToolNumber>FFFFFFFFFFFFFFFFFFFF</ToolNumber>
+      <ToolName>EDBG</ToolName>
+    </com_atmel_avrdbg_tool_edbg>
+    <avrtoolinterfaceclock>2000000</avrtoolinterfaceclock>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
+    <ToolchainSettings>
+      <ArmGcc>
+  <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
+  <armgcc.common.outputfiles.lss>True</armgcc.common.outputfiles.lss>
+  <armgcc.common.outputfiles.eep>True</armgcc.common.outputfiles.eep>
+  <armgcc.common.outputfiles.bin>True</armgcc.common.outputfiles.bin>
+  <armgcc.common.outputfiles.srec>True</armgcc.common.outputfiles.srec>
+  <armgcc.compiler.symbols.DefSymbols>
+    <ListValues>
+      <Value>NDEBUG</Value>
+    </ListValues>
+  </armgcc.compiler.symbols.DefSymbols>
+  <armgcc.compiler.directories.IncludePaths>
+    <ListValues>
+      <Value>%24(PackRepoDir)\atmel\SAMD21_DFP\1.0.222\samd21a\include</Value>
+      <Value>%24(PackRepoDir)\arm\cmsis\4.2.0\CMSIS\Include\</Value>
+    </ListValues>
+  </armgcc.compiler.directories.IncludePaths>
+  <armgcc.compiler.optimization.level>Optimize for size (-Os)</armgcc.compiler.optimization.level>
+  <armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
+  <armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
+  <armgcc.linker.libraries.Libraries>
+    <ListValues>
+      <Value>libm</Value>
+    </ListValues>
+  </armgcc.linker.libraries.Libraries>
+  <armgcc.linker.libraries.LibrarySearchPaths>
+    <ListValues>
+      <Value>%24(ProjectDir)\Device_Startup</Value>
+    </ListValues>
+  </armgcc.linker.libraries.LibrarySearchPaths>
+  <armgcc.linker.optimization.GarbageCollectUnusedSections>True</armgcc.linker.optimization.GarbageCollectUnusedSections>
+  <armgcc.linker.miscellaneous.LinkerFlags>-Tsamd21g18a_flash.ld</armgcc.linker.miscellaneous.LinkerFlags>
+  <armgcc.preprocessingassembler.general.IncludePaths>
+    <ListValues>
+      <Value>%24(PackRepoDir)\atmel\SAMD21_DFP\1.0.222\samd21a\include</Value>
+      <Value>%24(PackRepoDir)\arm\cmsis\4.2.0\CMSIS\Include\</Value>
+    </ListValues>
+  </armgcc.preprocessingassembler.general.IncludePaths>
+</ArmGcc>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
+    <ToolchainSettings>
+      <ArmGcc>
+  <armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
+  <armgcc.common.outputfiles.lss>True</armgcc.common.outputfiles.lss>
+  <armgcc.common.outputfiles.eep>True</armgcc.common.outputfiles.eep>
+  <armgcc.common.outputfiles.bin>True</armgcc.common.outputfiles.bin>
+  <armgcc.common.outputfiles.srec>True</armgcc.common.outputfiles.srec>
+  <armgcc.compiler.symbols.DefSymbols>
+    <ListValues>
+      <Value>DEBUG</Value>
+    </ListValues>
+  </armgcc.compiler.symbols.DefSymbols>
+  <armgcc.compiler.directories.IncludePaths>
+    <ListValues>
+      <Value>%24(PackRepoDir)\atmel\SAMD21_DFP\1.0.222\samd21a\include</Value>
+      <Value>%24(PackRepoDir)\arm\cmsis\4.2.0\CMSIS\Include\</Value>
+    </ListValues>
+  </armgcc.compiler.directories.IncludePaths>
+  <armgcc.compiler.optimization.level>Optimize (-O1)</armgcc.compiler.optimization.level>
+  <armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
+  <armgcc.compiler.optimization.DebugLevel>Maximum (-g3)</armgcc.compiler.optimization.DebugLevel>
+  <armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
+  <armgcc.linker.libraries.Libraries>
+    <ListValues>
+      <Value>libm</Value>
+    </ListValues>
+  </armgcc.linker.libraries.Libraries>
+  <armgcc.linker.libraries.LibrarySearchPaths>
+    <ListValues>
+      <Value>%24(ProjectDir)\Device_Startup</Value>
+    </ListValues>
+  </armgcc.linker.libraries.LibrarySearchPaths>
+  <armgcc.linker.optimization.GarbageCollectUnusedSections>True</armgcc.linker.optimization.GarbageCollectUnusedSections>
+  <armgcc.linker.miscellaneous.LinkerFlags>-Tsamd21g18a_flash.ld</armgcc.linker.miscellaneous.LinkerFlags>
+  <armgcc.assembler.debugging.DebugLevel>Default (-g)</armgcc.assembler.debugging.DebugLevel>
+  <armgcc.preprocessingassembler.general.IncludePaths>
+    <ListValues>
+      <Value>%24(PackRepoDir)\atmel\SAMD21_DFP\1.0.222\samd21a\include</Value>
+      <Value>%24(PackRepoDir)\arm\cmsis\4.2.0\CMSIS\Include\</Value>
+    </ListValues>
+  </armgcc.preprocessingassembler.general.IncludePaths>
+  <armgcc.preprocessingassembler.debugging.DebugLevel>Default (-Wa,-g)</armgcc.preprocessingassembler.debugging.DebugLevel>
+</ArmGcc>
+    </ToolchainSettings>
+    <UsesExternalMakeFile>True</UsesExternalMakeFile>
+    <OutputDirectory />
+    <BuildTarget>all</BuildTarget>
+    <CleanTarget>clean</CleanTarget>
+    <ExternalMakeFilePath>Makefile</ExternalMakeFilePath>
+  </PropertyGroup>
+  <ItemGroup>
+    <None Include="rca_app.cfg">
+      <SubType>compile</SubType>
+    </None>
+    <None Include="rca_app.cpp">
+      <SubType>compile</SubType>
+    </None>
+  </ItemGroup>
+  <ItemGroup>
+    <Compile Include="rca_app.h">
+      <SubType>compile</SubType>
+    </Compile>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
Index: rtos_arduino/trunk/examples/basic/rca_app.cfg
===================================================================
--- rtos_arduino/trunk/examples/basic/rca_app.cfg	(revision 136)
+++ rtos_arduino/trunk/examples/basic/rca_app.cfg	(revision 136)
@@ -0,0 +1,8 @@
+/*
+ *  $Id: sample1.cfg 2416 2012-09-07 08:06:20Z ertl-hiro $
+ */
+
+/*
+ *  ãµã³ãã«ãã­ã°ã©ã (1)ã®ã·ã¹ãã ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+ */
+INCLUDE("rca_lib.cfg");
Index: rtos_arduino/trunk/examples/basic/rca_app.cpp
===================================================================
--- rtos_arduino/trunk/examples/basic/rca_app.cpp	(revision 136)
+++ rtos_arduino/trunk/examples/basic/rca_app.cpp	(revision 136)
@@ -0,0 +1,310 @@
+#include "rca.h"
+
+#define BLINK
+//#define toneMelody
+//#define USBUART
+//#define SERIALUSB
+//#define SERIAL5
+//#define ATTACHINTERRUPT
+//#define ANALOGWRITE
+//#define ANALOGREAD
+//#define RTC_ALARM
+
+#ifdef BLINK
+/*
+  Blink
+  Turns on an LED on for one second, then off for one second, repeatedly.
+
+  Most Arduinos have an on-board LED you can control. On the Uno and
+  Leonardo, it is attached to digital pin 13. If you're unsure what
+  pin the on-board LED is connected to on your Arduino model, check
+  the documentation at http://arduino.cc
+
+  This example code is in the public domain.
+
+  modified 8 May 2014
+  by Scott Fitzgerald
+ */
+
+// the setup function runs once when you press reset or power the board
+void setup() {
+  // initialize digital pin 13 as an output.
+  pinMode(13, OUTPUT);
+  Serial.begin(115200);
+}
+
+// the loop function runs over and over again forever
+void loop() {
+    digitalWrite(13, HIGH);   // turn the LED on (HIGH is the voltage level)
+    Serial.println("HIGH");    
+    delay(1000);              // wait for a second
+    digitalWrite(13, LOW);    // turn the LED off by making the voltage LOW
+    Serial.println("LOW");        
+    delay(1000);              // wait for a second
+}
+#endif /* BLINK */
+
+#ifdef toneMelody
+/*
+  Melody
+
+ Plays a melody
+
+ circuit:
+ * 8-ohm speaker on digital pin 8
+
+ created 21 Jan 2010
+ modified 30 Aug 2011
+ by Tom Igoe
+
+This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/Tone
+
+ */
+#include "pitches.h"
+
+// notes in the melody:
+int melody[] = {
+  NOTE_C4, NOTE_G3, NOTE_G3, NOTE_A3, NOTE_G3, 0, NOTE_B3, NOTE_C4
+};
+
+// note durations: 4 = quarter note, 8 = eighth note, etc.:
+int noteDurations[] = {
+  4, 8, 8, 4, 4, 4, 4, 4
+};
+
+void setup() {
+    // no need to repeat the melody.
+}
+
+void loop() {
+  // iterate over the notes of the melody:
+  for (int thisNote = 0; thisNote < 8; thisNote++) {
+
+    // to calculate the note duration, take one second
+    // divided by the note type.
+    //e.g. quarter note = 1000 / 4, eighth note = 1000/8, etc.
+    int noteDuration = 1000 / noteDurations[thisNote];
+    tone(8, melody[thisNote], noteDuration);
+
+    // to distinguish the notes, set a minimum time between them.
+    // the note's duration + 30% seems to work well:
+    int pauseBetweenNotes = noteDuration * 1.30;
+    delay(pauseBetweenNotes);
+    // stop the tone playing:
+    noTone(8);
+  }
+  delay(2000);
+}
+#endif /* toneMelody */
+
+#ifdef SERIALUSB
+
+void setup() {
+    SerialUSB.begin(115200);
+    while(!SerialUSB){ ; }
+    SerialUSB.println("SerialUSB start!");
+}
+
+int val;
+void loop() {
+    SerialUSB.println("arrive!");
+    delay(1000);
+}
+#endif /* SERIALUSB */
+
+#ifdef SERIAL5
+
+void setup() {
+    Serial5.begin(115200);
+    Serial5.println("Serial5 start!");
+}
+
+int val;
+void loop() {
+    Serial5.println("arrive");
+    delay(1000);
+}
+#endif /* SERIAL5 */
+
+#ifdef ATTACHINTERRUPT
+const int buttonPin = 7;     // the number of the pushbutton pin
+const int ledPin =  13;      // the number of the LED pin
+
+// variables will change:
+int buttonState = 0;         // variable for reading the pushbutton status
+
+extern void blink(void);
+    
+void setup() {
+  // initialize the LED pin as an output:
+  pinMode(ledPin, OUTPUT);
+  // initialize the pushbutton pin as an input:
+  pinMode(buttonPin, INPUT);
+  Serial.begin(115200);
+  attachInterrupt(buttonPin, blink, CHANGE);
+}
+
+int interrupt;
+/* ToDo */
+void
+blink(void){
+//    Serial.println("interrupt!");
+    syslog(LOG_NOTICE, "data = %d", interrupt++);
+}
+
+void loop() {
+  // read the state of the pushbutton value:
+  buttonState = digitalRead(buttonPin);
+
+  // check if the pushbutton is pressed.
+  // if it is, the buttonState is HIGH:
+  if (buttonState == HIGH) {
+    // turn LED on:
+    digitalWrite(ledPin, HIGH);
+  }
+  else {
+    // turn LED off:
+    digitalWrite(ledPin, LOW);
+  }
+  delay(10);
+}
+#endif /* ATTACHINTERRUPT */
+
+#ifdef ANALOGWRITE
+
+const int ledPin =  13;
+
+void setup() {
+}
+
+void loop() {
+  int i;
+  while(1){
+    for(i= 0; i<255; i++){
+      analogWrite(ledPin,i);
+      delay(10);
+    }
+    for(i= 255; i>0; i--){
+      analogWrite(ledPin,i);
+      delay(10);
+    }        
+  }
+}
+#endif /* ANALOGWRITE */
+
+#ifdef ANALOGREAD
+/*
+  Analog Input
+ Demonstrates analog input by reading an analog sensor on analog pin 0 and
+ turning on and off a light emitting diode(LED)  connected to digital pin 13.
+ The amount of time the LED will be on and off depends on
+ the value obtained by analogRead().
+
+ The circuit:
+ * Potentiometer attached to analog input 0
+ * center pin of the potentiometer to the analog pin
+ * one side pin (either one) to ground
+ * the other side pin to +5V
+ * LED anode (long leg) attached to digital output 13
+ * LED cathode (short leg) attached to ground
+
+ * Note: because most Arduinos have a built-in LED attached
+ to pin 13 on the board, the LED is optional.
+
+
+ Created by David Cuartielles
+ modified 30 Aug 2011
+ By Tom Igoe
+
+ This example code is in the public domain.
+
+ http://arduino.cc/en/Tutorial/AnalogInput
+
+ */
+int sensorPin = A0;    // select the input pin for the potentiometer
+int ledPin = 13;      // select the pin for the LED
+int sensorValue = 0;  // variable to store the value coming from the sensor
+
+void setup() {
+  // declare the ledPin as an OUTPUT:
+  pinMode(ledPin, OUTPUT);
+}
+
+int i = 0;
+void loop() {
+    // read the value from the sensor:
+    sensorValue = analogRead(sensorPin);
+    analogWrite(ledPin,sensorValue/4);
+    delay(10);
+    if(i++ == 100){
+        i = 0;
+        syslog(LOG_NOTICE, "hoge = %d", sensorValue);
+    }
+}
+#endif /* ANALOGREAD */
+
+#ifdef RTC_ALARM
+/*****************************************************************************************************************************************************************************
+* This sketch demonstrate how to use alarm in interrupt mode.
+This mode is more conveniently because you use processor for other tasks and when alarm match occurs interrupt routine is executed.
+In this way, alarm flag checking is indipendent from main program flow.
+******************************************************************************************************************************************************************************/
+
+#include <RTCInt.h>
+
+RTCInt rtc;
+
+extern void alarm_int(void);
+
+void setup() 
+{
+  Serial.begin(115200);       //serial communication initializing
+  pinMode(13,OUTPUT);
+  rtc.begin(TIME_H24);      //RTC initializing with 24 hour representation mode
+  rtc.setTime(17,0,5,0);    //setting time (hour minute and second)
+  rtc.setDate(13,8,15);     //setting date
+  rtc.enableAlarm(SEC,ALARM_INTERRUPT,alarm_int); //enabling alarm in polled mode and match on second
+  rtc.local_time.hour=17;
+  rtc.local_time.minute=5;
+  rtc.local_time.second=10;  //setting second to match
+  rtc.setAlarm();  //write second in alarm register
+}
+
+void loop()
+{
+//  digitalWrite(13,HIGH);   //main program code
+  Serial.println("HIGH!");
+  delay(1000);
+//  digitalWrite(13,LOW);
+  Serial.println("LOW!");
+  delay(1000);
+  
+}
+
+
+/*************** Interrupt routine for alarm ******************************/
+void alarm_int(void)
+{
+  Serial.println("Alarm match!");
+//    RTC->MODE2.INTFLAG.bit.ALARM0=1; //clearing alarm0 flag
+     rtc.getDate();      //getting date in local structure (local_date)
+ rtc.getTime();      //getting time in local structure(local_time)
+ 
+ //printing date in format YYYY/MM/DD
+ Serial.print(rtc.local_date.year+2000); // year
+ Serial.print('/');
+ Serial.print(rtc.local_date.month);    // month
+ Serial.print('/');
+ Serial.print(rtc.local_date.day);      // day
+ Serial.print(' ');
+ 
+ //printing time
+ Serial.print(rtc.local_time.hour);    //hour
+ Serial.print(':');
+ Serial.print(rtc.local_time.minute);  //minute
+ Serial.print(':');
+ Serial.println(rtc.local_time.second);  //second 
+}
+#endif /* RTC_ALARM */
Index: rtos_arduino/trunk/examples/basic/rca_app.h
===================================================================
--- rtos_arduino/trunk/examples/basic/rca_app.h	(revision 136)
+++ rtos_arduino/trunk/examples/basic/rca_app.h	(revision 136)
@@ -0,0 +1,6 @@
+#ifndef _RCA_APP_H_
+#define _RCA_APP_H_
+
+#define RCA_NUM_TASK 0
+
+#endif /* _RCA_APP_H_ */
Index: rtos_arduino/trunk/examples/do_path.bat
===================================================================
--- rtos_arduino/trunk/examples/do_path.bat	(revision 136)
+++ rtos_arduino/trunk/examples/do_path.bat	(revision 136)
@@ -0,0 +1,2 @@
+SET ARDUINO_DIR=C:\Program Files (x86)\Arduino
+SET PATH=%ARDUINO_DIR%\hardware\tools\gcc-arm-none-eabi-4.8.3-2014q1\bin;%ARDUINO_DIR%\hardware\arduino\sam\system\CMSIS\Examples\cmsis_example\gcc_arm;%PATH%;
Index: rtos_arduino/trunk/lib/Makefile.rca
===================================================================
--- rtos_arduino/trunk/lib/Makefile.rca	(revision 136)
+++ rtos_arduino/trunk/lib/Makefile.rca	(revision 136)
@@ -0,0 +1,626 @@
+#
+#  Arduinoã©ã¤ãã©ãªç¨ã®å®ç¾©
+#
+ARDUINO_LIB_DIR = $(RCA_DIR)/arduino_lib
+
+#
+#   ã³ã¢ã©ã¤ãã©ãª
+#
+APPL_COBJS += delay.o \
+              wiring.o wiring_digital.o wiring_analog.o wiring_shift.o \
+              WInterrupts.o \
+              samd21_device.o samd21_host.o \
+              dtostrf.o \
+              itoa.o \
+              syscalls.o \
+
+APPL_CXXOBJS += rca_lib.o \
+                variant.o \
+                SERCOM.o Uart.o RingBuffer.o Print.o  \
+                CDC.o HID.o USBCore.o Reset.o \
+                Stream.o \
+                wiring_pulse.o \
+                WMath.o \
+                WString.o \
+                IPAddress.o \
+                Tone.o \
+
+ifeq ($(USE_ETHERNET2), true)
+#
+#   Ethenet2ã©ã¤ãã©ãª
+#
+APPL_DIR     += $(RCA_DIR)/arduino_lib/libraries/Ethernet2/src/ $(RCA_DIR)/arduino_lib/libraries/Ethernet2/src/utility
+APPL_CXXOBJS += Dhcp.o Dns.o Ethernet2.o EthernetClient.o EthernetServer.o EthernetUdp2.o Twitter.o socket.o w5500.o
+APPL_COBJS   += 
+USE_ARDUINO_SPI       = true
+endif
+
+ifeq ($(USE_NCESCAN), true)
+#
+#   NCESCANã©ã¤ãã©ãª
+#
+APPL_DIR     += $(RCA_DIR)/arduino_lib/libraries/NcesCan/
+APPL_CXXOBJS += mcp_can.o
+APPL_COBJS   += 
+USE_ARDUINO_SPI = true
+endif
+
+ifeq ($(USE_NAXESMOTION), true)
+#
+#   NAxesMotionã©ã¤ãã©ãª
+#
+APPL_DIR     += $(RCA_DIR)/arduino_lib/libraries/NAxesMotion $(RCA_DIR)/arduino_lib/libraries/NAxesMotion/utility
+APPL_CXXOBJS += NAxisMotion.o 
+APPL_COBJS   += BNO055.o
+USE_WIRE      = true
+endif
+
+ifeq ($(USE_ARDUINO_SD), true)
+#
+#   SDã©ã¤ãã©ãª
+#
+APPL_DIR     += $(RCA_DIR)/arduino_lib/libraries/SD/src/ $(RCA_DIR)/arduino_lib/libraries/SD/src/utility
+APPL_CXXOBJS += File.o SD.o Sd2Card.o SdFile.o SdVolume.o 
+APPL_COBJS   += 
+endif
+
+ifeq ($(USE_ARDUINO_TFT), true)
+#
+#   TFTã©ã¤ãã©ãª
+#
+APPL_DIR     += $(RCA_DIR)/arduino_lib/libraries/TFT/src/ $(RCA_DIR)/arduino_lib/libraries/TFT/src/utility
+APPL_CXXOBJS += TFT.o Adafruit_GFX.o Adafruit_ST7735.o
+APPL_COBJS   += glcdfont.o
+endif
+
+ifeq ($(USE_WIRE), true)
+#
+#   Wireã©ã¤ãã©ãª
+#
+APPL_DIR     += $(RCA_DIR)/arduino_lib/hardware/arduino/samd/libraries/Wire/
+APPL_CXXOBJS += Wire.o
+APPL_COBJS   += 
+endif
+
+ifeq ($(USE_ARDUINO_SPI), true)
+#
+#   SPIã©ã¤ãã©ãª
+#
+APPL_DIR     += $(RCA_DIR)/arduino_lib/hardware/arduino/samd/libraries/SPI/
+APPL_CXXOBJS += SPI.o
+APPL_COBJS   += 
+endif
+
+ifeq ($(USE_ARDUINO_RTC), true)
+#
+#   RTCã©ã¤ãã©ãª
+#
+APPL_DIR     += $(RCA_DIR)/arduino_lib/libraries/RTC/src/
+APPL_CXXOBJS += RTCInt.o
+APPL_COBJS   += 
+endif
+
+
+APPL_DIR += $(RCA_DIR)/lib \
+            $(ARDUINO_LIB_DIR)/hardware/arduino/samd/cores/arduino/ \
+            $(ARDUINO_LIB_DIR)/hardware/arduino/samd/cores/arduino/avr \
+            $(ARDUINO_LIB_DIR)/hardware/arduino/samd/cores/arduino/USB \
+            $(ARDUINO_LIB_DIR)/hardware/arduino/samd/variants/arduino_zero/ 
+
+CDEFS += -Dprintf=iprintf \
+         -DF_CPU=48000000L \
+         -DARDUINO=10708 \
+         -DARDUINO_SAM_ZERO \
+         -DARDUINO_ARCH_SAMD \
+         -D__SAMD21G18A__ \
+         -DUSB_VID=0x2a03 \
+         -DUSB_PID=0x804f \
+         -DUSBCON \
+         -DUSB_MANUFACTURER= \
+         -DTOPPERS_WITH_ARDUINO
+
+CXXLIBS += -lm -lstdc++
+
+CXXFLAGS = -fno-rtti -fno-exceptions
+
+vpath %.cpp $(APPL_DIR) $(TOPPERS_ARDUINO_DIR)/lib
+
+INCLUDES += -I$(TOPPERS_ARDUINO_DIR)/lib
+
+#
+#  Serialã®æ±ã
+#
+ifeq ($(ARDUINO_SERIAL), NOUSE_SERIAL)
+	USE_LOGTASK = true
+endif
+
+ifeq ($(ARDUINO_SERIAL), USE_SERIAL)
+	CDEFS += -DTOPPERS_USE_ARDUINO_SERIAL
+endif
+
+#
+#  ã¿ã¼ã²ããç¥ç§°ã®å®ç¾©
+#
+TARGET = arduino_m0_gcc
+
+#
+#  ãã­ã°ã©ãã³ã°è¨èªã®å®ç¾©
+#
+SRCLANG = c
+ifeq ($(SRCLANG),c)
+  LIBS = -lc
+endif
+ifeq ($(SRCLANG),c++)
+  USE_CXX = true
+  CXXLIBS = -lstdc++ -lm -lc
+  CXXRTS = cxxrt.o newlibrt.o
+endif
+
+#
+#  ãªãã¸ã§ã¯ããã¡ã¤ã«åã®æ¡å¼µå­ã®è¨­å®
+#
+OBJEXT = elf
+
+#
+#  å®è¡ç°å¢ã®å®ç¾©ï¼ã¿ã¼ã²ããä¾å­ã«ä¸æ¸ããããå ´åãããï¼
+#
+DBGENV := 
+
+#
+#  ã«ã¼ãã«ã©ã¤ãã©ãªï¼libkernel.aï¼ã®ãã£ã¬ã¯ããªå
+#  ï¼ã«ã¼ãã«ã©ã¤ãã©ãªãmakeå¯¾è±¡ã«ããæã¯ï¼ç©ºã«å®ç¾©ããï¼
+#
+KERNEL_LIB = 
+
+#
+#  ã«ã¼ãã«ãé¢æ°åä½ã§ã³ã³ãã¤ã«ãããã©ããã®å®ç¾©
+#
+KERNEL_FUNCOBJS = 
+
+#
+#  ãã¬ã¼ã¹ã­ã°ãåå¾ãããã©ããã®å®ç¾©
+#
+ENABLE_TRACE = 
+
+#
+#  ã¦ã¼ãã£ãªãã£ãã­ã°ã©ã ã®åç§°
+#
+PERL = /usr/bin/perl
+CFG = "$(SRCDIR)/cfg/cfg/cfg"
+
+#
+#  ãªãã¸ã§ã¯ããã¡ã¤ã«åã®å®ç¾©
+#
+OBJNAME = rca
+ifdef OBJEXT
+  OBJFILE = $(OBJNAME).$(OBJEXT)
+  CFG1_OUT = cfg1_out.$(OBJEXT)
+else
+  OBJFILE = $(OBJNAME)
+  CFG1_OUT = cfg1_out
+endif
+
+#
+#  ã¿ã¼ã²ããä¾å­é¨ã®ãã£ã¬ã¯ããªã®å®ç¾©
+#
+TARGETDIR = $(SRCDIR)/target/$(TARGET)
+
+#
+#  ã¿ã¼ã²ããä¾å­ã®å®ç¾©ã®ã¤ã³ã¯ã«ã¼ã
+#
+include $(TARGETDIR)/Makefile.target
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿é¢ä¿ã®å¤æ°ã®å®ç¾©
+#
+CFG_TABS := --api-table $(SRCDIR)/kernel/kernel_api.csv \
+			--cfg1-def-table $(SRCDIR)/kernel/kernel_def.csv $(CFG_TABS)
+
+CFG_ASMOBJS := $(CFG_ASMOBJS)
+CFG_COBJS := kernel_cfg.o $(CFG_COBJS)
+CFG_OBJS := $(CFG_ASMOBJS) $(CFG_COBJS)
+CFG2_OUT_SRCS := kernel_cfg.h kernel_cfg.c $(CFG2_OUT_SRCS)
+
+#
+#  å
+±éã³ã³ãã¤ã«ãªãã·ã§ã³ã®å®ç¾©
+#
+COPTS := $(COPTS) -g -MD
+ifndef OMIT_WARNING_ALL
+  COPTS := $(COPTS) -Wall
+endif
+ifndef OMIT_OPTIMIZATION
+  COPTS := $(COPTS) -Os
+endif
+CDEFS := $(CDEFS) 
+INCLUDES := -I. -I$(SRCDIR)/include -I$(SRCDIR)/arch -I$(SRCDIR) $(INCLUDES)
+LDFLAGS := $(LDFLAGS) 
+CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) 
+LIBS := $(LIBS) $(CXXLIBS)
+CFLAGS = $(COPTS) $(CDEFS) $(INCLUDES)
+
+#
+#  ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ã«é¢ããå®ç¾©
+#
+APPL_DIR += $(SRCDIR)/library
+APPL_COBJS := $(APPL_COBJS) log_output.o vasyslog.o t_perror.o strerror.o
+ifdef APPL_DIR
+  INCLUDES := $(INCLUDES) $(foreach dir,$(APPL_DIR),-I$(dir))
+endif
+
+#
+#  ã·ã¹ãã ãµã¼ãã¹ã«é¢ããå®ç¾©
+#
+SYSSVC_DIR := $(SYSSVC_DIR) $(SRCDIR)/syssvc $(SRCDIR)/library
+SYSSVC_ASMOBJS := $(SYSSVC_ASMOBJS)
+SYSSVC_COBJS := $(SYSSVC_COBJS) banner.o syslog.o \
+				 $(CXXRTS)
+
+ifeq ($(USE_LOGTASK),true)
+	SYSSVC_COBJS := $(SYSSVC_COBJS) serial.o logtask.o
+	CDEFS := $(CDEFS) -DTOPPERS_USE_LOGTASK
+endif
+
+SYSSVC_CFLAGS := $(SYSSVC_CFLAGS)
+SYSSVC_LIBS := $(SYSSVC_LIBS)
+INCLUDES := $(INCLUDES)
+
+#
+#  ã«ã¼ãã«ã«é¢ããå®ç¾©
+#
+#  KERNEL_ASMOBJS: ã«ã¼ãã«ã©ã¤ãã©ãªã«å«ããï¼ã½ã¼ã¹ãã¢ã»ã³ããªè¨èªã®
+#				   ãªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_COBJS: ã«ã¼ãã«ã®ã©ã¤ãã©ãªã«å«ããï¼ã½ã¼ã¹ãCè¨èªã§ï¼ã½ã¼ã¹
+#				 ãã¡ã¤ã«ã¨1å¯¾1ã«å¯¾å¿ãããªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_LCSRCS: ã«ã¼ãã«ã®ã©ã¤ãã©ãªã«å«ããCè¨èªã®ã½ã¼ã¹ãã¡ã¤ã«ã§ï¼
+#				  1ã¤ã®ã½ã¼ã¹ãã¡ã¤ã«ããè¤æ°ã®ãªãã¸ã§ã¯ããã¡ã¤ã«ãç
+#				  æãããã®ï¼
+#  KERNEL_LCOBJS: ä¸ã®ã½ã¼ã¹ãã¡ã¤ã«ããçæããããªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#  KERNEL_AUX_COBJS: ã­ã¼ãã¢ã¸ã¥ã¼ã«ã«å«ããªããï¼ã«ã¼ãã«ã®ã½ã¼ã¹ãã¡
+#					 ã¤ã«ã¨åããªãã·ã§ã³ãé©ç¨ãã¦ã³ã³ãã¤ã«ãã¹ãï¼ã½ã¼
+#					 ã¹ãCè¨èªã®ãªãã¸ã§ã¯ããã¡ã¤ã«ï¼
+#
+KERNEL_DIR := $(KERNEL_DIR) $(SRCDIR)/kernel
+KERNEL_ASMOBJS := $(KERNEL_ASMOBJS)
+KERNEL_COBJS := $(KERNEL_COBJS)
+KERNEL_CFLAGS := $(KERNEL_CFLAGS) -I$(SRCDIR)/kernel
+ifdef OMIT_MAKEOFFSET
+  OFFSET_H =
+else
+  OFFSET_H = offset.h
+ifndef OFFSET_TF
+  KERNEL_AUX_COBJS := $(KERNEL_AUX_COBJS) makeoffset.o
+endif
+endif
+
+#
+#  ã¿ã¼ã²ãããã¡ã¤ã«ï¼è¤æ°ãåæã«é¸æãã¦ã¯ãªããªãï¼
+#
+all: $(OBJFILE)
+#all: $(OBJNAME).bin
+#all: $(OBJNAME).srec
+
+##### ä»¥ä¸ã¯ç·¨éããªããã¨ #####
+
+#
+#  ç°å¢ã«ä¾å­ããã³ã³ãã¤ã«ãªãã·ã§ã³ã®å®ç¾©
+#
+ifdef DBGENV
+  CDEFS := $(CDEFS) -D$(DBGENV)
+endif
+
+#
+#  å®è¡ç°å¢ã®å¤å®
+#
+ifneq (,$(findstring /cygdrive/,$(PATH)))
+    UNAME := Cygwin
+else
+ifeq ($(OS),Windows_NT)
+    UNAME := Windows
+else
+ifeq ($(UNAME),Linux)
+    UNAME := Linux
+ifeq ($(UNAME),Darwin)
+    UNAME := Darwin
+endif
+endif
+endif
+endif
+
+#
+#  ã«ã¼ãã«ã®ãã¡ã¤ã«æ§æã®å®ç¾©
+#
+include $(SRCDIR)/kernel/Makefile.kernel
+ifdef KERNEL_FUNCOBJS
+  KERNEL_LCSRCS := $(KERNEL_FCSRCS)
+  KERNEL_LCOBJS := $(foreach file,$(KERNEL_FCSRCS),$($(file:.c=)))
+else
+  KERNEL_CFLAGS := -DALLFUNC $(KERNEL_CFLAGS)
+  KERNEL_COBJS := $(KERNEL_COBJS) \
+					$(foreach file,$(KERNEL_FCSRCS),$(file:.c=.o))
+endif
+
+#
+#  ã½ã¼ã¹ãã¡ã¤ã«ã®ãããã£ã¬ã¯ããªã«é¢ããå®ç¾©
+#
+vpath %.c $(KERNEL_DIR) $(SYSSVC_DIR) $(APPL_DIR)
+vpath %.S $(KERNEL_DIR) $(SYSSVC_DIR) $(APPL_DIR)
+vpath %.cfg $(APPL_DIR)
+
+#
+#  ã³ã³ãã¤ã«ã®ããã®å¤æ°ã®å®ç¾©
+#
+KERNEL_LIB_OBJS = $(KERNEL_ASMOBJS) $(KERNEL_COBJS) $(KERNEL_LCOBJS)
+SYSSVC_OBJS = $(SYSSVC_ASMOBJS) $(SYSSVC_COBJS)
+APPL_OBJS = $(APPL_ASMOBJS) $(APPL_COBJS) $(APPL_CXXOBJS)
+ALL_OBJS = $(START_OBJS) $(APPL_OBJS) $(SYSSVC_OBJS) $(CFG_OBJS) \
+											$(END_OBJS) $(HIDDEN_OBJS)
+ifdef KERNEL_LIB
+  ALL_LIBS = $(APPL_LIBS) $(SYSSVC_LIBS) -lkernel $(LIBS)
+  LIBS_DEP = $(filter %.a,$(ALL_LIBS)) $(KERNEL_LIB)/libkernel.a
+  LDFLAGS := $(LDFLAGS) -L$(KERNEL_LIB)
+  REALCLEAN_FILES := libkernel.a $(REALCLEAN_FILES)
+else
+  ALL_LIBS = $(APPL_LIBS) $(SYSSVC_LIBS) libkernel.a $(LIBS)
+  LIBS_DEP = $(filter %.a,$(ALL_LIBS))
+endif
+
+ifdef TEXT_START_ADDRESS
+  LDFLAGS := $(LDFLAGS) -Wl,-Ttext,$(TEXT_START_ADDRESS)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -Wl,-Ttext,$(TEXT_START_ADDRESS)
+endif
+ifdef DATA_START_ADDRESS
+  LDFLAGS := $(LDFLAGS) -Wl,-Tdata,$(DATA_START_ADDRESS)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -Wl,-Tdata,$(DATA_START_ADDRESS)
+endif
+ifdef LDSCRIPT
+  LDFLAGS := $(LDFLAGS) -T $(LDSCRIPT)
+  CFG1_OUT_LDFLAGS := $(CFG1_OUT_LDFLAGS) -T $(LDSCRIPT)
+endif
+
+#
+#  ãªãã»ãããã¡ã¤ã«ï¼offset.hï¼ã®çæè¦å
+#
+ifdef OFFSET_TF
+offset.h: $(APPL_CFG) kernel_cfg.timestamp
+	$(CFG) --pass 3 --kernel asp $(INCLUDES) \
+				--rom-image cfg1_out.srec --symbol-table cfg1_out.syms \
+				-T $(OFFSET_TF) $(CFG_TABS) $<
+else
+offset.h: makeoffset.s $(SRCDIR)/utils/genoffset
+	$(PERL) $(SRCDIR)/utils/genoffset makeoffset.s > offset.h
+endif
+
+#
+#  ã«ã¼ãã«ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«ã®çæ
+#
+cfg1_out.c: $(APPL_CFG)
+	$(CFG) --pass 1 --kernel asp $(INCLUDES) $(CFG_TABS) $< 
+	$(CFG) -M cfg1_out.c $(INCLUDES) $< > cfg1_out.c.d
+
+$(CFG2_OUT_SRCS): kernel_cfg.timestamp
+kernel_cfg.timestamp: $(APPL_CFG) \
+						$(START_OBJS) cfg1_out.o $(END_OBJS) $(HIDDEN_OBJS)
+	$(LINK) $(CFLAGS) $(CFG1_OUT_LDFLAGS) -o $(CFG1_OUT) \
+						$(START_OBJS) cfg1_out.o $(END_OBJS)
+	$(NM) -n $(CFG1_OUT) > cfg1_out.syms
+	$(OBJCOPY) -O srec -S $(CFG1_OUT) cfg1_out.srec
+	$(CFG) --pass 2 --kernel asp $(INCLUDES) \
+				-T $(TARGETDIR)/target.tf $(CFG_TABS) $<
+ifeq ($(UNAME), Windows)
+	copy /B kernel_cfg.c +,,
+	echo  -n > kernel_cfg.timestamp
+else
+	touch -r kernel_cfg.c kernel_cfg.timestamp
+endif
+
+#
+#  ã«ã¼ãã«ã©ã¤ãã©ãªãã¡ã¤ã«ã®çæ
+#
+libkernel.a: $(OFFSET_H) $(KERNEL_LIB_OBJS)
+	rm -f libkernel.a
+	$(AR) -rcs libkernel.a $(KERNEL_LIB_OBJS)
+	$(RANLIB) libkernel.a
+
+#
+#  ç¹å¥ãªä¾å­é¢ä¿ã®å®ç¾©
+#
+banner.o: kernel_cfg.timestamp $(filter-out banner.o,$(ALL_OBJS)) $(LIBS_DEP)
+
+#
+#  å
+¨ä½ã®ãªã³ã¯
+#
+$(OBJFILE): $(APPL_CFG) kernel_cfg.timestamp $(ALL_OBJS) $(LIBS_DEP)
+	$(LINK) $(CFLAGS) $(LDFLAGS) -o $(OBJFILE) $(START_OBJS) \
+			$(APPL_OBJS) $(SYSSVC_OBJS) $(CFG_OBJS) $(ALL_LIBS) $(END_OBJS)
+	$(NM) -n $(OBJFILE) > $(OBJNAME).syms
+	$(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
+	$(CFG) --pass 3 --kernel asp $(INCLUDES) \
+				--rom-image $(OBJNAME).srec --symbol-table $(OBJNAME).syms \
+				-T $(TARGETDIR)/target_check.tf $(CFG_TABS) $<
+
+#
+#  ãã¤ããªãã¡ã¤ã«ã®çæ
+#
+$(OBJNAME).bin: $(OBJFILE)
+	$(OBJCOPY) -O binary -R .bss -S $(OBJFILE) $(OBJNAME).bin
+
+#
+#  Sã¬ã³ã¼ããã¡ã¤ã«ã®çæ
+#
+$(OBJNAME).srec: $(OBJFILE)
+	$(OBJCOPY) -O srec -S $(OBJFILE) $(OBJNAME).srec
+
+#
+#  ã³ã³ãã¤ã«çµæã®æ¶å»
+#
+.PHONY: clean
+clean:
+	rm -f $(OBJFILE) $(OBJNAME).syms $(OBJNAME).srec $(OBJNAME).bin $(OBJFILE).shadow
+	rm -f kernel_cfg.timestamp $(CFG2_OUT_SRCS)
+	rm -f cfg1_out.c $(CFG1_OUT) cfg1_out.syms cfg1_out.srec
+	rm -f kernel_cfg.timestamp $(CFG2_OUT_SRCS);
+	rm -f cfg1_out.c cfg1_out.o $(CFG1_OUT) cfg1_out.syms cfg1_out.srec;
+	rm -f makeoffset.s offset.h;
+ifndef KERNEL_LIB
+	rm -f libkernel.a
+endif
+	rm -f makeoffset.s offset.h
+	rm -f \#* *~ *.o *.d $(CLEAN_FILES)
+
+.PHONY: cleankernel
+cleankernel:
+	rm -rf $(KERNEL_LIB_OBJS)
+	rm -f makeoffset.s offset.h
+
+.PHONY: cleandep
+cleandep:
+	if ! [ -f Makefile.depend ]; then \
+		rm -f kernel_cfg.timestamp $(CFG2_OUT_SRCS); \
+		rm -f cfg1_out.c cfg1_out.o $(CFG1_OUT) cfg1_out.syms cfg1_out.srec; \
+		rm -f makeoffset.s offset.h; \
+	fi
+	rm -f Makefile.depend
+
+.PHONY: realclean
+realclean: cleandep clean
+	rm -f $(REALCLEAN_FILES)
+
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæãããã¡ã¤ã«ã®ã³ã³ãã¤ã«ã«ã¼ã«ã¨ä¾å­é¢ä¿ä½æ
+#  ã«ã¼ã«ã®å®ç¾©
+#
+#  ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ãçæãããã¡ã¤ã«ã¯ï¼ã¢ããªã±ã¼ã·ã§ã³ãã­ã°ã©ã ç¨ï¼
+#  ã·ã¹ãã ãµã¼ãã¹ç¨ï¼ã«ã¼ãã«ç¨ã®ãã¹ã¦ã®ãªãã·ã§ã³ãä»ãã¦ã³ã³ãã¤ã«
+#  ããï¼
+#
+ALL_CFG_COBJS = $(CFG_COBJS) cfg1_out.o
+ALL_CFG_ASMOBJS = $(CFG_ASMOBJS)
+CFG_CFLAGS = $(APPL_CFLAGS) $(SYSSVC_CFLAGS) $(KERNEL_CFLAGS)
+
+$(ALL_CFG_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(CFG_CFLAGS) $<
+
+#$(ALL_CFG_COBJS:.o=.s): %.s: %.c
+#	$(CC) -S $(CFLAGS) $(CFG_CFLAGS) $<
+
+$(ALL_CFG_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(CFG_CFLAGS) $<
+
+#
+#  ä¾å­é¢ä¿ãã¡ã¤ã«ãã¤ã³ã¯ã«ã¼ã
+#
+-include *.d
+
+#
+#  éçºãã¼ã«ã®ã³ãã³ãåã®å®ç¾©
+#
+ifeq ($(TOOL),gcc)
+  #
+  #  GNUéçºç°å¢ç¨
+  #
+  ifdef GCC_TARGET
+    GCC_TARGET_PREFIX = $(GCC_TARGET)-
+  else
+    GCC_TARGET_PREFIX =
+  endif
+#
+#  Windowsã®å ´åã¯ãã«ãã¹ã«ãã
+#
+ifeq ($(UNAME),Windows)
+  GCC_PATH_WIN = $(ARDUINO_BASE_DIR_WIN)\hardware\tools\gcc-arm-none-eabi-4.8.3-2014q1\bin
+  CC = "$(GCC_PATH_WIN)\$(GCC_TARGET_PREFIX)gcc"
+  CXX = "$(GCC_PATH_WIN)\$(GCC_TARGET_PREFIX)g++"
+  AS = "$(GCC_PATH_WIN)\$(GCC_TARGET_PREFIX)as"
+  LD = "$(GCC_PATH_WIN)\$(GCC_TARGET_PREFIX)ld"
+  AR = "$(GCC_PATH_WIN)\$(GCC_TARGET_PREFIX)ar"
+  NM = "$(GCC_PATH_WIN)\$(GCC_TARGET_PREFIX)nm"
+  RANLIB = "$(GCC_PATH_WIN)\$(GCC_TARGET_PREFIX)ranlib"
+  OBJCOPY = "$(GCC_PATH_WIN)\$(GCC_TARGET_PREFIX)objcopy"
+  OBJDUMP = "$(GCC_PATH_WIN)\$(GCC_TARGET_PREFIX)objdump"
+else
+  CC = $(GCC_TARGET_PREFIX)gcc
+  CXX = $(GCC_TARGET_PREFIX)g++
+  AS = $(GCC_TARGET_PREFIX)as
+  LD = $(GCC_TARGET_PREFIX)ld
+  AR = $(GCC_TARGET_PREFIX)ar
+  NM = $(GCC_TARGET_PREFIX)nm
+  RANLIB = $(GCC_TARGET_PREFIX)ranlib
+  OBJCOPY = $(GCC_TARGET_PREFIX)objcopy
+  OBJDUMP = $(GCC_TARGET_PREFIX)objdump
+endif
+endif
+
+ifdef USE_CXX
+  LINK = $(CXX)
+else
+  LINK = $(CC)
+endif
+
+#
+#  ã³ã³ãã¤ã«ã«ã¼ã«ã®å®ç¾©
+#
+KERNEL_ALL_COBJS = $(KERNEL_COBJS) $(KERNEL_AUX_COBJS)
+
+$(KERNEL_ALL_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+#$(KERNEL_ALL_COBJS:.o=.s): %.s: %.c
+#	$(CC) -S $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_LCOBJS): %.o:
+	$(CC) -DTOPPERS_$(*F) -o $@ -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+#$(KERNEL_LCOBJS:.o=.s): %.s:
+#	$(CC) -DTOPPERS_$(*F) -o $@ -S $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(KERNEL_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(KERNEL_CFLAGS) $<
+
+$(SYSSVC_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+#$(SYSSVC_COBJS:.o=.s): %.s: %.c
+#	$(CC) -S $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(SYSSVC_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(SYSSVC_CFLAGS) $<
+
+$(APPL_COBJS): %.o: %.c
+	$(CC) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+#$(APPL_COBJS:.o=.s): %.s: %.c
+#	$(CC) -S $(CFLAGS) $(APPL_CFLAGS) $<
+
+$(APPL_CXXOBJS): %.o: %.cpp
+	$(CXX) -c $(CFLAGS) $(APPL_CFLAGS) $(CXXFLAGS) $<
+
+#$(APPL_CXXOBJS:.o=.s): %.s: %.cpp
+#	$(CXX) -S $(CFLAGS) $(APPL_CFLAGS) $(CXXFLAGS) $<
+
+$(APPL_ASMOBJS): %.o: %.S
+	$(CC) -c $(CFLAGS) $(APPL_CFLAGS) $<
+
+#
+#  ããã©ã«ãã³ã³ãã¤ã«ã«ã¼ã«ãä¸æ¸ã
+#
+%.o: %.c
+	@echo "*** Default compile rules should not be used."
+	$(CC) -c $(CFLAGS) $<
+
+#%.s: %.c
+#	@echo "*** Default compile rules should not be used."
+#	$(CC) -S $(CFLAGS) $<
+
+%.o: %.cpp
+	@echo "*** Default compile rules should not be used."
+	$(CXX) -c $(CFLAGS) $(CXXFLAGS) $<
+
+#%.s: %.cpp
+#	@echo "*** Default compile rules should not be used."
+#	$(CXX) -S $(CFLAGS) $(CXXFLAGS) $<
+
+%.o: %.S
+	@echo "*** Default compile rules should not be used."
+	$(CC) -c $(CFLAGS) $<
Index: rtos_arduino/trunk/lib/rca.h
===================================================================
--- rtos_arduino/trunk/lib/rca.h	(revision 136)
+++ rtos_arduino/trunk/lib/rca.h	(revision 136)
@@ -0,0 +1,19 @@
+#ifndef _RCA_H_
+#define _RCA_H_
+
+#include <kernel.h>
+#include <t_syslog.h>
+#include <t_stdlib.h>
+
+#include "rca_lib.h"
+#undef true
+#undef false
+#include "Arduino.h"
+
+#ifdef RCA_USE_SERIAL3
+extern Uart Serial3;
+#endif /* RCA_USE_SERIAL3 */
+
+#include "kernel_cfg.h"
+#include "rca_app.h"
+#endif /* _RCA_H_ */
Index: rtos_arduino/trunk/lib/rca_lib.cfg
===================================================================
--- rtos_arduino/trunk/lib/rca_lib.cfg	(revision 136)
+++ rtos_arduino/trunk/lib/rca_lib.cfg	(revision 136)
@@ -0,0 +1,82 @@
+#include "rca_lib.h"
+
+ATT_INI({ TA_NULL, 0, rca_init });
+CRE_TSK(RCA_MAINTASK, { TA_ACT, 0, rca_maintask, RCA_MAINTASK_SETUP_PRI, RCA_MAINTASK_STACK_SIZE, NULL });
+
+#if RCA_NUM_TASK > 0
+CRE_TSK(RCA_TASK1, { TA_ACT, 0, rca_task1, RCA_TASK1_SETUP_PRI, RCA_TASK1_STACK_SIZE, NULL });
+#endif /* RCA_NUM_TASK > 0 */
+
+#if RCA_NUM_TASK > 1
+CRE_TSK(RCA_TASK2, { TA_ACT, 0, rca_task2, RCA_TASK2_SETUP_PRI, RCA_TASK2_STACK_SIZE, NULL });
+#endif /* RCA_NUM_TASK > 1 */
+
+#if RCA_NUM_TASK > 2
+CRE_TSK(RCA_TASK3, { TA_ACT, 0, rca_task3, RCA_TASK3_SETUP_PRI, RCA_TASK3_STACK_SIZE, NULL });
+#endif /* RCA_NUM_TASK > 2 */
+
+#if RCA_NUM_TASK > 3
+CRE_TSK(RCA_TASK4, { TA_ACT, 0, rca_task4, RCA_TASK4_SETUP_PRI, RCA_TASK4_STACK_SIZE, NULL });
+#endif /* RCA_NUM_TASK > 3 */
+
+#if RCA_NUM_TASK > 4
+CRE_TSK(RCA_TASK5, { TA_ACT, 0, rca_task5, RCA_TASK5_SETUP_PRI, RCA_TASK5_STACK_SIZE, NULL });
+#endif /* RCA_NUM_TASK > 4 */
+
+#ifdef RCA_ENABLE_PROFILING
+CRE_TSK(RCA_IDLE_TASK, { TA_ACT, 0, rca_idle_task, 15, 512, NULL });
+#endif /* RCA_ENABLE_PROFILING */
+
+//For SysTick
+CRE_CYC(RCA_CYCHDR, { TA_STA, 0, rca_CycHandler, 1, 1});
+
+//For USB (ToDo)Naitiveã«å¤æ´
+DEF_INH((16+7), { TA_NULL, rca_USB_Handler });
+CFG_INT((16+7), { TA_NULL, -1 });
+
+#ifdef TOPPERS_USE_ARDUINO_SERIAL
+//For SERCOM5
+DEF_INH((16+14), { TA_NULL, rca_SERCOM5_Handler });
+CFG_INT((16+14), { TA_NULL, -1 });
+#endif /* TOPPERS_USE_ARDUINO_SERIAL */
+
+//For SERCOM0(Serial5)
+DEF_INH((16+9), { TA_NULL, rca_SERCOM0_Handler });
+CFG_INT((16+9), { TA_NULL, -1 });
+
+#ifdef RCA_USE_SERIAL3
+//For SERCOM2(Serial3)
+DEF_INH((16+11), { TA_NULL, rca_SERCOM2_Handler });
+CFG_INT((16+11), { TA_NULL, -1 });
+#endif /* RCA_USE_SERIAL3 */
+
+//For SERCOM3(I2C)
+DEF_INH((16+12), { TA_NULL, rca_SERCOM3_Handler });
+CFG_INT((16+12), { TA_NULL, -1 });
+
+//For SERCOM4(SPI)
+DEF_INH((16+13), { TA_NULL, rca_SERCOM4_Handler });
+CFG_INT((16+13), { TA_NULL, -1 });
+
+//For EIC
+DEF_INH((16+4), { TA_NULL, rca_EIC_Handler });
+CFG_INT((16+4), { TA_NULL, -1 });
+
+//For TC5
+DEF_INH((16+20), { TA_NULL, rca_TC5_Handler });
+CFG_INT((16+20), { TA_NULL, -1 });
+
+//For RTC
+DEF_INH((16+3), { TA_NULL, rca_RTC_Handler });
+CFG_INT((16+3), { TA_NULL, -1 });
+
+
+INCLUDE("target_timer.cfg");
+
+#ifdef TOPPERS_USE_LOGTASK
+INCLUDE("syssvc/serial.cfg");
+INCLUDE("syssvc/logtask.cfg");
+#endif /* TOPPERS_USE_LOGTASK */
+
+INCLUDE("syssvc/syslog.cfg");
+INCLUDE("syssvc/banner.cfg");
Index: rtos_arduino/trunk/lib/rca_lib.cpp
===================================================================
--- rtos_arduino/trunk/lib/rca_lib.cpp	(revision 136)
+++ rtos_arduino/trunk/lib/rca_lib.cpp	(revision 136)
@@ -0,0 +1,344 @@
+#include "rca.h"
+#include "rca_lib.h"
+
+extern "C" {
+extern void yield(void);
+extern void rca_ena_int(uint_t intno);
+extern void rca_dis_int(uint_t intno);
+}
+
+#ifdef RCA_ENABLE_PROFILING
+volatile uint32_t rca_idle_result;
+volatile uint32_t rca_isr_result;
+volatile uint32_t rca_dispatch_result;
+volatile uint32_t rca_timer_isr_result;
+volatile uint32_t rca_usb_isr_result;
+volatile uint32_t rca_sercom0_isr_result;
+volatile uint32_t rca_sercom2_isr_result;
+volatile uint32_t rca_sercom3_isr_result;
+volatile uint32_t rca_sercom4_isr_result;
+volatile uint32_t rca_sercom5_isr_result;
+volatile uint32_t rca_eic_isr_result;
+volatile uint32_t rca_tc5_isr_result;
+volatile uint32_t rca_rtc_isr_result;
+
+static volatile uint32_t rca_idle_cnt;
+static volatile uint32_t rca_isr_cnt;
+static volatile uint32_t rca_dispatch_cnt;
+static volatile uint32_t rca_timer_isr_cnt;
+static volatile uint32_t rca_usb_isr_cnt;
+static volatile uint32_t rca_sercom0_isr_cnt;
+static volatile uint32_t rca_sercom2_isr_cnt;
+static volatile uint32_t rca_sercom3_isr_cnt;
+static volatile uint32_t rca_sercom4_isr_cnt;
+static volatile uint32_t rca_sercom5_isr_cnt;
+static volatile uint32_t rca_eic_isr_cnt;
+static volatile uint32_t rca_tc5_isr_cnt;
+static volatile uint32_t rca_rtc_isr_cnt;     
+static volatile uint32_t rca_profiling_cyccnt;
+#endif /* RCA_ENABLE_PROFILING */
+
+Inline void
+rca_di(void){
+	Asm("cpsid f":::"memory");
+}
+
+/*
+ *  FAULTMASKÌNA
+ */
+Inline void
+rca_ei(void){
+	Asm("cpsie f":::"memory");
+}
+
+void
+rca_init(intptr_t exinf)
+{
+    init(); //wiring.c
+}
+
+void
+rca_ena_int(uint_t intno) {
+    if (ena_int(intno + 16) != E_OK) {
+        while(1); //ToDo
+    }
+
+}
+
+void
+rca_dis_int(uint_t intno) {
+    if (dis_int(intno + 16) != E_OK) {
+        while(1); //ToDo
+    }
+}
+
+extern const DeviceVectors exception_table;
+
+#ifdef RCA_RR_SCEDULE
+static uint32_t time_slice = 0;
+#endif /* RCA_RR_SCEDULE */
+
+/*
+ *  Cyclic Handler
+ */
+void
+rca_CycHandler(intptr_t exinf)
+{    
+#ifdef RCA_RR_SCEDULE
+    int i;
+    if (++time_slice == RCA_RR_SCEDULE_CYCLE) {
+        time_slice = 0;
+        for(i = 1; i < 16; i++){
+            if (RCA_RR_SCEDULE & (i << i)) {
+                irot_rdq(i);
+            }
+        }
+    }
+#endif /* RCA_RR_SCEDULE */
+#ifdef RCA_ENABLE_PROFILING    
+    rca_di();
+    rca_isr_cnt++;
+    rca_timer_isr_cnt++;
+    rca_profiling_cyccnt++;
+    if(rca_profiling_cyccnt == RCA_PROFILING_CYC_MS){
+        rca_idle_result=        rca_idle_cnt;
+        rca_isr_result=         rca_isr_cnt;
+        rca_dispatch_result=    rca_dispatch_cnt;
+        rca_timer_isr_result=   rca_timer_isr_cnt;
+        rca_usb_isr_result=     rca_usb_isr_cnt;
+        rca_sercom0_isr_result= rca_sercom0_isr_cnt;
+        rca_sercom2_isr_result= rca_sercom2_isr_cnt;        
+        rca_sercom3_isr_result= rca_sercom3_isr_cnt;
+        rca_sercom4_isr_result= rca_sercom4_isr_cnt;
+        rca_sercom5_isr_result= rca_sercom5_isr_cnt;
+        rca_eic_isr_result=     rca_eic_isr_cnt;
+        rca_tc5_isr_result=     rca_tc5_isr_cnt;
+        rca_rtc_isr_result=     rca_rtc_isr_cnt;             
+        rca_idle_cnt = 0;
+        rca_isr_cnt = 0;
+        rca_dispatch_cnt = 0;
+        rca_timer_isr_cnt = 0;
+        rca_usb_isr_cnt = 0;
+        rca_sercom0_isr_cnt = 0;
+        rca_sercom2_isr_cnt = 0;        
+        rca_sercom3_isr_cnt = 0;
+        rca_sercom4_isr_cnt = 0;
+        rca_sercom5_isr_cnt = 0;
+        rca_eic_isr_cnt = 0;
+        rca_tc5_isr_cnt = 0;
+        rca_rtc_isr_cnt = 0;
+        rca_profiling_cyccnt = 0;
+    }
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */    
+    ((void(*)(void))(exception_table.pfnSysTick_Handler))();        
+}
+
+/*
+ *  Interrupt Handler
+ */
+void
+rca_USB_Handler(void)
+{
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_usb_isr_cnt++;
+    rca_isr_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */    
+    ((void(*)(void))(exception_table.pfnUSB_Handler))();
+}
+
+void
+rca_SERCOM0_Handler(void)
+{
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_sercom0_isr_cnt++;
+    rca_isr_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */    
+    ((void(*)(void))(exception_table.pfnSERCOM0_Handler))();
+}
+
+#ifdef RCA_USE_SERIAL3
+#define PIN_SERIAL3_RX 49  /* D5 */
+#define PIN_SERIAL3_TX 48  /* D4 */
+
+Uart Serial3(&sercom2, PIN_SERIAL3_RX, PIN_SERIAL3_TX);
+
+void
+rca_SERCOM2_Handler(void)
+{
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_sercom2_isr_cnt++;
+    rca_isr_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */
+    Serial3.IrqHandler();
+}
+#endif /* RCA_USE_SERIAL3 */
+
+void
+rca_SERCOM3_Handler(void)
+{
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_sercom3_isr_cnt++;
+    rca_isr_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */    
+    ((void(*)(void))(exception_table.pfnSERCOM3_Handler))();
+}
+
+void
+rca_SERCOM4_Handler(void)
+{
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_sercom4_isr_cnt++;
+    rca_isr_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */    
+    ((void(*)(void))(exception_table.pfnSERCOM4_Handler))();
+}
+
+#ifdef TOPPERS_USE_ARDUINO_SERIAL
+void
+rca_SERCOM5_Handler(void)
+{
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_sercom5_isr_cnt++;
+    rca_isr_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */    
+    ((void(*)(void))(exception_table.pfnSERCOM5_Handler))();
+}
+#endif /* TOPPERS_USE_ARDUINO_SERIAL */
+
+void
+rca_EIC_Handler(void)
+{
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_eic_isr_cnt++;
+    rca_isr_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */    
+    ((void(*)(void))(exception_table.pfnEIC_Handler))();
+}
+
+void
+rca_TC5_Handler(void)
+{
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_tc5_isr_cnt++;
+    rca_isr_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */    
+    ((void(*)(void))(exception_table.pfnTC5_Handler))();
+}
+
+void
+rca_RTC_Handler(void)
+{
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_rtc_isr_cnt++;
+    rca_isr_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */
+    ((void(*)(void))(exception_table.pfnRTC_Handler))();
+}
+
+/*
+ *  For delay
+ */
+void
+yield(void){
+#ifdef RCA_RR_SCEDULE    
+    time_slice = 0;
+#endif /* RCA_RR_SCEDULE */
+#ifdef RCA_ENABLE_PROFILING
+    rca_di();
+    rca_dispatch_cnt++;
+    rca_ei();
+#endif /* RCA_ENABLE_PROFILING */    
+    dly_tsk(0);
+}
+
+extern void setup(void);
+extern void loop(void);
+
+void
+rca_maintask(intptr_t exinf)
+{
+    syslog(LOG_NOTICE, "Arduino Main Task start!");
+    dly_tsk(1);
+#ifdef USBCON
+    USBDevice.init();
+    USBDevice.attach();
+#endif /* USBCON */
+
+    setup();
+
+    chg_pri(0, RCA_MAINTASK_LOOP_PRI);
+    
+    while(1){
+        loop();
+        if (serialEventRun) serialEventRun();
+    }    
+}
+
+#define RCA_TASK_BODY(NUM) \
+extern void task##NUM##_setup(void); \
+extern void task##NUM##_loop(void); \
+ \
+void \
+rca_task##NUM(intptr_t exinf) \
+{ \
+    syslog(LOG_NOTICE, "Arduino Task" #NUM " start!"); \
+    dly_tsk(1); \
+ \
+    task##NUM##_setup(); \
+     \
+    chg_pri(0, RCA_TASK##NUM##_LOOP_PRI); \
+         \
+    while(1){ \
+        task##NUM##_loop(); \
+    }     \
+}
+
+#if RCA_NUM_TASK > 0
+RCA_TASK_BODY(1)
+#endif /* RCA_NUM_TASK > 0 */
+
+#if RCA_NUM_TASK > 1
+RCA_TASK_BODY(2)
+#endif /* RCA_NUM_TASK > 1 */
+
+#if RCA_NUM_TASK > 2
+RCA_TASK_BODY(3)
+#endif /* RCA_NUM_TASK > 2 */
+
+#if RCA_NUM_TASK > 3
+RCA_TASK_BODY(4)
+#endif /* RCA_NUM_TASK > 3 */
+
+#if RCA_NUM_TASK > 4
+RCA_TASK_BODY(5)
+#endif /* RCA_NUM_TASK > 4 */
+
+#ifdef RCA_ENABLE_PROFILING
+void
+rca_idle_task(intptr_t exinf) {
+    while(1){
+        rca_di();
+        rca_idle_cnt++;
+        rca_ei();
+    }
+}
+#endif /* RCA_ENABLE_PROFILING */
Index: rtos_arduino/trunk/lib/rca_lib.h
===================================================================
--- rtos_arduino/trunk/lib/rca_lib.h	(revision 136)
+++ rtos_arduino/trunk/lib/rca_lib.h	(revision 136)
@@ -0,0 +1,147 @@
+#include "rca_app.h"
+
+/*
+ *  Max number of task
+ */
+#define RCA_NUM_TASK_MAX  5
+
+/*
+ *  Check number of task
+ */
+#if RCA_NUM_TASK > RCA_NUM_TASK_MAX
+#error The number of Task is over!
+#endif /* RCA_NUM_TASK > RCA_NUM_TASK_MAX */
+
+/*
+ *  Idle task loop count per 10ms at idle state
+ */
+#define IDLE_TASK_IDLE_LOOP_10MS 42178
+
+/*
+ * Default Macro  
+ */
+
+/*
+ *  Priotiry
+ */
+#ifndef RCA_MAINTASK_SETUP_PRI
+#define  RCA_MAINTASK_SETUP_PRI  5
+#endif /*  RCA_MAINTASK_SETUP_PRI */
+
+#ifndef RCA_MAINTASK_LOOP_PRI
+#define  RCA_MAINTASK_LOOP_PRI  5
+#endif /*  RCA_MAINTASK_SETUP_PRI */
+
+#ifndef RCA_TASK1_SETUP_PRI
+#define  RCA_TASK1_SETUP_PRI  5
+#endif /*  RCA_TASK1_SETUP_PRI */
+
+#ifndef RCA_TASK1_LOOP_PRI
+#define  RCA_TASK1_LOOP_PRI  5
+#endif /*  RCA_TASK1_SETUP_PRI */
+
+#ifndef RCA_TASK2_SETUP_PRI
+#define  RCA_TASK2_SETUP_PRI  5
+#endif /*  RCA_TASK2_SETUP_PRI */
+
+#ifndef RCA_TASK2_LOOP_PRI
+#define  RCA_TASK2_LOOP_PRI  5
+#endif /*  RCA_TASK2_SETUP_PRI */
+
+#ifndef RCA_TASK3_SETUP_PRI
+#define  RCA_TASK3_SETUP_PRI  5
+#endif /*  RCA_TASK3_SETUP_PRI */
+
+#ifndef RCA_TASK3_LOOP_PRI
+#define  RCA_TASK3_LOOP_PRI  5
+#endif /*  RCA_TASK3_SETUP_PRI */
+
+#ifndef RCA_TASK4_SETUP_PRI
+#define  RCA_TASK4_SETUP_PRI  5
+#endif /*  RCA_TASK4_SETUP_PRI */
+
+#ifndef RCA_TASK4_LOOP_PRI
+#define  RCA_TASK4_LOOP_PRI  5
+#endif /*  RCA_TASK4_SETUP_PRI */
+
+#ifndef RCA_TASK5_SETUP_PRI
+#define  RCA_TASK5_SETUP_PRI  5
+#endif /*  RCA_TASK5_SETUP_PRI */
+
+#ifndef RCA_TASK5_LOOP_PRI
+#define  RCA_TASK5_LOOP_PRI  5
+#endif /*  RCA_TASK3_SETUP_PRI */
+
+/*
+ *  Stack Size
+ */
+#ifndef RCA_MAINTASK_STACK_SIZE
+#define RCA_MAINTASK_STACK_SIZE 2048
+#endif  /* RCA_MAINTASK_STACK_SIZE */
+
+#ifndef RCA_TASK1_STACK_SIZE
+#define RCA_TASK1_STACK_SIZE 1024
+#endif  /* RCA_TASK1_STACK_SIZE */
+
+#ifndef RCA_TASK2_STACK_SIZE
+#define RCA_TASK2_STACK_SIZE 1024
+#endif  /* RCA_TASK2_STACK_SIZE */
+
+#ifndef RCA_TASK3_STACK_SIZE
+#define RCA_TASK3_STACK_SIZE 1024
+#endif  /* RCA_TASK3_STACK_SIZE */
+
+#ifndef RCA_TASK4_STACK_SIZE
+#define RCA_TASK4_STACK_SIZE 1024
+#endif  /* RCA_TASK4_STACK_SIZE */
+
+#ifndef RCA_TASK5_STACK_SIZE
+#define RCA_TASK5_STACK_SIZE 1024
+#endif  /* RCA_TASK5_STACK_SIZE */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void rca_init(intptr_t exinf);
+extern void rca_maintask(intptr_t exinf);
+extern void rca_task1(intptr_t exinf);
+extern void rca_task2(intptr_t exinf);
+extern void rca_task3(intptr_t exinf);
+extern void rca_task4(intptr_t exinf);
+extern void rca_task5(intptr_t exinf);
+extern void rca_CycHandler(intptr_t exinf);
+
+extern void rca_USB_Handler(void);
+extern void rca_SERCOM0_Handler(void);
+extern void rca_SERCOM2_Handler(void);
+extern void rca_SERCOM3_Handler(void);
+extern void rca_SERCOM4_Handler(void);
+extern void rca_SERCOM5_Handler(void);
+extern void rca_EIC_Handler(void);
+extern void rca_TC5_Handler(void);
+extern void rca_RTC_Handler(void);
+
+#ifdef RCA_ENABLE_PROFILING
+extern void rca_idle_task(intptr_t exinf);
+extern volatile uint32_t rca_idle_result;
+extern volatile uint32_t rca_isr_result;
+extern volatile uint32_t rca_dispatch_result;
+extern volatile uint32_t rca_timer_isr_result;
+extern volatile uint32_t rca_usb_isr_result;
+extern volatile uint32_t rca_sercom0_isr_result;
+extern volatile uint32_t rca_sercom4_isr_result;
+extern volatile uint32_t rca_sercom5_isr_result;
+extern volatile uint32_t rca_eic_isr_result;
+extern volatile uint32_t rca_tc5_isr_result;
+extern volatile uint32_t rca_rtc_isr_result;
+
+#ifdef RCA_USE_SERIAL3
+extern volatile uint32_t rca_sercom3_isr_result;
+#endif /* RCA_USE_SERIAL3 */
+  
+#endif /* RCA_ENABLE_PROFILING */
+
+#ifdef __cplusplus
+}
+#endif
