source: uKadecot/trunk/ssp/target/grsakura_ccrx/target_config.c@ 101

Last change on this file since 101 was 101, checked in by coas-nagasima, 8 years ago

TOPPERS/uKadecotのソースコードを追加

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1/*
2 * TOPPERS/SSP Kernel
3 * Smallest Set Profile Kernel
4 *
5 * Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
6 * Toyohashi Univ. of Technology, JAPAN
7 * Copyright (C) 2005-2007 by Embedded and Real-Time Systems Laboratory
8 * Graduate School of Information Science, Nagoya Univ., JAPAN
9 * Copyright (C) 2008-2010 by Witz Corporation, JAPAN
10 * Copyright (C) 2013 by Mitsuhiro Matsuura
11 *
12 * ã‹L’˜ìŒ ŽÒ‚́CFree Software Foundation ‚É‚æ‚Á‚ÄŒö•\‚³‚ê‚Ä‚¢‚é
13 * GNU General Public License ‚Ì Version 2 ‚É‹Lq‚³‚ê‚Ä‚¢‚éðŒ‚©CˆÈ
14 * ‰º‚Ì(1)`(4)‚ÌðŒ‚ð–ž‚½‚·ê‡‚ÉŒÀ‚èC–{ƒ\ƒtƒgƒEƒFƒAi–{ƒ\ƒtƒgƒEƒF
15 * ƒA‚ð‰ü•Ï‚µ‚½‚à‚Ì‚ðŠÜ‚ށDˆÈ‰º“¯‚¶j‚ðŽg—pE•¡»E‰ü•ÏEÄ”z•ziˆÈ‰ºC
16 * —˜—p‚ƌĂԁj‚·‚邱‚Ƃ𖳏ž‚Å‹–‘ø‚·‚éD
17 * (1) –{ƒ\ƒtƒgƒEƒFƒA‚ðƒ\[ƒXƒR[ƒh‚ÌŒ`‚Å—˜—p‚·‚éê‡‚ɂ́Cã‹L‚Ì’˜ì
18 * Œ •\Ž¦C‚±‚Ì—˜—pðŒ‚¨‚æ‚щº‹L‚Ì–³•ÛØ‹K’肪C‚»‚Ì‚Ü‚Ü‚ÌŒ`‚Ń\[
19 * ƒXƒR[ƒh’†‚ÉŠÜ‚Ü‚ê‚Ä‚¢‚邱‚ƁD
20 * (2) –{ƒ\ƒtƒgƒEƒFƒA‚ðÄ—˜—p‰Â”\‚ȃoƒCƒiƒŠƒR[ƒhiƒŠƒƒP[ƒ^ƒuƒ‹ƒIƒu
21 * ƒWƒFƒNƒgƒtƒ@ƒCƒ‹‚⃉ƒCƒuƒ‰ƒŠ‚Ȃǁj‚ÌŒ`‚Å—˜—p‚·‚éê‡‚ɂ́C—˜—p
22 * ‚É”º‚¤ƒhƒLƒ…
23ƒƒ“ƒgi—˜—pŽÒƒ}ƒjƒ…
24ƒAƒ‹‚Ȃǁj‚ɁCã‹L‚Ì’˜ìŒ •\Ž¦C
25 * ‚±‚Ì—˜—pðŒ‚¨‚æ‚щº‹L‚Ì–³•ÛØ‹K’è‚ðŒfÚ‚·‚邱‚ƁD
26 * (3) –{ƒ\ƒtƒgƒEƒFƒA‚ðÄ—˜—p•s‰Â”\‚ȃoƒCƒiƒŠƒR[ƒh‚ÌŒ`‚Ü‚½‚Í‹@Ší‚É‘g
27 * ‚ݍž‚ñ‚¾Œ`‚Å—˜—p‚·‚éê‡‚ɂ́CŽŸ‚Ì‚¢‚¸‚ê‚©‚ÌðŒ‚ð–ž‚½‚·‚±‚ƁD
28 * (a) —˜—p‚É”º‚¤ƒhƒLƒ…
29ƒƒ“ƒgi—˜—pŽÒƒ}ƒjƒ…
30ƒAƒ‹‚Ȃǁj‚ɁCã‹L‚Ì’˜ì
31 * Œ •\Ž¦C‚±‚Ì—˜—pðŒ‚¨‚æ‚щº‹L‚Ì–³•ÛØ‹K’è‚ðŒfÚ‚·‚邱‚ƁD
32 * (b) —˜—p‚ÌŒ`‘Ô‚ðC•Ê‚É’è‚ß‚é•û–@‚É‚æ‚Á‚āCã‹L’˜ìŒ ŽÒ‚É•ñ‚·‚é
33 * ‚±‚ƁD
34 * (4) –{ƒ\ƒtƒgƒEƒFƒA‚Ì—˜—p‚É‚æ‚è’¼Ú“I‚Ü‚½‚͊ԐړI‚ɐ¶‚¶‚é‚¢‚©‚Ȃ鑹
35 * ŠQ‚©‚ç‚àCã‹L’˜ìŒ ŽÒ‚ð–Ɛӂ·‚邱‚ƁD
36 *
37 * –{ƒ\ƒtƒgƒEƒFƒA‚́C–³•ÛØ‚Å’ñ‹Ÿ‚³‚ê‚Ä‚¢‚é‚à‚Ì‚Å‚ ‚éDã‹L’˜ìŒ ŽÒ‚́C
38 * –{ƒ\ƒtƒgƒEƒFƒA‚ÉŠÖ‚µ‚āC‚»‚Ì“K—p‰Â”\«‚àŠÜ‚߂āC‚¢‚©‚È‚é•ÛØ‚às‚í
39 * ‚È‚¢D‚Ü‚½C–{ƒ\ƒtƒgƒEƒFƒA‚Ì—˜—p‚É‚æ‚è’¼Ú“I‚Ü‚½‚͊ԐړI‚ɐ¶‚¶‚½‚¢
40 * ‚©‚Ȃ鑹ŠQ‚ÉŠÖ‚µ‚Ä‚àC‚»‚̐ӔC‚𕉂í‚È‚¢D
41 *
42 */
43
44/*
45 * ƒ^[ƒQƒbƒgƒVƒXƒeƒ€ˆË‘¶ƒ‚ƒWƒ…
46[ƒ‹iGR-SAKURA—pj
47 */
48
49#include "kernel_impl.h"
50#include <sil.h>
51#include "grsakura.h"
52#include "rx600/rx630_uart.h"
53
54/*
55 * ƒ^[ƒQƒbƒgƒVƒXƒeƒ€ˆË‘¶ ‰Šú‰»ƒ‹[ƒ`ƒ“
56 */
57void
58target_initialize( void )
59{
60 /*
61 * ƒvƒƒZƒbƒTˆË‘¶‚̏‰Šú‰»
62 */
63 prc_initialize();
64
65 /* IOƒ|[ƒg‰Šú‰» */
66 /* P25‚ðo—̓|[ƒg‚É‚·‚é */
67 sil_wrb_mem(PORT2_PDR_ADDR,
68 sil_reb_mem(PORT2_PDR_ADDR) | PORT_PDR_B5_BIT);
69 /* PA0, PA1, PA2, PA6‚ðo—̓|[ƒg‚É‚·‚é */
70 sil_wrb_mem(PORTA_PDR_ADDR,
71 sil_reb_mem(PORTA_PDR_ADDR) | PORT_PDR_B0_BIT | PORT_PDR_B1_BIT | PORT_PDR_B2_BIT | PORT_PDR_B6_BIT);
72 /* PA7‚ð“ü—̓|[ƒg‚É‚·‚é */
73 sil_wrb_mem(PORTA_PDR_ADDR,
74 sil_reb_mem(PORTA_PDR_ADDR) & ~PORT_PDR_B7_BIT);
75
76 /*
77 * ƒVƒŠƒAƒ‹ƒ|[ƒg‚̐ݒè
78 */
79 rx630_uart_init(TARGET_PUTC_PORTID, UART_BAUDRATE, UART_CLKSRC);
80
81 /* ƒ|[ƒgP20‚ðTxD0, ƒ|[ƒgP21‚ðRxD0‚É */
82 sil_wrb_mem(PORT2_PMR_ADDR, 0x03);
83
84 /* ƒf[ƒ^ƒfƒBƒŒƒNƒVƒ‡ƒ“ƒŒƒWƒXƒ^(PDR)‚̐ݒè P21(RxD0)‚ð“ü—̓|[ƒg‚É‚·‚é */
85 sil_wrb_mem(PORT2_PDR_ADDR,
86 sil_reb_mem(PORT2_PDR_ADDR) & ~PORT_PDR_B1_BIT);
87
88 /* ƒf[ƒ^ƒfƒBƒŒƒNƒVƒ‡ƒ“ƒŒƒWƒXƒ^(PDR)‚̐ݒè P20(TxD0)‚ðo—̓|[ƒg‚É‚·‚é */
89 sil_wrb_mem(PORT2_PDR_ADDR,
90 sil_reb_mem(PORT2_PDR_ADDR) | PORT_PDR_B0_BIT);
91
92 /* ƒ|[ƒgP40`P47‚ðŽü•Ó‹@Ší‚É */
93 sil_wrb_mem(PORT4_PMR_ADDR, 0xFF);
94
95 /* ƒ|[ƒgP40`P47‚ð“ü—̓|[ƒg‚É‚·‚é */
96 sil_wrb_mem(PORT4_PDR_ADDR, 0x00);
97
98 /* ‘‚«ž‚݃vƒƒeƒNƒgƒŒƒWƒXƒ^‚̐ݒè PFSWEƒrƒbƒg‚ւ̏‘‚«ž‚Ý‚ð‹–‰Â */
99 sil_wrb_mem(MPC_PWPR_ADDR, 0x00);
100 /* ‘‚«ž‚݃vƒƒeƒNƒgƒŒƒWƒXƒ^‚̐ݒè PxxFSƒŒƒWƒXƒ^‚ւ̏‘‚«ž‚Ý‚ð‹–‰Â */
101 sil_wrb_mem(MPC_PWPR_ADDR, 0x40);
102
103 /* P21’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ RXD0‚Æ‚·‚é */
104 sil_wrb_mem(MPC_P21PFS_ADDR, 0x0a);
105 /* P20’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ TXD0‚Æ‚·‚é */
106 sil_wrb_mem(MPC_P20PFS_ADDR, 0x0a);
107
108 /* P40’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ ƒAƒiƒƒO“ü—ÍAN000‚Æ‚·‚é */
109 sil_wrb_mem(MPC_P40PFS_ADDR, 0x80);
110 /* P41’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ ƒAƒiƒƒO“ü—ÍAN001‚Æ‚·‚é */
111 sil_wrb_mem(MPC_P41PFS_ADDR, 0x80);
112 /* P42’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ ƒAƒiƒƒO“ü—ÍAN002‚Æ‚·‚é */
113 sil_wrb_mem(MPC_P42PFS_ADDR, 0x80);
114 /* P43’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ ƒAƒiƒƒO“ü—ÍAN003‚Æ‚·‚é */
115 sil_wrb_mem(MPC_P43PFS_ADDR, 0x80);
116 /* P44’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ ƒAƒiƒƒO“ü—ÍAN004‚Æ‚·‚é */
117 sil_wrb_mem(MPC_P44PFS_ADDR, 0x80);
118 /* P45’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ ƒAƒiƒƒO“ü—ÍAN005‚Æ‚·‚é */
119 sil_wrb_mem(MPC_P45PFS_ADDR, 0x80);
120 /* P46’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ ƒAƒiƒƒO“ü—ÍAN006‚Æ‚·‚é */
121 sil_wrb_mem(MPC_P46PFS_ADDR, 0x80);
122 /* P47’[Žq‹@”\§ŒäƒŒƒWƒXƒ^ ƒAƒiƒƒO“ü—ÍAN007‚Æ‚·‚é */
123 sil_wrb_mem(MPC_P47PFS_ADDR, 0x80);
124
125 /* ‘‚«ž‚݃vƒƒeƒNƒgƒŒƒWƒXƒ^‚ÌÝ’è ‘‚«ž‚Ý‚ð‹ÖŽ~ */
126 sil_wrb_mem(MPC_PWPR_ADDR, 0x80);
127}
128
129
130/*
131 * ƒ^[ƒQƒbƒgƒVƒXƒeƒ€‚̏I—¹ƒ‹[ƒ`ƒ“
132 */
133void
134target_exit( void )
135{
136 /*
137 * ƒvƒƒZƒbƒTˆË‘¶‚̏I—¹ˆ—
138 */
139 prc_terminate();
140
141 while ( 1 );
142}
143
144
145/*
146 * ƒVƒXƒeƒ€ƒƒO‚̒჌ƒxƒ‹o—Í‚Ì‚½‚ß‚Ì•¶Žšo—Í
147 */
148void
149target_fput_log( char c )
150{
151 if( c == '\n' ){
152 rx630_uart_pol_putc( '\r' , TARGET_PUTC_PORTID );
153 }
154
155 rx630_uart_pol_putc( c , TARGET_PUTC_PORTID );
156}
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