source: uKadecot/trunk/ssp/arch/rx630_ccrx/rx630_config.c@ 101

Last change on this file since 101 was 101, checked in by coas-nagasima, 8 years ago

TOPPERS/uKadecotのソースコードを追加

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
  • Property svn:mime-type set to text/plain
File size: 26.8 KB
Line 
1/*
2 * TOPPERS/SSP Kernel
3 * Smallest Set Profile Kernel
4 *
5 * Copyright (C) 2010 by Witz Corporation, JAPAN
6 * Copyright (C) 2013 by Mitsuhiro Matsuura
7 *
8 * ã‹L’˜ìŒ ŽÒ‚́CˆÈ‰º‚Ì(1)`(4)‚ÌðŒ‚ð–ž‚½‚·ê‡‚ÉŒÀ‚èC–{ƒ\ƒtƒgƒEƒF
9 * ƒAi–{ƒ\ƒtƒgƒEƒFƒA‚ð‰ü•Ï‚µ‚½‚à‚Ì‚ðŠÜ‚ށDˆÈ‰º“¯‚¶j‚ðŽg—pE•¡»E‰ü
10 * •ÏEÄ”z•ziˆÈ‰ºC—˜—p‚ƌĂԁj‚·‚邱‚Ƃ𖳏ž‚Å‹–‘ø‚·‚éD
11 * (1) –{ƒ\ƒtƒgƒEƒFƒA‚ðƒ\[ƒXƒR[ƒh‚ÌŒ`‚Å—˜—p‚·‚éê‡‚ɂ́Cã‹L‚Ì’˜ì
12 * Œ •\Ž¦C‚±‚Ì—˜—pðŒ‚¨‚æ‚щº‹L‚Ì–³•ÛØ‹K’肪C‚»‚Ì‚Ü‚Ü‚ÌŒ`‚Ń\[
13 * ƒXƒR[ƒh’†‚ÉŠÜ‚Ü‚ê‚Ä‚¢‚邱‚ƁD
14 * (2) –{ƒ\ƒtƒgƒEƒFƒA‚ðCƒ‰ƒCƒuƒ‰ƒŠŒ`Ž®‚ȂǁC‘¼‚̃\ƒtƒgƒEƒFƒAŠJ”­‚ÉŽg
15 * —p‚Å‚«‚éŒ`‚ōĔz•z‚·‚éê‡‚ɂ́CÄ”z•z‚É”º‚¤ƒhƒLƒ…
16ƒƒ“ƒgi—˜—p
17 * ŽÒƒ}ƒjƒ…
18ƒAƒ‹‚Ȃǁj‚ɁCã‹L‚Ì’˜ìŒ •\Ž¦C‚±‚Ì—˜—pðŒ‚¨‚æ‚щº‹L
19 * ‚Ì–³•ÛØ‹K’è‚ðŒfÚ‚·‚邱‚ƁD
20 * (3) –{ƒ\ƒtƒgƒEƒFƒA‚ðC‹@Ší‚É‘g‚ݍž‚ނȂǁC‘¼‚̃\ƒtƒgƒEƒFƒAŠJ”­‚ÉŽg
21 * —p‚Å‚«‚È‚¢Œ`‚ōĔz•z‚·‚éê‡‚ɂ́CŽŸ‚Ì‚¢‚¸‚ê‚©‚ÌðŒ‚ð–ž‚½‚·‚±
22 * ‚ƁD
23 * (a) Ä”z•z‚É”º‚¤ƒhƒLƒ…
24ƒƒ“ƒgi—˜—pŽÒƒ}ƒjƒ…
25ƒAƒ‹‚Ȃǁj‚ɁCã‹L‚Ì’˜
26 * ìŒ •\Ž¦C‚±‚Ì—˜—pðŒ‚¨‚æ‚щº‹L‚Ì–³•ÛØ‹K’è‚ðŒfÚ‚·‚邱‚ƁD
27 * (b) Ä”z•z‚ÌŒ`‘Ô‚ðC•Ê‚É’è‚ß‚é•û–@‚É‚æ‚Á‚āCTOPPERSƒvƒƒWƒFƒNƒg‚É
28 * •ñ‚·‚邱‚ƁD
29 * (4) –{ƒ\ƒtƒgƒEƒFƒA‚Ì—˜—p‚É‚æ‚è’¼Ú“I‚Ü‚½‚͊ԐړI‚ɐ¶‚¶‚é‚¢‚©‚Ȃ鑹
30 * ŠQ‚©‚ç‚àCã‹L’˜ìŒ ŽÒ‚¨‚æ‚ÑTOPPERSƒvƒƒWƒFƒNƒg‚ð–Ɛӂ·‚邱‚ƁD
31 * ‚Ü‚½C–{ƒ\ƒtƒgƒEƒFƒA‚̃†[ƒU‚Ü‚½‚̓Gƒ“ƒhƒ†[ƒU‚©‚ç‚Ì‚¢‚©‚Ȃ闝
32 * —R‚ÉŠî‚­¿‹‚©‚ç‚àCã‹L’˜ìŒ ŽÒ‚¨‚æ‚ÑTOPPERSƒvƒƒWƒFƒNƒg‚ð
33 * –Ɛӂ·‚邱‚ƁD
34 *
35 * –{ƒ\ƒtƒgƒEƒFƒA‚́C–³•ÛØ‚Å’ñ‹Ÿ‚³‚ê‚Ä‚¢‚é‚à‚Ì‚Å‚ ‚éDã‹L’˜ìŒ ŽÒ‚¨
36 * ‚æ‚ÑTOPPERSƒvƒƒWƒFƒNƒg‚́C–{ƒ\ƒtƒgƒEƒFƒA‚ÉŠÖ‚µ‚āC“Á’è‚ÌŽg—p–Ú“I
37 * ‚ɑ΂·‚é“K‡«‚àŠÜ‚߂āC‚¢‚©‚È‚é•ÛØ‚às‚í‚È‚¢D‚Ü‚½C–{ƒ\ƒtƒgƒEƒF
38 * ƒA‚Ì—˜—p‚É‚æ‚è’¼Ú“I‚Ü‚½‚͊ԐړI‚ɐ¶‚¶‚½‚¢‚©‚Ȃ鑹ŠQ‚ÉŠÖ‚µ‚Ä‚àC‚»
39 * ‚̐ӔC‚𕉂í‚È‚¢D
40 *
41 */
42
43/*
44 * ƒvƒƒZƒbƒTˆË‘¶ƒ‚ƒWƒ…
45[ƒ‹iRX630—pj
46 */
47
48#include "kernel_impl.h"
49
50
51/*
52 * Š„ž‚Ý—vˆöƒvƒ‰ƒCƒIƒŠƒeƒBƒŒƒWƒXƒ^ƒAƒhƒŒƒXƒe[ƒuƒ‹
53 */
54volatile uint8_t __evenaccess * const ipr_reg_addr[ INHNO_MAX ] = {
55 NULL, /* No.0 —\–ñ */
56 NULL, /* No.1 —\–ñ */
57 NULL, /* No.2 —\–ñ */
58 NULL, /* No.3 —\–ñ */
59 NULL, /* No.4 —\–ñ */
60 NULL, /* No.5 —\–ñ */
61 NULL, /* No.6 —\–ñ */
62 NULL, /* No.7 —\–ñ */
63 NULL, /* No.8 —\–ñ */
64 NULL, /* No.9 —\–ñ */
65 NULL, /* No.10 —\–ñ */
66 NULL, /* No.11 —\–ñ */
67 NULL, /* No.12 —\–ñ */
68 NULL, /* No.13 —\–ñ */
69 NULL, /* No.14 —\–ñ */
70 NULL, /* No.15 —\–ñ */
71 ICU_IPR000_ADDR, /* No.16 ƒoƒXƒGƒ‰[ BUSERR */
72 NULL, /* No.17 —\–ñ */
73 NULL, /* No.18 —\–ñ */
74 NULL, /* No.19 —\–ñ */
75 NULL, /* No.20 —\–ñ */
76 ICU_IPR001_ADDR, /* No.21 FCU FIFERR */
77 NULL, /* No.22 —\–ñ */
78 ICU_IPR002_ADDR, /* No.23 FCU FRDYI */
79 NULL, /* No.24 —\–ñ */
80 NULL, /* No.25 —\–ñ */
81 NULL, /* No.26 —\–ñ */
82 ICU_IPR003_ADDR, /* No.27 SWINT */
83 ICU_IPR004_ADDR, /* No.28 CMTƒ†ƒjƒbƒg0 CMT0 */
84 ICU_IPR005_ADDR, /* No.29 CMTƒ†ƒjƒbƒg0 CMT1 */
85 ICU_IPR006_ADDR, /* No.30 CMTƒ†ƒjƒbƒg1 CMT2 */
86 ICU_IPR007_ADDR, /* No.31 CMTƒ†ƒjƒbƒg1 CMT3 */
87 ICU_IPR032_ADDR, /* No.32 ETHER */
88 ICU_IPR033_ADDR, /* No.33 USB0 D0FIFO0 */
89 ICU_IPR034_ADDR, /* No.34 USB0 D1FIFO0 */
90 ICU_IPR035_ADDR, /* No.35 USB0 USBI0 */
91 ICU_IPR036_ADDR, /* No.36 USB1 D0FIFO1 */
92 ICU_IPR037_ADDR, /* No.37 USB1 D1FIFO1 */
93 ICU_IPR038_ADDR, /* No.38 USB1 USBI1 */
94 ICU_IPR039_ADDR, /* No.39 SPRI0 */
95 ICU_IPR039_ADDR, /* No.40 SPTI0 */
96 ICU_IPR039_ADDR, /* No.41 SPII0 */
97 ICU_IPR042_ADDR, /* No.42 SPRI1 */
98 ICU_IPR042_ADDR, /* No.43 SPTI1 */
99 ICU_IPR042_ADDR, /* No.44 SPII1 */
100 ICU_IPR045_ADDR, /* No.45 SPRI2 */
101 ICU_IPR045_ADDR, /* No.46 SPTI2 */
102 ICU_IPR045_ADDR, /* No.47 SPII2 */
103 ICU_IPR048_ADDR, /* No.48 CAN RXF0 */
104 ICU_IPR048_ADDR, /* No.49 CAN TXF0 */
105 ICU_IPR048_ADDR, /* No.50 CAN RXM0 */
106 ICU_IPR048_ADDR, /* No.51 CAN TXM0 */
107 ICU_IPR052_ADDR, /* No.52 CAN RXF1 */
108 ICU_IPR052_ADDR, /* No.53 CAN TXF1 */
109 ICU_IPR052_ADDR, /* No.54 CAN RXM1 */
110 ICU_IPR052_ADDR, /* No.55 CAN TXM1 */
111 ICU_IPR056_ADDR, /* No.56 CAN RXF2 */
112 ICU_IPR056_ADDR, /* No.57 CAN TXF2 */
113 ICU_IPR056_ADDR, /* No.58 CAN RXM2 */
114 ICU_IPR056_ADDR, /* No.59 CAN TXM2 */
115 NULL, /* No.60 —\–ñ */
116 NULL, /* No.61 —\–ñ */
117 ICU_IPR062_ADDR, /* No.62 RTC PRD */
118 NULL, /* No.63 —\–ñ */
119 ICU_IPR064_ADDR, /* No.64 ŠO•”’[Žq IRQ0 */
120 ICU_IPR065_ADDR, /* No.65 ŠO•”’[Žq IRQ1 */
121 ICU_IPR066_ADDR, /* No.66 ŠO•”’[Žq IRQ2 */
122 ICU_IPR067_ADDR, /* No.67 ŠO•”’[Žq IRQ3 */
123 ICU_IPR068_ADDR, /* No.68 ŠO•”’[Žq IRQ4 */
124 ICU_IPR069_ADDR, /* No.69 ŠO•”’[Žq IRQ5 */
125 ICU_IPR070_ADDR, /* No.70 ŠO•”’[Žq IRQ6 */
126 ICU_IPR071_ADDR, /* No.71 ŠO•”’[Žq IRQ7 */
127 ICU_IPR072_ADDR, /* No.72 ŠO•”’[Žq IRQ8 */
128 ICU_IPR073_ADDR, /* No.73 ŠO•”’[Žq IRQ9 */
129 ICU_IPR074_ADDR, /* No.74 ŠO•”’[Žq IRQ10 */
130 ICU_IPR075_ADDR, /* No.75 ŠO•”’[Žq IRQ11 */
131 ICU_IPR076_ADDR, /* No.76 ŠO•”’[Žq IRQ12 */
132 ICU_IPR077_ADDR, /* No.77 ŠO•”’[Žq IRQ13 */
133 ICU_IPR078_ADDR, /* No.78 ŠO•”’[Žq IRQ14 */
134 ICU_IPR079_ADDR, /* No.79 ŠO•”’[Žq IRQ15 */
135 NULL, /* No.80 —\–ñ */
136 NULL, /* No.81 —\–ñ */
137 NULL, /* No.82 —\–ñ */
138 NULL, /* No.83 —\–ñ */
139 NULL, /* No.84 —\–ñ */
140 NULL, /* No.85 —\–ñ */
141 NULL, /* No.86 —\–ñ */
142 NULL, /* No.87 —\–ñ */
143 NULL, /* No.88 —\–ñ */
144 NULL, /* No.89 —\–ñ */
145 ICU_IPR090_ADDR, /* No.90 USBR0 */
146 ICU_IPR091_ADDR, /* No.91 USBR1 */
147 ICU_IPR092_ADDR, /* No.92 RTC ALM */
148 ICU_IPR093_ADDR, /* No.93 RTC PRD */
149 NULL, /* No.94 —\–ñ */
150 NULL, /* No.95 —\–ñ */
151 NULL, /* No.96 —\–ñ */
152 NULL, /* No.97 —\–ñ */
153 ICU_IPR098_ADDR, /* No.98 AD ADI0 */
154 NULL, /* No.99 —\–ñ */
155 NULL, /* No.100 —\–ñ */
156 NULL, /* No.101 —\–ñ */
157 ICU_IPR102_ADDR, /* No.102 S12AD S12ADIO */
158 NULL, /* No.103 —\–ñ */
159 NULL, /* No.104 —\–ñ */
160 NULL, /* No.105 —\–ñ */
161 ICU_IPR106_ADDR, /* No.106 ICU GROUP0 */
162 ICU_IPR107_ADDR, /* No.107 ICU GROUP1 */
163 ICU_IPR108_ADDR, /* No.108 ICU GROUP2 */
164 ICU_IPR109_ADDR, /* No.109 ICU GROUP3 */
165 ICU_IPR110_ADDR, /* No.110 ICU GROUP4 */
166 ICU_IPR111_ADDR, /* No.111 ICU GROUP5 */
167 ICU_IPR112_ADDR, /* No.112 ICU GROUP6 */
168 NULL, /* No.113 —\–ñ */
169 ICU_IPR114_ADDR, /* No.114 ICU GROUP12 */
170 NULL, /* No.115 —\–ñ */
171 NULL, /* No.116 —\–ñ */
172 NULL, /* No.117 —\–ñ */
173 NULL, /* No.118 —\–ñ */
174 NULL, /* No.119 —\–ñ */
175 NULL, /* No.120 —\–ñ */
176 NULL, /* No.121 —\–ñ */
177 ICU_IPR122_ADDR, /* No.122 SCI12 SCIX0 */
178 ICU_IPR123_ADDR, /* No.123 SCI12 SCIX1 */
179 ICU_IPR124_ADDR, /* No.124 SCI12 SCIX2 */
180 ICU_IPR125_ADDR, /* No.125 SCI12 SCIX3 */
181 ICU_IPR126_ADDR, /* No.126 TPU0 TGI0A */
182 ICU_IPR126_ADDR, /* No.127 TPU0 TGI0B */
183 ICU_IPR126_ADDR, /* No.128 TPU0 TGI0C */
184 ICU_IPR126_ADDR, /* No.129 TPU0 TGI0D */
185 ICU_IPR130_ADDR, /* No.130 TPU1 TGI1A */
186 ICU_IPR130_ADDR, /* No.131 TPU1 TGI1B */
187 ICU_IPR132_ADDR, /* No.132 TPU2 TGI2A */
188 ICU_IPR132_ADDR, /* No.133 TPU2 TGI2B */
189 ICU_IPR134_ADDR, /* No.134 TPU3 TGI3A */
190 ICU_IPR134_ADDR, /* No.135 TPU3 TGI3B */
191 ICU_IPR134_ADDR, /* No.136 TPU3 TGI3C */
192 ICU_IPR134_ADDR, /* No.137 TPU3 TGI3D */
193 ICU_IPR138_ADDR, /* No.138 TPU4 TGI4A */
194 ICU_IPR138_ADDR, /* No.139 TPU4 TGI4B */
195 ICU_IPR140_ADDR, /* No.140 TPU5 TGI5A */
196 ICU_IPR140_ADDR, /* No.141 TPU5 TGI5B */
197 ICU_IPR142_ADDR, /* No.142 TPU6 TGI6A */
198 ICU_IPR142_ADDR, /* No.143 TPU6 TGI6B */
199 ICU_IPR142_ADDR, /* No.144 TPU6 TGI6C */
200 ICU_IPR142_ADDR, /* No.145 TPU6 TGI6D */
201 ICU_IPR146_ADDR, /* No.146 TGIE0 */
202 ICU_IPR146_ADDR, /* No.147 TGIF0 */
203 ICU_IPR148_ADDR, /* No.148 TPU7 TGI7A */
204 ICU_IPR148_ADDR, /* No.149 TPU7 TGI7B */
205 ICU_IPR150_ADDR, /* No.150 TPU8 TGI8A */
206 ICU_IPR150_ADDR, /* No.151 TPU8 TGI8B */
207 ICU_IPR152_ADDR, /* No.152 TPU9 TGI9A */
208 ICU_IPR152_ADDR, /* No.153 TPU9 TGI9B */
209 ICU_IPR152_ADDR, /* No.154 TPU9 TGI9C */
210 ICU_IPR152_ADDR, /* No.155 TPU9 TGI9D */
211 ICU_IPR156_ADDR, /* No.156 TPU10 TGI10A */
212 ICU_IPR156_ADDR, /* No.157 TPU10 TGI10B */
213 ICU_IPR156_ADDR, /* No.158 TGIC4 */
214 ICU_IPR156_ADDR, /* No.159 TGID4 */
215 ICU_IPR160_ADDR, /* No.160 TGIV4 */
216 ICU_IPR161_ADDR, /* No.161 TGIU5 */
217 ICU_IPR162_ADDR, /* No.162 TGIV5 */
218 ICU_IPR163_ADDR, /* No.163 TGIW5 */
219 ICU_IPR164_ADDR, /* No.164 TCI11A */
220 ICU_IPR165_ADDR, /* No.165 TCI11B */
221 ICU_IPR167_ADDR, /* No.166 POE OEI1 */
222 ICU_IPR167_ADDR, /* No.167 POE OEI2 */
223 NULL, /* No.168 —\–ñ */
224 NULL, /* No.169 —\–ñ */
225 ICU_IPR170_ADDR, /* No.170 TMR0 CMIA0 */
226 ICU_IPR170_ADDR, /* No.171 TMR0 CMIB0 */
227 ICU_IPR170_ADDR, /* No.172 TMR0 OVI0 */
228 ICU_IPR173_ADDR, /* No.173 TMR1 CMIA1 */
229 ICU_IPR173_ADDR, /* No.174 TMR1 CMIB1 */
230 ICU_IPR173_ADDR, /* No.175 TMR1 OVI1 */
231 ICU_IPR176_ADDR, /* No.176 TMR2 CMIA2 */
232 ICU_IPR176_ADDR, /* No.177 TMR2 CMIB2 */
233 ICU_IPR176_ADDR, /* No.178 TMR2 OVI2 */
234 ICU_IPR179_ADDR, /* No.179 TMR3 CMIA3 */
235 ICU_IPR179_ADDR, /* No.180 TMR3 CMIB3 */
236 ICU_IPR179_ADDR, /* No.181 TMR3 OVI3 */
237 ICU_IPR182_ADDR, /* No.182 RIIC0 EEI0 */
238 ICU_IPR183_ADDR, /* No.183 RIIC0 RXI0 */
239 ICU_IPR184_ADDR, /* No.184 RIIC0 TXI0 */
240 ICU_IPR185_ADDR, /* No.185 RIIC0 TEI0 */
241 ICU_IPR186_ADDR, /* No.186 RIIC0 EEI1 */
242 ICU_IPR187_ADDR, /* No.187 RIIC0 RXI1 */
243 ICU_IPR188_ADDR, /* No.188 RIIC0 TXI1 */
244 ICU_IPR189_ADDR, /* No.189 RIIC0 TEI1 */
245 ICU_IPR190_ADDR, /* No.190 RIIC0 EEI2 */
246 ICU_IPR191_ADDR, /* No.191 RIIC0 RXI2 */
247 ICU_IPR192_ADDR, /* No.192 RIIC0 TXI2 */
248 ICU_IPR193_ADDR, /* No.193 RIIC0 TEI2 */
249 ICU_IPR194_ADDR, /* No.194 RIIC0 EEI3 */
250 ICU_IPR195_ADDR, /* No.195 RIIC0 RXI3 */
251 ICU_IPR196_ADDR, /* No.196 RIIC0 TXI3 */
252 ICU_IPR197_ADDR, /* No.197 RIIC0 TEI3 */
253 ICU_IPR198_ADDR, /* No.198 DMAC DMTEND0 */
254 ICU_IPR199_ADDR, /* No.199 DMAC DMTEND1 */
255 ICU_IPR200_ADDR, /* No.200 DMAC DMTEND2 */
256 ICU_IPR201_ADDR, /* No.201 DMAC DMTEND3 */
257 ICU_IPR202_ADDR, /* No.202 EXDMAC EXDMACI0 */
258 ICU_IPR203_ADDR, /* No.203 EXDMAC EXDMACI1 */
259 NULL, /* No.204 —\–ñ */
260 NULL, /* No.205 —\–ñ */
261 NULL, /* No.206 —\–ñ */
262 NULL, /* No.207 —\–ñ */
263 NULL, /* No.208 —\–ñ */
264 NULL, /* No.209 —\–ñ */
265 NULL, /* No.210 —\–ñ */
266 NULL, /* No.211 —\–ñ */
267 NULL, /* No.212 —\–ñ */
268 NULL, /* No.213 —\–ñ */
269 ICU_IPR214_ADDR, /* No.214 SCI0 RXI0 */
270 ICU_IPR214_ADDR, /* No.215 SCI0 TXI0 */
271 ICU_IPR214_ADDR, /* No.216 SCI0 TEI0 */
272 ICU_IPR217_ADDR, /* No.217 SCI1 RXI1 */
273 ICU_IPR217_ADDR, /* No.218 SCI1 TXI1 */
274 ICU_IPR217_ADDR, /* No.219 SCI1 TEI1 */
275 ICU_IPR220_ADDR, /* No.220 SCI2 RXI2 */
276 ICU_IPR220_ADDR, /* No.221 SCI2 TXI2 */
277 ICU_IPR220_ADDR, /* No.222 SCI2 TEI2 */
278 ICU_IPR223_ADDR, /* No.223 SCI3 RXI3 */
279 ICU_IPR223_ADDR, /* No.224 SCI3 TXI3 */
280 ICU_IPR223_ADDR, /* No.225 SCI3 TEI3 */
281 ICU_IPR226_ADDR, /* No.226 SCI4 RXI4 */
282 ICU_IPR226_ADDR, /* No.227 SCI4 TXI4 */
283 ICU_IPR226_ADDR, /* No.228 SCI4 TEI4 */
284 ICU_IPR229_ADDR, /* No.229 SCI5 RXI5 */
285 ICU_IPR229_ADDR, /* No.230 SCI5 TXI5 */
286 ICU_IPR229_ADDR, /* No.231 SCI5 TEI5 */
287 ICU_IPR232_ADDR, /* No.232 SCI6 RXI6 */
288 ICU_IPR232_ADDR, /* No.233 SCI6 TXI6 */
289 ICU_IPR232_ADDR, /* No.234 SCI6 TEI6 */
290 ICU_IPR235_ADDR, /* No.235 SCI7 RXI7 */
291 ICU_IPR235_ADDR, /* No.236 SCI7 TXI7 */
292 ICU_IPR235_ADDR, /* No.237 SCI7 TEI7 */
293 ICU_IPR238_ADDR, /* No.238 SCI8 RXI8 */
294 ICU_IPR238_ADDR, /* No.239 SCI8 TXI8 */
295 ICU_IPR238_ADDR, /* No.240 SCI8 TEI8 */
296 ICU_IPR241_ADDR, /* No.241 SCI9 RXI9 */
297 ICU_IPR241_ADDR, /* No.242 SCI9 TXI9 */
298 ICU_IPR241_ADDR, /* No.243 SCI9 TEI9 */
299 ICU_IPR244_ADDR, /* No.244 SCI10 RXI10 */
300 ICU_IPR244_ADDR, /* No.245 SCI10 TXI10 */
301 ICU_IPR244_ADDR, /* No.246 SCI10 TEI10 */
302 ICU_IPR247_ADDR, /* No.247 SCI11 RXI11 */
303 ICU_IPR247_ADDR, /* No.248 SCI11 TXI11 */
304 ICU_IPR247_ADDR, /* No.249 SCI11 TEI11 */
305 ICU_IPR250_ADDR, /* No.250 SCI12 RXI12 */
306 ICU_IPR250_ADDR, /* No.251 SCI12 TXI12 */
307 ICU_IPR250_ADDR, /* No.252 SCI12 TEI12 */
308 ICU_IPR253_ADDR, /* No.253 IEB IEBINT */
309 NULL, /* No.254 —\–ñ */
310 NULL, /* No.255 —\–ñ */
311};
312
313
314/*
315 * Š„ž‚Ý—v‹‹–‰ÂƒŒƒWƒXƒ^ƒAƒhƒŒƒXƒe[ƒuƒ‹
316 */
317const IER_INFO ier_reg_addr[ INHNO_MAX ] = {
318 { NULL, INVALID_OFFSET }, /* No.0 —\–ñ */
319 { NULL, INVALID_OFFSET }, /* No.1 —\–ñ */
320 { NULL, INVALID_OFFSET }, /* No.2 —\–ñ */
321 { NULL, INVALID_OFFSET }, /* No.3 —\–ñ */
322 { NULL, INVALID_OFFSET }, /* No.4 —\–ñ */
323 { NULL, INVALID_OFFSET }, /* No.5 —\–ñ */
324 { NULL, INVALID_OFFSET }, /* No.6 —\–ñ */
325 { NULL, INVALID_OFFSET }, /* No.7 —\–ñ */
326 { NULL, INVALID_OFFSET }, /* No.8 —\–ñ */
327 { NULL, INVALID_OFFSET }, /* No.9 —\–ñ */
328 { NULL, INVALID_OFFSET }, /* No.10 —\–ñ */
329 { NULL, INVALID_OFFSET }, /* No.11 —\–ñ */
330 { NULL, INVALID_OFFSET }, /* No.12 —\–ñ */
331 { NULL, INVALID_OFFSET }, /* No.13 —\–ñ */
332 { NULL, INVALID_OFFSET }, /* No.14 —\–ñ */
333 { NULL, INVALID_OFFSET }, /* No.15 —\–ñ */
334 { ICU_IER02_ADDR, ICU_IEN0_BIT }, /* No.16 ƒoƒXƒGƒ‰[ BUSERR */
335 { NULL, INVALID_OFFSET }, /* No.17 —\–ñ */
336 { NULL, INVALID_OFFSET }, /* No.18 —\–ñ */
337 { NULL, INVALID_OFFSET }, /* No.19 —\–ñ */
338 { NULL, INVALID_OFFSET }, /* No.20 —\–ñ */
339 { ICU_IER02_ADDR, ICU_IEN5_BIT }, /* No.21 FCU FIFERR */
340 { NULL, INVALID_OFFSET }, /* No.22 —\–ñ */
341 { ICU_IER02_ADDR, ICU_IEN7_BIT }, /* No.23 FCU FRDYI */
342 { NULL, INVALID_OFFSET }, /* No.24 —\–ñ */
343 { NULL, INVALID_OFFSET }, /* No.25 —\–ñ */
344 { NULL, INVALID_OFFSET }, /* No.26 —\–ñ */
345 { ICU_IER03_ADDR, ICU_IEN3_BIT }, /* No.27 SWINT */
346 { ICU_IER03_ADDR, ICU_IEN4_BIT }, /* No.28 CMTƒ†ƒjƒbƒg0 CMT0 */
347 { ICU_IER03_ADDR, ICU_IEN5_BIT }, /* No.29 CMTƒ†ƒjƒbƒg0 CMT1 */
348 { ICU_IER03_ADDR, ICU_IEN6_BIT }, /* No.30 CMTƒ†ƒjƒbƒg1 CMT2 */
349 { ICU_IER03_ADDR, ICU_IEN7_BIT }, /* No.31 CMTƒ†ƒjƒbƒg1 CMT3 */
350 { ICU_IER04_ADDR, ICU_IEN0_BIT }, /* No.32 ETHER */
351 { ICU_IER04_ADDR, ICU_IEN1_BIT }, /* No.33 USB0 D0FIFO0 */
352 { ICU_IER04_ADDR, ICU_IEN2_BIT }, /* No.34 USB0 D1FIFO0 */
353 { ICU_IER04_ADDR, ICU_IEN3_BIT }, /* No.35 USB0 USBI0 */
354 { ICU_IER04_ADDR, ICU_IEN4_BIT }, /* No.36 USB1 D0FIFO1 */
355 { ICU_IER04_ADDR, ICU_IEN5_BIT }, /* No.37 USB1 D1FIFO1 */
356 { ICU_IER04_ADDR, ICU_IEN6_BIT }, /* No.38 USB1 USBI1 */
357 { ICU_IER04_ADDR, ICU_IEN7_BIT }, /* No.39 RSPI0 SPRI0 */
358 { ICU_IER05_ADDR, ICU_IEN0_BIT }, /* No.40 RSPI0 SPTI0 */
359 { ICU_IER05_ADDR, ICU_IEN1_BIT }, /* No.41 RSPI0 SPII0 */
360 { ICU_IER05_ADDR, ICU_IEN2_BIT }, /* No.42 RSPI1 SPRI1 */
361 { ICU_IER05_ADDR, ICU_IEN3_BIT }, /* No.43 RSPI1 SPTI1 */
362 { ICU_IER05_ADDR, ICU_IEN4_BIT }, /* No.44 RSPI1 SPII1 */
363 { ICU_IER05_ADDR, ICU_IEN5_BIT }, /* No.45 RSPI2 SPRI2 */
364 { ICU_IER05_ADDR, ICU_IEN6_BIT }, /* No.46 RSPI2 SPTI2 */
365 { ICU_IER05_ADDR, ICU_IEN7_BIT }, /* No.47 RSPI2 SPII2 */
366 { ICU_IER06_ADDR, ICU_IEN0_BIT }, /* No.48 CAN0 RXF0 */
367 { ICU_IER06_ADDR, ICU_IEN1_BIT }, /* No.49 CAN0 TXF0 */
368 { ICU_IER06_ADDR, ICU_IEN2_BIT }, /* No.50 CAN0 RXM0 */
369 { ICU_IER06_ADDR, ICU_IEN3_BIT }, /* No.51 CAN0 TXM0 */
370 { ICU_IER06_ADDR, ICU_IEN4_BIT }, /* No.52 CAN1 RXF1 */
371 { ICU_IER06_ADDR, ICU_IEN5_BIT }, /* No.53 CAN1 TXF1 */
372 { ICU_IER06_ADDR, ICU_IEN6_BIT }, /* No.54 CAN1 RXM1 */
373 { ICU_IER06_ADDR, ICU_IEN7_BIT }, /* No.55 CAN1 TXM1 */
374 { ICU_IER07_ADDR, ICU_IEN0_BIT }, /* No.56 CAN2 RXF2 */
375 { ICU_IER07_ADDR, ICU_IEN1_BIT }, /* No.57 CAN2 TXF2 */
376 { ICU_IER07_ADDR, ICU_IEN2_BIT }, /* No.58 CAN2 RXM2 */
377 { ICU_IER07_ADDR, ICU_IEN3_BIT }, /* No.59 CAN2 TXM2 */
378 { NULL, INVALID_OFFSET }, /* No.60 —\–ñ */
379 { NULL, INVALID_OFFSET }, /* No.61 —\–ñ */
380 { ICU_IER07_ADDR, ICU_IEN6_BIT }, /* No.62 RTC PRD */
381 { NULL, INVALID_OFFSET }, /* No.63 —\–ñ */
382 { ICU_IER08_ADDR, ICU_IEN0_BIT }, /* No.64 ŠO•”’[Žq IRQ0 */
383 { ICU_IER08_ADDR, ICU_IEN1_BIT }, /* No.65 ŠO•”’[Žq IRQ1 */
384 { ICU_IER08_ADDR, ICU_IEN2_BIT }, /* No.66 ŠO•”’[Žq IRQ2 */
385 { ICU_IER08_ADDR, ICU_IEN3_BIT }, /* No.67 ŠO•”’[Žq IRQ3 */
386 { ICU_IER08_ADDR, ICU_IEN4_BIT }, /* No.68 ŠO•”’[Žq IRQ4 */
387 { ICU_IER08_ADDR, ICU_IEN5_BIT }, /* No.69 ŠO•”’[Žq IRQ5 */
388 { ICU_IER08_ADDR, ICU_IEN6_BIT }, /* No.70 ŠO•”’[Žq IRQ6 */
389 { ICU_IER08_ADDR, ICU_IEN7_BIT }, /* No.71 ŠO•”’[Žq IRQ7 */
390 { ICU_IER09_ADDR, ICU_IEN0_BIT }, /* No.72 ŠO•”’[Žq IRQ8 */
391 { ICU_IER09_ADDR, ICU_IEN1_BIT }, /* No.73 ŠO•”’[Žq IRQ9 */
392 { ICU_IER09_ADDR, ICU_IEN2_BIT }, /* No.74 ŠO•”’[Žq IRQ10 */
393 { ICU_IER09_ADDR, ICU_IEN3_BIT }, /* No.75 ŠO•”’[Žq IRQ11 */
394 { ICU_IER09_ADDR, ICU_IEN4_BIT }, /* No.76 ŠO•”’[Žq IRQ12 */
395 { ICU_IER09_ADDR, ICU_IEN5_BIT }, /* No.77 ŠO•”’[Žq IRQ13 */
396 { ICU_IER09_ADDR, ICU_IEN6_BIT }, /* No.78 ŠO•”’[Žq IRQ14 */
397 { ICU_IER09_ADDR, ICU_IEN7_BIT }, /* No.79 ŠO•”’[Žq IRQ15 */
398 { NULL, INVALID_OFFSET }, /* No.80 —\–ñ */
399 { NULL, INVALID_OFFSET }, /* No.81 —\–ñ */
400 { NULL, INVALID_OFFSET }, /* No.82 —\–ñ */
401 { NULL, INVALID_OFFSET }, /* No.83 —\–ñ */
402 { NULL, INVALID_OFFSET }, /* No.84 —\–ñ */
403 { NULL, INVALID_OFFSET }, /* No.85 —\–ñ */
404 { NULL, INVALID_OFFSET }, /* No.86 —\–ñ */
405 { NULL, INVALID_OFFSET }, /* No.87 —\–ñ */
406 { NULL, INVALID_OFFSET }, /* No.88 —\–ñ */
407 { NULL, INVALID_OFFSET }, /* No.89 —\–ñ */
408 { ICU_IER0B_ADDR, ICU_IEN2_BIT }, /* No.90 USBR0 */
409 { ICU_IER0B_ADDR, ICU_IEN3_BIT }, /* No.91 USBR1 */
410 { ICU_IER0B_ADDR, ICU_IEN4_BIT }, /* No.92 RTC ALM */
411 { ICU_IER0B_ADDR, ICU_IEN5_BIT }, /* No.92 RTC PRD */
412 { NULL, INVALID_OFFSET }, /* No.94 —\–ñ */
413 { NULL, INVALID_OFFSET }, /* No.95 —\–ñ */
414 { NULL, INVALID_OFFSET }, /* No.96 —\–ñ */
415 { NULL, INVALID_OFFSET }, /* No.97 —\–ñ */
416 { ICU_IER0C_ADDR, ICU_IEN2_BIT }, /* No.98 AD0 ADI0 */
417 { NULL, INVALID_OFFSET }, /* No.99 —\–ñ */
418 { NULL, INVALID_OFFSET }, /* No.100 —\–ñ */
419 { NULL, INVALID_OFFSET }, /* No.101 —\–ñ */
420 { ICU_IER0C_ADDR, ICU_IEN6_BIT }, /* No.102 S12AD S12ADI00 */
421 { NULL, INVALID_OFFSET }, /* No.103 —\–ñ */
422 { NULL, INVALID_OFFSET }, /* No.104 —\–ñ */
423 { NULL, INVALID_OFFSET }, /* No.105 —\–ñ */
424 { ICU_IER0D_ADDR, ICU_IEN2_BIT }, /* No.106 ICU GROUP0 */
425 { ICU_IER0D_ADDR, ICU_IEN3_BIT }, /* No.107 ICU GROUP1 */
426 { ICU_IER0D_ADDR, ICU_IEN4_BIT }, /* No.108 ICU GROUP2 */
427 { ICU_IER0D_ADDR, ICU_IEN5_BIT }, /* No.109 ICU GROUP3 */
428 { ICU_IER0D_ADDR, ICU_IEN6_BIT }, /* No.110 ICU GROUP4 */
429 { ICU_IER0D_ADDR, ICU_IEN7_BIT }, /* No.111 ICU GROUP5 */
430 { ICU_IER0E_ADDR, ICU_IEN0_BIT }, /* No.112 ICU GROUP6 */
431 { NULL, INVALID_OFFSET }, /* No.113 —\–ñ */
432 { ICU_IER0E_ADDR, ICU_IEN1_BIT }, /* No.114 ICU GROUP12 */
433 { NULL, INVALID_OFFSET }, /* No.115 —\–ñ */
434 { NULL, INVALID_OFFSET }, /* No.116 —\–ñ */
435 { NULL, INVALID_OFFSET }, /* No.117 —\–ñ */
436 { NULL, INVALID_OFFSET }, /* No.118 —\–ñ */
437 { NULL, INVALID_OFFSET }, /* No.119 —\–ñ */
438 { NULL, INVALID_OFFSET }, /* No.120 —\–ñ */
439 { NULL, INVALID_OFFSET }, /* No.121 —\–ñ */
440 { ICU_IER0F_ADDR, ICU_IEN2_BIT }, /* No.122 SCI12 SCIX0 */
441 { ICU_IER0F_ADDR, ICU_IEN3_BIT }, /* No.123 SCI12 SCIX1 */
442 { ICU_IER0F_ADDR, ICU_IEN4_BIT }, /* No.124 SCI12 SCIX2 */
443 { ICU_IER0F_ADDR, ICU_IEN5_BIT }, /* No.125 SCI12 SCIX3 */
444 { ICU_IER0F_ADDR, ICU_IEN6_BIT }, /* No.126 TPU0 TGI0A */
445 { ICU_IER0F_ADDR, ICU_IEN7_BIT }, /* No.127 TPU0 TGI0B */
446 { ICU_IER10_ADDR, ICU_IEN0_BIT }, /* No.128 TPU0 TGI0C */
447 { ICU_IER10_ADDR, ICU_IEN1_BIT }, /* No.129 TPU0 TGI0D */
448 { ICU_IER10_ADDR, ICU_IEN2_BIT }, /* No.130 TPU1 TGI1A */
449 { ICU_IER10_ADDR, ICU_IEN3_BIT }, /* No.131 TPU1 TGI1B */
450 { ICU_IER10_ADDR, ICU_IEN4_BIT }, /* No.132 TPU2 TGI2A */
451 { ICU_IER10_ADDR, ICU_IEN5_BIT }, /* No.133 TPU2 TGI2B */
452 { ICU_IER10_ADDR, ICU_IEN6_BIT }, /* No.134 TPU3 TGI3A */
453 { ICU_IER10_ADDR, ICU_IEN7_BIT }, /* No.135 TPU3 TGI3B */
454 { ICU_IER11_ADDR, ICU_IEN0_BIT }, /* No.136 TPU3 TGI3C */
455 { ICU_IER11_ADDR, ICU_IEN1_BIT }, /* No.137 TPU3 TGI3D */
456 { ICU_IER11_ADDR, ICU_IEN2_BIT }, /* No.138 TPU4 TGI4A */
457 { ICU_IER11_ADDR, ICU_IEN3_BIT }, /* No.139 TPU4 TGI4B */
458 { ICU_IER11_ADDR, ICU_IEN4_BIT }, /* No.140 TPU5 TGI5A */
459 { ICU_IER11_ADDR, ICU_IEN5_BIT }, /* No.141 TPU5 TGI5B */
460 { ICU_IER11_ADDR, ICU_IEN6_BIT }, /* No.142 TPU6 TGI6A */
461 { ICU_IER11_ADDR, ICU_IEN7_BIT }, /* No.143 TPU6 TGI6B */
462 { ICU_IER12_ADDR, ICU_IEN0_BIT }, /* No.144 TPU6 TGI6C */
463 { ICU_IER12_ADDR, ICU_IEN1_BIT }, /* No.145 TPU6 TGI6D */
464 { ICU_IER12_ADDR, ICU_IEN2_BIT }, /* No.146 TPU6 TGIE0 */
465 { ICU_IER12_ADDR, ICU_IEN3_BIT }, /* No.147 TPU6 TGIF0 */
466 { ICU_IER12_ADDR, ICU_IEN4_BIT }, /* No.148 TPU7 TGI7A */
467 { ICU_IER12_ADDR, ICU_IEN5_BIT }, /* No.149 TPU7 TGI7B */
468 { ICU_IER12_ADDR, ICU_IEN6_BIT }, /* No.150 TPU8 TGI8A */
469 { ICU_IER12_ADDR, ICU_IEN7_BIT }, /* No.151 TPU8 TGI8B */
470 { ICU_IER13_ADDR, ICU_IEN0_BIT }, /* No.152 TPU9 TGI9A */
471 { ICU_IER13_ADDR, ICU_IEN1_BIT }, /* No.153 TPU9 TGI9B */
472 { ICU_IER13_ADDR, ICU_IEN2_BIT }, /* No.154 TPU9 TGI9C */
473 { ICU_IER13_ADDR, ICU_IEN3_BIT }, /* No.155 TPU9 TGI9D */
474 { ICU_IER13_ADDR, ICU_IEN4_BIT }, /* No.156 TPU10 TGI10A */
475 { ICU_IER13_ADDR, ICU_IEN5_BIT }, /* No.157 TPU10 TGI10B */
476 { ICU_IER13_ADDR, ICU_IEN6_BIT }, /* No.158 TPU10 TGIC4 */
477 { ICU_IER13_ADDR, ICU_IEN7_BIT }, /* No.159 TPU10 TGID4 */
478 { ICU_IER14_ADDR, ICU_IEN0_BIT }, /* No.160 TPU10 TGIV4 */
479 { ICU_IER14_ADDR, ICU_IEN1_BIT }, /* No.161 TPU11 TGIU5 */
480 { ICU_IER14_ADDR, ICU_IEN2_BIT }, /* No.162 TPU11 TGIV5 */
481 { ICU_IER14_ADDR, ICU_IEN3_BIT }, /* No.163 TPU11 TGIW5 */
482 { ICU_IER14_ADDR, ICU_IEN4_BIT }, /* No.164 TPU11 TCI11A */
483 { ICU_IER14_ADDR, ICU_IEN5_BIT }, /* No.165 TPU11 TCI11B */
484 { ICU_IER14_ADDR, ICU_IEN6_BIT }, /* No.166 POE OEI1 */
485 { ICU_IER14_ADDR, ICU_IEN7_BIT }, /* No.167 POE OEI2 */
486 { NULL, INVALID_OFFSET }, /* No.168 —\–ñ */
487 { NULL, INVALID_OFFSET }, /* No.169 —\–ñ */
488 { ICU_IER15_ADDR, ICU_IEN2_BIT }, /* No.170 TMR0 CMIA0 */
489 { ICU_IER15_ADDR, ICU_IEN3_BIT }, /* No.171 TMR0 CMIB0 */
490 { ICU_IER15_ADDR, ICU_IEN4_BIT }, /* No.172 TMR0 OVI0 */
491 { ICU_IER15_ADDR, ICU_IEN5_BIT }, /* No.173 TMR1 CMIA1 */
492 { ICU_IER15_ADDR, ICU_IEN6_BIT }, /* No.174 TMR1 CMIB1 */
493 { ICU_IER15_ADDR, ICU_IEN7_BIT }, /* No.175 TMR1 OVI1 */
494 { ICU_IER16_ADDR, ICU_IEN0_BIT }, /* No.176 TMR2 CMIA2 */
495 { ICU_IER16_ADDR, ICU_IEN1_BIT }, /* No.177 TMR2 CMIB2 */
496 { ICU_IER16_ADDR, ICU_IEN2_BIT }, /* No.178 TMR2 OVI2 */
497 { ICU_IER16_ADDR, ICU_IEN3_BIT }, /* No.179 TMR3 CMIA3 */
498 { ICU_IER16_ADDR, ICU_IEN4_BIT }, /* No.180 TMR3 CMIB3 */
499 { ICU_IER16_ADDR, ICU_IEN5_BIT }, /* No.181 TMR3 OVI3 */
500 { ICU_IER16_ADDR, ICU_IEN6_BIT }, /* No.182 RIIC0 EEI0 */
501 { ICU_IER16_ADDR, ICU_IEN7_BIT }, /* No.183 RIIC0 RXI0 */
502 { ICU_IER17_ADDR, ICU_IEN0_BIT }, /* No.184 RIIC0 TXI0 */
503 { ICU_IER17_ADDR, ICU_IEN1_BIT }, /* No.185 RIIC0 TEI0 */
504 { ICU_IER17_ADDR, ICU_IEN2_BIT }, /* No.186 RIIC0 EEI1 */
505 { ICU_IER17_ADDR, ICU_IEN3_BIT }, /* No.187 RIIC0 RXI1 */
506 { ICU_IER17_ADDR, ICU_IEN4_BIT }, /* No.188 RIIC0 TXI1 */
507 { ICU_IER17_ADDR, ICU_IEN5_BIT }, /* No.189 RIIC0 TEI1 */
508 { ICU_IER17_ADDR, ICU_IEN6_BIT }, /* No.190 RIIC0 EEI2 */
509 { ICU_IER17_ADDR, ICU_IEN7_BIT }, /* No.191 RIIC0 RXI2 */
510 { ICU_IER18_ADDR, ICU_IEN0_BIT }, /* No.192 RIIC0 TXI2 */
511 { ICU_IER18_ADDR, ICU_IEN1_BIT }, /* No.193 RIIC0 TEI2 */
512 { ICU_IER18_ADDR, ICU_IEN2_BIT }, /* No.194 RIIC0 EEI3 */
513 { ICU_IER18_ADDR, ICU_IEN3_BIT }, /* No.195 RIIC0 RXI3 */
514 { ICU_IER18_ADDR, ICU_IEN4_BIT }, /* No.196 RIIC0 TXI3 */
515 { ICU_IER18_ADDR, ICU_IEN5_BIT }, /* No.197 RIIC0 TEI3 */
516 { ICU_IER18_ADDR, ICU_IEN6_BIT }, /* No.198 DMAC DMAC0I */
517 { ICU_IER18_ADDR, ICU_IEN7_BIT }, /* No.199 DMAC DMAC1I */
518 { ICU_IER19_ADDR, ICU_IEN0_BIT }, /* No.200 DMAC DMAC2I */
519 { ICU_IER19_ADDR, ICU_IEN1_BIT }, /* No.201 DMAC DMAC3I */
520 { ICU_IER19_ADDR, ICU_IEN2_BIT }, /* No.202 EXDMAC EXDMAC0I */
521 { ICU_IER19_ADDR, ICU_IEN3_BIT }, /* No.203 EXDMAC EXDMAC1I */
522 { NULL, INVALID_OFFSET }, /* No.204 —\–ñ */
523 { NULL, INVALID_OFFSET }, /* No.205 —\–ñ */
524 { NULL, INVALID_OFFSET }, /* No.206 —\–ñ */
525 { NULL, INVALID_OFFSET }, /* No.207 —\–ñ */
526 { NULL, INVALID_OFFSET }, /* No.208 —\–ñ */
527 { NULL, INVALID_OFFSET }, /* No.209 —\–ñ */
528 { NULL, INVALID_OFFSET }, /* No.210 —\–ñ */
529 { NULL, INVALID_OFFSET }, /* No.211 —\–ñ */
530 { NULL, INVALID_OFFSET }, /* No.212 —\–ñ */
531 { NULL, INVALID_OFFSET }, /* No.213 —\–ñ */
532 { ICU_IER1A_ADDR, ICU_IEN6_BIT }, /* No.214 SCI0 RXI0 */
533 { ICU_IER1A_ADDR, ICU_IEN7_BIT }, /* No.215 SCI0 TXI0 */
534 { ICU_IER1B_ADDR, ICU_IEN0_BIT }, /* No.216 SCI0 TEI0 */
535 { ICU_IER1B_ADDR, ICU_IEN1_BIT }, /* No.217 SCI1 RXI1 */
536 { ICU_IER1B_ADDR, ICU_IEN2_BIT }, /* No.228 SCI1 TXI1 */
537 { ICU_IER1B_ADDR, ICU_IEN3_BIT }, /* No.229 SCI1 TEI1 */
538 { ICU_IER1B_ADDR, ICU_IEN4_BIT }, /* No.220 SCI2 RXI2 */
539 { ICU_IER1B_ADDR, ICU_IEN5_BIT }, /* No.221 SCI2 TXI2 */
540 { ICU_IER1B_ADDR, ICU_IEN6_BIT }, /* No.222 SCI2 TEI2 */
541 { ICU_IER1B_ADDR, ICU_IEN7_BIT }, /* No.223 SCI3 RXI3 */
542 { ICU_IER1C_ADDR, ICU_IEN0_BIT }, /* No.224 SCI3 TXI3 */
543 { ICU_IER1C_ADDR, ICU_IEN1_BIT }, /* No.225 SCI3 TEI3 */
544 { ICU_IER1C_ADDR, ICU_IEN2_BIT }, /* No.226 SCI4 RXI4 */
545 { ICU_IER1C_ADDR, ICU_IEN3_BIT }, /* No.227 SCI4 TXI4 */
546 { ICU_IER1C_ADDR, ICU_IEN4_BIT }, /* No.228 SCI4 TEI4 */
547 { ICU_IER1C_ADDR, ICU_IEN5_BIT }, /* No.229 SCI5 RXI5 */
548 { ICU_IER1C_ADDR, ICU_IEN6_BIT }, /* No.230 SCI5 TXI5 */
549 { ICU_IER1C_ADDR, ICU_IEN7_BIT }, /* No.231 SCI5 TEI5 */
550 { ICU_IER1D_ADDR, ICU_IEN0_BIT }, /* No.232 SCI6 RXI6 */
551 { ICU_IER1D_ADDR, ICU_IEN1_BIT }, /* No.233 SCI6 TXI6 */
552 { ICU_IER1D_ADDR, ICU_IEN2_BIT }, /* No.234 SCI6 TEI6 */
553 { ICU_IER1D_ADDR, ICU_IEN3_BIT }, /* No.235 SCI7 RXI7 */
554 { ICU_IER1D_ADDR, ICU_IEN4_BIT }, /* No.236 SCI7 TXI7 */
555 { ICU_IER1D_ADDR, ICU_IEN5_BIT }, /* No.237 SCI7 TEI7 */
556 { ICU_IER1D_ADDR, ICU_IEN6_BIT }, /* No.238 SCI8 RXI8 */
557 { ICU_IER1D_ADDR, ICU_IEN7_BIT }, /* No.239 SCI8 TXI8 */
558 { ICU_IER1E_ADDR, ICU_IEN0_BIT }, /* No.240 SCI8 TEI8 */
559 { ICU_IER1E_ADDR, ICU_IEN1_BIT }, /* No.241 SCI9 RXI9 */
560 { ICU_IER1E_ADDR, ICU_IEN2_BIT }, /* No.242 SCI9 TXI9 */
561 { ICU_IER1E_ADDR, ICU_IEN3_BIT }, /* No.243 SCI9 TEI9 */
562 { ICU_IER1E_ADDR, ICU_IEN4_BIT }, /* No.244 SCI10 RXI10 */
563 { ICU_IER1E_ADDR, ICU_IEN5_BIT }, /* No.245 SCI10 TXI10 */
564 { ICU_IER1E_ADDR, ICU_IEN6_BIT }, /* No.246 SCI10 TEI10 */
565 { ICU_IER1E_ADDR, ICU_IEN7_BIT }, /* No.247 SCI11 RXI11 */
566 { ICU_IER1F_ADDR, ICU_IEN0_BIT }, /* No.248 SCI11 TXI11 */
567 { ICU_IER1F_ADDR, ICU_IEN1_BIT }, /* No.249 SCI11 TEI11 */
568 { ICU_IER1F_ADDR, ICU_IEN2_BIT }, /* No.250 SCI12 RXI12 */
569 { ICU_IER1F_ADDR, ICU_IEN3_BIT }, /* No.251 SCI12 TXI12 */
570 { ICU_IER1F_ADDR, ICU_IEN4_BIT }, /* No.252 SCI12 TEI12 */
571 { ICU_IER1F_ADDR, ICU_IEN5_BIT }, /* No.253 IEB IEBINT */
572 { NULL, INVALID_OFFSET }, /* No.254 —\–ñ */
573 { NULL, INVALID_OFFSET }, /* No.255 —\–ñ */
574};
575
576
577/*
578 * IRQƒRƒ“ƒgƒ[ƒ‹ƒŒƒWƒXƒ^ƒAƒhƒŒƒXƒe[ƒuƒ‹
579 */
580volatile uint8_t __evenaccess * const irqcr_reg_addr[ IRQ_MAX ] = {
581 ICU_IRQ0_ADDR,
582 ICU_IRQ1_ADDR,
583 ICU_IRQ2_ADDR,
584 ICU_IRQ3_ADDR,
585 ICU_IRQ4_ADDR,
586 ICU_IRQ5_ADDR,
587 ICU_IRQ6_ADDR,
588 ICU_IRQ7_ADDR,
589 ICU_IRQ8_ADDR,
590 ICU_IRQ9_ADDR,
591 ICU_IRQ10_ADDR,
592 ICU_IRQ11_ADDR,
593 ICU_IRQ12_ADDR,
594 ICU_IRQ13_ADDR,
595 ICU_IRQ14_ADDR,
596 ICU_IRQ15_ADDR,
597};
598
Note: See TracBrowser for help on using the repository browser.