[384] | 1 | /*
|
---|
| 2 | * TOPPERS/SSP Kernel
|
---|
| 3 | * Smallest Set Profile Kernel
|
---|
| 4 | *
|
---|
| 5 | * Copyright (C) 2008 by Embedded and Real-Time Systems Laboratory
|
---|
| 6 | * Graduate School of Information Science, Nagoya Univ., JAPAN
|
---|
| 7 | * Copyright (C) 2010 by Meika Sugimoto
|
---|
| 8 | * Copyright (C) 2018, 2019 by Naoki Saito
|
---|
| 9 | * Nagoya Municipal Industrial Research Institute, JAPAN
|
---|
| 10 | *
|
---|
| 11 | * ä¸è¨èä½æ¨©è
|
---|
| 12 | ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
|
---|
| 13 | * ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹
|
---|
| 14 | * å¤ã»åé
|
---|
| 15 | å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
|
---|
| 16 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
|
---|
| 17 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
|
---|
| 18 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
|
---|
| 19 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
|
---|
| 20 | * ç¨ã§ããå½¢ã§åé
|
---|
| 21 | å¸ããå ´åã«ã¯ï¼åé
|
---|
| 22 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
|
---|
| 23 | * è
|
---|
| 24 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
|
---|
| 25 | * ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
|
---|
| 26 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
|
---|
| 27 | * ç¨ã§ããªãå½¢ã§åé
|
---|
| 28 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
|
---|
| 29 | * ã¨ï¼
|
---|
| 30 | * (a) åé
|
---|
| 31 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
|
---|
| 32 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
|
---|
| 33 | * ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
|
---|
| 34 | * (b) åé
|
---|
| 35 | å¸ã®å½¢æ
|
---|
| 36 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
|
---|
| 37 | * å ±åãããã¨ï¼
|
---|
| 38 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
|
---|
| 39 | * 害ãããï¼ä¸è¨èä½æ¨©è
|
---|
| 40 | ããã³TOPPERSããã¸ã§ã¯ããå
|
---|
| 41 | 責ãããã¨ï¼
|
---|
| 42 | * ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
|
---|
| 43 | * ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
|
---|
| 44 | ããã³TOPPERSããã¸ã§ã¯ãã
|
---|
| 45 | * å
|
---|
| 46 | 責ãããã¨ï¼
|
---|
| 47 | *
|
---|
| 48 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
|
---|
| 49 | ã
|
---|
| 50 | * ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
|
---|
| 51 | * ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
|
---|
| 52 | * ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害ã«é¢ãã¦ãï¼ã
|
---|
| 53 | * ã®è²¬ä»»ãè² ããªãï¼
|
---|
| 54 | *
|
---|
| 55 | * @(#) $Id: core_config.c 384 2019-04-16 11:01:09Z nmir-saito $
|
---|
| 56 | */
|
---|
| 57 |
|
---|
| 58 | /*
|
---|
| 59 | * ã³ã¢ä¾åã¢ã¸ã¥ã¼ã«ï¼ARMv8-Aç¨ï¼
|
---|
| 60 | */
|
---|
| 61 |
|
---|
| 62 | #include "kernel_impl.h"
|
---|
| 63 | #include <t_syslog.h>
|
---|
| 64 |
|
---|
| 65 | /* å²è¾¼ã¿ãã¹ãæ°ã®ç®¡ç */
|
---|
| 66 | uint8_t intnest;
|
---|
| 67 |
|
---|
| 68 | /*
|
---|
| 69 | * ã³ã¢ä¾åã®åæå
|
---|
| 70 | */
|
---|
| 71 | void
|
---|
| 72 | core_initialize(void)
|
---|
| 73 | {
|
---|
| 74 | /* å²è¾¼ã¿ãã¹ãæ°ã®åæå */
|
---|
| 75 | intnest = 0u;
|
---|
| 76 | }
|
---|
| 77 |
|
---|
| 78 | /*
|
---|
| 79 | * ã³ã¢ä¾åã®çµäºå¦ç
|
---|
| 80 | */
|
---|
| 81 | void
|
---|
| 82 | core_terminate(void)
|
---|
| 83 | {
|
---|
| 84 | while(1)
|
---|
| 85 | ;
|
---|
| 86 | }
|
---|
| 87 |
|
---|
| 88 | /*
|
---|
| 89 | * å²è¾¼ã¿ãã³ãã©ã®å¼ã³åºã
|
---|
| 90 | */
|
---|
| 91 | void
|
---|
| 92 | call_int_handler(uint32_t intno)
|
---|
| 93 | {
|
---|
| 94 | intnest++;
|
---|
| 95 |
|
---|
| 96 | i_unlock_cpu();
|
---|
| 97 |
|
---|
| 98 | // ãã³ãã©ã®å¼ã³åºã
|
---|
| 99 | inh_table[intno]();
|
---|
| 100 |
|
---|
| 101 | i_lock_cpu();
|
---|
| 102 |
|
---|
| 103 | intnest--;
|
---|
| 104 | }
|
---|
| 105 |
|
---|
| 106 | /*
|
---|
| 107 | * ã«ã¼ãã«ç®¡çã®CPUä¾å¤ãã³ãã©ã®å¼ã³åºã
|
---|
| 108 | */
|
---|
| 109 | void
|
---|
| 110 | call_exc_handler(void *p_excinf, uint32_t excno)
|
---|
| 111 | {
|
---|
| 112 | uint64_t spsr = *(((uint64_t*)p_excinf) + 4);
|
---|
| 113 |
|
---|
| 114 | intnest++;
|
---|
| 115 |
|
---|
| 116 | /*
|
---|
| 117 | * ããã»ããµã®ç¶æ
|
---|
| 118 | ãCPUä¾å¤çºçåã®ç¶æ
|
---|
| 119 | ã«ãã
|
---|
| 120 | */
|
---|
| 121 | if((spsr & AARCH64_PSTATE_F) == 0) {
|
---|
| 122 | aarch64_clear_daif_f();
|
---|
| 123 | }
|
---|
| 124 |
|
---|
| 125 | if((spsr & AARCH64_PSTATE_I) == 0) {
|
---|
| 126 | aarch64_clear_daif_i();
|
---|
| 127 | }
|
---|
| 128 |
|
---|
| 129 | // ãã³ãã©ã®å¼ã³åºã
|
---|
| 130 | exc_table[excno](p_excinf);
|
---|
| 131 |
|
---|
| 132 | /*
|
---|
| 133 | * ããã»ããµã®ç¶æ
|
---|
| 134 | ãæ»ã
|
---|
| 135 | */
|
---|
| 136 | if((spsr & AARCH64_PSTATE_F) == 0) {
|
---|
| 137 | aarch64_set_daif_f();
|
---|
| 138 | }
|
---|
| 139 |
|
---|
| 140 | if((spsr & AARCH64_PSTATE_I) == 0) {
|
---|
| 141 | aarch64_set_daif_i();
|
---|
| 142 | }
|
---|
| 143 |
|
---|
| 144 | intnest--;
|
---|
| 145 | }
|
---|
| 146 |
|
---|
| 147 | /*
|
---|
| 148 | * FIQãã³ãã©ã®å¼ã³åºã
|
---|
| 149 | * å
|
---|
| 150 | ¨ã¦ã®ä¾å¤ããã¹ã¯ãããç¶æ
|
---|
| 151 | ã§å¼ã³åºããã
|
---|
| 152 | * ä¾å¤è¦å ã®å¤å¥ãå«ããã(ãããã¯ããããå¼ã³åºãããã«ã¼ãã³)ã§è¡ã
|
---|
| 153 | */
|
---|
| 154 | void
|
---|
| 155 | call_fiq_handler(void)
|
---|
| 156 | {
|
---|
| 157 | }
|
---|
| 158 |
|
---|
| 159 |
|
---|
| 160 | #ifndef OMIT_DEFAULT_EXC_HANDLER
|
---|
| 161 | /*
|
---|
| 162 | * ç»é²ããã¦ããªãä¾å¤ãçºçããã¨å¼ã³åºããã
|
---|
| 163 | */
|
---|
| 164 | void
|
---|
| 165 | default_exc_handler(void *p_excinf)
|
---|
| 166 | {
|
---|
| 167 | uint64_t ipm = *(((uint64_t*)p_excinf) + 0);
|
---|
| 168 | uint64_t excno = *(((uint64_t*)p_excinf) + 1);
|
---|
| 169 | uint64_t esr, pc, spsr, sp;
|
---|
| 170 |
|
---|
| 171 | esr = *(((uint64_t*)p_excinf) + 2);
|
---|
| 172 | pc = *(((uint64_t*)p_excinf) + 3);
|
---|
| 173 | spsr = *(((uint64_t*)p_excinf) + 4);
|
---|
| 174 | sp = *(((uint64_t*)p_excinf) + 36);
|
---|
| 175 |
|
---|
| 176 | syslog(LOG_EMERG, "\nUnregistered CPU Exception occured.");
|
---|
| 177 | syslog(LOG_EMERG, "EXCNO = %08x ESR = %08x iMASK = %08x ", excno, esr, ipm);
|
---|
| 178 | syslog(LOG_EMERG, "PC=%08x%08x SP = %08x%08x SPSR = %08x",
|
---|
| 179 | (uint32_t)((pc & UINT64_C(0xffffffff00000000))>>32), (uint32_t)(pc & UINT64_C(0xffffffff)),
|
---|
| 180 | (uint32_t)((sp & UINT64_C(0xffffffff00000000))>>32), (uint32_t)(sp & UINT64_C(0xffffffff)),
|
---|
| 181 | (uint32_t)spsr);
|
---|
| 182 |
|
---|
| 183 | target_exit();
|
---|
| 184 | }
|
---|
| 185 | #endif /* OMIT_DEFAULT_EXC_HANDLER */
|
---|
| 186 |
|
---|
| 187 | #ifndef OMIT_DEFAULT_INT_HANDLER
|
---|
| 188 | /*
|
---|
| 189 | * æªç»é²ã®å²è¾¼ã¿ãçºçããå ´åã«å¼ã³åºããã
|
---|
| 190 | */
|
---|
| 191 | void
|
---|
| 192 | default_int_handler(void)
|
---|
| 193 | {
|
---|
| 194 | syslog(LOG_EMERG, "\nUnregistered Interrupt occurs.");
|
---|
| 195 |
|
---|
| 196 | target_exit();
|
---|
| 197 | }
|
---|
| 198 | #endif /* OMIT_DEFAULT_INT_HANDLER */
|
---|
| 199 |
|
---|
| 200 |
|
---|