1 | /*
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2 | * TOPPERS Software
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3 | * Toyohashi Open Platform for Embedded Real-Time Systems
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4 | *
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5 | * Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory
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6 | * Graduate School of Information Science, Nagoya Univ., JAPAN
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7 | * Copyright (C) 2018,2019 by Naoki Saito
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8 | * Nagoya Municipal Industrial Research Institute, JAPAN
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9 | *
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10 | * ä¸è¨èä½æ¨©è
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11 | ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
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12 | * ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹
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13 | * å¤ã»åé
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14 | å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
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15 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
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16 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
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17 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
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18 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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19 | * ç¨ã§ããå½¢ã§åé
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20 | å¸ããå ´åã«ã¯ï¼åé
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21 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
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22 | * è
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23 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
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24 | * ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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25 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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26 | * ç¨ã§ããªãå½¢ã§åé
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27 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
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28 | * ã¨ï¼
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29 | * (a) åé
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30 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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31 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
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32 | * ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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33 | * (b) åé
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34 | å¸ã®å½¢æ
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35 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
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36 | * å ±åãããã¨ï¼
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37 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
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38 | * 害ãããï¼ä¸è¨èä½æ¨©è
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39 | ããã³TOPPERSããã¸ã§ã¯ããå
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40 | 責ãããã¨ï¼
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41 | * ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
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42 | * ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
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43 | ããã³TOPPERSããã¸ã§ã¯ãã
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44 | * å
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45 | 責ãããã¨ï¼
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46 | *
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47 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
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48 | ã
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49 | * ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
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50 | * ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
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51 | * ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害ã«é¢ãã¦ãï¼ã
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52 | * ã®è²¬ä»»ãè² ããªãï¼
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53 | *
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54 | * $Id: bcm2837.h 384 2019-04-16 11:01:09Z nmir-saito $
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55 | */
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56 | #ifndef TOPPERS_BCM2837_H
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57 | #define TOPPERS_BCM2837_H
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58 |
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59 | #include <sil.h>
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60 |
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61 | /*
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62 | * å²è¾¼ã¿çªå·ï¼intnoï¼ã®å®ç¾©
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63 | */
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64 | // Core interrupts
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65 | #define TINTNO_CNTPS 0 // CNTPSIRQ
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66 | #define TINTNO_CNTPNS 1 // CNTPNSIRQ
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67 | #define TINTNO_CNTHP 2 // CNTHPIRQ
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68 | #define TINTNO_CNTV 3 // CNTVIRQ
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69 | #define TINTNO_MBOX0 4 // Mailbox 0
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70 | #define TINTNO_MBOX1 5 // Mailbox 1
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71 | #define TINTNO_MBOX2 6 // Mailbox 2
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72 | #define TINTNO_MBOX3 7 // Mailbox 3
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73 | #define TINTNO_PMU 9 // PMU
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74 | #define TINTNO_AXI 10 // AXI-outstanding
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75 | #define TINTNO_LTIMER 11 // Local timer
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76 |
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77 | // Basic interrupts
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78 | #define TINTNO_ARMTIMER 32 // ARM timer
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79 | #define TINTNO_MBOX 33 // ARM mailbox
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80 | #define TINTNO_ARMDRBELL0 34 // ARM doorbell 0
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81 | #define TINTNO_ARMDRBELL1 35 // ARM doorbell 1
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82 | #define TINTNO_GPU0HALTED 36 // GPU0 halted
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83 | #define TINTNO_GPU1HALTED 37 // GPU1 halted
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84 | #define TINTNO_ILACSS0 38 // Illegal access type 1
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85 | #define TINTNO_ILACSS1 39 // Illegal access type 0
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86 |
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87 | // GPU0 interrupts
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88 | #define TINTNO_AUX 93 // Aux
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89 |
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90 | // GPU1 interrupts
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91 | #define TINTNO_I2CSPISLV 107
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92 | #define TINTNO_PWA0 109
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93 | #define TINTNO_PWA1 110
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94 | #define TINTNO_SMI 112
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95 | #define TINTNO_GPIO0 113
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96 | #define TINTNO_GPIO1 114
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97 | #define TINTNO_GPIO2 115
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98 | #define TINTNO_GPIO3 116
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99 | #define TINTNO_I2C 117
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100 | #define TINTNO_SPI 118
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101 | #define TINTNO_PCM 119
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102 | #define TINTNO_UART 121
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103 |
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104 |
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105 | /*
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106 | * å²è¾¼ã¿çªå·ã®æå°å¤ã¨æ大å¤
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107 | */
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108 | #define TMIN_INTNO UINT_C(0)
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109 | #define TMAX_INTNO UINT_C(127)
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110 |
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111 | /*
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112 | * ã¡ã¢ãªããããI/Oã®ãã¼ã¹ã¢ãã¬ã¹
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113 | */
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114 | #define MMIO_BASE 0x3F000000
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115 |
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116 | /*
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117 | * å²è¾¼ã¿é¢é£ã¬ã¸ã¹ã¿
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118 | */
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119 | #define IRQ_PEND_B 0x3f00b200
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120 | #define IRQ_PEND_1 0x3f00b204
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121 | #define IRQ_PEND_2 0x3f00b208
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122 | #define ENABLE_IRQ_1 0x3f00b210
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123 | #define ENABLE_IRQ_2 0x3f00b214
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124 | #define ENABLE_IRQ_B 0x3f00b218
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125 | #define DISABLE_IRQ_1 0x3f00b21C
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126 | #define DISABLE_IRQ_2 0x3f00b220
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127 | #define DISABLE_IRQ_B 0x3f00b224
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128 |
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129 | #define CORE0_IRQ_SRC 0x40000060
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130 |
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131 |
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132 | /*
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133 | * GPIO
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134 | */
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135 | #define GPFSEL0 (MMIO_BASE+0x00200000)
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136 | #define GPFSEL1 (MMIO_BASE+0x00200004)
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137 | #define GPFSEL2 (MMIO_BASE+0x00200008)
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138 | #define GPFSEL3 (MMIO_BASE+0x0020000C)
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139 | #define GPFSEL4 (MMIO_BASE+0x00200010)
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140 | #define GPFSEL5 (MMIO_BASE+0x00200014)
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141 | #define GPSET0 (MMIO_BASE+0x0020001C)
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142 | #define GPSET1 (MMIO_BASE+0x00200020)
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143 | #define GPCLR0 (MMIO_BASE+0x00200028)
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144 | #define GPLEV0 (MMIO_BASE+0x00200034)
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145 | #define GPLEV1 (MMIO_BASE+0x00200038)
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146 | #define GPEDS0 (MMIO_BASE+0x00200040)
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147 | #define GPEDS1 (MMIO_BASE+0x00200044)
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148 | #define GPHEN0 (MMIO_BASE+0x00200064)
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149 | #define GPHEN1 (MMIO_BASE+0x00200068)
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150 | #define GPPUD (MMIO_BASE+0x00200094)
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151 | #define GPPUDCLK0 (MMIO_BASE+0x00200098)
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152 | #define GPPUDCLK1 (MMIO_BASE+0x0020009C)
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153 |
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154 |
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155 | /*
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156 | * UARTã¬ã¸ã¹ã¿ã®ãã¼ã¹ã¢ãã¬ã¹
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157 | */
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158 | #define RPI_UART0_BASE (MMIO_BASE + 0x00201000)
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159 |
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160 | /*
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161 | * ãã¼ã¬ã¼ãè¨å®
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162 | */
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163 | #define RPI_UART_IBRD_38400 0x27U // 38400bps
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164 | #define RPI_UART_FBRD_38400 0x04U
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165 | #define RPI_UART_IBRD_115200 0x2U // 115200bps
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166 | #define RPI_UART_FBRD_115200 0xbU
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167 |
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168 | /*
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169 | * ã¡ã¼ã«ããã¯ã¹é¢é£
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170 | * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
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171 | */
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172 | #define VIDEOCORE_MBOX (MMIO_BASE+0x0000B880)
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173 |
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174 | #define MBOX_READ (VIDEOCORE_MBOX+0x0)
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175 | #define MBOX_POLL (VIDEOCORE_MBOX+0x10)
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176 | #define MBOX_SENDER (VIDEOCORE_MBOX+0x14)
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177 | #define MBOX_STATUS (VIDEOCORE_MBOX+0x18)
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178 | #define MBOX_CONFIG (VIDEOCORE_MBOX+0x1C)
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179 | #define MBOX_WRITE (VIDEOCORE_MBOX+0x20)
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180 | #define MBOX_RESPONSE 0x80000000
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181 | #define MBOX_FULL 0x80000000
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182 | #define MBOX_EMPTY 0x40000000
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183 |
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184 | #define MBOX_REQUEST 0
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185 |
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186 | /* ãã£ãã« */
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187 | #define MBOX_CH_POWER 0
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188 | #define MBOX_CH_FB 1
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189 | #define MBOX_CH_VUART 2
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190 | #define MBOX_CH_VCHIQ 3
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191 | #define MBOX_CH_LEDS 4
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192 | #define MBOX_CH_BTNS 5
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193 | #define MBOX_CH_TOUCH 6
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194 | #define MBOX_CH_COUNT 7
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195 | #define MBOX_CH_PROP 8
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196 |
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197 | /* tags */
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198 | #define MBOX_TAG_GETSERIAL 0x10004
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199 | #define MBOX_TAG_LAST 0
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200 |
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201 | #define MBOX_REQUEST 0
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202 |
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203 | /* channels */
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204 | #define MBOX_CH_POWER 0
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205 | #define MBOX_CH_FB 1
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206 | #define MBOX_CH_VUART 2
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207 | #define MBOX_CH_VCHIQ 3
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208 | #define MBOX_CH_LEDS 4
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209 | #define MBOX_CH_BTNS 5
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210 | #define MBOX_CH_TOUCH 6
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211 | #define MBOX_CH_COUNT 7
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212 | #define MBOX_CH_PROP 8
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213 |
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214 | /* tags */
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215 | #define MBOX_TAG_GETSERIAL 0x10004
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216 | #define MBOX_TAG_SETCLKRATE 0x38002
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217 | #define MBOX_TAG_LAST 0
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218 |
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219 | #ifndef TOPPERS_MACRO_ONLY
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220 |
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221 | /*
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222 | * mailbox å¼ã³åºã
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223 | * 注æï¼ç¬¬2å¼æ°ã®ã¢ãã¬ã¹ã¯16ãã¤ãã¢ã©ã¤ã¡ã³ãã§ãããã¨
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224 | */
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225 | Inline int_t mbox_call(unsigned char ch, volatile uint32_t *mbox)
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226 | {
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227 | uint32_t r = (((uint32_t)((uint64_t)mbox) & ~0xF) | (ch & 0xF));
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228 |
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229 | // 使ããããã«ãªãã¾ã§å¾
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230 | ã¤
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231 | do{
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232 | Asm("nop");
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233 | } while(sil_rew_mem((uint32_t *)MBOX_STATUS) & MBOX_FULL);
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234 |
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235 | // ãã£ãã«ã®èå¥åãä»å ãã¦ã¡ãã»ã¼ã¸ã®ã¢ãã¬ã¹ãæ¸ãè¾¼ã¿
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236 | sil_wrw_mem((uint32_t *)MBOX_WRITE , r);
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237 |
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238 | while(1) {
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239 | // å¿çãããã¾ã§å¾
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240 | ã¤
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241 | do{
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242 | Asm("nop");
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243 | } while(sil_rew_mem((uint32_t *)MBOX_STATUS) & MBOX_EMPTY);
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244 |
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245 | if(r == sil_rew_mem((uint32_t *)MBOX_READ))
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246 | return mbox[1] == MBOX_RESPONSE;
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247 | }
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248 | return 0;
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249 | }
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250 |
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251 | #endif /* TOPPERS_MACRO_ONLY */
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252 | #endif /* TOPPERS_BCM2837_H */
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