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source: ssp_qb_r5f100le_cs/trunk/arch/rl78_ca78k0r/prc_config.h@ 93

Last change on this file since 93 was 93, checked in by nmir-saito, 9 years ago
add Combined package of SSP kernel for QB-R5F100LE-TB(RL78 processor)
File size: 9.1 KB

Rev	Line
[93]	1	/*
	2	* TOPPERS/SSP Kernel
	3	* Smallest Set Profile Kernel
	4	*
	5	* Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
	6	* Toyohashi Univ. of Technology, JAPAN
	7	* Copyright (C) 2005,2006 by Embedded and Real-Time Systems Laboratory
	8	* Graduate School of Information Science, Nagoya Univ., JAPAN
	9	* Copyright (C) 2008 by Witz Corporation, JAPAN
	10	* Copyright (C) 2010-2014 by Naoki Saito
	11	* Nagoya Municipal Industrial Research Institute, JAPAN
	12	*
	13	* ãLì ÒÍCÈºÌ (1)`(4) Ìðð½·êÉÀèC{\tgEF
	14	* Ai{\tgEFAðüÏµ½àÌðÜÞDÈº¯¶jðgpE¡»EüÏE
	15	* ÄzziÈºCpÆÄÔj·é±Æð³Åø·éD
	16	* (1) {\tgEFAð\[XR[hÌ`Åp·éêÉÍCãLÌì
	17	* \¦C±Ìpð¨æÑºLÌ³ÛØKèªC»ÌÜÜÌ`Å\[X
	18	* R[hÉÜÜêÄ¢é±ÆD
	19	* (2) {\tgEFAðCCu`®ÈÇC¼Ì\tgEFAJÉgp
	20	* Å«é`ÅÄzz·éêÉÍCÄzzÉº¤hL
	21	gipÒ}
	22	* j
	23	AÈÇjÉCãLÌì \¦C±Ìpð¨æÑºLÌ³Û
	24	* ØKèðfÚ·é±ÆD
	25	* (3) {\tgEFAðC@íÉgÝÞÈÇC¼Ì\tgEFAJÉgp
	26	* Å«È¢`ÅÄzz·éêÉÍCÌ¢¸ê©Ìðð½·±ÆD
	27	* (a) ÄzzÉº¤hL
	28	gipÒ}j
	29	AÈÇjÉCãLÌì
	30	* \¦C±Ìpð¨æÑºLÌ³ÛØKèðfÚ·é±ÆD
	31	* (b) ÄzzÌ`ÔðCÊÉèßéû@ÉæÁÄCTOPPERSvWFNgÉñ
	32	* ·é±ÆD
	33	* (4) {\tgEFAÌpÉæè¼ÚIÜ½ÍÔÚIÉ¶¶é¢©Èé¹Q
	34	* ©çàCãLì Ò¨æÑTOPPERSvWFNgðÆÓ·é±ÆDÜ½C
	35	* {\tgEFAÌ[UÜ½ÍGh[U©çÌ¢©ÈéRÉîÃ
	36	* ¿©çàCãLì Ò¨æÑTOPPERSvWFNgðÆÓ·é±ÆD
	37	*
	38	* {\tgEFAÍC³ÛØÅñ³êÄ¢éàÌÅ éDãLì Ò¨æ
	39	* ÑTOPPERSvWFNgÍC{\tgEFAÉÖµÄCÁèÌgpÚIÉÎ·
	40	* éK«àÜßÄC¢©ÈéÛØàsíÈ¢DÜ½C{\tgEFAÌp
	41	* Éæè¼ÚIÜ½ÍÔÚIÉ¶¶½¢©Èé¹QÉÖµÄàC»ÌÓCð
	42	* íÈ¢D
	43	*
	44	*/
	45
	46	/*
	47	* vZbTË¶W
	48	[iRL78j
	49	*
	50	* ±ÌCN[ht@CÍC"<vZbT^Ô>_config.h" ÌÝ©ç
	51	* CN[h³êéD¼Ìt@C©ç¼ÚCN[hµÄÍÈçÈ¢D
	52	*/
	53
	54	#ifndef TOPPERS_PRC_CONFIG_H
	55	#define TOPPERS_PRC_CONFIG_H
	56
	57	/*
	58	* (1) ReLXgÉÖ·éè`
	59	*/
	60
	61	/* ¤LX^bNÌæÌ½ßÌX^bN\|C^úlð¶¬·é}N */
	62	#define TOPPERS_ISTKPT(istk, istksz) ((STK_T )((char )(istk) + (istksz)))
	63
	64	/*
	65	* (2) VXeóÔÉÖ·éè`
	66	*/
	67
	68	/*
	69	* CPUbNóÔÅÌÝDæx}XN(IPM)Ìl
	70	* TIPM_LOCKÍCCPUbNóÔð\»·éÝDæx}XN(IPM)Ìlð¦·D
	71	* J[lÇÌÝÉÎ·éÝDæxÌÅ¬l(TMIN_INTPRI)Éµ¢D
	72	*/
	73	#ifndef TIPM_LOCK
	74	#define TIPM_LOCK TMIN_INTPRI
	75	#endif /* TIPM_LOCK */
	76
	77	/*
	78	* ÝDæx}XN(IPM) ÆvZbTÌÝDæx}XN(ISP) ÌÏ·
	79	*
	80	* RL78 ÅÍCPSWWX^ÌºÊ©ç¦Ärbg1¨æÑ 2 Ì 2 rbgÉ
	81	* CT[rXEvCIeBEtO(ISP) Ìlªi[³êéD
	82	*
	83	* J[lÌÇ·éIPM (-1©çA±µ½Ìl) ðgÁÄ
	84	* vZbTÌ ISP ð§ä·é½ßÉÏ·ªKvÆÈéD
	85	*
	86	* wèµ½xÈºÌÝð}XN·éêÍCISPÌÝèlð
	87	* ÚIÌxæèêÂ¢Dæx(lÆµÄÍ¬³¢)lÉ·éKvª éD
	88	*/
	89	#define IPM2ISP(ipm) (((uint8_t)(4-1+(ipm))) << 1U) /* IPM-->ISP(ipm=-3,-2,-1,0) */
	90	#define ISP2IPM(isp) ((PRI)((PRI)(isp >> 1U)+1-4)) /* ISP-->IPM */
	91
	92
	93	/*
	94	* ÝDæx}XNÌÁÊÈlÉÎ·éà\»
	95	*/
	96	#define ISP_LOCK (IPM2ISP(TIPM_LOCK)) /* CPUbNóÔÅÌ ISP */
	97	#define ISP_ENAALL (IPM2ISP(TIPM_ENAALL)) /* TIPM_ENAALL ÅÌ ISP */
	98
	99
	100
	101	/*
	102	* (3) Ýf(ÝvC)
	103	*/
	104
	105	/*
	106	* intnoªCdis_int^ena_intÉÎ·éÝÔÆµÄ
	107	* LøÈlÅ éêÉtrueC»¤ÅÈ¢êÉfalseðÔ·}N
	108	*/
	109	#define VALID_INTNO_DISINT(intno) VALID_INTNO(intno)
	110	#define VALID_INTNO_CFGINT(intno) VALID_INTNO(intno)
	111
	112	/*
	113	* IPM ©çÝ§äWX^ÅÌ\»ÉÏ··é}N
	114	*/
	115	#define IPM2ILVL(ipm) ((ipm)+4) // ipm=-1,-2,-3,-4
	116
	117
	118	/*
	119	* (4) Ýf(Ýnh)
	120	*/
	121
	122	/*
	123	* ÝnhÌüûÌ¶¬}N
	124	*/
	125	#define _INT_ENTRY(inhno, inthdr) _kernel_##inthdr##_##inhno##_entry
	126	#define INT_ENTRY(inhno, inthdr) _INT_ENTRY(inhno , inthdr)
	127
	128	#define _INTHDR_ENTRY(inhno, inhno_num ,inthdr) \
	129	extern _kernel_##inthdr##_##inhno##_entry(void);
	130	#define INTHDR_ENTRY(inhno, inhno_num ,inthdr) _INTHDR_ENTRY(inhno, inhno_num ,inthdr)
	131
	132	/*
	133	* (5) CPUáOf
	134	*/
	135
	136	/*
	137	* CPUáOnhÌüûÌ¶¬}N
	138	*/
	139	#define _EXC_ENTRY(excno , exchdr) _kernel_##exchdr##_##excno##_entry
	140	#define EXC_ENTRY(excno , exchdr) _EXC_ENTRY(excno , exchdr)
	141
	142	#define _EXCHDR_ENTRY(excno , excno_num , exchdr) \
	143	extern _kernel_##exchdr##_##excno##_entry(void);
	144	#define EXCHDR_ENTRY(excno , excno_num , exchdr) _EXCHDR_ENTRY(excno , excno_num , exchdr)
	145
	146	/*
	147	* (6) ú»EI¹
	148	*/
	149
	150	// è`Èµ
	151
	152	#ifndef TOPPERS_MACRO_ONLY
	153
	154	/*
	155	* (1) ReLXgÉÖ·éè`
	156	*/
	157
	158	/*
	159	* ReLXgÌQÆ
	160	*/
	161	extern bool_t sense_context(void);
	162
	163	/*
	164	* (2) VXeóÔÉÖ·éè`
	165	*/
	166
	167	/*
	168	* CPUbNtOÀ»Ì½ßÌÏ (prc_config.c)
	169	*/
	170	extern bool_t lock_flag; /* CPUbNtOÌl */
	171	extern uint8_t saved_psw; /* CPUbNóÔÚsOÌÝDæxx */
	172
	173	/*
	174	* CPU bNóÔÖÌÚs
	175	* ±ÌÖÍCCPU bNóÔÌÆ«ÉÄÑ¾³êÈ¢±ÆðOñÆ·éD
	176	*/
	177	extern void t_lock_cpu(void);
	178	extern void i_lock_cpu(void);
	179
	180	/*
	181	* CPUbNóÔÌð
	182	* ±ÌÖÍCCPU bNóÔÌÆ«ÉÌÝÄÑ¾³êé±ÆðOñÆ·éD
	183	*/
	184	extern void t_unlock_cpu(void);
	185	extern void i_unlock_cpu(void);
	186
	187
	188	/*
	189	* CPUbNóÔÌQÆ
	190	*/
	191	extern bool_t x_sense_lock(void);
	192
	193	#define t_sense_lock() x_sense_lock()
	194	#define i_sense_lock() x_sense_lock()
	195
	196	/*
	197	* ÝDæx}XN(IPM) ÌÝè
	198	* wèµ½ÝDæx(-1, -2, ..., TMIN_INTPRI) ð³É
	199	* vZbTÌÝDæxx (IPL) ðÝè·éD
	200	*/
	201	extern void x_set_ipm(PRI intpri);
	202
	203	#define t_set_ipm(intpri) x_set_ipm(intpri)
	204	#define i_set_ipm(intpri) x_set_ipm(intpri)
	205
	206	extern PRI x_get_ipm(void);
	207
	208	#define i_get_ipm() x_get_ipm()
	209	#define t_get_ipm() t_get_ipm()
	210
	211	/*
	212	* (3) Ýf(ÝvC)
	213	*/
	214
	215	/*
	216	* ÝvöÌxè`e[u (kernel_cfg.c ÉæéoÍ)
	217	* ÝÔ(INTNO) ©çÝDæxðæ¾·é½ßÉgpD
	218	*/
	219	extern const PRI intpri_table[];
	220
	221	/*
	222	* ÝvÖ~tOÌZbg(prc_config.c)
	223	* wèµ½ÝÔÉÎ·éÝvCÌÝvtOðZbg·éD
	224	* Ý®«ªÝè³êÄ¢È¢ÝvCÌÝÔðwèµ½
	225	* êÍCPÉ FALSE ðÔ·D
	226	*/
	227	extern bool_t x_disable_int(INTNO intno);
	228
	229	#define t_disable_int(intno) x_disable_int(intno)
	230	#define i_disable_int(intno) x_disable_int(intno)
	231
	232	/*
	233	* ÝvÖ~tOÌNA(prc_config.c)
	234	* wèµ½ÝÔÉÎ·éÝvCÌÝvtOðNA·éD
	235	* Ý®«ªÝè³êÄ¢È¢ÝvCÌÝÔðwèµ½
	236	* êÍCPÉ FALSE ðÔ·D
	237	*/
	238	extern bool_t x_enable_int(INTNO intno);
	239
	240	#define t_enable_int(intno) x_enable_int(intno)
	241	#define i_enable_int(intno) x_enable_int(intno)
	242
	243
	244	/*
	245	* ÝvÌNA(prc_config.c)
	246	*/
	247	extern void x_clear_int(INTNO intno);
	248
	249	#define t_clear_int(intno) x_clear_int(intno)
	250	#define i_clear_int(intno) x_clear_int(intno)
	251
	252
	253	/*
	254	* ÝvÌ`FbN(prc_config.c)
	255	*/
	256	extern bool_t x_probe_int(INTNO intno);
	257
	258	#define t_probe_int(intno) x_probe_int(intno)
	259	#define i_probe_int(intno) x_probe_int(intno)
	260
	261	/*
	262	* ÝvCÌ®«ÌÝè (prc_config.c)
	263	*/
	264	extern void x_config_int(INTNO intno, ATR intatr, PRI intpri);
	265
	266	/*
	267	* (4) Ýf(Ýnh)
	268	*/
	269
	270	/*
	271	* ÝnhÌÝè
	272	*
	273	* RL78ÍROMÉÝxN^ðzu·é½ßC{ÖÍóÉè`·éD
	274	*/
	275	#define x_define_inh(inhno, inthdr)
	276
	277	/*
	278	* ÝnhÌüûÅKvÈ
	279	*/
	280	#define i_begin_int(intno) /* ÁÉs¤×«ÍÈ¢ */
	281
	282	/*
	283	* ÝnhÌoûÅKvÈ
	284	*/
	285	#define i_end_int(intno) /* ÁÉs¤×«ÍÈ¢ */
	286
	287	/*
	288	* (5) CPUáOf
	289	*/
	290
	291	/*
	292	* CPUáOnhÌÝè
	293	* RL78 Í ROM ÉxN^ðzu·é½ßC{ÖÍóÉè`·éD
	294	*/
	295	#define x_define_exc(excno, exchdr)
	296
	297	/*
	298	* (6) ú»EI¹
	299	*/
	300
	301	/*
	302	* vZbTË¶Ìú»(prc_config.c)
	303	*/
	304	extern void prc_initialize(void);
	305
	306	/*
	307	* dispatcher ÄÑoµOÉ^[QbgË¶ÅKvÈðs¤½ßÌÖ
	308	* (prc_support.asm)
	309	*/
	310	extern void start_dispatch(void);
	311
	312	/*
	313	* J[lÌI¹ÌÄoµiprc_support.asmj
	314	*
	315	* call_exit_kernelÍCJ[lÌI¹ÉÄÑo³êCX^bN\|C^ð
	316	* ú»µCJ[lÌI¹iexit_kerneljðÄÑo·D
	317	*/
	318	extern void call_exit_kernel(void);
	319
	320	/*
	321	* vZbTË¶ÌI¹(prc_config.c)
	322	*/
	323	extern void prc_terminate(void);
	324
	325	/*
	326	* (7) dispacher ÅÌÝÒ¿
	327	*/
	328	extern void idle_loop(void);
	329
	330
	331	#endif /* TOPPERS_MACRO_ONLY */
	332	#endif /* TOPPERS_PRC_CONFIG_H */

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