[313] | 1 | /*
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| 2 | * TINET (TCP/IP Protocol Stack)
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| 3 | *
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| 4 | * Copyright (C) 2001-2009 by Dep. of Computer Science and Engineering
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| 5 | * Tomakomai National College of Technology, JAPAN
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| 6 | * Copyright (C) 2014-2015 Cores Co., Ltd. Japan
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| 7 | *
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| 8 | * ä¸è¨èä½æ¨©è
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| 9 | ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
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| 10 | * ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹
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| 11 | * å¤ã»åé
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| 12 | å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
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| 13 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
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| 14 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
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| 15 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
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| 16 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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| 17 | * ç¨ã§ããå½¢ã§åé
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| 18 | å¸ããå ´åã«ã¯ï¼åé
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| 19 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
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| 20 | * è
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| 21 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
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| 22 | * ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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| 23 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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| 24 | * ç¨ã§ããªãå½¢ã§åé
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| 25 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
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| 26 | * ã¨ï¼
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| 27 | * (a) åé
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| 28 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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| 29 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
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| 30 | * ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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| 31 | * (b) åé
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| 32 | å¸ã®å½¢æ
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| 33 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
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| 34 | * å ±åãããã¨ï¼
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| 35 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
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| 36 | * 害ãããï¼ä¸è¨èä½æ¨©è
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| 37 | ããã³TOPPERSããã¸ã§ã¯ããå
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| 38 | 責ãããã¨ï¼
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| 39 | * ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
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| 40 | * ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
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| 41 | ããã³TOPPERSããã¸ã§ã¯ãã
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| 42 | * å
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| 43 | 責ãããã¨ï¼
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| 44 | *
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| 45 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
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| 46 | ã
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| 47 | * ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
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| 48 | * ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
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| 49 | * ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害ã«é¢ãã¦ãï¼ã
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| 50 | * ã®è²¬ä»»ãè² ããªãï¼
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| 51 | *
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| 52 | * @(#) $Id: if_rx62n.c 313 2017-07-23 04:50:32Z coas-nagasima $
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| 53 | */
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| 54 |
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| 55 | /*
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| 56 | * Copyright (c) 1995, David Greenman
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| 57 | * All rights reserved.
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| 58 | *
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| 59 | * Redistribution and use in source and binary forms, with or without
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| 60 | * modification, are permitted provided that the following conditions
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| 61 | * are met:
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| 62 | * 1. Redistributions of source code must retain the above copyright
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| 63 | * notice unmodified, this list of conditions, and the following
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| 64 | * disclaimer.
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| 65 | * 2. Redistributions in binary form must reproduce the above copyright
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| 66 | * notice, this list of conditions and the following disclaimer in the
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| 67 | * documentation and/or other materials provided with the distribution.
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| 68 | *
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| 69 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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| 70 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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| 71 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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| 72 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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| 73 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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| 74 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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| 75 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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| 76 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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| 77 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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| 78 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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| 79 | * SUCH DAMAGE.
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| 80 | *
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| 81 | * $FreeBSD: src/sys/i386/isa/if_ed.c,v 1.148.2.4 1999/09/25 13:08:18 nyan Exp $
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| 82 | */
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| 83 |
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| 84 | #ifdef TARGET_KERNEL_ASP
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| 85 |
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| 86 | #define CAST(type, val) ((type)(val))
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| 87 |
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| 88 | #include <kernel.h>
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| 89 | #include <sil.h>
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| 90 | #include <t_syslog.h>
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| 91 | #include "kernel_cfg.h"
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| 92 | #include "kernel/kernel_impl.h"
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| 93 |
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| 94 | #endif /* of #ifdef TARGET_KERNEL_ASP */
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| 95 |
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| 96 | #ifdef TARGET_KERNEL_JSP
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| 97 |
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| 98 | #include <s_services.h>
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| 99 | #include <t_services.h>
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| 100 | #include "kernel_id.h"
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| 101 |
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| 102 | #endif /* of #ifdef TARGET_KERNEL_JSP */
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| 103 |
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| 104 | #include <tinet_defs.h>
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| 105 | #include <tinet_config.h>
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| 106 |
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| 107 | #include <net/if.h>
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| 108 | #include <net/ethernet.h>
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| 109 | #include <net/if_arp.h>
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| 110 | #include <net/net.h>
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| 111 | #include <net/net_timer.h>
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| 112 | #include <net/net_count.h>
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| 113 | #include <net/net_buf.h>
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| 114 |
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| 115 | #include "if_rx62nreg.h"
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| 116 | #include <string.h>
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| 117 | #include "ether_phy.h"
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| 118 |
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| 119 | #ifdef _MSC_VER
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| 120 | #include <stdlib.h>
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| 121 | #endif
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| 122 |
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| 123 | uint8_t mac_addr[ETHER_ADDR_LEN];
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| 124 |
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| 125 | /*
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| 126 | * ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã«ä¾åããã½ããã¦ã§ã¢æ
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| 127 | å ±
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| 128 | */
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| 129 |
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| 130 | typedef struct t_rx62n_softc {
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| 131 | T_RX62N_TX_DESC *tx_write;
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| 132 | T_RX62N_RX_DESC *rx_read;
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| 133 | bool_t link_pre;
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| 134 | bool_t link_now;
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| 135 | bool_t over_flow;
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| 136 | } T_RX62N_SOFTC;
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| 137 |
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| 138 | /*
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| 139 | * ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã®ã½ããã¦ã§ã¢æ
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| 140 | å ±
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| 141 | */
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| 142 |
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| 143 | /* ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã«ä¾åããã½ããã¦ã§ã¢æ
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| 144 | å ± */
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| 145 |
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| 146 | static T_RX62N_SOFTC rx62n_softc;
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| 147 |
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| 148 | typedef struct t_rx62n_buf {
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| 149 | uint8_t rx_buff[NUM_IF_RX62N_RXBUF][32 * (((int)&((T_NET_BUF *)0)->buf + IF_RX62N_BUF_PAGE_SIZE + 31) / 32)];
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| 150 | uint8_t tx_buff[NUM_IF_RX62N_TXBUF][32 * ((IF_RX62N_BUF_PAGE_SIZE + 31) / 32)];
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| 151 | T_RX62N_RX_DESC rx_desc[NUM_IF_RX62N_RXBUF];
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| 152 | T_RX62N_TX_DESC tx_desc[NUM_IF_RX62N_TXBUF];
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| 153 | } T_RX62N_BUF;
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| 154 |
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| 155 | #if defined(__RX)
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| 156 | #pragma section ETH_MEMORY
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| 157 | #define __attribute__(x)
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| 158 | #endif
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| 159 | T_RX62N_BUF __attribute__((section("ETH_MEMORY"),aligned(16))) rx62n_buf;
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| 160 | #if defined(__RX)
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| 161 | #pragma section
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| 162 | #endif
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| 163 |
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| 164 | /* ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã«ä¾åããªãã½ããã¦ã§ã¢æ
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| 165 | å ± */
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| 166 |
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| 167 | T_IF_SOFTC if_softc = {
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| 168 | {0,}, /* ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã®ã¢ãã¬ã¹ */
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| 169 | 0, /* éä¿¡ã¿ã¤ã ã¢ã¦ã */
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| 170 | &rx62n_softc, /* ãã£ãã¤ã¹ä¾åã®ã½ããã¦ã§ã¢æ
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| 171 | å ± */
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| 172 | SEM_IF_RX62N_SBUF_READY, /* éä¿¡ã»ããã© */
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| 173 | SEM_IF_RX62N_RBUF_READY, /* åä¿¡ã»ããã© */
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| 174 |
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| 175 | #ifdef SUPPORT_INET6
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| 176 |
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| 177 | IF_MADDR_INIT, /* ãã«ããã£ã¹ãã¢ãã¬ã¹ãªã¹ã */
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| 178 |
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| 179 | #endif /* of #ifdef SUPPORT_INET6 */
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| 180 | };
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| 181 |
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| 182 | /*
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| 183 | * å±æå¤æ°
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| 184 | */
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| 185 |
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| 186 | static void rx62n_stop (T_RX62N_SOFTC *sc);
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| 187 | static void rx62n_init_sub (T_IF_SOFTC *ic);
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| 188 | static void rx62n_set_ecmr (T_IF_SOFTC *ic, enum phy_mode_t mode);
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| 189 |
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| 190 | #ifdef SUPPORT_INET6
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| 191 |
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| 192 | static uint32_t ds_crc (uint8_t *addr);
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| 193 | static void ds_getmcaf (T_IF_SOFTC *ic, uint32_t *mcaf);
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| 194 |
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| 195 | /*
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| 196 | * ds_crc -- ã¤ã¼ãµãããã¢ãã¬ã¹ã® CRC ãè¨ç®ããã
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| 197 | */
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| 198 |
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| 199 | #define POLYNOMIAL 0x04c11db6
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| 200 |
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| 201 | static uint32_t
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| 202 | ds_crc (uint8_t *addr)
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| 203 | {
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| 204 | uint32_t crc = ULONG_C(0xffffffff);
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| 205 | int_t carry, len, bit;
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| 206 | uint8_t byte;
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| 207 |
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| 208 | for (len = ETHER_ADDR_LEN; len -- > 0; ) {
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| 209 | byte = *addr ++;
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| 210 | for (bit = 8; bit -- > 0; ) {
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| 211 | carry = ((crc & ULONG_C(0x80000000)) ? 1 : 0) ^ (byte & UINT_C(0x01));
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| 212 | crc <<= 1;
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| 213 | byte >>= 1;
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| 214 | if (carry)
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| 215 | crc = (crc ^ POLYNOMIAL) | carry;
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| 216 | }
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| 217 | }
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| 218 | return crc;
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| 219 | }
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| 220 |
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| 221 | #undef POLYNOMIAL
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| 222 |
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| 223 | /*
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| 224 | * ds_getmcaf -- ãã«ããã£ã¹ãã¢ãã¬ã¹ã®ãªã¹ããããã«ããã£ã¹ãã¢ãã¬ã¹
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| 225 | * ãã£ã«ã¿ãè¨ç®ããã
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| 226 | */
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| 227 |
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| 228 | static void
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| 229 | ds_getmcaf (T_IF_SOFTC *ic, uint32_t *mcaf)
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| 230 | {
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| 231 | uint32_t count, index;
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| 232 | uint8_t *af = (uint8_t*)mcaf;
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| 233 |
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| 234 | mcaf[0] = mcaf[1] = 0;
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| 235 |
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| 236 | for (count = MAX_IF_MADDR_CNT; count -- > 0; ) {
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| 237 | index = ds_crc(ic->maddrs[count].lladdr) >> 26;
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| 238 | af[index >> 3] |= 1 << (index & 7);
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| 239 | }
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| 240 | }
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| 241 |
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| 242 | /*
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| 243 | * rx62n_setrcr -- åä¿¡æ§æã¬ã¸ã¹ã¿ (RCR) ãè¨å®ããã
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| 244 | */
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| 245 |
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| 246 | static void
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| 247 | rx62n_setrcr (T_IF_SOFTC *ic)
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| 248 | {
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| 249 | T_RX62N_SOFTC *sc = ic->sc;
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| 250 | }
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| 251 |
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| 252 | /*
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| 253 | * rx62n_addmulti -- ãã«ããã£ã¹ãã¢ãã¬ã¹ã追å ããã
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| 254 | */
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| 255 |
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| 256 | ER
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| 257 | rx62n_addmulti (T_IF_SOFTC *ic)
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| 258 | {
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| 259 | rx62n_setrcr(ic);
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| 260 | return E_OK;
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| 261 | }
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| 262 |
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| 263 | #endif /* of #ifdef SUPPORT_INET6 */
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| 264 |
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| 265 | /*
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| 266 | * rx62n_stop -- ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ãåæ¢ããã
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| 267 | *
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| 268 | * 注æ: NIC å²ãè¾¼ã¿ç¦æ¢ç¶æ
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| 269 | ã§å¼ã³åºããã¨ã
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| 270 | */
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| 271 |
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| 272 | static void
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| 273 | rx62n_stop (T_RX62N_SOFTC *sc)
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| 274 | {
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| 275 | /* åä½ã¢ã¼ãã¯ãªã¢ */
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| 276 | sil_wrw_mem(ETHERC_ECMR, 0x00000000);
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| 277 | }
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| 278 |
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| 279 | /*
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| 280 | * rx62n_init_sub -- ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã®åæå
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| 281 | *
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| 282 | * 注æ: NIC å²ãè¾¼ã¿ç¦æ¢ç¶æ
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| 283 | ã§å¼ã³åºããã¨ã
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| 284 | */
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| 285 |
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| 286 | static void
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| 287 | rx62n_init_sub (T_IF_SOFTC *ic)
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| 288 | {
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| 289 | enum phy_mode_t mode;
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| 290 |
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| 291 | /* MACé¨ã½ããã¦ã¨ã¢ã»ãªã»ãã */
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| 292 | sil_wrw_mem(EDMAC_EDMR, sil_rew_mem(EDMAC_EDMR) | EDMAC_EDMR_SWR_BIT);
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| 293 |
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| 294 | dly_tsk(1);
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| 295 |
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| 296 | sil_wrw_mem(ETHERC_MAHR, ((uint32_t)mac_addr[0] << 24)
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| 297 | | ((uint32_t)mac_addr[1] << 16) | ((uint32_t)mac_addr[2] << 8 )
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| 298 | | (uint32_t)mac_addr[3]);
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| 299 | sil_wrw_mem(ETHERC_MALR, ((uint32_t)mac_addr[4] << 8 )
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| 300 | | (uint32_t)mac_addr[5]);
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| 301 |
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| 302 | /* PHYãªã»ãã */
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| 303 | phy_reset(0);
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| 304 |
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| 305 | /* Clear all ETHERC status BFR, PSRTO, LCHNG, MPD, ICD */
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| 306 | sil_wrw_mem(ETHERC_ECSR, 0x00000037);
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| 307 |
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| 308 | /* ãªã³ã¯å¤åå²ãè¾¼ã¿æå¹ */
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| 309 | sil_wrw_mem(ETHERC_ECSIPR, sil_rew_mem(ETHERC_ECSIPR) | ETHERC_ECSIPR_LCHNGIP);
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| 310 |
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| 311 | /* Clear all ETHERC and EDMAC status bits */
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| 312 | sil_wrw_mem(EDMAC_EESR, 0x47FF0F9F);
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| 313 |
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| 314 | /* éåä¿¡å²ãè¾¼ã¿æå¹ */
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| 315 | sil_wrw_mem(EDMAC_EESIPR, (EDMAC_EESIPR_TCIP | EDMAC_EESIPR_FRIP | EDMAC_EESIPR_RDEIP | EDMAC_EESIPR_FROFIP));
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| 316 |
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| 317 | /* åä¿¡ãã¬ã¼ã é·ä¸éï¼ãããã¡ãµã¤ãºï¼ */
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| 318 | sil_wrw_mem(ETHERC_RFLR, IF_RX62N_BUF_PAGE_SIZE);
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| 319 |
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| 320 | /* 96ãããæéï¼åæå¤ï¼ */
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| 321 | sil_wrw_mem(ETHERC_IPGR, 0x00000014);
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| 322 |
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| 323 | /* Set little endian mode */
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| 324 | sil_wrw_mem(EDMAC_EDMR, sil_rew_mem(EDMAC_EDMR) | EDMAC_EDMR_DE_BIT);
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| 325 |
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| 326 | /* Initialize Rx descriptor list address */
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| 327 | sil_wrw_mem(EDMAC_RDLAR, (uint32_t)rx62n_buf.rx_desc);
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| 328 | /* Initialize Tx descriptor list address */
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| 329 | sil_wrw_mem(EDMAC_TDLAR, (uint32_t)rx62n_buf.tx_desc);
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| 330 | /* Copy-back status is RFE & TFE only */
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| 331 | sil_wrw_mem(EDMAC_TRSCER, 0x00000000);
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| 332 | /* Threshold of Tx_FIFO */
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| 333 | sil_wrw_mem(EDMAC_TFTR, 0x00000000);
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| 334 | /* Transmit fifo & receive fifo is 2048 bytes */
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| 335 | sil_wrw_mem(EDMAC_FDR, 0x00000707);
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| 336 | /* RR in EDRRR is under driver control */
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| 337 | sil_wrw_mem(EDMAC_RMCR, 0x00000001);
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| 338 |
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| 339 | /* PHYã®åæå */
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| 340 | mode = phy_initialize(0);
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| 341 |
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| 342 | /* ECMRã¬ã¸ã¹ã¿ã®è¨å® */
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| 343 | rx62n_set_ecmr(ic, mode);
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| 344 |
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| 345 | #if defined(TARGET_KERNEL_ASP)
|
---|
| 346 |
|
---|
| 347 | /* ã¿ã¼ã²ããä¾åé¨ã®å²è¾¼ã¿åæå */
|
---|
| 348 | rx62n_inter_init();
|
---|
| 349 |
|
---|
| 350 | #endif /* of #if defined(TARGET_KERNEL_ASP) */
|
---|
| 351 |
|
---|
| 352 | #if defined(TARGET_KERNEL_JSP) && TKERNEL_PRVER >= 0x1042u /* JSP-1.4.2 以é */
|
---|
| 353 |
|
---|
| 354 | /* ã¿ã¼ã²ããä¾åé¨ã®å²è¾¼ã¿åæå */
|
---|
| 355 | rx62n_inter_init();
|
---|
| 356 |
|
---|
| 357 | #endif /* of #if defined(TARGET_KERNEL_JSP) && TKERNEL_PRVER >= 0x1042u */
|
---|
| 358 | }
|
---|
| 359 |
|
---|
| 360 |
|
---|
| 361 | /*
|
---|
| 362 | * rx62n_set_ecmr -- ECMRã¬ã¸ã¹ã¿ã®è¨å®
|
---|
| 363 | */
|
---|
| 364 |
|
---|
| 365 | static void
|
---|
| 366 | rx62n_set_ecmr (T_IF_SOFTC *ic, enum phy_mode_t mode)
|
---|
| 367 | {
|
---|
| 368 | uint32_t ecmr;
|
---|
| 369 |
|
---|
| 370 | ecmr = ETHERC_ECMR_RE | ETHERC_ECMR_TE/* | ETHERC_ECMR_PRM*/;
|
---|
| 371 |
|
---|
| 372 | if ((mode & 0x01) != 0)
|
---|
| 373 | ecmr |= ETHERC_ECMR_DM;
|
---|
| 374 | if ((mode & 0x02) != 0)
|
---|
| 375 | ecmr |= ETHERC_ECMR_RTM;
|
---|
| 376 |
|
---|
| 377 | /* åä½ã¢ã¼ãè¨å® */
|
---|
| 378 | sil_wrw_mem(ETHERC_ECMR, ecmr);
|
---|
| 379 | }
|
---|
| 380 |
|
---|
| 381 | /*
|
---|
| 382 | * rx62n_reset -- ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ããªã»ããããã
|
---|
| 383 | */
|
---|
| 384 |
|
---|
| 385 | void
|
---|
| 386 | rx62n_reset (T_IF_SOFTC *ic)
|
---|
| 387 | {
|
---|
| 388 | #ifdef TARGET_KERNEL_JSP
|
---|
| 389 | IPM ipm;
|
---|
| 390 | #endif
|
---|
| 391 |
|
---|
| 392 | /* NIC ããã®å²ãè¾¼ã¿ãç¦æ¢ããã*/
|
---|
| 393 | #ifdef TARGET_KERNEL_JSP
|
---|
| 394 | ipm = rx62n_dis_inter();
|
---|
| 395 | #endif
|
---|
| 396 | #ifdef TARGET_KERNEL_ASP
|
---|
| 397 | syscall(dis_int(INTNO_IF_RX62N_TRX));
|
---|
| 398 | #endif
|
---|
| 399 |
|
---|
| 400 | NET_COUNT_ETHER_NIC(net_count_ether_nic[NC_ETHER_NIC_RESETS], 1);
|
---|
| 401 | rx62n_stop(ic->sc);
|
---|
| 402 | rx62n_init_sub(ic);
|
---|
| 403 |
|
---|
| 404 | /* NIC ããã®å²ãè¾¼ã¿ã許å¯ããã*/
|
---|
| 405 | #ifdef TARGET_KERNEL_JSP
|
---|
| 406 | rx62n_ena_inter(ipm);
|
---|
| 407 | #endif
|
---|
| 408 | #ifdef TARGET_KERNEL_ASP
|
---|
| 409 | syscall(ena_int(INTNO_IF_RX62N_TRX));
|
---|
| 410 | #endif
|
---|
| 411 | }
|
---|
| 412 |
|
---|
| 413 | /*
|
---|
| 414 | * get_rx62n_softc -- ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã®ã½ããã¦ã§ã¢æ
|
---|
| 415 | å ±ãè¿ãã
|
---|
| 416 | */
|
---|
| 417 |
|
---|
| 418 | T_IF_SOFTC *
|
---|
| 419 | rx62n_get_softc (void)
|
---|
| 420 | {
|
---|
| 421 | return &if_softc;
|
---|
| 422 | }
|
---|
| 423 |
|
---|
| 424 | /*
|
---|
| 425 | * rx62n_watchdog -- ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã®ã¯ããããã°ã¿ã¤ã ã¢ã¦ã
|
---|
| 426 | */
|
---|
| 427 |
|
---|
| 428 | void
|
---|
| 429 | rx62n_watchdog (T_IF_SOFTC *ic)
|
---|
| 430 | {
|
---|
| 431 | rx62n_reset(ic);
|
---|
| 432 | }
|
---|
| 433 |
|
---|
| 434 | /*
|
---|
| 435 | * rx62n_probe -- ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã®æ¤åº
|
---|
| 436 | */
|
---|
| 437 |
|
---|
| 438 | void
|
---|
| 439 | rx62n_probe (T_IF_SOFTC *ic)
|
---|
| 440 | {
|
---|
| 441 | int i;
|
---|
| 442 | #if defined(TARGET_KERNEL_ASP)
|
---|
| 443 |
|
---|
| 444 | /* ã¿ã¼ã²ããä¾åé¨ã®ãã¹ã®åæå */
|
---|
| 445 | rx62n_bus_init();
|
---|
| 446 |
|
---|
| 447 | #endif /* of #if defined(TARGET_KERNEL_ASP) */
|
---|
| 448 | #if defined(TARGET_KERNEL_JSP) && TKERNEL_PRVER >= 0x1042u /* JSP-1.4.2 以é */
|
---|
| 449 |
|
---|
| 450 | /* ã¿ã¼ã²ããä¾åé¨ã®ãã¹ã®åæå */
|
---|
| 451 | rx62n_bus_init();
|
---|
| 452 |
|
---|
| 453 | #endif /* of #if defined(TARGET_KERNEL_JSP) && TKERNEL_PRVER >= 0x1042u */
|
---|
| 454 |
|
---|
| 455 | for(i = 0; i < ETHER_ADDR_LEN; i++){
|
---|
| 456 | ic->ifaddr.lladdr[i] = mac_addr[i];
|
---|
| 457 | }
|
---|
| 458 | }
|
---|
| 459 |
|
---|
| 460 | /*
|
---|
| 461 | * rx62n_init -- ãããã¯ã¼ã¯ã¤ã³ã¿ãã§ã¼ã¹ã®åæå
|
---|
| 462 | */
|
---|
| 463 |
|
---|
| 464 | void
|
---|
| 465 | rx62n_init (T_IF_SOFTC *ic)
|
---|
| 466 | {
|
---|
| 467 | #ifdef TARGET_KERNEL_JSP
|
---|
| 468 | IPM ipm;
|
---|
| 469 | #endif
|
---|
| 470 | T_RX62N_SOFTC *sc = ic->sc;
|
---|
| 471 | T_RX62N_TX_DESC *tdsc;
|
---|
| 472 | T_RX62N_RX_DESC *rdsc;
|
---|
| 473 | int i;
|
---|
| 474 |
|
---|
| 475 | /* NIC ããã®å²ãè¾¼ã¿ãç¦æ¢ããã*/
|
---|
| 476 | #ifdef TARGET_KERNEL_JSP
|
---|
| 477 | ipm = rx62n_dis_inter();
|
---|
| 478 | #endif
|
---|
| 479 | #ifdef TARGET_KERNEL_ASP
|
---|
| 480 | syscall(dis_int(INTNO_IF_RX62N_TRX));
|
---|
| 481 | #endif
|
---|
| 482 |
|
---|
| 483 | tdsc = (T_RX62N_TX_DESC *)rx62n_buf.tx_desc;
|
---|
| 484 | sc->tx_write = tdsc;
|
---|
| 485 | for ( i=0 ; i < NUM_IF_RX62N_TXBUF ; i++ ) {
|
---|
| 486 | memset(tdsc, 0, sizeof(*tdsc));
|
---|
| 487 | tdsc->tbl = 0;
|
---|
| 488 | tdsc->tba = (uint32_t)&rx62n_buf.tx_buff[i];
|
---|
| 489 | tdsc++;
|
---|
| 490 | }
|
---|
| 491 | tdsc--;
|
---|
| 492 | tdsc->tdle = 1;
|
---|
| 493 |
|
---|
| 494 | rdsc = (T_RX62N_RX_DESC *)rx62n_buf.rx_desc;
|
---|
| 495 | sc->rx_read = rdsc;
|
---|
| 496 | for ( i=0 ; i < NUM_IF_RX62N_RXBUF ; i++ ) {
|
---|
| 497 | memset(rdsc, 0, sizeof(*rdsc));
|
---|
| 498 | rdsc->rbl = IF_RX62N_BUF_PAGE_SIZE;
|
---|
| 499 | rdsc->rba = (uint32_t)&rx62n_buf.rx_buff[i] + (uint32_t)&((T_NET_BUF *)0)->buf;
|
---|
| 500 | rdsc->rfl = 0;
|
---|
| 501 | rdsc->ract = 1;
|
---|
| 502 | rdsc++;
|
---|
| 503 | }
|
---|
| 504 | rdsc--;
|
---|
| 505 | rdsc->rdle = 1;
|
---|
| 506 |
|
---|
| 507 | /* rx62n_init æ¬ä½ãå¼ã³åºãã*/
|
---|
| 508 | rx62n_init_sub(ic);
|
---|
| 509 |
|
---|
| 510 | if (sil_rew_mem(EDMAC_EDRRR) == 0) {
|
---|
| 511 | sil_wrw_mem(EDMAC_EDRRR, EDMAC_EDRRR_RR);
|
---|
| 512 | }
|
---|
| 513 |
|
---|
| 514 | /* NIC ããã®å²ãè¾¼ã¿ã許å¯ããã*/
|
---|
| 515 | #ifdef TARGET_KERNEL_JSP
|
---|
| 516 | rx62n_ena_inter(ipm);
|
---|
| 517 | #endif
|
---|
| 518 | #ifdef TARGET_KERNEL_ASP
|
---|
| 519 | syscall(ena_int(INTNO_IF_RX62N_TRX));
|
---|
| 520 | #endif
|
---|
| 521 | }
|
---|
| 522 |
|
---|
| 523 | /*
|
---|
| 524 | * rx62n_read -- ãã¬ã¼ã ã®èªã¿è¾¼ã¿
|
---|
| 525 | */
|
---|
| 526 |
|
---|
| 527 | T_NET_BUF *
|
---|
| 528 | rx62n_read (T_IF_SOFTC *ic)
|
---|
| 529 | {
|
---|
| 530 | T_RX62N_SOFTC *sc = ic->sc;
|
---|
| 531 | T_RX62N_RX_DESC *desc;
|
---|
| 532 | uint16_t len;
|
---|
| 533 | T_NET_BUF *input = NULL;
|
---|
| 534 | uint16_t align;
|
---|
| 535 | uint8_t *dst;
|
---|
| 536 | ER error;
|
---|
| 537 | enum phy_mode_t mode;
|
---|
| 538 |
|
---|
| 539 | /* ãªã³ã¯ç¶æ
|
---|
| 540 | ã«å¤åãã */
|
---|
| 541 | if (sc->link_pre != sc->link_now) {
|
---|
| 542 | sc->link_pre = sc->link_now;
|
---|
| 543 |
|
---|
| 544 | if (!phy_is_link(0)) {
|
---|
| 545 | /* PHYã®åæå */
|
---|
| 546 | mode = phy_initialize(0);
|
---|
| 547 |
|
---|
| 548 | /* ECMRã¬ã¸ã¹ã¿ã®è¨å® */
|
---|
| 549 | rx62n_set_ecmr(ic, mode);
|
---|
| 550 | }
|
---|
| 551 | }
|
---|
| 552 |
|
---|
| 553 | if (sc->over_flow) {
|
---|
| 554 | sc->over_flow = false;
|
---|
| 555 | }
|
---|
| 556 |
|
---|
| 557 | desc = sc->rx_read;
|
---|
| 558 |
|
---|
| 559 | if (desc->ract != 0) {
|
---|
| 560 | return NULL;
|
---|
| 561 | }
|
---|
| 562 |
|
---|
| 563 | len = desc->rfl;
|
---|
| 564 | /*
|
---|
| 565 | * +-----------+--------+---------+---------+
|
---|
| 566 | * | Ehter HDR | IP HDR | TCP HDR | TCP SDU |
|
---|
| 567 | * +-----------+--------+---------+---------+
|
---|
| 568 | * 14 20 20 n
|
---|
| 569 | * <----------------- len ---------------->
|
---|
| 570 | * ^
|
---|
| 571 | * t_net_buf 㧠4 ãªã¯ãããå¢çã«ã¢ã©ã¤ã³ããã¦ããã
|
---|
| 572 | *
|
---|
| 573 | * tcp_input 㨠udp_input ã§ã¯ãæ¬ä¼¼ããã㨠SDU ã§ãã§ãã¯ãµã ã
|
---|
| 574 | * è¨ç®ããããn ã 4 ãªã¯ãããå¢çã«ãªãããã« SDU ã®å¾ãã« 0 ã
|
---|
| 575 | * ãããã£ã³ã°ããããã®åãèæ
|
---|
| 576 | ®ã㦠net_buf ãç²å¾ããªããã°ãªããªãã
|
---|
| 577 | */
|
---|
| 578 | align = ((((len - sizeof(T_IF_HDR)) + 3) >> 2) << 2) + sizeof(T_IF_HDR);
|
---|
| 579 |
|
---|
| 580 | if ((error = tget_net_buf(&input, align, TMO_IF_RX62N_GET_NET_BUF)) == E_OK && input != NULL) {
|
---|
| 581 | dst = input->buf + IF_ETHER_NIC_HDR_ALIGN;
|
---|
| 582 | memcpy(dst, (void *)desc->rba, len);
|
---|
| 583 | }
|
---|
| 584 | else {
|
---|
| 585 | NET_COUNT_ETHER_NIC(net_count_ether_nic[NC_ETHER_NIC_IN_ERR_PACKETS], 1);
|
---|
| 586 | NET_COUNT_ETHER_NIC(net_count_ether_nic[NC_ETHER_NIC_NO_BUFS], 1);
|
---|
| 587 | }
|
---|
| 588 |
|
---|
| 589 | desc->rfp = 0;
|
---|
| 590 | desc->ract = 1;
|
---|
| 591 |
|
---|
| 592 | desc++;
|
---|
| 593 | if (desc == &rx62n_buf.rx_desc[NUM_IF_RX62N_RXBUF]) {
|
---|
| 594 | desc = rx62n_buf.rx_desc;
|
---|
| 595 | }
|
---|
| 596 | sc->rx_read = desc;
|
---|
| 597 |
|
---|
| 598 | if (sil_rew_mem(EDMAC_EDRRR) == 0) {
|
---|
| 599 | sil_wrw_mem(EDMAC_EDRRR, EDMAC_EDRRR_RR);
|
---|
| 600 | }
|
---|
| 601 |
|
---|
| 602 | return input;
|
---|
| 603 | }
|
---|
| 604 |
|
---|
| 605 | /*
|
---|
| 606 | * rx62n_start -- éä¿¡ãã¬ã¼ã ããããã¡ãªã³ã°ããã
|
---|
| 607 | */
|
---|
| 608 |
|
---|
| 609 | void
|
---|
| 610 | rx62n_start (T_IF_SOFTC *ic, T_NET_BUF *output)
|
---|
| 611 | {
|
---|
| 612 | T_RX62N_SOFTC *sc = ic->sc;
|
---|
| 613 | T_RX62N_TX_DESC *desc, *next;
|
---|
| 614 | uint8_t *buf = NULL;
|
---|
| 615 | int32_t len, res, pos;
|
---|
| 616 | uint32_t tfp;
|
---|
| 617 |
|
---|
| 618 | for ( res = output->len, pos = 0; res > 0; res -= len, pos += len ) {
|
---|
| 619 | desc = sc->tx_write;
|
---|
| 620 |
|
---|
| 621 | while (desc->tact != 0) {
|
---|
| 622 | tslp_tsk(1);
|
---|
| 623 | }
|
---|
| 624 |
|
---|
| 625 | buf = (uint8_t *)desc->tba + IF_ETHER_NIC_HDR_ALIGN;
|
---|
| 626 |
|
---|
| 627 | next = desc + 1;
|
---|
| 628 | if (next == &rx62n_buf.tx_desc[NUM_IF_RX62N_TXBUF]) {
|
---|
| 629 | next = rx62n_buf.tx_desc;
|
---|
| 630 | }
|
---|
| 631 | sc->tx_write = next;
|
---|
| 632 |
|
---|
| 633 | len = res;
|
---|
| 634 | if ( len > IF_RX62N_BUF_PAGE_SIZE ) {
|
---|
| 635 | len = IF_RX62N_BUF_PAGE_SIZE;
|
---|
| 636 | tfp = 0x0;
|
---|
| 637 | }
|
---|
| 638 | else
|
---|
| 639 | tfp = 0x1;
|
---|
| 640 |
|
---|
| 641 | if (pos == 0)
|
---|
| 642 | tfp |= 0x2;
|
---|
| 643 |
|
---|
| 644 | memcpy(buf, (uint8_t *)output->buf + pos, len);
|
---|
| 645 |
|
---|
| 646 | desc->tbl = len;
|
---|
| 647 | desc->tfp = tfp;
|
---|
| 648 | desc->tact = 1;
|
---|
| 649 | }
|
---|
| 650 |
|
---|
| 651 | if (sil_rew_mem(EDMAC_EDTRR) == 0) {
|
---|
| 652 | sil_wrw_mem(EDMAC_EDTRR, EDMAC_EDTRR_TR);
|
---|
| 653 | }
|
---|
| 654 | }
|
---|
| 655 |
|
---|
| 656 | /*
|
---|
| 657 | * RX62N Ethernet Controler éåä¿¡å²ãè¾¼ã¿ãã³ãã©
|
---|
| 658 | */
|
---|
| 659 |
|
---|
| 660 | void
|
---|
| 661 | if_rx62n_trx_handler (void)
|
---|
| 662 | {
|
---|
| 663 | T_IF_SOFTC *ic;
|
---|
| 664 | T_RX62N_SOFTC *sc;
|
---|
| 665 | uint32_t ecsr, eesr, psr;
|
---|
| 666 |
|
---|
| 667 | i_begin_int(INTNO_IF_RX62N_TRX);
|
---|
| 668 |
|
---|
| 669 | ic = &if_softc;
|
---|
| 670 | sc = ic->sc;
|
---|
| 671 |
|
---|
| 672 | ecsr = sil_rew_mem(ETHERC_ECSR);
|
---|
| 673 |
|
---|
| 674 | if (ecsr & ETHERC_ECSR_LCHNG) {
|
---|
| 675 | /* ETHERCé¨å²ãè¾¼ã¿è¦å ã¯ãªã¢ */
|
---|
| 676 | sil_wrw_mem(ETHERC_ECSR, ETHERC_ECSR_LCHNG);
|
---|
| 677 |
|
---|
| 678 | psr = sil_rew_mem(ETHERC_PSR);
|
---|
| 679 | sc->link_now = (psr & ETHERC_PSR_LMON) != 0;
|
---|
| 680 |
|
---|
| 681 | /* ãªã³ã¯ç¶æ
|
---|
| 682 | ã«å¤åãã */
|
---|
| 683 | if (sc->link_pre != sc->link_now) {
|
---|
| 684 | /* åä¿¡å²ãè¾¼ã¿å¦ç */
|
---|
| 685 | isig_sem(ic->semid_rxb_ready);
|
---|
| 686 | }
|
---|
| 687 | }
|
---|
| 688 |
|
---|
| 689 | eesr = sil_rew_mem(EDMAC_EESR);
|
---|
| 690 |
|
---|
| 691 | if (eesr & EDMAC_EESR_FR) {
|
---|
| 692 | /* DMAé¨å²ãè¾¼ã¿è¦å ã¯ãªã¢ */
|
---|
| 693 | sil_wrw_mem(EDMAC_EESR, EDMAC_EESR_FR);
|
---|
| 694 |
|
---|
| 695 | /* åä¿¡å²ãè¾¼ã¿å¦ç */
|
---|
| 696 | isig_sem(ic->semid_rxb_ready);
|
---|
| 697 | }
|
---|
| 698 | if (eesr & EDMAC_EESR_TC) {
|
---|
| 699 | /* DMAé¨å²ãè¾¼ã¿è¦å ã¯ãªã¢ */
|
---|
| 700 | sil_wrw_mem(EDMAC_EESR, EDMAC_EESR_TC);
|
---|
| 701 |
|
---|
| 702 | /* éä¿¡å²ãè¾¼ã¿å¦ç */
|
---|
| 703 | isig_sem(ic->semid_txb_ready);
|
---|
| 704 | }
|
---|
| 705 | if (eesr & (EDMAC_EESR_FROF | EDMAC_EESR_RDE)) {
|
---|
| 706 | /* DMAé¨å²ãè¾¼ã¿è¦å ã¯ãªã¢ */
|
---|
| 707 | sil_wrw_mem(EDMAC_EESR, EDMAC_EESR_FROF | EDMAC_EESR_RDE);
|
---|
| 708 |
|
---|
| 709 | sc->over_flow = true;
|
---|
| 710 |
|
---|
| 711 | /* åä¿¡å²ãè¾¼ã¿å¦ç */
|
---|
| 712 | isig_sem(ic->semid_rxb_ready);
|
---|
| 713 | }
|
---|
| 714 |
|
---|
| 715 | i_end_int(INTNO_IF_RX62N_TRX);
|
---|
| 716 | }
|
---|