source: rtos_arduino/trunk/arduino_lib/libraries/Ethernet2/src/utility/w5500.h@ 136

Last change on this file since 136 was 136, checked in by ertl-honda, 8 years ago

ライブラリとOS及びベーシックなサンプルの追加．
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1/*
2* Copyright (c) 2010 by WIZnet <support@wiznet.co.kr>
3 *
4 * This file is free software; you can redistribute it and/or modify
5 * it under the terms of either the GNU General Public License version 2
6 * or the GNU Lesser General Public License version 2.1, both as
7 * published by the Free Software Foundation.
8 *
9 * - 10 Apr. 2015
10 * Added support for Arduino Ethernet Shield 2
11 * by Arduino.org team
12 */
13
14#ifndef W5500_H_INCLUDED
15#define W5500_H_INCLUDED
16
17#define MAX_SOCK_NUM 8
18
19#include <SPI.h>
20
21typedef uint8_t SOCKET;
22/*
23class MR {
24public:
25 static const uint8_t RST = 0x80;
26 static const uint8_t PB = 0x10;
27 static const uint8_t PPPOE = 0x08;
28 static const uint8_t LB = 0x04;
29 static const uint8_t AI = 0x02;
30 static const uint8_t IND = 0x01;
31};
32*/
33/*
34class IR {
35public:
36 static const uint8_t CONFLICT = 0x80;
37 static const uint8_t UNREACH = 0x40;
38 static const uint8_t PPPoE = 0x20;
39 static const uint8_t SOCK0 = 0x01;
40 static const uint8_t SOCK1 = 0x02;
41 static const uint8_t SOCK2 = 0x04;
42 static const uint8_t SOCK3 = 0x08;
43 static inline uint8_t SOCK(SOCKET ch) { return (0x01 << ch); };
44};
45*/
46
47class SnMR {
48public:
49 static const uint8_t CLOSE = 0x00;
50 static const uint8_t TCP = 0x01;
51 static const uint8_t UDP = 0x02;
52 static const uint8_t IPRAW = 0x03;
53 static const uint8_t MACRAW = 0x04;
54 static const uint8_t PPPOE = 0x05;
55 static const uint8_t ND = 0x20;
56 static const uint8_t MULTI = 0x80;
57};
58
59enum SockCMD {
60 Sock_OPEN = 0x01,
61 Sock_LISTEN = 0x02,
62 Sock_CONNECT = 0x04,
63 Sock_DISCON = 0x08,
64 Sock_CLOSE = 0x10,
65 Sock_SEND = 0x20,
66 Sock_SEND_MAC = 0x21,
67 Sock_SEND_KEEP = 0x22,
68 Sock_RECV = 0x40
69};
70
71/*class SnCmd {
72public:
73 static const uint8_t OPEN = 0x01;
74 static const uint8_t LISTEN = 0x02;
75 static const uint8_t CONNECT = 0x04;
76 static const uint8_t DISCON = 0x08;
77 static const uint8_t CLOSE = 0x10;
78 static const uint8_t SEND = 0x20;
79 static const uint8_t SEND_MAC = 0x21;
80 static const uint8_t SEND_KEEP = 0x22;
81 static const uint8_t RECV = 0x40;
82};
83*/
84
85class SnIR {
86public:
87 static const uint8_t SEND_OK = 0x10;
88 static const uint8_t TIMEOUT = 0x08;
89 static const uint8_t RECV = 0x04;
90 static const uint8_t DISCON = 0x02;
91 static const uint8_t CON = 0x01;
92};
93
94class SnSR {
95public:
96 static const uint8_t CLOSED = 0x00;
97 static const uint8_t INIT = 0x13;
98 static const uint8_t LISTEN = 0x14;
99 static const uint8_t SYNSENT = 0x15;
100 static const uint8_t SYNRECV = 0x16;
101 static const uint8_t ESTABLISHED = 0x17;
102 static const uint8_t FIN_WAIT = 0x18;
103 static const uint8_t CLOSING = 0x1A;
104 static const uint8_t TIME_WAIT = 0x1B;
105 static const uint8_t CLOSE_WAIT = 0x1C;
106 static const uint8_t LAST_ACK = 0x1D;
107 static const uint8_t UDP = 0x22;
108 static const uint8_t IPRAW = 0x32;
109 static const uint8_t MACRAW = 0x42;
110 static const uint8_t PPPOE = 0x5F;
111};
112
113class IPPROTO {
114public:
115 static const uint8_t IP = 0;
116 static const uint8_t ICMP = 1;
117 static const uint8_t IGMP = 2;
118 static const uint8_t GGP = 3;
119 static const uint8_t TCP = 6;
120 static const uint8_t PUP = 12;
121 static const uint8_t UDP = 17;
122 static const uint8_t IDP = 22;
123 static const uint8_t ND = 77;
124 static const uint8_t RAW = 255;
125};
126
127class W5500Class {
128
129public:
130 void init();
131
132 /**
133 * @brief This function is being used for copy the data form Receive buffer of the chip to application buffer.
134 *
135 * It calculate the actual physical address where one has to read
136 * the data from Receive buffer. Here also take care of the condition while it exceed
137 * the Rx memory uper-bound of socket.
138 */
139 void read_data(SOCKET s, volatile uint16_t src, volatile uint8_t * dst, uint16_t len);
140
141 /**
142 * @brief This function is being called by send() and sendto() function also.
143 *
144 * This function read the Tx write pointer register and after copy the data in buffer update the Tx write pointer
145 * register. User should read upper byte first and lower byte later to get proper value.
146 */
147 void send_data_processing(SOCKET s, const uint8_t *data, uint16_t len);
148 /**
149 * @brief A copy of send_data_processing that uses the provided ptr for the
150 * write offset. Only needed for the "streaming" UDP API, where
151 * a single UDP packet is built up over a number of calls to
152 * send_data_processing_ptr, because TX_WR doesn't seem to get updated
153 * correctly in those scenarios
154 * @param ptr value to use in place of TX_WR. If 0, then the value is read
155 * in from TX_WR
156 * @return New value for ptr, to be used in the next call
157 */
158 // FIXME Update documentation
159 void send_data_processing_offset(SOCKET s, uint16_t data_offset, const uint8_t *data, uint16_t len);
160
161 /**
162 * @brief This function is being called by recv() also.
163 *
164 * This function read the Rx read pointer register
165 * and after copy the data from receive buffer update the Rx write pointer register.
166 * User should read upper byte first and lower byte later to get proper value.
167 */
168 void recv_data_processing(SOCKET s, uint8_t *data, uint16_t len, uint8_t peek = 0);
169
170 inline void setGatewayIp(uint8_t *_addr);
171 inline void getGatewayIp(uint8_t *_addr);
172
173 inline void setSubnetMask(uint8_t *_addr);
174 inline void getSubnetMask(uint8_t *_addr);
175
176 inline void setMACAddress(uint8_t * addr);
177 inline void getMACAddress(uint8_t * addr);
178
179 inline void setIPAddress(uint8_t * addr);
180 inline void getIPAddress(uint8_t * addr);
181
182 inline void setRetransmissionTime(uint16_t timeout);
183 inline void setRetransmissionCount(uint8_t _retry);
184
185 inline void setPHYCFGR(uint8_t _val);
186 inline uint8_t getPHYCFGR();
187
188 void execCmdSn(SOCKET s, SockCMD _cmd);
189
190 uint16_t getTXFreeSize(SOCKET s);
191 uint16_t getRXReceivedSize(SOCKET s);
192
193
194 // W5500 Registers
195 // ---------------
196private:
197 static uint8_t write(uint16_t _addr, uint8_t _cb, uint8_t _data);
198 static uint16_t write(uint16_t _addr, uint8_t _cb, const uint8_t *buf, uint16_t len);
199 static uint8_t read(uint16_t _addr, uint8_t _cb );
200 static uint16_t read(uint16_t _addr, uint8_t _cb, uint8_t *buf, uint16_t len);
201
202#define __GP_REGISTER8(name, address) \
203 static inline void write##name(uint8_t _data) { \
204 write(address, 0x04, _data); \
205 } \
206 static inline uint8_t read##name() { \
207 return read(address, 0x00); \
208 }
209#define __GP_REGISTER16(name, address) \
210 static void write##name(uint16_t _data) { \
211 write(address, 0x04, _data >> 8); \
212 write(address+1, 0x04, _data & 0xFF); \
213 } \
214 static uint16_t read##name() { \
215 uint16_t res = read(address, 0x00); \
216 res = (res << 8) + read(address + 1, 0x00); \
217 return res; \
218 }
219#define __GP_REGISTER_N(name, address, size) \
220 static uint16_t write##name(uint8_t *_buff) { \
221 return write(address, 0x04, _buff, size); \
222 } \
223 static uint16_t read##name(uint8_t *_buff) { \
224 return read(address, 0x00, _buff, size); \
225 }
226
227public:
228 __GP_REGISTER8 (MR, 0x0000); // Mode
229 __GP_REGISTER_N(GAR, 0x0001, 4); // Gateway IP address
230 __GP_REGISTER_N(SUBR, 0x0005, 4); // Subnet mask address
231 __GP_REGISTER_N(SHAR, 0x0009, 6); // Source MAC address
232 __GP_REGISTER_N(SIPR, 0x000F, 4); // Source IP address
233 __GP_REGISTER8 (IR, 0x0015); // Interrupt
234 __GP_REGISTER8 (IMR, 0x0016); // Interrupt Mask
235 __GP_REGISTER16(RTR, 0x0019); // Timeout address
236 __GP_REGISTER8 (RCR, 0x001B); // Retry count
237 __GP_REGISTER_N(UIPR, 0x0028, 4); // Unreachable IP address in UDP mode
238 __GP_REGISTER16(UPORT, 0x002C); // Unreachable Port address in UDP mode
239 __GP_REGISTER8 (PHYCFGR, 0x002E); // PHY Configuration register, default value: 0b 1011 1xxx
240
241
242#undef __GP_REGISTER8
243#undef __GP_REGISTER16
244#undef __GP_REGISTER_N
245
246 // W5500 Socket registers
247 // ----------------------
248private:
249 static inline uint8_t readSn(SOCKET _s, uint16_t _addr);
250 static inline uint8_t writeSn(SOCKET _s, uint16_t _addr, uint8_t _data);
251 static inline uint16_t readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len);
252 static inline uint16_t writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len);
253
254 //static const uint16_t CH_BASE = 0x0000;
255 //static const uint16_t CH_SIZE = 0x0000;
256
257#define __SOCKET_REGISTER8(name, address) \
258 static inline void write##name(SOCKET _s, uint8_t _data) { \
259 writeSn(_s, address, _data); \
260 } \
261 static inline uint8_t read##name(SOCKET _s) { \
262 return readSn(_s, address); \
263 }
264#if defined(REL_GR_KURUMI) || defined(REL_GR_KURUMI_PROTOTYPE)
265#define __SOCKET_REGISTER16(name, address) \
266 static void write##name(SOCKET _s, uint16_t _data) { \
267 writeSn(_s, address, _data >> 8); \
268 writeSn(_s, address+1, _data & 0xFF); \
269 } \
270 static uint16_t read##name(SOCKET _s) { \
271 uint16_t res = readSn(_s, address); \
272 uint16_t res2 = readSn(_s,address + 1); \
273 res = res << 8; \
274 res2 = res2 & 0xFF; \
275 res = res | res2; \
276 return res; \
277 }
278#else
279#define __SOCKET_REGISTER16(name, address) \
280 static void write##name(SOCKET _s, uint16_t _data) { \
281 writeSn(_s, address, _data >> 8); \
282 writeSn(_s, address+1, _data & 0xFF); \
283 } \
284 static uint16_t read##name(SOCKET _s) { \
285 uint16_t res = readSn(_s, address); \
286 res = (res << 8) + readSn(_s, address + 1); \
287 return res; \
288 }
289#endif
290#define __SOCKET_REGISTER_N(name, address, size) \
291 static uint16_t write##name(SOCKET _s, uint8_t *_buff) { \
292 return writeSn(_s, address, _buff, size); \
293 } \
294 static uint16_t read##name(SOCKET _s, uint8_t *_buff) { \
295 return readSn(_s, address, _buff, size); \
296 }
297
298public:
299 __SOCKET_REGISTER8(SnMR, 0x0000) // Mode
300 __SOCKET_REGISTER8(SnCR, 0x0001) // Command
301 __SOCKET_REGISTER8(SnIR, 0x0002) // Interrupt
302 __SOCKET_REGISTER8(SnSR, 0x0003) // Status
303 __SOCKET_REGISTER16(SnPORT, 0x0004) // Source Port
304 __SOCKET_REGISTER_N(SnDHAR, 0x0006, 6) // Destination Hardw Addr
305 __SOCKET_REGISTER_N(SnDIPR, 0x000C, 4) // Destination IP Addr
306 __SOCKET_REGISTER16(SnDPORT, 0x0010) // Destination Port
307 __SOCKET_REGISTER16(SnMSSR, 0x0012) // Max Segment Size
308 __SOCKET_REGISTER8(SnPROTO, 0x0014) // Protocol in IP RAW Mode
309 __SOCKET_REGISTER8(SnTOS, 0x0015) // IP TOS
310 __SOCKET_REGISTER8(SnTTL, 0x0016) // IP TTL
311 __SOCKET_REGISTER16(SnTX_FSR, 0x0020) // TX Free Size
312 __SOCKET_REGISTER16(SnTX_RD, 0x0022) // TX Read Pointer
313 __SOCKET_REGISTER16(SnTX_WR, 0x0024) // TX Write Pointer
314 __SOCKET_REGISTER16(SnRX_RSR, 0x0026) // RX Free Size
315 __SOCKET_REGISTER16(SnRX_RD, 0x0028) // RX Read Pointer
316 __SOCKET_REGISTER16(SnRX_WR, 0x002A) // RX Write Pointer (supported?)
317
318#undef __SOCKET_REGISTER8
319#undef __SOCKET_REGISTER16
320#undef __SOCKET_REGISTER_N
321
322
323private:
324 static const uint8_t RST = 7; // Reset BIT
325 static const int SOCKETS = 8;
326
327public:
328 static const uint16_t SSIZE = 2048; // Max Tx buffer size
329private:
330 static const uint16_t RSIZE = 2048; // Max Rx buffer size
331
332private:
333#if defined(ARDUINO_ARCH_AVR)
334#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1284P__)
335 inline static void initSS() { DDRB |= _BV(4); };
336 inline static void setSS() { PORTB &= ~_BV(4); };
337 inline static void resetSS() { PORTB |= _BV(4); };
338#elif defined(__AVR_ATmega32U4__)
339 inline static void initSS() { DDRB |= _BV(6); };
340 inline static void setSS() { PORTB &= ~_BV(6); };
341 inline static void resetSS() { PORTB |= _BV(6); };
342#elif defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB162__)
343 inline static void initSS() { DDRB |= _BV(0); };
344 inline static void setSS() { PORTB &= ~_BV(0); };
345 inline static void resetSS() { PORTB |= _BV(0); };
346#elif defined(REL_GR_KURUMI) || defined(REL_GR_KURUMI_PROTOTYPE)
347 inline static void initSS() { pinMode(SS, OUTPUT);
348 digitalWrite(SS, HIGH); };
349 inline static void setSS() { digitalWrite(SS, LOW); };
350 inline static void resetSS() { digitalWrite(SS, HIGH); };
351#else
352 inline static void initSS() { DDRB |= _BV(2); };
353 inline static void setSS() { PORTB &= ~_BV(2); };
354 inline static void resetSS() { PORTB |= _BV(2); };
355#endif
356#elif defined(ARDUINO_ARCH_SAMD)
357 inline static void initSS() { PORT->Group[g_APinDescription[10].ulPort].PINCFG[g_APinDescription[10].ulPin].reg&=~(uint8_t)(PORT_PINCFG_INEN) ;
358 PORT->Group[g_APinDescription[10].ulPort].DIRSET.reg = (uint32_t)(1<<g_APinDescription[10].ulPin) ;
359 PORT->Group[g_APinDescription[10].ulPort].PINCFG[g_APinDescription[10].ulPin].reg=(uint8_t)(PORT_PINCFG_PULLEN) ;
360 PORT->Group[g_APinDescription[10].ulPort].OUTSET.reg = (1ul << g_APinDescription[10].ulPin) ; };
361 inline static void setSS() { PORT->Group[g_APinDescription[10].ulPort].OUTCLR.reg = (1ul << g_APinDescription[10].ulPin) ; };
362 inline static void resetSS() { PORT->Group[g_APinDescription[10].ulPort].OUTSET.reg = (1ul << g_APinDescription[10].ulPin) ; };
363#endif // ARDUINO_ARCH_AVR
364};
365
366extern W5500Class w5500;
367
368uint8_t W5500Class::readSn(SOCKET _s, uint16_t _addr) {
369 uint8_t cntl_byte = (_s<<5)+0x08;
370 return read(_addr, cntl_byte);
371}
372
373uint8_t W5500Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t _data) {
374 uint8_t cntl_byte = (_s<<5)+0x0C;
375 return write(_addr, cntl_byte, _data);
376}
377
378uint16_t W5500Class::readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) {
379 uint8_t cntl_byte = (_s<<5)+0x08;
380 return read(_addr, cntl_byte, _buf, _len );
381}
382
383uint16_t W5500Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) {
384 uint8_t cntl_byte = (_s<<5)+0x0C;
385 return write(_addr, cntl_byte, _buf, _len);
386}
387
388void W5500Class::getGatewayIp(uint8_t *_addr) {
389 readGAR(_addr);
390}
391
392void W5500Class::setGatewayIp(uint8_t *_addr) {
393 writeGAR(_addr);
394}
395
396void W5500Class::getSubnetMask(uint8_t *_addr) {
397 readSUBR(_addr);
398}
399
400void W5500Class::setSubnetMask(uint8_t *_addr) {
401 writeSUBR(_addr);
402}
403
404void W5500Class::getMACAddress(uint8_t *_addr) {
405 readSHAR(_addr);
406}
407
408void W5500Class::setMACAddress(uint8_t *_addr) {
409 writeSHAR(_addr);
410}
411
412void W5500Class::getIPAddress(uint8_t *_addr) {
413 readSIPR(_addr);
414}
415
416void W5500Class::setIPAddress(uint8_t *_addr) {
417 writeSIPR(_addr);
418}
419
420void W5500Class::setRetransmissionTime(uint16_t _timeout) {
421 writeRTR(_timeout);
422}
423
424void W5500Class::setRetransmissionCount(uint8_t _retry) {
425 writeRCR(_retry);
426}
427
428void W5500Class::setPHYCFGR(uint8_t _val) {
429 writePHYCFGR(_val);
430}
431
432uint8_t W5500Class::getPHYCFGR() {
433// readPHYCFGR();
434 return read(0x002E, 0x00);
435}
436
437#endif
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