[136] | 1 | /*
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| 2 | * Copyright (c) 2012 by Cristian Maglie <c.maglie@arduino.cc>
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| 3 | * DAC library for Arduino Due.
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| 4 | *
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| 5 | * This file is free software; you can redistribute it and/or modify
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| 6 | * it under the terms of either the GNU General Public License version 2
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| 7 | * or the GNU Lesser General Public License version 2.1, both as
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| 8 | * published by the Free Software Foundation.
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| 9 | */
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| 10 |
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| 11 | #include <DAC.h>
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| 12 |
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| 13 | void DACClass::begin(uint32_t period) {
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| 14 | // Enable clock for DAC
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| 15 | pmc_enable_periph_clk(dacId);
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| 16 |
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| 17 | dacc_reset(dac);
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| 18 |
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| 19 | // Set transfer mode to double word
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| 20 | dacc_set_transfer_mode(dac, 1);
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| 21 |
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| 22 | // Power save:
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| 23 | // sleep mode - 0 (disabled)
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| 24 | // fast wakeup - 0 (disabled)
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| 25 | dacc_set_power_save(dac, 0, 0);
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| 26 |
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| 27 | // DAC refresh/startup timings:
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| 28 | // refresh - 0x08 (1024*8 dacc clocks)
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| 29 | // max speed mode - 0 (disabled)
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| 30 | // startup time - 0x10 (1024 dacc clocks)
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| 31 | dacc_set_timing(dac, 0x08, 0, DACC_MR_STARTUP_1024);
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| 32 |
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| 33 | // Flexible channel selection with tags
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| 34 | dacc_enable_flexible_selection(dac);
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| 35 |
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| 36 | // Set up analog current
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| 37 | dacc_set_analog_control(dac,
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| 38 | DACC_ACR_IBCTLCH0(0x02) |
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| 39 | DACC_ACR_IBCTLCH1(0x02) |
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| 40 | DACC_ACR_IBCTLDACCORE(0x01));
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| 41 |
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| 42 | // Enable output channels
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| 43 | dacc_enable_channel(dac, 0);
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| 44 | dacc_enable_channel(dac, 1);
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| 45 |
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| 46 | // Configure Timer Counter to trigger DAC
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| 47 | // --------------------------------------
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| 48 | pmc_enable_periph_clk(ID_TC1);
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| 49 | TC_Configure(TC0, 1,
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| 50 | TC_CMR_TCCLKS_TIMER_CLOCK2 | // Clock at MCR/8
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| 51 | TC_CMR_WAVE | // Waveform mode
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| 52 | TC_CMR_WAVSEL_UP_RC | // Counter running up and reset when equals to RC
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| 53 | TC_CMR_ACPA_SET | TC_CMR_ACPC_CLEAR);
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| 54 | const uint32_t TC = period / 8;
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| 55 | TC_SetRA(TC0, 1, TC / 2);
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| 56 | TC_SetRC(TC0, 1, TC);
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| 57 | TC_Start(TC0, 1);
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| 58 |
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| 59 | // Configure clock source for DAC (2 = TC0 Output Chan. 1)
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| 60 | dacc_set_trigger(dac, 2);
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| 61 |
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| 62 | // Configure pins
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| 63 | PIO_Configure(g_APinDescription[DAC0].pPort,
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| 64 | g_APinDescription[DAC0].ulPinType,
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| 65 | g_APinDescription[DAC0].ulPin,
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| 66 | g_APinDescription[DAC0].ulPinConfiguration);
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| 67 | PIO_Configure(g_APinDescription[DAC1].pPort,
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| 68 | g_APinDescription[DAC1].ulPinType,
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| 69 | g_APinDescription[DAC1].ulPin,
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| 70 | g_APinDescription[DAC1].ulPinConfiguration);
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| 71 |
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| 72 | // Enable interrupt controller for DAC
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| 73 | dacc_disable_interrupt(dac, 0xFFFFFFFF);
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| 74 | NVIC_DisableIRQ(isrId);
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| 75 | NVIC_ClearPendingIRQ(isrId);
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| 76 | NVIC_SetPriority(isrId, 0);
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| 77 | NVIC_EnableIRQ(isrId);
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| 78 | }
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| 79 |
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| 80 | void DACClass::end() {
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| 81 | TC_Stop(TC0, 1);
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| 82 | NVIC_DisableIRQ(isrId);
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| 83 | dacc_disable_channel(dac, 0);
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| 84 | dacc_disable_channel(dac, 1);
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| 85 | }
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| 86 |
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| 87 | bool DACClass::canQueue() {
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| 88 | return (dac->DACC_TNCR == 0);
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| 89 | }
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| 90 |
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| 91 | size_t DACClass::queueBuffer(const uint32_t *buffer, size_t size) {
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| 92 | // Try the first PDC buffer
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| 93 | if ((dac->DACC_TCR == 0) && (dac->DACC_TNCR == 0)) {
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| 94 | dac->DACC_TPR = (uint32_t) buffer;
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| 95 | dac->DACC_TCR = size;
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| 96 | dac->DACC_PTCR = DACC_PTCR_TXTEN;
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| 97 | if (cb)
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| 98 | dacc_enable_interrupt(dac, DACC_IER_ENDTX);
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| 99 | return size;
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| 100 | }
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| 101 |
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| 102 | // Try the second PDC buffer
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| 103 | if (dac->DACC_TNCR == 0) {
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| 104 | dac->DACC_TNPR = (uint32_t) buffer;
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| 105 | dac->DACC_TNCR = size;
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| 106 | dac->DACC_PTCR = DACC_PTCR_TXTEN;
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| 107 | if (cb)
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| 108 | dacc_enable_interrupt(dac, DACC_IER_ENDTX);
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| 109 | return size;
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| 110 | }
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| 111 |
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| 112 | // PDC buffers full, try again later...
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| 113 | return 0;
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| 114 | }
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| 115 |
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| 116 | void DACClass::setOnTransmitEnd_CB(OnTransmitEnd_CB _cb, void *_data) {
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| 117 | cb = _cb;
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| 118 | cbData = _data;
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| 119 | if (!cb)
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| 120 | dacc_disable_interrupt(dac, DACC_IDR_ENDTX);
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| 121 | }
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| 122 |
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| 123 | void DACClass::onService() {
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| 124 | uint32_t sr = dac->DACC_ISR;
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| 125 | if (sr & DACC_ISR_ENDTX) {
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| 126 | // There is a free slot, enqueue data
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| 127 | dacc_disable_interrupt(dac, DACC_IDR_ENDTX);
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| 128 | if (cb)
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| 129 | cb(cbData);
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| 130 | }
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| 131 | }
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| 132 |
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| 133 | DACClass DAC(DACC_INTERFACE, DACC_INTERFACE_ID, DACC_ISR_ID);
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| 134 |
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| 135 | void DACC_ISR_HANDLER(void) {
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| 136 | DAC.onService();
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| 137 | }
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| 138 |
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