source: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/tc4.h@ 136

Last change on this file since 136 was 136, checked in by ertl-honda, 8 years ago

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1/**
2 * \file
3 *
4 * \brief Instance description for TC4
5 *
6 * Copyright (c) 2014 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 *
42 */
43
44#ifndef _SAMD21_TC4_INSTANCE_
45#define _SAMD21_TC4_INSTANCE_
46
47/* ========== Register definition for TC4 peripheral ========== */
48#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
49#define REG_TC4_CTRLA (0x42003000U) /**< \brief (TC4) Control A */
50#define REG_TC4_READREQ (0x42003002U) /**< \brief (TC4) Read Request */
51#define REG_TC4_CTRLBCLR (0x42003004U) /**< \brief (TC4) Control B Clear */
52#define REG_TC4_CTRLBSET (0x42003005U) /**< \brief (TC4) Control B Set */
53#define REG_TC4_CTRLC (0x42003006U) /**< \brief (TC4) Control C */
54#define REG_TC4_DBGCTRL (0x42003008U) /**< \brief (TC4) Debug Control */
55#define REG_TC4_EVCTRL (0x4200300AU) /**< \brief (TC4) Event Control */
56#define REG_TC4_INTENCLR (0x4200300CU) /**< \brief (TC4) Interrupt Enable Clear */
57#define REG_TC4_INTENSET (0x4200300DU) /**< \brief (TC4) Interrupt Enable Set */
58#define REG_TC4_INTFLAG (0x4200300EU) /**< \brief (TC4) Interrupt Flag Status and Clear */
59#define REG_TC4_STATUS (0x4200300FU) /**< \brief (TC4) Status */
60#define REG_TC4_COUNT16_COUNT (0x42003010U) /**< \brief (TC4) COUNT16 Counter Value */
61#define REG_TC4_COUNT16_CC0 (0x42003018U) /**< \brief (TC4) COUNT16 Compare/Capture 0 */
62#define REG_TC4_COUNT16_CC1 (0x4200301AU) /**< \brief (TC4) COUNT16 Compare/Capture 1 */
63#define REG_TC4_COUNT32_COUNT (0x42003010U) /**< \brief (TC4) COUNT32 Counter Value */
64#define REG_TC4_COUNT32_CC0 (0x42003018U) /**< \brief (TC4) COUNT32 Compare/Capture 0 */
65#define REG_TC4_COUNT32_CC1 (0x4200301CU) /**< \brief (TC4) COUNT32 Compare/Capture 1 */
66#define REG_TC4_COUNT8_COUNT (0x42003010U) /**< \brief (TC4) COUNT8 Counter Value */
67#define REG_TC4_COUNT8_PER (0x42003014U) /**< \brief (TC4) COUNT8 Period Value */
68#define REG_TC4_COUNT8_CC0 (0x42003018U) /**< \brief (TC4) COUNT8 Compare/Capture 0 */
69#define REG_TC4_COUNT8_CC1 (0x42003019U) /**< \brief (TC4) COUNT8 Compare/Capture 1 */
70#else
71#define REG_TC4_CTRLA (*(RwReg16*)0x42003000U) /**< \brief (TC4) Control A */
72#define REG_TC4_READREQ (*(RwReg16*)0x42003002U) /**< \brief (TC4) Read Request */
73#define REG_TC4_CTRLBCLR (*(RwReg8 *)0x42003004U) /**< \brief (TC4) Control B Clear */
74#define REG_TC4_CTRLBSET (*(RwReg8 *)0x42003005U) /**< \brief (TC4) Control B Set */
75#define REG_TC4_CTRLC (*(RwReg8 *)0x42003006U) /**< \brief (TC4) Control C */
76#define REG_TC4_DBGCTRL (*(RwReg8 *)0x42003008U) /**< \brief (TC4) Debug Control */
77#define REG_TC4_EVCTRL (*(RwReg16*)0x4200300AU) /**< \brief (TC4) Event Control */
78#define REG_TC4_INTENCLR (*(RwReg8 *)0x4200300CU) /**< \brief (TC4) Interrupt Enable Clear */
79#define REG_TC4_INTENSET (*(RwReg8 *)0x4200300DU) /**< \brief (TC4) Interrupt Enable Set */
80#define REG_TC4_INTFLAG (*(RwReg8 *)0x4200300EU) /**< \brief (TC4) Interrupt Flag Status and Clear */
81#define REG_TC4_STATUS (*(RoReg8 *)0x4200300FU) /**< \brief (TC4) Status */
82#define REG_TC4_COUNT16_COUNT (*(RwReg16*)0x42003010U) /**< \brief (TC4) COUNT16 Counter Value */
83#define REG_TC4_COUNT16_CC0 (*(RwReg16*)0x42003018U) /**< \brief (TC4) COUNT16 Compare/Capture 0 */
84#define REG_TC4_COUNT16_CC1 (*(RwReg16*)0x4200301AU) /**< \brief (TC4) COUNT16 Compare/Capture 1 */
85#define REG_TC4_COUNT32_COUNT (*(RwReg *)0x42003010U) /**< \brief (TC4) COUNT32 Counter Value */
86#define REG_TC4_COUNT32_CC0 (*(RwReg *)0x42003018U) /**< \brief (TC4) COUNT32 Compare/Capture 0 */
87#define REG_TC4_COUNT32_CC1 (*(RwReg *)0x4200301CU) /**< \brief (TC4) COUNT32 Compare/Capture 1 */
88#define REG_TC4_COUNT8_COUNT (*(RwReg8 *)0x42003010U) /**< \brief (TC4) COUNT8 Counter Value */
89#define REG_TC4_COUNT8_PER (*(RwReg8 *)0x42003014U) /**< \brief (TC4) COUNT8 Period Value */
90#define REG_TC4_COUNT8_CC0 (*(RwReg8 *)0x42003018U) /**< \brief (TC4) COUNT8 Compare/Capture 0 */
91#define REG_TC4_COUNT8_CC1 (*(RwReg8 *)0x42003019U) /**< \brief (TC4) COUNT8 Compare/Capture 1 */
92#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
93
94/* ========== Instance parameters for TC4 peripheral ========== */
95#define TC4_CC8_NUM 2
96#define TC4_CC16_NUM 2
97#define TC4_CC32_NUM 2
98#define TC4_DITHERING_EXT 0
99#define TC4_DMAC_ID_MC_0 28
100#define TC4_DMAC_ID_MC_1 29
101#define TC4_DMAC_ID_MC_LSB 28
102#define TC4_DMAC_ID_MC_MSB 29
103#define TC4_DMAC_ID_MC_SIZE 2
104#define TC4_DMAC_ID_OVF 27
105#define TC4_GCLK_ID 28
106#define TC4_MASTER 1
107#define TC4_OW_NUM 2
108#define TC4_PERIOD_EXT 0
109#define TC4_SHADOW_EXT 0
110
111#endif /* _SAMD21_TC4_INSTANCE_ */
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