[136] | 1 | /**
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| 2 | * \file
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| 3 | *
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| 4 | * \brief Instance description for PM
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| 5 | *
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| 6 | * Copyright (c) 2014 Atmel Corporation. All rights reserved.
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| 7 | *
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| 8 | * \asf_license_start
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| 9 | *
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| 10 | * \page License
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| 11 | *
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| 12 | * Redistribution and use in source and binary forms, with or without
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| 13 | * modification, are permitted provided that the following conditions are met:
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| 14 | *
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| 15 | * 1. Redistributions of source code must retain the above copyright notice,
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| 16 | * this list of conditions and the following disclaimer.
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| 17 | *
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| 18 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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| 19 | * this list of conditions and the following disclaimer in the documentation
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| 20 | * and/or other materials provided with the distribution.
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| 21 | *
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| 22 | * 3. The name of Atmel may not be used to endorse or promote products derived
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| 23 | * from this software without specific prior written permission.
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| 24 | *
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| 25 | * 4. This software may only be redistributed and used in connection with an
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| 26 | * Atmel microcontroller product.
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| 27 | *
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| 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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| 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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| 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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| 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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| 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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| 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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| 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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| 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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| 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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| 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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| 38 | * POSSIBILITY OF SUCH DAMAGE.
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| 39 | *
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| 40 | * \asf_license_stop
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| 41 | *
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| 42 | */
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| 43 |
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| 44 | #ifndef _SAMD21_PM_INSTANCE_
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| 45 | #define _SAMD21_PM_INSTANCE_
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| 46 |
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| 47 | /* ========== Register definition for PM peripheral ========== */
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| 48 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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| 49 | #define REG_PM_CTRL (0x40000400U) /**< \brief (PM) Control */
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| 50 | #define REG_PM_SLEEP (0x40000401U) /**< \brief (PM) Sleep Mode */
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| 51 | #define REG_PM_CPUSEL (0x40000408U) /**< \brief (PM) CPU Clock Select */
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| 52 | #define REG_PM_APBASEL (0x40000409U) /**< \brief (PM) APBA Clock Select */
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| 53 | #define REG_PM_APBBSEL (0x4000040AU) /**< \brief (PM) APBB Clock Select */
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| 54 | #define REG_PM_APBCSEL (0x4000040BU) /**< \brief (PM) APBC Clock Select */
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| 55 | #define REG_PM_AHBMASK (0x40000414U) /**< \brief (PM) AHB Mask */
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| 56 | #define REG_PM_APBAMASK (0x40000418U) /**< \brief (PM) APBA Mask */
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| 57 | #define REG_PM_APBBMASK (0x4000041CU) /**< \brief (PM) APBB Mask */
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| 58 | #define REG_PM_APBCMASK (0x40000420U) /**< \brief (PM) APBC Mask */
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| 59 | #define REG_PM_INTENCLR (0x40000434U) /**< \brief (PM) Interrupt Enable Clear */
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| 60 | #define REG_PM_INTENSET (0x40000435U) /**< \brief (PM) Interrupt Enable Set */
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| 61 | #define REG_PM_INTFLAG (0x40000436U) /**< \brief (PM) Interrupt Flag Status and Clear */
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| 62 | #define REG_PM_RCAUSE (0x40000438U) /**< \brief (PM) Reset Cause */
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| 63 | #else
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| 64 | #define REG_PM_CTRL (*(RwReg8 *)0x40000400U) /**< \brief (PM) Control */
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| 65 | #define REG_PM_SLEEP (*(RwReg8 *)0x40000401U) /**< \brief (PM) Sleep Mode */
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| 66 | #define REG_PM_CPUSEL (*(RwReg8 *)0x40000408U) /**< \brief (PM) CPU Clock Select */
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| 67 | #define REG_PM_APBASEL (*(RwReg8 *)0x40000409U) /**< \brief (PM) APBA Clock Select */
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| 68 | #define REG_PM_APBBSEL (*(RwReg8 *)0x4000040AU) /**< \brief (PM) APBB Clock Select */
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| 69 | #define REG_PM_APBCSEL (*(RwReg8 *)0x4000040BU) /**< \brief (PM) APBC Clock Select */
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| 70 | #define REG_PM_AHBMASK (*(RwReg *)0x40000414U) /**< \brief (PM) AHB Mask */
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| 71 | #define REG_PM_APBAMASK (*(RwReg *)0x40000418U) /**< \brief (PM) APBA Mask */
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| 72 | #define REG_PM_APBBMASK (*(RwReg *)0x4000041CU) /**< \brief (PM) APBB Mask */
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| 73 | #define REG_PM_APBCMASK (*(RwReg *)0x40000420U) /**< \brief (PM) APBC Mask */
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| 74 | #define REG_PM_INTENCLR (*(RwReg8 *)0x40000434U) /**< \brief (PM) Interrupt Enable Clear */
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| 75 | #define REG_PM_INTENSET (*(RwReg8 *)0x40000435U) /**< \brief (PM) Interrupt Enable Set */
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| 76 | #define REG_PM_INTFLAG (*(RwReg8 *)0x40000436U) /**< \brief (PM) Interrupt Flag Status and Clear */
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| 77 | #define REG_PM_RCAUSE (*(RoReg8 *)0x40000438U) /**< \brief (PM) Reset Cause */
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| 78 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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| 79 |
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| 80 | /* ========== Instance parameters for PM peripheral ========== */
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| 81 | #define PM_CTRL_MCSEL_DFLL48M 3
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| 82 | #define PM_CTRL_MCSEL_GCLK 0
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| 83 | #define PM_CTRL_MCSEL_OSC8M 1
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| 84 | #define PM_CTRL_MCSEL_XOSC 2
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| 85 | #define PM_PM_CLK_APB_NUM 2
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| 86 |
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| 87 | #endif /* _SAMD21_PM_INSTANCE_ */
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