source: rtos_arduino/trunk/arduino_lib/hardware/tools/CMSIS/Device/ATMEL/samd21/include/instance/gclk.h@ 136

Last change on this file since 136 was 136, checked in by ertl-honda, 8 years ago

ライブラリとOS及びベーシックなサンプルの追加．
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1/**
2 * \file
3 *
4 * \brief Instance description for GCLK
5 *
6 * Copyright (c) 2014 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 *
42 */
43
44#ifndef _SAMD21_GCLK_INSTANCE_
45#define _SAMD21_GCLK_INSTANCE_
46
47/* ========== Register definition for GCLK peripheral ========== */
48#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
49#define REG_GCLK_CTRL (0x40000C00U) /**< \brief (GCLK) Control */
50#define REG_GCLK_STATUS (0x40000C01U) /**< \brief (GCLK) Status */
51#define REG_GCLK_CLKCTRL (0x40000C02U) /**< \brief (GCLK) Generic Clock Control */
52#define REG_GCLK_GENCTRL (0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */
53#define REG_GCLK_GENDIV (0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */
54#else
55#define REG_GCLK_CTRL (*(RwReg8 *)0x40000C00U) /**< \brief (GCLK) Control */
56#define REG_GCLK_STATUS (*(RoReg8 *)0x40000C01U) /**< \brief (GCLK) Status */
57#define REG_GCLK_CLKCTRL (*(RwReg16*)0x40000C02U) /**< \brief (GCLK) Generic Clock Control */
58#define REG_GCLK_GENCTRL (*(RwReg *)0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */
59#define REG_GCLK_GENDIV (*(RwReg *)0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */
60#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
61
62/* ========== Instance parameters for GCLK peripheral ========== */
63#define GCLK_GENDIV_BITS 16
64#define GCLK_GEN_NUM 9
65#define GCLK_GEN_NUM_MSB (GCLK_GEN_NUM-1)
66#define GCLK_GEN_SOURCE_NUM_MSB (GCLK_SOURCE_NUM-1)
67#define GCLK_NUM 37
68#define GCLK_SOURCE_DFLL48M 7
69#define GCLK_SOURCE_FDPLL 8
70#define GCLK_SOURCE_GCLKGEN1 2
71#define GCLK_SOURCE_GCLKIN 1
72#define GCLK_SOURCE_NUM 9
73#define GCLK_SOURCE_OSCULP32K 3
74#define GCLK_SOURCE_OSC8M 6
75#define GCLK_SOURCE_OSC32K 4
76#define GCLK_SOURCE_XOSC 0
77#define GCLK_SOURCE_XOSC32K 5
78
79#endif /* _SAMD21_GCLK_INSTANCE_ */
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