[136] | 1 | /**
|
---|
| 2 | * \file
|
---|
| 3 | *
|
---|
| 4 | * \brief Component description for PAC
|
---|
| 5 | *
|
---|
| 6 | * Copyright (c) 2014 Atmel Corporation. All rights reserved.
|
---|
| 7 | *
|
---|
| 8 | * \asf_license_start
|
---|
| 9 | *
|
---|
| 10 | * \page License
|
---|
| 11 | *
|
---|
| 12 | * Redistribution and use in source and binary forms, with or without
|
---|
| 13 | * modification, are permitted provided that the following conditions are met:
|
---|
| 14 | *
|
---|
| 15 | * 1. Redistributions of source code must retain the above copyright notice,
|
---|
| 16 | * this list of conditions and the following disclaimer.
|
---|
| 17 | *
|
---|
| 18 | * 2. Redistributions in binary form must reproduce the above copyright notice,
|
---|
| 19 | * this list of conditions and the following disclaimer in the documentation
|
---|
| 20 | * and/or other materials provided with the distribution.
|
---|
| 21 | *
|
---|
| 22 | * 3. The name of Atmel may not be used to endorse or promote products derived
|
---|
| 23 | * from this software without specific prior written permission.
|
---|
| 24 | *
|
---|
| 25 | * 4. This software may only be redistributed and used in connection with an
|
---|
| 26 | * Atmel microcontroller product.
|
---|
| 27 | *
|
---|
| 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
---|
| 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
---|
| 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
---|
| 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
---|
| 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
---|
| 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
---|
| 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
---|
| 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
---|
| 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
---|
| 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
---|
| 38 | * POSSIBILITY OF SUCH DAMAGE.
|
---|
| 39 | *
|
---|
| 40 | * \asf_license_stop
|
---|
| 41 | *
|
---|
| 42 | */
|
---|
| 43 |
|
---|
| 44 | #ifndef _SAMD21_PAC_COMPONENT_
|
---|
| 45 | #define _SAMD21_PAC_COMPONENT_
|
---|
| 46 |
|
---|
| 47 | /* ========================================================================== */
|
---|
| 48 | /** SOFTWARE API DEFINITION FOR PAC */
|
---|
| 49 | /* ========================================================================== */
|
---|
| 50 | /** \addtogroup SAMD21_PAC Peripheral Access Controller */
|
---|
| 51 | /*@{*/
|
---|
| 52 |
|
---|
| 53 | #define PAC_U2211
|
---|
| 54 | #define REV_PAC 0x101
|
---|
| 55 |
|
---|
| 56 | /* -------- PAC_WPCLR : (PAC Offset: 0x0) (R/W 32) Write Protection Clear -------- */
|
---|
| 57 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
---|
| 58 | typedef union {
|
---|
| 59 | struct {
|
---|
| 60 | uint32_t :1; /*!< bit: 0 Reserved */
|
---|
| 61 | uint32_t WP:31; /*!< bit: 1..31 Write Protection Clear */
|
---|
| 62 | } bit; /*!< Structure used for bit access */
|
---|
| 63 | uint32_t reg; /*!< Type used for register access */
|
---|
| 64 | } PAC_WPCLR_Type;
|
---|
| 65 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
---|
| 66 |
|
---|
| 67 | #define PAC_WPCLR_OFFSET 0x0 /**< \brief (PAC_WPCLR offset) Write Protection Clear */
|
---|
| 68 | #define PAC_WPCLR_RESETVALUE 0x00000000 /**< \brief (PAC_WPCLR reset_value) Write Protection Clear */
|
---|
| 69 |
|
---|
| 70 | #define PAC_WPCLR_WP_Pos 1 /**< \brief (PAC_WPCLR) Write Protection Clear */
|
---|
| 71 | #define PAC_WPCLR_WP_Msk (0x7FFFFFFFu << PAC_WPCLR_WP_Pos)
|
---|
| 72 | #define PAC_WPCLR_WP(value) ((PAC_WPCLR_WP_Msk & ((value) << PAC_WPCLR_WP_Pos)))
|
---|
| 73 | #define PAC_WPCLR_MASK 0xFFFFFFFEu /**< \brief (PAC_WPCLR) MASK Register */
|
---|
| 74 |
|
---|
| 75 | /* -------- PAC_WPSET : (PAC Offset: 0x4) (R/W 32) Write Protection Set -------- */
|
---|
| 76 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
---|
| 77 | typedef union {
|
---|
| 78 | struct {
|
---|
| 79 | uint32_t :1; /*!< bit: 0 Reserved */
|
---|
| 80 | uint32_t WP:31; /*!< bit: 1..31 Write Protection Set */
|
---|
| 81 | } bit; /*!< Structure used for bit access */
|
---|
| 82 | uint32_t reg; /*!< Type used for register access */
|
---|
| 83 | } PAC_WPSET_Type;
|
---|
| 84 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
---|
| 85 |
|
---|
| 86 | #define PAC_WPSET_OFFSET 0x4 /**< \brief (PAC_WPSET offset) Write Protection Set */
|
---|
| 87 | #define PAC_WPSET_RESETVALUE 0x00000000 /**< \brief (PAC_WPSET reset_value) Write Protection Set */
|
---|
| 88 |
|
---|
| 89 | #define PAC_WPSET_WP_Pos 1 /**< \brief (PAC_WPSET) Write Protection Set */
|
---|
| 90 | #define PAC_WPSET_WP_Msk (0x7FFFFFFFu << PAC_WPSET_WP_Pos)
|
---|
| 91 | #define PAC_WPSET_WP(value) ((PAC_WPSET_WP_Msk & ((value) << PAC_WPSET_WP_Pos)))
|
---|
| 92 | #define PAC_WPSET_MASK 0xFFFFFFFEu /**< \brief (PAC_WPSET) MASK Register */
|
---|
| 93 |
|
---|
| 94 | /** \brief PAC hardware registers */
|
---|
| 95 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
---|
| 96 | typedef struct {
|
---|
| 97 | __IO PAC_WPCLR_Type WPCLR; /**< \brief Offset: 0x0 (R/W 32) Write Protection Clear */
|
---|
| 98 | __IO PAC_WPSET_Type WPSET; /**< \brief Offset: 0x4 (R/W 32) Write Protection Set */
|
---|
| 99 | } Pac;
|
---|
| 100 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
---|
| 101 |
|
---|
| 102 | /*@}*/
|
---|
| 103 |
|
---|
| 104 | #endif /* _SAMD21_PAC_COMPONENT_ */
|
---|