1 | <?xml version="1.0" encoding="utf-8"?>
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2 |
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3 | <package schemaVersion="1.0" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
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4 | <name>CMSIS</name>
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5 | <description>Cortex Microcontroller Software Interface Standard (CMSIS) CORE, DSP, RTOS, Driver</description>
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6 | <vendor>ARM</vendor>
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7 | <!-- <license>CMSIS\CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
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8 | <url>http://www.keil.com/pack/</url>
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9 |
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10 | <taxonomy>
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11 | <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
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12 | <description Cclass="CMSIS" doc="CMSIS\Documentation\General\html\index.html">Cortex Microcontroller Software Interface Components</description>
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13 | <description Cclass="Device" doc="CMSIS\Documentation\Core\html\index.html">Startup, System Setup</description>
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14 | <description Cclass="Drivers" doc="CMSIS\Documentation\Driver\html\index.html">Unified Device Drivers</description>
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15 | <description Cclass="File System">File Drive Support and File System</description>
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16 | <description Cclass="Network">Network Stack using IP descriptions</description>
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17 | <description Cclass="USB">Universal Serial Bus Stack</description>
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18 | </taxonomy>
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19 |
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20 | <releases>
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21 | <release version="4.0.0">
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22 | - CMSIS-Driver 2.00 Preliminary (incompatible update)
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23 | - CMSIS-Pack 1.10 Preliminary
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24 | - CMSIS-DSP 1.4.2 (see revision history for details)
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25 | - CMSIS-Core 3.30 (see revision history for details)
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26 | - CMSIS-RTOS RTX 4.74 (see revision history for details)
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27 | - CMSIS-RTOS API 1.02 (unchanged)
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28 | - CMSIS-SVD 1.10 (unchanged)
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29 | </release>
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30 | <release version="3.20.4">
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31 | - CMSIS-RTOS 4.74 (see revision history for details)
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32 | - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
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33 | </release>
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34 | <release version="3.20.3">
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35 | - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
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36 | - CMSIS-RTOS 4.73 (see revision history for details)
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37 | </release>
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38 | <release version="3.20.2">
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39 | - CMSIS-Pack documentation has been added
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40 | - CMSIS-Drivers header and documentation have been added to PACK
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41 | - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
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42 | </release>
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43 | <release version="3.20.1">
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44 | - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
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45 | - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
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46 | </release>
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47 | <release version="3.20.0">
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48 | The software portions that are deployed in the application program are now under a BSD license which allows usage
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49 | of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
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50 | The individual components have been update as listed below:
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51 | - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
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52 | - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
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53 | - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
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54 | - CMSIS-SVD is unchanged.
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55 | </release>
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56 | </releases>
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57 |
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58 | <devices>
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59 | <!-- ****************************** Cortex-M0 ****************************** -->
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60 | <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
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61 | <device Dname="ARMCM0">
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62 | <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
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63 | <compile header="Device\ARM\ARMCM0\Include\ARMCM0.h"/>
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64 | <debug svd="Device\ARM\SVD\ARMCM0.svd"/>
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65 | <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm" start="0x00000000" size="0x00040000" default="1"/>
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66 | <book name="Device\ARM\Documents\cortex_m0_dgug.pdf" title="Cortex-M4 Device Generic Users Guide"/>
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67 |
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68 | <description>
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69 | The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed
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70 | for a broad range of embedded applications. It offers significant benefits to developers,
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71 | including:
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72 | ⢠simple, easy-to-use programmers model
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73 | ⢠highly efficient ultra-low power operation
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74 | ⢠excellent code density
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75 | ⢠deterministic, high-performance interrupt handling
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76 | ⢠upward compatibility with the rest of the Cortex-M processor family.
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77 | </description>
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78 | </device>
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79 | </family>
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80 |
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81 | <!-- ****************************** Cortex-M0P ****************************** -->
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82 | <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
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83 | <device Dname="ARMCM0P">
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84 | <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
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85 | <compile header="Device\ARM\ARMCM0plus\Include\ARMCM0plus.h"/>
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86 | <debug svd="Device\ARM\SVD\ARMCM0P.svd"/>
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87 | <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm" start="0x00000000" size="0x00040000" default="1"/>
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88 | <book name="Device\ARM\Documents\cortex_m0p_dgug.pdf" title="Cortex-M4 Device Generic Users Guide"/>
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89 | <description>
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90 | The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed
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91 | for a broad range of embedded applications. It offers significant benefits to developers,
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92 | including:
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93 | ⢠simple, easy-to-use programmers model
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94 | ⢠highly efficient ultra-low power operation
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95 | ⢠excellent code density
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96 | ⢠deterministic, high-performance interrupt handling
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97 | ⢠upward compatibility with the rest of the Cortex-M processor family.
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98 | </description>
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99 | </device>
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100 | </family>
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101 |
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102 | <!-- ****************************** Cortex-M3 ****************************** -->
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103 | <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
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104 | <device Dname="ARMCM3">
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105 | <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
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106 | <compile header="Device\ARM\ARMCM3\Include\ARMCM3.h"/>
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107 | <debug svd="Device\ARM\SVD\ARMCM3.svd"/>
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108 | <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm" start="0x00000000" size="0x00040000" default="1"/>
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109 | <book name="Device\ARM\Documents\cortex_m3_dgug.pdf" title="Cortex-M3 Device Generic Users Guide"/>
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110 | <description>
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111 | The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed
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112 | for a broad range of embedded applications. It offers significant benefits to developers,
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113 | including:
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114 | ⢠simple, easy-to-use programmers model
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115 | ⢠highly efficient ultra-low power operation
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116 | ⢠excellent code density
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117 | ⢠deterministic, high-performance interrupt handling
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118 | ⢠upward compatibility with the rest of the Cortex-M processor family.
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119 | </description>
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120 | </device>
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121 | </family>
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122 |
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123 | <!-- ****************************** Cortex-M4 ****************************** -->
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124 | <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
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125 | <device Dname="ARMCM4">
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126 | <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
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127 | <compile header="Device\ARM\ARMCM4\Include\ARMCM4.h"/>
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128 | <debug svd="Device\ARM\SVD\ARMCM4.svd"/>
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129 | <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm" start="0x00000000" size="0x00040000" default="1"/>
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130 | <book name="Device\ARM\Documents\cortex_m4_dgug.pdf" title="Cortex-M4 Device Generic Users Guide"/>
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131 | <description>
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132 | The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed
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133 | for a broad range of embedded applications. It offers significant benefits to developers,
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134 | including:
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135 | ⢠simple, easy-to-use programmers model
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136 | ⢠highly efficient ultra-low power operation
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137 | ⢠excellent code density
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138 | ⢠deterministic, high-performance interrupt handling
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139 | ⢠upward compatibility with the rest of the Cortex-M processor family.
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140 | </description>
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141 | </device>
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142 | </family>
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143 |
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144 |
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145 | <!-- ****************************** ARMSC000 ****************************** -->
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146 | <family Dfamily="ARM SC000" Dvendor="ARM:82">
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147 | <device Dname="ARMSC000">
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148 | <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
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149 | <compile header="Device\ARM\ARMSC000\Include\ARMSC000.h"/>
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150 | <debug svd="Device\ARM\SVD\ARMSC000.svd"/>
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151 | <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm" start="0x00000000" size="0x00040000" default="1"/>
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152 | <description>
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153 | The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed
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154 | for a broad range of secure embedded applications. It offers significant benefits to developers,
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155 | including:
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156 | ⢠simple, easy-to-use programmers model
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157 | ⢠highly efficient ultra-low power operation
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158 | ⢠excellent code density
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159 | ⢠deterministic, high-performance interrupt handling
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160 | </description>
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161 | </device>
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162 | </family>
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163 |
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164 |
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165 | <!-- ****************************** ARMSC300 ****************************** -->
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166 | <family Dfamily="ARM SC300" Dvendor="ARM:82">
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167 | <device Dname="ARMSC300">
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168 | <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
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169 | <compile header="Device\ARM\ARMSC300\Include\ARMSC300.h"/>
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170 | <debug svd="Device\ARM\SVD\ARMSC300.svd"/>
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171 | <algorithm name="Device\ARM\Flash\NEW_DEVICE.flm" start="0x00000000" size="0x00040000" default="1"/>
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172 |
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173 | <description>
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174 | The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed
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175 | for a broad range of secure embedded applications. It offers significant benefits to developers,
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176 | including:
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177 | ⢠simple, easy-to-use programmers model
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178 | ⢠highly efficient ultra-low power operation
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179 | ⢠excellent code density
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180 | ⢠deterministic, high-performance interrupt handling
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181 | </description>
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182 | </device>
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183 | </family>
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184 |
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185 | </devices>
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186 |
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187 |
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188 | <apis>
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189 | <!-- CMSIS-RTOS API -->
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190 | <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="0">
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191 | <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
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192 | <files>
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193 | <file category="doc" name="CMSIS\Documentation\RTOS\html\index.html"/>
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194 | </files>
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195 | </api>
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196 | <api Cclass="Drivers" Cgroup="UART" Capiversion="2.00" exclusive="0">
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197 | <description>UART Driver API for Cortex-M</description>
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198 | <files>
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199 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__usart__interface__gr.html" />
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200 | <file category="header" name="CMSIS\Driver\Include\Driver_USART.h" />
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201 | </files>
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202 | </api>
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203 | <api Cclass="Drivers" Cgroup="SPI" Capiversion="2.00" exclusive="0">
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204 | <description>SPI Driver API for Cortex-M</description>
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205 | <files>
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206 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__spi__interface__gr.html" />
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207 | <file category="header" name="CMSIS\Driver\Include\Driver_SPI.h" />
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208 | </files>
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209 | </api>
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210 | <api Cclass="Drivers" Cgroup="I2C" Capiversion="2.00" exclusive="0">
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211 | <description>I2C Driver API for Cortex-M</description>
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212 | <files>
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213 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__i2c__interface__gr.html"/>
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214 | <file category="header" name="CMSIS\Driver\Include\Driver_I2C.h" />
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215 | </files>
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216 | </api>
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217 | <api Cclass="Drivers" Cgroup="MCI" Capiversion="2.00" exclusive="0">
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218 | <description>MCI Driver API for Cortex-M</description>
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219 | <files>
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220 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__mci__interface__gr.html" />
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221 | <file category="header" name="CMSIS\Driver\Include\Driver_MCI.h" />
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222 | </files>
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223 | </api>
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224 | <api Cclass="Drivers" Cgroup="NAND" Capiversion="2.00" exclusive="0">
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225 | <description>NAND Flash Driver API for Cortex-M</description>
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226 | <files>
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227 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__mci__interface__gr.html" />
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228 | <file category="header" name="CMSIS\Driver\Include\Driver_NAND.h" />
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229 | </files>
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230 | </api>
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231 | <api Cclass="Drivers" Cgroup="NOR" Capiversion="2.00" exclusive="0">
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232 | <description>NOR Flash Driver API for Cortex-M</description>
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233 | <files>
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234 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__nor__interface__gr.html" />
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235 | <file category="header" name="CMSIS\Driver\Include\Driver_NOR.h" />
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236 | </files>
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237 | </api>
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238 | <api Cclass="Drivers" Cgroup="Ethernet" Capiversion="2.00" exclusive="0">
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239 | <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
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240 | <files>
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241 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__eth__interface__gr.html" />
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242 | <file category="header" name="CMSIS\Driver\Include\Driver_ETH_MAC.h" />
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243 | <file category="header" name="CMSIS\Driver\Include\Driver_ETH_PHY.h" />
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244 | </files>
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245 | </api>
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246 | <api Cclass="Drivers" Cgroup="Ethernet MAC" Capiversion="2.00" exclusive="0">
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247 | <description>Ethernet MAC Driver API for Cortex-M</description>
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248 | <files>
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249 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__eth__mac__interface__gr.html" />
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250 | <file category="header" name="CMSIS\Driver\Include\Driver_ETH_MAC.h" />
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251 | </files>
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252 | </api>
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253 | <api Cclass="Drivers" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
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254 | <description>Ethernet PHY Driver API for Cortex-M</description>
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255 | <files>
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256 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__eth__phy__interface__gr.html" />
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257 | <file category="header" name="CMSIS\Driver\Include\Driver_ETH_PHY.h" />
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258 | </files>
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259 | </api>
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260 | <api Cclass="Drivers" Cgroup="USB Device" Capiversion="2.00" exclusive="0">
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261 | <description>USB Device Driver API for Cortex-M</description>
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262 | <files>
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263 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__usbd__interface__gr.html" />
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264 | <file category="header" name="CMSIS\Driver\Include\Driver_USBD.h" />
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265 | </files>
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266 | </api>
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267 | <api Cclass="Drivers" Cgroup="USB Host" Capiversion="2.00" exclusive="0">
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268 | <description>USB Host Driver API for Cortex-M</description>
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269 | <files>
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270 | <file category="doc" name="CMSIS\Documentation\Driver\html\group__usbh__interface__gr.html" />
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271 | <file category="header" name="CMSIS\Driver\Include\Driver_USBH.h" />
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272 | </files>
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273 | </api>
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274 | </apis>
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275 |
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276 | <!-- conditions are dependency rules that can apply to a component or an individual file -->
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277 | <conditions>
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278 | <condition id="Is ARM Compiler">
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279 | <require Tcompiler="ARMCC"/>
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280 | </condition>
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281 |
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282 | <condition id="Cortex-M Device">
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283 | <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, SC000, SC3000</description>
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284 | <accept Dcore="Cortex-M0"/>
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285 | <accept Dcore="Cortex-M0+"/>
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286 | <accept Dcore="Cortex-M3"/>
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287 | <accept Dcore="Cortex-M4"/>
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288 | <accept Dcore="SC000"/>
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289 | <accept Dcore="SC300"/>
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290 | </condition>
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291 |
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292 | <condition id="Cortex-M CMSIS Device">
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293 | <description>ARM Cortex-M device</description>
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294 | <accept Dname="ARMCM0"/>
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295 | <accept Dname="ARMCM0+"/>
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296 | <accept Dname="ARMCM3"/>
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297 | <accept Dname="ARMCM4"/>
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298 | <accept Dname="ARMSC000"/>
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299 | <accept Dname="ARMSC300"/>
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300 | </condition>
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301 |
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302 | <condition id="CMSIS Core">
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303 | <description>CMSIS CORE processor and device specific Startup files</description>
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304 | <require condition="Cortex-M Device"/>
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305 | <require Cclass="Device" Cgroup="Startup"/>
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306 | </condition>
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307 |
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308 | <condition id="ARMCM0">
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309 | <!-- conditions selecting Devices -->
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310 | <description>Generic ARM Cortex-M0 device</description>
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311 | <require Dvendor="ARM:82" Dname="ARMCM0"/>
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312 | </condition>
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313 |
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314 | <condition id="ARMCM0+">
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315 | <description>Generic ARM Cortex-M0+ device</description>
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316 | <require Dvendor="ARM:82" Dname="ARMCM0P"/>
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317 | </condition>
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318 |
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319 | <condition id="ARMCM3">
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320 | <description>Generic ARM Cortex-M3 device</description>
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321 | <require Dvendor="ARM:82" Dname="ARMCM3"/>
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322 | </condition>
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323 |
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324 | <condition id="ARMCM4">
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325 | <description>Generic ARM Cortex-M4 device</description>
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326 | <require Dvendor="ARM:82" Dname="ARMCM4"/>
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327 | </condition>
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328 |
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329 | <condition id="ARMSC000">
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330 | <description>Generic ARM SC000 device</description>
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331 | <require Dvendor="ARM:82" Dname="ARMSC000"/>
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332 | </condition>
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333 |
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334 | <condition id="ARMSC300">
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335 | <description>Generic ARM SC300 device</description>
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336 | <require Dvendor="ARM:82" Dname="ARMSC300"/>
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337 | </condition>
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338 |
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339 | <condition id="CMSIS DSP">
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340 | <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC, G++ or IAR</description>
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341 | <require condition="Cortex-M Device"/>
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342 | <accept Tcompiler="GCC"/>
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343 | <accept Tcompiler="G++"/>
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344 | <accept Tcompiler="ARMCC"/>
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345 | <accept Tcompiler="IAR"/>
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346 | </condition>
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347 |
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348 | <condition id="CM0_LE_ARMCC">
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349 | <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
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350 | <accept Dcore="Cortex-M0"/>
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351 | <accept Dcore="Cortex-M0+"/>
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352 | <accept Dcore="SC000"/>
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353 | <require Dendian="Little-endian"/>
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354 | <require Tcompiler="ARMCC"/>
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355 | </condition>
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356 |
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357 | <condition id="CM0_BE_ARMCC">
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358 | <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
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359 | <accept Dcore="Cortex-M0"/>
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360 | <accept Dcore="Cortex-M0+"/>
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361 | <accept Dcore="SC000"/>
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362 | <require Dendian="Big-endian"/>
|
---|
363 | <require Tcompiler="ARMCC"/>
|
---|
364 | </condition>
|
---|
365 |
|
---|
366 | <condition id="CM3_LE_ARMCC">
|
---|
367 | <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
|
---|
368 | <accept Dcore="Cortex-M3"/>
|
---|
369 | <accept Dcore="SC300"/>
|
---|
370 | <require Dendian="Little-endian"/>
|
---|
371 | <require Tcompiler="ARMCC"/>
|
---|
372 | </condition>
|
---|
373 |
|
---|
374 | <condition id="CM3_BE_ARMCC">
|
---|
375 | <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
|
---|
376 | <accept Dcore="Cortex-M3"/>
|
---|
377 | <accept Dcore="SC300"/>
|
---|
378 | <require Dendian="Big-endian"/>
|
---|
379 | <require Tcompiler="ARMCC"/>
|
---|
380 | </condition>
|
---|
381 |
|
---|
382 | <condition id="CM4_LE_ARMCC">
|
---|
383 | <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
|
---|
384 | <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
|
---|
385 | <require Tcompiler="ARMCC"/>
|
---|
386 | </condition>
|
---|
387 |
|
---|
388 | <condition id="CM4_BE_ARMCC">
|
---|
389 | <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
|
---|
390 | <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
|
---|
391 | <require Tcompiler="ARMCC"/>
|
---|
392 | </condition>
|
---|
393 |
|
---|
394 | <condition id="CM4F_LE_ARMCC">
|
---|
395 | <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
|
---|
396 | <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
|
---|
397 | <deny Dvendor="Infineon:7" Dname="XMC4*"/>
|
---|
398 | <require Tcompiler="ARMCC"/>
|
---|
399 | </condition>
|
---|
400 |
|
---|
401 | <!-- XMC 4000 Series devices from Infineon require a special library -->
|
---|
402 | <condition id="CM4F_LE_ARMCC_IFX">
|
---|
403 | <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
|
---|
404 | <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
|
---|
405 | <require Tcompiler="ARMCC"/>
|
---|
406 | </condition>
|
---|
407 |
|
---|
408 | <condition id="CM4F_BE_ARMCC">
|
---|
409 | <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
|
---|
410 | <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
|
---|
411 | <require Tcompiler="ARMCC"/>
|
---|
412 | </condition>
|
---|
413 |
|
---|
414 | <condition id="CM0_LE_GCC">
|
---|
415 | <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
|
---|
416 | <accept Dcore="Cortex-M0"/>
|
---|
417 | <accept Dcore="Cortex-M0+"/>
|
---|
418 | <accept Dcore="SC000"/>
|
---|
419 | <require Dendian="Little-endian"/>
|
---|
420 | <require Tcompiler="GCC"/>
|
---|
421 | </condition>
|
---|
422 |
|
---|
423 | <condition id="CM3_LE_GCC">
|
---|
424 | <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
|
---|
425 | <accept Dcore="Cortex-M3"/>
|
---|
426 | <accept Dcore="SC300"/>
|
---|
427 | <require Dendian="Little-endian"/>
|
---|
428 | <require Tcompiler="GCC"/>
|
---|
429 | </condition>
|
---|
430 |
|
---|
431 | <condition id="CM4_LE_GCC">
|
---|
432 | <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
|
---|
433 | <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
|
---|
434 | <require Tcompiler="GCC"/>
|
---|
435 | </condition>
|
---|
436 |
|
---|
437 | <condition id="CM4F_LE_GCC">
|
---|
438 | <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
|
---|
439 | <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
|
---|
440 | <deny Dvendor="Infineon:7" Dname="XMC4*"/>
|
---|
441 | <require Tcompiler="GCC"/>
|
---|
442 | </condition>
|
---|
443 |
|
---|
444 | <!-- XMC 4000 Series devices from Infineon require a special library -->
|
---|
445 | <condition id="CM4F_LE_GCC_IFX">
|
---|
446 | <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler and Infineon devices</description>
|
---|
447 | <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
|
---|
448 | <require Tcompiler="GCC"/>
|
---|
449 | </condition>
|
---|
450 |
|
---|
451 | <!-- G++ compiler -->
|
---|
452 | <condition id="CM0_LE_G++">
|
---|
453 | <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the G++ Compiler</description>
|
---|
454 | <accept Dcore="Cortex-M0"/>
|
---|
455 | <accept Dcore="Cortex-M0+"/>
|
---|
456 | <accept Dcore="SC000"/>
|
---|
457 | <require Dendian="Little-endian"/>
|
---|
458 | <require Tcompiler="G++"/>
|
---|
459 | </condition>
|
---|
460 |
|
---|
461 | <condition id="CM3_LE_G++">
|
---|
462 | <description>Cortex-M3 or SC300 processor based device in little endian mode for the G++ Compiler</description>
|
---|
463 | <accept Dcore="Cortex-M3"/>
|
---|
464 | <accept Dcore="SC300"/>
|
---|
465 | <require Dendian="Little-endian"/>
|
---|
466 | <require Tcompiler="G++"/>
|
---|
467 | </condition>
|
---|
468 |
|
---|
469 | <condition id="CM4_LE_G++">
|
---|
470 | <description>Cortex-M4 processor based device in little endian mode for the G++ Compiler</description>
|
---|
471 | <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
|
---|
472 | <require Tcompiler="G++"/>
|
---|
473 | </condition>
|
---|
474 |
|
---|
475 | <condition id="CM4F_LE_G++">
|
---|
476 | <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the G++ Compiler</description>
|
---|
477 | <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
|
---|
478 | <require Tcompiler="G++"/>
|
---|
479 | </condition>
|
---|
480 |
|
---|
481 | <condition id="CM0_LE_IAR">
|
---|
482 | <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
|
---|
483 | <accept Dcore="Cortex-M0"/>
|
---|
484 | <accept Dcore="Cortex-M0+"/>
|
---|
485 | <accept Dcore="SC000"/>
|
---|
486 | <require Dendian="Little-endian"/>
|
---|
487 | <require Tcompiler="IAR"/>
|
---|
488 | </condition>
|
---|
489 |
|
---|
490 | <condition id="CM0_BE_IAR">
|
---|
491 | <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
|
---|
492 | <accept Dcore="Cortex-M0"/>
|
---|
493 | <accept Dcore="Cortex-M0+"/>
|
---|
494 | <accept Dcore="SC000"/>
|
---|
495 | <require Dendian="Big-endian"/>
|
---|
496 | <require Tcompiler="IAR"/>
|
---|
497 | </condition>
|
---|
498 |
|
---|
499 | <condition id="CM3_LE_IAR">
|
---|
500 | <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
|
---|
501 | <accept Dcore="Cortex-M3"/>
|
---|
502 | <accept Dcore="SC300"/>
|
---|
503 | <require Dendian="Little-endian"/>
|
---|
504 | <require Tcompiler="IAR"/>
|
---|
505 | </condition>
|
---|
506 |
|
---|
507 | <condition id="CM3_BE_IAR">
|
---|
508 | <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
|
---|
509 | <accept Dcore="Cortex-M3"/>
|
---|
510 | <accept Dcore="SC300"/>
|
---|
511 | <require Dendian="Big-endian"/>
|
---|
512 | <require Tcompiler="IAR"/>
|
---|
513 | </condition>
|
---|
514 |
|
---|
515 | <condition id="CM4_LE_IAR">
|
---|
516 | <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
|
---|
517 | <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
|
---|
518 | <require Tcompiler="IAR"/>
|
---|
519 | </condition>
|
---|
520 |
|
---|
521 | <condition id="CM4_BE_IAR">
|
---|
522 | <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
|
---|
523 | <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
|
---|
524 | <require Tcompiler="IAR"/>
|
---|
525 | </condition>
|
---|
526 |
|
---|
527 | <condition id="CM4F_LE_IAR">
|
---|
528 | <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
|
---|
529 | <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
|
---|
530 | <require Tcompiler="IAR"/>
|
---|
531 | </condition>
|
---|
532 |
|
---|
533 | <condition id="CM4F_BE_IAR">
|
---|
534 | <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
|
---|
535 | <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
|
---|
536 | <require Tcompiler="IAR"/>
|
---|
537 | </condition>
|
---|
538 | </conditions>
|
---|
539 |
|
---|
540 | <components>
|
---|
541 | <!-- CMSIS-Core component -->
|
---|
542 | <component Cclass="CMSIS" Cgroup="CORE" Cversion="3.30.0" condition="CMSIS Core">
|
---|
543 | <description>CMSIS-CORE for Cortex-M, SC000, and SC300</description>
|
---|
544 | <files>
|
---|
545 | <!-- RTX templates -->
|
---|
546 | <file category="source" attr="template" name="CMSIS\UserCodeTemplates\ITM_Retarget.c" select="CMSIS-CORE 'ITM Printf Debug'" condition="Is ARM Compiler"/>
|
---|
547 | <!-- CPU independent -->
|
---|
548 | <file category="doc" name="CMSIS\Documentation\Core\html\index.html"/>
|
---|
549 | <file category="include" name="CMSIS\Include\"/>
|
---|
550 | </files>
|
---|
551 | </component>
|
---|
552 |
|
---|
553 | <!-- CMSIS-Startup component -->
|
---|
554 | <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="Cortex-M CMSIS Device">
|
---|
555 | <!-- Cversion is necessary -->
|
---|
556 | <description>System and Startup for Generic ARM Cortex-Mx devices</description>
|
---|
557 | <files>
|
---|
558 | <!-- include folder -->
|
---|
559 | <file category="header" name="Device\ARM\ARMCM0\Include\ARMCM0.h" condition="ARMCM0"/>
|
---|
560 | <file category="header" name="Device\ARM\ARMCM0plus\Include\ARMCM0plus.h" condition="ARMCM0+"/>
|
---|
561 | <file category="header" name="Device\ARM\ARMCM3\Include\ARMCM3.h" condition="ARMCM3"/>
|
---|
562 | <file category="header" name="Device\ARM\ARMCM4\Include\ARMCM4.h" condition="ARMCM4"/>
|
---|
563 | <file category="header" name="Device\ARM\ARMSC000\Include\ARMSC000.h" condition="ARMSC000"/>
|
---|
564 | <file category="header" name="Device\ARM\ARMSC300\Include\ARMSC300.h" condition="ARMSC300"/>
|
---|
565 |
|
---|
566 | <!-- include path for system header not required, as the device header is specified for device -->
|
---|
567 | <!-- startup files -->
|
---|
568 | <file category="source" name="Device\ARM\ARMCM0\Source\ARM\startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCM0"/>
|
---|
569 | <file category="source" name="Device\ARM\ARMCM0plus\Source\ARM\startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCM0+"/>
|
---|
570 | <file category="source" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCM3"/>
|
---|
571 | <file category="source" name="Device\ARM\ARMCM4\Source\ARM\startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCM4"/>
|
---|
572 | <file category="source" name="Device\ARM\ARMSC000\Source\ARM\startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMSC000"/>
|
---|
573 | <file category="source" name="Device\ARM\ARMSC300\Source\ARM\startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMSC300"/>
|
---|
574 |
|
---|
575 | <!-- system file -->
|
---|
576 | <file category="source" name="Device\ARM\ARMCM0\Source\system_ARMCM0.c" version="1.0.0" attr="config" condition="ARMCM0"/>
|
---|
577 | <file category="source" name="Device\ARM\ARMCM0plus\Source\system_ARMCM0plus.c" version="1.0.0" attr="config" condition="ARMCM0+"/>
|
---|
578 | <file category="source" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.0" attr="config" condition="ARMCM3"/>
|
---|
579 | <file category="source" name="Device\ARM\ARMCM4\Source\system_ARMCM4.c" version="1.0.0" attr="config" condition="ARMCM4"/>
|
---|
580 | <file category="source" name="Device\ARM\ARMSC000\Source\system_ARMSC000.c" version="1.0.0" attr="config" condition="ARMSC000"/>
|
---|
581 | <file category="source" name="Device\ARM\ARMSC300\Source\system_ARMSC300.c" version="1.0.0" attr="config" condition="ARMSC300"/>
|
---|
582 | </files>
|
---|
583 | </component>
|
---|
584 |
|
---|
585 |
|
---|
586 | <!-- CMSIS-DSP component -->
|
---|
587 | <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.2" condition="CMSIS DSP">
|
---|
588 | <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
|
---|
589 | <files>
|
---|
590 | <!-- CPU independent -->
|
---|
591 | <file category="doc" name="CMSIS\Documentation\DSP\html\index.html"/>
|
---|
592 | <!-- <file category="header" name="CMSIS\Include\arm_common_tables.h"/> -->
|
---|
593 | <file category="header" name="CMSIS\Include\arm_math.h"/>
|
---|
594 | <!-- CPU and Compiler dependent -->
|
---|
595 | <!-- ARMCC -->
|
---|
596 | <file category="library" condition="CM0_LE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM0l_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
|
---|
597 | <file category="library" condition="CM0_BE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM0b_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
|
---|
598 | <file category="library" condition="CM3_LE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM3l_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
|
---|
599 | <file category="library" condition="CM3_BE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM3b_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
|
---|
600 | <file category="library" condition="CM4_LE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM4l_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
|
---|
601 | <file category="library" condition="CM4_BE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM4b_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
|
---|
602 | <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM4lf_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
|
---|
603 | <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS\Lib\ARM\arm_cortexM4bf_math.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
|
---|
604 |
|
---|
605 | <!-- GCC -->
|
---|
606 | <file category="library" condition="CM0_LE_GCC" name="CMSIS\Lib\GCC\libarm_cortexM0l_math.a" src="CMSIS\DSP_Lib\Source\GCC"/>
|
---|
607 | <file category="library" condition="CM3_LE_GCC" name="CMSIS\Lib\GCC\libarm_cortexM3l_math.a" src="CMSIS\DSP_Lib\Source\GCC"/>
|
---|
608 | <file category="library" condition="CM4_LE_GCC" name="CMSIS\Lib\GCC\libarm_cortexM4l_math.a" src="CMSIS\DSP_Lib\Source\GCC"/>
|
---|
609 | <file category="library" condition="CM4F_LE_GCC" name="CMSIS\Lib\GCC\libarm_cortexM4lf_math.a" src="CMSIS\DSP_Lib\Source\GCC"/>
|
---|
610 | <!-- G++ -->
|
---|
611 | <file category="library" condition="CM0_LE_G++" name="CMSIS\Lib\G++\libarm_cortexM0l_math.a" src="CMSIS\DSP_Lib\Source\G++"/>
|
---|
612 | <file category="library" condition="CM3_LE_G++" name="CMSIS\Lib\G++\libarm_cortexM3l_math.a" src="CMSIS\DSP_Lib\Source\G++"/>
|
---|
613 | <file category="library" condition="CM4_LE_G++" name="CMSIS\Lib\G++\libarm_cortexM4l_math.a" src="CMSIS\DSP_Lib\Source\G++"/>
|
---|
614 | <file category="library" condition="CM4F_LE_G++" name="CMSIS\Lib\G++\libarm_cortexM4lf_math.a" src="CMSIS\DSP_Lib\Source\G++"/>
|
---|
615 | </files>
|
---|
616 | </component>
|
---|
617 |
|
---|
618 | <!-- CMSIS-RTOS Keil RTX component -->
|
---|
619 | <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.74.0" condition="CMSIS Core">
|
---|
620 | <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
|
---|
621 | <RTE_Components_h>
|
---|
622 | <!-- the following content goes into file 'RTE_Components.h' -->
|
---|
623 | #define RTE_RTOS_RTX /* CMSIS-RTOS Keil RTX */
|
---|
624 | </RTE_Components_h>
|
---|
625 | <files>
|
---|
626 | <!-- CPU independent -->
|
---|
627 | <file category="doc" name="CMSIS_RTX\Doc\index.html"/>
|
---|
628 | <file category="header" name="CMSIS_RTX\INC\cmsis_os.h"/>
|
---|
629 | <file category="source" attr="config" name="CMSIS_RTX\Templates\RTX_Conf_CM.c" version="4.70"/>
|
---|
630 |
|
---|
631 | <!-- RTX templates -->
|
---|
632 | <file category="header" attr="template" name="CMSIS_RTX\UserCodeTemplates\osObjects.h" select="CMSIS-RTOS 'main' function"/>
|
---|
633 | <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\main.c" select="CMSIS-RTOS 'main' function"/>
|
---|
634 | <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
|
---|
635 | <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\MemPool.c" select="CMSIS-RTOS Memory Pool"/>
|
---|
636 | <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
|
---|
637 | <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\Mutex.c" select="CMSIS-RTOS Mutex"/>
|
---|
638 | <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\Semaphore.c" select="CMSIS-RTOS Semaphore"/>
|
---|
639 | <file category="source" attr="template" name="CMSIS_RTX\UserCodeTemplates\Thread.c" select="CMSIS-RTOS Thread"/>
|
---|
640 |
|
---|
641 | <!-- CPU and Compiler dependent -->
|
---|
642 | <!-- ARMCC -->
|
---|
643 | <file category="library" condition="CM0_LE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM0.lib" src="CMSIS_RTX\SRC\ARM"/>
|
---|
644 | <file category="library" condition="CM0_BE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM0_B.lib" src="CMSIS_RTX\SRC\ARM"/>
|
---|
645 | <file category="library" condition="CM3_LE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM3.lib" src="CMSIS_RTX\SRC\ARM"/>
|
---|
646 | <file category="library" condition="CM3_BE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM3_B.lib" src="CMSIS_RTX\SRC\ARM"/>
|
---|
647 | <file category="library" condition="CM4_LE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM3.lib" src="CMSIS_RTX\SRC\ARM"/>
|
---|
648 | <file category="library" condition="CM4_BE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM3_B.lib" src="CMSIS_RTX\SRC\ARM"/>
|
---|
649 | <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM4.lib" src="CMSIS_RTX\SRC\ARM"/>
|
---|
650 | <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS_RTX\Lib\ARM\RTX_CM4_B.lib" src="CMSIS_RTX\SRC\ARM"/>
|
---|
651 | <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS_RTX\Lib\ARM\RTX_CM4_IFX.lib" src="CMSIS\DSP_Lib\Source\ARM"/>
|
---|
652 | <!-- GCC -->
|
---|
653 | <file category="library" condition="CM0_LE_GCC" name="CMSIS_RTX\Lib\GCC\libRTX_CM0.a" src="CMSIS_RTX\SRC\GCC"/>
|
---|
654 | <file category="library" condition="CM3_LE_GCC" name="CMSIS_RTX\Lib\GCC\libRTX_CM3.a" src="CMSIS_RTX\SRC\GCC"/>
|
---|
655 | <file category="library" condition="CM4_LE_GCC" name="CMSIS_RTX\Lib\GCC\libRTX_CM3.a" src="CMSIS_RTX\SRC\GCC"/>
|
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656 | <file category="library" condition="CM4F_LE_GCC" name="CMSIS_RTX\Lib\GCC\libRTX_CM4.a" src="CMSIS_RTX\SRC\GCC"/>
|
---|
657 | <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS_RTX\Lib\GCC\libRTX_CM4_IFX.a" src="CMSIS\DSP_Lib\Source\GCC"/>
|
---|
658 | <!-- IAR -->
|
---|
659 | <file category="library" condition="CM0_LE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM0.a" src="CMSIS_RTX\SRC\IAR"/>
|
---|
660 | <file category="library" condition="CM0_BE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM0_B.a" src="CMSIS_RTX\SRC\IAR"/>
|
---|
661 | <file category="library" condition="CM3_LE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM3.a" src="CMSIS_RTX\SRC\IAR"/>
|
---|
662 | <file category="library" condition="CM3_BE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM3_B.a" src="CMSIS_RTX\SRC\IAR"/>
|
---|
663 | <file category="library" condition="CM4_LE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM3.a" src="CMSIS_RTX\SRC\IAR"/>
|
---|
664 | <file category="library" condition="CM4_BE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM3_B.a" src="CMSIS_RTX\SRC\IAR"/>
|
---|
665 | <file category="library" condition="CM4F_LE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM4.a" src="CMSIS_RTX\SRC\IAR"/>
|
---|
666 | <file category="library" condition="CM4F_BE_IAR" name="CMSIS_RTX\Lib\IAR\RTX_CM4_B.a" src="CMSIS_RTX\SRC\IAR"/>
|
---|
667 | </files>
|
---|
668 | </component>
|
---|
669 | </components>
|
---|
670 | </package>
|
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