[136] | 1 | /*
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| 2 | Copyright (c) 2014 Arduino. All right reserved.
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| 3 |
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| 4 | This library is free software; you can redistribute it and/or
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| 5 | modify it under the terms of the GNU Lesser General Public
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| 6 | License as published by the Free Software Foundation; either
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| 7 | version 2.1 of the License, or (at your option) any later version.
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| 8 |
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| 9 | This library is distributed in the hope that it will be useful,
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| 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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| 12 | See the GNU Lesser General Public License for more details.
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| 13 |
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| 14 | You should have received a copy of the GNU Lesser General Public
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| 15 | License along with this library; if not, write to the Free Software
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| 16 | Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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| 17 | */
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| 18 |
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| 19 | //
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| 20 |
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| 21 | #include "wiring_analog.h"
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| 22 | #include "wiring_digital.h"
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| 23 |
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| 24 | #ifdef __cplusplus
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| 25 | extern "C" {
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| 26 | #endif
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| 27 |
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| 28 | static int _readResolution = 10;
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| 29 | static int _writeResolution = 10;
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| 30 | static int ADC_RESOLUTION = 12;
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| 31 | static int DAC_RESOLUTION = 10;
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| 32 |
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[137] | 33 | // Wait for synchronization of registers between the clock domains
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| 34 | static __inline__ void syncDAC() __attribute__((always_inline, unused));
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| 35 | static void syncDAC() {
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| 36 | while (DAC->STATUS.bit.SYNCBUSY == 1)
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| 37 | ;
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| 38 | }
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| 39 |
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[136] | 40 | void analogReadResolution(int res) {
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| 41 | _readResolution = res;
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| 42 | while( ADC->STATUS.bit.SYNCBUSY == 1 )
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| 43 | {
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| 44 | // Waiting for synchroinization
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| 45 | }
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| 46 | if(res == 8) ADC->CTRLB.bit.RESSEL= ADC_CTRLB_RESSEL_8BIT_Val;
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| 47 | else if(res == 10) ADC->CTRLB.bit.RESSEL= ADC_CTRLB_RESSEL_10BIT_Val;
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| 48 | else ADC->CTRLB.bit.RESSEL= ADC_CTRLB_RESSEL_12BIT_Val;
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| 49 | }
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| 50 |
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| 51 | void analogWriteResolution(int res) {
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| 52 | _writeResolution = res;
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| 53 | }
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| 54 |
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| 55 | static inline uint32_t mapResolution(uint32_t value, uint32_t from, uint32_t to) {
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| 56 | if (from == to)
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| 57 | return value;
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| 58 | if (from > to)
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| 59 | return value >> (from-to);
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| 60 | else
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| 61 | return value << (to-from);
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| 62 | }
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| 63 |
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| 64 | void analogReference( eAnalogReference ulMode )
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| 65 | {
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| 66 |
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| 67 | // ATTENTION : On this board the default is not 5volts or 3.3volts BUT 1.65 volt
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| 68 |
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| 69 |
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| 70 |
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| 71 | ADC->CTRLA.bit.ENABLE = 0; // Enable ADC
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| 72 | while( ADC->STATUS.bit.SYNCBUSY == 1 )
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| 73 | {
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| 74 | // Waiting for synchroinization
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| 75 | }
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| 76 | switch(ulMode)
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| 77 | {
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| 78 | case AR_DEFAULT:
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| 79 | //default:
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| 80 |
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| 81 | ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_DIV2_Val;
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| 82 | ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val;
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| 83 | break;
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| 84 | case AR_INTERNAL:
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| 85 | ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val;
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| 86 | ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INT1V_Val;
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| 87 | break;
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| 88 |
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| 89 | case AR_EXTERNAL:
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| 90 | ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val;
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| 91 | ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_AREFA_Val;
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| 92 | break;
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| 93 | }ADC->CTRLA.bit.ENABLE = 1; // Enable ADC
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| 94 | while( ADC->STATUS.bit.SYNCBUSY == 1 )
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| 95 | {
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| 96 | // Waiting for synchroinization
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| 97 | }
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| 98 | }
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| 99 |
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| 100 | uint32_t analogRead( uint32_t ulPin )
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| 101 | {
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| 102 | uint32_t valueRead = 0;
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| 103 | pinPeripheral(ulPin, g_APinDescription[ulPin].ulPinType);
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| 104 | if ( ulPin == 24 ) // Only 1 DAC on A0 (PA02)
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| 105 | {
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| 106 | DAC->CTRLA.bit.ENABLE = 0; //disable DAC on A0
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| 107 | }
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| 108 |
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| 109 | ADC->INPUTCTRL.bit.MUXPOS = g_APinDescription[ulPin].ulADCChannelNumber;
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| 110 |
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| 111 | // Start conversion
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| 112 | ADC->SWTRIG.bit.START = 1;
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| 113 |
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| 114 | while( ADC->INTFLAG.bit.RESRDY == 0 || ADC->STATUS.bit.SYNCBUSY == 1 )
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| 115 | {
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| 116 | // Waiting for a complete conversion and complete synchronization
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| 117 | }
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| 118 |
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| 119 | // Store the value
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| 120 | valueRead = ADC->RESULT.reg;
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| 121 |
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| 122 | // Clear the Data Ready flag
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| 123 | ADC->INTFLAG.bit.RESRDY = 1;
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| 124 |
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| 125 | // Flush the ADC for further conversions
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| 126 | // ADC->SWTRIG.bit.FLUSH = 1;
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| 127 |
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| 128 | while( ADC->STATUS.bit.SYNCBUSY == 1 || ADC->SWTRIG.bit.FLUSH == 1 )
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| 129 | {
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| 130 | // Waiting for synchronization
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| 131 | }
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| 132 |
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| 133 | //valueRead = mapResolution(valueRead, ADC_RESOLUTION, _readResolution);
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| 134 | return valueRead;
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| 135 |
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| 136 | }
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| 137 |
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| 138 |
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| 139 | // Right now, PWM output only works on the pins with
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| 140 | // hardware support. These are defined in the appropriate
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| 141 | // pins_*.c file. For the rest of the pins, we default
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| 142 | // to digital output.
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| 143 | void analogWrite( uint32_t ulPin, uint32_t ulValue )
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| 144 | {
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| 145 | uint32_t attr = g_APinDescription[ulPin].ulPinAttribute ;
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| 146 | // uint32_t pwm_name = g_APinDescription[ulPin].ulTCChannel ;
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| 147 | uint8_t isTC = 0 ;
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| 148 | uint8_t Channelx ;
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| 149 | Tc* TCx ;
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| 150 | Tcc* TCCx ;
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| 151 |
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| 152 | if ( (attr & PIN_ATTR_ANALOG) == PIN_ATTR_ANALOG )
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| 153 | {
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| 154 | if ( ulPin == 24 ) // Only 1 DAC on A0 (PA02)
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| 155 | {
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| 156 | ulValue = mapResolution(ulValue, _writeResolution, DAC_RESOLUTION);
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| 157 | DAC->DATA.reg = ulValue & 0x3FF; // Dac on 10 bits.
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| 158 | DAC->CTRLA.bit.ENABLE = 1; // DAC Enabled
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| 159 | syncDAC();
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| 160 | return;
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| 161 | }
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| 162 |
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| 163 |
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| 164 | }
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| 165 |
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| 166 | if ( (attr & PIN_ATTR_PWM) == PIN_ATTR_PWM )
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| 167 | {
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| 168 | if ( (g_APinDescription[ulPin].ulPinType == PIO_TIMER) || g_APinDescription[ulPin].ulPinType == PIO_TIMER_ALT )
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| 169 | {
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| 170 | pinPeripheral( ulPin, g_APinDescription[ulPin].ulPinType ) ;
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| 171 | }
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| 172 |
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| 173 | switch ( g_APinDescription[ulPin].ulPWMChannel )
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| 174 | {
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| 175 | case PWM3_CH0 :
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| 176 | TCx = TC3 ;
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| 177 | Channelx = 0 ;
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| 178 | isTC = 1 ;
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| 179 | break;
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| 180 |
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| 181 | case PWM3_CH1:
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| 182 | TCx = TC3 ;
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| 183 | Channelx = 1;
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| 184 | isTC = 1;
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| 185 | break;
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| 186 |
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| 187 | case PWM0_CH0 :
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| 188 | TCCx = TCC0;
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| 189 | Channelx = 0;
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| 190 | break;
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| 191 |
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| 192 | case PWM0_CH1 :
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| 193 | TCCx = TCC0;
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| 194 | Channelx = 1;
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| 195 | break;
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| 196 |
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| 197 | case PWM0_CH4 :
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| 198 | TCCx = TCC0;
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| 199 | Channelx = 0;
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| 200 | break;
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| 201 |
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| 202 | case PWM0_CH5 :
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| 203 | TCCx = TCC0;
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| 204 | Channelx = 1;
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| 205 | break;
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| 206 |
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| 207 | case PWM0_CH6 :
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| 208 | TCCx = TCC0;
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| 209 | Channelx = 2;
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| 210 | break;
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| 211 |
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| 212 | case PWM0_CH7 :
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| 213 | TCCx = TCC0;
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| 214 | Channelx = 3;
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| 215 | break;
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| 216 |
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| 217 | case PWM1_CH0 :
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| 218 | TCCx = TCC1;
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| 219 | Channelx = 0;
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| 220 | break;
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| 221 |
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| 222 | case PWM1_CH1 :
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| 223 | TCCx = TCC1;
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| 224 | Channelx = 1;
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| 225 | break;
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| 226 |
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| 227 | case PWM2_CH0 :
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| 228 | TCCx = TCC2;
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| 229 | Channelx = 0;
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| 230 | break;
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| 231 |
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| 232 | case PWM2_CH1 :
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| 233 | TCCx = TCC2;
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| 234 | Channelx = 1;
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| 235 | break;
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| 236 | }
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| 237 |
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| 238 |
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| 239 | // Enable clocks according to TCCx instance to use
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| 240 | switch ( GetTCNumber( g_APinDescription[ulPin].ulPWMChannel ) )
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| 241 | {
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| 242 | case 0: // TCC0
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| 243 | //Enable GCLK for TCC0 (timer counter input clock)
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| 244 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC0_TCC1 )) ;
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| 245 | break;
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| 246 |
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| 247 | case 1: // TCC1
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| 248 | //Enable GCLK for TCC1 (timer counter input clock)
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| 249 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC0_TCC1 )) ;
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| 250 | break;
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| 251 |
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| 252 | case 2: // TCC2
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| 253 | //Enable GCLK for TCC2 (timer counter input clock)
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| 254 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC2_TC3 )) ;
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| 255 | break;
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| 256 |
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| 257 | case 3: // TC3
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| 258 | //Enable GCLK for TC3 (timer counter input clock)
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| 259 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC2_TC3 ));
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| 260 | break;
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| 261 |
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| 262 | case 4: // TC4
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| 263 | //Enable GCLK for TC4 (timer counter input clock)
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| 264 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 ));
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| 265 | break;
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| 266 |
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| 267 | case 5: // TC5
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| 268 | //Enable GCLK for TC5 (timer counter input clock)
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| 269 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 )) ;
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| 270 | break;
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| 271 | }
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| 272 |
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| 273 | // Set PORT
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| 274 | if ( isTC )
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| 275 | {
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| 276 | // -- Configure TC
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| 277 | //DISABLE TCx
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| 278 | TCx->COUNT8.CTRLA.reg &=~(TC_CTRLA_ENABLE);
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| 279 | //Set Timer counter Mode to 8 bits
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| 280 | TCx->COUNT8.CTRLA.reg |= TC_CTRLA_MODE_COUNT8;
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| 281 | //Set TCx as normal PWM
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| 282 | TCx->COUNT8.CTRLA.reg |= TC_CTRLA_WAVEGEN_NPWM;
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| 283 | //Set TCx in waveform mode Normal PWM
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| 284 | TCx->COUNT8.CC[Channelx].reg = (uint8_t) ulValue;
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| 285 | //Set PER to maximum counter value (resolution : 0xFF)
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| 286 | TCx->COUNT8.PER.reg = 0xFF;
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| 287 | // Enable TCx
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| 288 | TCx->COUNT8.CTRLA.reg |= TC_CTRLA_ENABLE;
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| 289 | }
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| 290 | else
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| 291 | {
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| 292 | // -- Configure TCC
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| 293 |
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| 294 | //DISABLE TCCx
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| 295 | TCCx->CTRLA.reg &=~(TCC_CTRLA_ENABLE);
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| 296 | //Set TCx as normal PWM
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| 297 | TCCx->WAVE.reg |= TCC_WAVE_WAVEGEN_NPWM;
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| 298 | //Set TCx in waveform mode Normal PWM
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| 299 | TCCx->CC[Channelx].reg = (uint32_t)ulValue;
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| 300 | //Set PER to maximum counter value (resolution : 0xFF)
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| 301 | TCCx->PER.reg = 0xFF;
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| 302 | //ENABLE TCCx
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| 303 | TCCx->CTRLA.reg |= TCC_CTRLA_ENABLE ;
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| 304 | }
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| 305 |
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| 306 | return ;
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| 307 | }
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| 308 |
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| 309 | // -- Defaults to digital write
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| 310 | pinMode( ulPin, OUTPUT ) ;
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| 311 |
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| 312 | if ( ulValue < 128 )
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| 313 | {
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| 314 | digitalWrite( ulPin, LOW ) ;
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| 315 | }
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| 316 | else
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| 317 | {
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| 318 | digitalWrite( ulPin, HIGH ) ;
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| 319 | }
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| 320 | }
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| 321 |
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| 322 | #ifdef __cplusplus
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| 323 | }
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| 324 | #endif
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