1 | //////////////////////////////////////////////////////////////////////
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2 | //// ////
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3 | //// can_crc.v ////
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4 | //// ////
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5 | //// ////
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6 | //// This file is part of the CAN Protocol Controller ////
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7 | //// http://www.opencores.org/projects/can/ ////
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8 | //// ////
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9 | //// ////
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10 | //// Author(s): ////
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11 | //// Igor Mohor ////
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12 | //// igorm@opencores.org ////
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13 | //// ////
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14 | //// ////
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15 | //// All additional information is available in the README.txt ////
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16 | //// file. ////
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17 | //// ////
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18 | //////////////////////////////////////////////////////////////////////
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19 | //// ////
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20 | //// Copyright (C) 2002, 2003, 2004 Authors ////
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21 | //// ////
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22 | //// This source file may be used and distributed without ////
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23 | //// restriction provided that this copyright statement is not ////
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24 | //// removed from the file and that any derivative work contains ////
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25 | //// the original copyright notice and the associated disclaimer. ////
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26 | //// ////
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27 | //// This source file is free software; you can redistribute it ////
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28 | //// and/or modify it under the terms of the GNU Lesser General ////
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29 | //// Public License as published by the Free Software Foundation; ////
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30 | //// either version 2.1 of the License, or (at your option) any ////
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31 | //// later version. ////
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32 | //// ////
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33 | //// This source is distributed in the hope that it will be ////
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34 | //// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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35 | //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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36 | //// PURPOSE. See the GNU Lesser General Public License for more ////
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37 | //// details. ////
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38 | //// ////
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39 | //// You should have received a copy of the GNU Lesser General ////
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40 | //// Public License along with this source; if not, download it ////
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41 | //// from http://www.opencores.org/lgpl.shtml ////
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42 | //// ////
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43 | //// The CAN protocol is developed by Robert Bosch GmbH and ////
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44 | //// protected by patents. Anybody who wants to implement this ////
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45 | //// CAN IP core on silicon has to obtain a CAN protocol license ////
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46 | //// from Bosch. ////
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47 | //// ////
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48 | //////////////////////////////////////////////////////////////////////
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49 | //
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50 | // CVS Revision History
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51 | //
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52 | // $Log: can_crc.v,v $
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53 | // Revision 1.5 2004/02/08 14:25:57 mohor
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54 | // Header changed.
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55 | //
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56 | // Revision 1.4 2003/07/16 13:16:51 mohor
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57 | // Fixed according to the linter.
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58 | //
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59 | // Revision 1.3 2003/02/10 16:02:11 mohor
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60 | // CAN is working according to the specification. WB interface and more
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61 | // registers (status, IRQ, ...) needs to be added.
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62 | //
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63 | // Revision 1.2 2003/02/09 02:24:33 mohor
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64 | // Bosch license warning added. Error counters finished. Overload frames
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65 | // still need to be fixed.
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66 | //
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67 | // Revision 1.1 2003/01/08 02:10:54 mohor
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68 | // Acceptance filter added.
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69 | //
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70 | //
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71 | //
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72 | //
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73 |
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74 | // synopsys translate_off
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75 | `include "timescale.v"
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76 | // synopsys translate_on
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77 |
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78 | module can_crc (clk, data, enable, initialize, crc);
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79 |
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80 |
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81 | parameter Tp = 1;
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82 |
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83 | input clk;
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84 | input data;
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85 | input enable;
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86 | input initialize;
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87 |
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88 | output [14:0] crc;
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89 |
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90 | reg [14:0] crc;
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91 |
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92 | wire crc_next;
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93 | wire [14:0] crc_tmp;
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94 |
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95 |
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96 | assign crc_next = data ^ crc[14];
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97 | assign crc_tmp = {crc[13:0], 1'b0};
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98 |
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99 | always @ (posedge clk)
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100 | begin
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101 | if(initialize)
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102 | crc <= #Tp 15'h0;
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103 | else if (enable)
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104 | begin
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105 | if (crc_next)
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106 | crc <= #Tp crc_tmp ^ 15'h4599;
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107 | else
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108 | crc <= #Tp crc_tmp;
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109 | end
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110 | end
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111 |
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112 |
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113 | endmodule
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