source: rc_os_nios2/trunk/DE0_Nano_QSYS_DEMO/DE0_Nano_SOPC.qsys@ 295

Last change on this file since 295 was 128, checked in by ertl-honda, 7 years ago

追加.

File size: 107.4 KB
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1<?xml version="1.0" encoding="UTF-8"?>
2<system name="$${FILENAME}">
3 <component
4 name="$${FILENAME}"
5 displayName="$${FILENAME}"
6 version="1.0"
7 description=""
8 tags=""
9 categories="System" />
10 <parameter name="bonusData"><![CDATA[bonusData
11{
12 element $${FILENAME}
13 {
14 }
15 element adc_spi_read
16 {
17 datum _sortIndex
18 {
19 value = "40";
20 type = "int";
21 }
22 }
23 element altpll_sys
24 {
25 datum _sortIndex
26 {
27 value = "9";
28 type = "int";
29 }
30 }
31 element jtag_uart.avalon_jtag_slave
32 {
33 datum baseAddress
34 {
35 value = "416";
36 type = "String";
37 }
38 }
39 element sysver_0.avalon_slave_0
40 {
41 datum baseAddress
42 {
43 value = "448";
44 type = "String";
45 }
46 }
47 element multi_pwm_0.avalon_slave_0
48 {
49 datum baseAddress
50 {
51 value = "160";
52 type = "String";
53 }
54 }
55 element c0
56 {
57 datum _sortIndex
58 {
59 value = "4";
60 type = "int";
61 }
62 }
63 element c2
64 {
65 datum _sortIndex
66 {
67 value = "5";
68 type = "int";
69 }
70 }
71 element c4
72 {
73 datum _sortIndex
74 {
75 value = "6";
76 type = "int";
77 }
78 }
79 element can_top_0
80 {
81 datum _sortIndex
82 {
83 value = "43";
84 type = "int";
85 }
86 }
87 element clk_50
88 {
89 datum _sortIndex
90 {
91 value = "7";
92 type = "int";
93 }
94 }
95 element clock_crossing_io
96 {
97 datum _sortIndex
98 {
99 value = "0";
100 type = "int";
101 }
102 }
103 element clock_crossing_io2
104 {
105 datum _sortIndex
106 {
107 value = "1";
108 type = "int";
109 }
110 }
111 element sysid.control_slave
112 {
113 datum baseAddress
114 {
115 value = "112";
116 type = "long";
117 }
118 }
119 element cpu
120 {
121 datum _sortIndex
122 {
123 value = "2";
124 type = "int";
125 }
126 }
127 element epcs
128 {
129 datum _sortIndex
130 {
131 value = "38";
132 type = "int";
133 }
134 datum megawizard_uipreferences
135 {
136 value = "{output_language=VERILOG, output_directory=D:\\Q_DE_NANO}";
137 type = "String";
138 }
139 }
140 element g_sensor_int
141 {
142 datum _sortIndex
143 {
144 value = "17";
145 type = "int";
146 }
147 datum megawizard_uipreferences
148 {
149 value = "{}";
150 type = "String";
151 }
152 }
153 element gsensor_spi
154 {
155 datum _sortIndex
156 {
157 value = "39";
158 type = "int";
159 }
160 }
161 element i2c_scl
162 {
163 datum _sortIndex
164 {
165 value = "37";
166 type = "int";
167 }
168 datum megawizard_uipreferences
169 {
170 value = "{}";
171 type = "String";
172 }
173 }
174 element i2c_sda
175 {
176 datum _sortIndex
177 {
178 value = "36";
179 type = "int";
180 }
181 datum megawizard_uipreferences
182 {
183 value = "{}";
184 type = "String";
185 }
186 }
187 element cpu.jtag_debug_module
188 {
189 datum baseAddress
190 {
191 value = "33554432";
192 type = "String";
193 }
194 }
195 element jtag_uart
196 {
197 datum _sortIndex
198 {
199 value = "11";
200 type = "int";
201 }
202 }
203 element key
204 {
205 datum _sortIndex
206 {
207 value = "12";
208 type = "int";
209 }
210 datum megawizard_uipreferences
211 {
212 value = "{}";
213 type = "String";
214 }
215 }
216 element led
217 {
218 datum _sortIndex
219 {
220 value = "14";
221 type = "int";
222 }
223 datum megawizard_uipreferences
224 {
225 value = "{}";
226 type = "String";
227 }
228 }
229 element multi_pwm_0
230 {
231 datum _sortIndex
232 {
233 value = "16";
234 type = "int";
235 }
236 }
237 element pio
238 {
239 datum _sortIndex
240 {
241 value = "15";
242 type = "int";
243 }
244 }
245 element altpll_sys.pll_slave
246 {
247 datum baseAddress
248 {
249 value = "100667392";
250 type = "long";
251 }
252 }
253 element clock_crossing_io.s0
254 {
255 datum baseAddress
256 {
257 value = "134217728";
258 type = "String";
259 }
260 }
261 element clock_crossing_io2.s0
262 {
263 datum baseAddress
264 {
265 value = "117440512";
266 type = "String";
267 }
268 }
269 element sdram.s1
270 {
271 datum _lockedAddress
272 {
273 value = "0";
274 type = "boolean";
275 }
276 datum baseAddress
277 {
278 value = "0";
279 type = "String";
280 }
281 }
282 element pio.s1
283 {
284 datum baseAddress
285 {
286 value = "128";
287 type = "String";
288 }
289 }
290 element timer_5.s1
291 {
292 datum baseAddress
293 {
294 value = "672";
295 type = "String";
296 }
297 }
298 element timer_11.s1
299 {
300 datum baseAddress
301 {
302 value = "864";
303 type = "String";
304 }
305 }
306 element timer_1.s1
307 {
308 datum baseAddress
309 {
310 value = "544";
311 type = "String";
312 }
313 }
314 element key.s1
315 {
316 datum baseAddress
317 {
318 value = "32";
319 type = "long";
320 }
321 }
322 element timer_13.s1
323 {
324 datum baseAddress
325 {
326 value = "928";
327 type = "String";
328 }
329 }
330 element timer_6.s1
331 {
332 datum baseAddress
333 {
334 value = "704";
335 type = "String";
336 }
337 }
338 element select_i2c_clk.s1
339 {
340 datum baseAddress
341 {
342 value = "96";
343 type = "long";
344 }
345 }
346 element sys_clk_timer.s1
347 {
348 datum baseAddress
349 {
350 value = "0";
351 type = "long";
352 }
353 }
354 element sw.s1
355 {
356 datum baseAddress
357 {
358 value = "64";
359 type = "long";
360 }
361 }
362 element timer_12.s1
363 {
364 datum baseAddress
365 {
366 value = "896";
367 type = "String";
368 }
369 }
370 element g_sensor_int.s1
371 {
372 datum baseAddress
373 {
374 value = "80";
375 type = "long";
376 }
377 }
378 element timer_4.s1
379 {
380 datum baseAddress
381 {
382 value = "640";
383 type = "String";
384 }
385 }
386 element timer_10.s1
387 {
388 datum baseAddress
389 {
390 value = "832";
391 type = "String";
392 }
393 }
394 element timer_14.s1
395 {
396 datum baseAddress
397 {
398 value = "960";
399 type = "String";
400 }
401 }
402 element timer_2.s1
403 {
404 datum baseAddress
405 {
406 value = "576";
407 type = "String";
408 }
409 }
410 element timer_9.s1
411 {
412 datum baseAddress
413 {
414 value = "800";
415 type = "String";
416 }
417 }
418 element led.s1
419 {
420 datum baseAddress
421 {
422 value = "48";
423 type = "long";
424 }
425 }
426 element timer_15.s1
427 {
428 datum baseAddress
429 {
430 value = "992";
431 type = "String";
432 }
433 }
434 element timer_3.s1
435 {
436 datum baseAddress
437 {
438 value = "608";
439 type = "String";
440 }
441 }
442 element timer_8.s1
443 {
444 datum baseAddress
445 {
446 value = "768";
447 type = "String";
448 }
449 }
450 element timer_0.s1
451 {
452 datum baseAddress
453 {
454 value = "512";
455 type = "String";
456 }
457 }
458 element timer_7.s1
459 {
460 datum baseAddress
461 {
462 value = "736";
463 type = "String";
464 }
465 }
466 element sdram
467 {
468 datum _sortIndex
469 {
470 value = "8";
471 type = "int";
472 }
473 datum megawizard_uipreferences
474 {
475 value = "{output_language=VERILOG, output_directory=D:\\DE_NANO\\Q_DE_NANO_RTL}";
476 type = "String";
477 }
478 }
479 element select_i2c_clk
480 {
481 datum _sortIndex
482 {
483 value = "18";
484 type = "int";
485 }
486 }
487 element sram_dummy
488 {
489 datum _sortIndex
490 {
491 value = "41";
492 type = "int";
493 }
494 }
495 element sw
496 {
497 datum _sortIndex
498 {
499 value = "13";
500 type = "int";
501 }
502 datum megawizard_uipreferences
503 {
504 value = "{}";
505 type = "String";
506 }
507 }
508 element sys_clk_timer
509 {
510 datum _sortIndex
511 {
512 value = "10";
513 type = "int";
514 }
515 datum megawizard_uipreferences
516 {
517 value = "{}";
518 type = "String";
519 }
520 }
521 element sysid
522 {
523 datum _sortIndex
524 {
525 value = "3";
526 type = "int";
527 }
528 }
529 element sysver_0
530 {
531 datum _sortIndex
532 {
533 value = "19";
534 type = "int";
535 }
536 }
537 element timer_0
538 {
539 datum _sortIndex
540 {
541 value = "20";
542 type = "int";
543 }
544 }
545 element timer_1
546 {
547 datum _sortIndex
548 {
549 value = "21";
550 type = "int";
551 }
552 }
553 element timer_10
554 {
555 datum _sortIndex
556 {
557 value = "30";
558 type = "int";
559 }
560 }
561 element timer_11
562 {
563 datum _sortIndex
564 {
565 value = "31";
566 type = "int";
567 }
568 }
569 element timer_12
570 {
571 datum _sortIndex
572 {
573 value = "32";
574 type = "int";
575 }
576 }
577 element timer_13
578 {
579 datum _sortIndex
580 {
581 value = "33";
582 type = "int";
583 }
584 }
585 element timer_14
586 {
587 datum _sortIndex
588 {
589 value = "34";
590 type = "int";
591 }
592 }
593 element timer_15
594 {
595 datum _sortIndex
596 {
597 value = "35";
598 type = "int";
599 }
600 }
601 element timer_2
602 {
603 datum _sortIndex
604 {
605 value = "22";
606 type = "int";
607 }
608 }
609 element timer_3
610 {
611 datum _sortIndex
612 {
613 value = "23";
614 type = "int";
615 }
616 }
617 element timer_4
618 {
619 datum _sortIndex
620 {
621 value = "24";
622 type = "int";
623 }
624 }
625 element timer_5
626 {
627 datum _sortIndex
628 {
629 value = "25";
630 type = "int";
631 }
632 }
633 element timer_6
634 {
635 datum _sortIndex
636 {
637 value = "26";
638 type = "int";
639 }
640 }
641 element timer_7
642 {
643 datum _sortIndex
644 {
645 value = "27";
646 type = "int";
647 }
648 }
649 element timer_8
650 {
651 datum _sortIndex
652 {
653 value = "28";
654 type = "int";
655 }
656 }
657 element timer_9
658 {
659 datum _sortIndex
660 {
661 value = "29";
662 type = "int";
663 }
664 }
665 element uart_0
666 {
667 datum _sortIndex
668 {
669 value = "44";
670 type = "int";
671 }
672 }
673 element uart_1
674 {
675 datum _sortIndex
676 {
677 value = "45";
678 type = "int";
679 }
680 }
681 element vic_0
682 {
683 datum _sortIndex
684 {
685 value = "42";
686 type = "int";
687 }
688 }
689}
690]]></parameter>
691 <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
692 <parameter name="device" value="EP4CE22F17C6" />
693 <parameter name="deviceFamily" value="Cyclone IV E" />
694 <parameter name="deviceSpeedGrade" value="6" />
695 <parameter name="fabricMode" value="QSYS" />
696 <parameter name="generateLegacySim" value="false" />
697 <parameter name="generationId" value="0" />
698 <parameter name="globalResetBus" value="false" />
699 <parameter name="hdlLanguage" value="VERILOG" />
700 <parameter name="maxAdditionalLatency" value="0" />
701 <parameter name="projectName" value="DE0_Nano.qpf" />
702 <parameter name="sopcBorderPoints" value="false" />
703 <parameter name="systemHash" value="1" />
704 <parameter name="timeStamp" value="1415543992401" />
705 <parameter name="useTestBenchNamingPattern" value="false" />
706 <instanceScript></instanceScript>
707 <interface name="clk_50_clk_in" internal="clk_50.clk_in" type="clock" dir="end">
708 <port name="clk_50" internal="in_clk" />
709 </interface>
710 <interface
711 name="key_external_connection"
712 internal="key.external_connection"
713 type="conduit"
714 dir="end">
715 <port name="in_port_to_the_key" internal="in_port" />
716 </interface>
717 <interface
718 name="sw_external_connection"
719 internal="sw.external_connection"
720 type="conduit"
721 dir="end">
722 <port name="in_port_to_the_sw" internal="in_port" />
723 </interface>
724 <interface
725 name="led_external_connection"
726 internal="led.external_connection"
727 type="conduit"
728 dir="end">
729 <port name="out_port_from_the_led" internal="out_port" />
730 </interface>
731 <interface
732 name="i2c_scl_external_connection"
733 internal="i2c_scl.external_connection"
734 type="conduit"
735 dir="end">
736 <port name="out_port_from_the_i2c_scl" internal="out_port" />
737 </interface>
738 <interface
739 name="i2c_sda_external_connection"
740 internal="i2c_sda.external_connection"
741 type="conduit"
742 dir="end">
743 <port name="bidir_port_to_and_from_the_i2c_sda" internal="bidir_port" />
744 </interface>
745 <interface name="sdram_wire" internal="sdram.wire" type="conduit" dir="end">
746 <port name="zs_addr_from_the_sdram" internal="zs_addr" />
747 <port name="zs_ba_from_the_sdram" internal="zs_ba" />
748 <port name="zs_cas_n_from_the_sdram" internal="zs_cas_n" />
749 <port name="zs_cke_from_the_sdram" internal="zs_cke" />
750 <port name="zs_cs_n_from_the_sdram" internal="zs_cs_n" />
751 <port name="zs_dq_to_and_from_the_sdram" internal="zs_dq" />
752 <port name="zs_dqm_from_the_sdram" internal="zs_dqm" />
753 <port name="zs_ras_n_from_the_sdram" internal="zs_ras_n" />
754 <port name="zs_we_n_from_the_sdram" internal="zs_we_n" />
755 </interface>
756 <interface name="c0_out_clk" internal="c0.out_clk" type="clock" dir="start">
757 <port name="altpll_sys" internal="out_clk" />
758 </interface>
759 <interface
760 name="altpll_sys_c1"
761 internal="altpll_sys.c1"
762 type="clock"
763 dir="start">
764 <port name="altpll_sdram" internal="c1" />
765 </interface>
766 <interface name="c2_out_clk" internal="c2.out_clk" type="clock" dir="start">
767 <port name="altpll_io" internal="out_clk" />
768 </interface>
769 <interface
770 name="altpll_sys_c3"
771 internal="altpll_sys.c3"
772 type="clock"
773 dir="start">
774 <port name="altpll_sys_c3_out" internal="c3" />
775 </interface>
776 <interface name="c4_out_clk" internal="c4.out_clk" type="clock" dir="start">
777 <port name="altpll_adc" internal="out_clk" />
778 </interface>
779 <interface
780 name="altpll_sys_locked_conduit"
781 internal="altpll_sys.locked_conduit"
782 type="conduit"
783 dir="end">
784 <port name="locked_from_the_altpll_sys" internal="locked" />
785 </interface>
786 <interface
787 name="altpll_sys_phasedone_conduit"
788 internal="altpll_sys.phasedone_conduit"
789 type="conduit"
790 dir="end">
791 <port name="phasedone_from_the_altpll_sys" internal="phasedone" />
792 </interface>
793 <interface
794 name="g_sensor_int_external_connection"
795 internal="g_sensor_int.external_connection"
796 type="conduit"
797 dir="end">
798 <port name="in_port_to_the_g_sensor_int" internal="in_port" />
799 </interface>
800 <interface
801 name="epcs_external"
802 internal="epcs.external"
803 type="conduit"
804 dir="end">
805 <port name="dclk_from_the_epcs" internal="dclk" />
806 <port name="sce_from_the_epcs" internal="sce" />
807 <port name="sdo_from_the_epcs" internal="sdo" />
808 <port name="data0_to_the_epcs" internal="data0" />
809 </interface>
810 <interface
811 name="adc_spi_read_conduit_end"
812 internal="adc_spi_read.conduit_end"
813 type="conduit"
814 dir="end">
815 <port name="SPI_OUT_from_the_adc_spi_read" internal="SPI_OUT" />
816 <port name="SPI_IN_to_the_adc_spi_read" internal="SPI_IN" />
817 <port name="SPI_CS_n_from_the_adc_spi_read" internal="SPI_CS_n" />
818 <port name="SPI_CLK_from_the_adc_spi_read" internal="SPI_CLK" />
819 </interface>
820 <interface
821 name="gsensor_spi_conduit_end"
822 internal="gsensor_spi.conduit_end"
823 type="conduit"
824 dir="end">
825 <port name="SPI_SDIO_to_and_from_the_gsensor_spi" internal="SPI_SDIO" />
826 <port name="SPI_SCLK_from_the_gsensor_spi" internal="SPI_SCLK" />
827 <port name="SPI_CS_n_from_the_gsensor_spi" internal="SPI_CS_n" />
828 </interface>
829 <interface
830 name="select_i2c_clk_external_connection"
831 internal="select_i2c_clk.external_connection"
832 type="conduit"
833 dir="end">
834 <port name="out_port_from_the_select_i2c_clk" internal="out_port" />
835 </interface>
836 <interface
837 name="altpll_sys_areset_conduit"
838 internal="altpll_sys.areset_conduit"
839 type="conduit"
840 dir="end" />
841 <interface
842 name="can_top_0_conduit_end"
843 internal="can_top_0.conduit_end"
844 type="conduit"
845 dir="end" />
846 <interface
847 name="uart_0_external_connection"
848 internal="uart_0.external_connection"
849 type="conduit"
850 dir="end" />
851 <interface
852 name="uart_1_external_connection"
853 internal="uart_1.external_connection"
854 type="conduit"
855 dir="end" />
856 <interface
857 name="pio_0_external_connection"
858 internal="pio.external_connection"
859 type="conduit"
860 dir="end" />
861 <interface
862 name="multi_pwm_0_conduit_end"
863 internal="multi_pwm_0.conduit_end"
864 type="conduit"
865 dir="end" />
866 <interface
867 name="clk_50_clk_in_reset"
868 internal="clk_50.clk_in_reset"
869 type="reset"
870 dir="end" />
871 <module kind="clock_source" version="13.0" enabled="1" name="clk_50">
872 <parameter name="clockFrequency" value="50000000" />
873 <parameter name="clockFrequencyKnown" value="true" />
874 <parameter name="inputClockFrequency" value="0" />
875 <parameter name="resetSynchronousEdges" value="NONE" />
876 </module>
877 <module
878 kind="altera_avalon_timer"
879 version="13.0.1.99.2"
880 enabled="0"
881 name="sys_clk_timer">
882 <parameter name="alwaysRun" value="false" />
883 <parameter name="counterSize" value="32" />
884 <parameter name="fixedPeriod" value="false" />
885 <parameter name="period" value="1" />
886 <parameter name="periodUnits" value="MSEC" />
887 <parameter name="resetOutput" value="false" />
888 <parameter name="snapshot" value="true" />
889 <parameter name="timeoutPulseOutput" value="false" />
890 <parameter name="systemFrequency" value="60000000" />
891 </module>
892 <module kind="altera_avalon_pio" version="13.0.1.99.2" enabled="1" name="key">
893 <parameter name="bitClearingEdgeCapReg" value="false" />
894 <parameter name="bitModifyingOutReg" value="false" />
895 <parameter name="captureEdge" value="true" />
896 <parameter name="direction" value="Input" />
897 <parameter name="edgeType" value="FALLING" />
898 <parameter name="generateIRQ" value="true" />
899 <parameter name="irqType" value="EDGE" />
900 <parameter name="resetValue" value="0" />
901 <parameter name="simDoTestBenchWiring" value="false" />
902 <parameter name="simDrivenValue" value="0" />
903 <parameter name="width" value="2" />
904 <parameter name="clockRate" value="60000000" />
905 </module>
906 <module kind="altera_avalon_pio" version="13.0.1.99.2" enabled="1" name="sw">
907 <parameter name="bitClearingEdgeCapReg" value="false" />
908 <parameter name="bitModifyingOutReg" value="false" />
909 <parameter name="captureEdge" value="true" />
910 <parameter name="direction" value="Input" />
911 <parameter name="edgeType" value="ANY" />
912 <parameter name="generateIRQ" value="true" />
913 <parameter name="irqType" value="EDGE" />
914 <parameter name="resetValue" value="0" />
915 <parameter name="simDoTestBenchWiring" value="false" />
916 <parameter name="simDrivenValue" value="0" />
917 <parameter name="width" value="4" />
918 <parameter name="clockRate" value="60000000" />
919 </module>
920 <module kind="altera_avalon_pio" version="13.0.1.99.2" enabled="1" name="led">
921 <parameter name="bitClearingEdgeCapReg" value="false" />
922 <parameter name="bitModifyingOutReg" value="false" />
923 <parameter name="captureEdge" value="false" />
924 <parameter name="direction" value="Output" />
925 <parameter name="edgeType" value="RISING" />
926 <parameter name="generateIRQ" value="false" />
927 <parameter name="irqType" value="LEVEL" />
928 <parameter name="resetValue" value="0" />
929 <parameter name="simDoTestBenchWiring" value="false" />
930 <parameter name="simDrivenValue" value="0" />
931 <parameter name="width" value="8" />
932 <parameter name="clockRate" value="60000000" />
933 </module>
934 <module
935 kind="altera_avalon_pio"
936 version="13.0.1.99.2"
937 enabled="1"
938 name="i2c_scl">
939 <parameter name="bitClearingEdgeCapReg" value="false" />
940 <parameter name="bitModifyingOutReg" value="false" />
941 <parameter name="captureEdge" value="false" />
942 <parameter name="direction" value="Output" />
943 <parameter name="edgeType" value="RISING" />
944 <parameter name="generateIRQ" value="false" />
945 <parameter name="irqType" value="LEVEL" />
946 <parameter name="resetValue" value="1" />
947 <parameter name="simDoTestBenchWiring" value="false" />
948 <parameter name="simDrivenValue" value="0" />
949 <parameter name="width" value="1" />
950 <parameter name="clockRate" value="50000000" />
951 </module>
952 <module
953 kind="altera_avalon_pio"
954 version="13.0.1.99.2"
955 enabled="1"
956 name="i2c_sda">
957 <parameter name="bitClearingEdgeCapReg" value="false" />
958 <parameter name="bitModifyingOutReg" value="false" />
959 <parameter name="captureEdge" value="false" />
960 <parameter name="direction" value="Bidir" />
961 <parameter name="edgeType" value="RISING" />
962 <parameter name="generateIRQ" value="false" />
963 <parameter name="irqType" value="LEVEL" />
964 <parameter name="resetValue" value="1" />
965 <parameter name="simDoTestBenchWiring" value="false" />
966 <parameter name="simDrivenValue" value="0" />
967 <parameter name="width" value="1" />
968 <parameter name="clockRate" value="50000000" />
969 </module>
970 <module
971 kind="altera_avalon_new_sdram_controller"
972 version="13.0.1.99.2"
973 enabled="1"
974 name="sdram">
975 <parameter name="TAC" value="5.5" />
976 <parameter name="TRCD" value="20.0" />
977 <parameter name="TRFC" value="70.0" />
978 <parameter name="TRP" value="20.0" />
979 <parameter name="TWR" value="14.0" />
980 <parameter name="casLatency" value="3" />
981 <parameter name="columnWidth" value="9" />
982 <parameter name="dataWidth" value="16" />
983 <parameter name="generateSimulationModel" value="true" />
984 <parameter name="initRefreshCommands" value="2" />
985 <parameter name="model" value="custom" />
986 <parameter name="numberOfBanks" value="4" />
987 <parameter name="numberOfChipSelects" value="1" />
988 <parameter name="pinsSharedViaTriState" value="false" />
989 <parameter name="powerUpDelay" value="100.0" />
990 <parameter name="refreshPeriod" value="15.625" />
991 <parameter name="rowWidth" value="13" />
992 <parameter name="masteredTristateBridgeSlave" value="0" />
993 <parameter name="TMRD" value="3" />
994 <parameter name="initNOPDelay" value="0.0" />
995 <parameter name="registerDataIn" value="true" />
996 <parameter name="clockRate" value="100000000" />
997 <parameter name="componentName" value="DE0_Nano_SOPC_sdram" />
998 </module>
999 <module kind="altpll" version="13.0" enabled="1" name="altpll_sys">
1000 <parameter name="HIDDEN_CUSTOM_ELABORATION">altpll_avalon_elaboration</parameter>
1001 <parameter name="HIDDEN_CUSTOM_POST_EDIT">altpll_avalon_post_edit</parameter>
1002 <parameter name="INTENDED_DEVICE_FAMILY" value="Cyclone IV E" />
1003 <parameter name="WIDTH_CLOCK" value="5" />
1004 <parameter name="WIDTH_PHASECOUNTERSELECT" value="" />
1005 <parameter name="PRIMARY_CLOCK" value="" />
1006 <parameter name="INCLK0_INPUT_FREQUENCY" value="20000" />
1007 <parameter name="INCLK1_INPUT_FREQUENCY" value="" />
1008 <parameter name="OPERATION_MODE" value="NORMAL" />
1009 <parameter name="PLL_TYPE" value="AUTO" />
1010 <parameter name="QUALIFY_CONF_DONE" value="" />
1011 <parameter name="COMPENSATE_CLOCK" value="CLK0" />
1012 <parameter name="SCAN_CHAIN" value="" />
1013 <parameter name="GATE_LOCK_SIGNAL" value="" />
1014 <parameter name="GATE_LOCK_COUNTER" value="" />
1015 <parameter name="LOCK_HIGH" value="" />
1016 <parameter name="LOCK_LOW" value="" />
1017 <parameter name="VALID_LOCK_MULTIPLIER" value="" />
1018 <parameter name="INVALID_LOCK_MULTIPLIER" value="" />
1019 <parameter name="SWITCH_OVER_ON_LOSSCLK" value="" />
1020 <parameter name="SWITCH_OVER_ON_GATED_LOCK" value="" />
1021 <parameter name="ENABLE_SWITCH_OVER_COUNTER" value="" />
1022 <parameter name="SKIP_VCO" value="" />
1023 <parameter name="SWITCH_OVER_COUNTER" value="" />
1024 <parameter name="SWITCH_OVER_TYPE" value="" />
1025 <parameter name="FEEDBACK_SOURCE" value="" />
1026 <parameter name="BANDWIDTH" value="" />
1027 <parameter name="BANDWIDTH_TYPE" value="AUTO" />
1028 <parameter name="SPREAD_FREQUENCY" value="" />
1029 <parameter name="DOWN_SPREAD" value="" />
1030 <parameter name="SELF_RESET_ON_GATED_LOSS_LOCK" value="" />
1031 <parameter name="SELF_RESET_ON_LOSS_LOCK" value="" />
1032 <parameter name="CLK0_MULTIPLY_BY" value="2" />
1033 <parameter name="CLK1_MULTIPLY_BY" value="2" />
1034 <parameter name="CLK2_MULTIPLY_BY" value="6" />
1035 <parameter name="CLK3_MULTIPLY_BY" value="4" />
1036 <parameter name="CLK4_MULTIPLY_BY" value="1" />
1037 <parameter name="CLK5_MULTIPLY_BY" value="" />
1038 <parameter name="CLK6_MULTIPLY_BY" value="" />
1039 <parameter name="CLK7_MULTIPLY_BY" value="" />
1040 <parameter name="CLK8_MULTIPLY_BY" value="" />
1041 <parameter name="CLK9_MULTIPLY_BY" value="" />
1042 <parameter name="EXTCLK0_MULTIPLY_BY" value="" />
1043 <parameter name="EXTCLK1_MULTIPLY_BY" value="" />
1044 <parameter name="EXTCLK2_MULTIPLY_BY" value="" />
1045 <parameter name="EXTCLK3_MULTIPLY_BY" value="" />
1046 <parameter name="CLK0_DIVIDE_BY" value="1" />
1047 <parameter name="CLK1_DIVIDE_BY" value="1" />
1048 <parameter name="CLK2_DIVIDE_BY" value="5" />
1049 <parameter name="CLK3_DIVIDE_BY" value="5" />
1050 <parameter name="CLK4_DIVIDE_BY" value="25" />
1051 <parameter name="CLK5_DIVIDE_BY" value="" />
1052 <parameter name="CLK6_DIVIDE_BY" value="" />
1053 <parameter name="CLK7_DIVIDE_BY" value="" />
1054 <parameter name="CLK8_DIVIDE_BY" value="" />
1055 <parameter name="CLK9_DIVIDE_BY" value="" />
1056 <parameter name="EXTCLK0_DIVIDE_BY" value="" />
1057 <parameter name="EXTCLK1_DIVIDE_BY" value="" />
1058 <parameter name="EXTCLK2_DIVIDE_BY" value="" />
1059 <parameter name="EXTCLK3_DIVIDE_BY" value="" />
1060 <parameter name="CLK0_PHASE_SHIFT" value="0" />
1061 <parameter name="CLK1_PHASE_SHIFT" value="-1806" />
1062 <parameter name="CLK2_PHASE_SHIFT" value="0" />
1063 <parameter name="CLK3_PHASE_SHIFT" value="0" />
1064 <parameter name="CLK4_PHASE_SHIFT" value="0" />
1065 <parameter name="CLK5_PHASE_SHIFT" value="" />
1066 <parameter name="CLK6_PHASE_SHIFT" value="" />
1067 <parameter name="CLK7_PHASE_SHIFT" value="" />
1068 <parameter name="CLK8_PHASE_SHIFT" value="" />
1069 <parameter name="CLK9_PHASE_SHIFT" value="" />
1070 <parameter name="EXTCLK0_PHASE_SHIFT" value="" />
1071 <parameter name="EXTCLK1_PHASE_SHIFT" value="" />
1072 <parameter name="EXTCLK2_PHASE_SHIFT" value="" />
1073 <parameter name="EXTCLK3_PHASE_SHIFT" value="" />
1074 <parameter name="CLK0_DUTY_CYCLE" value="50" />
1075 <parameter name="CLK1_DUTY_CYCLE" value="50" />
1076 <parameter name="CLK2_DUTY_CYCLE" value="50" />
1077 <parameter name="CLK3_DUTY_CYCLE" value="50" />
1078 <parameter name="CLK4_DUTY_CYCLE" value="50" />
1079 <parameter name="CLK5_DUTY_CYCLE" value="" />
1080 <parameter name="CLK6_DUTY_CYCLE" value="" />
1081 <parameter name="CLK7_DUTY_CYCLE" value="" />
1082 <parameter name="CLK8_DUTY_CYCLE" value="" />
1083 <parameter name="CLK9_DUTY_CYCLE" value="" />
1084 <parameter name="EXTCLK0_DUTY_CYCLE" value="" />
1085 <parameter name="EXTCLK1_DUTY_CYCLE" value="" />
1086 <parameter name="EXTCLK2_DUTY_CYCLE" value="" />
1087 <parameter name="EXTCLK3_DUTY_CYCLE" value="" />
1088 <parameter name="PORT_clkena0" value="PORT_UNUSED" />
1089 <parameter name="PORT_clkena1" value="PORT_UNUSED" />
1090 <parameter name="PORT_clkena2" value="PORT_UNUSED" />
1091 <parameter name="PORT_clkena3" value="PORT_UNUSED" />
1092 <parameter name="PORT_clkena4" value="PORT_UNUSED" />
1093 <parameter name="PORT_clkena5" value="PORT_UNUSED" />
1094 <parameter name="PORT_extclkena0" value="" />
1095 <parameter name="PORT_extclkena1" value="" />
1096 <parameter name="PORT_extclkena2" value="" />
1097 <parameter name="PORT_extclkena3" value="" />
1098 <parameter name="PORT_extclk0" value="PORT_UNUSED" />
1099 <parameter name="PORT_extclk1" value="PORT_UNUSED" />
1100 <parameter name="PORT_extclk2" value="PORT_UNUSED" />
1101 <parameter name="PORT_extclk3" value="PORT_UNUSED" />
1102 <parameter name="PORT_CLKBAD0" value="PORT_UNUSED" />
1103 <parameter name="PORT_CLKBAD1" value="PORT_UNUSED" />
1104 <parameter name="PORT_clk0" value="PORT_USED" />
1105 <parameter name="PORT_clk1" value="PORT_USED" />
1106 <parameter name="PORT_clk2" value="PORT_USED" />
1107 <parameter name="PORT_clk3" value="PORT_USED" />
1108 <parameter name="PORT_clk4" value="PORT_USED" />
1109 <parameter name="PORT_clk5" value="PORT_UNUSED" />
1110 <parameter name="PORT_clk6" value="" />
1111 <parameter name="PORT_clk7" value="" />
1112 <parameter name="PORT_clk8" value="" />
1113 <parameter name="PORT_clk9" value="" />
1114 <parameter name="PORT_SCANDATA" value="PORT_UNUSED" />
1115 <parameter name="PORT_SCANDATAOUT" value="PORT_UNUSED" />
1116 <parameter name="PORT_SCANDONE" value="PORT_UNUSED" />
1117 <parameter name="PORT_SCLKOUT1" value="" />
1118 <parameter name="PORT_SCLKOUT0" value="" />
1119 <parameter name="PORT_ACTIVECLOCK" value="PORT_UNUSED" />
1120 <parameter name="PORT_CLKLOSS" value="PORT_UNUSED" />
1121 <parameter name="PORT_INCLK1" value="PORT_UNUSED" />
1122 <parameter name="PORT_INCLK0" value="PORT_USED" />
1123 <parameter name="PORT_FBIN" value="PORT_UNUSED" />
1124 <parameter name="PORT_PLLENA" value="PORT_UNUSED" />
1125 <parameter name="PORT_CLKSWITCH" value="PORT_UNUSED" />
1126 <parameter name="PORT_ARESET" value="PORT_USED" />
1127 <parameter name="PORT_PFDENA" value="PORT_UNUSED" />
1128 <parameter name="PORT_SCANCLK" value="PORT_UNUSED" />
1129 <parameter name="PORT_SCANACLR" value="PORT_UNUSED" />
1130 <parameter name="PORT_SCANREAD" value="PORT_UNUSED" />
1131 <parameter name="PORT_SCANWRITE" value="PORT_UNUSED" />
1132 <parameter name="PORT_ENABLE0" value="" />
1133 <parameter name="PORT_ENABLE1" value="" />
1134 <parameter name="PORT_LOCKED" value="PORT_USED" />
1135 <parameter name="PORT_CONFIGUPDATE" value="PORT_UNUSED" />
1136 <parameter name="PORT_FBOUT" value="" />
1137 <parameter name="PORT_PHASEDONE" value="PORT_UNUSED" />
1138 <parameter name="PORT_PHASESTEP" value="PORT_UNUSED" />
1139 <parameter name="PORT_PHASEUPDOWN" value="PORT_UNUSED" />
1140 <parameter name="PORT_SCANCLKENA" value="PORT_UNUSED" />
1141 <parameter name="PORT_PHASECOUNTERSELECT" value="PORT_UNUSED" />
1142 <parameter name="PORT_VCOOVERRANGE" value="" />
1143 <parameter name="PORT_VCOUNDERRANGE" value="" />
1144 <parameter name="DPA_MULTIPLY_BY" value="" />
1145 <parameter name="DPA_DIVIDE_BY" value="" />
1146 <parameter name="DPA_DIVIDER" value="" />
1147 <parameter name="VCO_MULTIPLY_BY" value="" />
1148 <parameter name="VCO_DIVIDE_BY" value="" />
1149 <parameter name="SCLKOUT0_PHASE_SHIFT" value="" />
1150 <parameter name="SCLKOUT1_PHASE_SHIFT" value="" />
1151 <parameter name="VCO_FREQUENCY_CONTROL" value="" />
1152 <parameter name="VCO_PHASE_SHIFT_STEP" value="" />
1153 <parameter name="USING_FBMIMICBIDIR_PORT" value="" />
1154 <parameter name="SCAN_CHAIN_MIF_FILE" value="" />
1155 <parameter name="AVALON_USE_SEPARATE_SYSCLK" value="NO" />
1156 <parameter name="HIDDEN_CONSTANTS">CT#CLK2_DIVIDE_BY 5 CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_USED CT#PORT_clk3 PORT_USED CT#PORT_clk2 PORT_USED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 2 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#CLK3_DUTY_CYCLE 50 CT#CLK3_DIVIDE_BY 5 CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#CLK3_PHASE_SHIFT 0 CT#PORT_SCANCLKENA PORT_UNUSED CT#CLK4_DIVIDE_BY 25 CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#CLK4_MULTIPLY_BY 1 CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 2 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#CLK4_PHASE_SHIFT 0 CT#INCLK0_INPUT_FREQUENCY 20000 CT#CLK4_DUTY_CYCLE 50 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT -1806 CT#PORT_ARESET PORT_USED CT#BANDWIDTH_TYPE AUTO CT#CLK2_MULTIPLY_BY 6 CT#INTENDED_DEVICE_FAMILY {Cyclone IV E} CT#PORT_SCANREAD PORT_UNUSED CT#CLK2_DUTY_CYCLE 50 CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK2_PHASE_SHIFT 0 CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#CLK3_MULTIPLY_BY 4 CT#PORT_LOCKED PORT_USED</parameter>
1157 <parameter name="HIDDEN_PRIVATES">PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#OUTPUT_FREQ_UNIT4 MHz PT#OUTPUT_FREQ_UNIT3 MHz PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT2 MHz PT#OUTPUT_FREQ_UNIT1 MHz PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 1 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#USE_CLK4 1 PT#USE_CLK3 1 PT#USE_CLK2 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK1 1 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#LVDS_PHASE_SHIFT_UNIT4 deg PT#LVDS_PHASE_SHIFT_UNIT3 deg PT#PLL_AUTOPLL_CHECK 1 PT#OUTPUT_FREQ_MODE4 1 PT#LVDS_PHASE_SHIFT_UNIT2 deg PT#OUTPUT_FREQ_MODE3 1 PT#LVDS_PHASE_SHIFT_UNIT1 deg PT#OUTPUT_FREQ_MODE2 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#OUTPUT_FREQ_MODE1 1 PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ4 2.00000000 PT#OUTPUT_FREQ3 40.00000000 PT#OUTPUT_FREQ2 60.00000000 PT#OUTPUT_FREQ1 100.00000000 PT#OUTPUT_FREQ0 100.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE 6 PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#PHASE_SHIFT4 0.00000000 PT#LOCKED_OUTPUT_CHECK 1 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT3 0.00000000 PT#DIV_FACTOR4 1 PT#PHASE_SHIFT2 0.00000000 PT#DIV_FACTOR3 1 PT#DIV_FACTOR2 1 PT#PHASE_SHIFT1 -65.00000000 PT#DIV_FACTOR1 1 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA4 0 PT#USE_CLKENA3 0 PT#USE_CLKENA2 0 PT#USE_CLKENA1 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE4 2.000000 PT#EFF_OUTPUT_FREQ_VALUE3 40.000000 PT#EFF_OUTPUT_FREQ_VALUE2 60.000000 PT#EFF_OUTPUT_FREQ_VALUE1 100.000000 PT#EFF_OUTPUT_FREQ_VALUE0 100.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 1 PT#STICKY_CLK3 1 PT#STICKY_CLK2 1 PT#STICKY_CLK1 1 PT#STICKY_CLK0 1 PT#MIRROR_CLK4 0 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK3 0 PT#MIRROR_CLK2 0 PT#MIRROR_CLK1 0 PT#MIRROR_CLK0 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#CLKLOSS_CHECK 0 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#PHASE_SHIFT_UNIT4 deg PT#PHASE_SHIFT_UNIT3 deg PT#PHASE_SHIFT_UNIT2 deg PT#PHASE_SHIFT_UNIT1 deg PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR4 1 PT#MULT_FACTOR3 1 PT#MULT_FACTOR2 1 PT#MULT_FACTOR1 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#DUTY_CYCLE4 50.00000000 PT#DUTY_CYCLE3 50.00000000 PT#DUTY_CYCLE2 50.00000000 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE1 50.00000000 PT#INTENDED_DEVICE_FAMILY {Cyclone IV E} PT#DUTY_CYCLE0 50.00000000 PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1290674183995785.mif PT#ACTIVECLK_CHECK 0</parameter>
1158 <parameter name="HIDDEN_USED_PORTS">UP#locked used UP#c4 used UP#c3 used UP#c2 used UP#c1 used UP#c0 used UP#areset used UP#inclk0 used</parameter>
1159 <parameter name="HIDDEN_IS_NUMERIC">IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#CLK2_DIVIDE_BY 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK3_DIVIDE_BY 1 IN#CLK4_MULTIPLY_BY 1 IN#CLK1_MULTIPLY_BY 1 IN#CLK3_DUTY_CYCLE 1 IN#CLK4_DIVIDE_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#CLK1_DUTY_CYCLE 1 IN#PLL_ENHPLL_CHECK 1 IN#CLK2_MULTIPLY_BY 1 IN#DIV_FACTOR4 1 IN#DIV_FACTOR3 1 IN#DIV_FACTOR2 1 IN#DIV_FACTOR1 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#CLK4_DUTY_CYCLE 1 IN#CLK2_DUTY_CYCLE 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK0_DIVIDE_BY 1 IN#CLK3_MULTIPLY_BY 1 IN#MULT_FACTOR4 1 IN#MULT_FACTOR3 1 IN#MULT_FACTOR2 1 IN#MULT_FACTOR1 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1 IN#CLK1_DIVIDE_BY 1</parameter>
1160 <parameter name="HIDDEN_MF_PORTS">MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1</parameter>
1161 <parameter name="HIDDEN_IF_PORTS">IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#readdata {output 32} IF#write {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#c2 {output 0} IF#address {input 2} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0}</parameter>
1162 <parameter name="HIDDEN_IS_FIRST_EDIT" value="0" />
1163 <parameter name="AUTO_INCLK_INTERFACE_CLOCK_RATE" value="50000000" />
1164 <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
1165 </module>
1166 <module
1167 kind="altera_avalon_pio"
1168 version="13.0.1.99.2"
1169 enabled="1"
1170 name="g_sensor_int">
1171 <parameter name="bitClearingEdgeCapReg" value="false" />
1172 <parameter name="bitModifyingOutReg" value="false" />
1173 <parameter name="captureEdge" value="true" />
1174 <parameter name="direction" value="Input" />
1175 <parameter name="edgeType" value="RISING" />
1176 <parameter name="generateIRQ" value="true" />
1177 <parameter name="irqType" value="EDGE" />
1178 <parameter name="resetValue" value="0" />
1179 <parameter name="simDoTestBenchWiring" value="false" />
1180 <parameter name="simDrivenValue" value="0" />
1181 <parameter name="width" value="1" />
1182 <parameter name="clockRate" value="60000000" />
1183 </module>
1184 <module
1185 kind="altera_avalon_epcs_flash_controller"
1186 version="13.0.1.99.2"
1187 enabled="1"
1188 name="epcs">
1189 <parameter name="autoSelectASMIAtom" value="true" />
1190 <parameter name="useASMIAtom" value="false" />
1191 <parameter name="clockRate" value="100000000" />
1192 <parameter name="deviceFamilyString" value="Cyclone IV E" />
1193 <parameter name="autoInitializationFileName" value="DE0_Nano_SOPC_epcs" />
1194 </module>
1195 <module
1196 kind="altera_avalon_jtag_uart"
1197 version="13.0.1.99.2"
1198 enabled="1"
1199 name="jtag_uart">
1200 <parameter name="allowMultipleConnections" value="false" />
1201 <parameter name="hubInstanceID" value="0" />
1202 <parameter name="readBufferDepth" value="64" />
1203 <parameter name="readIRQThreshold" value="8" />
1204 <parameter name="simInputCharacterStream" value="" />
1205 <parameter name="simInteractiveOptions">INTERACTIVE_ASCII_OUTPUT</parameter>
1206 <parameter name="useRegistersForReadBuffer" value="true" />
1207 <parameter name="useRegistersForWriteBuffer" value="true" />
1208 <parameter name="useRelativePathForSimFile" value="false" />
1209 <parameter name="writeBufferDepth" value="64" />
1210 <parameter name="writeIRQThreshold" value="8" />
1211 <parameter name="avalonSpec" value="2.0" />
1212 </module>
1213 <module kind="TERASIC_ADC_READ" version="1.0" enabled="1" name="adc_spi_read">
1214 <parameter name="AUTO_CLOCK_CLOCK_RATE" value="2000000" />
1215 </module>
1216 <module kind="TERASIC_SPI_3WIRE" version="1.0" enabled="1" name="gsensor_spi">
1217 <parameter name="AUTO_CLOCK_RESET_CLOCK_RATE" value="50000000" />
1218 </module>
1219 <module
1220 kind="altera_avalon_pio"
1221 version="13.0.1.99.2"
1222 enabled="1"
1223 name="select_i2c_clk">
1224 <parameter name="bitClearingEdgeCapReg" value="false" />
1225 <parameter name="bitModifyingOutReg" value="false" />
1226 <parameter name="captureEdge" value="false" />
1227 <parameter name="direction" value="Output" />
1228 <parameter name="edgeType" value="RISING" />
1229 <parameter name="generateIRQ" value="false" />
1230 <parameter name="irqType" value="LEVEL" />
1231 <parameter name="resetValue" value="0" />
1232 <parameter name="simDoTestBenchWiring" value="false" />
1233 <parameter name="simDrivenValue" value="0" />
1234 <parameter name="width" value="1" />
1235 <parameter name="clockRate" value="60000000" />
1236 </module>
1237 <module
1238 kind="altera_avalon_mm_clock_crossing_bridge"
1239 version="13.0"
1240 enabled="1"
1241 name="clock_crossing_io">
1242 <parameter name="DATA_WIDTH" value="32" />
1243 <parameter name="SYMBOL_WIDTH" value="8" />
1244 <parameter name="ADDRESS_WIDTH" value="10" />
1245 <parameter name="ADDRESS_UNITS" value="SYMBOLS" />
1246 <parameter name="MAX_BURST_SIZE" value="1" />
1247 <parameter name="COMMAND_FIFO_DEPTH" value="16" />
1248 <parameter name="RESPONSE_FIFO_DEPTH" value="32" />
1249 <parameter name="MASTER_SYNC_DEPTH" value="3" />
1250 <parameter name="SLAVE_SYNC_DEPTH" value="3" />
1251 <parameter name="AUTO_M0_CLK_CLOCK_RATE" value="60000000" />
1252 <parameter name="AUTO_S0_CLK_CLOCK_RATE" value="100000000" />
1253 <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
1254 </module>
1255 <module
1256 kind="altera_avalon_mm_clock_crossing_bridge"
1257 version="13.0"
1258 enabled="1"
1259 name="clock_crossing_io2">
1260 <parameter name="DATA_WIDTH" value="32" />
1261 <parameter name="SYMBOL_WIDTH" value="8" />
1262 <parameter name="ADDRESS_WIDTH" value="12" />
1263 <parameter name="ADDRESS_UNITS" value="SYMBOLS" />
1264 <parameter name="MAX_BURST_SIZE" value="1" />
1265 <parameter name="COMMAND_FIFO_DEPTH" value="16" />
1266 <parameter name="RESPONSE_FIFO_DEPTH" value="64" />
1267 <parameter name="MASTER_SYNC_DEPTH" value="3" />
1268 <parameter name="SLAVE_SYNC_DEPTH" value="3" />
1269 <parameter name="AUTO_M0_CLK_CLOCK_RATE" value="50000000" />
1270 <parameter name="AUTO_S0_CLK_CLOCK_RATE" value="100000000" />
1271 <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
1272 </module>
1273 <module kind="altera_nios2_qsys" version="13.0" enabled="1" name="cpu">
1274 <parameter name="setting_showUnpublishedSettings" value="false" />
1275 <parameter name="setting_showInternalSettings" value="false" />
1276 <parameter name="setting_preciseSlaveAccessErrorException" value="false" />
1277 <parameter name="setting_preciseIllegalMemAccessException" value="false" />
1278 <parameter name="setting_preciseDivisionErrorException" value="true" />
1279 <parameter name="setting_performanceCounter" value="false" />
1280 <parameter name="setting_illegalMemAccessDetection" value="false" />
1281 <parameter name="setting_illegalInstructionsTrap" value="false" />
1282 <parameter name="setting_fullWaveformSignals" value="false" />
1283 <parameter name="setting_extraExceptionInfo" value="false" />
1284 <parameter name="setting_exportPCB" value="false" />
1285 <parameter name="setting_debugSimGen" value="false" />
1286 <parameter name="setting_clearXBitsLDNonBypass" value="true" />
1287 <parameter name="setting_bit31BypassDCache" value="true" />
1288 <parameter name="setting_bigEndian" value="false" />
1289 <parameter name="setting_export_large_RAMs" value="false" />
1290 <parameter name="setting_asic_enabled" value="false" />
1291 <parameter name="setting_asic_synopsys_translate_on_off" value="false" />
1292 <parameter name="setting_oci_export_jtag_signals" value="false" />
1293 <parameter name="setting_bhtIndexPcOnly" value="false" />
1294 <parameter name="setting_avalonDebugPortPresent" value="false" />
1295 <parameter name="setting_alwaysEncrypt" value="true" />
1296 <parameter name="setting_allowFullAddressRange" value="false" />
1297 <parameter name="setting_activateTrace" value="true" />
1298 <parameter name="setting_activateTestEndChecker" value="false" />
1299 <parameter name="setting_activateMonitors" value="true" />
1300 <parameter name="setting_activateModelChecker" value="false" />
1301 <parameter name="setting_HDLSimCachesCleared" value="true" />
1302 <parameter name="setting_HBreakTest" value="false" />
1303 <parameter name="muldiv_divider" value="true" />
1304 <parameter name="mpu_useLimit" value="false" />
1305 <parameter name="mpu_enabled" value="false" />
1306 <parameter name="mmu_enabled" value="false" />
1307 <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
1308 <parameter name="manuallyAssignCpuID" value="false" />
1309 <parameter name="debug_triggerArming" value="true" />
1310 <parameter name="debug_embeddedPLL" value="true" />
1311 <parameter name="debug_debugReqSignals" value="false" />
1312 <parameter name="debug_assignJtagInstanceID" value="false" />
1313 <parameter name="dcache_omitDataMaster" value="false" />
1314 <parameter name="cpuReset" value="false" />
1315 <parameter name="is_hardcopy_compatible" value="false" />
1316 <parameter name="setting_shadowRegisterSets" value="0" />
1317 <parameter name="mpu_numOfInstRegion" value="16" />
1318 <parameter name="mpu_numOfDataRegion" value="16" />
1319 <parameter name="mmu_TLBMissExcOffset" value="0" />
1320 <parameter name="debug_jtagInstanceID" value="0" />
1321 <parameter name="resetOffset" value="0" />
1322 <parameter name="exceptionOffset" value="32" />
1323 <parameter name="cpuID" value="0" />
1324 <parameter name="cpuID_stored" value="0" />
1325 <parameter name="breakOffset" value="32" />
1326 <parameter name="userDefinedSettings" value="" />
1327 <parameter name="resetSlave">epcs.epcs_control_port</parameter>
1328 <parameter name="mmu_TLBMissExcSlave" value="" />
1329 <parameter name="exceptionSlave" value="sdram.s1" />
1330 <parameter name="breakSlave">cpu.jtag_debug_module</parameter>
1331 <parameter name="setting_perfCounterWidth" value="32" />
1332 <parameter name="setting_interruptControllerType" value="External" />
1333 <parameter name="setting_branchPredictionType" value="Automatic" />
1334 <parameter name="setting_bhtPtrSz" value="8" />
1335 <parameter name="muldiv_multiplierType" value="EmbeddedMulFast" />
1336 <parameter name="mpu_minInstRegionSize" value="6" />
1337 <parameter name="mpu_minDataRegionSize" value="6" />
1338 <parameter name="mmu_uitlbNumEntries" value="4" />
1339 <parameter name="mmu_udtlbNumEntries" value="6" />
1340 <parameter name="mmu_tlbPtrSz" value="7" />
1341 <parameter name="mmu_tlbNumWays" value="16" />
1342 <parameter name="mmu_processIDNumBits" value="8" />
1343 <parameter name="impl" value="Fast" />
1344 <parameter name="icache_size" value="4096" />
1345 <parameter name="icache_tagramBlockType" value="Automatic" />
1346 <parameter name="icache_ramBlockType" value="Automatic" />
1347 <parameter name="icache_numTCIM" value="0" />
1348 <parameter name="icache_burstType" value="Sequential" />
1349 <parameter name="dcache_bursts" value="false" />
1350 <parameter name="dcache_victim_buf_impl" value="ram" />
1351 <parameter name="debug_level" value="Level1" />
1352 <parameter name="debug_OCIOnchipTrace" value="_128" />
1353 <parameter name="dcache_size" value="0" />
1354 <parameter name="dcache_tagramBlockType" value="Automatic" />
1355 <parameter name="dcache_ramBlockType" value="Automatic" />
1356 <parameter name="dcache_numTCDM" value="0" />
1357 <parameter name="dcache_lineSize" value="32" />
1358 <parameter name="setting_exportvectors" value="false" />
1359 <parameter name="setting_ecc_present" value="false" />
1360 <parameter name="regfile_ramBlockType" value="Automatic" />
1361 <parameter name="ocimem_ramBlockType" value="Automatic" />
1362 <parameter name="mmu_ramBlockType" value="Automatic" />
1363 <parameter name="bht_ramBlockType" value="Automatic" />
1364 <parameter name="instAddrWidth" value="26" />
1365 <parameter name="dataAddrWidth" value="28" />
1366 <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
1367 <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
1368 <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
1369 <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
1370 <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
1371 <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
1372 <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
1373 <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
1374 <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='sdram.s1' start='0x0' end='0x2000000' /><slave name='cpu.jtag_debug_module' start='0x2000000' end='0x2000800' /><slave name='epcs.epcs_control_port' start='0x3000000' end='0x3000800' /></address-map>]]></parameter>
1375 <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='sdram.s1' start='0x0' end='0x2000000' /><slave name='cpu.jtag_debug_module' start='0x2000000' end='0x2000800' /><slave name='uart_0.s1' start='0x2000D00' end='0x2000D20' /><slave name='uart_1.s1' start='0x2000D40' end='0x2000D60' /><slave name='epcs.epcs_control_port' start='0x3000000' end='0x3000800' /><slave name='altpll_sys.pll_slave' start='0x6001000' end='0x6001010' /><slave name='adc_spi_read.slave' start='0x6001018' end='0x600101C' /><slave name='gsensor_spi.slave' start='0x7000800' end='0x7000840' /><slave name='i2c_sda.s1' start='0x7000840' end='0x7000850' /><slave name='i2c_scl.s1' start='0x7000850' end='0x7000860' /><slave name='key.s1' start='0x8000020' end='0x8000030' /><slave name='led.s1' start='0x8000030' end='0x8000040' /><slave name='sw.s1' start='0x8000040' end='0x8000050' /><slave name='g_sensor_int.s1' start='0x8000050' end='0x8000060' /><slave name='select_i2c_clk.s1' start='0x8000060' end='0x8000070' /><slave name='pio.s1' start='0x8000080' end='0x8000090' /><slave name='multi_pwm_0.avalon_slave_0' start='0x80000A0' end='0x80000C0' /><slave name='jtag_uart.avalon_jtag_slave' start='0x80001A0' end='0x80001A8' /><slave name='sysver_0.avalon_slave_0' start='0x80001C0' end='0x80001E0' /><slave name='timer_0.s1' start='0x8000200' end='0x8000220' /><slave name='timer_1.s1' start='0x8000220' end='0x8000240' /><slave name='timer_2.s1' start='0x8000240' end='0x8000260' /><slave name='timer_3.s1' start='0x8000260' end='0x8000280' /><slave name='can_top_0.avalon_slave_0' start='0x8020000' end='0x8020400' /><slave name='vic_0.csr_access' start='0xF000000' end='0xF000400' /></address-map>]]></parameter>
1376 <parameter name="clockFrequency" value="100000000" />
1377 <parameter name="deviceFamilyName" value="Cyclone IV E" />
1378 <parameter name="internalIrqMaskSystemInfo" value="0" />
1379 <parameter name="customInstSlavesSystemInfo" value="&lt;info/&gt;" />
1380 <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
1381 <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
1382 <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
1383 <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
1384 <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
1385 <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
1386 <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
1387 <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
1388 <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
1389 </module>
1390 <module
1391 kind="altera_avalon_sysid_qsys"
1392 version="13.0"
1393 enabled="0"
1394 name="sysid">
1395 <parameter name="id" value="0" />
1396 <parameter name="timestamp" value="0" />
1397 <parameter name="AUTO_CLK_CLOCK_RATE" value="60000000" />
1398 <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
1399 </module>
1400 <module kind="altera_clock_bridge" version="13.0" enabled="1" name="c0">
1401 <parameter name="DERIVED_CLOCK_RATE" value="100000000" />
1402 <parameter name="EXPLICIT_CLOCK_RATE" value="0" />
1403 <parameter name="NUM_CLOCK_OUTPUTS" value="1" />
1404 </module>
1405 <module kind="altera_clock_bridge" version="13.0" enabled="1" name="c2">
1406 <parameter name="DERIVED_CLOCK_RATE" value="60000000" />
1407 <parameter name="EXPLICIT_CLOCK_RATE" value="0" />
1408 <parameter name="NUM_CLOCK_OUTPUTS" value="1" />
1409 </module>
1410 <module kind="altera_clock_bridge" version="13.0" enabled="1" name="c4">
1411 <parameter name="DERIVED_CLOCK_RATE" value="2000000" />
1412 <parameter name="EXPLICIT_CLOCK_RATE" value="0" />
1413 <parameter name="NUM_CLOCK_OUTPUTS" value="1" />
1414 </module>
1415 <module kind="sysver" version="1.0" enabled="1" name="sysver_0">
1416 <parameter name="VER1_ROM_REG_VALUE" value="7" />
1417 <parameter name="VER2_ROM_REG_VALUE" value="0" />
1418 <parameter name="VER3_ROM_REG_VALUE" value="1" />
1419 <parameter name="VER4_ROM_REG_VALUE" value="0" />
1420 <parameter name="VER5_RAM_REG_VALUE" value="0" />
1421 <parameter name="VER6_RAM_REG_VALUE" value="0" />
1422 <parameter name="VER7_RAM_REG_VALUE" value="0" />
1423 <parameter name="VER8_RAM_REG_VALUE" value="0" />
1424 <parameter name="AUTO_CLOCK_RESET_CLOCK_RATE" value="60000000" />
1425 <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
1426 </module>
1427 <module
1428 kind="altera_avalon_timer"
1429 version="13.0.1.99.2"
1430 enabled="1"
1431 name="timer_0">
1432 <parameter name="alwaysRun" value="false" />
1433 <parameter name="counterSize" value="32" />
1434 <parameter name="fixedPeriod" value="false" />
1435 <parameter name="period" value="1" />
1436 <parameter name="periodUnits" value="MSEC" />
1437 <parameter name="resetOutput" value="false" />
1438 <parameter name="snapshot" value="true" />
1439 <parameter name="timeoutPulseOutput" value="false" />
1440 <parameter name="systemFrequency" value="60000000" />
1441 </module>
1442 <module
1443 kind="altera_avalon_timer"
1444 version="13.0.1.99.2"
1445 enabled="1"
1446 name="timer_1">
1447 <parameter name="alwaysRun" value="false" />
1448 <parameter name="counterSize" value="32" />
1449 <parameter name="fixedPeriod" value="false" />
1450 <parameter name="period" value="1" />
1451 <parameter name="periodUnits" value="MSEC" />
1452 <parameter name="resetOutput" value="false" />
1453 <parameter name="snapshot" value="true" />
1454 <parameter name="timeoutPulseOutput" value="false" />
1455 <parameter name="systemFrequency" value="60000000" />
1456 </module>
1457 <module
1458 kind="altera_avalon_timer"
1459 version="13.0.1.99.2"
1460 enabled="1"
1461 name="timer_2">
1462 <parameter name="alwaysRun" value="false" />
1463 <parameter name="counterSize" value="32" />
1464 <parameter name="fixedPeriod" value="false" />
1465 <parameter name="period" value="1" />
1466 <parameter name="periodUnits" value="MSEC" />
1467 <parameter name="resetOutput" value="false" />
1468 <parameter name="snapshot" value="true" />
1469 <parameter name="timeoutPulseOutput" value="false" />
1470 <parameter name="systemFrequency" value="60000000" />
1471 </module>
1472 <module
1473 kind="altera_avalon_timer"
1474 version="13.0.1.99.2"
1475 enabled="1"
1476 name="timer_3">
1477 <parameter name="alwaysRun" value="false" />
1478 <parameter name="counterSize" value="32" />
1479 <parameter name="fixedPeriod" value="false" />
1480 <parameter name="period" value="1" />
1481 <parameter name="periodUnits" value="MSEC" />
1482 <parameter name="resetOutput" value="false" />
1483 <parameter name="snapshot" value="true" />
1484 <parameter name="timeoutPulseOutput" value="false" />
1485 <parameter name="systemFrequency" value="60000000" />
1486 </module>
1487 <module
1488 kind="altera_avalon_timer"
1489 version="13.0.1.99.2"
1490 enabled="0"
1491 name="timer_4">
1492 <parameter name="alwaysRun" value="false" />
1493 <parameter name="counterSize" value="32" />
1494 <parameter name="fixedPeriod" value="false" />
1495 <parameter name="period" value="1" />
1496 <parameter name="periodUnits" value="MSEC" />
1497 <parameter name="resetOutput" value="false" />
1498 <parameter name="snapshot" value="true" />
1499 <parameter name="timeoutPulseOutput" value="false" />
1500 <parameter name="systemFrequency" value="60000000" />
1501 </module>
1502 <module
1503 kind="altera_avalon_timer"
1504 version="13.0.1.99.2"
1505 enabled="0"
1506 name="timer_5">
1507 <parameter name="alwaysRun" value="false" />
1508 <parameter name="counterSize" value="32" />
1509 <parameter name="fixedPeriod" value="false" />
1510 <parameter name="period" value="1" />
1511 <parameter name="periodUnits" value="MSEC" />
1512 <parameter name="resetOutput" value="false" />
1513 <parameter name="snapshot" value="true" />
1514 <parameter name="timeoutPulseOutput" value="false" />
1515 <parameter name="systemFrequency" value="60000000" />
1516 </module>
1517 <module
1518 kind="altera_avalon_timer"
1519 version="13.0.1.99.2"
1520 enabled="0"
1521 name="timer_6">
1522 <parameter name="alwaysRun" value="false" />
1523 <parameter name="counterSize" value="32" />
1524 <parameter name="fixedPeriod" value="false" />
1525 <parameter name="period" value="1" />
1526 <parameter name="periodUnits" value="MSEC" />
1527 <parameter name="resetOutput" value="false" />
1528 <parameter name="snapshot" value="true" />
1529 <parameter name="timeoutPulseOutput" value="false" />
1530 <parameter name="systemFrequency" value="60000000" />
1531 </module>
1532 <module
1533 kind="altera_avalon_timer"
1534 version="13.0.1.99.2"
1535 enabled="0"
1536 name="timer_7">
1537 <parameter name="alwaysRun" value="false" />
1538 <parameter name="counterSize" value="32" />
1539 <parameter name="fixedPeriod" value="false" />
1540 <parameter name="period" value="1" />
1541 <parameter name="periodUnits" value="MSEC" />
1542 <parameter name="resetOutput" value="false" />
1543 <parameter name="snapshot" value="true" />
1544 <parameter name="timeoutPulseOutput" value="false" />
1545 <parameter name="systemFrequency" value="60000000" />
1546 </module>
1547 <module
1548 kind="altera_avalon_timer"
1549 version="13.0.1.99.2"
1550 enabled="0"
1551 name="timer_8">
1552 <parameter name="alwaysRun" value="false" />
1553 <parameter name="counterSize" value="32" />
1554 <parameter name="fixedPeriod" value="false" />
1555 <parameter name="period" value="1" />
1556 <parameter name="periodUnits" value="MSEC" />
1557 <parameter name="resetOutput" value="false" />
1558 <parameter name="snapshot" value="true" />
1559 <parameter name="timeoutPulseOutput" value="false" />
1560 <parameter name="systemFrequency" value="60000000" />
1561 </module>
1562 <module
1563 kind="altera_avalon_timer"
1564 version="13.0.1.99.2"
1565 enabled="0"
1566 name="timer_9">
1567 <parameter name="alwaysRun" value="false" />
1568 <parameter name="counterSize" value="32" />
1569 <parameter name="fixedPeriod" value="false" />
1570 <parameter name="period" value="1" />
1571 <parameter name="periodUnits" value="MSEC" />
1572 <parameter name="resetOutput" value="false" />
1573 <parameter name="snapshot" value="true" />
1574 <parameter name="timeoutPulseOutput" value="false" />
1575 <parameter name="systemFrequency" value="60000000" />
1576 </module>
1577 <module
1578 kind="altera_avalon_timer"
1579 version="13.0.1.99.2"
1580 enabled="0"
1581 name="timer_10">
1582 <parameter name="alwaysRun" value="false" />
1583 <parameter name="counterSize" value="32" />
1584 <parameter name="fixedPeriod" value="false" />
1585 <parameter name="period" value="1" />
1586 <parameter name="periodUnits" value="MSEC" />
1587 <parameter name="resetOutput" value="false" />
1588 <parameter name="snapshot" value="true" />
1589 <parameter name="timeoutPulseOutput" value="false" />
1590 <parameter name="systemFrequency" value="60000000" />
1591 </module>
1592 <module
1593 kind="altera_avalon_timer"
1594 version="13.0.1.99.2"
1595 enabled="0"
1596 name="timer_11">
1597 <parameter name="alwaysRun" value="false" />
1598 <parameter name="counterSize" value="32" />
1599 <parameter name="fixedPeriod" value="false" />
1600 <parameter name="period" value="1" />
1601 <parameter name="periodUnits" value="MSEC" />
1602 <parameter name="resetOutput" value="false" />
1603 <parameter name="snapshot" value="true" />
1604 <parameter name="timeoutPulseOutput" value="false" />
1605 <parameter name="systemFrequency" value="60000000" />
1606 </module>
1607 <module
1608 kind="altera_avalon_timer"
1609 version="13.0.1.99.2"
1610 enabled="0"
1611 name="timer_12">
1612 <parameter name="alwaysRun" value="false" />
1613 <parameter name="counterSize" value="32" />
1614 <parameter name="fixedPeriod" value="false" />
1615 <parameter name="period" value="1" />
1616 <parameter name="periodUnits" value="MSEC" />
1617 <parameter name="resetOutput" value="false" />
1618 <parameter name="snapshot" value="true" />
1619 <parameter name="timeoutPulseOutput" value="false" />
1620 <parameter name="systemFrequency" value="60000000" />
1621 </module>
1622 <module
1623 kind="altera_avalon_timer"
1624 version="13.0.1.99.2"
1625 enabled="0"
1626 name="timer_13">
1627 <parameter name="alwaysRun" value="false" />
1628 <parameter name="counterSize" value="32" />
1629 <parameter name="fixedPeriod" value="false" />
1630 <parameter name="period" value="1" />
1631 <parameter name="periodUnits" value="MSEC" />
1632 <parameter name="resetOutput" value="false" />
1633 <parameter name="snapshot" value="true" />
1634 <parameter name="timeoutPulseOutput" value="false" />
1635 <parameter name="systemFrequency" value="60000000" />
1636 </module>
1637 <module
1638 kind="altera_avalon_timer"
1639 version="13.0.1.99.2"
1640 enabled="0"
1641 name="timer_14">
1642 <parameter name="alwaysRun" value="false" />
1643 <parameter name="counterSize" value="32" />
1644 <parameter name="fixedPeriod" value="false" />
1645 <parameter name="period" value="1" />
1646 <parameter name="periodUnits" value="MSEC" />
1647 <parameter name="resetOutput" value="false" />
1648 <parameter name="snapshot" value="true" />
1649 <parameter name="timeoutPulseOutput" value="false" />
1650 <parameter name="systemFrequency" value="60000000" />
1651 </module>
1652 <module
1653 kind="altera_avalon_timer"
1654 version="13.0.1.99.2"
1655 enabled="0"
1656 name="timer_15">
1657 <parameter name="alwaysRun" value="false" />
1658 <parameter name="counterSize" value="32" />
1659 <parameter name="fixedPeriod" value="false" />
1660 <parameter name="period" value="1" />
1661 <parameter name="periodUnits" value="MSEC" />
1662 <parameter name="resetOutput" value="false" />
1663 <parameter name="snapshot" value="true" />
1664 <parameter name="timeoutPulseOutput" value="false" />
1665 <parameter name="systemFrequency" value="60000000" />
1666 </module>
1667 <module
1668 kind="altera_avalon_onchip_memory2"
1669 version="13.0.1.99.2"
1670 enabled="0"
1671 name="sram_dummy">
1672 <parameter name="allowInSystemMemoryContentEditor" value="false" />
1673 <parameter name="blockType" value="AUTO" />
1674 <parameter name="dataWidth" value="32" />
1675 <parameter name="dualPort" value="false" />
1676 <parameter name="initMemContent" value="true" />
1677 <parameter name="initializationFileName" value="onchip_mem.hex" />
1678 <parameter name="instanceID" value="NONE" />
1679 <parameter name="memorySize" value="32768" />
1680 <parameter name="readDuringWriteMode" value="DONT_CARE" />
1681 <parameter name="simAllowMRAMContentsFile" value="false" />
1682 <parameter name="simMemInitOnlyFilename" value="0" />
1683 <parameter name="singleClockOperation" value="false" />
1684 <parameter name="slave1Latency" value="1" />
1685 <parameter name="slave2Latency" value="1" />
1686 <parameter name="useNonDefaultInitFile" value="false" />
1687 <parameter name="useShallowMemBlocks" value="false" />
1688 <parameter name="writable" value="true" />
1689 <parameter name="autoInitializationFileName">DE0_Nano_SOPC_sram_dummy</parameter>
1690 <parameter name="deviceFamily" value="Cyclone IV E" />
1691 <parameter name="deviceFeatures">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
1692 </module>
1693 <module kind="altera_vic" version="13.0" enabled="1" name="vic_0">
1694 <parameter name="NUMBER_OF_INT_PORTS" value="32" />
1695 <parameter name="RIL_WIDTH" value="6" />
1696 <parameter name="DAISY_CHAIN_ENABLE" value="0" />
1697 <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
1698 <parameter name="AUTO_DEVICE" value="EP4CE22F17C6" />
1699 </module>
1700 <module kind="can_top" version="2.6" enabled="1" name="can_top_0">
1701 <parameter name="Tp" value="1" />
1702 <parameter name="TXMBOX_DEPTH" value="1" />
1703 <parameter name="RXMBOX_DEPTH" value="1" />
1704 <parameter name="AUTO_CLOCK_CLOCK_RATE" value="50000000" />
1705 </module>
1706 <module
1707 kind="altera_avalon_uart"
1708 version="13.0.1.99.2"
1709 enabled="1"
1710 name="uart_0">
1711 <parameter name="baud" value="115200" />
1712 <parameter name="dataBits" value="8" />
1713 <parameter name="fixedBaud" value="true" />
1714 <parameter name="parity" value="NONE" />
1715 <parameter name="simCharStream" value="" />
1716 <parameter name="simInteractiveInputEnable" value="false" />
1717 <parameter name="simInteractiveOutputEnable" value="false" />
1718 <parameter name="simTrueBaud" value="false" />
1719 <parameter name="stopBits" value="1" />
1720 <parameter name="syncRegDepth" value="2" />
1721 <parameter name="useCtsRts" value="false" />
1722 <parameter name="useEopRegister" value="false" />
1723 <parameter name="useRelativePathForSimFile" value="false" />
1724 <parameter name="clockRate" value="100000000" />
1725 </module>
1726 <module
1727 kind="altera_avalon_uart"
1728 version="13.0.1.99.2"
1729 enabled="1"
1730 name="uart_1">
1731 <parameter name="baud" value="115200" />
1732 <parameter name="dataBits" value="8" />
1733 <parameter name="fixedBaud" value="true" />
1734 <parameter name="parity" value="NONE" />
1735 <parameter name="simCharStream" value="" />
1736 <parameter name="simInteractiveInputEnable" value="false" />
1737 <parameter name="simInteractiveOutputEnable" value="false" />
1738 <parameter name="simTrueBaud" value="false" />
1739 <parameter name="stopBits" value="1" />
1740 <parameter name="syncRegDepth" value="2" />
1741 <parameter name="useCtsRts" value="false" />
1742 <parameter name="useEopRegister" value="false" />
1743 <parameter name="useRelativePathForSimFile" value="false" />
1744 <parameter name="clockRate" value="100000000" />
1745 </module>
1746 <module kind="altera_avalon_pio" version="13.0.1.99.2" enabled="1" name="pio">
1747 <parameter name="bitClearingEdgeCapReg" value="false" />
1748 <parameter name="bitModifyingOutReg" value="false" />
1749 <parameter name="captureEdge" value="false" />
1750 <parameter name="direction" value="Output" />
1751 <parameter name="edgeType" value="RISING" />
1752 <parameter name="generateIRQ" value="false" />
1753 <parameter name="irqType" value="LEVEL" />
1754 <parameter name="resetValue" value="0" />
1755 <parameter name="simDoTestBenchWiring" value="false" />
1756 <parameter name="simDrivenValue" value="0" />
1757 <parameter name="width" value="8" />
1758 <parameter name="clockRate" value="60000000" />
1759 </module>
1760 <module kind="multi_pwm" version="1.0" enabled="1" name="multi_pwm_0">
1761 <parameter name="W" value="32" />
1762 <parameter name="AUTO_CLOCK_RESET_CLOCK_RATE" value="60000000" />
1763 <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
1764 </module>
1765 <connection
1766 kind="avalon"
1767 version="13.0"
1768 start="cpu.instruction_master"
1769 end="cpu.jtag_debug_module">
1770 <parameter name="arbitrationPriority" value="1" />
1771 <parameter name="baseAddress" value="0x02000000" />
1772 <parameter name="defaultConnection" value="false" />
1773 </connection>
1774 <connection
1775 kind="avalon"
1776 version="13.0"
1777 start="cpu.data_master"
1778 end="cpu.jtag_debug_module">
1779 <parameter name="arbitrationPriority" value="1" />
1780 <parameter name="baseAddress" value="0x02000000" />
1781 <parameter name="defaultConnection" value="false" />
1782 </connection>
1783 <connection
1784 kind="clock"
1785 version="13.0"
1786 start="clk_50.clk"
1787 end="altpll_sys.inclk_interface" />
1788 <connection
1789 kind="avalon"
1790 version="13.0"
1791 start="cpu.data_master"
1792 end="altpll_sys.pll_slave">
1793 <parameter name="arbitrationPriority" value="1" />
1794 <parameter name="baseAddress" value="0x06001000" />
1795 <parameter name="defaultConnection" value="false" />
1796 </connection>
1797 <connection kind="clock" version="13.0" start="altpll_sys.c0" end="cpu.clk" />
1798 <connection kind="clock" version="13.0" start="altpll_sys.c2" end="sysid.clk" />
1799 <connection
1800 kind="clock"
1801 version="13.0"
1802 start="altpll_sys.c2"
1803 end="sys_clk_timer.clk" />
1804 <connection kind="clock" version="13.0" start="altpll_sys.c2" end="key.clk" />
1805 <connection kind="clock" version="13.0" start="altpll_sys.c2" end="sw.clk" />
1806 <connection kind="clock" version="13.0" start="altpll_sys.c2" end="led.clk" />
1807 <connection kind="avalon" version="13.0" start="cpu.data_master" end="sdram.s1">
1808 <parameter name="arbitrationPriority" value="1" />
1809 <parameter name="baseAddress" value="0x0000" />
1810 <parameter name="defaultConnection" value="false" />
1811 </connection>
1812 <connection kind="clock" version="13.0" start="altpll_sys.c0" end="sdram.clk" />
1813 <connection
1814 kind="clock"
1815 version="13.0"
1816 start="altpll_sys.c2"
1817 end="g_sensor_int.clk" />
1818 <connection kind="clock" version="13.0" start="clk_50.clk" end="i2c_scl.clk" />
1819 <connection kind="clock" version="13.0" start="clk_50.clk" end="i2c_sda.clk" />
1820 <connection
1821 kind="avalon"
1822 version="13.0"
1823 start="cpu.data_master"
1824 end="adc_spi_read.slave">
1825 <parameter name="arbitrationPriority" value="1" />
1826 <parameter name="baseAddress" value="0x06001018" />
1827 <parameter name="defaultConnection" value="false" />
1828 </connection>
1829 <connection
1830 kind="clock"
1831 version="13.0"
1832 start="altpll_sys.c4"
1833 end="adc_spi_read.clock" />
1834 <connection
1835 kind="clock"
1836 version="13.0"
1837 start="clk_50.clk"
1838 end="gsensor_spi.clock_reset" />
1839 <connection
1840 kind="avalon"
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2504 kind="clock"
2505 version="13.0"
2506 start="altpll_sys.c0"
2507 end="sram_dummy.clk1" />
2508 <connection
2509 kind="avalon"
2510 version="13.0"
2511 start="cpu.instruction_master"
2512 end="sram_dummy.s1">
2513 <parameter name="arbitrationPriority" value="1" />
2514 <parameter name="baseAddress" value="0x05000000" />
2515 <parameter name="defaultConnection" value="false" />
2516 </connection>
2517 <connection
2518 kind="avalon"
2519 version="13.0"
2520 start="cpu.data_master"
2521 end="sram_dummy.s1">
2522 <parameter name="arbitrationPriority" value="1" />
2523 <parameter name="baseAddress" value="0x05000000" />
2524 <parameter name="defaultConnection" value="false" />
2525 </connection>
2526 <connection
2527 kind="reset"
2528 version="13.0"
2529 start="clk_50.clk_reset"
2530 end="sram_dummy.reset1" />
2531 <connection
2532 kind="reset"
2533 version="13.0"
2534 start="cpu.jtag_debug_module_reset"
2535 end="sram_dummy.reset1" />
2536 <connection kind="clock" version="13.0" start="altpll_sys.c0" end="vic_0.clk" />
2537 <connection
2538 kind="reset"
2539 version="13.0"
2540 start="clk_50.clk_reset"
2541 end="vic_0.clk_reset" />
2542 <connection
2543 kind="reset"
2544 version="13.0"
2545 start="cpu.jtag_debug_module_reset"
2546 end="vic_0.clk_reset" />
2547 <connection
2548 kind="interrupt"
2549 version="13.0"
2550 start="vic_0.irq_input"
2551 end="jtag_uart.irq">
2552 <parameter name="irqNumber" value="1" />
2553 </connection>
2554 <connection
2555 kind="interrupt"
2556 version="13.0"
2557 start="vic_0.irq_input"
2558 end="sys_clk_timer.irq">
2559 <parameter name="irqNumber" value="0" />
2560 </connection>
2561 <connection kind="interrupt" version="13.0" start="vic_0.irq_input" end="key.irq">
2562 <parameter name="irqNumber" value="2" />
2563 </connection>
2564 <connection kind="interrupt" version="13.0" start="vic_0.irq_input" end="sw.irq">
2565 <parameter name="irqNumber" value="3" />
2566 </connection>
2567 <connection
2568 kind="interrupt"
2569 version="13.0"
2570 start="vic_0.irq_input"
2571 end="g_sensor_int.irq">
2572 <parameter name="irqNumber" value="4" />
2573 </connection>
2574 <connection
2575 kind="interrupt"
2576 version="13.0"
2577 start="vic_0.irq_input"
2578 end="timer_0.irq">
2579 <parameter name="irqNumber" value="16" />
2580 </connection>
2581 <connection
2582 kind="interrupt"
2583 version="13.0"
2584 start="vic_0.irq_input"
2585 end="timer_1.irq">
2586 <parameter name="irqNumber" value="17" />
2587 </connection>
2588 <connection
2589 kind="interrupt"
2590 version="13.0"
2591 start="vic_0.irq_input"
2592 end="timer_2.irq">
2593 <parameter name="irqNumber" value="18" />
2594 </connection>
2595 <connection
2596 kind="interrupt"
2597 version="13.0"
2598 start="vic_0.irq_input"
2599 end="timer_3.irq">
2600 <parameter name="irqNumber" value="19" />
2601 </connection>
2602 <connection
2603 kind="interrupt"
2604 version="13.0"
2605 start="vic_0.irq_input"
2606 end="timer_4.irq">
2607 <parameter name="irqNumber" value="20" />
2608 </connection>
2609 <connection
2610 kind="interrupt"
2611 version="13.0"
2612 start="vic_0.irq_input"
2613 end="timer_5.irq">
2614 <parameter name="irqNumber" value="21" />
2615 </connection>
2616 <connection
2617 kind="interrupt"
2618 version="13.0"
2619 start="vic_0.irq_input"
2620 end="timer_6.irq">
2621 <parameter name="irqNumber" value="22" />
2622 </connection>
2623 <connection
2624 kind="interrupt"
2625 version="13.0"
2626 start="vic_0.irq_input"
2627 end="timer_7.irq">
2628 <parameter name="irqNumber" value="23" />
2629 </connection>
2630 <connection
2631 kind="interrupt"
2632 version="13.0"
2633 start="vic_0.irq_input"
2634 end="timer_8.irq">
2635 <parameter name="irqNumber" value="24" />
2636 </connection>
2637 <connection
2638 kind="interrupt"
2639 version="13.0"
2640 start="vic_0.irq_input"
2641 end="timer_9.irq">
2642 <parameter name="irqNumber" value="25" />
2643 </connection>
2644 <connection
2645 kind="interrupt"
2646 version="13.0"
2647 start="vic_0.irq_input"
2648 end="timer_10.irq">
2649 <parameter name="irqNumber" value="26" />
2650 </connection>
2651 <connection
2652 kind="interrupt"
2653 version="13.0"
2654 start="vic_0.irq_input"
2655 end="timer_11.irq">
2656 <parameter name="irqNumber" value="27" />
2657 </connection>
2658 <connection
2659 kind="interrupt"
2660 version="13.0"
2661 start="vic_0.irq_input"
2662 end="timer_12.irq">
2663 <parameter name="irqNumber" value="28" />
2664 </connection>
2665 <connection
2666 kind="interrupt"
2667 version="13.0"
2668 start="vic_0.irq_input"
2669 end="timer_13.irq">
2670 <parameter name="irqNumber" value="29" />
2671 </connection>
2672 <connection
2673 kind="interrupt"
2674 version="13.0"
2675 start="vic_0.irq_input"
2676 end="timer_14.irq">
2677 <parameter name="irqNumber" value="30" />
2678 </connection>
2679 <connection
2680 kind="interrupt"
2681 version="13.0"
2682 start="vic_0.irq_input"
2683 end="timer_15.irq">
2684 <parameter name="irqNumber" value="31" />
2685 </connection>
2686 <connection
2687 kind="avalon_streaming"
2688 version="13.0"
2689 start="vic_0.interrupt_controller_out"
2690 end="cpu.interrupt_controller_in" />
2691 <connection
2692 kind="interrupt"
2693 version="13.0"
2694 start="vic_0.irq_input"
2695 end="epcs.irq">
2696 <parameter name="irqNumber" value="5" />
2697 </connection>
2698 <connection
2699 kind="clock"
2700 version="13.0"
2701 start="altpll_sys.c0"
2702 end="clock_crossing_io.s0_clk" />
2703 <connection kind="clock" version="13.0" start="clk_50.clk" end="can_top_0.clock" />
2704 <connection
2705 kind="reset"
2706 version="13.0"
2707 start="clk_50.clk_reset"
2708 end="can_top_0.clock_reset" />
2709 <connection
2710 kind="reset"
2711 version="13.0"
2712 start="cpu.jtag_debug_module_reset"
2713 end="can_top_0.clock_reset" />
2714 <connection
2715 kind="avalon"
2716 version="13.0"
2717 start="cpu.data_master"
2718 end="can_top_0.avalon_slave_0">
2719 <parameter name="arbitrationPriority" value="1" />
2720 <parameter name="baseAddress" value="0x08020000" />
2721 <parameter name="defaultConnection" value="false" />
2722 </connection>
2723 <connection
2724 kind="interrupt"
2725 version="13.0"
2726 start="vic_0.irq_input"
2727 end="can_top_0.interrupt_sender">
2728 <parameter name="irqNumber" value="10" />
2729 </connection>
2730 <connection
2731 kind="reset"
2732 version="13.0"
2733 start="cpu.jtag_debug_module_reset"
2734 end="uart_0.reset" />
2735 <connection
2736 kind="reset"
2737 version="13.0"
2738 start="clk_50.clk_reset"
2739 end="uart_0.reset" />
2740 <connection
2741 kind="reset"
2742 version="13.0"
2743 start="clk_50.clk_reset"
2744 end="uart_1.reset" />
2745 <connection
2746 kind="reset"
2747 version="13.0"
2748 start="cpu.jtag_debug_module_reset"
2749 end="uart_1.reset" />
2750 <connection
2751 kind="interrupt"
2752 version="13.0"
2753 start="vic_0.irq_input"
2754 end="uart_0.irq">
2755 <parameter name="irqNumber" value="6" />
2756 </connection>
2757 <connection
2758 kind="interrupt"
2759 version="13.0"
2760 start="vic_0.irq_input"
2761 end="uart_1.irq">
2762 <parameter name="irqNumber" value="7" />
2763 </connection>
2764 <connection
2765 kind="avalon"
2766 version="13.0"
2767 start="cpu.data_master"
2768 end="epcs.epcs_control_port">
2769 <parameter name="arbitrationPriority" value="1" />
2770 <parameter name="baseAddress" value="0x03000000" />
2771 <parameter name="defaultConnection" value="false" />
2772 </connection>
2773 <connection
2774 kind="avalon"
2775 version="13.0"
2776 start="cpu.instruction_master"
2777 end="epcs.epcs_control_port">
2778 <parameter name="arbitrationPriority" value="1" />
2779 <parameter name="baseAddress" value="0x03000000" />
2780 <parameter name="defaultConnection" value="false" />
2781 </connection>
2782 <connection kind="clock" version="13.0" start="altpll_sys.c0" end="epcs.clk" />
2783 <connection kind="clock" version="13.0" start="altpll_sys.c2" end="pio.clk" />
2784 <connection kind="reset" version="13.0" start="clk_50.clk_reset" end="pio.reset" />
2785 <connection
2786 kind="reset"
2787 version="13.0"
2788 start="cpu.jtag_debug_module_reset"
2789 end="pio.reset" />
2790 <connection
2791 kind="avalon"
2792 version="13.0"
2793 start="clock_crossing_io.m0"
2794 end="pio.s1">
2795 <parameter name="arbitrationPriority" value="1" />
2796 <parameter name="baseAddress" value="0x0080" />
2797 <parameter name="defaultConnection" value="false" />
2798 </connection>
2799 <connection kind="clock" version="13.0" start="altpll_sys.c0" end="uart_0.clk" />
2800 <connection kind="clock" version="13.0" start="altpll_sys.c0" end="uart_1.clk" />
2801 <connection kind="avalon" version="13.0" start="cpu.data_master" end="uart_0.s1">
2802 <parameter name="arbitrationPriority" value="1" />
2803 <parameter name="baseAddress" value="0x02000d00" />
2804 <parameter name="defaultConnection" value="false" />
2805 </connection>
2806 <connection kind="avalon" version="13.0" start="cpu.data_master" end="uart_1.s1">
2807 <parameter name="arbitrationPriority" value="1" />
2808 <parameter name="baseAddress" value="0x02000d40" />
2809 <parameter name="defaultConnection" value="false" />
2810 </connection>
2811 <connection
2812 kind="avalon"
2813 version="13.0"
2814 start="cpu.data_master"
2815 end="vic_0.csr_access">
2816 <parameter name="arbitrationPriority" value="1" />
2817 <parameter name="baseAddress" value="0x0f000000" />
2818 <parameter name="defaultConnection" value="false" />
2819 </connection>
2820 <connection
2821 kind="reset"
2822 version="13.0"
2823 start="clk_50.clk_reset"
2824 end="multi_pwm_0.clock_reset_reset" />
2825 <connection
2826 kind="reset"
2827 version="13.0"
2828 start="cpu.jtag_debug_module_reset"
2829 end="multi_pwm_0.clock_reset_reset" />
2830 <connection
2831 kind="avalon"
2832 version="13.0"
2833 start="clock_crossing_io.m0"
2834 end="multi_pwm_0.avalon_slave_0">
2835 <parameter name="arbitrationPriority" value="1" />
2836 <parameter name="baseAddress" value="0x00a0" />
2837 <parameter name="defaultConnection" value="false" />
2838 </connection>
2839 <connection
2840 kind="clock"
2841 version="13.0"
2842 start="altpll_sys.c2"
2843 end="multi_pwm_0.clock_reset" />
2844 <connection
2845 kind="reset"
2846 version="13.0"
2847 start="clk_50.clk_reset"
2848 end="cpu.reset_n" />
2849 <connection
2850 kind="reset"
2851 version="13.0"
2852 start="cpu.jtag_debug_module_reset"
2853 end="cpu.reset_n" />
2854 <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
2855 <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="0" />
2856</system>
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