1 | /*
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2 | * TOPPERS/OSEK Kernel
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3 | * Toyohashi Open Platform for Embedded Real-Time Systems/
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4 | * OSEK Kernel
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5 | *
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6 | * Copyright (C) 2004-2006 by Witz Corporation, JAPAN
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7 | *
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8 | * ãLì ÒÍCÈºÌ (1)`(4) Ìð©CFree Software Foundation
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9 | * ÉæÁÄö\³êÄ¢é GNU General Public License Ì Version 2 ÉL
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10 | * q³êÄ¢éðð½·êÉÀèC{\tgEFAi{\tgEFA
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11 | * ðüϵ½àÌðÜÞDȺ¯¶jðgpE¡»EüÏEÄzziȺC
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12 | * pÆÄÔj·é±Æð³Åø·éD
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13 | * (1) {\tgEFAð\[XR[hÌ`Åp·éêÉÍCãLÌì
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14 | * \¦C±Ìpð¨æѺL̳ÛØKèªC»ÌÜÜÌ`Å\[
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15 | * XR[hÉÜÜêÄ¢é±ÆD
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16 | * (2) {\tgEFAðCCu`®ÈÇC¼Ì\tgEFAJÉg
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17 | * pÅ«é`ÅÄzz·éêÉÍCÄzzɺ¤hL
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18 | gip
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19 | * Ò}j
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20 | AÈÇjÉCãLÌì \¦C±Ìpð¨æѺL
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21 | * ̳ÛØKèðfÚ·é±ÆD
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22 | * (3) {\tgEFAðC@íÉgÝÞÈÇC¼Ì\tgEFAJÉg
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23 | * pÅ«È¢`ÅÄzz·éêÉÍCÌ¢¸ê©Ìðð½·±
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24 | * ÆD
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25 | * (a) Äzzɺ¤hL
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26 | gipÒ}j
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27 | AÈÇjÉCãLÌ
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28 | * ì \¦C±Ìpð¨æѺL̳ÛØKèðfÚ·é±ÆD
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29 | * (b) ÄzzÌ`ÔðCÊÉèßéû@ÉæÁÄCTOPPERSvWFNgÉ
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30 | * ñ·é±ÆD
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31 | * (4) {\tgEFAÌpÉæè¼ÚIܽÍÔÚIɶ¶é¢©Èé¹
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32 | * Q©çàCãLì Ò¨æÑTOPPERSvWFNgðÆÓ·é±ÆD
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33 | *
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34 | * {\tgEFAÍC³ÛØÅñ³êÄ¢éàÌÅ éDãLì Ò¨
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35 | * æÑTOPPERSvWFNgÍC{\tgEFAÉÖµÄC»ÌKpÂ\«à
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36 | * ÜßÄC¢©ÈéÛØàsíÈ¢DܽC{\tgEFAÌpÉæè¼
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37 | * ÚIܽÍÔÚIɶ¶½¢©Èé¹QÉÖµÄàC»ÌÓCðíÈ¢D
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38 | *
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39 | */
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40 |
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41 | /*
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42 | * SH2 7144FpAhXè`ish2 7144Fpj
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43 | */
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44 |
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45 | #ifndef _SH7144_H_
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46 | #define _SH7144_H_
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47 |
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48 | /* SCIi`lPj */
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49 | #define SMR1 *(((volatile UINT8 *)0xFFFF81B0))
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50 | #define BRR1 *(((volatile UINT8 *)0xFFFF81B1))
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51 | #define SCR1 *(((volatile UINT8 *)0xFFFF81B2))
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52 | #define TDR1 *(((volatile UINT8 *)0xFFFF81B3))
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53 | #define SSR1 *(((volatile UINT8 *)0xFFFF81B4))
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54 | #define RDR1 *(((volatile UINT8 *)0xFFFF81B5))
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55 |
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56 | /* MTUi¤Êj */
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57 | #define TSTR *(((volatile UINT8 *)0xFFFF8240))
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58 |
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59 | /* MTUi`lPj */
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60 | #define TCR_1 *(((volatile UINT8 *)0xFFFF8280))
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61 | #define TIER_1 *(((volatile UINT8 *)0xFFFF8284))
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62 | #define TSR_1 *(((volatile UINT8 *)0xFFFF8285))
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63 | #define TCNT_1 *(((volatile UINT16 *)0xFFFF8286))
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64 | #define TGRA_1 *(((volatile UINT16 *)0xFFFF8288))
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65 |
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66 | /* MTUi`lQj */
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67 | #define TCR_2 *(((volatile UINT8 *)0xFFFF82A0))
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68 | #define TIER_2 *(((volatile UINT8 *)0xFFFF82A4))
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69 | #define TSR_2 *(((volatile UINT8 *)0xFFFF82A5))
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70 | #define TCNT_2 *(((volatile UINT16 *)0xFFFF82A6))
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71 | #define TGRB_2 *(((volatile UINT16 *)0xFFFF82AA))
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72 |
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73 | /* INTC */
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74 | #define IPRD *(((volatile UINT16 *)0xFFFF834E))
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75 | #define IPRE *(((volatile UINT16 *)0xFFFF8350))
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76 | #define IPRF *(((volatile UINT16 *)0xFFFF8352))
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77 | #define IPRG *(((volatile UINT16 *)0xFFFF8354))
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78 |
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79 | /* PFC |[gA */
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80 | #define PADRL *(((volatile UINT16 *)0xFFFF8382))
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81 | #define PAIORL *(((volatile UINT16 *)0xFFFF8386))
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82 | #define PACRL1 *(((volatile UINT16 *)0xFFFF838C))
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83 | #define PACRL2 *(((volatile UINT16 *)0xFFFF838E))
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84 |
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85 | /* PFC |[gE */
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86 | #define PEDRL *(((volatile UINT16 *)0xFFFF83B0))
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87 | #define PEIORL *(((volatile UINT16 *)0xFFFF83B4))
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88 |
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89 | /* CMT */
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90 | #define CMSTR *(((volatile UINT16 *)0xFFFF83D0))
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91 | #define CMCSR_0 *(((volatile UINT16 *)0xFFFF83D2))
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92 | #define CMCNT_0 *(((volatile UINT16 *)0xFFFF83D4))
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93 | #define CMCOR_0 *(((volatile UINT16 *)0xFFFF83D6))
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94 | #define CMCSR_1 *(((volatile UINT16 *)0xFFFF83D8))
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95 | #define CMCNT_1 *(((volatile UINT16 *)0xFFFF83DA))
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96 | #define CMCOR_1 *(((volatile UINT16 *)0xFFFF83DC))
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97 |
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98 | /* áÁïdÍóÔ */
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99 | #define MSTCR1 *(((volatile UINT16 *)0xFFFF861C))
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100 | #define MSTCR2 *(((volatile UINT16 *)0xFFFF861E))
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101 |
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102 |
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103 | #endif /* _SH7144_H_ */
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104 |
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